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license: mit
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---
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license: mit
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---
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---
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license: mit
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language:
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- en
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base_model:
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- CodeFormer
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pipeline_tag: frame
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tags:
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- Image
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- Colorize
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---
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# CodeFormer
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This version of CoderFormer has been converted to run on the Axera NPU using **w8a16** quantization.
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This model has been optimized with the following LoRA:
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Compatible with Pulsar2 version: 5.0-patch1
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## Convert tools links:
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For those who are interested in model conversion, you can try to export axmodel through
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- [The repo of AXera Platform](https://github.com/AXERA-TECH/ax-samples), which you can get the detail of guide
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- [Pulsar2 Link, How to Convert ONNX to axmodel](https://pulsar2-docs.readthedocs.io/en/latest/pulsar2/introduction.html)
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## Support Platform
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- AX650
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- [M4N-Dock(爱芯派Pro)](https://wiki.sipeed.com/hardware/zh/maixIV/m4ndock/m4ndock.html)
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- [M.2 Accelerator card](https://axcl-docs.readthedocs.io/zh-cn/latest/doc_guide_hardware.html)
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|Chips|model|cost|
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|--|--|--|
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|AX650|coderformer|408 ms|
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## How to use
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Download all files from this repository to the device
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```
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root@ax650:~/coderformer# tree
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.
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|-- model
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| `-- coderformer.axmodel
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|-- python
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|`-- run_axmodel.py
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|`-- requirements.txt
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```
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### Inference
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Input Data:
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|-- image
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| `-- 1850Geography.jpg
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#### Inference with AX650 Host, such as M4N-Dock(爱芯派Pro)
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```
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root@ax650 ~/realesrgan #python3 run_axmodel.py --inputs_path ./images --model_path ./coderformer.axmodel
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[INFO] Available providers: ['AxEngineExecutionProvider']
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[INFO] Using provider: AxEngineExecutionProvider
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[INFO] Chip type: ChipType.MC50
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[INFO] VNPU type: VNPUType.DISABLED
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[INFO] Engine version: 2.12.0s
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[INFO] Model type: 2 (triple core)
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[INFO] Compiler version: 5.0-patch1 681a0b38
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SR image save to `00_00.png`
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SR image save to `01_00.png`
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SR image save to `02_00.png`
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```
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Output:
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