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NDA.md

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+# Public Non-Disclosure Agreement (P-NDA)  
+
+**Invention:** CMS Manhattan JiRack (Ternary Transformer Optimization)  
+**Disclosing Party:** Konstantin Vladimirovich Grabko  
+**Effective Date:** Upon access, download, or viewing of this repository.  
+
+---
+
+## 1. Acceptance of Terms  
+
+By accessing the source code, architecture diagrams, or technical documentation in this repository, you ("The Recipient") acknowledge that you are entering into a binding confidentiality agreement with Konstantin Vladimirovich Grabko. **If you do not agree to these terms, you must exit this repository and delete any downloaded materials immediately.**  
+
+---
+
+## 2. Purpose  
+
+The Confidential Information is provided solely for **evaluation, educational research, or non-commercial testing**. Any other use requires an express Commercial License.  
+
+---
+
+## 3. Identification of Confidential Information (Trade Secrets)  
+
+The following elements are considered **"Trade Secrets"** and are protected under this P-NDA even if the code is publicly hosted:  
+- The specific mathematical implementation of the **Ternary Scaling Factor ($\gamma$)**.  
+- The internal logic of the **Buffered Routing Embedding (BRE)**.  
+- The fused kernel architecture of the **SwiGLU-Attention (SWA)**.  
+- Hardware-specific **optimization constants** for ROCm/HIP.  
+
+---
+
+## 4. Obligations & Restrictions  
+
+- **No Reverse Engineering:**  
+  You shall not attempt to deconstruct the compiled kernels or proprietary logic to create a competing product.  
+
+- **Non-Disclosure:**  
+  You shall not share, mirror, or redistribute specific technical optimizations (BRE/SWA) to third parties without including this NDA and the original License.  
+
+- **No Patent Claiming:**  
+  You are strictly prohibited from using the information found here to file patent applications or any other intellectual property claims in any jurisdiction.  
+
+---
+
+## 5. Termination of Confidentiality  
+
+The obligations under this Public NDA remain in effect for **three (3) years** from your last access to the materials, or until the Invention is fully disclosed in a granted public patent.  
+
+---
+
+## 6. Legal Enforcement  
+
+This agreement is governed by the laws of the State of New York. **Unauthorized use or disclosure of these Trade Secrets may result in statutory damages and injunctive relief.**  

claims.md

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+# Intellectual Property Claims & Patent Pending Notice  
+
+**Project:** CMS Manhattan JiRack  
+**Inventor:** Konstantin Vladimirovich Grabko  
+**Contact:** grabko@cmsmanhattan.com  
+**Status:** [PATENT PENDING] - Formal Claims Filed/Drafted December 21, 2025.  
+
+---
+
+## ⚠️ NOTICE TO DEVELOPERS AND COMMERCIAL ENTITIES  
+
+The technologies, architectures, and methods disclosed in this repository are the proprietary intellectual property of Konstantin Vladimirovich Grabko. This document serves as a formal public record of the following claims to establish **Prior Art** and notice of **Patent Pending** status.  
+
+---
+
+## I. Field of Invention  
+
+This invention pertains to **machine learning optimization**, specifically the **compression and hardware-acceleration of Transformer-based models** for non-NVIDIA (ROCm/HIP) environments.  
+
+---
+
+## II. Core Intellectual Property Claims  
+
+### 1. Ternary-Quantized Optimization  
+A method for reducing model VRAM footprint by quantizing weights into a ternary set $\{-1, 0, +1\}$ utilizing:  
+- A learnable scaling factor $\gamma$.  
+- A straight-through estimator (STE) to maintain model perplexity.  
+- Achieving up to 70% memory reduction.  
+
+### 2. Buffered Routing Embedding (BRE)  
+A proprietary dynamic routing architecture that utilizes **shared memory pools** on High Bandwidth Memory (HBM). This claim covers:  
+- The specific **per-layer buffering logic** that minimizes redundant data movement between the GPU global memory and compute units.  
+
+### 3. SwiGLU-Attention (SWA) Fusion  
+A novel fused compute kernel that integrates the **SwiGLU feed-forward network (FFN)** and **Multi-Head Attention (MHA)** into a single operational pass. This claim specifically covers:  
+- The reduction of activation memory overhead.  
+- The resulting thermal optimization (maintaining $<80^\circ\text{C}$).  
+
+### 4. Hardware-Agnostic Inference Pipeline  
+The specific software stack and **asynchronous memory pooling routine** optimized for ROCm/HIP runtimes, enabling **high-throughput LLM performance on non-proprietary hardware**.  
+
+---
+
+## III. Legal Restrictions & Usage  
+
+- **Non-Transferable:**  
+  Access to this code does not constitute a transfer of ownership of the underlying inventions.  
+
+- **Anti-Patent Clause:**  
+  Any party using this code is strictly prohibited from filing patent applications based on the **BRE**, **SWA**, or **Ternary-Quantized methods** described herein.  
+
+- **Commercial Licensing:**  
+  Any commercial use (SaaS, hardware integration, etc.) requires a **signed execution of the CMS Manhattan JiRack License V.1.2**.  
+
+---
+
+## IV. Contact for IP Inquiries  
+
+For patent licensing, joint venture opportunities, or freedom-to-operate inquiries, please contact:  
+
+**Konstantin Vladimirovich Grabko**  
+- **Email:** grabko@cmsmanhattan.com  
+- **Phone:** +1 (516) 777-0945  
+- **Location:** New York, USA  

invention_description.md

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+# Technical Description of the Invention  
+
+**Invention Title:**  
+Method for Ternary-Quantized Transformer Optimization with Buffered Routing Embedding (BRE) and SwiGLU-Attention (SWA) Fusion for Low-VRAM Inference on Non-NVIDIA Hardware  
+
+**Inventor:** Konstantin Vladimirovich Grabko  
+**Contact:** grabko@cmsmanhattan.com | +1 (516) 777-0945  
+**Date of Conception:** December 2025  
+**Field of Invention:** Neural network architectures and optimization for efficient inference on non-NVIDIA hardware  
+**Confidentiality Notice:** Proprietary invention – not for public disclosure without a signed NDA.  
+
+---
+
+## 1. Background of the Invention  
+
+Conventional Large Language Models (LLMs) rely on high-precision floating-point formats (FP16/BF16), which demand significant memory bandwidth and VRAM, typically necessitating expensive NVIDIA H100/A100 hardware. Existing quantization methods (4-bit/8-bit) often introduce perplexity loss or latency due to complex dequantization steps.  
+
+This invention addresses bottlenecks for non-NVIDIA hardware (AMD ROCm) by reimagining the transformer architecture at the weight, routing, and kernel levels.  
+
+---
+
+## 2. Summary of the Invention  
+
+The invention consists of a three-tier optimization stack:  
+- **Ternary Quantization:** Mapping weights to $\{-1, 0, +1\}$.  
+- **Buffered Routing Embedding (BRE):** Optimizing how tokens access memory.  
+- **SwiGLU-Attention (SWA) Fusion:** Combining compute-heavy layers into a single hardware kernel.  
+
+---
+
+## 3. Detailed Method Steps  
+
+### Tier 1: Ternary Weight Optimization  
+
+The model weights $W$ are constrained to a ternary set using a learnable scaling factor $\gamma$:  
+
+$$W_{quant} = \gamma \cdot \text{sign}(\text{clip}(W, -1, 1))$$  
+
+- **Process:** During training, a Straight-Through Estimator (STE) is used to pass gradients through the non-differentiable quantization function.  
+- **Benefit:** Reduces weight storage by $\approx 70\%$, allowing a 3B parameter model to fit into 20GB VRAM.  
+
+---
+
+### Tier 2: Buffered Routing Embedding (BRE)  
+
+Unlike standard embeddings that load full tables into active memory, BRE implements a dynamic routing mechanism:  
+- **Step A:** Tokens are analyzed for frequency and importance.  
+- **Step B:** High-frequency embeddings are cached in a dedicated HBM buffer.  
+- **Step C:** A routing logic directs the attention mechanism to the buffer, minimizing global memory fetches (HBM-to-Cache).  
+
+---
+
+### Tier 3: SwiGLU-Attention (SWA) Fusion  
+
+In standard transformers, the Multi-Head Attention (MHA) and Feed-Forward Network (FFN) are separate operations. This invention fuses them:  
+- **Mechanism:** The SwiGLU activation logic is integrated directly into the attention computation cycle.  
+- **Hardware Target:** Optimized for AMD’s CDNA/RDNA architectures using HIP kernels.  
+- **Result:** Thermal stability is maintained below $80^\circ\text{C}$ by reducing redundant register write-backs.  
+
+---
+
+## 4. Technical Advantages  
+
+| **Feature**              | **Traditional Transformers** | **CMS Manhattan JiRack**          |
+|---------------------------|-----------------------------|-------------------------------------|
+| **VRAM Usage (3B Model)** | ~45-60 GB (FP16)            | ~20 GB (Ternary)                   |
+| **Hardware Requirement**  | NVIDIA Proprietary (CUDA)   | Hardware Agnostic (ROCm/HIP)       |
+| **Operating Temp**        | 85°C - 95°C                 | < 80°C                             |
+| **Memory Bottleneck**     | High (Global Memory Fetches)| Low (BRE-Buffered)                 |  
+
+---
+
+## 5. Claims (Summary)  
+
+1. A method for Ternary Quantization using learnable scaling $\gamma$ for transformer weights.  
+2. The architecture of Buffered Routing Embedding (BRE) for HBM memory management.  
+3. The fusion of SwiGLU and Attention layers into a single hardware-optimized kernel.  
+4. The application of these methods specifically for non-NVIDIA/ROCm inference pipelines.  
+
+---
+
+## 6. Conclusion  
+
+This invention represents a significant leap in "democratizing" AI, allowing state-of-the-art model performance on cost-effective, non-proprietary hardware without the traditional trade-offs in speed or accuracy.  

performance_data.md

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+Markdown# Performance Benchmarks and Test Results
+
+**Invention Title:** Method for Ternary-Quantized Transformer Optimization with Buffered Routing Embedding and SWA Attention
+
+**Inventor:** Konstantin Vladimirovich Grabko  
+**Test Date:** December 2025  
+**Hardware Tested:** AMD MI50 (32 GB HBM2), custom cooling
+
+**Confidentiality Notice:** Internal test data – proprietary and not for publication.
+-
+- JiRackPyTorch_BitNet_class_3b.py
+-
+# ROCm System Management Interface
+
+---
+
+## Concise Info
+
+| GPU   | Temp (DieEdge) | AvgPwr | SCLK       | MCLK      | Fan    | Perf   | PwrCap  | VRAM% | GPU% |
+|-------|----------------|--------|------------|-----------|--------|--------|---------|-------|------|
+| GPU[0] | 46.0c          | N/A    | 1725Mhz    | 1000Mhz   | 17.65% | auto   | 225.0W  | 59%   | 100% |
+
+- **GPU[0]:** `get_power_avg` is not supported on the given system.  
+
+---
+
+### End of ROCm SMI Log
+-
+- Step   4270 | Loss: 9.1875 | VRAM: 14.85GB | 11.9 t/s
+- Step   4275 | Loss: 9.0000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4280 | Loss: 9.3125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4285 | Loss: 10.6875 | VRAM: 14.85GB | 11.9 t/s
+- Step   4290 | Loss: 10.1250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4295 | Loss: 10.4375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4300 | Loss: 10.6250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4305 | Loss: 10.3125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4310 | Loss: 10.3750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4315 | Loss: 10.8750 | VRAM: 14.85GB | 11.9 t/s
+- Step   4320 | Loss: 10.1875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4325 | Loss: 9.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4330 | Loss: 9.7500 | VRAM: 14.84GB | 11.9 t/s
+- Step   4335 | Loss: 8.6875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4340 | Loss: 9.1875 | VRAM: 14.85GB | 11.9 t/s
+- Step   4345 | Loss: 10.3125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4350 | Loss: 10.9375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4355 | Loss: 10.5000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4360 | Loss: 9.1250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4365 | Loss: 10.4375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4370 | Loss: 9.3125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4375 | Loss: 10.0625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4380 | Loss: 10.3125 | VRAM: 14.85GB | 11.9 t/s
+- Step   4385 | Loss: 10.5000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4390 | Loss: 9.5000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4395 | Loss: 10.9375 | VRAM: 14.85GB | 11.9 t/s
+- Step   4400 | Loss: 7.5312 | VRAM: 14.85GB | 11.9 t/s
+- Step   4405 | Loss: 9.7500 | VRAM: 14.84GB | 11.9 t/s
+- Step   4410 | Loss: 10.7500 | VRAM: 14.85GB | 11.9 t/s
+- Step   4415 | Loss: 9.1875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4420 | Loss: 11.0000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4425 | Loss: 9.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4430 | Loss: 10.3750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4435 | Loss: 10.8750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4440 | Loss: 10.9375 | VRAM: 14.85GB | 11.9 t/s
+- Step   4445 | Loss: 10.0000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4450 | Loss: 9.1875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4455 | Loss: 9.6875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4460 | Loss: 10.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4465 | Loss: 10.4375 | VRAM: 14.85GB | 11.9 t/s
+- Step   4470 | Loss: 10.4375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4475 | Loss: 9.5000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4480 | Loss: 9.8750 | VRAM: 14.85GB | 11.9 t/s
+- Step   4485 | Loss: 8.1875 | VRAM: 14.85GB | 11.9 t/s
+- Step   4490 | Loss: 11.1875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4495 | Loss: 10.6875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4500 | Loss: 10.6875 | VRAM: 14.84GB | 11.9 t/s
+>>> SAVING: Checkpoint to ./models/ternary_3b_checkpoint_- Step_4500...
+>>> CLEANUP: Removing old checkpoint ./models/ternary_3b_checkpoint_- Step_3000
+- Step   4505 | Loss: 10.5000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4510 | Loss: 9.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4515 | Loss: 9.8750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4520 | Loss: 9.6875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4525 | Loss: 10.6250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4530 | Loss: 9.3750 | VRAM: 14.85GB | 11.9 t/s
+- Step   4535 | Loss: 9.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4540 | Loss: 10.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4545 | Loss: 11.0000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4550 | Loss: 10.0000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4555 | Loss: 9.9375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4560 | Loss: 11.0625 | VRAM: 14.85GB | 11.9 t/s
+- Step   4565 | Loss: 9.3125 | VRAM: 14.85GB | 11.9 t/s
+- Step   4570 | Loss: 9.3750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4575 | Loss: 10.8125 | VRAM: 14.85GB | 11.9 t/s
+- Step   4580 | Loss: 10.7500 | VRAM: 14.85GB | 11.9 t/s
+- Step   4585 | Loss: 9.3750 | VRAM: 14.85GB | 11.9 t/s
+- Step   4590 | Loss: 10.7500 | VRAM: 14.84GB | 11.9 t/s
+- Step   4595 | Loss: 9.3125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4600 | Loss: 10.6250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4605 | Loss: 10.4375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4610 | Loss: 9.8750 | VRAM: 14.85GB | 11.9 t/s
+- Step   4615 | Loss: 10.6875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4620 | Loss: 10.0625 | VRAM: 14.85GB | 11.9 t/s
+- Step   4625 | Loss: 10.6250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4630 | Loss: 10.7500 | VRAM: 14.85GB | 11.9 t/s
+- Step   4635 | Loss: 10.5000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4640 | Loss: 10.0000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4645 | Loss: 10.9375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4650 | Loss: 10.6250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4655 | Loss: 9.6875 | VRAM: 14.85GB | 11.9 t/s
+- Step   4660 | Loss: 9.5000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4665 | Loss: 10.8750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4670 | Loss: 11.0625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4675 | Loss: 10.8750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4680 | Loss: 9.2500 | VRAM: 14.84GB | 11.9 t/s
+- Step   4685 | Loss: 9.0000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4690 | Loss: 10.5625 | VRAM: 14.84GB | 11.9 t/s
+- Step   4695 | Loss: 10.1875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4700 | Loss: 8.6875 | VRAM: 14.85GB | 11.9 t/s
+- Step   4705 | Loss: 10.7500 | VRAM: 14.85GB | 11.9 t/s
+- Step   4710 | Loss: 9.2500 | VRAM: 14.84GB | 11.9 t/s
+- Step   4715 | Loss: 8.3750 | VRAM: 14.84GB | 11.9 t/s
+- Step   4720 | Loss: 9.9375 | VRAM: 14.84GB | 11.9 t/s
+- Step   4725 | Loss: 10.8125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4730 | Loss: 9.8125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4735 | Loss: 9.2500 | VRAM: 14.84GB | 11.9 t/s
+- Step   4740 | Loss: 10.6875 | VRAM: 14.84GB | 11.9 t/s
+- Step   4745 | Loss: 10.1250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4750 | Loss: 10.6250 | VRAM: 14.84GB | 11.9 t/s
+- Step   4755 | Loss: 10.8125 | VRAM: 14.85GB | 11.9 t/s
+- Step   4760 | Loss: 10.4375 | VRAM: 14.85GB | 11.9 t/s
+- Step   4765 | Loss: 10.3125 | VRAM: 14.84GB | 11.9 t/s
+- Step   4770 | Loss: 9.5000 | VRAM: 14.84GB | 11.9 t/s
+- Step   4775 | Loss: 10.0000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4780 | Loss: 9.5000 | VRAM: 14.85GB | 11.9 t/s
+- Step   4785 | Loss: 9.0625 | VRAM: 14.84GB | 11.9 t/s