Add files using upload-large-folder tool

progress/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/__grp__triton_tem_fused_0.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_tem_fused_0.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.source", "triton_tem_fused_0.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.ttir", "triton_tem_fused_0.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.ttgir", "triton_tem_fused_0.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.llir", "triton_tem_fused_0.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.ptx", "triton_tem_fused_0.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.cubin", "triton_tem_fused_0.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.json

@@ -0,0 +1 @@
+{"hash": "d6d8579bc758efaefba73018088fcd8f749b5f25c3ab12d02ac240e2311ac409", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 8, "num_ctas": 1, "num_stages": 3, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 131072, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_tem_fused_0"}

progress/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.ttgir

@@ -0,0 +1,936 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 8], threadsPerWarp = [2, 16], warpsPerCTA = [8, 1], order = [1, 0]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1], threadsPerWarp = [32], warpsPerCTA = [8], order = [0]}>
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":18:0)
+#loc1 = loc(unknown)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":520:16)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":172:41)
+#loc83 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":403:51)
+#loc95 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":416:34)
+#loc131 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":198:45)
+#mma = #ttg.nvidia_mma<{versionMajor = 3, versionMinor = 0, warpsPerCTA = [8, 1], instrShape = [16, 64, 16]}>
+#mma1 = #ttg.nvidia_mma<{versionMajor = 3, versionMinor = 0, warpsPerCTA = [8, 1], instrShape = [16, 128, 16]}>
+#shared = #ttg.nvmma_shared<{swizzlingByteWidth = 128, transposed = false, elementBitWidth = 16}>
+#shared1 = #ttg.nvmma_shared<{swizzlingByteWidth = 128, transposed = true, elementBitWidth = 16}>
+#smem = #ttg.shared_memory
+#loc152 = loc("arg_Q"(#loc))
+#loc153 = loc("arg_K"(#loc))
+#loc154 = loc("arg_V"(#loc))
+#loc155 = loc("arg_LSE"(#loc))
+#loc156 = loc("arg_MAX"(#loc))
+#loc157 = loc("arg_KV_NUM_BLKS"(#loc))
+#loc158 = loc("arg_KV_IDX"(#loc))
+#loc159 = loc("arg_FULL_KV_NUM_BLKS"(#loc))
+#loc160 = loc("arg_FULL_KV_IDX"(#loc))
+#loc161 = loc("out_ptr0"(#loc))
+#loc162 = loc("ks0"(#loc))
+#loc163 = loc("ks1"(#loc))
+#loc164 = loc("ks2"(#loc))
+#loc165 = loc("ks3"(#loc))
+#loc166 = loc("ks4"(#loc))
+#loc200 = loc(callsite(#loc41 at #loc42))
+#loc239 = loc("m_ij"(#loc83))
+#loc249 = loc("l_i"(#loc95))
+#loc283 = loc(callsite(#loc41 at #loc131))
+#loc345 = loc(callsite(#loc239 at #loc200))
+#loc355 = loc(callsite(#loc249 at #loc200))
+#loc374 = loc(callsite(#loc239 at #loc283))
+#loc384 = loc(callsite(#loc249 at #loc283))
+#loc406 = loc(callsite(#loc1 at #loc345))
+#loc408 = loc(callsite(#loc1 at #loc355))
+#loc436 = loc(callsite(#loc1 at #loc374))
+#loc438 = loc(callsite(#loc1 at #loc384))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 8 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_tem_fused_0(%arg_Q: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_Q"(#loc)), %arg_K: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_K"(#loc)), %arg_V: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_V"(#loc)), %arg_LSE: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("arg_LSE"(#loc)), %arg_MAX: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("arg_MAX"(#loc)), %arg_KV_NUM_BLKS: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_KV_NUM_BLKS"(#loc)), %arg_KV_IDX: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_KV_IDX"(#loc)), %arg_FULL_KV_NUM_BLKS: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_FULL_KV_NUM_BLKS"(#loc)), %arg_FULL_KV_IDX: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_FULL_KV_IDX"(#loc)), %out_ptr0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i32 loc("ks0"(#loc)), %ks1: i32 loc("ks1"(#loc)), %ks2: i32 loc("ks2"(#loc)), %ks3: i32 loc("ks3"(#loc)), %ks4: i32 loc("ks4"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<1x64xi32, #mma> loc(#loc1)
+    %cst_0 = arith.constant dense<0> : tensor<128x1xi32, #mma> loc(#loc1)
+    %cst_1 = arith.constant dense<1> : tensor<128x1xi32, #mma> loc(#loc1)
+    %cst_2 = arith.constant dense<1> : tensor<1x64xi32, #mma> loc(#loc1)
+    %cst_3 = arith.constant dense<false> : tensor<128x64xi1, #mma> loc(#loc1)
+    %cst_4 = arith.constant dense<16> : tensor<1x64xi32, #mma> loc(#loc1)
+    %cst_5 = arith.constant dense<16> : tensor<128x1xi32, #mma> loc(#loc1)
+    %cst_6 = arith.constant dense<0.000000e+00> : tensor<128x64xf32, #mma> loc(#loc1)
+    %cst_7 = arith.constant dense<1024> : tensor<64x1xi32, #blocked> loc(#loc1)
+    %cst_8 = arith.constant dense<4096> : tensor<128x1xi32, #blocked> loc(#loc1)
+    %cst_9 = arith.constant dense<128> : tensor<1x128xi32, #blocked> loc(#loc1)
+    %c2_i32 = arith.constant 2 : i32 loc(#loc1)
+    %c4_i32 = arith.constant 4 : i32 loc(#loc1)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc1)
+    %c1_i32 = arith.constant 1 : i32 loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %c4096_i32 = arith.constant 4096 : i32 loc(#loc1)
+    %cst_10 = arith.constant dense<0.000000e+00> : tensor<128x128xbf16, #blocked> loc(#loc1)
+    %cst_11 = arith.constant dense<0.000000e+00> : tensor<64x128xbf16, #blocked> loc(#loc1)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %c63_i32 = arith.constant 63 : i32 loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %cst_12 = arith.constant dense<0.000000e+00> : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc1)
+    %cst_13 = arith.constant dense<1.000000e+00> : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc1)
+    %cst_14 = arith.constant dense<0.000000e+00> : tensor<128x128xf32, #mma1> loc(#loc1)
+    %cst_15 = arith.constant dense<0.0883883461> : tensor<128x64xf32, #mma> loc(#loc1)
+    %cst_16 = arith.constant dense<0xFF800000> : tensor<128x64xf32, #mma> loc(#loc1)
+    %cst_17 = arith.constant dense<1.44269502> : tensor<128x64xf32, #mma> loc(#loc1)
+    %cst_18 = arith.constant dense<0xFF800000> : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc1)
+    %c-1_i32 = arith.constant -1 : i32 loc(#loc1)
+    %c3_i32 = arith.constant 3 : i32 loc(#loc1)
+    %0 = arith.muli %ks0, %c4096_i32 : i32 loc(#loc2)
+    %q_start = tt.get_program_id x : i32 loc(#loc167)
+    %off_zq = tt.get_program_id y : i32 loc(#loc168)
+    %off_hq = tt.get_program_id z : i32 loc(#loc169)
+    %off_hkv = arith.divsi %off_hq, %c4_i32 : i32 loc(#loc170)
+    %q_offset = arith.muli %off_zq, %0 : i32 loc(#loc171)
+    %q_offset_19 = arith.muli %off_hq, %c128_i32 : i32 loc(#loc172)
+    %q_offset_20 = arith.addi %q_offset, %q_offset_19 : i32 loc(#loc173)
+    %k_offset = arith.muli %off_hkv, %c128_i32 : i32 loc(#loc174)
+    %Q = tt.addptr %arg_Q, %q_offset_20 : !tt.ptr<bf16>, i32 loc(#loc175)
+    %K = tt.addptr %arg_K, %k_offset : !tt.ptr<bf16>, i32 loc(#loc176)
+    %V = tt.addptr %arg_V, %k_offset : !tt.ptr<bf16>, i32 loc(#loc177)
+    %sparse_kv_idx_offset = arith.muli %q_start, %ks4 : i32 loc(#loc178)
+    %offs_m = arith.muli %q_start, %c128_i32 : i32 loc(#loc179)
+    %offs_m_21 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc180)
+    %offs_m_22 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc180)
+    %offs_m_23 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #blocked1> loc(#loc180)
+    %offs_m_24 = tt.splat %offs_m : i32 -> tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc181)
+    %offs_m_25 = tt.splat %offs_m : i32 -> tensor<128xi32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc181)
+    %offs_m_26 = tt.splat %offs_m : i32 -> tensor<128xi32, #blocked1> loc(#loc181)
+    %offs_m_27 = arith.addi %offs_m_24, %offs_m_21 : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc181)
+    %offs_m_28 = arith.addi %offs_m_25, %offs_m_22 : tensor<128xi32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc181)
+    %offs_m_29 = arith.addi %offs_m_26, %offs_m_23 : tensor<128xi32, #blocked1> loc(#loc181)
+    %ptr = tt.expand_dims %offs_m_27 {axis = 1 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xi32, #blocked> loc(#loc297)
+    %ptr_30 = tt.expand_dims %offs_m_28 {axis = 1 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128x1xi32, #mma> loc(#loc297)
+    %ptr_31 = arith.muli %ptr, %cst_8 : tensor<128x1xi32, #blocked> loc(#loc298)
+    %ptr_32 = tt.splat %Q : !tt.ptr<bf16> -> tensor<128x1x!tt.ptr<bf16>, #blocked> loc(#loc299)
+    %ptr_33 = tt.addptr %ptr_32, %ptr_31 : tensor<128x1x!tt.ptr<bf16>, #blocked>, tensor<128x1xi32, #blocked> loc(#loc299)
+    %ptr_34 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc300)
+    %ptr_35 = tt.expand_dims %ptr_34 {axis = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x128xi32, #blocked> loc(#loc300)
+    %ptr_36 = tt.broadcast %ptr_33 : tensor<128x1x!tt.ptr<bf16>, #blocked> -> tensor<128x128x!tt.ptr<bf16>, #blocked> loc(#loc301)
+    %ptr_37 = tt.broadcast %ptr_35 : tensor<1x128xi32, #blocked> -> tensor<128x128xi32, #blocked> loc(#loc301)
+    %ptr_38 = tt.addptr %ptr_36, %ptr_37 : tensor<128x128x!tt.ptr<bf16>, #blocked>, tensor<128x128xi32, #blocked> loc(#loc301)
+    %q = tt.splat %ks0 : i32 -> tensor<128x1xi32, #blocked> loc(#loc302)
+    %q_39 = tt.splat %ks0 : i32 -> tensor<128x1xi32, #mma> loc(#loc302)
+    %q_40 = arith.cmpi slt, %ptr, %q : tensor<128x1xi32, #blocked> loc(#loc302)
+    %q_41 = tt.broadcast %q_40 : tensor<128x1xi1, #blocked> -> tensor<128x128xi1, #blocked> loc(#loc303)
+    %q_42 = tt.load %ptr_38, %q_41, %cst_10 : tensor<128x128x!tt.ptr<bf16>, #blocked> loc(#loc303)
+    %q_43 = ttg.local_alloc %q_42 : (tensor<128x128xbf16, #blocked>) -> !ttg.memdesc<128x128xbf16, #shared, #smem> loc(#loc303)
+    %kv_indices = tt.addptr %arg_KV_IDX, %sparse_kv_idx_offset : !tt.ptr<i32>, i32 loc(#loc188)
+    %kv_start = tt.load %kv_indices : !tt.ptr<i32> loc(#loc189)
+    %kv_start_44 = arith.muli %kv_start, %c128_i32 : i32 loc(#loc190)
+    %kv_num_blocks = tt.addptr %arg_KV_NUM_BLKS, %q_start : !tt.ptr<i32>, i32 loc(#loc191)
+    %kv_num_blocks_45 = tt.load %kv_num_blocks : !tt.ptr<i32> loc(#loc192)
+    %block_n_end = arith.muli %kv_num_blocks_45, %c2_i32 : i32 loc(#loc193)
+    %block_n_end_46 = arith.addi %ks1, %c63_i32 : i32 loc(#loc304)
+    %block_n_end_47 = arith.divsi %block_n_end_46, %c64_i32 : i32 loc(#loc305)
+    %block_n_end_48 = arith.maxsi %block_n_end_47, %c1_i32 : i32 loc(#loc195)
+    %block_n_end_49 = arith.minsi %block_n_end, %block_n_end_48 : i32 loc(#loc196)
+    %offs_n = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> loc(#loc197)
+    %offs_n_50 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc197)
+    %offs_n_51 = tt.splat %kv_start_44 : i32 -> tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> loc(#loc198)
+    %offs_n_52 = arith.addi %offs_n_51, %offs_n : tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> loc(#loc198)
+    %1 = tt.expand_dims %offs_n_52 {axis = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> -> tensor<1x64xi32, #mma> loc(#loc39)
+    %ptr_53 = tt.splat %K : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>, #blocked> loc(#loc393)
+    %ptr_54 = tt.broadcast %ptr_35 : tensor<1x128xi32, #blocked> -> tensor<64x128xi32, #blocked> loc(#loc394)
+    %k = tt.splat %ks1 : i32 -> tensor<64x1xi32, #blocked> loc(#loc395)
+    %m = arith.remsi %ptr_30, %q_39 : tensor<128x1xi32, #mma> loc(#loc396)
+    %n = tt.splat %ks1 : i32 -> tensor<1x64xi32, #mma> loc(#loc397)
+    %tmp3 = arith.cmpi slt, %m, %cst_0 : tensor<128x1xi32, #mma> loc(#loc309)
+    %tmp5 = tt.broadcast %m : tensor<128x1xi32, #mma> -> tensor<128x64xi32, #mma> loc(#loc310)
+    %tmp6 = tt.broadcast %tmp3 : tensor<128x1xi1, #mma> -> tensor<128x64xi1, #mma> loc(#loc311)
+    %tmp7 = arith.cmpi sge, %m, %cst_0 : tensor<128x1xi32, #mma> loc(#loc312)
+    %tmp9 = tt.broadcast %tmp7 : tensor<128x1xi1, #mma> -> tensor<128x64xi1, #mma> loc(#loc313)
+    %tmp14 = arith.remsi %m, %cst_5 : tensor<128x1xi32, #mma> loc(#loc314)
+    %tmp14_55 = arith.cmpi ne, %tmp14, %cst_0 : tensor<128x1xi32, #mma> loc(#loc315)
+    %tmp14_56 = arith.divsi %m, %cst_5 : tensor<128x1xi32, #mma> loc(#loc316)
+    %tmp14_57 = arith.subi %tmp14_56, %cst_1 : tensor<128x1xi32, #mma> loc(#loc317)
+    %tmp14_58 = arith.select %tmp14_55, %tmp14_57, %tmp14_56 : tensor<128x1xi1, #mma>, tensor<128x1xi32, #mma> loc(#loc318)
+    %tmp14_59 = arith.select %tmp3, %tmp14_58, %tmp14_56 : tensor<128x1xi1, #mma>, tensor<128x1xi32, #mma> loc(#loc319)
+    %tmp17 = tt.broadcast %tmp14_59 : tensor<128x1xi32, #mma> -> tensor<128x64xi32, #mma> loc(#loc320)
+    %ptr_60 = tt.splat %V : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>, #blocked> loc(#loc398)
+    %k_61 = ttg.local_alloc : () -> !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc399)
+    %v = ttg.local_alloc : () -> !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc400)
+    %kv_offset = arith.cmpi sgt, %block_n_end_49, %c0_i32 : i32 loc(#loc462)
+    %offs_n_load = tt.splat %kv_start_44 : i32 -> tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc323)
+    %offs_n_load_62 = arith.addi %offs_n_load, %offs_n_50 : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc323)
+    %ptr_63 = tt.expand_dims %offs_n_load_62 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc402)
+    %ptr_64 = arith.muli %ptr_63, %cst_7 : tensor<64x1xi32, #blocked> loc(#loc403)
+    %ptr_65 = tt.addptr %ptr_53, %ptr_64 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc393)
+    %ptr_66 = tt.broadcast %ptr_65 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc394)
+    %ptr_67 = tt.addptr %ptr_66, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc394)
+    %k_68 = arith.cmpi slt, %ptr_63, %k : tensor<64x1xi32, #blocked> loc(#loc395)
+    %k_69 = tt.broadcast %k_68 : tensor<64x1xi1, #blocked> -> tensor<64x128xi1, #blocked> loc(#loc399)
+    %k_70 = ttg.memdesc_index %k_61[%c0_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+    %kv_offset_71 = tt.splat %kv_offset : i1 -> tensor<64x128xi1, #blocked> loc(#loc462)
+    %kv_offset_72 = arith.andi %kv_offset_71, %k_69 : tensor<64x128xi1, #blocked> loc(#loc462)
+    %k_73 = ttg.async_copy_global_to_local %ptr_67, %k_70 mask %kv_offset_72 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+    %k_74 = ttg.async_commit_group tokens %k_73 loc(#loc399)
+    %ptr_75 = tt.addptr %ptr_60, %ptr_64 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc398)
+    %ptr_76 = tt.broadcast %ptr_75 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc404)
+    %ptr_77 = tt.addptr %ptr_76, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc404)
+    %v_78 = ttg.memdesc_index %v[%c0_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+    %v_79 = ttg.async_copy_global_to_local %ptr_77, %v_78 mask %kv_offset_72 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+    %v_80 = ttg.async_commit_group tokens %v_79 loc(#loc400)
+    %kv_offset_81 = arith.cmpi sgt, %block_n_end_49, %c1_i32 : i32 loc(#loc462)
+    %kv_base_offset = arith.addi %kv_start_44, %c64_i32 : i32 loc(#loc324)
+    %offs_n_load_82 = tt.splat %kv_base_offset : i32 -> tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc323)
+    %offs_n_load_83 = arith.addi %offs_n_load_82, %offs_n_50 : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc323)
+    %ptr_84 = tt.expand_dims %offs_n_load_83 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc402)
+    %ptr_85 = arith.muli %ptr_84, %cst_7 : tensor<64x1xi32, #blocked> loc(#loc403)
+    %ptr_86 = tt.addptr %ptr_53, %ptr_85 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc393)
+    %ptr_87 = tt.broadcast %ptr_86 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc394)
+    %ptr_88 = tt.addptr %ptr_87, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc394)
+    %k_89 = arith.cmpi slt, %ptr_84, %k : tensor<64x1xi32, #blocked> loc(#loc395)
+    %k_90 = tt.broadcast %k_89 : tensor<64x1xi1, #blocked> -> tensor<64x128xi1, #blocked> loc(#loc399)
+    %k_91 = ttg.memdesc_index %k_61[%c1_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+    %kv_offset_92 = tt.splat %kv_offset_81 : i1 -> tensor<64x128xi1, #blocked> loc(#loc462)
+    %kv_offset_93 = arith.andi %kv_offset_92, %k_90 : tensor<64x128xi1, #blocked> loc(#loc462)
+    %k_94 = ttg.async_copy_global_to_local %ptr_88, %k_91 mask %kv_offset_93 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+    %k_95 = ttg.async_commit_group tokens %k_94 loc(#loc399)
+    %ptr_96 = tt.addptr %ptr_60, %ptr_85 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc398)
+    %ptr_97 = tt.broadcast %ptr_96 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc404)
+    %ptr_98 = tt.addptr %ptr_97, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc404)
+    %v_99 = ttg.memdesc_index %v[%c1_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+    %v_100 = ttg.async_copy_global_to_local %ptr_98, %v_99 mask %kv_offset_93 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+    %v_101 = ttg.async_commit_group tokens %v_100 loc(#loc400)
+    ttng.fence_async_shared {bCluster = false} loc(#loc325)
+    %kv_offset_102:12 = scf.for %kv_offset_173 = %c0_i32 to %block_n_end_49 step %c1_i32 iter_args(%acc_174 = %cst_14, %arg17 = %cst_12, %arg18 = %cst_18, %arg19 = %c64_i32, %arg20 = %1, %arg21 = %c1_i32, %arg22 = %c-1_i32, %k_175 = %k_74, %k_176 = %k_95, %v_177 = %v_80, %v_178 = %v_101, %arg27 = %c64_i32) -> (tensor<128x128xf32, #mma1>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, i32, tensor<1x64xi32, #mma>, i32, i32, !ttg.async.token, !ttg.async.token, !ttg.async.token, !ttg.async.token, i32)  : i32 {
+      %kv_offset_179 = arith.subi %block_n_end_49, %c2_i32 : i32 loc(#loc462)
+      %kv_offset_180 = arith.cmpi slt, %kv_offset_173, %kv_offset_179 : i32 loc(#loc462)
+      %kv_offset_181 = arith.subi %block_n_end_49, %c1_i32 : i32 loc(#loc462)
+      %kv_offset_182 = arith.cmpi slt, %kv_offset_173, %kv_offset_181 : i32 loc(#loc462)
+      %kv_offset_183 = arith.addi %arg22, %c1_i32 : i32 loc(#loc462)
+      %kv_offset_184 = arith.cmpi sge, %kv_offset_183, %c3_i32 : i32 loc(#loc462)
+      %kv_offset_185 = arith.select %kv_offset_184, %c0_i32, %kv_offset_183 : i32 loc(#loc462)
+      %k_186 = ttg.async_wait %k_175, %v_177 {num = 2 : i32} loc(#loc399)
+      %k_187 = ttg.memdesc_index %k_61[%kv_offset_185] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+      %k_188 = ttg.memdesc_trans %k_187 {order = array<i32: 1, 0>} : !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> -> !ttg.memdesc<128x64xbf16, #shared1, #smem, mutable, 3x128x64> loc(#loc326)
+      %qk = ttng.warp_group_dot %q_43, %k_188, %cst_6 {inputPrecision = 0 : i32, isAsync = true} : !ttg.memdesc<128x128xbf16, #shared, #smem> * !ttg.memdesc<128x64xbf16, #shared1, #smem, mutable, 3x128x64> -> tensor<128x64xf32, #mma> loc(#loc325)
+      %qk_189:4 = ttng.warp_group_dot_wait %qk, %q_43, %k_188, %acc_174 {pendings = 0 : i32} : tensor<128x64xf32, #mma>, !ttg.memdesc<128x128xbf16, #shared, #smem>, !ttg.memdesc<128x64xbf16, #shared1, #smem, mutable, 3x128x64>, tensor<128x128xf32, #mma1> loc(#loc325)
+      %qk_190 = arith.mulf %qk_189#0, %cst_15 : tensor<128x64xf32, #mma> loc(#loc327)
+      %n_191 = arith.remsi %arg20, %n : tensor<1x64xi32, #mma> loc(#loc397)
+      %post_mod_scores = arith.cmpi slt, %arg20, %n : tensor<1x64xi32, #mma> loc(#loc328)
+      %post_mod_scores_192 = tt.broadcast %post_mod_scores : tensor<1x64xi1, #mma> -> tensor<128x64xi1, #mma> loc(#loc329)
+      %post_mod_scores_193 = arith.select %post_mod_scores_192, %qk_190, %cst_16 : tensor<128x64xi1, #mma>, tensor<128x64xf32, #mma> loc(#loc329)
+      %tmp5_194 = tt.broadcast %n_191 : tensor<1x64xi32, #mma> -> tensor<128x64xi32, #mma> loc(#loc310)
+      %tmp5_195 = arith.cmpi sle, %tmp5_194, %tmp5 : tensor<128x64xi32, #mma> loc(#loc310)
+      %tmp6_196 = arith.andi %tmp6, %tmp5_195 : tensor<128x64xi1, #mma> loc(#loc311)
+      %tmp8 = arith.cmpi slt, %n_191, %cst : tensor<1x64xi32, #mma> loc(#loc330)
+      %tmp9_197 = tt.broadcast %tmp8 : tensor<1x64xi1, #mma> -> tensor<128x64xi1, #mma> loc(#loc313)
+      %tmp9_198 = arith.andi %tmp9, %tmp9_197 : tensor<128x64xi1, #mma> loc(#loc313)
+      %tmp10 = arith.extui %tmp8 : tensor<1x64xi1, #mma> to tensor<1x64xi32, #mma> loc(#loc331)
+      %tmp10_199 = arith.cmpi eq, %tmp10, %cst : tensor<1x64xi32, #mma> loc(#loc331)
+      %tmp11 = tt.broadcast %tmp10_199 : tensor<1x64xi1, #mma> -> tensor<128x64xi1, #mma> loc(#loc332)
+      %tmp11_200 = arith.andi %tmp9, %tmp11 : tensor<128x64xi1, #mma> loc(#loc332)
+      %tmp16 = arith.remsi %n_191, %cst_4 : tensor<1x64xi32, #mma> loc(#loc333)
+      %tmp16_201 = arith.cmpi ne, %tmp16, %cst : tensor<1x64xi32, #mma> loc(#loc334)
+      %tmp16_202 = arith.divsi %n_191, %cst_4 : tensor<1x64xi32, #mma> loc(#loc335)
+      %tmp16_203 = arith.subi %tmp16_202, %cst_2 : tensor<1x64xi32, #mma> loc(#loc336)
+      %tmp16_204 = arith.select %tmp16_201, %tmp16_203, %tmp16_202 : tensor<1x64xi1, #mma>, tensor<1x64xi32, #mma> loc(#loc337)
+      %tmp16_205 = arith.select %tmp8, %tmp16_204, %tmp16_202 : tensor<1x64xi1, #mma>, tensor<1x64xi32, #mma> loc(#loc338)
+      %tmp17_206 = tt.broadcast %tmp16_205 : tensor<1x64xi32, #mma> -> tensor<128x64xi32, #mma> loc(#loc320)
+      %tmp17_207 = arith.cmpi eq, %tmp17, %tmp17_206 : tensor<128x64xi32, #mma> loc(#loc320)
+      %tmp18 = arith.andi %tmp11_200, %tmp17_207 : tensor<128x64xi1, #mma> loc(#loc339)
+      %tmp19 = arith.ori %tmp9_198, %tmp18 : tensor<128x64xi1, #mma> loc(#loc340)
+      %tmp20 = arith.ori %tmp6_196, %tmp19 : tensor<128x64xi1, #mma> loc(#loc341)
+      %mask_mod_output = arith.select %post_mod_scores_192, %tmp20, %cst_3 : tensor<128x64xi1, #mma>, tensor<128x64xi1, #mma> loc(#loc342)
+      %post_mod_scores_208 = arith.select %mask_mod_output, %post_mod_scores_193, %cst_16 : tensor<128x64xi1, #mma>, tensor<128x64xf32, #mma> loc(#loc343)
+      %post_mod_scores_209 = arith.mulf %post_mod_scores_208, %cst_17 : tensor<128x64xf32, #mma> loc(#loc344)
+      %m_ij = "tt.reduce"(%post_mod_scores_209) <{axis = 1 : i32}> ({
+      ^bb0(%m_ij_267: f32 loc(callsite(#loc1 at #loc345)), %m_ij_268: f32 loc(callsite(#loc1 at #loc345))):
+        %m_ij_269 = arith.maxnumf %m_ij_267, %m_ij_268 : f32 loc(#loc457)
+        tt.reduce.return %m_ij_269 : f32 loc(#loc405)
+      }) : (tensor<128x64xf32, #mma>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc405)
+      %m_ij_210 = arith.maxnumf %arg18, %m_ij : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc346)
+      %masked_out_rows = arith.cmpf oeq, %m_ij_210, %cst_18 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc347)
+      %m_ij_masked = arith.select %masked_out_rows, %cst_12, %m_ij_210 : tensor<128xi1, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc348)
+      %alpha = arith.subf %arg18, %m_ij_masked : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc349)
+      %alpha_211 = math.exp2 %alpha : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc350)
+      %p = tt.expand_dims %m_ij_masked {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128x1xf32, #mma> loc(#loc351)
+      %p_212 = tt.broadcast %p : tensor<128x1xf32, #mma> -> tensor<128x64xf32, #mma> loc(#loc352)
+      %p_213 = arith.subf %post_mod_scores_209, %p_212 : tensor<128x64xf32, #mma> loc(#loc352)
+      %p_214 = math.exp2 %p_213 : tensor<128x64xf32, #mma> loc(#loc353)
+      %l_i_215 = arith.mulf %arg17, %alpha_211 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc354)
+      %l_i_216 = "tt.reduce"(%p_214) <{axis = 1 : i32}> ({
+      ^bb0(%l_i_267: f32 loc(callsite(#loc1 at #loc355)), %l_i_268: f32 loc(callsite(#loc1 at #loc355))):
+        %l_i_269 = arith.addf %l_i_267, %l_i_268 : f32 loc(#loc458)
+        tt.reduce.return %l_i_269 : f32 loc(#loc407)
+      }) : (tensor<128x64xf32, #mma>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc407)
+      %l_i_217 = arith.addf %l_i_215, %l_i_216 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc356)
+      %acc_218 = tt.expand_dims %alpha_211 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128x1xf32, #mma> loc(#loc357)
+      %acc_219 = ttg.convert_layout %acc_218 : tensor<128x1xf32, #mma> -> tensor<128x1xf32, #mma1> loc(#loc358)
+      %acc_220 = tt.broadcast %acc_219 : tensor<128x1xf32, #mma1> -> tensor<128x128xf32, #mma1> loc(#loc358)
+      %acc_221 = arith.mulf %qk_189#3, %acc_220 : tensor<128x128xf32, #mma1> loc(#loc358)
+      %v_222 = ttg.memdesc_index %v[%kv_offset_185] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+      %acc_223 = arith.truncf %p_214 : tensor<128x64xf32, #mma> to tensor<128x64xbf16, #mma> loc(#loc359)
+      %acc_224 = ttg.convert_layout %acc_223 : tensor<128x64xbf16, #mma> -> tensor<128x64xbf16, #ttg.dot_op<{opIdx = 0, parent = #mma1, kWidth = 2}>> loc(#loc359)
+      %acc_225 = ttng.warp_group_dot %acc_224, %v_222, %acc_221 {inputPrecision = 0 : i32, isAsync = true} : tensor<128x64xbf16, #ttg.dot_op<{opIdx = 0, parent = #mma1, kWidth = 2}>> * !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> -> tensor<128x128xf32, #mma1> loc(#loc360)
+      %offs_n_226 = tt.splat %arg27 : i32 -> tensor<1x64xi32, #mma> loc(#loc361)
+      %offs_n_227 = arith.addi %arg20, %offs_n_226 : tensor<1x64xi32, #mma> loc(#loc361)
+      %kv_offset_228 = arith.addi %kv_offset_173, %c1_i32 : i32 loc(#loc462)
+      %cur_block_idx = arith.divsi %kv_offset_228, %c2_i32 : i32 loc(#loc409)
+      %cur_block = tt.addptr %kv_indices, %cur_block_idx : !tt.ptr<i32>, i32 loc(#loc410)
+      %cur_block_229 = tt.load %cur_block, %kv_offset_182 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc411)
+      %next_block = arith.addi %cur_block_idx, %c1_i32 : i32 loc(#loc412)
+      %next_block_230 = arith.cmpi slt, %next_block, %kv_num_blocks_45 : i32 loc(#loc413)
+      %next_block_231 = tt.addptr %cur_block, %c1_i32 : !tt.ptr<i32>, i32 loc(#loc414)
+      %kv_offset_232 = arith.andi %kv_offset_182, %next_block_230 : i1 loc(#loc462)
+      %next_block_233 = tt.load %next_block_231, %kv_offset_232 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc415)
+      %needs_jump = arith.addi %kv_offset_173, %c2_i32 : i32 loc(#loc416)
+      %needs_jump_234 = arith.remsi %needs_jump, %c2_i32 : i32 loc(#loc417)
+      %needs_jump_235 = arith.cmpi eq, %needs_jump_234, %c0_i32 : i32 loc(#loc418)
+      %jump_to_block = arith.subi %next_block_233, %cur_block_229 : i32 loc(#loc419)
+      %jump_to_block_236 = arith.muli %jump_to_block, %c128_i32 : i32 loc(#loc420)
+      %jump_to_block_237 = arith.subi %jump_to_block_236, %c64_i32 : i32 loc(#loc421)
+      %offset = arith.extui %needs_jump_235 : i1 to i32 loc(#loc422)
+      %offset_238 = arith.muli %jump_to_block_237, %offset : i32 loc(#loc422)
+      %offset_239 = arith.subi %c1_i32, %offset : i32 loc(#loc423)
+      %offset_240 = arith.muli %offset_239, %c64_i32 : i32 loc(#loc424)
+      %offset_241 = arith.addi %offset_238, %offset_240 : i32 loc(#loc425)
+      %kv_offset_242 = arith.addi %arg19, %offset_241 : i32 loc(#loc363)
+      %kv_offset_243 = arith.addi %arg21, %c1_i32 : i32 loc(#loc462)
+      %kv_offset_244 = arith.cmpi sge, %kv_offset_243, %c3_i32 : i32 loc(#loc462)
+      %kv_offset_245 = arith.select %kv_offset_244, %c0_i32, %kv_offset_243 : i32 loc(#loc462)
+      %kv_base_offset_246 = arith.addi %kv_start_44, %kv_offset_242 : i32 loc(#loc324)
+      %offs_n_load_247 = tt.splat %kv_base_offset_246 : i32 -> tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc323)
+      %offs_n_load_248 = arith.addi %offs_n_load_247, %offs_n_50 : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc323)
+      %ptr_249 = tt.expand_dims %offs_n_load_248 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc402)
+      %ptr_250 = arith.muli %ptr_249, %cst_7 : tensor<64x1xi32, #blocked> loc(#loc403)
+      %ptr_251 = tt.addptr %ptr_53, %ptr_250 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc393)
+      %ptr_252 = tt.broadcast %ptr_251 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc394)
+      %ptr_253 = tt.addptr %ptr_252, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc394)
+      %k_254 = arith.cmpi slt, %ptr_249, %k : tensor<64x1xi32, #blocked> loc(#loc395)
+      %k_255 = tt.broadcast %k_254 : tensor<64x1xi1, #blocked> -> tensor<64x128xi1, #blocked> loc(#loc399)
+      %k_256 = ttg.memdesc_index %k_61[%kv_offset_245] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+      %kv_offset_257 = tt.splat %kv_offset_180 : i1 -> tensor<64x128xi1, #blocked> loc(#loc462)
+      %kv_offset_258 = arith.andi %kv_offset_257, %k_255 : tensor<64x128xi1, #blocked> loc(#loc462)
+      %k_259 = ttg.async_copy_global_to_local %ptr_253, %k_256 mask %kv_offset_258 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc399)
+      %k_260 = ttg.async_commit_group tokens %k_259 loc(#loc399)
+      %ptr_261 = tt.addptr %ptr_60, %ptr_250 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc398)
+      %ptr_262 = tt.broadcast %ptr_261 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc404)
+      %ptr_263 = tt.addptr %ptr_262, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc404)
+      %v_264 = ttg.memdesc_index %v[%kv_offset_245] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+      %v_265 = ttg.async_copy_global_to_local %ptr_263, %v_264 mask %kv_offset_258 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc400)
+      %v_266 = ttg.async_commit_group tokens %v_265 loc(#loc400)
+      scf.yield %acc_225, %l_i_217, %m_ij_210, %kv_offset_242, %offs_n_227, %kv_offset_245, %kv_offset_185, %k_176, %k_260, %v_178, %v_266, %offset_241 : tensor<128x128xf32, #mma1>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, i32, tensor<1x64xi32, #mma>, i32, i32, !ttg.async.token, !ttg.async.token, !ttg.async.token, !ttg.async.token, i32 loc(#loc462)
+    } loc(#loc462)
+    %kv_offset_103 = ttng.warp_group_dot_wait %kv_offset_102#0 {pendings = 0 : i32} : tensor<128x128xf32, #mma1> loc(#loc462)
+    %kv_offset_104 = ttg.async_wait {num = 0 : i32} loc(#loc462)
+    ttg.local_dealloc %v : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc462)
+    ttg.local_dealloc %k_61 : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc462)
+    %kv_indices_105 = tt.addptr %arg_FULL_KV_IDX, %sparse_kv_idx_offset : !tt.ptr<i32>, i32 loc(#loc275)
+    %kv_start_106 = tt.load %kv_indices_105 : !tt.ptr<i32> loc(#loc276)
+    %kv_start_107 = arith.muli %kv_start_106, %c128_i32 : i32 loc(#loc277)
+    %kv_num_blocks_108 = tt.addptr %arg_FULL_KV_NUM_BLKS, %q_start : !tt.ptr<i32>, i32 loc(#loc278)
+    %kv_num_blocks_109 = tt.load %kv_num_blocks_108 : !tt.ptr<i32> loc(#loc279)
+    %block_n_end_110 = arith.muli %kv_num_blocks_109, %c2_i32 : i32 loc(#loc280)
+    %block_n_end_111 = arith.minsi %block_n_end_110, %block_n_end_48 : i32 loc(#loc281)
+    %offs_n_112 = tt.splat %kv_start_107 : i32 -> tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> loc(#loc282)
+    %offs_n_113 = arith.addi %offs_n_112, %offs_n : tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> loc(#loc282)
+    %2 = tt.expand_dims %offs_n_113 {axis = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #mma}>> -> tensor<1x64xi32, #mma> loc(#loc130)
+    %k_114 = ttg.local_alloc : () -> !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc426)
+    %v_115 = ttg.local_alloc : () -> !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc427)
+    %kv_offset_116 = arith.cmpi sgt, %block_n_end_111, %c0_i32 : i32 loc(#loc463)
+    %offs_n_load_117 = tt.splat %kv_start_107 : i32 -> tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc366)
+    %offs_n_load_118 = arith.addi %offs_n_load_117, %offs_n_50 : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc366)
+    %ptr_119 = tt.expand_dims %offs_n_load_118 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc428)
+    %ptr_120 = arith.muli %ptr_119, %cst_7 : tensor<64x1xi32, #blocked> loc(#loc429)
+    %ptr_121 = tt.addptr %ptr_53, %ptr_120 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc430)
+    %ptr_122 = tt.broadcast %ptr_121 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc431)
+    %ptr_123 = tt.addptr %ptr_122, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc431)
+    %k_124 = arith.cmpi slt, %ptr_119, %k : tensor<64x1xi32, #blocked> loc(#loc432)
+    %k_125 = tt.broadcast %k_124 : tensor<64x1xi1, #blocked> -> tensor<64x128xi1, #blocked> loc(#loc426)
+    %k_126 = ttg.memdesc_index %k_114[%c0_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+    %kv_offset_127 = tt.splat %kv_offset_116 : i1 -> tensor<64x128xi1, #blocked> loc(#loc463)
+    %kv_offset_128 = arith.andi %kv_offset_127, %k_125 : tensor<64x128xi1, #blocked> loc(#loc463)
+    %k_129 = ttg.async_copy_global_to_local %ptr_123, %k_126 mask %kv_offset_128 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+    %k_130 = ttg.async_commit_group tokens %k_129 loc(#loc426)
+    %ptr_131 = tt.addptr %ptr_60, %ptr_120 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc433)
+    %ptr_132 = tt.broadcast %ptr_131 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc434)
+    %ptr_133 = tt.addptr %ptr_132, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc434)
+    %v_134 = ttg.memdesc_index %v_115[%c0_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+    %v_135 = ttg.async_copy_global_to_local %ptr_133, %v_134 mask %kv_offset_128 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+    %v_136 = ttg.async_commit_group tokens %v_135 loc(#loc427)
+    %kv_offset_137 = arith.cmpi sgt, %block_n_end_111, %c1_i32 : i32 loc(#loc463)
+    %kv_base_offset_138 = arith.addi %kv_start_107, %c64_i32 : i32 loc(#loc367)
+    %offs_n_load_139 = tt.splat %kv_base_offset_138 : i32 -> tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc366)
+    %offs_n_load_140 = arith.addi %offs_n_load_139, %offs_n_50 : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc366)
+    %ptr_141 = tt.expand_dims %offs_n_load_140 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc428)
+    %ptr_142 = arith.muli %ptr_141, %cst_7 : tensor<64x1xi32, #blocked> loc(#loc429)
+    %ptr_143 = tt.addptr %ptr_53, %ptr_142 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc430)
+    %ptr_144 = tt.broadcast %ptr_143 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc431)
+    %ptr_145 = tt.addptr %ptr_144, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc431)
+    %k_146 = arith.cmpi slt, %ptr_141, %k : tensor<64x1xi32, #blocked> loc(#loc432)
+    %k_147 = tt.broadcast %k_146 : tensor<64x1xi1, #blocked> -> tensor<64x128xi1, #blocked> loc(#loc426)
+    %k_148 = ttg.memdesc_index %k_114[%c1_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+    %kv_offset_149 = tt.splat %kv_offset_137 : i1 -> tensor<64x128xi1, #blocked> loc(#loc463)
+    %kv_offset_150 = arith.andi %kv_offset_149, %k_147 : tensor<64x128xi1, #blocked> loc(#loc463)
+    %k_151 = ttg.async_copy_global_to_local %ptr_145, %k_148 mask %kv_offset_150 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+    %k_152 = ttg.async_commit_group tokens %k_151 loc(#loc426)
+    %ptr_153 = tt.addptr %ptr_60, %ptr_142 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc433)
+    %ptr_154 = tt.broadcast %ptr_153 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc434)
+    %ptr_155 = tt.addptr %ptr_154, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc434)
+    %v_156 = ttg.memdesc_index %v_115[%c1_i32] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+    %v_157 = ttg.async_copy_global_to_local %ptr_155, %v_156 mask %kv_offset_150 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+    %v_158 = ttg.async_commit_group tokens %v_157 loc(#loc427)
+    ttng.fence_async_shared {bCluster = false} loc(#loc368)
+    %kv_offset_159:12 = scf.for %kv_offset_173 = %c0_i32 to %block_n_end_111 step %c1_i32 iter_args(%kv_offset_174 = %kv_offset_103, %kv_offset_175 = %kv_offset_102#1, %kv_offset_176 = %kv_offset_102#2, %arg19 = %c64_i32, %arg20 = %2, %arg21 = %c1_i32, %arg22 = %c-1_i32, %k_177 = %k_130, %k_178 = %k_152, %v_179 = %v_136, %v_180 = %v_158, %arg27 = %c64_i32) -> (tensor<128x128xf32, #mma1>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, i32, tensor<1x64xi32, #mma>, i32, i32, !ttg.async.token, !ttg.async.token, !ttg.async.token, !ttg.async.token, i32)  : i32 {
+      %kv_offset_181 = arith.subi %block_n_end_111, %c2_i32 : i32 loc(#loc463)
+      %kv_offset_182 = arith.cmpi slt, %kv_offset_173, %kv_offset_181 : i32 loc(#loc463)
+      %kv_offset_183 = arith.subi %block_n_end_111, %c1_i32 : i32 loc(#loc463)
+      %kv_offset_184 = arith.cmpi slt, %kv_offset_173, %kv_offset_183 : i32 loc(#loc463)
+      %kv_offset_185 = arith.addi %arg22, %c1_i32 : i32 loc(#loc463)
+      %kv_offset_186 = arith.cmpi sge, %kv_offset_185, %c3_i32 : i32 loc(#loc463)
+      %kv_offset_187 = arith.select %kv_offset_186, %c0_i32, %kv_offset_185 : i32 loc(#loc463)
+      %k_188 = ttg.async_wait %k_177, %v_179 {num = 2 : i32} loc(#loc426)
+      %k_189 = ttg.memdesc_index %k_114[%kv_offset_187] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+      %k_190 = ttg.memdesc_trans %k_189 {order = array<i32: 1, 0>} : !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> -> !ttg.memdesc<128x64xbf16, #shared1, #smem, mutable, 3x128x64> loc(#loc369)
+      %qk = ttng.warp_group_dot %q_43, %k_190, %cst_6 {inputPrecision = 0 : i32, isAsync = true} : !ttg.memdesc<128x128xbf16, #shared, #smem> * !ttg.memdesc<128x64xbf16, #shared1, #smem, mutable, 3x128x64> -> tensor<128x64xf32, #mma> loc(#loc368)
+      %qk_191:4 = ttng.warp_group_dot_wait %qk, %q_43, %k_190, %kv_offset_174 {pendings = 0 : i32} : tensor<128x64xf32, #mma>, !ttg.memdesc<128x128xbf16, #shared, #smem>, !ttg.memdesc<128x64xbf16, #shared1, #smem, mutable, 3x128x64>, tensor<128x128xf32, #mma1> loc(#loc368)
+      %qk_192 = arith.mulf %qk_191#0, %cst_15 : tensor<128x64xf32, #mma> loc(#loc370)
+      %post_mod_scores = arith.cmpi slt, %arg20, %n : tensor<1x64xi32, #mma> loc(#loc371)
+      %post_mod_scores_193 = tt.broadcast %post_mod_scores : tensor<1x64xi1, #mma> -> tensor<128x64xi1, #mma> loc(#loc372)
+      %post_mod_scores_194 = arith.select %post_mod_scores_193, %qk_192, %cst_16 : tensor<128x64xi1, #mma>, tensor<128x64xf32, #mma> loc(#loc372)
+      %post_mod_scores_195 = arith.mulf %post_mod_scores_194, %cst_17 : tensor<128x64xf32, #mma> loc(#loc373)
+      %m_ij = "tt.reduce"(%post_mod_scores_195) <{axis = 1 : i32}> ({
+      ^bb0(%m_ij_253: f32 loc(callsite(#loc1 at #loc374)), %m_ij_254: f32 loc(callsite(#loc1 at #loc374))):
+        %m_ij_255 = arith.maxnumf %m_ij_253, %m_ij_254 : f32 loc(#loc459)
+        tt.reduce.return %m_ij_255 : f32 loc(#loc435)
+      }) : (tensor<128x64xf32, #mma>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc435)
+      %m_ij_196 = arith.maxnumf %kv_offset_176, %m_ij : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc375)
+      %masked_out_rows = arith.cmpf oeq, %m_ij_196, %cst_18 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc376)
+      %m_ij_masked = arith.select %masked_out_rows, %cst_12, %m_ij_196 : tensor<128xi1, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc377)
+      %alpha = arith.subf %kv_offset_176, %m_ij_masked : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc378)
+      %alpha_197 = math.exp2 %alpha : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc379)
+      %p = tt.expand_dims %m_ij_masked {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128x1xf32, #mma> loc(#loc380)
+      %p_198 = tt.broadcast %p : tensor<128x1xf32, #mma> -> tensor<128x64xf32, #mma> loc(#loc381)
+      %p_199 = arith.subf %post_mod_scores_195, %p_198 : tensor<128x64xf32, #mma> loc(#loc381)
+      %p_200 = math.exp2 %p_199 : tensor<128x64xf32, #mma> loc(#loc382)
+      %l_i_201 = arith.mulf %kv_offset_175, %alpha_197 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc383)
+      %l_i_202 = "tt.reduce"(%p_200) <{axis = 1 : i32}> ({
+      ^bb0(%l_i_253: f32 loc(callsite(#loc1 at #loc384)), %l_i_254: f32 loc(callsite(#loc1 at #loc384))):
+        %l_i_255 = arith.addf %l_i_253, %l_i_254 : f32 loc(#loc460)
+        tt.reduce.return %l_i_255 : f32 loc(#loc437)
+      }) : (tensor<128x64xf32, #mma>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc437)
+      %l_i_203 = arith.addf %l_i_201, %l_i_202 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc385)
+      %acc_204 = tt.expand_dims %alpha_197 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128x1xf32, #mma> loc(#loc386)
+      %acc_205 = ttg.convert_layout %acc_204 : tensor<128x1xf32, #mma> -> tensor<128x1xf32, #mma1> loc(#loc387)
+      %acc_206 = tt.broadcast %acc_205 : tensor<128x1xf32, #mma1> -> tensor<128x128xf32, #mma1> loc(#loc387)
+      %acc_207 = arith.mulf %qk_191#3, %acc_206 : tensor<128x128xf32, #mma1> loc(#loc387)
+      %v_208 = ttg.memdesc_index %v_115[%kv_offset_187] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+      %acc_209 = arith.truncf %p_200 : tensor<128x64xf32, #mma> to tensor<128x64xbf16, #mma> loc(#loc388)
+      %acc_210 = ttg.convert_layout %acc_209 : tensor<128x64xbf16, #mma> -> tensor<128x64xbf16, #ttg.dot_op<{opIdx = 0, parent = #mma1, kWidth = 2}>> loc(#loc388)
+      %acc_211 = ttng.warp_group_dot %acc_210, %v_208, %acc_207 {inputPrecision = 0 : i32, isAsync = true} : tensor<128x64xbf16, #ttg.dot_op<{opIdx = 0, parent = #mma1, kWidth = 2}>> * !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> -> tensor<128x128xf32, #mma1> loc(#loc389)
+      %offs_n_212 = tt.splat %arg27 : i32 -> tensor<1x64xi32, #mma> loc(#loc390)
+      %offs_n_213 = arith.addi %arg20, %offs_n_212 : tensor<1x64xi32, #mma> loc(#loc390)
+      %kv_offset_214 = arith.addi %kv_offset_173, %c1_i32 : i32 loc(#loc463)
+      %cur_block_idx = arith.divsi %kv_offset_214, %c2_i32 : i32 loc(#loc439)
+      %cur_block = tt.addptr %kv_indices_105, %cur_block_idx : !tt.ptr<i32>, i32 loc(#loc440)
+      %cur_block_215 = tt.load %cur_block, %kv_offset_184 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc441)
+      %next_block = arith.addi %cur_block_idx, %c1_i32 : i32 loc(#loc442)
+      %next_block_216 = arith.cmpi slt, %next_block, %kv_num_blocks_109 : i32 loc(#loc443)
+      %next_block_217 = tt.addptr %cur_block, %c1_i32 : !tt.ptr<i32>, i32 loc(#loc444)
+      %kv_offset_218 = arith.andi %kv_offset_184, %next_block_216 : i1 loc(#loc463)
+      %next_block_219 = tt.load %next_block_217, %kv_offset_218 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc445)
+      %needs_jump = arith.addi %kv_offset_173, %c2_i32 : i32 loc(#loc446)
+      %needs_jump_220 = arith.remsi %needs_jump, %c2_i32 : i32 loc(#loc447)
+      %needs_jump_221 = arith.cmpi eq, %needs_jump_220, %c0_i32 : i32 loc(#loc448)
+      %jump_to_block = arith.subi %next_block_219, %cur_block_215 : i32 loc(#loc449)
+      %jump_to_block_222 = arith.muli %jump_to_block, %c128_i32 : i32 loc(#loc450)
+      %jump_to_block_223 = arith.subi %jump_to_block_222, %c64_i32 : i32 loc(#loc451)
+      %offset = arith.extui %needs_jump_221 : i1 to i32 loc(#loc452)
+      %offset_224 = arith.muli %jump_to_block_223, %offset : i32 loc(#loc452)
+      %offset_225 = arith.subi %c1_i32, %offset : i32 loc(#loc453)
+      %offset_226 = arith.muli %offset_225, %c64_i32 : i32 loc(#loc454)
+      %offset_227 = arith.addi %offset_224, %offset_226 : i32 loc(#loc455)
+      %kv_offset_228 = arith.addi %arg19, %offset_227 : i32 loc(#loc392)
+      %kv_offset_229 = arith.addi %arg21, %c1_i32 : i32 loc(#loc463)
+      %kv_offset_230 = arith.cmpi sge, %kv_offset_229, %c3_i32 : i32 loc(#loc463)
+      %kv_offset_231 = arith.select %kv_offset_230, %c0_i32, %kv_offset_229 : i32 loc(#loc463)
+      %kv_base_offset_232 = arith.addi %kv_start_107, %kv_offset_228 : i32 loc(#loc367)
+      %offs_n_load_233 = tt.splat %kv_base_offset_232 : i32 -> tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc366)
+      %offs_n_load_234 = arith.addi %offs_n_load_233, %offs_n_50 : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc366)
+      %ptr_235 = tt.expand_dims %offs_n_load_234 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc428)
+      %ptr_236 = arith.muli %ptr_235, %cst_7 : tensor<64x1xi32, #blocked> loc(#loc429)
+      %ptr_237 = tt.addptr %ptr_53, %ptr_236 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc430)
+      %ptr_238 = tt.broadcast %ptr_237 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc431)
+      %ptr_239 = tt.addptr %ptr_238, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc431)
+      %k_240 = arith.cmpi slt, %ptr_235, %k : tensor<64x1xi32, #blocked> loc(#loc432)
+      %k_241 = tt.broadcast %k_240 : tensor<64x1xi1, #blocked> -> tensor<64x128xi1, #blocked> loc(#loc426)
+      %k_242 = ttg.memdesc_index %k_114[%kv_offset_231] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+      %kv_offset_243 = tt.splat %kv_offset_182 : i1 -> tensor<64x128xi1, #blocked> loc(#loc463)
+      %kv_offset_244 = arith.andi %kv_offset_243, %k_241 : tensor<64x128xi1, #blocked> loc(#loc463)
+      %k_245 = ttg.async_copy_global_to_local %ptr_239, %k_242 mask %kv_offset_244 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc426)
+      %k_246 = ttg.async_commit_group tokens %k_245 loc(#loc426)
+      %ptr_247 = tt.addptr %ptr_60, %ptr_236 : tensor<64x1x!tt.ptr<bf16>, #blocked>, tensor<64x1xi32, #blocked> loc(#loc433)
+      %ptr_248 = tt.broadcast %ptr_247 : tensor<64x1x!tt.ptr<bf16>, #blocked> -> tensor<64x128x!tt.ptr<bf16>, #blocked> loc(#loc434)
+      %ptr_249 = tt.addptr %ptr_248, %ptr_54 : tensor<64x128x!tt.ptr<bf16>, #blocked>, tensor<64x128xi32, #blocked> loc(#loc434)
+      %v_250 = ttg.memdesc_index %v_115[%kv_offset_231] : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> -> !ttg.memdesc<64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+      %v_251 = ttg.async_copy_global_to_local %ptr_249, %v_250 mask %kv_offset_244 other %cst_11 : tensor<64x128x!tt.ptr<bf16>, #blocked> -> <64x128xbf16, #shared, #smem, mutable, 3x64x128> loc(#loc427)
+      %v_252 = ttg.async_commit_group tokens %v_251 loc(#loc427)
+      scf.yield %acc_211, %l_i_203, %m_ij_196, %kv_offset_228, %offs_n_213, %kv_offset_231, %kv_offset_187, %k_178, %k_246, %v_180, %v_252, %offset_227 : tensor<128x128xf32, #mma1>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>>, i32, tensor<1x64xi32, #mma>, i32, i32, !ttg.async.token, !ttg.async.token, !ttg.async.token, !ttg.async.token, i32 loc(#loc463)
+    } loc(#loc463)
+    %kv_offset_160 = ttng.warp_group_dot_wait %kv_offset_159#0 {pendings = 0 : i32} : tensor<128x128xf32, #mma1> loc(#loc463)
+    %kv_offset_161 = ttg.async_wait {num = 0 : i32} loc(#loc463)
+    ttg.local_dealloc %v_115 : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc463)
+    ttg.local_dealloc %k_114 : !ttg.memdesc<3x64x128xbf16, #shared, #smem, mutable> loc(#loc463)
+    %l_i = arith.cmpf oeq, %kv_offset_159#1, %cst_12 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc284)
+    %l_i_162 = arith.select %l_i, %cst_13, %kv_offset_159#1 : tensor<128xi1, #ttg.slice<{dim = 1, parent = #mma}>>, tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc285)
+    %acc = tt.expand_dims %l_i_162 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128x1xf32, #mma> loc(#loc286)
+    %acc_163 = ttg.convert_layout %acc : tensor<128x1xf32, #mma> -> tensor<128x1xf32, #mma1> loc(#loc287)
+    %acc_164 = tt.broadcast %acc_163 : tensor<128x1xf32, #mma1> -> tensor<128x128xf32, #mma1> loc(#loc287)
+    %acc_165 = arith.divf %kv_offset_160, %acc_164 : tensor<128x128xf32, #mma1> loc(#loc287)
+    %mask = arith.cmpi slt, %ptr_35, %cst_9 : tensor<1x128xi32, #blocked> loc(#loc288)
+    %mask_166 = tt.broadcast %mask : tensor<1x128xi1, #blocked> -> tensor<128x128xi1, #blocked> loc(#loc289)
+    %mask_167 = arith.andi %q_41, %mask_166 : tensor<128x128xi1, #blocked> loc(#loc289)
+    %3 = tt.splat %q_offset_19 : i32 -> tensor<1x128xi32, #blocked> loc(#loc138)
+    %4 = arith.addi %ptr_35, %3 : tensor<1x128xi32, #blocked> loc(#loc138)
+    %5 = tt.broadcast %4 : tensor<1x128xi32, #blocked> -> tensor<128x128xi32, #blocked> loc(#loc139)
+    %6 = tt.broadcast %ptr_31 : tensor<128x1xi32, #blocked> -> tensor<128x128xi32, #blocked> loc(#loc139)
+    %7 = arith.addi %5, %6 : tensor<128x128xi32, #blocked> loc(#loc139)
+    %8 = tt.splat %out_ptr0 : !tt.ptr<bf16> -> tensor<128x128x!tt.ptr<bf16>, #blocked> loc(#loc140)
+    %9 = tt.addptr %8, %7 : tensor<128x128x!tt.ptr<bf16>, #blocked>, tensor<128x128xi32, #blocked> loc(#loc140)
+    %10 = arith.truncf %acc_165 : tensor<128x128xf32, #mma1> to tensor<128x128xbf16, #mma1> loc(#loc141)
+    %11 = ttg.convert_layout %10 : tensor<128x128xbf16, #mma1> -> tensor<128x128xbf16, #blocked> loc(#loc141)
+    tt.store %9, %11, %mask_167 : tensor<128x128x!tt.ptr<bf16>, #blocked> loc(#loc141)
+    %off_hz = arith.muli %off_zq, %c32_i32 : i32 loc(#loc290)
+    %off_hz_168 = arith.addi %off_hz, %off_hq : i32 loc(#loc291)
+    %l_ptrs = arith.muli %off_hz_168, %ks0 : i32 loc(#loc292)
+    %l_ptrs_169 = tt.addptr %arg_LSE, %l_ptrs : !tt.ptr<f32>, i32 loc(#loc293)
+    %l_ptrs_170 = tt.splat %l_ptrs_169 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>, #blocked1> loc(#loc294)
+    %l_ptrs_171 = tt.addptr %l_ptrs_170, %offs_m_29 : tensor<128x!tt.ptr<f32>, #blocked1>, tensor<128xi32, #blocked1> loc(#loc294)
+    %lse = math.log2 %l_i_162 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc295)
+    %lse_172 = arith.addf %kv_offset_159#2, %lse : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> loc(#loc296)
+    %12 = tt.splat %ks0 : i32 -> tensor<128xi32, #blocked1> loc(#loc149)
+    %13 = arith.cmpi slt, %offs_m_29, %12 : tensor<128xi32, #blocked1> loc(#loc149)
+    %14 = ttg.convert_layout %lse_172 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #mma}>> -> tensor<128xf32, #blocked1> loc(#loc150)
+    tt.store %l_ptrs_171, %14, %13 : tensor<128x!tt.ptr<f32>, #blocked1> loc(#loc150)
+    tt.return loc(#loc151)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":85:54)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":97:28)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":98:27)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":99:27)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":104:24)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":107:24)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":107:45)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":107:36)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":108:47)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":111:12)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":112:12)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":113:12)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":143:97)
+#loc15 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":144:23)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":144:46)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":144:33)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":284:27)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":146:101)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":284:38)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":284:20)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":284:56)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":284:49)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":292:52)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":292:23)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":151:26)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":152:23)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":152:37)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":153:42)
+#loc30 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":153:28)
+#loc31 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":154:45)
+#loc32 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":41:22)
+#loc33 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":154:92)
+#loc34 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":41:28)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":154:102)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":154:65)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":159:37)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":159:24)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":167:48)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":347:107)
+#loc43 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":257:21)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":358:36)
+#loc45 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":359:36)
+#loc46 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":372:22)
+#loc47 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":374:23)
+#loc48 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":375:22)
+#loc49 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":376:23)
+#loc50 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":378:22)
+#loc51 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":383:70)
+#loc52 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":383:79)
+#loc53 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":383:91)
+#loc54 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":383:99)
+#loc55 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":383:102)
+#loc56 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":383:119)
+#loc57 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":386:25)
+#loc58 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":421:107)
+#loc59 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":484:40)
+#loc60 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":346:35)
+#loc61 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":342:32)
+#loc62 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":351:19)
+#loc63 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":349:17)
+#loc64 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":353:14)
+#loc65 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":367:44)
+#loc66 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":367:69)
+#loc67 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":377:22)
+#loc68 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":379:24)
+#loc69 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":380:23)
+#loc70 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":385:70)
+#loc71 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":385:79)
+#loc72 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":385:91)
+#loc73 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":385:99)
+#loc74 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":385:102)
+#loc75 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":385:119)
+#loc76 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":387:24)
+#loc77 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":388:23)
+#loc78 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":389:23)
+#loc79 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":394:73)
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+#loc353 = loc(callsite(#loc247 at #loc200))
+#loc354 = loc(callsite(#loc248 at #loc200))
+#loc356 = loc(callsite(#loc250 at #loc200))
+#loc357 = loc(callsite(#loc251 at #loc200))
+#loc358 = loc(callsite(#loc252 at #loc200))
+#loc359 = loc(callsite(#loc253 at #loc200))
+#loc360 = loc(callsite(#loc254 at #loc200))
+#loc361 = loc(callsite(#loc255 at #loc42))
+#loc362 = loc(callsite(#loc257 at #loc42))
+#loc363 = loc(callsite(#loc274 at #loc42))
+#loc364 = loc(callsite(#loc199 at #loc283))
+#loc365 = loc(callsite(#loc215 at #loc283))
+#loc366 = loc(callsite(#loc217 at #loc283))
+#loc367 = loc(callsite(#loc218 at #loc283))
+#loc368 = loc(callsite(#loc219 at #loc283))
+#loc369 = loc(callsite(#loc220 at #loc283))
+#loc370 = loc(callsite(#loc221 at #loc283))
+#loc371 = loc(callsite(#loc222 at #loc283))
+#loc372 = loc(callsite(#loc223 at #loc283))
+#loc373 = loc(callsite(#loc238 at #loc283))
+#loc375 = loc(callsite(#loc240 at #loc283))
+#loc376 = loc(callsite(#loc241 at #loc283))
+#loc377 = loc(callsite(#loc242 at #loc283))
+#loc378 = loc(callsite(#loc243 at #loc283))
+#loc379 = loc(callsite(#loc244 at #loc283))
+#loc380 = loc(callsite(#loc245 at #loc283))
+#loc381 = loc(callsite(#loc246 at #loc283))
+#loc382 = loc(callsite(#loc247 at #loc283))
+#loc383 = loc(callsite(#loc248 at #loc283))
+#loc385 = loc(callsite(#loc250 at #loc283))
+#loc386 = loc(callsite(#loc251 at #loc283))
+#loc387 = loc(callsite(#loc252 at #loc283))
+#loc388 = loc(callsite(#loc253 at #loc283))
+#loc389 = loc(callsite(#loc254 at #loc283))
+#loc390 = loc(callsite(#loc255 at #loc131))
+#loc391 = loc(callsite(#loc257 at #loc131))
+#loc392 = loc(callsite(#loc274 at #loc131))
+#loc393 = loc(callsite(#loc185 at #loc306))
+#loc394 = loc(callsite(#loc187 at #loc306))
+#loc395 = loc(callsite(#loc24 at #loc306))
+#loc396 = loc(callsite(#loc43 at #loc307))
+#loc397 = loc(callsite(#loc43 at #loc308))
+#loc398 = loc(callsite(#loc185 at #loc321))
+#loc399 = loc(callsite(#loc25 at #loc306))
+#loc400 = loc(callsite(#loc25 at #loc321))
+#loc401 = loc("m_i"(#loc322))
+#loc402 = loc(callsite(#loc182 at #loc306))
+#loc403 = loc(callsite(#loc184 at #loc306))
+#loc404 = loc(callsite(#loc187 at #loc321))
+#loc405 = loc(callsite(#loc82 at #loc345))
+#loc407 = loc(callsite(#loc94 at #loc355))
+#loc409 = loc(callsite(#loc256 at #loc362))
+#loc410 = loc(callsite(#loc258 at #loc362))
+#loc411 = loc(callsite(#loc259 at #loc362))
+#loc412 = loc(callsite(#loc260 at #loc362))
+#loc413 = loc(callsite(#loc261 at #loc362))
+#loc414 = loc(callsite(#loc262 at #loc362))
+#loc415 = loc(callsite(#loc263 at #loc362))
+#loc416 = loc(callsite(#loc264 at #loc362))
+#loc417 = loc(callsite(#loc265 at #loc362))
+#loc418 = loc(callsite(#loc266 at #loc362))
+#loc419 = loc(callsite(#loc267 at #loc362))
+#loc420 = loc(callsite(#loc268 at #loc362))
+#loc421 = loc(callsite(#loc269 at #loc362))
+#loc422 = loc(callsite(#loc270 at #loc362))
+#loc423 = loc(callsite(#loc271 at #loc362))
+#loc424 = loc(callsite(#loc272 at #loc362))
+#loc425 = loc(callsite(#loc273 at #loc362))
+#loc426 = loc(callsite(#loc25 at #loc364))
+#loc427 = loc(callsite(#loc25 at #loc365))
+#loc428 = loc(callsite(#loc182 at #loc364))
+#loc429 = loc(callsite(#loc184 at #loc364))
+#loc430 = loc(callsite(#loc185 at #loc364))
+#loc431 = loc(callsite(#loc187 at #loc364))
+#loc432 = loc(callsite(#loc24 at #loc364))
+#loc433 = loc(callsite(#loc185 at #loc365))
+#loc434 = loc(callsite(#loc187 at #loc365))
+#loc435 = loc(callsite(#loc82 at #loc374))
+#loc437 = loc(callsite(#loc94 at #loc384))
+#loc439 = loc(callsite(#loc256 at #loc391))
+#loc440 = loc(callsite(#loc258 at #loc391))
+#loc441 = loc(callsite(#loc259 at #loc391))
+#loc442 = loc(callsite(#loc260 at #loc391))
+#loc443 = loc(callsite(#loc261 at #loc391))
+#loc444 = loc(callsite(#loc262 at #loc391))
+#loc445 = loc(callsite(#loc263 at #loc391))
+#loc446 = loc(callsite(#loc264 at #loc391))
+#loc447 = loc(callsite(#loc265 at #loc391))
+#loc448 = loc(callsite(#loc266 at #loc391))
+#loc449 = loc(callsite(#loc267 at #loc391))
+#loc450 = loc(callsite(#loc268 at #loc391))
+#loc451 = loc(callsite(#loc269 at #loc391))
+#loc452 = loc(callsite(#loc270 at #loc391))
+#loc453 = loc(callsite(#loc271 at #loc391))
+#loc454 = loc(callsite(#loc272 at #loc391))
+#loc455 = loc(callsite(#loc273 at #loc391))
+#loc456 = loc("offs_n"(#loc401))
+#loc457 = loc(callsite(#loc84 at #loc405))
+#loc458 = loc(callsite(#loc96 at #loc407))
+#loc459 = loc(callsite(#loc84 at #loc435))
+#loc460 = loc(callsite(#loc96 at #loc437))
+#loc461 = loc("kv_offset"(#loc456))
+#loc462 = loc(callsite(#loc461 at #loc42))
+#loc463 = loc(callsite(#loc461 at #loc131))

progress/SpecForge/cache/compiled_kernels/triton/3/23MFPG6HLDX2565HGAMARD6NR52JWXZFYOVRFUBKYJAOEMI2YQEQ/triton_tem_fused_0.ttir

@@ -0,0 +1,780 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":18:0)
+#loc1 = loc(unknown)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":172:41)
+#loc48 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":520:16)
+#loc87 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":403:51)
+#loc99 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":416:34)
+#loc137 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":198:45)
+#loc156 = loc("arg_Q"(#loc))
+#loc157 = loc("arg_K"(#loc))
+#loc158 = loc("arg_V"(#loc))
+#loc159 = loc("arg_LSE"(#loc))
+#loc160 = loc("arg_MAX"(#loc))
+#loc161 = loc("arg_KV_NUM_BLKS"(#loc))
+#loc162 = loc("arg_KV_IDX"(#loc))
+#loc163 = loc("arg_FULL_KV_NUM_BLKS"(#loc))
+#loc164 = loc("arg_FULL_KV_IDX"(#loc))
+#loc165 = loc("out_ptr0"(#loc))
+#loc166 = loc("ks0"(#loc))
+#loc167 = loc("ks1"(#loc))
+#loc168 = loc("ks2"(#loc))
+#loc169 = loc("ks3"(#loc))
+#loc170 = loc("ks4"(#loc))
+#loc210 = loc(callsite(#loc48 at #loc2))
+#loc247 = loc("m_ij"(#loc87))
+#loc257 = loc("l_i"(#loc99))
+#loc293 = loc(callsite(#loc48 at #loc137))
+#loc354 = loc(callsite(#loc247 at #loc210))
+#loc364 = loc(callsite(#loc257 at #loc210))
+#loc383 = loc(callsite(#loc247 at #loc293))
+#loc393 = loc(callsite(#loc257 at #loc293))
+#loc413 = loc(callsite(#loc1 at #loc354))
+#loc415 = loc(callsite(#loc1 at #loc364))
+#loc443 = loc(callsite(#loc1 at #loc383))
+#loc445 = loc(callsite(#loc1 at #loc393))
+module {
+  tt.func public @triton_tem_fused_0(%arg_Q: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_Q"(#loc)), %arg_K: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_K"(#loc)), %arg_V: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_V"(#loc)), %arg_LSE: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("arg_LSE"(#loc)), %arg_MAX: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("arg_MAX"(#loc)), %arg_KV_NUM_BLKS: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_KV_NUM_BLKS"(#loc)), %arg_KV_IDX: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_KV_IDX"(#loc)), %arg_FULL_KV_NUM_BLKS: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_FULL_KV_NUM_BLKS"(#loc)), %arg_FULL_KV_IDX: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_FULL_KV_IDX"(#loc)), %out_ptr0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i32 loc("ks0"(#loc)), %ks1: i32 loc("ks1"(#loc)), %ks2: i32 loc("ks2"(#loc)), %ks3: i32 loc("ks3"(#loc)), %ks4: i32 loc("ks4"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<1024> : tensor<64x1xi32> loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x128xbf16> loc(#loc1)
+    %cst_1 = arith.constant dense<16> : tensor<1x64xi32> loc(#loc171)
+    %cst_2 = arith.constant dense<16> : tensor<128x1xi32> loc(#loc171)
+    %cst_3 = arith.constant dense<0xFF800000> : tensor<128xf32> loc(#loc1)
+    %cst_4 = arith.constant dense<1.44269502> : tensor<128x64xf32> loc(#loc1)
+    %cst_5 = arith.constant dense<false> : tensor<128x64xi1> loc(#loc171)
+    %cst_6 = arith.constant dense<1> : tensor<1x64xi32> loc(#loc171)
+    %cst_7 = arith.constant dense<1> : tensor<128x1xi32> loc(#loc171)
+    %cst_8 = arith.constant dense<0> : tensor<128x1xi32> loc(#loc171)
+    %cst_9 = arith.constant dense<0> : tensor<1x64xi32> loc(#loc171)
+    %cst_10 = arith.constant dense<0xFF800000> : tensor<128x64xf32> loc(#loc1)
+    %cst_11 = arith.constant dense<0.0883883461> : tensor<128x64xf32> loc(#loc1)
+    %cst_12 = arith.constant dense<0.000000e+00> : tensor<128x64xf32> loc(#loc1)
+    %c63_i32 = arith.constant 63 : i32 loc(#loc1)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %q = arith.constant dense<0.000000e+00> : tensor<128x128xbf16> loc(#loc306)
+    %acc = arith.constant dense<0.000000e+00> : tensor<128x128xf32> loc(#loc307)
+    %cst_13 = arith.constant dense<4096> : tensor<128x1xi32> loc(#loc1)
+    %mask = arith.constant dense<128> : tensor<1x128xi32> loc(#loc174)
+    %l_i = arith.constant dense<1.000000e+00> : tensor<128xf32> loc(#loc175)
+    %cst_14 = arith.constant dense<0.000000e+00> : tensor<128xf32> loc(#loc1)
+    %c2_i32 = arith.constant 2 : i32 loc(#loc1)
+    %c4_i32 = arith.constant 4 : i32 loc(#loc1)
+    %HQ = arith.constant 32 : i32 loc(#loc176)
+    %c1_i32 = arith.constant 1 : i32 loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %c4096_i32 = arith.constant 4096 : i32 loc(#loc1)
+    %0 = arith.muli %ks0, %c4096_i32 : i32 loc(#loc10)
+    %q_start = tt.get_program_id x : i32 loc(#loc177)
+    %off_zq = tt.get_program_id y : i32 loc(#loc178)
+    %off_hq = tt.get_program_id z : i32 loc(#loc179)
+    %off_hkv = arith.divsi %off_hq, %c4_i32 : i32 loc(#loc180)
+    %q_offset = arith.muli %off_zq, %0 : i32 loc(#loc181)
+    %q_offset_15 = arith.muli %off_hq, %c128_i32 : i32 loc(#loc182)
+    %q_offset_16 = arith.addi %q_offset, %q_offset_15 : i32 loc(#loc183)
+    %k_offset = arith.muli %off_hkv, %c128_i32 : i32 loc(#loc184)
+    %Q = tt.addptr %arg_Q, %q_offset_16 : !tt.ptr<bf16>, i32 loc(#loc185)
+    %K = tt.addptr %arg_K, %k_offset : !tt.ptr<bf16>, i32 loc(#loc186)
+    %V = tt.addptr %arg_V, %k_offset : !tt.ptr<bf16>, i32 loc(#loc187)
+    %sparse_kv_idx_offset = arith.muli %q_start, %ks4 : i32 loc(#loc188)
+    %offs_m = arith.muli %q_start, %c128_i32 : i32 loc(#loc189)
+    %offs_m_17 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc190)
+    %offs_m_18 = tt.splat %offs_m : i32 -> tensor<128xi32> loc(#loc191)
+    %offs_m_19 = arith.addi %offs_m_18, %offs_m_17 : tensor<128xi32> loc(#loc191)
+    %ptr = tt.expand_dims %offs_m_19 {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32> loc(#loc308)
+    %ptr_20 = arith.muli %ptr, %cst_13 : tensor<128x1xi32> loc(#loc309)
+    %ptr_21 = tt.splat %Q : !tt.ptr<bf16> -> tensor<128x1x!tt.ptr<bf16>> loc(#loc310)
+    %ptr_22 = tt.addptr %ptr_21, %ptr_20 : tensor<128x1x!tt.ptr<bf16>>, tensor<128x1xi32> loc(#loc310)
+    %ptr_23 = tt.expand_dims %offs_m_17 {axis = 0 : i32} : tensor<128xi32> -> tensor<1x128xi32> loc(#loc311)
+    %ptr_24 = tt.broadcast %ptr_22 : tensor<128x1x!tt.ptr<bf16>> -> tensor<128x128x!tt.ptr<bf16>> loc(#loc312)
+    %ptr_25 = tt.broadcast %ptr_23 : tensor<1x128xi32> -> tensor<128x128xi32> loc(#loc312)
+    %ptr_26 = tt.addptr %ptr_24, %ptr_25 : tensor<128x128x!tt.ptr<bf16>>, tensor<128x128xi32> loc(#loc312)
+    %q_27 = tt.splat %ks0 : i32 -> tensor<128x1xi32> loc(#loc313)
+    %q_28 = arith.cmpi slt, %ptr, %q_27 : tensor<128x1xi32> loc(#loc313)
+    %q_29 = tt.broadcast %q_28 : tensor<128x1xi1> -> tensor<128x128xi1> loc(#loc306)
+    %q_30 = tt.load %ptr_26, %q_29, %q : tensor<128x128x!tt.ptr<bf16>> loc(#loc306)
+    %kv_indices = tt.addptr %arg_KV_IDX, %sparse_kv_idx_offset : !tt.ptr<i32>, i32 loc(#loc197)
+    %kv_start = tt.load %kv_indices : !tt.ptr<i32> loc(#loc198)
+    %kv_start_31 = arith.muli %kv_start, %c128_i32 : i32 loc(#loc199)
+    %kv_num_blocks = tt.addptr %arg_KV_NUM_BLKS, %q_start : !tt.ptr<i32>, i32 loc(#loc200)
+    %kv_num_blocks_32 = tt.load %kv_num_blocks : !tt.ptr<i32> loc(#loc201)
+    %block_n_end = arith.muli %kv_num_blocks_32, %c2_i32 : i32 loc(#loc202)
+    %block_n_end_33 = arith.addi %ks1, %c63_i32 : i32 loc(#loc314)
+    %block_n_end_34 = arith.divsi %block_n_end_33, %c64_i32 : i32 loc(#loc315)
+    %block_n_end_35 = arith.maxsi %block_n_end_34, %c1_i32 : i32 loc(#loc204)
+    %block_n_end_36 = arith.minsi %block_n_end, %block_n_end_35 : i32 loc(#loc205)
+    %offs_n = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc206)
+    %offs_n_37 = tt.splat %kv_start_31 : i32 -> tensor<64xi32> loc(#loc207)
+    %offs_n_38 = arith.addi %offs_n_37, %offs_n : tensor<64xi32> loc(#loc207)
+    %1 = tt.expand_dims %offs_n_38 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc45)
+    %kv_offset:5 = scf.for %start_n = %c0_i32 to %block_n_end_36 step %c1_i32 iter_args(%acc_62 = %acc, %l_i_63 = %cst_14, %m_i = %cst_3, %offs_n_64 = %1, %kv_offset_65 = %c0_i32) -> (tensor<128x128xf32>, tensor<128xf32>, tensor<128xf32>, tensor<1x64xi32>, i32)  : i32 {
+      %kv_base_offset = arith.addi %kv_start_31, %kv_offset_65 : i32 loc(#loc317)
+      %offs_n_load = tt.splat %kv_base_offset : i32 -> tensor<64xi32> loc(#loc318)
+      %offs_n_load_66 = arith.addi %offs_n_load, %offs_n : tensor<64xi32> loc(#loc318)
+      %ptr_67 = tt.expand_dims %offs_n_load_66 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc404)
+      %ptr_68 = arith.muli %ptr_67, %cst : tensor<64x1xi32> loc(#loc405)
+      %ptr_69 = tt.splat %K : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc406)
+      %ptr_70 = tt.addptr %ptr_69, %ptr_68 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc406)
+      %ptr_71 = tt.broadcast %ptr_70 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc407)
+      %ptr_72 = tt.broadcast %ptr_23 : tensor<1x128xi32> -> tensor<64x128xi32> loc(#loc407)
+      %ptr_73 = tt.addptr %ptr_71, %ptr_72 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc407)
+      %k = tt.splat %ks1 : i32 -> tensor<64x1xi32> loc(#loc408)
+      %k_74 = arith.cmpi slt, %ptr_67, %k : tensor<64x1xi32> loc(#loc408)
+      %k_75 = tt.broadcast %k_74 : tensor<64x1xi1> -> tensor<64x128xi1> loc(#loc409)
+      %k_76 = tt.load %ptr_73, %k_75, %cst_0 : tensor<64x128x!tt.ptr<bf16>> loc(#loc409)
+      %k_77 = tt.trans %k_76 {order = array<i32: 1, 0>} : tensor<64x128xbf16> -> tensor<128x64xbf16> loc(#loc320)
+      %qk = tt.dot %q_30, %k_77, %cst_12, inputPrecision = tf32 : tensor<128x128xbf16> * tensor<128x64xbf16> -> tensor<128x64xf32> loc(#loc321)
+      %qk_78 = arith.mulf %qk, %cst_11 : tensor<128x64xf32> loc(#loc322)
+      %m = arith.remsi %ptr, %q_27 : tensor<128x1xi32> loc(#loc410)
+      %n = tt.splat %ks1 : i32 -> tensor<1x64xi32> loc(#loc411)
+      %n_79 = arith.remsi %offs_n_64, %n : tensor<1x64xi32> loc(#loc411)
+      %post_mod_scores = arith.cmpi slt, %offs_n_64, %n : tensor<1x64xi32> loc(#loc325)
+      %post_mod_scores_80 = tt.broadcast %post_mod_scores : tensor<1x64xi1> -> tensor<128x64xi1> loc(#loc326)
+      %post_mod_scores_81 = arith.select %post_mod_scores_80, %qk_78, %cst_10 : tensor<128x64xi1>, tensor<128x64xf32> loc(#loc326)
+      %tmp3 = arith.cmpi slt, %m, %cst_8 : tensor<128x1xi32> loc(#loc327)
+      %tmp5 = tt.broadcast %n_79 : tensor<1x64xi32> -> tensor<128x64xi32> loc(#loc328)
+      %tmp5_82 = tt.broadcast %m : tensor<128x1xi32> -> tensor<128x64xi32> loc(#loc328)
+      %tmp5_83 = arith.cmpi sle, %tmp5, %tmp5_82 : tensor<128x64xi32> loc(#loc328)
+      %tmp6 = tt.broadcast %tmp3 : tensor<128x1xi1> -> tensor<128x64xi1> loc(#loc329)
+      %tmp6_84 = arith.andi %tmp6, %tmp5_83 : tensor<128x64xi1> loc(#loc329)
+      %tmp7 = arith.cmpi sge, %m, %cst_8 : tensor<128x1xi32> loc(#loc330)
+      %tmp8 = arith.cmpi slt, %n_79, %cst_9 : tensor<1x64xi32> loc(#loc331)
+      %tmp9 = tt.broadcast %tmp7 : tensor<128x1xi1> -> tensor<128x64xi1> loc(#loc332)
+      %tmp9_85 = tt.broadcast %tmp8 : tensor<1x64xi1> -> tensor<128x64xi1> loc(#loc332)
+      %tmp9_86 = arith.andi %tmp9, %tmp9_85 : tensor<128x64xi1> loc(#loc332)
+      %tmp10 = arith.extui %tmp8 : tensor<1x64xi1> to tensor<1x64xi32> loc(#loc333)
+      %tmp10_87 = arith.cmpi eq, %tmp10, %cst_9 : tensor<1x64xi32> loc(#loc333)
+      %tmp11 = tt.broadcast %tmp10_87 : tensor<1x64xi1> -> tensor<128x64xi1> loc(#loc334)
+      %tmp11_88 = arith.andi %tmp9, %tmp11 : tensor<128x64xi1> loc(#loc334)
+      %tmp14 = arith.remsi %m, %cst_2 : tensor<128x1xi32> loc(#loc335)
+      %tmp14_89 = arith.cmpi ne, %tmp14, %cst_8 : tensor<128x1xi32> loc(#loc336)
+      %tmp14_90 = arith.divsi %m, %cst_2 : tensor<128x1xi32> loc(#loc337)
+      %tmp14_91 = arith.subi %tmp14_90, %cst_7 : tensor<128x1xi32> loc(#loc338)
+      %tmp14_92 = arith.select %tmp14_89, %tmp14_91, %tmp14_90 : tensor<128x1xi1>, tensor<128x1xi32> loc(#loc339)
+      %tmp14_93 = arith.select %tmp3, %tmp14_92, %tmp14_90 : tensor<128x1xi1>, tensor<128x1xi32> loc(#loc340)
+      %tmp16 = arith.remsi %n_79, %cst_1 : tensor<1x64xi32> loc(#loc341)
+      %tmp16_94 = arith.cmpi ne, %tmp16, %cst_9 : tensor<1x64xi32> loc(#loc342)
+      %tmp16_95 = arith.divsi %n_79, %cst_1 : tensor<1x64xi32> loc(#loc343)
+      %tmp16_96 = arith.subi %tmp16_95, %cst_6 : tensor<1x64xi32> loc(#loc344)
+      %tmp16_97 = arith.select %tmp16_94, %tmp16_96, %tmp16_95 : tensor<1x64xi1>, tensor<1x64xi32> loc(#loc345)
+      %tmp16_98 = arith.select %tmp8, %tmp16_97, %tmp16_95 : tensor<1x64xi1>, tensor<1x64xi32> loc(#loc346)
+      %tmp17 = tt.broadcast %tmp14_93 : tensor<128x1xi32> -> tensor<128x64xi32> loc(#loc347)
+      %tmp17_99 = tt.broadcast %tmp16_98 : tensor<1x64xi32> -> tensor<128x64xi32> loc(#loc347)
+      %tmp17_100 = arith.cmpi eq, %tmp17, %tmp17_99 : tensor<128x64xi32> loc(#loc347)
+      %tmp18 = arith.andi %tmp11_88, %tmp17_100 : tensor<128x64xi1> loc(#loc348)
+      %tmp19 = arith.ori %tmp9_86, %tmp18 : tensor<128x64xi1> loc(#loc349)
+      %tmp20 = arith.ori %tmp6_84, %tmp19 : tensor<128x64xi1> loc(#loc350)
+      %mask_mod_output = arith.select %post_mod_scores_80, %tmp20, %cst_5 : tensor<128x64xi1>, tensor<128x64xi1> loc(#loc351)
+      %post_mod_scores_101 = arith.select %mask_mod_output, %post_mod_scores_81, %cst_10 : tensor<128x64xi1>, tensor<128x64xf32> loc(#loc352)
+      %post_mod_scores_102 = arith.mulf %post_mod_scores_101, %cst_4 : tensor<128x64xf32> loc(#loc353)
+      %m_ij = "tt.reduce"(%post_mod_scores_102) <{axis = 1 : i32}> ({
+      ^bb0(%m_ij_135: f32 loc(callsite(#loc1 at #loc354)), %m_ij_136: f32 loc(callsite(#loc1 at #loc354))):
+        %m_ij_137 = arith.maxnumf %m_ij_135, %m_ij_136 : f32 loc(#loc467)
+        tt.reduce.return %m_ij_137 : f32 loc(#loc412)
+      }) : (tensor<128x64xf32>) -> tensor<128xf32> loc(#loc412)
+      %m_ij_103 = arith.maxnumf %m_i, %m_ij : tensor<128xf32> loc(#loc355)
+      %masked_out_rows = arith.cmpf oeq, %m_ij_103, %cst_3 : tensor<128xf32> loc(#loc356)
+      %m_ij_masked = arith.select %masked_out_rows, %cst_14, %m_ij_103 : tensor<128xi1>, tensor<128xf32> loc(#loc357)
+      %alpha = arith.subf %m_i, %m_ij_masked : tensor<128xf32> loc(#loc358)
+      %alpha_104 = math.exp2 %alpha : tensor<128xf32> loc(#loc359)
+      %p = tt.expand_dims %m_ij_masked {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc360)
+      %p_105 = tt.broadcast %p : tensor<128x1xf32> -> tensor<128x64xf32> loc(#loc361)
+      %p_106 = arith.subf %post_mod_scores_102, %p_105 : tensor<128x64xf32> loc(#loc361)
+      %p_107 = math.exp2 %p_106 : tensor<128x64xf32> loc(#loc362)
+      %l_i_108 = arith.mulf %l_i_63, %alpha_104 : tensor<128xf32> loc(#loc363)
+      %l_i_109 = "tt.reduce"(%p_107) <{axis = 1 : i32}> ({
+      ^bb0(%l_i_135: f32 loc(callsite(#loc1 at #loc364)), %l_i_136: f32 loc(callsite(#loc1 at #loc364))):
+        %l_i_137 = arith.addf %l_i_135, %l_i_136 : f32 loc(#loc468)
+        tt.reduce.return %l_i_137 : f32 loc(#loc414)
+      }) : (tensor<128x64xf32>) -> tensor<128xf32> loc(#loc414)
+      %l_i_110 = arith.addf %l_i_108, %l_i_109 : tensor<128xf32> loc(#loc365)
+      %acc_111 = tt.expand_dims %alpha_104 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc366)
+      %acc_112 = tt.broadcast %acc_111 : tensor<128x1xf32> -> tensor<128x128xf32> loc(#loc367)
+      %acc_113 = arith.mulf %acc_62, %acc_112 : tensor<128x128xf32> loc(#loc367)
+      %ptr_114 = tt.splat %V : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc416)
+      %ptr_115 = tt.addptr %ptr_114, %ptr_68 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc416)
+      %ptr_116 = tt.broadcast %ptr_115 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc417)
+      %ptr_117 = tt.addptr %ptr_116, %ptr_72 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc417)
+      %v = tt.load %ptr_117, %k_75, %cst_0 : tensor<64x128x!tt.ptr<bf16>> loc(#loc418)
+      %acc_118 = arith.truncf %p_107 : tensor<128x64xf32> to tensor<128x64xbf16> loc(#loc369)
+      %acc_119 = tt.dot %acc_118, %v, %acc_113, inputPrecision = tf32 : tensor<128x64xbf16> * tensor<64x128xbf16> -> tensor<128x128xf32> loc(#loc370)
+      %cur_block_idx = arith.divsi %start_n, %c2_i32 : i32 loc(#loc419)
+      %cur_block = tt.addptr %kv_indices, %cur_block_idx : !tt.ptr<i32>, i32 loc(#loc420)
+      %cur_block_120 = tt.load %cur_block evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc421)
+      %next_block = arith.addi %cur_block_idx, %c1_i32 : i32 loc(#loc422)
+      %next_block_121 = arith.cmpi slt, %next_block, %kv_num_blocks_32 : i32 loc(#loc423)
+      %next_block_122 = tt.addptr %cur_block, %c1_i32 : !tt.ptr<i32>, i32 loc(#loc424)
+      %next_block_123 = tt.load %next_block_122, %next_block_121 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc425)
+      %needs_jump = arith.addi %start_n, %c1_i32 : i32 loc(#loc426)
+      %needs_jump_124 = arith.remsi %needs_jump, %c2_i32 : i32 loc(#loc427)
+      %needs_jump_125 = arith.cmpi eq, %needs_jump_124, %c0_i32 : i32 loc(#loc428)
+      %jump_to_block = arith.subi %next_block_123, %cur_block_120 : i32 loc(#loc429)
+      %jump_to_block_126 = arith.muli %jump_to_block, %c128_i32 : i32 loc(#loc430)
+      %jump_to_block_127 = arith.subi %jump_to_block_126, %c64_i32 : i32 loc(#loc431)
+      %offset = arith.extui %needs_jump_125 : i1 to i32 loc(#loc432)
+      %offset_128 = arith.muli %jump_to_block_127, %offset : i32 loc(#loc432)
+      %offset_129 = arith.subi %c1_i32, %offset : i32 loc(#loc433)
+      %offset_130 = arith.muli %offset_129, %c64_i32 : i32 loc(#loc434)
+      %offset_131 = arith.addi %offset_128, %offset_130 : i32 loc(#loc435)
+      %offs_n_132 = tt.splat %offset_131 : i32 -> tensor<1x64xi32> loc(#loc372)
+      %offs_n_133 = arith.addi %offs_n_64, %offs_n_132 : tensor<1x64xi32> loc(#loc372)
+      %kv_offset_134 = arith.addi %kv_offset_65, %offset_131 : i32 loc(#loc373)
+      scf.yield %acc_119, %l_i_110, %m_ij_103, %offs_n_133, %kv_offset_134 : tensor<128x128xf32>, tensor<128xf32>, tensor<128xf32>, tensor<1x64xi32>, i32 loc(#loc284)
+    } loc(#loc472)
+    %kv_indices_39 = tt.addptr %arg_FULL_KV_IDX, %sparse_kv_idx_offset : !tt.ptr<i32>, i32 loc(#loc285)
+    %kv_start_40 = tt.load %kv_indices_39 : !tt.ptr<i32> loc(#loc286)
+    %kv_start_41 = arith.muli %kv_start_40, %c128_i32 : i32 loc(#loc287)
+    %kv_num_blocks_42 = tt.addptr %arg_FULL_KV_NUM_BLKS, %q_start : !tt.ptr<i32>, i32 loc(#loc288)
+    %kv_num_blocks_43 = tt.load %kv_num_blocks_42 : !tt.ptr<i32> loc(#loc289)
+    %block_n_end_44 = arith.muli %kv_num_blocks_43, %c2_i32 : i32 loc(#loc290)
+    %block_n_end_45 = arith.minsi %block_n_end_44, %block_n_end_35 : i32 loc(#loc291)
+    %offs_n_46 = tt.splat %kv_start_41 : i32 -> tensor<64xi32> loc(#loc292)
+    %offs_n_47 = arith.addi %offs_n_46, %offs_n : tensor<64xi32> loc(#loc292)
+    %2 = tt.expand_dims %offs_n_47 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc136)
+    %kv_offset_48:5 = scf.for %start_n = %c0_i32 to %block_n_end_45 step %c1_i32 iter_args(%acc_62 = %kv_offset#0, %l_i_63 = %kv_offset#1, %m_i = %kv_offset#2, %offs_n_64 = %2, %kv_offset_65 = %c0_i32) -> (tensor<128x128xf32>, tensor<128xf32>, tensor<128xf32>, tensor<1x64xi32>, i32)  : i32 {
+      %kv_base_offset = arith.addi %kv_start_41, %kv_offset_65 : i32 loc(#loc374)
+      %offs_n_load = tt.splat %kv_base_offset : i32 -> tensor<64xi32> loc(#loc375)
+      %offs_n_load_66 = arith.addi %offs_n_load, %offs_n : tensor<64xi32> loc(#loc375)
+      %ptr_67 = tt.expand_dims %offs_n_load_66 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc436)
+      %ptr_68 = arith.muli %ptr_67, %cst : tensor<64x1xi32> loc(#loc437)
+      %ptr_69 = tt.splat %K : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc438)
+      %ptr_70 = tt.addptr %ptr_69, %ptr_68 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc438)
+      %ptr_71 = tt.broadcast %ptr_70 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc439)
+      %ptr_72 = tt.broadcast %ptr_23 : tensor<1x128xi32> -> tensor<64x128xi32> loc(#loc439)
+      %ptr_73 = tt.addptr %ptr_71, %ptr_72 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc439)
+      %k = tt.splat %ks1 : i32 -> tensor<64x1xi32> loc(#loc440)
+      %k_74 = arith.cmpi slt, %ptr_67, %k : tensor<64x1xi32> loc(#loc440)
+      %k_75 = tt.broadcast %k_74 : tensor<64x1xi1> -> tensor<64x128xi1> loc(#loc441)
+      %k_76 = tt.load %ptr_73, %k_75, %cst_0 : tensor<64x128x!tt.ptr<bf16>> loc(#loc441)
+      %k_77 = tt.trans %k_76 {order = array<i32: 1, 0>} : tensor<64x128xbf16> -> tensor<128x64xbf16> loc(#loc377)
+      %qk = tt.dot %q_30, %k_77, %cst_12, inputPrecision = tf32 : tensor<128x128xbf16> * tensor<128x64xbf16> -> tensor<128x64xf32> loc(#loc378)
+      %qk_78 = arith.mulf %qk, %cst_11 : tensor<128x64xf32> loc(#loc379)
+      %post_mod_scores = tt.splat %ks1 : i32 -> tensor<1x64xi32> loc(#loc380)
+      %post_mod_scores_79 = arith.cmpi slt, %offs_n_64, %post_mod_scores : tensor<1x64xi32> loc(#loc380)
+      %post_mod_scores_80 = tt.broadcast %post_mod_scores_79 : tensor<1x64xi1> -> tensor<128x64xi1> loc(#loc381)
+      %post_mod_scores_81 = arith.select %post_mod_scores_80, %qk_78, %cst_10 : tensor<128x64xi1>, tensor<128x64xf32> loc(#loc381)
+      %post_mod_scores_82 = arith.mulf %post_mod_scores_81, %cst_4 : tensor<128x64xf32> loc(#loc382)
+      %m_ij = "tt.reduce"(%post_mod_scores_82) <{axis = 1 : i32}> ({
+      ^bb0(%m_ij_115: f32 loc(callsite(#loc1 at #loc383)), %m_ij_116: f32 loc(callsite(#loc1 at #loc383))):
+        %m_ij_117 = arith.maxnumf %m_ij_115, %m_ij_116 : f32 loc(#loc469)
+        tt.reduce.return %m_ij_117 : f32 loc(#loc442)
+      }) : (tensor<128x64xf32>) -> tensor<128xf32> loc(#loc442)
+      %m_ij_83 = arith.maxnumf %m_i, %m_ij : tensor<128xf32> loc(#loc384)
+      %masked_out_rows = arith.cmpf oeq, %m_ij_83, %cst_3 : tensor<128xf32> loc(#loc385)
+      %m_ij_masked = arith.select %masked_out_rows, %cst_14, %m_ij_83 : tensor<128xi1>, tensor<128xf32> loc(#loc386)
+      %alpha = arith.subf %m_i, %m_ij_masked : tensor<128xf32> loc(#loc387)
+      %alpha_84 = math.exp2 %alpha : tensor<128xf32> loc(#loc388)
+      %p = tt.expand_dims %m_ij_masked {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc389)
+      %p_85 = tt.broadcast %p : tensor<128x1xf32> -> tensor<128x64xf32> loc(#loc390)
+      %p_86 = arith.subf %post_mod_scores_82, %p_85 : tensor<128x64xf32> loc(#loc390)
+      %p_87 = math.exp2 %p_86 : tensor<128x64xf32> loc(#loc391)
+      %l_i_88 = arith.mulf %l_i_63, %alpha_84 : tensor<128xf32> loc(#loc392)
+      %l_i_89 = "tt.reduce"(%p_87) <{axis = 1 : i32}> ({
+      ^bb0(%l_i_115: f32 loc(callsite(#loc1 at #loc393)), %l_i_116: f32 loc(callsite(#loc1 at #loc393))):
+        %l_i_117 = arith.addf %l_i_115, %l_i_116 : f32 loc(#loc470)
+        tt.reduce.return %l_i_117 : f32 loc(#loc444)
+      }) : (tensor<128x64xf32>) -> tensor<128xf32> loc(#loc444)
+      %l_i_90 = arith.addf %l_i_88, %l_i_89 : tensor<128xf32> loc(#loc394)
+      %acc_91 = tt.expand_dims %alpha_84 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc395)
+      %acc_92 = tt.broadcast %acc_91 : tensor<128x1xf32> -> tensor<128x128xf32> loc(#loc396)
+      %acc_93 = arith.mulf %acc_62, %acc_92 : tensor<128x128xf32> loc(#loc396)
+      %ptr_94 = tt.splat %V : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc446)
+      %ptr_95 = tt.addptr %ptr_94, %ptr_68 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc446)
+      %ptr_96 = tt.broadcast %ptr_95 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc447)
+      %ptr_97 = tt.addptr %ptr_96, %ptr_72 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc447)
+      %v = tt.load %ptr_97, %k_75, %cst_0 : tensor<64x128x!tt.ptr<bf16>> loc(#loc448)
+      %acc_98 = arith.truncf %p_87 : tensor<128x64xf32> to tensor<128x64xbf16> loc(#loc398)
+      %acc_99 = tt.dot %acc_98, %v, %acc_93, inputPrecision = tf32 : tensor<128x64xbf16> * tensor<64x128xbf16> -> tensor<128x128xf32> loc(#loc399)
+      %cur_block_idx = arith.divsi %start_n, %c2_i32 : i32 loc(#loc449)
+      %cur_block = tt.addptr %kv_indices_39, %cur_block_idx : !tt.ptr<i32>, i32 loc(#loc450)
+      %cur_block_100 = tt.load %cur_block evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc451)
+      %next_block = arith.addi %cur_block_idx, %c1_i32 : i32 loc(#loc452)
+      %next_block_101 = arith.cmpi slt, %next_block, %kv_num_blocks_43 : i32 loc(#loc453)
+      %next_block_102 = tt.addptr %cur_block, %c1_i32 : !tt.ptr<i32>, i32 loc(#loc454)
+      %next_block_103 = tt.load %next_block_102, %next_block_101 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc455)
+      %needs_jump = arith.addi %start_n, %c1_i32 : i32 loc(#loc456)
+      %needs_jump_104 = arith.remsi %needs_jump, %c2_i32 : i32 loc(#loc457)
+      %needs_jump_105 = arith.cmpi eq, %needs_jump_104, %c0_i32 : i32 loc(#loc458)
+      %jump_to_block = arith.subi %next_block_103, %cur_block_100 : i32 loc(#loc459)
+      %jump_to_block_106 = arith.muli %jump_to_block, %c128_i32 : i32 loc(#loc460)
+      %jump_to_block_107 = arith.subi %jump_to_block_106, %c64_i32 : i32 loc(#loc461)
+      %offset = arith.extui %needs_jump_105 : i1 to i32 loc(#loc462)
+      %offset_108 = arith.muli %jump_to_block_107, %offset : i32 loc(#loc462)
+      %offset_109 = arith.subi %c1_i32, %offset : i32 loc(#loc463)
+      %offset_110 = arith.muli %offset_109, %c64_i32 : i32 loc(#loc464)
+      %offset_111 = arith.addi %offset_108, %offset_110 : i32 loc(#loc465)
+      %offs_n_112 = tt.splat %offset_111 : i32 -> tensor<1x64xi32> loc(#loc401)
+      %offs_n_113 = arith.addi %offs_n_64, %offs_n_112 : tensor<1x64xi32> loc(#loc401)
+      %kv_offset_114 = arith.addi %kv_offset_65, %offset_111 : i32 loc(#loc402)
+      scf.yield %acc_99, %l_i_90, %m_ij_83, %offs_n_113, %kv_offset_114 : tensor<128x128xf32>, tensor<128xf32>, tensor<128xf32>, tensor<1x64xi32>, i32 loc(#loc294)
+    } loc(#loc473)
+    %l_i_49 = arith.cmpf oeq, %kv_offset_48#1, %cst_14 : tensor<128xf32> loc(#loc295)
+    %l_i_50 = arith.select %l_i_49, %l_i, %kv_offset_48#1 : tensor<128xi1>, tensor<128xf32> loc(#loc175)
+    %acc_51 = tt.expand_dims %l_i_50 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc296)
+    %acc_52 = tt.broadcast %acc_51 : tensor<128x1xf32> -> tensor<128x128xf32> loc(#loc297)
+    %acc_53 = arith.divf %kv_offset_48#0, %acc_52 : tensor<128x128xf32> loc(#loc297)
+    %mask_54 = arith.cmpi slt, %ptr_23, %mask : tensor<1x128xi32> loc(#loc174)
+    %mask_55 = tt.broadcast %mask_54 : tensor<1x128xi1> -> tensor<128x128xi1> loc(#loc298)
+    %mask_56 = arith.andi %q_29, %mask_55 : tensor<128x128xi1> loc(#loc298)
+    %3 = tt.splat %q_offset_15 : i32 -> tensor<1x128xi32> loc(#loc142)
+    %4 = arith.addi %ptr_23, %3 : tensor<1x128xi32> loc(#loc142)
+    %5 = tt.broadcast %4 : tensor<1x128xi32> -> tensor<128x128xi32> loc(#loc143)
+    %6 = tt.broadcast %ptr_20 : tensor<128x1xi32> -> tensor<128x128xi32> loc(#loc143)
+    %7 = arith.addi %5, %6 : tensor<128x128xi32> loc(#loc143)
+    %8 = tt.splat %out_ptr0 : !tt.ptr<bf16> -> tensor<128x128x!tt.ptr<bf16>> loc(#loc144)
+    %9 = tt.addptr %8, %7 : tensor<128x128x!tt.ptr<bf16>>, tensor<128x128xi32> loc(#loc144)
+    %10 = arith.truncf %acc_53 : tensor<128x128xf32> to tensor<128x128xbf16> loc(#loc145)
+    tt.store %9, %10, %mask_56 : tensor<128x128x!tt.ptr<bf16>> loc(#loc145)
+    %off_hz = arith.muli %off_zq, %HQ : i32 loc(#loc299)
+    %off_hz_57 = arith.addi %off_hz, %off_hq : i32 loc(#loc300)
+    %l_ptrs = arith.muli %off_hz_57, %ks0 : i32 loc(#loc301)
+    %l_ptrs_58 = tt.addptr %arg_LSE, %l_ptrs : !tt.ptr<f32>, i32 loc(#loc302)
+    %l_ptrs_59 = tt.splat %l_ptrs_58 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>> loc(#loc303)
+    %l_ptrs_60 = tt.addptr %l_ptrs_59, %offs_m_19 : tensor<128x!tt.ptr<f32>>, tensor<128xi32> loc(#loc303)
+    %lse = math.log2 %l_i_50 : tensor<128xf32> loc(#loc304)
+    %lse_61 = arith.addf %kv_offset_48#2, %lse : tensor<128xf32> loc(#loc305)
+    %11 = tt.splat %ks0 : i32 -> tensor<128xi32> loc(#loc153)
+    %12 = arith.cmpi slt, %offs_m_19, %11 : tensor<128xi32> loc(#loc153)
+    tt.store %l_ptrs_60, %lse_61, %12 : tensor<128x!tt.ptr<f32>> loc(#loc154)
+    tt.return loc(#loc155)
+  } loc(#loc)
+} loc(#loc)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":292:23)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":146:101)
+#loc5 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:31)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":136:19)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":214:38)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":206:34)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":90:9)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":85:54)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":97:28)
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+#loc126 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":531:21)
+#loc127 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":531:8)
+#loc128 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sj/csjgoierbyb7y37xze3raek6tsz2nam2dgfupz3aqsd5fa3pyzto.py":181:35)
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+#loc171 = loc(callsite(#loc1 at #loc2))
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+#loc266 = loc("cur_block"(#loc109))
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progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/__grp__triton_per_fused_mul_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_per_fused_mul_1.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.source", "triton_per_fused_mul_1.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.ttir", "triton_per_fused_mul_1.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.ttgir", "triton_per_fused_mul_1.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.llir", "triton_per_fused_mul_1.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.ptx", "triton_per_fused_mul_1.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.cubin", "triton_per_fused_mul_1.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.json

@@ -0,0 +1 @@
+{"hash": "d74899755dbce272e791805e3b63e07d55dd638854536aa9def087e90d782d2d", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 8, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 4096, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_per_fused_mul_1"}

progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.llir

@@ -0,0 +1,1190 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external addrspace(3) global [0 x i8], align 16
+@.str = private unnamed_addr constant [11 x i8] c"__CUDA_FTZ\00", align 1
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_per_fused_mul_1(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, i64 %5, i32 %6, i32 %7, ptr addrspace(1) readnone captures(none) %8, ptr addrspace(1) readnone captures(none) %9) local_unnamed_addr #0 !dbg !5 {
+  %11 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !8
+  %12 = shl i32 %11, 7, !dbg !9
+  %13 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !10
+  %14 = lshr i32 %13, 5, !dbg !10
+  %15 = and i32 %13, 31, !dbg !10
+  %16 = shl nuw nsw i32 %15, 2, !dbg !10
+  %17 = or disjoint i32 %16, %12, !dbg !11
+  %18 = icmp slt i32 %17, %6, !dbg !12
+  %19 = and i32 %14, 7, !dbg !13
+  %20 = or disjoint i32 %19, 8, !dbg !13
+  %21 = or disjoint i32 %19, 16, !dbg !13
+  %22 = or i32 %14, 24, !dbg !13
+  %23 = sext i32 %17 to i64, !dbg !14
+  %24 = shl i64 %5, 5, !dbg !15
+  %25 = zext nneg i32 %19 to i64, !dbg !16
+  %26 = zext nneg i32 %20 to i64, !dbg !16
+  %27 = zext nneg i32 %21 to i64, !dbg !16
+  %28 = zext nneg i32 %22 to i64, !dbg !16
+  %29 = mul i64 %24, %25, !dbg !16
+  %30 = mul i64 %24, %26, !dbg !16
+  %31 = mul i64 %24, %27, !dbg !16
+  %32 = mul i64 %24, %28, !dbg !16
+  %33 = add i64 %29, %23, !dbg !17
+  %34 = add i64 %30, %23, !dbg !17
+  %35 = add i64 %31, %23, !dbg !17
+  %36 = add i64 %32, %23, !dbg !17
+  %37 = getelementptr float, ptr addrspace(1) %0, i64 %33, !dbg !18
+  %38 = getelementptr float, ptr addrspace(1) %0, i64 %34, !dbg !18
+  %39 = getelementptr float, ptr addrspace(1) %0, i64 %35, !dbg !18
+  %40 = getelementptr float, ptr addrspace(1) %0, i64 %36, !dbg !18
+  %41 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %37, i1 %18) #6, !dbg !19
+  %42 = extractvalue { i32, i32, i32, i32 } %41, 0, !dbg !19
+  %43 = extractvalue { i32, i32, i32, i32 } %41, 1, !dbg !19
+  %44 = extractvalue { i32, i32, i32, i32 } %41, 2, !dbg !19
+  %45 = extractvalue { i32, i32, i32, i32 } %41, 3, !dbg !19
+  %46 = bitcast i32 %42 to float, !dbg !19
+  %47 = bitcast i32 %43 to float, !dbg !19
+  %48 = bitcast i32 %44 to float, !dbg !19
+  %49 = bitcast i32 %45 to float, !dbg !19
+  %50 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %38, i1 %18) #6, !dbg !19
+  %51 = extractvalue { i32, i32, i32, i32 } %50, 0, !dbg !19
+  %52 = extractvalue { i32, i32, i32, i32 } %50, 1, !dbg !19
+  %53 = extractvalue { i32, i32, i32, i32 } %50, 2, !dbg !19
+  %54 = extractvalue { i32, i32, i32, i32 } %50, 3, !dbg !19
+  %55 = bitcast i32 %51 to float, !dbg !19
+  %56 = bitcast i32 %52 to float, !dbg !19
+  %57 = bitcast i32 %53 to float, !dbg !19
+  %58 = bitcast i32 %54 to float, !dbg !19
+  %59 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %39, i1 %18) #6, !dbg !19
+  %60 = extractvalue { i32, i32, i32, i32 } %59, 0, !dbg !19
+  %61 = extractvalue { i32, i32, i32, i32 } %59, 1, !dbg !19
+  %62 = extractvalue { i32, i32, i32, i32 } %59, 2, !dbg !19
+  %63 = extractvalue { i32, i32, i32, i32 } %59, 3, !dbg !19
+  %64 = bitcast i32 %60 to float, !dbg !19
+  %65 = bitcast i32 %61 to float, !dbg !19
+  %66 = bitcast i32 %62 to float, !dbg !19
+  %67 = bitcast i32 %63 to float, !dbg !19
+  %68 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %40, i1 %18) #6, !dbg !19
+  %69 = extractvalue { i32, i32, i32, i32 } %68, 0, !dbg !19
+  %70 = extractvalue { i32, i32, i32, i32 } %68, 1, !dbg !19
+  %71 = extractvalue { i32, i32, i32, i32 } %68, 2, !dbg !19
+  %72 = extractvalue { i32, i32, i32, i32 } %68, 3, !dbg !19
+  %73 = bitcast i32 %69 to float, !dbg !19
+  %74 = bitcast i32 %70 to float, !dbg !19
+  %75 = bitcast i32 %71 to float, !dbg !19
+  %76 = bitcast i32 %72 to float, !dbg !19
+  %77 = getelementptr float, ptr addrspace(1) %1, i64 %33, !dbg !20
+  %78 = getelementptr float, ptr addrspace(1) %1, i64 %34, !dbg !20
+  %79 = getelementptr float, ptr addrspace(1) %1, i64 %35, !dbg !20
+  %80 = getelementptr float, ptr addrspace(1) %1, i64 %36, !dbg !20
+  %81 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %77, i1 %18) #6, !dbg !21
+  %82 = extractvalue { i32, i32, i32, i32 } %81, 0, !dbg !21
+  %83 = extractvalue { i32, i32, i32, i32 } %81, 1, !dbg !21
+  %84 = extractvalue { i32, i32, i32, i32 } %81, 2, !dbg !21
+  %85 = extractvalue { i32, i32, i32, i32 } %81, 3, !dbg !21
+  %86 = bitcast i32 %82 to float, !dbg !21
+  %87 = bitcast i32 %83 to float, !dbg !21
+  %88 = bitcast i32 %84 to float, !dbg !21
+  %89 = bitcast i32 %85 to float, !dbg !21
+  %90 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %78, i1 %18) #6, !dbg !21
+  %91 = extractvalue { i32, i32, i32, i32 } %90, 0, !dbg !21
+  %92 = extractvalue { i32, i32, i32, i32 } %90, 1, !dbg !21
+  %93 = extractvalue { i32, i32, i32, i32 } %90, 2, !dbg !21
+  %94 = extractvalue { i32, i32, i32, i32 } %90, 3, !dbg !21
+  %95 = bitcast i32 %91 to float, !dbg !21
+  %96 = bitcast i32 %92 to float, !dbg !21
+  %97 = bitcast i32 %93 to float, !dbg !21
+  %98 = bitcast i32 %94 to float, !dbg !21
+  %99 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %79, i1 %18) #6, !dbg !21
+  %100 = extractvalue { i32, i32, i32, i32 } %99, 0, !dbg !21
+  %101 = extractvalue { i32, i32, i32, i32 } %99, 1, !dbg !21
+  %102 = extractvalue { i32, i32, i32, i32 } %99, 2, !dbg !21
+  %103 = extractvalue { i32, i32, i32, i32 } %99, 3, !dbg !21
+  %104 = bitcast i32 %100 to float, !dbg !21
+  %105 = bitcast i32 %101 to float, !dbg !21
+  %106 = bitcast i32 %102 to float, !dbg !21
+  %107 = bitcast i32 %103 to float, !dbg !21
+  %108 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %80, i1 %18) #6, !dbg !21
+  %109 = extractvalue { i32, i32, i32, i32 } %108, 0, !dbg !21
+  %110 = extractvalue { i32, i32, i32, i32 } %108, 1, !dbg !21
+  %111 = extractvalue { i32, i32, i32, i32 } %108, 2, !dbg !21
+  %112 = extractvalue { i32, i32, i32, i32 } %108, 3, !dbg !21
+  %113 = bitcast i32 %109 to float, !dbg !21
+  %114 = bitcast i32 %110 to float, !dbg !21
+  %115 = bitcast i32 %111 to float, !dbg !21
+  %116 = bitcast i32 %112 to float, !dbg !21
+  %117 = select i1 %18, float %46, float 0xFFF0000000000000, !dbg !22
+  %118 = select i1 %18, float %47, float 0xFFF0000000000000, !dbg !22
+  %119 = select i1 %18, float %48, float 0xFFF0000000000000, !dbg !22
+  %120 = select i1 %18, float %49, float 0xFFF0000000000000, !dbg !22
+  %121 = select i1 %18, float %55, float 0xFFF0000000000000, !dbg !22
+  %122 = select i1 %18, float %56, float 0xFFF0000000000000, !dbg !22
+  %123 = select i1 %18, float %57, float 0xFFF0000000000000, !dbg !22
+  %124 = select i1 %18, float %58, float 0xFFF0000000000000, !dbg !22
+  %125 = select i1 %18, float %64, float 0xFFF0000000000000, !dbg !22
+  %126 = select i1 %18, float %65, float 0xFFF0000000000000, !dbg !22
+  %127 = select i1 %18, float %66, float 0xFFF0000000000000, !dbg !22
+  %128 = select i1 %18, float %67, float 0xFFF0000000000000, !dbg !22
+  %129 = select i1 %18, float %73, float 0xFFF0000000000000, !dbg !22
+  %130 = select i1 %18, float %74, float 0xFFF0000000000000, !dbg !22
+  %131 = select i1 %18, float %75, float 0xFFF0000000000000, !dbg !22
+  %132 = select i1 %18, float %76, float 0xFFF0000000000000, !dbg !22
+  %133 = fcmp ogt float %117, %121, !dbg !23
+  %134 = fcmp uno float %117, 0.000000e+00, !dbg !27
+  %135 = or i1 %134, %133, !dbg !28
+  %136 = select i1 %135, float %117, float %121, !dbg !29
+  %137 = fcmp ogt float %118, %122, !dbg !23
+  %138 = fcmp uno float %118, 0.000000e+00, !dbg !27
+  %139 = or i1 %138, %137, !dbg !28
+  %140 = select i1 %139, float %118, float %122, !dbg !29
+  %141 = fcmp ogt float %119, %123, !dbg !23
+  %142 = fcmp uno float %119, 0.000000e+00, !dbg !27
+  %143 = or i1 %142, %141, !dbg !28
+  %144 = select i1 %143, float %119, float %123, !dbg !29
+  %145 = fcmp ogt float %120, %124, !dbg !23
+  %146 = fcmp uno float %120, 0.000000e+00, !dbg !27
+  %147 = or i1 %146, %145, !dbg !28
+  %148 = select i1 %147, float %120, float %124, !dbg !29
+  %149 = fcmp ogt float %136, %125, !dbg !23
+  %150 = fcmp uno float %136, 0.000000e+00, !dbg !27
+  %151 = or i1 %149, %150, !dbg !28
+  %152 = select i1 %151, float %136, float %125, !dbg !29
+  %153 = fcmp ogt float %140, %126, !dbg !23
+  %154 = fcmp uno float %140, 0.000000e+00, !dbg !27
+  %155 = or i1 %153, %154, !dbg !28
+  %156 = select i1 %155, float %140, float %126, !dbg !29
+  %157 = fcmp ogt float %144, %127, !dbg !23
+  %158 = fcmp uno float %144, 0.000000e+00, !dbg !27
+  %159 = or i1 %157, %158, !dbg !28
+  %160 = select i1 %159, float %144, float %127, !dbg !29
+  %161 = fcmp ogt float %148, %128, !dbg !23
+  %162 = fcmp uno float %148, 0.000000e+00, !dbg !27
+  %163 = or i1 %161, %162, !dbg !28
+  %164 = select i1 %163, float %148, float %128, !dbg !29
+  %165 = fcmp ogt float %152, %129, !dbg !23
+  %166 = fcmp uno float %152, 0.000000e+00, !dbg !27
+  %167 = or i1 %165, %166, !dbg !28
+  %168 = select i1 %167, float %152, float %129, !dbg !29
+  %169 = fcmp ogt float %156, %130, !dbg !23
+  %170 = fcmp uno float %156, 0.000000e+00, !dbg !27
+  %171 = or i1 %169, %170, !dbg !28
+  %172 = select i1 %171, float %156, float %130, !dbg !29
+  %173 = fcmp ogt float %160, %131, !dbg !23
+  %174 = fcmp uno float %160, 0.000000e+00, !dbg !27
+  %175 = or i1 %173, %174, !dbg !28
+  %176 = select i1 %175, float %160, float %131, !dbg !29
+  %177 = fcmp ogt float %164, %132, !dbg !23
+  %178 = fcmp uno float %164, 0.000000e+00, !dbg !27
+  %179 = or i1 %177, %178, !dbg !28
+  %180 = select i1 %179, float %164, float %132, !dbg !29
+  %.idx = shl nuw nsw i32 %15, 7, !dbg !30
+  %181 = getelementptr i8, ptr addrspace(3) @global_smem, i32 %.idx, !dbg !30
+  %182 = getelementptr float, ptr addrspace(3) %181, i32 %19, !dbg !30
+  %183 = bitcast float %168 to <1 x i32>, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %182, <1 x i32> %183, i1 true) #6, !dbg !30
+  %184 = getelementptr i8, ptr addrspace(3) %181, i32 32, !dbg !30
+  %185 = getelementptr float, ptr addrspace(3) %184, i32 %19, !dbg !30
+  %186 = bitcast float %172 to <1 x i32>, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %185, <1 x i32> %186, i1 true) #6, !dbg !30
+  %187 = getelementptr i8, ptr addrspace(3) %181, i32 64, !dbg !30
+  %188 = getelementptr float, ptr addrspace(3) %187, i32 %19, !dbg !30
+  %189 = bitcast float %176 to <1 x i32>, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %188, <1 x i32> %189, i1 true) #6, !dbg !30
+  %190 = getelementptr i8, ptr addrspace(3) %181, i32 96, !dbg !30
+  %191 = getelementptr float, ptr addrspace(3) %190, i32 %19, !dbg !30
+  %192 = bitcast float %180 to <1 x i32>, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %191, <1 x i32> %192, i1 true) #6, !dbg !30
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !30
+  %193 = getelementptr float, ptr addrspace(3) @global_smem, i32 %13, !dbg !30
+  %194 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %193, i1 true) #6, !dbg !30
+  %195 = bitcast i32 %194 to float, !dbg !30
+  %196 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %194, i32 4, i32 31), !dbg !30
+  %197 = bitcast i32 %196 to float, !dbg !30
+  %198 = fcmp ogt float %195, %197, !dbg !23
+  %199 = fcmp uno float %195, 0.000000e+00, !dbg !27
+  %200 = or i1 %199, %198, !dbg !28
+  %201 = select i1 %200, float %195, float %197, !dbg !29
+  %202 = bitcast float %201 to i32, !dbg !30
+  %203 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %202, i32 2, i32 31), !dbg !30
+  %204 = bitcast i32 %203 to float, !dbg !30
+  %205 = fcmp ogt float %201, %204, !dbg !23
+  %206 = fcmp uno float %201, 0.000000e+00, !dbg !27
+  %207 = or i1 %205, %206, !dbg !28
+  %208 = select i1 %207, float %201, float %204, !dbg !29
+  %209 = bitcast float %208 to i32, !dbg !30
+  %210 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %209, i32 1, i32 31), !dbg !30
+  %211 = bitcast i32 %210 to float, !dbg !30
+  %212 = fcmp ogt float %208, %211, !dbg !23
+  %213 = fcmp uno float %208, 0.000000e+00, !dbg !27
+  %214 = or i1 %212, %213, !dbg !28
+  %215 = and i32 %13, 7, !dbg !30
+  %216 = icmp eq i32 %215, 0, !dbg !30
+  %217 = select i1 %214, i32 %209, i32 %210, !dbg !29
+  %218 = insertelement <1 x i32> poison, i32 %217, i64 0, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %193, <1 x i32> %218, i1 %216) #6, !dbg !30
+  %219 = getelementptr i8, ptr addrspace(3) %193, i32 1024, !dbg !30
+  %220 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %219, i1 true) #6, !dbg !30
+  %221 = bitcast i32 %220 to float, !dbg !30
+  %222 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %220, i32 4, i32 31), !dbg !30
+  %223 = bitcast i32 %222 to float, !dbg !30
+  %224 = fcmp ogt float %221, %223, !dbg !23
+  %225 = fcmp uno float %221, 0.000000e+00, !dbg !27
+  %226 = or i1 %225, %224, !dbg !28
+  %227 = select i1 %226, float %221, float %223, !dbg !29
+  %228 = bitcast float %227 to i32, !dbg !30
+  %229 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %228, i32 2, i32 31), !dbg !30
+  %230 = bitcast i32 %229 to float, !dbg !30
+  %231 = fcmp ogt float %227, %230, !dbg !23
+  %232 = fcmp uno float %227, 0.000000e+00, !dbg !27
+  %233 = or i1 %231, %232, !dbg !28
+  %234 = select i1 %233, float %227, float %230, !dbg !29
+  %235 = bitcast float %234 to i32, !dbg !30
+  %236 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %235, i32 1, i32 31), !dbg !30
+  %237 = bitcast i32 %236 to float, !dbg !30
+  %238 = fcmp ogt float %234, %237, !dbg !23
+  %239 = fcmp uno float %234, 0.000000e+00, !dbg !27
+  %240 = or i1 %238, %239, !dbg !28
+  %241 = select i1 %240, i32 %235, i32 %236, !dbg !29
+  %242 = insertelement <1 x i32> poison, i32 %241, i64 0, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %219, <1 x i32> %242, i1 %216) #6, !dbg !30
+  %243 = getelementptr i8, ptr addrspace(3) %193, i32 2048, !dbg !30
+  %244 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %243, i1 true) #6, !dbg !30
+  %245 = bitcast i32 %244 to float, !dbg !30
+  %246 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %244, i32 4, i32 31), !dbg !30
+  %247 = bitcast i32 %246 to float, !dbg !30
+  %248 = fcmp ogt float %245, %247, !dbg !23
+  %249 = fcmp uno float %245, 0.000000e+00, !dbg !27
+  %250 = or i1 %249, %248, !dbg !28
+  %251 = select i1 %250, float %245, float %247, !dbg !29
+  %252 = bitcast float %251 to i32, !dbg !30
+  %253 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %252, i32 2, i32 31), !dbg !30
+  %254 = bitcast i32 %253 to float, !dbg !30
+  %255 = fcmp ogt float %251, %254, !dbg !23
+  %256 = fcmp uno float %251, 0.000000e+00, !dbg !27
+  %257 = or i1 %255, %256, !dbg !28
+  %258 = select i1 %257, float %251, float %254, !dbg !29
+  %259 = bitcast float %258 to i32, !dbg !30
+  %260 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %259, i32 1, i32 31), !dbg !30
+  %261 = bitcast i32 %260 to float, !dbg !30
+  %262 = fcmp ogt float %258, %261, !dbg !23
+  %263 = fcmp uno float %258, 0.000000e+00, !dbg !27
+  %264 = or i1 %262, %263, !dbg !28
+  %265 = select i1 %264, i32 %259, i32 %260, !dbg !29
+  %266 = insertelement <1 x i32> poison, i32 %265, i64 0, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %243, <1 x i32> %266, i1 %216) #6, !dbg !30
+  %267 = getelementptr i8, ptr addrspace(3) %193, i32 3072, !dbg !30
+  %268 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %267, i1 true) #6, !dbg !30
+  %269 = bitcast i32 %268 to float, !dbg !30
+  %270 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %268, i32 4, i32 31), !dbg !30
+  %271 = bitcast i32 %270 to float, !dbg !30
+  %272 = fcmp ogt float %269, %271, !dbg !23
+  %273 = fcmp uno float %269, 0.000000e+00, !dbg !27
+  %274 = or i1 %273, %272, !dbg !28
+  %275 = select i1 %274, float %269, float %271, !dbg !29
+  %276 = bitcast float %275 to i32, !dbg !30
+  %277 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %276, i32 2, i32 31), !dbg !30
+  %278 = bitcast i32 %277 to float, !dbg !30
+  %279 = fcmp ogt float %275, %278, !dbg !23
+  %280 = fcmp uno float %275, 0.000000e+00, !dbg !27
+  %281 = or i1 %279, %280, !dbg !28
+  %282 = select i1 %281, float %275, float %278, !dbg !29
+  %283 = bitcast float %282 to i32, !dbg !30
+  %284 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %283, i32 1, i32 31), !dbg !30
+  %285 = bitcast i32 %284 to float, !dbg !30
+  %286 = fcmp ogt float %282, %285, !dbg !23
+  %287 = fcmp uno float %282, 0.000000e+00, !dbg !27
+  %288 = or i1 %286, %287, !dbg !28
+  %289 = select i1 %288, i32 %283, i32 %284, !dbg !29
+  %290 = insertelement <1 x i32> poison, i32 %289, i64 0, !dbg !30
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %267, <1 x i32> %290, i1 %216) #6, !dbg !30
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !30
+  %291 = load float, ptr addrspace(3) %181, align 16, !dbg !30
+  %292 = load float, ptr addrspace(3) %184, align 16, !dbg !30
+  %293 = load float, ptr addrspace(3) %187, align 16, !dbg !30
+  %294 = load float, ptr addrspace(3) %190, align 16, !dbg !30
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !31
+  %295 = shl nuw nsw i32 %15, 4, !dbg !31
+  %296 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %295, !dbg !31
+  %297 = insertelement <4 x float> poison, float %291, i64 0, !dbg !31
+  %298 = insertelement <4 x float> %297, float %292, i64 1, !dbg !31
+  %299 = insertelement <4 x float> %298, float %293, i64 2, !dbg !31
+  %300 = insertelement <4 x float> %299, float %294, i64 3, !dbg !31
+  store <4 x float> %300, ptr addrspace(3) %296, align 16, !dbg !31
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !31
+  %301 = shl nuw nsw i32 %14, 7, !dbg !31
+  %302 = shl nuw nsw i32 %13, 4, !dbg !31
+  %303 = or i32 %301, %302, !dbg !31
+  %304 = and i32 %303, 496, !dbg !31
+  %305 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %304, !dbg !31
+  %306 = ptrtoint ptr addrspace(3) %305 to i32, !dbg !31
+  %307 = tail call i32 asm sideeffect "ldmatrix.sync.aligned.m8n8.x1.shared.b16 {$0}, [$1];", "=r,r"(i32 %306) #6, !dbg !31
+  %308 = fcmp oeq float %291, 0xFFF0000000000000, !dbg !32
+  %309 = fcmp oeq float %292, 0xFFF0000000000000, !dbg !32
+  %310 = fcmp oeq float %293, 0xFFF0000000000000, !dbg !32
+  %311 = fcmp oeq float %294, 0xFFF0000000000000, !dbg !32
+  %312 = fsub float %46, %291, !dbg !33
+  %313 = fsub float %47, %292, !dbg !33
+  %314 = fsub float %48, %293, !dbg !33
+  %315 = fsub float %49, %294, !dbg !33
+  %316 = fsub float %55, %291, !dbg !33
+  %317 = fsub float %56, %292, !dbg !33
+  %318 = fsub float %57, %293, !dbg !33
+  %319 = fsub float %58, %294, !dbg !33
+  %320 = fsub float %64, %291, !dbg !33
+  %321 = fsub float %65, %292, !dbg !33
+  %322 = fsub float %66, %293, !dbg !33
+  %323 = fsub float %67, %294, !dbg !33
+  %324 = fsub float %73, %291, !dbg !33
+  %325 = fsub float %74, %292, !dbg !33
+  %326 = fsub float %75, %293, !dbg !33
+  %327 = fsub float %76, %294, !dbg !33
+  %328 = select i1 %308, float 0.000000e+00, float %312, !dbg !34
+  %329 = select i1 %309, float 0.000000e+00, float %313, !dbg !34
+  %330 = select i1 %310, float 0.000000e+00, float %314, !dbg !34
+  %331 = select i1 %311, float 0.000000e+00, float %315, !dbg !34
+  %332 = select i1 %308, float 0.000000e+00, float %316, !dbg !34
+  %333 = select i1 %309, float 0.000000e+00, float %317, !dbg !34
+  %334 = select i1 %310, float 0.000000e+00, float %318, !dbg !34
+  %335 = select i1 %311, float 0.000000e+00, float %319, !dbg !34
+  %336 = select i1 %308, float 0.000000e+00, float %320, !dbg !34
+  %337 = select i1 %309, float 0.000000e+00, float %321, !dbg !34
+  %338 = select i1 %310, float 0.000000e+00, float %322, !dbg !34
+  %339 = select i1 %311, float 0.000000e+00, float %323, !dbg !34
+  %340 = select i1 %308, float 0.000000e+00, float %324, !dbg !34
+  %341 = select i1 %309, float 0.000000e+00, float %325, !dbg !34
+  %342 = select i1 %310, float 0.000000e+00, float %326, !dbg !34
+  %343 = select i1 %311, float 0.000000e+00, float %327, !dbg !34
+  %344 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i = icmp eq i32 %344, 0, !dbg !35
+  br i1 %.not.i, label %347, label %345, !dbg !35
+
+345:                                              ; preds = %10
+  %346 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %328) #6, !dbg !35
+  br label %__nv_exp2f.exit, !dbg !35
+
+347:                                              ; preds = %10
+  %348 = tail call float @llvm.nvvm.ex2.approx.f(float %328) #6, !dbg !35
+  br label %__nv_exp2f.exit, !dbg !35
+
+__nv_exp2f.exit:                                  ; preds = %345, %347
+  %.0.i = phi float [ %346, %345 ], [ %348, %347 ], !dbg !35
+  %349 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i1 = icmp eq i32 %349, 0, !dbg !35
+  br i1 %.not.i1, label %352, label %350, !dbg !35
+
+350:                                              ; preds = %__nv_exp2f.exit
+  %351 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %329) #6, !dbg !35
+  br label %__nv_exp2f.exit3, !dbg !35
+
+352:                                              ; preds = %__nv_exp2f.exit
+  %353 = tail call float @llvm.nvvm.ex2.approx.f(float %329) #6, !dbg !35
+  br label %__nv_exp2f.exit3, !dbg !35
+
+__nv_exp2f.exit3:                                 ; preds = %350, %352
+  %.0.i2 = phi float [ %351, %350 ], [ %353, %352 ], !dbg !35
+  %354 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i4 = icmp eq i32 %354, 0, !dbg !35
+  br i1 %.not.i4, label %357, label %355, !dbg !35
+
+355:                                              ; preds = %__nv_exp2f.exit3
+  %356 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %330) #6, !dbg !35
+  br label %__nv_exp2f.exit6, !dbg !35
+
+357:                                              ; preds = %__nv_exp2f.exit3
+  %358 = tail call float @llvm.nvvm.ex2.approx.f(float %330) #6, !dbg !35
+  br label %__nv_exp2f.exit6, !dbg !35
+
+__nv_exp2f.exit6:                                 ; preds = %355, %357
+  %.0.i5 = phi float [ %356, %355 ], [ %358, %357 ], !dbg !35
+  %359 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i7 = icmp eq i32 %359, 0, !dbg !35
+  br i1 %.not.i7, label %362, label %360, !dbg !35
+
+360:                                              ; preds = %__nv_exp2f.exit6
+  %361 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %331) #6, !dbg !35
+  br label %__nv_exp2f.exit9, !dbg !35
+
+362:                                              ; preds = %__nv_exp2f.exit6
+  %363 = tail call float @llvm.nvvm.ex2.approx.f(float %331) #6, !dbg !35
+  br label %__nv_exp2f.exit9, !dbg !35
+
+__nv_exp2f.exit9:                                 ; preds = %360, %362
+  %.0.i8 = phi float [ %361, %360 ], [ %363, %362 ], !dbg !35
+  %364 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i10 = icmp eq i32 %364, 0, !dbg !35
+  br i1 %.not.i10, label %367, label %365, !dbg !35
+
+365:                                              ; preds = %__nv_exp2f.exit9
+  %366 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %332) #6, !dbg !35
+  br label %__nv_exp2f.exit12, !dbg !35
+
+367:                                              ; preds = %__nv_exp2f.exit9
+  %368 = tail call float @llvm.nvvm.ex2.approx.f(float %332) #6, !dbg !35
+  br label %__nv_exp2f.exit12, !dbg !35
+
+__nv_exp2f.exit12:                                ; preds = %365, %367
+  %.0.i11 = phi float [ %366, %365 ], [ %368, %367 ], !dbg !35
+  %369 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i13 = icmp eq i32 %369, 0, !dbg !35
+  br i1 %.not.i13, label %372, label %370, !dbg !35
+
+370:                                              ; preds = %__nv_exp2f.exit12
+  %371 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %333) #6, !dbg !35
+  br label %__nv_exp2f.exit15, !dbg !35
+
+372:                                              ; preds = %__nv_exp2f.exit12
+  %373 = tail call float @llvm.nvvm.ex2.approx.f(float %333) #6, !dbg !35
+  br label %__nv_exp2f.exit15, !dbg !35
+
+__nv_exp2f.exit15:                                ; preds = %370, %372
+  %.0.i14 = phi float [ %371, %370 ], [ %373, %372 ], !dbg !35
+  %374 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i16 = icmp eq i32 %374, 0, !dbg !35
+  br i1 %.not.i16, label %377, label %375, !dbg !35
+
+375:                                              ; preds = %__nv_exp2f.exit15
+  %376 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %334) #6, !dbg !35
+  br label %__nv_exp2f.exit18, !dbg !35
+
+377:                                              ; preds = %__nv_exp2f.exit15
+  %378 = tail call float @llvm.nvvm.ex2.approx.f(float %334) #6, !dbg !35
+  br label %__nv_exp2f.exit18, !dbg !35
+
+__nv_exp2f.exit18:                                ; preds = %375, %377
+  %.0.i17 = phi float [ %376, %375 ], [ %378, %377 ], !dbg !35
+  %379 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i19 = icmp eq i32 %379, 0, !dbg !35
+  br i1 %.not.i19, label %382, label %380, !dbg !35
+
+380:                                              ; preds = %__nv_exp2f.exit18
+  %381 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %335) #6, !dbg !35
+  br label %__nv_exp2f.exit21, !dbg !35
+
+382:                                              ; preds = %__nv_exp2f.exit18
+  %383 = tail call float @llvm.nvvm.ex2.approx.f(float %335) #6, !dbg !35
+  br label %__nv_exp2f.exit21, !dbg !35
+
+__nv_exp2f.exit21:                                ; preds = %380, %382
+  %.0.i20 = phi float [ %381, %380 ], [ %383, %382 ], !dbg !35
+  %384 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i22 = icmp eq i32 %384, 0, !dbg !35
+  br i1 %.not.i22, label %387, label %385, !dbg !35
+
+385:                                              ; preds = %__nv_exp2f.exit21
+  %386 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %336) #6, !dbg !35
+  br label %__nv_exp2f.exit24, !dbg !35
+
+387:                                              ; preds = %__nv_exp2f.exit21
+  %388 = tail call float @llvm.nvvm.ex2.approx.f(float %336) #6, !dbg !35
+  br label %__nv_exp2f.exit24, !dbg !35
+
+__nv_exp2f.exit24:                                ; preds = %385, %387
+  %.0.i23 = phi float [ %386, %385 ], [ %388, %387 ], !dbg !35
+  %389 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i25 = icmp eq i32 %389, 0, !dbg !35
+  br i1 %.not.i25, label %392, label %390, !dbg !35
+
+390:                                              ; preds = %__nv_exp2f.exit24
+  %391 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %337) #6, !dbg !35
+  br label %__nv_exp2f.exit27, !dbg !35
+
+392:                                              ; preds = %__nv_exp2f.exit24
+  %393 = tail call float @llvm.nvvm.ex2.approx.f(float %337) #6, !dbg !35
+  br label %__nv_exp2f.exit27, !dbg !35
+
+__nv_exp2f.exit27:                                ; preds = %390, %392
+  %.0.i26 = phi float [ %391, %390 ], [ %393, %392 ], !dbg !35
+  %394 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i28 = icmp eq i32 %394, 0, !dbg !35
+  br i1 %.not.i28, label %397, label %395, !dbg !35
+
+395:                                              ; preds = %__nv_exp2f.exit27
+  %396 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %338) #6, !dbg !35
+  br label %__nv_exp2f.exit30, !dbg !35
+
+397:                                              ; preds = %__nv_exp2f.exit27
+  %398 = tail call float @llvm.nvvm.ex2.approx.f(float %338) #6, !dbg !35
+  br label %__nv_exp2f.exit30, !dbg !35
+
+__nv_exp2f.exit30:                                ; preds = %395, %397
+  %.0.i29 = phi float [ %396, %395 ], [ %398, %397 ], !dbg !35
+  %399 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i31 = icmp eq i32 %399, 0, !dbg !35
+  br i1 %.not.i31, label %402, label %400, !dbg !35
+
+400:                                              ; preds = %__nv_exp2f.exit30
+  %401 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %339) #6, !dbg !35
+  br label %__nv_exp2f.exit33, !dbg !35
+
+402:                                              ; preds = %__nv_exp2f.exit30
+  %403 = tail call float @llvm.nvvm.ex2.approx.f(float %339) #6, !dbg !35
+  br label %__nv_exp2f.exit33, !dbg !35
+
+__nv_exp2f.exit33:                                ; preds = %400, %402
+  %.0.i32 = phi float [ %401, %400 ], [ %403, %402 ], !dbg !35
+  %404 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i34 = icmp eq i32 %404, 0, !dbg !35
+  br i1 %.not.i34, label %407, label %405, !dbg !35
+
+405:                                              ; preds = %__nv_exp2f.exit33
+  %406 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %340) #6, !dbg !35
+  br label %__nv_exp2f.exit36, !dbg !35
+
+407:                                              ; preds = %__nv_exp2f.exit33
+  %408 = tail call float @llvm.nvvm.ex2.approx.f(float %340) #6, !dbg !35
+  br label %__nv_exp2f.exit36, !dbg !35
+
+__nv_exp2f.exit36:                                ; preds = %405, %407
+  %.0.i35 = phi float [ %406, %405 ], [ %408, %407 ], !dbg !35
+  %409 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i37 = icmp eq i32 %409, 0, !dbg !35
+  br i1 %.not.i37, label %412, label %410, !dbg !35
+
+410:                                              ; preds = %__nv_exp2f.exit36
+  %411 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %341) #6, !dbg !35
+  br label %__nv_exp2f.exit39, !dbg !35
+
+412:                                              ; preds = %__nv_exp2f.exit36
+  %413 = tail call float @llvm.nvvm.ex2.approx.f(float %341) #6, !dbg !35
+  br label %__nv_exp2f.exit39, !dbg !35
+
+__nv_exp2f.exit39:                                ; preds = %410, %412
+  %.0.i38 = phi float [ %411, %410 ], [ %413, %412 ], !dbg !35
+  %414 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i40 = icmp eq i32 %414, 0, !dbg !35
+  br i1 %.not.i40, label %417, label %415, !dbg !35
+
+415:                                              ; preds = %__nv_exp2f.exit39
+  %416 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %342) #6, !dbg !35
+  br label %__nv_exp2f.exit42, !dbg !35
+
+417:                                              ; preds = %__nv_exp2f.exit39
+  %418 = tail call float @llvm.nvvm.ex2.approx.f(float %342) #6, !dbg !35
+  br label %__nv_exp2f.exit42, !dbg !35
+
+__nv_exp2f.exit42:                                ; preds = %415, %417
+  %.0.i41 = phi float [ %416, %415 ], [ %418, %417 ], !dbg !35
+  %419 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !35
+  %.not.i43 = icmp eq i32 %419, 0, !dbg !35
+  br i1 %.not.i43, label %422, label %420, !dbg !35
+
+420:                                              ; preds = %__nv_exp2f.exit42
+  %421 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %343) #6, !dbg !35
+  br label %__nv_exp2f.exit45, !dbg !35
+
+422:                                              ; preds = %__nv_exp2f.exit42
+  %423 = tail call float @llvm.nvvm.ex2.approx.f(float %343) #6, !dbg !35
+  br label %__nv_exp2f.exit45, !dbg !35
+
+__nv_exp2f.exit45:                                ; preds = %420, %422
+  %.0.i44 = phi float [ %421, %420 ], [ %423, %422 ], !dbg !35
+  %424 = fmul float %.0.i, %86, !dbg !36
+  %425 = fmul float %.0.i2, %87, !dbg !36
+  %426 = fmul float %.0.i5, %88, !dbg !36
+  %427 = fmul float %.0.i8, %89, !dbg !36
+  %428 = fmul float %.0.i11, %95, !dbg !36
+  %429 = fmul float %.0.i14, %96, !dbg !36
+  %430 = fmul float %.0.i17, %97, !dbg !36
+  %431 = fmul float %.0.i20, %98, !dbg !36
+  %432 = fmul float %.0.i23, %104, !dbg !36
+  %433 = fmul float %.0.i26, %105, !dbg !36
+  %434 = fmul float %.0.i29, %106, !dbg !36
+  %435 = fmul float %.0.i32, %107, !dbg !36
+  %436 = fmul float %.0.i35, %113, !dbg !36
+  %437 = fmul float %.0.i38, %114, !dbg !36
+  %438 = fmul float %.0.i41, %115, !dbg !36
+  %439 = fmul float %.0.i44, %116, !dbg !36
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !37
+  %440 = fadd float %424, %428, !dbg !41
+  %441 = fadd float %425, %429, !dbg !41
+  %442 = fadd float %426, %430, !dbg !41
+  %443 = fadd float %427, %431, !dbg !41
+  %444 = fadd float %440, %432, !dbg !41
+  %445 = fadd float %441, %433, !dbg !41
+  %446 = fadd float %442, %434, !dbg !41
+  %447 = fadd float %443, %435, !dbg !41
+  %448 = fadd float %444, %436, !dbg !41
+  %449 = fadd float %445, %437, !dbg !41
+  %450 = fadd float %446, %438, !dbg !41
+  %451 = fadd float %447, %439, !dbg !41
+  %452 = bitcast float %448 to i32, !dbg !37
+  %453 = select i1 %18, i32 %452, i32 0, !dbg !41
+  %454 = insertelement <1 x i32> poison, i32 %453, i64 0, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %182, <1 x i32> %454, i1 true) #6, !dbg !37
+  %455 = bitcast float %449 to i32, !dbg !37
+  %456 = select i1 %18, i32 %455, i32 0, !dbg !41
+  %457 = insertelement <1 x i32> poison, i32 %456, i64 0, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %185, <1 x i32> %457, i1 true) #6, !dbg !37
+  %458 = bitcast float %450 to i32, !dbg !37
+  %459 = select i1 %18, i32 %458, i32 0, !dbg !41
+  %460 = insertelement <1 x i32> poison, i32 %459, i64 0, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %188, <1 x i32> %460, i1 true) #6, !dbg !37
+  %461 = bitcast float %451 to i32, !dbg !37
+  %462 = select i1 %18, i32 %461, i32 0, !dbg !41
+  %463 = insertelement <1 x i32> poison, i32 %462, i64 0, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %191, <1 x i32> %463, i1 true) #6, !dbg !37
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !37
+  %464 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %193, i1 true) #6, !dbg !37
+  %465 = bitcast i32 %464 to float, !dbg !37
+  %466 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %464, i32 4, i32 31), !dbg !37
+  %467 = bitcast i32 %466 to float, !dbg !37
+  %468 = fadd float %465, %467, !dbg !41
+  %469 = bitcast float %468 to i32, !dbg !37
+  %470 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %469, i32 2, i32 31), !dbg !37
+  %471 = bitcast i32 %470 to float, !dbg !37
+  %472 = fadd float %468, %471, !dbg !41
+  %473 = bitcast float %472 to i32, !dbg !37
+  %474 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %473, i32 1, i32 31), !dbg !37
+  %475 = bitcast i32 %474 to float, !dbg !37
+  %476 = fadd float %472, %475, !dbg !41
+  %477 = bitcast float %476 to <1 x i32>, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %193, <1 x i32> %477, i1 %216) #6, !dbg !37
+  %478 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %219, i1 true) #6, !dbg !37
+  %479 = bitcast i32 %478 to float, !dbg !37
+  %480 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %478, i32 4, i32 31), !dbg !37
+  %481 = bitcast i32 %480 to float, !dbg !37
+  %482 = fadd float %479, %481, !dbg !41
+  %483 = bitcast float %482 to i32, !dbg !37
+  %484 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %483, i32 2, i32 31), !dbg !37
+  %485 = bitcast i32 %484 to float, !dbg !37
+  %486 = fadd float %482, %485, !dbg !41
+  %487 = bitcast float %486 to i32, !dbg !37
+  %488 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %487, i32 1, i32 31), !dbg !37
+  %489 = bitcast i32 %488 to float, !dbg !37
+  %490 = fadd float %486, %489, !dbg !41
+  %491 = bitcast float %490 to <1 x i32>, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %219, <1 x i32> %491, i1 %216) #6, !dbg !37
+  %492 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %243, i1 true) #6, !dbg !37
+  %493 = bitcast i32 %492 to float, !dbg !37
+  %494 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %492, i32 4, i32 31), !dbg !37
+  %495 = bitcast i32 %494 to float, !dbg !37
+  %496 = fadd float %493, %495, !dbg !41
+  %497 = bitcast float %496 to i32, !dbg !37
+  %498 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %497, i32 2, i32 31), !dbg !37
+  %499 = bitcast i32 %498 to float, !dbg !37
+  %500 = fadd float %496, %499, !dbg !41
+  %501 = bitcast float %500 to i32, !dbg !37
+  %502 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %501, i32 1, i32 31), !dbg !37
+  %503 = bitcast i32 %502 to float, !dbg !37
+  %504 = fadd float %500, %503, !dbg !41
+  %505 = bitcast float %504 to <1 x i32>, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %243, <1 x i32> %505, i1 %216) #6, !dbg !37
+  %506 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %267, i1 true) #6, !dbg !37
+  %507 = bitcast i32 %506 to float, !dbg !37
+  %508 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %506, i32 4, i32 31), !dbg !37
+  %509 = bitcast i32 %508 to float, !dbg !37
+  %510 = fadd float %507, %509, !dbg !41
+  %511 = bitcast float %510 to i32, !dbg !37
+  %512 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %511, i32 2, i32 31), !dbg !37
+  %513 = bitcast i32 %512 to float, !dbg !37
+  %514 = fadd float %510, %513, !dbg !41
+  %515 = bitcast float %514 to i32, !dbg !37
+  %516 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %515, i32 1, i32 31), !dbg !37
+  %517 = bitcast i32 %516 to float, !dbg !37
+  %518 = fadd float %514, %517, !dbg !41
+  %519 = bitcast float %518 to <1 x i32>, !dbg !37
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %267, <1 x i32> %519, i1 %216) #6, !dbg !37
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !37
+  %520 = load float, ptr addrspace(3) %181, align 16, !dbg !37
+  %521 = load float, ptr addrspace(3) %184, align 16, !dbg !37
+  %522 = load float, ptr addrspace(3) %187, align 16, !dbg !37
+  %523 = load float, ptr addrspace(3) %190, align 16, !dbg !37
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !42
+  %524 = insertelement <4 x float> poison, float %520, i64 0, !dbg !42
+  %525 = insertelement <4 x float> %524, float %521, i64 1, !dbg !42
+  %526 = insertelement <4 x float> %525, float %522, i64 2, !dbg !42
+  %527 = insertelement <4 x float> %526, float %523, i64 3, !dbg !42
+  store <4 x float> %527, ptr addrspace(3) %296, align 16, !dbg !42
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !42
+  %528 = tail call i32 asm sideeffect "ldmatrix.sync.aligned.m8n8.x1.shared.b16 {$0}, [$1];", "=r,r"(i32 %306) #6, !dbg !42
+  %529 = select i1 %308, float 1.000000e+00, float %520, !dbg !43
+  %530 = select i1 %309, float 1.000000e+00, float %521, !dbg !43
+  %531 = select i1 %310, float 1.000000e+00, float %522, !dbg !43
+  %532 = select i1 %311, float 1.000000e+00, float %523, !dbg !43
+  %533 = fcmp olt float %529, 0x3810000000000000, !dbg !44
+  %534 = fmul float %529, 0x4160000000000000, !dbg !44
+  %.02.i = select i1 %533, float %534, float %529, !dbg !44
+  %i.i.0.i = select i1 %533, float -2.300000e+01, float 0.000000e+00, !dbg !44
+  %535 = bitcast float %.02.i to i32, !dbg !44
+  %536 = add i32 %535, -1060439283, !dbg !44
+  %537 = and i32 %536, -8388608, !dbg !44
+  %538 = sub i32 %535, %537, !dbg !44
+  %539 = bitcast i32 %538 to float, !dbg !44
+  %540 = sitofp i32 %537 to float, !dbg !44
+  %541 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not.i46 = icmp eq i32 %541, 0, !dbg !44
+  %542 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %540, float 0x3E80000000000000, float %i.i.0.i) #6, !dbg !44
+  %543 = tail call float @llvm.nvvm.fma.rn.f(float %540, float 0x3E80000000000000, float %i.i.0.i) #6, !dbg !44
+  %.08.i = select i1 %.not.i46, float %543, float %542, !dbg !44
+  %544 = fadd float %539, -1.000000e+00, !dbg !44
+  %545 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not1.i = icmp eq i32 %545, 0, !dbg !44
+  %546 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %544, float 0xBFC58FE600000000) #6, !dbg !44
+  %547 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %544, float 0xBFC58FE600000000) #6, !dbg !44
+  %.010.i = select i1 %.not1.i, float %547, float %546, !dbg !44
+  %548 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not2.i = icmp eq i32 %548, 0, !dbg !44
+  %549 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i, float %544, float 0x3FC5F9E540000000) #6, !dbg !44
+  %550 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i, float %544, float 0x3FC5F9E540000000) #6, !dbg !44
+  %.011.i = select i1 %.not2.i, float %550, float %549, !dbg !44
+  %551 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not3.i = icmp eq i32 %551, 0, !dbg !44
+  %552 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i, float %544, float 0xBFC6E9C860000000) #6, !dbg !44
+  %553 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i, float %544, float 0xBFC6E9C860000000) #6, !dbg !44
+  %.012.i = select i1 %.not3.i, float %553, float %552, !dbg !44
+  %554 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not4.i = icmp eq i32 %554, 0, !dbg !44
+  %555 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i, float %544, float 0x3FCA417E80000000) #6, !dbg !44
+  %556 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i, float %544, float 0x3FCA417E80000000) #6, !dbg !44
+  %.09.i = select i1 %.not4.i, float %556, float %555, !dbg !44
+  %557 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not5.i = icmp eq i32 %557, 0, !dbg !44
+  %558 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i, float %544, float 0xBFCEC79160000000) #6, !dbg !44
+  %559 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i, float %544, float 0xBFCEC79160000000) #6, !dbg !44
+  %.05.i = select i1 %.not5.i, float %559, float %558, !dbg !44
+  %560 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not6.i = icmp eq i32 %560, 0, !dbg !44
+  %561 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i, float %544, float 0x3FD277F320000000) #6, !dbg !44
+  %562 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i, float %544, float 0x3FD277F320000000) #6, !dbg !44
+  %.01.i = select i1 %.not6.i, float %562, float %561, !dbg !44
+  %563 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not7.i = icmp eq i32 %563, 0, !dbg !44
+  %564 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i, float %544, float 0xBFD7154920000000) #6, !dbg !44
+  %565 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i, float %544, float 0xBFD7154920000000) #6, !dbg !44
+  %.0.i47 = select i1 %.not7.i, float %565, float %564, !dbg !44
+  %566 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not8.i = icmp eq i32 %566, 0, !dbg !44
+  %567 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i47, float %544, float 0x3FDEC70940000000) #6, !dbg !44
+  %568 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i47, float %544, float 0x3FDEC70940000000) #6, !dbg !44
+  %.07.i = select i1 %.not8.i, float %568, float %567, !dbg !44
+  %569 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not9.i = icmp eq i32 %569, 0, !dbg !44
+  %570 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i, float %544, float 0xBFE7154760000000) #6, !dbg !44
+  %571 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i, float %544, float 0xBFE7154760000000) #6, !dbg !44
+  %.06.i = select i1 %.not9.i, float %571, float %570, !dbg !44
+  %572 = fmul float %544, %.06.i, !dbg !44
+  %573 = fmul float %544, %572, !dbg !44
+  %574 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not10.i = icmp eq i32 %574, 0, !dbg !44
+  %575 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %544, float 0x3FF7154760000000, float %573) #6, !dbg !44
+  %576 = tail call float @llvm.nvvm.fma.rn.f(float %544, float 0x3FF7154760000000, float %573) #6, !dbg !44
+  %.04.i = select i1 %.not10.i, float %576, float %575, !dbg !44
+  %577 = fadd float %.08.i, %.04.i, !dbg !44
+  %578 = icmp ugt i32 %535, 2139095039, !dbg !44
+  br i1 %578, label %__nv_fmaf_rn.exit.i.i, label %__nv_log2f.exit, !dbg !44
+
+__nv_fmaf_rn.exit.i.i:                            ; preds = %__nv_exp2f.exit45
+  %579 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not11.i = icmp eq i32 %579, 0, !dbg !44
+  %580 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %581 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %.03.i = select i1 %.not11.i, float %581, float %580, !dbg !44
+  br label %__nv_log2f.exit, !dbg !44
+
+__nv_log2f.exit:                                  ; preds = %__nv_exp2f.exit45, %__nv_fmaf_rn.exit.i.i
+  %r.i.0.i = phi float [ %.03.i, %__nv_fmaf_rn.exit.i.i ], [ %577, %__nv_exp2f.exit45 ], !dbg !44
+  %582 = fcmp olt float %530, 0x3810000000000000, !dbg !44
+  %583 = fmul float %530, 0x4160000000000000, !dbg !44
+  %.02.i48 = select i1 %582, float %583, float %530, !dbg !44
+  %i.i.0.i49 = select i1 %582, float -2.300000e+01, float 0.000000e+00, !dbg !44
+  %584 = bitcast float %.02.i48 to i32, !dbg !44
+  %585 = add i32 %584, -1060439283, !dbg !44
+  %586 = and i32 %585, -8388608, !dbg !44
+  %587 = sub i32 %584, %586, !dbg !44
+  %588 = bitcast i32 %587 to float, !dbg !44
+  %589 = sitofp i32 %586 to float, !dbg !44
+  %590 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not.i50 = icmp eq i32 %590, 0, !dbg !44
+  %591 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %589, float 0x3E80000000000000, float %i.i.0.i49) #6, !dbg !44
+  %592 = tail call float @llvm.nvvm.fma.rn.f(float %589, float 0x3E80000000000000, float %i.i.0.i49) #6, !dbg !44
+  %.08.i51 = select i1 %.not.i50, float %592, float %591, !dbg !44
+  %593 = fadd float %588, -1.000000e+00, !dbg !44
+  %594 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not1.i52 = icmp eq i32 %594, 0, !dbg !44
+  %595 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %593, float 0xBFC58FE600000000) #6, !dbg !44
+  %596 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %593, float 0xBFC58FE600000000) #6, !dbg !44
+  %.010.i53 = select i1 %.not1.i52, float %596, float %595, !dbg !44
+  %597 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not2.i54 = icmp eq i32 %597, 0, !dbg !44
+  %598 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i53, float %593, float 0x3FC5F9E540000000) #6, !dbg !44
+  %599 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i53, float %593, float 0x3FC5F9E540000000) #6, !dbg !44
+  %.011.i55 = select i1 %.not2.i54, float %599, float %598, !dbg !44
+  %600 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not3.i56 = icmp eq i32 %600, 0, !dbg !44
+  %601 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i55, float %593, float 0xBFC6E9C860000000) #6, !dbg !44
+  %602 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i55, float %593, float 0xBFC6E9C860000000) #6, !dbg !44
+  %.012.i57 = select i1 %.not3.i56, float %602, float %601, !dbg !44
+  %603 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not4.i58 = icmp eq i32 %603, 0, !dbg !44
+  %604 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i57, float %593, float 0x3FCA417E80000000) #6, !dbg !44
+  %605 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i57, float %593, float 0x3FCA417E80000000) #6, !dbg !44
+  %.09.i59 = select i1 %.not4.i58, float %605, float %604, !dbg !44
+  %606 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not5.i60 = icmp eq i32 %606, 0, !dbg !44
+  %607 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i59, float %593, float 0xBFCEC79160000000) #6, !dbg !44
+  %608 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i59, float %593, float 0xBFCEC79160000000) #6, !dbg !44
+  %.05.i61 = select i1 %.not5.i60, float %608, float %607, !dbg !44
+  %609 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not6.i62 = icmp eq i32 %609, 0, !dbg !44
+  %610 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i61, float %593, float 0x3FD277F320000000) #6, !dbg !44
+  %611 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i61, float %593, float 0x3FD277F320000000) #6, !dbg !44
+  %.01.i63 = select i1 %.not6.i62, float %611, float %610, !dbg !44
+  %612 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not7.i64 = icmp eq i32 %612, 0, !dbg !44
+  %613 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i63, float %593, float 0xBFD7154920000000) #6, !dbg !44
+  %614 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i63, float %593, float 0xBFD7154920000000) #6, !dbg !44
+  %.0.i65 = select i1 %.not7.i64, float %614, float %613, !dbg !44
+  %615 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not8.i66 = icmp eq i32 %615, 0, !dbg !44
+  %616 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i65, float %593, float 0x3FDEC70940000000) #6, !dbg !44
+  %617 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i65, float %593, float 0x3FDEC70940000000) #6, !dbg !44
+  %.07.i67 = select i1 %.not8.i66, float %617, float %616, !dbg !44
+  %618 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not9.i68 = icmp eq i32 %618, 0, !dbg !44
+  %619 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i67, float %593, float 0xBFE7154760000000) #6, !dbg !44
+  %620 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i67, float %593, float 0xBFE7154760000000) #6, !dbg !44
+  %.06.i69 = select i1 %.not9.i68, float %620, float %619, !dbg !44
+  %621 = fmul float %593, %.06.i69, !dbg !44
+  %622 = fmul float %593, %621, !dbg !44
+  %623 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not10.i70 = icmp eq i32 %623, 0, !dbg !44
+  %624 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %593, float 0x3FF7154760000000, float %622) #6, !dbg !44
+  %625 = tail call float @llvm.nvvm.fma.rn.f(float %593, float 0x3FF7154760000000, float %622) #6, !dbg !44
+  %.04.i71 = select i1 %.not10.i70, float %625, float %624, !dbg !44
+  %626 = fadd float %.08.i51, %.04.i71, !dbg !44
+  %627 = icmp ugt i32 %584, 2139095039, !dbg !44
+  br i1 %627, label %__nv_fmaf_rn.exit.i.i74, label %__nv_log2f.exit77, !dbg !44
+
+__nv_fmaf_rn.exit.i.i74:                          ; preds = %__nv_log2f.exit
+  %628 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not11.i75 = icmp eq i32 %628, 0, !dbg !44
+  %629 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i48, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %630 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i48, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %.03.i76 = select i1 %.not11.i75, float %630, float %629, !dbg !44
+  br label %__nv_log2f.exit77, !dbg !44
+
+__nv_log2f.exit77:                                ; preds = %__nv_log2f.exit, %__nv_fmaf_rn.exit.i.i74
+  %r.i.0.i72 = phi float [ %.03.i76, %__nv_fmaf_rn.exit.i.i74 ], [ %626, %__nv_log2f.exit ], !dbg !44
+  %631 = fcmp olt float %531, 0x3810000000000000, !dbg !44
+  %632 = fmul float %531, 0x4160000000000000, !dbg !44
+  %.02.i78 = select i1 %631, float %632, float %531, !dbg !44
+  %i.i.0.i79 = select i1 %631, float -2.300000e+01, float 0.000000e+00, !dbg !44
+  %633 = bitcast float %.02.i78 to i32, !dbg !44
+  %634 = add i32 %633, -1060439283, !dbg !44
+  %635 = and i32 %634, -8388608, !dbg !44
+  %636 = sub i32 %633, %635, !dbg !44
+  %637 = bitcast i32 %636 to float, !dbg !44
+  %638 = sitofp i32 %635 to float, !dbg !44
+  %639 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not.i80 = icmp eq i32 %639, 0, !dbg !44
+  %640 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %638, float 0x3E80000000000000, float %i.i.0.i79) #6, !dbg !44
+  %641 = tail call float @llvm.nvvm.fma.rn.f(float %638, float 0x3E80000000000000, float %i.i.0.i79) #6, !dbg !44
+  %.08.i81 = select i1 %.not.i80, float %641, float %640, !dbg !44
+  %642 = fadd float %637, -1.000000e+00, !dbg !44
+  %643 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not1.i82 = icmp eq i32 %643, 0, !dbg !44
+  %644 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %642, float 0xBFC58FE600000000) #6, !dbg !44
+  %645 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %642, float 0xBFC58FE600000000) #6, !dbg !44
+  %.010.i83 = select i1 %.not1.i82, float %645, float %644, !dbg !44
+  %646 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not2.i84 = icmp eq i32 %646, 0, !dbg !44
+  %647 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i83, float %642, float 0x3FC5F9E540000000) #6, !dbg !44
+  %648 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i83, float %642, float 0x3FC5F9E540000000) #6, !dbg !44
+  %.011.i85 = select i1 %.not2.i84, float %648, float %647, !dbg !44
+  %649 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not3.i86 = icmp eq i32 %649, 0, !dbg !44
+  %650 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i85, float %642, float 0xBFC6E9C860000000) #6, !dbg !44
+  %651 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i85, float %642, float 0xBFC6E9C860000000) #6, !dbg !44
+  %.012.i87 = select i1 %.not3.i86, float %651, float %650, !dbg !44
+  %652 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not4.i88 = icmp eq i32 %652, 0, !dbg !44
+  %653 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i87, float %642, float 0x3FCA417E80000000) #6, !dbg !44
+  %654 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i87, float %642, float 0x3FCA417E80000000) #6, !dbg !44
+  %.09.i89 = select i1 %.not4.i88, float %654, float %653, !dbg !44
+  %655 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not5.i90 = icmp eq i32 %655, 0, !dbg !44
+  %656 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i89, float %642, float 0xBFCEC79160000000) #6, !dbg !44
+  %657 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i89, float %642, float 0xBFCEC79160000000) #6, !dbg !44
+  %.05.i91 = select i1 %.not5.i90, float %657, float %656, !dbg !44
+  %658 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not6.i92 = icmp eq i32 %658, 0, !dbg !44
+  %659 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i91, float %642, float 0x3FD277F320000000) #6, !dbg !44
+  %660 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i91, float %642, float 0x3FD277F320000000) #6, !dbg !44
+  %.01.i93 = select i1 %.not6.i92, float %660, float %659, !dbg !44
+  %661 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not7.i94 = icmp eq i32 %661, 0, !dbg !44
+  %662 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i93, float %642, float 0xBFD7154920000000) #6, !dbg !44
+  %663 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i93, float %642, float 0xBFD7154920000000) #6, !dbg !44
+  %.0.i95 = select i1 %.not7.i94, float %663, float %662, !dbg !44
+  %664 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not8.i96 = icmp eq i32 %664, 0, !dbg !44
+  %665 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i95, float %642, float 0x3FDEC70940000000) #6, !dbg !44
+  %666 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i95, float %642, float 0x3FDEC70940000000) #6, !dbg !44
+  %.07.i97 = select i1 %.not8.i96, float %666, float %665, !dbg !44
+  %667 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not9.i98 = icmp eq i32 %667, 0, !dbg !44
+  %668 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i97, float %642, float 0xBFE7154760000000) #6, !dbg !44
+  %669 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i97, float %642, float 0xBFE7154760000000) #6, !dbg !44
+  %.06.i99 = select i1 %.not9.i98, float %669, float %668, !dbg !44
+  %670 = fmul float %642, %.06.i99, !dbg !44
+  %671 = fmul float %642, %670, !dbg !44
+  %672 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not10.i100 = icmp eq i32 %672, 0, !dbg !44
+  %673 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %642, float 0x3FF7154760000000, float %671) #6, !dbg !44
+  %674 = tail call float @llvm.nvvm.fma.rn.f(float %642, float 0x3FF7154760000000, float %671) #6, !dbg !44
+  %.04.i101 = select i1 %.not10.i100, float %674, float %673, !dbg !44
+  %675 = fadd float %.08.i81, %.04.i101, !dbg !44
+  %676 = icmp ugt i32 %633, 2139095039, !dbg !44
+  br i1 %676, label %__nv_fmaf_rn.exit.i.i104, label %__nv_log2f.exit107, !dbg !44
+
+__nv_fmaf_rn.exit.i.i104:                         ; preds = %__nv_log2f.exit77
+  %677 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not11.i105 = icmp eq i32 %677, 0, !dbg !44
+  %678 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i78, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %679 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i78, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %.03.i106 = select i1 %.not11.i105, float %679, float %678, !dbg !44
+  br label %__nv_log2f.exit107, !dbg !44
+
+__nv_log2f.exit107:                               ; preds = %__nv_log2f.exit77, %__nv_fmaf_rn.exit.i.i104
+  %r.i.0.i102 = phi float [ %.03.i106, %__nv_fmaf_rn.exit.i.i104 ], [ %675, %__nv_log2f.exit77 ], !dbg !44
+  %680 = fcmp olt float %532, 0x3810000000000000, !dbg !44
+  %681 = fmul float %532, 0x4160000000000000, !dbg !44
+  %.02.i108 = select i1 %680, float %681, float %532, !dbg !44
+  %i.i.0.i109 = select i1 %680, float -2.300000e+01, float 0.000000e+00, !dbg !44
+  %682 = bitcast float %.02.i108 to i32, !dbg !44
+  %683 = add i32 %682, -1060439283, !dbg !44
+  %684 = and i32 %683, -8388608, !dbg !44
+  %685 = sub i32 %682, %684, !dbg !44
+  %686 = bitcast i32 %685 to float, !dbg !44
+  %687 = sitofp i32 %684 to float, !dbg !44
+  %688 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not.i110 = icmp eq i32 %688, 0, !dbg !44
+  %689 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %687, float 0x3E80000000000000, float %i.i.0.i109) #6, !dbg !44
+  %690 = tail call float @llvm.nvvm.fma.rn.f(float %687, float 0x3E80000000000000, float %i.i.0.i109) #6, !dbg !44
+  %.08.i111 = select i1 %.not.i110, float %690, float %689, !dbg !44
+  %691 = fadd float %686, -1.000000e+00, !dbg !44
+  %692 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not1.i112 = icmp eq i32 %692, 0, !dbg !44
+  %693 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %691, float 0xBFC58FE600000000) #6, !dbg !44
+  %694 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %691, float 0xBFC58FE600000000) #6, !dbg !44
+  %.010.i113 = select i1 %.not1.i112, float %694, float %693, !dbg !44
+  %695 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not2.i114 = icmp eq i32 %695, 0, !dbg !44
+  %696 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i113, float %691, float 0x3FC5F9E540000000) #6, !dbg !44
+  %697 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i113, float %691, float 0x3FC5F9E540000000) #6, !dbg !44
+  %.011.i115 = select i1 %.not2.i114, float %697, float %696, !dbg !44
+  %698 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not3.i116 = icmp eq i32 %698, 0, !dbg !44
+  %699 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i115, float %691, float 0xBFC6E9C860000000) #6, !dbg !44
+  %700 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i115, float %691, float 0xBFC6E9C860000000) #6, !dbg !44
+  %.012.i117 = select i1 %.not3.i116, float %700, float %699, !dbg !44
+  %701 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not4.i118 = icmp eq i32 %701, 0, !dbg !44
+  %702 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i117, float %691, float 0x3FCA417E80000000) #6, !dbg !44
+  %703 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i117, float %691, float 0x3FCA417E80000000) #6, !dbg !44
+  %.09.i119 = select i1 %.not4.i118, float %703, float %702, !dbg !44
+  %704 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not5.i120 = icmp eq i32 %704, 0, !dbg !44
+  %705 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i119, float %691, float 0xBFCEC79160000000) #6, !dbg !44
+  %706 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i119, float %691, float 0xBFCEC79160000000) #6, !dbg !44
+  %.05.i121 = select i1 %.not5.i120, float %706, float %705, !dbg !44
+  %707 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not6.i122 = icmp eq i32 %707, 0, !dbg !44
+  %708 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i121, float %691, float 0x3FD277F320000000) #6, !dbg !44
+  %709 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i121, float %691, float 0x3FD277F320000000) #6, !dbg !44
+  %.01.i123 = select i1 %.not6.i122, float %709, float %708, !dbg !44
+  %710 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not7.i124 = icmp eq i32 %710, 0, !dbg !44
+  %711 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i123, float %691, float 0xBFD7154920000000) #6, !dbg !44
+  %712 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i123, float %691, float 0xBFD7154920000000) #6, !dbg !44
+  %.0.i125 = select i1 %.not7.i124, float %712, float %711, !dbg !44
+  %713 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not8.i126 = icmp eq i32 %713, 0, !dbg !44
+  %714 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i125, float %691, float 0x3FDEC70940000000) #6, !dbg !44
+  %715 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i125, float %691, float 0x3FDEC70940000000) #6, !dbg !44
+  %.07.i127 = select i1 %.not8.i126, float %715, float %714, !dbg !44
+  %716 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not9.i128 = icmp eq i32 %716, 0, !dbg !44
+  %717 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i127, float %691, float 0xBFE7154760000000) #6, !dbg !44
+  %718 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i127, float %691, float 0xBFE7154760000000) #6, !dbg !44
+  %.06.i129 = select i1 %.not9.i128, float %718, float %717, !dbg !44
+  %719 = fmul float %691, %.06.i129, !dbg !44
+  %720 = fmul float %691, %719, !dbg !44
+  %721 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not10.i130 = icmp eq i32 %721, 0, !dbg !44
+  %722 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %691, float 0x3FF7154760000000, float %720) #6, !dbg !44
+  %723 = tail call float @llvm.nvvm.fma.rn.f(float %691, float 0x3FF7154760000000, float %720) #6, !dbg !44
+  %.04.i131 = select i1 %.not10.i130, float %723, float %722, !dbg !44
+  %724 = fadd float %.08.i111, %.04.i131, !dbg !44
+  %725 = icmp ugt i32 %682, 2139095039, !dbg !44
+  br i1 %725, label %__nv_fmaf_rn.exit.i.i134, label %__nv_log2f.exit137, !dbg !44
+
+__nv_fmaf_rn.exit.i.i134:                         ; preds = %__nv_log2f.exit107
+  %726 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !44
+  %.not11.i135 = icmp eq i32 %726, 0, !dbg !44
+  %727 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i108, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %728 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i108, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !44
+  %.03.i136 = select i1 %.not11.i135, float %728, float %727, !dbg !44
+  br label %__nv_log2f.exit137, !dbg !44
+
+__nv_log2f.exit137:                               ; preds = %__nv_log2f.exit107, %__nv_fmaf_rn.exit.i.i134
+  %r.i.0.i132 = phi float [ %.03.i136, %__nv_fmaf_rn.exit.i.i134 ], [ %724, %__nv_log2f.exit107 ], !dbg !44
+  %729 = insertelement <4 x float> poison, float %.02.i, i64 0, !dbg !44
+  %730 = insertelement <4 x float> %729, float %.02.i48, i64 1, !dbg !44
+  %731 = insertelement <4 x float> %730, float %.02.i78, i64 2, !dbg !44
+  %732 = insertelement <4 x float> %731, float %.02.i108, i64 3, !dbg !44
+  %733 = fcmp oeq <4 x float> %732, zeroinitializer, !dbg !44
+  %734 = and i32 %13, 127, !dbg !10
+  %735 = or disjoint i32 %12, %734, !dbg !11
+  %736 = sext i32 %735 to i64, !dbg !14
+  %.frozen = freeze i64 %5, !dbg !45
+  %737 = sdiv i64 %736, %.frozen, !dbg !45
+  %738 = icmp slt i32 %12, 0, !dbg !47
+  %739 = icmp slt i64 %5, 0, !dbg !48
+  %740 = xor i1 %738, %739, !dbg !49
+  %741 = mul i64 %737, %.frozen, !dbg !14
+  %.decomposed = sub i64 %736, %741, !dbg !14
+  %.not = icmp ne i64 %.decomposed, 0, !dbg !50
+  %narrow = select i1 %740, i1 %.not, i1 false, !dbg !51
+  %742 = sext i1 %narrow to i64, !dbg !51
+  %743 = add nsw i64 %737, %742, !dbg !51
+  %744 = icmp slt i32 %735, %6, !dbg !12
+  %745 = insertelement <4 x float> poison, float %r.i.0.i, i64 0, !dbg !44
+  %746 = insertelement <4 x float> %745, float %r.i.0.i72, i64 1, !dbg !44
+  %747 = insertelement <4 x float> %746, float %r.i.0.i102, i64 2, !dbg !44
+  %748 = insertelement <4 x float> %747, float %r.i.0.i132, i64 3, !dbg !44
+  %749 = select <4 x i1> %733, <4 x float> splat (float 0xFFF0000000000000), <4 x float> %748, !dbg !44
+  %750 = insertelement <4 x float> poison, float %291, i64 0, !dbg !52
+  %751 = insertelement <4 x float> %750, float %292, i64 1, !dbg !52
+  %752 = insertelement <4 x float> %751, float %293, i64 2, !dbg !52
+  %753 = insertelement <4 x float> %752, float %294, i64 3, !dbg !52
+  %754 = fadd <4 x float> %753, %749, !dbg !52
+  %755 = fmul <4 x float> %754, splat (float 0x3FE62E4300000000), !dbg !53
+  %756 = icmp slt i64 %5, 2, !dbg !54
+  %757 = icmp sgt i64 %5, 1, !dbg !55
+  %758 = select i1 %757, i64 %5, i64 0, !dbg !56
+  %759 = zext i1 %756 to i64, !dbg !57
+  %760 = add i64 %758, %759, !dbg !58
+  %761 = mul i64 %743, %760, !dbg !59
+  %762 = getelementptr float, ptr addrspace(1) %4, i64 %.decomposed, !dbg !60
+  %763 = getelementptr float, ptr addrspace(1) %762, i64 %761, !dbg !60
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !61
+  store <4 x float> %755, ptr addrspace(3) %296, align 16, !dbg !61
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !61
+  %764 = tail call i32 asm sideeffect "ldmatrix.sync.aligned.m8n8.x1.shared.b16 {$0}, [$1];", "=r,r"(i32 %306) #6, !dbg !61
+  %765 = and i32 %13, 128, !dbg !61
+  %766 = icmp eq i32 %765, 0, !dbg !61
+  %767 = and i1 %766, %744, !dbg !61
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %764, ptr addrspace(1) %763, i1 %767) #6, !dbg !61
+  %768 = getelementptr float, ptr addrspace(1) %2, i64 %736, !dbg !62
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %307, ptr addrspace(1) %768, i1 %767) #6, !dbg !63
+  %769 = getelementptr float, ptr addrspace(1) %3, i64 %736, !dbg !64
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %528, ptr addrspace(1) %769, i1 %767) #6, !dbg !65
+  ret void, !dbg !66
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #2
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #3
+
+declare i32 @__nvvm_reflect(ptr) local_unnamed_addr #4
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.ftz.f(float) #5
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.f(float) #5
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.ftz.f(float, float, float) #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.f(float, float, float) #1
+
+attributes #0 = { nounwind "nvvm.reqntid"="256" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #4 = { "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #5 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
+attributes #6 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+!llvm.ident = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py", directory: "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!5 = distinct !DISubprogram(name: "triton_per_fused_mul_1", linkageName: "triton_per_fused_mul_1", scope: !1, file: !1, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 23, column: 28, scope: !5)
+!9 = !DILocation(line: 23, column: 33, scope: !5)
+!10 = !DILocation(line: 24, column: 44, scope: !5)
+!11 = !DILocation(line: 24, column: 23, scope: !5)
+!12 = !DILocation(line: 25, column: 21, scope: !5)
+!13 = !DILocation(line: 26, column: 38, scope: !5)
+!14 = !DILocation(line: 33, column: 19, scope: !5)
+!15 = !DILocation(line: 35, column: 38, scope: !5)
+!16 = !DILocation(line: 35, column: 42, scope: !5)
+!17 = !DILocation(line: 35, column: 35, scope: !5)
+!18 = !DILocation(line: 35, column: 30, scope: !5)
+!19 = !DILocation(line: 35, column: 49, scope: !5)
+!20 = !DILocation(line: 36, column: 30, scope: !5)
+!21 = !DILocation(line: 36, column: 49, scope: !5)
+!22 = !DILocation(line: 38, column: 33, scope: !5)
+!23 = !DILocation(line: 110, column: 15, scope: !24, inlinedAt: !26)
+!24 = distinct !DILexicalBlockFile(scope: !5, file: !25, discriminator: 0)
+!25 = !DIFile(filename: "triton_helpers.py", directory: "/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime")
+!26 = !DILocation(line: 39, column: 37, scope: !5)
+!27 = !DILocation(line: 112, column: 21, scope: !24, inlinedAt: !26)
+!28 = !DILocation(line: 112, column: 16, scope: !24, inlinedAt: !26)
+!29 = !DILocation(line: 113, column: 29, scope: !24, inlinedAt: !26)
+!30 = !DILocation(line: 123, column: 29, scope: !24, inlinedAt: !26)
+!31 = !DILocation(line: 39, column: 40, scope: !5)
+!32 = !DILocation(line: 41, column: 19, scope: !5)
+!33 = !DILocation(line: 42, column: 18, scope: !5)
+!34 = !DILocation(line: 44, column: 33, scope: !5)
+!35 = !DILocation(line: 45, column: 27, scope: !5)
+!36 = !DILocation(line: 46, column: 19, scope: !5)
+!37 = !DILocation(line: 291, column: 36, scope: !38, inlinedAt: !40)
+!38 = distinct !DILexicalBlockFile(scope: !5, file: !39, discriminator: 0)
+!39 = !DIFile(filename: "standard.py", directory: "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language")
+!40 = !DILocation(line: 49, column: 26, scope: !5)
+!41 = !DILocation(line: 261, column: 15, scope: !38, inlinedAt: !40)
+!42 = !DILocation(line: 49, column: 29, scope: !5)
+!43 = !DILocation(line: 51, column: 34, scope: !5)
+!44 = !DILocation(line: 52, column: 27, scope: !5)
+!45 = !DILocation(line: 72, column: 16, scope: !24, inlinedAt: !46)
+!46 = !DILocation(line: 34, column: 51, scope: !5)
+!47 = !DILocation(line: 75, column: 25, scope: !24, inlinedAt: !46)
+!48 = !DILocation(line: 75, column: 36, scope: !24, inlinedAt: !46)
+!49 = !DILocation(line: 75, column: 32, scope: !24, inlinedAt: !46)
+!50 = !DILocation(line: 74, column: 34, scope: !24, inlinedAt: !46)
+!51 = !DILocation(line: 75, column: 47, scope: !24, inlinedAt: !46)
+!52 = !DILocation(line: 53, column: 20, scope: !5)
+!53 = !DILocation(line: 55, column: 20, scope: !5)
+!54 = !DILocation(line: 56, column: 49, scope: !5)
+!55 = !DILocation(line: 56, column: 75, scope: !5)
+!56 = !DILocation(line: 56, column: 66, scope: !5)
+!57 = !DILocation(line: 56, scope: !5)
+!58 = !DILocation(line: 56, column: 57, scope: !5)
+!59 = !DILocation(line: 56, column: 34, scope: !5)
+!60 = !DILocation(line: 56, column: 25, scope: !5)
+!61 = !DILocation(line: 56, column: 89, scope: !5)
+!62 = !DILocation(line: 57, column: 25, scope: !5)
+!63 = !DILocation(line: 57, column: 36, scope: !5)
+!64 = !DILocation(line: 58, column: 25, scope: !5)
+!65 = !DILocation(line: 58, column: 37, scope: !5)
+!66 = !DILocation(line: 58, column: 4, scope: !5)

progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.ptx

@@ -0,0 +1,1141 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_per_fused_mul_1  // -- Begin function triton_per_fused_mul_1
+.extern .shared .align 16 .b8 global_smem[];
+.global .align 1 .b8 _$_str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90};
+                                        // @triton_per_fused_mul_1
+.visible .entry triton_per_fused_mul_1(
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_0,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_1,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_2,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_3,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_4,
+	.param .u64 triton_per_fused_mul_1_param_5,
+	.param .u32 triton_per_fused_mul_1_param_6,
+	.param .u32 triton_per_fused_mul_1_param_7,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_8,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_9
+)
+.reqntid 256
+{
+	.reg .pred 	%p<110>;
+	.reg .b32 	%r<491>;
+	.reg .b64 	%rd<57>;
+	.loc	1 18 0                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:18:0
+
+// %bb.0:                               // %__nv_exp2f.exit
+	ld.param.b32 	%r26, [triton_per_fused_mul_1_param_6];
+	ld.param.b64 	%rd13, [triton_per_fused_mul_1_param_5];
+	ld.param.b64 	%rd22, [triton_per_fused_mul_1_param_0];
+	ld.param.b64 	%rd23, [triton_per_fused_mul_1_param_1];
+$L__tmp0:
+	.loc	1 23 28                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:23:28
+	mov.u32 	%r143, %ctaid.x;
+	.loc	1 23 33                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:23:33
+	shl.b32 	%r1, %r143, 7;
+	.loc	1 24 44                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:24:44
+	mov.u32 	%r2, %tid.x;
+	shr.u32 	%r144, %r2, 5;
+	and.b32 	%r145, %r2, 31;
+	shl.b32 	%r146, %r145, 2;
+	.loc	1 24 23                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:24:23
+	or.b32 	%r147, %r146, %r1;
+	.loc	1 25 21                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:25:21
+	setp.lt.s32 	%p1, %r147, %r26;
+	.loc	1 26 38                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:26:38
+	bfe.u32 	%r148, %r2, 5, 3;
+	or.b32 	%r149, %r148, 8;
+	or.b32 	%r150, %r148, 16;
+	or.b32 	%r151, %r144, 24;
+	.loc	1 33 19                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:33:19
+	cvt.s64.s32 	%rd24, %r147;
+	.loc	1 35 38                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:35:38
+	shl.b64 	%rd25, %rd13, 5;
+	.loc	1 35 42                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:35:42
+	cvt.u64.u32 	%rd26, %r148;
+	cvt.u64.u32 	%rd27, %r149;
+	cvt.u64.u32 	%rd28, %r150;
+	cvt.u64.u32 	%rd29, %r151;
+	.loc	1 35 35                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:35:35
+	mad.lo.s64 	%rd30, %rd25, %rd26, %rd24;
+	mad.lo.s64 	%rd31, %rd25, %rd27, %rd24;
+	mad.lo.s64 	%rd32, %rd25, %rd28, %rd24;
+	mad.lo.s64 	%rd33, %rd25, %rd29, %rd24;
+	.loc	1 35 30                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:35:30
+	shl.b64 	%rd34, %rd30, 2;
+	add.s64 	%rd14, %rd22, %rd34;
+	shl.b64 	%rd35, %rd31, 2;
+	add.s64 	%rd15, %rd22, %rd35;
+	shl.b64 	%rd36, %rd32, 2;
+	add.s64 	%rd16, %rd22, %rd36;
+	shl.b64 	%rd37, %rd33, 2;
+	add.s64 	%rd17, %rd22, %rd37;
+	mov.b32 	%r31, 0;
+	.loc	1 35 49                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:35:49
+	// begin inline asm
+	mov.u32 %r27, %r31;
+	mov.u32 %r28, %r31;
+	mov.u32 %r29, %r31;
+	mov.u32 %r30, %r31;
+	@%p1 ld.global.v4.b32 { %r27, %r28, %r29, %r30 }, [ %rd14 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r35, %r31;
+	mov.u32 %r36, %r31;
+	mov.u32 %r37, %r31;
+	mov.u32 %r38, %r31;
+	@%p1 ld.global.v4.b32 { %r35, %r36, %r37, %r38 }, [ %rd15 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r43, %r31;
+	mov.u32 %r44, %r31;
+	mov.u32 %r45, %r31;
+	mov.u32 %r46, %r31;
+	@%p1 ld.global.v4.b32 { %r43, %r44, %r45, %r46 }, [ %rd16 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r51, %r31;
+	mov.u32 %r52, %r31;
+	mov.u32 %r53, %r31;
+	mov.u32 %r54, %r31;
+	@%p1 ld.global.v4.b32 { %r51, %r52, %r53, %r54 }, [ %rd17 + 0 ];
+	// end inline asm
+	.loc	1 36 30                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:36:30
+	add.s64 	%rd18, %rd23, %rd34;
+	add.s64 	%rd19, %rd23, %rd35;
+	add.s64 	%rd20, %rd23, %rd36;
+	add.s64 	%rd21, %rd23, %rd37;
+	.loc	1 36 49                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:36:49
+	// begin inline asm
+	mov.u32 %r59, %r31;
+	mov.u32 %r60, %r31;
+	mov.u32 %r61, %r31;
+	mov.u32 %r62, %r31;
+	@%p1 ld.global.v4.b32 { %r59, %r60, %r61, %r62 }, [ %rd18 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r67, %r31;
+	mov.u32 %r68, %r31;
+	mov.u32 %r69, %r31;
+	mov.u32 %r70, %r31;
+	@%p1 ld.global.v4.b32 { %r67, %r68, %r69, %r70 }, [ %rd19 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r75, %r31;
+	mov.u32 %r76, %r31;
+	mov.u32 %r77, %r31;
+	mov.u32 %r78, %r31;
+	@%p1 ld.global.v4.b32 { %r75, %r76, %r77, %r78 }, [ %rd20 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r83, %r31;
+	mov.u32 %r84, %r31;
+	mov.u32 %r85, %r31;
+	mov.u32 %r86, %r31;
+	@%p1 ld.global.v4.b32 { %r83, %r84, %r85, %r86 }, [ %rd21 + 0 ];
+	// end inline asm
+	.loc	1 38 33                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:38:33
+	selp.f32 	%r152, %r27, 0fFF800000, %p1;
+	selp.f32 	%r153, %r28, 0fFF800000, %p1;
+	selp.f32 	%r154, %r29, 0fFF800000, %p1;
+	selp.f32 	%r155, %r30, 0fFF800000, %p1;
+	selp.f32 	%r156, %r35, 0fFF800000, %p1;
+	selp.f32 	%r157, %r36, 0fFF800000, %p1;
+	selp.f32 	%r158, %r37, 0fFF800000, %p1;
+	selp.f32 	%r159, %r38, 0fFF800000, %p1;
+	selp.f32 	%r160, %r43, 0fFF800000, %p1;
+	selp.f32 	%r161, %r44, 0fFF800000, %p1;
+	selp.f32 	%r162, %r45, 0fFF800000, %p1;
+	selp.f32 	%r163, %r46, 0fFF800000, %p1;
+	selp.f32 	%r164, %r51, 0fFF800000, %p1;
+	selp.f32 	%r165, %r52, 0fFF800000, %p1;
+	selp.f32 	%r166, %r53, 0fFF800000, %p1;
+	selp.f32 	%r167, %r54, 0fFF800000, %p1;
+$L__tmp1:
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p33, %r152, %r156;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p34, %r152, %r152;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r168, %r152, %r156, %p33;
+	selp.f32 	%r169, %r152, %r168, %p34;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p35, %r153, %r157;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p36, %r153, %r153;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r170, %r153, %r157, %p35;
+	selp.f32 	%r171, %r153, %r170, %p36;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p37, %r154, %r158;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p38, %r154, %r154;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r172, %r154, %r158, %p37;
+	selp.f32 	%r173, %r154, %r172, %p38;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p39, %r155, %r159;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p40, %r155, %r155;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r174, %r155, %r159, %p39;
+	selp.f32 	%r175, %r155, %r174, %p40;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p41, %r169, %r160;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p42, %r169, %r169;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r176, %r169, %r160, %p42;
+	selp.f32 	%r177, %r169, %r176, %p41;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p43, %r171, %r161;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p44, %r171, %r171;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r178, %r171, %r161, %p44;
+	selp.f32 	%r179, %r171, %r178, %p43;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p45, %r173, %r162;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p46, %r173, %r173;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r180, %r173, %r162, %p46;
+	selp.f32 	%r181, %r173, %r180, %p45;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p47, %r175, %r163;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p48, %r175, %r175;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r182, %r175, %r163, %p48;
+	selp.f32 	%r183, %r175, %r182, %p47;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p49, %r177, %r164;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p50, %r177, %r177;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r184, %r177, %r164, %p50;
+	selp.f32 	%r92, %r177, %r184, %p49;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p51, %r179, %r165;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p52, %r179, %r179;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r185, %r179, %r165, %p52;
+	selp.f32 	%r94, %r179, %r185, %p51;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p53, %r181, %r166;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p54, %r181, %r181;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r186, %r181, %r166, %p54;
+	selp.f32 	%r96, %r181, %r186, %p53;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p55, %r183, %r167;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p56, %r183, %r183;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r187, %r183, %r167, %p56;
+	selp.f32 	%r98, %r183, %r187, %p55;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shl.b32 	%r188, %r145, 7;
+	mov.b32 	%r189, global_smem;
+	add.s32 	%r190, %r189, %r188;
+	shl.b32 	%r191, %r148, 2;
+	add.s32 	%r91, %r190, %r191;
+	mov.pred 	%p9, -1;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r91 + 0 ], %r92;
+	// end inline asm
+	add.s32 	%r93, %r91, 32;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r93 + 0 ], %r94;
+	// end inline asm
+	add.s32 	%r95, %r91, 64;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r95 + 0 ], %r96;
+	// end inline asm
+	add.s32 	%r97, %r91, 96;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r97 + 0 ], %r98;
+	// end inline asm
+	bar.sync 	0;
+	shl.b32 	%r192, %r2, 2;
+	add.s32 	%r100, %r189, %r192;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r99, [ %r100 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r193, %r99, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p57, %r99, %r193;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p58, %r99, %r99;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r194, %r99, %r193, %p57;
+	selp.f32 	%r195, %r99, %r194, %p58;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r196, %r195, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p59, %r195, %r196;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p60, %r195, %r195;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r197, %r195, %r196, %p60;
+	selp.f32 	%r198, %r195, %r197, %p59;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r199, %r198, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p61, %r198, %r199;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p62, %r198, %r198;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	and.b32 	%r200, %r2, 7;
+	setp.eq.b32 	%p14, %r200, 0;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.b32 	%r201, %r198, %r199, %p62;
+	selp.b32 	%r102, %r198, %r201, %p61;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r100 + 0 ], %r102;
+	// end inline asm
+	add.s32 	%r104, %r100, 1024;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r103, [ %r104 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r202, %r103, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p63, %r103, %r202;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p64, %r103, %r103;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r203, %r103, %r202, %p63;
+	selp.f32 	%r204, %r103, %r203, %p64;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r205, %r204, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p65, %r204, %r205;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p66, %r204, %r204;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r206, %r204, %r205, %p66;
+	selp.f32 	%r207, %r204, %r206, %p65;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r208, %r207, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p67, %r207, %r208;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p68, %r207, %r207;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.b32 	%r209, %r207, %r208, %p68;
+	selp.b32 	%r106, %r207, %r209, %p67;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r104 + 0 ], %r106;
+	// end inline asm
+	add.s32 	%r108, %r100, 2048;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r107, [ %r108 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r210, %r107, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p69, %r107, %r210;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p70, %r107, %r107;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r211, %r107, %r210, %p69;
+	selp.f32 	%r212, %r107, %r211, %p70;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r213, %r212, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p71, %r212, %r213;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p72, %r212, %r212;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r214, %r212, %r213, %p72;
+	selp.f32 	%r215, %r212, %r214, %p71;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r216, %r215, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p73, %r215, %r216;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p74, %r215, %r215;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.b32 	%r217, %r215, %r216, %p74;
+	selp.b32 	%r110, %r215, %r217, %p73;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r108 + 0 ], %r110;
+	// end inline asm
+	add.s32 	%r112, %r100, 3072;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r111, [ %r112 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r218, %r111, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p75, %r111, %r218;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p76, %r111, %r111;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r219, %r111, %r218, %p75;
+	selp.f32 	%r220, %r111, %r219, %p76;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r221, %r220, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p77, %r220, %r221;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p78, %r220, %r220;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.f32 	%r222, %r220, %r221, %p78;
+	selp.f32 	%r223, %r220, %r222, %p77;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	shfl.sync.bfly.b32 	%r224, %r223, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.gt.f32 	%p79, %r223, %r224;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	setp.nan.f32 	%p80, %r223, %r223;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	selp.b32 	%r225, %r223, %r224, %p80;
+	selp.b32 	%r114, %r223, %r225, %p79;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r112 + 0 ], %r114;
+	// end inline asm
+	bar.sync 	0;
+	ld.shared.b32 	%r226, [%r190];
+	ld.shared.b32 	%r227, [%r190+32];
+	ld.shared.b32 	%r228, [%r190+64];
+	ld.shared.b32 	%r229, [%r190+96];
+$L__tmp2:
+	.loc	1 39 40                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:39:40
+	bar.sync 	0;
+	mad.lo.s32 	%r3, %r145, -112, %r190;
+	mov.b64 	%rd2, {%r228, %r229};
+	mov.b64 	%rd1, {%r226, %r227};
+	st.shared.v2.b64 	[%r3], {%rd1, %rd2};
+	bar.sync 	0;
+	shl.b32 	%r230, %r144, 7;
+	shl.b32 	%r231, %r2, 4;
+	or.b32 	%r232, %r230, %r231;
+	and.b32 	%r233, %r232, 496;
+	add.s32 	%r461, %r189, %r233;
+	// begin inline asm
+	ldmatrix.sync.aligned.m8n8.x1.shared.b16 {%r463}, [%r461];
+	// end inline asm
+	.loc	1 41 19                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:41:19
+	setp.eq.f32 	%p81, %r226, 0fFF800000;
+	setp.eq.f32 	%p82, %r227, 0fFF800000;
+	setp.eq.f32 	%p83, %r228, 0fFF800000;
+	setp.eq.f32 	%p84, %r229, 0fFF800000;
+	.loc	1 42 18                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:42:18
+	sub.f32 	%r234, %r27, %r226;
+	sub.f32 	%r235, %r28, %r227;
+	sub.f32 	%r236, %r29, %r228;
+	sub.f32 	%r237, %r30, %r229;
+	sub.f32 	%r238, %r35, %r226;
+	sub.f32 	%r239, %r36, %r227;
+	sub.f32 	%r240, %r37, %r228;
+	sub.f32 	%r241, %r38, %r229;
+	sub.f32 	%r242, %r43, %r226;
+	sub.f32 	%r243, %r44, %r227;
+	sub.f32 	%r244, %r45, %r228;
+	sub.f32 	%r245, %r46, %r229;
+	sub.f32 	%r246, %r51, %r226;
+	sub.f32 	%r247, %r52, %r227;
+	sub.f32 	%r248, %r53, %r228;
+	sub.f32 	%r249, %r54, %r229;
+	.loc	1 44 33                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:44:33
+	selp.f32 	%r250, 0f00000000, %r234, %p81;
+	selp.f32 	%r251, 0f00000000, %r235, %p82;
+	selp.f32 	%r252, 0f00000000, %r236, %p83;
+	selp.f32 	%r253, 0f00000000, %r237, %p84;
+	selp.f32 	%r254, 0f00000000, %r238, %p81;
+	selp.f32 	%r255, 0f00000000, %r239, %p82;
+	selp.f32 	%r256, 0f00000000, %r240, %p83;
+	selp.f32 	%r257, 0f00000000, %r241, %p84;
+	selp.f32 	%r258, 0f00000000, %r242, %p81;
+	selp.f32 	%r259, 0f00000000, %r243, %p82;
+	selp.f32 	%r260, 0f00000000, %r244, %p83;
+	selp.f32 	%r261, 0f00000000, %r245, %p84;
+	selp.f32 	%r262, 0f00000000, %r246, %p81;
+	selp.f32 	%r263, 0f00000000, %r247, %p82;
+	selp.f32 	%r264, 0f00000000, %r248, %p83;
+	selp.f32 	%r265, 0f00000000, %r249, %p84;
+	.loc	1 45 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:45:27
+	ex2.approx.ftz.f32 	%r266, %r250;
+	ex2.approx.ftz.f32 	%r267, %r251;
+	ex2.approx.ftz.f32 	%r268, %r252;
+	ex2.approx.ftz.f32 	%r269, %r253;
+	ex2.approx.ftz.f32 	%r270, %r254;
+	ex2.approx.ftz.f32 	%r271, %r255;
+	ex2.approx.ftz.f32 	%r272, %r256;
+	ex2.approx.ftz.f32 	%r273, %r257;
+	ex2.approx.ftz.f32 	%r274, %r258;
+	ex2.approx.ftz.f32 	%r275, %r259;
+	ex2.approx.ftz.f32 	%r276, %r260;
+	ex2.approx.ftz.f32 	%r277, %r261;
+	ex2.approx.ftz.f32 	%r278, %r262;
+	ex2.approx.ftz.f32 	%r279, %r263;
+	ex2.approx.ftz.f32 	%r280, %r264;
+	ex2.approx.ftz.f32 	%r281, %r265;
+	.loc	1 46 19                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:46:19
+	mul.f32 	%r282, %r270, %r67;
+	mul.f32 	%r283, %r271, %r68;
+	mul.f32 	%r284, %r272, %r69;
+	mul.f32 	%r285, %r273, %r70;
+$L__tmp3:
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	bar.sync 	0;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	fma.rn.f32 	%r286, %r266, %r59, %r282;
+	fma.rn.f32 	%r287, %r267, %r60, %r283;
+	fma.rn.f32 	%r288, %r268, %r61, %r284;
+	fma.rn.f32 	%r289, %r269, %r62, %r285;
+	fma.rn.f32 	%r290, %r274, %r75, %r286;
+	fma.rn.f32 	%r291, %r275, %r76, %r287;
+	fma.rn.f32 	%r292, %r276, %r77, %r288;
+	fma.rn.f32 	%r293, %r277, %r78, %r289;
+	fma.rn.f32 	%r294, %r278, %r83, %r290;
+	fma.rn.f32 	%r295, %r279, %r84, %r291;
+	fma.rn.f32 	%r296, %r280, %r85, %r292;
+	fma.rn.f32 	%r297, %r281, %r86, %r293;
+	selp.b32 	%r118, %r294, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r91 + 0 ], %r118;
+	// end inline asm
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	selp.b32 	%r120, %r295, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r93 + 0 ], %r120;
+	// end inline asm
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	selp.b32 	%r122, %r296, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r95 + 0 ], %r122;
+	// end inline asm
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	selp.b32 	%r124, %r297, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r97 + 0 ], %r124;
+	// end inline asm
+	bar.sync 	0;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r125, [ %r100 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r298, %r125, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r299, %r125, %r298;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r300, %r299, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r301, %r299, %r300;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r302, %r301, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r128, %r301, %r302;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r100 + 0 ], %r128;
+	// end inline asm
+	// begin inline asm
+	@%p9 ld.shared.b32 %r129, [ %r104 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r303, %r129, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r304, %r129, %r303;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r305, %r304, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r306, %r304, %r305;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r307, %r306, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r132, %r306, %r307;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r104 + 0 ], %r132;
+	// end inline asm
+	// begin inline asm
+	@%p9 ld.shared.b32 %r133, [ %r108 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r308, %r133, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r309, %r133, %r308;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r310, %r309, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r311, %r309, %r310;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r312, %r311, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r136, %r311, %r312;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r108 + 0 ], %r136;
+	// end inline asm
+	// begin inline asm
+	@%p9 ld.shared.b32 %r137, [ %r112 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r313, %r137, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r314, %r137, %r313;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r315, %r314, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r316, %r314, %r315;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	shfl.sync.bfly.b32 	%r317, %r316, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	add.f32 	%r140, %r316, %r317;
+	.loc	3 291 36                        // standard.py:291:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r112 + 0 ], %r140;
+	// end inline asm
+	bar.sync 	0;
+	ld.shared.b32 	%r318, [%r190];
+	ld.shared.b32 	%r319, [%r190+32];
+	ld.shared.b32 	%r320, [%r190+64];
+	ld.shared.b32 	%r321, [%r190+96];
+$L__tmp4:
+	.loc	1 49 29                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:49:29
+	bar.sync 	0;
+	st.shared.v4.b32 	[%r3], {%r318, %r319, %r320, %r321};
+	bar.sync 	0;
+	// begin inline asm
+	ldmatrix.sync.aligned.m8n8.x1.shared.b16 {%r464}, [%r461];
+	// end inline asm
+	.loc	1 51 34                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:51:34
+	selp.f32 	%r322, 0f3F800000, %r318, %p81;
+	selp.f32 	%r7, 0f3F800000, %r319, %p82;
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	setp.lt.f32 	%p85, %r322, 0f00800000;
+	mul.f32 	%r323, %r322, 0f4B000000;
+	selp.f32 	%r10, %r323, %r322, %p85;
+	selp.f32 	%r324, 0fC1B80000, 0f00000000, %p85;
+	add.s32 	%r325, %r10, -1060439283;
+	and.b32 	%r326, %r325, -8388608;
+	sub.s32 	%r327, %r10, %r326;
+	cvt.rn.f32.s32 	%r328, %r326;
+	mov.b32 	%r329, 0f34000000;
+	fma.rn.ftz.f32 	%r330, %r328, %r329, %r324;
+	add.f32 	%r331, %r327, 0fBF800000;
+	mov.b32 	%r332, 0fBE2C7F30;
+	mov.b32 	%r333, 0f3DC6B27F;
+	fma.rn.ftz.f32 	%r334, %r333, %r331, %r332;
+	mov.b32 	%r335, 0f3E2FCF2A;
+	fma.rn.ftz.f32 	%r336, %r334, %r331, %r335;
+	mov.b32 	%r337, 0fBE374E43;
+	fma.rn.ftz.f32 	%r338, %r336, %r331, %r337;
+	mov.b32 	%r339, 0f3E520BF4;
+	fma.rn.ftz.f32 	%r340, %r338, %r331, %r339;
+	mov.b32 	%r341, 0fBE763C8B;
+	fma.rn.ftz.f32 	%r342, %r340, %r331, %r341;
+	mov.b32 	%r343, 0f3E93BF99;
+	fma.rn.ftz.f32 	%r344, %r342, %r331, %r343;
+	mov.b32 	%r345, 0fBEB8AA49;
+	fma.rn.ftz.f32 	%r346, %r344, %r331, %r345;
+	mov.b32 	%r347, 0f3EF6384A;
+	fma.rn.ftz.f32 	%r348, %r346, %r331, %r347;
+	mov.b32 	%r349, 0fBF38AA3B;
+	fma.rn.ftz.f32 	%r350, %r348, %r331, %r349;
+	mul.f32 	%r351, %r331, %r350;
+	mul.f32 	%r352, %r331, %r351;
+	mov.b32 	%r353, 0f3FB8AA3B;
+	fma.rn.ftz.f32 	%r354, %r331, %r353, %r352;
+	add.f32 	%r487, %r330, %r354;
+	setp.lt.u32 	%p86, %r10, 2139095040;
+	mov.b32 	%r355, 0f7F800000;
+	@%p86 bra 	$L__BB0_2;
+// %bb.1:                               // %__nv_fmaf_rn.exit.i.i
+	.loc	1 0 27                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:0:27
+	fma.rn.ftz.f32 	%r487, %r10, %r355, %r355;
+$L__BB0_2:                              // %__nv_log2f.exit
+	selp.f32 	%r8, 0f3F800000, %r320, %p83;
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	setp.lt.f32 	%p87, %r7, 0f00800000;
+	mul.f32 	%r356, %r7, 0f4B000000;
+	selp.f32 	%r14, %r356, %r7, %p87;
+	selp.f32 	%r357, 0fC1B80000, 0f00000000, %p87;
+	add.s32 	%r358, %r14, -1060439283;
+	and.b32 	%r359, %r358, -8388608;
+	sub.s32 	%r360, %r14, %r359;
+	cvt.rn.f32.s32 	%r361, %r359;
+	fma.rn.ftz.f32 	%r363, %r361, %r329, %r357;
+	add.f32 	%r364, %r360, 0fBF800000;
+	fma.rn.ftz.f32 	%r367, %r333, %r364, %r332;
+	fma.rn.ftz.f32 	%r369, %r367, %r364, %r335;
+	fma.rn.ftz.f32 	%r371, %r369, %r364, %r337;
+	fma.rn.ftz.f32 	%r373, %r371, %r364, %r339;
+	fma.rn.ftz.f32 	%r375, %r373, %r364, %r341;
+	fma.rn.ftz.f32 	%r377, %r375, %r364, %r343;
+	fma.rn.ftz.f32 	%r379, %r377, %r364, %r345;
+	fma.rn.ftz.f32 	%r381, %r379, %r364, %r347;
+	fma.rn.ftz.f32 	%r383, %r381, %r364, %r349;
+	mul.f32 	%r384, %r364, %r383;
+	mul.f32 	%r385, %r364, %r384;
+	fma.rn.ftz.f32 	%r387, %r364, %r353, %r385;
+	add.f32 	%r488, %r363, %r387;
+	setp.lt.u32 	%p88, %r14, 2139095040;
+	@%p88 bra 	$L__BB0_4;
+// %bb.3:                               // %__nv_fmaf_rn.exit.i.i74
+	.loc	1 0 27                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:0:27
+	fma.rn.ftz.f32 	%r488, %r14, %r355, %r355;
+$L__BB0_4:                              // %__nv_log2f.exit77
+	selp.f32 	%r9, 0f3F800000, %r321, %p84;
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	setp.lt.f32 	%p89, %r8, 0f00800000;
+	mul.f32 	%r389, %r8, 0f4B000000;
+	selp.f32 	%r18, %r389, %r8, %p89;
+	selp.f32 	%r390, 0fC1B80000, 0f00000000, %p89;
+	add.s32 	%r391, %r18, -1060439283;
+	and.b32 	%r392, %r391, -8388608;
+	sub.s32 	%r393, %r18, %r392;
+	cvt.rn.f32.s32 	%r394, %r392;
+	mov.b32 	%r395, 0f34000000;
+	fma.rn.ftz.f32 	%r396, %r394, %r395, %r390;
+	add.f32 	%r397, %r393, 0fBF800000;
+	mov.b32 	%r398, 0fBE2C7F30;
+	mov.b32 	%r399, 0f3DC6B27F;
+	fma.rn.ftz.f32 	%r400, %r399, %r397, %r398;
+	mov.b32 	%r401, 0f3E2FCF2A;
+	fma.rn.ftz.f32 	%r402, %r400, %r397, %r401;
+	mov.b32 	%r403, 0fBE374E43;
+	fma.rn.ftz.f32 	%r404, %r402, %r397, %r403;
+	mov.b32 	%r405, 0f3E520BF4;
+	fma.rn.ftz.f32 	%r406, %r404, %r397, %r405;
+	mov.b32 	%r407, 0fBE763C8B;
+	fma.rn.ftz.f32 	%r408, %r406, %r397, %r407;
+	mov.b32 	%r409, 0f3E93BF99;
+	fma.rn.ftz.f32 	%r410, %r408, %r397, %r409;
+	mov.b32 	%r411, 0fBEB8AA49;
+	fma.rn.ftz.f32 	%r412, %r410, %r397, %r411;
+	mov.b32 	%r413, 0f3EF6384A;
+	fma.rn.ftz.f32 	%r414, %r412, %r397, %r413;
+	mov.b32 	%r415, 0fBF38AA3B;
+	fma.rn.ftz.f32 	%r416, %r414, %r397, %r415;
+	mul.f32 	%r417, %r397, %r416;
+	mul.f32 	%r418, %r397, %r417;
+	mov.b32 	%r419, 0f3FB8AA3B;
+	fma.rn.ftz.f32 	%r420, %r397, %r419, %r418;
+	add.f32 	%r489, %r396, %r420;
+	setp.lt.u32 	%p90, %r18, 2139095040;
+	mov.b32 	%r421, 0f7F800000;
+	@%p90 bra 	$L__BB0_6;
+// %bb.5:                               // %__nv_fmaf_rn.exit.i.i104
+	.loc	1 0 27                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:0:27
+	fma.rn.ftz.f32 	%r489, %r18, %r421, %r421;
+$L__BB0_6:                              // %__nv_log2f.exit107
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	setp.lt.f32 	%p91, %r9, 0f00800000;
+	mul.f32 	%r422, %r9, 0f4B000000;
+	selp.f32 	%r22, %r422, %r9, %p91;
+	selp.f32 	%r423, 0fC1B80000, 0f00000000, %p91;
+	add.s32 	%r424, %r22, -1060439283;
+	and.b32 	%r425, %r424, -8388608;
+	sub.s32 	%r426, %r22, %r425;
+	cvt.rn.f32.s32 	%r427, %r425;
+	fma.rn.ftz.f32 	%r429, %r427, %r395, %r423;
+	add.f32 	%r430, %r426, 0fBF800000;
+	fma.rn.ftz.f32 	%r433, %r399, %r430, %r398;
+	fma.rn.ftz.f32 	%r435, %r433, %r430, %r401;
+	fma.rn.ftz.f32 	%r437, %r435, %r430, %r403;
+	fma.rn.ftz.f32 	%r439, %r437, %r430, %r405;
+	fma.rn.ftz.f32 	%r441, %r439, %r430, %r407;
+	fma.rn.ftz.f32 	%r443, %r441, %r430, %r409;
+	fma.rn.ftz.f32 	%r445, %r443, %r430, %r411;
+	fma.rn.ftz.f32 	%r447, %r445, %r430, %r413;
+	fma.rn.ftz.f32 	%r449, %r447, %r430, %r415;
+	mul.f32 	%r450, %r430, %r449;
+	mul.f32 	%r451, %r430, %r450;
+	fma.rn.ftz.f32 	%r453, %r430, %r419, %r451;
+	add.f32 	%r490, %r429, %r453;
+	setp.lt.u32 	%p92, %r22, 2139095040;
+	@%p92 bra 	$L__BB0_8;
+// %bb.7:                               // %__nv_fmaf_rn.exit.i.i134
+	.loc	1 0 27                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:0:27
+	fma.rn.ftz.f32 	%r490, %r22, %r421, %r421;
+$L__BB0_8:                              // %__nv_log2f.exit137
+	ld.param.b64 	%rd12, [triton_per_fused_mul_1_param_4];
+	ld.param.b64 	%rd11, [triton_per_fused_mul_1_param_3];
+	ld.param.b64 	%rd10, [triton_per_fused_mul_1_param_2];
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	mov.b64 	%rd4, {%r18, %r22};
+	mov.b64 	%rd3, {%r10, %r14};
+	.loc	1 24 44                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:24:44
+	and.b32 	%r455, %r2, 127;
+	.loc	1 24 23                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:24:23
+	or.b32 	%r456, %r1, %r455;
+	.loc	1 33 19                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:33:19
+	cvt.s64.s32 	%rd5, %r456;
+$L__tmp5:
+	.loc	2 72 16                         // triton_helpers.py:72:16 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:34:51 ]
+	or.b64 	%rd38, %rd5, %rd13;
+	and.b64 	%rd39, %rd38, -4294967296;
+	setp.ne.b64 	%p93, %rd39, 0;
+	@%p93 bra 	$L__BB0_10;
+	bra.uni 	$L__BB0_9;
+$L__BB0_10:
+	div.s64 	%rd56, %rd5, %rd13;
+	bra.uni 	$L__BB0_11;
+$L__BB0_9:
+	cvt.u32.u64 	%r457, %rd13;
+	cvt.u32.u64 	%r458, %rd5;
+	div.u32 	%r459, %r458, %r457;
+	cvt.u64.u32 	%rd56, %r459;
+$L__tmp6:
+$L__BB0_11:
+	.loc	2 0 16                          // triton_helpers.py:0:16
+	cvt.u32.u64 	%r465, %rd5;
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	mov.b64 	{%r466, %r467}, %rd4;
+	setp.eq.f32 	%p97, %r466, 0f00000000;
+	setp.eq.f32 	%p98, %r467, 0f00000000;
+	mov.b64 	{%r468, %r469}, %rd3;
+	setp.eq.f32 	%p99, %r468, 0f00000000;
+	setp.eq.f32 	%p100, %r469, 0f00000000;
+$L__tmp7:
+	.loc	2 75 25                         // triton_helpers.py:75:25 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:34:51 ]
+	setp.lt.s32 	%p101, %r1, 0;
+	.loc	2 75 36                         // triton_helpers.py:75:36 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:34:51 ]
+	setp.lt.s64 	%p102, %rd13, 0;
+	.loc	2 75 32                         // triton_helpers.py:75:32 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:34:51 ]
+	xor.pred 	%p103, %p101, %p102;
+$L__tmp8:
+	.loc	1 33 19                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:33:19
+	mul.lo.s64 	%rd44, %rd56, %rd13;
+	sub.s64 	%rd45, %rd5, %rd44;
+$L__tmp9:
+	.loc	2 74 34                         // triton_helpers.py:74:34 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:34:51 ]
+	setp.ne.b64 	%p104, %rd45, 0;
+	.loc	2 75 47                         // triton_helpers.py:75:47 @[ c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:34:51 ]
+	and.pred 	%p105, %p103, %p104;
+	selp.b64 	%rd46, -1, 0, %p105;
+	add.s64 	%rd47, %rd56, %rd46;
+$L__tmp10:
+	.loc	1 25 21                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:25:21
+	setp.lt.s32 	%p106, %r465, %r26;
+	.loc	1 52 27                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:52:27
+	selp.f32 	%r470, 0fFF800000, %r488, %p100;
+	selp.f32 	%r471, 0fFF800000, %r487, %p99;
+	selp.f32 	%r472, 0fFF800000, %r490, %p98;
+	selp.f32 	%r473, 0fFF800000, %r489, %p97;
+	.loc	1 53 20                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:53:20
+	mov.b64 	{%r474, %r475}, %rd2;
+	add.f32 	%r476, %r474, %r473;
+	add.f32 	%r477, %r475, %r472;
+	mov.b64 	{%r478, %r479}, %rd1;
+	add.f32 	%r480, %r478, %r471;
+	add.f32 	%r481, %r479, %r470;
+	.loc	1 55 20                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:55:20
+	mul.f32 	%r482, %r481, 0f3F317218;
+	mul.f32 	%r483, %r480, 0f3F317218;
+	mul.f32 	%r484, %r477, 0f3F317218;
+	mul.f32 	%r485, %r476, 0f3F317218;
+	.loc	1 56 49                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:49
+	setp.lt.s64 	%p107, %rd13, 2;
+	.loc	1 56 75                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:75
+	setp.gt.s64 	%p108, %rd13, 1;
+	.loc	1 56 66                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:66
+	selp.b64 	%rd48, %rd13, 0, %p108;
+	.loc	1 56 0                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56
+	selp.b64 	%rd49, 1, 0, %p107;
+	.loc	1 56 57                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:57
+	add.s64 	%rd50, %rd48, %rd49;
+	.loc	1 56 34                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:34
+	mul.lo.s64 	%rd51, %rd47, %rd50;
+	.loc	1 56 25                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:25
+	shl.b64 	%rd52, %rd45, 2;
+	add.s64 	%rd53, %rd12, %rd52;
+	shl.b64 	%rd54, %rd51, 2;
+	add.s64 	%rd40, %rd53, %rd54;
+	.loc	1 56 89                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:56:89
+	bar.sync 	0;
+	st.shared.v4.b32 	[%r3], {%r483, %r482, %r485, %r484};
+	bar.sync 	0;
+	// begin inline asm
+	ldmatrix.sync.aligned.m8n8.x1.shared.b16 {%r462}, [%r461];
+	// end inline asm
+	and.b32 	%r486, %r2, 128;
+	setp.eq.b32 	%p109, %r486, 0;
+	and.pred 	%p94, %p109, %p106;
+	// begin inline asm
+	@%p94 st.global.b32 [ %rd40 + 0 ], { %r462 };
+	// end inline asm
+	.loc	1 57 25                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:57:25
+	shl.b64 	%rd55, %rd5, 2;
+	add.s64 	%rd41, %rd10, %rd55;
+	.loc	1 57 36                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:57:36
+	// begin inline asm
+	@%p94 st.global.b32 [ %rd41 + 0 ], { %r463 };
+	// end inline asm
+	.loc	1 58 25                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:58:25
+	add.s64 	%rd42, %rd11, %rd55;
+	.loc	1 58 37                         // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:58:37
+	// begin inline asm
+	@%p94 st.global.b32 [ %rd42 + 0 ], { %r464 };
+	// end inline asm
+	.loc	1 58 4                          // c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py:58:4
+	ret;
+$L__tmp11:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py"
+	.file	2 "/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py"
+	.file	3 "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 259                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xfc DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 54
+.b8 103
+.b8 98
+.b8 53
+.b8 50
+.b8 115
+.b8 107
+.b8 118
+.b8 113
+.b8 115
+.b8 55
+.b8 111
+.b8 114
+.b8 53
+.b8 55
+.b8 118
+.b8 100
+.b8 51
+.b8 122
+.b8 117
+.b8 53
+.b8 117
+.b8 109
+.b8 51
+.b8 114
+.b8 53
+.b8 114
+.b8 110
+.b8 109
+.b8 101
+.b8 105
+.b8 109
+.b8 100
+.b8 53
+.b8 113
+.b8 97
+.b8 109
+.b8 50
+.b8 55
+.b8 108
+.b8 53
+.b8 106
+.b8 55
+.b8 117
+.b8 113
+.b8 120
+.b8 55
+.b8 116
+.b8 52
+.b8 97
+.b8 105
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 106
+.b8 117
+.b8 110
+.b8 113
+.b8 117
+.b8 97
+.b8 110
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 54
+.b8 103
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8f:0x19 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 112
+.b8 101
+.b8 114
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 109
+.b8 117
+.b8 108
+.b8 95
+.b8 49
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xa8:0x5e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 143                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xbd:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 39                                  // DW_AT_call_line
+.b8 37                                  // DW_AT_call_column
+.b8 4                                   // Abbrev [4] 0xd5:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp3                           // DW_AT_low_pc
+.b64 $L__tmp4                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 49                                  // DW_AT_call_line
+.b8 26                                  // DW_AT_call_column
+.b8 4                                   // Abbrev [4] 0xed:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp5                           // DW_AT_low_pc
+.b64 $L__tmp10                          // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 34                                  // DW_AT_call_line
+.b8 51                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.source

@@ -0,0 +1,391 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":18:0)
+#loc57 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":69:0)
+#loc69 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":122:0)
+#loc71 = loc(unknown)
+#loc74 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":109:0)
+#loc83 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":86:0)
+#loc87 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":63:0)
+#loc96 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":285:0)
+#loc100 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":260:0)
+#loc104 = loc("in_ptr0"(#loc))
+#loc105 = loc("in_ptr1"(#loc))
+#loc106 = loc("out_ptr0"(#loc))
+#loc107 = loc("out_ptr1"(#loc))
+#loc108 = loc("out_ptr2"(#loc))
+#loc109 = loc("ks0"(#loc))
+#loc110 = loc("xnumel"(#loc))
+#loc111 = loc("r0_numel"(#loc))
+#loc154 = loc("a"(#loc57))
+#loc155 = loc("b"(#loc57))
+#loc161 = loc("a"(#loc69))
+#loc162 = loc("a"(#loc74))
+#loc163 = loc("b"(#loc74))
+#loc167 = loc("x"(#loc83))
+#loc168 = loc("x"(#loc87))
+#loc169 = loc("input"(#loc96))
+#loc170 = loc("a"(#loc100))
+#loc171 = loc("b"(#loc100))
+module {
+  tt.func public @triton_per_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %out_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %ks0: i64 loc("ks0"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %r0_numel_0 = arith.constant 32 : i32 loc(#loc112)
+    %xoffset = tt.get_program_id x : i32 loc(#loc113)
+    %xoffset_1 = arith.constant 128 : i32 loc(#loc114)
+    %xoffset_2 = arith.constant 128 : i32 loc(#loc114)
+    %xoffset_3 = arith.muli %xoffset, %xoffset_2 : i32 loc(#loc114)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc115)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32> loc(#loc116)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<128x1xi32> loc(#loc117)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<128x1xi32> loc(#loc117)
+    %xmask = tt.splat %xnumel : i32 -> tensor<128x1xi32> loc(#loc118)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<128x1xi32> loc(#loc118)
+    %r0_index = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc119)
+    %r0_index_8 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<32xi32> -> tensor<1x32xi32> loc(#loc120)
+    %r0_offset = arith.constant 0 : i32 loc(#loc121)
+    %r0_mask = arith.constant true loc(#loc122)
+    %r0_mask_9 = arith.constant dense<true> : tensor<128x32xi1> loc(#loc122)
+    %x2 = arith.extsi %xindex_6 : tensor<128x1xi32> to tensor<128x1xi64> loc(#loc123)
+    %x2_10 = tt.splat %ks0 : i64 -> tensor<128x1xi64> loc(#loc123)
+    %x2_11 = arith.remsi %x2, %x2_10 : tensor<128x1xi64> loc(#loc123)
+    %x3 = tt.call @torch._inductor.runtime.triton_helpers.div_floor_integer__i32S128_1S_i64__(%xindex_6, %ks0) : (tensor<128x1xi32>, i64) -> tensor<128x1xi64> loc(#loc124)
+    %tmp0 = arith.constant 32 : i32 loc(#loc125)
+    %tmp0_12 = arith.constant 32 : i64 loc(#loc125)
+    %tmp0_13 = arith.muli %tmp0_12, %ks0 : i64 loc(#loc125)
+    %tmp0_14 = arith.extsi %r0_index_8 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc126)
+    %tmp0_15 = tt.splat %tmp0_13 : i64 -> tensor<1x32xi64> loc(#loc126)
+    %tmp0_16 = arith.muli %tmp0_15, %tmp0_14 : tensor<1x32xi64> loc(#loc126)
+    %tmp0_17 = arith.extsi %xindex_6 : tensor<128x1xi32> to tensor<128x1xi64> loc(#loc127)
+    %tmp0_18 = tt.broadcast %tmp0_17 : tensor<128x1xi64> -> tensor<128x32xi64> loc(#loc127)
+    %tmp0_19 = tt.broadcast %tmp0_16 : tensor<1x32xi64> -> tensor<128x32xi64> loc(#loc127)
+    %tmp0_20 = arith.addi %tmp0_18, %tmp0_19 : tensor<128x32xi64> loc(#loc127)
+    %tmp0_21 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc128)
+    %tmp0_22 = tt.addptr %tmp0_21, %tmp0_20 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi64> loc(#loc128)
+    %tmp0_23 = arith.constant 0.000000e+00 : f32 loc(#loc129)
+    %tmp0_24 = tt.broadcast %xmask_7 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc129)
+    %tmp0_25 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc129)
+    %tmp0_26 = tt.load %tmp0_22, %tmp0_24, %tmp0_25 : tensor<128x32x!tt.ptr<f32>> loc(#loc129)
+    %tmp5 = arith.constant 32 : i32 loc(#loc130)
+    %tmp5_27 = arith.constant 32 : i64 loc(#loc130)
+    %tmp5_28 = arith.muli %tmp5_27, %ks0 : i64 loc(#loc130)
+    %tmp5_29 = arith.extsi %r0_index_8 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc131)
+    %tmp5_30 = tt.splat %tmp5_28 : i64 -> tensor<1x32xi64> loc(#loc131)
+    %tmp5_31 = arith.muli %tmp5_30, %tmp5_29 : tensor<1x32xi64> loc(#loc131)
+    %tmp5_32 = arith.extsi %xindex_6 : tensor<128x1xi32> to tensor<128x1xi64> loc(#loc132)
+    %tmp5_33 = tt.broadcast %tmp5_32 : tensor<128x1xi64> -> tensor<128x32xi64> loc(#loc132)
+    %tmp5_34 = tt.broadcast %tmp5_31 : tensor<1x32xi64> -> tensor<128x32xi64> loc(#loc132)
+    %tmp5_35 = arith.addi %tmp5_33, %tmp5_34 : tensor<128x32xi64> loc(#loc132)
+    %tmp5_36 = tt.splat %in_ptr1 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc133)
+    %tmp5_37 = tt.addptr %tmp5_36, %tmp5_35 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi64> loc(#loc133)
+    %tmp5_38 = arith.constant 0.000000e+00 : f32 loc(#loc134)
+    %tmp5_39 = tt.broadcast %xmask_7 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc134)
+    %tmp5_40 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc134)
+    %tmp5_41 = tt.load %tmp5_37, %tmp5_39, %tmp5_40 : tensor<128x32x!tt.ptr<f32>> loc(#loc134)
+    %tmp3 = arith.constant 0xFF800000 : f32 loc(#loc135)
+    %tmp3_42 = arith.constant 0xFF800000 : f32 loc(#loc135)
+    %tmp3_43 = arith.constant dense<0xFF800000> : tensor<128x32xf32> loc(#loc135)
+    %tmp3_44 = tt.broadcast %xmask_7 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc135)
+    %tmp3_45 = arith.select %tmp3_44, %tmp0_26, %tmp3_43 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc135)
+    %tmp4 = tt.call @"torch._inductor.runtime.triton_helpers.max2__fp32S128_32S__(1,)cconstexpr_1_"(%tmp3_45) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc136)
+    %tmp4_46 = tt.expand_dims %tmp4 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc137)
+    %tmp6 = arith.constant 0xFF800000 : f32 loc(#loc138)
+    %tmp7 = arith.constant dense<0xFF800000> : tensor<128x1xf32> loc(#loc139)
+    %tmp7_47 = arith.cmpf oeq, %tmp4_46, %tmp7 : tensor<128x1xf32> loc(#loc139)
+    %tmp8 = tt.broadcast %tmp4_46 : tensor<128x1xf32> -> tensor<128x32xf32> loc(#loc140)
+    %tmp8_48 = arith.subf %tmp0_26, %tmp8 : tensor<128x32xf32> loc(#loc140)
+    %tmp9 = arith.constant 0.000000e+00 : f32 loc(#loc141)
+    %tmp10 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc142)
+    %tmp10_49 = tt.broadcast %tmp7_47 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc142)
+    %tmp10_50 = arith.select %tmp10_49, %tmp10, %tmp8_48 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc142)
+    %tmp11 = tt.extern_elementwise %tmp10_50 {libname = "", libpath = "", pure = true, symbol = "__nv_exp2f"} : (tensor<128x32xf32>) -> tensor<128x32xf32> loc(#loc143)
+    %tmp12 = arith.mulf %tmp5_41, %tmp11 : tensor<128x32xf32> loc(#loc144)
+    %tmp15 = arith.constant 0 : i32 loc(#loc145)
+    %tmp15_51 = arith.constant 0.000000e+00 : f32 loc(#loc145)
+    %tmp15_52 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc145)
+    %tmp15_53 = tt.broadcast %xmask_7 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc145)
+    %tmp15_54 = arith.select %tmp15_53, %tmp12, %tmp15_52 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc145)
+    %tmp16 = tt.call @"triton.language.standard.sum__fp32S128_32S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%tmp15_54) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc146)
+    %tmp16_55 = tt.expand_dims %tmp16 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc147)
+    %tmp17 = arith.constant 1.000000e+00 : f32 loc(#loc148)
+    %tmp18 = arith.constant dense<1.000000e+00> : tensor<128x1xf32> loc(#loc149)
+    %tmp18_56 = arith.select %tmp7_47, %tmp18, %tmp16_55 : tensor<128x1xi1>, tensor<128x1xf32> loc(#loc149)
+    %tmp19 = tt.extern_elementwise %tmp18_56 {libname = "", libpath = "", pure = true, symbol = "__nv_log2f"} : (tensor<128x1xf32>) -> tensor<128x1xf32> loc(#loc150)
+    %tmp20 = arith.addf %tmp19, %tmp4_46 : tensor<128x1xf32> loc(#loc151)
+    %tmp21 = arith.constant 0.693147182 : f32 loc(#loc152)
+    %tmp22 = arith.constant dense<0.693147182> : tensor<128x1xf32> loc(#loc153)
+    %tmp22_57 = arith.mulf %tmp20, %tmp22 : tensor<128x1xf32> loc(#loc153)
+    %c1_i32 = arith.constant 1 : i32 loc(#loc43)
+    %0 = arith.extsi %c1_i32 : i32 to i64 loc(#loc43)
+    %1 = arith.cmpi sge, %0, %ks0 : i64 loc(#loc43)
+    %c1_i32_58 = arith.constant 1 : i32 loc(#loc44)
+    %c1_i32_59 = arith.constant 1 : i32 loc(#loc44)
+    %2 = arith.extui %1 : i1 to i32 loc(#loc44)
+    %3 = arith.muli %c1_i32_59, %2 : i32 loc(#loc44)
+    %c1_i32_60 = arith.constant 1 : i32 loc(#loc45)
+    %4 = arith.extsi %c1_i32_60 : i32 to i64 loc(#loc45)
+    %5 = arith.cmpi sgt, %ks0, %4 : i64 loc(#loc45)
+    %6 = arith.extui %5 : i1 to i64 loc(#loc46)
+    %7 = arith.muli %ks0, %6 : i64 loc(#loc46)
+    %8 = arith.extsi %3 : i32 to i64 loc(#loc47)
+    %9 = arith.addi %8, %7 : i64 loc(#loc47)
+    %10 = tt.splat %9 : i64 -> tensor<128x1xi64> loc(#loc48)
+    %11 = arith.muli %x3, %10 : tensor<128x1xi64> loc(#loc48)
+    %12 = arith.addi %x2_11, %11 : tensor<128x1xi64> loc(#loc49)
+    %13 = tt.splat %out_ptr2 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc50)
+    %14 = tt.addptr %13, %12 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi64> loc(#loc50)
+    tt.store %14, %tmp22_57, %xmask_7 : tensor<128x1x!tt.ptr<f32>> loc(#loc51)
+    %15 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc52)
+    %16 = tt.addptr %15, %xindex_6 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc52)
+    tt.store %16, %tmp4_46, %xmask_7 : tensor<128x1x!tt.ptr<f32>> loc(#loc53)
+    %17 = tt.splat %out_ptr1 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc54)
+    %18 = tt.addptr %17, %xindex_6 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc54)
+    tt.store %18, %tmp16_55, %xmask_7 : tensor<128x1x!tt.ptr<f32>> loc(#loc55)
+    tt.return loc(#loc56)
+  } loc(#loc)
+  tt.func private @torch._inductor.runtime.triton_helpers.div_floor_integer__i32S128_1S_i64__(%a: tensor<128x1xi32> loc("a"(#loc57)), %b: i64 loc("b"(#loc57))) -> tensor<128x1xi64> attributes {noinline = false} {
+    %quot = arith.extsi %a : tensor<128x1xi32> to tensor<128x1xi64> loc(#loc156)
+    %quot_0 = tt.splat %b : i64 -> tensor<128x1xi64> loc(#loc156)
+    %quot_1 = arith.divsi %quot, %quot_0 : tensor<128x1xi64> loc(#loc156)
+    %remainder = arith.extsi %a : tensor<128x1xi32> to tensor<128x1xi64> loc(#loc157)
+    %remainder_2 = tt.splat %b : i64 -> tensor<128x1xi64> loc(#loc157)
+    %remainder_3 = arith.remsi %remainder, %remainder_2 : tensor<128x1xi64> loc(#loc157)
+    %fixed = arith.constant 0 : i32 loc(#loc158)
+    %fixed_4 = arith.extsi %fixed : i32 to i64 loc(#loc158)
+    %fixed_5 = tt.splat %fixed_4 : i64 -> tensor<128x1xi64> loc(#loc158)
+    %fixed_6 = arith.cmpi ne, %remainder_3, %fixed_5 : tensor<128x1xi64> loc(#loc158)
+    %fixed_7 = arith.constant 1 : i32 loc(#loc159)
+    %fixed_8 = arith.constant 1 : i64 loc(#loc159)
+    %fixed_9 = arith.constant dense<1> : tensor<128x1xi64> loc(#loc159)
+    %fixed_10 = arith.subi %quot_1, %fixed_9 : tensor<128x1xi64> loc(#loc159)
+    %fixed_11 = arith.select %fixed_6, %fixed_10, %quot_1 : tensor<128x1xi1>, tensor<128x1xi64> loc(#loc160)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc63)
+    %cst = arith.constant dense<0> : tensor<128x1xi32> loc(#loc63)
+    %0 = arith.cmpi slt, %a, %cst : tensor<128x1xi32> loc(#loc63)
+    %c0_i32_12 = arith.constant 0 : i32 loc(#loc64)
+    %1 = arith.extsi %c0_i32_12 : i32 to i64 loc(#loc64)
+    %2 = arith.cmpi slt, %b, %1 : i64 loc(#loc64)
+    %3 = tt.splat %2 : i1 -> tensor<128x1xi1> loc(#loc65)
+    %4 = arith.cmpi ne, %0, %3 : tensor<128x1xi1> loc(#loc65)
+    %5 = arith.select %4, %fixed_11, %quot_1 : tensor<128x1xi1>, tensor<128x1xi64> loc(#loc66)
+    tt.return %5 : tensor<128x1xi64> loc(#loc67)
+  ^bb1:  // no predecessors
+    %6 = ub.poison : tensor<128x1xi64> loc(#loc68)
+    tt.return %6 : tensor<128x1xi64> loc(#loc68)
+  } loc(#loc57)
+  tt.func private @"torch._inductor.runtime.triton_helpers.max2__fp32S128_32S__(1,)cconstexpr_1_"(%a: tensor<128x32xf32> loc("a"(#loc69))) -> tensor<128xf32> attributes {noinline = false} {
+    %0 = "tt.reduce"(%a) <{axis = 1 : i32}> ({
+    ^bb0(%arg1: f32 loc(unknown), %arg2: f32 loc(unknown)):
+      %2 = tt.call @torch._inductor.runtime.triton_helpers.maximum__fp32_fp32__(%arg1, %arg2) : (f32, f32) -> f32 loc(#loc70)
+      tt.reduce.return %2 : f32 loc(#loc70)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc70)
+    tt.return %0 : tensor<128xf32> loc(#loc72)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<128xf32> loc(#loc73)
+    tt.return %1 : tensor<128xf32> loc(#loc73)
+  } loc(#loc69)
+  tt.func private @torch._inductor.runtime.triton_helpers.maximum__fp32_fp32__(%a: f32 loc("a"(#loc74)), %b: f32 loc("b"(#loc74))) -> f32 attributes {noinline = false} {
+    %mask = arith.cmpf ogt, %a, %b : f32 loc(#loc172)
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%a) : (f32) -> i1 loc(#loc76)
+    %1 = scf.if %0 -> (i1) {
+      %mask_0 = arith.cmpf une, %a, %a : f32 loc(#loc165)
+      %mask_1 = arith.ori %mask, %mask_0 : i1 loc(#loc173)
+      scf.yield %mask_1 : i1 loc(#loc173)
+    } else {
+      scf.yield %mask : i1 loc(#loc71)
+    } loc(#loc77)
+    %2 = arith.select %1, %a, %b : f32 loc(#loc80)
+    tt.return %2 : f32 loc(#loc81)
+  ^bb1:  // no predecessors
+    %3 = ub.poison : f32 loc(#loc82)
+    tt.return %3 : f32 loc(#loc82)
+  } loc(#loc74)
+  tt.func private @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%x: f32 loc("x"(#loc83))) -> i1 attributes {noinline = false} {
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x) : (f32) -> tensor<1xf32> loc(#loc84)
+    %true = arith.constant true loc(#loc85)
+    tt.return %true : i1 loc(#loc85)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i1 loc(#loc86)
+    tt.return %1 : i1 loc(#loc86)
+  } loc(#loc83)
+  tt.func private @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x: f32 loc("x"(#loc87))) -> tensor<1xf32> attributes {noinline = false} {
+    %0 = tt.call @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() : () -> tensor<1xi1> loc(#loc88)
+    %1 = arith.uitofp %0 : tensor<1xi1> to tensor<1xf32> loc(#loc89)
+    %2 = tt.splat %x : f32 -> tensor<1xf32> loc(#loc89)
+    %3 = arith.addf %2, %1 : tensor<1xf32> loc(#loc89)
+    tt.return %3 : tensor<1xf32> loc(#loc90)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : tensor<1xf32> loc(#loc91)
+    tt.return %4 : tensor<1xf32> loc(#loc91)
+  } loc(#loc87)
+  tt.func private @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() -> tensor<1xi1> attributes {noinline = false} {
+    %false = arith.constant false loc(#loc93)
+    %cst = arith.constant dense<false> : tensor<1xi1> loc(#loc93)
+    tt.return %cst : tensor<1xi1> loc(#loc94)
+  ^bb1:  // no predecessors
+    %0 = ub.poison : tensor<1xi1> loc(#loc95)
+    tt.return %0 : tensor<1xi1> loc(#loc95)
+  } loc(#loc92)
+  tt.func private @"triton.language.standard.sum__fp32S128_32S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%input: tensor<128x32xf32> loc("input"(#loc96))) -> tensor<128xf32> attributes {noinline = false} {
+    %0 = "tt.reduce"(%input) <{axis = 1 : i32}> ({
+    ^bb0(%arg1: f32 loc(unknown), %arg2: f32 loc(unknown)):
+      %2 = tt.call @triton.language.standard._sum_combine__fp32_fp32__(%arg1, %arg2) : (f32, f32) -> f32 loc(#loc97)
+      tt.reduce.return %2 : f32 loc(#loc97)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc97)
+    tt.return %0 : tensor<128xf32> loc(#loc98)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<128xf32> loc(#loc99)
+    tt.return %1 : tensor<128xf32> loc(#loc99)
+  } loc(#loc96)
+  tt.func private @triton.language.standard._sum_combine__fp32_fp32__(%a: f32 loc("a"(#loc100)), %b: f32 loc("b"(#loc100))) -> f32 attributes {noinline = false} {
+    %0 = arith.addf %a, %b : f32 loc(#loc101)
+    tt.return %0 : f32 loc(#loc102)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : f32 loc(#loc103)
+    tt.return %1 : f32 loc(#loc103)
+  } loc(#loc100)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":19:15)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":23:28)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":23:33)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:36)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:44)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:23)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":25:21)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":26:28)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":26:38)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":27:16)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":28:48)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":33:19)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":34:51)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:38)
+#loc15 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:42)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:35)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:30)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:49)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:38)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:42)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:35)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:30)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:49)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":38:33)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":39:37)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":39:40)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":40:11)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":41:19)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":42:18)
+#loc30 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":43:11)
+#loc31 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":44:33)
+#loc32 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":45:27)
+#loc33 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":46:19)
+#loc34 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":48:35)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":49:26)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":49:29)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":50:12)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":51:34)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":52:27)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":53:20)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":54:12)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":55:20)
+#loc43 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:49)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:41)
+#loc45 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:75)
+#loc46 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:66)
+#loc47 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:57)
+#loc48 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:34)
+#loc49 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:30)
+#loc50 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:25)
+#loc51 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:89)
+#loc52 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":57:25)
+#loc53 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":57:36)
+#loc54 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:25)
+#loc55 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:37)
+#loc56 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:4)
+#loc58 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc59 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":73:20)
+#loc60 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc61 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc62 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc63 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc64 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:36)
+#loc65 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc66 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc67 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:11)
+#loc68 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:4)
+#loc70 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:29)
+#loc72 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:11)
+#loc73 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:4)
+#loc75 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":110:15)
+#loc76 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":111:19)
+#loc77 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":111:7)
+#loc78 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:21)
+#loc79 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:16)
+#loc80 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:29)
+#loc81 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:11)
+#loc82 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:4)
+#loc84 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:29)
+#loc85 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:11)
+#loc86 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:4)
+#loc88 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:30)
+#loc89 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:15)
+#loc90 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:11)
+#loc91 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:4)
+#loc92 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":118:0)
+#loc93 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:31)
+#loc94 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:11)
+#loc95 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:4)
+#loc97 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc98 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:11)
+#loc99 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:4)
+#loc101 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc102 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:11)
+#loc103 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:4)
+#loc112 = loc("r0_numel"(#loc1))
+#loc113 = loc("xoffset"(#loc2))
+#loc114 = loc("xoffset"(#loc3))
+#loc115 = loc("xindex"(#loc4))
+#loc116 = loc("xindex"(#loc5))
+#loc117 = loc("xindex"(#loc6))
+#loc118 = loc("xmask"(#loc7))
+#loc119 = loc("r0_index"(#loc8))
+#loc120 = loc("r0_index"(#loc9))
+#loc121 = loc("r0_offset"(#loc10))
+#loc122 = loc("r0_mask"(#loc11))
+#loc123 = loc("x2"(#loc12))
+#loc124 = loc("x3"(#loc13))
+#loc125 = loc("tmp0"(#loc14))
+#loc126 = loc("tmp0"(#loc15))
+#loc127 = loc("tmp0"(#loc16))
+#loc128 = loc("tmp0"(#loc17))
+#loc129 = loc("tmp0"(#loc18))
+#loc130 = loc("tmp5"(#loc19))
+#loc131 = loc("tmp5"(#loc20))
+#loc132 = loc("tmp5"(#loc21))
+#loc133 = loc("tmp5"(#loc22))
+#loc134 = loc("tmp5"(#loc23))
+#loc135 = loc("tmp3"(#loc24))
+#loc136 = loc("tmp4"(#loc25))
+#loc137 = loc("tmp4"(#loc26))
+#loc138 = loc("tmp6"(#loc27))
+#loc139 = loc("tmp7"(#loc28))
+#loc140 = loc("tmp8"(#loc29))
+#loc141 = loc("tmp9"(#loc30))
+#loc142 = loc("tmp10"(#loc31))
+#loc143 = loc("tmp11"(#loc32))
+#loc144 = loc("tmp12"(#loc33))
+#loc145 = loc("tmp15"(#loc34))
+#loc146 = loc("tmp16"(#loc35))
+#loc147 = loc("tmp16"(#loc36))
+#loc148 = loc("tmp17"(#loc37))
+#loc149 = loc("tmp18"(#loc38))
+#loc150 = loc("tmp19"(#loc39))
+#loc151 = loc("tmp20"(#loc40))
+#loc152 = loc("tmp21"(#loc41))
+#loc153 = loc("tmp22"(#loc42))
+#loc156 = loc("quot"(#loc58))
+#loc157 = loc("remainder"(#loc59))
+#loc158 = loc("fixed"(#loc60))
+#loc159 = loc("fixed"(#loc61))
+#loc160 = loc("fixed"(#loc62))
+#loc164 = loc("mask"(#loc75))
+#loc165 = loc("mask"(#loc78))
+#loc166 = loc("mask"(#loc79))
+#loc172 = loc("mask"(#loc164))
+#loc173 = loc("mask"(#loc166))

progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.ttgir

@@ -0,0 +1,239 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [32, 1], warpsPerCTA = [4, 2], order = [0, 1]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [4, 1], threadsPerWarp = [32, 1], warpsPerCTA = [1, 8], order = [0, 1]}>
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":18:0)
+#loc1 = loc(unknown)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":39:37)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":49:26)
+#loc61 = loc("in_ptr0"(#loc))
+#loc62 = loc("in_ptr1"(#loc))
+#loc63 = loc("out_ptr0"(#loc))
+#loc64 = loc("out_ptr1"(#loc))
+#loc65 = loc("out_ptr2"(#loc))
+#loc66 = loc("ks0"(#loc))
+#loc67 = loc("xnumel"(#loc))
+#loc68 = loc("r0_numel"(#loc))
+#loc89 = loc("tmp4"(#loc27))
+#loc100 = loc("tmp16"(#loc40))
+#loc116 = loc(callsite(#loc1 at #loc89))
+#loc120 = loc(callsite(#loc1 at #loc100))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 8 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_per_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %out_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %ks0: i64 loc("ks0"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<128x1xi64, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<0> : tensor<128x1xi32, #blocked> loc(#loc1)
+    %cst_1 = arith.constant dense<1> : tensor<128x1xi64, #blocked> loc(#loc1)
+    %c32_i64 = arith.constant 32 : i64 loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %c0_i64 = arith.constant 0 : i64 loc(#loc1)
+    %c1_i64 = arith.constant 1 : i64 loc(#loc1)
+    %cst_2 = arith.constant dense<0.693147182> : tensor<128x1xf32, #blocked1> loc(#loc1)
+    %cst_3 = arith.constant dense<1.000000e+00> : tensor<128x1xf32, #blocked1> loc(#loc1)
+    %cst_4 = arith.constant dense<0xFF800000> : tensor<128x1xf32, #blocked1> loc(#loc1)
+    %cst_5 = arith.constant dense<0xFF800000> : tensor<128x32xf32, #blocked1> loc(#loc1)
+    %cst_6 = arith.constant dense<0.000000e+00> : tensor<128x32xf32, #blocked1> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc69)
+    %xoffset_7 = arith.muli %xoffset, %c128_i32 : i32 loc(#loc70)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc71)
+    %xindex_8 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc71)
+    %xindex_9 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128x1xi32, #blocked1> loc(#loc71)
+    %xindex_10 = tt.expand_dims %xindex_8 {axis = 1 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xi32, #blocked> loc(#loc71)
+    %xindex_11 = tt.splat %xoffset_7 : i32 -> tensor<128x1xi32, #blocked1> loc(#loc72)
+    %xindex_12 = tt.splat %xoffset_7 : i32 -> tensor<128x1xi32, #blocked> loc(#loc72)
+    %xindex_13 = arith.addi %xindex_11, %xindex_9 : tensor<128x1xi32, #blocked1> loc(#loc72)
+    %xindex_14 = arith.addi %xindex_12, %xindex_10 : tensor<128x1xi32, #blocked> loc(#loc72)
+    %xmask = tt.splat %xnumel : i32 -> tensor<128x1xi32, #blocked1> loc(#loc73)
+    %xmask_15 = tt.splat %xnumel : i32 -> tensor<128x1xi32, #blocked> loc(#loc73)
+    %xmask_16 = arith.cmpi slt, %xindex_13, %xmask : tensor<128x1xi32, #blocked1> loc(#loc73)
+    %xmask_17 = arith.cmpi slt, %xindex_14, %xmask_15 : tensor<128x1xi32, #blocked> loc(#loc73)
+    %r0_index = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked1}>> loc(#loc74)
+    %r0_index_18 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked1}>> -> tensor<1x32xi32, #blocked1> loc(#loc74)
+    %x2 = arith.extsi %xindex_13 : tensor<128x1xi32, #blocked1> to tensor<128x1xi64, #blocked1> loc(#loc75)
+    %x2_19 = arith.extsi %xindex_14 : tensor<128x1xi32, #blocked> to tensor<128x1xi64, #blocked> loc(#loc75)
+    %x2_20 = tt.splat %ks0 : i64 -> tensor<128x1xi64, #blocked> loc(#loc75)
+    %x2_21 = arith.remsi %x2_19, %x2_20 : tensor<128x1xi64, #blocked> loc(#loc75)
+    %quot = arith.divsi %x2_19, %x2_20 : tensor<128x1xi64, #blocked> loc(#loc107)
+    %fixed = arith.cmpi ne, %x2_21, %cst : tensor<128x1xi64, #blocked> loc(#loc108)
+    %fixed_22 = arith.subi %quot, %cst_1 : tensor<128x1xi64, #blocked> loc(#loc109)
+    %fixed_23 = arith.select %fixed, %fixed_22, %quot : tensor<128x1xi1, #blocked>, tensor<128x1xi64, #blocked> loc(#loc110)
+    %x3 = arith.cmpi slt, %xindex_14, %cst_0 : tensor<128x1xi32, #blocked> loc(#loc111)
+    %x3_24 = arith.cmpi slt, %ks0, %c0_i64 : i64 loc(#loc112)
+    %x3_25 = tt.splat %x3_24 : i1 -> tensor<128x1xi1, #blocked> loc(#loc113)
+    %x3_26 = arith.cmpi ne, %x3, %x3_25 : tensor<128x1xi1, #blocked> loc(#loc113)
+    %x3_27 = arith.select %x3_26, %fixed_23, %quot : tensor<128x1xi1, #blocked>, tensor<128x1xi64, #blocked> loc(#loc114)
+    %tmp0 = arith.muli %ks0, %c32_i64 : i64 loc(#loc81)
+    %tmp0_28 = arith.extsi %r0_index_18 : tensor<1x32xi32, #blocked1> to tensor<1x32xi64, #blocked1> loc(#loc82)
+    %tmp0_29 = tt.splat %tmp0 : i64 -> tensor<1x32xi64, #blocked1> loc(#loc82)
+    %tmp0_30 = arith.muli %tmp0_29, %tmp0_28 : tensor<1x32xi64, #blocked1> loc(#loc82)
+    %tmp0_31 = tt.broadcast %x2 : tensor<128x1xi64, #blocked1> -> tensor<128x32xi64, #blocked1> loc(#loc83)
+    %tmp0_32 = tt.broadcast %tmp0_30 : tensor<1x32xi64, #blocked1> -> tensor<128x32xi64, #blocked1> loc(#loc83)
+    %tmp0_33 = arith.addi %tmp0_31, %tmp0_32 : tensor<128x32xi64, #blocked1> loc(#loc83)
+    %tmp0_34 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>, #blocked1> loc(#loc84)
+    %tmp0_35 = tt.addptr %tmp0_34, %tmp0_33 : tensor<128x32x!tt.ptr<f32>, #blocked1>, tensor<128x32xi64, #blocked1> loc(#loc84)
+    %tmp0_36 = tt.broadcast %xmask_16 : tensor<128x1xi1, #blocked1> -> tensor<128x32xi1, #blocked1> loc(#loc85)
+    %tmp0_37 = tt.load %tmp0_35, %tmp0_36, %cst_6 : tensor<128x32x!tt.ptr<f32>, #blocked1> loc(#loc85)
+    %tmp5 = tt.splat %in_ptr1 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>, #blocked1> loc(#loc86)
+    %tmp5_38 = tt.addptr %tmp5, %tmp0_33 : tensor<128x32x!tt.ptr<f32>, #blocked1>, tensor<128x32xi64, #blocked1> loc(#loc86)
+    %tmp5_39 = tt.load %tmp5_38, %tmp0_36, %cst_6 : tensor<128x32x!tt.ptr<f32>, #blocked1> loc(#loc87)
+    %tmp3 = arith.select %tmp0_36, %tmp0_37, %cst_5 : tensor<128x32xi1, #blocked1>, tensor<128x32xf32, #blocked1> loc(#loc88)
+    %tmp4 = "tt.reduce"(%tmp3) <{axis = 1 : i32}> ({
+    ^bb0(%tmp4_48: f32 loc(callsite(#loc1 at #loc89)), %tmp4_49: f32 loc(callsite(#loc1 at #loc89))):
+      %mask = arith.cmpf ogt, %tmp4_48, %tmp4_49 : f32 loc(#loc121)
+      %mask_50 = arith.cmpf une, %tmp4_48, %tmp4_48 : f32 loc(#loc122)
+      %mask_51 = arith.ori %mask, %mask_50 : i1 loc(#loc123)
+      %tmp4_52 = arith.select %mask_51, %tmp4_48, %tmp4_49 : f32 loc(#loc124)
+      tt.reduce.return %tmp4_52 : f32 loc(#loc115)
+    }) : (tensor<128x32xf32, #blocked1>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc115)
+    %tmp4_40 = ttg.convert_layout %tmp4 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc93)
+    %tmp4_41 = tt.expand_dims %tmp4_40 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xf32, #blocked> loc(#loc93)
+    %tmp4_42 = tt.expand_dims %tmp4 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128x1xf32, #blocked1> loc(#loc93)
+    %tmp7 = arith.cmpf oeq, %tmp4_42, %cst_4 : tensor<128x1xf32, #blocked1> loc(#loc94)
+    %tmp8 = tt.broadcast %tmp4_42 : tensor<128x1xf32, #blocked1> -> tensor<128x32xf32, #blocked1> loc(#loc95)
+    %tmp8_43 = arith.subf %tmp0_37, %tmp8 : tensor<128x32xf32, #blocked1> loc(#loc95)
+    %tmp10 = tt.broadcast %tmp7 : tensor<128x1xi1, #blocked1> -> tensor<128x32xi1, #blocked1> loc(#loc96)
+    %tmp10_44 = arith.select %tmp10, %cst_6, %tmp8_43 : tensor<128x32xi1, #blocked1>, tensor<128x32xf32, #blocked1> loc(#loc96)
+    %tmp11 = tt.extern_elementwise %tmp10_44 {libname = "", libpath = "", pure = true, symbol = "__nv_exp2f"} : (tensor<128x32xf32, #blocked1>) -> tensor<128x32xf32, #blocked1> loc(#loc97)
+    %tmp12 = arith.mulf %tmp5_39, %tmp11 : tensor<128x32xf32, #blocked1> loc(#loc98)
+    %tmp15 = arith.select %tmp0_36, %tmp12, %cst_6 : tensor<128x32xi1, #blocked1>, tensor<128x32xf32, #blocked1> loc(#loc99)
+    %tmp16 = "tt.reduce"(%tmp15) <{axis = 1 : i32}> ({
+    ^bb0(%tmp16_48: f32 loc(callsite(#loc1 at #loc100)), %tmp16_49: f32 loc(callsite(#loc1 at #loc100))):
+      %tmp16_50 = arith.addf %tmp16_48, %tmp16_49 : f32 loc(#loc125)
+      tt.reduce.return %tmp16_50 : f32 loc(#loc119)
+    }) : (tensor<128x32xf32, #blocked1>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc119)
+    %tmp16_45 = ttg.convert_layout %tmp16 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc101)
+    %tmp16_46 = tt.expand_dims %tmp16_45 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xf32, #blocked> loc(#loc101)
+    %tmp16_47 = tt.expand_dims %tmp16 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128x1xf32, #blocked1> loc(#loc101)
+    %tmp18 = arith.select %tmp7, %cst_3, %tmp16_47 : tensor<128x1xi1, #blocked1>, tensor<128x1xf32, #blocked1> loc(#loc102)
+    %tmp19 = tt.extern_elementwise %tmp18 {libname = "", libpath = "", pure = true, symbol = "__nv_log2f"} : (tensor<128x1xf32, #blocked1>) -> tensor<128x1xf32, #blocked1> loc(#loc103)
+    %tmp20 = arith.addf %tmp19, %tmp4_42 : tensor<128x1xf32, #blocked1> loc(#loc104)
+    %tmp22 = arith.mulf %tmp20, %cst_2 : tensor<128x1xf32, #blocked1> loc(#loc105)
+    %0 = arith.cmpi sle, %ks0, %c1_i64 : i64 loc(#loc47)
+    %1 = arith.cmpi sgt, %ks0, %c1_i64 : i64 loc(#loc48)
+    %2 = arith.extui %1 : i1 to i64 loc(#loc49)
+    %3 = arith.muli %ks0, %2 : i64 loc(#loc49)
+    %4 = arith.extui %0 : i1 to i64 loc(#loc106)
+    %5 = arith.addi %4, %3 : i64 loc(#loc50)
+    %6 = tt.splat %5 : i64 -> tensor<128x1xi64, #blocked> loc(#loc52)
+    %7 = arith.muli %x3_27, %6 : tensor<128x1xi64, #blocked> loc(#loc52)
+    %8 = arith.addi %x2_21, %7 : tensor<128x1xi64, #blocked> loc(#loc53)
+    %9 = tt.splat %out_ptr2 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>, #blocked> loc(#loc54)
+    %10 = tt.addptr %9, %8 : tensor<128x1x!tt.ptr<f32>, #blocked>, tensor<128x1xi64, #blocked> loc(#loc54)
+    %11 = ttg.convert_layout %tmp22 : tensor<128x1xf32, #blocked1> -> tensor<128x1xf32, #blocked> loc(#loc55)
+    tt.store %10, %11, %xmask_17 : tensor<128x1x!tt.ptr<f32>, #blocked> loc(#loc55)
+    %12 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>, #blocked> loc(#loc56)
+    %13 = tt.addptr %12, %xindex_14 : tensor<128x1x!tt.ptr<f32>, #blocked>, tensor<128x1xi32, #blocked> loc(#loc56)
+    tt.store %13, %tmp4_41, %xmask_17 : tensor<128x1x!tt.ptr<f32>, #blocked> loc(#loc57)
+    %14 = tt.splat %out_ptr1 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>, #blocked> loc(#loc58)
+    %15 = tt.addptr %14, %xindex_14 : tensor<128x1x!tt.ptr<f32>, #blocked>, tensor<128x1xi32, #blocked> loc(#loc58)
+    tt.store %15, %tmp16_46, %xmask_17 : tensor<128x1x!tt.ptr<f32>, #blocked> loc(#loc59)
+    tt.return loc(#loc60)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":23:28)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":23:33)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:44)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:23)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":25:21)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":26:38)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":33:19)
+#loc9 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":34:51)
+#loc11 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc12 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc13 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc14 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc15 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:36)
+#loc16 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc17 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:38)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:42)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:35)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:30)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:49)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:30)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:49)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":38:33)
+#loc26 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:29)
+#loc28 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":110:15)
+#loc29 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:21)
+#loc30 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:16)
+#loc31 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:29)
+#loc32 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":39:40)
+#loc33 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":41:19)
+#loc34 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":42:18)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":44:33)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":45:27)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":46:19)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":48:35)
+#loc39 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc41 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":49:29)
+#loc43 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":51:34)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":52:27)
+#loc45 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":53:20)
+#loc46 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":55:20)
+#loc47 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:49)
+#loc48 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:75)
+#loc49 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:66)
+#loc50 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:57)
+#loc51 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:41)
+#loc52 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:34)
+#loc53 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:30)
+#loc54 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:25)
+#loc55 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:89)
+#loc56 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":57:25)
+#loc57 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":57:36)
+#loc58 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:25)
+#loc59 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:37)
+#loc60 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:4)
+#loc69 = loc("xoffset"(#loc2))
+#loc70 = loc("xoffset"(#loc3))
+#loc71 = loc("xindex"(#loc4))
+#loc72 = loc("xindex"(#loc5))
+#loc73 = loc("xmask"(#loc6))
+#loc74 = loc("r0_index"(#loc7))
+#loc75 = loc("x2"(#loc8))
+#loc76 = loc("quot"(#loc9))
+#loc77 = loc("x3"(#loc10))
+#loc78 = loc("fixed"(#loc11))
+#loc79 = loc("fixed"(#loc12))
+#loc80 = loc("fixed"(#loc13))
+#loc81 = loc("tmp0"(#loc18))
+#loc82 = loc("tmp0"(#loc19))
+#loc83 = loc("tmp0"(#loc20))
+#loc84 = loc("tmp0"(#loc21))
+#loc85 = loc("tmp0"(#loc22))
+#loc86 = loc("tmp5"(#loc23))
+#loc87 = loc("tmp5"(#loc24))
+#loc88 = loc("tmp3"(#loc25))
+#loc90 = loc("mask"(#loc28))
+#loc91 = loc("mask"(#loc29))
+#loc92 = loc("mask"(#loc30))
+#loc93 = loc("tmp4"(#loc32))
+#loc94 = loc("tmp7"(#loc33))
+#loc95 = loc("tmp8"(#loc34))
+#loc96 = loc("tmp10"(#loc35))
+#loc97 = loc("tmp11"(#loc36))
+#loc98 = loc("tmp12"(#loc37))
+#loc99 = loc("tmp15"(#loc38))
+#loc101 = loc("tmp16"(#loc42))
+#loc102 = loc("tmp18"(#loc43))
+#loc103 = loc("tmp19"(#loc44))
+#loc104 = loc("tmp20"(#loc45))
+#loc105 = loc("tmp22"(#loc46))
+#loc106 = loc(fused[#loc50, #loc51])
+#loc107 = loc(callsite(#loc76 at #loc77))
+#loc108 = loc(callsite(#loc78 at #loc77))
+#loc109 = loc(callsite(#loc79 at #loc77))
+#loc110 = loc(callsite(#loc80 at #loc77))
+#loc111 = loc(callsite(#loc14 at #loc77))
+#loc112 = loc(callsite(#loc15 at #loc77))
+#loc113 = loc(callsite(#loc16 at #loc77))
+#loc114 = loc(callsite(#loc17 at #loc77))
+#loc115 = loc(callsite(#loc26 at #loc89))
+#loc117 = loc("mask"(#loc90))
+#loc118 = loc("mask"(#loc92))
+#loc119 = loc(callsite(#loc39 at #loc100))
+#loc121 = loc(callsite(#loc117 at #loc115))
+#loc122 = loc(callsite(#loc91 at #loc115))
+#loc123 = loc(callsite(#loc118 at #loc115))
+#loc124 = loc(callsite(#loc31 at #loc115))
+#loc125 = loc(callsite(#loc41 at #loc119))

progress/SpecForge/cache/compiled_kernels/triton/3/25EJS5K5XTRHFZ4RQBPDWY7APVK52Y4IKRJWVKO66CD6SDLYFUWQ/triton_per_fused_mul_1.ttir

@@ -0,0 +1,229 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":18:0)
+#loc6 = loc(unknown)
+#loc32 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":39:37)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":49:26)
+#loc63 = loc("in_ptr0"(#loc))
+#loc64 = loc("in_ptr1"(#loc))
+#loc65 = loc("out_ptr0"(#loc))
+#loc66 = loc("out_ptr1"(#loc))
+#loc67 = loc("out_ptr2"(#loc))
+#loc68 = loc("ks0"(#loc))
+#loc69 = loc("xnumel"(#loc))
+#loc70 = loc("r0_numel"(#loc))
+#loc96 = loc("tmp4"(#loc32))
+#loc106 = loc("tmp16"(#loc44))
+#loc120 = loc(callsite(#loc6 at #loc96))
+#loc124 = loc(callsite(#loc6 at #loc106))
+module {
+  tt.func public @triton_per_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %out_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %ks0: i64 loc("ks0"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %fixed = arith.constant dense<1> : tensor<128x1xi64> loc(#loc111)
+    %x3 = arith.constant dense<0> : tensor<128x1xi32> loc(#loc112)
+    %fixed_0 = arith.constant dense<0> : tensor<128x1xi64> loc(#loc113)
+    %x3_1 = arith.constant 0 : i64 loc(#loc114)
+    %c1_i64 = arith.constant 1 : i64 loc(#loc6)
+    %tmp22 = arith.constant dense<0.693147182> : tensor<128x1xf32> loc(#loc74)
+    %tmp18 = arith.constant dense<1.000000e+00> : tensor<128x1xf32> loc(#loc75)
+    %tmp7 = arith.constant dense<0xFF800000> : tensor<128x1xf32> loc(#loc76)
+    %tmp3 = arith.constant dense<0xFF800000> : tensor<128x32xf32> loc(#loc77)
+    %cst = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc6)
+    %c32_i64 = arith.constant 32 : i64 loc(#loc6)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc6)
+    %xoffset = tt.get_program_id x : i32 loc(#loc78)
+    %xoffset_2 = arith.muli %xoffset, %c128_i32 : i32 loc(#loc79)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc80)
+    %xindex_3 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32> loc(#loc81)
+    %xindex_4 = tt.splat %xoffset_2 : i32 -> tensor<128x1xi32> loc(#loc82)
+    %xindex_5 = arith.addi %xindex_4, %xindex_3 : tensor<128x1xi32> loc(#loc82)
+    %xmask = tt.splat %xnumel : i32 -> tensor<128x1xi32> loc(#loc83)
+    %xmask_6 = arith.cmpi slt, %xindex_5, %xmask : tensor<128x1xi32> loc(#loc83)
+    %r0_index = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc84)
+    %r0_index_7 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<32xi32> -> tensor<1x32xi32> loc(#loc85)
+    %x2 = arith.extsi %xindex_5 : tensor<128x1xi32> to tensor<128x1xi64> loc(#loc86)
+    %x2_8 = tt.splat %ks0 : i64 -> tensor<128x1xi64> loc(#loc86)
+    %x2_9 = arith.remsi %x2, %x2_8 : tensor<128x1xi64> loc(#loc86)
+    %quot = arith.divsi %x2, %x2_8 : tensor<128x1xi64> loc(#loc115)
+    %fixed_10 = arith.cmpi ne, %x2_9, %fixed_0 : tensor<128x1xi64> loc(#loc113)
+    %fixed_11 = arith.subi %quot, %fixed : tensor<128x1xi64> loc(#loc111)
+    %fixed_12 = arith.select %fixed_10, %fixed_11, %quot : tensor<128x1xi1>, tensor<128x1xi64> loc(#loc116)
+    %x3_13 = arith.cmpi slt, %xindex_5, %x3 : tensor<128x1xi32> loc(#loc112)
+    %x3_14 = arith.cmpi slt, %ks0, %x3_1 : i64 loc(#loc114)
+    %x3_15 = tt.splat %x3_14 : i1 -> tensor<128x1xi1> loc(#loc117)
+    %x3_16 = arith.cmpi ne, %x3_13, %x3_15 : tensor<128x1xi1> loc(#loc117)
+    %x3_17 = arith.select %x3_16, %fixed_12, %quot : tensor<128x1xi1>, tensor<128x1xi64> loc(#loc118)
+    %tmp0 = arith.muli %ks0, %c32_i64 : i64 loc(#loc89)
+    %tmp0_18 = arith.extsi %r0_index_7 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc90)
+    %tmp0_19 = tt.splat %tmp0 : i64 -> tensor<1x32xi64> loc(#loc90)
+    %tmp0_20 = arith.muli %tmp0_19, %tmp0_18 : tensor<1x32xi64> loc(#loc90)
+    %tmp0_21 = tt.broadcast %x2 : tensor<128x1xi64> -> tensor<128x32xi64> loc(#loc91)
+    %tmp0_22 = tt.broadcast %tmp0_20 : tensor<1x32xi64> -> tensor<128x32xi64> loc(#loc91)
+    %tmp0_23 = arith.addi %tmp0_21, %tmp0_22 : tensor<128x32xi64> loc(#loc91)
+    %tmp0_24 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc92)
+    %tmp0_25 = tt.addptr %tmp0_24, %tmp0_23 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi64> loc(#loc92)
+    %tmp0_26 = tt.broadcast %xmask_6 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc93)
+    %tmp0_27 = tt.load %tmp0_25, %tmp0_26, %cst : tensor<128x32x!tt.ptr<f32>> loc(#loc93)
+    %tmp5 = tt.splat %in_ptr1 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc94)
+    %tmp5_28 = tt.addptr %tmp5, %tmp0_23 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi64> loc(#loc94)
+    %tmp5_29 = tt.load %tmp5_28, %tmp0_26, %cst : tensor<128x32x!tt.ptr<f32>> loc(#loc95)
+    %tmp3_30 = arith.select %tmp0_26, %tmp0_27, %tmp3 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc77)
+    %tmp4 = "tt.reduce"(%tmp3_30) <{axis = 1 : i32}> ({
+    ^bb0(%tmp4_38: f32 loc(callsite(#loc6 at #loc96)), %tmp4_39: f32 loc(callsite(#loc6 at #loc96))):
+      %mask = arith.cmpf ogt, %tmp4_38, %tmp4_39 : f32 loc(#loc125)
+      %mask_40 = arith.cmpf une, %tmp4_38, %tmp4_38 : f32 loc(#loc126)
+      %mask_41 = arith.ori %mask, %mask_40 : i1 loc(#loc127)
+      %tmp4_42 = arith.select %mask_41, %tmp4_38, %tmp4_39 : f32 loc(#loc128)
+      tt.reduce.return %tmp4_42 : f32 loc(#loc119)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc119)
+    %tmp4_31 = tt.expand_dims %tmp4 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc100)
+    %tmp7_32 = arith.cmpf oeq, %tmp4_31, %tmp7 : tensor<128x1xf32> loc(#loc76)
+    %tmp8 = tt.broadcast %tmp4_31 : tensor<128x1xf32> -> tensor<128x32xf32> loc(#loc101)
+    %tmp8_33 = arith.subf %tmp0_27, %tmp8 : tensor<128x32xf32> loc(#loc101)
+    %tmp10 = tt.broadcast %tmp7_32 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc102)
+    %tmp10_34 = arith.select %tmp10, %cst, %tmp8_33 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc102)
+    %tmp11 = tt.extern_elementwise %tmp10_34 {libname = "", libpath = "", pure = true, symbol = "__nv_exp2f"} : (tensor<128x32xf32>) -> tensor<128x32xf32> loc(#loc103)
+    %tmp12 = arith.mulf %tmp5_29, %tmp11 : tensor<128x32xf32> loc(#loc104)
+    %tmp15 = arith.select %tmp0_26, %tmp12, %cst : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc105)
+    %tmp16 = "tt.reduce"(%tmp15) <{axis = 1 : i32}> ({
+    ^bb0(%tmp16_38: f32 loc(callsite(#loc6 at #loc106)), %tmp16_39: f32 loc(callsite(#loc6 at #loc106))):
+      %tmp16_40 = arith.addf %tmp16_38, %tmp16_39 : f32 loc(#loc129)
+      tt.reduce.return %tmp16_40 : f32 loc(#loc123)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc123)
+    %tmp16_35 = tt.expand_dims %tmp16 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc107)
+    %tmp18_36 = arith.select %tmp7_32, %tmp18, %tmp16_35 : tensor<128x1xi1>, tensor<128x1xf32> loc(#loc75)
+    %tmp19 = tt.extern_elementwise %tmp18_36 {libname = "", libpath = "", pure = true, symbol = "__nv_log2f"} : (tensor<128x1xf32>) -> tensor<128x1xf32> loc(#loc108)
+    %tmp20 = arith.addf %tmp19, %tmp4_31 : tensor<128x1xf32> loc(#loc109)
+    %tmp22_37 = arith.mulf %tmp20, %tmp22 : tensor<128x1xf32> loc(#loc74)
+    %0 = arith.cmpi sle, %ks0, %c1_i64 : i64 loc(#loc49)
+    %1 = arith.cmpi sgt, %ks0, %c1_i64 : i64 loc(#loc50)
+    %2 = arith.extui %1 : i1 to i64 loc(#loc51)
+    %3 = arith.muli %ks0, %2 : i64 loc(#loc51)
+    %4 = arith.extui %0 : i1 to i64 loc(#loc110)
+    %5 = arith.addi %4, %3 : i64 loc(#loc52)
+    %6 = tt.splat %5 : i64 -> tensor<128x1xi64> loc(#loc54)
+    %7 = arith.muli %x3_17, %6 : tensor<128x1xi64> loc(#loc54)
+    %8 = arith.addi %x2_9, %7 : tensor<128x1xi64> loc(#loc55)
+    %9 = tt.splat %out_ptr2 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc56)
+    %10 = tt.addptr %9, %8 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi64> loc(#loc56)
+    tt.store %10, %tmp22_37, %xmask_6 : tensor<128x1x!tt.ptr<f32>> loc(#loc57)
+    %11 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc58)
+    %12 = tt.addptr %11, %xindex_5 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc58)
+    tt.store %12, %tmp4_31, %xmask_6 : tensor<128x1x!tt.ptr<f32>> loc(#loc59)
+    %13 = tt.splat %out_ptr1 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc60)
+    %14 = tt.addptr %13, %xindex_5 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc60)
+    tt.store %14, %tmp16_35, %xmask_6 : tensor<128x1x!tt.ptr<f32>> loc(#loc61)
+    tt.return loc(#loc62)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":34:51)
+#loc3 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc4 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc5 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:36)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":55:20)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":51:34)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":41:19)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":38:33)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":23:28)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":23:33)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:36)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:44)
+#loc15 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":24:23)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":25:21)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":26:28)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":26:38)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":33:19)
+#loc20 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc21 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc22 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc23 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:38)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:42)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:35)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:30)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":35:49)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:30)
+#loc30 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":36:49)
+#loc31 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:29)
+#loc33 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":110:15)
+#loc34 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:21)
+#loc35 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:16)
+#loc36 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:29)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":39:40)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":42:18)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":44:33)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":45:27)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":46:19)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":48:35)
+#loc43 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc45 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc46 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":49:29)
+#loc47 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":52:27)
+#loc48 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":53:20)
+#loc49 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:49)
+#loc50 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:75)
+#loc51 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:66)
+#loc52 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:57)
+#loc53 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:41)
+#loc54 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:34)
+#loc55 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:30)
+#loc56 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:25)
+#loc57 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":56:89)
+#loc58 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":57:25)
+#loc59 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":57:36)
+#loc60 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:25)
+#loc61 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:37)
+#loc62 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/6g/c6gb52skvqs7or57vd3zu5um3r5rnmeimd5qam27l5j7uqx7t4ai.py":58:4)
+#loc71 = loc("fixed"(#loc1))
+#loc72 = loc("x3"(#loc2))
+#loc73 = loc("fixed"(#loc4))
+#loc74 = loc("tmp22"(#loc7))
+#loc75 = loc("tmp18"(#loc8))
+#loc76 = loc("tmp7"(#loc9))
+#loc77 = loc("tmp3"(#loc10))
+#loc78 = loc("xoffset"(#loc11))
+#loc79 = loc("xoffset"(#loc12))
+#loc80 = loc("xindex"(#loc13))
+#loc81 = loc("xindex"(#loc14))
+#loc82 = loc("xindex"(#loc15))
+#loc83 = loc("xmask"(#loc16))
+#loc84 = loc("r0_index"(#loc17))
+#loc85 = loc("r0_index"(#loc18))
+#loc86 = loc("x2"(#loc19))
+#loc87 = loc("quot"(#loc20))
+#loc88 = loc("fixed"(#loc21))
+#loc89 = loc("tmp0"(#loc24))
+#loc90 = loc("tmp0"(#loc25))
+#loc91 = loc("tmp0"(#loc26))
+#loc92 = loc("tmp0"(#loc27))
+#loc93 = loc("tmp0"(#loc28))
+#loc94 = loc("tmp5"(#loc29))
+#loc95 = loc("tmp5"(#loc30))
+#loc97 = loc("mask"(#loc33))
+#loc98 = loc("mask"(#loc34))
+#loc99 = loc("mask"(#loc35))
+#loc100 = loc("tmp4"(#loc37))
+#loc101 = loc("tmp8"(#loc38))
+#loc102 = loc("tmp10"(#loc39))
+#loc103 = loc("tmp11"(#loc40))
+#loc104 = loc("tmp12"(#loc41))
+#loc105 = loc("tmp15"(#loc42))
+#loc107 = loc("tmp16"(#loc46))
+#loc108 = loc("tmp19"(#loc47))
+#loc109 = loc("tmp20"(#loc48))
+#loc110 = loc(fused[#loc52, #loc53])
+#loc111 = loc(callsite(#loc71 at #loc72))
+#loc112 = loc(callsite(#loc3 at #loc72))
+#loc113 = loc(callsite(#loc73 at #loc72))
+#loc114 = loc(callsite(#loc5 at #loc72))
+#loc115 = loc(callsite(#loc87 at #loc72))
+#loc116 = loc(callsite(#loc88 at #loc72))
+#loc117 = loc(callsite(#loc22 at #loc72))
+#loc118 = loc(callsite(#loc23 at #loc72))
+#loc119 = loc(callsite(#loc31 at #loc96))
+#loc121 = loc("mask"(#loc97))
+#loc122 = loc("mask"(#loc99))
+#loc123 = loc(callsite(#loc43 at #loc106))
+#loc125 = loc(callsite(#loc121 at #loc119))
+#loc126 = loc(callsite(#loc98 at #loc119))
+#loc127 = loc(callsite(#loc122 at #loc119))
+#loc128 = loc(callsite(#loc36 at #loc119))
+#loc129 = loc(callsite(#loc45 at #loc123))

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/__grp__triton_per_fused_mul_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_per_fused_mul_1.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.source", "triton_per_fused_mul_1.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.ttir", "triton_per_fused_mul_1.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.ttgir", "triton_per_fused_mul_1.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.llir", "triton_per_fused_mul_1.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.ptx", "triton_per_fused_mul_1.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.cubin", "triton_per_fused_mul_1.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.json

@@ -0,0 +1 @@
+{"hash": "d19f7e1f5112e04ae9684d9eaed78131e8170528d968c7a32a827e26077c74c0", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 8, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 4096, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_per_fused_mul_1"}

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.llir

@@ -0,0 +1,1153 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external addrspace(3) global [0 x i8], align 16
+@.str = private unnamed_addr constant [11 x i8] c"__CUDA_FTZ\00", align 1
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_per_fused_mul_1(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, i32 %5, i32 %6, ptr addrspace(1) readnone captures(none) %7, ptr addrspace(1) readnone captures(none) %8) local_unnamed_addr #0 !dbg !5 {
+  %10 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !8
+  %11 = shl i32 %10, 7, !dbg !9
+  %12 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !10
+  %13 = lshr i32 %12, 5, !dbg !10
+  %14 = and i32 %12, 31, !dbg !10
+  %15 = shl nuw nsw i32 %14, 2, !dbg !10
+  %16 = or disjoint i32 %15, %11, !dbg !11
+  %17 = icmp slt i32 %16, 1536, !dbg !12
+  %18 = and i32 %13, 7, !dbg !13
+  %19 = or i32 %13, 24, !dbg !13
+  %20 = mul nuw nsw i32 %18, 1536, !dbg !14
+  %21 = add nuw nsw i32 %20, 12288, !dbg !14
+  %22 = add nuw nsw i32 %20, 24576, !dbg !14
+  %23 = mul nuw nsw i32 %19, 1536, !dbg !14
+  %24 = add i32 %16, %20, !dbg !15
+  %25 = add i32 %21, %16, !dbg !15
+  %26 = add i32 %22, %16, !dbg !15
+  %27 = add i32 %16, %23, !dbg !15
+  %28 = sext i32 %24 to i64, !dbg !16
+  %29 = getelementptr float, ptr addrspace(1) %0, i64 %28, !dbg !16
+  %30 = sext i32 %25 to i64, !dbg !16
+  %31 = getelementptr float, ptr addrspace(1) %0, i64 %30, !dbg !16
+  %32 = sext i32 %26 to i64, !dbg !16
+  %33 = getelementptr float, ptr addrspace(1) %0, i64 %32, !dbg !16
+  %34 = sext i32 %27 to i64, !dbg !16
+  %35 = getelementptr float, ptr addrspace(1) %0, i64 %34, !dbg !16
+  %36 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %29, i1 %17) #6, !dbg !17
+  %37 = extractvalue { i32, i32, i32, i32 } %36, 0, !dbg !17
+  %38 = extractvalue { i32, i32, i32, i32 } %36, 1, !dbg !17
+  %39 = extractvalue { i32, i32, i32, i32 } %36, 2, !dbg !17
+  %40 = extractvalue { i32, i32, i32, i32 } %36, 3, !dbg !17
+  %41 = bitcast i32 %37 to float, !dbg !17
+  %42 = bitcast i32 %38 to float, !dbg !17
+  %43 = bitcast i32 %39 to float, !dbg !17
+  %44 = bitcast i32 %40 to float, !dbg !17
+  %45 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %31, i1 %17) #6, !dbg !17
+  %46 = extractvalue { i32, i32, i32, i32 } %45, 0, !dbg !17
+  %47 = extractvalue { i32, i32, i32, i32 } %45, 1, !dbg !17
+  %48 = extractvalue { i32, i32, i32, i32 } %45, 2, !dbg !17
+  %49 = extractvalue { i32, i32, i32, i32 } %45, 3, !dbg !17
+  %50 = bitcast i32 %46 to float, !dbg !17
+  %51 = bitcast i32 %47 to float, !dbg !17
+  %52 = bitcast i32 %48 to float, !dbg !17
+  %53 = bitcast i32 %49 to float, !dbg !17
+  %54 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %33, i1 %17) #6, !dbg !17
+  %55 = extractvalue { i32, i32, i32, i32 } %54, 0, !dbg !17
+  %56 = extractvalue { i32, i32, i32, i32 } %54, 1, !dbg !17
+  %57 = extractvalue { i32, i32, i32, i32 } %54, 2, !dbg !17
+  %58 = extractvalue { i32, i32, i32, i32 } %54, 3, !dbg !17
+  %59 = bitcast i32 %55 to float, !dbg !17
+  %60 = bitcast i32 %56 to float, !dbg !17
+  %61 = bitcast i32 %57 to float, !dbg !17
+  %62 = bitcast i32 %58 to float, !dbg !17
+  %63 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %35, i1 %17) #6, !dbg !17
+  %64 = extractvalue { i32, i32, i32, i32 } %63, 0, !dbg !17
+  %65 = extractvalue { i32, i32, i32, i32 } %63, 1, !dbg !17
+  %66 = extractvalue { i32, i32, i32, i32 } %63, 2, !dbg !17
+  %67 = extractvalue { i32, i32, i32, i32 } %63, 3, !dbg !17
+  %68 = bitcast i32 %64 to float, !dbg !17
+  %69 = bitcast i32 %65 to float, !dbg !17
+  %70 = bitcast i32 %66 to float, !dbg !17
+  %71 = bitcast i32 %67 to float, !dbg !17
+  %72 = getelementptr float, ptr addrspace(1) %1, i64 %28, !dbg !18
+  %73 = getelementptr float, ptr addrspace(1) %1, i64 %30, !dbg !18
+  %74 = getelementptr float, ptr addrspace(1) %1, i64 %32, !dbg !18
+  %75 = getelementptr float, ptr addrspace(1) %1, i64 %34, !dbg !18
+  %76 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %72, i1 %17) #6, !dbg !19
+  %77 = extractvalue { i32, i32, i32, i32 } %76, 0, !dbg !19
+  %78 = extractvalue { i32, i32, i32, i32 } %76, 1, !dbg !19
+  %79 = extractvalue { i32, i32, i32, i32 } %76, 2, !dbg !19
+  %80 = extractvalue { i32, i32, i32, i32 } %76, 3, !dbg !19
+  %81 = bitcast i32 %77 to float, !dbg !19
+  %82 = bitcast i32 %78 to float, !dbg !19
+  %83 = bitcast i32 %79 to float, !dbg !19
+  %84 = bitcast i32 %80 to float, !dbg !19
+  %85 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %73, i1 %17) #6, !dbg !19
+  %86 = extractvalue { i32, i32, i32, i32 } %85, 0, !dbg !19
+  %87 = extractvalue { i32, i32, i32, i32 } %85, 1, !dbg !19
+  %88 = extractvalue { i32, i32, i32, i32 } %85, 2, !dbg !19
+  %89 = extractvalue { i32, i32, i32, i32 } %85, 3, !dbg !19
+  %90 = bitcast i32 %86 to float, !dbg !19
+  %91 = bitcast i32 %87 to float, !dbg !19
+  %92 = bitcast i32 %88 to float, !dbg !19
+  %93 = bitcast i32 %89 to float, !dbg !19
+  %94 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %74, i1 %17) #6, !dbg !19
+  %95 = extractvalue { i32, i32, i32, i32 } %94, 0, !dbg !19
+  %96 = extractvalue { i32, i32, i32, i32 } %94, 1, !dbg !19
+  %97 = extractvalue { i32, i32, i32, i32 } %94, 2, !dbg !19
+  %98 = extractvalue { i32, i32, i32, i32 } %94, 3, !dbg !19
+  %99 = bitcast i32 %95 to float, !dbg !19
+  %100 = bitcast i32 %96 to float, !dbg !19
+  %101 = bitcast i32 %97 to float, !dbg !19
+  %102 = bitcast i32 %98 to float, !dbg !19
+  %103 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %75, i1 %17) #6, !dbg !19
+  %104 = extractvalue { i32, i32, i32, i32 } %103, 0, !dbg !19
+  %105 = extractvalue { i32, i32, i32, i32 } %103, 1, !dbg !19
+  %106 = extractvalue { i32, i32, i32, i32 } %103, 2, !dbg !19
+  %107 = extractvalue { i32, i32, i32, i32 } %103, 3, !dbg !19
+  %108 = bitcast i32 %104 to float, !dbg !19
+  %109 = bitcast i32 %105 to float, !dbg !19
+  %110 = bitcast i32 %106 to float, !dbg !19
+  %111 = bitcast i32 %107 to float, !dbg !19
+  %112 = select i1 %17, float %41, float 0xFFF0000000000000, !dbg !20
+  %113 = select i1 %17, float %42, float 0xFFF0000000000000, !dbg !20
+  %114 = select i1 %17, float %43, float 0xFFF0000000000000, !dbg !20
+  %115 = select i1 %17, float %44, float 0xFFF0000000000000, !dbg !20
+  %116 = select i1 %17, float %50, float 0xFFF0000000000000, !dbg !20
+  %117 = select i1 %17, float %51, float 0xFFF0000000000000, !dbg !20
+  %118 = select i1 %17, float %52, float 0xFFF0000000000000, !dbg !20
+  %119 = select i1 %17, float %53, float 0xFFF0000000000000, !dbg !20
+  %120 = select i1 %17, float %59, float 0xFFF0000000000000, !dbg !20
+  %121 = select i1 %17, float %60, float 0xFFF0000000000000, !dbg !20
+  %122 = select i1 %17, float %61, float 0xFFF0000000000000, !dbg !20
+  %123 = select i1 %17, float %62, float 0xFFF0000000000000, !dbg !20
+  %124 = select i1 %17, float %68, float 0xFFF0000000000000, !dbg !20
+  %125 = select i1 %17, float %69, float 0xFFF0000000000000, !dbg !20
+  %126 = select i1 %17, float %70, float 0xFFF0000000000000, !dbg !20
+  %127 = select i1 %17, float %71, float 0xFFF0000000000000, !dbg !20
+  %128 = fcmp ogt float %112, %116, !dbg !21
+  %129 = fcmp uno float %112, 0.000000e+00, !dbg !25
+  %130 = or i1 %129, %128, !dbg !26
+  %131 = select i1 %130, float %112, float %116, !dbg !27
+  %132 = fcmp ogt float %113, %117, !dbg !21
+  %133 = fcmp uno float %113, 0.000000e+00, !dbg !25
+  %134 = or i1 %133, %132, !dbg !26
+  %135 = select i1 %134, float %113, float %117, !dbg !27
+  %136 = fcmp ogt float %114, %118, !dbg !21
+  %137 = fcmp uno float %114, 0.000000e+00, !dbg !25
+  %138 = or i1 %137, %136, !dbg !26
+  %139 = select i1 %138, float %114, float %118, !dbg !27
+  %140 = fcmp ogt float %115, %119, !dbg !21
+  %141 = fcmp uno float %115, 0.000000e+00, !dbg !25
+  %142 = or i1 %141, %140, !dbg !26
+  %143 = select i1 %142, float %115, float %119, !dbg !27
+  %144 = fcmp ogt float %131, %120, !dbg !21
+  %145 = fcmp uno float %131, 0.000000e+00, !dbg !25
+  %146 = or i1 %144, %145, !dbg !26
+  %147 = select i1 %146, float %131, float %120, !dbg !27
+  %148 = fcmp ogt float %135, %121, !dbg !21
+  %149 = fcmp uno float %135, 0.000000e+00, !dbg !25
+  %150 = or i1 %148, %149, !dbg !26
+  %151 = select i1 %150, float %135, float %121, !dbg !27
+  %152 = fcmp ogt float %139, %122, !dbg !21
+  %153 = fcmp uno float %139, 0.000000e+00, !dbg !25
+  %154 = or i1 %152, %153, !dbg !26
+  %155 = select i1 %154, float %139, float %122, !dbg !27
+  %156 = fcmp ogt float %143, %123, !dbg !21
+  %157 = fcmp uno float %143, 0.000000e+00, !dbg !25
+  %158 = or i1 %156, %157, !dbg !26
+  %159 = select i1 %158, float %143, float %123, !dbg !27
+  %160 = fcmp ogt float %147, %124, !dbg !21
+  %161 = fcmp uno float %147, 0.000000e+00, !dbg !25
+  %162 = or i1 %160, %161, !dbg !26
+  %163 = select i1 %162, float %147, float %124, !dbg !27
+  %164 = fcmp ogt float %151, %125, !dbg !21
+  %165 = fcmp uno float %151, 0.000000e+00, !dbg !25
+  %166 = or i1 %164, %165, !dbg !26
+  %167 = select i1 %166, float %151, float %125, !dbg !27
+  %168 = fcmp ogt float %155, %126, !dbg !21
+  %169 = fcmp uno float %155, 0.000000e+00, !dbg !25
+  %170 = or i1 %168, %169, !dbg !26
+  %171 = select i1 %170, float %155, float %126, !dbg !27
+  %172 = fcmp ogt float %159, %127, !dbg !21
+  %173 = fcmp uno float %159, 0.000000e+00, !dbg !25
+  %174 = or i1 %172, %173, !dbg !26
+  %175 = select i1 %174, float %159, float %127, !dbg !27
+  %.idx = shl nuw nsw i32 %14, 7, !dbg !28
+  %176 = getelementptr i8, ptr addrspace(3) @global_smem, i32 %.idx, !dbg !28
+  %177 = getelementptr float, ptr addrspace(3) %176, i32 %18, !dbg !28
+  %178 = bitcast float %163 to <1 x i32>, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %177, <1 x i32> %178, i1 true) #6, !dbg !28
+  %179 = getelementptr i8, ptr addrspace(3) %176, i32 32, !dbg !28
+  %180 = getelementptr float, ptr addrspace(3) %179, i32 %18, !dbg !28
+  %181 = bitcast float %167 to <1 x i32>, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %180, <1 x i32> %181, i1 true) #6, !dbg !28
+  %182 = getelementptr i8, ptr addrspace(3) %176, i32 64, !dbg !28
+  %183 = getelementptr float, ptr addrspace(3) %182, i32 %18, !dbg !28
+  %184 = bitcast float %171 to <1 x i32>, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %183, <1 x i32> %184, i1 true) #6, !dbg !28
+  %185 = getelementptr i8, ptr addrspace(3) %176, i32 96, !dbg !28
+  %186 = getelementptr float, ptr addrspace(3) %185, i32 %18, !dbg !28
+  %187 = bitcast float %175 to <1 x i32>, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %186, <1 x i32> %187, i1 true) #6, !dbg !28
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !28
+  %188 = getelementptr float, ptr addrspace(3) @global_smem, i32 %12, !dbg !28
+  %189 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %188, i1 true) #6, !dbg !28
+  %190 = bitcast i32 %189 to float, !dbg !28
+  %191 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %189, i32 4, i32 31), !dbg !28
+  %192 = bitcast i32 %191 to float, !dbg !28
+  %193 = fcmp ogt float %190, %192, !dbg !21
+  %194 = fcmp uno float %190, 0.000000e+00, !dbg !25
+  %195 = or i1 %194, %193, !dbg !26
+  %196 = select i1 %195, float %190, float %192, !dbg !27
+  %197 = bitcast float %196 to i32, !dbg !28
+  %198 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %197, i32 2, i32 31), !dbg !28
+  %199 = bitcast i32 %198 to float, !dbg !28
+  %200 = fcmp ogt float %196, %199, !dbg !21
+  %201 = fcmp uno float %196, 0.000000e+00, !dbg !25
+  %202 = or i1 %200, %201, !dbg !26
+  %203 = select i1 %202, float %196, float %199, !dbg !27
+  %204 = bitcast float %203 to i32, !dbg !28
+  %205 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %204, i32 1, i32 31), !dbg !28
+  %206 = bitcast i32 %205 to float, !dbg !28
+  %207 = fcmp ogt float %203, %206, !dbg !21
+  %208 = fcmp uno float %203, 0.000000e+00, !dbg !25
+  %209 = or i1 %207, %208, !dbg !26
+  %210 = and i32 %12, 7, !dbg !28
+  %211 = icmp eq i32 %210, 0, !dbg !28
+  %212 = select i1 %209, i32 %204, i32 %205, !dbg !27
+  %213 = insertelement <1 x i32> poison, i32 %212, i64 0, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %188, <1 x i32> %213, i1 %211) #6, !dbg !28
+  %214 = getelementptr i8, ptr addrspace(3) %188, i32 1024, !dbg !28
+  %215 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %214, i1 true) #6, !dbg !28
+  %216 = bitcast i32 %215 to float, !dbg !28
+  %217 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %215, i32 4, i32 31), !dbg !28
+  %218 = bitcast i32 %217 to float, !dbg !28
+  %219 = fcmp ogt float %216, %218, !dbg !21
+  %220 = fcmp uno float %216, 0.000000e+00, !dbg !25
+  %221 = or i1 %220, %219, !dbg !26
+  %222 = select i1 %221, float %216, float %218, !dbg !27
+  %223 = bitcast float %222 to i32, !dbg !28
+  %224 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %223, i32 2, i32 31), !dbg !28
+  %225 = bitcast i32 %224 to float, !dbg !28
+  %226 = fcmp ogt float %222, %225, !dbg !21
+  %227 = fcmp uno float %222, 0.000000e+00, !dbg !25
+  %228 = or i1 %226, %227, !dbg !26
+  %229 = select i1 %228, float %222, float %225, !dbg !27
+  %230 = bitcast float %229 to i32, !dbg !28
+  %231 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %230, i32 1, i32 31), !dbg !28
+  %232 = bitcast i32 %231 to float, !dbg !28
+  %233 = fcmp ogt float %229, %232, !dbg !21
+  %234 = fcmp uno float %229, 0.000000e+00, !dbg !25
+  %235 = or i1 %233, %234, !dbg !26
+  %236 = select i1 %235, i32 %230, i32 %231, !dbg !27
+  %237 = insertelement <1 x i32> poison, i32 %236, i64 0, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %214, <1 x i32> %237, i1 %211) #6, !dbg !28
+  %238 = getelementptr i8, ptr addrspace(3) %188, i32 2048, !dbg !28
+  %239 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %238, i1 true) #6, !dbg !28
+  %240 = bitcast i32 %239 to float, !dbg !28
+  %241 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %239, i32 4, i32 31), !dbg !28
+  %242 = bitcast i32 %241 to float, !dbg !28
+  %243 = fcmp ogt float %240, %242, !dbg !21
+  %244 = fcmp uno float %240, 0.000000e+00, !dbg !25
+  %245 = or i1 %244, %243, !dbg !26
+  %246 = select i1 %245, float %240, float %242, !dbg !27
+  %247 = bitcast float %246 to i32, !dbg !28
+  %248 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %247, i32 2, i32 31), !dbg !28
+  %249 = bitcast i32 %248 to float, !dbg !28
+  %250 = fcmp ogt float %246, %249, !dbg !21
+  %251 = fcmp uno float %246, 0.000000e+00, !dbg !25
+  %252 = or i1 %250, %251, !dbg !26
+  %253 = select i1 %252, float %246, float %249, !dbg !27
+  %254 = bitcast float %253 to i32, !dbg !28
+  %255 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %254, i32 1, i32 31), !dbg !28
+  %256 = bitcast i32 %255 to float, !dbg !28
+  %257 = fcmp ogt float %253, %256, !dbg !21
+  %258 = fcmp uno float %253, 0.000000e+00, !dbg !25
+  %259 = or i1 %257, %258, !dbg !26
+  %260 = select i1 %259, i32 %254, i32 %255, !dbg !27
+  %261 = insertelement <1 x i32> poison, i32 %260, i64 0, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %238, <1 x i32> %261, i1 %211) #6, !dbg !28
+  %262 = getelementptr i8, ptr addrspace(3) %188, i32 3072, !dbg !28
+  %263 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %262, i1 true) #6, !dbg !28
+  %264 = bitcast i32 %263 to float, !dbg !28
+  %265 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %263, i32 4, i32 31), !dbg !28
+  %266 = bitcast i32 %265 to float, !dbg !28
+  %267 = fcmp ogt float %264, %266, !dbg !21
+  %268 = fcmp uno float %264, 0.000000e+00, !dbg !25
+  %269 = or i1 %268, %267, !dbg !26
+  %270 = select i1 %269, float %264, float %266, !dbg !27
+  %271 = bitcast float %270 to i32, !dbg !28
+  %272 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %271, i32 2, i32 31), !dbg !28
+  %273 = bitcast i32 %272 to float, !dbg !28
+  %274 = fcmp ogt float %270, %273, !dbg !21
+  %275 = fcmp uno float %270, 0.000000e+00, !dbg !25
+  %276 = or i1 %274, %275, !dbg !26
+  %277 = select i1 %276, float %270, float %273, !dbg !27
+  %278 = bitcast float %277 to i32, !dbg !28
+  %279 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %278, i32 1, i32 31), !dbg !28
+  %280 = bitcast i32 %279 to float, !dbg !28
+  %281 = fcmp ogt float %277, %280, !dbg !21
+  %282 = fcmp uno float %277, 0.000000e+00, !dbg !25
+  %283 = or i1 %281, %282, !dbg !26
+  %284 = select i1 %283, i32 %278, i32 %279, !dbg !27
+  %285 = insertelement <1 x i32> poison, i32 %284, i64 0, !dbg !28
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %262, <1 x i32> %285, i1 %211) #6, !dbg !28
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !28
+  %286 = load float, ptr addrspace(3) %176, align 16, !dbg !28
+  %287 = load float, ptr addrspace(3) %179, align 16, !dbg !28
+  %288 = load float, ptr addrspace(3) %182, align 16, !dbg !28
+  %289 = load float, ptr addrspace(3) %185, align 16, !dbg !28
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !29
+  %290 = shl nuw nsw i32 %14, 4, !dbg !29
+  %291 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %290, !dbg !29
+  %292 = insertelement <4 x float> poison, float %286, i64 0, !dbg !29
+  %293 = insertelement <4 x float> %292, float %287, i64 1, !dbg !29
+  %294 = insertelement <4 x float> %293, float %288, i64 2, !dbg !29
+  %295 = insertelement <4 x float> %294, float %289, i64 3, !dbg !29
+  store <4 x float> %295, ptr addrspace(3) %291, align 16, !dbg !29
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !29
+  %296 = shl nuw nsw i32 %13, 7, !dbg !29
+  %297 = shl nuw nsw i32 %12, 4, !dbg !29
+  %298 = or i32 %296, %297, !dbg !29
+  %299 = and i32 %298, 496, !dbg !29
+  %300 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %299, !dbg !29
+  %301 = ptrtoint ptr addrspace(3) %300 to i32, !dbg !29
+  %302 = tail call i32 asm sideeffect "ldmatrix.sync.aligned.m8n8.x1.shared.b16 {$0}, [$1];", "=r,r"(i32 %301) #6, !dbg !29
+  %303 = fcmp oeq float %286, 0xFFF0000000000000, !dbg !30
+  %304 = fcmp oeq float %287, 0xFFF0000000000000, !dbg !30
+  %305 = fcmp oeq float %288, 0xFFF0000000000000, !dbg !30
+  %306 = fcmp oeq float %289, 0xFFF0000000000000, !dbg !30
+  %307 = fsub float %41, %286, !dbg !31
+  %308 = fsub float %42, %287, !dbg !31
+  %309 = fsub float %43, %288, !dbg !31
+  %310 = fsub float %44, %289, !dbg !31
+  %311 = fsub float %50, %286, !dbg !31
+  %312 = fsub float %51, %287, !dbg !31
+  %313 = fsub float %52, %288, !dbg !31
+  %314 = fsub float %53, %289, !dbg !31
+  %315 = fsub float %59, %286, !dbg !31
+  %316 = fsub float %60, %287, !dbg !31
+  %317 = fsub float %61, %288, !dbg !31
+  %318 = fsub float %62, %289, !dbg !31
+  %319 = fsub float %68, %286, !dbg !31
+  %320 = fsub float %69, %287, !dbg !31
+  %321 = fsub float %70, %288, !dbg !31
+  %322 = fsub float %71, %289, !dbg !31
+  %323 = select i1 %303, float 0.000000e+00, float %307, !dbg !32
+  %324 = select i1 %304, float 0.000000e+00, float %308, !dbg !32
+  %325 = select i1 %305, float 0.000000e+00, float %309, !dbg !32
+  %326 = select i1 %306, float 0.000000e+00, float %310, !dbg !32
+  %327 = select i1 %303, float 0.000000e+00, float %311, !dbg !32
+  %328 = select i1 %304, float 0.000000e+00, float %312, !dbg !32
+  %329 = select i1 %305, float 0.000000e+00, float %313, !dbg !32
+  %330 = select i1 %306, float 0.000000e+00, float %314, !dbg !32
+  %331 = select i1 %303, float 0.000000e+00, float %315, !dbg !32
+  %332 = select i1 %304, float 0.000000e+00, float %316, !dbg !32
+  %333 = select i1 %305, float 0.000000e+00, float %317, !dbg !32
+  %334 = select i1 %306, float 0.000000e+00, float %318, !dbg !32
+  %335 = select i1 %303, float 0.000000e+00, float %319, !dbg !32
+  %336 = select i1 %304, float 0.000000e+00, float %320, !dbg !32
+  %337 = select i1 %305, float 0.000000e+00, float %321, !dbg !32
+  %338 = select i1 %306, float 0.000000e+00, float %322, !dbg !32
+  %339 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i = icmp eq i32 %339, 0, !dbg !33
+  br i1 %.not.i, label %342, label %340, !dbg !33
+
+340:                                              ; preds = %9
+  %341 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %323) #6, !dbg !33
+  br label %__nv_exp2f.exit, !dbg !33
+
+342:                                              ; preds = %9
+  %343 = tail call float @llvm.nvvm.ex2.approx.f(float %323) #6, !dbg !33
+  br label %__nv_exp2f.exit, !dbg !33
+
+__nv_exp2f.exit:                                  ; preds = %340, %342
+  %.0.i = phi float [ %341, %340 ], [ %343, %342 ], !dbg !33
+  %344 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i1 = icmp eq i32 %344, 0, !dbg !33
+  br i1 %.not.i1, label %347, label %345, !dbg !33
+
+345:                                              ; preds = %__nv_exp2f.exit
+  %346 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %324) #6, !dbg !33
+  br label %__nv_exp2f.exit3, !dbg !33
+
+347:                                              ; preds = %__nv_exp2f.exit
+  %348 = tail call float @llvm.nvvm.ex2.approx.f(float %324) #6, !dbg !33
+  br label %__nv_exp2f.exit3, !dbg !33
+
+__nv_exp2f.exit3:                                 ; preds = %345, %347
+  %.0.i2 = phi float [ %346, %345 ], [ %348, %347 ], !dbg !33
+  %349 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i4 = icmp eq i32 %349, 0, !dbg !33
+  br i1 %.not.i4, label %352, label %350, !dbg !33
+
+350:                                              ; preds = %__nv_exp2f.exit3
+  %351 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %325) #6, !dbg !33
+  br label %__nv_exp2f.exit6, !dbg !33
+
+352:                                              ; preds = %__nv_exp2f.exit3
+  %353 = tail call float @llvm.nvvm.ex2.approx.f(float %325) #6, !dbg !33
+  br label %__nv_exp2f.exit6, !dbg !33
+
+__nv_exp2f.exit6:                                 ; preds = %350, %352
+  %.0.i5 = phi float [ %351, %350 ], [ %353, %352 ], !dbg !33
+  %354 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i7 = icmp eq i32 %354, 0, !dbg !33
+  br i1 %.not.i7, label %357, label %355, !dbg !33
+
+355:                                              ; preds = %__nv_exp2f.exit6
+  %356 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %326) #6, !dbg !33
+  br label %__nv_exp2f.exit9, !dbg !33
+
+357:                                              ; preds = %__nv_exp2f.exit6
+  %358 = tail call float @llvm.nvvm.ex2.approx.f(float %326) #6, !dbg !33
+  br label %__nv_exp2f.exit9, !dbg !33
+
+__nv_exp2f.exit9:                                 ; preds = %355, %357
+  %.0.i8 = phi float [ %356, %355 ], [ %358, %357 ], !dbg !33
+  %359 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i10 = icmp eq i32 %359, 0, !dbg !33
+  br i1 %.not.i10, label %362, label %360, !dbg !33
+
+360:                                              ; preds = %__nv_exp2f.exit9
+  %361 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %327) #6, !dbg !33
+  br label %__nv_exp2f.exit12, !dbg !33
+
+362:                                              ; preds = %__nv_exp2f.exit9
+  %363 = tail call float @llvm.nvvm.ex2.approx.f(float %327) #6, !dbg !33
+  br label %__nv_exp2f.exit12, !dbg !33
+
+__nv_exp2f.exit12:                                ; preds = %360, %362
+  %.0.i11 = phi float [ %361, %360 ], [ %363, %362 ], !dbg !33
+  %364 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i13 = icmp eq i32 %364, 0, !dbg !33
+  br i1 %.not.i13, label %367, label %365, !dbg !33
+
+365:                                              ; preds = %__nv_exp2f.exit12
+  %366 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %328) #6, !dbg !33
+  br label %__nv_exp2f.exit15, !dbg !33
+
+367:                                              ; preds = %__nv_exp2f.exit12
+  %368 = tail call float @llvm.nvvm.ex2.approx.f(float %328) #6, !dbg !33
+  br label %__nv_exp2f.exit15, !dbg !33
+
+__nv_exp2f.exit15:                                ; preds = %365, %367
+  %.0.i14 = phi float [ %366, %365 ], [ %368, %367 ], !dbg !33
+  %369 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i16 = icmp eq i32 %369, 0, !dbg !33
+  br i1 %.not.i16, label %372, label %370, !dbg !33
+
+370:                                              ; preds = %__nv_exp2f.exit15
+  %371 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %329) #6, !dbg !33
+  br label %__nv_exp2f.exit18, !dbg !33
+
+372:                                              ; preds = %__nv_exp2f.exit15
+  %373 = tail call float @llvm.nvvm.ex2.approx.f(float %329) #6, !dbg !33
+  br label %__nv_exp2f.exit18, !dbg !33
+
+__nv_exp2f.exit18:                                ; preds = %370, %372
+  %.0.i17 = phi float [ %371, %370 ], [ %373, %372 ], !dbg !33
+  %374 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i19 = icmp eq i32 %374, 0, !dbg !33
+  br i1 %.not.i19, label %377, label %375, !dbg !33
+
+375:                                              ; preds = %__nv_exp2f.exit18
+  %376 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %330) #6, !dbg !33
+  br label %__nv_exp2f.exit21, !dbg !33
+
+377:                                              ; preds = %__nv_exp2f.exit18
+  %378 = tail call float @llvm.nvvm.ex2.approx.f(float %330) #6, !dbg !33
+  br label %__nv_exp2f.exit21, !dbg !33
+
+__nv_exp2f.exit21:                                ; preds = %375, %377
+  %.0.i20 = phi float [ %376, %375 ], [ %378, %377 ], !dbg !33
+  %379 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i22 = icmp eq i32 %379, 0, !dbg !33
+  br i1 %.not.i22, label %382, label %380, !dbg !33
+
+380:                                              ; preds = %__nv_exp2f.exit21
+  %381 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %331) #6, !dbg !33
+  br label %__nv_exp2f.exit24, !dbg !33
+
+382:                                              ; preds = %__nv_exp2f.exit21
+  %383 = tail call float @llvm.nvvm.ex2.approx.f(float %331) #6, !dbg !33
+  br label %__nv_exp2f.exit24, !dbg !33
+
+__nv_exp2f.exit24:                                ; preds = %380, %382
+  %.0.i23 = phi float [ %381, %380 ], [ %383, %382 ], !dbg !33
+  %384 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i25 = icmp eq i32 %384, 0, !dbg !33
+  br i1 %.not.i25, label %387, label %385, !dbg !33
+
+385:                                              ; preds = %__nv_exp2f.exit24
+  %386 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %332) #6, !dbg !33
+  br label %__nv_exp2f.exit27, !dbg !33
+
+387:                                              ; preds = %__nv_exp2f.exit24
+  %388 = tail call float @llvm.nvvm.ex2.approx.f(float %332) #6, !dbg !33
+  br label %__nv_exp2f.exit27, !dbg !33
+
+__nv_exp2f.exit27:                                ; preds = %385, %387
+  %.0.i26 = phi float [ %386, %385 ], [ %388, %387 ], !dbg !33
+  %389 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i28 = icmp eq i32 %389, 0, !dbg !33
+  br i1 %.not.i28, label %392, label %390, !dbg !33
+
+390:                                              ; preds = %__nv_exp2f.exit27
+  %391 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %333) #6, !dbg !33
+  br label %__nv_exp2f.exit30, !dbg !33
+
+392:                                              ; preds = %__nv_exp2f.exit27
+  %393 = tail call float @llvm.nvvm.ex2.approx.f(float %333) #6, !dbg !33
+  br label %__nv_exp2f.exit30, !dbg !33
+
+__nv_exp2f.exit30:                                ; preds = %390, %392
+  %.0.i29 = phi float [ %391, %390 ], [ %393, %392 ], !dbg !33
+  %394 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i31 = icmp eq i32 %394, 0, !dbg !33
+  br i1 %.not.i31, label %397, label %395, !dbg !33
+
+395:                                              ; preds = %__nv_exp2f.exit30
+  %396 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %334) #6, !dbg !33
+  br label %__nv_exp2f.exit33, !dbg !33
+
+397:                                              ; preds = %__nv_exp2f.exit30
+  %398 = tail call float @llvm.nvvm.ex2.approx.f(float %334) #6, !dbg !33
+  br label %__nv_exp2f.exit33, !dbg !33
+
+__nv_exp2f.exit33:                                ; preds = %395, %397
+  %.0.i32 = phi float [ %396, %395 ], [ %398, %397 ], !dbg !33
+  %399 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i34 = icmp eq i32 %399, 0, !dbg !33
+  br i1 %.not.i34, label %402, label %400, !dbg !33
+
+400:                                              ; preds = %__nv_exp2f.exit33
+  %401 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %335) #6, !dbg !33
+  br label %__nv_exp2f.exit36, !dbg !33
+
+402:                                              ; preds = %__nv_exp2f.exit33
+  %403 = tail call float @llvm.nvvm.ex2.approx.f(float %335) #6, !dbg !33
+  br label %__nv_exp2f.exit36, !dbg !33
+
+__nv_exp2f.exit36:                                ; preds = %400, %402
+  %.0.i35 = phi float [ %401, %400 ], [ %403, %402 ], !dbg !33
+  %404 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i37 = icmp eq i32 %404, 0, !dbg !33
+  br i1 %.not.i37, label %407, label %405, !dbg !33
+
+405:                                              ; preds = %__nv_exp2f.exit36
+  %406 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %336) #6, !dbg !33
+  br label %__nv_exp2f.exit39, !dbg !33
+
+407:                                              ; preds = %__nv_exp2f.exit36
+  %408 = tail call float @llvm.nvvm.ex2.approx.f(float %336) #6, !dbg !33
+  br label %__nv_exp2f.exit39, !dbg !33
+
+__nv_exp2f.exit39:                                ; preds = %405, %407
+  %.0.i38 = phi float [ %406, %405 ], [ %408, %407 ], !dbg !33
+  %409 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i40 = icmp eq i32 %409, 0, !dbg !33
+  br i1 %.not.i40, label %412, label %410, !dbg !33
+
+410:                                              ; preds = %__nv_exp2f.exit39
+  %411 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %337) #6, !dbg !33
+  br label %__nv_exp2f.exit42, !dbg !33
+
+412:                                              ; preds = %__nv_exp2f.exit39
+  %413 = tail call float @llvm.nvvm.ex2.approx.f(float %337) #6, !dbg !33
+  br label %__nv_exp2f.exit42, !dbg !33
+
+__nv_exp2f.exit42:                                ; preds = %410, %412
+  %.0.i41 = phi float [ %411, %410 ], [ %413, %412 ], !dbg !33
+  %414 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !33
+  %.not.i43 = icmp eq i32 %414, 0, !dbg !33
+  br i1 %.not.i43, label %417, label %415, !dbg !33
+
+415:                                              ; preds = %__nv_exp2f.exit42
+  %416 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %338) #6, !dbg !33
+  br label %__nv_exp2f.exit45, !dbg !33
+
+417:                                              ; preds = %__nv_exp2f.exit42
+  %418 = tail call float @llvm.nvvm.ex2.approx.f(float %338) #6, !dbg !33
+  br label %__nv_exp2f.exit45, !dbg !33
+
+__nv_exp2f.exit45:                                ; preds = %415, %417
+  %.0.i44 = phi float [ %416, %415 ], [ %418, %417 ], !dbg !33
+  %419 = fmul float %.0.i, %81, !dbg !34
+  %420 = fmul float %.0.i2, %82, !dbg !34
+  %421 = fmul float %.0.i5, %83, !dbg !34
+  %422 = fmul float %.0.i8, %84, !dbg !34
+  %423 = fmul float %.0.i11, %90, !dbg !34
+  %424 = fmul float %.0.i14, %91, !dbg !34
+  %425 = fmul float %.0.i17, %92, !dbg !34
+  %426 = fmul float %.0.i20, %93, !dbg !34
+  %427 = fmul float %.0.i23, %99, !dbg !34
+  %428 = fmul float %.0.i26, %100, !dbg !34
+  %429 = fmul float %.0.i29, %101, !dbg !34
+  %430 = fmul float %.0.i32, %102, !dbg !34
+  %431 = fmul float %.0.i35, %108, !dbg !34
+  %432 = fmul float %.0.i38, %109, !dbg !34
+  %433 = fmul float %.0.i41, %110, !dbg !34
+  %434 = fmul float %.0.i44, %111, !dbg !34
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !35
+  %435 = fadd float %419, %423, !dbg !39
+  %436 = fadd float %420, %424, !dbg !39
+  %437 = fadd float %421, %425, !dbg !39
+  %438 = fadd float %422, %426, !dbg !39
+  %439 = fadd float %435, %427, !dbg !39
+  %440 = fadd float %436, %428, !dbg !39
+  %441 = fadd float %437, %429, !dbg !39
+  %442 = fadd float %438, %430, !dbg !39
+  %443 = fadd float %439, %431, !dbg !39
+  %444 = fadd float %440, %432, !dbg !39
+  %445 = fadd float %441, %433, !dbg !39
+  %446 = fadd float %442, %434, !dbg !39
+  %447 = bitcast float %443 to i32, !dbg !35
+  %448 = select i1 %17, i32 %447, i32 0, !dbg !39
+  %449 = insertelement <1 x i32> poison, i32 %448, i64 0, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %177, <1 x i32> %449, i1 true) #6, !dbg !35
+  %450 = bitcast float %444 to i32, !dbg !35
+  %451 = select i1 %17, i32 %450, i32 0, !dbg !39
+  %452 = insertelement <1 x i32> poison, i32 %451, i64 0, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %180, <1 x i32> %452, i1 true) #6, !dbg !35
+  %453 = bitcast float %445 to i32, !dbg !35
+  %454 = select i1 %17, i32 %453, i32 0, !dbg !39
+  %455 = insertelement <1 x i32> poison, i32 %454, i64 0, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %183, <1 x i32> %455, i1 true) #6, !dbg !35
+  %456 = bitcast float %446 to i32, !dbg !35
+  %457 = select i1 %17, i32 %456, i32 0, !dbg !39
+  %458 = insertelement <1 x i32> poison, i32 %457, i64 0, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %186, <1 x i32> %458, i1 true) #6, !dbg !35
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !35
+  %459 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %188, i1 true) #6, !dbg !35
+  %460 = bitcast i32 %459 to float, !dbg !35
+  %461 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %459, i32 4, i32 31), !dbg !35
+  %462 = bitcast i32 %461 to float, !dbg !35
+  %463 = fadd float %460, %462, !dbg !39
+  %464 = bitcast float %463 to i32, !dbg !35
+  %465 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %464, i32 2, i32 31), !dbg !35
+  %466 = bitcast i32 %465 to float, !dbg !35
+  %467 = fadd float %463, %466, !dbg !39
+  %468 = bitcast float %467 to i32, !dbg !35
+  %469 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %468, i32 1, i32 31), !dbg !35
+  %470 = bitcast i32 %469 to float, !dbg !35
+  %471 = fadd float %467, %470, !dbg !39
+  %472 = bitcast float %471 to <1 x i32>, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %188, <1 x i32> %472, i1 %211) #6, !dbg !35
+  %473 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %214, i1 true) #6, !dbg !35
+  %474 = bitcast i32 %473 to float, !dbg !35
+  %475 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %473, i32 4, i32 31), !dbg !35
+  %476 = bitcast i32 %475 to float, !dbg !35
+  %477 = fadd float %474, %476, !dbg !39
+  %478 = bitcast float %477 to i32, !dbg !35
+  %479 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %478, i32 2, i32 31), !dbg !35
+  %480 = bitcast i32 %479 to float, !dbg !35
+  %481 = fadd float %477, %480, !dbg !39
+  %482 = bitcast float %481 to i32, !dbg !35
+  %483 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %482, i32 1, i32 31), !dbg !35
+  %484 = bitcast i32 %483 to float, !dbg !35
+  %485 = fadd float %481, %484, !dbg !39
+  %486 = bitcast float %485 to <1 x i32>, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %214, <1 x i32> %486, i1 %211) #6, !dbg !35
+  %487 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %238, i1 true) #6, !dbg !35
+  %488 = bitcast i32 %487 to float, !dbg !35
+  %489 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %487, i32 4, i32 31), !dbg !35
+  %490 = bitcast i32 %489 to float, !dbg !35
+  %491 = fadd float %488, %490, !dbg !39
+  %492 = bitcast float %491 to i32, !dbg !35
+  %493 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %492, i32 2, i32 31), !dbg !35
+  %494 = bitcast i32 %493 to float, !dbg !35
+  %495 = fadd float %491, %494, !dbg !39
+  %496 = bitcast float %495 to i32, !dbg !35
+  %497 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %496, i32 1, i32 31), !dbg !35
+  %498 = bitcast i32 %497 to float, !dbg !35
+  %499 = fadd float %495, %498, !dbg !39
+  %500 = bitcast float %499 to <1 x i32>, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %238, <1 x i32> %500, i1 %211) #6, !dbg !35
+  %501 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %262, i1 true) #6, !dbg !35
+  %502 = bitcast i32 %501 to float, !dbg !35
+  %503 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %501, i32 4, i32 31), !dbg !35
+  %504 = bitcast i32 %503 to float, !dbg !35
+  %505 = fadd float %502, %504, !dbg !39
+  %506 = bitcast float %505 to i32, !dbg !35
+  %507 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %506, i32 2, i32 31), !dbg !35
+  %508 = bitcast i32 %507 to float, !dbg !35
+  %509 = fadd float %505, %508, !dbg !39
+  %510 = bitcast float %509 to i32, !dbg !35
+  %511 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %510, i32 1, i32 31), !dbg !35
+  %512 = bitcast i32 %511 to float, !dbg !35
+  %513 = fadd float %509, %512, !dbg !39
+  %514 = bitcast float %513 to <1 x i32>, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %262, <1 x i32> %514, i1 %211) #6, !dbg !35
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !35
+  %515 = load float, ptr addrspace(3) %176, align 16, !dbg !35
+  %516 = load float, ptr addrspace(3) %179, align 16, !dbg !35
+  %517 = load float, ptr addrspace(3) %182, align 16, !dbg !35
+  %518 = load float, ptr addrspace(3) %185, align 16, !dbg !35
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !40
+  %519 = insertelement <4 x float> poison, float %515, i64 0, !dbg !40
+  %520 = insertelement <4 x float> %519, float %516, i64 1, !dbg !40
+  %521 = insertelement <4 x float> %520, float %517, i64 2, !dbg !40
+  %522 = insertelement <4 x float> %521, float %518, i64 3, !dbg !40
+  store <4 x float> %522, ptr addrspace(3) %291, align 16, !dbg !40
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !40
+  %523 = tail call i32 asm sideeffect "ldmatrix.sync.aligned.m8n8.x1.shared.b16 {$0}, [$1];", "=r,r"(i32 %301) #6, !dbg !40
+  %524 = select i1 %303, float 1.000000e+00, float %515, !dbg !41
+  %525 = select i1 %304, float 1.000000e+00, float %516, !dbg !41
+  %526 = select i1 %305, float 1.000000e+00, float %517, !dbg !41
+  %527 = select i1 %306, float 1.000000e+00, float %518, !dbg !41
+  %528 = fcmp olt float %524, 0x3810000000000000, !dbg !42
+  %529 = fmul float %524, 0x4160000000000000, !dbg !42
+  %.02.i = select i1 %528, float %529, float %524, !dbg !42
+  %i.i.0.i = select i1 %528, float -2.300000e+01, float 0.000000e+00, !dbg !42
+  %530 = bitcast float %.02.i to i32, !dbg !42
+  %531 = add i32 %530, -1060439283, !dbg !42
+  %532 = and i32 %531, -8388608, !dbg !42
+  %533 = sub i32 %530, %532, !dbg !42
+  %534 = bitcast i32 %533 to float, !dbg !42
+  %535 = sitofp i32 %532 to float, !dbg !42
+  %536 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not.i46 = icmp eq i32 %536, 0, !dbg !42
+  %537 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %535, float 0x3E80000000000000, float %i.i.0.i) #6, !dbg !42
+  %538 = tail call float @llvm.nvvm.fma.rn.f(float %535, float 0x3E80000000000000, float %i.i.0.i) #6, !dbg !42
+  %.08.i = select i1 %.not.i46, float %538, float %537, !dbg !42
+  %539 = fadd float %534, -1.000000e+00, !dbg !42
+  %540 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not1.i = icmp eq i32 %540, 0, !dbg !42
+  %541 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %539, float 0xBFC58FE600000000) #6, !dbg !42
+  %542 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %539, float 0xBFC58FE600000000) #6, !dbg !42
+  %.010.i = select i1 %.not1.i, float %542, float %541, !dbg !42
+  %543 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not2.i = icmp eq i32 %543, 0, !dbg !42
+  %544 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i, float %539, float 0x3FC5F9E540000000) #6, !dbg !42
+  %545 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i, float %539, float 0x3FC5F9E540000000) #6, !dbg !42
+  %.011.i = select i1 %.not2.i, float %545, float %544, !dbg !42
+  %546 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not3.i = icmp eq i32 %546, 0, !dbg !42
+  %547 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i, float %539, float 0xBFC6E9C860000000) #6, !dbg !42
+  %548 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i, float %539, float 0xBFC6E9C860000000) #6, !dbg !42
+  %.012.i = select i1 %.not3.i, float %548, float %547, !dbg !42
+  %549 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not4.i = icmp eq i32 %549, 0, !dbg !42
+  %550 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i, float %539, float 0x3FCA417E80000000) #6, !dbg !42
+  %551 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i, float %539, float 0x3FCA417E80000000) #6, !dbg !42
+  %.09.i = select i1 %.not4.i, float %551, float %550, !dbg !42
+  %552 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not5.i = icmp eq i32 %552, 0, !dbg !42
+  %553 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i, float %539, float 0xBFCEC79160000000) #6, !dbg !42
+  %554 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i, float %539, float 0xBFCEC79160000000) #6, !dbg !42
+  %.05.i = select i1 %.not5.i, float %554, float %553, !dbg !42
+  %555 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not6.i = icmp eq i32 %555, 0, !dbg !42
+  %556 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i, float %539, float 0x3FD277F320000000) #6, !dbg !42
+  %557 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i, float %539, float 0x3FD277F320000000) #6, !dbg !42
+  %.01.i = select i1 %.not6.i, float %557, float %556, !dbg !42
+  %558 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not7.i = icmp eq i32 %558, 0, !dbg !42
+  %559 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i, float %539, float 0xBFD7154920000000) #6, !dbg !42
+  %560 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i, float %539, float 0xBFD7154920000000) #6, !dbg !42
+  %.0.i47 = select i1 %.not7.i, float %560, float %559, !dbg !42
+  %561 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not8.i = icmp eq i32 %561, 0, !dbg !42
+  %562 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i47, float %539, float 0x3FDEC70940000000) #6, !dbg !42
+  %563 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i47, float %539, float 0x3FDEC70940000000) #6, !dbg !42
+  %.07.i = select i1 %.not8.i, float %563, float %562, !dbg !42
+  %564 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not9.i = icmp eq i32 %564, 0, !dbg !42
+  %565 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i, float %539, float 0xBFE7154760000000) #6, !dbg !42
+  %566 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i, float %539, float 0xBFE7154760000000) #6, !dbg !42
+  %.06.i = select i1 %.not9.i, float %566, float %565, !dbg !42
+  %567 = fmul float %539, %.06.i, !dbg !42
+  %568 = fmul float %539, %567, !dbg !42
+  %569 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not10.i = icmp eq i32 %569, 0, !dbg !42
+  %570 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %539, float 0x3FF7154760000000, float %568) #6, !dbg !42
+  %571 = tail call float @llvm.nvvm.fma.rn.f(float %539, float 0x3FF7154760000000, float %568) #6, !dbg !42
+  %.04.i = select i1 %.not10.i, float %571, float %570, !dbg !42
+  %572 = fadd float %.08.i, %.04.i, !dbg !42
+  %573 = icmp ugt i32 %530, 2139095039, !dbg !42
+  br i1 %573, label %__nv_fmaf_rn.exit.i.i, label %__nv_log2f.exit, !dbg !42
+
+__nv_fmaf_rn.exit.i.i:                            ; preds = %__nv_exp2f.exit45
+  %574 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not11.i = icmp eq i32 %574, 0, !dbg !42
+  %575 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %576 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %.03.i = select i1 %.not11.i, float %576, float %575, !dbg !42
+  br label %__nv_log2f.exit, !dbg !42
+
+__nv_log2f.exit:                                  ; preds = %__nv_exp2f.exit45, %__nv_fmaf_rn.exit.i.i
+  %r.i.0.i = phi float [ %.03.i, %__nv_fmaf_rn.exit.i.i ], [ %572, %__nv_exp2f.exit45 ], !dbg !42
+  %577 = fcmp olt float %525, 0x3810000000000000, !dbg !42
+  %578 = fmul float %525, 0x4160000000000000, !dbg !42
+  %.02.i48 = select i1 %577, float %578, float %525, !dbg !42
+  %i.i.0.i49 = select i1 %577, float -2.300000e+01, float 0.000000e+00, !dbg !42
+  %579 = bitcast float %.02.i48 to i32, !dbg !42
+  %580 = add i32 %579, -1060439283, !dbg !42
+  %581 = and i32 %580, -8388608, !dbg !42
+  %582 = sub i32 %579, %581, !dbg !42
+  %583 = bitcast i32 %582 to float, !dbg !42
+  %584 = sitofp i32 %581 to float, !dbg !42
+  %585 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not.i50 = icmp eq i32 %585, 0, !dbg !42
+  %586 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %584, float 0x3E80000000000000, float %i.i.0.i49) #6, !dbg !42
+  %587 = tail call float @llvm.nvvm.fma.rn.f(float %584, float 0x3E80000000000000, float %i.i.0.i49) #6, !dbg !42
+  %.08.i51 = select i1 %.not.i50, float %587, float %586, !dbg !42
+  %588 = fadd float %583, -1.000000e+00, !dbg !42
+  %589 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not1.i52 = icmp eq i32 %589, 0, !dbg !42
+  %590 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %588, float 0xBFC58FE600000000) #6, !dbg !42
+  %591 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %588, float 0xBFC58FE600000000) #6, !dbg !42
+  %.010.i53 = select i1 %.not1.i52, float %591, float %590, !dbg !42
+  %592 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not2.i54 = icmp eq i32 %592, 0, !dbg !42
+  %593 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i53, float %588, float 0x3FC5F9E540000000) #6, !dbg !42
+  %594 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i53, float %588, float 0x3FC5F9E540000000) #6, !dbg !42
+  %.011.i55 = select i1 %.not2.i54, float %594, float %593, !dbg !42
+  %595 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not3.i56 = icmp eq i32 %595, 0, !dbg !42
+  %596 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i55, float %588, float 0xBFC6E9C860000000) #6, !dbg !42
+  %597 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i55, float %588, float 0xBFC6E9C860000000) #6, !dbg !42
+  %.012.i57 = select i1 %.not3.i56, float %597, float %596, !dbg !42
+  %598 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not4.i58 = icmp eq i32 %598, 0, !dbg !42
+  %599 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i57, float %588, float 0x3FCA417E80000000) #6, !dbg !42
+  %600 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i57, float %588, float 0x3FCA417E80000000) #6, !dbg !42
+  %.09.i59 = select i1 %.not4.i58, float %600, float %599, !dbg !42
+  %601 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not5.i60 = icmp eq i32 %601, 0, !dbg !42
+  %602 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i59, float %588, float 0xBFCEC79160000000) #6, !dbg !42
+  %603 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i59, float %588, float 0xBFCEC79160000000) #6, !dbg !42
+  %.05.i61 = select i1 %.not5.i60, float %603, float %602, !dbg !42
+  %604 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not6.i62 = icmp eq i32 %604, 0, !dbg !42
+  %605 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i61, float %588, float 0x3FD277F320000000) #6, !dbg !42
+  %606 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i61, float %588, float 0x3FD277F320000000) #6, !dbg !42
+  %.01.i63 = select i1 %.not6.i62, float %606, float %605, !dbg !42
+  %607 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not7.i64 = icmp eq i32 %607, 0, !dbg !42
+  %608 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i63, float %588, float 0xBFD7154920000000) #6, !dbg !42
+  %609 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i63, float %588, float 0xBFD7154920000000) #6, !dbg !42
+  %.0.i65 = select i1 %.not7.i64, float %609, float %608, !dbg !42
+  %610 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not8.i66 = icmp eq i32 %610, 0, !dbg !42
+  %611 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i65, float %588, float 0x3FDEC70940000000) #6, !dbg !42
+  %612 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i65, float %588, float 0x3FDEC70940000000) #6, !dbg !42
+  %.07.i67 = select i1 %.not8.i66, float %612, float %611, !dbg !42
+  %613 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not9.i68 = icmp eq i32 %613, 0, !dbg !42
+  %614 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i67, float %588, float 0xBFE7154760000000) #6, !dbg !42
+  %615 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i67, float %588, float 0xBFE7154760000000) #6, !dbg !42
+  %.06.i69 = select i1 %.not9.i68, float %615, float %614, !dbg !42
+  %616 = fmul float %588, %.06.i69, !dbg !42
+  %617 = fmul float %588, %616, !dbg !42
+  %618 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not10.i70 = icmp eq i32 %618, 0, !dbg !42
+  %619 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %588, float 0x3FF7154760000000, float %617) #6, !dbg !42
+  %620 = tail call float @llvm.nvvm.fma.rn.f(float %588, float 0x3FF7154760000000, float %617) #6, !dbg !42
+  %.04.i71 = select i1 %.not10.i70, float %620, float %619, !dbg !42
+  %621 = fadd float %.08.i51, %.04.i71, !dbg !42
+  %622 = icmp ugt i32 %579, 2139095039, !dbg !42
+  br i1 %622, label %__nv_fmaf_rn.exit.i.i74, label %__nv_log2f.exit77, !dbg !42
+
+__nv_fmaf_rn.exit.i.i74:                          ; preds = %__nv_log2f.exit
+  %623 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not11.i75 = icmp eq i32 %623, 0, !dbg !42
+  %624 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i48, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %625 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i48, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %.03.i76 = select i1 %.not11.i75, float %625, float %624, !dbg !42
+  br label %__nv_log2f.exit77, !dbg !42
+
+__nv_log2f.exit77:                                ; preds = %__nv_log2f.exit, %__nv_fmaf_rn.exit.i.i74
+  %r.i.0.i72 = phi float [ %.03.i76, %__nv_fmaf_rn.exit.i.i74 ], [ %621, %__nv_log2f.exit ], !dbg !42
+  %626 = fcmp olt float %526, 0x3810000000000000, !dbg !42
+  %627 = fmul float %526, 0x4160000000000000, !dbg !42
+  %.02.i78 = select i1 %626, float %627, float %526, !dbg !42
+  %i.i.0.i79 = select i1 %626, float -2.300000e+01, float 0.000000e+00, !dbg !42
+  %628 = bitcast float %.02.i78 to i32, !dbg !42
+  %629 = add i32 %628, -1060439283, !dbg !42
+  %630 = and i32 %629, -8388608, !dbg !42
+  %631 = sub i32 %628, %630, !dbg !42
+  %632 = bitcast i32 %631 to float, !dbg !42
+  %633 = sitofp i32 %630 to float, !dbg !42
+  %634 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not.i80 = icmp eq i32 %634, 0, !dbg !42
+  %635 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %633, float 0x3E80000000000000, float %i.i.0.i79) #6, !dbg !42
+  %636 = tail call float @llvm.nvvm.fma.rn.f(float %633, float 0x3E80000000000000, float %i.i.0.i79) #6, !dbg !42
+  %.08.i81 = select i1 %.not.i80, float %636, float %635, !dbg !42
+  %637 = fadd float %632, -1.000000e+00, !dbg !42
+  %638 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not1.i82 = icmp eq i32 %638, 0, !dbg !42
+  %639 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %637, float 0xBFC58FE600000000) #6, !dbg !42
+  %640 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %637, float 0xBFC58FE600000000) #6, !dbg !42
+  %.010.i83 = select i1 %.not1.i82, float %640, float %639, !dbg !42
+  %641 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not2.i84 = icmp eq i32 %641, 0, !dbg !42
+  %642 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i83, float %637, float 0x3FC5F9E540000000) #6, !dbg !42
+  %643 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i83, float %637, float 0x3FC5F9E540000000) #6, !dbg !42
+  %.011.i85 = select i1 %.not2.i84, float %643, float %642, !dbg !42
+  %644 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not3.i86 = icmp eq i32 %644, 0, !dbg !42
+  %645 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i85, float %637, float 0xBFC6E9C860000000) #6, !dbg !42
+  %646 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i85, float %637, float 0xBFC6E9C860000000) #6, !dbg !42
+  %.012.i87 = select i1 %.not3.i86, float %646, float %645, !dbg !42
+  %647 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not4.i88 = icmp eq i32 %647, 0, !dbg !42
+  %648 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i87, float %637, float 0x3FCA417E80000000) #6, !dbg !42
+  %649 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i87, float %637, float 0x3FCA417E80000000) #6, !dbg !42
+  %.09.i89 = select i1 %.not4.i88, float %649, float %648, !dbg !42
+  %650 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not5.i90 = icmp eq i32 %650, 0, !dbg !42
+  %651 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i89, float %637, float 0xBFCEC79160000000) #6, !dbg !42
+  %652 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i89, float %637, float 0xBFCEC79160000000) #6, !dbg !42
+  %.05.i91 = select i1 %.not5.i90, float %652, float %651, !dbg !42
+  %653 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not6.i92 = icmp eq i32 %653, 0, !dbg !42
+  %654 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i91, float %637, float 0x3FD277F320000000) #6, !dbg !42
+  %655 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i91, float %637, float 0x3FD277F320000000) #6, !dbg !42
+  %.01.i93 = select i1 %.not6.i92, float %655, float %654, !dbg !42
+  %656 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not7.i94 = icmp eq i32 %656, 0, !dbg !42
+  %657 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i93, float %637, float 0xBFD7154920000000) #6, !dbg !42
+  %658 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i93, float %637, float 0xBFD7154920000000) #6, !dbg !42
+  %.0.i95 = select i1 %.not7.i94, float %658, float %657, !dbg !42
+  %659 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not8.i96 = icmp eq i32 %659, 0, !dbg !42
+  %660 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i95, float %637, float 0x3FDEC70940000000) #6, !dbg !42
+  %661 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i95, float %637, float 0x3FDEC70940000000) #6, !dbg !42
+  %.07.i97 = select i1 %.not8.i96, float %661, float %660, !dbg !42
+  %662 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not9.i98 = icmp eq i32 %662, 0, !dbg !42
+  %663 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i97, float %637, float 0xBFE7154760000000) #6, !dbg !42
+  %664 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i97, float %637, float 0xBFE7154760000000) #6, !dbg !42
+  %.06.i99 = select i1 %.not9.i98, float %664, float %663, !dbg !42
+  %665 = fmul float %637, %.06.i99, !dbg !42
+  %666 = fmul float %637, %665, !dbg !42
+  %667 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not10.i100 = icmp eq i32 %667, 0, !dbg !42
+  %668 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %637, float 0x3FF7154760000000, float %666) #6, !dbg !42
+  %669 = tail call float @llvm.nvvm.fma.rn.f(float %637, float 0x3FF7154760000000, float %666) #6, !dbg !42
+  %.04.i101 = select i1 %.not10.i100, float %669, float %668, !dbg !42
+  %670 = fadd float %.08.i81, %.04.i101, !dbg !42
+  %671 = icmp ugt i32 %628, 2139095039, !dbg !42
+  br i1 %671, label %__nv_fmaf_rn.exit.i.i104, label %__nv_log2f.exit107, !dbg !42
+
+__nv_fmaf_rn.exit.i.i104:                         ; preds = %__nv_log2f.exit77
+  %672 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not11.i105 = icmp eq i32 %672, 0, !dbg !42
+  %673 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i78, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %674 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i78, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %.03.i106 = select i1 %.not11.i105, float %674, float %673, !dbg !42
+  br label %__nv_log2f.exit107, !dbg !42
+
+__nv_log2f.exit107:                               ; preds = %__nv_log2f.exit77, %__nv_fmaf_rn.exit.i.i104
+  %r.i.0.i102 = phi float [ %.03.i106, %__nv_fmaf_rn.exit.i.i104 ], [ %670, %__nv_log2f.exit77 ], !dbg !42
+  %675 = fcmp olt float %527, 0x3810000000000000, !dbg !42
+  %676 = fmul float %527, 0x4160000000000000, !dbg !42
+  %.02.i108 = select i1 %675, float %676, float %527, !dbg !42
+  %i.i.0.i109 = select i1 %675, float -2.300000e+01, float 0.000000e+00, !dbg !42
+  %677 = bitcast float %.02.i108 to i32, !dbg !42
+  %678 = add i32 %677, -1060439283, !dbg !42
+  %679 = and i32 %678, -8388608, !dbg !42
+  %680 = sub i32 %677, %679, !dbg !42
+  %681 = bitcast i32 %680 to float, !dbg !42
+  %682 = sitofp i32 %679 to float, !dbg !42
+  %683 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not.i110 = icmp eq i32 %683, 0, !dbg !42
+  %684 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %682, float 0x3E80000000000000, float %i.i.0.i109) #6, !dbg !42
+  %685 = tail call float @llvm.nvvm.fma.rn.f(float %682, float 0x3E80000000000000, float %i.i.0.i109) #6, !dbg !42
+  %.08.i111 = select i1 %.not.i110, float %685, float %684, !dbg !42
+  %686 = fadd float %681, -1.000000e+00, !dbg !42
+  %687 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not1.i112 = icmp eq i32 %687, 0, !dbg !42
+  %688 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0x3FB8D64FE0000000, float %686, float 0xBFC58FE600000000) #6, !dbg !42
+  %689 = tail call float @llvm.nvvm.fma.rn.f(float 0x3FB8D64FE0000000, float %686, float 0xBFC58FE600000000) #6, !dbg !42
+  %.010.i113 = select i1 %.not1.i112, float %689, float %688, !dbg !42
+  %690 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not2.i114 = icmp eq i32 %690, 0, !dbg !42
+  %691 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i113, float %686, float 0x3FC5F9E540000000) #6, !dbg !42
+  %692 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i113, float %686, float 0x3FC5F9E540000000) #6, !dbg !42
+  %.011.i115 = select i1 %.not2.i114, float %692, float %691, !dbg !42
+  %693 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not3.i116 = icmp eq i32 %693, 0, !dbg !42
+  %694 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i115, float %686, float 0xBFC6E9C860000000) #6, !dbg !42
+  %695 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i115, float %686, float 0xBFC6E9C860000000) #6, !dbg !42
+  %.012.i117 = select i1 %.not3.i116, float %695, float %694, !dbg !42
+  %696 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not4.i118 = icmp eq i32 %696, 0, !dbg !42
+  %697 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i117, float %686, float 0x3FCA417E80000000) #6, !dbg !42
+  %698 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i117, float %686, float 0x3FCA417E80000000) #6, !dbg !42
+  %.09.i119 = select i1 %.not4.i118, float %698, float %697, !dbg !42
+  %699 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not5.i120 = icmp eq i32 %699, 0, !dbg !42
+  %700 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i119, float %686, float 0xBFCEC79160000000) #6, !dbg !42
+  %701 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i119, float %686, float 0xBFCEC79160000000) #6, !dbg !42
+  %.05.i121 = select i1 %.not5.i120, float %701, float %700, !dbg !42
+  %702 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not6.i122 = icmp eq i32 %702, 0, !dbg !42
+  %703 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i121, float %686, float 0x3FD277F320000000) #6, !dbg !42
+  %704 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i121, float %686, float 0x3FD277F320000000) #6, !dbg !42
+  %.01.i123 = select i1 %.not6.i122, float %704, float %703, !dbg !42
+  %705 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not7.i124 = icmp eq i32 %705, 0, !dbg !42
+  %706 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i123, float %686, float 0xBFD7154920000000) #6, !dbg !42
+  %707 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i123, float %686, float 0xBFD7154920000000) #6, !dbg !42
+  %.0.i125 = select i1 %.not7.i124, float %707, float %706, !dbg !42
+  %708 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not8.i126 = icmp eq i32 %708, 0, !dbg !42
+  %709 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i125, float %686, float 0x3FDEC70940000000) #6, !dbg !42
+  %710 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i125, float %686, float 0x3FDEC70940000000) #6, !dbg !42
+  %.07.i127 = select i1 %.not8.i126, float %710, float %709, !dbg !42
+  %711 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not9.i128 = icmp eq i32 %711, 0, !dbg !42
+  %712 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i127, float %686, float 0xBFE7154760000000) #6, !dbg !42
+  %713 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i127, float %686, float 0xBFE7154760000000) #6, !dbg !42
+  %.06.i129 = select i1 %.not9.i128, float %713, float %712, !dbg !42
+  %714 = fmul float %686, %.06.i129, !dbg !42
+  %715 = fmul float %686, %714, !dbg !42
+  %716 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not10.i130 = icmp eq i32 %716, 0, !dbg !42
+  %717 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %686, float 0x3FF7154760000000, float %715) #6, !dbg !42
+  %718 = tail call float @llvm.nvvm.fma.rn.f(float %686, float 0x3FF7154760000000, float %715) #6, !dbg !42
+  %.04.i131 = select i1 %.not10.i130, float %718, float %717, !dbg !42
+  %719 = fadd float %.08.i111, %.04.i131, !dbg !42
+  %720 = icmp ugt i32 %677, 2139095039, !dbg !42
+  br i1 %720, label %__nv_fmaf_rn.exit.i.i134, label %__nv_log2f.exit137, !dbg !42
+
+__nv_fmaf_rn.exit.i.i134:                         ; preds = %__nv_log2f.exit107
+  %721 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #6, !dbg !42
+  %.not11.i135 = icmp eq i32 %721, 0, !dbg !42
+  %722 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i108, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %723 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i108, float 0x7FF0000000000000, float 0x7FF0000000000000) #6, !dbg !42
+  %.03.i136 = select i1 %.not11.i135, float %723, float %722, !dbg !42
+  br label %__nv_log2f.exit137, !dbg !42
+
+__nv_log2f.exit137:                               ; preds = %__nv_log2f.exit107, %__nv_fmaf_rn.exit.i.i134
+  %r.i.0.i132 = phi float [ %.03.i136, %__nv_fmaf_rn.exit.i.i134 ], [ %719, %__nv_log2f.exit107 ], !dbg !42
+  %724 = insertelement <4 x float> poison, float %.02.i, i64 0, !dbg !42
+  %725 = insertelement <4 x float> %724, float %.02.i48, i64 1, !dbg !42
+  %726 = insertelement <4 x float> %725, float %.02.i78, i64 2, !dbg !42
+  %727 = insertelement <4 x float> %726, float %.02.i108, i64 3, !dbg !42
+  %728 = fcmp oeq <4 x float> %727, zeroinitializer, !dbg !42
+  %729 = and i32 %12, 127, !dbg !10
+  %730 = or disjoint i32 %11, %729, !dbg !11
+  %731 = icmp slt i32 %730, 1536, !dbg !12
+  %732 = insertelement <4 x float> poison, float %r.i.0.i, i64 0, !dbg !42
+  %733 = insertelement <4 x float> %732, float %r.i.0.i72, i64 1, !dbg !42
+  %734 = insertelement <4 x float> %733, float %r.i.0.i102, i64 2, !dbg !42
+  %735 = insertelement <4 x float> %734, float %r.i.0.i132, i64 3, !dbg !42
+  %736 = select <4 x i1> %728, <4 x float> splat (float 0xFFF0000000000000), <4 x float> %735, !dbg !42
+  %737 = insertelement <4 x float> poison, float %286, i64 0, !dbg !43
+  %738 = insertelement <4 x float> %737, float %287, i64 1, !dbg !43
+  %739 = insertelement <4 x float> %738, float %288, i64 2, !dbg !43
+  %740 = insertelement <4 x float> %739, float %289, i64 3, !dbg !43
+  %741 = fadd <4 x float> %740, %736, !dbg !43
+  %742 = fmul <4 x float> %741, splat (float 0x3FE62E4300000000), !dbg !44
+  %743 = sext i32 %730 to i64, !dbg !45
+  %744 = getelementptr float, ptr addrspace(1) %4, i64 %743, !dbg !45
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !46
+  store <4 x float> %742, ptr addrspace(3) %291, align 16, !dbg !46
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !46
+  %745 = tail call i32 asm sideeffect "ldmatrix.sync.aligned.m8n8.x1.shared.b16 {$0}, [$1];", "=r,r"(i32 %301) #6, !dbg !46
+  %746 = and i32 %12, 128, !dbg !46
+  %747 = icmp eq i32 %746, 0, !dbg !46
+  %748 = and i1 %747, %731, !dbg !46
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %745, ptr addrspace(1) %744, i1 %748) #6, !dbg !46
+  %749 = getelementptr float, ptr addrspace(1) %2, i64 %743, !dbg !47
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %302, ptr addrspace(1) %749, i1 %748) #6, !dbg !48
+  %750 = getelementptr float, ptr addrspace(1) %3, i64 %743, !dbg !49
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %523, ptr addrspace(1) %750, i1 %748) #6, !dbg !50
+  ret void, !dbg !51
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #2
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #3
+
+declare i32 @__nvvm_reflect(ptr) local_unnamed_addr #4
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.ftz.f(float) #5
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.f(float) #5
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.ftz.f(float, float, float) #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.f(float, float, float) #1
+
+attributes #0 = { nounwind "nvvm.reqntid"="256" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #4 = { "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #5 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
+attributes #6 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+!llvm.ident = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py", directory: "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!5 = distinct !DISubprogram(name: "triton_per_fused_mul_1", linkageName: "triton_per_fused_mul_1", scope: !1, file: !1, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 24, column: 28, scope: !5)
+!9 = !DILocation(line: 24, column: 33, scope: !5)
+!10 = !DILocation(line: 25, column: 44, scope: !5)
+!11 = !DILocation(line: 25, column: 23, scope: !5)
+!12 = !DILocation(line: 26, column: 21, scope: !5)
+!13 = !DILocation(line: 27, column: 38, scope: !5)
+!14 = !DILocation(line: 34, column: 40, scope: !5)
+!15 = !DILocation(line: 34, column: 35, scope: !5)
+!16 = !DILocation(line: 34, column: 30, scope: !5)
+!17 = !DILocation(line: 34, column: 47, scope: !5)
+!18 = !DILocation(line: 35, column: 30, scope: !5)
+!19 = !DILocation(line: 35, column: 47, scope: !5)
+!20 = !DILocation(line: 37, column: 33, scope: !5)
+!21 = !DILocation(line: 110, column: 15, scope: !22, inlinedAt: !24)
+!22 = distinct !DILexicalBlockFile(scope: !5, file: !23, discriminator: 0)
+!23 = !DIFile(filename: "triton_helpers.py", directory: "/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime")
+!24 = !DILocation(line: 38, column: 37, scope: !5)
+!25 = !DILocation(line: 112, column: 21, scope: !22, inlinedAt: !24)
+!26 = !DILocation(line: 112, column: 16, scope: !22, inlinedAt: !24)
+!27 = !DILocation(line: 113, column: 29, scope: !22, inlinedAt: !24)
+!28 = !DILocation(line: 123, column: 29, scope: !22, inlinedAt: !24)
+!29 = !DILocation(line: 38, column: 40, scope: !5)
+!30 = !DILocation(line: 40, column: 19, scope: !5)
+!31 = !DILocation(line: 41, column: 18, scope: !5)
+!32 = !DILocation(line: 43, column: 33, scope: !5)
+!33 = !DILocation(line: 44, column: 27, scope: !5)
+!34 = !DILocation(line: 45, column: 19, scope: !5)
+!35 = !DILocation(line: 291, column: 36, scope: !36, inlinedAt: !38)
+!36 = distinct !DILexicalBlockFile(scope: !5, file: !37, discriminator: 0)
+!37 = !DIFile(filename: "standard.py", directory: "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language")
+!38 = !DILocation(line: 48, column: 26, scope: !5)
+!39 = !DILocation(line: 261, column: 15, scope: !36, inlinedAt: !38)
+!40 = !DILocation(line: 48, column: 29, scope: !5)
+!41 = !DILocation(line: 50, column: 34, scope: !5)
+!42 = !DILocation(line: 51, column: 27, scope: !5)
+!43 = !DILocation(line: 52, column: 20, scope: !5)
+!44 = !DILocation(line: 54, column: 20, scope: !5)
+!45 = !DILocation(line: 55, column: 25, scope: !5)
+!46 = !DILocation(line: 55, column: 37, scope: !5)
+!47 = !DILocation(line: 56, column: 25, scope: !5)
+!48 = !DILocation(line: 56, column: 36, scope: !5)
+!49 = !DILocation(line: 57, column: 25, scope: !5)
+!50 = !DILocation(line: 57, column: 37, scope: !5)
+!51 = !DILocation(line: 57, column: 4, scope: !5)

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.ptx

@@ -0,0 +1,1060 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_per_fused_mul_1  // -- Begin function triton_per_fused_mul_1
+.extern .shared .align 16 .b8 global_smem[];
+.global .align 1 .b8 _$_str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90};
+                                        // @triton_per_fused_mul_1
+.visible .entry triton_per_fused_mul_1(
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_0,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_1,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_2,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_3,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_4,
+	.param .u32 triton_per_fused_mul_1_param_5,
+	.param .u32 triton_per_fused_mul_1_param_6,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_7,
+	.param .u64 .ptr .global .align 1 triton_per_fused_mul_1_param_8
+)
+.reqntid 256
+{
+	.reg .pred 	%p<102>;
+	.reg .b32 	%r<484>;
+	.reg .b64 	%rd<24>;
+	.loc	1 18 0                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:18:0
+
+// %bb.0:                               // %__nv_exp2f.exit
+	ld.param.b64 	%rd14, [triton_per_fused_mul_1_param_0];
+	ld.param.b64 	%rd15, [triton_per_fused_mul_1_param_1];
+$L__tmp0:
+	.loc	1 24 28                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:24:28
+	mov.u32 	%r142, %ctaid.x;
+	.loc	1 24 33                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:24:33
+	shl.b32 	%r1, %r142, 7;
+	.loc	1 25 44                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:25:44
+	mov.u32 	%r2, %tid.x;
+	shr.u32 	%r143, %r2, 5;
+	and.b32 	%r144, %r2, 31;
+	shl.b32 	%r145, %r144, 2;
+	.loc	1 25 23                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:25:23
+	or.b32 	%r146, %r145, %r1;
+	.loc	1 26 21                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:26:21
+	setp.lt.s32 	%p1, %r146, 1536;
+	.loc	1 27 38                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:27:38
+	bfe.u32 	%r147, %r2, 5, 3;
+	or.b32 	%r148, %r143, 24;
+	.loc	1 34 35                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:34:35
+	mad.lo.s32 	%r149, %r147, 1536, %r146;
+	add.s32 	%r150, %r149, 12288;
+	add.s32 	%r151, %r149, 24576;
+	mad.lo.s32 	%r152, %r148, 1536, %r146;
+	.loc	1 34 30                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:34:30
+	mul.wide.s32 	%rd16, %r149, 4;
+	add.s64 	%rd6, %rd14, %rd16;
+	mul.wide.s32 	%rd17, %r150, 4;
+	add.s64 	%rd7, %rd14, %rd17;
+	mul.wide.s32 	%rd18, %r151, 4;
+	add.s64 	%rd8, %rd14, %rd18;
+	mul.wide.s32 	%rd19, %r152, 4;
+	add.s64 	%rd9, %rd14, %rd19;
+	mov.b32 	%r30, 0;
+	.loc	1 34 47                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:34:47
+	// begin inline asm
+	mov.u32 %r26, %r30;
+	mov.u32 %r27, %r30;
+	mov.u32 %r28, %r30;
+	mov.u32 %r29, %r30;
+	@%p1 ld.global.v4.b32 { %r26, %r27, %r28, %r29 }, [ %rd6 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r34, %r30;
+	mov.u32 %r35, %r30;
+	mov.u32 %r36, %r30;
+	mov.u32 %r37, %r30;
+	@%p1 ld.global.v4.b32 { %r34, %r35, %r36, %r37 }, [ %rd7 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r42, %r30;
+	mov.u32 %r43, %r30;
+	mov.u32 %r44, %r30;
+	mov.u32 %r45, %r30;
+	@%p1 ld.global.v4.b32 { %r42, %r43, %r44, %r45 }, [ %rd8 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r50, %r30;
+	mov.u32 %r51, %r30;
+	mov.u32 %r52, %r30;
+	mov.u32 %r53, %r30;
+	@%p1 ld.global.v4.b32 { %r50, %r51, %r52, %r53 }, [ %rd9 + 0 ];
+	// end inline asm
+	.loc	1 35 30                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:35:30
+	add.s64 	%rd10, %rd15, %rd16;
+	add.s64 	%rd11, %rd15, %rd17;
+	add.s64 	%rd12, %rd15, %rd18;
+	add.s64 	%rd13, %rd15, %rd19;
+	.loc	1 35 47                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:35:47
+	// begin inline asm
+	mov.u32 %r58, %r30;
+	mov.u32 %r59, %r30;
+	mov.u32 %r60, %r30;
+	mov.u32 %r61, %r30;
+	@%p1 ld.global.v4.b32 { %r58, %r59, %r60, %r61 }, [ %rd10 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r66, %r30;
+	mov.u32 %r67, %r30;
+	mov.u32 %r68, %r30;
+	mov.u32 %r69, %r30;
+	@%p1 ld.global.v4.b32 { %r66, %r67, %r68, %r69 }, [ %rd11 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r74, %r30;
+	mov.u32 %r75, %r30;
+	mov.u32 %r76, %r30;
+	mov.u32 %r77, %r30;
+	@%p1 ld.global.v4.b32 { %r74, %r75, %r76, %r77 }, [ %rd12 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r82, %r30;
+	mov.u32 %r83, %r30;
+	mov.u32 %r84, %r30;
+	mov.u32 %r85, %r30;
+	@%p1 ld.global.v4.b32 { %r82, %r83, %r84, %r85 }, [ %rd13 + 0 ];
+	// end inline asm
+	.loc	1 37 33                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:37:33
+	selp.f32 	%r153, %r26, 0fFF800000, %p1;
+	selp.f32 	%r154, %r27, 0fFF800000, %p1;
+	selp.f32 	%r155, %r28, 0fFF800000, %p1;
+	selp.f32 	%r156, %r29, 0fFF800000, %p1;
+	selp.f32 	%r157, %r34, 0fFF800000, %p1;
+	selp.f32 	%r158, %r35, 0fFF800000, %p1;
+	selp.f32 	%r159, %r36, 0fFF800000, %p1;
+	selp.f32 	%r160, %r37, 0fFF800000, %p1;
+	selp.f32 	%r161, %r42, 0fFF800000, %p1;
+	selp.f32 	%r162, %r43, 0fFF800000, %p1;
+	selp.f32 	%r163, %r44, 0fFF800000, %p1;
+	selp.f32 	%r164, %r45, 0fFF800000, %p1;
+	selp.f32 	%r165, %r50, 0fFF800000, %p1;
+	selp.f32 	%r166, %r51, 0fFF800000, %p1;
+	selp.f32 	%r167, %r52, 0fFF800000, %p1;
+	selp.f32 	%r168, %r53, 0fFF800000, %p1;
+$L__tmp1:
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p33, %r153, %r157;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p34, %r153, %r153;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r169, %r153, %r157, %p33;
+	selp.f32 	%r170, %r153, %r169, %p34;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p35, %r154, %r158;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p36, %r154, %r154;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r171, %r154, %r158, %p35;
+	selp.f32 	%r172, %r154, %r171, %p36;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p37, %r155, %r159;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p38, %r155, %r155;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r173, %r155, %r159, %p37;
+	selp.f32 	%r174, %r155, %r173, %p38;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p39, %r156, %r160;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p40, %r156, %r156;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r175, %r156, %r160, %p39;
+	selp.f32 	%r176, %r156, %r175, %p40;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p41, %r170, %r161;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p42, %r170, %r170;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r177, %r170, %r161, %p42;
+	selp.f32 	%r178, %r170, %r177, %p41;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p43, %r172, %r162;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p44, %r172, %r172;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r179, %r172, %r162, %p44;
+	selp.f32 	%r180, %r172, %r179, %p43;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p45, %r174, %r163;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p46, %r174, %r174;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r181, %r174, %r163, %p46;
+	selp.f32 	%r182, %r174, %r181, %p45;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p47, %r176, %r164;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p48, %r176, %r176;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r183, %r176, %r164, %p48;
+	selp.f32 	%r184, %r176, %r183, %p47;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p49, %r178, %r165;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p50, %r178, %r178;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r185, %r178, %r165, %p50;
+	selp.f32 	%r91, %r178, %r185, %p49;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p51, %r180, %r166;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p52, %r180, %r180;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r186, %r180, %r166, %p52;
+	selp.f32 	%r93, %r180, %r186, %p51;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p53, %r182, %r167;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p54, %r182, %r182;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r187, %r182, %r167, %p54;
+	selp.f32 	%r95, %r182, %r187, %p53;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p55, %r184, %r168;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p56, %r184, %r184;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r188, %r184, %r168, %p56;
+	selp.f32 	%r97, %r184, %r188, %p55;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shl.b32 	%r189, %r144, 7;
+	mov.b32 	%r190, global_smem;
+	add.s32 	%r191, %r190, %r189;
+	shl.b32 	%r192, %r147, 2;
+	add.s32 	%r90, %r191, %r192;
+	mov.pred 	%p9, -1;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r90 + 0 ], %r91;
+	// end inline asm
+	add.s32 	%r92, %r90, 32;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r92 + 0 ], %r93;
+	// end inline asm
+	add.s32 	%r94, %r90, 64;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r94 + 0 ], %r95;
+	// end inline asm
+	add.s32 	%r96, %r90, 96;
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r96 + 0 ], %r97;
+	// end inline asm
+	bar.sync 	0;
+	shl.b32 	%r193, %r2, 2;
+	add.s32 	%r99, %r190, %r193;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r98, [ %r99 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r194, %r98, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p57, %r98, %r194;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p58, %r98, %r98;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r195, %r98, %r194, %p57;
+	selp.f32 	%r196, %r98, %r195, %p58;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r197, %r196, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p59, %r196, %r197;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p60, %r196, %r196;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r198, %r196, %r197, %p60;
+	selp.f32 	%r199, %r196, %r198, %p59;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r200, %r199, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p61, %r199, %r200;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p62, %r199, %r199;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	and.b32 	%r201, %r2, 7;
+	setp.eq.b32 	%p14, %r201, 0;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.b32 	%r202, %r199, %r200, %p62;
+	selp.b32 	%r101, %r199, %r202, %p61;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r99 + 0 ], %r101;
+	// end inline asm
+	add.s32 	%r103, %r99, 1024;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r102, [ %r103 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r203, %r102, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p63, %r102, %r203;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p64, %r102, %r102;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r204, %r102, %r203, %p63;
+	selp.f32 	%r205, %r102, %r204, %p64;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r206, %r205, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p65, %r205, %r206;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p66, %r205, %r205;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r207, %r205, %r206, %p66;
+	selp.f32 	%r208, %r205, %r207, %p65;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r209, %r208, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p67, %r208, %r209;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p68, %r208, %r208;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.b32 	%r210, %r208, %r209, %p68;
+	selp.b32 	%r105, %r208, %r210, %p67;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r103 + 0 ], %r105;
+	// end inline asm
+	add.s32 	%r107, %r99, 2048;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r106, [ %r107 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r211, %r106, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p69, %r106, %r211;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p70, %r106, %r106;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r212, %r106, %r211, %p69;
+	selp.f32 	%r213, %r106, %r212, %p70;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r214, %r213, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p71, %r213, %r214;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p72, %r213, %r213;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r215, %r213, %r214, %p72;
+	selp.f32 	%r216, %r213, %r215, %p71;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r217, %r216, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p73, %r216, %r217;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p74, %r216, %r216;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.b32 	%r218, %r216, %r217, %p74;
+	selp.b32 	%r109, %r216, %r218, %p73;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r107 + 0 ], %r109;
+	// end inline asm
+	add.s32 	%r111, %r99, 3072;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r110, [ %r111 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r219, %r110, 4, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p75, %r110, %r219;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p76, %r110, %r110;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r220, %r110, %r219, %p75;
+	selp.f32 	%r221, %r110, %r220, %p76;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r222, %r221, 2, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p77, %r221, %r222;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p78, %r221, %r221;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.f32 	%r223, %r221, %r222, %p78;
+	selp.f32 	%r224, %r221, %r223, %p77;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	shfl.sync.bfly.b32 	%r225, %r224, 1, 31, -1;
+	.loc	2 110 15                        // triton_helpers.py:110:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.gt.f32 	%p79, %r224, %r225;
+	.loc	2 112 21                        // triton_helpers.py:112:21 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	setp.nan.f32 	%p80, %r224, %r224;
+	.loc	2 113 29                        // triton_helpers.py:113:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	selp.b32 	%r226, %r224, %r225, %p80;
+	selp.b32 	%r113, %r224, %r226, %p79;
+	.loc	2 123 29                        // triton_helpers.py:123:29 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:37 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r111 + 0 ], %r113;
+	// end inline asm
+	bar.sync 	0;
+	ld.shared.b32 	%r227, [%r191];
+	ld.shared.b32 	%r228, [%r191+32];
+	ld.shared.b32 	%r229, [%r191+64];
+	ld.shared.b32 	%r230, [%r191+96];
+$L__tmp2:
+	.loc	1 38 40                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:38:40
+	bar.sync 	0;
+	mad.lo.s32 	%r3, %r144, -112, %r191;
+	mov.b64 	%rd2, {%r229, %r230};
+	mov.b64 	%rd1, {%r227, %r228};
+	st.shared.v2.b64 	[%r3], {%rd1, %rd2};
+	bar.sync 	0;
+	shl.b32 	%r231, %r143, 7;
+	shl.b32 	%r232, %r2, 4;
+	or.b32 	%r233, %r231, %r232;
+	and.b32 	%r234, %r233, 496;
+	add.s32 	%r457, %r190, %r234;
+	// begin inline asm
+	ldmatrix.sync.aligned.m8n8.x1.shared.b16 {%r459}, [%r457];
+	// end inline asm
+	.loc	1 40 19                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:40:19
+	setp.eq.f32 	%p81, %r227, 0fFF800000;
+	setp.eq.f32 	%p82, %r228, 0fFF800000;
+	setp.eq.f32 	%p83, %r229, 0fFF800000;
+	setp.eq.f32 	%p84, %r230, 0fFF800000;
+	.loc	1 41 18                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:41:18
+	sub.f32 	%r235, %r26, %r227;
+	sub.f32 	%r236, %r27, %r228;
+	sub.f32 	%r237, %r28, %r229;
+	sub.f32 	%r238, %r29, %r230;
+	sub.f32 	%r239, %r34, %r227;
+	sub.f32 	%r240, %r35, %r228;
+	sub.f32 	%r241, %r36, %r229;
+	sub.f32 	%r242, %r37, %r230;
+	sub.f32 	%r243, %r42, %r227;
+	sub.f32 	%r244, %r43, %r228;
+	sub.f32 	%r245, %r44, %r229;
+	sub.f32 	%r246, %r45, %r230;
+	sub.f32 	%r247, %r50, %r227;
+	sub.f32 	%r248, %r51, %r228;
+	sub.f32 	%r249, %r52, %r229;
+	sub.f32 	%r250, %r53, %r230;
+	.loc	1 43 33                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:43:33
+	selp.f32 	%r251, 0f00000000, %r235, %p81;
+	selp.f32 	%r252, 0f00000000, %r236, %p82;
+	selp.f32 	%r253, 0f00000000, %r237, %p83;
+	selp.f32 	%r254, 0f00000000, %r238, %p84;
+	selp.f32 	%r255, 0f00000000, %r239, %p81;
+	selp.f32 	%r256, 0f00000000, %r240, %p82;
+	selp.f32 	%r257, 0f00000000, %r241, %p83;
+	selp.f32 	%r258, 0f00000000, %r242, %p84;
+	selp.f32 	%r259, 0f00000000, %r243, %p81;
+	selp.f32 	%r260, 0f00000000, %r244, %p82;
+	selp.f32 	%r261, 0f00000000, %r245, %p83;
+	selp.f32 	%r262, 0f00000000, %r246, %p84;
+	selp.f32 	%r263, 0f00000000, %r247, %p81;
+	selp.f32 	%r264, 0f00000000, %r248, %p82;
+	selp.f32 	%r265, 0f00000000, %r249, %p83;
+	selp.f32 	%r266, 0f00000000, %r250, %p84;
+	.loc	1 44 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:44:27
+	ex2.approx.ftz.f32 	%r267, %r251;
+	ex2.approx.ftz.f32 	%r268, %r252;
+	ex2.approx.ftz.f32 	%r269, %r253;
+	ex2.approx.ftz.f32 	%r270, %r254;
+	ex2.approx.ftz.f32 	%r271, %r255;
+	ex2.approx.ftz.f32 	%r272, %r256;
+	ex2.approx.ftz.f32 	%r273, %r257;
+	ex2.approx.ftz.f32 	%r274, %r258;
+	ex2.approx.ftz.f32 	%r275, %r259;
+	ex2.approx.ftz.f32 	%r276, %r260;
+	ex2.approx.ftz.f32 	%r277, %r261;
+	ex2.approx.ftz.f32 	%r278, %r262;
+	ex2.approx.ftz.f32 	%r279, %r263;
+	ex2.approx.ftz.f32 	%r280, %r264;
+	ex2.approx.ftz.f32 	%r281, %r265;
+	ex2.approx.ftz.f32 	%r282, %r266;
+	.loc	1 45 19                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:45:19
+	mul.f32 	%r283, %r271, %r66;
+	mul.f32 	%r284, %r272, %r67;
+	mul.f32 	%r285, %r273, %r68;
+	mul.f32 	%r286, %r274, %r69;
+$L__tmp3:
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	bar.sync 	0;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	fma.rn.f32 	%r287, %r267, %r58, %r283;
+	fma.rn.f32 	%r288, %r268, %r59, %r284;
+	fma.rn.f32 	%r289, %r269, %r60, %r285;
+	fma.rn.f32 	%r290, %r270, %r61, %r286;
+	fma.rn.f32 	%r291, %r275, %r74, %r287;
+	fma.rn.f32 	%r292, %r276, %r75, %r288;
+	fma.rn.f32 	%r293, %r277, %r76, %r289;
+	fma.rn.f32 	%r294, %r278, %r77, %r290;
+	fma.rn.f32 	%r295, %r279, %r82, %r291;
+	fma.rn.f32 	%r296, %r280, %r83, %r292;
+	fma.rn.f32 	%r297, %r281, %r84, %r293;
+	fma.rn.f32 	%r298, %r282, %r85, %r294;
+	selp.b32 	%r117, %r295, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r90 + 0 ], %r117;
+	// end inline asm
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	selp.b32 	%r119, %r296, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r92 + 0 ], %r119;
+	// end inline asm
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	selp.b32 	%r121, %r297, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r94 + 0 ], %r121;
+	// end inline asm
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	selp.b32 	%r123, %r298, 0, %p1;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p9 st.shared.b32 [ %r96 + 0 ], %r123;
+	// end inline asm
+	bar.sync 	0;
+	// begin inline asm
+	@%p9 ld.shared.b32 %r124, [ %r99 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r299, %r124, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r300, %r124, %r299;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r301, %r300, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r302, %r300, %r301;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r303, %r302, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r127, %r302, %r303;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r99 + 0 ], %r127;
+	// end inline asm
+	// begin inline asm
+	@%p9 ld.shared.b32 %r128, [ %r103 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r304, %r128, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r305, %r128, %r304;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r306, %r305, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r307, %r305, %r306;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r308, %r307, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r131, %r307, %r308;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r103 + 0 ], %r131;
+	// end inline asm
+	// begin inline asm
+	@%p9 ld.shared.b32 %r132, [ %r107 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r309, %r132, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r310, %r132, %r309;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r311, %r310, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r312, %r310, %r311;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r313, %r312, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r135, %r312, %r313;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r107 + 0 ], %r135;
+	// end inline asm
+	// begin inline asm
+	@%p9 ld.shared.b32 %r136, [ %r111 + 0 ];
+	// end inline asm
+	shfl.sync.bfly.b32 	%r314, %r136, 4, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r315, %r136, %r314;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r316, %r315, 2, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r317, %r315, %r316;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	shfl.sync.bfly.b32 	%r318, %r317, 1, 31, -1;
+	.loc	3 261 15                        // standard.py:261:15 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	add.f32 	%r139, %r317, %r318;
+	.loc	3 291 36                        // standard.py:291:36 @[ cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:26 ]
+	// begin inline asm
+	@%p14 st.shared.b32 [ %r111 + 0 ], %r139;
+	// end inline asm
+	bar.sync 	0;
+	ld.shared.b32 	%r319, [%r191];
+	ld.shared.b32 	%r320, [%r191+32];
+	ld.shared.b32 	%r321, [%r191+64];
+	ld.shared.b32 	%r322, [%r191+96];
+$L__tmp4:
+	.loc	1 48 29                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:48:29
+	bar.sync 	0;
+	st.shared.v4.b32 	[%r3], {%r319, %r320, %r321, %r322};
+	bar.sync 	0;
+	// begin inline asm
+	ldmatrix.sync.aligned.m8n8.x1.shared.b16 {%r460}, [%r457];
+	// end inline asm
+	.loc	1 50 34                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:50:34
+	selp.f32 	%r323, 0f3F800000, %r319, %p81;
+	selp.f32 	%r7, 0f3F800000, %r320, %p82;
+	.loc	1 51 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:51:27
+	setp.lt.f32 	%p85, %r323, 0f00800000;
+	mul.f32 	%r324, %r323, 0f4B000000;
+	selp.f32 	%r10, %r324, %r323, %p85;
+	selp.f32 	%r325, 0fC1B80000, 0f00000000, %p85;
+	add.s32 	%r326, %r10, -1060439283;
+	and.b32 	%r327, %r326, -8388608;
+	sub.s32 	%r328, %r10, %r327;
+	cvt.rn.f32.s32 	%r329, %r327;
+	mov.b32 	%r330, 0f34000000;
+	fma.rn.ftz.f32 	%r331, %r329, %r330, %r325;
+	add.f32 	%r332, %r328, 0fBF800000;
+	mov.b32 	%r333, 0fBE2C7F30;
+	mov.b32 	%r334, 0f3DC6B27F;
+	fma.rn.ftz.f32 	%r335, %r334, %r332, %r333;
+	mov.b32 	%r336, 0f3E2FCF2A;
+	fma.rn.ftz.f32 	%r337, %r335, %r332, %r336;
+	mov.b32 	%r338, 0fBE374E43;
+	fma.rn.ftz.f32 	%r339, %r337, %r332, %r338;
+	mov.b32 	%r340, 0f3E520BF4;
+	fma.rn.ftz.f32 	%r341, %r339, %r332, %r340;
+	mov.b32 	%r342, 0fBE763C8B;
+	fma.rn.ftz.f32 	%r343, %r341, %r332, %r342;
+	mov.b32 	%r344, 0f3E93BF99;
+	fma.rn.ftz.f32 	%r345, %r343, %r332, %r344;
+	mov.b32 	%r346, 0fBEB8AA49;
+	fma.rn.ftz.f32 	%r347, %r345, %r332, %r346;
+	mov.b32 	%r348, 0f3EF6384A;
+	fma.rn.ftz.f32 	%r349, %r347, %r332, %r348;
+	mov.b32 	%r350, 0fBF38AA3B;
+	fma.rn.ftz.f32 	%r351, %r349, %r332, %r350;
+	mul.f32 	%r352, %r332, %r351;
+	mul.f32 	%r353, %r332, %r352;
+	mov.b32 	%r354, 0f3FB8AA3B;
+	fma.rn.ftz.f32 	%r355, %r332, %r354, %r353;
+	add.f32 	%r480, %r331, %r355;
+	setp.lt.u32 	%p86, %r10, 2139095040;
+	mov.b32 	%r356, 0f7F800000;
+	@%p86 bra 	$L__BB0_2;
+// %bb.1:                               // %__nv_fmaf_rn.exit.i.i
+	.loc	1 0 27                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:0:27
+	fma.rn.ftz.f32 	%r480, %r10, %r356, %r356;
+$L__BB0_2:                              // %__nv_log2f.exit
+	selp.f32 	%r8, 0f3F800000, %r321, %p83;
+	.loc	1 51 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:51:27
+	setp.lt.f32 	%p87, %r7, 0f00800000;
+	mul.f32 	%r357, %r7, 0f4B000000;
+	selp.f32 	%r14, %r357, %r7, %p87;
+	selp.f32 	%r358, 0fC1B80000, 0f00000000, %p87;
+	add.s32 	%r359, %r14, -1060439283;
+	and.b32 	%r360, %r359, -8388608;
+	sub.s32 	%r361, %r14, %r360;
+	cvt.rn.f32.s32 	%r362, %r360;
+	fma.rn.ftz.f32 	%r364, %r362, %r330, %r358;
+	add.f32 	%r365, %r361, 0fBF800000;
+	fma.rn.ftz.f32 	%r368, %r334, %r365, %r333;
+	fma.rn.ftz.f32 	%r370, %r368, %r365, %r336;
+	fma.rn.ftz.f32 	%r372, %r370, %r365, %r338;
+	fma.rn.ftz.f32 	%r374, %r372, %r365, %r340;
+	fma.rn.ftz.f32 	%r376, %r374, %r365, %r342;
+	fma.rn.ftz.f32 	%r378, %r376, %r365, %r344;
+	fma.rn.ftz.f32 	%r380, %r378, %r365, %r346;
+	fma.rn.ftz.f32 	%r382, %r380, %r365, %r348;
+	fma.rn.ftz.f32 	%r384, %r382, %r365, %r350;
+	mul.f32 	%r385, %r365, %r384;
+	mul.f32 	%r386, %r365, %r385;
+	fma.rn.ftz.f32 	%r388, %r365, %r354, %r386;
+	add.f32 	%r481, %r364, %r388;
+	setp.lt.u32 	%p88, %r14, 2139095040;
+	@%p88 bra 	$L__BB0_4;
+// %bb.3:                               // %__nv_fmaf_rn.exit.i.i74
+	.loc	1 0 27                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:0:27
+	fma.rn.ftz.f32 	%r481, %r14, %r356, %r356;
+$L__BB0_4:                              // %__nv_log2f.exit77
+	selp.f32 	%r9, 0f3F800000, %r322, %p84;
+	.loc	1 51 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:51:27
+	setp.lt.f32 	%p89, %r8, 0f00800000;
+	mul.f32 	%r390, %r8, 0f4B000000;
+	selp.f32 	%r18, %r390, %r8, %p89;
+	selp.f32 	%r391, 0fC1B80000, 0f00000000, %p89;
+	add.s32 	%r392, %r18, -1060439283;
+	and.b32 	%r393, %r392, -8388608;
+	sub.s32 	%r394, %r18, %r393;
+	cvt.rn.f32.s32 	%r395, %r393;
+	mov.b32 	%r396, 0f34000000;
+	fma.rn.ftz.f32 	%r397, %r395, %r396, %r391;
+	add.f32 	%r398, %r394, 0fBF800000;
+	mov.b32 	%r399, 0fBE2C7F30;
+	mov.b32 	%r400, 0f3DC6B27F;
+	fma.rn.ftz.f32 	%r401, %r400, %r398, %r399;
+	mov.b32 	%r402, 0f3E2FCF2A;
+	fma.rn.ftz.f32 	%r403, %r401, %r398, %r402;
+	mov.b32 	%r404, 0fBE374E43;
+	fma.rn.ftz.f32 	%r405, %r403, %r398, %r404;
+	mov.b32 	%r406, 0f3E520BF4;
+	fma.rn.ftz.f32 	%r407, %r405, %r398, %r406;
+	mov.b32 	%r408, 0fBE763C8B;
+	fma.rn.ftz.f32 	%r409, %r407, %r398, %r408;
+	mov.b32 	%r410, 0f3E93BF99;
+	fma.rn.ftz.f32 	%r411, %r409, %r398, %r410;
+	mov.b32 	%r412, 0fBEB8AA49;
+	fma.rn.ftz.f32 	%r413, %r411, %r398, %r412;
+	mov.b32 	%r414, 0f3EF6384A;
+	fma.rn.ftz.f32 	%r415, %r413, %r398, %r414;
+	mov.b32 	%r416, 0fBF38AA3B;
+	fma.rn.ftz.f32 	%r417, %r415, %r398, %r416;
+	mul.f32 	%r418, %r398, %r417;
+	mul.f32 	%r419, %r398, %r418;
+	mov.b32 	%r420, 0f3FB8AA3B;
+	fma.rn.ftz.f32 	%r421, %r398, %r420, %r419;
+	add.f32 	%r482, %r397, %r421;
+	setp.lt.u32 	%p90, %r18, 2139095040;
+	mov.b32 	%r422, 0f7F800000;
+	@%p90 bra 	$L__BB0_6;
+// %bb.5:                               // %__nv_fmaf_rn.exit.i.i104
+	.loc	1 0 27                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:0:27
+	fma.rn.ftz.f32 	%r482, %r18, %r422, %r422;
+$L__BB0_6:                              // %__nv_log2f.exit107
+	ld.param.b64 	%rd5, [triton_per_fused_mul_1_param_4];
+	ld.param.b64 	%rd4, [triton_per_fused_mul_1_param_3];
+	ld.param.b64 	%rd3, [triton_per_fused_mul_1_param_2];
+	.loc	1 51 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:51:27
+	setp.lt.f32 	%p91, %r9, 0f00800000;
+	mul.f32 	%r423, %r9, 0f4B000000;
+	selp.f32 	%r22, %r423, %r9, %p91;
+	selp.f32 	%r424, 0fC1B80000, 0f00000000, %p91;
+	add.s32 	%r425, %r22, -1060439283;
+	and.b32 	%r426, %r425, -8388608;
+	sub.s32 	%r427, %r22, %r426;
+	cvt.rn.f32.s32 	%r428, %r426;
+	fma.rn.ftz.f32 	%r430, %r428, %r396, %r424;
+	add.f32 	%r431, %r427, 0fBF800000;
+	fma.rn.ftz.f32 	%r434, %r400, %r431, %r399;
+	fma.rn.ftz.f32 	%r436, %r434, %r431, %r402;
+	fma.rn.ftz.f32 	%r438, %r436, %r431, %r404;
+	fma.rn.ftz.f32 	%r440, %r438, %r431, %r406;
+	fma.rn.ftz.f32 	%r442, %r440, %r431, %r408;
+	fma.rn.ftz.f32 	%r444, %r442, %r431, %r410;
+	fma.rn.ftz.f32 	%r446, %r444, %r431, %r412;
+	fma.rn.ftz.f32 	%r448, %r446, %r431, %r414;
+	fma.rn.ftz.f32 	%r450, %r448, %r431, %r416;
+	mul.f32 	%r451, %r431, %r450;
+	mul.f32 	%r452, %r431, %r451;
+	fma.rn.ftz.f32 	%r454, %r431, %r420, %r452;
+	add.f32 	%r483, %r430, %r454;
+	setp.lt.u32 	%p92, %r22, 2139095040;
+	@%p92 bra 	$L__BB0_8;
+// %bb.7:                               // %__nv_fmaf_rn.exit.i.i134
+	.loc	1 0 27                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:0:27
+	fma.rn.ftz.f32 	%r483, %r22, %r422, %r422;
+$L__BB0_8:                              // %__nv_log2f.exit137
+	.loc	1 51 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:51:27
+	setp.eq.f32 	%p96, %r10, 0f00000000;
+	setp.eq.f32 	%p97, %r14, 0f00000000;
+	setp.eq.f32 	%p98, %r18, 0f00000000;
+	setp.eq.f32 	%p99, %r22, 0f00000000;
+	.loc	1 25 44                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:25:44
+	and.b32 	%r461, %r2, 127;
+	.loc	1 25 23                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:25:23
+	or.b32 	%r462, %r1, %r461;
+	.loc	1 26 21                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:26:21
+	setp.lt.s32 	%p100, %r462, 1536;
+	.loc	1 51 27                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:51:27
+	selp.f32 	%r463, 0fFF800000, %r483, %p99;
+	selp.f32 	%r464, 0fFF800000, %r482, %p98;
+	selp.f32 	%r465, 0fFF800000, %r481, %p97;
+	selp.f32 	%r466, 0fFF800000, %r480, %p96;
+	.loc	1 52 20                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:52:20
+	mov.b64 	{%r467, %r468}, %rd1;
+	add.f32 	%r469, %r467, %r466;
+	add.f32 	%r470, %r468, %r465;
+	mov.b64 	{%r471, %r472}, %rd2;
+	add.f32 	%r473, %r471, %r464;
+	add.f32 	%r474, %r472, %r463;
+	.loc	1 54 20                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:54:20
+	mul.f32 	%r475, %r474, 0f3F317218;
+	mul.f32 	%r476, %r473, 0f3F317218;
+	mul.f32 	%r477, %r470, 0f3F317218;
+	mul.f32 	%r478, %r469, 0f3F317218;
+	.loc	1 55 25                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:55:25
+	mul.wide.s32 	%rd23, %r462, 4;
+	add.s64 	%rd20, %rd5, %rd23;
+	.loc	1 55 37                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:55:37
+	bar.sync 	0;
+	st.shared.v4.b32 	[%r3], {%r478, %r477, %r476, %r475};
+	bar.sync 	0;
+	// begin inline asm
+	ldmatrix.sync.aligned.m8n8.x1.shared.b16 {%r458}, [%r457];
+	// end inline asm
+	and.b32 	%r479, %r2, 128;
+	setp.eq.b32 	%p101, %r479, 0;
+	and.pred 	%p93, %p101, %p100;
+	// begin inline asm
+	@%p93 st.global.b32 [ %rd20 + 0 ], { %r458 };
+	// end inline asm
+	.loc	1 56 25                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:56:25
+	add.s64 	%rd21, %rd3, %rd23;
+	.loc	1 56 36                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:56:36
+	// begin inline asm
+	@%p93 st.global.b32 [ %rd21 + 0 ], { %r459 };
+	// end inline asm
+	.loc	1 57 25                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:57:25
+	add.s64 	%rd22, %rd4, %rd23;
+	.loc	1 57 37                         // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:57:37
+	// begin inline asm
+	@%p93 st.global.b32 [ %rd22 + 0 ], { %r460 };
+	// end inline asm
+	.loc	1 57 4                          // cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py:57:4
+	ret;
+$L__tmp5:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py"
+	.file	2 "/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py"
+	.file	3 "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 235                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xe4 DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 114
+.b8 53
+.b8 103
+.b8 105
+.b8 109
+.b8 114
+.b8 116
+.b8 113
+.b8 102
+.b8 53
+.b8 103
+.b8 113
+.b8 109
+.b8 103
+.b8 107
+.b8 103
+.b8 105
+.b8 114
+.b8 122
+.b8 54
+.b8 110
+.b8 101
+.b8 98
+.b8 112
+.b8 52
+.b8 105
+.b8 106
+.b8 119
+.b8 116
+.b8 98
+.b8 122
+.b8 104
+.b8 109
+.b8 113
+.b8 108
+.b8 115
+.b8 100
+.b8 103
+.b8 106
+.b8 113
+.b8 100
+.b8 97
+.b8 51
+.b8 51
+.b8 100
+.b8 114
+.b8 52
+.b8 51
+.b8 113
+.b8 114
+.b8 101
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 106
+.b8 117
+.b8 110
+.b8 113
+.b8 117
+.b8 97
+.b8 110
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 114
+.b8 53
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8f:0x19 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 112
+.b8 101
+.b8 114
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 109
+.b8 117
+.b8 108
+.b8 95
+.b8 49
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xa8:0x46 DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 143                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xbd:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 38                                  // DW_AT_call_line
+.b8 37                                  // DW_AT_call_column
+.b8 4                                   // Abbrev [4] 0xd5:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp3                           // DW_AT_low_pc
+.b64 $L__tmp4                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 48                                  // DW_AT_call_line
+.b8 26                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.source

@@ -0,0 +1,302 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":18:0)
+#loc47 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":122:0)
+#loc49 = loc(unknown)
+#loc52 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":109:0)
+#loc61 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":86:0)
+#loc65 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":63:0)
+#loc74 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":285:0)
+#loc78 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":260:0)
+#loc82 = loc("in_ptr0"(#loc))
+#loc83 = loc("in_ptr1"(#loc))
+#loc84 = loc("out_ptr0"(#loc))
+#loc85 = loc("out_ptr1"(#loc))
+#loc86 = loc("out_ptr2"(#loc))
+#loc87 = loc("xnumel"(#loc))
+#loc88 = loc("r0_numel"(#loc))
+#loc128 = loc("a"(#loc47))
+#loc129 = loc("a"(#loc52))
+#loc130 = loc("b"(#loc52))
+#loc134 = loc("x"(#loc61))
+#loc135 = loc("x"(#loc65))
+#loc136 = loc("input"(#loc74))
+#loc137 = loc("a"(#loc78))
+#loc138 = loc("b"(#loc78))
+module {
+  tt.func public @triton_per_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %out_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %xnumel_0 = arith.constant 1536 : i32 loc(#loc89)
+    %r0_numel_1 = arith.constant 32 : i32 loc(#loc90)
+    %xoffset = tt.get_program_id x : i32 loc(#loc91)
+    %xoffset_2 = arith.constant 128 : i32 loc(#loc92)
+    %xoffset_3 = arith.constant 128 : i32 loc(#loc92)
+    %xoffset_4 = arith.muli %xoffset, %xoffset_3 : i32 loc(#loc92)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc93)
+    %xindex_5 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32> loc(#loc94)
+    %xindex_6 = tt.splat %xoffset_4 : i32 -> tensor<128x1xi32> loc(#loc95)
+    %xindex_7 = arith.addi %xindex_6, %xindex_5 : tensor<128x1xi32> loc(#loc95)
+    %xmask = arith.constant dense<1536> : tensor<128x1xi32> loc(#loc96)
+    %xmask_8 = arith.cmpi slt, %xindex_7, %xmask : tensor<128x1xi32> loc(#loc96)
+    %r0_index = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc97)
+    %r0_index_9 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<32xi32> -> tensor<1x32xi32> loc(#loc98)
+    %r0_offset = arith.constant 0 : i32 loc(#loc99)
+    %r0_mask = arith.constant true loc(#loc100)
+    %r0_mask_10 = arith.constant dense<true> : tensor<128x32xi1> loc(#loc100)
+    %tmp0 = arith.constant 1536 : i32 loc(#loc101)
+    %tmp0_11 = arith.constant 1536 : i32 loc(#loc101)
+    %tmp0_12 = arith.constant dense<1536> : tensor<1x32xi32> loc(#loc101)
+    %tmp0_13 = arith.muli %tmp0_12, %r0_index_9 : tensor<1x32xi32> loc(#loc101)
+    %tmp0_14 = tt.broadcast %xindex_7 : tensor<128x1xi32> -> tensor<128x32xi32> loc(#loc102)
+    %tmp0_15 = tt.broadcast %tmp0_13 : tensor<1x32xi32> -> tensor<128x32xi32> loc(#loc102)
+    %tmp0_16 = arith.addi %tmp0_14, %tmp0_15 : tensor<128x32xi32> loc(#loc102)
+    %tmp0_17 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc103)
+    %tmp0_18 = tt.addptr %tmp0_17, %tmp0_16 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi32> loc(#loc103)
+    %tmp0_19 = arith.constant 0.000000e+00 : f32 loc(#loc104)
+    %tmp0_20 = tt.broadcast %xmask_8 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc104)
+    %tmp0_21 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc104)
+    %tmp0_22 = tt.load %tmp0_18, %tmp0_20, %tmp0_21 : tensor<128x32x!tt.ptr<f32>> loc(#loc104)
+    %tmp5 = arith.constant 1536 : i32 loc(#loc105)
+    %tmp5_23 = arith.constant 1536 : i32 loc(#loc105)
+    %tmp5_24 = arith.constant dense<1536> : tensor<1x32xi32> loc(#loc105)
+    %tmp5_25 = arith.muli %tmp5_24, %r0_index_9 : tensor<1x32xi32> loc(#loc105)
+    %tmp5_26 = tt.broadcast %xindex_7 : tensor<128x1xi32> -> tensor<128x32xi32> loc(#loc106)
+    %tmp5_27 = tt.broadcast %tmp5_25 : tensor<1x32xi32> -> tensor<128x32xi32> loc(#loc106)
+    %tmp5_28 = arith.addi %tmp5_26, %tmp5_27 : tensor<128x32xi32> loc(#loc106)
+    %tmp5_29 = tt.splat %in_ptr1 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc107)
+    %tmp5_30 = tt.addptr %tmp5_29, %tmp5_28 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi32> loc(#loc107)
+    %tmp5_31 = arith.constant 0.000000e+00 : f32 loc(#loc108)
+    %tmp5_32 = tt.broadcast %xmask_8 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc108)
+    %tmp5_33 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc108)
+    %tmp5_34 = tt.load %tmp5_30, %tmp5_32, %tmp5_33 : tensor<128x32x!tt.ptr<f32>> loc(#loc108)
+    %tmp3 = arith.constant 0xFF800000 : f32 loc(#loc109)
+    %tmp3_35 = arith.constant 0xFF800000 : f32 loc(#loc109)
+    %tmp3_36 = arith.constant dense<0xFF800000> : tensor<128x32xf32> loc(#loc109)
+    %tmp3_37 = tt.broadcast %xmask_8 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc109)
+    %tmp3_38 = arith.select %tmp3_37, %tmp0_22, %tmp3_36 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc109)
+    %tmp4 = tt.call @"torch._inductor.runtime.triton_helpers.max2__fp32S128_32S__(1,)cconstexpr_1_"(%tmp3_38) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc110)
+    %tmp4_39 = tt.expand_dims %tmp4 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc111)
+    %tmp6 = arith.constant 0xFF800000 : f32 loc(#loc112)
+    %tmp7 = arith.constant dense<0xFF800000> : tensor<128x1xf32> loc(#loc113)
+    %tmp7_40 = arith.cmpf oeq, %tmp4_39, %tmp7 : tensor<128x1xf32> loc(#loc113)
+    %tmp8 = tt.broadcast %tmp4_39 : tensor<128x1xf32> -> tensor<128x32xf32> loc(#loc114)
+    %tmp8_41 = arith.subf %tmp0_22, %tmp8 : tensor<128x32xf32> loc(#loc114)
+    %tmp9 = arith.constant 0.000000e+00 : f32 loc(#loc115)
+    %tmp10 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc116)
+    %tmp10_42 = tt.broadcast %tmp7_40 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc116)
+    %tmp10_43 = arith.select %tmp10_42, %tmp10, %tmp8_41 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc116)
+    %tmp11 = tt.extern_elementwise %tmp10_43 {libname = "", libpath = "", pure = true, symbol = "__nv_exp2f"} : (tensor<128x32xf32>) -> tensor<128x32xf32> loc(#loc117)
+    %tmp12 = arith.mulf %tmp5_34, %tmp11 : tensor<128x32xf32> loc(#loc118)
+    %tmp15 = arith.constant 0 : i32 loc(#loc119)
+    %tmp15_44 = arith.constant 0.000000e+00 : f32 loc(#loc119)
+    %tmp15_45 = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc119)
+    %tmp15_46 = tt.broadcast %xmask_8 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc119)
+    %tmp15_47 = arith.select %tmp15_46, %tmp12, %tmp15_45 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc119)
+    %tmp16 = tt.call @"triton.language.standard.sum__fp32S128_32S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%tmp15_47) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc120)
+    %tmp16_48 = tt.expand_dims %tmp16 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc121)
+    %tmp17 = arith.constant 1.000000e+00 : f32 loc(#loc122)
+    %tmp18 = arith.constant dense<1.000000e+00> : tensor<128x1xf32> loc(#loc123)
+    %tmp18_49 = arith.select %tmp7_40, %tmp18, %tmp16_48 : tensor<128x1xi1>, tensor<128x1xf32> loc(#loc123)
+    %tmp19 = tt.extern_elementwise %tmp18_49 {libname = "", libpath = "", pure = true, symbol = "__nv_log2f"} : (tensor<128x1xf32>) -> tensor<128x1xf32> loc(#loc124)
+    %tmp20 = arith.addf %tmp19, %tmp4_39 : tensor<128x1xf32> loc(#loc125)
+    %tmp21 = arith.constant 0.693147182 : f32 loc(#loc126)
+    %tmp22 = arith.constant dense<0.693147182> : tensor<128x1xf32> loc(#loc127)
+    %tmp22_50 = arith.mulf %tmp20, %tmp22 : tensor<128x1xf32> loc(#loc127)
+    %0 = tt.splat %out_ptr2 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc40)
+    %1 = tt.addptr %0, %xindex_7 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc40)
+    tt.store %1, %tmp22_50, %xmask_8 : tensor<128x1x!tt.ptr<f32>> loc(#loc41)
+    %2 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc42)
+    %3 = tt.addptr %2, %xindex_7 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc42)
+    tt.store %3, %tmp4_39, %xmask_8 : tensor<128x1x!tt.ptr<f32>> loc(#loc43)
+    %4 = tt.splat %out_ptr1 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc44)
+    %5 = tt.addptr %4, %xindex_7 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc44)
+    tt.store %5, %tmp16_48, %xmask_8 : tensor<128x1x!tt.ptr<f32>> loc(#loc45)
+    tt.return loc(#loc46)
+  } loc(#loc)
+  tt.func private @"torch._inductor.runtime.triton_helpers.max2__fp32S128_32S__(1,)cconstexpr_1_"(%a: tensor<128x32xf32> loc("a"(#loc47))) -> tensor<128xf32> attributes {noinline = false} {
+    %0 = "tt.reduce"(%a) <{axis = 1 : i32}> ({
+    ^bb0(%arg1: f32 loc(unknown), %arg2: f32 loc(unknown)):
+      %2 = tt.call @torch._inductor.runtime.triton_helpers.maximum__fp32_fp32__(%arg1, %arg2) : (f32, f32) -> f32 loc(#loc48)
+      tt.reduce.return %2 : f32 loc(#loc48)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc48)
+    tt.return %0 : tensor<128xf32> loc(#loc50)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<128xf32> loc(#loc51)
+    tt.return %1 : tensor<128xf32> loc(#loc51)
+  } loc(#loc47)
+  tt.func private @torch._inductor.runtime.triton_helpers.maximum__fp32_fp32__(%a: f32 loc("a"(#loc52)), %b: f32 loc("b"(#loc52))) -> f32 attributes {noinline = false} {
+    %mask = arith.cmpf ogt, %a, %b : f32 loc(#loc139)
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%a) : (f32) -> i1 loc(#loc54)
+    %1 = scf.if %0 -> (i1) {
+      %mask_0 = arith.cmpf une, %a, %a : f32 loc(#loc132)
+      %mask_1 = arith.ori %mask, %mask_0 : i1 loc(#loc140)
+      scf.yield %mask_1 : i1 loc(#loc140)
+    } else {
+      scf.yield %mask : i1 loc(#loc49)
+    } loc(#loc55)
+    %2 = arith.select %1, %a, %b : f32 loc(#loc58)
+    tt.return %2 : f32 loc(#loc59)
+  ^bb1:  // no predecessors
+    %3 = ub.poison : f32 loc(#loc60)
+    tt.return %3 : f32 loc(#loc60)
+  } loc(#loc52)
+  tt.func private @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%x: f32 loc("x"(#loc61))) -> i1 attributes {noinline = false} {
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x) : (f32) -> tensor<1xf32> loc(#loc62)
+    %true = arith.constant true loc(#loc63)
+    tt.return %true : i1 loc(#loc63)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i1 loc(#loc64)
+    tt.return %1 : i1 loc(#loc64)
+  } loc(#loc61)
+  tt.func private @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x: f32 loc("x"(#loc65))) -> tensor<1xf32> attributes {noinline = false} {
+    %0 = tt.call @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() : () -> tensor<1xi1> loc(#loc66)
+    %1 = arith.uitofp %0 : tensor<1xi1> to tensor<1xf32> loc(#loc67)
+    %2 = tt.splat %x : f32 -> tensor<1xf32> loc(#loc67)
+    %3 = arith.addf %2, %1 : tensor<1xf32> loc(#loc67)
+    tt.return %3 : tensor<1xf32> loc(#loc68)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : tensor<1xf32> loc(#loc69)
+    tt.return %4 : tensor<1xf32> loc(#loc69)
+  } loc(#loc65)
+  tt.func private @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() -> tensor<1xi1> attributes {noinline = false} {
+    %false = arith.constant false loc(#loc71)
+    %cst = arith.constant dense<false> : tensor<1xi1> loc(#loc71)
+    tt.return %cst : tensor<1xi1> loc(#loc72)
+  ^bb1:  // no predecessors
+    %0 = ub.poison : tensor<1xi1> loc(#loc73)
+    tt.return %0 : tensor<1xi1> loc(#loc73)
+  } loc(#loc70)
+  tt.func private @"triton.language.standard.sum__fp32S128_32S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%input: tensor<128x32xf32> loc("input"(#loc74))) -> tensor<128xf32> attributes {noinline = false} {
+    %0 = "tt.reduce"(%input) <{axis = 1 : i32}> ({
+    ^bb0(%arg1: f32 loc(unknown), %arg2: f32 loc(unknown)):
+      %2 = tt.call @triton.language.standard._sum_combine__fp32_fp32__(%arg1, %arg2) : (f32, f32) -> f32 loc(#loc75)
+      tt.reduce.return %2 : f32 loc(#loc75)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc75)
+    tt.return %0 : tensor<128xf32> loc(#loc76)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<128xf32> loc(#loc77)
+    tt.return %1 : tensor<128xf32> loc(#loc77)
+  } loc(#loc74)
+  tt.func private @triton.language.standard._sum_combine__fp32_fp32__(%a: f32 loc("a"(#loc78)), %b: f32 loc("b"(#loc78))) -> f32 attributes {noinline = false} {
+    %0 = arith.addf %a, %b : f32 loc(#loc79)
+    tt.return %0 : f32 loc(#loc80)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : f32 loc(#loc81)
+    tt.return %1 : f32 loc(#loc81)
+  } loc(#loc78)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":19:13)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":20:15)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":24:28)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":24:33)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:36)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:44)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:23)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":26:21)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":27:28)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":27:38)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":28:16)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":29:48)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:40)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:35)
+#loc15 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:30)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:47)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:40)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:35)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:30)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:47)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":37:33)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":38:37)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":38:40)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":39:11)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":40:19)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":41:18)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":42:11)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":43:33)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":44:27)
+#loc30 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":45:19)
+#loc31 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":47:35)
+#loc32 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":48:26)
+#loc33 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":48:29)
+#loc34 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":49:12)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":50:34)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":51:27)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":52:20)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":53:12)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":54:20)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":55:25)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":55:37)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":56:25)
+#loc43 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":56:36)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:25)
+#loc45 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:37)
+#loc46 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:4)
+#loc48 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:29)
+#loc50 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:11)
+#loc51 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:4)
+#loc53 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":110:15)
+#loc54 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":111:19)
+#loc55 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":111:7)
+#loc56 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:21)
+#loc57 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:16)
+#loc58 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:29)
+#loc59 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:11)
+#loc60 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:4)
+#loc62 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:29)
+#loc63 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:11)
+#loc64 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:4)
+#loc66 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:30)
+#loc67 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:15)
+#loc68 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:11)
+#loc69 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:4)
+#loc70 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":118:0)
+#loc71 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:31)
+#loc72 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:11)
+#loc73 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:4)
+#loc75 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc76 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:11)
+#loc77 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:4)
+#loc79 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc80 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:11)
+#loc81 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:4)
+#loc89 = loc("xnumel"(#loc1))
+#loc90 = loc("r0_numel"(#loc2))
+#loc91 = loc("xoffset"(#loc3))
+#loc92 = loc("xoffset"(#loc4))
+#loc93 = loc("xindex"(#loc5))
+#loc94 = loc("xindex"(#loc6))
+#loc95 = loc("xindex"(#loc7))
+#loc96 = loc("xmask"(#loc8))
+#loc97 = loc("r0_index"(#loc9))
+#loc98 = loc("r0_index"(#loc10))
+#loc99 = loc("r0_offset"(#loc11))
+#loc100 = loc("r0_mask"(#loc12))
+#loc101 = loc("tmp0"(#loc13))
+#loc102 = loc("tmp0"(#loc14))
+#loc103 = loc("tmp0"(#loc15))
+#loc104 = loc("tmp0"(#loc16))
+#loc105 = loc("tmp5"(#loc17))
+#loc106 = loc("tmp5"(#loc18))
+#loc107 = loc("tmp5"(#loc19))
+#loc108 = loc("tmp5"(#loc20))
+#loc109 = loc("tmp3"(#loc21))
+#loc110 = loc("tmp4"(#loc22))
+#loc111 = loc("tmp4"(#loc23))
+#loc112 = loc("tmp6"(#loc24))
+#loc113 = loc("tmp7"(#loc25))
+#loc114 = loc("tmp8"(#loc26))
+#loc115 = loc("tmp9"(#loc27))
+#loc116 = loc("tmp10"(#loc28))
+#loc117 = loc("tmp11"(#loc29))
+#loc118 = loc("tmp12"(#loc30))
+#loc119 = loc("tmp15"(#loc31))
+#loc120 = loc("tmp16"(#loc32))
+#loc121 = loc("tmp16"(#loc33))
+#loc122 = loc("tmp17"(#loc34))
+#loc123 = loc("tmp18"(#loc35))
+#loc124 = loc("tmp19"(#loc36))
+#loc125 = loc("tmp20"(#loc37))
+#loc126 = loc("tmp21"(#loc38))
+#loc127 = loc("tmp22"(#loc39))
+#loc131 = loc("mask"(#loc53))
+#loc132 = loc("mask"(#loc56))
+#loc133 = loc("mask"(#loc57))
+#loc139 = loc("mask"(#loc131))
+#loc140 = loc("mask"(#loc133))

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.ttgir

@@ -0,0 +1,174 @@
+#blocked = #ttg.blocked<{sizePerThread = [4, 1], threadsPerWarp = [32, 1], warpsPerCTA = [1, 8], order = [0, 1]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [32, 1], warpsPerCTA = [4, 2], order = [0, 1]}>
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":18:0)
+#loc1 = loc(unknown)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":38:37)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":48:26)
+#loc43 = loc("in_ptr0"(#loc))
+#loc44 = loc("in_ptr1"(#loc))
+#loc45 = loc("out_ptr0"(#loc))
+#loc46 = loc("out_ptr1"(#loc))
+#loc47 = loc("out_ptr2"(#loc))
+#loc48 = loc("xnumel"(#loc))
+#loc49 = loc("r0_numel"(#loc))
+#loc63 = loc("tmp4"(#loc16))
+#loc74 = loc("tmp16"(#loc29))
+#loc81 = loc(callsite(#loc1 at #loc63))
+#loc85 = loc(callsite(#loc1 at #loc74))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 8 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_per_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %out_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<1536> : tensor<1x32xi32, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<1536> : tensor<128x1xi32, #blocked1> loc(#loc1)
+    %cst_1 = arith.constant dense<1536> : tensor<128x1xi32, #blocked> loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %cst_2 = arith.constant dense<0.693147182> : tensor<128x1xf32, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<1.000000e+00> : tensor<128x1xf32, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<0xFF800000> : tensor<128x1xf32, #blocked> loc(#loc1)
+    %cst_5 = arith.constant dense<0xFF800000> : tensor<128x32xf32, #blocked> loc(#loc1)
+    %cst_6 = arith.constant dense<0.000000e+00> : tensor<128x32xf32, #blocked> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc50)
+    %xoffset_7 = arith.muli %xoffset, %c128_i32 : i32 loc(#loc51)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc52)
+    %xindex_8 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc52)
+    %xindex_9 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xi32, #blocked> loc(#loc52)
+    %xindex_10 = tt.expand_dims %xindex_8 {axis = 1 : i32} : tensor<128xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128x1xi32, #blocked1> loc(#loc52)
+    %xindex_11 = tt.splat %xoffset_7 : i32 -> tensor<128x1xi32, #blocked> loc(#loc53)
+    %xindex_12 = tt.splat %xoffset_7 : i32 -> tensor<128x1xi32, #blocked1> loc(#loc53)
+    %xindex_13 = arith.addi %xindex_11, %xindex_9 : tensor<128x1xi32, #blocked> loc(#loc53)
+    %xindex_14 = arith.addi %xindex_12, %xindex_10 : tensor<128x1xi32, #blocked1> loc(#loc53)
+    %xmask = arith.cmpi slt, %xindex_13, %cst_1 : tensor<128x1xi32, #blocked> loc(#loc54)
+    %xmask_15 = arith.cmpi slt, %xindex_14, %cst_0 : tensor<128x1xi32, #blocked1> loc(#loc54)
+    %r0_index = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc55)
+    %r0_index_16 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x32xi32, #blocked> loc(#loc55)
+    %tmp0 = arith.muli %r0_index_16, %cst : tensor<1x32xi32, #blocked> loc(#loc56)
+    %tmp0_17 = tt.broadcast %xindex_13 : tensor<128x1xi32, #blocked> -> tensor<128x32xi32, #blocked> loc(#loc57)
+    %tmp0_18 = tt.broadcast %tmp0 : tensor<1x32xi32, #blocked> -> tensor<128x32xi32, #blocked> loc(#loc57)
+    %tmp0_19 = arith.addi %tmp0_17, %tmp0_18 : tensor<128x32xi32, #blocked> loc(#loc57)
+    %tmp0_20 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>, #blocked> loc(#loc58)
+    %tmp0_21 = tt.addptr %tmp0_20, %tmp0_19 : tensor<128x32x!tt.ptr<f32>, #blocked>, tensor<128x32xi32, #blocked> loc(#loc58)
+    %tmp0_22 = tt.broadcast %xmask : tensor<128x1xi1, #blocked> -> tensor<128x32xi1, #blocked> loc(#loc59)
+    %tmp0_23 = tt.load %tmp0_21, %tmp0_22, %cst_6 : tensor<128x32x!tt.ptr<f32>, #blocked> loc(#loc59)
+    %tmp5 = tt.splat %in_ptr1 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>, #blocked> loc(#loc60)
+    %tmp5_24 = tt.addptr %tmp5, %tmp0_19 : tensor<128x32x!tt.ptr<f32>, #blocked>, tensor<128x32xi32, #blocked> loc(#loc60)
+    %tmp5_25 = tt.load %tmp5_24, %tmp0_22, %cst_6 : tensor<128x32x!tt.ptr<f32>, #blocked> loc(#loc61)
+    %tmp3 = arith.select %tmp0_22, %tmp0_23, %cst_5 : tensor<128x32xi1, #blocked>, tensor<128x32xf32, #blocked> loc(#loc62)
+    %tmp4 = "tt.reduce"(%tmp3) <{axis = 1 : i32}> ({
+    ^bb0(%tmp4_34: f32 loc(callsite(#loc1 at #loc63)), %tmp4_35: f32 loc(callsite(#loc1 at #loc63))):
+      %mask = arith.cmpf ogt, %tmp4_34, %tmp4_35 : f32 loc(#loc86)
+      %mask_36 = arith.cmpf une, %tmp4_34, %tmp4_34 : f32 loc(#loc87)
+      %mask_37 = arith.ori %mask, %mask_36 : i1 loc(#loc88)
+      %tmp4_38 = arith.select %mask_37, %tmp4_34, %tmp4_35 : f32 loc(#loc89)
+      tt.reduce.return %tmp4_38 : f32 loc(#loc80)
+    }) : (tensor<128x32xf32, #blocked>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc80)
+    %tmp4_26 = ttg.convert_layout %tmp4 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc67)
+    %tmp4_27 = tt.expand_dims %tmp4_26 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128x1xf32, #blocked1> loc(#loc67)
+    %tmp4_28 = tt.expand_dims %tmp4 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xf32, #blocked> loc(#loc67)
+    %tmp7 = arith.cmpf oeq, %tmp4_28, %cst_4 : tensor<128x1xf32, #blocked> loc(#loc68)
+    %tmp8 = tt.broadcast %tmp4_28 : tensor<128x1xf32, #blocked> -> tensor<128x32xf32, #blocked> loc(#loc69)
+    %tmp8_29 = arith.subf %tmp0_23, %tmp8 : tensor<128x32xf32, #blocked> loc(#loc69)
+    %tmp10 = tt.broadcast %tmp7 : tensor<128x1xi1, #blocked> -> tensor<128x32xi1, #blocked> loc(#loc70)
+    %tmp10_30 = arith.select %tmp10, %cst_6, %tmp8_29 : tensor<128x32xi1, #blocked>, tensor<128x32xf32, #blocked> loc(#loc70)
+    %tmp11 = tt.extern_elementwise %tmp10_30 {libname = "", libpath = "", pure = true, symbol = "__nv_exp2f"} : (tensor<128x32xf32, #blocked>) -> tensor<128x32xf32, #blocked> loc(#loc71)
+    %tmp12 = arith.mulf %tmp5_25, %tmp11 : tensor<128x32xf32, #blocked> loc(#loc72)
+    %tmp15 = arith.select %tmp0_22, %tmp12, %cst_6 : tensor<128x32xi1, #blocked>, tensor<128x32xf32, #blocked> loc(#loc73)
+    %tmp16 = "tt.reduce"(%tmp15) <{axis = 1 : i32}> ({
+    ^bb0(%tmp16_34: f32 loc(callsite(#loc1 at #loc74)), %tmp16_35: f32 loc(callsite(#loc1 at #loc74))):
+      %tmp16_36 = arith.addf %tmp16_34, %tmp16_35 : f32 loc(#loc90)
+      tt.reduce.return %tmp16_36 : f32 loc(#loc84)
+    }) : (tensor<128x32xf32, #blocked>) -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc84)
+    %tmp16_31 = ttg.convert_layout %tmp16 : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc75)
+    %tmp16_32 = tt.expand_dims %tmp16_31 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<128x1xf32, #blocked1> loc(#loc75)
+    %tmp16_33 = tt.expand_dims %tmp16 {axis = 1 : i32} : tensor<128xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<128x1xf32, #blocked> loc(#loc75)
+    %tmp18 = arith.select %tmp7, %cst_3, %tmp16_33 : tensor<128x1xi1, #blocked>, tensor<128x1xf32, #blocked> loc(#loc76)
+    %tmp19 = tt.extern_elementwise %tmp18 {libname = "", libpath = "", pure = true, symbol = "__nv_log2f"} : (tensor<128x1xf32, #blocked>) -> tensor<128x1xf32, #blocked> loc(#loc77)
+    %tmp20 = arith.addf %tmp19, %tmp4_28 : tensor<128x1xf32, #blocked> loc(#loc78)
+    %tmp22 = arith.mulf %tmp20, %cst_2 : tensor<128x1xf32, #blocked> loc(#loc79)
+    %0 = tt.splat %out_ptr2 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>, #blocked1> loc(#loc36)
+    %1 = tt.addptr %0, %xindex_14 : tensor<128x1x!tt.ptr<f32>, #blocked1>, tensor<128x1xi32, #blocked1> loc(#loc36)
+    %2 = ttg.convert_layout %tmp22 : tensor<128x1xf32, #blocked> -> tensor<128x1xf32, #blocked1> loc(#loc37)
+    tt.store %1, %2, %xmask_15 : tensor<128x1x!tt.ptr<f32>, #blocked1> loc(#loc37)
+    %3 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>, #blocked1> loc(#loc38)
+    %4 = tt.addptr %3, %xindex_14 : tensor<128x1x!tt.ptr<f32>, #blocked1>, tensor<128x1xi32, #blocked1> loc(#loc38)
+    tt.store %4, %tmp4_27, %xmask_15 : tensor<128x1x!tt.ptr<f32>, #blocked1> loc(#loc39)
+    %5 = tt.splat %out_ptr1 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>, #blocked1> loc(#loc40)
+    %6 = tt.addptr %5, %xindex_14 : tensor<128x1x!tt.ptr<f32>, #blocked1>, tensor<128x1xi32, #blocked1> loc(#loc40)
+    tt.store %6, %tmp16_32, %xmask_15 : tensor<128x1x!tt.ptr<f32>, #blocked1> loc(#loc41)
+    tt.return loc(#loc42)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":24:28)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":24:33)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:44)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:23)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":26:21)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":27:38)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:40)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:35)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:30)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:47)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:30)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:47)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":37:33)
+#loc15 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:29)
+#loc17 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":110:15)
+#loc18 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:21)
+#loc19 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:16)
+#loc20 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:29)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":38:40)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":40:19)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":41:18)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":43:33)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":44:27)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":45:19)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":47:35)
+#loc28 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc30 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc31 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":48:29)
+#loc32 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":50:34)
+#loc33 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":51:27)
+#loc34 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":52:20)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":54:20)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":55:25)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":55:37)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":56:25)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":56:36)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:25)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:37)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:4)
+#loc50 = loc("xoffset"(#loc2))
+#loc51 = loc("xoffset"(#loc3))
+#loc52 = loc("xindex"(#loc4))
+#loc53 = loc("xindex"(#loc5))
+#loc54 = loc("xmask"(#loc6))
+#loc55 = loc("r0_index"(#loc7))
+#loc56 = loc("tmp0"(#loc8))
+#loc57 = loc("tmp0"(#loc9))
+#loc58 = loc("tmp0"(#loc10))
+#loc59 = loc("tmp0"(#loc11))
+#loc60 = loc("tmp5"(#loc12))
+#loc61 = loc("tmp5"(#loc13))
+#loc62 = loc("tmp3"(#loc14))
+#loc64 = loc("mask"(#loc17))
+#loc65 = loc("mask"(#loc18))
+#loc66 = loc("mask"(#loc19))
+#loc67 = loc("tmp4"(#loc21))
+#loc68 = loc("tmp7"(#loc22))
+#loc69 = loc("tmp8"(#loc23))
+#loc70 = loc("tmp10"(#loc24))
+#loc71 = loc("tmp11"(#loc25))
+#loc72 = loc("tmp12"(#loc26))
+#loc73 = loc("tmp15"(#loc27))
+#loc75 = loc("tmp16"(#loc31))
+#loc76 = loc("tmp18"(#loc32))
+#loc77 = loc("tmp19"(#loc33))
+#loc78 = loc("tmp20"(#loc34))
+#loc79 = loc("tmp22"(#loc35))
+#loc80 = loc(callsite(#loc15 at #loc63))
+#loc82 = loc("mask"(#loc64))
+#loc83 = loc("mask"(#loc66))
+#loc84 = loc(callsite(#loc28 at #loc74))
+#loc86 = loc(callsite(#loc82 at #loc80))
+#loc87 = loc(callsite(#loc65 at #loc80))
+#loc88 = loc(callsite(#loc83 at #loc80))
+#loc89 = loc(callsite(#loc20 at #loc80))
+#loc90 = loc(callsite(#loc30 at #loc84))

progress/SpecForge/cache/compiled_kernels/triton/3/2GPX4H2RCLQEV2LIJWPK5V4BGHUBOBJI3FUMPIZKQJ7CMB34OTAA/triton_per_fused_mul_1.ttir

@@ -0,0 +1,165 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":18:0)
+#loc5 = loc(unknown)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":38:37)
+#loc33 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":48:26)
+#loc45 = loc("in_ptr0"(#loc))
+#loc46 = loc("in_ptr1"(#loc))
+#loc47 = loc("out_ptr0"(#loc))
+#loc48 = loc("out_ptr1"(#loc))
+#loc49 = loc("out_ptr2"(#loc))
+#loc50 = loc("xnumel"(#loc))
+#loc51 = loc("r0_numel"(#loc))
+#loc70 = loc("tmp4"(#loc21))
+#loc80 = loc("tmp16"(#loc33))
+#loc85 = loc(callsite(#loc5 at #loc70))
+#loc89 = loc(callsite(#loc5 at #loc80))
+module {
+  tt.func public @triton_per_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %out_ptr1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %tmp22 = arith.constant dense<0.693147182> : tensor<128x1xf32> loc(#loc52)
+    %tmp18 = arith.constant dense<1.000000e+00> : tensor<128x1xf32> loc(#loc53)
+    %tmp7 = arith.constant dense<0xFF800000> : tensor<128x1xf32> loc(#loc54)
+    %tmp3 = arith.constant dense<0xFF800000> : tensor<128x32xf32> loc(#loc55)
+    %cst = arith.constant dense<0.000000e+00> : tensor<128x32xf32> loc(#loc5)
+    %cst_0 = arith.constant dense<1536> : tensor<1x32xi32> loc(#loc5)
+    %xmask = arith.constant dense<1536> : tensor<128x1xi32> loc(#loc56)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc5)
+    %xoffset = tt.get_program_id x : i32 loc(#loc57)
+    %xoffset_1 = arith.muli %xoffset, %c128_i32 : i32 loc(#loc58)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc59)
+    %xindex_2 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32> loc(#loc60)
+    %xindex_3 = tt.splat %xoffset_1 : i32 -> tensor<128x1xi32> loc(#loc61)
+    %xindex_4 = arith.addi %xindex_3, %xindex_2 : tensor<128x1xi32> loc(#loc61)
+    %xmask_5 = arith.cmpi slt, %xindex_4, %xmask : tensor<128x1xi32> loc(#loc56)
+    %r0_index = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc62)
+    %r0_index_6 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<32xi32> -> tensor<1x32xi32> loc(#loc63)
+    %tmp0 = arith.muli %r0_index_6, %cst_0 : tensor<1x32xi32> loc(#loc64)
+    %tmp0_7 = tt.broadcast %xindex_4 : tensor<128x1xi32> -> tensor<128x32xi32> loc(#loc65)
+    %tmp0_8 = tt.broadcast %tmp0 : tensor<1x32xi32> -> tensor<128x32xi32> loc(#loc65)
+    %tmp0_9 = arith.addi %tmp0_7, %tmp0_8 : tensor<128x32xi32> loc(#loc65)
+    %tmp0_10 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc66)
+    %tmp0_11 = tt.addptr %tmp0_10, %tmp0_9 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi32> loc(#loc66)
+    %tmp0_12 = tt.broadcast %xmask_5 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc67)
+    %tmp0_13 = tt.load %tmp0_11, %tmp0_12, %cst : tensor<128x32x!tt.ptr<f32>> loc(#loc67)
+    %tmp5 = tt.splat %in_ptr1 : !tt.ptr<f32> -> tensor<128x32x!tt.ptr<f32>> loc(#loc68)
+    %tmp5_14 = tt.addptr %tmp5, %tmp0_9 : tensor<128x32x!tt.ptr<f32>>, tensor<128x32xi32> loc(#loc68)
+    %tmp5_15 = tt.load %tmp5_14, %tmp0_12, %cst : tensor<128x32x!tt.ptr<f32>> loc(#loc69)
+    %tmp3_16 = arith.select %tmp0_12, %tmp0_13, %tmp3 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc55)
+    %tmp4 = "tt.reduce"(%tmp3_16) <{axis = 1 : i32}> ({
+    ^bb0(%tmp4_24: f32 loc(callsite(#loc5 at #loc70)), %tmp4_25: f32 loc(callsite(#loc5 at #loc70))):
+      %mask = arith.cmpf ogt, %tmp4_24, %tmp4_25 : f32 loc(#loc90)
+      %mask_26 = arith.cmpf une, %tmp4_24, %tmp4_24 : f32 loc(#loc91)
+      %mask_27 = arith.ori %mask, %mask_26 : i1 loc(#loc92)
+      %tmp4_28 = arith.select %mask_27, %tmp4_24, %tmp4_25 : f32 loc(#loc93)
+      tt.reduce.return %tmp4_28 : f32 loc(#loc84)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc84)
+    %tmp4_17 = tt.expand_dims %tmp4 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc74)
+    %tmp7_18 = arith.cmpf oeq, %tmp4_17, %tmp7 : tensor<128x1xf32> loc(#loc54)
+    %tmp8 = tt.broadcast %tmp4_17 : tensor<128x1xf32> -> tensor<128x32xf32> loc(#loc75)
+    %tmp8_19 = arith.subf %tmp0_13, %tmp8 : tensor<128x32xf32> loc(#loc75)
+    %tmp10 = tt.broadcast %tmp7_18 : tensor<128x1xi1> -> tensor<128x32xi1> loc(#loc76)
+    %tmp10_20 = arith.select %tmp10, %cst, %tmp8_19 : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc76)
+    %tmp11 = tt.extern_elementwise %tmp10_20 {libname = "", libpath = "", pure = true, symbol = "__nv_exp2f"} : (tensor<128x32xf32>) -> tensor<128x32xf32> loc(#loc77)
+    %tmp12 = arith.mulf %tmp5_15, %tmp11 : tensor<128x32xf32> loc(#loc78)
+    %tmp15 = arith.select %tmp0_12, %tmp12, %cst : tensor<128x32xi1>, tensor<128x32xf32> loc(#loc79)
+    %tmp16 = "tt.reduce"(%tmp15) <{axis = 1 : i32}> ({
+    ^bb0(%tmp16_24: f32 loc(callsite(#loc5 at #loc80)), %tmp16_25: f32 loc(callsite(#loc5 at #loc80))):
+      %tmp16_26 = arith.addf %tmp16_24, %tmp16_25 : f32 loc(#loc94)
+      tt.reduce.return %tmp16_26 : f32 loc(#loc88)
+    }) : (tensor<128x32xf32>) -> tensor<128xf32> loc(#loc88)
+    %tmp16_21 = tt.expand_dims %tmp16 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32> loc(#loc81)
+    %tmp18_22 = arith.select %tmp7_18, %tmp18, %tmp16_21 : tensor<128x1xi1>, tensor<128x1xf32> loc(#loc53)
+    %tmp19 = tt.extern_elementwise %tmp18_22 {libname = "", libpath = "", pure = true, symbol = "__nv_log2f"} : (tensor<128x1xf32>) -> tensor<128x1xf32> loc(#loc82)
+    %tmp20 = arith.addf %tmp19, %tmp4_17 : tensor<128x1xf32> loc(#loc83)
+    %tmp22_23 = arith.mulf %tmp20, %tmp22 : tensor<128x1xf32> loc(#loc52)
+    %0 = tt.splat %out_ptr2 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc38)
+    %1 = tt.addptr %0, %xindex_4 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc38)
+    tt.store %1, %tmp22_23, %xmask_5 : tensor<128x1x!tt.ptr<f32>> loc(#loc39)
+    %2 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc40)
+    %3 = tt.addptr %2, %xindex_4 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc40)
+    tt.store %3, %tmp4_17, %xmask_5 : tensor<128x1x!tt.ptr<f32>> loc(#loc41)
+    %4 = tt.splat %out_ptr1 : !tt.ptr<f32> -> tensor<128x1x!tt.ptr<f32>> loc(#loc42)
+    %5 = tt.addptr %4, %xindex_4 : tensor<128x1x!tt.ptr<f32>>, tensor<128x1xi32> loc(#loc42)
+    tt.store %5, %tmp16_21, %xmask_5 : tensor<128x1x!tt.ptr<f32>> loc(#loc43)
+    tt.return loc(#loc44)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":54:20)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":50:34)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":40:19)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":37:33)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":26:21)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":24:28)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":24:33)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:36)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:44)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":25:23)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":27:28)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":27:38)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:40)
+#loc15 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:35)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:30)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":34:47)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:30)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":35:47)
+#loc20 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":123:29)
+#loc22 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":110:15)
+#loc23 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:21)
+#loc24 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":112:16)
+#loc25 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":113:29)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":38:40)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":41:18)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":43:33)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":44:27)
+#loc30 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":45:19)
+#loc31 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":47:35)
+#loc32 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc34 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":48:29)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":51:27)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":52:20)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":55:25)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":55:37)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":56:25)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":56:36)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:25)
+#loc43 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:37)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/r5/cr5gimrtqf5gqmgkgirz6nebp4ijwtbzhmqlsdgjqda33dr43qre.py":57:4)
+#loc52 = loc("tmp22"(#loc1))
+#loc53 = loc("tmp18"(#loc2))
+#loc54 = loc("tmp7"(#loc3))
+#loc55 = loc("tmp3"(#loc4))
+#loc56 = loc("xmask"(#loc6))
+#loc57 = loc("xoffset"(#loc7))
+#loc58 = loc("xoffset"(#loc8))
+#loc59 = loc("xindex"(#loc9))
+#loc60 = loc("xindex"(#loc10))
+#loc61 = loc("xindex"(#loc11))
+#loc62 = loc("r0_index"(#loc12))
+#loc63 = loc("r0_index"(#loc13))
+#loc64 = loc("tmp0"(#loc14))
+#loc65 = loc("tmp0"(#loc15))
+#loc66 = loc("tmp0"(#loc16))
+#loc67 = loc("tmp0"(#loc17))
+#loc68 = loc("tmp5"(#loc18))
+#loc69 = loc("tmp5"(#loc19))
+#loc71 = loc("mask"(#loc22))
+#loc72 = loc("mask"(#loc23))
+#loc73 = loc("mask"(#loc24))
+#loc74 = loc("tmp4"(#loc26))
+#loc75 = loc("tmp8"(#loc27))
+#loc76 = loc("tmp10"(#loc28))
+#loc77 = loc("tmp11"(#loc29))
+#loc78 = loc("tmp12"(#loc30))
+#loc79 = loc("tmp15"(#loc31))
+#loc81 = loc("tmp16"(#loc35))
+#loc82 = loc("tmp19"(#loc36))
+#loc83 = loc("tmp20"(#loc37))
+#loc84 = loc(callsite(#loc20 at #loc70))
+#loc86 = loc("mask"(#loc71))
+#loc87 = loc("mask"(#loc73))
+#loc88 = loc(callsite(#loc32 at #loc80))
+#loc90 = loc(callsite(#loc86 at #loc84))
+#loc91 = loc(callsite(#loc72 at #loc84))
+#loc92 = loc(callsite(#loc87 at #loc84))
+#loc93 = loc(callsite(#loc25 at #loc84))
+#loc94 = loc(callsite(#loc34 at #loc88))

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/__grp__triton_poi_fused_mul_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_poi_fused_mul_1.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.source", "triton_poi_fused_mul_1.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.ttir", "triton_poi_fused_mul_1.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.ttgir", "triton_poi_fused_mul_1.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.llir", "triton_poi_fused_mul_1.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.ptx", "triton_poi_fused_mul_1.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.cubin", "triton_poi_fused_mul_1.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.json

@@ -0,0 +1 @@
+{"hash": "d650530c018e98a61be4958bef98391bf5f4932885981bbdd4c94cc375f6e8e4", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 4, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 0, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_poi_fused_mul_1"}

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.llir

@@ -0,0 +1,89 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_poi_fused_mul_1(ptr addrspace(1) %0, ptr addrspace(1) %1, i64 %2, i32 %3, ptr addrspace(1) readnone captures(none) %4, ptr addrspace(1) readnone captures(none) %5) local_unnamed_addr #0 !dbg !4 {
+  %7 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !7
+  %8 = shl i32 %7, 7, !dbg !8
+  %9 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !9
+  %10 = and i32 %9, 127, !dbg !9
+  %11 = or disjoint i32 %8, %10, !dbg !10
+  %12 = icmp slt i32 %11, %3, !dbg !11
+  %13 = sext i32 %11 to i64, !dbg !12
+  %.frozen = freeze i64 %2, !dbg !13
+  %14 = sdiv i64 %13, %.frozen, !dbg !13
+  %15 = mul i64 %14, %.frozen, !dbg !12
+  %.decomposed = sub i64 %13, %15, !dbg !12
+  %.not = icmp ne i64 %.decomposed, 0, !dbg !17
+  %16 = icmp slt i32 %8, 0, !dbg !18
+  %17 = icmp slt i64 %2, 0, !dbg !19
+  %18 = xor i1 %16, %17, !dbg !20
+  %narrow = select i1 %18, i1 %.not, i1 false, !dbg !21
+  %19 = sext i1 %narrow to i64, !dbg !21
+  %20 = add nsw i64 %14, %19, !dbg !21
+  %21 = getelementptr float, ptr addrspace(1) %0, i64 %13, !dbg !22
+  %22 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_last.b64 $0, 1.0;", "=l"() #2, !dbg !23
+  %23 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$3 ld.global.L1::evict_last.L2::cache_hint.b32 { $0 }, [ $1 + 0 ], $2;", "=r,l,l,b"(ptr addrspace(1) %21, i64 %22, i1 %12) #2, !dbg !23
+  %24 = bitcast i32 %23 to float, !dbg !23
+  %25 = fmul float %24, 0x3FE62E4300000000, !dbg !24
+  %26 = icmp slt i64 %2, 2, !dbg !25
+  %27 = icmp sgt i64 %2, 1, !dbg !26
+  %28 = select i1 %27, i64 %2, i64 0, !dbg !27
+  %29 = zext i1 %26 to i64, !dbg !28
+  %30 = add i64 %28, %29, !dbg !29
+  %31 = mul i64 %20, %30, !dbg !30
+  %32 = getelementptr float, ptr addrspace(1) %1, i64 %.decomposed, !dbg !31
+  %33 = getelementptr float, ptr addrspace(1) %32, i64 %31, !dbg !31
+  %34 = bitcast float %25 to i32, !dbg !32
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %34, ptr addrspace(1) %33, i1 %12) #2, !dbg !32
+  ret void, !dbg !33
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+attributes #0 = { nounwind "nvvm.reqntid"="128" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py", directory: "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = distinct !DISubprogram(name: "triton_poi_fused_mul_1", linkageName: "triton_poi_fused_mul_1", scope: !1, file: !1, line: 18, type: !5, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!5 = !DISubroutineType(cc: DW_CC_normal, types: !6)
+!6 = !{}
+!7 = !DILocation(line: 19, column: 28, scope: !4)
+!8 = !DILocation(line: 19, column: 33, scope: !4)
+!9 = !DILocation(line: 20, column: 36, scope: !4)
+!10 = !DILocation(line: 20, column: 23, scope: !4)
+!11 = !DILocation(line: 21, column: 21, scope: !4)
+!12 = !DILocation(line: 23, column: 19, scope: !4)
+!13 = !DILocation(line: 72, column: 16, scope: !14, inlinedAt: !16)
+!14 = distinct !DILexicalBlockFile(scope: !4, file: !15, discriminator: 0)
+!15 = !DIFile(filename: "triton_helpers.py", directory: "/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime")
+!16 = !DILocation(line: 24, column: 51, scope: !4)
+!17 = !DILocation(line: 74, column: 34, scope: !14, inlinedAt: !16)
+!18 = !DILocation(line: 75, column: 25, scope: !14, inlinedAt: !16)
+!19 = !DILocation(line: 75, column: 36, scope: !14, inlinedAt: !16)
+!20 = !DILocation(line: 75, column: 32, scope: !14, inlinedAt: !16)
+!21 = !DILocation(line: 75, column: 47, scope: !14, inlinedAt: !16)
+!22 = !DILocation(line: 25, column: 30, scope: !4)
+!23 = !DILocation(line: 25, column: 35, scope: !4)
+!24 = !DILocation(line: 27, column: 18, scope: !4)
+!25 = !DILocation(line: 28, column: 49, scope: !4)
+!26 = !DILocation(line: 28, column: 75, scope: !4)
+!27 = !DILocation(line: 28, column: 66, scope: !4)
+!28 = !DILocation(line: 28, scope: !4)
+!29 = !DILocation(line: 28, column: 57, scope: !4)
+!30 = !DILocation(line: 28, column: 34, scope: !4)
+!31 = !DILocation(line: 28, column: 25, scope: !4)
+!32 = !DILocation(line: 28, column: 88, scope: !4)
+!33 = !DILocation(line: 28, column: 4, scope: !4)

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.ptx

@@ -0,0 +1,357 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_poi_fused_mul_1  // -- Begin function triton_poi_fused_mul_1
+                                        // @triton_poi_fused_mul_1
+.visible .entry triton_poi_fused_mul_1(
+	.param .u64 .ptr .global .align 1 triton_poi_fused_mul_1_param_0,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_mul_1_param_1,
+	.param .u64 triton_poi_fused_mul_1_param_2,
+	.param .u32 triton_poi_fused_mul_1_param_3,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_mul_1_param_4,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_mul_1_param_5
+)
+.reqntid 128
+{
+	.reg .pred 	%p<11>;
+	.reg .b32 	%r<13>;
+	.reg .b64 	%rd<30>;
+	.loc	1 18 0                          // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:18:0
+
+// %bb.0:
+	ld.param.b32 	%r2, [triton_poi_fused_mul_1_param_3];
+	ld.param.b64 	%rd7, [triton_poi_fused_mul_1_param_1];
+	ld.param.b64 	%rd6, [triton_poi_fused_mul_1_param_0];
+	ld.param.b64 	%rd8, [triton_poi_fused_mul_1_param_2];
+$L__tmp0:
+	.loc	1 19 28                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:19:28
+	mov.u32 	%r3, %ctaid.x;
+	.loc	1 19 33                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:19:33
+	shl.b32 	%r1, %r3, 7;
+	.loc	1 20 36                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:20:36
+	mov.u32 	%r4, %tid.x;
+	and.b32 	%r5, %r4, 127;
+	.loc	1 20 23                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:20:23
+	or.b32 	%r6, %r1, %r5;
+	.loc	1 23 19                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:23:19
+	cvt.s64.s32 	%rd1, %r6;
+$L__tmp1:
+	.loc	2 72 16                         // triton_helpers.py:72:16 @[ csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:24:51 ]
+	or.b64 	%rd10, %rd1, %rd8;
+	and.b64 	%rd11, %rd10, -4294967296;
+	setp.ne.b64 	%p1, %rd11, 0;
+	@%p1 bra 	$L__BB0_2;
+	bra.uni 	$L__BB0_1;
+$L__BB0_2:
+	div.s64 	%rd29, %rd1, %rd8;
+	bra.uni 	$L__BB0_3;
+$L__BB0_1:
+	cvt.u32.u64 	%r7, %rd8;
+	cvt.u32.u64 	%r8, %rd1;
+	div.u32 	%r9, %r8, %r7;
+	cvt.u64.u32 	%rd29, %r9;
+$L__tmp2:
+$L__BB0_3:
+	.loc	2 0 16                          // triton_helpers.py:0:16
+	cvt.u32.u64 	%r12, %rd1;
+	.loc	1 21 21                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:21:21
+	setp.lt.s32 	%p2, %r12, %r2;
+	.loc	1 23 19                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:23:19
+	mul.lo.s64 	%rd17, %rd29, %rd8;
+	sub.s64 	%rd18, %rd1, %rd17;
+$L__tmp3:
+	.loc	2 74 34                         // triton_helpers.py:74:34 @[ csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:24:51 ]
+	setp.ne.b64 	%p4, %rd18, 0;
+	.loc	2 75 25                         // triton_helpers.py:75:25 @[ csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:24:51 ]
+	setp.lt.s32 	%p5, %r1, 0;
+	.loc	2 75 36                         // triton_helpers.py:75:36 @[ csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:24:51 ]
+	setp.lt.s64 	%p6, %rd8, 0;
+	.loc	2 75 32                         // triton_helpers.py:75:32 @[ csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:24:51 ]
+	xor.pred 	%p7, %p5, %p6;
+	.loc	2 75 47                         // triton_helpers.py:75:47 @[ csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:24:51 ]
+	and.pred 	%p8, %p7, %p4;
+	selp.b64 	%rd19, -1, 0, %p8;
+	add.s64 	%rd20, %rd29, %rd19;
+$L__tmp4:
+	.loc	1 25 30                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:25:30
+	shl.b64 	%rd21, %rd1, 2;
+	add.s64 	%rd13, %rd6, %rd21;
+	.loc	1 25 35                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:25:35
+	// begin inline asm
+	mov.u64 %rd14, 0x0;
+	createpolicy.fractional.L2::evict_last.b64 %rd14, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r10, 0x0;
+	@%p2 ld.global.L1::evict_last.L2::cache_hint.b32 { %r10 }, [ %rd13 + 0 ], %rd14;
+	// end inline asm
+	.loc	1 27 18                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:27:18
+	mul.f32 	%r11, %r10, 0f3F317218;
+	.loc	1 28 49                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:49
+	setp.lt.s64 	%p9, %rd8, 2;
+	.loc	1 28 75                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:75
+	setp.gt.s64 	%p10, %rd8, 1;
+	.loc	1 28 66                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:66
+	selp.b64 	%rd22, %rd8, 0, %p10;
+	.loc	1 28 0                          // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28
+	selp.b64 	%rd23, 1, 0, %p9;
+	.loc	1 28 57                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:57
+	add.s64 	%rd24, %rd22, %rd23;
+	.loc	1 28 34                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:34
+	mul.lo.s64 	%rd25, %rd20, %rd24;
+	.loc	1 28 25                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:25
+	shl.b64 	%rd26, %rd18, 2;
+	add.s64 	%rd27, %rd7, %rd26;
+	shl.b64 	%rd28, %rd25, 2;
+	add.s64 	%rd15, %rd27, %rd28;
+	.loc	1 28 88                         // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:88
+	// begin inline asm
+	@%p2 st.global.b32 [ %rd15 + 0 ], { %r11 };
+	// end inline asm
+	.loc	1 28 4                          // csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py:28:4
+	ret;
+$L__tmp5:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py"
+	.file	2 "/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 211                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xcc DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 115
+.b8 122
+.b8 52
+.b8 111
+.b8 121
+.b8 113
+.b8 121
+.b8 97
+.b8 52
+.b8 116
+.b8 114
+.b8 99
+.b8 53
+.b8 108
+.b8 108
+.b8 53
+.b8 53
+.b8 122
+.b8 106
+.b8 103
+.b8 101
+.b8 50
+.b8 106
+.b8 112
+.b8 98
+.b8 102
+.b8 110
+.b8 112
+.b8 110
+.b8 51
+.b8 52
+.b8 99
+.b8 105
+.b8 52
+.b8 54
+.b8 50
+.b8 107
+.b8 110
+.b8 103
+.b8 108
+.b8 53
+.b8 53
+.b8 98
+.b8 105
+.b8 54
+.b8 54
+.b8 106
+.b8 111
+.b8 107
+.b8 99
+.b8 120
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 106
+.b8 117
+.b8 110
+.b8 113
+.b8 117
+.b8 97
+.b8 110
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 115
+.b8 122
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8f:0x19 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 112
+.b8 111
+.b8 105
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 109
+.b8 117
+.b8 108
+.b8 95
+.b8 49
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xa8:0x2e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 143                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xbd:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp4                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 24                                  // DW_AT_call_line
+.b8 51                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.source

@@ -0,0 +1,130 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":18:0)
+#loc22 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":69:0)
+#loc34 = loc("in_ptr0"(#loc))
+#loc35 = loc("out_ptr0"(#loc))
+#loc36 = loc("ks0"(#loc))
+#loc37 = loc("xnumel"(#loc))
+#loc49 = loc("a"(#loc22))
+#loc50 = loc("b"(#loc22))
+module {
+  tt.func public @triton_poi_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc))) attributes {noinline = false} {
+    %xoffset = tt.get_program_id x : i32 loc(#loc38)
+    %xoffset_0 = arith.constant 128 : i32 loc(#loc39)
+    %xoffset_1 = arith.constant 128 : i32 loc(#loc39)
+    %xoffset_2 = arith.muli %xoffset, %xoffset_1 : i32 loc(#loc39)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc40)
+    %xindex_3 = tt.splat %xoffset_2 : i32 -> tensor<128xi32> loc(#loc41)
+    %xindex_4 = arith.addi %xindex_3, %xindex : tensor<128xi32> loc(#loc41)
+    %xmask = tt.splat %xnumel : i32 -> tensor<128xi32> loc(#loc42)
+    %xmask_5 = arith.cmpi slt, %xindex_4, %xmask : tensor<128xi32> loc(#loc42)
+    %x0 = arith.extsi %xindex_4 : tensor<128xi32> to tensor<128xi64> loc(#loc43)
+    %x0_6 = tt.splat %ks0 : i64 -> tensor<128xi64> loc(#loc43)
+    %x0_7 = arith.remsi %x0, %x0_6 : tensor<128xi64> loc(#loc43)
+    %x1 = tt.call @torch._inductor.runtime.triton_helpers.div_floor_integer__i32S128S_i64__(%xindex_4, %ks0) : (tensor<128xi32>, i64) -> tensor<128xi64> loc(#loc44)
+    %tmp0 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>> loc(#loc45)
+    %tmp0_8 = tt.addptr %tmp0, %xindex_4 : tensor<128x!tt.ptr<f32>>, tensor<128xi32> loc(#loc45)
+    %tmp0_9 = tt.load %tmp0_8, %xmask_5 evictionPolicy = evict_last : tensor<128x!tt.ptr<f32>> loc(#loc46)
+    %tmp1 = arith.constant 0.693147182 : f32 loc(#loc47)
+    %tmp2 = arith.constant dense<0.693147182> : tensor<128xf32> loc(#loc48)
+    %tmp2_10 = arith.mulf %tmp0_9, %tmp2 : tensor<128xf32> loc(#loc48)
+    %c1_i32 = arith.constant 1 : i32 loc(#loc12)
+    %0 = arith.extsi %c1_i32 : i32 to i64 loc(#loc12)
+    %1 = arith.cmpi sge, %0, %ks0 : i64 loc(#loc12)
+    %c1_i32_11 = arith.constant 1 : i32 loc(#loc13)
+    %c1_i32_12 = arith.constant 1 : i32 loc(#loc13)
+    %2 = arith.extui %1 : i1 to i32 loc(#loc13)
+    %3 = arith.muli %c1_i32_12, %2 : i32 loc(#loc13)
+    %c1_i32_13 = arith.constant 1 : i32 loc(#loc14)
+    %4 = arith.extsi %c1_i32_13 : i32 to i64 loc(#loc14)
+    %5 = arith.cmpi sgt, %ks0, %4 : i64 loc(#loc14)
+    %6 = arith.extui %5 : i1 to i64 loc(#loc15)
+    %7 = arith.muli %ks0, %6 : i64 loc(#loc15)
+    %8 = arith.extsi %3 : i32 to i64 loc(#loc16)
+    %9 = arith.addi %8, %7 : i64 loc(#loc16)
+    %10 = tt.splat %9 : i64 -> tensor<128xi64> loc(#loc17)
+    %11 = arith.muli %x1, %10 : tensor<128xi64> loc(#loc17)
+    %12 = arith.addi %x0_7, %11 : tensor<128xi64> loc(#loc18)
+    %13 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>> loc(#loc19)
+    %14 = tt.addptr %13, %12 : tensor<128x!tt.ptr<f32>>, tensor<128xi64> loc(#loc19)
+    tt.store %14, %tmp2_10, %xmask_5 : tensor<128x!tt.ptr<f32>> loc(#loc20)
+    tt.return loc(#loc21)
+  } loc(#loc)
+  tt.func private @torch._inductor.runtime.triton_helpers.div_floor_integer__i32S128S_i64__(%a: tensor<128xi32> loc("a"(#loc22)), %b: i64 loc("b"(#loc22))) -> tensor<128xi64> attributes {noinline = false} {
+    %quot = arith.extsi %a : tensor<128xi32> to tensor<128xi64> loc(#loc51)
+    %quot_0 = tt.splat %b : i64 -> tensor<128xi64> loc(#loc51)
+    %quot_1 = arith.divsi %quot, %quot_0 : tensor<128xi64> loc(#loc51)
+    %remainder = arith.extsi %a : tensor<128xi32> to tensor<128xi64> loc(#loc52)
+    %remainder_2 = tt.splat %b : i64 -> tensor<128xi64> loc(#loc52)
+    %remainder_3 = arith.remsi %remainder, %remainder_2 : tensor<128xi64> loc(#loc52)
+    %fixed = arith.constant 0 : i32 loc(#loc53)
+    %fixed_4 = arith.extsi %fixed : i32 to i64 loc(#loc53)
+    %fixed_5 = tt.splat %fixed_4 : i64 -> tensor<128xi64> loc(#loc53)
+    %fixed_6 = arith.cmpi ne, %remainder_3, %fixed_5 : tensor<128xi64> loc(#loc53)
+    %fixed_7 = arith.constant 1 : i32 loc(#loc54)
+    %fixed_8 = arith.constant 1 : i64 loc(#loc54)
+    %fixed_9 = arith.constant dense<1> : tensor<128xi64> loc(#loc54)
+    %fixed_10 = arith.subi %quot_1, %fixed_9 : tensor<128xi64> loc(#loc54)
+    %fixed_11 = arith.select %fixed_6, %fixed_10, %quot_1 : tensor<128xi1>, tensor<128xi64> loc(#loc55)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc28)
+    %cst = arith.constant dense<0> : tensor<128xi32> loc(#loc28)
+    %0 = arith.cmpi slt, %a, %cst : tensor<128xi32> loc(#loc28)
+    %c0_i32_12 = arith.constant 0 : i32 loc(#loc29)
+    %1 = arith.extsi %c0_i32_12 : i32 to i64 loc(#loc29)
+    %2 = arith.cmpi slt, %b, %1 : i64 loc(#loc29)
+    %3 = tt.splat %2 : i1 -> tensor<128xi1> loc(#loc30)
+    %4 = arith.cmpi ne, %0, %3 : tensor<128xi1> loc(#loc30)
+    %5 = arith.select %4, %fixed_11, %quot_1 : tensor<128xi1>, tensor<128xi64> loc(#loc31)
+    tt.return %5 : tensor<128xi64> loc(#loc32)
+  ^bb1:  // no predecessors
+    %6 = ub.poison : tensor<128xi64> loc(#loc33)
+    tt.return %6 : tensor<128xi64> loc(#loc33)
+  } loc(#loc22)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":19:28)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":19:33)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":20:36)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":20:23)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":21:21)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":23:19)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":24:51)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":25:30)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":25:35)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":26:11)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":27:18)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:49)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:41)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:75)
+#loc15 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:66)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:57)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:34)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:30)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:25)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:88)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:4)
+#loc23 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc24 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":73:20)
+#loc25 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc26 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc27 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc28 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc29 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:36)
+#loc30 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc31 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc32 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:11)
+#loc33 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:4)
+#loc38 = loc("xoffset"(#loc1))
+#loc39 = loc("xoffset"(#loc2))
+#loc40 = loc("xindex"(#loc3))
+#loc41 = loc("xindex"(#loc4))
+#loc42 = loc("xmask"(#loc5))
+#loc43 = loc("x0"(#loc6))
+#loc44 = loc("x1"(#loc7))
+#loc45 = loc("tmp0"(#loc8))
+#loc46 = loc("tmp0"(#loc9))
+#loc47 = loc("tmp1"(#loc10))
+#loc48 = loc("tmp2"(#loc11))
+#loc51 = loc("quot"(#loc23))
+#loc52 = loc("remainder"(#loc24))
+#loc53 = loc("fixed"(#loc25))
+#loc54 = loc("fixed"(#loc26))
+#loc55 = loc("fixed"(#loc27))

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.ttgir

@@ -0,0 +1,105 @@
+#blocked = #ttg.blocked<{sizePerThread = [1], threadsPerWarp = [32], warpsPerCTA = [4], order = [0]}>
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":18:0)
+#loc30 = loc("in_ptr0"(#loc))
+#loc31 = loc("out_ptr0"(#loc))
+#loc32 = loc("ks0"(#loc))
+#loc33 = loc("xnumel"(#loc))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 4 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_poi_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc))) attributes {noinline = false} {
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %cst = arith.constant dense<0.693147182> : tensor<128xf32, #blocked> loc(#loc1)
+    %c1_i64 = arith.constant 1 : i64 loc(#loc1)
+    %c0_i64 = arith.constant 0 : i64 loc(#loc1)
+    %cst_0 = arith.constant dense<0> : tensor<128xi64, #blocked> loc(#loc1)
+    %cst_1 = arith.constant dense<0> : tensor<128xi32, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<1> : tensor<128xi64, #blocked> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc34)
+    %xoffset_3 = arith.muli %xoffset, %c128_i32 : i32 loc(#loc35)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #blocked> loc(#loc36)
+    %xindex_4 = tt.splat %xoffset_3 : i32 -> tensor<128xi32, #blocked> loc(#loc37)
+    %xindex_5 = arith.addi %xindex_4, %xindex : tensor<128xi32, #blocked> loc(#loc37)
+    %xmask = tt.splat %xnumel : i32 -> tensor<128xi32, #blocked> loc(#loc38)
+    %xmask_6 = arith.cmpi slt, %xindex_5, %xmask : tensor<128xi32, #blocked> loc(#loc38)
+    %x0 = arith.extsi %xindex_5 : tensor<128xi32, #blocked> to tensor<128xi64, #blocked> loc(#loc39)
+    %x0_7 = tt.splat %ks0 : i64 -> tensor<128xi64, #blocked> loc(#loc39)
+    %x0_8 = arith.remsi %x0, %x0_7 : tensor<128xi64, #blocked> loc(#loc39)
+    %quot = arith.divsi %x0, %x0_7 : tensor<128xi64, #blocked> loc(#loc49)
+    %fixed = arith.cmpi ne, %x0_8, %cst_0 : tensor<128xi64, #blocked> loc(#loc50)
+    %fixed_9 = arith.subi %quot, %cst_2 : tensor<128xi64, #blocked> loc(#loc51)
+    %fixed_10 = arith.select %fixed, %fixed_9, %quot : tensor<128xi1, #blocked>, tensor<128xi64, #blocked> loc(#loc52)
+    %x1 = arith.cmpi slt, %xindex_5, %cst_1 : tensor<128xi32, #blocked> loc(#loc53)
+    %x1_11 = arith.cmpi slt, %ks0, %c0_i64 : i64 loc(#loc54)
+    %x1_12 = tt.splat %x1_11 : i1 -> tensor<128xi1, #blocked> loc(#loc55)
+    %x1_13 = arith.cmpi ne, %x1, %x1_12 : tensor<128xi1, #blocked> loc(#loc55)
+    %x1_14 = arith.select %x1_13, %fixed_10, %quot : tensor<128xi1, #blocked>, tensor<128xi64, #blocked> loc(#loc56)
+    %tmp0 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>, #blocked> loc(#loc45)
+    %tmp0_15 = tt.addptr %tmp0, %xindex_5 : tensor<128x!tt.ptr<f32>, #blocked>, tensor<128xi32, #blocked> loc(#loc45)
+    %tmp0_16 = tt.load %tmp0_15, %xmask_6 evictionPolicy = evict_last : tensor<128x!tt.ptr<f32>, #blocked> loc(#loc46)
+    %tmp2 = arith.mulf %tmp0_16, %cst : tensor<128xf32, #blocked> loc(#loc47)
+    %0 = arith.cmpi sle, %ks0, %c1_i64 : i64 loc(#loc20)
+    %1 = arith.cmpi sgt, %ks0, %c1_i64 : i64 loc(#loc21)
+    %2 = arith.extui %1 : i1 to i64 loc(#loc22)
+    %3 = arith.muli %ks0, %2 : i64 loc(#loc22)
+    %4 = arith.extui %0 : i1 to i64 loc(#loc48)
+    %5 = arith.addi %4, %3 : i64 loc(#loc23)
+    %6 = tt.splat %5 : i64 -> tensor<128xi64, #blocked> loc(#loc25)
+    %7 = arith.muli %x1_14, %6 : tensor<128xi64, #blocked> loc(#loc25)
+    %8 = arith.addi %x0_8, %7 : tensor<128xi64, #blocked> loc(#loc26)
+    %9 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>, #blocked> loc(#loc27)
+    %10 = tt.addptr %9, %8 : tensor<128x!tt.ptr<f32>, #blocked>, tensor<128xi64, #blocked> loc(#loc27)
+    tt.store %10, %tmp2, %xmask_6 : tensor<128x!tt.ptr<f32>, #blocked> loc(#loc28)
+    tt.return loc(#loc29)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc(unknown)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":19:28)
+#loc3 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":19:33)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":20:36)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":20:23)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":21:21)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":23:19)
+#loc8 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":24:51)
+#loc10 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc11 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc12 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc13 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc14 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:36)
+#loc15 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc16 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":25:30)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":25:35)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":27:18)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:49)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:75)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:66)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:57)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:41)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:34)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:30)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:25)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:88)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:4)
+#loc34 = loc("xoffset"(#loc2))
+#loc35 = loc("xoffset"(#loc3))
+#loc36 = loc("xindex"(#loc4))
+#loc37 = loc("xindex"(#loc5))
+#loc38 = loc("xmask"(#loc6))
+#loc39 = loc("x0"(#loc7))
+#loc40 = loc("quot"(#loc8))
+#loc41 = loc("x1"(#loc9))
+#loc42 = loc("fixed"(#loc10))
+#loc43 = loc("fixed"(#loc11))
+#loc44 = loc("fixed"(#loc12))
+#loc45 = loc("tmp0"(#loc17))
+#loc46 = loc("tmp0"(#loc18))
+#loc47 = loc("tmp2"(#loc19))
+#loc48 = loc(fused[#loc23, #loc24])
+#loc49 = loc(callsite(#loc40 at #loc41))
+#loc50 = loc(callsite(#loc42 at #loc41))
+#loc51 = loc(callsite(#loc43 at #loc41))
+#loc52 = loc(callsite(#loc44 at #loc41))
+#loc53 = loc(callsite(#loc13 at #loc41))
+#loc54 = loc(callsite(#loc14 at #loc41))
+#loc55 = loc(callsite(#loc15 at #loc41))
+#loc56 = loc(callsite(#loc16 at #loc41))

progress/SpecForge/cache/compiled_kernels/triton/3/2ZIFGDABR2MKMG7ESWF67GBZDP27JEZIQWMBXPOUZFGMG5PW5DSA/triton_poi_fused_mul_1.ttir

@@ -0,0 +1,104 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":18:0)
+#loc30 = loc("in_ptr0"(#loc))
+#loc31 = loc("out_ptr0"(#loc))
+#loc32 = loc("ks0"(#loc))
+#loc33 = loc("xnumel"(#loc))
+module {
+  tt.func public @triton_poi_fused_mul_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc))) attributes {noinline = false} {
+    %fixed = arith.constant dense<1> : tensor<128xi64> loc(#loc49)
+    %x1 = arith.constant dense<0> : tensor<128xi32> loc(#loc50)
+    %fixed_0 = arith.constant dense<0> : tensor<128xi64> loc(#loc51)
+    %x1_1 = arith.constant 0 : i64 loc(#loc52)
+    %c1_i64 = arith.constant 1 : i64 loc(#loc6)
+    %tmp2 = arith.constant dense<0.693147182> : tensor<128xf32> loc(#loc37)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc6)
+    %xoffset = tt.get_program_id x : i32 loc(#loc38)
+    %xoffset_2 = arith.muli %xoffset, %c128_i32 : i32 loc(#loc39)
+    %xindex = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc40)
+    %xindex_3 = tt.splat %xoffset_2 : i32 -> tensor<128xi32> loc(#loc41)
+    %xindex_4 = arith.addi %xindex_3, %xindex : tensor<128xi32> loc(#loc41)
+    %xmask = tt.splat %xnumel : i32 -> tensor<128xi32> loc(#loc42)
+    %xmask_5 = arith.cmpi slt, %xindex_4, %xmask : tensor<128xi32> loc(#loc42)
+    %x0 = arith.extsi %xindex_4 : tensor<128xi32> to tensor<128xi64> loc(#loc43)
+    %x0_6 = tt.splat %ks0 : i64 -> tensor<128xi64> loc(#loc43)
+    %x0_7 = arith.remsi %x0, %x0_6 : tensor<128xi64> loc(#loc43)
+    %quot = arith.divsi %x0, %x0_6 : tensor<128xi64> loc(#loc53)
+    %fixed_8 = arith.cmpi ne, %x0_7, %fixed_0 : tensor<128xi64> loc(#loc51)
+    %fixed_9 = arith.subi %quot, %fixed : tensor<128xi64> loc(#loc49)
+    %fixed_10 = arith.select %fixed_8, %fixed_9, %quot : tensor<128xi1>, tensor<128xi64> loc(#loc54)
+    %x1_11 = arith.cmpi slt, %xindex_4, %x1 : tensor<128xi32> loc(#loc50)
+    %x1_12 = arith.cmpi slt, %ks0, %x1_1 : i64 loc(#loc52)
+    %x1_13 = tt.splat %x1_12 : i1 -> tensor<128xi1> loc(#loc55)
+    %x1_14 = arith.cmpi ne, %x1_11, %x1_13 : tensor<128xi1> loc(#loc55)
+    %x1_15 = arith.select %x1_14, %fixed_10, %quot : tensor<128xi1>, tensor<128xi64> loc(#loc56)
+    %tmp0 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>> loc(#loc46)
+    %tmp0_16 = tt.addptr %tmp0, %xindex_4 : tensor<128x!tt.ptr<f32>>, tensor<128xi32> loc(#loc46)
+    %tmp0_17 = tt.load %tmp0_16, %xmask_5 evictionPolicy = evict_last : tensor<128x!tt.ptr<f32>> loc(#loc47)
+    %tmp2_18 = arith.mulf %tmp0_17, %tmp2 : tensor<128xf32> loc(#loc37)
+    %0 = arith.cmpi sle, %ks0, %c1_i64 : i64 loc(#loc20)
+    %1 = arith.cmpi sgt, %ks0, %c1_i64 : i64 loc(#loc21)
+    %2 = arith.extui %1 : i1 to i64 loc(#loc22)
+    %3 = arith.muli %ks0, %2 : i64 loc(#loc22)
+    %4 = arith.extui %0 : i1 to i64 loc(#loc48)
+    %5 = arith.addi %4, %3 : i64 loc(#loc23)
+    %6 = tt.splat %5 : i64 -> tensor<128xi64> loc(#loc25)
+    %7 = arith.muli %x1_15, %6 : tensor<128xi64> loc(#loc25)
+    %8 = arith.addi %x0_7, %7 : tensor<128xi64> loc(#loc26)
+    %9 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>> loc(#loc27)
+    %10 = tt.addptr %9, %8 : tensor<128x!tt.ptr<f32>>, tensor<128xi64> loc(#loc27)
+    tt.store %10, %tmp2_18, %xmask_5 : tensor<128x!tt.ptr<f32>> loc(#loc28)
+    tt.return loc(#loc29)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":24:51)
+#loc3 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc4 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc5 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:36)
+#loc6 = loc(unknown)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":27:18)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":19:28)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":19:33)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":20:36)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":20:23)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":21:21)
+#loc13 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":23:19)
+#loc14 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc15 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc16 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc17 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":25:30)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":25:35)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:49)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:75)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:66)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:57)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:41)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:34)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:30)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:25)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:88)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/sz/csz4oyqya4trc5ll55zjge2jpbfnpn34ci462kngl55bi66jokcx.py":28:4)
+#loc34 = loc("fixed"(#loc1))
+#loc35 = loc("x1"(#loc2))
+#loc36 = loc("fixed"(#loc4))
+#loc37 = loc("tmp2"(#loc7))
+#loc38 = loc("xoffset"(#loc8))
+#loc39 = loc("xoffset"(#loc9))
+#loc40 = loc("xindex"(#loc10))
+#loc41 = loc("xindex"(#loc11))
+#loc42 = loc("xmask"(#loc12))
+#loc43 = loc("x0"(#loc13))
+#loc44 = loc("quot"(#loc14))
+#loc45 = loc("fixed"(#loc15))
+#loc46 = loc("tmp0"(#loc18))
+#loc47 = loc("tmp0"(#loc19))
+#loc48 = loc(fused[#loc23, #loc24])
+#loc49 = loc(callsite(#loc34 at #loc35))
+#loc50 = loc(callsite(#loc3 at #loc35))
+#loc51 = loc(callsite(#loc36 at #loc35))
+#loc52 = loc(callsite(#loc5 at #loc35))
+#loc53 = loc(callsite(#loc44 at #loc35))
+#loc54 = loc(callsite(#loc45 at #loc35))
+#loc55 = loc(callsite(#loc16 at #loc35))
+#loc56 = loc(callsite(#loc17 at #loc35))

progress/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/__grp__triton_tem_fused_0.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_tem_fused_0.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.source", "triton_tem_fused_0.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.ttir", "triton_tem_fused_0.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.ttgir", "triton_tem_fused_0.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.llir", "triton_tem_fused_0.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.ptx", "triton_tem_fused_0.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.cubin", "triton_tem_fused_0.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.json

@@ -0,0 +1 @@
+{"hash": "ef65677dccb0fd1ca33e2efd85dd27b554735f6893116cae461084f5b56323fe", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 2, "num_ctas": 1, "num_stages": 3, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 196608, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_tem_fused_0"}

progress/SpecForge/cache/compiled_kernels/triton/3/55SWO7OMWD6RZIZ6F36YLXJHWVKHGX3ISMIWZLSGCCCPLNLDEP7A/triton_tem_fused_0.ttir

@@ -0,0 +1,896 @@
+#loc = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":18:0)
+#loc1 = loc(unknown)
+#loc2 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":200:41)
+#loc66 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":568:16)
+#loc111 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":449:51)
+#loc123 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":462:34)
+#loc167 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":235:45)
+#loc193 = loc("arg_Q"(#loc))
+#loc194 = loc("arg_K"(#loc))
+#loc195 = loc("arg_V"(#loc))
+#loc196 = loc("arg_M"(#loc))
+#loc197 = loc("arg_L"(#loc))
+#loc198 = loc("arg_KV_NUM_BLKS"(#loc))
+#loc199 = loc("arg_KV_IDX"(#loc))
+#loc200 = loc("arg_FULL_KV_NUM_BLKS"(#loc))
+#loc201 = loc("arg_FULL_KV_IDX"(#loc))
+#loc202 = loc("out_ptr0"(#loc))
+#loc203 = loc("ks0"(#loc))
+#loc204 = loc("ks1"(#loc))
+#loc255 = loc(callsite(#loc66 at #loc2))
+#loc296 = loc("m_ij"(#loc111))
+#loc306 = loc("l_i"(#loc123))
+#loc346 = loc(callsite(#loc66 at #loc167))
+#loc406 = loc(callsite(#loc296 at #loc255))
+#loc416 = loc(callsite(#loc306 at #loc255))
+#loc435 = loc(callsite(#loc296 at #loc346))
+#loc445 = loc(callsite(#loc306 at #loc346))
+#loc465 = loc(callsite(#loc1 at #loc406))
+#loc467 = loc(callsite(#loc1 at #loc416))
+#loc495 = loc(callsite(#loc1 at #loc435))
+#loc497 = loc(callsite(#loc1 at #loc445))
+module {
+  tt.func public @triton_tem_fused_0(%arg_Q: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_Q"(#loc)), %arg_K: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_K"(#loc)), %arg_V: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("arg_V"(#loc)), %arg_M: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("arg_M"(#loc)), %arg_L: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("arg_L"(#loc)), %arg_KV_NUM_BLKS: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_KV_NUM_BLKS"(#loc)), %arg_KV_IDX: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_KV_IDX"(#loc)), %arg_FULL_KV_NUM_BLKS: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_FULL_KV_NUM_BLKS"(#loc)), %arg_FULL_KV_IDX: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("arg_FULL_KV_IDX"(#loc)), %out_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i32 loc("ks0"(#loc)), %ks1: i32 loc("ks1"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<1x128xi64> loc(#loc1)
+    %cst_0 = arith.constant dense<1024> : tensor<64x1xi32> loc(#loc1)
+    %cst_1 = arith.constant dense<0.000000e+00> : tensor<64x128xbf16> loc(#loc1)
+    %cst_2 = arith.constant dense<16> : tensor<1x64xi32> loc(#loc205)
+    %cst_3 = arith.constant dense<16> : tensor<512x1xi32> loc(#loc205)
+    %cst_4 = arith.constant dense<0xFF800000> : tensor<512xf32> loc(#loc1)
+    %cst_5 = arith.constant dense<1.44269502> : tensor<512x64xf32> loc(#loc1)
+    %cst_6 = arith.constant dense<false> : tensor<512x64xi1> loc(#loc205)
+    %cst_7 = arith.constant dense<1> : tensor<1x64xi32> loc(#loc205)
+    %cst_8 = arith.constant dense<1> : tensor<512x1xi32> loc(#loc205)
+    %cst_9 = arith.constant dense<0> : tensor<512x1xi32> loc(#loc205)
+    %cst_10 = arith.constant dense<0> : tensor<1x64xi32> loc(#loc205)
+    %cst_11 = arith.constant dense<0xFF800000> : tensor<512x64xf32> loc(#loc1)
+    %cst_12 = arith.constant dense<0.0883883461> : tensor<512x64xf32> loc(#loc1)
+    %cst_13 = arith.constant dense<0.000000e+00> : tensor<512x64xf32> loc(#loc1)
+    %acc = arith.constant dense<0.000000e+00> : tensor<512x128xf32> loc(#loc360)
+    %cst_14 = arith.constant dense<0.000000e+00> : tensor<512xf32> loc(#loc1)
+    %c63_i32 = arith.constant 63 : i32 loc(#loc1)
+    %c31_i32 = arith.constant 31 : i32 loc(#loc1)
+    %cst_15 = arith.constant dense<128> : tensor<1x128x1xi32> loc(#loc1)
+    %mask = arith.constant dense<128> : tensor<1x1x128xi32> loc(#loc207)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %c2_i32 = arith.constant 2 : i32 loc(#loc1)
+    %q_range = arith.constant dense<4096> : tensor<1x128x1xi32> loc(#loc208)
+    %cst_16 = arith.constant dense<128> : tensor<4x1x1xi32> loc(#loc1)
+    %true = arith.constant true loc(#loc7)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %c4_i32 = arith.constant 4 : i32 loc(#loc1)
+    %HKV = arith.constant 8 : i32 loc(#loc209)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc1)
+    %c1024_i32 = arith.constant 1024 : i32 loc(#loc1)
+    %c1_i32 = arith.constant 1 : i32 loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %c512_i32 = arith.constant 512 : i32 loc(#loc9)
+    %c4096_i32 = arith.constant 4096 : i32 loc(#loc1)
+    %0 = arith.muli %ks0, %c4096_i32 : i32 loc(#loc10)
+    %1 = arith.muli %ks0, %c1024_i32 : i32 loc(#loc11)
+    %2 = arith.muli %ks0, %c32_i32 : i32 loc(#loc12)
+    %TILE_KV_OG = arith.addi %ks1, %c31_i32 : i32 loc(#loc361)
+    %TILE_KV_OG_17 = arith.divsi %TILE_KV_OG, %c32_i32 : i32 loc(#loc362)
+    %TILE_KV = arith.addi %TILE_KV_OG_17, %c63_i32 : i32 loc(#loc363)
+    %TILE_KV_18 = arith.divsi %TILE_KV, %c64_i32 : i32 loc(#loc364)
+    %TILE_KV_19 = arith.muli %TILE_KV_18, %c64_i32 : i32 loc(#loc212)
+    %3 = arith.divsi %TILE_KV_19, %c64_i32 : i32 loc(#loc18)
+    %off_z = tt.get_program_id x : i32 loc(#loc213)
+    %off_z_20 = arith.divsi %off_z, %HKV : i32 loc(#loc214)
+    %off_hkv = arith.remsi %off_z, %HKV : i32 loc(#loc215)
+    %off_t = tt.get_program_id y : i32 loc(#loc216)
+    %q_offset = arith.muli %off_z_20, %0 : i32 loc(#loc217)
+    %q_offset_21 = arith.muli %off_hkv, %c512_i32 : i32 loc(#loc218)
+    %q_offset_22 = arith.addi %q_offset, %q_offset_21 : i32 loc(#loc219)
+    %k_offset = arith.muli %off_hkv, %c128_i32 : i32 loc(#loc220)
+    %K = tt.addptr %arg_K, %k_offset : !tt.ptr<bf16>, i32 loc(#loc221)
+    %V = tt.addptr %arg_V, %k_offset : !tt.ptr<bf16>, i32 loc(#loc222)
+    tt.assert %true, "" : i1 loc(#loc7)
+    %off_g = tt.make_range {end = 4 : i32, start = 0 : i32} : tensor<4xi32> loc(#loc223)
+    %off_m = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32> loc(#loc224)
+    %offs_m = tt.expand_dims %off_m {axis = 0 : i32} : tensor<128xi32> -> tensor<1x128xi32> loc(#loc225)
+    %offs_m_23 = tt.broadcast %offs_m : tensor<1x128xi32> -> tensor<4x128xi32> loc(#loc226)
+    %offs_m_24 = tt.reshape %offs_m_23 : tensor<4x128xi32> -> tensor<512xi32> loc(#loc365)
+    %block_n_start = arith.muli %off_t, %3 : i32 loc(#loc228)
+    %block_n_end = arith.addi %block_n_start, %3 : i32 loc(#loc229)
+    %q_range_25 = tt.expand_dims %off_g {axis = 1 : i32} : tensor<4xi32> -> tensor<4x1xi32> loc(#loc230)
+    %q_range_26 = tt.expand_dims %q_range_25 {axis = 2 : i32} : tensor<4x1xi32> -> tensor<4x1x1xi32> loc(#loc230)
+    %q_range_27 = arith.muli %q_range_26, %cst_16 : tensor<4x1x1xi32> loc(#loc231)
+    %q_range_28 = tt.expand_dims %offs_m {axis = 2 : i32} : tensor<1x128xi32> -> tensor<1x128x1xi32> loc(#loc232)
+    %q_range_29 = arith.muli %q_range_28, %q_range : tensor<1x128x1xi32> loc(#loc208)
+    %q_range_30 = tt.broadcast %q_range_27 : tensor<4x1x1xi32> -> tensor<4x128x1xi32> loc(#loc233)
+    %q_range_31 = tt.broadcast %q_range_29 : tensor<1x128x1xi32> -> tensor<4x128x1xi32> loc(#loc233)
+    %q_range_32 = arith.addi %q_range_30, %q_range_31 : tensor<4x128x1xi32> loc(#loc233)
+    %q_range_33 = tt.expand_dims %offs_m {axis = 1 : i32} : tensor<1x128xi32> -> tensor<1x1x128xi32> loc(#loc234)
+    %q_range_34 = tt.broadcast %q_range_32 : tensor<4x128x1xi32> -> tensor<4x128x128xi32> loc(#loc235)
+    %q_range_35 = tt.broadcast %q_range_33 : tensor<1x1x128xi32> -> tensor<4x128x128xi32> loc(#loc235)
+    %q_range_36 = arith.addi %q_range_34, %q_range_35 : tensor<4x128x128xi32> loc(#loc235)
+    %q = tt.splat %ks0 : i32 -> tensor<1x128x1xi32> loc(#loc236)
+    %q_37 = arith.cmpi slt, %q_range_28, %q : tensor<1x128x1xi32> loc(#loc236)
+    %q_38 = tt.addptr %arg_Q, %q_offset_22 : !tt.ptr<bf16>, i32 loc(#loc237)
+    %q_39 = tt.splat %q_38 : !tt.ptr<bf16> -> tensor<4x128x128x!tt.ptr<bf16>> loc(#loc238)
+    %q_40 = tt.addptr %q_39, %q_range_36 : tensor<4x128x128x!tt.ptr<bf16>>, tensor<4x128x128xi32> loc(#loc238)
+    %q_41 = tt.broadcast %q_37 : tensor<1x128x1xi1> -> tensor<4x128x128xi1> loc(#loc239)
+    %q_42 = tt.load %q_40, %q_41 : tensor<4x128x128x!tt.ptr<bf16>> loc(#loc239)
+    %q_43 = tt.reshape %q_42 : tensor<4x128x128xbf16> -> tensor<512x128xbf16> loc(#loc240)
+    %kv_num_blocks = tt.load %arg_KV_NUM_BLKS : !tt.ptr<i32> loc(#loc241)
+    %off_n_block_in_sparse = arith.remsi %block_n_start, %c2_i32 : i32 loc(#loc242)
+    %off_n = tt.load %arg_KV_IDX : !tt.ptr<i32> loc(#loc243)
+    %off_n_44 = arith.muli %off_n, %c128_i32 : i32 loc(#loc244)
+    %off_n_45 = arith.muli %off_n_block_in_sparse, %c64_i32 : i32 loc(#loc245)
+    %off_n_46 = arith.addi %off_n_44, %off_n_45 : i32 loc(#loc246)
+    %block_n_last_valid = arith.muli %kv_num_blocks, %c2_i32 : i32 loc(#loc247)
+    %block_n_last_valid_47 = arith.addi %ks1, %c63_i32 : i32 loc(#loc366)
+    %block_n_last_valid_48 = arith.divsi %block_n_last_valid_47, %c64_i32 : i32 loc(#loc367)
+    %block_n_last_valid_49 = arith.maxsi %block_n_last_valid_48, %c1_i32 : i32 loc(#loc249)
+    %block_n_last_valid_50 = arith.minsi %block_n_last_valid, %block_n_last_valid_49 : i32 loc(#loc250)
+    %offs_n = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc251)
+    %offs_n_51 = tt.splat %off_n_46 : i32 -> tensor<64xi32> loc(#loc252)
+    %offs_n_52 = arith.addi %offs_n, %offs_n_51 : tensor<64xi32> loc(#loc252)
+    %4 = tt.expand_dims %offs_m_24 {axis = 1 : i32} : tensor<512xi32> -> tensor<512x1xi32> loc(#loc60)
+    %5 = tt.expand_dims %offs_n_52 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc61)
+    %6 = arith.cmpi sle, %block_n_end, %block_n_last_valid_50 : i32 loc(#loc62)
+    %7 = arith.select %6, %block_n_end, %block_n_last_valid_50 : i32 loc(#loc63)
+    %kv_offset:5 = scf.for %start_n = %block_n_start to %7 step %c1_i32 iter_args(%acc_78 = %acc, %l_i_79 = %cst_14, %m_i_80 = %cst_4, %offs_n_81 = %5, %kv_offset_82 = %c0_i32) -> (tensor<512x128xf32>, tensor<512xf32>, tensor<512xf32>, tensor<1x64xi32>, i32)  : i32 {
+      %kv_base_offset = arith.addi %off_n_46, %kv_offset_82 : i32 loc(#loc369)
+      %offs_n_load = tt.splat %kv_base_offset : i32 -> tensor<64xi32> loc(#loc370)
+      %offs_n_load_83 = arith.addi %offs_n_load, %offs_n : tensor<64xi32> loc(#loc370)
+      %ptr = tt.expand_dims %offs_n_load_83 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc456)
+      %ptr_84 = arith.muli %ptr, %cst_0 : tensor<64x1xi32> loc(#loc457)
+      %ptr_85 = tt.splat %K : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc458)
+      %ptr_86 = tt.addptr %ptr_85, %ptr_84 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc458)
+      %ptr_87 = tt.broadcast %ptr_86 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc459)
+      %ptr_88 = tt.broadcast %offs_m : tensor<1x128xi32> -> tensor<64x128xi32> loc(#loc459)
+      %ptr_89 = tt.addptr %ptr_87, %ptr_88 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc459)
+      %k = tt.splat %ks1 : i32 -> tensor<64x1xi32> loc(#loc460)
+      %k_90 = arith.cmpi slt, %ptr, %k : tensor<64x1xi32> loc(#loc460)
+      %k_91 = tt.broadcast %k_90 : tensor<64x1xi1> -> tensor<64x128xi1> loc(#loc461)
+      %k_92 = tt.load %ptr_89, %k_91, %cst_1 : tensor<64x128x!tt.ptr<bf16>> loc(#loc461)
+      %k_93 = tt.trans %k_92 {order = array<i32: 1, 0>} : tensor<64x128xbf16> -> tensor<128x64xbf16> loc(#loc372)
+      %qk = tt.dot %q_43, %k_93, %cst_13, inputPrecision = tf32 : tensor<512x128xbf16> * tensor<128x64xbf16> -> tensor<512x64xf32> loc(#loc373)
+      %qk_94 = arith.mulf %qk, %cst_12 : tensor<512x64xf32> loc(#loc374)
+      %m = tt.splat %ks0 : i32 -> tensor<512x1xi32> loc(#loc462)
+      %m_95 = arith.remsi %4, %m : tensor<512x1xi32> loc(#loc462)
+      %n = tt.splat %ks1 : i32 -> tensor<1x64xi32> loc(#loc463)
+      %n_96 = arith.remsi %offs_n_81, %n : tensor<1x64xi32> loc(#loc463)
+      %post_mod_scores = arith.cmpi slt, %offs_n_81, %n : tensor<1x64xi32> loc(#loc377)
+      %post_mod_scores_97 = tt.broadcast %post_mod_scores : tensor<1x64xi1> -> tensor<512x64xi1> loc(#loc378)
+      %post_mod_scores_98 = arith.select %post_mod_scores_97, %qk_94, %cst_11 : tensor<512x64xi1>, tensor<512x64xf32> loc(#loc378)
+      %tmp3 = arith.cmpi slt, %m_95, %cst_9 : tensor<512x1xi32> loc(#loc379)
+      %tmp5 = tt.broadcast %n_96 : tensor<1x64xi32> -> tensor<512x64xi32> loc(#loc380)
+      %tmp5_99 = tt.broadcast %m_95 : tensor<512x1xi32> -> tensor<512x64xi32> loc(#loc380)
+      %tmp5_100 = arith.cmpi sle, %tmp5, %tmp5_99 : tensor<512x64xi32> loc(#loc380)
+      %tmp6 = tt.broadcast %tmp3 : tensor<512x1xi1> -> tensor<512x64xi1> loc(#loc381)
+      %tmp6_101 = arith.andi %tmp6, %tmp5_100 : tensor<512x64xi1> loc(#loc381)
+      %tmp7 = arith.cmpi sge, %m_95, %cst_9 : tensor<512x1xi32> loc(#loc382)
+      %tmp8 = arith.cmpi slt, %n_96, %cst_10 : tensor<1x64xi32> loc(#loc383)
+      %tmp9 = tt.broadcast %tmp7 : tensor<512x1xi1> -> tensor<512x64xi1> loc(#loc384)
+      %tmp9_102 = tt.broadcast %tmp8 : tensor<1x64xi1> -> tensor<512x64xi1> loc(#loc384)
+      %tmp9_103 = arith.andi %tmp9, %tmp9_102 : tensor<512x64xi1> loc(#loc384)
+      %tmp10 = arith.extui %tmp8 : tensor<1x64xi1> to tensor<1x64xi32> loc(#loc385)
+      %tmp10_104 = arith.cmpi eq, %tmp10, %cst_10 : tensor<1x64xi32> loc(#loc385)
+      %tmp11 = tt.broadcast %tmp10_104 : tensor<1x64xi1> -> tensor<512x64xi1> loc(#loc386)
+      %tmp11_105 = arith.andi %tmp9, %tmp11 : tensor<512x64xi1> loc(#loc386)
+      %tmp14 = arith.remsi %m_95, %cst_3 : tensor<512x1xi32> loc(#loc387)
+      %tmp14_106 = arith.cmpi ne, %tmp14, %cst_9 : tensor<512x1xi32> loc(#loc388)
+      %tmp14_107 = arith.divsi %m_95, %cst_3 : tensor<512x1xi32> loc(#loc389)
+      %tmp14_108 = arith.subi %tmp14_107, %cst_8 : tensor<512x1xi32> loc(#loc390)
+      %tmp14_109 = arith.select %tmp14_106, %tmp14_108, %tmp14_107 : tensor<512x1xi1>, tensor<512x1xi32> loc(#loc391)
+      %tmp14_110 = arith.select %tmp3, %tmp14_109, %tmp14_107 : tensor<512x1xi1>, tensor<512x1xi32> loc(#loc392)
+      %tmp16 = arith.remsi %n_96, %cst_2 : tensor<1x64xi32> loc(#loc393)
+      %tmp16_111 = arith.cmpi ne, %tmp16, %cst_10 : tensor<1x64xi32> loc(#loc394)
+      %tmp16_112 = arith.divsi %n_96, %cst_2 : tensor<1x64xi32> loc(#loc395)
+      %tmp16_113 = arith.subi %tmp16_112, %cst_7 : tensor<1x64xi32> loc(#loc396)
+      %tmp16_114 = arith.select %tmp16_111, %tmp16_113, %tmp16_112 : tensor<1x64xi1>, tensor<1x64xi32> loc(#loc397)
+      %tmp16_115 = arith.select %tmp8, %tmp16_114, %tmp16_112 : tensor<1x64xi1>, tensor<1x64xi32> loc(#loc398)
+      %tmp17 = tt.broadcast %tmp14_110 : tensor<512x1xi32> -> tensor<512x64xi32> loc(#loc399)
+      %tmp17_116 = tt.broadcast %tmp16_115 : tensor<1x64xi32> -> tensor<512x64xi32> loc(#loc399)
+      %tmp17_117 = arith.cmpi eq, %tmp17, %tmp17_116 : tensor<512x64xi32> loc(#loc399)
+      %tmp18 = arith.andi %tmp11_105, %tmp17_117 : tensor<512x64xi1> loc(#loc400)
+      %tmp19 = arith.ori %tmp9_103, %tmp18 : tensor<512x64xi1> loc(#loc401)
+      %tmp20 = arith.ori %tmp6_101, %tmp19 : tensor<512x64xi1> loc(#loc402)
+      %mask_mod_output = arith.select %post_mod_scores_97, %tmp20, %cst_6 : tensor<512x64xi1>, tensor<512x64xi1> loc(#loc403)
+      %post_mod_scores_118 = arith.select %mask_mod_output, %post_mod_scores_98, %cst_11 : tensor<512x64xi1>, tensor<512x64xf32> loc(#loc404)
+      %post_mod_scores_119 = arith.mulf %post_mod_scores_118, %cst_5 : tensor<512x64xf32> loc(#loc405)
+      %m_ij = "tt.reduce"(%post_mod_scores_119) <{axis = 1 : i32}> ({
+      ^bb0(%m_ij_152: f32 loc(callsite(#loc1 at #loc406)), %m_ij_153: f32 loc(callsite(#loc1 at #loc406))):
+        %m_ij_154 = arith.maxnumf %m_ij_152, %m_ij_153 : f32 loc(#loc519)
+        tt.reduce.return %m_ij_154 : f32 loc(#loc464)
+      }) : (tensor<512x64xf32>) -> tensor<512xf32> loc(#loc464)
+      %m_ij_120 = arith.maxnumf %m_i_80, %m_ij : tensor<512xf32> loc(#loc407)
+      %masked_out_rows = arith.cmpf oeq, %m_ij_120, %cst_4 : tensor<512xf32> loc(#loc408)
+      %m_ij_masked = arith.select %masked_out_rows, %cst_14, %m_ij_120 : tensor<512xi1>, tensor<512xf32> loc(#loc409)
+      %alpha = arith.subf %m_i_80, %m_ij_masked : tensor<512xf32> loc(#loc410)
+      %alpha_121 = math.exp2 %alpha : tensor<512xf32> loc(#loc411)
+      %p = tt.expand_dims %m_ij_masked {axis = 1 : i32} : tensor<512xf32> -> tensor<512x1xf32> loc(#loc412)
+      %p_122 = tt.broadcast %p : tensor<512x1xf32> -> tensor<512x64xf32> loc(#loc413)
+      %p_123 = arith.subf %post_mod_scores_119, %p_122 : tensor<512x64xf32> loc(#loc413)
+      %p_124 = math.exp2 %p_123 : tensor<512x64xf32> loc(#loc414)
+      %l_i_125 = arith.mulf %l_i_79, %alpha_121 : tensor<512xf32> loc(#loc415)
+      %l_i_126 = "tt.reduce"(%p_124) <{axis = 1 : i32}> ({
+      ^bb0(%l_i_152: f32 loc(callsite(#loc1 at #loc416)), %l_i_153: f32 loc(callsite(#loc1 at #loc416))):
+        %l_i_154 = arith.addf %l_i_152, %l_i_153 : f32 loc(#loc520)
+        tt.reduce.return %l_i_154 : f32 loc(#loc466)
+      }) : (tensor<512x64xf32>) -> tensor<512xf32> loc(#loc466)
+      %l_i_127 = arith.addf %l_i_125, %l_i_126 : tensor<512xf32> loc(#loc417)
+      %acc_128 = tt.expand_dims %alpha_121 {axis = 1 : i32} : tensor<512xf32> -> tensor<512x1xf32> loc(#loc418)
+      %acc_129 = tt.broadcast %acc_128 : tensor<512x1xf32> -> tensor<512x128xf32> loc(#loc419)
+      %acc_130 = arith.mulf %acc_78, %acc_129 : tensor<512x128xf32> loc(#loc419)
+      %ptr_131 = tt.splat %V : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc468)
+      %ptr_132 = tt.addptr %ptr_131, %ptr_84 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc468)
+      %ptr_133 = tt.broadcast %ptr_132 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc469)
+      %ptr_134 = tt.addptr %ptr_133, %ptr_88 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc469)
+      %v = tt.load %ptr_134, %k_91, %cst_1 : tensor<64x128x!tt.ptr<bf16>> loc(#loc470)
+      %acc_135 = arith.truncf %p_124 : tensor<512x64xf32> to tensor<512x64xbf16> loc(#loc421)
+      %acc_136 = tt.dot %acc_135, %v, %acc_130, inputPrecision = tf32 : tensor<512x64xbf16> * tensor<64x128xbf16> -> tensor<512x128xf32> loc(#loc422)
+      %cur_block_idx = arith.divsi %start_n, %c2_i32 : i32 loc(#loc471)
+      %cur_block = tt.addptr %arg_KV_IDX, %cur_block_idx : !tt.ptr<i32>, i32 loc(#loc472)
+      %cur_block_137 = tt.load %cur_block evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc473)
+      %next_block = arith.addi %cur_block_idx, %c1_i32 : i32 loc(#loc474)
+      %next_block_138 = arith.cmpi slt, %next_block, %kv_num_blocks : i32 loc(#loc475)
+      %next_block_139 = tt.addptr %cur_block, %c1_i32 : !tt.ptr<i32>, i32 loc(#loc476)
+      %next_block_140 = tt.load %next_block_139, %next_block_138 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc477)
+      %needs_jump = arith.addi %start_n, %c1_i32 : i32 loc(#loc478)
+      %needs_jump_141 = arith.remsi %needs_jump, %c2_i32 : i32 loc(#loc479)
+      %needs_jump_142 = arith.cmpi eq, %needs_jump_141, %c0_i32 : i32 loc(#loc480)
+      %jump_to_block = arith.subi %next_block_140, %cur_block_137 : i32 loc(#loc481)
+      %jump_to_block_143 = arith.muli %jump_to_block, %c128_i32 : i32 loc(#loc482)
+      %jump_to_block_144 = arith.subi %jump_to_block_143, %c64_i32 : i32 loc(#loc483)
+      %offset = arith.extui %needs_jump_142 : i1 to i32 loc(#loc484)
+      %offset_145 = arith.muli %jump_to_block_144, %offset : i32 loc(#loc484)
+      %offset_146 = arith.subi %c1_i32, %offset : i32 loc(#loc485)
+      %offset_147 = arith.muli %offset_146, %c64_i32 : i32 loc(#loc486)
+      %offset_148 = arith.addi %offset_145, %offset_147 : i32 loc(#loc487)
+      %offs_n_149 = tt.splat %offset_148 : i32 -> tensor<1x64xi32> loc(#loc424)
+      %offs_n_150 = arith.addi %offs_n_81, %offs_n_149 : tensor<1x64xi32> loc(#loc424)
+      %kv_offset_151 = arith.addi %kv_offset_82, %offset_148 : i32 loc(#loc425)
+      scf.yield %acc_136, %l_i_127, %m_ij_120, %offs_n_150, %kv_offset_151 : tensor<512x128xf32>, tensor<512xf32>, tensor<512xf32>, tensor<1x64xi32>, i32 loc(#loc333)
+    } loc(#loc524)
+    %kv_num_blocks_53 = tt.load %arg_FULL_KV_NUM_BLKS : !tt.ptr<i32> loc(#loc334)
+    %block_n_start_54 = arith.subi %c31_i32, %off_t : i32 loc(#loc335)
+    %block_n_start_55 = arith.muli %block_n_start_54, %3 : i32 loc(#loc336)
+    %block_n_end_56 = arith.addi %block_n_start_55, %3 : i32 loc(#loc337)
+    %off_n_block_in_sparse_57 = arith.remsi %block_n_start_55, %c2_i32 : i32 loc(#loc338)
+    %off_n_58 = tt.load %arg_FULL_KV_IDX : !tt.ptr<i32> loc(#loc339)
+    %off_n_59 = arith.muli %off_n_58, %c128_i32 : i32 loc(#loc340)
+    %off_n_60 = arith.muli %off_n_block_in_sparse_57, %c64_i32 : i32 loc(#loc341)
+    %off_n_61 = arith.addi %off_n_59, %off_n_60 : i32 loc(#loc342)
+    %block_n_last_valid_62 = arith.muli %kv_num_blocks_53, %c2_i32 : i32 loc(#loc343)
+    %block_n_last_valid_63 = arith.minsi %block_n_last_valid_62, %block_n_last_valid_49 : i32 loc(#loc344)
+    %offs_n_64 = tt.splat %off_n_61 : i32 -> tensor<64xi32> loc(#loc345)
+    %offs_n_65 = arith.addi %offs_n, %offs_n_64 : tensor<64xi32> loc(#loc345)
+    %8 = tt.expand_dims %offs_n_65 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc164)
+    %9 = arith.cmpi sle, %block_n_end_56, %block_n_last_valid_63 : i32 loc(#loc165)
+    %10 = arith.select %9, %block_n_end_56, %block_n_last_valid_63 : i32 loc(#loc166)
+    %kv_offset_66:5 = scf.for %start_n = %block_n_start_55 to %10 step %c1_i32 iter_args(%acc_78 = %kv_offset#0, %l_i_79 = %kv_offset#1, %m_i_80 = %kv_offset#2, %offs_n_81 = %8, %kv_offset_82 = %c0_i32) -> (tensor<512x128xf32>, tensor<512xf32>, tensor<512xf32>, tensor<1x64xi32>, i32)  : i32 {
+      %kv_base_offset = arith.addi %off_n_61, %kv_offset_82 : i32 loc(#loc426)
+      %offs_n_load = tt.splat %kv_base_offset : i32 -> tensor<64xi32> loc(#loc427)
+      %offs_n_load_83 = arith.addi %offs_n_load, %offs_n : tensor<64xi32> loc(#loc427)
+      %ptr = tt.expand_dims %offs_n_load_83 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc488)
+      %ptr_84 = arith.muli %ptr, %cst_0 : tensor<64x1xi32> loc(#loc489)
+      %ptr_85 = tt.splat %K : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc490)
+      %ptr_86 = tt.addptr %ptr_85, %ptr_84 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc490)
+      %ptr_87 = tt.broadcast %ptr_86 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc491)
+      %ptr_88 = tt.broadcast %offs_m : tensor<1x128xi32> -> tensor<64x128xi32> loc(#loc491)
+      %ptr_89 = tt.addptr %ptr_87, %ptr_88 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc491)
+      %k = tt.splat %ks1 : i32 -> tensor<64x1xi32> loc(#loc492)
+      %k_90 = arith.cmpi slt, %ptr, %k : tensor<64x1xi32> loc(#loc492)
+      %k_91 = tt.broadcast %k_90 : tensor<64x1xi1> -> tensor<64x128xi1> loc(#loc493)
+      %k_92 = tt.load %ptr_89, %k_91, %cst_1 : tensor<64x128x!tt.ptr<bf16>> loc(#loc493)
+      %k_93 = tt.trans %k_92 {order = array<i32: 1, 0>} : tensor<64x128xbf16> -> tensor<128x64xbf16> loc(#loc429)
+      %qk = tt.dot %q_43, %k_93, %cst_13, inputPrecision = tf32 : tensor<512x128xbf16> * tensor<128x64xbf16> -> tensor<512x64xf32> loc(#loc430)
+      %qk_94 = arith.mulf %qk, %cst_12 : tensor<512x64xf32> loc(#loc431)
+      %post_mod_scores = tt.splat %ks1 : i32 -> tensor<1x64xi32> loc(#loc432)
+      %post_mod_scores_95 = arith.cmpi slt, %offs_n_81, %post_mod_scores : tensor<1x64xi32> loc(#loc432)
+      %post_mod_scores_96 = tt.broadcast %post_mod_scores_95 : tensor<1x64xi1> -> tensor<512x64xi1> loc(#loc433)
+      %post_mod_scores_97 = arith.select %post_mod_scores_96, %qk_94, %cst_11 : tensor<512x64xi1>, tensor<512x64xf32> loc(#loc433)
+      %post_mod_scores_98 = arith.mulf %post_mod_scores_97, %cst_5 : tensor<512x64xf32> loc(#loc434)
+      %m_ij = "tt.reduce"(%post_mod_scores_98) <{axis = 1 : i32}> ({
+      ^bb0(%m_ij_131: f32 loc(callsite(#loc1 at #loc435)), %m_ij_132: f32 loc(callsite(#loc1 at #loc435))):
+        %m_ij_133 = arith.maxnumf %m_ij_131, %m_ij_132 : f32 loc(#loc521)
+        tt.reduce.return %m_ij_133 : f32 loc(#loc494)
+      }) : (tensor<512x64xf32>) -> tensor<512xf32> loc(#loc494)
+      %m_ij_99 = arith.maxnumf %m_i_80, %m_ij : tensor<512xf32> loc(#loc436)
+      %masked_out_rows = arith.cmpf oeq, %m_ij_99, %cst_4 : tensor<512xf32> loc(#loc437)
+      %m_ij_masked = arith.select %masked_out_rows, %cst_14, %m_ij_99 : tensor<512xi1>, tensor<512xf32> loc(#loc438)
+      %alpha = arith.subf %m_i_80, %m_ij_masked : tensor<512xf32> loc(#loc439)
+      %alpha_100 = math.exp2 %alpha : tensor<512xf32> loc(#loc440)
+      %p = tt.expand_dims %m_ij_masked {axis = 1 : i32} : tensor<512xf32> -> tensor<512x1xf32> loc(#loc441)
+      %p_101 = tt.broadcast %p : tensor<512x1xf32> -> tensor<512x64xf32> loc(#loc442)
+      %p_102 = arith.subf %post_mod_scores_98, %p_101 : tensor<512x64xf32> loc(#loc442)
+      %p_103 = math.exp2 %p_102 : tensor<512x64xf32> loc(#loc443)
+      %l_i_104 = arith.mulf %l_i_79, %alpha_100 : tensor<512xf32> loc(#loc444)
+      %l_i_105 = "tt.reduce"(%p_103) <{axis = 1 : i32}> ({
+      ^bb0(%l_i_131: f32 loc(callsite(#loc1 at #loc445)), %l_i_132: f32 loc(callsite(#loc1 at #loc445))):
+        %l_i_133 = arith.addf %l_i_131, %l_i_132 : f32 loc(#loc522)
+        tt.reduce.return %l_i_133 : f32 loc(#loc496)
+      }) : (tensor<512x64xf32>) -> tensor<512xf32> loc(#loc496)
+      %l_i_106 = arith.addf %l_i_104, %l_i_105 : tensor<512xf32> loc(#loc446)
+      %acc_107 = tt.expand_dims %alpha_100 {axis = 1 : i32} : tensor<512xf32> -> tensor<512x1xf32> loc(#loc447)
+      %acc_108 = tt.broadcast %acc_107 : tensor<512x1xf32> -> tensor<512x128xf32> loc(#loc448)
+      %acc_109 = arith.mulf %acc_78, %acc_108 : tensor<512x128xf32> loc(#loc448)
+      %ptr_110 = tt.splat %V : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>> loc(#loc498)
+      %ptr_111 = tt.addptr %ptr_110, %ptr_84 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi32> loc(#loc498)
+      %ptr_112 = tt.broadcast %ptr_111 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x128x!tt.ptr<bf16>> loc(#loc499)
+      %ptr_113 = tt.addptr %ptr_112, %ptr_88 : tensor<64x128x!tt.ptr<bf16>>, tensor<64x128xi32> loc(#loc499)
+      %v = tt.load %ptr_113, %k_91, %cst_1 : tensor<64x128x!tt.ptr<bf16>> loc(#loc500)
+      %acc_114 = arith.truncf %p_103 : tensor<512x64xf32> to tensor<512x64xbf16> loc(#loc450)
+      %acc_115 = tt.dot %acc_114, %v, %acc_109, inputPrecision = tf32 : tensor<512x64xbf16> * tensor<64x128xbf16> -> tensor<512x128xf32> loc(#loc451)
+      %cur_block_idx = arith.divsi %start_n, %c2_i32 : i32 loc(#loc501)
+      %cur_block = tt.addptr %arg_FULL_KV_IDX, %cur_block_idx : !tt.ptr<i32>, i32 loc(#loc502)
+      %cur_block_116 = tt.load %cur_block evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc503)
+      %next_block = arith.addi %cur_block_idx, %c1_i32 : i32 loc(#loc504)
+      %next_block_117 = arith.cmpi slt, %next_block, %kv_num_blocks_53 : i32 loc(#loc505)
+      %next_block_118 = tt.addptr %cur_block, %c1_i32 : !tt.ptr<i32>, i32 loc(#loc506)
+      %next_block_119 = tt.load %next_block_118, %next_block_117 evictionPolicy = evict_last : !tt.ptr<i32> loc(#loc507)
+      %needs_jump = arith.addi %start_n, %c1_i32 : i32 loc(#loc508)
+      %needs_jump_120 = arith.remsi %needs_jump, %c2_i32 : i32 loc(#loc509)
+      %needs_jump_121 = arith.cmpi eq, %needs_jump_120, %c0_i32 : i32 loc(#loc510)
+      %jump_to_block = arith.subi %next_block_119, %cur_block_116 : i32 loc(#loc511)
+      %jump_to_block_122 = arith.muli %jump_to_block, %c128_i32 : i32 loc(#loc512)
+      %jump_to_block_123 = arith.subi %jump_to_block_122, %c64_i32 : i32 loc(#loc513)
+      %offset = arith.extui %needs_jump_121 : i1 to i32 loc(#loc514)
+      %offset_124 = arith.muli %jump_to_block_123, %offset : i32 loc(#loc514)
+      %offset_125 = arith.subi %c1_i32, %offset : i32 loc(#loc515)
+      %offset_126 = arith.muli %offset_125, %c64_i32 : i32 loc(#loc516)
+      %offset_127 = arith.addi %offset_124, %offset_126 : i32 loc(#loc517)
+      %offs_n_128 = tt.splat %offset_127 : i32 -> tensor<1x64xi32> loc(#loc453)
+      %offs_n_129 = arith.addi %offs_n_81, %offs_n_128 : tensor<1x64xi32> loc(#loc453)
+      %kv_offset_130 = arith.addi %kv_offset_82, %offset_127 : i32 loc(#loc454)
+      scf.yield %acc_115, %l_i_106, %m_ij_99, %offs_n_129, %kv_offset_130 : tensor<512x128xf32>, tensor<512xf32>, tensor<512xf32>, tensor<1x64xi32>, i32 loc(#loc347)
+    } loc(#loc525)
+    %m_offset = arith.muli %off_t, %2 : i32 loc(#loc348)
+    %m_offset_67 = arith.muli %off_z_20, %1 : i32 loc(#loc349)
+    %m_offset_68 = arith.addi %m_offset, %m_offset_67 : i32 loc(#loc350)
+    %M_block_ptr = tt.addptr %arg_M, %m_offset_68 : !tt.ptr<f32>, i32 loc(#loc351)
+    %M_block_ptr_69 = arith.muli %off_hkv, %c4_i32 : i32 loc(#loc352)
+    %M_block_ptr_70 = arith.extsi %ks0 : i32 to i64 loc(#loc353)
+    %M_block_ptr_71 = arith.extsi %M_block_ptr_69 : i32 to i64 loc(#loc353)
+    %L_block_ptr = tt.addptr %arg_L, %m_offset_68 : !tt.ptr<f32>, i32 loc(#loc354)
+    %m_i = tt.reshape %kv_offset_66#2 : tensor<512xf32> -> tensor<4x128xf32> loc(#loc355)
+    %l_i = tt.reshape %kv_offset_66#1 : tensor<512xf32> -> tensor<4x128xf32> loc(#loc356)
+    %11 = tt.splat %M_block_ptr : !tt.ptr<f32> -> tensor<4x128x!tt.ptr<f32>> loc(#loc177)
+    %12 = tt.splat %M_block_ptr_71 : i64 -> tensor<4xi64> loc(#loc177)
+    %13 = arith.extsi %off_g : tensor<4xi32> to tensor<4xi64> loc(#loc177)
+    %14 = arith.addi %12, %13 : tensor<4xi64> loc(#loc177)
+    %15 = tt.expand_dims %14 {axis = 1 : i32} : tensor<4xi64> -> tensor<4x1xi64> loc(#loc177)
+    %16 = tt.splat %M_block_ptr_70 : i64 -> tensor<4x1xi64> loc(#loc177)
+    %17 = arith.muli %15, %16 : tensor<4x1xi64> loc(#loc177)
+    %18 = tt.broadcast %17 : tensor<4x1xi64> -> tensor<4x128xi64> loc(#loc177)
+    %19 = arith.extsi %off_m : tensor<128xi32> to tensor<128xi64> loc(#loc177)
+    %20 = tt.expand_dims %19 {axis = 0 : i32} : tensor<128xi64> -> tensor<1x128xi64> loc(#loc177)
+    %21 = tt.broadcast %20 : tensor<1x128xi64> -> tensor<4x128xi64> loc(#loc177)
+    %22 = arith.addi %18, %21 : tensor<4x128xi64> loc(#loc177)
+    %23 = tt.addptr %11, %22 : tensor<4x128x!tt.ptr<f32>>, tensor<4x128xi64> loc(#loc177)
+    %24 = arith.cmpi sge, %20, %cst : tensor<1x128xi64> loc(#loc177)
+    %25 = tt.splat %M_block_ptr_70 : i64 -> tensor<1x128xi64> loc(#loc177)
+    %26 = arith.cmpi slt, %20, %25 : tensor<1x128xi64> loc(#loc177)
+    %27 = arith.andi %24, %26 : tensor<1x128xi1> loc(#loc177)
+    %28 = tt.broadcast %27 : tensor<1x128xi1> -> tensor<4x128xi1> loc(#loc177)
+    tt.store %23, %m_i, %28 : tensor<4x128x!tt.ptr<f32>> loc(#loc177)
+    %29 = tt.splat %L_block_ptr : !tt.ptr<f32> -> tensor<4x128x!tt.ptr<f32>> loc(#loc178)
+    %30 = tt.addptr %29, %22 : tensor<4x128x!tt.ptr<f32>>, tensor<4x128xi64> loc(#loc178)
+    tt.store %30, %l_i, %28 : tensor<4x128x!tt.ptr<f32>> loc(#loc178)
+    %idx_hq = tt.splat %M_block_ptr_69 : i32 -> tensor<4x1x1xi32> loc(#loc357)
+    %idx_hq_72 = arith.addi %idx_hq, %q_range_26 : tensor<4x1x1xi32> loc(#loc357)
+    %mask_73 = arith.cmpi slt, %q_range_33, %mask : tensor<1x1x128xi32> loc(#loc207)
+    %mask_74 = tt.broadcast %q_37 : tensor<1x128x1xi1> -> tensor<1x128x128xi1> loc(#loc358)
+    %mask_75 = tt.broadcast %mask_73 : tensor<1x1x128xi1> -> tensor<1x128x128xi1> loc(#loc358)
+    %mask_76 = arith.andi %mask_74, %mask_75 : tensor<1x128x128xi1> loc(#loc358)
+    %acc_77 = tt.reshape %kv_offset_66#0 : tensor<512x128xf32> -> tensor<4x128x128xf32> loc(#loc359)
+    %31 = arith.muli %q_range_28, %cst_15 : tensor<1x128x1xi32> loc(#loc182)
+    %32 = tt.broadcast %q_range_33 : tensor<1x1x128xi32> -> tensor<1x128x128xi32> loc(#loc183)
+    %33 = tt.broadcast %31 : tensor<1x128x1xi32> -> tensor<1x128x128xi32> loc(#loc183)
+    %34 = arith.addi %32, %33 : tensor<1x128x128xi32> loc(#loc183)
+    %35 = arith.muli %idx_hq_72, %cst_16 : tensor<4x1x1xi32> loc(#loc184)
+    %36 = tt.splat %ks0 : i32 -> tensor<4x1x1xi32> loc(#loc185)
+    %37 = arith.muli %35, %36 : tensor<4x1x1xi32> loc(#loc185)
+    %38 = tt.broadcast %34 : tensor<1x128x128xi32> -> tensor<4x128x128xi32> loc(#loc186)
+    %39 = tt.broadcast %37 : tensor<4x1x1xi32> -> tensor<4x128x128xi32> loc(#loc186)
+    %40 = arith.addi %38, %39 : tensor<4x128x128xi32> loc(#loc186)
+    %41 = arith.muli %off_t, %c4096_i32 : i32 loc(#loc187)
+    %42 = arith.muli %41, %ks0 : i32 loc(#loc188)
+    %43 = tt.splat %42 : i32 -> tensor<4x128x128xi32> loc(#loc189)
+    %44 = arith.addi %40, %43 : tensor<4x128x128xi32> loc(#loc189)
+    %45 = tt.splat %out_ptr0 : !tt.ptr<f32> -> tensor<4x128x128x!tt.ptr<f32>> loc(#loc190)
+    %46 = tt.addptr %45, %44 : tensor<4x128x128x!tt.ptr<f32>>, tensor<4x128x128xi32> loc(#loc190)
+    %47 = tt.broadcast %mask_76 : tensor<1x128x128xi1> -> tensor<4x128x128xi1> loc(#loc191)
+    tt.store %46, %acc_77, %47 : tensor<4x128x128x!tt.ptr<f32>> loc(#loc191)
+    tt.return loc(#loc192)
+  } loc(#loc)
+} loc(#loc)
+#loc3 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:31)
+#loc4 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":132:19)
+#loc5 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":276:38)
+#loc6 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:61)
+#loc7 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":135:21)
+#loc8 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":95:10)
+#loc9 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":86:60)
+#loc10 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":86:65)
+#loc11 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":89:54)
+#loc12 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":89:62)
+#loc13 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":41:22)
+#loc14 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":104:33)
+#loc15 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":41:28)
+#loc16 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":105:34)
+#loc17 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":105:45)
+#loc18 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":106:49)
+#loc19 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":108:26)
+#loc20 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":108:48)
+#loc21 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":110:49)
+#loc22 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":111:26)
+#loc23 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":113:23)
+#loc24 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":113:45)
+#loc25 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":113:35)
+#loc26 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":114:47)
+#loc27 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":117:12)
+#loc28 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":118:12)
+#loc29 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":137:25)
+#loc30 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":140:25)
+#loc31 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":141:44)
+#loc32 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":141:54)
+#loc33 = loc("/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py":74:27)
+#loc34 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":141:22)
+#loc35 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":152:28)
+#loc36 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":153:34)
+#loc37 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:32)
+#loc38 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:26)
+#loc39 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:67)
+#loc40 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:49)
+#loc41 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:103)
+#loc42 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":155:84)
+#loc43 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":162:72)
+#loc44 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":162:24)
+#loc45 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":162:35)
+#loc46 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":162:20)
+#loc47 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":166:22)
+#loc48 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":173:28)
+#loc49 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":176:44)
+#loc50 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":177:20)
+#loc51 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":177:48)
+#loc52 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":177:95)
+#loc53 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":177:71)
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+#loc169 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":239:43)
+#loc170 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":239:35)
+#loc171 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":243:17)
+#loc172 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":246:25)
+#loc173 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":248:8)
+#loc174 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":251:17)
+#loc175 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":260:25)
+#loc176 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":261:25)
+#loc177 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":266:30)
+#loc178 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":267:30)
+#loc179 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":272:25)
+#loc180 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":276:30)
+#loc181 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":277:41)
+#loc182 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:53)
+#loc183 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:49)
+#loc184 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:65)
+#loc185 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:72)
+#loc186 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:61)
+#loc187 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:83)
+#loc188 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:89)
+#loc189 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:78)
+#loc190 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:25)
+#loc191 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:112)
+#loc192 = loc("/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/a7/ca7s7tp233627gzszjumpewmgfr3x27cno6rvah7rvjcudtqof37.py":279:4)
+#loc205 = loc(callsite(#loc1 at #loc2))
+#loc206 = loc("acc"(#loc4))
+#loc207 = loc("mask"(#loc5))
+#loc208 = loc("q_range"(#loc6))
+#loc209 = loc("HKV"(#loc8))
+#loc210 = loc("TILE_KV_OG"(#loc14))
+#loc211 = loc("TILE_KV"(#loc16))
+#loc212 = loc("TILE_KV"(#loc17))
+#loc213 = loc("off_z"(#loc19))
+#loc214 = loc("off_z"(#loc20))
+#loc215 = loc("off_hkv"(#loc21))
+#loc216 = loc("off_t"(#loc22))
+#loc217 = loc("q_offset"(#loc23))
+#loc218 = loc("q_offset"(#loc24))
+#loc219 = loc("q_offset"(#loc25))
+#loc220 = loc("k_offset"(#loc26))
+#loc221 = loc("K"(#loc27))
+#loc222 = loc("V"(#loc28))
+#loc223 = loc("off_g"(#loc29))
+#loc224 = loc("off_m"(#loc30))
+#loc225 = loc("offs_m"(#loc31))
+#loc226 = loc("offs_m"(#loc32))
+#loc227 = loc("offs_m"(#loc34))
+#loc228 = loc("block_n_start"(#loc35))
+#loc229 = loc("block_n_end"(#loc36))
+#loc230 = loc("q_range"(#loc37))
+#loc231 = loc("q_range"(#loc38))
+#loc232 = loc("q_range"(#loc39))
+#loc233 = loc("q_range"(#loc40))
+#loc234 = loc("q_range"(#loc41))
+#loc235 = loc("q_range"(#loc42))
+#loc236 = loc("q"(#loc43))
+#loc237 = loc("q"(#loc44))
+#loc238 = loc("q"(#loc45))
+#loc239 = loc("q"(#loc46))
+#loc240 = loc("q"(#loc47))
+#loc241 = loc("kv_num_blocks"(#loc48))
+#loc242 = loc("off_n_block_in_sparse"(#loc49))
+#loc243 = loc("off_n"(#loc50))
+#loc244 = loc("off_n"(#loc51))
+#loc245 = loc("off_n"(#loc52))
+#loc246 = loc("off_n"(#loc53))
+#loc247 = loc("block_n_last_valid"(#loc54))
+#loc248 = loc("block_n_last_valid"(#loc55))
+#loc249 = loc("block_n_last_valid"(#loc56))
+#loc250 = loc("block_n_last_valid"(#loc57))
+#loc251 = loc("offs_n"(#loc58))
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+#loc253 = loc("acc"(#loc64))
+#loc254 = loc("kv_base_offset"(#loc65))
+#loc256 = loc("offs_n_load"(#loc67))
+#loc257 = loc("ptr"(#loc68))
+#loc258 = loc("k"(#loc69))
+#loc259 = loc("ptr"(#loc70))
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+#loc261 = loc("ptr"(#loc72))
+#loc262 = loc("k"(#loc75))
+#loc263 = loc("qk"(#loc76))
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+#loc265 = loc("m"(#loc79))
+#loc266 = loc("n"(#loc80))
+#loc267 = loc("post_mod_scores"(#loc81))
+#loc268 = loc("post_mod_scores"(#loc82))
+#loc269 = loc("tmp3"(#loc83))
+#loc270 = loc("tmp5"(#loc84))
+#loc271 = loc("tmp6"(#loc85))
+#loc272 = loc("tmp7"(#loc86))
+#loc273 = loc("tmp8"(#loc87))
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+#loc278 = loc("tmp14"(#loc92))
+#loc279 = loc("tmp14"(#loc93))
+#loc280 = loc("tmp14"(#loc94))
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+#loc284 = loc("tmp16"(#loc98))
+#loc285 = loc("tmp16"(#loc99))
+#loc286 = loc("tmp16"(#loc100))
+#loc287 = loc("tmp16"(#loc101))
+#loc288 = loc("tmp16"(#loc102))
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+#loc290 = loc("tmp18"(#loc104))
+#loc291 = loc("tmp19"(#loc105))
+#loc292 = loc("tmp20"(#loc106))
+#loc293 = loc("mask_mod_output"(#loc107))
+#loc294 = loc("post_mod_scores"(#loc108))
+#loc295 = loc("post_mod_scores"(#loc109))
+#loc297 = loc("m_ij"(#loc113))
+#loc298 = loc("masked_out_rows"(#loc114))
+#loc299 = loc("m_ij_masked"(#loc115))
+#loc300 = loc("alpha"(#loc116))
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+#loc302 = loc("p"(#loc118))
+#loc303 = loc("p"(#loc119))
+#loc304 = loc("p"(#loc120))
+#loc305 = loc("l_i"(#loc121))
+#loc307 = loc("l_i"(#loc125))
+#loc308 = loc("acc"(#loc126))
+#loc309 = loc("acc"(#loc127))
+#loc310 = loc("v"(#loc128))
+#loc311 = loc("acc"(#loc129))
+#loc312 = loc("acc"(#loc130))
+#loc313 = loc("cur_block_idx"(#loc131))
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+#loc316 = loc("cur_block"(#loc134))
+#loc317 = loc("next_block"(#loc135))
+#loc318 = loc("next_block"(#loc136))
+#loc319 = loc("next_block"(#loc137))
+#loc320 = loc("next_block"(#loc138))
+#loc321 = loc("needs_jump"(#loc139))
+#loc322 = loc("needs_jump"(#loc140))
+#loc323 = loc("needs_jump"(#loc141))
+#loc324 = loc("jump_to_block"(#loc142))
+#loc325 = loc("jump_to_block"(#loc143))
+#loc326 = loc("jump_to_block"(#loc144))
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+#loc333 = loc(callsite(#loc151 at #loc2))
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+#loc335 = loc("block_n_start"(#loc153))
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progress/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/__grp__triton_tem_fused_mul_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_tem_fused_mul_1.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.source", "triton_tem_fused_mul_1.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.ttir", "triton_tem_fused_mul_1.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.ttgir", "triton_tem_fused_mul_1.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.llir", "triton_tem_fused_mul_1.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.ptx", "triton_tem_fused_mul_1.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.cubin", "triton_tem_fused_mul_1.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/5EMJSZKQENCMZ6EJOMWBJD7DKRWL7O5DF72P7CNFSHSLWGJ4WWGQ/triton_tem_fused_mul_1.json

@@ -0,0 +1 @@
+{"hash": "e9189965502344ccf889732c148fe3546cbfbba32ff4ff89a591e4bb193cb58d", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 8, "num_ctas": 1, "num_stages": 3, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 164864, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_tem_fused_mul_1"}

progress/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/__grp__triton_per_fused_2.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_per_fused_2.source": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.source", "triton_per_fused_2.ttir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.ttir", "triton_per_fused_2.ttgir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.ttgir", "triton_per_fused_2.llir": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.llir", "triton_per_fused_2.ptx": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.ptx", "triton_per_fused_2.cubin": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.cubin", "triton_per_fused_2.json": "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.json"}}

progress/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.json

@@ -0,0 +1 @@
+{"hash": "e98e9dc1de442deeb011f770919e176108abe94635216976f4adaf947e2016b0", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 2, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 0, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_per_fused_2"}

progress/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.llir

@@ -0,0 +1,167 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@.str = private unnamed_addr constant [11 x i8] c"__CUDA_FTZ\00", align 1
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_per_fused_2(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, i32 %5, i32 %6, ptr addrspace(1) readnone captures(none) %7, ptr addrspace(1) readnone captures(none) %8) local_unnamed_addr #0 !dbg !5 {
+  %10 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !8
+  %11 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !9
+  %12 = and i32 %11, 31, !dbg !9
+  %13 = lshr i32 %10, 7, !dbg !10
+  %14 = mul nuw nsw i32 %12, 196608, !dbg !11
+  %15 = add nuw i32 %14, %10, !dbg !12
+  %16 = sext i32 %15 to i64, !dbg !13
+  %17 = getelementptr float, ptr addrspace(1) %0, i64 %16, !dbg !13
+  %18 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l"(ptr addrspace(1) %17) #5, !dbg !14
+  %19 = zext nneg i32 %13 to i64, !dbg !15
+  %20 = getelementptr float, ptr addrspace(1) %1, i64 %19, !dbg !15
+  %21 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_last.b64 $0, 1.0;", "=l"() #5, !dbg !16
+  %22 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09ld.global.L1::evict_last.L2::cache_hint.b32 { $0 }, [ $1 + 0 ], $2;", "=r,l,l"(ptr addrspace(1) %20, i64 %21) #5, !dbg !16
+  %23 = bitcast i32 %22 to float, !dbg !16
+  %24 = mul nuw nsw i32 %12, 1536, !dbg !17
+  %25 = add nuw nsw i32 %24, %13, !dbg !18
+  %26 = zext nneg i32 %25 to i64, !dbg !19
+  %27 = getelementptr float, ptr addrspace(1) %2, i64 %26, !dbg !19
+  %28 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_last.b64 $0, 1.0;", "=l"() #5, !dbg !20
+  %29 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09ld.global.L1::evict_last.L2::cache_hint.b32 { $0 }, [ $1 + 0 ], $2;", "=r,l,l"(ptr addrspace(1) %27, i64 %28) #5, !dbg !20
+  %30 = bitcast i32 %29 to float, !dbg !20
+  %31 = getelementptr float, ptr addrspace(1) %3, i64 %19, !dbg !21
+  %32 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_last.b64 $0, 1.0;", "=l"() #5, !dbg !22
+  %33 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09ld.global.L1::evict_last.L2::cache_hint.b32 { $0 }, [ $1 + 0 ], $2;", "=r,l,l"(ptr addrspace(1) %31, i64 %32) #5, !dbg !22
+  %34 = fcmp oeq float %23, 0xFFF0000000000000, !dbg !23
+  %35 = fsub float %30, %23, !dbg !24
+  %36 = select i1 %34, float 0.000000e+00, float %35, !dbg !25
+  %37 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !26
+  %.not.i = icmp eq i32 %37, 0, !dbg !26
+  br i1 %.not.i, label %40, label %38, !dbg !26
+
+38:                                               ; preds = %9
+  %39 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %36) #5, !dbg !26
+  br label %__nv_exp2f.exit, !dbg !26
+
+40:                                               ; preds = %9
+  %41 = tail call float @llvm.nvvm.ex2.approx.f(float %36) #5, !dbg !26
+  br label %__nv_exp2f.exit, !dbg !26
+
+__nv_exp2f.exit:                                  ; preds = %38, %40
+  %.0.i = phi float [ %39, %38 ], [ %41, %40 ], !dbg !26
+  %42 = bitcast i32 %33 to float, !dbg !22
+  %43 = bitcast i32 %18 to float, !dbg !14
+  %44 = udiv i32 %10, 6144, !dbg !27
+  %45 = urem i32 %13, 48, !dbg !28
+  %46 = and i32 %10, 127, !dbg !29
+  %47 = fmul float %.0.i, %43, !dbg !30
+  %48 = bitcast float %47 to i32, !dbg !31
+  %49 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %48, i32 16, i32 31), !dbg !31
+  %50 = bitcast i32 %49 to float, !dbg !31
+  %51 = fadd float %47, %50, !dbg !35
+  %52 = bitcast float %51 to i32, !dbg !31
+  %53 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %52, i32 8, i32 31), !dbg !31
+  %54 = bitcast i32 %53 to float, !dbg !31
+  %55 = fadd float %51, %54, !dbg !35
+  %56 = bitcast float %55 to i32, !dbg !31
+  %57 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %56, i32 4, i32 31), !dbg !31
+  %58 = bitcast i32 %57 to float, !dbg !31
+  %59 = fadd float %55, %58, !dbg !35
+  %60 = bitcast float %59 to i32, !dbg !31
+  %61 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %60, i32 2, i32 31), !dbg !31
+  %62 = bitcast i32 %61 to float, !dbg !31
+  %63 = fadd float %59, %62, !dbg !35
+  %64 = bitcast float %63 to i32, !dbg !31
+  %65 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %64, i32 1, i32 31), !dbg !31
+  %66 = bitcast i32 %65 to float, !dbg !31
+  %67 = fadd float %63, %66, !dbg !35
+  %68 = select i1 %34, float 1.000000e+00, float %42, !dbg !36
+  %69 = tail call float @llvm.nvvm.div.full(float %67, float %68), !dbg !37
+  %70 = shl nuw nsw i32 %44, 7, !dbg !38
+  %71 = or disjoint i32 %70, %46, !dbg !39
+  %72 = shl nuw nsw i32 %45, 12, !dbg !40
+  %73 = add nuw nsw i32 %71, %72, !dbg !41
+  %74 = zext nneg i32 %73 to i64, !dbg !42
+  %75 = getelementptr bfloat, ptr addrspace(1) %4, i64 %74, !dbg !42
+  %76 = fptrunc float %69 to bfloat, !dbg !43
+  %77 = and i32 %11, 63, !dbg !43
+  %78 = icmp eq i32 %77, 0, !dbg !43
+  %79 = bitcast bfloat %76 to i16, !dbg !43
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %79, ptr addrspace(1) %75, i1 %78) #5, !dbg !43
+  ret void, !dbg !44
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #2
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.div.full(float, float) #3
+
+declare i32 @__nvvm_reflect(ptr) local_unnamed_addr #4
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.ftz.f(float) #3
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.f(float) #3
+
+attributes #0 = { nounwind "nvvm.reqntid"="64" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
+attributes #4 = { "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #5 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+!llvm.ident = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py", directory: "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/ee")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!5 = distinct !DISubprogram(name: "triton_per_fused_2", linkageName: "triton_per_fused_2", scope: !1, file: !1, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 24, column: 28, scope: !5)
+!9 = !DILocation(line: 27, column: 38, scope: !5)
+!10 = !DILocation(line: 34, column: 19, scope: !5)
+!11 = !DILocation(line: 38, column: 42, scope: !5)
+!12 = !DILocation(line: 38, column: 35, scope: !5)
+!13 = !DILocation(line: 38, column: 30, scope: !5)
+!14 = !DILocation(line: 38, column: 49, scope: !5)
+!15 = !DILocation(line: 39, column: 30, scope: !5)
+!16 = !DILocation(line: 39, column: 35, scope: !5)
+!17 = !DILocation(line: 40, column: 40, scope: !5)
+!18 = !DILocation(line: 40, column: 35, scope: !5)
+!19 = !DILocation(line: 40, column: 30, scope: !5)
+!20 = !DILocation(line: 40, column: 47, scope: !5)
+!21 = !DILocation(line: 41, column: 31, scope: !5)
+!22 = !DILocation(line: 41, column: 36, scope: !5)
+!23 = !DILocation(line: 43, column: 19, scope: !5)
+!24 = !DILocation(line: 44, column: 18, scope: !5)
+!25 = !DILocation(line: 46, column: 32, scope: !5)
+!26 = !DILocation(line: 47, column: 26, scope: !5)
+!27 = !DILocation(line: 37, column: 19, scope: !5)
+!28 = !DILocation(line: 36, column: 28, scope: !5)
+!29 = !DILocation(line: 35, column: 19, scope: !5)
+!30 = !DILocation(line: 48, column: 18, scope: !5)
+!31 = !DILocation(line: 291, column: 36, scope: !32, inlinedAt: !34)
+!32 = distinct !DILexicalBlockFile(scope: !5, file: !33, discriminator: 0)
+!33 = !DIFile(filename: "standard.py", directory: "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language")
+!34 = !DILocation(line: 50, column: 26, scope: !5)
+!35 = !DILocation(line: 261, column: 15, scope: !32, inlinedAt: !34)
+!36 = !DILocation(line: 52, column: 34, scope: !5)
+!37 = !DILocation(line: 53, column: 21, scope: !5)
+!38 = !DILocation(line: 55, column: 34, scope: !5)
+!39 = !DILocation(line: 55, column: 30, scope: !5)
+!40 = !DILocation(line: 55, column: 44, scope: !5)
+!41 = !DILocation(line: 55, column: 39, scope: !5)
+!42 = !DILocation(line: 55, column: 25, scope: !5)
+!43 = !DILocation(line: 55, column: 56, scope: !5)
+!44 = !DILocation(line: 55, column: 4, scope: !5)

progress/SpecForge/cache/compiled_kernels/triton/3/5GHJ3QO6IQW65MAR65YJDHQXMEEKX2KGGUQWS5XUVWXZI7RAC2YA/triton_per_fused_2.ptx

@@ -0,0 +1,389 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_per_fused_2      // -- Begin function triton_per_fused_2
+.global .align 1 .b8 _$_str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90};
+                                        // @triton_per_fused_2
+.visible .entry triton_per_fused_2(
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_0,
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_1,
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_2,
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_3,
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_4,
+	.param .u32 triton_per_fused_2_param_5,
+	.param .u32 triton_per_fused_2_param_6,
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_7,
+	.param .u64 .ptr .global .align 1 triton_per_fused_2_param_8
+)
+.reqntid 64
+{
+	.reg .pred 	%p<3>;
+	.reg .b16 	%rs<2>;
+	.reg .b32 	%r<38>;
+	.reg .b64 	%rd<18>;
+	.loc	1 18 0                          // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:18:0
+
+// %bb.0:                               // %__nv_exp2f.exit
+	ld.param.b64 	%rd12, [triton_per_fused_2_param_0];
+	ld.param.b64 	%rd13, [triton_per_fused_2_param_1];
+$L__tmp0:
+	.loc	1 24 28                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:24:28
+	mov.u32 	%r5, %ctaid.x;
+	ld.param.b64 	%rd14, [triton_per_fused_2_param_2];
+	.loc	1 27 38                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:27:38
+	mov.u32 	%r6, %tid.x;
+	and.b32 	%r7, %r6, 31;
+	ld.param.b64 	%rd15, [triton_per_fused_2_param_3];
+	.loc	1 34 19                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:34:19
+	shr.u32 	%r8, %r5, 7;
+	ld.param.b64 	%rd16, [triton_per_fused_2_param_4];
+	.loc	1 38 35                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:38:35
+	mad.lo.s32 	%r9, %r7, 196608, %r5;
+	.loc	1 38 30                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:38:30
+	mad.wide.s32 	%rd1, %r9, 4, %rd12;
+	.loc	1 38 49                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:38:49
+	// begin inline asm
+	mov.u32 %r1, 0x0;
+	ld.global.b32 { %r1 }, [ %rd1 + 0 ];
+	// end inline asm
+	.loc	1 39 30                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:39:30
+	mul.wide.u32 	%rd17, %r8, 4;
+	add.s64 	%rd3, %rd13, %rd17;
+	.loc	1 39 35                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:39:35
+	// begin inline asm
+	mov.u64 %rd4, 0x0;
+	createpolicy.fractional.L2::evict_last.b64 %rd4, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r2, 0x0;
+	ld.global.L1::evict_last.L2::cache_hint.b32 { %r2 }, [ %rd3 + 0 ], %rd4;
+	// end inline asm
+	.loc	1 40 35                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:40:35
+	mad.lo.s32 	%r10, %r7, 1536, %r8;
+	.loc	1 40 30                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:40:30
+	mad.wide.u32 	%rd6, %r10, 4, %rd14;
+	.loc	1 40 47                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:40:47
+	// begin inline asm
+	mov.u64 %rd7, 0x0;
+	createpolicy.fractional.L2::evict_last.b64 %rd7, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r3, 0x0;
+	ld.global.L1::evict_last.L2::cache_hint.b32 { %r3 }, [ %rd6 + 0 ], %rd7;
+	// end inline asm
+	.loc	1 41 31                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:41:31
+	add.s64 	%rd9, %rd15, %rd17;
+	.loc	1 41 36                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:41:36
+	// begin inline asm
+	mov.u64 %rd10, 0x0;
+	createpolicy.fractional.L2::evict_last.b64 %rd10, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r4, 0x0;
+	ld.global.L1::evict_last.L2::cache_hint.b32 { %r4 }, [ %rd9 + 0 ], %rd10;
+	// end inline asm
+	.loc	1 43 19                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:43:19
+	setp.eq.f32 	%p2, %r2, 0fFF800000;
+	.loc	1 44 18                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:44:18
+	sub.f32 	%r11, %r3, %r2;
+	.loc	1 46 32                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:46:32
+	selp.f32 	%r12, 0f00000000, %r11, %p2;
+	.loc	1 47 26                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:47:26
+	ex2.approx.ftz.f32 	%r13, %r12;
+	.loc	1 37 19                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:37:19
+	mul.hi.u32 	%r14, %r5, 715827883;
+	.loc	1 36 28                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:36:28
+	mul.hi.u32 	%r15, %r8, 89478486;
+	mul.lo.s32 	%r16, %r15, 48;
+	sub.s32 	%r17, %r8, %r16;
+	.loc	1 35 19                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:35:19
+	and.b32 	%r18, %r5, 127;
+	.loc	1 48 18                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:48:18
+	mul.f32 	%r19, %r13, %r1;
+$L__tmp1:
+	.loc	2 291 36                        // standard.py:291:36 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	shfl.sync.bfly.b32 	%r20, %r19, 16, 31, -1;
+	.loc	2 261 15                        // standard.py:261:15 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	fma.rn.f32 	%r21, %r13, %r1, %r20;
+	.loc	2 291 36                        // standard.py:291:36 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	shfl.sync.bfly.b32 	%r22, %r21, 8, 31, -1;
+	.loc	2 261 15                        // standard.py:261:15 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	add.f32 	%r23, %r21, %r22;
+	.loc	2 291 36                        // standard.py:291:36 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	shfl.sync.bfly.b32 	%r24, %r23, 4, 31, -1;
+	.loc	2 261 15                        // standard.py:261:15 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	add.f32 	%r25, %r23, %r24;
+	.loc	2 291 36                        // standard.py:291:36 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	shfl.sync.bfly.b32 	%r26, %r25, 2, 31, -1;
+	.loc	2 261 15                        // standard.py:261:15 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	add.f32 	%r27, %r25, %r26;
+	.loc	2 291 36                        // standard.py:291:36 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	shfl.sync.bfly.b32 	%r28, %r27, 1, 31, -1;
+	.loc	2 261 15                        // standard.py:261:15 @[ ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:50:26 ]
+	add.f32 	%r29, %r27, %r28;
+$L__tmp2:
+	.loc	1 52 34                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:52:34
+	selp.f32 	%r30, 0f3F800000, %r4, %p2;
+	.loc	1 53 21                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:53:21
+	div.full.f32 	%r31, %r29, %r30;
+	.loc	1 55 34                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:34
+	shr.u32 	%r32, %r14, 3;
+	and.b32 	%r33, %r32, 67108736;
+	.loc	1 55 30                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:30
+	or.b32 	%r34, %r33, %r18;
+	.loc	1 55 44                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:44
+	shl.b32 	%r35, %r17, 12;
+	.loc	1 55 39                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:39
+	add.s32 	%r36, %r34, %r35;
+	.loc	1 55 25                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:25
+	mad.wide.u32 	%rd11, %r36, 2, %rd16;
+	.loc	1 55 56                         // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:56
+	cvt.rn.bf16.f32 	%rs1, %r31;
+	and.b32 	%r37, %r6, 63;
+	setp.eq.b32 	%p1, %r37, 0;
+	// begin inline asm
+	@%p1 st.global.b16 [ %rd11 + 0 ], { %rs1 };
+	// end inline asm
+	.loc	1 55 4                          // ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py:55:4
+	ret;
+$L__tmp3:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/junquan/SpecForge/cache/compiled_kernels/ee/ceeui5pfegm2pcpkokzghtbznstx2p5iqb3n6wdv2ci43lzhlejq.py"
+	.file	2 "/workspace/hanrui/specforge/lib/python3.11/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 207                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xc8 DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 101
+.b8 101
+.b8 117
+.b8 105
+.b8 53
+.b8 112
+.b8 102
+.b8 101
+.b8 103
+.b8 109
+.b8 50
+.b8 112
+.b8 99
+.b8 112
+.b8 107
+.b8 111
+.b8 107
+.b8 122
+.b8 103
+.b8 104
+.b8 116
+.b8 98
+.b8 122
+.b8 110
+.b8 115
+.b8 116
+.b8 120
+.b8 50
+.b8 112
+.b8 53
+.b8 105
+.b8 113
+.b8 98
+.b8 51
+.b8 110
+.b8 54
+.b8 119
+.b8 100
+.b8 118
+.b8 50
+.b8 99
+.b8 105
+.b8 52
+.b8 51
+.b8 108
+.b8 122
+.b8 104
+.b8 108
+.b8 101
+.b8 106
+.b8 113
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 106
+.b8 117
+.b8 110
+.b8 113
+.b8 117
+.b8 97
+.b8 110
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 101
+.b8 101
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8f:0x15 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 112
+.b8 101
+.b8 114
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 50
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xa4:0x2e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 143                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xb9:0x18 DW_TAG_inlined_subroutine
+.b32 143                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 50                                  // DW_AT_call_line
+.b8 26                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}