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Update README.md

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@@ -36,7 +36,7 @@ Optimized specifically for Apple Silicon (M-series chips), this model balances t
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  ## Key Features
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- * **TurboQuant Accelerated:** Leverages advanced MLX kernel optimizations for accelerated matrix multiplication, ensuring faster token generation rates during local execution.
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  * **~50% Memory Reduction:** Cuts VRAM usage nearly in half compared to the base 16-bit model, opening up local execution on mid-tier unified memory configurations without spilling into system swap.
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  * **Near-Lossless Precision:** Grouped 6-bit quantization maintains the original model's structural code generation capabilities, logic, and syntax proficiency with negligible degradation.
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  * **Apple Silicon Native:** Designed from the ground up for unified memory architectures, leveraging direct hardware acceleration via the MLX framework.
 
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  ## Key Features
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+ * **TurboQuant Accelerated:** Leverages advanced MLX kernel optimizations for accelerated matrix multiplication, ensuring faster token generation rates during local execution, making the kv cache at the models whopping full 262k context just around ~3-4gb from ~180gb
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  * **~50% Memory Reduction:** Cuts VRAM usage nearly in half compared to the base 16-bit model, opening up local execution on mid-tier unified memory configurations without spilling into system swap.
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  * **Near-Lossless Precision:** Grouped 6-bit quantization maintains the original model's structural code generation capabilities, logic, and syntax proficiency with negligible degradation.
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  * **Apple Silicon Native:** Designed from the ground up for unified memory architectures, leveraging direct hardware acceleration via the MLX framework.