Commit History

Correct LoRA rank in card: r=32, alpha=64 (was a fleet-wide r=64 assumption)
80edff3
verified

VextLabs commited on

Correct base line in NOTICE: -> JUWEL Beryl (80L)
3c00f75
verified

VextLabs commited on

Correct base to juwel-beryl (80L); drop false padding claim; fix load class
0c2387b
verified

VextLabs commited on

Fix base_model_name_or_path: dead local path -> juwel-beryl (80L)
56156c9
verified

VextLabs commited on

model card
70c242f
verified

VextLabs commited on

weights: adapter_model.safetensors
9ac69f4
verified

VextLabs commited on

weights: adapter_config.json
f5affc3
verified

VextLabs commited on

NOTICE
7d0f1a2
verified

VextLabs commited on

model card
b57610b
verified

VextLabs commited on

model card
3157ce2
verified

VextLabs commited on

USE_POLICY.md
a25fc99
verified

VextLabs commited on

NOTICE
744a5ed
verified

VextLabs commited on

license
b3213da
verified

VextLabs commited on

model card
859676b
verified

VextLabs commited on

initial commit
43f2424
verified

VextLabs commited on