Measure the GB10 TP=2 serving envelope at a 500,000-token limit

Restore non-Base INT4 weights with DSpark MTP

Select SparkInfer MHC explicitly

Rebuild from DeepSeek-V4-Flash-0731 (native DSpark, no graft)

Keep benchmark tables concise

Document and select the INT4 INT8 kernel paths

Name the tested consumer GPUs

Document RTX 3090 and GB10 kernel paths

Restore pre-Base INT4 target with DSpark graft

Drop pp_transport: the transport it toggles was removed in 280d6f4cc4

vllm block: name the int8 prefill kernel that actually runs

Add concurrent serving needle benchmark (PP=10, C=1..128)

vllm block: restore pp_transport.cache_metadata=false (dropped in the appmana->vllm re-key; required by the validated 1M config)

Audit every claim against primary sources: absmax7 scales (not MSE), UE8M0 tile scales, Base ships one standard MTP stage

Correct provenance: derived from DeepSeek-V4-Flash-Base (FP8 block-quantized experts), not Flash MXFP4; DSpark stages grafted

Rewrite model card: correct kernel table (native prefill), real serving benchmarks, serving instructions

Rename appmana config block to vllm (matches forks-vllm-ampere kernel-config rename)

Update serving benchmarks (PP=12, async scheduling, 1M context); vllm config key

Harmonize appmana kernel symbols to role names (flash_mla 2.0.0, breaking)

config: restore appmana kernel block (native FlashMLA int8 decode/prefill + IMMA indexer)

Rebuild from DeepSeek-V4-Flash-Base (higher-precision fp8-block experts) with DSpark 3-stage speculative-decoding MTP grafted (mtp.0 replaced, mtp.1/mtp.2 added). Real end-to-end generation verified.

config: add unified appmana kernel block (additive; legacy flag retained)

Document sm86 sparse MLA serving path

Document DeepSeek V4 serving benchmark comparison

Replace checkpoint with MSE-scale INT4 weights

Add files using upload-large-folder tool

Add files using upload-large-folder tool

initial commit