bitsandbytes/pr_1366/en/_app/immutable/nodes/12.4e4cb239.js

import{s as Ct,o as Tt,n as _t}from"../chunks/scheduler.852ec091.js";import{S as gt,i as kt,g as o,s as a,r as H,A as Pt,h as r,f as n,c as s,j as vt,u as G,x as d,k as wt,y as Mt,a as l,v as D,d as E,t as F,w as I}from"../chunks/index.28275fd3.js";import{T as Lt}from"../chunks/Tip.9f398c59.js";import{H as N,E as At}from"../chunks/EditOnGithub.582011f0.js";function Ht(R){let i,u='Apple Silicon support is planned for Q4 2024. We are actively seeking contributors to help implement this, develop a concrete plan, and create a detailed list of requirements. Due to limited resources, we rely on community contributions for this implementation effort. To discuss further, please spell out your thoughts and discuss in <a href="https://github.com/bitsandbytes-foundation/bitsandbytes/discussions/1340" rel="nofollow">this GitHub discussion</a> and tag <code>@Titus-von-Koeller</code> and <code>@matthewdouglas</code>. Thank you!';return{c(){i=o("p"),i.innerHTML=u},l(p){i=r(p,"P",{"data-svelte-h":!0}),d(i)!=="svelte-ztwrs6"&&(i.innerHTML=u)},m(p,U){l(p,i,U)},p:_t,d(p){p&&n(i)}}}function Gt(R){let i,u,p,U,m,O,h,ot="As part of a recent refactoring effort, we will soon offer official multi-backend support. Currently, this feature is available in a preview alpha release, allowing us to gather early feedback from users to improve the functionality and identify any bugs.",S,c,rt="At present, the Intel CPU and AMD ROCm backends are considered fully functional. The Intel XPU backend has limited functionality and is less mature.",j,b,dt='Please refer to the <a href="./installation#multi-backend">installation instructions</a> for details on installing the backend you intend to test (and hopefully provide feedback on).',q,f,z,$,X,y,pt="As we are currently in the alpha testing phase, bugs are expected, and performance might not meet expectations. However, this is exactly what we want to discover from <strong>your</strong> perspective as the end user!",Y,x,ft="Please share and discuss your feedback with us here:",K,v,ut='<li><a href="https://github.com/bitsandbytes-foundation/bitsandbytes/discussions/1339" rel="nofollow">Github Discussion: Multi-backend refactor: Alpha release ( AMD ROCm ONLY )</a></li> <li><a href="https://github.com/bitsandbytes-foundation/bitsandbytes/discussions/1338" rel="nofollow">Github Discussion: Multi-backend refactor: Alpha release ( Intel ONLY )</a></li>',Q,w,mt="Thank you for your support!",W,C,J,T,V,_,ht='The following performance data is collected from Intel 4th Gen Xeon (SPR) platform. The tables show speed-up and memory compared with different data types of <a href="https://huggingface.co/meta-llama/Llama-2-7b-chat-hf" rel="nofollow">Llama-2-7b-chat-hf</a>.',Z,g,ct="For inference:",tt,k,bt="<thead><tr><th>CPU</th> <th>BF16</th> <th>INT8</th> <th>NF4</th> <th>FP4</th></tr></thead> <tbody><tr><td>speed-up</td> <td>1.0x</td> <td>0.6x</td> <td>2.3x</td> <td>0.03x</td></tr> <tr><td>memory</td> <td>13.1G</td> <td>7.6G</td> <td>5.0G</td> <td>4.6G</td></tr></tbody>",et,P,$t="For fine-tune:",nt,M,yt="<thead><tr><th>CPU</th> <th>AMP BF16</th> <th>INT8</th> <th>NF4</th> <th>FP4</th></tr></thead> <tbody><tr><td>speed-up</td> <td>1.0x</td> <td>0.38x</td> <td>0.07x</td> <td>0.07x</td></tr> <tr><td>memory</td> <td>40G</td> <td>9G</td> <td>6.6G</td> <td>6.6G</td></tr></tbody>",lt,L,at,A,st,B,it;return m=new N({props:{title:"Multi-backend support (non-CUDA backends)",local:"multi-backend-support-non-cuda-backends",headingTag:"h1"}}),f=new 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