bitsandbytes/pr_1521/en/_app/immutable/nodes/12.f634aa83.js

import{s as Tt,o as _t,n as xt}from"../chunks/scheduler.852ec091.js";import{S as Ct,i as kt,g as r,s as l,r as u,A as Pt,h as d,f as n,c as i,j as yt,u as m,x as f,k as vt,y as Mt,a,v as h,d as c,t as $,w as b}from"../chunks/index.28275fd3.js";import{T as wt}from"../chunks/Tip.9f398c59.js";import{H as R,E as Lt}from"../chunks/EditOnGithub.582011f0.js";function At(G){let s,p="If you feel these docs need some additional info, please consider submitting a PR or respectfully request the missing info in one of the below mentioned Github discussion spaces.";return{c(){s=r("p"),s.textContent=p},l(o){s=d(o,"P",{"data-svelte-h":!0}),f(s)!=="svelte-1mb3sz"&&(s.textContent=p)},m(o,g){a(o,s,g)},p:xt,d(o){o&&n(s)}}}function Ht(G){let s,p='Apple Silicon support is planned for Q4 2024. We are actively seeking contributors to help implement this, develop a concrete plan, and create a detailed list of requirements. Due to limited resources, we rely on community contributions for this implementation effort. To discuss further, please spell out your thoughts and discuss in <a href="https://github.com/bitsandbytes-foundation/bitsandbytes/discussions/1340" rel="nofollow">this GitHub discussion</a> and tag <code>@Titus-von-Koeller</code> and <code>@matthewdouglas</code>. Thank you!';return{c(){s=r("p"),s.innerHTML=p},l(o){s=d(o,"P",{"data-svelte-h":!0}),f(s)!=="svelte-ztwrs6"&&(s.innerHTML=p)},m(o,g){a(o,s,g)},p:xt,d(o){o&&n(s)}}}function Ut(G){let s,p,o,g,w,z,y,N,x,ot="As part of a recent refactoring effort, we will soon offer official multi-backend support. Currently, this feature is available in a preview alpha release, allowing us to gather early feedback from users to improve the functionality and identify any bugs.",q,T,rt="At present, the Intel CPU and AMD ROCm backends are considered fully functional. The Intel XPU backend has limited functionality and is less mature.",O,_,dt='Please refer to the <a href="./installation#multi-backend">installation instructions</a> for details on installing the backend you intend to test (and hopefully provide feedback on).',j,v,X,C,Y,k,ft="As we are currently in the alpha testing phase, bugs are expected, and performance might not meet expectations. However, this is exactly what we want to discover from <strong>your</strong> perspective as the end user!",K,P,pt="Please share and discuss your feedback with us here:",Q,M,ut='<li><a href="https://github.com/bitsandbytes-foundation/bitsandbytes/discussions/1339" rel="nofollow">Github Discussion: Multi-backend refactor: Alpha release ( AMD ROCm ONLY )</a></li> <li><a href="https://github.com/bitsandbytes-foundation/bitsandbytes/discussions/1338" rel="nofollow">Github Discussion: Multi-backend refactor: Alpha release ( Intel ONLY )</a></li>',W,L,mt="Thank you for your support!",J,A,V,H,Z,U,ht='The following performance data is collected from Intel 4th Gen Xeon (SPR) platform. The tables show speed-up and memory compared with different data types of <a href="https://huggingface.co/meta-llama/Llama-2-7b-chat-hf" rel="nofollow">Llama-2-7b-chat-hf</a>.',tt,I,et,B,ct="<thead><tr><th>Data Type</th> <th>BF16</th> <th>INT8</th> <th>NF4</th> <th>FP4</th></tr></thead> <tbody><tr><td>Speed-Up (vs BF16)</td> <td>1.0x</td> <td>0.6x</td> <td>2.3x</td> <td>0.03x</td></tr> <tr><td>Memory (GB)</td> <td>13.1</td> <td>7.6</td> <td>5.0</td> <td>4.6</td></tr></tbody>",nt,F,at,D,$t="<thead><tr><th>Data Type</th> <th>AMP BF16</th> <th>INT8</th> <th>NF4</th> <th>FP4</th></tr></thead> <tbody><tr><td>Speed-Up (vs AMP BF16)</td> <td>1.0x</td> <td>0.38x</td> <td>0.07x</td> <td>0.07x</td></tr> <tr><td>Memory (GB)</td> <td>40</td> <td>9</td> <td>6.6</td> <td>6.6</td></tr></tbody>",st,E,lt,S,it;return w=new R({props:{title:"Multi-backend support (non-CUDA backends)",local:"multi-backend-support-non-cuda-backends",headingTag:"h1"}}),y=new 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