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be903e2 | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | // Tencent is pleased to support the open source community by making ncnn available.
//
// Copyright (C) 2022 THL A29 Limited, a Tencent company. All rights reserved.
//
// Licensed under the BSD 3-Clause License (the "License"); you may not use this file except
// in compliance with the License. You may obtain a copy of the License at
//
// https://opensource.org/licenses/BSD-3-Clause
//
// Unless required by applicable law or agreed to in writing, software distributed
// under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See the License for the
// specific language governing permissions and limitations under the License.
#include "batchnorm_mips.h"
#if __mips_msa
#include <msa.h>
#endif // __mips_msa
#include "mips_usability.h"
namespace ncnn {
BatchNorm_mips::BatchNorm_mips()
{
#if __mips_msa
support_packing = true;
#endif // __mips_msa
}
int BatchNorm_mips::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
int dims = bottom_top_blob.dims;
int elempack = bottom_top_blob.elempack;
if (dims == 1)
{
int w = bottom_top_blob.w * elempack;
#if __mips_msa
int nn_w = w / 4;
int remain_w_start = nn_w * 4;
#else
int remain_w_start = 0;
#endif // __mips_msa
float* ptr = bottom_top_blob;
#if __mips_msa
#pragma omp parallel for num_threads(opt.num_threads)
for (int i = 0; i < nn_w; i++)
{
float* ptr0 = ptr + i * 4;
v4f32 _p = (v4f32)__msa_ld_w(ptr0, 0);
v4f32 _a = (v4f32)__msa_ld_w((const float*)a_data + i * 4, 0);
v4f32 _b = (v4f32)__msa_ld_w((const float*)b_data + i * 4, 0);
_p = __msa_fmadd_w(_a, _p, _b);
__msa_st_w((v4i32)_p, ptr0, 0);
}
#endif // __mips_msa
#pragma omp parallel for num_threads(opt.num_threads)
for (int i = remain_w_start; i < w; i++)
{
ptr[i] = b_data[i] * ptr[i] + a_data[i];
}
}
if (dims == 2)
{
int w = bottom_top_blob.w * elempack;
int h = bottom_top_blob.h;
#pragma omp parallel for num_threads(opt.num_threads)
for (int i = 0; i < h; i++)
{
float* ptr = bottom_top_blob.row(i);
float a = a_data[i];
float b = b_data[i];
int j = 0;
#if __mips_msa
v4f32 _a = elempack == 4 ? (v4f32)__msa_ld_w((const float*)a_data + i * 4, 0) : (v4f32)__msa_fill_w_f32(a);
v4f32 _b = elempack == 4 ? (v4f32)__msa_ld_w((const float*)b_data + i * 4, 0) : (v4f32)__msa_fill_w_f32(b);
for (; j + 3 < w; j += 4)
{
__builtin_prefetch(ptr + 16);
v4f32 _p = (v4f32)__msa_ld_w(ptr, 0);
_p = __msa_fmadd_w(_a, _p, _b);
__msa_st_w((v4i32)_p, ptr, 0);
ptr += 4;
}
#endif // __mips_msa
for (; j < w; j++)
{
*ptr = b * *ptr + a;
ptr++;
}
}
}
if (dims == 3 || dims == 4)
{
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int c = bottom_top_blob.c;
int size = w * h * d * elempack;
#pragma omp parallel for num_threads(opt.num_threads)
for (int q = 0; q < c; q++)
{
float* ptr = bottom_top_blob.channel(q);
float a = a_data[q];
float b = b_data[q];
int i = 0;
#if __mips_msa
v4f32 _a = elempack == 4 ? (v4f32)__msa_ld_w((const float*)a_data + q * 4, 0) : (v4f32)__msa_fill_w_f32(a);
v4f32 _b = elempack == 4 ? (v4f32)__msa_ld_w((const float*)b_data + q * 4, 0) : (v4f32)__msa_fill_w_f32(b);
for (; i + 3 < size; i += 4)
{
__builtin_prefetch(ptr + 16);
v4f32 _p = (v4f32)__msa_ld_w(ptr, 0);
_p = __msa_fmadd_w(_a, _p, _b);
__msa_st_w((v4i32)_p, ptr, 0);
ptr += 4;
}
#endif // __mips_msa
for (; i < size; i++)
{
*ptr = b * *ptr + a;
ptr++;
}
}
}
return 0;
}
} // namespace ncnn
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