{
  "a_bits": 4,
  "a_groupsize": -1,
  "a_asym": false,
  "w_bits": 4,
  "w_groupsize": -1,
  "w_asym": false,
  "gptq": false,
  "lwc": true,
  "lac": true,
  "add_diag": true,
  "cali_trans": true,
  "direct_inv": false,
  "diag_init": "sq_style",
  "separate_vtrans": false,
  "q_bits": 16,
  "k_bits": 4,
  "k_asym": true,
  "k_groupsize": 128,
  "v_bits": 4,
  "v_asym": true,
  "v_groupsize": 128
}