|
|
{ |
|
|
"train": {}, |
|
|
"test": { |
|
|
"printed circuit board": [ |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_1.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_10.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_11.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_12.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_13.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_14.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_15.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_16.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_17.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_18.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_19.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_2.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_20.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_21.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_22.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_23.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_24.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_25.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_26.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_27.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_28.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_29.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_3.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_30.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_31.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_32.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_33.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_34.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_35.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_36.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_37.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_38.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_39.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_4.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_40.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_5.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_6.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_7.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_8.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Afternoon + AWB_Normal_9.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_1.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_10.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_11.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_12.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_13.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_14.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_15.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_16.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_17.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_18.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_19.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_2.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_20.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_21.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_22.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_23.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_24.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_25.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_26.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_27.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_28.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_29.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_3.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_30.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_31.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_32.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_33.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_34.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_35.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_36.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_37.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_38.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_39.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_4.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_40.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_5.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_6.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_7.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_8.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Evening + AWB_Normal_9.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_1.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_10.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_11.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_12.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_13.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_14.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_15.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_16.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_17.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_18.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_19.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_2.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_20.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_21.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_22.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_23.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_24.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_25.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_26.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_27.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_28.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_29.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_3.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_30.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_31.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_32.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_33.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_34.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_35.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_36.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_37.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_38.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_39.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_4.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_40.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_5.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_6.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_7.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_8.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/normal/Test_PCB_White Balancing_Morning + AWB_Normal_9.jpg", |
|
|
"mask_path": "", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "good", |
|
|
"anomaly": 0 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_1.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_1.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_10.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_10.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_2.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_2.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_3.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_3.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_4.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_4.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_5.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_5.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_6.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_6.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_7.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_7.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_8.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_8.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Scratch_9.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Scratch_9.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_1.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_1.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_10.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_10.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_2.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_2.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_3.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_3.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_4.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_4.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_5.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_5.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_6.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_6.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_7.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_7.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_8.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_8.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_9.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Afternoon + AWB_Soldering Melt_9.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_1.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_1.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_10.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_10.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_2.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_2.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_3.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_3.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_4.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_4.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_5.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_5.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_6.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_6.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_7.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_7.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_8.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_8.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Scratch_9.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Scratch_9.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_1.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_1.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_10.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_10.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_2.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_2.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_3.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_3.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_4.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_4.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_5.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_5.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_6.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_6.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_7.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_7.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_8.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_8.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_9.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Evening + AWB_Soldering Melt_9.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_1.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_1.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_10.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_10.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_2.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_2.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_3.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_3.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_4.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_4.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_5.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_5.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_6.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_6.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_7.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_7.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_8.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_8.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Scratch_9.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Scratch_9.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "scratch", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_1.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_1.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_10.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_10.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_2.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_2.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_3.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_3.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_4.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_4.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_5.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_5.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_6.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_6.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_7.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_7.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_8.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_8.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
}, |
|
|
{ |
|
|
"img_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/anomaly/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_9.jpg", |
|
|
"mask_path": "/efs/lyra/user/lppemula/pcb_data_dir_test2/new_masks/Test_PCB_White Balancing_Morning + AWB_Soldering Melt_9.png", |
|
|
"cls_name": "printed circuit board", |
|
|
"specie_name": "soldering melt", |
|
|
"anomaly": 1 |
|
|
} |
|
|
] |
|
|
} |
|
|
} |
|
|
|