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---

title: ascad-v2-1
tags:
- side-channel-analysis
- cryptography
- DLSCA
parameters:
  HF_ORG: DLSCA
  CHUNK_SIZE_Y: 50000
  CHUNK_SIZE_X: 200
  TOTAL_CHUNKS_ON_Y: 2
  TOTAL_CHUNKS_ON_X: 5000
  NUM_JOBS: 10
  CAN_RUN_LOCALLY: True
  CAN_RUN_ON_CLOUD: False
  COMPRESSED: True
---


# ascad-v2-1

This script downloads, extracts, and uploads the optimized ASCAD v2 (1-100k traces) dataset to Hugging Face Hub.

## Dataset Structure

This dataset is stored in Zarr format, optimized for chunked and compressed cloud storage.

### Traces (`/traces`)
- **Shape**: `[100000, 1000000]` (Traces x Time Samples)
- **Data Type**: `int8`
- **Chunk Shape**: `[50000, 200]`

### Metadata (`/metadata`)
- **ciphertext**: shape `[100000, 16]`, dtype `uint8`
- **key**: shape `[100000, 16]`, dtype `uint8`
- **mask**: shape `[100000, 16]`, dtype `uint8`
- **mask_**: shape `[100000, 16]`, dtype `uint8`

- **plaintext**: shape `[100000, 16]`, dtype `uint8`

- **rin**: shape `[100000, 1]`, dtype `uint8`

- **rin_**: shape `[100000, 1]`, dtype `uint8`
- **rm**: shape `[100000, 1]`, dtype `uint8`
- **rm_**: shape `[100000, 1]`, dtype `uint8`

- **rout**: shape `[100000, 1]`, dtype `uint8`

- **rout_**: shape `[100000, 1]`, dtype `uint8`

## Auto-Generated Leakage Plots and Targets

| Dataset | Target | Byte Index | Description | Plot | Zoomed Plot |
| :--- | :--- | :---: | :--- | :---: | :---: |
| ascad-v2-1 | `ciphertext` | 0 | Raw ciphertext byte at position ``byte_index``.<br><br>``ciphertext[i]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_ciphertext_0.png" alt="ascad-v2-1 ciphertext" width="400"/> | <img src="plots/ascad_v2_1_ciphertext_0_zoomed.png" alt="Zoomed ciphertext" width="250"/> |
| ascad-v2-1 | `key` | 0 | Raw key byte at position ``byte_index``.<br><br>``key[i]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_key_0.png" alt="ascad-v2-1 key" width="400"/> | <img src="plots/ascad_v2_1_key_0_zoomed.png" alt="Zoomed key" width="250"/> |
| ascad-v2-1 | `mask` | 0 | Raw per-byte mask at position ``byte_index``.<br><br>``mask[i]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_mask_0.png" alt="ascad-v2-1 mask" width="400"/> | <img src="plots/ascad_v2_1_mask_0_zoomed.png" alt="Zoomed mask" width="250"/> |
| ascad-v2-1 | `mask_` | 0 | Raw per-byte mask for second S-box pass at position ``byte_index``.<br><br>``mask_[i]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_mask__0.png" alt="ascad-v2-1 mask_" width="400"/> | <img src="plots/ascad_v2_1_mask__0_zoomed.png" alt="Zoomed mask_" width="250"/> |
| ascad-v2-1 | `plaintext` | 0 | Raw plaintext byte at position ``byte_index``.<br><br>``plaintext[i]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_plaintext_0.png" alt="ascad-v2-1 plaintext" width="400"/> | <img src="plots/ascad_v2_1_plaintext_0_zoomed.png" alt="Zoomed plaintext" width="250"/> |
| ascad-v2-1 | `sbi` | 0 | Unmasked S-Box Input (SBI) at AES byte position ``byte_index``.<br><br>``ptx[i] ^ key[i]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_sbi_0.png" alt="ascad-v2-1 sbi" width="400"/> | - |
| ascad-v2-1 | `sbo` | 0 | Unmasked S-Box Output (SBO) at AES byte position ``byte_index``.<br><br>``SBOX[ptx[i] ^ key[i]]``  where  ``i = byte_index``. | <img src="plots/ascad_v2_1_sbo_0.png" alt="ascad-v2-1 sbo" width="400"/> | - |
| ascad-v2-1 | `v2_affine_ptx` | 0 | State after Map_in_G + Xor_states at slot ``byte_index``.<br><br>``rm * ptx[j] ^ mask[j]``  where  ``j = perm[byte_index]``.<br><br>The affine-masked plaintext before any round key has been mixed in. | <img src="plots/ascad_v2_1_v2_affine_ptx_0.png" alt="ascad-v2-1 v2_affine_ptx" width="400"/> | <img src="plots/ascad_v2_1_v2_affine_ptx_0_zoomed.png" alt="Zoomed v2_affine_ptx" width="250"/> |
| ascad-v2-1 | `v2_hd_address_bus_transition` | 0 | HD between the LUT index of the current time slot and the previous time slot. Models the physical Address Bus bit-flips during the tight SubBytes loop.<br><br>``HD(LUT_idx[i], LUT_idx[i-1])`` where ``i = byte_index``. | <img src="plots/ascad_v2_1_v2_hd_address_bus_transition_0.png" alt="ascad-v2-1 v2_hd_address_bus_transition" width="400"/> | - |
| ascad-v2-1 | `v2_hd_affine_sbi` | 0 | HD between affine plaintext and masked SBI.<br><br>``HD(rm*ptx[j]^mask[j], rm*(ptx[j]^key[j])^mask[j])`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_affine_sbi_0.png" alt="ascad-v2-1 v2_hd_affine_sbi" width="400"/> | - |
| ascad-v2-1 | `v2_hd_ark_operands` | 0 | HD between the two operands entering the ALU during AddRoundKey r=0. HD(rmult * ptx[j] ^ mask[j], rmult * key[j]) | <img src="plots/ascad_v2_1_v2_hd_ark_operands_0.png" alt="ascad-v2-1 v2_hd_ark_operands" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_ark_operands_0_zoomed.png" alt="Zoomed v2_hd_ark_operands" width="250"/> |
| ascad-v2-1 | `v2_hd_ark_overwrite` | 0 | HD modelling the ALU writing the AddRoundKey result back over the scaled key register. HD(rmult * key[j], rmult * (ptx[j] ^ key[j]) ^ mask[j]) | <img src="plots/ascad_v2_1_v2_hd_ark_overwrite_0.png" alt="ascad-v2-1 v2_hd_ark_overwrite" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_ark_overwrite_0_zoomed.png" alt="Zoomed v2_hd_ark_overwrite" width="250"/> |
| ascad-v2-1 | `v2_hd_lut_idx_to_raw_out` | 0 | Models the register transition from LUT address to LUT value during SubBytes.<br><br>``HD(rm*x ^ rin, rm*SBOX(x) ^ rout)`` where ``x = ptx[j]^key[j]`` and ``j = perm[byte_index]``. This models the CPU register replacing the computed sboxMasked memory address (LUT key) with the fetched value (LUT value). | <img src="plots/ascad_v2_1_v2_hd_lut_idx_to_raw_out_0.png" alt="ascad-v2-1 v2_hd_lut_idx_to_raw_out" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_lut_idx_to_raw_out_0_zoomed.png" alt="Zoomed v2_hd_lut_idx_to_raw_out" width="250"/> |
| ascad-v2-1 | `v2_hd_lut_transition` | 0 | HD between LUT index and LUT output.<br><br>``HD(rm*(ptx[j]^key[j])^rin, rm*SBOX(ptx[j]^key[j])^rout)`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_lut_transition_0.png" alt="ascad-v2-1 v2_hd_lut_transition" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_lut_transition_0_zoomed.png" alt="Zoomed v2_hd_lut_transition" width="250"/> |
| ascad-v2-1 | `v2_hd_map_in_g_overwrite` | 0 | Models the STM32 register overwriting the raw plaintext with the output of the GTab lookup.<br><br>``HD(ptx[j], rm * ptx[j])`` where ``j = perm[byte_index]``. Brilliant for isolating the alpha mask independently of the key. | <img src="plots/ascad_v2_1_v2_hd_map_in_g_overwrite_0.png" alt="ascad-v2-1 v2_hd_map_in_g_overwrite" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_map_in_g_overwrite_0_zoomed.png" alt="Zoomed v2_hd_map_in_g_overwrite" width="250"/> |
| ascad-v2-1 | `v2_hd_mask_interaction` | 0 | HD between mask[j] and rin where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_mask_interaction_0.png" alt="ascad-v2-1 v2_hd_mask_interaction" width="400"/> | - |
| ascad-v2-1 | `v2_hd_perm_g4_cascade` | 0 | HD between Step 1 and Step 2 of the permutation cascade.<br><br>``HD( G[(15-i)^m0], G[G[(15-i)^m0]^m1] )`` where ``i=byte_index``, ``m0=mask[0]&0xF``, ``m1=mask[1]&0xF``. Models the register holding the intermediate index as it updates from m0-influence to m1-influence. | <img src="plots/ascad_v2_1_v2_hd_perm_g4_cascade_0.png" alt="ascad-v2-1 v2_hd_perm_g4_cascade" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_perm_g4_cascade_0_zoomed.png" alt="Zoomed v2_hd_perm_g4_cascade" width="250"/> |
| ascad-v2-1 | `v2_hd_ptx_key` | 0 | HD between rm*ptx[j] and rm*key[j] where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_ptx_key_0.png" alt="ascad-v2-1 v2_hd_ptx_key" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_ptx_key_0_zoomed.png" alt="Zoomed v2_hd_ptx_key" width="250"/> |
| ascad-v2-1 | `v2_hd_ptx_sbi` | 0 | HD between the unmasked plaintext and the unmasked SBI.<br><br>``HD(ptx[j], ptx[j] ^ key[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_ptx_sbi_0.png" alt="ascad-v2-1 v2_hd_ptx_sbi" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_ptx_sbi_0_zoomed.png" alt="Zoomed v2_hd_ptx_sbi" width="250"/> |
| ascad-v2-1 | `v2_hd_rm_rm_sbi` | 0 | HD(rm, rm * (ptx[j] ^ key[j])) where j = perm[byte_index]. Models the hardware register transition from the multiplicative mask to the multiplicatively masked SBI. | <img src="plots/ascad_v2_1_v2_hd_rm_rm_sbi_0.png" alt="ascad-v2-1 v2_hd_rm_rm_sbi" width="400"/> | - |

| ascad-v2-1 | `v2_hd_rout_mask_interaction` | 0 | Hamming distance between the global rout mask and the per-byte mask.<br><br>``HD(rout, mask[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_rout_mask_interaction_0.png" alt="ascad-v2-1 v2_hd_rout_mask_interaction" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_rout_mask_interaction_0_zoomed.png" alt="Zoomed v2_hd_rout_mask_interaction" width="250"/> |
| ascad-v2-1 | `v2_hd_rout_raw_out` | 0 | HD(rout, rm * SBOX(ptx[j] ^ key[j]) ^ rout) where j = perm[byte_index]. Models the transition between the global output mask and the raw LUT output. | <img src="plots/ascad_v2_1_v2_hd_rout_raw_out_0.png" alt="ascad-v2-1 v2_hd_rout_raw_out" width="400"/> | - |

| ascad-v2-1 | `v2_hd_rout_sbo_mid` | 0 | HD(rout, rm * SBOX(ptx[j] ^ key[j]) ^ rout ^ mask[j]) where j = perm[byte_index]. Models the transition from the global output mask to the state inside the SubBytes inner loop  after the per-byte mask has been added, but before rout is stripped. | <img src="plots/ascad_v2_1_v2_hd_rout_sbo_mid_0.png" alt="ascad-v2-1 v2_hd_rout_sbo_mid" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_rout_sbo_mid_0_zoomed.png" alt="Zoomed v2_hd_rout_sbo_mid" width="250"/> |
| ascad-v2-1 | `v2_hd_sbi` | 0 | Hamming distance between masked plaintext and masked SBI.<br><br>``HD(rm * ptx[j] ^ mask[j], rm * (ptx[j] ^ key[j]) ^ mask[j])`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_sbi_0.png" alt="ascad-v2-1 v2_hd_sbi" width="400"/> | - |
| ascad-v2-1 | `v2_hd_sbi_sbo` | 0 | HD between the unmasked SBI and unmasked SBO.<br><br>``HD(ptx[j] ^ key[j], SBOX(ptx[j] ^ key[j]))``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_sbi_sbo_0.png" alt="ascad-v2-1 v2_hd_sbi_sbo" width="400"/> | - |
| ascad-v2-1 | `v2_hd_sbo_affine_mc` | 0 | HD between the affine SBO and the masked MixColumns output.<br><br>``HD(rm*SBOX(ptx[j]^key[j])^mask[j], MixColumns(...)[j])`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_sbo_affine_mc_0.png" alt="ascad-v2-1 v2_hd_sbo_affine_mc" width="400"/> | - |
| ascad-v2-1 | `v2_hd_unmasking_division` | 0 | Models the final GF256 division at the end of Round 10.<br><br>``HD(rm * ciphertext[i], ciphertext[i])`` where ``i = byte_index``. Allows reconstruction of the alpha mask from the ciphertext side, completely bypassing R1 noise. | <img src="plots/ascad_v2_1_v2_hd_unmasking_division_0.png" alt="ascad-v2-1 v2_hd_unmasking_division" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_unmasking_division_0_zoomed.png" alt="Zoomed v2_hd_unmasking_division" width="250"/> |
| ascad-v2-1 | `v2_hd_xor_states_injection` | 0 | Models the ALU applying the additive per-byte mask to the scaled plaintext.<br><br>``HD(rm * ptx[j], rm * ptx[j] ^ mask[j])`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_xor_states_injection_0.png" alt="ascad-v2-1 v2_hd_xor_states_injection" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_xor_states_injection_0_zoomed.png" alt="Zoomed v2_hd_xor_states_injection" width="250"/> |
| ascad-v2-1 | `v2_hd_xw_lut_idx` | 0 | HD between the pre-LUT state (Xor_Word applied) and the LUT index.<br><br>``HD(rm*(ptx[j]^key[j])^mask[j]^rin, rm*(ptx[j]^key[j])^rin)`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hd_xw_lut_idx_0.png" alt="ascad-v2-1 v2_hd_xw_lut_idx" width="400"/> | <img src="plots/ascad_v2_1_v2_hd_xw_lut_idx_0_zoomed.png" alt="Zoomed v2_hd_xw_lut_idx" width="250"/> |
| ascad-v2-1 | `v2_hw_affine_ptx` | 0 | HW of the affine-masked plaintext.<br><br>``HW(rm * ptx[j] ^ mask[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_affine_ptx_0.png" alt="ascad-v2-1 v2_hw_affine_ptx" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_affine_ptx_0_zoomed.png" alt="Zoomed v2_hw_affine_ptx" width="250"/> |
| ascad-v2-1 | `v2_hw_key` | 0 | HW of the key byte at the permuted AES position.<br><br>``HW(key[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_key_0.png" alt="ascad-v2-1 v2_hw_key" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_key_0_zoomed.png" alt="Zoomed v2_hw_key" width="250"/> |
| ascad-v2-1 | `v2_hw_lut_idx` | 0 | HW of the sboxMasked LUT index.<br><br>``HW(rm * (ptx[j] ^ key[j]) ^ rin)``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_lut_idx_0.png" alt="ascad-v2-1 v2_hw_lut_idx" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_lut_idx_0_zoomed.png" alt="Zoomed v2_hw_lut_idx" width="250"/> |
| ascad-v2-1 | `v2_hw_mask` | 0 | HW of the per-byte additive mask.<br><br>``HW(mask[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_mask_0.png" alt="ascad-v2-1 v2_hw_mask" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_mask_0_zoomed.png" alt="Zoomed v2_hw_mask" width="250"/> |
| ascad-v2-1 | `v2_hw_masked_sbi` | 0 | HW of the affine-masked SBI entering round 1.<br><br>``HW(rm * (ptx[j] ^ key[j]) ^ mask[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_masked_sbi_0.png" alt="ascad-v2-1 v2_hw_masked_sbi" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_masked_sbi_0_zoomed.png" alt="Zoomed v2_hw_masked_sbi" width="250"/> |
| ascad-v2-1 | `v2_hw_mc_parity_accumulator` | 0 | HW of the MixColumns intermediate 't' variable (the affine column parity). t = a0 ^ a1 ^ a2 ^ a3 | <img src="plots/ascad_v2_1_v2_hw_mc_parity_accumulator_0.png" alt="ascad-v2-1 v2_hw_mc_parity_accumulator" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_mc_parity_accumulator_0_zoomed.png" alt="Zoomed v2_hw_mc_parity_accumulator" width="250"/> |
| ascad-v2-1 | `v2_hw_mixcolumns_masked` | 0 | HW of the affine-masked MixColumns output.<br><br>``HW(MixColumns(ShiftRows(rm * SBOX(ptx ^ key) ^ mask))[j])`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_mixcolumns_masked_0.png" alt="ascad-v2-1 v2_hw_mixcolumns_masked" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_mixcolumns_masked_0_zoomed.png" alt="Zoomed v2_hw_mixcolumns_masked" width="250"/> |
| ascad-v2-1 | `v2_hw_perm_g4_step1` | 0 | HW of the first step of the perm_index generation.<br><br>``HW(G[ (15-i) ^ m0 ])`` where ``i=byte_index`` and ``m0=mask[0]&0xF``. Targets the lookup G[ (15-i) ^ m0 ], effectively isolating the m0 nibble. | <img src="plots/ascad_v2_1_v2_hw_perm_g4_step1_0.png" alt="ascad-v2-1 v2_hw_perm_g4_step1" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_perm_g4_step1_0_zoomed.png" alt="Zoomed v2_hw_perm_g4_step1" width="250"/> |
| ascad-v2-1 | `v2_hw_ptx` | 0 | HW of plaintext at the permuted AES position.<br><br>``HW(ptx[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_ptx_0.png" alt="ascad-v2-1 v2_hw_ptx" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_ptx_0_zoomed.png" alt="Zoomed v2_hw_ptx" width="250"/> |
| ascad-v2-1 | `v2_hw_raw_out` | 0 | HW of the sboxMasked LUT output.<br><br>``HW(rm * SBOX(ptx[j] ^ key[j]) ^ rout)``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_raw_out_0.png" alt="ascad-v2-1 v2_hw_raw_out" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_raw_out_0_zoomed.png" alt="Zoomed v2_hw_raw_out" width="250"/> |
| ascad-v2-1 | `v2_hw_rm_key` | 0 | HW of the multiplicatively masked key byte.<br><br>``HW(rm * key[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_rm_key_0.png" alt="ascad-v2-1 v2_hw_rm_key" width="400"/> | - |
| ascad-v2-1 | `v2_hw_rm_ptx` | 0 | HW of the Map_in_G output (multiplicatively masked plaintext).<br><br>``HW(rm * ptx[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_rm_ptx_0.png" alt="ascad-v2-1 v2_hw_rm_ptx" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_rm_ptx_0_zoomed.png" alt="Zoomed v2_hw_rm_ptx" width="250"/> |
| ascad-v2-1 | `v2_hw_sbi` | 0 | HW of the unmasked SBI at the permuted AES position.<br><br>``HW(ptx[j] ^ key[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_sbi_0.png" alt="ascad-v2-1 v2_hw_sbi" width="400"/> | - |
| ascad-v2-1 | `v2_hw_sbo` | 0 | HW of the unmasked SBO at the permuted AES position.<br><br>``HW(SBOX(ptx[j] ^ key[j]))``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_sbo_0.png" alt="ascad-v2-1 v2_hw_sbo" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_sbo_0_zoomed.png" alt="Zoomed v2_hw_sbo" width="250"/> |
| ascad-v2-1 | `v2_hw_sbo_affine` | 0 | HW of the post-SubBytes affine state.<br><br>``HW(rm * SBOX(ptx[j] ^ key[j]) ^ mask[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_sbo_affine_0.png" alt="ascad-v2-1 v2_hw_sbo_affine" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_sbo_affine_0_zoomed.png" alt="Zoomed v2_hw_sbo_affine" width="250"/> |
| ascad-v2-1 | `v2_hw_sbo_mid` | 0 | HW of the mid-SubBytes state (rout and per-byte mask applied).<br><br>``HW(rm * SBOX(ptx[j] ^ key[j]) ^ rout ^ mask[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_hw_sbo_mid_0.png" alt="ascad-v2-1 v2_hw_sbo_mid" width="400"/> | <img src="plots/ascad_v2_1_v2_hw_sbo_mid_0_zoomed.png" alt="Zoomed v2_hw_sbo_mid" width="250"/> |
| ascad-v2-1 | `v2_key` | 0 | Plain key byte at the AES position consumed by shuffling slot ``byte_index``.<br><br>``key[j]``  where  ``j = perm[byte_index]``.<br><br>The key byte is loaded unprotected from flash/ROM during AddRoundKey r=0 before being scaled into the GF(256) domain via ``gtab``.  Classic first-order DPA target; ``v2_rm_key`` is the masked (GF-scaled) version. | <img src="plots/ascad_v2_1_v2_key_0.png" alt="ascad-v2-1 v2_key" width="400"/> | - |
| ascad-v2-1 | `v2_lut_idx` | 0 | sboxMasked LUT index computed during SubBytes at round 1, slot ``byte_index``.<br><br>``rm * (ptx[j] ^ key[j]) ^ rin``  where  ``j = perm[byte_index]``.<br><br>Computed as ``state[j] ^ state2[j]`` inside the SubBytes loop: the additive masks (masksState) cancel, leaving only the multiplicatively-masked SBI XORed with rin.  This is the value whose hamming weight leaks during the LUT address computation. | <img src="plots/ascad_v2_1_v2_lut_idx_0.png" alt="ascad-v2-1 v2_lut_idx" width="400"/> | <img src="plots/ascad_v2_1_v2_lut_idx_0_zoomed.png" alt="Zoomed v2_lut_idx" width="250"/> |
| ascad-v2-1 | `v2_mask_at_perm` | 0 | Per-byte additive mask at the AES position consumed by shuffling slot ``byte_index``.<br><br>``mask[j]``  where  ``j = perm[byte_index]``.<br><br>Distinct from ``mask[byte_index]`` whenever the permutation is non-identity. This is the mask that enters and leaves every intermediate in the affine invariant for slot ``byte_index``. | <img src="plots/ascad_v2_1_v2_mask_at_perm_0.png" alt="ascad-v2-1 v2_mask_at_perm" width="400"/> | <img src="plots/ascad_v2_1_v2_mask_at_perm_0_zoomed.png" alt="Zoomed v2_mask_at_perm" width="250"/> |
| ascad-v2-1 | `v2_masked_key_affine` | 0 | Key contribution after both multiplicative and additive masking.<br><br>``rm * key[j] ^ mask[j]``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_masked_key_affine_0.png" alt="ascad-v2-1 v2_masked_key_affine" width="400"/> | - |
| ascad-v2-1 | `v2_masked_sbi` | 0 | State entering round 1 at slot ``byte_index``: after AddRoundKey r=0.<br><br>``rm * (ptx[j] ^ key[j]) ^ mask[j]``  where  ``j = perm[byte_index]``.<br><br>This is the affine-masked plaintext XOR key value that the round-1 SubBytes call will process. | <img src="plots/ascad_v2_1_v2_masked_sbi_0.png" alt="ascad-v2-1 v2_masked_sbi" width="400"/> | <img src="plots/ascad_v2_1_v2_masked_sbi_0_zoomed.png" alt="Zoomed v2_masked_sbi" width="250"/> |
| ascad-v2-1 | `v2_mixcolumns_masked` | 0 | Output of MixColumns with affine masks still applied.<br><br>``MixColumns(ShiftRows(rm * SBOX(ptx ^ key) ^ mask))[j]`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_mixcolumns_masked_0.png" alt="ascad-v2-1 v2_mixcolumns_masked" width="400"/> | <img src="plots/ascad_v2_1_v2_mixcolumns_masked_0_zoomed.png" alt="Zoomed v2_mixcolumns_masked" width="250"/> |
| ascad-v2-1 | `v2_perm` | 0 | Shuffling permutation index at slot ``byte_index`` for ASCAD v2.<br><br>Returns ``j = perm[:, byte_index]`` — for each trace the AES byte position (0–15) processed in shuffling slot ``byte_index``.  All other slot-indexed ``v2_*`` targets derive ``j`` via this method.<br><br>**Original-paper label:** ``perm_index[byte_index]`` in the ASCAD v2 HDF5 file.  Derived as:<br><br>  perm[n, i] = G[G[G[G[(15 - i) XOR x0[n]] XOR x1[n]] XOR x2[n]] XOR x3[n]]<br><br>where G = ``_V2_PERM_G`` and x0..x3 are the lower nibbles of mask[:, 0..3]. | <img src="plots/ascad_v2_1_v2_perm_0.png" alt="ascad-v2-1 v2_perm" width="400"/> | <img src="plots/ascad_v2_1_v2_perm_0_zoomed.png" alt="Zoomed v2_perm" width="250"/> |
| ascad-v2-1 | `v2_ptx` | 0 | Plaintext byte at the AES position consumed by shuffling slot ``byte_index``.<br><br>``ptx[j]``  where  ``j = perm[byte_index]``.<br><br>The byte value loaded from the plaintext register before ``Map_in_G`` scales it into the GF(256) multiplicative domain.  Classic first-order DPA target; ``v2_rm_ptx`` is the masked version after Map_in_G. | <img src="plots/ascad_v2_1_v2_ptx_0.png" alt="ascad-v2-1 v2_ptx" width="400"/> | - |
| ascad-v2-1 | `v2_raw_out` | 0 | SubBytes ``raw_out`` at round 1, slot ``byte_index``: the sboxMasked LUT output.<br><br>``rm * SBOX(ptx[j] ^ key[j]) ^ rout``  where  ``j = perm[byte_index]``.<br><br>This is ``sboxMasked[lut_idx]`` — the value read from the firmware's masked S-Box LUT before it is XORed with ``state2[j]`` (masksState). It sits between :meth:`v2_lut_idx` (the LUT address) and :meth:`v2_sbo_mid` (the value written back into ``state[j]``).<br><br>**Original-paper label:** ``sbox_masked[byte_index]`` in the ASCAD v2 HDF5 file and the NCC Group ML-104 blog 34-task model. | <img src="plots/ascad_v2_1_v2_raw_out_0.png" alt="ascad-v2-1 v2_raw_out" width="400"/> | <img src="plots/ascad_v2_1_v2_raw_out_0_zoomed.png" alt="Zoomed v2_raw_out" width="250"/> |
| ascad-v2-1 | `v2_raw_out_direct` | 0 | SubBytes ``raw_out`` at round 1 indexed directly by AES byte position.<br><br>``rm * SBOX(ptx[i] ^ key[i]) ^ rout``  where  ``i = byte_index`` (no perm).<br><br>Unlike :meth:`v2_raw_out`, the shuffle permutation is **not** applied — ``byte_index`` maps directly to the AES state byte position.  This is the same formula as :meth:`v2_raw_out` but over the identity byte ordering, making it practical as an un-permuted SNR or model target.<br><br>**Original-paper label:** ``sbox_masked_with_perm[byte_index]`` in the ASCAD v2 HDF5 file and the NCC Group ML-104 blog 18-task model (``RMmSBOxROUT`` in scandal/crypto.py). | <img src="plots/ascad_v2_1_v2_raw_out_direct_0.png" alt="ascad-v2-1 v2_raw_out_direct" width="400"/> | - |
| ascad-v2-1 | `v2_rin_mask_interaction` | 0 | Interaction between global input mask and per-byte mask.<br><br>``rin ^ mask[j]``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_rin_mask_interaction_0.png" alt="ascad-v2-1 v2_rin_mask_interaction" width="400"/> | - |
| ascad-v2-1 | `v2_rm_key` | 0 | Masked round-key contribution added during AddRoundKey r=0 at slot ``byte_index``.<br><br>``rm * key[j]``  where  ``j = perm[byte_index]``.<br><br>This is ``gtab[key[j]]`` — the value XORed into state during the masked AddRoundKey call, scaled into the same multiplicative domain as the plaintext. | <img src="plots/ascad_v2_1_v2_rm_key_0.png" alt="ascad-v2-1 v2_rm_key" width="400"/> | - |
| ascad-v2-1 | `v2_rm_ptx` | 0 | Map_in_G output at slot ``byte_index``: ``rm * ptx[j]``,  ``j = perm[byte_index]``.<br><br>The plaintext byte scaled into the GF(256) multiplicative domain. Additive mask (masksState) has not yet been applied at this point. | <img src="plots/ascad_v2_1_v2_rm_ptx_0.png" alt="ascad-v2-1 v2_rm_ptx" width="400"/> | - |
| ascad-v2-1 | `v2_rout_mask_interaction` | 0 | Value of the interaction between the global rout mask and the per-byte mask. | <img src="plots/ascad_v2_1_v2_rout_mask_interaction_0.png" alt="ascad-v2-1 v2_rout_mask_interaction" width="400"/> | - |
| ascad-v2-1 | `v2_sbi_perm` | 0 | Unmasked SBI at the AES byte position consumed by shuffling slot ``byte_index``.<br><br>``ptx[j] ^ key[j]``  where  ``j = perm[byte_index]``.<br><br>Unlike :meth:`sbi`, which uses ``byte_index`` as a direct AES byte position, this target follows the actual byte consumed by the firmware SubBytes shuffle at slot ``byte_index``. | <img src="plots/ascad_v2_1_v2_sbi_perm_0.png" alt="ascad-v2-1 v2_sbi_perm" width="400"/> | - |
| ascad-v2-1 | `v2_sbo_affine` | 0 | Affine-masked SBO at slot ``byte_index`` after full SubBytes (post-loop rout strip).<br><br>``rm * SBOX(ptx[j] ^ key[j]) ^ mask[j]``  where  ``j = perm[byte_index]``.<br><br>This is the state value after the post-loop ``state[j] ^= rout`` pass restores the affine invariant.  The rout mask is gone; only the multiplicative mask rm and the per-byte additive mask remain. | <img src="plots/ascad_v2_1_v2_sbo_affine_0.png" alt="ascad-v2-1 v2_sbo_affine" width="400"/> | <img src="plots/ascad_v2_1_v2_sbo_affine_0_zoomed.png" alt="Zoomed v2_sbo_affine" width="250"/> |
| ascad-v2-1 | `v2_sbo_hd` | 0 | Hamming distance between mid-SubBytes and affine SBO.<br><br>``HD(rm * SBOX(ptx[j] ^ key[j]) ^ rout ^ mask[j], rm * SBOX(ptx[j] ^ key[j]) ^ mask[j])`` where ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_sbo_hd_0.png" alt="ascad-v2-1 v2_sbo_hd" width="400"/> | <img src="plots/ascad_v2_1_v2_sbo_hd_0_zoomed.png" alt="Zoomed v2_sbo_hd" width="250"/> |
| ascad-v2-1 | `v2_sbo_mid` | 0 | Mid-SubBytes state at slot ``byte_index`` before post-loop rout strip.<br><br>``rm * SBOX(ptx[j] ^ key[j]) ^ rout ^ mask[j]``  where  ``j = perm[byte_index]``.<br><br>This is ``raw_out ^ state2[j]``, i.e. the value written back into ``state[j]`` inside the SubBytes inner loop, before the post-loop ``state[j] ^= rout`` pass.  The rout mask has not yet been removed. | <img src="plots/ascad_v2_1_v2_sbo_mid_0.png" alt="ascad-v2-1 v2_sbo_mid" width="400"/> | <img src="plots/ascad_v2_1_v2_sbo_mid_0_zoomed.png" alt="Zoomed v2_sbo_mid" width="250"/> |
| ascad-v2-1 | `v2_sbo_perm` | 0 | Unmasked SBO at the AES byte position consumed by shuffling slot ``byte_index``.<br><br>``SBOX(ptx[j] ^ key[j])``  where  ``j = perm[byte_index]``. | <img src="plots/ascad_v2_1_v2_sbo_perm_0.png" alt="ascad-v2-1 v2_sbo_perm" width="400"/> | - |
| ascad-v2-1 | `v2_xw_state` | 0 | State after Xor_Word at round 1 (before SubBytes) at slot ``byte_index``.<br><br>``rm * (ptx[j] ^ key[j]) ^ mask[j] ^ rin``  where  ``j = perm[byte_index]``.<br><br>This is the state byte written to the register immediately before the firmware issues the sboxMasked lookup. | <img src="plots/ascad_v2_1_v2_xw_state_0.png" alt="ascad-v2-1 v2_xw_state" width="400"/> | <img src="plots/ascad_v2_1_v2_xw_state_0_zoomed.png" alt="Zoomed v2_xw_state" width="250"/> |
| ascad-v2-1 | `rin` | none | Raw global input mask ``rin``. | <img src="plots/ascad_v2_1_rin.png" alt="ascad-v2-1 rin" width="400"/> | <img src="plots/ascad_v2_1_rin_zoomed.png" alt="Zoomed rin" width="250"/> |
| ascad-v2-1 | `rin_` | none | Raw global input mask ``rin_`` for second S-box pass. | <img src="plots/ascad_v2_1_rin_.png" alt="ascad-v2-1 rin_" width="400"/> | <img src="plots/ascad_v2_1_rin__zoomed.png" alt="Zoomed rin_" width="250"/> |
| ascad-v2-1 | `rm` | none | Raw global multiplicative mask ``rm`` (alpha). | <img src="plots/ascad_v2_1_rm.png" alt="ascad-v2-1 rm" width="400"/> | <img src="plots/ascad_v2_1_rm_zoomed.png" alt="Zoomed rm" width="250"/> |
| ascad-v2-1 | `rm_` | none | Raw global multiplicative mask ``rm_`` for second S-box pass. | <img src="plots/ascad_v2_1_rm_.png" alt="ascad-v2-1 rm_" width="400"/> | <img src="plots/ascad_v2_1_rm__zoomed.png" alt="Zoomed rm_" width="250"/> |
| ascad-v2-1 | `rout` | none | Raw global output mask ``rout``. | <img src="plots/ascad_v2_1_rout.png" alt="ascad-v2-1 rout" width="400"/> | <img src="plots/ascad_v2_1_rout_zoomed.png" alt="Zoomed rout" width="250"/> |
| ascad-v2-1 | `rout_` | none | Raw global output mask ``rout_`` for second S-box pass. | <img src="plots/ascad_v2_1_rout_.png" alt="ascad-v2-1 rout_" width="400"/> | <img src="plots/ascad_v2_1_rout__zoomed.png" alt="Zoomed rout_" width="250"/> |

## Parameters Used for Generation

- **HF_ORG**: `DLSCA`

- **CHUNK_SIZE_Y**: `50000`

- **CHUNK_SIZE_X**: `200`

- **TOTAL_CHUNKS_ON_Y**: `2`
- **TOTAL_CHUNKS_ON_X**: `5000`

- **NUM_JOBS**: `10`
- **CAN_RUN_LOCALLY**: `True`
- **CAN_RUN_ON_CLOUD**: `False`

- **COMPRESSED**: `True`



## Usage



You can load this dataset directly using Zarr and Hugging Face File System:



```python

import zarr

from huggingface_hub import HfFileSystem



fs = HfFileSystem()



# Map only once to the dataset root

root = zarr.open_group(fs.get_mapper("datasets/DLSCA/ascad-v2-1"), mode="r")



# Access traces directly

traces = root["traces"]

print("Traces shape:", traces.shape)



# Access plaintext metadata directly

plaintext = root["metadata"]["plaintext"]

print("Plaintext shape:", plaintext.shape)

```