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// Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2017.3 (lin64) Build Wed Oct 4 19:58:07 MDT 2017
// Date : Tue Oct 17 18:54:15 2017
// Host : TacitMonolith running 64-bit Ubuntu 16.04.3... |
#include <bits/stdc++.h> using namespace std; long long read() { long long x = 0, f = 1; char c = getchar(); while (c < 0 || c > 9 ) { if (c == - ) f = -1; c = getchar(); } while (c >= 0 && c <= 9 ) x = (x << 3) + (x << 1) + f * (c - 0 ), c = getchar(); return x; ... |
#include <bits/stdc++.h> using namespace std; int abslt(int n) { if (n < 0) return -n; else return n; } int main() { int t; cin >> t; while (t--) { int n; cin >> n; int arr[n + 1]; int i; for (i = 1; i <= n; i++) cin >> arr[i]; arr[0] = arr[1];... |
/* verilator lint_off STMTDLY */
module dv_ctrl(/*AUTOARG*/
// Outputs
nreset, clk1, clk2, start, vdd, vss,
// Inputs
dut_active, stim_done, test_done
);
parameter CFG_CLK1_PERIOD = 10;
parameter CFG_CLK1_PHASE = CFG_CLK1_PERIOD/2;
parameter CFG_CLK2_PERIOD = 100;
parameter CFG_CLK2_PHAS... |
module axi_master_read_stub(
output M2S_AXI_ACLK,
//Read M2S_AXI_transation
output M2S_AXI_ARVALID,
input M2S_AXI_ARREADY,
output [31:0] M2S_AXI_ARADDR,
output [1:0] M2S_AXI_ARBURST,
output [3:0] M2S_AXI_ARLEN,
output [1:0] M2S_AXI_ARSIZE,
//
input M2S_AXI_RVALID,
output M2... |
#include <bits/stdc++.h> using namespace std; vector<long long> D0, D1; vector<vector<pair<long long, long long> > > G; bool comp(pair<long long, long long> a, pair<long long, long long> b) { return a.second - a.first > b.second - b.first; } void dfs(int x, int k, int p = -1) { vector<pair<long long... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// -- (c) Copyright 2010 - 2011 Xilinx, Inc. All rights reserved.
// --
// -- This file contains confidential and proprietary information
// -- of Xilinx, Inc. and is protected under U.S. and
// -- international copyright and other intellectual property
// -- laws.
// --
// -- DISCLAIMER
// -- This disclaimer is not a... |
// (C) 1992-2014 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulati... |
#include <bits/stdc++.h> using namespace std; int n; int t = 0, x = 0, ans = 0; int a, b; int main() { scanf( %d , &n); for (int i = 1; i <= n; ++i) { scanf( %d%d , &a, &b); x -= a - t; if (x < 0) x = 0; x += b; ans = max(ans, x); t = a; } printf( %d %d , t ... |
#include <bits/stdc++.h> using namespace std; long long MOD = 1e9 + 7; long long powmod(long long a, long long l, long long md) { long long res = 1; while (l) { if (l & 1) res = res * a % md; l /= 2; a = a * a % md; } return res; } long long binpow(long long a, long long l) {... |
/*
- This is a material implementd for google summer of code 2017.
- I built this module to be more familiar with the design required, start edit, re-implement the whole thing
- The mentor feedback would really help me getting more and more clear vision about this project
-----------------------------------------------... |
//-----------------------------------------------------------------------------
// The way that we connect things in low-frequency read mode. In this case
// we are generating the unmodulated low frequency carrier.
// The A/D samples at that same rate and the result is serialized.
//
// Jonathan Westhues, April 2006
//... |
/*******************************************************************************
* This file is owned and controlled by Xilinx and must be used *
* solely for design, simulation, implementation and creation of *
* design files limited to Xilinx devices or technologies. Use ... |
#include <bits/stdc++.h> using namespace std; int main() { string a; vector<string> input; int n; cin >> n; bool flag = false; for (int i = 0; i < n; i++) { cin >> a; if (!flag && a[0] == a[1] && a[0] == O ) { a[0] = + ; a[1] = + ; flag = true; } ... |
`timescale 1ns / 1ps
module testConcat;
// Inputs
reg clk;
reg reset;
reg [7:0] dato;
reg num_ready;
reg fin;
// Outputs
wire [31:0] resultado;
// Instantiate the Unit Under Test (UUT)
ConcatenadorNumeros uut (
.clk(clk),
.reset(reset),
.dato(dato),
.num_ready(num_ready),
.fin(fin),
.resu... |
#include <bits/stdc++.h> using namespace std; const double EPS = 1e-9; const double PI = acos(-1.0); const int MAXN = 100005; const long long MOD = 1000000007; void base() { ios_base::sync_with_stdio(false); cin.tie(NULL); } pair<int, int> arr[100005]; int occ[100005]; int main() { base(... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2012 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
//bug591
module t (/*AUTOARG*/);
function real ABS (real num);
ABS = (num < 0) ? -num : num;
... |
module spi_addressing (
input clk,
input rst,
// SPI Signals
output spi_miso,
input spi_mosi,
input spi_sck,
input spi_ss,
// Register interface signals
output [5:0] reg_addr,
output write,
output new_req,
output [7:0] write_value,
input [7:0] read_value,
output in_tr... |
/*
Copyright (c) 2014-2018 Alex Forencich
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distri... |
#include <bits/stdc++.h> using namespace std; const int Mo = (int)1e9 + 7; vector<int> v[100005]; void add(int x, int y) { v[x].push_back(y); } int i, n, x, y, f[100005][2], A, B, g[2][2]; int inc(int x, int y) { x += y; while (x >= Mo) x -= Mo; while (x < 0) x += Mo; return x; } void df... |
#include <bits/stdc++.h> using namespace std; int main() { int t; cin >> t; while (t--) { int n, c0, c1, h; cin >> n >> c0 >> c1 >> h; string s; cin >> s; int ans = 0; int cnt = 0; int mini = min(c0, c1); for (int i = 0; i < n; i++) { if (s[i] == ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//*****************************************************************************
// (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
/... |
`timescale 1ns / 1ps
// select 300 DPI or 600 DPI mode
`define DPI_300
// `define DPI_600
// Period of CIS clock is equal to 60MHz/USB_CLK_DIV
// Must be an even number
`define USB_CLK_DIV 'd6
// Sample ADC 16.7ns before the next rising edge of CIS_CLK
`define ADC_CLK_DELAY (`USB_CLK_DIV/2)
// Issue write pulse imm... |
`timescale 1ns / 1ps
//*************************************************************************
// > ÎļþÃû: data_ram_display.v
// > ÃèÊö £ºÊý¾Ý´æ´¢Æ÷Ä£¿éÏÔʾģ¿é£¬µ÷ÓÃFPGA°åÉϵÄIO½Ó¿ÚºÍ´¥ÃþÆÁ
// > ×÷Õß : LOONGSON
// > ÈÕÆÚ : 2016-04-14
//*********************************************************************... |
module test;
reg fail = 1'b0;
reg [3:0] in = 4'b0;
wire [3:0] bus = in;
wire [3:0] val = bus; // to check the propagated value is correct
initial begin
// Check the initial value.
#1 if (val !== 4'b0) begin
$display("FAILED: initial value, got %b, expected 0000.", val);
fail = 1'b1;
e... |
#include <bits/stdc++.h> #pragma GCC optimize( Ofast ) #pragma GCC optimize(2) #pragma GCC optimize(3) const int N = 1e6 + 10, p1 = 1e9 + 7, p2 = 1e9 + 9; int n, k, len; char s[N << 1], ch; int strhash[N][2], hashbase[2], hashpow[2] = {1, 1}, tmp[2]; std::map<std::pair<int, int>, int> mp; std::set<int... |
#include <bits/stdc++.h> using namespace std; const int MAXN = 1e5 + 1; int a[6]; int n; int b[MAXN]; int ptr[MAXN]; int f[MAXN][6]; int main() { for (int i = 0; i < 6; ++i) cin >> a[i]; cin >> n; for (int i = 0; i < n; ++i) cin >> b[i]; for (int i = 0; i < n; ++i) { for (int j = 0... |
`timescale 1ns/1ps
`include "output/vlog_constants.v"
`include "../common/wishbone_test_master.v"
module main;
WB_TEST_MASTER WB();
wire [31:0] gpio_pins_b;
reg [31:0] gpio_reg = 32'bz;
wire clk = WB.wb_clk;
wire rst = WB.wb_rst;
gpio_port dut(
.rst_n_i (WB.wb_rst),
.wb_clk... |
`include "../../include/incparams.vh"
module tb_FIFOLOGIC;
reg clk, clk60, clk120;
wire tpulse;
reg EFB, TXE, FFA, RXF;
wire D1, WR, RB, D2, RD, WA;
FifoLogic_Gated uut
(
.clk (tpulse),
.FFA (FFA),
.RXF (RXF),
.TXE (TXE),
.EFB (EFB),
.RD (RD),
.WA (WA),
.RB (RB),
.WR (WR),
.D1 (D1),
... |
// Accellera Standard V2.3 Open Verification Library (OVL).
// Accellera Copyright (c) 2005-2008. All rights reserved.
parameter NC0 = (necessary_condition == `OVL_TRIGGER_ON_MOST_PIPE);
parameter NC1 = (necessary_condition == `OVL_TRIGGER_ON_FIRST_PIPE);
parameter NC2 = (necessary_condition == `OVL_TRIGGER_ON_F... |
#include <bits/stdc++.h> using namespace std; int N; string board[30]; int mask[42][30]; int dp[42][1 << 20]; int func(int i, int j, int c, bool first) { if (dp[i][j] != 10000) return dp[i][j]; int next; int ans = -(1 << 29); if (i == 2 * (N - 1)) { ans = 0; } else { for ((ne... |
#include <bits/stdc++.h> using namespace std; const int inf = (int)1e9 + 100; const long double eps = 1e-11; const long double pi = acos(-1.0L); int myrand() { return rand(); } unsigned rdtsc() { unsigned ans; asm( rdtsc : =a (ans)); return ans; } int rnd(int x) { return myrand() % x; } ... |
#include <bits/stdc++.h> using namespace std; int n; long long ans, p; int main() { scanf( %d , &n); p = 2; for (int i = 1; i <= n; i++) { cout << (long long)i * (i + 1) * (i + 1) - p / i << endl; p = (long long)i * (i + 1); } } |
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2014 Francis Bruno, All Rights Reserved
//
// This program is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by the Free
// Software Found... |
#include <bits/stdc++.h> using namespace std; const int N = 1e5 + 1; map<int, int> m[N]; set<pair<int, int> > s[N]; vector<int> g[N]; int n, c[N]; long long ans[N]; void dfs(int u, int p) { m[u][c[u]] = 1; s[u].insert(pair<int, int>(1, c[u])); ans[u] = c[u]; for (int v : g[u]) { if... |
//==================================================================================================
// Filename : tb_FPU_PIPELINED_FPADDSUB2_vector_testing.v
// Created On : 2016-09-27 18:38:13
// Last Modified : 2016-10-10 15:30:54
// Revision :
// Author : Jorge Sequeira Rojas
// Company ... |
#include <bits/stdc++.h> using namespace std; struct pp { long long int len, v; }; bool cmp(pp& a, pp& b) { if (a.v == b.v) return a.len > b.len; return a.v > b.v; } int main() { long long int n, k; cin >> n; cout << (n - 1) * n * (2 * n - 1) / 6 - 1 - 1 + n * (n - 1) / 2 << endl; ... |
#include <bits/stdc++.h> using namespace std; int n, ans = 0, fac[1000010], inv[1000010], sq[1000010], sl[1000010], sr[1000010]; char s[1000010]; template <class T> void read(T &x) { char ch; bool ok; for (ok = 0, ch = getchar(); !isdigit(ch); ch = getchar()) if (ch == - ) ok = 1; ... |
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(false); cin.tie(NULL); int t, n; cin >> t; while (t--) { long long x; double sum = 0; cin >> n >> x; vector<long long> v(n); for (int i = 0; i < n; i++) { cin >> v[i]; ... |
#include <bits/stdc++.h> int main() { int n, i, j, k; scanf( %d , &n); int a[1000]; int b[1000]; int c[6] = {0}; int d[6] = {0}; int sum = 0; for (i = 0; i < n; i++) { scanf( %d , &a[i]); c[a[i]]++; } for (i = 0; i < n; i++) { scanf( %d , &b[i]); d[b[i]]... |
module wb_uart_wrapper
#(parameter DEBUG = 0,
parameter SIM = 0)
(// Clock, reset
input wb_clk_i,
input wb_rst_i,
// Inputs
input [31:0] wb_adr_i,
input [7:0] wb_dat_i,
input wb_we_i,
input wb_cyc_i,
input wb_stb_i,
input [2:0] wb_cti_i,
input [1:0] wb_bte_i,
// Output... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { int n, x; scanf( %d%d , &n, &x); int i, j, ans = 0; int a1[100002], a2[100002]; for (i = 1; i <= n; i++) { scanf( %d%d , &a1[i], &a2[i]); ans = ans + (a2[i] - a1[i] + 1) + (a1[i] - a2[i - 1] - 1) % x; } printf( %d n ,... |
#include <bits/stdc++.h> using namespace std; const int maxn = 1e6 + 7; int n, u, v, cnt, head[maxn], to[maxn << 1], nex[maxn << 1], deep[maxn], len[maxn], son[maxn], *f[maxn], tmp[maxn], *id = tmp, ans[maxn]; inline int read() { int x = 0, f = 1; char ch = getchar(); while (!isdigit(ch)) { ... |
#include <bits/stdc++.h> using namespace std; int dx[] = {1, -1, 0, 0}; int dy[] = {0, 0, -1, 1}; int n, m; char grid[1005][1005]; int startX, startY, endX, endY; int cost[1005][1005]; int lookDir[1005][1005]; bool vis[1005][1005]; bool isValid(int i, int j) { return i >= 0 && i < n && j >= 0 &&... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 16:49:44 04/19/2016
// Design Name: single_cycle_cpu
// Module Name: F:/new_lab/6_single_cycle_cpu/tb.v
// Project Name: single_cycle_cpu
// Target Device:
// Tool... |
#include <bits/stdc++.h> using namespace std; int day[100005]; int cnt[100005]; int vis[100005]; int n, m; int jud(int x) { memset(vis, 0, sizeof(vis)); int i, j; int sum = 0, cntt = 0; ; for (i = x; i >= 1; i--) { if (day[i] && vis[day[i]] == 0) { cntt++; vis[day[i... |
// Copyright 1986-2014 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2014.4 (win64) Build Tue Nov 18 18:29:27 MST 2014
// Date : Tue Jun 30 18:05:44 2015
// Host : Vangelis-PC running 64-bit major release (... |
`timescale 1ns / 1ps
// Author: Sagar G V
// SPI slave module. Mode 0 MSB first, http://elm-chan.org/docs/spi_e.html.
// SSbar used for n-wide word sync
//Copyright (C) 2013 Sagar G V
//Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (t... |
// bfloat16 (FP16B) multiplier.
module FP16BMulS0Of2(
input clk,
input rst,
input [15:0] arg_0,
input [15:0] arg_1,
output ret_0,
output [7:0] ret_1,
output [7:0] ret_2,
output [8:0] ret_3);
wire s0;
wire s1;
wire [7:0] e0;
wire [7:0] e1;
wire [6:0] f0... |
#include <bits/stdc++.h> using namespace std; inline int read() { int f = 1, res = 0, ch = getchar(); while (ch < 0 || ch > 9 ) { if (ch == - ) f = -1; ch = getchar(); } while (ch >= 0 && ch <= 9 ) res = res * 10 + ch - 48, ch = getchar(); return f * res; } int _sta[1 << 8... |
#include<stdio.h> #include<vector> #include<algorithm> using namespace std; #define R register int #define I inline #define N 100001 vector<int>G[N],C[N],H[N]; int dep[N],g[448][N],fa[N],b[448],sz[N]; char ans[N]; bool f[448][N]; struct Painter{ char Character; int LeftNum; }; I void DFS... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; signed main() { ios_base::sync_with_stdio(false); cin.tie(NULL); cout.tie(0); ; string s; long long m, x = 0, k = 0; long long a[3]; for (long long i = 0; i < 3; i++) { cin >> a[i]; } sort(a, a + 3); k = a[2] - a[1] + a[... |
/*
GPR Bank
Reads from Rs, Rt, and Rm.
Writes to Rn.
*/
module RegGPR(
/* verilator lint_off UNUSED */
clock, reset,
regIdRs, regValRs,
regIdRt, regValRt,
regIdRm, regValRm,
regIdRn, regValRn,
regSrVal);
input clock;
input reset;
input[6:0] regIdRs;
input[6:0] regIdRt;
input[6:0] regIdRm;
input[6:0] reg... |
#include <bits/stdc++.h> using namespace std; int l, r, x, y; vector<int> primes; int cnt(int idx, int a, int b) { if (idx == primes.size()) return a >= l && a <= r && b >= l && b <= r; return cnt(idx + 1, a * primes[idx], b) + cnt(idx + 1, a, b * primes[idx]); } int main() { cin >> l >> r >> x ... |
#include <bits/stdc++.h> using namespace std; const int N = 1e2 + 10; int n; int t[N], w[N], dp[N][2 * N]; int main() { cin >> n; int sumw = 0; for (int i = 1; i <= n; i++) { cin >> t[i] >> w[i]; sumw += w[i]; } for (int i = 0; i <= n; i++) { for (int j = 1; j <= 2 * n; j... |
#include <bits/stdc++.h> using namespace std; int main() { int x1, y1, x2, y2; cin >> x1 >> y1 >> x2 >> y2; int uppery = y2 + 1; int lowery = y2 - 1; int upperx = x2 + 1; int lowerx = x2 - 1; int ans = 4; ans += abs(x1 - upperx) + abs(y1 - lowery) + abs(x1 - lowerx) + abs(y1 ... |
#include <bits/stdc++.h> using namespace std; int n, q, PREV, pos; ; int arr[200005]; long long ps[200005], x, sebelum; long long k[200005]; bool good; void binser() { int ki = PREV, ka = n; pos = 1; x += sebelum; while (ki <= ka) { int mid = (ki + ka) / 2; if (ps[mid] <= x) ... |
#include <bits/stdc++.h> using namespace std; unordered_map<string, int> mp; char ans[2][1005]; bool x[5005]; int oprd[2][5005]; char orig[5005][1005]; char op[5005][20]; char input[4][1005]; char line[4 * 1005]; int main() { int n, m; while (scanf( %d%d , &n, &m) != EOF) { mp.clear()... |
// Copyright (c) 2000-2012 Bluespec, Inc.
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, pub... |
// NeoGeo logic definition (simulation only)
// Copyright (C) 2018 Sean Gonsalves
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) an... |
//
// Copyright 2012 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is dis... |
#include <bits/stdc++.h> int n, m, r; int mat[61][61], opt[61][61][61]; int main() { scanf( %d%d%d , &n, &m, &r); for (int i = (0); i < (n); i++) for (int j = (0); j < (n); j++) for (int k = (0); k < (n); k++) opt[i][j][k] = 1000000000; for (int k = (0); k < (m); k++) { for (int i ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
`timescale 1ps/1ps
`default_nettype none
(* DowngradeIPIdentifiedWarnings="yes" *)
module axi_protocol_converter_v2_1_b2s_aw_channel #
(
///////////////////////////////////////////////////////////////////////////////
// Parameter Definitions
////////////////////////////////////////////////////////////////////////////... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2020 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t;
integer seeda;
integer seedb;
integer seedc;
int valuea;
int valueb;
int valu... |
#include <bits/stdc++.h> using namespace std; template <typename t> void read(t &x) { char ch = getchar(); x = 0; t f = 1; while (ch < 0 || ch > 9 ) f = (ch == - ? -1 : f), ch = getchar(); while (ch >= 0 && ch <= 9 ) x = x * 10 + ch - 0 , ch = getchar(); x *= f; } long long dp... |
#include <bits/stdc++.h> using namespace std; int main() { vector<long long int> v(1000005); long long int i, n, j; for (i = 2; i < 1000005; i++) { j = i * 2; while (j <= 1000005) { v[j] = 1; j += i; } } cin >> n; j = 1; for (j = 1; j < 1001; j++) { ... |
// Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2017.3 (lin64) Build Wed Oct 4 19:58:07 MDT 2017
// Date : Tue Oct 17 18:54:54 2017
// Host : TacitMonolith running 64-bit Ubuntu 16.04.3... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { map<char, int> mp; string s; int i, j, n, off; cin >> n >> s; for (i = 0; i < s.size(); i++) { mp[s[i]] = 1; } int max = mp.size(); if (n > max) { cout << NO ; } else { int c = 0; cout << YES <<... |
module rfa_tb;
reg clk;
reg rst;
reg simd0_queue_entry_valid, simd1_queue_entry_valid, simd2_queue_entry_valid,
simd3_queue_entry_valid, simf0_queue_entry_valid, simf1_queue_entry_valid,
simf2_queue_entry_valid, simf3_queue_entry_valid;
wire simd0_queue_entry_serviced, simd1_queue_entry_serviced, ... |
#include <bits/stdc++.h> #pragma GCC optimize(2) using namespace std; void qread(int &x) { int neg = 1; x = 0; char c = getchar(); while (c < 0 || c > 9 ) { if (c == - ) neg = -1; c = getchar(); } while (c >= 0 && c <= 9 ) x = 10 * x + c - 0 , c = getchar(); x *= ne... |
#include <bits/stdc++.h> using namespace std; long long const M = 1e5 + 10, mod = 1e9 + 7, inf = 1e9 + 10; long long par[M][30], dp[M], zt[M], sum[M], val[M][30], sum2[M], n, dp2[M], len = 0, h[M]; vector<long long> adj[M], edg[M], inc[M]; long long mrg(long long x, long long y, long long sm, long long ... |
/*
File: parallella_gpio_emio.v
This file is part of the Parallella FPGA Reference Design.
Copyright (C) 2013-2014 Adapteva, Inc.
Contributed by Fred Huettig
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Fr... |
module multiboot (
input wire clk_icap,
input wire REBOOT
);
reg [23:0] spi_addr = 24'h058000; // default: SPI address of second core as defined by the SPI memory map
reg [4:0] q = 5'b00000;
reg reboot_ff = 1'b0;
always @(posedge clk_icap) begin
q[0] <= REBOOT;
q[... |
#include <bits/stdc++.h> using namespace std; const double eps = 1e-10; const int oo = ~0u >> 2, mo = (int)1e9 + 7; const int mn = 110000, mm = 110000 * 2, ml = 18; struct Edge { int y, l; } E[mm]; int g[mn], d[mn], s[mn], blg[mn]; int fa[mn][ml], f[mn]; bool o[mn]; int n, m, tt(1); void add(i... |
#include <bits/stdc++.h> using namespace std; int n, m, ans, fa[100001]; bool mark[100001]; int find(int x) { if (x == fa[x]) return x; return fa[x] = find(fa[x]); } int main() { cin >> n >> m; for (int i = 1; i <= n; i++) fa[i] = i; for (int i = 1; i <= m; i++) { int x, y; c... |
#include <bits/stdc++.h> inline int sbt(int x) { return __builtin_popcount(x); } using namespace std; template <typename Arg1> void __f(const char* name, Arg1&& arg1) { cout << name << : << arg1 << std::endl; } template <typename Arg1, typename... Args> void __f(const char* names, Arg1&& arg1, Arg... |
#include <bits/stdc++.h> using namespace std; long long int find(vector<long long int> &p, long long int i) { if (p[i] == -1) return i; return find(p, p[i]); } void solve() { string st; cin >> st; long long int c = 0; for (long long int i = 0; i < st.size(); i++) { if (st[i] == > ... |
#include <bits/stdc++.h> using namespace std; const int N = 5e5 + 100; int num[N]; bool vis[N]; vector<int> v; int n, k; int main() { scanf( %d %d , &n, &k); int mn = 1e9 + 1000; for (int i = 1; i <= n; i++) { scanf( %d , &num[i]); if (num[i] < mn) { mn = num[i]; vi... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 18:59:33 10/30/2011
// Design Name: UXA 1A
// Module Name: M_uxa_ps2_busctl
// Project Name: Kestrel-2
// Target Devices: Nexys2
// Tool versions:
// Description:
... |
#include <bits/stdc++.h> using namespace std; void solve(long long cno) { long long n, i, j, k; cin >> n; long long arr[n]; for (i = 0; i < n; i++) { cin >> arr[i]; } if (n < 3) { cout << 0 << endl; for (auto x : arr) { cout << x << ; } return; } ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; void read() {} int main() { read(); ios_base::sync_with_stdio(false); cin.tie(0); cout.tie(0); int t = 1; while (t--) { int n, m; cin >> n >> m; string s; int a[n][m]; for (int i = 0; i < n; i++) { cin >> s... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2011 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
`begin_keywords "VAMS-2.3"
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
task check (... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> int a[26]; int w[256]; int n; int LIMIT = 1; int su[26], sv[26], sk[26]; int go(int lev) { if (a[lev] == n) { printf( %d n , lev); for (int i = 0; i < lev; i++) if (su[i] == -1) { printf( lea e%cx, [%d*e%cx] n , a + i + 1, 1 << sk[i], a + sv[i])... |
#include <bits/stdc++.h> using namespace std; int main() { long long n, m; char T; string a[100]; cin >> n >> m; for (int i = 0; i < n; i++) { cin >> a[i]; } for (int i = 0; i < n; i++) { for (int j = 0; j < a[i].size(); j++) { if (i % 2 == 0) { if (j % 2 ==... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2014 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
integer cyc = 0;
reg [63:0] crc;
... |
#include <bits/stdc++.h> using namespace std; inline char gc() { static char buf[1 << 16], *S, *T; if (S == T) { T = (S = buf) + fread(buf, 1, 1 << 16, stdin); if (T == S) return EOF; } return *S++; } inline int read() { int x = 0, f = 1; char ch = gc(); while (ch < 0 |... |
#include <bits/stdc++.h> using namespace std; inline int read() { int x = 0, f = 1, c = getchar(); while (c < 48) c == - && (f = -1), c = getchar(); while (c > 47) x = x * 10 + c - 0 , c = getchar(); return x * f; } const int MAXN = 100005; struct Node { int l, r, mx; double p; } ... |
#include <bits/stdc++.h> using namespace std; #define mp make_pair #define pb push_back #define x first #define y second typedef pair<int,int> pii; typedef long long ll; typedef unsigned long long ull; template <typename T> void chkmax(T &x,T y){x<y?x=y:T();} template <typename T> void chkmin(T &x,T... |
#include <iostream> using namespace std; int t; int n, k; int main() { for (cin >> t; t--; ) { cin >> n >> k; for (n -= k - 3; k != 3; k--) { cout << 1 << ; } if (n == 3) cout << 1 << << 1 << << 1 << endl; else if (n % 4 == 0) cout << n / 2 << << n /... |
#include <bits/stdc++.h> using namespace std; int main() { long long int n, x1, x2, y1, y2, i, sum = 0; cin >> n; for (i = 0; i < n; i++) { cin >> x1 >> y1 >> x2 >> y2; sum += ((x2 - x1) + 1) * ((y2 - y1) + 1); } cout << sum << endl; } |
module top (
input clk,
output tx,
input rx,
input [15:0] sw,
output [15:0] led
);
wire clk_bufg;
BUFG bufg (.I(clk), .O(clk_bufg));
reg [5:0] reset_cnt = 0;
wire resetn = &reset_cnt;
always @(posedge clk_bufg) begin
reset_cnt <= reset_cnt + !resetn;
end
wire iomem_valid;
reg iome... |
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