Update README.md

README.md

@@ -1,32 +1,34 @@
----
-license: bsd-3-clause
----
-
-# ChiPBench-D
-
-This project represents the dataset part of ChiPBench. The code can be found on GitHub: [ChiPBench](https://github.com/MIRALab-USTC/ChiPBench).
-
-## Details
-
-
-
-### data
-
-```bash
-data
-├── case_name
-│   ├── def
-│   ├── lef
-│   ├── lib
-│   ├── case_name.v
-│   ├── constraint.sdc
-```
-
-- **def**: DEF files.
-- **lef**: Case-specific LEF files.
-- **lib**: Case-specific LIB files.
-- **case_name.v**: Synthesized netlist files for the case.
-- **constraint.sdc**: Timing constraint files for the case.
-
-
-
+---
+license: bsd-3-clause
+---
+
+# ChiPBench-D
+
+This project represents the dataset part of ChiPBench. The code can be found on GitHub: [ChiPBench](https://github.com/MIRALab-USTC/ChiPBench).
+
+## Details
+
+
+
+### data
+
+```bash
+data
+├── case_name
+│   ├── def
+│   ├── lef
+│   ├── lib
+│   ├── case_name.v
+│   ├── constraint.sdc
+```
+
+- **def**: DEF files.
+  - `pre_place.def`: Floorplan initialization completed; macros and standard cells are not yet placed.
+  - `macro_placed.def`: Macros are fixed in place (placed using OpenROAD's Hier-RTLMP method); standard cells are not yet placed.
+- **lef**: Case-specific LEF files.
+- **lib**: Case-specific LIB files.
+- **case_name.v**: Synthesized netlist files for the case.
+- **constraint.sdc**: Timing constraint files for the case.
+
+
+