---
license: bsd-3-clause
---

# ChiPBench-D
ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms


Chip placement is a critical step in the Electronic Design Automation (EDA) workflow, which aims to arrange chip modules on the canvas to optimize the performance, power, and area (PPA) metrics of final designs.  
Recent advances show great potential of AI-based algorithms in chip placement.  
However, due to the lengthy EDA workflow, evaluations of these algorithms often focus on _intermediate surrogate metrics_, which are computationally efficient but often misalign with the final _end-to-end performance_ (i.e., the final design PPA).  
To address this challenge, we propose to build **ChiPBench**, a comprehensive benchmark specifically designed to evaluate the effectiveness of AI-based algorithms in final design PPA metrics.  
Specifically, we generate a diverse evaluation dataset from 20 circuits across various domains, such as CPUs, GPUs, and NPUs.  

We present an end-to-end evaluation workflow for placement stages of the EDA flow.  
To evaluate a stage-specific algorithm, the output from the preceding stage serves as its input, and the algorithm's output is reintegrated into the original design flow.  
Final PPA metrics provide a comprehensive assessment, avoiding the limitations of isolated stage-specific metrics.  
This approach facilitates algorithm optimization by ensuring improvements translate into practical chip design enhancements.  
We believe ChiPBench will effectively bridge the gap between academia and industry.


This project represents the dataset part of ChiPBench. The code can be found on GitHub: [ChiPBench](https://github.com/MIRALab-USTC/ChiPBench).

## Details



### data

```bash
data
├── case_name
│   ├── def
│   ├── lef
│   ├── lib
│   ├── case_name.v
│   ├── constraint.sdc
```

- **def**: DEF files.
  - `pre_place.def`: Floorplan initialization completed; macros and standard cells are not yet placed.
  - `macro_placed.def`: Macros are fixed in place (placed using OpenROAD's Hier-RTLMP method); standard cells are not yet placed.
- **lef**: Case-specific LEF files.
- **lib**: Case-specific LIB files.
- **case_name.v**: Synthesized netlist files for the case.
- **constraint.sdc**: Timing constraint files for the case.

**Download Using Croissant Format**

You only need to download the following files first:

- [`download_dataset.py`](https://huggingface.co/datasets/MIRA-Lab/ChiPBench-D/blob/main/download_dataset.py)
- [`chipbench_meta_data.json`](https://huggingface.co/datasets/MIRA-Lab/ChiPBench-D/blob/main/chipbench_meta_data.json)

Then run the following commands:

```bash
mkdir ChiPBench-D
cp download_dataset.py ChiPBench-D/
cp chipbench_meta_data.json ChiPBench-D/
cd ChiPBench-D/
python3 download_dataset.py
```