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| | #ifndef __AIS328DQ_H__ |
| | #define __AIS328DQ_H__ |
| |
|
| | #define AIS328DQ_ACC_I2C_SAD_L (0x18) |
| | #define AIS328DQ_ACC_I2C_SAD_H (0x19) |
| | #define AIS328DQ_ACC_DEV_NAME "ais328dq_acc" |
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| | |
| | #define AIS328DQ_ACC_FS_MASK 0x30 |
| | #define AIS328DQ_ACC_G_2G 0x00 |
| | #define AIS328DQ_ACC_G_4G 0x10 |
| | #define AIS328DQ_ACC_G_8G 0x30 |
| |
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| | |
| | #define AIS328DQ_ACC_ENABLE 0x01 |
| | #define AIS328DQ_ACC_DISABLE 0x00 |
| | #define AIS328DQ_ACC_PM_NORMAL 0x20 |
| | #define AIS328DQ_ACC_PM_OFF AIS328DQ_ACC_DISABLE |
| |
|
| | #ifdef __KERNEL__ |
| |
|
| | #if defined(CONFIG_INPUT_AIS328DQ_SPI) || \ |
| | defined(CONFIG_INPUT_AIS328DQ_SPI_MODULE) |
| | #define AIS328DQ_RX_MAX_LENGTH 500 |
| | #define AIS328DQ_TX_MAX_LENGTH 500 |
| |
|
| | struct ais328dq_transfer_buffer { |
| | u8 rx_buf[AIS328DQ_RX_MAX_LENGTH]; |
| | u8 tx_buf[AIS328DQ_TX_MAX_LENGTH] ____cacheline_aligned; |
| | }; |
| | #endif |
| |
|
| | struct ais328dq_transfer_function { |
| | int (*write)(struct device *dev, u8 reg_addr, int len, u8 *data); |
| | int (*read)(struct device *dev, u8 addr, int len, u8 *data); |
| | }; |
| | struct ais328dq_acc_platform_data { |
| |
|
| | int poll_interval; |
| | int min_interval; |
| |
|
| | u8 g_range; |
| |
|
| | u8 axis_map_x; |
| | u8 axis_map_y; |
| | u8 axis_map_z; |
| |
|
| | u8 negate_x; |
| | u8 negate_y; |
| | u8 negate_z; |
| |
|
| | int (*init)(void); |
| | void (*exit)(void); |
| | int (*power_on)(void); |
| | int (*power_off)(void); |
| |
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| | |
| | |
| | |
| | int gpio_int1; |
| | int gpio_int2; |
| | }; |
| |
|
| | #define RESUME_ENTRIES 12 |
| |
|
| | struct ais328dq_acc_data { |
| | const char *name; |
| | struct device *dev; |
| | u16 bus_type; |
| | struct ais328dq_acc_platform_data *pdata; |
| |
|
| | struct mutex lock; |
| | s64 timestamp, delta_ts; |
| | struct hrtimer hr_timer; |
| | struct workqueue_struct *work_queue; |
| | struct work_struct poll_work; |
| | struct input_dev *input_dev; |
| |
|
| | int hw_initialized; |
| | |
| | int hw_working; |
| | int selftest_enabled; |
| |
|
| | atomic_t enabled; |
| |
|
| | u8 sensitivity; |
| |
|
| | u8 resume_state[RESUME_ENTRIES]; |
| |
|
| | int irq1; |
| | struct work_struct irq1_work; |
| | struct workqueue_struct *irq1_work_queue; |
| | int irq2; |
| | struct work_struct irq2_work; |
| | struct workqueue_struct *irq2_work_queue; |
| |
|
| | #ifdef AIS328DQ_DEBUG |
| | u8 reg_addr; |
| | #endif |
| | #if defined(CONFIG_INPUT_AIS328DQ_SPI) || \ |
| | defined(CONFIG_INPUT_AIS328DQ_SPI_MODULE) |
| | struct ais328dq_transfer_buffer tb; |
| | #endif |
| | struct ais328dq_transfer_function *tf; |
| | }; |
| |
|
| | int ais328dq_acc_probe(struct ais328dq_acc_data *acc); |
| | int ais328dq_acc_remove(struct ais328dq_acc_data *acc); |
| | int ais328dq_acc_enable(struct ais328dq_acc_data *acc); |
| | int ais328dq_acc_disable(struct ais328dq_acc_data *acc); |
| |
|
| | #endif |
| |
|
| | #endif |
| |
|