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Datasets:
OvertureMMXXI
/
HDL-RepoBench-Sample
like
0
Tasks:
Text Generation
Languages:
code
Size:
1K<n<10K
Tags:
hardware
verilog
systemverilog
vhdl
chisel
hls
+ 1
License:
other
Dataset card
Data Studio
Files
Files and versions
xet
Community
main
HDL-RepoBench-Sample
/
vhdl
41.9 MB
1 contributor
History:
1 commit
OvertureMMXXI
Upload HDL-RepoBench sample
d6720f3
verified
9 days ago
test.jsonl
Safe
195 kB
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9 days ago
test_content_classfied.jsonl
17.1 MB
xet
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9 days ago
train.jsonl
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103 kB
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9 days ago
train_content.jsonl
21.7 MB
xet
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9 days ago
valid.jsonl
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39.8 kB
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9 days ago
valid_content.jsonl
Safe
2.73 MB
Upload HDL-RepoBench sample
9 days ago
