Download OpenTimer_OpenTimer/example/optimizer/optimizer.sdc from SAIFIINDUSTRIES/verilog_data-2: direct link, hf CLI and curl.
- Browser
- Download file 3.39 kB
-
https://huggingface.co/datasets/SAIFIINDUSTRIES/verilog_data-2/resolve/main/OpenTimer_OpenTimer/example/optimizer/optimizer.sdc
- Command line
-
hf download hf://datasets/SAIFIINDUSTRIES/verilog_data-2/OpenTimer_OpenTimer/example/optimizer/optimizer.sdc
-
curl -L -o optimizer.sdc https://huggingface.co/datasets/SAIFIINDUSTRIES/verilog_data-2/resolve/main/OpenTimer_OpenTimer/example/optimizer/optimizer.sdc
3.39 kB
| create_clock -period 1 -name clk_net [get_ports clk_net] | |
| set_input_delay 0 -min -rise [get_ports G1] -clock clk_net | |
| set_input_delay 0 -min -fall [get_ports G1] -clock clk_net | |
| set_input_delay 0 -max -rise [get_ports G1] -clock clk_net | |
| set_input_delay 0 -max -fall [get_ports G1] -clock clk_net | |
| set_input_transition 5 -min -rise [get_ports G1] -clock clk_net | |
| set_input_transition 5 -min -fall [get_ports G1] -clock clk_net | |
| set_input_transition 5 -max -rise [get_ports G1] -clock clk_net | |
| set_input_transition 5 -max -fall [get_ports G1] -clock clk_net | |
| set_input_delay 0 -min -rise [get_ports G2] -clock clk_net | |
| set_input_delay 0 -min -fall [get_ports G2] -clock clk_net | |
| set_input_delay 0 -max -rise [get_ports G2] -clock clk_net | |
| set_input_delay 0 -max -fall [get_ports G2] -clock clk_net | |
| set_input_transition 5 -min -rise [get_ports G2] -clock clk_net | |
| set_input_transition 5 -min -fall [get_ports G2] -clock clk_net | |
| set_input_transition 5 -max -rise [get_ports G2] -clock clk_net | |
| set_input_transition 5 -max -fall [get_ports G2] -clock clk_net | |
| set_input_delay 0 -min -rise [get_ports clk_net] -clock clk_net | |
| set_input_delay 0 -min -fall [get_ports clk_net] -clock clk_net | |
| set_input_delay 0 -max -rise [get_ports clk_net] -clock clk_net | |
| set_input_delay 0 -max -fall [get_ports clk_net] -clock clk_net | |
| set_input_transition 5 -min -rise [get_ports clk_net] -clock clk_net | |
| set_input_transition 5 -min -fall [get_ports clk_net] -clock clk_net | |
| set_input_transition 5 -max -rise [get_ports clk_net] -clock clk_net | |
| set_input_transition 5 -max -fall [get_ports clk_net] -clock clk_net | |
| set_input_delay 0 -min -rise [get_ports reset_net] -clock clk_net | |
| set_input_delay 0 -min -fall [get_ports reset_net] -clock clk_net | |
| set_input_delay 0 -max -rise [get_ports reset_net] -clock clk_net | |
| set_input_delay 0 -max -fall [get_ports reset_net] -clock clk_net | |
| set_input_transition 5 -min -rise [get_ports reset_net] -clock clk_net | |
| set_input_transition 5 -min -fall [get_ports reset_net] -clock clk_net | |
| set_input_transition 5 -max -rise [get_ports reset_net] -clock clk_net | |
| set_input_transition 5 -max -fall [get_ports reset_net] -clock clk_net | |
| set_input_delay 0 -min -rise [get_ports G3] -clock clk_net | |
| set_input_delay 0 -min -fall [get_ports G3] -clock clk_net | |
| set_input_delay 0 -max -rise [get_ports G3] -clock clk_net | |
| set_input_delay 0 -max -fall [get_ports G3] -clock clk_net | |
| set_input_transition 5 -min -rise [get_ports G3] -clock clk_net | |
| set_input_transition 5 -min -fall [get_ports G3] -clock clk_net | |
| set_input_transition 5 -max -rise [get_ports G3] -clock clk_net | |
| set_input_transition 5 -max -fall [get_ports G3] -clock clk_net | |
| set_input_delay 0 -min -rise [get_ports G0] -clock clk_net | |
| set_input_delay 0 -min -fall [get_ports G0] -clock clk_net | |
| set_input_delay 0 -max -rise [get_ports G0] -clock clk_net | |
| set_input_delay 0 -max -fall [get_ports G0] -clock clk_net | |
| set_input_transition 5 -min -rise [get_ports G0] -clock clk_net | |
| set_input_transition 5 -min -fall [get_ports G0] -clock clk_net | |
| set_input_transition 5 -max -rise [get_ports G0] -clock clk_net | |
| set_input_transition 5 -max -fall [get_ports G0] -clock clk_net | |
| set_output_delay 2.1 -min -rise [get_ports G17] -clock clk_net | |
| set_output_delay 2.1 -min -fall [get_ports G17] -clock clk_net | |
| set_output_delay 2.2 -max -rise [get_ports G17] -clock clk_net | |
| set_output_delay 2.2 -max -fall [get_ports G17] -clock clk_net | |
| set_load -pin_load 4 [get_ports G17] | |