system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3fooPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff057624 */
/* 0x000fe200078e00ff */
/*0020*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ MOV R3, c[0x0][0x164] ; /* 0x0000590000037a02 */
/* 0x000fe40000000f00 */
/*0050*/ IADD3 R5, R5, 0x2, RZ ; /* 0x0000000205057810 */
/* 0x000fca0007ffe0ff */
/*0060*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0070*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0080*/ BRA 0x80; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3fooPii
.globl _Z3fooPii
.p2align 8
.type _Z3fooPii,@function
_Z3fooPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s2, 2
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3fooPii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 12
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 3
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3fooPii, .Lfunc_end0-_Z3fooPii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 12
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3fooPii
.private_segment_fixed_size: 0
.sgpr_count: 3
.sgpr_spill_count: 0
.symbol: _Z3fooPii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015cd7c_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z1fi
.type _Z1fi, @function
_Z1fi:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z1fi, .-_Z1fi
.globl _Z23__device_stub__Z3fooPiiPii
.type _Z23__device_stub__Z3fooPiiPii, @function
_Z23__device_stub__Z3fooPiiPii:
.LFB2082:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z3fooPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z23__device_stub__Z3fooPiiPii, .-_Z23__device_stub__Z3fooPiiPii
.globl _Z3fooPii
.type _Z3fooPii, @function
_Z3fooPii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z23__device_stub__Z3fooPiiPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z3fooPii, .-_Z3fooPii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3fooPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3fooPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
.globl _Z18__device_stub__fooPii # -- Begin function _Z18__device_stub__fooPii
.p2align 4, 0x90
.type _Z18__device_stub__fooPii,@function
_Z18__device_stub__fooPii: # @_Z18__device_stub__fooPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z3fooPii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z18__device_stub__fooPii, .Lfunc_end0-_Z18__device_stub__fooPii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3fooPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3fooPii,@object # @_Z3fooPii
.section .rodata,"a",@progbits
.globl _Z3fooPii
.p2align 3, 0x0
_Z3fooPii:
.quad _Z18__device_stub__fooPii
.size _Z3fooPii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3fooPii"
.size .L__unnamed_1, 10
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__fooPii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3fooPii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 32
extern "C" {
__global__ void mul_matrix(int *A, int *B, int *C, int n){
unsigned int i;
int product = 0;
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
if(row < n && col < n){
for (i = 0; i < n; i++)
product += A[row * n + i] * B[i * n + col];
C[row*n + col] = product;
}
}
// CUDA code here
int cuda_matrixMul(int *a_h, int *b_h, int *c_h, int N, int device_id){
cudaError_t err;
int *a_d, *b_d, *c_d;
size_t size = N * N * sizeof (int);
// Test 300MB
//size_t size = 314572800;
printf("C: device id >> %d\n", device_id);
cudaSetDevice(device_id);
printf("C: Allocate GPU Memory1\n");
// allocate memory in the GPU device for a, b and c
err = cudaMalloc((void **) & a_d, size);
if (err != cudaSuccess){
printf("CUDA error(1): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory2\n");
err = cudaMalloc((void **) & b_d, size);
if (err != cudaSuccess){
printf("CUDA error(2): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory3\n");
err = cudaMalloc((void **) & c_d, size);
if (err != cudaSuccess){
printf("CUDA error(3): %s\n", cudaGetErrorString(err));
exit(-1);
}
size = N * N * sizeof (int);
// copy from host to GPU device
printf("C: Memory Copy1\n");
err = cudaMemcpy(a_d, a_h, size, cudaMemcpyHostToDevice);
if (err != cudaSuccess){
printf("CUDA error(4): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Memory Copy2\n");
err = cudaMemcpy(b_d, b_h, size, cudaMemcpyHostToDevice);
if (err != cudaSuccess){
printf("CUDA error(5): %s\n", cudaGetErrorString(err));
exit(-1);
}
// do calculations on device
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((N + BLOCK_SIZE - 1) / BLOCK_SIZE, (N + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Launch GPU
printf("C: Launch\n");
mul_matrix<<<grid, block>>>(a_d, b_d, c_d, N);
printf("C: Memory Copy\n");
cudaMemcpy(c_h, c_d, size, cudaMemcpyDeviceToHost);
cudaFree(a_d);
cudaFree(b_d);
cudaFree(c_d);
return N;
}
} | code for sm_80
Function : mul_matrix
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0020*/ S2R R26, SR_TID.X ; /* 0x00000000001a7919 */
/* 0x000e280000002100 */
/*0030*/ S2R R17, SR_CTAID.Y ; /* 0x0000000000117919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R3, c[0x0][0x0], R26 ; /* 0x0000000003007a24 */
/* 0x001fca00078e021a */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R17, R17, c[0x0][0x4], R2 ; /* 0x0000010011117a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GE.OR P0, PT, R17, c[0x0][0x178], P0 ; /* 0x00005e0011007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */
/* 0x000fe20003f05270 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R25, -RZ, RZ, 0, 0 ; /* 0x00000000ff197435 */
/* 0x000fd600000001ff */
/*00d0*/ @!P0 BRA 0x4d0 ; /* 0x000003f000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff137624 */
/* 0x000fe200078e00ff */
/*00f0*/ MOV R25, RZ ; /* 0x000000ff00197202 */
/* 0x000fe20000000f00 */
/*0100*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff147224 */
/* 0x000fc600078e00ff */
/*0110*/ IADD3 R2, R19.reuse, -0x1, RZ ; /* 0xffffffff13027810 */
/* 0x040fe40007ffe0ff */
/*0120*/ LOP3.LUT R18, R19, 0x3, RZ, 0xc0, !PT ; /* 0x0000000313127812 */
/* 0x000fe400078ec0ff */
/*0130*/ ISETP.GE.U32.AND P1, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f26070 */
/*0140*/ ISETP.NE.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fd60003f05270 */
/*0150*/ @!P1 BRA 0x3f0 ; /* 0x0000029000009947 */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R26, R26, c[0x0][0x178], RZ ; /* 0x00005e001a1a7a10 */
/* 0x000fe20007ffe0ff */
/*0170*/ HFMA2.MMA R25, -RZ, RZ, 0, 0 ; /* 0x00000000ff197435 */
/* 0x000fe200000001ff */
/*0180*/ IMAD R21, R17, R19, 0x3 ; /* 0x0000000311157424 */
/* 0x000fe200078e0213 */
/*0190*/ LEA R16, R19.reuse, R0, 0x1 ; /* 0x0000000013107211 */
/* 0x040fe200078e08ff */
/*01a0*/ IMAD R22, R19, 0x3, R0 ; /* 0x0000000313167824 */
/* 0x000fe200078e0200 */
/*01b0*/ IADD3 R23, R18, -c[0x0][0x178], RZ ; /* 0x80005e0012177a10 */
/* 0x000fe20007ffe0ff */
/*01c0*/ IMAD R26, R3, c[0x0][0x0], R26 ; /* 0x00000000031a7a24 */
/* 0x000fe400078e021a */
/*01d0*/ IMAD.MOV.U32 R24, RZ, RZ, R0 ; /* 0x000000ffff187224 */
/* 0x000fe400078e0000 */
/*01e0*/ IADD3 R28, R21, -0x3, RZ ; /* 0xfffffffd151c7810 */
/* 0x000fe40007ffe0ff */
/*01f0*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */
/* 0x000fc40000000f00 */
/*0200*/ IADD3 R4, R21.reuse, -0x2, RZ ; /* 0xfffffffe15047810 */
/* 0x040fe40007ffe0ff */
/*0210*/ IADD3 R8, R21, -0x1, RZ ; /* 0xffffffff15087810 */
/* 0x000fe20007ffe0ff */
/*0220*/ IMAD.WIDE.U32 R28, R28, R13, c[0x0][0x160] ; /* 0x000058001c1c7625 */
/* 0x000fc800078e000d */
/*0230*/ IMAD.WIDE.U32 R14, R24, R13.reuse, c[0x0][0x168] ; /* 0x00005a00180e7625 */
/* 0x080fe400078e000d */
/*0240*/ LDG.E R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ea4000c1e1900 */
/*0250*/ IMAD.WIDE.U32 R4, R4, R13.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x080fe400078e000d */
/*0260*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ea4000c1e1900 */
/*0270*/ IMAD.WIDE.U32 R6, R26, R13.reuse, c[0x0][0x168] ; /* 0x00005a001a067625 */
/* 0x080fe400078e000d */
/*0280*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee4000c1e1900 */
/*0290*/ IMAD.WIDE.U32 R8, R8, R13, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fc400078e000d */
/*02a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ee4000c1e1900 */
/*02b0*/ IMAD.WIDE.U32 R2, R16, R13.reuse, c[0x0][0x168] ; /* 0x00005a0010027625 */
/* 0x080fe400078e000d */
/*02c0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f24000c1e1900 */
/*02d0*/ IMAD.WIDE.U32 R10, R21, R13.reuse, c[0x0][0x160] ; /* 0x00005800150a7625 */
/* 0x080fe400078e000d */
/*02e0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000f24000c1e1900 */
/*02f0*/ IMAD.WIDE.U32 R12, R22, R13, c[0x0][0x168] ; /* 0x00005a00160c7625 */
/* 0x000fc400078e000d */
/*0300*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f68000c1e1900 */
/*0310*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e1900 */
/*0320*/ IADD3 R20, R20, 0x4, RZ ; /* 0x0000000414147810 */
/* 0x000fe20007ffe0ff */
/*0330*/ IMAD R26, R19.reuse, 0x4, R26 ; /* 0x00000004131a7824 */
/* 0x040fe200078e021a */
/*0340*/ LEA R16, R19.reuse, R16, 0x2 ; /* 0x0000001013107211 */
/* 0x040fe200078e10ff */
/*0350*/ IMAD R22, R19.reuse, 0x4, R22 ; /* 0x0000000413167824 */
/* 0x040fe200078e0216 */
/*0360*/ LEA R24, R19, R24, 0x2 ; /* 0x0000001813187211 */
/* 0x000fe400078e10ff */
/*0370*/ IADD3 R21, R21, 0x4, RZ ; /* 0x0000000415157810 */
/* 0x000fe20007ffe0ff */
/*0380*/ IMAD R14, R14, R28, R25 ; /* 0x0000001c0e0e7224 */
/* 0x004fc800078e0219 */
/*0390*/ IMAD R5, R7, R4, R14 ; /* 0x0000000407057224 */
/* 0x008fe200078e020e */
/*03a0*/ IADD3 R4, R23, R20, RZ ; /* 0x0000001417047210 */
/* 0x000fc80007ffe0ff */
/*03b0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f25270 */
/*03c0*/ IMAD R5, R2, R8, R5 ; /* 0x0000000802057224 */
/* 0x010fc800078e0205 */
/*03d0*/ IMAD R25, R12, R10, R5 ; /* 0x0000000a0c197224 */
/* 0x020fd000078e0205 */
/*03e0*/ @P1 BRA 0x1e0 ; /* 0xfffffdf000001947 */
/* 0x000fea000383ffff */
/*03f0*/ @!P0 BRA 0x4d0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0400*/ IMAD R6, R20, c[0x0][0x178], R0 ; /* 0x00005e0014067a24 */
/* 0x000fe400078e0200 */
/*0410*/ IMAD R20, R17, c[0x0][0x178], R20 ; /* 0x00005e0011147a24 */
/* 0x000fe400078e0214 */
/*0420*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x000fca0000000f00 */
/*0430*/ IMAD.WIDE.U32 R2, R20, R5, c[0x0][0x160] ; /* 0x0000580014027625 */
/* 0x000fc800078e0005 */
/*0440*/ IMAD.WIDE.U32 R4, R6, R5, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fe400078e0005 */
/*0450*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0460*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0470*/ IADD3 R18, R18, -0x1, RZ ; /* 0xffffffff12127810 */
/* 0x000fe40007ffe0ff */
/*0480*/ IADD3 R20, R20, 0x1, RZ ; /* 0x0000000114147810 */
/* 0x000fe40007ffe0ff */
/*0490*/ ISETP.NE.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fc40003f05270 */
/*04a0*/ IADD3 R6, R6, c[0x0][0x178], RZ ; /* 0x00005e0006067a10 */
/* 0x000fe20007ffe0ff */
/*04b0*/ IMAD R25, R4, R2, R25 ; /* 0x0000000204197224 */
/* 0x004fd400078e0219 */
/*04c0*/ @P0 BRA 0x420 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*04d0*/ MOV R3, 0x4 ; /* 0x0000000400037802 */
/* 0x000fe20000000f00 */
/*04e0*/ IMAD R2, R17, c[0x0][0x178], R0 ; /* 0x00005e0011027a24 */
/* 0x000fc800078e0200 */
/*04f0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0203 */
/*0500*/ STG.E [R2.64], R25 ; /* 0x0000001902007986 */
/* 0x000fe2000c101904 */
/*0510*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0520*/ BRA 0x520; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 32
extern "C" {
__global__ void mul_matrix(int *A, int *B, int *C, int n){
unsigned int i;
int product = 0;
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
if(row < n && col < n){
for (i = 0; i < n; i++)
product += A[row * n + i] * B[i * n + col];
C[row*n + col] = product;
}
}
// CUDA code here
int cuda_matrixMul(int *a_h, int *b_h, int *c_h, int N, int device_id){
cudaError_t err;
int *a_d, *b_d, *c_d;
size_t size = N * N * sizeof (int);
// Test 300MB
//size_t size = 314572800;
printf("C: device id >> %d\n", device_id);
cudaSetDevice(device_id);
printf("C: Allocate GPU Memory1\n");
// allocate memory in the GPU device for a, b and c
err = cudaMalloc((void **) & a_d, size);
if (err != cudaSuccess){
printf("CUDA error(1): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory2\n");
err = cudaMalloc((void **) & b_d, size);
if (err != cudaSuccess){
printf("CUDA error(2): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory3\n");
err = cudaMalloc((void **) & c_d, size);
if (err != cudaSuccess){
printf("CUDA error(3): %s\n", cudaGetErrorString(err));
exit(-1);
}
size = N * N * sizeof (int);
// copy from host to GPU device
printf("C: Memory Copy1\n");
err = cudaMemcpy(a_d, a_h, size, cudaMemcpyHostToDevice);
if (err != cudaSuccess){
printf("CUDA error(4): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Memory Copy2\n");
err = cudaMemcpy(b_d, b_h, size, cudaMemcpyHostToDevice);
if (err != cudaSuccess){
printf("CUDA error(5): %s\n", cudaGetErrorString(err));
exit(-1);
}
// do calculations on device
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((N + BLOCK_SIZE - 1) / BLOCK_SIZE, (N + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Launch GPU
printf("C: Launch\n");
mul_matrix<<<grid, block>>>(a_d, b_d, c_d, N);
printf("C: Memory Copy\n");
cudaMemcpy(c_h, c_d, size, cudaMemcpyDeviceToHost);
cudaFree(a_d);
cudaFree(b_d);
cudaFree(c_d);
return N;
}
} | .file "tmpxft_00050f02_00000000-6_kernel_code.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
.type _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq mul_matrix(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
.globl mul_matrix
.type mul_matrix, @function
mul_matrix:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size mul_matrix, .-mul_matrix
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "C: device id >> %d\n"
.LC1:
.string "C: Allocate GPU Memory1\n"
.LC2:
.string "CUDA error(1): %s\n"
.LC3:
.string "C: Allocate GPU Memory2\n"
.LC4:
.string "CUDA error(2): %s\n"
.LC5:
.string "C: Allocate GPU Memory3\n"
.LC6:
.string "CUDA error(3): %s\n"
.LC7:
.string "C: Memory Copy1\n"
.LC8:
.string "CUDA error(4): %s\n"
.LC9:
.string "C: Memory Copy2\n"
.LC10:
.string "CUDA error(5): %s\n"
.LC11:
.string "C: Launch\n"
.LC12:
.string "C: Memory Copy\n"
.text
.globl cuda_matrixMul
.type cuda_matrixMul, @function
cuda_matrixMul:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r15
movq %rsi, %r14
movq %rdx, %r12
movl %ecx, %ebp
movl %r8d, %r13d
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %ecx, %ebx
imull %ecx, %ebx
movslq %ebx, %rbx
salq $2, %rbx
movl %r8d, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl %r13d, %edi
call cudaSetDevice@PLT
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L20
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L21
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L22
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r15, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L23
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L24
movl $32, 32(%rsp)
movl $32, 36(%rsp)
movl $1, 40(%rsp)
leal 62(%rbp), %eax
movl %ebp, %edx
addl $31, %edx
cmovns %edx, %eax
sarl $5, %eax
movl %eax, 44(%rsp)
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 44(%rsp), %rdi
movl 52(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L25
.L17:
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L26
movl %ebp, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L21:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L22:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L23:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L24:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L25:
movl %ebp, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
jmp .L17
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size cuda_matrixMul, .-cuda_matrixMul
.section .rodata.str1.1
.LC13:
.string "mul_matrix"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq mul_matrix(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 32
extern "C" {
__global__ void mul_matrix(int *A, int *B, int *C, int n){
unsigned int i;
int product = 0;
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
if(row < n && col < n){
for (i = 0; i < n; i++)
product += A[row * n + i] * B[i * n + col];
C[row*n + col] = product;
}
}
// CUDA code here
int cuda_matrixMul(int *a_h, int *b_h, int *c_h, int N, int device_id){
cudaError_t err;
int *a_d, *b_d, *c_d;
size_t size = N * N * sizeof (int);
// Test 300MB
//size_t size = 314572800;
printf("C: device id >> %d\n", device_id);
cudaSetDevice(device_id);
printf("C: Allocate GPU Memory1\n");
// allocate memory in the GPU device for a, b and c
err = cudaMalloc((void **) & a_d, size);
if (err != cudaSuccess){
printf("CUDA error(1): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory2\n");
err = cudaMalloc((void **) & b_d, size);
if (err != cudaSuccess){
printf("CUDA error(2): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory3\n");
err = cudaMalloc((void **) & c_d, size);
if (err != cudaSuccess){
printf("CUDA error(3): %s\n", cudaGetErrorString(err));
exit(-1);
}
size = N * N * sizeof (int);
// copy from host to GPU device
printf("C: Memory Copy1\n");
err = cudaMemcpy(a_d, a_h, size, cudaMemcpyHostToDevice);
if (err != cudaSuccess){
printf("CUDA error(4): %s\n", cudaGetErrorString(err));
exit(-1);
}
printf("C: Memory Copy2\n");
err = cudaMemcpy(b_d, b_h, size, cudaMemcpyHostToDevice);
if (err != cudaSuccess){
printf("CUDA error(5): %s\n", cudaGetErrorString(err));
exit(-1);
}
// do calculations on device
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((N + BLOCK_SIZE - 1) / BLOCK_SIZE, (N + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Launch GPU
printf("C: Launch\n");
mul_matrix<<<grid, block>>>(a_d, b_d, c_d, N);
printf("C: Memory Copy\n");
cudaMemcpy(c_h, c_d, size, cudaMemcpyDeviceToHost);
cudaFree(a_d);
cudaFree(b_d);
cudaFree(c_d);
return N;
}
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 32
extern "C" {
__global__ void mul_matrix(int *A, int *B, int *C, int n){
unsigned int i;
int product = 0;
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
if(row < n && col < n){
for (i = 0; i < n; i++)
product += A[row * n + i] * B[i * n + col];
C[row*n + col] = product;
}
}
// CUDA code here
int cuda_matrixMul(int *a_h, int *b_h, int *c_h, int N, int device_id){
hipError_t err;
int *a_d, *b_d, *c_d;
size_t size = N * N * sizeof (int);
// Test 300MB
//size_t size = 314572800;
printf("C: device id >> %d\n", device_id);
hipSetDevice(device_id);
printf("C: Allocate GPU Memory1\n");
// allocate memory in the GPU device for a, b and c
err = hipMalloc((void **) & a_d, size);
if (err != hipSuccess){
printf("CUDA error(1): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory2\n");
err = hipMalloc((void **) & b_d, size);
if (err != hipSuccess){
printf("CUDA error(2): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory3\n");
err = hipMalloc((void **) & c_d, size);
if (err != hipSuccess){
printf("CUDA error(3): %s\n", hipGetErrorString(err));
exit(-1);
}
size = N * N * sizeof (int);
// copy from host to GPU device
printf("C: Memory Copy1\n");
err = hipMemcpy(a_d, a_h, size, hipMemcpyHostToDevice);
if (err != hipSuccess){
printf("CUDA error(4): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Memory Copy2\n");
err = hipMemcpy(b_d, b_h, size, hipMemcpyHostToDevice);
if (err != hipSuccess){
printf("CUDA error(5): %s\n", hipGetErrorString(err));
exit(-1);
}
// do calculations on device
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((N + BLOCK_SIZE - 1) / BLOCK_SIZE, (N + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Launch GPU
printf("C: Launch\n");
mul_matrix<<<grid, block>>>(a_d, b_d, c_d, N);
printf("C: Memory Copy\n");
hipMemcpy(c_h, c_d, size, hipMemcpyDeviceToHost);
hipFree(a_d);
hipFree(b_d);
hipFree(c_d);
return N;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 32
extern "C" {
__global__ void mul_matrix(int *A, int *B, int *C, int n){
unsigned int i;
int product = 0;
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
if(row < n && col < n){
for (i = 0; i < n; i++)
product += A[row * n + i] * B[i * n + col];
C[row*n + col] = product;
}
}
// CUDA code here
int cuda_matrixMul(int *a_h, int *b_h, int *c_h, int N, int device_id){
hipError_t err;
int *a_d, *b_d, *c_d;
size_t size = N * N * sizeof (int);
// Test 300MB
//size_t size = 314572800;
printf("C: device id >> %d\n", device_id);
hipSetDevice(device_id);
printf("C: Allocate GPU Memory1\n");
// allocate memory in the GPU device for a, b and c
err = hipMalloc((void **) & a_d, size);
if (err != hipSuccess){
printf("CUDA error(1): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory2\n");
err = hipMalloc((void **) & b_d, size);
if (err != hipSuccess){
printf("CUDA error(2): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory3\n");
err = hipMalloc((void **) & c_d, size);
if (err != hipSuccess){
printf("CUDA error(3): %s\n", hipGetErrorString(err));
exit(-1);
}
size = N * N * sizeof (int);
// copy from host to GPU device
printf("C: Memory Copy1\n");
err = hipMemcpy(a_d, a_h, size, hipMemcpyHostToDevice);
if (err != hipSuccess){
printf("CUDA error(4): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Memory Copy2\n");
err = hipMemcpy(b_d, b_h, size, hipMemcpyHostToDevice);
if (err != hipSuccess){
printf("CUDA error(5): %s\n", hipGetErrorString(err));
exit(-1);
}
// do calculations on device
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((N + BLOCK_SIZE - 1) / BLOCK_SIZE, (N + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Launch GPU
printf("C: Launch\n");
mul_matrix<<<grid, block>>>(a_d, b_d, c_d, N);
printf("C: Memory Copy\n");
hipMemcpy(c_h, c_d, size, hipMemcpyDeviceToHost);
hipFree(a_d);
hipFree(b_d);
hipFree(c_d);
return N;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected mul_matrix
.globl mul_matrix
.p2align 8
.type mul_matrix,@function
mul_matrix:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_5
v_mov_b32_e32 v2, 0
s_cmp_eq_u32 s2, 0
s_mov_b32 s3, 0
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v5, v0, s2
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v1
.p2align 6
.LBB0_3:
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, s3, v5
s_add_i32 s3, s3, 1
s_cmp_lg_u32 s2, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mov_b32_e32 v4, v7
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[8:9], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
v_add_co_u32 v8, vcc_lo, s6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
global_load_b32 v4, v[6:7], off
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v8, v4, v[2:3]
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v3, s2, v3
s_cbranch_scc1 .LBB0_3
.LBB0_4:
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v0, s2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel mul_matrix
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size mul_matrix, .Lfunc_end0-mul_matrix
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: mul_matrix
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: mul_matrix.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define BLOCK_SIZE 32
extern "C" {
__global__ void mul_matrix(int *A, int *B, int *C, int n){
unsigned int i;
int product = 0;
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
if(row < n && col < n){
for (i = 0; i < n; i++)
product += A[row * n + i] * B[i * n + col];
C[row*n + col] = product;
}
}
// CUDA code here
int cuda_matrixMul(int *a_h, int *b_h, int *c_h, int N, int device_id){
hipError_t err;
int *a_d, *b_d, *c_d;
size_t size = N * N * sizeof (int);
// Test 300MB
//size_t size = 314572800;
printf("C: device id >> %d\n", device_id);
hipSetDevice(device_id);
printf("C: Allocate GPU Memory1\n");
// allocate memory in the GPU device for a, b and c
err = hipMalloc((void **) & a_d, size);
if (err != hipSuccess){
printf("CUDA error(1): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory2\n");
err = hipMalloc((void **) & b_d, size);
if (err != hipSuccess){
printf("CUDA error(2): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Allocate GPU Memory3\n");
err = hipMalloc((void **) & c_d, size);
if (err != hipSuccess){
printf("CUDA error(3): %s\n", hipGetErrorString(err));
exit(-1);
}
size = N * N * sizeof (int);
// copy from host to GPU device
printf("C: Memory Copy1\n");
err = hipMemcpy(a_d, a_h, size, hipMemcpyHostToDevice);
if (err != hipSuccess){
printf("CUDA error(4): %s\n", hipGetErrorString(err));
exit(-1);
}
printf("C: Memory Copy2\n");
err = hipMemcpy(b_d, b_h, size, hipMemcpyHostToDevice);
if (err != hipSuccess){
printf("CUDA error(5): %s\n", hipGetErrorString(err));
exit(-1);
}
// do calculations on device
dim3 block(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((N + BLOCK_SIZE - 1) / BLOCK_SIZE, (N + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Launch GPU
printf("C: Launch\n");
mul_matrix<<<grid, block>>>(a_d, b_d, c_d, N);
printf("C: Memory Copy\n");
hipMemcpy(c_h, c_d, size, hipMemcpyDeviceToHost);
hipFree(a_d);
hipFree(b_d);
hipFree(c_d);
return N;
}
} | .text
.file "kernel_code.hip"
.globl __device_stub__mul_matrix # -- Begin function __device_stub__mul_matrix
.p2align 4, 0x90
.type __device_stub__mul_matrix,@function
__device_stub__mul_matrix: # @__device_stub__mul_matrix
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $mul_matrix, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size __device_stub__mul_matrix, .Lfunc_end0-__device_stub__mul_matrix
.cfi_endproc
# -- End function
.globl cuda_matrixMul # -- Begin function cuda_matrixMul
.p2align 4, 0x90
.type cuda_matrixMul,@function
cuda_matrixMul: # @cuda_matrixMul
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r8d, %ebp
movl %ecx, %ebx
movq %rdx, %r14
movq %rsi, %r12
movq %rdi, %r13
movl %ecx, %r15d
imull %r15d, %r15d
shlq $2, %r15
movl $.L.str, %edi
movl %r8d, %esi
xorl %eax, %eax
callq printf
movl %ebp, %edi
callq hipSetDevice
movl $.Lstr, %edi
callq puts@PLT
leaq 24(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_1
# %bb.3:
movl $.Lstr.1, %edi
callq puts@PLT
leaq 16(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_4
# %bb.5:
movl $.Lstr.2, %edi
callq puts@PLT
leaq 8(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.7:
movl $.Lstr.3, %edi
callq puts@PLT
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_8
# %bb.9:
movl $.Lstr.4, %edi
callq puts@PLT
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_10
# %bb.11:
leal 31(%rbx), %eax
leal 62(%rbx), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $5, %ecx
movq %rcx, %r12
shlq $32, %r12
orq %rcx, %r12
movl $.Lstr.5, %edi
callq puts@PLT
movabsq $137438953504, %rdx # imm = 0x2000000020
movq %r12, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %ebx, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $mul_matrix, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_13:
movl $.Lstr.6, %edi
callq puts@PLT
movq 8(%rsp), %rsi
movq %r14, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movl %ebx, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_1:
.cfi_def_cfa_offset 208
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.2, %edi
jmp .LBB1_2
.LBB1_4:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %edi
jmp .LBB1_2
.LBB1_6:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %edi
jmp .LBB1_2
.LBB1_8:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.8, %edi
jmp .LBB1_2
.LBB1_10:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.10, %edi
.LBB1_2:
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end1:
.size cuda_matrixMul, .Lfunc_end1-cuda_matrixMul
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $mul_matrix, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type mul_matrix,@object # @mul_matrix
.section .rodata,"a",@progbits
.globl mul_matrix
.p2align 3, 0x0
mul_matrix:
.quad __device_stub__mul_matrix
.size mul_matrix, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "C: device id >> %d\n"
.size .L.str, 20
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "CUDA error(1): %s\n"
.size .L.str.2, 19
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "CUDA error(2): %s\n"
.size .L.str.4, 19
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "CUDA error(3): %s\n"
.size .L.str.6, 19
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "CUDA error(4): %s\n"
.size .L.str.8, 19
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "CUDA error(5): %s\n"
.size .L.str.10, 19
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "mul_matrix"
.size .L__unnamed_1, 11
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "C: Allocate GPU Memory1"
.size .Lstr, 24
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "C: Allocate GPU Memory2"
.size .Lstr.1, 24
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "C: Allocate GPU Memory3"
.size .Lstr.2, 24
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "C: Memory Copy1"
.size .Lstr.3, 16
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz "C: Memory Copy2"
.size .Lstr.4, 16
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "C: Launch"
.size .Lstr.5, 10
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "C: Memory Copy"
.size .Lstr.6, 15
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__mul_matrix
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym mul_matrix
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : mul_matrix
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0020*/ S2R R26, SR_TID.X ; /* 0x00000000001a7919 */
/* 0x000e280000002100 */
/*0030*/ S2R R17, SR_CTAID.Y ; /* 0x0000000000117919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R3, c[0x0][0x0], R26 ; /* 0x0000000003007a24 */
/* 0x001fca00078e021a */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R17, R17, c[0x0][0x4], R2 ; /* 0x0000010011117a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GE.OR P0, PT, R17, c[0x0][0x178], P0 ; /* 0x00005e0011007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */
/* 0x000fe20003f05270 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R25, -RZ, RZ, 0, 0 ; /* 0x00000000ff197435 */
/* 0x000fd600000001ff */
/*00d0*/ @!P0 BRA 0x4d0 ; /* 0x000003f000008947 */
/* 0x000fea0003800000 */
/*00e0*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff137624 */
/* 0x000fe200078e00ff */
/*00f0*/ MOV R25, RZ ; /* 0x000000ff00197202 */
/* 0x000fe20000000f00 */
/*0100*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff147224 */
/* 0x000fc600078e00ff */
/*0110*/ IADD3 R2, R19.reuse, -0x1, RZ ; /* 0xffffffff13027810 */
/* 0x040fe40007ffe0ff */
/*0120*/ LOP3.LUT R18, R19, 0x3, RZ, 0xc0, !PT ; /* 0x0000000313127812 */
/* 0x000fe400078ec0ff */
/*0130*/ ISETP.GE.U32.AND P1, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f26070 */
/*0140*/ ISETP.NE.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fd60003f05270 */
/*0150*/ @!P1 BRA 0x3f0 ; /* 0x0000029000009947 */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R26, R26, c[0x0][0x178], RZ ; /* 0x00005e001a1a7a10 */
/* 0x000fe20007ffe0ff */
/*0170*/ HFMA2.MMA R25, -RZ, RZ, 0, 0 ; /* 0x00000000ff197435 */
/* 0x000fe200000001ff */
/*0180*/ IMAD R21, R17, R19, 0x3 ; /* 0x0000000311157424 */
/* 0x000fe200078e0213 */
/*0190*/ LEA R16, R19.reuse, R0, 0x1 ; /* 0x0000000013107211 */
/* 0x040fe200078e08ff */
/*01a0*/ IMAD R22, R19, 0x3, R0 ; /* 0x0000000313167824 */
/* 0x000fe200078e0200 */
/*01b0*/ IADD3 R23, R18, -c[0x0][0x178], RZ ; /* 0x80005e0012177a10 */
/* 0x000fe20007ffe0ff */
/*01c0*/ IMAD R26, R3, c[0x0][0x0], R26 ; /* 0x00000000031a7a24 */
/* 0x000fe400078e021a */
/*01d0*/ IMAD.MOV.U32 R24, RZ, RZ, R0 ; /* 0x000000ffff187224 */
/* 0x000fe400078e0000 */
/*01e0*/ IADD3 R28, R21, -0x3, RZ ; /* 0xfffffffd151c7810 */
/* 0x000fe40007ffe0ff */
/*01f0*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */
/* 0x000fc40000000f00 */
/*0200*/ IADD3 R4, R21.reuse, -0x2, RZ ; /* 0xfffffffe15047810 */
/* 0x040fe40007ffe0ff */
/*0210*/ IADD3 R8, R21, -0x1, RZ ; /* 0xffffffff15087810 */
/* 0x000fe20007ffe0ff */
/*0220*/ IMAD.WIDE.U32 R28, R28, R13, c[0x0][0x160] ; /* 0x000058001c1c7625 */
/* 0x000fc800078e000d */
/*0230*/ IMAD.WIDE.U32 R14, R24, R13.reuse, c[0x0][0x168] ; /* 0x00005a00180e7625 */
/* 0x080fe400078e000d */
/*0240*/ LDG.E R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ea4000c1e1900 */
/*0250*/ IMAD.WIDE.U32 R4, R4, R13.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x080fe400078e000d */
/*0260*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ea4000c1e1900 */
/*0270*/ IMAD.WIDE.U32 R6, R26, R13.reuse, c[0x0][0x168] ; /* 0x00005a001a067625 */
/* 0x080fe400078e000d */
/*0280*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee4000c1e1900 */
/*0290*/ IMAD.WIDE.U32 R8, R8, R13, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fc400078e000d */
/*02a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ee4000c1e1900 */
/*02b0*/ IMAD.WIDE.U32 R2, R16, R13.reuse, c[0x0][0x168] ; /* 0x00005a0010027625 */
/* 0x080fe400078e000d */
/*02c0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f24000c1e1900 */
/*02d0*/ IMAD.WIDE.U32 R10, R21, R13.reuse, c[0x0][0x160] ; /* 0x00005800150a7625 */
/* 0x080fe400078e000d */
/*02e0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000f24000c1e1900 */
/*02f0*/ IMAD.WIDE.U32 R12, R22, R13, c[0x0][0x168] ; /* 0x00005a00160c7625 */
/* 0x000fc400078e000d */
/*0300*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f68000c1e1900 */
/*0310*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e1900 */
/*0320*/ IADD3 R20, R20, 0x4, RZ ; /* 0x0000000414147810 */
/* 0x000fe20007ffe0ff */
/*0330*/ IMAD R26, R19.reuse, 0x4, R26 ; /* 0x00000004131a7824 */
/* 0x040fe200078e021a */
/*0340*/ LEA R16, R19.reuse, R16, 0x2 ; /* 0x0000001013107211 */
/* 0x040fe200078e10ff */
/*0350*/ IMAD R22, R19.reuse, 0x4, R22 ; /* 0x0000000413167824 */
/* 0x040fe200078e0216 */
/*0360*/ LEA R24, R19, R24, 0x2 ; /* 0x0000001813187211 */
/* 0x000fe400078e10ff */
/*0370*/ IADD3 R21, R21, 0x4, RZ ; /* 0x0000000415157810 */
/* 0x000fe20007ffe0ff */
/*0380*/ IMAD R14, R14, R28, R25 ; /* 0x0000001c0e0e7224 */
/* 0x004fc800078e0219 */
/*0390*/ IMAD R5, R7, R4, R14 ; /* 0x0000000407057224 */
/* 0x008fe200078e020e */
/*03a0*/ IADD3 R4, R23, R20, RZ ; /* 0x0000001417047210 */
/* 0x000fc80007ffe0ff */
/*03b0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f25270 */
/*03c0*/ IMAD R5, R2, R8, R5 ; /* 0x0000000802057224 */
/* 0x010fc800078e0205 */
/*03d0*/ IMAD R25, R12, R10, R5 ; /* 0x0000000a0c197224 */
/* 0x020fd000078e0205 */
/*03e0*/ @P1 BRA 0x1e0 ; /* 0xfffffdf000001947 */
/* 0x000fea000383ffff */
/*03f0*/ @!P0 BRA 0x4d0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0400*/ IMAD R6, R20, c[0x0][0x178], R0 ; /* 0x00005e0014067a24 */
/* 0x000fe400078e0200 */
/*0410*/ IMAD R20, R17, c[0x0][0x178], R20 ; /* 0x00005e0011147a24 */
/* 0x000fe400078e0214 */
/*0420*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x000fca0000000f00 */
/*0430*/ IMAD.WIDE.U32 R2, R20, R5, c[0x0][0x160] ; /* 0x0000580014027625 */
/* 0x000fc800078e0005 */
/*0440*/ IMAD.WIDE.U32 R4, R6, R5, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fe400078e0005 */
/*0450*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0460*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0470*/ IADD3 R18, R18, -0x1, RZ ; /* 0xffffffff12127810 */
/* 0x000fe40007ffe0ff */
/*0480*/ IADD3 R20, R20, 0x1, RZ ; /* 0x0000000114147810 */
/* 0x000fe40007ffe0ff */
/*0490*/ ISETP.NE.AND P0, PT, R18, RZ, PT ; /* 0x000000ff1200720c */
/* 0x000fc40003f05270 */
/*04a0*/ IADD3 R6, R6, c[0x0][0x178], RZ ; /* 0x00005e0006067a10 */
/* 0x000fe20007ffe0ff */
/*04b0*/ IMAD R25, R4, R2, R25 ; /* 0x0000000204197224 */
/* 0x004fd400078e0219 */
/*04c0*/ @P0 BRA 0x420 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*04d0*/ MOV R3, 0x4 ; /* 0x0000000400037802 */
/* 0x000fe20000000f00 */
/*04e0*/ IMAD R2, R17, c[0x0][0x178], R0 ; /* 0x00005e0011027a24 */
/* 0x000fc800078e0200 */
/*04f0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0203 */
/*0500*/ STG.E [R2.64], R25 ; /* 0x0000001902007986 */
/* 0x000fe2000c101904 */
/*0510*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0520*/ BRA 0x520; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected mul_matrix
.globl mul_matrix
.p2align 8
.type mul_matrix,@function
mul_matrix:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_5
v_mov_b32_e32 v2, 0
s_cmp_eq_u32 s2, 0
s_mov_b32 s3, 0
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v5, v0, s2
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v1
.p2align 6
.LBB0_3:
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, s3, v5
s_add_i32 s3, s3, 1
s_cmp_lg_u32 s2, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mov_b32_e32 v4, v7
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[8:9], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
v_add_co_u32 v8, vcc_lo, s6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
global_load_b32 v4, v[6:7], off
global_load_b32 v8, v[8:9], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v8, v4, v[2:3]
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v3, s2, v3
s_cbranch_scc1 .LBB0_3
.LBB0_4:
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v0, s2, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel mul_matrix
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size mul_matrix, .Lfunc_end0-mul_matrix
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: mul_matrix
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: mul_matrix.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00050f02_00000000-6_kernel_code.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
.type _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq mul_matrix(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
.globl mul_matrix
.type mul_matrix, @function
mul_matrix:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size mul_matrix, .-mul_matrix
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "C: device id >> %d\n"
.LC1:
.string "C: Allocate GPU Memory1\n"
.LC2:
.string "CUDA error(1): %s\n"
.LC3:
.string "C: Allocate GPU Memory2\n"
.LC4:
.string "CUDA error(2): %s\n"
.LC5:
.string "C: Allocate GPU Memory3\n"
.LC6:
.string "CUDA error(3): %s\n"
.LC7:
.string "C: Memory Copy1\n"
.LC8:
.string "CUDA error(4): %s\n"
.LC9:
.string "C: Memory Copy2\n"
.LC10:
.string "CUDA error(5): %s\n"
.LC11:
.string "C: Launch\n"
.LC12:
.string "C: Memory Copy\n"
.text
.globl cuda_matrixMul
.type cuda_matrixMul, @function
cuda_matrixMul:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r15
movq %rsi, %r14
movq %rdx, %r12
movl %ecx, %ebp
movl %r8d, %r13d
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %ecx, %ebx
imull %ecx, %ebx
movslq %ebx, %rbx
salq $2, %rbx
movl %r8d, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl %r13d, %edi
call cudaSetDevice@PLT
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 8(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L20
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L21
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L22
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r15, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L23
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r14, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L24
movl $32, 32(%rsp)
movl $32, 36(%rsp)
movl $1, 40(%rsp)
leal 62(%rbp), %eax
movl %ebp, %edx
addl $31, %edx
cmovns %edx, %eax
sarl $5, %eax
movl %eax, 44(%rsp)
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 40(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 32(%rsp), %rdx
movq 44(%rsp), %rdi
movl 52(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L25
.L17:
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L26
movl %ebp, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L21:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L22:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L23:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L24:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L25:
movl %ebp, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z35__device_stub__Z10mul_matrixPiS_S_iPiS_S_i
jmp .L17
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size cuda_matrixMul, .-cuda_matrixMul
.section .rodata.str1.1
.LC13:
.string "mul_matrix"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq mul_matrix(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernel_code.hip"
.globl __device_stub__mul_matrix # -- Begin function __device_stub__mul_matrix
.p2align 4, 0x90
.type __device_stub__mul_matrix,@function
__device_stub__mul_matrix: # @__device_stub__mul_matrix
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $mul_matrix, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size __device_stub__mul_matrix, .Lfunc_end0-__device_stub__mul_matrix
.cfi_endproc
# -- End function
.globl cuda_matrixMul # -- Begin function cuda_matrixMul
.p2align 4, 0x90
.type cuda_matrixMul,@function
cuda_matrixMul: # @cuda_matrixMul
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r8d, %ebp
movl %ecx, %ebx
movq %rdx, %r14
movq %rsi, %r12
movq %rdi, %r13
movl %ecx, %r15d
imull %r15d, %r15d
shlq $2, %r15
movl $.L.str, %edi
movl %r8d, %esi
xorl %eax, %eax
callq printf
movl %ebp, %edi
callq hipSetDevice
movl $.Lstr, %edi
callq puts@PLT
leaq 24(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_1
# %bb.3:
movl $.Lstr.1, %edi
callq puts@PLT
leaq 16(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_4
# %bb.5:
movl $.Lstr.2, %edi
callq puts@PLT
leaq 8(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.7:
movl $.Lstr.3, %edi
callq puts@PLT
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_8
# %bb.9:
movl $.Lstr.4, %edi
callq puts@PLT
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_10
# %bb.11:
leal 31(%rbx), %eax
leal 62(%rbx), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $5, %ecx
movq %rcx, %r12
shlq $32, %r12
orq %rcx, %r12
movl $.Lstr.5, %edi
callq puts@PLT
movabsq $137438953504, %rdx # imm = 0x2000000020
movq %r12, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl %ebx, 36(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $mul_matrix, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_13:
movl $.Lstr.6, %edi
callq puts@PLT
movq 8(%rsp), %rsi
movq %r14, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movl %ebx, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_1:
.cfi_def_cfa_offset 208
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.2, %edi
jmp .LBB1_2
.LBB1_4:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.4, %edi
jmp .LBB1_2
.LBB1_6:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %edi
jmp .LBB1_2
.LBB1_8:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.8, %edi
jmp .LBB1_2
.LBB1_10:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.10, %edi
.LBB1_2:
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end1:
.size cuda_matrixMul, .Lfunc_end1-cuda_matrixMul
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $mul_matrix, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type mul_matrix,@object # @mul_matrix
.section .rodata,"a",@progbits
.globl mul_matrix
.p2align 3, 0x0
mul_matrix:
.quad __device_stub__mul_matrix
.size mul_matrix, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "C: device id >> %d\n"
.size .L.str, 20
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "CUDA error(1): %s\n"
.size .L.str.2, 19
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "CUDA error(2): %s\n"
.size .L.str.4, 19
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "CUDA error(3): %s\n"
.size .L.str.6, 19
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "CUDA error(4): %s\n"
.size .L.str.8, 19
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "CUDA error(5): %s\n"
.size .L.str.10, 19
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "mul_matrix"
.size .L__unnamed_1, 11
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "C: Allocate GPU Memory1"
.size .Lstr, 24
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "C: Allocate GPU Memory2"
.size .Lstr.1, 24
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "C: Allocate GPU Memory3"
.size .Lstr.2, 24
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "C: Memory Copy1"
.size .Lstr.3, 16
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz "C: Memory Copy2"
.size .Lstr.4, 16
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "C: Launch"
.size .Lstr.5, 10
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "C: Memory Copy"
.size .Lstr.6, 15
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__mul_matrix
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym mul_matrix
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#define THREAD_PER_BLOCK 16 // on fixe le nombre de colonnes à 16
#define COLUMNS 16
//fct gpu
__global__ void multiplication_matrix_GPU(int *a, int *b, int*c)
{
int idx = blockIdx.x * THREAD_PER_BLOCK + threadIdx.x;
int sum = 0;
__shared__ int bs[16]; // définition de la mémoire partagée
bs[threadIdx.x]= b[threadIdx.x];
//for(int j = 0; j<COLUMNS;++j,++a,++b)
// sum += (a[idx*COLUMNS+j])*(b[j]);
sum+= (a[idx*COLUMNS+0])*(bs[0]);
sum+= (a[idx*COLUMNS+1])*(bs[1]);
sum+= (a[idx*COLUMNS+2])*(bs[2]);
sum+= (a[idx*COLUMNS+3])*(bs[3]);
sum+= (a[idx*COLUMNS+4])*(bs[4]);
sum+= (a[idx*COLUMNS+5])*(bs[5]);
sum+= (a[idx*COLUMNS+6])*(bs[6]);
sum+= (a[idx*COLUMNS+7])*(bs[7]);
sum+= (a[idx*COLUMNS+8])*(bs[8]);
sum+= (a[idx*COLUMNS+9])*(bs[9]);
sum+= (a[idx*COLUMNS+10])*(bs[10]);
sum+= (a[idx*COLUMNS+11])*(bs[11]);
sum+= (a[idx*COLUMNS+12])*(bs[12]);
sum+= (a[idx*COLUMNS+13])*(bs[13]);
sum+= (a[idx*COLUMNS+14])*(bs[14]);
sum+= (a[idx*COLUMNS+15])*(bs[15]);
c[idx]=sum;
__syncthreads();
}
int main(int agrc, char * argv[])
{
unsigned int rows = atoi(argv[1]), i, j; // il y a un malloc contenant ligne et colonnes --> Matrice A et un malloc contenant que colonne -> vecteur B
int * a_h = (int *) malloc(rows * COLUMNS * sizeof(int)), * b_h = (int *) malloc(COLUMNS * sizeof(int)), * c1_h = (int *) malloc(rows * sizeof(int)), * c2_h = (int *) malloc(rows * sizeof(int));
int *a_d, *b_d, *c_d;
//allocation sur GPU
cudaSetDevice (0);
cudaMalloc ((void**) &a_d , rows * COLUMNS * sizeof(int));
cudaMalloc ((void**) &b_d , COLUMNS * sizeof(int));
cudaMalloc ((void**) &c_d , rows * sizeof(int));
//copie vers GPU
cudaMemcpy (a_d , a_h , rows * COLUMNS *sizeof(int), cudaMemcpyHostToDevice ); // on copie les données du CPU vers le GPU
cudaMemcpy (b_d , b_h , COLUMNS * sizeof(int), cudaMemcpyHostToDevice );
unsigned long long ref1, ref2;
unsigned long long diffH = 0, diffD = 0;
struct timeval tim;
//remplissage de la matrice
for(i=0;i<COLUMNS*rows;++i){
if(i<COLUMNS){
b_h[i] = i+1;
}
a_h[i] = rand()%(COLUMNS*rows);
}
//multiplication sur CPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
int * a = a_h, *b, *c=c1_h;
for(i = 0; i<rows; ++i){
c1_h[i] = 0;
for(j = 0; j<COLUMNS;++j,++a,++b)
c1_h[i] += (a_h[i*COLUMNS+j])*(b_h[j]);
}
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffH+=ref2-ref1; // différence des timing
//multiplication sur GPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
// EXECUTION GPU c'est ici que nous allons travailler
int blocks = rows/THREAD_PER_BLOCK;
multiplication_matrix_GPU<<<blocks,THREAD_PER_BLOCK>>>(a_d, b_d, c_d);
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffD+=ref2-ref1;
cudaMemcpy(c2_h , c_d , rows * sizeof(int), cudaMemcpyDeviceToHost);
//vérification des résultats et nettoyage
int ok = 1;
for(i=0;i<10;++i)
if(c1_h[i]!=c2_h[i]){
//ok = 0;
printf("Différence : %d != %d\n", c1_h[i], c2_h[i]);
}
if(ok)
printf("Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n", diffH, diffD);
cudaFree(a_d);
cudaFree(b_d);
cudaFree(c_d);
free(a_h);
free(b_h);
free(c1_h);
free(c2_h);
} | code for sm_80
Function : _Z25multiplication_matrix_GPUPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R0, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff007435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e6e0000002500 */
/*0050*/ IMAD.WIDE.U32 R4, R11, R0, c[0x0][0x168] ; /* 0x00005a000b047625 */
/* 0x001fcc00078e0000 */
/*0060*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0070*/ LEA R3, R3, R11, 0x4 ; /* 0x0000000b03037211 */
/* 0x002fc800078e20ff */
/*0080*/ SHF.L.U32 R27, R3, 0x4, RZ ; /* 0x00000004031b7819 */
/* 0x000fca00000006ff */
/*0090*/ IMAD.WIDE R26, R27, R0, c[0x0][0x160] ; /* 0x000058001b1a7625 */
/* 0x000fca00078e0200 */
/*00a0*/ LDG.E R7, [R26.64] ; /* 0x000000041a077981 */
/* 0x000ee8000c1e1900 */
/*00b0*/ LDG.E R8, [R26.64+0x4] ; /* 0x000004041a087981 */
/* 0x000f28000c1e1900 */
/*00c0*/ LDG.E R9, [R26.64+0x8] ; /* 0x000008041a097981 */
/* 0x000f68000c1e1900 */
/*00d0*/ LDG.E R28, [R26.64+0xc] ; /* 0x00000c041a1c7981 */
/* 0x000ee8000c1e1900 */
/*00e0*/ LDG.E R29, [R26.64+0x10] ; /* 0x000010041a1d7981 */
/* 0x000ee8000c1e1900 */
/*00f0*/ LDG.E R2, [R26.64+0x14] ; /* 0x000014041a027981 */
/* 0x000ee8000c1e1900 */
/*0100*/ LDG.E R17, [R26.64+0x18] ; /* 0x000018041a117981 */
/* 0x000ee8000c1e1900 */
/*0110*/ LDG.E R16, [R26.64+0x1c] ; /* 0x00001c041a107981 */
/* 0x000ee8000c1e1900 */
/*0120*/ LDG.E R19, [R26.64+0x20] ; /* 0x000020041a137981 */
/* 0x000f28000c1e1900 */
/*0130*/ LDG.E R18, [R26.64+0x24] ; /* 0x000024041a127981 */
/* 0x000f68000c1e1900 */
/*0140*/ LDG.E R21, [R26.64+0x28] ; /* 0x000028041a157981 */
/* 0x000f68000c1e1900 */
/*0150*/ LDG.E R20, [R26.64+0x2c] ; /* 0x00002c041a147981 */
/* 0x000f68000c1e1900 */
/*0160*/ LDG.E R23, [R26.64+0x30] ; /* 0x000030041a177981 */
/* 0x000f68000c1e1900 */
/*0170*/ LDG.E R22, [R26.64+0x34] ; /* 0x000034041a167981 */
/* 0x000f68000c1e1900 */
/*0180*/ LDG.E R25, [R26.64+0x38] ; /* 0x000038041a197981 */
/* 0x000f68000c1e1900 */
/*0190*/ LDG.E R24, [R26.64+0x3c] ; /* 0x00003c041a187981 */
/* 0x000f68000c1e1900 */
/*01a0*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */
/* 0x004fe80000004800 */
/*01b0*/ LDS.128 R12, [RZ] ; /* 0x00000000ff0c7984 */
/* 0x000ee40000000c00 */
/*01c0*/ IMAD R12, R7, R12, RZ ; /* 0x0000000c070c7224 */
/* 0x008fc400078e02ff */
/*01d0*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */
/* 0x000e240000000c00 */
/*01e0*/ IMAD R8, R8, R13, R12 ; /* 0x0000000d08087224 */
/* 0x010fc800078e020c */
/*01f0*/ IMAD R14, R9, R14, R8 ; /* 0x0000000e090e7224 */
/* 0x020fe400078e0208 */
/*0200*/ LDS.128 R8, [0x20] ; /* 0x00002000ff087984 */
/* 0x000e640000000c00 */
/*0210*/ IMAD R14, R28, R15, R14 ; /* 0x0000000f1c0e7224 */
/* 0x000fc800078e020e */
/*0220*/ IMAD R29, R29, R4, R14 ; /* 0x000000041d1d7224 */
/* 0x001fe400078e020e */
/*0230*/ LDS.128 R12, [0x30] ; /* 0x00003000ff0c7984 */
/* 0x000e240000000c00 */
/*0240*/ IMAD R2, R2, R5, R29 ; /* 0x0000000502027224 */
/* 0x000fc800078e021d */
/*0250*/ IMAD R2, R17, R6, R2 ; /* 0x0000000611027224 */
/* 0x000fc800078e0202 */
/*0260*/ IMAD R2, R16, R7, R2 ; /* 0x0000000710027224 */
/* 0x000fc800078e0202 */
/*0270*/ IMAD R2, R19, R8, R2 ; /* 0x0000000813027224 */
/* 0x002fc800078e0202 */
/*0280*/ IMAD R2, R18, R9, R2 ; /* 0x0000000912027224 */
/* 0x000fc800078e0202 */
/*0290*/ IMAD R2, R21, R10, R2 ; /* 0x0000000a15027224 */
/* 0x000fc800078e0202 */
/*02a0*/ IMAD R2, R20, R11, R2 ; /* 0x0000000b14027224 */
/* 0x000fc800078e0202 */
/*02b0*/ IMAD R2, R23, R12, R2 ; /* 0x0000000c17027224 */
/* 0x001fc800078e0202 */
/*02c0*/ IMAD R2, R22, R13, R2 ; /* 0x0000000d16027224 */
/* 0x000fc800078e0202 */
/*02d0*/ IMAD R14, R25, R14, R2 ; /* 0x0000000e190e7224 */
/* 0x000fe400078e0202 */
/*02e0*/ IMAD.WIDE R2, R3, R0, c[0x0][0x170] ; /* 0x00005c0003027625 */
/* 0x000fc800078e0200 */
/*02f0*/ IMAD R15, R24, R15, R14 ; /* 0x0000000f180f7224 */
/* 0x000fca00078e020e */
/*0300*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x000fe8000c101904 */
/*0310*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0320*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0330*/ BRA 0x330; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#define THREAD_PER_BLOCK 16 // on fixe le nombre de colonnes à 16
#define COLUMNS 16
//fct gpu
__global__ void multiplication_matrix_GPU(int *a, int *b, int*c)
{
int idx = blockIdx.x * THREAD_PER_BLOCK + threadIdx.x;
int sum = 0;
__shared__ int bs[16]; // définition de la mémoire partagée
bs[threadIdx.x]= b[threadIdx.x];
//for(int j = 0; j<COLUMNS;++j,++a,++b)
// sum += (a[idx*COLUMNS+j])*(b[j]);
sum+= (a[idx*COLUMNS+0])*(bs[0]);
sum+= (a[idx*COLUMNS+1])*(bs[1]);
sum+= (a[idx*COLUMNS+2])*(bs[2]);
sum+= (a[idx*COLUMNS+3])*(bs[3]);
sum+= (a[idx*COLUMNS+4])*(bs[4]);
sum+= (a[idx*COLUMNS+5])*(bs[5]);
sum+= (a[idx*COLUMNS+6])*(bs[6]);
sum+= (a[idx*COLUMNS+7])*(bs[7]);
sum+= (a[idx*COLUMNS+8])*(bs[8]);
sum+= (a[idx*COLUMNS+9])*(bs[9]);
sum+= (a[idx*COLUMNS+10])*(bs[10]);
sum+= (a[idx*COLUMNS+11])*(bs[11]);
sum+= (a[idx*COLUMNS+12])*(bs[12]);
sum+= (a[idx*COLUMNS+13])*(bs[13]);
sum+= (a[idx*COLUMNS+14])*(bs[14]);
sum+= (a[idx*COLUMNS+15])*(bs[15]);
c[idx]=sum;
__syncthreads();
}
int main(int agrc, char * argv[])
{
unsigned int rows = atoi(argv[1]), i, j; // il y a un malloc contenant ligne et colonnes --> Matrice A et un malloc contenant que colonne -> vecteur B
int * a_h = (int *) malloc(rows * COLUMNS * sizeof(int)), * b_h = (int *) malloc(COLUMNS * sizeof(int)), * c1_h = (int *) malloc(rows * sizeof(int)), * c2_h = (int *) malloc(rows * sizeof(int));
int *a_d, *b_d, *c_d;
//allocation sur GPU
cudaSetDevice (0);
cudaMalloc ((void**) &a_d , rows * COLUMNS * sizeof(int));
cudaMalloc ((void**) &b_d , COLUMNS * sizeof(int));
cudaMalloc ((void**) &c_d , rows * sizeof(int));
//copie vers GPU
cudaMemcpy (a_d , a_h , rows * COLUMNS *sizeof(int), cudaMemcpyHostToDevice ); // on copie les données du CPU vers le GPU
cudaMemcpy (b_d , b_h , COLUMNS * sizeof(int), cudaMemcpyHostToDevice );
unsigned long long ref1, ref2;
unsigned long long diffH = 0, diffD = 0;
struct timeval tim;
//remplissage de la matrice
for(i=0;i<COLUMNS*rows;++i){
if(i<COLUMNS){
b_h[i] = i+1;
}
a_h[i] = rand()%(COLUMNS*rows);
}
//multiplication sur CPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
int * a = a_h, *b, *c=c1_h;
for(i = 0; i<rows; ++i){
c1_h[i] = 0;
for(j = 0; j<COLUMNS;++j,++a,++b)
c1_h[i] += (a_h[i*COLUMNS+j])*(b_h[j]);
}
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffH+=ref2-ref1; // différence des timing
//multiplication sur GPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
// EXECUTION GPU c'est ici que nous allons travailler
int blocks = rows/THREAD_PER_BLOCK;
multiplication_matrix_GPU<<<blocks,THREAD_PER_BLOCK>>>(a_d, b_d, c_d);
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffD+=ref2-ref1;
cudaMemcpy(c2_h , c_d , rows * sizeof(int), cudaMemcpyDeviceToHost);
//vérification des résultats et nettoyage
int ok = 1;
for(i=0;i<10;++i)
if(c1_h[i]!=c2_h[i]){
//ok = 0;
printf("Différence : %d != %d\n", c1_h[i], c2_h[i]);
}
if(ok)
printf("Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n", diffH, diffD);
cudaFree(a_d);
cudaFree(b_d);
cudaFree(c_d);
free(a_h);
free(b_h);
free(c1_h);
free(c2_h);
} | .file "tmpxft_0007d0da_00000000-6_cuda_exo_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
.type _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_, @function
_Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z25multiplication_matrix_GPUPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_, .-_Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
.globl _Z25multiplication_matrix_GPUPiS_S_
.type _Z25multiplication_matrix_GPUPiS_S_, @function
_Z25multiplication_matrix_GPUPiS_S_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z25multiplication_matrix_GPUPiS_S_, .-_Z25multiplication_matrix_GPUPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Diff\303\251rence : %d != %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movq %rax, 16(%rsp)
movl %eax, %r13d
sall $4, %r13d
movl %r13d, %eax
leaq 0(,%rax,4), %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, %rbx
movl $64, %edi
call malloc@PLT
movq %rax, %rbp
movl %r14d, %eax
leaq 0(,%rax,4), %r15
movq %r15, %rdi
call malloc@PLT
movq %rax, %r14
movq %r15, 8(%rsp)
movq %r15, %rdi
call malloc@PLT
movq %rax, %r15
movl $0, %edi
call cudaSetDevice@PLT
leaq 32(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $64, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movq 8(%rsp), %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r12, %rdx
movq %rbx, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $64, %edx
movq %rbp, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
testl %r13d, %r13d
je .L12
movl $0, %r12d
jmp .L14
.L13:
call rand@PLT
movl $0, %edx
divl %r13d
movl %edx, (%rbx,%r12,4)
addq $1, %r12
cmpl %r13d, %r12d
jnb .L12
.L14:
cmpl $15, %r12d
ja .L13
leal 1(%r12), %eax
movl %eax, 0(%rbp,%r12,4)
jmp .L13
.L12:
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
movq %rax, %r13
movq 16(%rsp), %rax
testl %eax, %eax
je .L15
movq %r14, %rdi
leal -1(%rax), %eax
leaq 4(%r14,%rax,4), %r9
movl $0, %esi
.L17:
movq %rdi, %r8
movl $0, %eax
movl $0, %ecx
.L16:
leal (%rsi,%rax), %edx
movl (%rbx,%rdx,4), %edx
imull 0(%rbp,%rax,4), %edx
addl %edx, %ecx
addq $1, %rax
cmpq $16, %rax
jne .L16
movl %ecx, (%r8)
addq $4, %rdi
addl $16, %esi
cmpq %r9, %rdi
jne .L17
.L15:
leaq 80(%rsp), %r12
movl $0, %esi
movq %r12, %rdi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
subq %r13, %rax
movq %rax, 24(%rsp)
movl $0, %esi
movq %r12, %rdi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
movq %rax, %r12
movl $16, 68(%rsp)
movl $1, 72(%rsp)
movl 16(%rsp), %eax
shrl $4, %eax
movl %eax, 56(%rsp)
movl $1, 60(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L18:
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
subq %r12, %rax
movq %rax, 16(%rsp)
movl $2, %ecx
movq 8(%rsp), %rdx
movq 48(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl $0, %r12d
leaq .LC0(%rip), %r13
jmp .L20
.L27:
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
jmp .L18
.L19:
addq $4, %r12
cmpq $40, %r12
je .L28
.L20:
movl (%r14,%r12), %edx
movl (%r15,%r12), %ecx
cmpl %ecx, %edx
je .L19
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L19
.L28:
movq 16(%rsp), %rcx
movq 24(%rsp), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %r14, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L29
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC2:
.string "_Z25multiplication_matrix_GPUPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z25multiplication_matrix_GPUPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#define THREAD_PER_BLOCK 16 // on fixe le nombre de colonnes à 16
#define COLUMNS 16
//fct gpu
__global__ void multiplication_matrix_GPU(int *a, int *b, int*c)
{
int idx = blockIdx.x * THREAD_PER_BLOCK + threadIdx.x;
int sum = 0;
__shared__ int bs[16]; // définition de la mémoire partagée
bs[threadIdx.x]= b[threadIdx.x];
//for(int j = 0; j<COLUMNS;++j,++a,++b)
// sum += (a[idx*COLUMNS+j])*(b[j]);
sum+= (a[idx*COLUMNS+0])*(bs[0]);
sum+= (a[idx*COLUMNS+1])*(bs[1]);
sum+= (a[idx*COLUMNS+2])*(bs[2]);
sum+= (a[idx*COLUMNS+3])*(bs[3]);
sum+= (a[idx*COLUMNS+4])*(bs[4]);
sum+= (a[idx*COLUMNS+5])*(bs[5]);
sum+= (a[idx*COLUMNS+6])*(bs[6]);
sum+= (a[idx*COLUMNS+7])*(bs[7]);
sum+= (a[idx*COLUMNS+8])*(bs[8]);
sum+= (a[idx*COLUMNS+9])*(bs[9]);
sum+= (a[idx*COLUMNS+10])*(bs[10]);
sum+= (a[idx*COLUMNS+11])*(bs[11]);
sum+= (a[idx*COLUMNS+12])*(bs[12]);
sum+= (a[idx*COLUMNS+13])*(bs[13]);
sum+= (a[idx*COLUMNS+14])*(bs[14]);
sum+= (a[idx*COLUMNS+15])*(bs[15]);
c[idx]=sum;
__syncthreads();
}
int main(int agrc, char * argv[])
{
unsigned int rows = atoi(argv[1]), i, j; // il y a un malloc contenant ligne et colonnes --> Matrice A et un malloc contenant que colonne -> vecteur B
int * a_h = (int *) malloc(rows * COLUMNS * sizeof(int)), * b_h = (int *) malloc(COLUMNS * sizeof(int)), * c1_h = (int *) malloc(rows * sizeof(int)), * c2_h = (int *) malloc(rows * sizeof(int));
int *a_d, *b_d, *c_d;
//allocation sur GPU
cudaSetDevice (0);
cudaMalloc ((void**) &a_d , rows * COLUMNS * sizeof(int));
cudaMalloc ((void**) &b_d , COLUMNS * sizeof(int));
cudaMalloc ((void**) &c_d , rows * sizeof(int));
//copie vers GPU
cudaMemcpy (a_d , a_h , rows * COLUMNS *sizeof(int), cudaMemcpyHostToDevice ); // on copie les données du CPU vers le GPU
cudaMemcpy (b_d , b_h , COLUMNS * sizeof(int), cudaMemcpyHostToDevice );
unsigned long long ref1, ref2;
unsigned long long diffH = 0, diffD = 0;
struct timeval tim;
//remplissage de la matrice
for(i=0;i<COLUMNS*rows;++i){
if(i<COLUMNS){
b_h[i] = i+1;
}
a_h[i] = rand()%(COLUMNS*rows);
}
//multiplication sur CPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
int * a = a_h, *b, *c=c1_h;
for(i = 0; i<rows; ++i){
c1_h[i] = 0;
for(j = 0; j<COLUMNS;++j,++a,++b)
c1_h[i] += (a_h[i*COLUMNS+j])*(b_h[j]);
}
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffH+=ref2-ref1; // différence des timing
//multiplication sur GPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
// EXECUTION GPU c'est ici que nous allons travailler
int blocks = rows/THREAD_PER_BLOCK;
multiplication_matrix_GPU<<<blocks,THREAD_PER_BLOCK>>>(a_d, b_d, c_d);
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffD+=ref2-ref1;
cudaMemcpy(c2_h , c_d , rows * sizeof(int), cudaMemcpyDeviceToHost);
//vérification des résultats et nettoyage
int ok = 1;
for(i=0;i<10;++i)
if(c1_h[i]!=c2_h[i]){
//ok = 0;
printf("Différence : %d != %d\n", c1_h[i], c2_h[i]);
}
if(ok)
printf("Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n", diffH, diffD);
cudaFree(a_d);
cudaFree(b_d);
cudaFree(c_d);
free(a_h);
free(b_h);
free(c1_h);
free(c2_h);
} | #include <hip/hip_runtime.h>
#include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#define THREAD_PER_BLOCK 16 // on fixe le nombre de colonnes à 16
#define COLUMNS 16
//fct gpu
__global__ void multiplication_matrix_GPU(int *a, int *b, int*c)
{
int idx = blockIdx.x * THREAD_PER_BLOCK + threadIdx.x;
int sum = 0;
__shared__ int bs[16]; // définition de la mémoire partagée
bs[threadIdx.x]= b[threadIdx.x];
//for(int j = 0; j<COLUMNS;++j,++a,++b)
// sum += (a[idx*COLUMNS+j])*(b[j]);
sum+= (a[idx*COLUMNS+0])*(bs[0]);
sum+= (a[idx*COLUMNS+1])*(bs[1]);
sum+= (a[idx*COLUMNS+2])*(bs[2]);
sum+= (a[idx*COLUMNS+3])*(bs[3]);
sum+= (a[idx*COLUMNS+4])*(bs[4]);
sum+= (a[idx*COLUMNS+5])*(bs[5]);
sum+= (a[idx*COLUMNS+6])*(bs[6]);
sum+= (a[idx*COLUMNS+7])*(bs[7]);
sum+= (a[idx*COLUMNS+8])*(bs[8]);
sum+= (a[idx*COLUMNS+9])*(bs[9]);
sum+= (a[idx*COLUMNS+10])*(bs[10]);
sum+= (a[idx*COLUMNS+11])*(bs[11]);
sum+= (a[idx*COLUMNS+12])*(bs[12]);
sum+= (a[idx*COLUMNS+13])*(bs[13]);
sum+= (a[idx*COLUMNS+14])*(bs[14]);
sum+= (a[idx*COLUMNS+15])*(bs[15]);
c[idx]=sum;
__syncthreads();
}
int main(int agrc, char * argv[])
{
unsigned int rows = atoi(argv[1]), i, j; // il y a un malloc contenant ligne et colonnes --> Matrice A et un malloc contenant que colonne -> vecteur B
int * a_h = (int *) malloc(rows * COLUMNS * sizeof(int)), * b_h = (int *) malloc(COLUMNS * sizeof(int)), * c1_h = (int *) malloc(rows * sizeof(int)), * c2_h = (int *) malloc(rows * sizeof(int));
int *a_d, *b_d, *c_d;
//allocation sur GPU
hipSetDevice (0);
hipMalloc ((void**) &a_d , rows * COLUMNS * sizeof(int));
hipMalloc ((void**) &b_d , COLUMNS * sizeof(int));
hipMalloc ((void**) &c_d , rows * sizeof(int));
//copie vers GPU
hipMemcpy (a_d , a_h , rows * COLUMNS *sizeof(int), hipMemcpyHostToDevice ); // on copie les données du CPU vers le GPU
hipMemcpy (b_d , b_h , COLUMNS * sizeof(int), hipMemcpyHostToDevice );
unsigned long long ref1, ref2;
unsigned long long diffH = 0, diffD = 0;
struct timeval tim;
//remplissage de la matrice
for(i=0;i<COLUMNS*rows;++i){
if(i<COLUMNS){
b_h[i] = i+1;
}
a_h[i] = rand()%(COLUMNS*rows);
}
//multiplication sur CPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
int * a = a_h, *b, *c=c1_h;
for(i = 0; i<rows; ++i){
c1_h[i] = 0;
for(j = 0; j<COLUMNS;++j,++a,++b)
c1_h[i] += (a_h[i*COLUMNS+j])*(b_h[j]);
}
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffH+=ref2-ref1; // différence des timing
//multiplication sur GPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
// EXECUTION GPU c'est ici que nous allons travailler
int blocks = rows/THREAD_PER_BLOCK;
multiplication_matrix_GPU<<<blocks,THREAD_PER_BLOCK>>>(a_d, b_d, c_d);
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffD+=ref2-ref1;
hipMemcpy(c2_h , c_d , rows * sizeof(int), hipMemcpyDeviceToHost);
//vérification des résultats et nettoyage
int ok = 1;
for(i=0;i<10;++i)
if(c1_h[i]!=c2_h[i]){
//ok = 0;
printf("Différence : %d != %d\n", c1_h[i], c2_h[i]);
}
if(ok)
printf("Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n", diffH, diffD);
hipFree(a_d);
hipFree(b_d);
hipFree(c_d);
free(a_h);
free(b_h);
free(c1_h);
free(c2_h);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#define THREAD_PER_BLOCK 16 // on fixe le nombre de colonnes à 16
#define COLUMNS 16
//fct gpu
__global__ void multiplication_matrix_GPU(int *a, int *b, int*c)
{
int idx = blockIdx.x * THREAD_PER_BLOCK + threadIdx.x;
int sum = 0;
__shared__ int bs[16]; // définition de la mémoire partagée
bs[threadIdx.x]= b[threadIdx.x];
//for(int j = 0; j<COLUMNS;++j,++a,++b)
// sum += (a[idx*COLUMNS+j])*(b[j]);
sum+= (a[idx*COLUMNS+0])*(bs[0]);
sum+= (a[idx*COLUMNS+1])*(bs[1]);
sum+= (a[idx*COLUMNS+2])*(bs[2]);
sum+= (a[idx*COLUMNS+3])*(bs[3]);
sum+= (a[idx*COLUMNS+4])*(bs[4]);
sum+= (a[idx*COLUMNS+5])*(bs[5]);
sum+= (a[idx*COLUMNS+6])*(bs[6]);
sum+= (a[idx*COLUMNS+7])*(bs[7]);
sum+= (a[idx*COLUMNS+8])*(bs[8]);
sum+= (a[idx*COLUMNS+9])*(bs[9]);
sum+= (a[idx*COLUMNS+10])*(bs[10]);
sum+= (a[idx*COLUMNS+11])*(bs[11]);
sum+= (a[idx*COLUMNS+12])*(bs[12]);
sum+= (a[idx*COLUMNS+13])*(bs[13]);
sum+= (a[idx*COLUMNS+14])*(bs[14]);
sum+= (a[idx*COLUMNS+15])*(bs[15]);
c[idx]=sum;
__syncthreads();
}
int main(int agrc, char * argv[])
{
unsigned int rows = atoi(argv[1]), i, j; // il y a un malloc contenant ligne et colonnes --> Matrice A et un malloc contenant que colonne -> vecteur B
int * a_h = (int *) malloc(rows * COLUMNS * sizeof(int)), * b_h = (int *) malloc(COLUMNS * sizeof(int)), * c1_h = (int *) malloc(rows * sizeof(int)), * c2_h = (int *) malloc(rows * sizeof(int));
int *a_d, *b_d, *c_d;
//allocation sur GPU
hipSetDevice (0);
hipMalloc ((void**) &a_d , rows * COLUMNS * sizeof(int));
hipMalloc ((void**) &b_d , COLUMNS * sizeof(int));
hipMalloc ((void**) &c_d , rows * sizeof(int));
//copie vers GPU
hipMemcpy (a_d , a_h , rows * COLUMNS *sizeof(int), hipMemcpyHostToDevice ); // on copie les données du CPU vers le GPU
hipMemcpy (b_d , b_h , COLUMNS * sizeof(int), hipMemcpyHostToDevice );
unsigned long long ref1, ref2;
unsigned long long diffH = 0, diffD = 0;
struct timeval tim;
//remplissage de la matrice
for(i=0;i<COLUMNS*rows;++i){
if(i<COLUMNS){
b_h[i] = i+1;
}
a_h[i] = rand()%(COLUMNS*rows);
}
//multiplication sur CPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
int * a = a_h, *b, *c=c1_h;
for(i = 0; i<rows; ++i){
c1_h[i] = 0;
for(j = 0; j<COLUMNS;++j,++a,++b)
c1_h[i] += (a_h[i*COLUMNS+j])*(b_h[j]);
}
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffH+=ref2-ref1; // différence des timing
//multiplication sur GPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
// EXECUTION GPU c'est ici que nous allons travailler
int blocks = rows/THREAD_PER_BLOCK;
multiplication_matrix_GPU<<<blocks,THREAD_PER_BLOCK>>>(a_d, b_d, c_d);
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffD+=ref2-ref1;
hipMemcpy(c2_h , c_d , rows * sizeof(int), hipMemcpyDeviceToHost);
//vérification des résultats et nettoyage
int ok = 1;
for(i=0;i<10;++i)
if(c1_h[i]!=c2_h[i]){
//ok = 0;
printf("Différence : %d != %d\n", c1_h[i], c2_h[i]);
}
if(ok)
printf("Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n", diffH, diffD);
hipFree(a_d);
hipFree(b_d);
hipFree(c_d);
free(a_h);
free(b_h);
free(c1_h);
free(c2_h);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z25multiplication_matrix_GPUPiS_S_
.globl _Z25multiplication_matrix_GPUPiS_S_
.p2align 8
.type _Z25multiplication_matrix_GPUPiS_S_,@function
_Z25multiplication_matrix_GPUPiS_S_:
v_lshl_add_u32 v1, s15, 4, v0
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v2, 4, v1
v_ashrrev_i32_e32 v3, 31, v2
v_or_b32_e32 v4, 1, v2
v_or_b32_e32 v6, 2, v2
v_or_b32_e32 v8, 3, v2
v_or_b32_e32 v10, 4, v2
v_lshlrev_b64 v[13:14], 2, v[2:3]
v_ashrrev_i32_e32 v5, 31, v4
v_ashrrev_i32_e32 v7, 31, v6
v_or_b32_e32 v12, 5, v2
v_ashrrev_i32_e32 v9, 31, v8
v_ashrrev_i32_e32 v11, 31, v10
s_waitcnt lgkmcnt(0)
v_add_co_u32 v13, vcc_lo, s4, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
v_lshlrev_b64 v[3:4], 2, v[4:5]
v_lshlrev_b64 v[5:6], 2, v[6:7]
v_lshlrev_b64 v[7:8], 2, v[8:9]
global_load_b32 v26, v[13:14], off
v_lshlrev_b64 v[9:10], 2, v[10:11]
v_ashrrev_i32_e32 v13, 31, v12
v_or_b32_e32 v11, 6, v2
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_or_b32_e32 v15, 7, v2
v_add_co_u32 v5, vcc_lo, s4, v5
global_load_b32 v25, v0, s[6:7]
v_lshlrev_b64 v[13:14], 2, v[12:13]
v_ashrrev_i32_e32 v12, 31, v11
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
v_or_b32_e32 v17, 8, v2
v_add_co_u32 v7, vcc_lo, s4, v7
v_ashrrev_i32_e32 v16, 31, v15
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s4, v9
v_lshlrev_b64 v[11:12], 2, v[11:12]
v_ashrrev_i32_e32 v18, 31, v17
v_or_b32_e32 v19, 9, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v13, vcc_lo, s4, v13
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_or_b32_e32 v21, 10, v2
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
v_add_co_u32 v11, vcc_lo, s4, v11
v_lshlrev_b64 v[17:18], 2, v[17:18]
v_ashrrev_i32_e32 v20, 31, v19
v_or_b32_e32 v23, 11, v2
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
v_add_co_u32 v15, vcc_lo, s4, v15
v_ashrrev_i32_e32 v22, 31, v21
v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
v_lshlrev_b64 v[19:20], 2, v[19:20]
v_add_co_u32 v17, vcc_lo, s4, v17
v_ashrrev_i32_e32 v24, 31, v23
v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
s_clause 0x7
global_load_b32 v27, v[3:4], off
global_load_b32 v28, v[5:6], off
global_load_b32 v29, v[7:8], off
global_load_b32 v30, v[9:10], off
global_load_b32 v31, v[13:14], off
global_load_b32 v32, v[11:12], off
global_load_b32 v15, v[15:16], off
global_load_b32 v16, v[17:18], off
v_lshlrev_b64 v[3:4], 2, v[21:22]
v_add_co_u32 v5, vcc_lo, s4, v19
v_lshlrev_b64 v[7:8], 2, v[23:24]
v_or_b32_e32 v9, 12, v2
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v20, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_or_b32_e32 v11, 13, v2
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_ashrrev_i32_e32 v10, 31, v9
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
v_ashrrev_i32_e32 v12, 31, v11
v_or_b32_e32 v13, 14, v2
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_clause 0x2
global_load_b32 v17, v[5:6], off
global_load_b32 v18, v[3:4], off
global_load_b32 v19, v[7:8], off
v_or_b32_e32 v5, 15, v2
v_lshlrev_b64 v[3:4], 2, v[11:12]
v_ashrrev_i32_e32 v14, 31, v13
v_mov_b32_e32 v24, 0
v_add_co_u32 v7, vcc_lo, s4, v9
v_ashrrev_i32_e32 v6, 31, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v10, vcc_lo
v_lshlrev_b64 v[9:10], 2, v[13:14]
v_add_co_u32 v2, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
v_lshlrev_b64 v[4:5], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
s_clause 0x3
global_load_b32 v20, v[7:8], off
global_load_b32 v21, v[2:3], off
global_load_b32 v22, v[9:10], off
global_load_b32 v23, v[4:5], off
s_waitcnt vmcnt(15)
ds_store_b32 v0, v25
ds_load_2addr_b32 v[2:3], v24 offset1:1
ds_load_2addr_b32 v[4:5], v24 offset0:2 offset1:3
ds_load_2addr_b32 v[6:7], v24 offset0:4 offset1:5
ds_load_2addr_b32 v[8:9], v24 offset0:6 offset1:7
ds_load_2addr_b32 v[10:11], v24 offset0:8 offset1:9
s_waitcnt lgkmcnt(4)
v_mul_lo_u32 v0, v2, v26
s_waitcnt vmcnt(14)
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[12:13], null, v3, v27, v[0:1]
s_waitcnt vmcnt(13) lgkmcnt(3)
v_mul_lo_u32 v2, v4, v28
s_waitcnt vmcnt(12)
v_mul_lo_u32 v25, v5, v29
ds_load_2addr_b32 v[4:5], v24 offset0:10 offset1:11
ds_load_2addr_b32 v[13:14], v24 offset0:12 offset1:13
s_waitcnt vmcnt(11) lgkmcnt(4)
v_mul_lo_u32 v0, v6, v30
s_waitcnt vmcnt(10)
v_mul_lo_u32 v3, v7, v31
ds_load_2addr_b32 v[6:7], v24 offset0:14 offset1:15
s_waitcnt vmcnt(9) lgkmcnt(4)
v_mul_lo_u32 v8, v8, v32
s_waitcnt vmcnt(8)
v_mul_lo_u32 v9, v9, v15
v_add3_u32 v2, v12, v2, v25
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v0, v2, v0, v3
s_waitcnt vmcnt(7) lgkmcnt(3)
v_mul_lo_u32 v3, v10, v16
v_ashrrev_i32_e32 v2, 31, v1
v_add3_u32 v0, v0, v8, v9
s_waitcnt vmcnt(6)
v_mul_lo_u32 v10, v11, v17
s_waitcnt vmcnt(5) lgkmcnt(2)
v_mul_lo_u32 v4, v4, v18
s_waitcnt vmcnt(4)
v_mul_lo_u32 v5, v5, v19
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v3, v0, v3, v10
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add3_u32 v2, v3, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(3) lgkmcnt(1)
v_mul_lo_u32 v8, v13, v20
s_waitcnt vmcnt(2)
v_mul_lo_u32 v9, v14, v21
s_waitcnt vmcnt(1) lgkmcnt(0)
v_mul_lo_u32 v3, v6, v22
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, v7, v23
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, v2, v8, v9
v_add3_u32 v2, v2, v3, v4
global_store_b32 v[0:1], v2, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z25multiplication_matrix_GPUPiS_S_
.amdhsa_group_segment_fixed_size 64
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 33
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z25multiplication_matrix_GPUPiS_S_, .Lfunc_end0-_Z25multiplication_matrix_GPUPiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 64
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z25multiplication_matrix_GPUPiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z25multiplication_matrix_GPUPiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 33
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#define THREAD_PER_BLOCK 16 // on fixe le nombre de colonnes à 16
#define COLUMNS 16
//fct gpu
__global__ void multiplication_matrix_GPU(int *a, int *b, int*c)
{
int idx = blockIdx.x * THREAD_PER_BLOCK + threadIdx.x;
int sum = 0;
__shared__ int bs[16]; // définition de la mémoire partagée
bs[threadIdx.x]= b[threadIdx.x];
//for(int j = 0; j<COLUMNS;++j,++a,++b)
// sum += (a[idx*COLUMNS+j])*(b[j]);
sum+= (a[idx*COLUMNS+0])*(bs[0]);
sum+= (a[idx*COLUMNS+1])*(bs[1]);
sum+= (a[idx*COLUMNS+2])*(bs[2]);
sum+= (a[idx*COLUMNS+3])*(bs[3]);
sum+= (a[idx*COLUMNS+4])*(bs[4]);
sum+= (a[idx*COLUMNS+5])*(bs[5]);
sum+= (a[idx*COLUMNS+6])*(bs[6]);
sum+= (a[idx*COLUMNS+7])*(bs[7]);
sum+= (a[idx*COLUMNS+8])*(bs[8]);
sum+= (a[idx*COLUMNS+9])*(bs[9]);
sum+= (a[idx*COLUMNS+10])*(bs[10]);
sum+= (a[idx*COLUMNS+11])*(bs[11]);
sum+= (a[idx*COLUMNS+12])*(bs[12]);
sum+= (a[idx*COLUMNS+13])*(bs[13]);
sum+= (a[idx*COLUMNS+14])*(bs[14]);
sum+= (a[idx*COLUMNS+15])*(bs[15]);
c[idx]=sum;
__syncthreads();
}
int main(int agrc, char * argv[])
{
unsigned int rows = atoi(argv[1]), i, j; // il y a un malloc contenant ligne et colonnes --> Matrice A et un malloc contenant que colonne -> vecteur B
int * a_h = (int *) malloc(rows * COLUMNS * sizeof(int)), * b_h = (int *) malloc(COLUMNS * sizeof(int)), * c1_h = (int *) malloc(rows * sizeof(int)), * c2_h = (int *) malloc(rows * sizeof(int));
int *a_d, *b_d, *c_d;
//allocation sur GPU
hipSetDevice (0);
hipMalloc ((void**) &a_d , rows * COLUMNS * sizeof(int));
hipMalloc ((void**) &b_d , COLUMNS * sizeof(int));
hipMalloc ((void**) &c_d , rows * sizeof(int));
//copie vers GPU
hipMemcpy (a_d , a_h , rows * COLUMNS *sizeof(int), hipMemcpyHostToDevice ); // on copie les données du CPU vers le GPU
hipMemcpy (b_d , b_h , COLUMNS * sizeof(int), hipMemcpyHostToDevice );
unsigned long long ref1, ref2;
unsigned long long diffH = 0, diffD = 0;
struct timeval tim;
//remplissage de la matrice
for(i=0;i<COLUMNS*rows;++i){
if(i<COLUMNS){
b_h[i] = i+1;
}
a_h[i] = rand()%(COLUMNS*rows);
}
//multiplication sur CPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
int * a = a_h, *b, *c=c1_h;
for(i = 0; i<rows; ++i){
c1_h[i] = 0;
for(j = 0; j<COLUMNS;++j,++a,++b)
c1_h[i] += (a_h[i*COLUMNS+j])*(b_h[j]);
}
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffH+=ref2-ref1; // différence des timing
//multiplication sur GPU
gettimeofday(&tim, NULL);
ref1 = tim.tv_sec * 1000000L + tim.tv_usec;
// EXECUTION GPU c'est ici que nous allons travailler
int blocks = rows/THREAD_PER_BLOCK;
multiplication_matrix_GPU<<<blocks,THREAD_PER_BLOCK>>>(a_d, b_d, c_d);
gettimeofday(&tim, NULL);
ref2 = tim.tv_sec * 1000000L + tim.tv_usec;
diffD+=ref2-ref1;
hipMemcpy(c2_h , c_d , rows * sizeof(int), hipMemcpyDeviceToHost);
//vérification des résultats et nettoyage
int ok = 1;
for(i=0;i<10;++i)
if(c1_h[i]!=c2_h[i]){
//ok = 0;
printf("Différence : %d != %d\n", c1_h[i], c2_h[i]);
}
if(ok)
printf("Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n", diffH, diffD);
hipFree(a_d);
hipFree(b_d);
hipFree(c_d);
free(a_h);
free(b_h);
free(c1_h);
free(c2_h);
} | .text
.file "cuda_exo_2.hip"
.globl _Z40__device_stub__multiplication_matrix_GPUPiS_S_ # -- Begin function _Z40__device_stub__multiplication_matrix_GPUPiS_S_
.p2align 4, 0x90
.type _Z40__device_stub__multiplication_matrix_GPUPiS_S_,@function
_Z40__device_stub__multiplication_matrix_GPUPiS_S_: # @_Z40__device_stub__multiplication_matrix_GPUPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z25multiplication_matrix_GPUPiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z40__device_stub__multiplication_matrix_GPUPiS_S_, .Lfunc_end0-_Z40__device_stub__multiplication_matrix_GPUPiS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movl %r15d, %ebp
shll $4, %ebp
leaq (,%rbp,4), %r13
movq %r13, %rdi
callq malloc
movq %rax, %rbx
movl $64, %edi
callq malloc
movq %rax, %r14
movq %r15, 104(%rsp) # 8-byte Spill
movl %r15d, %r12d
shlq $2, %r12
movq %r12, %rdi
callq malloc
movq %rax, %r15
movq %r12, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
xorl %edi, %edi
callq hipSetDevice
leaq 48(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
leaq 40(%rsp), %rdi
movl $64, %esi
callq hipMalloc
leaq 32(%rsp), %rdi
movq %r12, 112(%rsp) # 8-byte Spill
movq %r12, %rsi
callq hipMalloc
movq 48(%rsp), %rdi
movq %rbx, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movl $64, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
testl %ebp, %ebp
je .LBB1_5
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r13d
xorl %r12d, %r12d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
callq rand
xorl %edx, %edx
divl %ebp
movl %edx, (%rbx,%r12,4)
incq %r12
cmpq %r12, %r13
je .LBB1_5
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
cmpq $15, %r12
ja .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
leal 1(%r12), %eax
movl %eax, (%r14,%r12,4)
jmp .LBB1_4
.LBB1_5: # %._crit_edge
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 104(%rsp), %r12 # 8-byte Reload
testl %r12d, %r12d
je .LBB1_10
# %bb.6: # %.lr.ph95.preheader
movl %r12d, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB1_7: # %.lr.ph95
# =>This Loop Header: Depth=1
# Child Loop BB1_8 Depth 2
movl %ecx, %edx
andl $268435455, %edx # imm = 0xFFFFFFF
shlq $6, %rdx
addq %rbx, %rdx
movl $0, (%r15,%rcx,4)
xorl %edi, %edi
xorl %esi, %esi
.p2align 4, 0x90
.LBB1_8: # Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r14,%rdi,4), %r8d
imull (%rdx,%rdi,4), %r8d
addl %r8d, %esi
incq %rdi
cmpq $16, %rdi
jne .LBB1_8
# %bb.9: # in Loop: Header=BB1_7 Depth=1
movl %esi, (%r15,%rcx,4)
incq %rcx
cmpq %rax, %rcx
jne .LBB1_7
.LBB1_10: # %._crit_edge96
movq 8(%rsp), %rax
movq %rax, 88(%rsp) # 8-byte Spill
movq 16(%rsp), %rax
movq %rax, 96(%rsp) # 8-byte Spill
leaq 8(%rsp), %r13
movq %r13, %rdi
xorl %esi, %esi
callq gettimeofday
movq 8(%rsp), %rax
movq %rax, 72(%rsp) # 8-byte Spill
movq 16(%rsp), %rax
movq %rax, 80(%rsp) # 8-byte Spill
movq %r13, %rdi
xorl %esi, %esi
callq gettimeofday
movq 8(%rsp), %rax
movq %rax, 56(%rsp) # 8-byte Spill
movq 16(%rsp), %rax
movq %rax, 64(%rsp) # 8-byte Spill
shrl $4, %r12d
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %r12
orq $16, %rdx
movq %r12, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_12
# %bb.11:
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
movq 32(%rsp), %rdx
movq %rax, 184(%rsp)
movq %rcx, 176(%rsp)
movq %rdx, 168(%rsp)
leaq 184(%rsp), %rax
movq %rax, 192(%rsp)
leaq 176(%rsp), %rax
movq %rax, 200(%rsp)
leaq 168(%rsp), %rax
movq %rax, 208(%rsp)
leaq 152(%rsp), %rdi
leaq 136(%rsp), %rsi
leaq 128(%rsp), %rdx
leaq 120(%rsp), %rcx
callq __hipPopCallConfiguration
movq 152(%rsp), %rsi
movl 160(%rsp), %edx
movq 136(%rsp), %rcx
movl 144(%rsp), %r8d
leaq 192(%rsp), %r9
movl $_Z25multiplication_matrix_GPUPiS_S_, %edi
pushq 120(%rsp)
.cfi_adjust_cfa_offset 8
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_12:
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 8(%rsp), %r13
movq 16(%rsp), %rbp
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi # 8-byte Reload
movq 112(%rsp), %rdx # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
xorl %r12d, %r12d
jmp .LBB1_13
.p2align 4, 0x90
.LBB1_15: # in Loop: Header=BB1_13 Depth=1
incq %r12
cmpq $10, %r12
je .LBB1_16
.LBB1_13: # =>This Inner Loop Header: Depth=1
movl (%r15,%r12,4), %esi
movq 24(%rsp), %rax # 8-byte Reload
movl (%rax,%r12,4), %edx
cmpl %edx, %esi
je .LBB1_15
# %bb.14: # in Loop: Header=BB1_13 Depth=1
movl $.L.str, %edi
xorl %eax, %eax
callq printf
jmp .LBB1_15
.LBB1_16:
subq 56(%rsp), %r13 # 8-byte Folded Reload
imulq $1000000, %r13, %rax # imm = 0xF4240
subq 64(%rsp), %rbp # 8-byte Folded Reload
addq %rax, %rbp
movq 72(%rsp), %rax # 8-byte Reload
subq 88(%rsp), %rax # 8-byte Folded Reload
imulq $1000000, %rax, %rax # imm = 0xF4240
movq 80(%rsp), %rsi # 8-byte Reload
subq 96(%rsp), %rsi # 8-byte Folded Reload
addq %rax, %rsi
movl $.L.str.1, %edi
movq %rbp, %rdx
xorl %eax, %eax
callq printf
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq 24(%rsp), %rdi # 8-byte Reload
callq free
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z25multiplication_matrix_GPUPiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z25multiplication_matrix_GPUPiS_S_,@object # @_Z25multiplication_matrix_GPUPiS_S_
.section .rodata,"a",@progbits
.globl _Z25multiplication_matrix_GPUPiS_S_
.p2align 3, 0x0
_Z25multiplication_matrix_GPUPiS_S_:
.quad _Z40__device_stub__multiplication_matrix_GPUPiS_S_
.size _Z25multiplication_matrix_GPUPiS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Diff\303\251rence : %d != %d\n"
.size .L.str, 24
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n"
.size .L.str.1, 51
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z25multiplication_matrix_GPUPiS_S_"
.size .L__unnamed_1, 36
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z40__device_stub__multiplication_matrix_GPUPiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z25multiplication_matrix_GPUPiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z25multiplication_matrix_GPUPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R0, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff007435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e6e0000002500 */
/*0050*/ IMAD.WIDE.U32 R4, R11, R0, c[0x0][0x168] ; /* 0x00005a000b047625 */
/* 0x001fcc00078e0000 */
/*0060*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0070*/ LEA R3, R3, R11, 0x4 ; /* 0x0000000b03037211 */
/* 0x002fc800078e20ff */
/*0080*/ SHF.L.U32 R27, R3, 0x4, RZ ; /* 0x00000004031b7819 */
/* 0x000fca00000006ff */
/*0090*/ IMAD.WIDE R26, R27, R0, c[0x0][0x160] ; /* 0x000058001b1a7625 */
/* 0x000fca00078e0200 */
/*00a0*/ LDG.E R7, [R26.64] ; /* 0x000000041a077981 */
/* 0x000ee8000c1e1900 */
/*00b0*/ LDG.E R8, [R26.64+0x4] ; /* 0x000004041a087981 */
/* 0x000f28000c1e1900 */
/*00c0*/ LDG.E R9, [R26.64+0x8] ; /* 0x000008041a097981 */
/* 0x000f68000c1e1900 */
/*00d0*/ LDG.E R28, [R26.64+0xc] ; /* 0x00000c041a1c7981 */
/* 0x000ee8000c1e1900 */
/*00e0*/ LDG.E R29, [R26.64+0x10] ; /* 0x000010041a1d7981 */
/* 0x000ee8000c1e1900 */
/*00f0*/ LDG.E R2, [R26.64+0x14] ; /* 0x000014041a027981 */
/* 0x000ee8000c1e1900 */
/*0100*/ LDG.E R17, [R26.64+0x18] ; /* 0x000018041a117981 */
/* 0x000ee8000c1e1900 */
/*0110*/ LDG.E R16, [R26.64+0x1c] ; /* 0x00001c041a107981 */
/* 0x000ee8000c1e1900 */
/*0120*/ LDG.E R19, [R26.64+0x20] ; /* 0x000020041a137981 */
/* 0x000f28000c1e1900 */
/*0130*/ LDG.E R18, [R26.64+0x24] ; /* 0x000024041a127981 */
/* 0x000f68000c1e1900 */
/*0140*/ LDG.E R21, [R26.64+0x28] ; /* 0x000028041a157981 */
/* 0x000f68000c1e1900 */
/*0150*/ LDG.E R20, [R26.64+0x2c] ; /* 0x00002c041a147981 */
/* 0x000f68000c1e1900 */
/*0160*/ LDG.E R23, [R26.64+0x30] ; /* 0x000030041a177981 */
/* 0x000f68000c1e1900 */
/*0170*/ LDG.E R22, [R26.64+0x34] ; /* 0x000034041a167981 */
/* 0x000f68000c1e1900 */
/*0180*/ LDG.E R25, [R26.64+0x38] ; /* 0x000038041a197981 */
/* 0x000f68000c1e1900 */
/*0190*/ LDG.E R24, [R26.64+0x3c] ; /* 0x00003c041a187981 */
/* 0x000f68000c1e1900 */
/*01a0*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */
/* 0x004fe80000004800 */
/*01b0*/ LDS.128 R12, [RZ] ; /* 0x00000000ff0c7984 */
/* 0x000ee40000000c00 */
/*01c0*/ IMAD R12, R7, R12, RZ ; /* 0x0000000c070c7224 */
/* 0x008fc400078e02ff */
/*01d0*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */
/* 0x000e240000000c00 */
/*01e0*/ IMAD R8, R8, R13, R12 ; /* 0x0000000d08087224 */
/* 0x010fc800078e020c */
/*01f0*/ IMAD R14, R9, R14, R8 ; /* 0x0000000e090e7224 */
/* 0x020fe400078e0208 */
/*0200*/ LDS.128 R8, [0x20] ; /* 0x00002000ff087984 */
/* 0x000e640000000c00 */
/*0210*/ IMAD R14, R28, R15, R14 ; /* 0x0000000f1c0e7224 */
/* 0x000fc800078e020e */
/*0220*/ IMAD R29, R29, R4, R14 ; /* 0x000000041d1d7224 */
/* 0x001fe400078e020e */
/*0230*/ LDS.128 R12, [0x30] ; /* 0x00003000ff0c7984 */
/* 0x000e240000000c00 */
/*0240*/ IMAD R2, R2, R5, R29 ; /* 0x0000000502027224 */
/* 0x000fc800078e021d */
/*0250*/ IMAD R2, R17, R6, R2 ; /* 0x0000000611027224 */
/* 0x000fc800078e0202 */
/*0260*/ IMAD R2, R16, R7, R2 ; /* 0x0000000710027224 */
/* 0x000fc800078e0202 */
/*0270*/ IMAD R2, R19, R8, R2 ; /* 0x0000000813027224 */
/* 0x002fc800078e0202 */
/*0280*/ IMAD R2, R18, R9, R2 ; /* 0x0000000912027224 */
/* 0x000fc800078e0202 */
/*0290*/ IMAD R2, R21, R10, R2 ; /* 0x0000000a15027224 */
/* 0x000fc800078e0202 */
/*02a0*/ IMAD R2, R20, R11, R2 ; /* 0x0000000b14027224 */
/* 0x000fc800078e0202 */
/*02b0*/ IMAD R2, R23, R12, R2 ; /* 0x0000000c17027224 */
/* 0x001fc800078e0202 */
/*02c0*/ IMAD R2, R22, R13, R2 ; /* 0x0000000d16027224 */
/* 0x000fc800078e0202 */
/*02d0*/ IMAD R14, R25, R14, R2 ; /* 0x0000000e190e7224 */
/* 0x000fe400078e0202 */
/*02e0*/ IMAD.WIDE R2, R3, R0, c[0x0][0x170] ; /* 0x00005c0003027625 */
/* 0x000fc800078e0200 */
/*02f0*/ IMAD R15, R24, R15, R14 ; /* 0x0000000f180f7224 */
/* 0x000fca00078e020e */
/*0300*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x000fe8000c101904 */
/*0310*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0320*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0330*/ BRA 0x330; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z25multiplication_matrix_GPUPiS_S_
.globl _Z25multiplication_matrix_GPUPiS_S_
.p2align 8
.type _Z25multiplication_matrix_GPUPiS_S_,@function
_Z25multiplication_matrix_GPUPiS_S_:
v_lshl_add_u32 v1, s15, 4, v0
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v2, 4, v1
v_ashrrev_i32_e32 v3, 31, v2
v_or_b32_e32 v4, 1, v2
v_or_b32_e32 v6, 2, v2
v_or_b32_e32 v8, 3, v2
v_or_b32_e32 v10, 4, v2
v_lshlrev_b64 v[13:14], 2, v[2:3]
v_ashrrev_i32_e32 v5, 31, v4
v_ashrrev_i32_e32 v7, 31, v6
v_or_b32_e32 v12, 5, v2
v_ashrrev_i32_e32 v9, 31, v8
v_ashrrev_i32_e32 v11, 31, v10
s_waitcnt lgkmcnt(0)
v_add_co_u32 v13, vcc_lo, s4, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
v_lshlrev_b64 v[3:4], 2, v[4:5]
v_lshlrev_b64 v[5:6], 2, v[6:7]
v_lshlrev_b64 v[7:8], 2, v[8:9]
global_load_b32 v26, v[13:14], off
v_lshlrev_b64 v[9:10], 2, v[10:11]
v_ashrrev_i32_e32 v13, 31, v12
v_or_b32_e32 v11, 6, v2
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_or_b32_e32 v15, 7, v2
v_add_co_u32 v5, vcc_lo, s4, v5
global_load_b32 v25, v0, s[6:7]
v_lshlrev_b64 v[13:14], 2, v[12:13]
v_ashrrev_i32_e32 v12, 31, v11
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
v_or_b32_e32 v17, 8, v2
v_add_co_u32 v7, vcc_lo, s4, v7
v_ashrrev_i32_e32 v16, 31, v15
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
v_add_co_u32 v9, vcc_lo, s4, v9
v_lshlrev_b64 v[11:12], 2, v[11:12]
v_ashrrev_i32_e32 v18, 31, v17
v_or_b32_e32 v19, 9, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v13, vcc_lo, s4, v13
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_or_b32_e32 v21, 10, v2
v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
v_add_co_u32 v11, vcc_lo, s4, v11
v_lshlrev_b64 v[17:18], 2, v[17:18]
v_ashrrev_i32_e32 v20, 31, v19
v_or_b32_e32 v23, 11, v2
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
v_add_co_u32 v15, vcc_lo, s4, v15
v_ashrrev_i32_e32 v22, 31, v21
v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
v_lshlrev_b64 v[19:20], 2, v[19:20]
v_add_co_u32 v17, vcc_lo, s4, v17
v_ashrrev_i32_e32 v24, 31, v23
v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
s_clause 0x7
global_load_b32 v27, v[3:4], off
global_load_b32 v28, v[5:6], off
global_load_b32 v29, v[7:8], off
global_load_b32 v30, v[9:10], off
global_load_b32 v31, v[13:14], off
global_load_b32 v32, v[11:12], off
global_load_b32 v15, v[15:16], off
global_load_b32 v16, v[17:18], off
v_lshlrev_b64 v[3:4], 2, v[21:22]
v_add_co_u32 v5, vcc_lo, s4, v19
v_lshlrev_b64 v[7:8], 2, v[23:24]
v_or_b32_e32 v9, 12, v2
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v20, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_or_b32_e32 v11, 13, v2
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
v_ashrrev_i32_e32 v10, 31, v9
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
v_ashrrev_i32_e32 v12, 31, v11
v_or_b32_e32 v13, 14, v2
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_clause 0x2
global_load_b32 v17, v[5:6], off
global_load_b32 v18, v[3:4], off
global_load_b32 v19, v[7:8], off
v_or_b32_e32 v5, 15, v2
v_lshlrev_b64 v[3:4], 2, v[11:12]
v_ashrrev_i32_e32 v14, 31, v13
v_mov_b32_e32 v24, 0
v_add_co_u32 v7, vcc_lo, s4, v9
v_ashrrev_i32_e32 v6, 31, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v10, vcc_lo
v_lshlrev_b64 v[9:10], 2, v[13:14]
v_add_co_u32 v2, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
v_lshlrev_b64 v[4:5], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
s_clause 0x3
global_load_b32 v20, v[7:8], off
global_load_b32 v21, v[2:3], off
global_load_b32 v22, v[9:10], off
global_load_b32 v23, v[4:5], off
s_waitcnt vmcnt(15)
ds_store_b32 v0, v25
ds_load_2addr_b32 v[2:3], v24 offset1:1
ds_load_2addr_b32 v[4:5], v24 offset0:2 offset1:3
ds_load_2addr_b32 v[6:7], v24 offset0:4 offset1:5
ds_load_2addr_b32 v[8:9], v24 offset0:6 offset1:7
ds_load_2addr_b32 v[10:11], v24 offset0:8 offset1:9
s_waitcnt lgkmcnt(4)
v_mul_lo_u32 v0, v2, v26
s_waitcnt vmcnt(14)
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[12:13], null, v3, v27, v[0:1]
s_waitcnt vmcnt(13) lgkmcnt(3)
v_mul_lo_u32 v2, v4, v28
s_waitcnt vmcnt(12)
v_mul_lo_u32 v25, v5, v29
ds_load_2addr_b32 v[4:5], v24 offset0:10 offset1:11
ds_load_2addr_b32 v[13:14], v24 offset0:12 offset1:13
s_waitcnt vmcnt(11) lgkmcnt(4)
v_mul_lo_u32 v0, v6, v30
s_waitcnt vmcnt(10)
v_mul_lo_u32 v3, v7, v31
ds_load_2addr_b32 v[6:7], v24 offset0:14 offset1:15
s_waitcnt vmcnt(9) lgkmcnt(4)
v_mul_lo_u32 v8, v8, v32
s_waitcnt vmcnt(8)
v_mul_lo_u32 v9, v9, v15
v_add3_u32 v2, v12, v2, v25
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_add3_u32 v0, v2, v0, v3
s_waitcnt vmcnt(7) lgkmcnt(3)
v_mul_lo_u32 v3, v10, v16
v_ashrrev_i32_e32 v2, 31, v1
v_add3_u32 v0, v0, v8, v9
s_waitcnt vmcnt(6)
v_mul_lo_u32 v10, v11, v17
s_waitcnt vmcnt(5) lgkmcnt(2)
v_mul_lo_u32 v4, v4, v18
s_waitcnt vmcnt(4)
v_mul_lo_u32 v5, v5, v19
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add3_u32 v3, v0, v3, v10
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add3_u32 v2, v3, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(3) lgkmcnt(1)
v_mul_lo_u32 v8, v13, v20
s_waitcnt vmcnt(2)
v_mul_lo_u32 v9, v14, v21
s_waitcnt vmcnt(1) lgkmcnt(0)
v_mul_lo_u32 v3, v6, v22
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, v7, v23
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, v2, v8, v9
v_add3_u32 v2, v2, v3, v4
global_store_b32 v[0:1], v2, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z25multiplication_matrix_GPUPiS_S_
.amdhsa_group_segment_fixed_size 64
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 33
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z25multiplication_matrix_GPUPiS_S_, .Lfunc_end0-_Z25multiplication_matrix_GPUPiS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 64
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z25multiplication_matrix_GPUPiS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z25multiplication_matrix_GPUPiS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 33
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007d0da_00000000-6_cuda_exo_2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
.type _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_, @function
_Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_:
.LFB2082:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z25multiplication_matrix_GPUPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_, .-_Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
.globl _Z25multiplication_matrix_GPUPiS_S_
.type _Z25multiplication_matrix_GPUPiS_S_, @function
_Z25multiplication_matrix_GPUPiS_S_:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z25multiplication_matrix_GPUPiS_S_, .-_Z25multiplication_matrix_GPUPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Diff\303\251rence : %d != %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movq %rax, 16(%rsp)
movl %eax, %r13d
sall $4, %r13d
movl %r13d, %eax
leaq 0(,%rax,4), %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, %rbx
movl $64, %edi
call malloc@PLT
movq %rax, %rbp
movl %r14d, %eax
leaq 0(,%rax,4), %r15
movq %r15, %rdi
call malloc@PLT
movq %rax, %r14
movq %r15, 8(%rsp)
movq %r15, %rdi
call malloc@PLT
movq %rax, %r15
movl $0, %edi
call cudaSetDevice@PLT
leaq 32(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $64, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movq 8(%rsp), %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r12, %rdx
movq %rbx, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $64, %edx
movq %rbp, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
testl %r13d, %r13d
je .L12
movl $0, %r12d
jmp .L14
.L13:
call rand@PLT
movl $0, %edx
divl %r13d
movl %edx, (%rbx,%r12,4)
addq $1, %r12
cmpl %r13d, %r12d
jnb .L12
.L14:
cmpl $15, %r12d
ja .L13
leal 1(%r12), %eax
movl %eax, 0(%rbp,%r12,4)
jmp .L13
.L12:
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
movq %rax, %r13
movq 16(%rsp), %rax
testl %eax, %eax
je .L15
movq %r14, %rdi
leal -1(%rax), %eax
leaq 4(%r14,%rax,4), %r9
movl $0, %esi
.L17:
movq %rdi, %r8
movl $0, %eax
movl $0, %ecx
.L16:
leal (%rsi,%rax), %edx
movl (%rbx,%rdx,4), %edx
imull 0(%rbp,%rax,4), %edx
addl %edx, %ecx
addq $1, %rax
cmpq $16, %rax
jne .L16
movl %ecx, (%r8)
addq $4, %rdi
addl $16, %esi
cmpq %r9, %rdi
jne .L17
.L15:
leaq 80(%rsp), %r12
movl $0, %esi
movq %r12, %rdi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
subq %r13, %rax
movq %rax, 24(%rsp)
movl $0, %esi
movq %r12, %rdi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
movq %rax, %r12
movl $16, 68(%rsp)
movl $1, 72(%rsp)
movl 16(%rsp), %eax
shrl $4, %eax
movl %eax, 56(%rsp)
movl $1, 60(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L27
.L18:
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
imulq $1000000, 80(%rsp), %rax
addq 88(%rsp), %rax
subq %r12, %rax
movq %rax, 16(%rsp)
movl $2, %ecx
movq 8(%rsp), %rdx
movq 48(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl $0, %r12d
leaq .LC0(%rip), %r13
jmp .L20
.L27:
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z49__device_stub__Z25multiplication_matrix_GPUPiS_S_PiS_S_
jmp .L18
.L19:
addq $4, %r12
cmpq $40, %r12
je .L28
.L20:
movl (%r14,%r12), %edx
movl (%r15,%r12), %ecx
cmpl %ecx, %edx
je .L19
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L19
.L28:
movq 16(%rsp), %rcx
movq 24(%rsp), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %rbx, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %r14, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L29
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC2:
.string "_Z25multiplication_matrix_GPUPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z25multiplication_matrix_GPUPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "cuda_exo_2.hip"
.globl _Z40__device_stub__multiplication_matrix_GPUPiS_S_ # -- Begin function _Z40__device_stub__multiplication_matrix_GPUPiS_S_
.p2align 4, 0x90
.type _Z40__device_stub__multiplication_matrix_GPUPiS_S_,@function
_Z40__device_stub__multiplication_matrix_GPUPiS_S_: # @_Z40__device_stub__multiplication_matrix_GPUPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z25multiplication_matrix_GPUPiS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z40__device_stub__multiplication_matrix_GPUPiS_S_, .Lfunc_end0-_Z40__device_stub__multiplication_matrix_GPUPiS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $216, %rsp
.cfi_def_cfa_offset 272
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movl %r15d, %ebp
shll $4, %ebp
leaq (,%rbp,4), %r13
movq %r13, %rdi
callq malloc
movq %rax, %rbx
movl $64, %edi
callq malloc
movq %rax, %r14
movq %r15, 104(%rsp) # 8-byte Spill
movl %r15d, %r12d
shlq $2, %r12
movq %r12, %rdi
callq malloc
movq %rax, %r15
movq %r12, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
xorl %edi, %edi
callq hipSetDevice
leaq 48(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
leaq 40(%rsp), %rdi
movl $64, %esi
callq hipMalloc
leaq 32(%rsp), %rdi
movq %r12, 112(%rsp) # 8-byte Spill
movq %r12, %rsi
callq hipMalloc
movq 48(%rsp), %rdi
movq %rbx, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movl $64, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
testl %ebp, %ebp
je .LBB1_5
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r13d
xorl %r12d, %r12d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
callq rand
xorl %edx, %edx
divl %ebp
movl %edx, (%rbx,%r12,4)
incq %r12
cmpq %r12, %r13
je .LBB1_5
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
cmpq $15, %r12
ja .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
leal 1(%r12), %eax
movl %eax, (%r14,%r12,4)
jmp .LBB1_4
.LBB1_5: # %._crit_edge
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 104(%rsp), %r12 # 8-byte Reload
testl %r12d, %r12d
je .LBB1_10
# %bb.6: # %.lr.ph95.preheader
movl %r12d, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB1_7: # %.lr.ph95
# =>This Loop Header: Depth=1
# Child Loop BB1_8 Depth 2
movl %ecx, %edx
andl $268435455, %edx # imm = 0xFFFFFFF
shlq $6, %rdx
addq %rbx, %rdx
movl $0, (%r15,%rcx,4)
xorl %edi, %edi
xorl %esi, %esi
.p2align 4, 0x90
.LBB1_8: # Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r14,%rdi,4), %r8d
imull (%rdx,%rdi,4), %r8d
addl %r8d, %esi
incq %rdi
cmpq $16, %rdi
jne .LBB1_8
# %bb.9: # in Loop: Header=BB1_7 Depth=1
movl %esi, (%r15,%rcx,4)
incq %rcx
cmpq %rax, %rcx
jne .LBB1_7
.LBB1_10: # %._crit_edge96
movq 8(%rsp), %rax
movq %rax, 88(%rsp) # 8-byte Spill
movq 16(%rsp), %rax
movq %rax, 96(%rsp) # 8-byte Spill
leaq 8(%rsp), %r13
movq %r13, %rdi
xorl %esi, %esi
callq gettimeofday
movq 8(%rsp), %rax
movq %rax, 72(%rsp) # 8-byte Spill
movq 16(%rsp), %rax
movq %rax, 80(%rsp) # 8-byte Spill
movq %r13, %rdi
xorl %esi, %esi
callq gettimeofday
movq 8(%rsp), %rax
movq %rax, 56(%rsp) # 8-byte Spill
movq 16(%rsp), %rax
movq %rax, 64(%rsp) # 8-byte Spill
shrl $4, %r12d
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %r12
orq $16, %rdx
movq %r12, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_12
# %bb.11:
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
movq 32(%rsp), %rdx
movq %rax, 184(%rsp)
movq %rcx, 176(%rsp)
movq %rdx, 168(%rsp)
leaq 184(%rsp), %rax
movq %rax, 192(%rsp)
leaq 176(%rsp), %rax
movq %rax, 200(%rsp)
leaq 168(%rsp), %rax
movq %rax, 208(%rsp)
leaq 152(%rsp), %rdi
leaq 136(%rsp), %rsi
leaq 128(%rsp), %rdx
leaq 120(%rsp), %rcx
callq __hipPopCallConfiguration
movq 152(%rsp), %rsi
movl 160(%rsp), %edx
movq 136(%rsp), %rcx
movl 144(%rsp), %r8d
leaq 192(%rsp), %r9
movl $_Z25multiplication_matrix_GPUPiS_S_, %edi
pushq 120(%rsp)
.cfi_adjust_cfa_offset 8
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_12:
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 8(%rsp), %r13
movq 16(%rsp), %rbp
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi # 8-byte Reload
movq 112(%rsp), %rdx # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
xorl %r12d, %r12d
jmp .LBB1_13
.p2align 4, 0x90
.LBB1_15: # in Loop: Header=BB1_13 Depth=1
incq %r12
cmpq $10, %r12
je .LBB1_16
.LBB1_13: # =>This Inner Loop Header: Depth=1
movl (%r15,%r12,4), %esi
movq 24(%rsp), %rax # 8-byte Reload
movl (%rax,%r12,4), %edx
cmpl %edx, %esi
je .LBB1_15
# %bb.14: # in Loop: Header=BB1_13 Depth=1
movl $.L.str, %edi
xorl %eax, %eax
callq printf
jmp .LBB1_15
.LBB1_16:
subq 56(%rsp), %r13 # 8-byte Folded Reload
imulq $1000000, %r13, %rax # imm = 0xF4240
subq 64(%rsp), %rbp # 8-byte Folded Reload
addq %rax, %rbp
movq 72(%rsp), %rax # 8-byte Reload
subq 88(%rsp), %rax # 8-byte Folded Reload
imulq $1000000, %rax, %rax # imm = 0xF4240
movq 80(%rsp), %rsi # 8-byte Reload
subq 96(%rsp), %rsi # 8-byte Folded Reload
addq %rax, %rsi
movl $.L.str.1, %edi
movq %rbp, %rdx
xorl %eax, %eax
callq printf
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq 24(%rsp), %rdi # 8-byte Reload
callq free
xorl %eax, %eax
addq $216, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z25multiplication_matrix_GPUPiS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z25multiplication_matrix_GPUPiS_S_,@object # @_Z25multiplication_matrix_GPUPiS_S_
.section .rodata,"a",@progbits
.globl _Z25multiplication_matrix_GPUPiS_S_
.p2align 3, 0x0
_Z25multiplication_matrix_GPUPiS_S_:
.quad _Z40__device_stub__multiplication_matrix_GPUPiS_S_
.size _Z25multiplication_matrix_GPUPiS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Diff\303\251rence : %d != %d\n"
.size .L.str, 24
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Temps de calcul, CPU [%llu usec] GPU [%llu usec] \n"
.size .L.str.1, 51
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z25multiplication_matrix_GPUPiS_S_"
.size .L__unnamed_1, 36
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z40__device_stub__multiplication_matrix_GPUPiS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z25multiplication_matrix_GPUPiS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
__global__
void helloWorldKernel() {
printf("Hello from Device, thread: %d\n", threadIdx.x);
}
int main() {
std::cout << "(1) Hello from Host" << std::endl;
helloWorldKernel<<< 2, 8 >>>(); // asynchronous call
std::cout << "(2) Hello from Host" << std::endl;
cudaDeviceSynchronize();
cudaDeviceReset();
} | code for sm_80
Function : _Z16helloWorldKernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
/*0020*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fe20007ffe0ff */
/*0030*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0040*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe20000000f00 */
/*0050*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0060*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe40007f1e0ff */
/*0070*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */
/* 0x0002a60000000a00 */
/*0080*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe200000e06ff */
/*0090*/ STL [R1], R8 ; /* 0x0000000801007387 */
/* 0x0013e80000100800 */
/*00a0*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x002fc60000000000 */
/*00b0*/ MOV R11, 0x120 ; /* 0x00000120000b7802 */
/* 0x000fe40000000f00 */
/*00c0*/ MOV R20, 0xa0 ; /* 0x000000a000147802 */
/* 0x000fc40000000f00 */
/*00d0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*00e0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*00f0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*0100*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0110*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x004fea0003c00000 */
/*0120*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0130*/ BRA 0x130; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
__global__
void helloWorldKernel() {
printf("Hello from Device, thread: %d\n", threadIdx.x);
}
int main() {
std::cout << "(1) Hello from Host" << std::endl;
helloWorldKernel<<< 2, 8 >>>(); // asynchronous call
std::cout << "(2) Hello from Host" << std::endl;
cudaDeviceSynchronize();
cudaDeviceReset();
} | .file "tmpxft_00084fb0_00000000-6_HelloWorld.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z16helloWorldKernelvv
.type _Z35__device_stub__Z16helloWorldKernelvv, @function
_Z35__device_stub__Z16helloWorldKernelvv:
.LFB3694:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z16helloWorldKernelv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z35__device_stub__Z16helloWorldKernelvv, .-_Z35__device_stub__Z16helloWorldKernelvv
.globl _Z16helloWorldKernelv
.type _Z16helloWorldKernelv, @function
_Z16helloWorldKernelv:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z16helloWorldKernelvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z16helloWorldKernelv, .-_Z16helloWorldKernelv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "(1) Hello from Host"
.LC1:
.string "(2) Hello from Host"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $8, 20(%rsp)
movl $1, 24(%rsp)
movl $2, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
call cudaDeviceSynchronize@PLT
call cudaDeviceReset@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z35__device_stub__Z16helloWorldKernelvv
jmp .L12
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z16helloWorldKernelv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z16helloWorldKernelv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
__global__
void helloWorldKernel() {
printf("Hello from Device, thread: %d\n", threadIdx.x);
}
int main() {
std::cout << "(1) Hello from Host" << std::endl;
helloWorldKernel<<< 2, 8 >>>(); // asynchronous call
std::cout << "(2) Hello from Host" << std::endl;
cudaDeviceSynchronize();
cudaDeviceReset();
} | #include <hip/hip_runtime.h>
#include <iostream>
__global__
void helloWorldKernel() {
printf("Hello from Device, thread: %d\n", threadIdx.x);
}
int main() {
std::cout << "(1) Hello from Host" << std::endl;
helloWorldKernel<<< 2, 8 >>>(); // asynchronous call
std::cout << "(2) Hello from Host" << std::endl;
hipDeviceSynchronize();
hipDeviceReset();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
__global__
void helloWorldKernel() {
printf("Hello from Device, thread: %d\n", threadIdx.x);
}
int main() {
std::cout << "(1) Hello from Host" << std::endl;
helloWorldKernel<<< 2, 8 >>>(); // asynchronous call
std::cout << "(2) Hello from Host" << std::endl;
hipDeviceSynchronize();
hipDeviceReset();
} | .text
.file "HelloWorld.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__helloWorldKernelv # -- Begin function _Z31__device_stub__helloWorldKernelv
.p2align 4, 0x90
.type _Z31__device_stub__helloWorldKernelv,@function
_Z31__device_stub__helloWorldKernelv: # @_Z31__device_stub__helloWorldKernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z16helloWorldKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z31__device_stub__helloWorldKernelv, .Lfunc_end0-_Z31__device_stub__helloWorldKernelv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $64, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -16
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $19, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_11
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_3
# %bb.2:
movzbl 67(%rbx), %eax
jmp .LBB1_4
.LBB1_3:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movabsq $4294967298, %rdi # imm = 0x100000002
leaq 6(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z16helloWorldKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $19, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_11
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i4
cmpb $0, 56(%rbx)
je .LBB1_9
# %bb.8:
movzbl 67(%rbx), %eax
jmp .LBB1_10
.LBB1_9:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_10: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit7
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
callq hipDeviceSynchronize
callq hipDeviceReset
xorl %eax, %eax
addq $64, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_11:
.cfi_def_cfa_offset 80
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16helloWorldKernelv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16helloWorldKernelv,@object # @_Z16helloWorldKernelv
.section .rodata,"a",@progbits
.globl _Z16helloWorldKernelv
.p2align 3, 0x0
_Z16helloWorldKernelv:
.quad _Z31__device_stub__helloWorldKernelv
.size _Z16helloWorldKernelv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "(1) Hello from Host"
.size .L.str, 20
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "(2) Hello from Host"
.size .L.str.1, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16helloWorldKernelv"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__helloWorldKernelv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16helloWorldKernelv
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00084fb0_00000000-6_HelloWorld.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z16helloWorldKernelvv
.type _Z35__device_stub__Z16helloWorldKernelvv, @function
_Z35__device_stub__Z16helloWorldKernelvv:
.LFB3694:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z16helloWorldKernelv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z35__device_stub__Z16helloWorldKernelvv, .-_Z35__device_stub__Z16helloWorldKernelvv
.globl _Z16helloWorldKernelv
.type _Z16helloWorldKernelv, @function
_Z16helloWorldKernelv:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z16helloWorldKernelvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z16helloWorldKernelv, .-_Z16helloWorldKernelv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "(1) Hello from Host"
.LC1:
.string "(2) Hello from Host"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $8, 20(%rsp)
movl $1, 24(%rsp)
movl $2, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
call cudaDeviceSynchronize@PLT
call cudaDeviceReset@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z35__device_stub__Z16helloWorldKernelvv
jmp .L12
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z16helloWorldKernelv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z16helloWorldKernelv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "HelloWorld.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z31__device_stub__helloWorldKernelv # -- Begin function _Z31__device_stub__helloWorldKernelv
.p2align 4, 0x90
.type _Z31__device_stub__helloWorldKernelv,@function
_Z31__device_stub__helloWorldKernelv: # @_Z31__device_stub__helloWorldKernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z16helloWorldKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z31__device_stub__helloWorldKernelv, .Lfunc_end0-_Z31__device_stub__helloWorldKernelv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $64, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -16
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $19, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_11
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_3
# %bb.2:
movzbl 67(%rbx), %eax
jmp .LBB1_4
.LBB1_3:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movabsq $4294967298, %rdi # imm = 0x100000002
leaq 6(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z16helloWorldKernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $19, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_11
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i4
cmpb $0, 56(%rbx)
je .LBB1_9
# %bb.8:
movzbl 67(%rbx), %eax
jmp .LBB1_10
.LBB1_9:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_10: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit7
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
callq hipDeviceSynchronize
callq hipDeviceReset
xorl %eax, %eax
addq $64, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_11:
.cfi_def_cfa_offset 80
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16helloWorldKernelv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16helloWorldKernelv,@object # @_Z16helloWorldKernelv
.section .rodata,"a",@progbits
.globl _Z16helloWorldKernelv
.p2align 3, 0x0
_Z16helloWorldKernelv:
.quad _Z31__device_stub__helloWorldKernelv
.size _Z16helloWorldKernelv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "(1) Hello from Host"
.size .L.str, 20
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "(2) Hello from Host"
.size .L.str.1, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16helloWorldKernelv"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__helloWorldKernelv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16helloWorldKernelv
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <bits/stdc++.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/copy.h>
#define to_ptr(x) thrust::raw_pointer_cast(&x[0])
#define gpu_copy(x, y) thrust::copy((x).begin(), (x).end(), (y).begin())
using namespace std;
const int BLOCK_SIZE = 1024;
const int SHARE_SIZE = 1024;
__global__ void naiveKernel(int N, float *input, float *output){
int global_i = blockIdx.x * blockDim.x + threadIdx.x;
if(global_i < N){
for(int i=0;i<N;++i) output[global_i] += input[i];
output[global_i] /= N;
}
return ;
}
__global__ void smemKernel(int N, float *input, float *output){
int b_size = blockDim.x, b_idx = blockIdx.x, t_idx = threadIdx.x;
int global_i = b_size * b_idx + t_idx, n_chk = (N + SHARE_SIZE - 1)/SHARE_SIZE;
__shared__ float buff[SHARE_SIZE];
for(int q=0;q<n_chk;++q){
int left = q*SHARE_SIZE, right = min(left + SHARE_SIZE, N);
for(int i = t_idx + left; i < right; i += b_size) buff[i-left] = input[i];
__syncthreads();
if(global_i < N){
for(int i = left; i < right; ++i) output[global_i] += buff[i-left];
}
__syncthreads();
}
output[global_i] /= N;
return ;
}
int main(int argc, char *argv[]){
int N = 1<<18;
if(argc > 1) N = stoi(string(argv[1]));
float *input = new float [N], *output = new float [N];
float *dev_in, *dev_out;
clock_t time;
cudaMalloc((void **)&dev_in, N*sizeof(float));
cudaMalloc((void **)&dev_out, N*sizeof(float));
for(int i=0;i<N;++i) input[i] = (float)rand()/RAND_MAX;
/* Using serial code */
time = clock();
cout << "Serial (CPU) Code:" << endl;
float ans = accumulate(input, input + N, 0.)/N;
cout << "Time Usage: " << float(clock() - time)/CLOCKS_PER_SEC << endl;
cout << "Answer: " << ans << endl << endl;
/* Doing parallel */
int block_size = BLOCK_SIZE;
int num_block = (N + block_size - 1)/block_size;
cout << "block_size = " << block_size << endl;
cout << "num_blocks = " << num_block << endl << endl;
cudaEvent_t start, stop;
float cuda_time;
cudaEventCreate(&start); // creating the event 1
cudaEventCreate(&stop); // creating the event 2
for(int q = 0; q < 6; ++q){
cudaMemcpy(dev_in , input, N*sizeof(float), cudaMemcpyHostToDevice);
memset(output, 0, N*sizeof(float));
cudaMemcpy(dev_out, output, N*sizeof(float), cudaMemcpyHostToDevice);
cudaEventRecord(start, 0); // Start time measuring
smemKernel<<<num_block, block_size>>>(N, dev_in, dev_out);
cout << "GPU code run #" << to_string(q+1) <<": " << endl;
cudaEventRecord(stop, 0); // Stop time measuring
cudaEventSynchronize(stop);
cudaEventElapsedTime(&cuda_time, start, stop); // Saving the time measured
cout << "Time Usage: " << cuda_time/1000 << endl << endl;
cudaMemcpy(output, dev_out, N*sizeof(float), cudaMemcpyDeviceToHost);
}
cudaFree(dev_in);
cudaFree(dev_out);
delete [] input;
delete [] output;
return 0;
} | #include <hip/hip_runtime.h>
#include <bits/stdc++.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/copy.h>
#define to_ptr(x) thrust::raw_pointer_cast(&x[0])
#define gpu_copy(x, y) thrust::copy((x).begin(), (x).end(), (y).begin())
using namespace std;
const int BLOCK_SIZE = 1024;
const int SHARE_SIZE = 1024;
__global__ void naiveKernel(int N, float *input, float *output){
int global_i = blockIdx.x * blockDim.x + threadIdx.x;
if(global_i < N){
for(int i=0;i<N;++i) output[global_i] += input[i];
output[global_i] /= N;
}
return ;
}
__global__ void smemKernel(int N, float *input, float *output){
int b_size = blockDim.x, b_idx = blockIdx.x, t_idx = threadIdx.x;
int global_i = b_size * b_idx + t_idx, n_chk = (N + SHARE_SIZE - 1)/SHARE_SIZE;
__shared__ float buff[SHARE_SIZE];
for(int q=0;q<n_chk;++q){
int left = q*SHARE_SIZE, right = min(left + SHARE_SIZE, N);
for(int i = t_idx + left; i < right; i += b_size) buff[i-left] = input[i];
__syncthreads();
if(global_i < N){
for(int i = left; i < right; ++i) output[global_i] += buff[i-left];
}
__syncthreads();
}
output[global_i] /= N;
return ;
}
int main(int argc, char *argv[]){
int N = 1<<18;
if(argc > 1) N = stoi(string(argv[1]));
float *input = new float [N], *output = new float [N];
float *dev_in, *dev_out;
clock_t time;
hipMalloc((void **)&dev_in, N*sizeof(float));
hipMalloc((void **)&dev_out, N*sizeof(float));
for(int i=0;i<N;++i) input[i] = (float)rand()/RAND_MAX;
/* Using serial code */
time = clock();
cout << "Serial (CPU) Code:" << endl;
float ans = accumulate(input, input + N, 0.)/N;
cout << "Time Usage: " << float(clock() - time)/CLOCKS_PER_SEC << endl;
cout << "Answer: " << ans << endl << endl;
/* Doing parallel */
int block_size = BLOCK_SIZE;
int num_block = (N + block_size - 1)/block_size;
cout << "block_size = " << block_size << endl;
cout << "num_blocks = " << num_block << endl << endl;
hipEvent_t start, stop;
float cuda_time;
hipEventCreate(&start); // creating the event 1
hipEventCreate(&stop); // creating the event 2
for(int q = 0; q < 6; ++q){
hipMemcpy(dev_in , input, N*sizeof(float), hipMemcpyHostToDevice);
memset(output, 0, N*sizeof(float));
hipMemcpy(dev_out, output, N*sizeof(float), hipMemcpyHostToDevice);
hipEventRecord(start, 0); // Start time measuring
smemKernel<<<num_block, block_size>>>(N, dev_in, dev_out);
cout << "GPU code run #" << to_string(q+1) <<": " << endl;
hipEventRecord(stop, 0); // Stop time measuring
hipEventSynchronize(stop);
hipEventElapsedTime(&cuda_time, start, stop); // Saving the time measured
cout << "Time Usage: " << cuda_time/1000 << endl << endl;
hipMemcpy(output, dev_out, N*sizeof(float), hipMemcpyDeviceToHost);
}
hipFree(dev_in);
hipFree(dev_out);
delete [] input;
delete [] output;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <bits/stdc++.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/copy.h>
#define to_ptr(x) thrust::raw_pointer_cast(&x[0])
#define gpu_copy(x, y) thrust::copy((x).begin(), (x).end(), (y).begin())
using namespace std;
const int BLOCK_SIZE = 1024;
const int SHARE_SIZE = 1024;
__global__ void naiveKernel(int N, float *input, float *output){
int global_i = blockIdx.x * blockDim.x + threadIdx.x;
if(global_i < N){
for(int i=0;i<N;++i) output[global_i] += input[i];
output[global_i] /= N;
}
return ;
}
__global__ void smemKernel(int N, float *input, float *output){
int b_size = blockDim.x, b_idx = blockIdx.x, t_idx = threadIdx.x;
int global_i = b_size * b_idx + t_idx, n_chk = (N + SHARE_SIZE - 1)/SHARE_SIZE;
__shared__ float buff[SHARE_SIZE];
for(int q=0;q<n_chk;++q){
int left = q*SHARE_SIZE, right = min(left + SHARE_SIZE, N);
for(int i = t_idx + left; i < right; i += b_size) buff[i-left] = input[i];
__syncthreads();
if(global_i < N){
for(int i = left; i < right; ++i) output[global_i] += buff[i-left];
}
__syncthreads();
}
output[global_i] /= N;
return ;
}
int main(int argc, char *argv[]){
int N = 1<<18;
if(argc > 1) N = stoi(string(argv[1]));
float *input = new float [N], *output = new float [N];
float *dev_in, *dev_out;
clock_t time;
hipMalloc((void **)&dev_in, N*sizeof(float));
hipMalloc((void **)&dev_out, N*sizeof(float));
for(int i=0;i<N;++i) input[i] = (float)rand()/RAND_MAX;
/* Using serial code */
time = clock();
cout << "Serial (CPU) Code:" << endl;
float ans = accumulate(input, input + N, 0.)/N;
cout << "Time Usage: " << float(clock() - time)/CLOCKS_PER_SEC << endl;
cout << "Answer: " << ans << endl << endl;
/* Doing parallel */
int block_size = BLOCK_SIZE;
int num_block = (N + block_size - 1)/block_size;
cout << "block_size = " << block_size << endl;
cout << "num_blocks = " << num_block << endl << endl;
hipEvent_t start, stop;
float cuda_time;
hipEventCreate(&start); // creating the event 1
hipEventCreate(&stop); // creating the event 2
for(int q = 0; q < 6; ++q){
hipMemcpy(dev_in , input, N*sizeof(float), hipMemcpyHostToDevice);
memset(output, 0, N*sizeof(float));
hipMemcpy(dev_out, output, N*sizeof(float), hipMemcpyHostToDevice);
hipEventRecord(start, 0); // Start time measuring
smemKernel<<<num_block, block_size>>>(N, dev_in, dev_out);
cout << "GPU code run #" << to_string(q+1) <<": " << endl;
hipEventRecord(stop, 0); // Stop time measuring
hipEventSynchronize(stop);
hipEventElapsedTime(&cuda_time, start, stop); // Saving the time measured
cout << "Time Usage: " << cuda_time/1000 << endl << endl;
hipMemcpy(output, dev_out, N*sizeof(float), hipMemcpyDeviceToHost);
}
hipFree(dev_in);
hipFree(dev_out);
delete [] input;
delete [] output;
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11naiveKerneliPfS_
.globl _Z11naiveKerneliPfS_
.p2align 8
.type _Z11naiveKerneliPfS_,@function
_Z11naiveKerneliPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_5
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_load_b64 s[0:1], s[0:1], 0x8
v_mov_b32_e32 v5, 0
s_mov_b32 s5, s4
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_load_b32 v0, v[3:4], off
.LBB0_3:
global_load_b32 v6, v5, s[0:1]
s_add_i32 s5, s5, -1
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s5, 0
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v6, v0
global_store_b32 v[3:4], v0, off
s_cbranch_scc0 .LBB0_3
.LBB0_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_cvt_f32_i32_e32 v3, s4
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v4, null, v3, v3, v2
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v2, v3, v2
v_mul_f32_e32 v7, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v4, v7, v6
v_fmac_f32_e32 v7, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v7, v6
v_div_fmas_f32 v4, v4, v5, v7
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v4, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11naiveKerneliPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11naiveKerneliPfS_, .Lfunc_end0-_Z11naiveKerneliPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z10smemKerneliPfS_
.globl _Z10smemKerneliPfS_
.p2align 8
.type _Z10smemKerneliPfS_,@function
_Z10smemKerneliPfS_:
s_clause 0x2
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s5, s5, 0xffff
s_cmp_lt_i32 s4, 1
v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
s_cbranch_scc1 .LBB1_10
s_load_b64 s[8:9], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_add_i32 s0, s4, 0x3ff
v_lshlrev_b32_e32 v9, 2, v0
s_lshr_b32 s0, s0, 10
v_cmp_gt_i32_e32 vcc_lo, s4, v1
s_max_i32 s6, s0, 1
v_add_co_u32 v3, s0, s2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
s_mov_b32 s7, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, s0, s8, v9
v_add_co_ci_u32_e64 v6, null, s9, 0, s0
s_lshl_b32 s8, s5, 2
s_mov_b32 s9, s7
s_branch .LBB1_3
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s0
v_add_co_u32 v5, s0, v5, 0x1000
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
s_add_i32 s9, s9, 1
s_waitcnt_vscnt null, 0x0
s_cmp_eq_u32 s9, s6
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_10
.LBB1_3:
s_lshl_b32 s10, s9, 10
s_mov_b32 s12, exec_lo
v_or_b32_e32 v10, s10, v0
s_add_i32 s0, s10, 0x400
s_delay_alu instid0(SALU_CYCLE_1)
s_min_i32 s11, s0, s4
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s11, v10
s_cbranch_execz .LBB1_6
v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
v_mov_b32_e32 v11, v9
s_mov_b32 s13, 0
.LBB1_5:
global_load_b32 v12, v[7:8], off
v_add_nc_u32_e32 v10, s5, v10
v_add_co_u32 v7, s0, v7, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v8, s0, s7, v8, s0
v_cmp_le_i32_e64 s1, s11, v10
s_delay_alu instid0(VALU_DEP_1)
s_or_b32 s13, s1, s13
s_waitcnt vmcnt(0)
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, s8, v11
s_and_not1_b32 exec_lo, exec_lo, s13
s_cbranch_execnz .LBB1_5
.LBB1_6:
s_or_b32 exec_lo, exec_lo, s12
s_cmp_lt_i32 s10, s4
s_waitcnt lgkmcnt(0)
s_cselect_b32 s0, -1, 0
s_barrier
s_and_b32 s1, vcc_lo, s0
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB1_2
global_load_b32 v7, v[3:4], off
s_mov_b32 s1, 0
.LBB1_8:
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v8, s1
s_add_i32 s10, s10, 1
s_add_i32 s1, s1, 4
s_cmp_lt_i32 s10, s11
ds_load_b32 v8, v8
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v7, v8, v7
s_cbranch_scc1 .LBB1_8
global_store_b32 v[3:4], v7, off
s_branch .LBB1_2
.LBB1_10:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_cvt_f32_i32_e32 v3, s4
v_add_co_u32 v0, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v4, null, v3, v3, v2
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v6, v5
v_div_scale_f32 v6, vcc_lo, v2, v3, v2
v_mul_f32_e32 v7, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, -v4, v7, v6
v_fmac_f32_e32 v7, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v4, v7, v6
v_div_fmas_f32 v4, v4, v5, v7
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v4, v3, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10smemKerneliPfS_
.amdhsa_group_segment_fixed_size 4096
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z10smemKerneliPfS_, .Lfunc_end1-_Z10smemKerneliPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11naiveKerneliPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z11naiveKerneliPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 4096
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10smemKerneliPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10smemKerneliPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <bits/stdc++.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/copy.h>
#define to_ptr(x) thrust::raw_pointer_cast(&x[0])
#define gpu_copy(x, y) thrust::copy((x).begin(), (x).end(), (y).begin())
using namespace std;
const int BLOCK_SIZE = 1024;
const int SHARE_SIZE = 1024;
__global__ void naiveKernel(int N, float *input, float *output){
int global_i = blockIdx.x * blockDim.x + threadIdx.x;
if(global_i < N){
for(int i=0;i<N;++i) output[global_i] += input[i];
output[global_i] /= N;
}
return ;
}
__global__ void smemKernel(int N, float *input, float *output){
int b_size = blockDim.x, b_idx = blockIdx.x, t_idx = threadIdx.x;
int global_i = b_size * b_idx + t_idx, n_chk = (N + SHARE_SIZE - 1)/SHARE_SIZE;
__shared__ float buff[SHARE_SIZE];
for(int q=0;q<n_chk;++q){
int left = q*SHARE_SIZE, right = min(left + SHARE_SIZE, N);
for(int i = t_idx + left; i < right; i += b_size) buff[i-left] = input[i];
__syncthreads();
if(global_i < N){
for(int i = left; i < right; ++i) output[global_i] += buff[i-left];
}
__syncthreads();
}
output[global_i] /= N;
return ;
}
int main(int argc, char *argv[]){
int N = 1<<18;
if(argc > 1) N = stoi(string(argv[1]));
float *input = new float [N], *output = new float [N];
float *dev_in, *dev_out;
clock_t time;
hipMalloc((void **)&dev_in, N*sizeof(float));
hipMalloc((void **)&dev_out, N*sizeof(float));
for(int i=0;i<N;++i) input[i] = (float)rand()/RAND_MAX;
/* Using serial code */
time = clock();
cout << "Serial (CPU) Code:" << endl;
float ans = accumulate(input, input + N, 0.)/N;
cout << "Time Usage: " << float(clock() - time)/CLOCKS_PER_SEC << endl;
cout << "Answer: " << ans << endl << endl;
/* Doing parallel */
int block_size = BLOCK_SIZE;
int num_block = (N + block_size - 1)/block_size;
cout << "block_size = " << block_size << endl;
cout << "num_blocks = " << num_block << endl << endl;
hipEvent_t start, stop;
float cuda_time;
hipEventCreate(&start); // creating the event 1
hipEventCreate(&stop); // creating the event 2
for(int q = 0; q < 6; ++q){
hipMemcpy(dev_in , input, N*sizeof(float), hipMemcpyHostToDevice);
memset(output, 0, N*sizeof(float));
hipMemcpy(dev_out, output, N*sizeof(float), hipMemcpyHostToDevice);
hipEventRecord(start, 0); // Start time measuring
smemKernel<<<num_block, block_size>>>(N, dev_in, dev_out);
cout << "GPU code run #" << to_string(q+1) <<": " << endl;
hipEventRecord(stop, 0); // Stop time measuring
hipEventSynchronize(stop);
hipEventElapsedTime(&cuda_time, start, stop); // Saving the time measured
cout << "Time Usage: " << cuda_time/1000 << endl << endl;
hipMemcpy(output, dev_out, N*sizeof(float), hipMemcpyDeviceToHost);
}
hipFree(dev_in);
hipFree(dev_out);
delete [] input;
delete [] output;
return 0;
} | .text
.file "multi.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__naiveKerneliPfS_ # -- Begin function _Z26__device_stub__naiveKerneliPfS_
.p2align 4, 0x90
.type _Z26__device_stub__naiveKerneliPfS_,@function
_Z26__device_stub__naiveKerneliPfS_: # @_Z26__device_stub__naiveKerneliPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11naiveKerneliPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z26__device_stub__naiveKerneliPfS_, .Lfunc_end0-_Z26__device_stub__naiveKerneliPfS_
.cfi_endproc
# -- End function
.globl _Z25__device_stub__smemKerneliPfS_ # -- Begin function _Z25__device_stub__smemKerneliPfS_
.p2align 4, 0x90
.type _Z25__device_stub__smemKerneliPfS_,@function
_Z25__device_stub__smemKerneliPfS_: # @_Z25__device_stub__smemKerneliPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10smemKerneliPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z25__device_stub__smemKerneliPfS_, .Lfunc_end1-_Z25__device_stub__smemKerneliPfS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI2_0:
.long 0x30000000 # float 4.65661287E-10
.LCPI2_1:
.long 0x49742400 # float 1.0E+6
.LCPI2_2:
.long 0x447a0000 # float 1000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $262144, %ebp # imm = 0x40000
cmpl $2, %edi
jl .LBB2_33
# %bb.1:
movq 8(%rsi), %rbx
leaq 16(%rsp), %rax
movq %rax, (%rsp)
testq %rbx, %rbx
je .LBB2_2
# %bb.4:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq strlen
movq %rax, %r14
cmpq $16, %rax
jb .LBB2_13
# %bb.5:
testq %r14, %r14
js .LBB2_6
# %bb.8:
movq %r14, %rdi
incq %rdi
js .LBB2_9
# %bb.11: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm.exit.i.i
.Ltmp0:
.cfi_escape 0x2e, 0x00
callq _Znwm
.Ltmp1:
# %bb.12: # %.noexc51
movq %rax, (%rsp)
movq %r14, 16(%rsp)
.LBB2_13:
testq %r14, %r14
je .LBB2_17
# %bb.14:
movq (%rsp), %rdi
cmpq $1, %r14
jne .LBB2_16
# %bb.15:
movzbl (%rbx), %eax
movb %al, (%rdi)
jmp .LBB2_17
.LBB2_16:
.cfi_escape 0x2e, 0x00
movq %rbx, %rsi
movq %r14, %rdx
callq memcpy@PLT
.LBB2_17: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
movq %r14, 8(%rsp)
movq (%rsp), %rax
movb $0, (%rax,%r14)
movq (%rsp), %rbx
.cfi_escape 0x2e, 0x00
callq __errno_location
movq %rax, %r14
movl (%rax), %ebp
movl $0, (%rax)
.cfi_escape 0x2e, 0x00
leaq 88(%rsp), %rsi
movq %rbx, %rdi
movl $10, %edx
callq __isoc23_strtol
cmpq %rbx, 88(%rsp)
je .LBB2_18
# %bb.24:
movslq %eax, %rcx
cmpq %rax, %rcx
jne .LBB2_26
# %bb.25:
movq %rax, %rbx
movl (%r14), %eax
cmpl $34, %eax
je .LBB2_26
# %bb.28:
testl %eax, %eax
jne .LBB2_30
# %bb.29:
movl %ebp, (%r14)
.LBB2_30: # %_ZNSt7__cxx114stoiERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEPmi.exit
movq (%rsp), %rdi
leaq 16(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_32
# %bb.31: # %.critedge.i.i52
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_32: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
movq %rbx, %rbp
.LBB2_33:
movslq %ebp, %r14
leaq (,%r14,4), %r13
testl %r14d, %r14d
movq $-1, %rbx
cmovnsq %r13, %rbx
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Znam
movq %rax, %r15
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Znam
movq %rax, %r12
.cfi_escape 0x2e, 0x00
leaq 72(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
.cfi_escape 0x2e, 0x00
leaq 48(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
testl %r14d, %r14d
jle .LBB2_36
# %bb.34: # %.lr.ph.preheader
movl %ebp, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB2_35: # %.lr.ph
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI2_0(%rip), %xmm0
movss %xmm0, (%r15,%r14,4)
incq %r14
cmpq %r14, %rbx
jne .LBB2_35
.LBB2_36: # %._crit_edge
movq %r15, 56(%rsp) # 8-byte Spill
.cfi_escape 0x2e, 0x00
callq clock
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $18, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB2_100
# %bb.37: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB2_39
# %bb.38:
movzbl 67(%rbx), %eax
jmp .LBB2_40
.LBB2_39:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_40: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
.cfi_escape 0x2e, 0x00
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
xorpd %xmm1, %xmm1
testl %ebp, %ebp
je .LBB2_43
# %bb.41: # %.lr.ph.i.preheader
xorl %eax, %eax
movq 56(%rsp), %rcx # 8-byte Reload
.p2align 4, 0x90
.LBB2_42: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movss (%rcx,%rax), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
addsd %xmm0, %xmm1
addq $4, %rax
cmpq %rax, %r13
jne .LBB2_42
.LBB2_43: # %_ZSt10accumulateIPfdET0_T_S2_S1_.exit
movsd %xmm1, 40(%rsp) # 8-byte Spill
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $12, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.cfi_escape 0x2e, 0x00
callq clock
subq %r14, %rax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
divss .LCPI2_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_101
# %bb.44: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i68
xorps %xmm0, %xmm0
cvtsi2sd %ebp, %xmm0
movsd 40(%rsp), %xmm1 # 8-byte Reload
# xmm1 = mem[0],zero
divsd %xmm0, %xmm1
xorps %xmm0, %xmm0
cvtsd2ss %xmm1, %xmm0
movss %xmm0, 40(%rsp) # 4-byte Spill
cmpb $0, 56(%rbx)
je .LBB2_46
# %bb.45:
movzbl 67(%rbx), %ecx
jmp .LBB2_47
.LBB2_46:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_47: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit71
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $8, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss 40(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_102
# %bb.48: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i73
cmpb $0, 56(%rbx)
je .LBB2_50
# %bb.49:
movzbl 67(%rbx), %ecx
jmp .LBB2_51
.LBB2_50:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_51: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit76
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_103
# %bb.52: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i78
cmpb $0, 56(%rbx)
je .LBB2_54
# %bb.53:
movzbl 67(%rbx), %ecx
jmp .LBB2_55
.LBB2_54:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_55: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit81
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
leal 1023(%rbp), %eax
leal 2046(%rbp), %r14d
testl %eax, %eax
cmovnsl %eax, %r14d
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $13, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $1024, %esi # imm = 0x400
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_104
# %bb.56: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i83
sarl $10, %r14d
cmpb $0, 56(%rbx)
je .LBB2_58
# %bb.57:
movzbl 67(%rbx), %ecx
jmp .LBB2_59
.LBB2_58:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB2_59: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit86
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $13, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl %r14d, %esi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_105
# %bb.60: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i88
cmpb $0, 56(%rbx)
je .LBB2_62
# %bb.61:
movzbl 67(%rbx), %ecx
jmp .LBB2_63
.LBB2_62:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB2_63: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit91
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_106
# %bb.64: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i93
cmpb $0, 56(%rbx)
movq %rbp, 112(%rsp) # 8-byte Spill
je .LBB2_66
# %bb.65:
movzbl 67(%rbx), %ecx
jmp .LBB2_67
.LBB2_66:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB2_67: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit96
movabsq $4294967296, %rbx # imm = 0x100000000
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
.cfi_escape 0x2e, 0x00
leaq 104(%rsp), %rdi
callq hipEventCreate
.cfi_escape 0x2e, 0x00
leaq 64(%rsp), %rdi
callq hipEventCreate
movl %r14d, %r14d
orq %rbx, %r14
movl $-6, %ebp
addq $1024, %rbx # imm = 0x400
movq %rbx, 40(%rsp) # 8-byte Spill
jmp .LBB2_68
.p2align 4, 0x90
.LBB2_90: # in Loop: Header=BB2_68 Depth=1
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB2_91: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit118
# in Loop: Header=BB2_68 Depth=1
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
movq 48(%rsp), %rsi
.cfi_escape 0x2e, 0x00
movq %r12, %rdi
movq %r13, %rdx
movl $2, %ecx
callq hipMemcpy
incl %ebp
je .LBB2_92
.LBB2_68: # =>This Inner Loop Header: Depth=1
movq 72(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movq 56(%rsp), %rsi # 8-byte Reload
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movq %r12, %rdi
xorl %esi, %esi
movq %r13, %rdx
callq memset@PLT
movq 48(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movq %r12, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 104(%rsp), %rdi
.cfi_escape 0x2e, 0x00
xorl %esi, %esi
callq hipEventRecord
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq 40(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_70
# %bb.69: # in Loop: Header=BB2_68 Depth=1
movq 72(%rsp), %rax
movq 48(%rsp), %rcx
movq 112(%rsp), %rdx # 8-byte Reload
movl %edx, 84(%rsp)
movq %rax, 160(%rsp)
movq %rcx, 152(%rsp)
leaq 84(%rsp), %rax
movq %rax, (%rsp)
leaq 160(%rsp), %rax
movq %rax, 8(%rsp)
leaq 152(%rsp), %rax
movq %rax, 16(%rsp)
.cfi_escape 0x2e, 0x00
leaq 88(%rsp), %rdi
leaq 136(%rsp), %rsi
leaq 128(%rsp), %rdx
leaq 120(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 136(%rsp), %rcx
movl 144(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z10smemKerneliPfS_, %edi
movq %rsp, %r9
pushq 120(%rsp)
.cfi_adjust_cfa_offset 8
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_70: # %_ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i
# in Loop: Header=BB2_68 Depth=1
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.5, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
leaq 16(%rsp), %rsi
movq %rsi, (%rsp)
movq $1, 8(%rsp)
movb $0, 17(%rsp)
leal 55(%rbp), %eax
movb %al, 16(%rsp)
.Ltmp2:
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
# %bb.71: # %_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
# in Loop: Header=BB2_68 Depth=1
.Ltmp4:
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
movl $.L.str.6, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.72: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
# in Loop: Header=BB2_68 Depth=1
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r15
testq %r15, %r15
je .LBB2_73
# %bb.75: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i98
# in Loop: Header=BB2_68 Depth=1
cmpb $0, 56(%r15)
je .LBB2_77
# %bb.76: # in Loop: Header=BB2_68 Depth=1
movzbl 67(%r15), %eax
jmp .LBB2_79
.p2align 4, 0x90
.LBB2_77: # in Loop: Header=BB2_68 Depth=1
.Ltmp6:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
.Ltmp7:
# %bb.78: # %.noexc102
# in Loop: Header=BB2_68 Depth=1
movq (%r15), %rax
.Ltmp8:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
.Ltmp9:
.LBB2_79: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i
# in Loop: Header=BB2_68 Depth=1
.Ltmp10:
.cfi_escape 0x2e, 0x00
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
.Ltmp11:
# %bb.80: # %.noexc104
# in Loop: Header=BB2_68 Depth=1
.Ltmp12:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
.Ltmp13:
# %bb.81: # %_ZNSolsEPFRSoS_E.exit
# in Loop: Header=BB2_68 Depth=1
movq (%rsp), %rdi
leaq 16(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_83
# %bb.82: # %.critedge.i.i60
# in Loop: Header=BB2_68 Depth=1
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_83: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit62
# in Loop: Header=BB2_68 Depth=1
movq 64(%rsp), %rdi
.cfi_escape 0x2e, 0x00
xorl %esi, %esi
callq hipEventRecord
movq 64(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq hipEventSynchronize
movq 104(%rsp), %rsi
movq 64(%rsp), %rdx
.cfi_escape 0x2e, 0x00
leaq 80(%rsp), %rdi
callq hipEventElapsedTime
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $12, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss 80(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss .LCPI2_2(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_107
# %bb.84: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i108
# in Loop: Header=BB2_68 Depth=1
cmpb $0, 56(%rbx)
je .LBB2_86
# %bb.85: # in Loop: Header=BB2_68 Depth=1
movzbl 67(%rbx), %ecx
jmp .LBB2_87
.p2align 4, 0x90
.LBB2_86: # in Loop: Header=BB2_68 Depth=1
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB2_87: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit112
# in Loop: Header=BB2_68 Depth=1
.cfi_escape 0x2e, 0x00
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_108
# %bb.88: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i114
# in Loop: Header=BB2_68 Depth=1
cmpb $0, 56(%rbx)
je .LBB2_90
# %bb.89: # in Loop: Header=BB2_68 Depth=1
movzbl 67(%rbx), %ecx
jmp .LBB2_91
.LBB2_92:
movq 72(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq hipFree
movq 48(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq hipFree
.cfi_escape 0x2e, 0x00
movq 56(%rsp), %rdi # 8-byte Reload
callq _ZdaPv
.cfi_escape 0x2e, 0x00
movq %r12, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_9: # %.noexc11.i
.cfi_def_cfa_offset 224
.Ltmp23:
.cfi_escape 0x2e, 0x00
callq _ZSt17__throw_bad_allocv
.Ltmp24:
# %bb.10: # %.noexc50
.LBB2_108:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_73:
.Ltmp15:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.Ltmp16:
# %bb.74: # %.noexc101
.LBB2_107:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_100:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_101:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_102:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_103:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_104:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_105:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_106:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.LBB2_2:
.Ltmp27:
.cfi_escape 0x2e, 0x00
movl $.L.str.8, %edi
callq _ZSt19__throw_logic_errorPKc
.Ltmp28:
# %bb.3: # %.noexc
.LBB2_18:
.Ltmp20:
.cfi_escape 0x2e, 0x00
movl $.L.str.7, %edi
callq _ZSt24__throw_invalid_argumentPKc
.Ltmp21:
# %bb.19:
.LBB2_26: # %.critedge.i.i
.Ltmp18:
.cfi_escape 0x2e, 0x00
movl $.L.str.7, %edi
callq _ZSt20__throw_out_of_rangePKc
.Ltmp19:
# %bb.27:
.LBB2_6: # %.noexc.i
.Ltmp25:
.cfi_escape 0x2e, 0x00
movl $.L.str.9, %edi
callq _ZSt20__throw_length_errorPKc
.Ltmp26:
# %bb.7: # %.noexc49
.LBB2_20:
.Ltmp22:
movq %rax, %rbx
cmpl $0, (%r14)
jne .LBB2_22
# %bb.21:
movl %ebp, (%r14)
.LBB2_22: # %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
movq (%rsp), %rdi
leaq 16(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_98
# %bb.23: # %.critedge.i.i53
.cfi_escape 0x2e, 0x00
jmp .LBB2_97
.LBB2_94: # %.loopexit.split-lp
.Ltmp17:
jmp .LBB2_95
.LBB2_109:
.Ltmp29:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _Unwind_Resume@PLT
.LBB2_93: # %.loopexit
.Ltmp14:
.LBB2_95:
movq (%rsp), %rdi
leaq 16(%rsp), %rcx
cmpq %rcx, %rdi
je .LBB2_99
# %bb.96: # %.critedge.i.i63
.cfi_escape 0x2e, 0x00
movq %rax, %rbx
.LBB2_97:
callq _ZdlPv
.LBB2_98:
movq %rbx, %rax
.LBB2_99:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table2:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1
.uleb128 .Ltmp29-.Lfunc_begin0 # jumps to .Ltmp29
.byte 0 # On action: cleanup
.uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp2-.Ltmp1 # Call between .Ltmp1 and .Ltmp2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp2-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp13-.Ltmp2 # Call between .Ltmp2 and .Ltmp13
.uleb128 .Ltmp14-.Lfunc_begin0 # jumps to .Ltmp14
.byte 0 # On action: cleanup
.uleb128 .Ltmp13-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp23-.Ltmp13 # Call between .Ltmp13 and .Ltmp23
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp23-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp24-.Ltmp23 # Call between .Ltmp23 and .Ltmp24
.uleb128 .Ltmp29-.Lfunc_begin0 # jumps to .Ltmp29
.byte 0 # On action: cleanup
.uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Ltmp15-.Ltmp24 # Call between .Ltmp24 and .Ltmp15
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp15-.Lfunc_begin0 # >> Call Site 7 <<
.uleb128 .Ltmp16-.Ltmp15 # Call between .Ltmp15 and .Ltmp16
.uleb128 .Ltmp17-.Lfunc_begin0 # jumps to .Ltmp17
.byte 0 # On action: cleanup
.uleb128 .Ltmp16-.Lfunc_begin0 # >> Call Site 8 <<
.uleb128 .Ltmp27-.Ltmp16 # Call between .Ltmp16 and .Ltmp27
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp27-.Lfunc_begin0 # >> Call Site 9 <<
.uleb128 .Ltmp28-.Ltmp27 # Call between .Ltmp27 and .Ltmp28
.uleb128 .Ltmp29-.Lfunc_begin0 # jumps to .Ltmp29
.byte 0 # On action: cleanup
.uleb128 .Ltmp20-.Lfunc_begin0 # >> Call Site 10 <<
.uleb128 .Ltmp19-.Ltmp20 # Call between .Ltmp20 and .Ltmp19
.uleb128 .Ltmp22-.Lfunc_begin0 # jumps to .Ltmp22
.byte 0 # On action: cleanup
.uleb128 .Ltmp25-.Lfunc_begin0 # >> Call Site 11 <<
.uleb128 .Ltmp26-.Ltmp25 # Call between .Ltmp25 and .Ltmp26
.uleb128 .Ltmp29-.Lfunc_begin0 # jumps to .Ltmp29
.byte 0 # On action: cleanup
.uleb128 .Ltmp26-.Lfunc_begin0 # >> Call Site 12 <<
.uleb128 .Lfunc_end2-.Ltmp26 # Call between .Ltmp26 and .Lfunc_end2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11naiveKerneliPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10smemKerneliPfS_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11naiveKerneliPfS_,@object # @_Z11naiveKerneliPfS_
.section .rodata,"a",@progbits
.globl _Z11naiveKerneliPfS_
.p2align 3, 0x0
_Z11naiveKerneliPfS_:
.quad _Z26__device_stub__naiveKerneliPfS_
.size _Z11naiveKerneliPfS_, 8
.type _Z10smemKerneliPfS_,@object # @_Z10smemKerneliPfS_
.globl _Z10smemKerneliPfS_
.p2align 3, 0x0
_Z10smemKerneliPfS_:
.quad _Z25__device_stub__smemKerneliPfS_
.size _Z10smemKerneliPfS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Serial (CPU) Code:"
.size .L.str, 19
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Time Usage: "
.size .L.str.1, 13
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Answer: "
.size .L.str.2, 9
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "block_size = "
.size .L.str.3, 14
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "num_blocks = "
.size .L.str.4, 14
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "GPU code run #"
.size .L.str.5, 15
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz ": "
.size .L.str.6, 3
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "stoi"
.size .L.str.7, 5
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "basic_string: construction from null is not valid"
.size .L.str.8, 50
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "basic_string::_M_create"
.size .L.str.9, 24
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z11naiveKerneliPfS_"
.size .L__unnamed_1, 21
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z10smemKerneliPfS_"
.size .L__unnamed_2, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__naiveKerneliPfS_
.addrsig_sym _Z25__device_stub__smemKerneliPfS_
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z11naiveKerneliPfS_
.addrsig_sym _Z10smemKerneliPfS_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__ void index_kernel( int* a, int N){
int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x;
printf("%d\n", threadId);
}
void print_to_file(const char* file_name, const int* a, int N){
std::ofstream fout(file_name);
if (fout.is_open()){
for (int i = 0; i < N; i++){
fout << a[i] << "\n";
}
fout.close();
}
else {
std::cout << "Unable to open file\n";
}
}
int main(){
int N = 128;
size_t size = N * sizeof(int);
int *a = new int[N];
print_to_file("input.txt", a, N);
int *dev_a;
cudaMalloc((void **)&dev_a, size);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
index_kernel<<<dim3(2, 2, 2), dim3(4, 2, 2)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output1.txt", a, N);
/*
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 1, 1), dim3(64, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output2.txt", a, N);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 2, 1), dim3(32, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output3.txt", a, N);
*/
cudaFree(dev_a);
delete[] a;
return 0;
} | code for sm_80
Function : _Z12index_kernelPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ MOV R2, 0x0 ; /* 0x0000000000027802 */
/* 0x000fe20000000f00 */
/*0030*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0040*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fe20007ffe0ff */
/*0050*/ S2R R5, SR_CTAID.Z ; /* 0x0000000000057919 */
/* 0x000e260000002700 */
/*0060*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe20007f1e0ff */
/*0070*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e680000002500 */
/*0080*/ S2R R7, SR_TID.Z ; /* 0x0000000000077919 */
/* 0x000ea80000002300 */
/*0090*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */
/* 0x000ee80000002200 */
/*00a0*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000f220000002100 */
/*00b0*/ IMAD R0, R5, c[0x0][0x10], R0 ; /* 0x0000040005007a24 */
/* 0x001fc400078e0200 */
/*00c0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe400078e00ff */
/*00d0*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x002fe400078e0203 */
/*00e0*/ LDC.64 R2, c[0x4][R2] ; /* 0x0100000002027b82 */
/* 0x000e240000000a00 */
/*00f0*/ IMAD R0, R0, c[0x0][0x8], R7 ; /* 0x0000020000007a24 */
/* 0x004fe400078e0207 */
/*0100*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe400000e06ff */
/*0110*/ IMAD R0, R0, c[0x0][0x4], R9 ; /* 0x0000010000007a24 */
/* 0x008fc800078e0209 */
/*0120*/ IMAD R0, R0, c[0x0][0x0], R11 ; /* 0x0000000000007a24 */
/* 0x010fca00078e020b */
/*0130*/ STL [R1], R0 ; /* 0x0000000001007387 */
/* 0x0003e40000100800 */
/*0140*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x000fe40000000000 */
/*0150*/ MOV R11, 0x1c0 ; /* 0x000001c0000b7802 */
/* 0x000fe40000000f00 */
/*0160*/ MOV R20, 0x140 ; /* 0x0000014000147802 */
/* 0x000fe40000000f00 */
/*0170*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0180*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x002fe40000000f00 */
/*0190*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*01a0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*01b0*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x001fea0003c00000 */
/*01c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01d0*/ BRA 0x1d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__ void index_kernel( int* a, int N){
int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x;
printf("%d\n", threadId);
}
void print_to_file(const char* file_name, const int* a, int N){
std::ofstream fout(file_name);
if (fout.is_open()){
for (int i = 0; i < N; i++){
fout << a[i] << "\n";
}
fout.close();
}
else {
std::cout << "Unable to open file\n";
}
}
int main(){
int N = 128;
size_t size = N * sizeof(int);
int *a = new int[N];
print_to_file("input.txt", a, N);
int *dev_a;
cudaMalloc((void **)&dev_a, size);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
index_kernel<<<dim3(2, 2, 2), dim3(4, 2, 2)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output1.txt", a, N);
/*
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 1, 1), dim3(64, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output2.txt", a, N);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 2, 1), dim3(32, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output3.txt", a, N);
*/
cudaFree(dev_a);
delete[] a;
return 0;
} | .file "tmpxft_0006b53c_00000000-6_indexing.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3804:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3804:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z12index_kernelPiiPii
.type _Z33__device_stub__Z12index_kernelPiiPii, @function
_Z33__device_stub__Z12index_kernelPiiPii:
.LFB3826:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12index_kernelPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3826:
.size _Z33__device_stub__Z12index_kernelPiiPii, .-_Z33__device_stub__Z12index_kernelPiiPii
.globl _Z12index_kernelPii
.type _Z12index_kernelPii, @function
_Z12index_kernelPii:
.LFB3827:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z12index_kernelPiiPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3827:
.size _Z12index_kernelPii, .-_Z12index_kernelPii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12index_kernelPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3829:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12index_kernelPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3829:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.1
.LC1:
.string "\n"
.LC2:
.string "Unable to open file\n"
.text
.globl _Z13print_to_filePKcPKii
.type _Z13print_to_filePKcPKii, @function
_Z13print_to_filePKcPKii:
.LFB3800:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA3800
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $536, %rsp
.cfi_def_cfa_offset 592
movq %rdi, %rbx
movq %rsi, %r12
movl %edx, %ebp
movq %fs:40, %rax
movq %rax, 520(%rsp)
xorl %eax, %eax
movq %rsp, %r15
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseC2Ev@PLT
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
movq $0, 464(%rsp)
movb $0, 472(%rsp)
movb $0, 473(%rsp)
movq $0, 480(%rsp)
movq $0, 488(%rsp)
movq $0, 496(%rsp)
movq $0, 504(%rsp)
movq 8+_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r13
movq %r13, (%rsp)
movq 16+_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r14
movq -24(%r13), %rax
movq %r14, (%rsp,%rax)
movq (%rsp), %rax
movq %r15, %rdi
addq -24(%rax), %rdi
movl $0, %esi
.LEHB0:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE0:
leaq 24+_ZTVSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, (%rsp)
leaq 40(%rax), %rax
movq %rax, 248(%rsp)
leaq 8(%rsp), %rdi
.LEHB1:
call _ZNSt13basic_filebufIcSt11char_traitsIcEEC1Ev@PLT
.LEHE1:
leaq 8(%rsp), %rsi
leaq 248(%rsp), %rdi
.LEHB2:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
leaq 8(%rsp), %rdi
movl $16, %edx
movq %rbx, %rsi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
testq %rax, %rax
je .L38
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl $0, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L15
.L38:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.LEHE2:
.L15:
leaq 112(%rsp), %rdi
call _ZNKSt12__basic_fileIcE7is_openEv@PLT
testb %al, %al
je .L16
testl %ebp, %ebp
jle .L18
movq %r12, %rbx
movslq %ebp, %rbp
leaq (%r12,%rbp,4), %rbp
leaq .LC1(%rip), %r12
jmp .L23
.L33:
endbr64
movq %rax, %rbx
leaq 8(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEED1Ev@PLT
.L20:
movq %r13, (%rsp)
movq -24(%r13), %rax
movq %r14, (%rsp,%rax)
.L21:
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
je .L22
call __stack_chk_fail@PLT
.L32:
endbr64
movq %rax, %rbx
jmp .L20
.L31:
endbr64
movq %rax, %rbx
jmp .L21
.L22:
movq %rbx, %rdi
.LEHB3:
call _Unwind_Resume@PLT
.LEHE3:
.L39:
movq %rax, %rdi
movl $1, %edx
movq %r12, %rsi
.LEHB4:
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $4, %rbx
cmpq %rbx, %rbp
je .L18
.L23:
movl (%rbx), %esi
movq %rsp, %rdi
call _ZNSolsEi@PLT
jmp .L39
.L18:
leaq 8(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE4:
testq %rax, %rax
je .L40
.L24:
leaq 24+_ZTVSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, (%rsp)
leaq 40(%rax), %rax
movq %rax, 248(%rsp)
leaq 16+_ZTVSt13basic_filebufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 8(%rsp)
leaq 8(%rsp), %rdi
.LEHB5:
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE5:
jmp .L26
.L40:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
.LEHB6:
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L24
.L16:
movl $20, %edx
leaq .LC2(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.LEHE6:
jmp .L24
.L34:
endbr64
movq %rax, %rdi
call __cxa_begin_catch@PLT
call __cxa_end_catch@PLT
.L26:
leaq 112(%rsp), %rdi
call _ZNSt12__basic_fileIcED1Ev@PLT
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 8(%rsp)
leaq 64(%rsp), %rdi
call _ZNSt6localeD1Ev@PLT
movq %r13, (%rsp)
movq -24(%r13), %rax
movq %r14, (%rsp,%rax)
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
jne .L41
addq $536, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
endbr64
movq %rax, %rbx
movq %rsp, %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
je .L28
call __stack_chk_fail@PLT
.L28:
movq %rbx, %rdi
.LEHB7:
call _Unwind_Resume@PLT
.LEHE7:
.L41:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3800:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.align 4
.LLSDA3800:
.byte 0xff
.byte 0x9b
.uleb128 .LLSDATT3800-.LLSDATTD3800
.LLSDATTD3800:
.byte 0x1
.uleb128 .LLSDACSE3800-.LLSDACSB3800
.LLSDACSB3800:
.uleb128 .LEHB0-.LFB3800
.uleb128 .LEHE0-.LEHB0
.uleb128 .L31-.LFB3800
.uleb128 0
.uleb128 .LEHB1-.LFB3800
.uleb128 .LEHE1-.LEHB1
.uleb128 .L32-.LFB3800
.uleb128 0
.uleb128 .LEHB2-.LFB3800
.uleb128 .LEHE2-.LEHB2
.uleb128 .L33-.LFB3800
.uleb128 0
.uleb128 .LEHB3-.LFB3800
.uleb128 .LEHE3-.LEHB3
.uleb128 0
.uleb128 0
.uleb128 .LEHB4-.LFB3800
.uleb128 .LEHE4-.LEHB4
.uleb128 .L30-.LFB3800
.uleb128 0
.uleb128 .LEHB5-.LFB3800
.uleb128 .LEHE5-.LEHB5
.uleb128 .L34-.LFB3800
.uleb128 0x1
.uleb128 .LEHB6-.LFB3800
.uleb128 .LEHE6-.LEHB6
.uleb128 .L30-.LFB3800
.uleb128 0
.uleb128 .LEHB7-.LFB3800
.uleb128 .LEHE7-.LEHB7
.uleb128 0
.uleb128 0
.LLSDACSE3800:
.byte 0x1
.byte 0
.align 4
.long 0
.LLSDATT3800:
.text
.size _Z13print_to_filePKcPKii, .-_Z13print_to_filePKcPKii
.section .rodata.str1.1
.LC3:
.string "input.txt"
.LC4:
.string "output1.txt"
.text
.globl main
.type main, @function
main:
.LFB3801:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $48, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $512, %edi
call _Znam@PLT
movq %rax, %rbx
movl $128, %edx
movq %rax, %rsi
leaq .LC3(%rip), %rdi
call _Z13print_to_filePKcPKii
leaq 8(%rsp), %rdi
movl $512, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $512, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $4, 28(%rsp)
movl $2, 32(%rsp)
movl $2, 16(%rsp)
movl $2, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $2, %ecx
movq 16(%rsp), %rdi
movl $2, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L46
.L43:
movl $2, %ecx
movl $512, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl $128, %edx
movq %rbx, %rsi
leaq .LC4(%rip), %rdi
call _Z13print_to_filePKcPKii
movq 8(%rsp), %rdi
call cudaFree@PLT
movq %rbx, %rdi
call _ZdaPv@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L47
movl $0, %eax
addq $48, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
movl $128, %esi
movq 8(%rsp), %rdi
call _Z33__device_stub__Z12index_kernelPiiPii
jmp .L43
.L47:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3801:
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
__global__ void index_kernel( int* a, int N){
int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x;
printf("%d\n", threadId);
}
void print_to_file(const char* file_name, const int* a, int N){
std::ofstream fout(file_name);
if (fout.is_open()){
for (int i = 0; i < N; i++){
fout << a[i] << "\n";
}
fout.close();
}
else {
std::cout << "Unable to open file\n";
}
}
int main(){
int N = 128;
size_t size = N * sizeof(int);
int *a = new int[N];
print_to_file("input.txt", a, N);
int *dev_a;
cudaMalloc((void **)&dev_a, size);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
index_kernel<<<dim3(2, 2, 2), dim3(4, 2, 2)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output1.txt", a, N);
/*
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 1, 1), dim3(64, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output2.txt", a, N);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 2, 1), dim3(32, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output3.txt", a, N);
*/
cudaFree(dev_a);
delete[] a;
return 0;
} | #include <iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void index_kernel( int* a, int N){
int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x;
printf("%d\n", threadId);
}
void print_to_file(const char* file_name, const int* a, int N){
std::ofstream fout(file_name);
if (fout.is_open()){
for (int i = 0; i < N; i++){
fout << a[i] << "\n";
}
fout.close();
}
else {
std::cout << "Unable to open file\n";
}
}
int main(){
int N = 128;
size_t size = N * sizeof(int);
int *a = new int[N];
print_to_file("input.txt", a, N);
int *dev_a;
hipMalloc((void **)&dev_a, size);
hipMemcpy(dev_a, a, size, hipMemcpyHostToDevice);
index_kernel<<<dim3(2, 2, 2), dim3(4, 2, 2)>>> (dev_a, N);
hipMemcpy(a, dev_a, size, hipMemcpyDeviceToHost);
print_to_file("output1.txt", a, N);
/*
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 1, 1), dim3(64, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output2.txt", a, N);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 2, 1), dim3(32, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output3.txt", a, N);
*/
hipFree(dev_a);
delete[] a;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <iostream>
#include <fstream>
#include <string>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
__global__ void index_kernel( int* a, int N){
int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z;
int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x;
printf("%d\n", threadId);
}
void print_to_file(const char* file_name, const int* a, int N){
std::ofstream fout(file_name);
if (fout.is_open()){
for (int i = 0; i < N; i++){
fout << a[i] << "\n";
}
fout.close();
}
else {
std::cout << "Unable to open file\n";
}
}
int main(){
int N = 128;
size_t size = N * sizeof(int);
int *a = new int[N];
print_to_file("input.txt", a, N);
int *dev_a;
hipMalloc((void **)&dev_a, size);
hipMemcpy(dev_a, a, size, hipMemcpyHostToDevice);
index_kernel<<<dim3(2, 2, 2), dim3(4, 2, 2)>>> (dev_a, N);
hipMemcpy(a, dev_a, size, hipMemcpyDeviceToHost);
print_to_file("output1.txt", a, N);
/*
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 1, 1), dim3(64, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output2.txt", a, N);
cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
vector_add_kernel<<<dim3(2, 2, 1), dim3(32, 1, 1)>>> (dev_a, N);
cudaMemcpy(a, dev_a, size, cudaMemcpyDeviceToHost);
print_to_file("output3.txt", a, N);
*/
hipFree(dev_a);
delete[] a;
return 0;
} | .text
.file "indexing.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__index_kernelPii # -- Begin function _Z27__device_stub__index_kernelPii
.p2align 4, 0x90
.type _Z27__device_stub__index_kernelPii,@function
_Z27__device_stub__index_kernelPii: # @_Z27__device_stub__index_kernelPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12index_kernelPii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z27__device_stub__index_kernelPii, .Lfunc_end0-_Z27__device_stub__index_kernelPii
.cfi_endproc
# -- End function
.globl _Z13print_to_filePKcPKii # -- Begin function _Z13print_to_filePKcPKii
.p2align 4, 0x90
.type _Z13print_to_filePKcPKii,@function
_Z13print_to_filePKcPKii: # @_Z13print_to_filePKcPKii
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $512, %rsp # imm = 0x200
.cfi_def_cfa_offset 560
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movq %rsi, %rbx
movq %rdi, %rsi
movq %rsp, %rdi
movl $16, %edx
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
leaq 112(%rsp), %rdi
callq _ZNKSt12__basic_fileIcE7is_openEv
testb %al, %al
je .LBB1_10
# %bb.1: # %.preheader
testl %ebp, %ebp
jle .LBB1_6
# %bb.2: # %.lr.ph.preheader
movl %ebp, %r15d
xorl %r12d, %r12d
movq %rsp, %r14
.p2align 4, 0x90
.LBB1_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r12,4), %esi
.Ltmp2:
movq %r14, %rdi
callq _ZNSolsEi
.Ltmp3:
# %bb.4: # in Loop: Header=BB1_3 Depth=1
.Ltmp4:
movl $.L.str, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.5: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
# in Loop: Header=BB1_3 Depth=1
incq %r12
cmpq %r12, %r15
jne .LBB1_3
.LBB1_6: # %._crit_edge
leaq 8(%rsp), %rdi
.Ltmp7:
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp8:
# %bb.7: # %.noexc
testq %rax, %rax
jne .LBB1_11
# %bb.8:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rsp,%rax), %esi
orl $4, %esi
.Ltmp9:
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp10:
jmp .LBB1_11
.LBB1_10:
.Ltmp0:
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $20, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp1:
.LBB1_11: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
movq %rsp, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
addq $512, %rsp # imm = 0x200
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_12:
.cfi_def_cfa_offset 560
.Ltmp11:
jmp .LBB1_13
.LBB1_9:
.Ltmp6:
.LBB1_13:
movq %rax, %rbx
movq %rsp, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end1:
.size _Z13print_to_filePKcPKii, .Lfunc_end1-_Z13print_to_filePKcPKii
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table1:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp2-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp2-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp5-.Ltmp2 # Call between .Ltmp2 and .Ltmp5
.uleb128 .Ltmp6-.Lfunc_begin0 # jumps to .Ltmp6
.byte 0 # On action: cleanup
.uleb128 .Ltmp7-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp1-.Ltmp7 # Call between .Ltmp7 and .Ltmp1
.uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11
.byte 0 # On action: cleanup
.uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Lfunc_end1-.Ltmp1 # Call between .Ltmp1 and .Lfunc_end1
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $96, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -16
movl $512, %edi # imm = 0x200
callq _Znam
movq %rax, %rbx
movl $.L.str.2, %edi
movq %rax, %rsi
movl $128, %edx
callq _Z13print_to_filePKcPKii
leaq 8(%rsp), %rdi
movl $512, %esi # imm = 0x200
callq hipMalloc
movq 8(%rsp), %rdi
movl $512, %edx # imm = 0x200
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $8589934594, %rdi # imm = 0x200000002
leaq 2(%rdi), %rdx
movl $2, %esi
movl $2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
movl $128, 20(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12index_kernelPii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_2:
movq 8(%rsp), %rsi
movl $512, %edx # imm = 0x200
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.L.str.3, %edi
movq %rbx, %rsi
movl $128, %edx
callq _Z13print_to_filePKcPKii
movq 8(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12index_kernelPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12index_kernelPii,@object # @_Z12index_kernelPii
.section .rodata,"a",@progbits
.globl _Z12index_kernelPii
.p2align 3, 0x0
_Z12index_kernelPii:
.quad _Z27__device_stub__index_kernelPii
.size _Z12index_kernelPii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\n"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Unable to open file\n"
.size .L.str.1, 21
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "input.txt"
.size .L.str.2, 10
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "output1.txt"
.size .L.str.3, 12
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12index_kernelPii"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__index_kernelPii
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z12index_kernelPii
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006b53c_00000000-6_indexing.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3804:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3804:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33__device_stub__Z12index_kernelPiiPii
.type _Z33__device_stub__Z12index_kernelPiiPii, @function
_Z33__device_stub__Z12index_kernelPiiPii:
.LFB3826:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12index_kernelPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3826:
.size _Z33__device_stub__Z12index_kernelPiiPii, .-_Z33__device_stub__Z12index_kernelPiiPii
.globl _Z12index_kernelPii
.type _Z12index_kernelPii, @function
_Z12index_kernelPii:
.LFB3827:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z33__device_stub__Z12index_kernelPiiPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3827:
.size _Z12index_kernelPii, .-_Z12index_kernelPii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12index_kernelPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3829:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12index_kernelPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3829:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.1
.LC1:
.string "\n"
.LC2:
.string "Unable to open file\n"
.text
.globl _Z13print_to_filePKcPKii
.type _Z13print_to_filePKcPKii, @function
_Z13print_to_filePKcPKii:
.LFB3800:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA3800
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $536, %rsp
.cfi_def_cfa_offset 592
movq %rdi, %rbx
movq %rsi, %r12
movl %edx, %ebp
movq %fs:40, %rax
movq %rax, 520(%rsp)
xorl %eax, %eax
movq %rsp, %r15
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseC2Ev@PLT
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
movq $0, 464(%rsp)
movb $0, 472(%rsp)
movb $0, 473(%rsp)
movq $0, 480(%rsp)
movq $0, 488(%rsp)
movq $0, 496(%rsp)
movq $0, 504(%rsp)
movq 8+_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r13
movq %r13, (%rsp)
movq 16+_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %r14
movq -24(%r13), %rax
movq %r14, (%rsp,%rax)
movq (%rsp), %rax
movq %r15, %rdi
addq -24(%rax), %rdi
movl $0, %esi
.LEHB0:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
.LEHE0:
leaq 24+_ZTVSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, (%rsp)
leaq 40(%rax), %rax
movq %rax, 248(%rsp)
leaq 8(%rsp), %rdi
.LEHB1:
call _ZNSt13basic_filebufIcSt11char_traitsIcEEC1Ev@PLT
.LEHE1:
leaq 8(%rsp), %rsi
leaq 248(%rsp), %rdi
.LEHB2:
call _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@PLT
leaq 8(%rsp), %rdi
movl $16, %edx
movq %rbx, %rsi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
testq %rax, %rax
je .L38
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl $0, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L15
.L38:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.LEHE2:
.L15:
leaq 112(%rsp), %rdi
call _ZNKSt12__basic_fileIcE7is_openEv@PLT
testb %al, %al
je .L16
testl %ebp, %ebp
jle .L18
movq %r12, %rbx
movslq %ebp, %rbp
leaq (%r12,%rbp,4), %rbp
leaq .LC1(%rip), %r12
jmp .L23
.L33:
endbr64
movq %rax, %rbx
leaq 8(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEED1Ev@PLT
.L20:
movq %r13, (%rsp)
movq -24(%r13), %rax
movq %r14, (%rsp,%rax)
.L21:
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
je .L22
call __stack_chk_fail@PLT
.L32:
endbr64
movq %rax, %rbx
jmp .L20
.L31:
endbr64
movq %rax, %rbx
jmp .L21
.L22:
movq %rbx, %rdi
.LEHB3:
call _Unwind_Resume@PLT
.LEHE3:
.L39:
movq %rax, %rdi
movl $1, %edx
movq %r12, %rsi
.LEHB4:
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $4, %rbx
cmpq %rbx, %rbp
je .L18
.L23:
movl (%rbx), %esi
movq %rsp, %rdi
call _ZNSolsEi@PLT
jmp .L39
.L18:
leaq 8(%rsp), %rdi
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE4:
testq %rax, %rax
je .L40
.L24:
leaq 24+_ZTVSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
movq %rax, (%rsp)
leaq 40(%rax), %rax
movq %rax, 248(%rsp)
leaq 16+_ZTVSt13basic_filebufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 8(%rsp)
leaq 8(%rsp), %rdi
.LEHB5:
call _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@PLT
.LEHE5:
jmp .L26
.L40:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rdi), %esi
orl $4, %esi
.LEHB6:
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L24
.L16:
movl $20, %edx
leaq .LC2(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.LEHE6:
jmp .L24
.L34:
endbr64
movq %rax, %rdi
call __cxa_begin_catch@PLT
call __cxa_end_catch@PLT
.L26:
leaq 112(%rsp), %rdi
call _ZNSt12__basic_fileIcED1Ev@PLT
leaq 16+_ZTVSt15basic_streambufIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 8(%rsp)
leaq 64(%rsp), %rdi
call _ZNSt6localeD1Ev@PLT
movq %r13, (%rsp)
movq -24(%r13), %rax
movq %r14, (%rsp,%rax)
leaq 16+_ZTVSt9basic_iosIcSt11char_traitsIcEE(%rip), %rax
movq %rax, 248(%rsp)
leaq 248(%rsp), %rdi
call _ZNSt8ios_baseD2Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
jne .L41
addq $536, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
endbr64
movq %rax, %rbx
movq %rsp, %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 520(%rsp), %rax
subq %fs:40, %rax
je .L28
call __stack_chk_fail@PLT
.L28:
movq %rbx, %rdi
.LEHB7:
call _Unwind_Resume@PLT
.LEHE7:
.L41:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3800:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.align 4
.LLSDA3800:
.byte 0xff
.byte 0x9b
.uleb128 .LLSDATT3800-.LLSDATTD3800
.LLSDATTD3800:
.byte 0x1
.uleb128 .LLSDACSE3800-.LLSDACSB3800
.LLSDACSB3800:
.uleb128 .LEHB0-.LFB3800
.uleb128 .LEHE0-.LEHB0
.uleb128 .L31-.LFB3800
.uleb128 0
.uleb128 .LEHB1-.LFB3800
.uleb128 .LEHE1-.LEHB1
.uleb128 .L32-.LFB3800
.uleb128 0
.uleb128 .LEHB2-.LFB3800
.uleb128 .LEHE2-.LEHB2
.uleb128 .L33-.LFB3800
.uleb128 0
.uleb128 .LEHB3-.LFB3800
.uleb128 .LEHE3-.LEHB3
.uleb128 0
.uleb128 0
.uleb128 .LEHB4-.LFB3800
.uleb128 .LEHE4-.LEHB4
.uleb128 .L30-.LFB3800
.uleb128 0
.uleb128 .LEHB5-.LFB3800
.uleb128 .LEHE5-.LEHB5
.uleb128 .L34-.LFB3800
.uleb128 0x1
.uleb128 .LEHB6-.LFB3800
.uleb128 .LEHE6-.LEHB6
.uleb128 .L30-.LFB3800
.uleb128 0
.uleb128 .LEHB7-.LFB3800
.uleb128 .LEHE7-.LEHB7
.uleb128 0
.uleb128 0
.LLSDACSE3800:
.byte 0x1
.byte 0
.align 4
.long 0
.LLSDATT3800:
.text
.size _Z13print_to_filePKcPKii, .-_Z13print_to_filePKcPKii
.section .rodata.str1.1
.LC3:
.string "input.txt"
.LC4:
.string "output1.txt"
.text
.globl main
.type main, @function
main:
.LFB3801:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $48, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $512, %edi
call _Znam@PLT
movq %rax, %rbx
movl $128, %edx
movq %rax, %rsi
leaq .LC3(%rip), %rdi
call _Z13print_to_filePKcPKii
leaq 8(%rsp), %rdi
movl $512, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $512, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $4, 28(%rsp)
movl $2, 32(%rsp)
movl $2, 16(%rsp)
movl $2, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $2, %ecx
movq 16(%rsp), %rdi
movl $2, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L46
.L43:
movl $2, %ecx
movl $512, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl $128, %edx
movq %rbx, %rsi
leaq .LC4(%rip), %rdi
call _Z13print_to_filePKcPKii
movq 8(%rsp), %rdi
call cudaFree@PLT
movq %rbx, %rdi
call _ZdaPv@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L47
movl $0, %eax
addq $48, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
movl $128, %esi
movq 8(%rsp), %rdi
call _Z33__device_stub__Z12index_kernelPiiPii
jmp .L43
.L47:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3801:
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "indexing.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__index_kernelPii # -- Begin function _Z27__device_stub__index_kernelPii
.p2align 4, 0x90
.type _Z27__device_stub__index_kernelPii,@function
_Z27__device_stub__index_kernelPii: # @_Z27__device_stub__index_kernelPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12index_kernelPii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z27__device_stub__index_kernelPii, .Lfunc_end0-_Z27__device_stub__index_kernelPii
.cfi_endproc
# -- End function
.globl _Z13print_to_filePKcPKii # -- Begin function _Z13print_to_filePKcPKii
.p2align 4, 0x90
.type _Z13print_to_filePKcPKii,@function
_Z13print_to_filePKcPKii: # @_Z13print_to_filePKcPKii
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $512, %rsp # imm = 0x200
.cfi_def_cfa_offset 560
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movq %rsi, %rbx
movq %rdi, %rsi
movq %rsp, %rdi
movl $16, %edx
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
leaq 112(%rsp), %rdi
callq _ZNKSt12__basic_fileIcE7is_openEv
testb %al, %al
je .LBB1_10
# %bb.1: # %.preheader
testl %ebp, %ebp
jle .LBB1_6
# %bb.2: # %.lr.ph.preheader
movl %ebp, %r15d
xorl %r12d, %r12d
movq %rsp, %r14
.p2align 4, 0x90
.LBB1_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r12,4), %esi
.Ltmp2:
movq %r14, %rdi
callq _ZNSolsEi
.Ltmp3:
# %bb.4: # in Loop: Header=BB1_3 Depth=1
.Ltmp4:
movl $.L.str, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.5: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
# in Loop: Header=BB1_3 Depth=1
incq %r12
cmpq %r12, %r15
jne .LBB1_3
.LBB1_6: # %._crit_edge
leaq 8(%rsp), %rdi
.Ltmp7:
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp8:
# %bb.7: # %.noexc
testq %rax, %rax
jne .LBB1_11
# %bb.8:
movq (%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
movl 32(%rsp,%rax), %esi
orl $4, %esi
.Ltmp9:
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp10:
jmp .LBB1_11
.LBB1_10:
.Ltmp0:
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $20, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp1:
.LBB1_11: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
movq %rsp, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
addq $512, %rsp # imm = 0x200
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_12:
.cfi_def_cfa_offset 560
.Ltmp11:
jmp .LBB1_13
.LBB1_9:
.Ltmp6:
.LBB1_13:
movq %rax, %rbx
movq %rsp, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end1:
.size _Z13print_to_filePKcPKii, .Lfunc_end1-_Z13print_to_filePKcPKii
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table1:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp2-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp2-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp5-.Ltmp2 # Call between .Ltmp2 and .Ltmp5
.uleb128 .Ltmp6-.Lfunc_begin0 # jumps to .Ltmp6
.byte 0 # On action: cleanup
.uleb128 .Ltmp7-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp1-.Ltmp7 # Call between .Ltmp7 and .Ltmp1
.uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11
.byte 0 # On action: cleanup
.uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Lfunc_end1-.Ltmp1 # Call between .Ltmp1 and .Lfunc_end1
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $96, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -16
movl $512, %edi # imm = 0x200
callq _Znam
movq %rax, %rbx
movl $.L.str.2, %edi
movq %rax, %rsi
movl $128, %edx
callq _Z13print_to_filePKcPKii
leaq 8(%rsp), %rdi
movl $512, %esi # imm = 0x200
callq hipMalloc
movq 8(%rsp), %rdi
movl $512, %edx # imm = 0x200
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $8589934594, %rdi # imm = 0x200000002
leaq 2(%rdi), %rdx
movl $2, %esi
movl $2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
movl $128, 20(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12index_kernelPii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_2:
movq 8(%rsp), %rsi
movl $512, %edx # imm = 0x200
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.L.str.3, %edi
movq %rbx, %rsi
movl $128, %edx
callq _Z13print_to_filePKcPKii
movq 8(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12index_kernelPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12index_kernelPii,@object # @_Z12index_kernelPii
.section .rodata,"a",@progbits
.globl _Z12index_kernelPii
.p2align 3, 0x0
_Z12index_kernelPii:
.quad _Z27__device_stub__index_kernelPii
.size _Z12index_kernelPii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\n"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Unable to open file\n"
.size .L.str.1, 21
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "input.txt"
.size .L.str.2, 10
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "output1.txt"
.size .L.str.3, 12
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12index_kernelPii"
.size .L__unnamed_1, 20
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__index_kernelPii
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z12index_kernelPii
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <cstdlib>
#include <chrono>
#include <iomanip>
__global__ void transp(double *matrix, int size){
printf("Hello?\n");
//Индекс текущего блока в гриде
int blockIndex = blockIdx.x + blockIdx.y*gridDim.x + blockIdx.z*gridDim.y*gridDim.x;
//Индекс треда внутри текущего блока
int ThreadIndex = threadIdx.x + threadIdx.y*blockDim.x + threadIdx.z*blockDim.y*blockDim.x;
//глобальный индекс нити
int idx = blockIndex*blockDim.x*blockDim.y*blockDim.z + ThreadIndex;
printf("In thread %d\n", idx);
if (idx / size > idx % size){
printf("%lf %lf\n", matrix[(idx / size) * size + (idx % size)], matrix[(idx % size) * size + (idx / size)]);
//std::cout << "[" << idx << ", " << idy << "] = " << matrix[idx][idy] << '\n';
double tmp = matrix[(idx / size) * size + (idx % size)];
matrix[(idx / size) * size + (idx % size)] = matrix[(idx % size) * size + (idx / size)];
matrix[(idx % size) * size + (idx / size)] = tmp;
}
}
int n;
bool transpose(double* matrix, double* res_gpu) //либо int matrix[][5], либо int (*matrix)[5]
{
int t;
auto start = std::chrono::steady_clock::now();
for(int i = 0; i < n * n; ++i)
{
if(i / n > i % n){
t = matrix[(i / n) * n + (i % n)];
matrix[(i / n) * n + (i % n)] = matrix[(i % n) * n + (i / n)];
matrix[(i % n) * n + (i / n)] = t;
}
}
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for CPU: " << elapsed_seconds.count() << "s\n";
std::cout << "CPU" << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int num_of_err = 0;
bool is_correct = 1;
for (int i = 0; i < n; ++i){
for (int j = 0; j < n; ++j){
if (matrix[i * n + j] != res_gpu[i * n + j]){
num_of_err++;
//std::cout << "Error in " << i + 1 << ", " << j + 1 << " element;\nOn CPU " << matrix[i * n + j] << ", On GPU " << res_gpu[i * n + j] << ";\n";
is_correct = 0;
}
}
}
if (is_correct){
std::cout << "Everything is great, results are equal!" << '\n';
} else{
std::cout << "There are " << num_of_err << " errors. Hm... maybe we did something wrong..." << '\n';
}
return is_correct;
}
int main(int argc, char const *argv[]) {
sscanf(argv[1], "%d", &n);
int bytes = n * n * sizeof(double);
double* matrix;
matrix = (double*)malloc(bytes);
/*for(int i = 0; i < n; ++i){
matrix[i] = new(double[n]);
}*/
char decision;
std::cout << "Do you want to fill matrix by yourself? (Y/N)" << '\n';
std::cin >> decision;
switch(tolower(decision))
{
case 'y':
for(int j = 0; j < n; ++j){
std::cout << "Please, enter "<< j + 1 << " string: ";
for (int i = 0; i < n; ++i){
std::cin >> matrix[i * n + j];
}
}
break;
case 'n':
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
matrix[i * n + j] = /*(double(rand()) / rand()) + */int(rand() / 100000000);
}
}
break;
default:
std::cout << "You have wrote something wrong." << '\n';
}
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int block_size = 1024;
int grid_size = (n - 1) / block_size + 1;
double *gpu_matrix;
dim3 dimBlock(block_size, block_size, 1);
dim3 dimGrid(grid_size, grid_size, 1);
cudaMalloc(&gpu_matrix, bytes);
cudaMemcpy(gpu_matrix, matrix, bytes, cudaMemcpyHostToDevice);
auto start = std::chrono::steady_clock::now();
transp<<<dimGrid, dimBlock>>>(gpu_matrix, n);
cudaDeviceSynchronize();
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for GPU: " << elapsed_seconds.count() << "s\n";
/*for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << gpu_matrix[i * n + j];
}
std::cout << '\n';
}*/
double* matrix_res;
matrix_res = (double*)malloc(bytes);
cudaMemcpy(matrix_res, gpu_matrix, bytes, cudaMemcpyDeviceToHost);
std::cout << "GPU: " << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix_res[i * n + j];
}
std::cout << '\n';
}
transpose(matrix, matrix_res);
cudaFree(gpu_matrix);
free(matrix);
return 0;
} | code for sm_80
Function : _Z6transpPdi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc600078e00ff */
/*0010*/ MOV R16, 0x0 ; /* 0x0000000000107802 */
/* 0x000fe20000000f00 */
/*0020*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0030*/ IADD3 R1, R1, -0x10, RZ ; /* 0xfffffff001017810 */
/* 0x000fe20007ffe0ff */
/*0040*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0050*/ LDC.64 R8, c[0x4][R16] ; /* 0x0100000010087b82 */
/* 0x0000620000000a00 */
/*0060*/ CS2R R6, SRZ ; /* 0x0000000000067805 */
/* 0x000fe2000001ff00 */
/*0070*/ IADD3 R18, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001127a10 */
/* 0x000fca0007f1e0ff */
/*0080*/ IMAD.X R2, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff027624 */
/* 0x000fe400000e06ff */
/*0090*/ LEPC R10 ; /* 0x00000000000a734e */
/* 0x000fe20000000000 */
/*00a0*/ MOV R3, 0x110 ; /* 0x0000011000037802 */
/* 0x000fe40000000f00 */
/*00b0*/ MOV R20, 0x90 ; /* 0x0000009000147802 */
/* 0x000fe40000000f00 */
/*00c0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*00d0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*00e0*/ IADD3 R20, P0, P1, -R20, R3, R10 ; /* 0x0000000314147210 */
/* 0x000fc8000791e10a */
/*00f0*/ IADD3.X R21, ~R0, R21, R11, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e250b */
/*0100*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */
/* 0x003fea0003c00000 */
/*0110*/ S2R R0, SR_CTAID.Z ; /* 0x0000000000007919 */
/* 0x000e220000002700 */
/*0120*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x10] ; /* 0x01000400ff047624 */
/* 0x000fe400078e00ff */
/*0130*/ IMAD.MOV.U32 R6, RZ, RZ, R18 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0012 */
/*0140*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0150*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e680000002500 */
/*0160*/ S2R R7, SR_TID.Z ; /* 0x0000000000077919 */
/* 0x000ea80000002300 */
/*0170*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */
/* 0x000ee80000002200 */
/*0180*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000f220000002100 */
/*0190*/ IMAD R0, R0, c[0x0][0x10], R3 ; /* 0x0000040000007a24 */
/* 0x001fc800078e0203 */
/*01a0*/ IMAD R0, R0, c[0x0][0xc], R5 ; /* 0x0000030000007a24 */
/* 0x002fe400078e0205 */
/*01b0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x14] ; /* 0x01000500ff057624 */
/* 0x000fe400078e00ff */
/*01c0*/ IMAD R0, R0, c[0x0][0x8], R7 ; /* 0x0000020000007a24 */
/* 0x004fe400078e0207 */
/*01d0*/ IMAD.MOV.U32 R7, RZ, RZ, R2 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0002 */
/*01e0*/ IMAD R0, R0, c[0x0][0x4], R9 ; /* 0x0000010000007a24 */
/* 0x008fe400078e0209 */
/*01f0*/ LDC.64 R8, c[0x4][R16] ; /* 0x0100000010087b82 */
/* 0x0000640000000a00 */
/*0200*/ IMAD R22, R0, c[0x0][0x0], R11 ; /* 0x0000000000167a24 */
/* 0x010fca00078e020b */
/*0210*/ STL [R1], R22 ; /* 0x0000001601007387 */
/* 0x0001e40000100800 */
/*0220*/ LEPC R10 ; /* 0x00000000000a734e */
/* 0x000fe20000000000 */
/*0230*/ MOV R3, 0x2a0 ; /* 0x000002a000037802 */
/* 0x000fe40000000f00 */
/*0240*/ MOV R20, 0x220 ; /* 0x0000022000147802 */
/* 0x000fe40000000f00 */
/*0250*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0260*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0270*/ IADD3 R20, P0, P1, -R20, R3, R10 ; /* 0x0000000314147210 */
/* 0x000fc8000791e10a */
/*0280*/ IADD3.X R21, ~R0, R21, R11, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e250b */
/*0290*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */
/* 0x003fea0003c00000 */
/*02a0*/ IABS R3, c[0x0][0x168] ; /* 0x00005a0000037a13 */
/* 0x000fc80000000000 */
/*02b0*/ I2F.RP R0, R3 ; /* 0x0000000300007306 */
/* 0x000e300000209400 */
/*02c0*/ MUFU.RCP R0, R0 ; /* 0x0000000000007308 */
/* 0x001e240000001000 */
/*02d0*/ IADD3 R4, R0, 0xffffffe, RZ ; /* 0x0ffffffe00047810 */
/* 0x001fcc0007ffe0ff */
/*02e0*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x000064000021f000 */
/*02f0*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x001fe400078e00ff */
/*0300*/ IMAD.MOV R6, RZ, RZ, -R5 ; /* 0x000000ffff067224 */
/* 0x002fc800078e0a05 */
/*0310*/ IMAD R7, R6, R3, RZ ; /* 0x0000000306077224 */
/* 0x000fe200078e02ff */
/*0320*/ IABS R6, R22 ; /* 0x0000001600067213 */
/* 0x000fc60000000000 */
/*0330*/ IMAD.HI.U32 R5, R5, R7, R4 ; /* 0x0000000705057227 */
/* 0x000fcc00078e0004 */
/*0340*/ IMAD.HI.U32 R5, R5, R6, RZ ; /* 0x0000000605057227 */
/* 0x000fca00078e00ff */
/*0350*/ IADD3 R0, -R5, RZ, RZ ; /* 0x000000ff05007210 */
/* 0x000fca0007ffe1ff */
/*0360*/ IMAD R0, R3, R0, R6 ; /* 0x0000000003007224 */
/* 0x000fca00078e0206 */
/*0370*/ ISETP.GT.U32.AND P2, PT, R3, R0, PT ; /* 0x000000000300720c */
/* 0x000fda0003f44070 */
/*0380*/ @!P2 IMAD.IADD R0, R0, 0x1, -R3 ; /* 0x000000010000a824 */
/* 0x000fe200078e0a03 */
/*0390*/ @!P2 IADD3 R5, R5, 0x1, RZ ; /* 0x000000010505a810 */
/* 0x000fe40007ffe0ff */
/*03a0*/ ISETP.NE.AND P2, PT, RZ, c[0x0][0x168], PT ; /* 0x00005a00ff007a0c */
/* 0x000fe40003f45270 */
/*03b0*/ ISETP.GE.U32.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */
/* 0x000fe40003f06070 */
/*03c0*/ LOP3.LUT R0, R22, c[0x0][0x168], RZ, 0x3c, !PT ; /* 0x00005a0016007a12 */
/* 0x000fc800078e3cff */
/*03d0*/ ISETP.GE.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fce0003f26270 */
/*03e0*/ @P0 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105050810 */
/* 0x000fcc0007ffe0ff */
/*03f0*/ @!P1 IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff059224 */
/* 0x000fe200078e0a05 */
/*0400*/ @!P2 LOP3.LUT R5, RZ, c[0x0][0x168], RZ, 0x33, !PT ; /* 0x00005a00ff05aa12 */
/* 0x000fca00078e33ff */
/*0410*/ IMAD.MOV R3, RZ, RZ, -R5 ; /* 0x000000ffff037224 */
/* 0x000fc800078e0a05 */
/*0420*/ IMAD R16, R3, c[0x0][0x168], R22 ; /* 0x00005a0003107a24 */
/* 0x000fca00078e0216 */
/*0430*/ ISETP.GT.AND P0, PT, R5, R16, PT ; /* 0x000000100500720c */
/* 0x000fda0003f04270 */
/*0440*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0450*/ IMAD.MOV.U32 R17, RZ, RZ, 0x8 ; /* 0x00000008ff117424 */
/* 0x000fe200078e00ff */
/*0460*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0470*/ IMAD R8, R5, c[0x0][0x168], R16 ; /* 0x00005a0005087a24 */
/* 0x000fe400078e0210 */
/*0480*/ IMAD R16, R16, c[0x0][0x168], R5 ; /* 0x00005a0010107a24 */
/* 0x000fe400078e0205 */
/*0490*/ IMAD.WIDE R8, R8, R17, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fc800078e0211 */
/*04a0*/ IMAD.WIDE R16, R16, R17, c[0x0][0x160] ; /* 0x0000580010107625 */
/* 0x000fe400078e0211 */
/*04b0*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea8000c1e1b00 */
/*04c0*/ LDG.E.64 R10, [R16.64] ; /* 0x00000004100a7981 */
/* 0x000ea2000c1e1b00 */
/*04d0*/ MOV R12, 0x0 ; /* 0x00000000000c7802 */
/* 0x000fe20000000f00 */
/*04e0*/ IMAD.MOV.U32 R6, RZ, RZ, R18 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0012 */
/*04f0*/ MOV R7, R2 ; /* 0x0000000200077202 */
/* 0x000fe20000000f00 */
/*0500*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x18] ; /* 0x01000600ff047624 */
/* 0x000fc400078e00ff */
/*0510*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x1c] ; /* 0x01000700ff057624 */
/* 0x000fe200078e00ff */
/*0520*/ LDC.64 R12, c[0x4][R12] ; /* 0x010000000c0c7b82 */
/* 0x000e220000000a00 */
/*0530*/ STL.128 [R1], R8 ; /* 0x0000000801007387 */
/* 0x0043ea0000100c00 */
/*0540*/ LEPC R2 ; /* 0x000000000002734e */
/* 0x001fe20000000000 */
/*0550*/ MOV R9, 0x5c0 ; /* 0x000005c000097802 */
/* 0x002fe40000000f00 */
/*0560*/ MOV R20, 0x540 ; /* 0x0000054000147802 */
/* 0x000fe40000000f00 */
/*0570*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0580*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0590*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */
/* 0x000fc8000791e102 */
/*05a0*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2503 */
/*05b0*/ CALL.ABS.NOINC R12 ; /* 0x000000000c007343 */
/* 0x000fea0003c00000 */
/*05c0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x8 ; /* 0x00000008ff177424 */
/* 0x000fe200078e00ff */
/*05d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*05e0*/ LDG.E.64 R4, [R16.64] ; /* 0x0000000410047981 */
/* 0x000ea2000c1e1b00 */
/*05f0*/ IMAD.WIDE R22, R22, R23, c[0x0][0x160] ; /* 0x0000580016167625 */
/* 0x000fca00078e0217 */
/*0600*/ LDG.E.64 R2, [R22.64] ; /* 0x0000000416027981 */
/* 0x000ee8000c1e1b00 */
/*0610*/ STG.E.64 [R22.64], R4 ; /* 0x0000000416007986 */
/* 0x004fe8000c101b04 */
/*0620*/ STG.E.64 [R16.64], R2 ; /* 0x0000000210007986 */
/* 0x008fe2000c101b04 */
/*0630*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0640*/ BRA 0x640; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <cstdlib>
#include <chrono>
#include <iomanip>
__global__ void transp(double *matrix, int size){
printf("Hello?\n");
//Индекс текущего блока в гриде
int blockIndex = blockIdx.x + blockIdx.y*gridDim.x + blockIdx.z*gridDim.y*gridDim.x;
//Индекс треда внутри текущего блока
int ThreadIndex = threadIdx.x + threadIdx.y*blockDim.x + threadIdx.z*blockDim.y*blockDim.x;
//глобальный индекс нити
int idx = blockIndex*blockDim.x*blockDim.y*blockDim.z + ThreadIndex;
printf("In thread %d\n", idx);
if (idx / size > idx % size){
printf("%lf %lf\n", matrix[(idx / size) * size + (idx % size)], matrix[(idx % size) * size + (idx / size)]);
//std::cout << "[" << idx << ", " << idy << "] = " << matrix[idx][idy] << '\n';
double tmp = matrix[(idx / size) * size + (idx % size)];
matrix[(idx / size) * size + (idx % size)] = matrix[(idx % size) * size + (idx / size)];
matrix[(idx % size) * size + (idx / size)] = tmp;
}
}
int n;
bool transpose(double* matrix, double* res_gpu) //либо int matrix[][5], либо int (*matrix)[5]
{
int t;
auto start = std::chrono::steady_clock::now();
for(int i = 0; i < n * n; ++i)
{
if(i / n > i % n){
t = matrix[(i / n) * n + (i % n)];
matrix[(i / n) * n + (i % n)] = matrix[(i % n) * n + (i / n)];
matrix[(i % n) * n + (i / n)] = t;
}
}
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for CPU: " << elapsed_seconds.count() << "s\n";
std::cout << "CPU" << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int num_of_err = 0;
bool is_correct = 1;
for (int i = 0; i < n; ++i){
for (int j = 0; j < n; ++j){
if (matrix[i * n + j] != res_gpu[i * n + j]){
num_of_err++;
//std::cout << "Error in " << i + 1 << ", " << j + 1 << " element;\nOn CPU " << matrix[i * n + j] << ", On GPU " << res_gpu[i * n + j] << ";\n";
is_correct = 0;
}
}
}
if (is_correct){
std::cout << "Everything is great, results are equal!" << '\n';
} else{
std::cout << "There are " << num_of_err << " errors. Hm... maybe we did something wrong..." << '\n';
}
return is_correct;
}
int main(int argc, char const *argv[]) {
sscanf(argv[1], "%d", &n);
int bytes = n * n * sizeof(double);
double* matrix;
matrix = (double*)malloc(bytes);
/*for(int i = 0; i < n; ++i){
matrix[i] = new(double[n]);
}*/
char decision;
std::cout << "Do you want to fill matrix by yourself? (Y/N)" << '\n';
std::cin >> decision;
switch(tolower(decision))
{
case 'y':
for(int j = 0; j < n; ++j){
std::cout << "Please, enter "<< j + 1 << " string: ";
for (int i = 0; i < n; ++i){
std::cin >> matrix[i * n + j];
}
}
break;
case 'n':
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
matrix[i * n + j] = /*(double(rand()) / rand()) + */int(rand() / 100000000);
}
}
break;
default:
std::cout << "You have wrote something wrong." << '\n';
}
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int block_size = 1024;
int grid_size = (n - 1) / block_size + 1;
double *gpu_matrix;
dim3 dimBlock(block_size, block_size, 1);
dim3 dimGrid(grid_size, grid_size, 1);
cudaMalloc(&gpu_matrix, bytes);
cudaMemcpy(gpu_matrix, matrix, bytes, cudaMemcpyHostToDevice);
auto start = std::chrono::steady_clock::now();
transp<<<dimGrid, dimBlock>>>(gpu_matrix, n);
cudaDeviceSynchronize();
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for GPU: " << elapsed_seconds.count() << "s\n";
/*for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << gpu_matrix[i * n + j];
}
std::cout << '\n';
}*/
double* matrix_res;
matrix_res = (double*)malloc(bytes);
cudaMemcpy(matrix_res, gpu_matrix, bytes, cudaMemcpyDeviceToHost);
std::cout << "GPU: " << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix_res[i * n + j];
}
std::cout << '\n';
}
transpose(matrix, matrix_res);
cudaFree(gpu_matrix);
free(matrix);
return 0;
} | .file "tmpxft_0013b522_00000000-6_second_try.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4056:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Time for CPU: "
.LC2:
.string "s\n"
.LC3:
.string "CPU"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "Everything is great, results are equal!"
.section .rodata.str1.1
.LC5:
.string "There are "
.section .rodata.str1.8
.align 8
.LC6:
.string " errors. Hm... maybe we did something wrong..."
.text
.globl _Z9transposePdS_
.type _Z9transposePdS_, @function
_Z9transposePdS_:
.LFB4048:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $16, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %r12
movq %rsi, %r13
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
movq %rax, %rbx
movl n(%rip), %esi
movl %esi, %edi
imull %esi, %edi
testl %edi, %edi
jle .L4
movslq %edi, %rdi
movl $0, %ecx
jmp .L6
.L5:
addq $1, %rcx
cmpq %rdi, %rcx
je .L4
.L6:
movl %ecx, %eax
cltd
idivl %esi
cmpl %edx, %eax
jle .L5
cvttsd2sil (%r12,%rcx,8), %r8d
imull %esi, %edx
addl %eax, %edx
movslq %edx, %rdx
leaq (%r12,%rdx,8), %rax
movsd (%rax), %xmm0
movsd %xmm0, (%r12,%rcx,8)
pxor %xmm0, %xmm0
cvtsi2sdl %r8d, %xmm0
movsd %xmm0, (%rax)
jmp .L5
.L4:
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC0(%rip), %xmm0
movq %xmm0, %rbp
movl $14, %edx
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rbp, %xmm0
movq %rbx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $2, %edx
leaq .LC2(%rip), %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $3, %edx
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movb $10, 7(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L7
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L8:
movl $0, %r14d
leaq _ZSt4cout(%rip), %rbp
cmpl $0, n(%rip)
jg .L9
.L27:
movl $39, %edx
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movb $10, 7(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L22
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L23:
movl $1, %ebp
.L3:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L38
movl %ebp, %eax
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
movl $10, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
jmp .L8
.L12:
movl $10, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
.L13:
addl $1, %r14d
movl n(%rip), %esi
cmpl %r14d, %esi
jle .L14
.L9:
movl n(%rip), %eax
movl $0, %ebx
testl %eax, %eax
jle .L15
.L11:
movq 0(%rbp), %rdx
movq -24(%rdx), %rdx
movq $8, 16(%rbp,%rdx)
imull %r14d, %eax
addl %ebx, %eax
cltq
movsd (%r12,%rax,8), %xmm0
movq %rbp, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
addl $1, %ebx
movl n(%rip), %eax
cmpl %ebx, %eax
jg .L11
.L15:
movb $10, 7(%rsp)
movq 0(%rbp), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbp,%rax)
je .L12
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L13
.L14:
testl %esi, %esi
jle .L27
movslq %esi, %r8
leaq 0(,%r8,8), %r9
negq %r8
salq $3, %r8
movq %r9, %rdx
movl $0, %edi
movl $1, %ebp
movl $0, %ebx
movl $0, %ecx
jmp .L16
.L31:
addl $1, %ebx
movl %ecx, %ebp
.L17:
addq $8, %rax
cmpq %rax, %rdx
je .L39
.L19:
movsd (%r12,%rax), %xmm0
ucomisd 0(%r13,%rax), %xmm0
jp .L31
je .L17
jmp .L31
.L39:
addl $1, %edi
addq %r9, %rdx
cmpl %edi, %esi
je .L20
.L16:
leaq (%rdx,%r8), %rax
jmp .L19
.L20:
testb %bpl, %bpl
jne .L27
movl $10, %edx
leaq .LC5(%rip), %rsi
leaq _ZSt4cout(%rip), %r12
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebx, %esi
movq %r12, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movl $46, %edx
leaq .LC6(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movb $10, 7(%rsp)
movq (%rbx), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L25
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L3
.L22:
movl $10, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
jmp .L23
.L25:
movl $10, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L3
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4048:
.size _Z9transposePdS_, .-_Z9transposePdS_
.globl _Z26__device_stub__Z6transpPdiPdi
.type _Z26__device_stub__Z6transpPdiPdi, @function
_Z26__device_stub__Z6transpPdiPdi:
.LFB4078:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L44
.L40:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L45
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L44:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6transpPdi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L40
.L45:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4078:
.size _Z26__device_stub__Z6transpPdiPdi, .-_Z26__device_stub__Z6transpPdiPdi
.globl _Z6transpPdi
.type _Z6transpPdi, @function
_Z6transpPdi:
.LFB4079:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z6transpPdiPdi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4079:
.size _Z6transpPdi, .-_Z6transpPdi
.section .rodata.str1.1
.LC7:
.string "%d"
.section .rodata.str1.8
.align 8
.LC8:
.string "Do you want to fill matrix by yourself? (Y/N)"
.section .rodata.str1.1
.LC9:
.string "Please, enter "
.LC10:
.string " string: "
.section .rodata.str1.8
.align 8
.LC11:
.string "You have wrote something wrong."
.section .rodata.str1.1
.LC12:
.string "Time for GPU: "
.LC13:
.string "GPU: "
.text
.globl main
.type main, @function
main:
.LFB4053:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movq 8(%rsi), %rdi
leaq n(%rip), %rdx
leaq .LC7(%rip), %rsi
call __isoc23_sscanf@PLT
movl n(%rip), %eax
imull %eax, %eax
leal 0(,%rax,8), %r15d
movslq %r15d, %r15
movq %r15, %rdi
call malloc@PLT
movq %rax, %rbx
leaq .LC8(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
leaq 6(%rsp), %rsi
leaq _ZSt3cin(%rip), %rdi
call _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
call __ctype_tolower_loc@PLT
movsbq 6(%rsp), %rdx
movq (%rax), %rax
movl (%rax,%rdx,4), %eax
cmpl $110, %eax
je .L49
cmpl $121, %eax
jne .L50
movl $0, %r14d
leaq _ZSt3cin(%rip), %r13
cmpl $0, n(%rip)
jle .L52
.L51:
movl $14, %edx
leaq .LC9(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %r14d, %r12d
addl $1, %r14d
movl %r14d, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSolsEi@PLT
movq %rax, %rdi
movl $9, %edx
leaq .LC10(%rip), %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl n(%rip), %eax
testl %eax, %eax
jle .L54
movl $0, %ebp
.L55:
imull %ebp, %eax
addl %r12d, %eax
cltq
leaq (%rbx,%rax,8), %rsi
movq %r13, %rdi
call _ZNSi10_M_extractIdEERSiRT_@PLT
addl $1, %ebp
movl n(%rip), %eax
cmpl %ebp, %eax
jg .L55
.L54:
cmpl n(%rip), %r14d
jl .L51
jmp .L56
.L49:
movl $0, %r12d
cmpl $0, n(%rip)
jg .L53
.L52:
movl n(%rip), %eax
.L60:
movl $1024, 16(%rsp)
movl $1024, 20(%rsp)
movl $1, 24(%rsp)
leal 1022(%rax), %edx
subl $1, %eax
cmovs %edx, %eax
sarl $10, %eax
addl $1, %eax
movl %eax, 28(%rsp)
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r15, %rdx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
movq %rax, %rbp
movl 24(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 16(%rsp), %rdx
movq 28(%rsp), %rdi
movl 36(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L94
.L65:
call cudaDeviceSynchronize@PLT
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
subq %rbp, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC0(%rip), %xmm0
movq %xmm0, %r12
leaq .LC12(%rip), %rsi
leaq _ZSt4cout(%rip), %rbp
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movq %r12, %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r15, %rdi
call malloc@PLT
movq %rax, %r13
movl $2, %ecx
movq %r15, %rdx
movq 8(%rsp), %rsi
movq %rax, %rdi
call cudaMemcpy@PLT
leaq .LC13(%rip), %rsi
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
movl $0, %r14d
movq %rbp, %r12
cmpl $0, n(%rip)
jg .L66
.L67:
movq %r13, %rsi
movq %rbx, %rdi
call _Z9transposePdS_
movq 8(%rsp), %rdi
call cudaFree@PLT
movq %rbx, %rdi
call free@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L95
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L57:
.cfi_restore_state
call rand@PLT
movl n(%rip), %esi
movl %esi, %ecx
imull %r12d, %ecx
addl %ebp, %ecx
movslq %ecx, %rcx
movslq %eax, %rdx
imulq $1441151881, %rdx, %rdx
sarq $57, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
movsd %xmm0, (%rbx,%rcx,8)
addl $1, %ebp
cmpl %ebp, %esi
jg .L57
.L58:
addl $1, %r12d
cmpl %r12d, n(%rip)
jle .L56
.L53:
movl $0, %ebp
cmpl $0, n(%rip)
jg .L57
jmp .L58
.L50:
leaq .LC11(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
.L56:
movl n(%rip), %eax
movl $0, %r13d
leaq _ZSt4cout(%rip), %r12
testl %eax, %eax
jg .L59
jmp .L60
.L62:
movl $10, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
.L63:
addl $1, %r13d
movl n(%rip), %eax
cmpl %r13d, %eax
jle .L60
.L59:
movl n(%rip), %eax
movl $0, %ebp
testl %eax, %eax
jle .L64
.L61:
movq (%r12), %rdx
movq -24(%rdx), %rdx
movq $8, 16(%r12,%rdx)
imull %r13d, %eax
addl %ebp, %eax
cltq
movsd (%rbx,%rax,8), %xmm0
movq %r12, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
addl $1, %ebp
movl n(%rip), %eax
cmpl %ebp, %eax
jg .L61
.L64:
movb $10, 28(%rsp)
movq (%r12), %rax
movq -24(%rax), %rax
cmpq $0, 16(%r12,%rax)
je .L62
leaq 28(%rsp), %rsi
movl $1, %edx
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L63
.L94:
movl n(%rip), %esi
movq 8(%rsp), %rdi
call _Z26__device_stub__Z6transpPdiPdi
jmp .L65
.L69:
movl $10, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
.L70:
addl $1, %r14d
cmpl %r14d, n(%rip)
jle .L67
.L66:
movl n(%rip), %eax
movl $0, %ebp
testl %eax, %eax
jle .L71
.L68:
movq (%r12), %rdx
movq -24(%rdx), %rdx
movq $8, 16(%r12,%rdx)
imull %r14d, %eax
addl %ebp, %eax
cltq
movsd 0(%r13,%rax,8), %xmm0
movq %r12, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
addl $1, %ebp
movl n(%rip), %eax
cmpl %ebp, %eax
jg .L68
.L71:
movb $10, 7(%rsp)
movq (%r12), %rax
movq -24(%rax), %rax
cmpq $0, 16(%r12,%rax)
je .L69
leaq 7(%rsp), %rsi
movl $1, %edx
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L70
.L95:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4053:
.size main, .-main
.section .rodata.str1.1
.LC14:
.string "_Z6transpPdi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4081:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z6transpPdi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4081:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl n
.bss
.align 4
.type n, @object
.size n, 4
n:
.zero 4
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1104006501
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <cstdlib>
#include <chrono>
#include <iomanip>
__global__ void transp(double *matrix, int size){
printf("Hello?\n");
//Индекс текущего блока в гриде
int blockIndex = blockIdx.x + blockIdx.y*gridDim.x + blockIdx.z*gridDim.y*gridDim.x;
//Индекс треда внутри текущего блока
int ThreadIndex = threadIdx.x + threadIdx.y*blockDim.x + threadIdx.z*blockDim.y*blockDim.x;
//глобальный индекс нити
int idx = blockIndex*blockDim.x*blockDim.y*blockDim.z + ThreadIndex;
printf("In thread %d\n", idx);
if (idx / size > idx % size){
printf("%lf %lf\n", matrix[(idx / size) * size + (idx % size)], matrix[(idx % size) * size + (idx / size)]);
//std::cout << "[" << idx << ", " << idy << "] = " << matrix[idx][idy] << '\n';
double tmp = matrix[(idx / size) * size + (idx % size)];
matrix[(idx / size) * size + (idx % size)] = matrix[(idx % size) * size + (idx / size)];
matrix[(idx % size) * size + (idx / size)] = tmp;
}
}
int n;
bool transpose(double* matrix, double* res_gpu) //либо int matrix[][5], либо int (*matrix)[5]
{
int t;
auto start = std::chrono::steady_clock::now();
for(int i = 0; i < n * n; ++i)
{
if(i / n > i % n){
t = matrix[(i / n) * n + (i % n)];
matrix[(i / n) * n + (i % n)] = matrix[(i % n) * n + (i / n)];
matrix[(i % n) * n + (i / n)] = t;
}
}
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for CPU: " << elapsed_seconds.count() << "s\n";
std::cout << "CPU" << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int num_of_err = 0;
bool is_correct = 1;
for (int i = 0; i < n; ++i){
for (int j = 0; j < n; ++j){
if (matrix[i * n + j] != res_gpu[i * n + j]){
num_of_err++;
//std::cout << "Error in " << i + 1 << ", " << j + 1 << " element;\nOn CPU " << matrix[i * n + j] << ", On GPU " << res_gpu[i * n + j] << ";\n";
is_correct = 0;
}
}
}
if (is_correct){
std::cout << "Everything is great, results are equal!" << '\n';
} else{
std::cout << "There are " << num_of_err << " errors. Hm... maybe we did something wrong..." << '\n';
}
return is_correct;
}
int main(int argc, char const *argv[]) {
sscanf(argv[1], "%d", &n);
int bytes = n * n * sizeof(double);
double* matrix;
matrix = (double*)malloc(bytes);
/*for(int i = 0; i < n; ++i){
matrix[i] = new(double[n]);
}*/
char decision;
std::cout << "Do you want to fill matrix by yourself? (Y/N)" << '\n';
std::cin >> decision;
switch(tolower(decision))
{
case 'y':
for(int j = 0; j < n; ++j){
std::cout << "Please, enter "<< j + 1 << " string: ";
for (int i = 0; i < n; ++i){
std::cin >> matrix[i * n + j];
}
}
break;
case 'n':
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
matrix[i * n + j] = /*(double(rand()) / rand()) + */int(rand() / 100000000);
}
}
break;
default:
std::cout << "You have wrote something wrong." << '\n';
}
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int block_size = 1024;
int grid_size = (n - 1) / block_size + 1;
double *gpu_matrix;
dim3 dimBlock(block_size, block_size, 1);
dim3 dimGrid(grid_size, grid_size, 1);
cudaMalloc(&gpu_matrix, bytes);
cudaMemcpy(gpu_matrix, matrix, bytes, cudaMemcpyHostToDevice);
auto start = std::chrono::steady_clock::now();
transp<<<dimGrid, dimBlock>>>(gpu_matrix, n);
cudaDeviceSynchronize();
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for GPU: " << elapsed_seconds.count() << "s\n";
/*for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << gpu_matrix[i * n + j];
}
std::cout << '\n';
}*/
double* matrix_res;
matrix_res = (double*)malloc(bytes);
cudaMemcpy(matrix_res, gpu_matrix, bytes, cudaMemcpyDeviceToHost);
std::cout << "GPU: " << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix_res[i * n + j];
}
std::cout << '\n';
}
transpose(matrix, matrix_res);
cudaFree(gpu_matrix);
free(matrix);
return 0;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <cstdlib>
#include <chrono>
#include <iomanip>
__global__ void transp(double *matrix, int size){
printf("Hello?\n");
//Индекс текущего блока в гриде
int blockIndex = blockIdx.x + blockIdx.y*gridDim.x + blockIdx.z*gridDim.y*gridDim.x;
//Индекс треда внутри текущего блока
int ThreadIndex = threadIdx.x + threadIdx.y*blockDim.x + threadIdx.z*blockDim.y*blockDim.x;
//глобальный индекс нити
int idx = blockIndex*blockDim.x*blockDim.y*blockDim.z + ThreadIndex;
printf("In thread %d\n", idx);
if (idx / size > idx % size){
printf("%lf %lf\n", matrix[(idx / size) * size + (idx % size)], matrix[(idx % size) * size + (idx / size)]);
//std::cout << "[" << idx << ", " << idy << "] = " << matrix[idx][idy] << '\n';
double tmp = matrix[(idx / size) * size + (idx % size)];
matrix[(idx / size) * size + (idx % size)] = matrix[(idx % size) * size + (idx / size)];
matrix[(idx % size) * size + (idx / size)] = tmp;
}
}
int n;
bool transpose(double* matrix, double* res_gpu) //либо int matrix[][5], либо int (*matrix)[5]
{
int t;
auto start = std::chrono::steady_clock::now();
for(int i = 0; i < n * n; ++i)
{
if(i / n > i % n){
t = matrix[(i / n) * n + (i % n)];
matrix[(i / n) * n + (i % n)] = matrix[(i % n) * n + (i / n)];
matrix[(i % n) * n + (i / n)] = t;
}
}
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for CPU: " << elapsed_seconds.count() << "s\n";
std::cout << "CPU" << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int num_of_err = 0;
bool is_correct = 1;
for (int i = 0; i < n; ++i){
for (int j = 0; j < n; ++j){
if (matrix[i * n + j] != res_gpu[i * n + j]){
num_of_err++;
//std::cout << "Error in " << i + 1 << ", " << j + 1 << " element;\nOn CPU " << matrix[i * n + j] << ", On GPU " << res_gpu[i * n + j] << ";\n";
is_correct = 0;
}
}
}
if (is_correct){
std::cout << "Everything is great, results are equal!" << '\n';
} else{
std::cout << "There are " << num_of_err << " errors. Hm... maybe we did something wrong..." << '\n';
}
return is_correct;
}
int main(int argc, char const *argv[]) {
sscanf(argv[1], "%d", &n);
int bytes = n * n * sizeof(double);
double* matrix;
matrix = (double*)malloc(bytes);
/*for(int i = 0; i < n; ++i){
matrix[i] = new(double[n]);
}*/
char decision;
std::cout << "Do you want to fill matrix by yourself? (Y/N)" << '\n';
std::cin >> decision;
switch(tolower(decision))
{
case 'y':
for(int j = 0; j < n; ++j){
std::cout << "Please, enter "<< j + 1 << " string: ";
for (int i = 0; i < n; ++i){
std::cin >> matrix[i * n + j];
}
}
break;
case 'n':
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
matrix[i * n + j] = /*(double(rand()) / rand()) + */int(rand() / 100000000);
}
}
break;
default:
std::cout << "You have wrote something wrong." << '\n';
}
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int block_size = 1024;
int grid_size = (n - 1) / block_size + 1;
double *gpu_matrix;
dim3 dimBlock(block_size, block_size, 1);
dim3 dimGrid(grid_size, grid_size, 1);
hipMalloc(&gpu_matrix, bytes);
hipMemcpy(gpu_matrix, matrix, bytes, hipMemcpyHostToDevice);
auto start = std::chrono::steady_clock::now();
transp<<<dimGrid, dimBlock>>>(gpu_matrix, n);
hipDeviceSynchronize();
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for GPU: " << elapsed_seconds.count() << "s\n";
/*for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << gpu_matrix[i * n + j];
}
std::cout << '\n';
}*/
double* matrix_res;
matrix_res = (double*)malloc(bytes);
hipMemcpy(matrix_res, gpu_matrix, bytes, hipMemcpyDeviceToHost);
std::cout << "GPU: " << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix_res[i * n + j];
}
std::cout << '\n';
}
transpose(matrix, matrix_res);
hipFree(gpu_matrix);
free(matrix);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <cstdlib>
#include <chrono>
#include <iomanip>
__global__ void transp(double *matrix, int size){
printf("Hello?\n");
//Индекс текущего блока в гриде
int blockIndex = blockIdx.x + blockIdx.y*gridDim.x + blockIdx.z*gridDim.y*gridDim.x;
//Индекс треда внутри текущего блока
int ThreadIndex = threadIdx.x + threadIdx.y*blockDim.x + threadIdx.z*blockDim.y*blockDim.x;
//глобальный индекс нити
int idx = blockIndex*blockDim.x*blockDim.y*blockDim.z + ThreadIndex;
printf("In thread %d\n", idx);
if (idx / size > idx % size){
printf("%lf %lf\n", matrix[(idx / size) * size + (idx % size)], matrix[(idx % size) * size + (idx / size)]);
//std::cout << "[" << idx << ", " << idy << "] = " << matrix[idx][idy] << '\n';
double tmp = matrix[(idx / size) * size + (idx % size)];
matrix[(idx / size) * size + (idx % size)] = matrix[(idx % size) * size + (idx / size)];
matrix[(idx % size) * size + (idx / size)] = tmp;
}
}
int n;
bool transpose(double* matrix, double* res_gpu) //либо int matrix[][5], либо int (*matrix)[5]
{
int t;
auto start = std::chrono::steady_clock::now();
for(int i = 0; i < n * n; ++i)
{
if(i / n > i % n){
t = matrix[(i / n) * n + (i % n)];
matrix[(i / n) * n + (i % n)] = matrix[(i % n) * n + (i / n)];
matrix[(i % n) * n + (i / n)] = t;
}
}
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for CPU: " << elapsed_seconds.count() << "s\n";
std::cout << "CPU" << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int num_of_err = 0;
bool is_correct = 1;
for (int i = 0; i < n; ++i){
for (int j = 0; j < n; ++j){
if (matrix[i * n + j] != res_gpu[i * n + j]){
num_of_err++;
//std::cout << "Error in " << i + 1 << ", " << j + 1 << " element;\nOn CPU " << matrix[i * n + j] << ", On GPU " << res_gpu[i * n + j] << ";\n";
is_correct = 0;
}
}
}
if (is_correct){
std::cout << "Everything is great, results are equal!" << '\n';
} else{
std::cout << "There are " << num_of_err << " errors. Hm... maybe we did something wrong..." << '\n';
}
return is_correct;
}
int main(int argc, char const *argv[]) {
sscanf(argv[1], "%d", &n);
int bytes = n * n * sizeof(double);
double* matrix;
matrix = (double*)malloc(bytes);
/*for(int i = 0; i < n; ++i){
matrix[i] = new(double[n]);
}*/
char decision;
std::cout << "Do you want to fill matrix by yourself? (Y/N)" << '\n';
std::cin >> decision;
switch(tolower(decision))
{
case 'y':
for(int j = 0; j < n; ++j){
std::cout << "Please, enter "<< j + 1 << " string: ";
for (int i = 0; i < n; ++i){
std::cin >> matrix[i * n + j];
}
}
break;
case 'n':
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
matrix[i * n + j] = /*(double(rand()) / rand()) + */int(rand() / 100000000);
}
}
break;
default:
std::cout << "You have wrote something wrong." << '\n';
}
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix[i * n + j];
}
std::cout << '\n';
}
int block_size = 1024;
int grid_size = (n - 1) / block_size + 1;
double *gpu_matrix;
dim3 dimBlock(block_size, block_size, 1);
dim3 dimGrid(grid_size, grid_size, 1);
hipMalloc(&gpu_matrix, bytes);
hipMemcpy(gpu_matrix, matrix, bytes, hipMemcpyHostToDevice);
auto start = std::chrono::steady_clock::now();
transp<<<dimGrid, dimBlock>>>(gpu_matrix, n);
hipDeviceSynchronize();
auto end = std::chrono::steady_clock::now();
std::chrono::duration<double> elapsed_seconds = end-start;
std::cout << "Time for GPU: " << elapsed_seconds.count() << "s\n";
/*for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << gpu_matrix[i * n + j];
}
std::cout << '\n';
}*/
double* matrix_res;
matrix_res = (double*)malloc(bytes);
hipMemcpy(matrix_res, gpu_matrix, bytes, hipMemcpyDeviceToHost);
std::cout << "GPU: " << '\n';
for(int i = 0; i < n; ++i){
for(int j = 0; j < n; ++j){
std::cout << std::setw(8) << matrix_res[i * n + j];
}
std::cout << '\n';
}
transpose(matrix, matrix_res);
hipFree(gpu_matrix);
free(matrix);
return 0;
} | .text
.file "second_try.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__transpPdi # -- Begin function _Z21__device_stub__transpPdi
.p2align 4, 0x90
.type _Z21__device_stub__transpPdi,@function
_Z21__device_stub__transpPdi: # @_Z21__device_stub__transpPdi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6transpPdi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__transpPdi, .Lfunc_end0-_Z21__device_stub__transpPdi
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z9transposePdS_
.LCPI1_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl _Z9transposePdS_
.p2align 4, 0x90
.type _Z9transposePdS_,@function
_Z9transposePdS_: # @_Z9transposePdS_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movq %rdi, %r14
callq _ZNSt6chrono3_V212steady_clock3nowEv
movq %rax, %r15
movl n(%rip), %esi
testl %esi, %esi
je .LBB1_5
# %bb.1: # %.lr.ph.preheader
movl %esi, %edi
imull %esi, %edi
cmpl $1, %edi
adcl $0, %edi
xorl %ecx, %ecx
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
incl %ecx
cmpl %ecx, %edi
je .LBB1_5
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ecx, %eax
cltd
idivl %esi
cmpl %edx, %eax
jle .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
movl %eax, %r8d
imull %esi, %r8d
addl %edx, %r8d
movslq %r8d, %r8
imull %esi, %edx
addl %eax, %edx
movslq %edx, %rax
movsd (%r14,%rax,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r14,%r8,8), %xmm1 # xmm1 = mem[0],zero
cvttpd2dq %xmm1, %xmm1
movsd %xmm0, (%r14,%r8,8)
cvtdq2pd %xmm1, %xmm0
movlps %xmm0, (%r14,%rax,8)
jmp .LBB1_4
.LBB1_5: # %._crit_edge
callq _ZNSt6chrono3_V212steady_clock3nowEv
subq %r15, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI1_0(%rip), %xmm0
movsd %xmm0, 16(%rsp) # 8-byte Spill
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movsd 16(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $3, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 12(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB1_7
# %bb.6:
leaq 12(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_8
.LBB1_7:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB1_8: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
movl n(%rip), %eax
testl %eax, %eax
jle .LBB1_15
# %bb.9: # %.preheader61.preheader
xorl %r12d, %r12d
leaq 13(%rsp), %r15
jmp .LBB1_10
.p2align 4, 0x90
.LBB1_17: # in Loop: Header=BB1_10 Depth=1
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB1_18: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit50
# in Loop: Header=BB1_10 Depth=1
incl %r12d
movl n(%rip), %eax
cmpl %eax, %r12d
jge .LBB1_15
.LBB1_10: # %.preheader61
# =>This Loop Header: Depth=1
# Child Loop BB1_12 Depth 2
movl n(%rip), %eax
testl %eax, %eax
jle .LBB1_13
# %bb.11: # %.lr.ph64.preheader
# in Loop: Header=BB1_10 Depth=1
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_12: # %.lr.ph64
# Parent Loop BB1_10 Depth=1
# => This Inner Loop Header: Depth=2
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
movq $8, _ZSt4cout+16(%rcx)
imull %r12d, %eax
cltq
addq %r13, %rax
movsd (%r14,%rax,8), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl n(%rip), %eax
incq %r13
cmpl %eax, %r13d
jl .LBB1_12
.LBB1_13: # %._crit_edge65
# in Loop: Header=BB1_10 Depth=1
movb $10, 13(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB1_17
# %bb.14: # in Loop: Header=BB1_10 Depth=1
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r15, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_18
.LBB1_15: # %.preheader60
testl %eax, %eax
jle .LBB1_16
# %bb.19: # %.preheader.lr.ph
movl %eax, %ecx
movb $1, %bpl
xorl %edx, %edx
xorl %esi, %esi
xorl %edi, %edi
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_20: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_21 Depth 2
movl %esi, %r9d
leaq (%rbx,%r9,8), %r8
leaq (%r14,%r9,8), %r9
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB1_21: # Parent Loop BB1_20 Depth=1
# => This Inner Loop Header: Depth=2
movsd (%r9,%r10,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r8,%r10,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm2
cmpneqsd %xmm1, %xmm2
movq %xmm2, %r11
subl %r11d, %r15d
ucomisd %xmm1, %xmm0
movzbl %bpl, %ebp
cmovnel %edx, %ebp
cmovpl %edx, %ebp
incq %r10
cmpq %r10, %rcx
jne .LBB1_21
# %bb.22: # %._crit_edge72
# in Loop: Header=BB1_20 Depth=1
incq %rdi
addl %eax, %esi
cmpq %rcx, %rdi
jne .LBB1_20
# %bb.23: # %._crit_edge78.loopexit
andb $1, %bpl
jmp .LBB1_24
.LBB1_16:
movb $1, %bpl
xorl %r15d, %r15d
.LBB1_24: # %._crit_edge78
movl $_ZSt4cout, %edi
testb %bpl, %bpl
je .LBB1_28
# %bb.25:
movl $.L.str.3, %esi
movl $39, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 14(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB1_27
# %bb.26:
leaq 14(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_32
.LBB1_28:
movl $.L.str.4, %esi
movl $10, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r15d, %esi
callq _ZNSolsEi
movq %rax, %rbx
movl $.L.str.5, %esi
movl $46, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 15(%rsp)
movq (%rbx), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .LBB1_30
# %bb.29:
leaq 15(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_32
.LBB1_27:
movl $_ZSt4cout, %edi
jmp .LBB1_31
.LBB1_30:
movq %rbx, %rdi
.LBB1_31:
movl $10, %esi
callq _ZNSo3putEc
.LBB1_32:
movl %ebp, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z9transposePdS_, .Lfunc_end1-_Z9transposePdS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI2_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq 8(%rsi), %rdi
movl $.L.str.6, %esi
movl $n, %edx
xorl %eax, %eax
callq __isoc23_sscanf
movl n(%rip), %eax
imull %eax, %eax
shll $3, %eax
movslq %eax, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movl $_ZSt4cout, %edi
movl $.L.str.7, %esi
movl $45, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB2_2
# %bb.1:
leaq 16(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB2_3
.LBB2_2:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB2_3: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
leaq 15(%rsp), %rsi
movl $_ZSt3cin, %edi
callq _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
movsbl 15(%rsp), %edi
callq tolower
cmpl $121, %eax
je .LBB2_11
# %bb.4: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
cmpl $110, %eax
jne .LBB2_17
# %bb.5: # %.preheader84
cmpl $0, n(%rip)
jle .LBB2_20
# %bb.6: # %.preheader83.preheader
xorl %r15d, %r15d
jmp .LBB2_7
.p2align 4, 0x90
.LBB2_10: # %._crit_edge
# in Loop: Header=BB2_7 Depth=1
incl %r15d
cmpl n(%rip), %r15d
jge .LBB2_20
.LBB2_7: # %.preheader83
# =>This Loop Header: Depth=1
# Child Loop BB2_9 Depth 2
cmpl $0, n(%rip)
jle .LBB2_10
# %bb.8: # %.lr.ph.preheader
# in Loop: Header=BB2_7 Depth=1
movslq %r15d, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_9: # %.lr.ph
# Parent Loop BB2_7 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1441151881, %rax, %rax # imm = 0x55E63B89
movq %rax, %rcx
shrq $63, %rcx
sarq $57, %rax
addl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movslq n(%rip), %rax
imulq %r12, %rax
addq %r13, %rax
movsd %xmm0, (%rbx,%rax,8)
incq %r13
cmpl n(%rip), %r13d
jl .LBB2_9
jmp .LBB2_10
.LBB2_11: # %.preheader81
cmpl $0, n(%rip)
jle .LBB2_20
# %bb.12: # %.lr.ph92.preheader
xorl %ebp, %ebp
jmp .LBB2_14
.p2align 4, 0x90
.LBB2_13: # %.loopexit
# in Loop: Header=BB2_14 Depth=1
cmpl n(%rip), %ebp
jge .LBB2_20
.LBB2_14: # %.lr.ph92
# =>This Loop Header: Depth=1
# Child Loop BB2_16 Depth 2
movl %ebp, %r15d
movl $_ZSt4cout, %edi
movl $.L.str.8, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
leal 1(%r15), %ebp
movl $_ZSt4cout, %edi
movl %ebp, %esi
callq _ZNSolsEi
movl $.L.str.9, %esi
movl $9, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_13
# %bb.15: # %.lr.ph90.preheader
# in Loop: Header=BB2_14 Depth=1
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_16: # %.lr.ph90
# Parent Loop BB2_14 Depth=1
# => This Inner Loop Header: Depth=2
imull %r12d, %eax
addl %r15d, %eax
cltq
leaq (%rbx,%rax,8), %rsi
movl $_ZSt3cin, %edi
callq _ZNSi10_M_extractIdEERSiRT_
incl %r12d
movl n(%rip), %eax
cmpl %eax, %r12d
jl .LBB2_16
jmp .LBB2_13
.LBB2_17:
movl $_ZSt4cout, %edi
movl $.L.str.10, %esi
movl $31, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB2_19
# %bb.18:
leaq 16(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB2_20
.LBB2_19:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB2_20: # %.loopexit82
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_29
# %bb.21: # %.preheader80.preheader
xorl %r12d, %r12d
leaq 16(%rsp), %r15
jmp .LBB2_22
.p2align 4, 0x90
.LBB2_26: # in Loop: Header=BB2_22 Depth=1
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r15, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_28: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit67
# in Loop: Header=BB2_22 Depth=1
incl %r12d
movl n(%rip), %eax
cmpl %eax, %r12d
jge .LBB2_29
.LBB2_22: # %.preheader80
# =>This Loop Header: Depth=1
# Child Loop BB2_24 Depth 2
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_25
# %bb.23: # %.lr.ph94.preheader
# in Loop: Header=BB2_22 Depth=1
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_24: # %.lr.ph94
# Parent Loop BB2_22 Depth=1
# => This Inner Loop Header: Depth=2
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
movq $8, _ZSt4cout+16(%rcx)
imull %r12d, %eax
cltq
addq %r13, %rax
movsd (%rbx,%rax,8), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl n(%rip), %eax
incq %r13
cmpl %eax, %r13d
jl .LBB2_24
.LBB2_25: # %._crit_edge95
# in Loop: Header=BB2_22 Depth=1
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
jne .LBB2_26
# %bb.27: # in Loop: Header=BB2_22 Depth=1
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
jmp .LBB2_28
.LBB2_29: # %._crit_edge98
leal -1(%rax), %ecx
addl $1022, %eax # imm = 0x3FE
testl %ecx, %ecx
cmovnsl %ecx, %eax
sarl $10, %eax
incl %eax
movq %rax, %r12
shlq $32, %r12
orq %rax, %r12
leaq 40(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 40(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
callq _ZNSt6chrono3_V212steady_clock3nowEv
movq %rax, %r15
movabsq $4398046512128, %rdx # imm = 0x40000000400
movq %r12, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_31
# %bb.30:
movq 40(%rsp), %rax
movl n(%rip), %ecx
movq %rax, 112(%rsp)
movl %ecx, 52(%rsp)
leaq 112(%rsp), %rax
movq %rax, 16(%rsp)
leaq 52(%rsp), %rax
movq %rax, 24(%rsp)
leaq 96(%rsp), %rdi
leaq 80(%rsp), %rsi
leaq 72(%rsp), %rdx
leaq 64(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 80(%rsp), %rcx
movl 88(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z6transpPdi, %edi
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
pushq 80(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_31:
callq hipDeviceSynchronize
callq _ZNSt6chrono3_V212steady_clock3nowEv
subq %r15, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI2_0(%rip), %xmm0
movsd %xmm0, 56(%rsp) # 8-byte Spill
movl $_ZSt4cout, %edi
movl $.L.str.11, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movsd 56(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq %r14, %rdi
callq malloc
movq %rax, %r15
movq 40(%rsp), %rsi
movq %rax, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movl $_ZSt4cout, %edi
movl $.L.str.12, %esi
movl $5, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB2_33
# %bb.32:
leaq 16(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
cmpl $0, n(%rip)
jg .LBB2_35
jmp .LBB2_43
.LBB2_33:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
cmpl $0, n(%rip)
jle .LBB2_43
.LBB2_35: # %.preheader.preheader
xorl %r12d, %r12d
leaq 16(%rsp), %r14
jmp .LBB2_36
.p2align 4, 0x90
.LBB2_40: # in Loop: Header=BB2_36 Depth=1
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r14, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_42: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
# in Loop: Header=BB2_36 Depth=1
incl %r12d
cmpl n(%rip), %r12d
jge .LBB2_43
.LBB2_36: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_38 Depth 2
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_39
# %bb.37: # %.lr.ph101.preheader
# in Loop: Header=BB2_36 Depth=1
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_38: # %.lr.ph101
# Parent Loop BB2_36 Depth=1
# => This Inner Loop Header: Depth=2
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
movq $8, _ZSt4cout+16(%rcx)
imull %r12d, %eax
cltq
addq %r13, %rax
movsd (%r15,%rax,8), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl n(%rip), %eax
incq %r13
cmpl %eax, %r13d
jl .LBB2_38
.LBB2_39: # %._crit_edge102
# in Loop: Header=BB2_36 Depth=1
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
jne .LBB2_40
# %bb.41: # in Loop: Header=BB2_36 Depth=1
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
jmp .LBB2_42
.LBB2_43: # %._crit_edge105
movq %rbx, %rdi
movq %r15, %rsi
callq _Z9transposePdS_
movq 40(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6transpPdi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6transpPdi,@object # @_Z6transpPdi
.section .rodata,"a",@progbits
.globl _Z6transpPdi
.p2align 3, 0x0
_Z6transpPdi:
.quad _Z21__device_stub__transpPdi
.size _Z6transpPdi, 8
.type n,@object # @n
.bss
.globl n
.p2align 2, 0x0
n:
.long 0 # 0x0
.size n, 4
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Time for CPU: "
.size .L.str, 15
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "s\n"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "CPU"
.size .L.str.2, 4
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Everything is great, results are equal!"
.size .L.str.3, 40
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "There are "
.size .L.str.4, 11
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " errors. Hm... maybe we did something wrong..."
.size .L.str.5, 47
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d"
.size .L.str.6, 3
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Do you want to fill matrix by yourself? (Y/N)"
.size .L.str.7, 46
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Please, enter "
.size .L.str.8, 15
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " string: "
.size .L.str.9, 10
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "You have wrote something wrong."
.size .L.str.10, 32
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Time for GPU: "
.size .L.str.11, 15
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "GPU: "
.size .L.str.12, 6
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6transpPdi"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__transpPdi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6transpPdi
.addrsig_sym n
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt3cin
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013b522_00000000-6_second_try.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4056:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Time for CPU: "
.LC2:
.string "s\n"
.LC3:
.string "CPU"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "Everything is great, results are equal!"
.section .rodata.str1.1
.LC5:
.string "There are "
.section .rodata.str1.8
.align 8
.LC6:
.string " errors. Hm... maybe we did something wrong..."
.text
.globl _Z9transposePdS_
.type _Z9transposePdS_, @function
_Z9transposePdS_:
.LFB4048:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $16, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %r12
movq %rsi, %r13
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
movq %rax, %rbx
movl n(%rip), %esi
movl %esi, %edi
imull %esi, %edi
testl %edi, %edi
jle .L4
movslq %edi, %rdi
movl $0, %ecx
jmp .L6
.L5:
addq $1, %rcx
cmpq %rdi, %rcx
je .L4
.L6:
movl %ecx, %eax
cltd
idivl %esi
cmpl %edx, %eax
jle .L5
cvttsd2sil (%r12,%rcx,8), %r8d
imull %esi, %edx
addl %eax, %edx
movslq %edx, %rdx
leaq (%r12,%rdx,8), %rax
movsd (%rax), %xmm0
movsd %xmm0, (%r12,%rcx,8)
pxor %xmm0, %xmm0
cvtsi2sdl %r8d, %xmm0
movsd %xmm0, (%rax)
jmp .L5
.L4:
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC0(%rip), %xmm0
movq %xmm0, %rbp
movl $14, %edx
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rbp, %xmm0
movq %rbx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $2, %edx
leaq .LC2(%rip), %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $3, %edx
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movb $10, 7(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L7
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L8:
movl $0, %r14d
leaq _ZSt4cout(%rip), %rbp
cmpl $0, n(%rip)
jg .L9
.L27:
movl $39, %edx
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movb $10, 7(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L22
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L23:
movl $1, %ebp
.L3:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L38
movl %ebp, %eax
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
movl $10, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
jmp .L8
.L12:
movl $10, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
.L13:
addl $1, %r14d
movl n(%rip), %esi
cmpl %r14d, %esi
jle .L14
.L9:
movl n(%rip), %eax
movl $0, %ebx
testl %eax, %eax
jle .L15
.L11:
movq 0(%rbp), %rdx
movq -24(%rdx), %rdx
movq $8, 16(%rbp,%rdx)
imull %r14d, %eax
addl %ebx, %eax
cltq
movsd (%r12,%rax,8), %xmm0
movq %rbp, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
addl $1, %ebx
movl n(%rip), %eax
cmpl %ebx, %eax
jg .L11
.L15:
movb $10, 7(%rsp)
movq 0(%rbp), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbp,%rax)
je .L12
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L13
.L14:
testl %esi, %esi
jle .L27
movslq %esi, %r8
leaq 0(,%r8,8), %r9
negq %r8
salq $3, %r8
movq %r9, %rdx
movl $0, %edi
movl $1, %ebp
movl $0, %ebx
movl $0, %ecx
jmp .L16
.L31:
addl $1, %ebx
movl %ecx, %ebp
.L17:
addq $8, %rax
cmpq %rax, %rdx
je .L39
.L19:
movsd (%r12,%rax), %xmm0
ucomisd 0(%r13,%rax), %xmm0
jp .L31
je .L17
jmp .L31
.L39:
addl $1, %edi
addq %r9, %rdx
cmpl %edi, %esi
je .L20
.L16:
leaq (%rdx,%r8), %rax
jmp .L19
.L20:
testb %bpl, %bpl
jne .L27
movl $10, %edx
leaq .LC5(%rip), %rsi
leaq _ZSt4cout(%rip), %r12
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebx, %esi
movq %r12, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movl $46, %edx
leaq .LC6(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movb $10, 7(%rsp)
movq (%rbx), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L25
leaq 7(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L3
.L22:
movl $10, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
jmp .L23
.L25:
movl $10, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L3
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4048:
.size _Z9transposePdS_, .-_Z9transposePdS_
.globl _Z26__device_stub__Z6transpPdiPdi
.type _Z26__device_stub__Z6transpPdiPdi, @function
_Z26__device_stub__Z6transpPdiPdi:
.LFB4078:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L44
.L40:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L45
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L44:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6transpPdi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L40
.L45:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4078:
.size _Z26__device_stub__Z6transpPdiPdi, .-_Z26__device_stub__Z6transpPdiPdi
.globl _Z6transpPdi
.type _Z6transpPdi, @function
_Z6transpPdi:
.LFB4079:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z6transpPdiPdi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4079:
.size _Z6transpPdi, .-_Z6transpPdi
.section .rodata.str1.1
.LC7:
.string "%d"
.section .rodata.str1.8
.align 8
.LC8:
.string "Do you want to fill matrix by yourself? (Y/N)"
.section .rodata.str1.1
.LC9:
.string "Please, enter "
.LC10:
.string " string: "
.section .rodata.str1.8
.align 8
.LC11:
.string "You have wrote something wrong."
.section .rodata.str1.1
.LC12:
.string "Time for GPU: "
.LC13:
.string "GPU: "
.text
.globl main
.type main, @function
main:
.LFB4053:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movq 8(%rsi), %rdi
leaq n(%rip), %rdx
leaq .LC7(%rip), %rsi
call __isoc23_sscanf@PLT
movl n(%rip), %eax
imull %eax, %eax
leal 0(,%rax,8), %r15d
movslq %r15d, %r15
movq %r15, %rdi
call malloc@PLT
movq %rax, %rbx
leaq .LC8(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
leaq 6(%rsp), %rsi
leaq _ZSt3cin(%rip), %rdi
call _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
call __ctype_tolower_loc@PLT
movsbq 6(%rsp), %rdx
movq (%rax), %rax
movl (%rax,%rdx,4), %eax
cmpl $110, %eax
je .L49
cmpl $121, %eax
jne .L50
movl $0, %r14d
leaq _ZSt3cin(%rip), %r13
cmpl $0, n(%rip)
jle .L52
.L51:
movl $14, %edx
leaq .LC9(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %r14d, %r12d
addl $1, %r14d
movl %r14d, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSolsEi@PLT
movq %rax, %rdi
movl $9, %edx
leaq .LC10(%rip), %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl n(%rip), %eax
testl %eax, %eax
jle .L54
movl $0, %ebp
.L55:
imull %ebp, %eax
addl %r12d, %eax
cltq
leaq (%rbx,%rax,8), %rsi
movq %r13, %rdi
call _ZNSi10_M_extractIdEERSiRT_@PLT
addl $1, %ebp
movl n(%rip), %eax
cmpl %ebp, %eax
jg .L55
.L54:
cmpl n(%rip), %r14d
jl .L51
jmp .L56
.L49:
movl $0, %r12d
cmpl $0, n(%rip)
jg .L53
.L52:
movl n(%rip), %eax
.L60:
movl $1024, 16(%rsp)
movl $1024, 20(%rsp)
movl $1, 24(%rsp)
leal 1022(%rax), %edx
subl $1, %eax
cmovs %edx, %eax
sarl $10, %eax
addl $1, %eax
movl %eax, 28(%rsp)
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r15, %rdx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
movq %rax, %rbp
movl 24(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 16(%rsp), %rdx
movq 28(%rsp), %rdi
movl 36(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L94
.L65:
call cudaDeviceSynchronize@PLT
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
subq %rbp, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC0(%rip), %xmm0
movq %xmm0, %r12
leaq .LC12(%rip), %rsi
leaq _ZSt4cout(%rip), %rbp
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movq %r12, %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r15, %rdi
call malloc@PLT
movq %rax, %r13
movl $2, %ecx
movq %r15, %rdx
movq 8(%rsp), %rsi
movq %rax, %rdi
call cudaMemcpy@PLT
leaq .LC13(%rip), %rsi
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
movl $0, %r14d
movq %rbp, %r12
cmpl $0, n(%rip)
jg .L66
.L67:
movq %r13, %rsi
movq %rbx, %rdi
call _Z9transposePdS_
movq 8(%rsp), %rdi
call cudaFree@PLT
movq %rbx, %rdi
call free@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L95
movl $0, %eax
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L57:
.cfi_restore_state
call rand@PLT
movl n(%rip), %esi
movl %esi, %ecx
imull %r12d, %ecx
addl %ebp, %ecx
movslq %ecx, %rcx
movslq %eax, %rdx
imulq $1441151881, %rdx, %rdx
sarq $57, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
movsd %xmm0, (%rbx,%rcx,8)
addl $1, %ebp
cmpl %ebp, %esi
jg .L57
.L58:
addl $1, %r12d
cmpl %r12d, n(%rip)
jle .L56
.L53:
movl $0, %ebp
cmpl $0, n(%rip)
jg .L57
jmp .L58
.L50:
leaq .LC11(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
.L56:
movl n(%rip), %eax
movl $0, %r13d
leaq _ZSt4cout(%rip), %r12
testl %eax, %eax
jg .L59
jmp .L60
.L62:
movl $10, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
.L63:
addl $1, %r13d
movl n(%rip), %eax
cmpl %r13d, %eax
jle .L60
.L59:
movl n(%rip), %eax
movl $0, %ebp
testl %eax, %eax
jle .L64
.L61:
movq (%r12), %rdx
movq -24(%rdx), %rdx
movq $8, 16(%r12,%rdx)
imull %r13d, %eax
addl %ebp, %eax
cltq
movsd (%rbx,%rax,8), %xmm0
movq %r12, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
addl $1, %ebp
movl n(%rip), %eax
cmpl %ebp, %eax
jg .L61
.L64:
movb $10, 28(%rsp)
movq (%r12), %rax
movq -24(%rax), %rax
cmpq $0, 16(%r12,%rax)
je .L62
leaq 28(%rsp), %rsi
movl $1, %edx
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L63
.L94:
movl n(%rip), %esi
movq 8(%rsp), %rdi
call _Z26__device_stub__Z6transpPdiPdi
jmp .L65
.L69:
movl $10, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
.L70:
addl $1, %r14d
cmpl %r14d, n(%rip)
jle .L67
.L66:
movl n(%rip), %eax
movl $0, %ebp
testl %eax, %eax
jle .L71
.L68:
movq (%r12), %rdx
movq -24(%rdx), %rdx
movq $8, 16(%r12,%rdx)
imull %r14d, %eax
addl %ebp, %eax
cltq
movsd 0(%r13,%rax,8), %xmm0
movq %r12, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
addl $1, %ebp
movl n(%rip), %eax
cmpl %ebp, %eax
jg .L68
.L71:
movb $10, 7(%rsp)
movq (%r12), %rax
movq -24(%rax), %rax
cmpq $0, 16(%r12,%rax)
je .L69
leaq 7(%rsp), %rsi
movl $1, %edx
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L70
.L95:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4053:
.size main, .-main
.section .rodata.str1.1
.LC14:
.string "_Z6transpPdi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4081:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z6transpPdi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4081:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl n
.bss
.align 4
.type n, @object
.size n, 4
n:
.zero 4
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1104006501
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "second_try.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__transpPdi # -- Begin function _Z21__device_stub__transpPdi
.p2align 4, 0x90
.type _Z21__device_stub__transpPdi,@function
_Z21__device_stub__transpPdi: # @_Z21__device_stub__transpPdi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6transpPdi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__transpPdi, .Lfunc_end0-_Z21__device_stub__transpPdi
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z9transposePdS_
.LCPI1_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl _Z9transposePdS_
.p2align 4, 0x90
.type _Z9transposePdS_,@function
_Z9transposePdS_: # @_Z9transposePdS_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movq %rdi, %r14
callq _ZNSt6chrono3_V212steady_clock3nowEv
movq %rax, %r15
movl n(%rip), %esi
testl %esi, %esi
je .LBB1_5
# %bb.1: # %.lr.ph.preheader
movl %esi, %edi
imull %esi, %edi
cmpl $1, %edi
adcl $0, %edi
xorl %ecx, %ecx
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
incl %ecx
cmpl %ecx, %edi
je .LBB1_5
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ecx, %eax
cltd
idivl %esi
cmpl %edx, %eax
jle .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
movl %eax, %r8d
imull %esi, %r8d
addl %edx, %r8d
movslq %r8d, %r8
imull %esi, %edx
addl %eax, %edx
movslq %edx, %rax
movsd (%r14,%rax,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r14,%r8,8), %xmm1 # xmm1 = mem[0],zero
cvttpd2dq %xmm1, %xmm1
movsd %xmm0, (%r14,%r8,8)
cvtdq2pd %xmm1, %xmm0
movlps %xmm0, (%r14,%rax,8)
jmp .LBB1_4
.LBB1_5: # %._crit_edge
callq _ZNSt6chrono3_V212steady_clock3nowEv
subq %r15, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI1_0(%rip), %xmm0
movsd %xmm0, 16(%rsp) # 8-byte Spill
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movsd 16(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $3, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 12(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB1_7
# %bb.6:
leaq 12(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_8
.LBB1_7:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB1_8: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
movl n(%rip), %eax
testl %eax, %eax
jle .LBB1_15
# %bb.9: # %.preheader61.preheader
xorl %r12d, %r12d
leaq 13(%rsp), %r15
jmp .LBB1_10
.p2align 4, 0x90
.LBB1_17: # in Loop: Header=BB1_10 Depth=1
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB1_18: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit50
# in Loop: Header=BB1_10 Depth=1
incl %r12d
movl n(%rip), %eax
cmpl %eax, %r12d
jge .LBB1_15
.LBB1_10: # %.preheader61
# =>This Loop Header: Depth=1
# Child Loop BB1_12 Depth 2
movl n(%rip), %eax
testl %eax, %eax
jle .LBB1_13
# %bb.11: # %.lr.ph64.preheader
# in Loop: Header=BB1_10 Depth=1
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_12: # %.lr.ph64
# Parent Loop BB1_10 Depth=1
# => This Inner Loop Header: Depth=2
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
movq $8, _ZSt4cout+16(%rcx)
imull %r12d, %eax
cltq
addq %r13, %rax
movsd (%r14,%rax,8), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl n(%rip), %eax
incq %r13
cmpl %eax, %r13d
jl .LBB1_12
.LBB1_13: # %._crit_edge65
# in Loop: Header=BB1_10 Depth=1
movb $10, 13(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB1_17
# %bb.14: # in Loop: Header=BB1_10 Depth=1
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r15, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_18
.LBB1_15: # %.preheader60
testl %eax, %eax
jle .LBB1_16
# %bb.19: # %.preheader.lr.ph
movl %eax, %ecx
movb $1, %bpl
xorl %edx, %edx
xorl %esi, %esi
xorl %edi, %edi
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_20: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_21 Depth 2
movl %esi, %r9d
leaq (%rbx,%r9,8), %r8
leaq (%r14,%r9,8), %r9
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB1_21: # Parent Loop BB1_20 Depth=1
# => This Inner Loop Header: Depth=2
movsd (%r9,%r10,8), %xmm0 # xmm0 = mem[0],zero
movsd (%r8,%r10,8), %xmm1 # xmm1 = mem[0],zero
movapd %xmm0, %xmm2
cmpneqsd %xmm1, %xmm2
movq %xmm2, %r11
subl %r11d, %r15d
ucomisd %xmm1, %xmm0
movzbl %bpl, %ebp
cmovnel %edx, %ebp
cmovpl %edx, %ebp
incq %r10
cmpq %r10, %rcx
jne .LBB1_21
# %bb.22: # %._crit_edge72
# in Loop: Header=BB1_20 Depth=1
incq %rdi
addl %eax, %esi
cmpq %rcx, %rdi
jne .LBB1_20
# %bb.23: # %._crit_edge78.loopexit
andb $1, %bpl
jmp .LBB1_24
.LBB1_16:
movb $1, %bpl
xorl %r15d, %r15d
.LBB1_24: # %._crit_edge78
movl $_ZSt4cout, %edi
testb %bpl, %bpl
je .LBB1_28
# %bb.25:
movl $.L.str.3, %esi
movl $39, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 14(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB1_27
# %bb.26:
leaq 14(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_32
.LBB1_28:
movl $.L.str.4, %esi
movl $10, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r15d, %esi
callq _ZNSolsEi
movq %rax, %rbx
movl $.L.str.5, %esi
movl $46, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 15(%rsp)
movq (%rbx), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .LBB1_30
# %bb.29:
leaq 15(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_32
.LBB1_27:
movl $_ZSt4cout, %edi
jmp .LBB1_31
.LBB1_30:
movq %rbx, %rdi
.LBB1_31:
movl $10, %esi
callq _ZNSo3putEc
.LBB1_32:
movl %ebp, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z9transposePdS_, .Lfunc_end1-_Z9transposePdS_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI2_0:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq 8(%rsi), %rdi
movl $.L.str.6, %esi
movl $n, %edx
xorl %eax, %eax
callq __isoc23_sscanf
movl n(%rip), %eax
imull %eax, %eax
shll $3, %eax
movslq %eax, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movl $_ZSt4cout, %edi
movl $.L.str.7, %esi
movl $45, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB2_2
# %bb.1:
leaq 16(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB2_3
.LBB2_2:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB2_3: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
leaq 15(%rsp), %rsi
movl $_ZSt3cin, %edi
callq _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
movsbl 15(%rsp), %edi
callq tolower
cmpl $121, %eax
je .LBB2_11
# %bb.4: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
cmpl $110, %eax
jne .LBB2_17
# %bb.5: # %.preheader84
cmpl $0, n(%rip)
jle .LBB2_20
# %bb.6: # %.preheader83.preheader
xorl %r15d, %r15d
jmp .LBB2_7
.p2align 4, 0x90
.LBB2_10: # %._crit_edge
# in Loop: Header=BB2_7 Depth=1
incl %r15d
cmpl n(%rip), %r15d
jge .LBB2_20
.LBB2_7: # %.preheader83
# =>This Loop Header: Depth=1
# Child Loop BB2_9 Depth 2
cmpl $0, n(%rip)
jle .LBB2_10
# %bb.8: # %.lr.ph.preheader
# in Loop: Header=BB2_7 Depth=1
movslq %r15d, %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_9: # %.lr.ph
# Parent Loop BB2_7 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1441151881, %rax, %rax # imm = 0x55E63B89
movq %rax, %rcx
shrq $63, %rcx
sarq $57, %rax
addl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movslq n(%rip), %rax
imulq %r12, %rax
addq %r13, %rax
movsd %xmm0, (%rbx,%rax,8)
incq %r13
cmpl n(%rip), %r13d
jl .LBB2_9
jmp .LBB2_10
.LBB2_11: # %.preheader81
cmpl $0, n(%rip)
jle .LBB2_20
# %bb.12: # %.lr.ph92.preheader
xorl %ebp, %ebp
jmp .LBB2_14
.p2align 4, 0x90
.LBB2_13: # %.loopexit
# in Loop: Header=BB2_14 Depth=1
cmpl n(%rip), %ebp
jge .LBB2_20
.LBB2_14: # %.lr.ph92
# =>This Loop Header: Depth=1
# Child Loop BB2_16 Depth 2
movl %ebp, %r15d
movl $_ZSt4cout, %edi
movl $.L.str.8, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
leal 1(%r15), %ebp
movl $_ZSt4cout, %edi
movl %ebp, %esi
callq _ZNSolsEi
movl $.L.str.9, %esi
movl $9, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_13
# %bb.15: # %.lr.ph90.preheader
# in Loop: Header=BB2_14 Depth=1
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB2_16: # %.lr.ph90
# Parent Loop BB2_14 Depth=1
# => This Inner Loop Header: Depth=2
imull %r12d, %eax
addl %r15d, %eax
cltq
leaq (%rbx,%rax,8), %rsi
movl $_ZSt3cin, %edi
callq _ZNSi10_M_extractIdEERSiRT_
incl %r12d
movl n(%rip), %eax
cmpl %eax, %r12d
jl .LBB2_16
jmp .LBB2_13
.LBB2_17:
movl $_ZSt4cout, %edi
movl $.L.str.10, %esi
movl $31, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB2_19
# %bb.18:
leaq 16(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB2_20
.LBB2_19:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
.LBB2_20: # %.loopexit82
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_29
# %bb.21: # %.preheader80.preheader
xorl %r12d, %r12d
leaq 16(%rsp), %r15
jmp .LBB2_22
.p2align 4, 0x90
.LBB2_26: # in Loop: Header=BB2_22 Depth=1
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r15, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_28: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit67
# in Loop: Header=BB2_22 Depth=1
incl %r12d
movl n(%rip), %eax
cmpl %eax, %r12d
jge .LBB2_29
.LBB2_22: # %.preheader80
# =>This Loop Header: Depth=1
# Child Loop BB2_24 Depth 2
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_25
# %bb.23: # %.lr.ph94.preheader
# in Loop: Header=BB2_22 Depth=1
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_24: # %.lr.ph94
# Parent Loop BB2_22 Depth=1
# => This Inner Loop Header: Depth=2
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
movq $8, _ZSt4cout+16(%rcx)
imull %r12d, %eax
cltq
addq %r13, %rax
movsd (%rbx,%rax,8), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl n(%rip), %eax
incq %r13
cmpl %eax, %r13d
jl .LBB2_24
.LBB2_25: # %._crit_edge95
# in Loop: Header=BB2_22 Depth=1
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
jne .LBB2_26
# %bb.27: # in Loop: Header=BB2_22 Depth=1
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
jmp .LBB2_28
.LBB2_29: # %._crit_edge98
leal -1(%rax), %ecx
addl $1022, %eax # imm = 0x3FE
testl %ecx, %ecx
cmovnsl %ecx, %eax
sarl $10, %eax
incl %eax
movq %rax, %r12
shlq $32, %r12
orq %rax, %r12
leaq 40(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movq 40(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
callq _ZNSt6chrono3_V212steady_clock3nowEv
movq %rax, %r15
movabsq $4398046512128, %rdx # imm = 0x40000000400
movq %r12, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_31
# %bb.30:
movq 40(%rsp), %rax
movl n(%rip), %ecx
movq %rax, 112(%rsp)
movl %ecx, 52(%rsp)
leaq 112(%rsp), %rax
movq %rax, 16(%rsp)
leaq 52(%rsp), %rax
movq %rax, 24(%rsp)
leaq 96(%rsp), %rdi
leaq 80(%rsp), %rsi
leaq 72(%rsp), %rdx
leaq 64(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 80(%rsp), %rcx
movl 88(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z6transpPdi, %edi
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
pushq 80(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_31:
callq hipDeviceSynchronize
callq _ZNSt6chrono3_V212steady_clock3nowEv
subq %r15, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI2_0(%rip), %xmm0
movsd %xmm0, 56(%rsp) # 8-byte Spill
movl $_ZSt4cout, %edi
movl $.L.str.11, %esi
movl $14, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movsd 56(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq %r14, %rdi
callq malloc
movq %rax, %r15
movq 40(%rsp), %rsi
movq %rax, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movl $_ZSt4cout, %edi
movl $.L.str.12, %esi
movl $5, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
je .LBB2_33
# %bb.32:
leaq 16(%rsp), %rsi
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
cmpl $0, n(%rip)
jg .LBB2_35
jmp .LBB2_43
.LBB2_33:
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
cmpl $0, n(%rip)
jle .LBB2_43
.LBB2_35: # %.preheader.preheader
xorl %r12d, %r12d
leaq 16(%rsp), %r14
jmp .LBB2_36
.p2align 4, 0x90
.LBB2_40: # in Loop: Header=BB2_36 Depth=1
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r14, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_42: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit73
# in Loop: Header=BB2_36 Depth=1
incl %r12d
cmpl n(%rip), %r12d
jge .LBB2_43
.LBB2_36: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_38 Depth 2
movl n(%rip), %eax
testl %eax, %eax
jle .LBB2_39
# %bb.37: # %.lr.ph101.preheader
# in Loop: Header=BB2_36 Depth=1
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB2_38: # %.lr.ph101
# Parent Loop BB2_36 Depth=1
# => This Inner Loop Header: Depth=2
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
movq $8, _ZSt4cout+16(%rcx)
imull %r12d, %eax
cltq
addq %r13, %rax
movsd (%r15,%rax,8), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl n(%rip), %eax
incq %r13
cmpl %eax, %r13d
jl .LBB2_38
.LBB2_39: # %._crit_edge102
# in Loop: Header=BB2_36 Depth=1
movb $10, 16(%rsp)
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
cmpq $0, _ZSt4cout+16(%rax)
jne .LBB2_40
# %bb.41: # in Loop: Header=BB2_36 Depth=1
movl $_ZSt4cout, %edi
movl $10, %esi
callq _ZNSo3putEc
jmp .LBB2_42
.LBB2_43: # %._crit_edge105
movq %rbx, %rdi
movq %r15, %rsi
callq _Z9transposePdS_
movq 40(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6transpPdi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6transpPdi,@object # @_Z6transpPdi
.section .rodata,"a",@progbits
.globl _Z6transpPdi
.p2align 3, 0x0
_Z6transpPdi:
.quad _Z21__device_stub__transpPdi
.size _Z6transpPdi, 8
.type n,@object # @n
.bss
.globl n
.p2align 2, 0x0
n:
.long 0 # 0x0
.size n, 4
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Time for CPU: "
.size .L.str, 15
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "s\n"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "CPU"
.size .L.str.2, 4
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Everything is great, results are equal!"
.size .L.str.3, 40
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "There are "
.size .L.str.4, 11
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " errors. Hm... maybe we did something wrong..."
.size .L.str.5, 47
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d"
.size .L.str.6, 3
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Do you want to fill matrix by yourself? (Y/N)"
.size .L.str.7, 46
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Please, enter "
.size .L.str.8, 15
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " string: "
.size .L.str.9, 10
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "You have wrote something wrong."
.size .L.str.10, 32
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Time for GPU: "
.size .L.str.11, 15
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "GPU: "
.size .L.str.12, 6
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6transpPdi"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__transpPdi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6transpPdi
.addrsig_sym n
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt3cin
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <fstream>
#include <iostream>
#include <stdlib.h>
using namespace std;
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
printf("Error: %s:%d ", __FILE__, __LINE__); \
printf("code:%d, reason:%s\n", error, \
cudaGetErrorString(error)); \
exit(1); \
} \
}
__global__ void kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
//if (B[ntid] != tid) printf("%d, %d\n", B[ntid], T[tid]);
A[B[ntid]] *= 5.0;
}
__global__ void p_kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
A[B[ntid]] *= 5.0;
printf("%d,%lld\n", tid, &A[B[ntid]]);
}
#define WARP 32
#define THREAD 1024
int main(int argc, char **argv)
{
CHECK(cudaSetDevice(0));
int mode = atoi(argv[1]);
int *h_t = (int *)malloc(THREAD * sizeof(int));
ifstream ifs(argv[2]);
string str;
// skip header line
//getline(ifs, str);
for (int i = 0; i < THREAD; ++i) {
getline(ifs, str);
h_t[i] = atoi(str.c_str());
//cout << h_t[i] << endl;
}
int nElm = THREAD;
size_t nByte = nElm*sizeof(float);
float *h_A;
int *h_B;
h_A = (float *)malloc(nByte);
h_B = (int *)malloc(nElm * sizeof(int));
//for(int i = 0; i < THREAD; ++i)
// h_B[i] = i;
//srand(1234);
//for(int i = 0; i < 512; ++i) {
// int j = rand()%512;
// int t = h_B[i];
// h_B[i] = h_B[j];
// h_B[j] = t;
//}
for (int i = 0; i < 32; ++i) {
for (int j = 0; j < 16; ++j) {
h_B[i*32+j] = i + j*64;
h_B[i*32+j+16] = i+32 + j*64;
}
}
float *d_A;
int *d_B;
int *d_t;
CHECK(cudaMalloc((float **)&d_A, nByte));
CHECK(cudaMalloc((int **)&d_B, nByte));
CHECK(cudaMalloc((int **)&d_t, nByte));
CHECK(cudaMemcpy(d_A, h_A, nByte, cudaMemcpyHostToDevice));
CHECK(cudaMemcpy(d_B, h_B, nByte, cudaMemcpyHostToDevice));
CHECK(cudaMemcpy(d_t, h_t, nByte, cudaMemcpyHostToDevice));
int iLen = THREAD;
dim3 block(iLen);
dim3 grid( (nElm + block.x - 1) / block.x);
//for (int i = 0; i < 10000; ++i)
if (mode == 0)
kernel<<<grid, block>>>(d_A, d_B, d_t);
else if (mode == 1)
p_kernel<<<grid, block>>>(d_A, d_B, d_t);
//CHECK(cudaGetLastError());
CHECK(cudaMemcpy(h_A, d_A, nByte, cudaMemcpyDeviceToHost));
CHECK(cudaFree(d_A));
CHECK(cudaFree(d_B));
CHECK(cudaFree(d_t));
free(h_A);
free(h_B);
free(h_t);
//cudaDeviceReset();
} | code for sm_80
Function : _Z8p_kernelPfPiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ; /* 0x00000004ff0d7424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IADD3 R1, R1, -0x10, RZ ; /* 0xfffffff001017810 */
/* 0x000fe20007ffe0ff */
/*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc800078e0203 */
/*0070*/ IMAD.WIDE R4, R0, R13, c[0x0][0x170] ; /* 0x00005c0000047625 */
/* 0x000fca00078e020d */
/*0080*/ LDG.E R2, [R4.64] ; /* 0x0000000404027981 */
/* 0x000ea4000c1e1900 */
/*0090*/ IMAD.WIDE R2, R2, R13, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x004fca00078e020d */
/*00a0*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea4000c1e1900 */
/*00b0*/ IMAD.WIDE R8, R8, R13, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x004fca00078e020d */
/*00c0*/ LDG.E R11, [R8.64] ; /* 0x00000004080b7981 */
/* 0x000ea4000c1e1900 */
/*00d0*/ FMUL R11, R11, 5 ; /* 0x40a000000b0b7820 */
/* 0x004fca0000400000 */
/*00e0*/ STG.E [R8.64], R11 ; /* 0x0000000b08007986 */
/* 0x0001e8000c101904 */
/*00f0*/ LDG.E R12, [R2.64] ; /* 0x00000004020c7981 */
/* 0x000ea2000c1e1900 */
/*0100*/ MOV R10, 0x0 ; /* 0x00000000000a7802 */
/* 0x000fe20000000f00 */
/*0110*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0120*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe20007f1e0ff */
/*0130*/ STL [R1], R0 ; /* 0x0000000001007387 */
/* 0x0001e20000100800 */
/*0140*/ LDC.64 R14, c[0x4][R10] ; /* 0x010000000a0e7b82 */
/* 0x0000620000000a00 */
/*0150*/ MOV R4, c[0x4][0x8] ; /* 0x0100020000047a02 */
/* 0x000fc40000000f00 */
/*0160*/ IADD3.X R7, RZ, c[0x0][0x24], RZ, P0, !PT ; /* 0x00000900ff077a10 */
/* 0x000fe200007fe4ff */
/*0170*/ IMAD.WIDE R12, R12, R13, c[0x0][0x160] ; /* 0x000058000c0c7625 */
/* 0x004fca00078e020d */
/*0180*/ STL.64 [R1+0x8], R12 ; /* 0x0000080c01007387 */
/* 0x0001e40000100a00 */
/*0190*/ LEPC R2 ; /* 0x000000000002734e */
/* 0x002fe40000000000 */
/*01a0*/ MOV R9, 0x210 ; /* 0x0000021000097802 */
/* 0x001fe40000000f00 */
/*01b0*/ MOV R20, 0x190 ; /* 0x0000019000147802 */
/* 0x000fe40000000f00 */
/*01c0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*01d0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*01e0*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */
/* 0x000fc8000791e102 */
/*01f0*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2503 */
/*0200*/ CALL.ABS.NOINC R14 ; /* 0x000000000e007343 */
/* 0x000fea0003c00000 */
/*0210*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0220*/ BRA 0x220; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0280*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z6kernelPfPiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE R2, R2, R7, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fcc00078e0207 */
/*0070*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea4000c1e1900 */
/*0080*/ IMAD.WIDE R4, R2, R7, c[0x0][0x168] ; /* 0x00005a0002047625 */
/* 0x004fcc00078e0207 */
/*0090*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea4000c1e1900 */
/*00a0*/ IMAD.WIDE R6, R4, R7, c[0x0][0x160] ; /* 0x0000580004067625 */
/* 0x004fca00078e0207 */
/*00b0*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */
/* 0x000ea4000c1e1900 */
/*00c0*/ FMUL R9, R0, 5 ; /* 0x40a0000000097820 */
/* 0x004fca0000400000 */
/*00d0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <fstream>
#include <iostream>
#include <stdlib.h>
using namespace std;
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
printf("Error: %s:%d ", __FILE__, __LINE__); \
printf("code:%d, reason:%s\n", error, \
cudaGetErrorString(error)); \
exit(1); \
} \
}
__global__ void kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
//if (B[ntid] != tid) printf("%d, %d\n", B[ntid], T[tid]);
A[B[ntid]] *= 5.0;
}
__global__ void p_kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
A[B[ntid]] *= 5.0;
printf("%d,%lld\n", tid, &A[B[ntid]]);
}
#define WARP 32
#define THREAD 1024
int main(int argc, char **argv)
{
CHECK(cudaSetDevice(0));
int mode = atoi(argv[1]);
int *h_t = (int *)malloc(THREAD * sizeof(int));
ifstream ifs(argv[2]);
string str;
// skip header line
//getline(ifs, str);
for (int i = 0; i < THREAD; ++i) {
getline(ifs, str);
h_t[i] = atoi(str.c_str());
//cout << h_t[i] << endl;
}
int nElm = THREAD;
size_t nByte = nElm*sizeof(float);
float *h_A;
int *h_B;
h_A = (float *)malloc(nByte);
h_B = (int *)malloc(nElm * sizeof(int));
//for(int i = 0; i < THREAD; ++i)
// h_B[i] = i;
//srand(1234);
//for(int i = 0; i < 512; ++i) {
// int j = rand()%512;
// int t = h_B[i];
// h_B[i] = h_B[j];
// h_B[j] = t;
//}
for (int i = 0; i < 32; ++i) {
for (int j = 0; j < 16; ++j) {
h_B[i*32+j] = i + j*64;
h_B[i*32+j+16] = i+32 + j*64;
}
}
float *d_A;
int *d_B;
int *d_t;
CHECK(cudaMalloc((float **)&d_A, nByte));
CHECK(cudaMalloc((int **)&d_B, nByte));
CHECK(cudaMalloc((int **)&d_t, nByte));
CHECK(cudaMemcpy(d_A, h_A, nByte, cudaMemcpyHostToDevice));
CHECK(cudaMemcpy(d_B, h_B, nByte, cudaMemcpyHostToDevice));
CHECK(cudaMemcpy(d_t, h_t, nByte, cudaMemcpyHostToDevice));
int iLen = THREAD;
dim3 block(iLen);
dim3 grid( (nElm + block.x - 1) / block.x);
//for (int i = 0; i < 10000; ++i)
if (mode == 0)
kernel<<<grid, block>>>(d_A, d_B, d_t);
else if (mode == 1)
p_kernel<<<grid, block>>>(d_A, d_B, d_t);
//CHECK(cudaGetLastError());
CHECK(cudaMemcpy(h_A, d_A, nByte, cudaMemcpyDeviceToHost));
CHECK(cudaFree(d_A));
CHECK(cudaFree(d_B));
CHECK(cudaFree(d_t));
free(h_A);
free(h_B);
free(h_t);
//cudaDeviceReset();
} | .file "tmpxft_001202c3_00000000-6_test.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3804:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3804:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
.type _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_, @function
_Z30__device_stub__Z6kernelPfPiS0_PfPiS0_:
.LFB3826:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6kernelPfPiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3826:
.size _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_, .-_Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
.globl _Z6kernelPfPiS0_
.type _Z6kernelPfPiS0_, @function
_Z6kernelPfPiS0_:
.LFB3827:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3827:
.size _Z6kernelPfPiS0_, .-_Z6kernelPfPiS0_
.globl _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
.type _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_, @function
_Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_:
.LFB3828:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z8p_kernelPfPiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3828:
.size _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_, .-_Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
.globl _Z8p_kernelPfPiS0_
.type _Z8p_kernelPfPiS0_, @function
_Z8p_kernelPfPiS0_:
.LFB3829:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3829:
.size _Z8p_kernelPfPiS0_, .-_Z8p_kernelPfPiS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8p_kernelPfPiS0_"
.LC1:
.string "_Z6kernelPfPiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3831:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8p_kernelPfPiS0_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z6kernelPfPiS0_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3831:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/Wanwannodao/my_repo/master/a3c/test.cu"
.section .rodata.str1.1
.LC3:
.string "Error: %s:%d "
.LC4:
.string "code:%d, reason:%s\n"
.text
.globl main
.type main, @function
main:
.LFB3800:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA3800
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $616, %rsp
.cfi_def_cfa_offset 672
movq %rsi, %rbp
movq %fs:40, %rax
movq %rax, 600(%rsp)
xorl %eax, %eax
movl $0, %edi
.LEHB0:
call cudaSetDevice@PLT
testl %eax, %eax
jne .L51
movq 8(%rbp), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r13
movl $4096, %edi
call malloc@PLT
movq %rax, %rbx
movq 16(%rbp), %rsi
leaq 80(%rsp), %rdi
movl $8, %edx
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
leaq 64(%rsp), %rax
movq %rax, 48(%rsp)
movq $0, 56(%rsp)
movb $0, 64(%rsp)
movq %rbx, %rbp
leaq 4096(%rbx), %r12
leaq 48(%rsp), %r14
jmp .L27
.L51:
movl %eax, %ebx
movl $49, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.LEHE0:
movl $1, %edi
call exit@PLT
.L54:
movq 600(%rsp), %rax
subq %fs:40, %rax
jne .L52
.LEHB1:
call _ZSt16__throw_bad_castv@PLT
.L46:
endbr64
movq %rax, %rbx
leaq 48(%rsp), %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
leaq 80(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
movq 600(%rsp), %rax
subq %fs:40, %rax
je .L44
call __stack_chk_fail@PLT
.L52:
call __stack_chk_fail@PLT
.L25:
movq %r15, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r15), %rax
movl $10, %esi
movq %r15, %rdi
call *48(%rax)
movl %eax, %edx
jmp .L26
.L55:
movl $10, %edx
movl $0, %esi
movq 48(%rsp), %rdi
call __isoc23_strtol@PLT
movl %eax, 0(%rbp)
addq $4, %rbp
cmpq %r12, %rbp
je .L53
.L27:
movq 80(%rsp), %rax
movq -24(%rax), %rax
movq 320(%rsp,%rax), %r15
testq %r15, %r15
je .L54
cmpb $0, 56(%r15)
je .L25
movzbl 67(%r15), %edx
.L26:
movsbl %dl, %edx
leaq 80(%rsp), %rdi
movq %r14, %rsi
call _ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
jmp .L55
.L53:
movl $4096, %edi
call malloc@PLT
movq %rax, %r12
movl $4096, %edi
call malloc@PLT
movq %rax, %rbp
movq %rax, %r8
movl $1024, %esi
movl $0, %edi
jmp .L28
.L56:
addl $1, %edi
subq $-128, %r8
addl $1, %esi
cmpl $32, %edi
je .L30
.L28:
movl %edi, %eax
movq %r8, %rdx
.L29:
movl %eax, (%rdx)
leal 32(%rax), %ecx
movl %ecx, 64(%rdx)
addl $64, %eax
addq $4, %rdx
cmpl %esi, %eax
jne .L29
jmp .L56
.L30:
movq %rsp, %rdi
movl $4096, %esi
call cudaMalloc@PLT
movl %eax, %r14d
testl %eax, %eax
jne .L57
leaq 8(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
jmp .L58
.L57:
movl $93, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L58:
movl %eax, %r14d
testl %eax, %eax
jne .L59
leaq 16(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
jmp .L60
.L59:
movl $94, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L60:
movl %eax, %r14d
testl %eax, %eax
jne .L61
movl $1, %ecx
movl $4096, %edx
movq %r12, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
jmp .L62
.L61:
movl $95, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L62:
movl %eax, %r14d
testl %eax, %eax
jne .L63
movl $1, %ecx
movl $4096, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
jmp .L64
.L63:
movl $97, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L64:
movl %eax, %r14d
testl %eax, %eax
jne .L65
movl $1, %ecx
movl $4096, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
jmp .L66
.L65:
movl $98, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L66:
movl %eax, %r14d
testl %eax, %eax
jne .L67
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
testl %r13d, %r13d
je .L68
cmpl $1, %r13d
je .L69
.L38:
movl $2, %ecx
movl $4096, %edx
movq (%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
jmp .L70
.L67:
movl $99, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L68:
movl $1024, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L38
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
jmp .L38
.L69:
movl $1024, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L38
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
jmp .L38
.L70:
movl %eax, %r13d
testl %eax, %eax
jne .L71
movq (%rsp), %rdi
call cudaFree@PLT
jmp .L72
.L71:
movl $114, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L72:
movl %eax, %r13d
testl %eax, %eax
jne .L73
movq 8(%rsp), %rdi
call cudaFree@PLT
jmp .L74
.L73:
movl $116, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L74:
movl %eax, %r13d
testl %eax, %eax
jne .L75
movq 16(%rsp), %rdi
call cudaFree@PLT
jmp .L76
.L75:
movl $117, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L76:
movl %eax, %r13d
testl %eax, %eax
jne .L77
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
leaq 48(%rsp), %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
leaq 80(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
movq 600(%rsp), %rax
subq %fs:40, %rax
jne .L78
movl $0, %eax
addq $616, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L77:
.cfi_restore_state
movl $118, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.LEHE1:
movl $1, %edi
call exit@PLT
.L44:
movq %rbx, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L78:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3800:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA3800:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE3800-.LLSDACSB3800
.LLSDACSB3800:
.uleb128 .LEHB0-.LFB3800
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB3800
.uleb128 .LEHE1-.LEHB1
.uleb128 .L46-.LFB3800
.uleb128 0
.uleb128 .LEHB2-.LFB3800
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE3800:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <fstream>
#include <iostream>
#include <stdlib.h>
using namespace std;
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
printf("Error: %s:%d ", __FILE__, __LINE__); \
printf("code:%d, reason:%s\n", error, \
cudaGetErrorString(error)); \
exit(1); \
} \
}
__global__ void kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
//if (B[ntid] != tid) printf("%d, %d\n", B[ntid], T[tid]);
A[B[ntid]] *= 5.0;
}
__global__ void p_kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
A[B[ntid]] *= 5.0;
printf("%d,%lld\n", tid, &A[B[ntid]]);
}
#define WARP 32
#define THREAD 1024
int main(int argc, char **argv)
{
CHECK(cudaSetDevice(0));
int mode = atoi(argv[1]);
int *h_t = (int *)malloc(THREAD * sizeof(int));
ifstream ifs(argv[2]);
string str;
// skip header line
//getline(ifs, str);
for (int i = 0; i < THREAD; ++i) {
getline(ifs, str);
h_t[i] = atoi(str.c_str());
//cout << h_t[i] << endl;
}
int nElm = THREAD;
size_t nByte = nElm*sizeof(float);
float *h_A;
int *h_B;
h_A = (float *)malloc(nByte);
h_B = (int *)malloc(nElm * sizeof(int));
//for(int i = 0; i < THREAD; ++i)
// h_B[i] = i;
//srand(1234);
//for(int i = 0; i < 512; ++i) {
// int j = rand()%512;
// int t = h_B[i];
// h_B[i] = h_B[j];
// h_B[j] = t;
//}
for (int i = 0; i < 32; ++i) {
for (int j = 0; j < 16; ++j) {
h_B[i*32+j] = i + j*64;
h_B[i*32+j+16] = i+32 + j*64;
}
}
float *d_A;
int *d_B;
int *d_t;
CHECK(cudaMalloc((float **)&d_A, nByte));
CHECK(cudaMalloc((int **)&d_B, nByte));
CHECK(cudaMalloc((int **)&d_t, nByte));
CHECK(cudaMemcpy(d_A, h_A, nByte, cudaMemcpyHostToDevice));
CHECK(cudaMemcpy(d_B, h_B, nByte, cudaMemcpyHostToDevice));
CHECK(cudaMemcpy(d_t, h_t, nByte, cudaMemcpyHostToDevice));
int iLen = THREAD;
dim3 block(iLen);
dim3 grid( (nElm + block.x - 1) / block.x);
//for (int i = 0; i < 10000; ++i)
if (mode == 0)
kernel<<<grid, block>>>(d_A, d_B, d_t);
else if (mode == 1)
p_kernel<<<grid, block>>>(d_A, d_B, d_t);
//CHECK(cudaGetLastError());
CHECK(cudaMemcpy(h_A, d_A, nByte, cudaMemcpyDeviceToHost));
CHECK(cudaFree(d_A));
CHECK(cudaFree(d_B));
CHECK(cudaFree(d_t));
free(h_A);
free(h_B);
free(h_t);
//cudaDeviceReset();
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <fstream>
#include <iostream>
#include <stdlib.h>
using namespace std;
#define CHECK(call) \
{ \
const hipError_t error = call; \
if (error != hipSuccess) \
{ \
printf("Error: %s:%d ", __FILE__, __LINE__); \
printf("code:%d, reason:%s\n", error, \
hipGetErrorString(error)); \
exit(1); \
} \
}
__global__ void kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
//if (B[ntid] != tid) printf("%d, %d\n", B[ntid], T[tid]);
A[B[ntid]] *= 5.0;
}
__global__ void p_kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
A[B[ntid]] *= 5.0;
printf("%d,%lld\n", tid, &A[B[ntid]]);
}
#define WARP 32
#define THREAD 1024
int main(int argc, char **argv)
{
CHECK(hipSetDevice(0));
int mode = atoi(argv[1]);
int *h_t = (int *)malloc(THREAD * sizeof(int));
ifstream ifs(argv[2]);
string str;
// skip header line
//getline(ifs, str);
for (int i = 0; i < THREAD; ++i) {
getline(ifs, str);
h_t[i] = atoi(str.c_str());
//cout << h_t[i] << endl;
}
int nElm = THREAD;
size_t nByte = nElm*sizeof(float);
float *h_A;
int *h_B;
h_A = (float *)malloc(nByte);
h_B = (int *)malloc(nElm * sizeof(int));
//for(int i = 0; i < THREAD; ++i)
// h_B[i] = i;
//srand(1234);
//for(int i = 0; i < 512; ++i) {
// int j = rand()%512;
// int t = h_B[i];
// h_B[i] = h_B[j];
// h_B[j] = t;
//}
for (int i = 0; i < 32; ++i) {
for (int j = 0; j < 16; ++j) {
h_B[i*32+j] = i + j*64;
h_B[i*32+j+16] = i+32 + j*64;
}
}
float *d_A;
int *d_B;
int *d_t;
CHECK(hipMalloc((float **)&d_A, nByte));
CHECK(hipMalloc((int **)&d_B, nByte));
CHECK(hipMalloc((int **)&d_t, nByte));
CHECK(hipMemcpy(d_A, h_A, nByte, hipMemcpyHostToDevice));
CHECK(hipMemcpy(d_B, h_B, nByte, hipMemcpyHostToDevice));
CHECK(hipMemcpy(d_t, h_t, nByte, hipMemcpyHostToDevice));
int iLen = THREAD;
dim3 block(iLen);
dim3 grid( (nElm + block.x - 1) / block.x);
//for (int i = 0; i < 10000; ++i)
if (mode == 0)
kernel<<<grid, block>>>(d_A, d_B, d_t);
else if (mode == 1)
p_kernel<<<grid, block>>>(d_A, d_B, d_t);
//CHECK(cudaGetLastError());
CHECK(hipMemcpy(h_A, d_A, nByte, hipMemcpyDeviceToHost));
CHECK(hipFree(d_A));
CHECK(hipFree(d_B));
CHECK(hipFree(d_t));
free(h_A);
free(h_B);
free(h_t);
//cudaDeviceReset();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <fstream>
#include <iostream>
#include <stdlib.h>
using namespace std;
#define CHECK(call) \
{ \
const hipError_t error = call; \
if (error != hipSuccess) \
{ \
printf("Error: %s:%d ", __FILE__, __LINE__); \
printf("code:%d, reason:%s\n", error, \
hipGetErrorString(error)); \
exit(1); \
} \
}
__global__ void kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
//if (B[ntid] != tid) printf("%d, %d\n", B[ntid], T[tid]);
A[B[ntid]] *= 5.0;
}
__global__ void p_kernel(float *A, int *B, int *T)
{
const int tid = blockIdx.x*blockDim.x + threadIdx.x;
const int ntid = T[tid];
//printf("%d\n", T[tid]);
A[B[ntid]] *= 5.0;
printf("%d,%lld\n", tid, &A[B[ntid]]);
}
#define WARP 32
#define THREAD 1024
int main(int argc, char **argv)
{
CHECK(hipSetDevice(0));
int mode = atoi(argv[1]);
int *h_t = (int *)malloc(THREAD * sizeof(int));
ifstream ifs(argv[2]);
string str;
// skip header line
//getline(ifs, str);
for (int i = 0; i < THREAD; ++i) {
getline(ifs, str);
h_t[i] = atoi(str.c_str());
//cout << h_t[i] << endl;
}
int nElm = THREAD;
size_t nByte = nElm*sizeof(float);
float *h_A;
int *h_B;
h_A = (float *)malloc(nByte);
h_B = (int *)malloc(nElm * sizeof(int));
//for(int i = 0; i < THREAD; ++i)
// h_B[i] = i;
//srand(1234);
//for(int i = 0; i < 512; ++i) {
// int j = rand()%512;
// int t = h_B[i];
// h_B[i] = h_B[j];
// h_B[j] = t;
//}
for (int i = 0; i < 32; ++i) {
for (int j = 0; j < 16; ++j) {
h_B[i*32+j] = i + j*64;
h_B[i*32+j+16] = i+32 + j*64;
}
}
float *d_A;
int *d_B;
int *d_t;
CHECK(hipMalloc((float **)&d_A, nByte));
CHECK(hipMalloc((int **)&d_B, nByte));
CHECK(hipMalloc((int **)&d_t, nByte));
CHECK(hipMemcpy(d_A, h_A, nByte, hipMemcpyHostToDevice));
CHECK(hipMemcpy(d_B, h_B, nByte, hipMemcpyHostToDevice));
CHECK(hipMemcpy(d_t, h_t, nByte, hipMemcpyHostToDevice));
int iLen = THREAD;
dim3 block(iLen);
dim3 grid( (nElm + block.x - 1) / block.x);
//for (int i = 0; i < 10000; ++i)
if (mode == 0)
kernel<<<grid, block>>>(d_A, d_B, d_t);
else if (mode == 1)
p_kernel<<<grid, block>>>(d_A, d_B, d_t);
//CHECK(cudaGetLastError());
CHECK(hipMemcpy(h_A, d_A, nByte, hipMemcpyDeviceToHost));
CHECK(hipFree(d_A));
CHECK(hipFree(d_B));
CHECK(hipFree(d_t));
free(h_A);
free(h_B);
free(h_t);
//cudaDeviceReset();
} | .text
.file "test.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__kernelPfPiS0_ # -- Begin function _Z21__device_stub__kernelPfPiS0_
.p2align 4, 0x90
.type _Z21__device_stub__kernelPfPiS0_,@function
_Z21__device_stub__kernelPfPiS0_: # @_Z21__device_stub__kernelPfPiS0_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6kernelPfPiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z21__device_stub__kernelPfPiS0_, .Lfunc_end0-_Z21__device_stub__kernelPfPiS0_
.cfi_endproc
# -- End function
.globl _Z23__device_stub__p_kernelPfPiS0_ # -- Begin function _Z23__device_stub__p_kernelPfPiS0_
.p2align 4, 0x90
.type _Z23__device_stub__p_kernelPfPiS0_,@function
_Z23__device_stub__p_kernelPfPiS0_: # @_Z23__device_stub__p_kernelPfPiS0_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z8p_kernelPfPiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z23__device_stub__p_kernelPfPiS0_, .Lfunc_end1-_Z23__device_stub__p_kernelPfPiS0_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $680, %rsp # imm = 0x2A8
.cfi_def_cfa_offset 736
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
.cfi_escape 0x2e, 0x00
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB2_1
# %bb.2:
movq 8(%r14), %rdi
.cfi_escape 0x2e, 0x00
xorl %ebp, %ebp
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
.cfi_escape 0x2e, 0x00
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %rbx
movq 16(%r14), %rsi
.cfi_escape 0x2e, 0x00
leaq 160(%rsp), %r14
movq %r14, %rdi
movl $8, %edx
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
leaq 144(%rsp), %rax
movq %rax, 128(%rsp)
movq $0, 136(%rsp)
movb $0, 144(%rsp)
leaq 128(%rsp), %r15
.p2align 4, 0x90
.LBB2_3: # =>This Inner Loop Header: Depth=1
movq 160(%rsp), %rax
movq -24(%rax), %rax
movq 400(%rsp,%rax), %r13
testq %r13, %r13
je .LBB2_4
# %bb.6: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB2_3 Depth=1
cmpb $0, 56(%r13)
je .LBB2_8
# %bb.7: # in Loop: Header=BB2_3 Depth=1
movzbl 67(%r13), %eax
jmp .LBB2_10
.p2align 4, 0x90
.LBB2_8: # in Loop: Header=BB2_3 Depth=1
.Ltmp0:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
.Ltmp1:
# %bb.9: # %.noexc125
# in Loop: Header=BB2_3 Depth=1
movq (%r13), %rax
.Ltmp2:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
.Ltmp3:
.LBB2_10: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i
# in Loop: Header=BB2_3 Depth=1
.Ltmp4:
.cfi_escape 0x2e, 0x00
movsbl %al, %edx
movq %r14, %rdi
movq %r15, %rsi
callq _ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp5:
# %bb.11: # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
# in Loop: Header=BB2_3 Depth=1
movq 128(%rsp), %rdi
.cfi_escape 0x2e, 0x00
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, (%rbx,%rbp,4)
incq %rbp
cmpq $1024, %rbp # imm = 0x400
jne .LBB2_3
# %bb.12:
.cfi_escape 0x2e, 0x00
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r15
addq $64, %rax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_13: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_14 Depth 2
movq $-16, %rdx
movl %ecx, %esi
.p2align 4, 0x90
.LBB2_14: # Parent Loop BB2_13 Depth=1
# => This Inner Loop Header: Depth=2
movl %esi, (%rax,%rdx,4)
movl %esi, %edi
orl $32, %edi
movl %edi, 64(%rax,%rdx,4)
addl $64, %esi
incq %rdx
jne .LBB2_14
# %bb.15: # in Loop: Header=BB2_13 Depth=1
incq %rcx
subq $-128, %rax
cmpq $32, %rcx
jne .LBB2_13
# %bb.16:
.Ltmp7:
.cfi_escape 0x2e, 0x00
movq %rsp, %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
.Ltmp8:
# %bb.17: # %_ZL9hipMallocIfE10hipError_tPPT_m.exit
testl %eax, %eax
jne .LBB2_18
# %bb.23:
.Ltmp12:
.cfi_escape 0x2e, 0x00
leaq 16(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
.Ltmp13:
# %bb.24: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
testl %eax, %eax
jne .LBB2_25
# %bb.28:
.Ltmp17:
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
.Ltmp18:
# %bb.29: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit131
testl %eax, %eax
jne .LBB2_30
# %bb.33:
movq (%rsp), %rdi
.Ltmp22:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp23:
# %bb.34:
testl %eax, %eax
jne .LBB2_35
# %bb.38:
movq 16(%rsp), %rdi
.Ltmp27:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp28:
# %bb.39:
testl %eax, %eax
jne .LBB2_40
# %bb.43:
movq 8(%rsp), %rdi
.Ltmp32:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp33:
# %bb.44:
testl %eax, %eax
jne .LBB2_45
# %bb.48:
cmpl $1, %r12d
je .LBB2_55
# %bb.49:
testl %r12d, %r12d
jne .LBB2_59
# %bb.50:
.Ltmp43:
.cfi_escape 0x2e, 0x00
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $4294968320, %rdx # imm = 0x100000400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp44:
# %bb.51:
testl %eax, %eax
jne .LBB2_59
# %bb.52:
movq (%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
.Ltmp45:
.cfi_escape 0x2e, 0x00
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp46:
# %bb.53: # %.noexc132
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.Ltmp47:
.cfi_escape 0x2e, 0x10
leaq 96(%rsp), %r9
movl $_Z6kernelPfPiS0_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp48:
jmp .LBB2_59
.LBB2_55:
.Ltmp37:
.cfi_escape 0x2e, 0x00
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $4294968320, %rdx # imm = 0x100000400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp38:
# %bb.56:
testl %eax, %eax
jne .LBB2_59
# %bb.57:
movq (%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
.Ltmp39:
.cfi_escape 0x2e, 0x00
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp40:
# %bb.58: # %.noexc140
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.Ltmp41:
.cfi_escape 0x2e, 0x10
leaq 96(%rsp), %r9
movl $_Z8p_kernelPfPiS0_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp42:
.LBB2_59:
movq (%rsp), %rsi
.Ltmp50:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
.Ltmp51:
# %bb.60:
testl %eax, %eax
jne .LBB2_61
# %bb.64:
movq (%rsp), %rdi
.Ltmp55:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp56:
# %bb.65:
testl %eax, %eax
jne .LBB2_66
# %bb.69:
movq 16(%rsp), %rdi
.Ltmp60:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp61:
# %bb.70:
testl %eax, %eax
jne .LBB2_71
# %bb.74:
movq 8(%rsp), %rdi
.Ltmp65:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp66:
# %bb.75:
testl %eax, %eax
jne .LBB2_76
# %bb.79:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq free
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq free
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq free
movq 128(%rsp), %rdi
leaq 144(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_81
# %bb.80: # %.critedge.i.i
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_81: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
.cfi_escape 0x2e, 0x00
leaq 160(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 416(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq _ZNSt8ios_baseD2Ev
xorl %eax, %eax
addq $680, %rsp # imm = 0x2A8
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_4:
.cfi_def_cfa_offset 736
.Ltmp70:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.Ltmp71:
# %bb.5: # %.noexc
.LBB2_1:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $49, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_18:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $93, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp9:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp10:
# %bb.19:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_25:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $94, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp14:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp15:
# %bb.26:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_30:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $95, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp19:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp20:
# %bb.31:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_35:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $97, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp24:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp25:
# %bb.36:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_40:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $98, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp29:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp30:
# %bb.41:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_45:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $99, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp34:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp35:
# %bb.46:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_61:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $114, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp52:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp53:
# %bb.62:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_66:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $116, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp57:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp58:
# %bb.67:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_71:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $117, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp62:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp63:
# %bb.72:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_76:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $118, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp67:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp68:
# %bb.77:
.cfi_escape 0x2e, 0x00
.LBB2_20:
movl $.L.str.2, %edi
movl %ebx, %esi
movq %rax, %rdx
xorl %eax, %eax
callq printf
.cfi_escape 0x2e, 0x00
movl $1, %edi
callq exit
.LBB2_54:
.Ltmp49:
jmp .LBB2_83
.LBB2_78:
.Ltmp69:
jmp .LBB2_83
.LBB2_73:
.Ltmp64:
jmp .LBB2_83
.LBB2_68:
.Ltmp59:
jmp .LBB2_83
.LBB2_63:
.Ltmp54:
jmp .LBB2_83
.LBB2_47:
.Ltmp36:
jmp .LBB2_83
.LBB2_42:
.Ltmp31:
jmp .LBB2_83
.LBB2_37:
.Ltmp26:
jmp .LBB2_83
.LBB2_32:
.Ltmp21:
jmp .LBB2_83
.LBB2_27:
.Ltmp16:
jmp .LBB2_83
.LBB2_82:
.Ltmp11:
jmp .LBB2_83
.LBB2_22: # %.loopexit.split-lp
.Ltmp72:
jmp .LBB2_83
.LBB2_21: # %.loopexit
.Ltmp6:
.LBB2_83:
movq %rax, %rbx
movq 128(%rsp), %rdi
leaq 144(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_85
# %bb.84: # %.critedge.i.i142
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_85: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit144
.cfi_escape 0x2e, 0x00
leaq 160(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 416(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq _ZNSt8ios_baseD2Ev
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table2:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp5-.Ltmp0 # Call between .Ltmp0 and .Ltmp5
.uleb128 .Ltmp6-.Lfunc_begin0 # jumps to .Ltmp6
.byte 0 # On action: cleanup
.uleb128 .Ltmp7-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp8-.Ltmp7 # Call between .Ltmp7 and .Ltmp8
.uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11
.byte 0 # On action: cleanup
.uleb128 .Ltmp12-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp13-.Ltmp12 # Call between .Ltmp12 and .Ltmp13
.uleb128 .Ltmp16-.Lfunc_begin0 # jumps to .Ltmp16
.byte 0 # On action: cleanup
.uleb128 .Ltmp17-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp18-.Ltmp17 # Call between .Ltmp17 and .Ltmp18
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp22-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Ltmp23-.Ltmp22 # Call between .Ltmp22 and .Ltmp23
.uleb128 .Ltmp26-.Lfunc_begin0 # jumps to .Ltmp26
.byte 0 # On action: cleanup
.uleb128 .Ltmp27-.Lfunc_begin0 # >> Call Site 7 <<
.uleb128 .Ltmp28-.Ltmp27 # Call between .Ltmp27 and .Ltmp28
.uleb128 .Ltmp31-.Lfunc_begin0 # jumps to .Ltmp31
.byte 0 # On action: cleanup
.uleb128 .Ltmp32-.Lfunc_begin0 # >> Call Site 8 <<
.uleb128 .Ltmp33-.Ltmp32 # Call between .Ltmp32 and .Ltmp33
.uleb128 .Ltmp36-.Lfunc_begin0 # jumps to .Ltmp36
.byte 0 # On action: cleanup
.uleb128 .Ltmp43-.Lfunc_begin0 # >> Call Site 9 <<
.uleb128 .Ltmp42-.Ltmp43 # Call between .Ltmp43 and .Ltmp42
.uleb128 .Ltmp49-.Lfunc_begin0 # jumps to .Ltmp49
.byte 0 # On action: cleanup
.uleb128 .Ltmp50-.Lfunc_begin0 # >> Call Site 10 <<
.uleb128 .Ltmp51-.Ltmp50 # Call between .Ltmp50 and .Ltmp51
.uleb128 .Ltmp54-.Lfunc_begin0 # jumps to .Ltmp54
.byte 0 # On action: cleanup
.uleb128 .Ltmp55-.Lfunc_begin0 # >> Call Site 11 <<
.uleb128 .Ltmp56-.Ltmp55 # Call between .Ltmp55 and .Ltmp56
.uleb128 .Ltmp59-.Lfunc_begin0 # jumps to .Ltmp59
.byte 0 # On action: cleanup
.uleb128 .Ltmp60-.Lfunc_begin0 # >> Call Site 12 <<
.uleb128 .Ltmp61-.Ltmp60 # Call between .Ltmp60 and .Ltmp61
.uleb128 .Ltmp64-.Lfunc_begin0 # jumps to .Ltmp64
.byte 0 # On action: cleanup
.uleb128 .Ltmp65-.Lfunc_begin0 # >> Call Site 13 <<
.uleb128 .Ltmp66-.Ltmp65 # Call between .Ltmp65 and .Ltmp66
.uleb128 .Ltmp69-.Lfunc_begin0 # jumps to .Ltmp69
.byte 0 # On action: cleanup
.uleb128 .Ltmp70-.Lfunc_begin0 # >> Call Site 14 <<
.uleb128 .Ltmp71-.Ltmp70 # Call between .Ltmp70 and .Ltmp71
.uleb128 .Ltmp72-.Lfunc_begin0 # jumps to .Ltmp72
.byte 0 # On action: cleanup
.uleb128 .Ltmp71-.Lfunc_begin0 # >> Call Site 15 <<
.uleb128 .Ltmp9-.Ltmp71 # Call between .Ltmp71 and .Ltmp9
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp9-.Lfunc_begin0 # >> Call Site 16 <<
.uleb128 .Ltmp10-.Ltmp9 # Call between .Ltmp9 and .Ltmp10
.uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11
.byte 0 # On action: cleanup
.uleb128 .Ltmp14-.Lfunc_begin0 # >> Call Site 17 <<
.uleb128 .Ltmp15-.Ltmp14 # Call between .Ltmp14 and .Ltmp15
.uleb128 .Ltmp16-.Lfunc_begin0 # jumps to .Ltmp16
.byte 0 # On action: cleanup
.uleb128 .Ltmp19-.Lfunc_begin0 # >> Call Site 18 <<
.uleb128 .Ltmp20-.Ltmp19 # Call between .Ltmp19 and .Ltmp20
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 19 <<
.uleb128 .Ltmp25-.Ltmp24 # Call between .Ltmp24 and .Ltmp25
.uleb128 .Ltmp26-.Lfunc_begin0 # jumps to .Ltmp26
.byte 0 # On action: cleanup
.uleb128 .Ltmp29-.Lfunc_begin0 # >> Call Site 20 <<
.uleb128 .Ltmp30-.Ltmp29 # Call between .Ltmp29 and .Ltmp30
.uleb128 .Ltmp31-.Lfunc_begin0 # jumps to .Ltmp31
.byte 0 # On action: cleanup
.uleb128 .Ltmp34-.Lfunc_begin0 # >> Call Site 21 <<
.uleb128 .Ltmp35-.Ltmp34 # Call between .Ltmp34 and .Ltmp35
.uleb128 .Ltmp36-.Lfunc_begin0 # jumps to .Ltmp36
.byte 0 # On action: cleanup
.uleb128 .Ltmp52-.Lfunc_begin0 # >> Call Site 22 <<
.uleb128 .Ltmp53-.Ltmp52 # Call between .Ltmp52 and .Ltmp53
.uleb128 .Ltmp54-.Lfunc_begin0 # jumps to .Ltmp54
.byte 0 # On action: cleanup
.uleb128 .Ltmp57-.Lfunc_begin0 # >> Call Site 23 <<
.uleb128 .Ltmp58-.Ltmp57 # Call between .Ltmp57 and .Ltmp58
.uleb128 .Ltmp59-.Lfunc_begin0 # jumps to .Ltmp59
.byte 0 # On action: cleanup
.uleb128 .Ltmp62-.Lfunc_begin0 # >> Call Site 24 <<
.uleb128 .Ltmp63-.Ltmp62 # Call between .Ltmp62 and .Ltmp63
.uleb128 .Ltmp64-.Lfunc_begin0 # jumps to .Ltmp64
.byte 0 # On action: cleanup
.uleb128 .Ltmp67-.Lfunc_begin0 # >> Call Site 25 <<
.uleb128 .Ltmp68-.Ltmp67 # Call between .Ltmp67 and .Ltmp68
.uleb128 .Ltmp69-.Lfunc_begin0 # jumps to .Ltmp69
.byte 0 # On action: cleanup
.uleb128 .Ltmp68-.Lfunc_begin0 # >> Call Site 26 <<
.uleb128 .Lfunc_end2-.Ltmp68 # Call between .Ltmp68 and .Lfunc_end2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6kernelPfPiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8p_kernelPfPiS0_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6kernelPfPiS0_,@object # @_Z6kernelPfPiS0_
.section .rodata,"a",@progbits
.globl _Z6kernelPfPiS0_
.p2align 3, 0x0
_Z6kernelPfPiS0_:
.quad _Z21__device_stub__kernelPfPiS0_
.size _Z6kernelPfPiS0_, 8
.type _Z8p_kernelPfPiS0_,@object # @_Z8p_kernelPfPiS0_
.globl _Z8p_kernelPfPiS0_
.p2align 3, 0x0
_Z8p_kernelPfPiS0_:
.quad _Z23__device_stub__p_kernelPfPiS0_
.size _Z8p_kernelPfPiS0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Error: %s:%d "
.size .L.str, 14
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/Wanwannodao/my_repo/master/a3c/test.hip"
.size .L.str.1, 97
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "code:%d, reason:%s\n"
.size .L.str.2, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6kernelPfPiS0_"
.size .L__unnamed_1, 17
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z8p_kernelPfPiS0_"
.size .L__unnamed_2, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__kernelPfPiS0_
.addrsig_sym _Z23__device_stub__p_kernelPfPiS0_
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z6kernelPfPiS0_
.addrsig_sym _Z8p_kernelPfPiS0_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001202c3_00000000-6_test.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3804:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3804:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
.type _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_, @function
_Z30__device_stub__Z6kernelPfPiS0_PfPiS0_:
.LFB3826:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6kernelPfPiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3826:
.size _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_, .-_Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
.globl _Z6kernelPfPiS0_
.type _Z6kernelPfPiS0_, @function
_Z6kernelPfPiS0_:
.LFB3827:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3827:
.size _Z6kernelPfPiS0_, .-_Z6kernelPfPiS0_
.globl _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
.type _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_, @function
_Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_:
.LFB3828:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z8p_kernelPfPiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3828:
.size _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_, .-_Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
.globl _Z8p_kernelPfPiS0_
.type _Z8p_kernelPfPiS0_, @function
_Z8p_kernelPfPiS0_:
.LFB3829:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3829:
.size _Z8p_kernelPfPiS0_, .-_Z8p_kernelPfPiS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8p_kernelPfPiS0_"
.LC1:
.string "_Z6kernelPfPiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3831:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8p_kernelPfPiS0_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z6kernelPfPiS0_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3831:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/Wanwannodao/my_repo/master/a3c/test.cu"
.section .rodata.str1.1
.LC3:
.string "Error: %s:%d "
.LC4:
.string "code:%d, reason:%s\n"
.text
.globl main
.type main, @function
main:
.LFB3800:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA3800
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $616, %rsp
.cfi_def_cfa_offset 672
movq %rsi, %rbp
movq %fs:40, %rax
movq %rax, 600(%rsp)
xorl %eax, %eax
movl $0, %edi
.LEHB0:
call cudaSetDevice@PLT
testl %eax, %eax
jne .L51
movq 8(%rbp), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r13
movl $4096, %edi
call malloc@PLT
movq %rax, %rbx
movq 16(%rbp), %rsi
leaq 80(%rsp), %rdi
movl $8, %edx
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
leaq 64(%rsp), %rax
movq %rax, 48(%rsp)
movq $0, 56(%rsp)
movb $0, 64(%rsp)
movq %rbx, %rbp
leaq 4096(%rbx), %r12
leaq 48(%rsp), %r14
jmp .L27
.L51:
movl %eax, %ebx
movl $49, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %ebx, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.LEHE0:
movl $1, %edi
call exit@PLT
.L54:
movq 600(%rsp), %rax
subq %fs:40, %rax
jne .L52
.LEHB1:
call _ZSt16__throw_bad_castv@PLT
.L46:
endbr64
movq %rax, %rbx
leaq 48(%rsp), %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
leaq 80(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
movq 600(%rsp), %rax
subq %fs:40, %rax
je .L44
call __stack_chk_fail@PLT
.L52:
call __stack_chk_fail@PLT
.L25:
movq %r15, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r15), %rax
movl $10, %esi
movq %r15, %rdi
call *48(%rax)
movl %eax, %edx
jmp .L26
.L55:
movl $10, %edx
movl $0, %esi
movq 48(%rsp), %rdi
call __isoc23_strtol@PLT
movl %eax, 0(%rbp)
addq $4, %rbp
cmpq %r12, %rbp
je .L53
.L27:
movq 80(%rsp), %rax
movq -24(%rax), %rax
movq 320(%rsp,%rax), %r15
testq %r15, %r15
je .L54
cmpb $0, 56(%r15)
je .L25
movzbl 67(%r15), %edx
.L26:
movsbl %dl, %edx
leaq 80(%rsp), %rdi
movq %r14, %rsi
call _ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
jmp .L55
.L53:
movl $4096, %edi
call malloc@PLT
movq %rax, %r12
movl $4096, %edi
call malloc@PLT
movq %rax, %rbp
movq %rax, %r8
movl $1024, %esi
movl $0, %edi
jmp .L28
.L56:
addl $1, %edi
subq $-128, %r8
addl $1, %esi
cmpl $32, %edi
je .L30
.L28:
movl %edi, %eax
movq %r8, %rdx
.L29:
movl %eax, (%rdx)
leal 32(%rax), %ecx
movl %ecx, 64(%rdx)
addl $64, %eax
addq $4, %rdx
cmpl %esi, %eax
jne .L29
jmp .L56
.L30:
movq %rsp, %rdi
movl $4096, %esi
call cudaMalloc@PLT
movl %eax, %r14d
testl %eax, %eax
jne .L57
leaq 8(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
jmp .L58
.L57:
movl $93, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L58:
movl %eax, %r14d
testl %eax, %eax
jne .L59
leaq 16(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
jmp .L60
.L59:
movl $94, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L60:
movl %eax, %r14d
testl %eax, %eax
jne .L61
movl $1, %ecx
movl $4096, %edx
movq %r12, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
jmp .L62
.L61:
movl $95, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L62:
movl %eax, %r14d
testl %eax, %eax
jne .L63
movl $1, %ecx
movl $4096, %edx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
jmp .L64
.L63:
movl $97, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L64:
movl %eax, %r14d
testl %eax, %eax
jne .L65
movl $1, %ecx
movl $4096, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
jmp .L66
.L65:
movl $98, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L66:
movl %eax, %r14d
testl %eax, %eax
jne .L67
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
testl %r13d, %r13d
je .L68
cmpl $1, %r13d
je .L69
.L38:
movl $2, %ecx
movl $4096, %edx
movq (%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
jmp .L70
.L67:
movl $99, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r14d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L68:
movl $1024, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L38
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z30__device_stub__Z6kernelPfPiS0_PfPiS0_
jmp .L38
.L69:
movl $1024, 24(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L38
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z32__device_stub__Z8p_kernelPfPiS0_PfPiS0_
jmp .L38
.L70:
movl %eax, %r13d
testl %eax, %eax
jne .L71
movq (%rsp), %rdi
call cudaFree@PLT
jmp .L72
.L71:
movl $114, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L72:
movl %eax, %r13d
testl %eax, %eax
jne .L73
movq 8(%rsp), %rdi
call cudaFree@PLT
jmp .L74
.L73:
movl $116, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L74:
movl %eax, %r13d
testl %eax, %eax
jne .L75
movq 16(%rsp), %rdi
call cudaFree@PLT
jmp .L76
.L75:
movl $117, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L76:
movl %eax, %r13d
testl %eax, %eax
jne .L77
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
leaq 48(%rsp), %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
leaq 80(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
movq 600(%rsp), %rax
subq %fs:40, %rax
jne .L78
movl $0, %eax
addq $616, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L77:
.cfi_restore_state
movl $118, %ecx
leaq .LC2(%rip), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r13d, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r13d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.LEHE1:
movl $1, %edi
call exit@PLT
.L44:
movq %rbx, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L78:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3800:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA3800:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE3800-.LLSDACSB3800
.LLSDACSB3800:
.uleb128 .LEHB0-.LFB3800
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB3800
.uleb128 .LEHE1-.LEHB1
.uleb128 .L46-.LFB3800
.uleb128 0
.uleb128 .LEHB2-.LFB3800
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE3800:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "test.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__kernelPfPiS0_ # -- Begin function _Z21__device_stub__kernelPfPiS0_
.p2align 4, 0x90
.type _Z21__device_stub__kernelPfPiS0_,@function
_Z21__device_stub__kernelPfPiS0_: # @_Z21__device_stub__kernelPfPiS0_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6kernelPfPiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z21__device_stub__kernelPfPiS0_, .Lfunc_end0-_Z21__device_stub__kernelPfPiS0_
.cfi_endproc
# -- End function
.globl _Z23__device_stub__p_kernelPfPiS0_ # -- Begin function _Z23__device_stub__p_kernelPfPiS0_
.p2align 4, 0x90
.type _Z23__device_stub__p_kernelPfPiS0_,@function
_Z23__device_stub__p_kernelPfPiS0_: # @_Z23__device_stub__p_kernelPfPiS0_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z8p_kernelPfPiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z23__device_stub__p_kernelPfPiS0_, .Lfunc_end1-_Z23__device_stub__p_kernelPfPiS0_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $680, %rsp # imm = 0x2A8
.cfi_def_cfa_offset 736
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
.cfi_escape 0x2e, 0x00
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB2_1
# %bb.2:
movq 8(%r14), %rdi
.cfi_escape 0x2e, 0x00
xorl %ebp, %ebp
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
.cfi_escape 0x2e, 0x00
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %rbx
movq 16(%r14), %rsi
.cfi_escape 0x2e, 0x00
leaq 160(%rsp), %r14
movq %r14, %rdi
movl $8, %edx
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
leaq 144(%rsp), %rax
movq %rax, 128(%rsp)
movq $0, 136(%rsp)
movb $0, 144(%rsp)
leaq 128(%rsp), %r15
.p2align 4, 0x90
.LBB2_3: # =>This Inner Loop Header: Depth=1
movq 160(%rsp), %rax
movq -24(%rax), %rax
movq 400(%rsp,%rax), %r13
testq %r13, %r13
je .LBB2_4
# %bb.6: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB2_3 Depth=1
cmpb $0, 56(%r13)
je .LBB2_8
# %bb.7: # in Loop: Header=BB2_3 Depth=1
movzbl 67(%r13), %eax
jmp .LBB2_10
.p2align 4, 0x90
.LBB2_8: # in Loop: Header=BB2_3 Depth=1
.Ltmp0:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
.Ltmp1:
# %bb.9: # %.noexc125
# in Loop: Header=BB2_3 Depth=1
movq (%r13), %rax
.Ltmp2:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
.Ltmp3:
.LBB2_10: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i
# in Loop: Header=BB2_3 Depth=1
.Ltmp4:
.cfi_escape 0x2e, 0x00
movsbl %al, %edx
movq %r14, %rdi
movq %r15, %rsi
callq _ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp5:
# %bb.11: # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
# in Loop: Header=BB2_3 Depth=1
movq 128(%rsp), %rdi
.cfi_escape 0x2e, 0x00
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, (%rbx,%rbp,4)
incq %rbp
cmpq $1024, %rbp # imm = 0x400
jne .LBB2_3
# %bb.12:
.cfi_escape 0x2e, 0x00
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r14
.cfi_escape 0x2e, 0x00
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r15
addq $64, %rax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_13: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_14 Depth 2
movq $-16, %rdx
movl %ecx, %esi
.p2align 4, 0x90
.LBB2_14: # Parent Loop BB2_13 Depth=1
# => This Inner Loop Header: Depth=2
movl %esi, (%rax,%rdx,4)
movl %esi, %edi
orl $32, %edi
movl %edi, 64(%rax,%rdx,4)
addl $64, %esi
incq %rdx
jne .LBB2_14
# %bb.15: # in Loop: Header=BB2_13 Depth=1
incq %rcx
subq $-128, %rax
cmpq $32, %rcx
jne .LBB2_13
# %bb.16:
.Ltmp7:
.cfi_escape 0x2e, 0x00
movq %rsp, %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
.Ltmp8:
# %bb.17: # %_ZL9hipMallocIfE10hipError_tPPT_m.exit
testl %eax, %eax
jne .LBB2_18
# %bb.23:
.Ltmp12:
.cfi_escape 0x2e, 0x00
leaq 16(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
.Ltmp13:
# %bb.24: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
testl %eax, %eax
jne .LBB2_25
# %bb.28:
.Ltmp17:
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
.Ltmp18:
# %bb.29: # %_ZL9hipMallocIiE10hipError_tPPT_m.exit131
testl %eax, %eax
jne .LBB2_30
# %bb.33:
movq (%rsp), %rdi
.Ltmp22:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp23:
# %bb.34:
testl %eax, %eax
jne .LBB2_35
# %bb.38:
movq 16(%rsp), %rdi
.Ltmp27:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp28:
# %bb.39:
testl %eax, %eax
jne .LBB2_40
# %bb.43:
movq 8(%rsp), %rdi
.Ltmp32:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.Ltmp33:
# %bb.44:
testl %eax, %eax
jne .LBB2_45
# %bb.48:
cmpl $1, %r12d
je .LBB2_55
# %bb.49:
testl %r12d, %r12d
jne .LBB2_59
# %bb.50:
.Ltmp43:
.cfi_escape 0x2e, 0x00
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $4294968320, %rdx # imm = 0x100000400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp44:
# %bb.51:
testl %eax, %eax
jne .LBB2_59
# %bb.52:
movq (%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
.Ltmp45:
.cfi_escape 0x2e, 0x00
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp46:
# %bb.53: # %.noexc132
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.Ltmp47:
.cfi_escape 0x2e, 0x10
leaq 96(%rsp), %r9
movl $_Z6kernelPfPiS0_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp48:
jmp .LBB2_59
.LBB2_55:
.Ltmp37:
.cfi_escape 0x2e, 0x00
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $4294968320, %rdx # imm = 0x100000400
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp38:
# %bb.56:
testl %eax, %eax
jne .LBB2_59
# %bb.57:
movq (%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movq %rdx, 72(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
.Ltmp39:
.cfi_escape 0x2e, 0x00
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp40:
# %bb.58: # %.noexc140
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.Ltmp41:
.cfi_escape 0x2e, 0x10
leaq 96(%rsp), %r9
movl $_Z8p_kernelPfPiS0_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp42:
.LBB2_59:
movq (%rsp), %rsi
.Ltmp50:
.cfi_escape 0x2e, 0x00
movl $4096, %edx # imm = 0x1000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
.Ltmp51:
# %bb.60:
testl %eax, %eax
jne .LBB2_61
# %bb.64:
movq (%rsp), %rdi
.Ltmp55:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp56:
# %bb.65:
testl %eax, %eax
jne .LBB2_66
# %bb.69:
movq 16(%rsp), %rdi
.Ltmp60:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp61:
# %bb.70:
testl %eax, %eax
jne .LBB2_71
# %bb.74:
movq 8(%rsp), %rdi
.Ltmp65:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp66:
# %bb.75:
testl %eax, %eax
jne .LBB2_76
# %bb.79:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq free
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq free
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq free
movq 128(%rsp), %rdi
leaq 144(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_81
# %bb.80: # %.critedge.i.i
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_81: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
.cfi_escape 0x2e, 0x00
leaq 160(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 416(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq _ZNSt8ios_baseD2Ev
xorl %eax, %eax
addq $680, %rsp # imm = 0x2A8
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_4:
.cfi_def_cfa_offset 736
.Ltmp70:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.Ltmp71:
# %bb.5: # %.noexc
.LBB2_1:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $49, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_18:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $93, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp9:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp10:
# %bb.19:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_25:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $94, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp14:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp15:
# %bb.26:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_30:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $95, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp19:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp20:
# %bb.31:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_35:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $97, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp24:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp25:
# %bb.36:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_40:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $98, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp29:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp30:
# %bb.41:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_45:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $99, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp34:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp35:
# %bb.46:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_61:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $114, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp52:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp53:
# %bb.62:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_66:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $116, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp57:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp58:
# %bb.67:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_71:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $117, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp62:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp63:
# %bb.72:
.cfi_escape 0x2e, 0x00
jmp .LBB2_20
.LBB2_76:
.cfi_escape 0x2e, 0x00
movl $.L.str, %edi
movl $.L.str.1, %esi
movl $118, %edx
movl %eax, %ebx
xorl %eax, %eax
callq printf
.Ltmp67:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
callq hipGetErrorString
.Ltmp68:
# %bb.77:
.cfi_escape 0x2e, 0x00
.LBB2_20:
movl $.L.str.2, %edi
movl %ebx, %esi
movq %rax, %rdx
xorl %eax, %eax
callq printf
.cfi_escape 0x2e, 0x00
movl $1, %edi
callq exit
.LBB2_54:
.Ltmp49:
jmp .LBB2_83
.LBB2_78:
.Ltmp69:
jmp .LBB2_83
.LBB2_73:
.Ltmp64:
jmp .LBB2_83
.LBB2_68:
.Ltmp59:
jmp .LBB2_83
.LBB2_63:
.Ltmp54:
jmp .LBB2_83
.LBB2_47:
.Ltmp36:
jmp .LBB2_83
.LBB2_42:
.Ltmp31:
jmp .LBB2_83
.LBB2_37:
.Ltmp26:
jmp .LBB2_83
.LBB2_32:
.Ltmp21:
jmp .LBB2_83
.LBB2_27:
.Ltmp16:
jmp .LBB2_83
.LBB2_82:
.Ltmp11:
jmp .LBB2_83
.LBB2_22: # %.loopexit.split-lp
.Ltmp72:
jmp .LBB2_83
.LBB2_21: # %.loopexit
.Ltmp6:
.LBB2_83:
movq %rax, %rbx
movq 128(%rsp), %rdi
leaq 144(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_85
# %bb.84: # %.critedge.i.i142
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_85: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit144
.cfi_escape 0x2e, 0x00
leaq 160(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 416(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq _ZNSt8ios_baseD2Ev
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table2:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp5-.Ltmp0 # Call between .Ltmp0 and .Ltmp5
.uleb128 .Ltmp6-.Lfunc_begin0 # jumps to .Ltmp6
.byte 0 # On action: cleanup
.uleb128 .Ltmp7-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp8-.Ltmp7 # Call between .Ltmp7 and .Ltmp8
.uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11
.byte 0 # On action: cleanup
.uleb128 .Ltmp12-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp13-.Ltmp12 # Call between .Ltmp12 and .Ltmp13
.uleb128 .Ltmp16-.Lfunc_begin0 # jumps to .Ltmp16
.byte 0 # On action: cleanup
.uleb128 .Ltmp17-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp18-.Ltmp17 # Call between .Ltmp17 and .Ltmp18
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp22-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Ltmp23-.Ltmp22 # Call between .Ltmp22 and .Ltmp23
.uleb128 .Ltmp26-.Lfunc_begin0 # jumps to .Ltmp26
.byte 0 # On action: cleanup
.uleb128 .Ltmp27-.Lfunc_begin0 # >> Call Site 7 <<
.uleb128 .Ltmp28-.Ltmp27 # Call between .Ltmp27 and .Ltmp28
.uleb128 .Ltmp31-.Lfunc_begin0 # jumps to .Ltmp31
.byte 0 # On action: cleanup
.uleb128 .Ltmp32-.Lfunc_begin0 # >> Call Site 8 <<
.uleb128 .Ltmp33-.Ltmp32 # Call between .Ltmp32 and .Ltmp33
.uleb128 .Ltmp36-.Lfunc_begin0 # jumps to .Ltmp36
.byte 0 # On action: cleanup
.uleb128 .Ltmp43-.Lfunc_begin0 # >> Call Site 9 <<
.uleb128 .Ltmp42-.Ltmp43 # Call between .Ltmp43 and .Ltmp42
.uleb128 .Ltmp49-.Lfunc_begin0 # jumps to .Ltmp49
.byte 0 # On action: cleanup
.uleb128 .Ltmp50-.Lfunc_begin0 # >> Call Site 10 <<
.uleb128 .Ltmp51-.Ltmp50 # Call between .Ltmp50 and .Ltmp51
.uleb128 .Ltmp54-.Lfunc_begin0 # jumps to .Ltmp54
.byte 0 # On action: cleanup
.uleb128 .Ltmp55-.Lfunc_begin0 # >> Call Site 11 <<
.uleb128 .Ltmp56-.Ltmp55 # Call between .Ltmp55 and .Ltmp56
.uleb128 .Ltmp59-.Lfunc_begin0 # jumps to .Ltmp59
.byte 0 # On action: cleanup
.uleb128 .Ltmp60-.Lfunc_begin0 # >> Call Site 12 <<
.uleb128 .Ltmp61-.Ltmp60 # Call between .Ltmp60 and .Ltmp61
.uleb128 .Ltmp64-.Lfunc_begin0 # jumps to .Ltmp64
.byte 0 # On action: cleanup
.uleb128 .Ltmp65-.Lfunc_begin0 # >> Call Site 13 <<
.uleb128 .Ltmp66-.Ltmp65 # Call between .Ltmp65 and .Ltmp66
.uleb128 .Ltmp69-.Lfunc_begin0 # jumps to .Ltmp69
.byte 0 # On action: cleanup
.uleb128 .Ltmp70-.Lfunc_begin0 # >> Call Site 14 <<
.uleb128 .Ltmp71-.Ltmp70 # Call between .Ltmp70 and .Ltmp71
.uleb128 .Ltmp72-.Lfunc_begin0 # jumps to .Ltmp72
.byte 0 # On action: cleanup
.uleb128 .Ltmp71-.Lfunc_begin0 # >> Call Site 15 <<
.uleb128 .Ltmp9-.Ltmp71 # Call between .Ltmp71 and .Ltmp9
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp9-.Lfunc_begin0 # >> Call Site 16 <<
.uleb128 .Ltmp10-.Ltmp9 # Call between .Ltmp9 and .Ltmp10
.uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11
.byte 0 # On action: cleanup
.uleb128 .Ltmp14-.Lfunc_begin0 # >> Call Site 17 <<
.uleb128 .Ltmp15-.Ltmp14 # Call between .Ltmp14 and .Ltmp15
.uleb128 .Ltmp16-.Lfunc_begin0 # jumps to .Ltmp16
.byte 0 # On action: cleanup
.uleb128 .Ltmp19-.Lfunc_begin0 # >> Call Site 18 <<
.uleb128 .Ltmp20-.Ltmp19 # Call between .Ltmp19 and .Ltmp20
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 19 <<
.uleb128 .Ltmp25-.Ltmp24 # Call between .Ltmp24 and .Ltmp25
.uleb128 .Ltmp26-.Lfunc_begin0 # jumps to .Ltmp26
.byte 0 # On action: cleanup
.uleb128 .Ltmp29-.Lfunc_begin0 # >> Call Site 20 <<
.uleb128 .Ltmp30-.Ltmp29 # Call between .Ltmp29 and .Ltmp30
.uleb128 .Ltmp31-.Lfunc_begin0 # jumps to .Ltmp31
.byte 0 # On action: cleanup
.uleb128 .Ltmp34-.Lfunc_begin0 # >> Call Site 21 <<
.uleb128 .Ltmp35-.Ltmp34 # Call between .Ltmp34 and .Ltmp35
.uleb128 .Ltmp36-.Lfunc_begin0 # jumps to .Ltmp36
.byte 0 # On action: cleanup
.uleb128 .Ltmp52-.Lfunc_begin0 # >> Call Site 22 <<
.uleb128 .Ltmp53-.Ltmp52 # Call between .Ltmp52 and .Ltmp53
.uleb128 .Ltmp54-.Lfunc_begin0 # jumps to .Ltmp54
.byte 0 # On action: cleanup
.uleb128 .Ltmp57-.Lfunc_begin0 # >> Call Site 23 <<
.uleb128 .Ltmp58-.Ltmp57 # Call between .Ltmp57 and .Ltmp58
.uleb128 .Ltmp59-.Lfunc_begin0 # jumps to .Ltmp59
.byte 0 # On action: cleanup
.uleb128 .Ltmp62-.Lfunc_begin0 # >> Call Site 24 <<
.uleb128 .Ltmp63-.Ltmp62 # Call between .Ltmp62 and .Ltmp63
.uleb128 .Ltmp64-.Lfunc_begin0 # jumps to .Ltmp64
.byte 0 # On action: cleanup
.uleb128 .Ltmp67-.Lfunc_begin0 # >> Call Site 25 <<
.uleb128 .Ltmp68-.Ltmp67 # Call between .Ltmp67 and .Ltmp68
.uleb128 .Ltmp69-.Lfunc_begin0 # jumps to .Ltmp69
.byte 0 # On action: cleanup
.uleb128 .Ltmp68-.Lfunc_begin0 # >> Call Site 26 <<
.uleb128 .Lfunc_end2-.Ltmp68 # Call between .Ltmp68 and .Lfunc_end2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6kernelPfPiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8p_kernelPfPiS0_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6kernelPfPiS0_,@object # @_Z6kernelPfPiS0_
.section .rodata,"a",@progbits
.globl _Z6kernelPfPiS0_
.p2align 3, 0x0
_Z6kernelPfPiS0_:
.quad _Z21__device_stub__kernelPfPiS0_
.size _Z6kernelPfPiS0_, 8
.type _Z8p_kernelPfPiS0_,@object # @_Z8p_kernelPfPiS0_
.globl _Z8p_kernelPfPiS0_
.p2align 3, 0x0
_Z8p_kernelPfPiS0_:
.quad _Z23__device_stub__p_kernelPfPiS0_
.size _Z8p_kernelPfPiS0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Error: %s:%d "
.size .L.str, 14
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/Wanwannodao/my_repo/master/a3c/test.hip"
.size .L.str.1, 97
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "code:%d, reason:%s\n"
.size .L.str.2, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6kernelPfPiS0_"
.size .L__unnamed_1, 17
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z8p_kernelPfPiS0_"
.size .L__unnamed_2, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__kernelPfPiS0_
.addrsig_sym _Z23__device_stub__p_kernelPfPiS0_
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z6kernelPfPiS0_
.addrsig_sym _Z8p_kernelPfPiS0_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
__global__ void array_manipulation_kernel(int* a, int n) {
unsigned int index;
index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < n)
a[index] *= 2;
}
class ArrayManipulation {
public:
int arrayLength;
explicit ArrayManipulation(int arrayLength);
void initArray(int* array) const;
void run(int numGrids, int numThreads) const;
void displayResult(int* array, int* resultArray) const;
void checkResult(const int* array, const int* resultArray) const;
};
ArrayManipulation::ArrayManipulation(int arrayLength) {
this->arrayLength = arrayLength;
}
void ArrayManipulation::initArray(int *array) const {
for(int i = 0; i < this->arrayLength; i++)
array[i] = rand() % 100;
}
void ArrayManipulation::displayResult(int *array, int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
printf("%d * 2 = %d\n", array[i], resultArray[i]);
}
void ArrayManipulation::checkResult(const int *array, const int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
assert(resultArray[i] == array[i] * 2);
printf("Program Executed Successfully");
}
void ArrayManipulation::run(int numGrids, int numThreads) const {
int deviceId = cudaGetDevice(&deviceId);
printf("GPU Device ID: %d\n", deviceId);
printf("CPU Device ID: %d\n\n", cudaCpuDeviceId);
int * hostArray, * resultArray, * deviceArray;
size_t arrayBytes = sizeof(int) * this->arrayLength;
cudaMallocHost(&hostArray, arrayBytes);
cudaMallocHost(&resultArray, arrayBytes);
cudaMalloc(&deviceArray, arrayBytes);
initArray(hostArray);
cudaMemcpy(deviceArray, hostArray, arrayBytes, cudaMemcpyHostToDevice);
array_manipulation_kernel<<<numGrids, numThreads>>>(deviceArray, arrayLength);
cudaDeviceSynchronize();
cudaMemcpy(resultArray, deviceArray, arrayBytes, cudaMemcpyDeviceToHost);
displayResult(hostArray, resultArray);
checkResult(hostArray, resultArray);
cudaFreeHost(hostArray);
cudaFreeHost(resultArray);
cudaFree(deviceArray);
}
int main() {
ArrayManipulation program(16);
program.run(1, 16);
} | code for sm_80
Function : _Z25array_manipulation_kernelPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x168], PT ; /* 0x00005a0002007a0c */
/* 0x000fda0003f06070 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0003 */
/*0090*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*00a0*/ SHF.L.U32 R5, R0, 0x1, RZ ; /* 0x0000000100057819 */
/* 0x004fca00000006ff */
/*00b0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*00c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00d0*/ BRA 0xd0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
__global__ void array_manipulation_kernel(int* a, int n) {
unsigned int index;
index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < n)
a[index] *= 2;
}
class ArrayManipulation {
public:
int arrayLength;
explicit ArrayManipulation(int arrayLength);
void initArray(int* array) const;
void run(int numGrids, int numThreads) const;
void displayResult(int* array, int* resultArray) const;
void checkResult(const int* array, const int* resultArray) const;
};
ArrayManipulation::ArrayManipulation(int arrayLength) {
this->arrayLength = arrayLength;
}
void ArrayManipulation::initArray(int *array) const {
for(int i = 0; i < this->arrayLength; i++)
array[i] = rand() % 100;
}
void ArrayManipulation::displayResult(int *array, int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
printf("%d * 2 = %d\n", array[i], resultArray[i]);
}
void ArrayManipulation::checkResult(const int *array, const int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
assert(resultArray[i] == array[i] * 2);
printf("Program Executed Successfully");
}
void ArrayManipulation::run(int numGrids, int numThreads) const {
int deviceId = cudaGetDevice(&deviceId);
printf("GPU Device ID: %d\n", deviceId);
printf("CPU Device ID: %d\n\n", cudaCpuDeviceId);
int * hostArray, * resultArray, * deviceArray;
size_t arrayBytes = sizeof(int) * this->arrayLength;
cudaMallocHost(&hostArray, arrayBytes);
cudaMallocHost(&resultArray, arrayBytes);
cudaMalloc(&deviceArray, arrayBytes);
initArray(hostArray);
cudaMemcpy(deviceArray, hostArray, arrayBytes, cudaMemcpyHostToDevice);
array_manipulation_kernel<<<numGrids, numThreads>>>(deviceArray, arrayLength);
cudaDeviceSynchronize();
cudaMemcpy(resultArray, deviceArray, arrayBytes, cudaMemcpyDeviceToHost);
displayResult(hostArray, resultArray);
checkResult(hostArray, resultArray);
cudaFreeHost(hostArray);
cudaFreeHost(resultArray);
cudaFree(deviceArray);
}
int main() {
ArrayManipulation program(16);
program.run(1, 16);
} | .file "tmpxft_0018dae7_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3679:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3679:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.align 2
.globl _ZN17ArrayManipulationC2Ei
.type _ZN17ArrayManipulationC2Ei, @function
_ZN17ArrayManipulationC2Ei:
.LFB3670:
.cfi_startproc
endbr64
movl %esi, (%rdi)
ret
.cfi_endproc
.LFE3670:
.size _ZN17ArrayManipulationC2Ei, .-_ZN17ArrayManipulationC2Ei
.globl _ZN17ArrayManipulationC1Ei
.set _ZN17ArrayManipulationC1Ei,_ZN17ArrayManipulationC2Ei
.align 2
.globl _ZNK17ArrayManipulation9initArrayEPi
.type _ZNK17ArrayManipulation9initArrayEPi, @function
_ZNK17ArrayManipulation9initArrayEPi:
.LFB3672:
.cfi_startproc
endbr64
cmpl $0, (%rdi)
jle .L9
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbp
movq %rsi, %r12
movl $0, %ebx
.L6:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%r12,%rbx,4)
addq $1, %rbx
cmpl %ebx, 0(%rbp)
jg .L6
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
ret
.cfi_endproc
.LFE3672:
.size _ZNK17ArrayManipulation9initArrayEPi, .-_ZNK17ArrayManipulation9initArrayEPi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d * 2 = %d\n"
.text
.align 2
.globl _ZNK17ArrayManipulation13displayResultEPiS0_
.type _ZNK17ArrayManipulation13displayResultEPiS0_, @function
_ZNK17ArrayManipulation13displayResultEPiS0_:
.LFB3673:
.cfi_startproc
endbr64
cmpl $0, (%rdi)
jle .L17
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %rbp
movq %rsi, %r12
movq %rdx, %r13
movl $0, %ebx
leaq .LC0(%rip), %r14
.L14:
movl 0(%r13,%rbx,4), %ecx
movl (%r12,%rbx,4), %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpl %ebx, 0(%rbp)
jg .L14
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE3673:
.size _ZNK17ArrayManipulation13displayResultEPiS0_, .-_ZNK17ArrayManipulation13displayResultEPiS0_
.section .rodata.str1.1
.LC1:
.string "Program Executed Successfully"
.text
.align 2
.globl _ZNK17ArrayManipulation11checkResultEPKiS1_
.type _ZNK17ArrayManipulation11checkResultEPKiS1_, @function
_ZNK17ArrayManipulation11checkResultEPKiS1_:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl (%rdi), %edx
testl %edx, %edx
jle .L21
movl $0, %eax
.L22:
addl $1, %eax
cmpl %edx, %eax
jne .L22
.L21:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3674:
.size _ZNK17ArrayManipulation11checkResultEPKiS1_, .-_ZNK17ArrayManipulation11checkResultEPKiS1_
.globl _Z46__device_stub__Z25array_manipulation_kernelPiiPii
.type _Z46__device_stub__Z25array_manipulation_kernelPiiPii, @function
_Z46__device_stub__Z25array_manipulation_kernelPiiPii:
.LFB3701:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L29
.L25:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L30
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z25array_manipulation_kernelPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L25
.L30:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3701:
.size _Z46__device_stub__Z25array_manipulation_kernelPiiPii, .-_Z46__device_stub__Z25array_manipulation_kernelPiiPii
.globl _Z25array_manipulation_kernelPii
.type _Z25array_manipulation_kernelPii, @function
_Z25array_manipulation_kernelPii:
.LFB3702:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z46__device_stub__Z25array_manipulation_kernelPiiPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3702:
.size _Z25array_manipulation_kernelPii, .-_Z25array_manipulation_kernelPii
.section .rodata.str1.1
.LC2:
.string "GPU Device ID: %d\n"
.LC3:
.string "CPU Device ID: %d\n\n"
.text
.align 2
.globl _ZNK17ArrayManipulation3runEii
.type _ZNK17ArrayManipulation3runEii, @function
_ZNK17ArrayManipulation3runEii:
.LFB3675:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $72, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %rbp
movl %esi, %r12d
movl %edx, %r13d
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rdi
call cudaGetDevice@PLT
movl %eax, %edx
movl %eax, 4(%rsp)
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movslq 0(%rbp), %rbx
salq $2, %rbx
leaq 8(%rsp), %rdi
movl $0, %edx
movq %rbx, %rsi
call cudaHostAlloc@PLT
leaq 16(%rsp), %rdi
movl $0, %edx
movq %rbx, %rsi
call cudaHostAlloc@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movq 8(%rsp), %rsi
movq %rbp, %rdi
call _ZNK17ArrayManipulation9initArrayEPi
movl $1, %ecx
movq %rbx, %rdx
movq 8(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %r13d, 44(%rsp)
movl $1, 48(%rsp)
movl %r12d, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L37
.L34:
call cudaDeviceSynchronize@PLT
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call _ZNK17ArrayManipulation13displayResultEPiS0_
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call _ZNK17ArrayManipulation11checkResultEPKiS1_
movq 8(%rsp), %rdi
call cudaFreeHost@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L38
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
movl 0(%rbp), %esi
movq 24(%rsp), %rdi
call _Z46__device_stub__Z25array_manipulation_kernelPiiPii
jmp .L34
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3675:
.size _ZNK17ArrayManipulation3runEii, .-_ZNK17ArrayManipulation3runEii
.globl main
.type main, @function
main:
.LFB3676:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $16, %rsp
.cfi_def_cfa_offset 32
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rbx
movl $16, %esi
movq %rbx, %rdi
call _ZN17ArrayManipulationC1Ei
movl $16, %edx
movl $1, %esi
movq %rbx, %rdi
call _ZNK17ArrayManipulation3runEii
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L42
movl $0, %eax
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3676:
.size main, .-main
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "_Z25array_manipulation_kernelPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3704:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z25array_manipulation_kernelPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3704:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
__global__ void array_manipulation_kernel(int* a, int n) {
unsigned int index;
index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < n)
a[index] *= 2;
}
class ArrayManipulation {
public:
int arrayLength;
explicit ArrayManipulation(int arrayLength);
void initArray(int* array) const;
void run(int numGrids, int numThreads) const;
void displayResult(int* array, int* resultArray) const;
void checkResult(const int* array, const int* resultArray) const;
};
ArrayManipulation::ArrayManipulation(int arrayLength) {
this->arrayLength = arrayLength;
}
void ArrayManipulation::initArray(int *array) const {
for(int i = 0; i < this->arrayLength; i++)
array[i] = rand() % 100;
}
void ArrayManipulation::displayResult(int *array, int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
printf("%d * 2 = %d\n", array[i], resultArray[i]);
}
void ArrayManipulation::checkResult(const int *array, const int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
assert(resultArray[i] == array[i] * 2);
printf("Program Executed Successfully");
}
void ArrayManipulation::run(int numGrids, int numThreads) const {
int deviceId = cudaGetDevice(&deviceId);
printf("GPU Device ID: %d\n", deviceId);
printf("CPU Device ID: %d\n\n", cudaCpuDeviceId);
int * hostArray, * resultArray, * deviceArray;
size_t arrayBytes = sizeof(int) * this->arrayLength;
cudaMallocHost(&hostArray, arrayBytes);
cudaMallocHost(&resultArray, arrayBytes);
cudaMalloc(&deviceArray, arrayBytes);
initArray(hostArray);
cudaMemcpy(deviceArray, hostArray, arrayBytes, cudaMemcpyHostToDevice);
array_manipulation_kernel<<<numGrids, numThreads>>>(deviceArray, arrayLength);
cudaDeviceSynchronize();
cudaMemcpy(resultArray, deviceArray, arrayBytes, cudaMemcpyDeviceToHost);
displayResult(hostArray, resultArray);
checkResult(hostArray, resultArray);
cudaFreeHost(hostArray);
cudaFreeHost(resultArray);
cudaFree(deviceArray);
}
int main() {
ArrayManipulation program(16);
program.run(1, 16);
} | #include "hip/hip_runtime.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
__global__ void array_manipulation_kernel(int* a, int n) {
unsigned int index;
index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < n)
a[index] *= 2;
}
class ArrayManipulation {
public:
int arrayLength;
explicit ArrayManipulation(int arrayLength);
void initArray(int* array) const;
void run(int numGrids, int numThreads) const;
void displayResult(int* array, int* resultArray) const;
void checkResult(const int* array, const int* resultArray) const;
};
ArrayManipulation::ArrayManipulation(int arrayLength) {
this->arrayLength = arrayLength;
}
void ArrayManipulation::initArray(int *array) const {
for(int i = 0; i < this->arrayLength; i++)
array[i] = rand() % 100;
}
void ArrayManipulation::displayResult(int *array, int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
printf("%d * 2 = %d\n", array[i], resultArray[i]);
}
void ArrayManipulation::checkResult(const int *array, const int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
assert(resultArray[i] == array[i] * 2);
printf("Program Executed Successfully");
}
void ArrayManipulation::run(int numGrids, int numThreads) const {
int deviceId = hipGetDevice(&deviceId);
printf("GPU Device ID: %d\n", deviceId);
printf("CPU Device ID: %d\n\n", hipCpuDeviceId);
int * hostArray, * resultArray, * deviceArray;
size_t arrayBytes = sizeof(int) * this->arrayLength;
hipHostMalloc(&hostArray, arrayBytes, hipHostMallocDefault);
hipHostMalloc(&resultArray, arrayBytes, hipHostMallocDefault);
hipMalloc(&deviceArray, arrayBytes);
initArray(hostArray);
hipMemcpy(deviceArray, hostArray, arrayBytes, hipMemcpyHostToDevice);
array_manipulation_kernel<<<numGrids, numThreads>>>(deviceArray, arrayLength);
hipDeviceSynchronize();
hipMemcpy(resultArray, deviceArray, arrayBytes, hipMemcpyDeviceToHost);
displayResult(hostArray, resultArray);
checkResult(hostArray, resultArray);
hipHostFree(hostArray);
hipHostFree(resultArray);
hipFree(deviceArray);
}
int main() {
ArrayManipulation program(16);
program.run(1, 16);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
__global__ void array_manipulation_kernel(int* a, int n) {
unsigned int index;
index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < n)
a[index] *= 2;
}
class ArrayManipulation {
public:
int arrayLength;
explicit ArrayManipulation(int arrayLength);
void initArray(int* array) const;
void run(int numGrids, int numThreads) const;
void displayResult(int* array, int* resultArray) const;
void checkResult(const int* array, const int* resultArray) const;
};
ArrayManipulation::ArrayManipulation(int arrayLength) {
this->arrayLength = arrayLength;
}
void ArrayManipulation::initArray(int *array) const {
for(int i = 0; i < this->arrayLength; i++)
array[i] = rand() % 100;
}
void ArrayManipulation::displayResult(int *array, int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
printf("%d * 2 = %d\n", array[i], resultArray[i]);
}
void ArrayManipulation::checkResult(const int *array, const int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
assert(resultArray[i] == array[i] * 2);
printf("Program Executed Successfully");
}
void ArrayManipulation::run(int numGrids, int numThreads) const {
int deviceId = hipGetDevice(&deviceId);
printf("GPU Device ID: %d\n", deviceId);
printf("CPU Device ID: %d\n\n", hipCpuDeviceId);
int * hostArray, * resultArray, * deviceArray;
size_t arrayBytes = sizeof(int) * this->arrayLength;
hipHostMalloc(&hostArray, arrayBytes, hipHostMallocDefault);
hipHostMalloc(&resultArray, arrayBytes, hipHostMallocDefault);
hipMalloc(&deviceArray, arrayBytes);
initArray(hostArray);
hipMemcpy(deviceArray, hostArray, arrayBytes, hipMemcpyHostToDevice);
array_manipulation_kernel<<<numGrids, numThreads>>>(deviceArray, arrayLength);
hipDeviceSynchronize();
hipMemcpy(resultArray, deviceArray, arrayBytes, hipMemcpyDeviceToHost);
displayResult(hostArray, resultArray);
checkResult(hostArray, resultArray);
hipHostFree(hostArray);
hipHostFree(resultArray);
hipFree(deviceArray);
}
int main() {
ArrayManipulation program(16);
program.run(1, 16);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z25array_manipulation_kernelPii
.globl _Z25array_manipulation_kernelPii
.p2align 8
.type _Z25array_manipulation_kernelPii,@function
_Z25array_manipulation_kernelPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_lshlrev_b32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z25array_manipulation_kernelPii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z25array_manipulation_kernelPii, .Lfunc_end0-_Z25array_manipulation_kernelPii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z25array_manipulation_kernelPii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z25array_manipulation_kernelPii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <cstdlib>
#include <cstdio>
#include <cassert>
#include <iostream>
__global__ void array_manipulation_kernel(int* a, int n) {
unsigned int index;
index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < n)
a[index] *= 2;
}
class ArrayManipulation {
public:
int arrayLength;
explicit ArrayManipulation(int arrayLength);
void initArray(int* array) const;
void run(int numGrids, int numThreads) const;
void displayResult(int* array, int* resultArray) const;
void checkResult(const int* array, const int* resultArray) const;
};
ArrayManipulation::ArrayManipulation(int arrayLength) {
this->arrayLength = arrayLength;
}
void ArrayManipulation::initArray(int *array) const {
for(int i = 0; i < this->arrayLength; i++)
array[i] = rand() % 100;
}
void ArrayManipulation::displayResult(int *array, int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
printf("%d * 2 = %d\n", array[i], resultArray[i]);
}
void ArrayManipulation::checkResult(const int *array, const int* resultArray) const {
for(int i = 0; i < this->arrayLength; i++)
assert(resultArray[i] == array[i] * 2);
printf("Program Executed Successfully");
}
void ArrayManipulation::run(int numGrids, int numThreads) const {
int deviceId = hipGetDevice(&deviceId);
printf("GPU Device ID: %d\n", deviceId);
printf("CPU Device ID: %d\n\n", hipCpuDeviceId);
int * hostArray, * resultArray, * deviceArray;
size_t arrayBytes = sizeof(int) * this->arrayLength;
hipHostMalloc(&hostArray, arrayBytes, hipHostMallocDefault);
hipHostMalloc(&resultArray, arrayBytes, hipHostMallocDefault);
hipMalloc(&deviceArray, arrayBytes);
initArray(hostArray);
hipMemcpy(deviceArray, hostArray, arrayBytes, hipMemcpyHostToDevice);
array_manipulation_kernel<<<numGrids, numThreads>>>(deviceArray, arrayLength);
hipDeviceSynchronize();
hipMemcpy(resultArray, deviceArray, arrayBytes, hipMemcpyDeviceToHost);
displayResult(hostArray, resultArray);
checkResult(hostArray, resultArray);
hipHostFree(hostArray);
hipHostFree(resultArray);
hipFree(deviceArray);
}
int main() {
ArrayManipulation program(16);
program.run(1, 16);
} | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z40__device_stub__array_manipulation_kernelPii # -- Begin function _Z40__device_stub__array_manipulation_kernelPii
.p2align 4, 0x90
.type _Z40__device_stub__array_manipulation_kernelPii,@function
_Z40__device_stub__array_manipulation_kernelPii: # @_Z40__device_stub__array_manipulation_kernelPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z25array_manipulation_kernelPii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z40__device_stub__array_manipulation_kernelPii, .Lfunc_end0-_Z40__device_stub__array_manipulation_kernelPii
.cfi_endproc
# -- End function
.globl _ZN17ArrayManipulationC2Ei # -- Begin function _ZN17ArrayManipulationC2Ei
.p2align 4, 0x90
.type _ZN17ArrayManipulationC2Ei,@function
_ZN17ArrayManipulationC2Ei: # @_ZN17ArrayManipulationC2Ei
.cfi_startproc
# %bb.0:
movl %esi, (%rdi)
retq
.Lfunc_end1:
.size _ZN17ArrayManipulationC2Ei, .Lfunc_end1-_ZN17ArrayManipulationC2Ei
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation9initArrayEPi # -- Begin function _ZNK17ArrayManipulation9initArrayEPi
.p2align 4, 0x90
.type _ZNK17ArrayManipulation9initArrayEPi,@function
_ZNK17ArrayManipulation9initArrayEPi: # @_ZNK17ArrayManipulation9initArrayEPi
.cfi_startproc
# %bb.0:
cmpl $0, (%rdi)
jle .LBB2_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rsi, %rbx
movq %rdi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
movslq (%r14), %rax
cmpq %rax, %r15
jl .LBB2_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
retq
.Lfunc_end2:
.size _ZNK17ArrayManipulation9initArrayEPi, .Lfunc_end2-_ZNK17ArrayManipulation9initArrayEPi
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation13displayResultEPiS0_ # -- Begin function _ZNK17ArrayManipulation13displayResultEPiS0_
.p2align 4, 0x90
.type _ZNK17ArrayManipulation13displayResultEPiS0_,@function
_ZNK17ArrayManipulation13displayResultEPiS0_: # @_ZNK17ArrayManipulation13displayResultEPiS0_
.cfi_startproc
# %bb.0:
cmpl $0, (%rdi)
jle .LBB3_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%r14,%r12,4), %esi
movl (%rbx,%r12,4), %edx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %r12
movslq (%r15), %rax
cmpq %rax, %r12
jl .LBB3_2
# %bb.3:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r14
.cfi_restore %r15
.LBB3_4: # %._crit_edge
retq
.Lfunc_end3:
.size _ZNK17ArrayManipulation13displayResultEPiS0_, .Lfunc_end3-_ZNK17ArrayManipulation13displayResultEPiS0_
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation11checkResultEPKiS1_ # -- Begin function _ZNK17ArrayManipulation11checkResultEPKiS1_
.p2align 4, 0x90
.type _ZNK17ArrayManipulation11checkResultEPKiS1_,@function
_ZNK17ArrayManipulation11checkResultEPKiS1_: # @_ZNK17ArrayManipulation11checkResultEPKiS1_
.cfi_startproc
# %bb.0:
movl $.L.str.1, %edi
xorl %eax, %eax
jmp printf # TAILCALL
.Lfunc_end4:
.size _ZNK17ArrayManipulation11checkResultEPKiS1_, .Lfunc_end4-_ZNK17ArrayManipulation11checkResultEPKiS1_
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation3runEii # -- Begin function _ZNK17ArrayManipulation3runEii
.p2align 4, 0x90
.type _ZNK17ArrayManipulation3runEii,@function
_ZNK17ArrayManipulation3runEii: # @_ZNK17ArrayManipulation3runEii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movl %esi, %r15d
movq %rdi, %rbx
leaq 32(%rsp), %rdi
callq hipGetDevice
movl %eax, 32(%rsp)
movl $.L.str.2, %edi
movl %eax, %esi
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movl $-1, %esi
xorl %eax, %eax
callq printf
movslq (%rbx), %r14
shlq $2, %r14
leaq 16(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
leaq 24(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
cmpl $0, (%rbx)
jle .LBB5_3
# %bb.1: # %.lr.ph.i.preheader
movq 16(%rsp), %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%r12,%r13,4)
incq %r13
movslq (%rbx), %rax
cmpq %rax, %r13
jl .LBB5_2
.LBB5_3: # %_ZNK17ArrayManipulation9initArrayEPi.exit
movq 8(%rsp), %rdi
movq 16(%rsp), %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl %r15d, %edi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
movl %ebp, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_5
# %bb.4:
movq 8(%rsp), %rax
movl (%rbx), %ecx
movq %rax, 88(%rsp)
movl %ecx, 36(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 36(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z25array_manipulation_kernelPii, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_5:
callq hipDeviceSynchronize
movq 24(%rsp), %rdi
movq 8(%rsp), %rsi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
cmpl $0, (%rbx)
jle .LBB5_8
# %bb.6: # %.lr.ph.i9.preheader
movq 16(%rsp), %r14
movq 24(%rsp), %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB5_7: # %.lr.ph.i9
# =>This Inner Loop Header: Depth=1
movl (%r14,%r12,4), %esi
movl (%r15,%r12,4), %edx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %r12
movslq (%rbx), %rax
cmpq %rax, %r12
jl .LBB5_7
.LBB5_8: # %_ZNK17ArrayManipulation13displayResultEPiS0_.exit
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
movq 16(%rsp), %rdi
callq hipHostFree
movq 24(%rsp), %rdi
callq hipHostFree
movq 8(%rsp), %rdi
callq hipFree
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _ZNK17ArrayManipulation3runEii, .Lfunc_end5-_ZNK17ArrayManipulation3runEii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $16, 4(%rsp)
leaq 4(%rsp), %rdi
movl $1, %esi
movl $16, %edx
callq _ZNK17ArrayManipulation3runEii
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z25array_manipulation_kernelPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z25array_manipulation_kernelPii,@object # @_Z25array_manipulation_kernelPii
.section .rodata,"a",@progbits
.globl _Z25array_manipulation_kernelPii
.p2align 3, 0x0
_Z25array_manipulation_kernelPii:
.quad _Z40__device_stub__array_manipulation_kernelPii
.size _Z25array_manipulation_kernelPii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d * 2 = %d\n"
.size .L.str, 13
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Program Executed Successfully"
.size .L.str.1, 30
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "GPU Device ID: %d\n"
.size .L.str.2, 19
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "CPU Device ID: %d\n\n"
.size .L.str.3, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z25array_manipulation_kernelPii"
.size .L__unnamed_1, 33
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.globl _ZN17ArrayManipulationC1Ei
.type _ZN17ArrayManipulationC1Ei,@function
.set _ZN17ArrayManipulationC1Ei, _ZN17ArrayManipulationC2Ei
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z40__device_stub__array_manipulation_kernelPii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z25array_manipulation_kernelPii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z25array_manipulation_kernelPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x168], PT ; /* 0x00005a0002007a0c */
/* 0x000fda0003f06070 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0003 */
/*0090*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*00a0*/ SHF.L.U32 R5, R0, 0x1, RZ ; /* 0x0000000100057819 */
/* 0x004fca00000006ff */
/*00b0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*00c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00d0*/ BRA 0xd0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z25array_manipulation_kernelPii
.globl _Z25array_manipulation_kernelPii
.p2align 8
.type _Z25array_manipulation_kernelPii,@function
_Z25array_manipulation_kernelPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_lshlrev_b32_e32 v2, 1, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z25array_manipulation_kernelPii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z25array_manipulation_kernelPii, .Lfunc_end0-_Z25array_manipulation_kernelPii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z25array_manipulation_kernelPii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z25array_manipulation_kernelPii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0018dae7_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3679:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3679:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.align 2
.globl _ZN17ArrayManipulationC2Ei
.type _ZN17ArrayManipulationC2Ei, @function
_ZN17ArrayManipulationC2Ei:
.LFB3670:
.cfi_startproc
endbr64
movl %esi, (%rdi)
ret
.cfi_endproc
.LFE3670:
.size _ZN17ArrayManipulationC2Ei, .-_ZN17ArrayManipulationC2Ei
.globl _ZN17ArrayManipulationC1Ei
.set _ZN17ArrayManipulationC1Ei,_ZN17ArrayManipulationC2Ei
.align 2
.globl _ZNK17ArrayManipulation9initArrayEPi
.type _ZNK17ArrayManipulation9initArrayEPi, @function
_ZNK17ArrayManipulation9initArrayEPi:
.LFB3672:
.cfi_startproc
endbr64
cmpl $0, (%rdi)
jle .L9
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbp
movq %rsi, %r12
movl $0, %ebx
.L6:
call rand@PLT
movslq %eax, %rdx
imulq $1374389535, %rdx, %rdx
sarq $37, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100, %edx, %edx
subl %edx, %eax
movl %eax, (%r12,%rbx,4)
addq $1, %rbx
cmpl %ebx, 0(%rbp)
jg .L6
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
ret
.cfi_endproc
.LFE3672:
.size _ZNK17ArrayManipulation9initArrayEPi, .-_ZNK17ArrayManipulation9initArrayEPi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d * 2 = %d\n"
.text
.align 2
.globl _ZNK17ArrayManipulation13displayResultEPiS0_
.type _ZNK17ArrayManipulation13displayResultEPiS0_, @function
_ZNK17ArrayManipulation13displayResultEPiS0_:
.LFB3673:
.cfi_startproc
endbr64
cmpl $0, (%rdi)
jle .L17
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %rbp
movq %rsi, %r12
movq %rdx, %r13
movl $0, %ebx
leaq .LC0(%rip), %r14
.L14:
movl 0(%r13,%rbx,4), %ecx
movl (%r12,%rbx,4), %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpl %ebx, 0(%rbp)
jg .L14
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE3673:
.size _ZNK17ArrayManipulation13displayResultEPiS0_, .-_ZNK17ArrayManipulation13displayResultEPiS0_
.section .rodata.str1.1
.LC1:
.string "Program Executed Successfully"
.text
.align 2
.globl _ZNK17ArrayManipulation11checkResultEPKiS1_
.type _ZNK17ArrayManipulation11checkResultEPKiS1_, @function
_ZNK17ArrayManipulation11checkResultEPKiS1_:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl (%rdi), %edx
testl %edx, %edx
jle .L21
movl $0, %eax
.L22:
addl $1, %eax
cmpl %edx, %eax
jne .L22
.L21:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3674:
.size _ZNK17ArrayManipulation11checkResultEPKiS1_, .-_ZNK17ArrayManipulation11checkResultEPKiS1_
.globl _Z46__device_stub__Z25array_manipulation_kernelPiiPii
.type _Z46__device_stub__Z25array_manipulation_kernelPiiPii, @function
_Z46__device_stub__Z25array_manipulation_kernelPiiPii:
.LFB3701:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L29
.L25:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L30
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z25array_manipulation_kernelPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L25
.L30:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3701:
.size _Z46__device_stub__Z25array_manipulation_kernelPiiPii, .-_Z46__device_stub__Z25array_manipulation_kernelPiiPii
.globl _Z25array_manipulation_kernelPii
.type _Z25array_manipulation_kernelPii, @function
_Z25array_manipulation_kernelPii:
.LFB3702:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z46__device_stub__Z25array_manipulation_kernelPiiPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3702:
.size _Z25array_manipulation_kernelPii, .-_Z25array_manipulation_kernelPii
.section .rodata.str1.1
.LC2:
.string "GPU Device ID: %d\n"
.LC3:
.string "CPU Device ID: %d\n\n"
.text
.align 2
.globl _ZNK17ArrayManipulation3runEii
.type _ZNK17ArrayManipulation3runEii, @function
_ZNK17ArrayManipulation3runEii:
.LFB3675:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $72, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %rbp
movl %esi, %r12d
movl %edx, %r13d
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rdi
call cudaGetDevice@PLT
movl %eax, %edx
movl %eax, 4(%rsp)
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movslq 0(%rbp), %rbx
salq $2, %rbx
leaq 8(%rsp), %rdi
movl $0, %edx
movq %rbx, %rsi
call cudaHostAlloc@PLT
leaq 16(%rsp), %rdi
movl $0, %edx
movq %rbx, %rsi
call cudaHostAlloc@PLT
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
movq 8(%rsp), %rsi
movq %rbp, %rdi
call _ZNK17ArrayManipulation9initArrayEPi
movl $1, %ecx
movq %rbx, %rdx
movq 8(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %r13d, 44(%rsp)
movl $1, 48(%rsp)
movl %r12d, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L37
.L34:
call cudaDeviceSynchronize@PLT
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call _ZNK17ArrayManipulation13displayResultEPiS0_
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call _ZNK17ArrayManipulation11checkResultEPKiS1_
movq 8(%rsp), %rdi
call cudaFreeHost@PLT
movq 16(%rsp), %rdi
call cudaFreeHost@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L38
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
movl 0(%rbp), %esi
movq 24(%rsp), %rdi
call _Z46__device_stub__Z25array_manipulation_kernelPiiPii
jmp .L34
.L38:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3675:
.size _ZNK17ArrayManipulation3runEii, .-_ZNK17ArrayManipulation3runEii
.globl main
.type main, @function
main:
.LFB3676:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $16, %rsp
.cfi_def_cfa_offset 32
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rbx
movl $16, %esi
movq %rbx, %rdi
call _ZN17ArrayManipulationC1Ei
movl $16, %edx
movl $1, %esi
movq %rbx, %rdi
call _ZNK17ArrayManipulation3runEii
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L42
movl $0, %eax
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L42:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3676:
.size main, .-main
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "_Z25array_manipulation_kernelPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3704:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z25array_manipulation_kernelPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3704:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z40__device_stub__array_manipulation_kernelPii # -- Begin function _Z40__device_stub__array_manipulation_kernelPii
.p2align 4, 0x90
.type _Z40__device_stub__array_manipulation_kernelPii,@function
_Z40__device_stub__array_manipulation_kernelPii: # @_Z40__device_stub__array_manipulation_kernelPii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z25array_manipulation_kernelPii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z40__device_stub__array_manipulation_kernelPii, .Lfunc_end0-_Z40__device_stub__array_manipulation_kernelPii
.cfi_endproc
# -- End function
.globl _ZN17ArrayManipulationC2Ei # -- Begin function _ZN17ArrayManipulationC2Ei
.p2align 4, 0x90
.type _ZN17ArrayManipulationC2Ei,@function
_ZN17ArrayManipulationC2Ei: # @_ZN17ArrayManipulationC2Ei
.cfi_startproc
# %bb.0:
movl %esi, (%rdi)
retq
.Lfunc_end1:
.size _ZN17ArrayManipulationC2Ei, .Lfunc_end1-_ZN17ArrayManipulationC2Ei
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation9initArrayEPi # -- Begin function _ZNK17ArrayManipulation9initArrayEPi
.p2align 4, 0x90
.type _ZNK17ArrayManipulation9initArrayEPi,@function
_ZNK17ArrayManipulation9initArrayEPi: # @_ZNK17ArrayManipulation9initArrayEPi
.cfi_startproc
# %bb.0:
cmpl $0, (%rdi)
jle .LBB2_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rsi, %rbx
movq %rdi, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
movslq (%r14), %rax
cmpq %rax, %r15
jl .LBB2_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
retq
.Lfunc_end2:
.size _ZNK17ArrayManipulation9initArrayEPi, .Lfunc_end2-_ZNK17ArrayManipulation9initArrayEPi
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation13displayResultEPiS0_ # -- Begin function _ZNK17ArrayManipulation13displayResultEPiS0_
.p2align 4, 0x90
.type _ZNK17ArrayManipulation13displayResultEPiS0_,@function
_ZNK17ArrayManipulation13displayResultEPiS0_: # @_ZNK17ArrayManipulation13displayResultEPiS0_
.cfi_startproc
# %bb.0:
cmpl $0, (%rdi)
jle .LBB3_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%r14,%r12,4), %esi
movl (%rbx,%r12,4), %edx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %r12
movslq (%r15), %rax
cmpq %rax, %r12
jl .LBB3_2
# %bb.3:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r14
.cfi_restore %r15
.LBB3_4: # %._crit_edge
retq
.Lfunc_end3:
.size _ZNK17ArrayManipulation13displayResultEPiS0_, .Lfunc_end3-_ZNK17ArrayManipulation13displayResultEPiS0_
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation11checkResultEPKiS1_ # -- Begin function _ZNK17ArrayManipulation11checkResultEPKiS1_
.p2align 4, 0x90
.type _ZNK17ArrayManipulation11checkResultEPKiS1_,@function
_ZNK17ArrayManipulation11checkResultEPKiS1_: # @_ZNK17ArrayManipulation11checkResultEPKiS1_
.cfi_startproc
# %bb.0:
movl $.L.str.1, %edi
xorl %eax, %eax
jmp printf # TAILCALL
.Lfunc_end4:
.size _ZNK17ArrayManipulation11checkResultEPKiS1_, .Lfunc_end4-_ZNK17ArrayManipulation11checkResultEPKiS1_
.cfi_endproc
# -- End function
.globl _ZNK17ArrayManipulation3runEii # -- Begin function _ZNK17ArrayManipulation3runEii
.p2align 4, 0x90
.type _ZNK17ArrayManipulation3runEii,@function
_ZNK17ArrayManipulation3runEii: # @_ZNK17ArrayManipulation3runEii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movl %esi, %r15d
movq %rdi, %rbx
leaq 32(%rsp), %rdi
callq hipGetDevice
movl %eax, 32(%rsp)
movl $.L.str.2, %edi
movl %eax, %esi
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movl $-1, %esi
xorl %eax, %eax
callq printf
movslq (%rbx), %r14
shlq $2, %r14
leaq 16(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
leaq 24(%rsp), %rdi
movq %r14, %rsi
xorl %edx, %edx
callq hipHostMalloc
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
cmpl $0, (%rbx)
jle .LBB5_3
# %bb.1: # %.lr.ph.i.preheader
movq 16(%rsp), %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1374389535, %rax, %rcx # imm = 0x51EB851F
movq %rcx, %rdx
shrq $63, %rdx
sarq $37, %rcx
addl %edx, %ecx
imull $100, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%r12,%r13,4)
incq %r13
movslq (%rbx), %rax
cmpq %rax, %r13
jl .LBB5_2
.LBB5_3: # %_ZNK17ArrayManipulation9initArrayEPi.exit
movq 8(%rsp), %rdi
movq 16(%rsp), %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl %r15d, %edi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
movl %ebp, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_5
# %bb.4:
movq 8(%rsp), %rax
movl (%rbx), %ecx
movq %rax, 88(%rsp)
movl %ecx, 36(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 36(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z25array_manipulation_kernelPii, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_5:
callq hipDeviceSynchronize
movq 24(%rsp), %rdi
movq 8(%rsp), %rsi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
cmpl $0, (%rbx)
jle .LBB5_8
# %bb.6: # %.lr.ph.i9.preheader
movq 16(%rsp), %r14
movq 24(%rsp), %r15
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB5_7: # %.lr.ph.i9
# =>This Inner Loop Header: Depth=1
movl (%r14,%r12,4), %esi
movl (%r15,%r12,4), %edx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %r12
movslq (%rbx), %rax
cmpq %rax, %r12
jl .LBB5_7
.LBB5_8: # %_ZNK17ArrayManipulation13displayResultEPiS0_.exit
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
movq 16(%rsp), %rdi
callq hipHostFree
movq 24(%rsp), %rdi
callq hipHostFree
movq 8(%rsp), %rdi
callq hipFree
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _ZNK17ArrayManipulation3runEii, .Lfunc_end5-_ZNK17ArrayManipulation3runEii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $16, 4(%rsp)
leaq 4(%rsp), %rdi
movl $1, %esi
movl $16, %edx
callq _ZNK17ArrayManipulation3runEii
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size main, .Lfunc_end6-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z25array_manipulation_kernelPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z25array_manipulation_kernelPii,@object # @_Z25array_manipulation_kernelPii
.section .rodata,"a",@progbits
.globl _Z25array_manipulation_kernelPii
.p2align 3, 0x0
_Z25array_manipulation_kernelPii:
.quad _Z40__device_stub__array_manipulation_kernelPii
.size _Z25array_manipulation_kernelPii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d * 2 = %d\n"
.size .L.str, 13
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Program Executed Successfully"
.size .L.str.1, 30
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "GPU Device ID: %d\n"
.size .L.str.2, 19
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "CPU Device ID: %d\n\n"
.size .L.str.3, 20
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z25array_manipulation_kernelPii"
.size .L__unnamed_1, 33
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.globl _ZN17ArrayManipulationC1Ei
.type _ZN17ArrayManipulationC1Ei,@function
.set _ZN17ArrayManipulationC1Ei, _ZN17ArrayManipulationC2Ei
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z40__device_stub__array_manipulation_kernelPii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z25array_manipulation_kernelPii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include<algorithm>
#include <cuda.h>
using namespace std;
//INSERT CODE HERE---------------------------------
__global__ void make_count_table(int* src, int* count,int size){
__shared__ int dataShared[101];
for(int i =0;i<101;i++){
dataShared[i]=0;
}
int gx = blockIdx.x * blockDim.x + threadIdx.x,
tx = threadIdx.x;
if(gx<size){
atomicAdd(&dataShared[src[gx]],1);
}
__syncthreads();
if(tx<101)
atomicAdd(&count[tx],dataShared[tx]);
}
__global__ void make_offset_table(int* count){
__shared__ int src[101],dst[101];
int tx = threadIdx.x,
temp;
src[tx] = count[tx];
for(int stride=1;stride<101;stride*=2){
__syncthreads();
if(tx-stride>=0)
dst[tx] = src[tx] + src[tx-stride];
else
dst[tx] = src[tx];
temp=dst[tx];
dst[tx]=src[tx];
src[tx]=temp;
}
__syncthreads();
count[tx] = src[tx];
}
__global__ void sort(int* src,int* dst,int* offset,int size){
//__shared__ int OffsetShared[101];
int gx = blockIdx.x * blockDim.x + threadIdx.x;
int n;
/*if(tx<101)
OffsetShared[tx]=offset[tx];
__syncthreads();
*/
if(gx<size){
n=atomicSub(&offset[src[gx]],1);
n=n-1;
//printf("dst[%d] = src[%d]\n",n,gx);
dst[n]=src[gx];
}
}
void verify(int* src, int*result, int input_size){
sort(src, src+input_size);
long long match_cnt=0;
for(int i=0; i<input_size;i++)
{
if(src[i]==result[i])
match_cnt++;
}
if(match_cnt==input_size)
printf("TEST PASSED\n\n");
else
printf("TEST FAILED\n\n");
}
void genData(int* ptr, unsigned int size) {
while (size--) {
*ptr++ = (int)(rand() % 101);
}
}
int main(int argc, char* argv[]) {
int* pSource = NULL;
int* pResult = NULL;
int* pCount = NULL;
int input_size=0;
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
if (argc == 2)
input_size=atoi(argv[1]);
else
{
printf("\n Invalid input parameters!"
"\n Usage: ./sort <input_size>"
"\n");
exit(0);
}
//allocate host memory
pSource=(int*)malloc(input_size*sizeof(int));
pResult=(int*)malloc(input_size*sizeof(int));
pCount=(int*)malloc(101*sizeof(int));
// generate source data
genData(pSource, input_size);
/* for(int i=0;i<input_size;i++)
printf("pSource[%d] = %d\n",i,pSource[i]);*/
//allocate device memory
int* pSourceDev = NULL;
int* pResultDev = NULL;
int* pCountDev = NULL;
cudaMalloc((void**)&pSourceDev,input_size*sizeof(int));
cudaMalloc((void**)&pResultDev,input_size*sizeof(int));
cudaMalloc((void**)&pCountDev,101*sizeof(int));
// start timer
cudaEventRecord(start, 0);
cudaMemcpy(pSourceDev, pSource, input_size * sizeof(int), cudaMemcpyHostToDevice);
dim3 dimGrid(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock(1024,1,1);
make_count_table<<<dimGrid,dimBlock>>>(pSourceDev,pCountDev,input_size);
cudaMemcpy(pCount,pCountDev,101*sizeof(int),cudaMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Count[%d] = %d\n",i,pCount[i]);
}*/
dim3 dimGrid2(1,1,1);
dim3 dimBlock2(101,1,1);
make_offset_table<<<dimGrid2,dimBlock2>>>(pCountDev);
cudaMemcpy(pCount,pCountDev,101*sizeof(int),cudaMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Offset[%d] = %d\n",i,pCount[i]);
}*/
//cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
dim3 dimGrid3(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock3(1024,1,1);
sort<<<dimGrid3,dimBlock3>>>(pSourceDev,pResultDev,pCountDev,input_size);
cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
/*for(int i=0;i<input_size;i++)
printf("Reslut[%d]= %d\n",i,pResult[i]);
*/
//INSERT CODE HERE--------------------
// end timer
float time;
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time, start, stop);
printf("elapsed time = %f msec\n", time);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("Verifying results..."); fflush(stdout);
verify(pSource, pResult, input_size);
fflush(stdout);
/*for( int i=0;i<input_size;i++){
printf("index %d : %d %d \n",i,pSource[i],pResult[i]);
}*/
} | code for sm_80
Function : _Z4sortPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0207 */
/*0090*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ MOV R11, 0xffffffff ; /* 0xffffffff000b7802 */
/* 0x000fe20000000f00 */
/*00b0*/ IMAD.WIDE R4, R4, R7, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x004fcc00078e0207 */
/*00c0*/ ATOMG.E.ADD.STRONG.GPU PT, R4, [R4.64], R11 ; /* 0x0000000b040479a8 */
/* 0x000ea800081ee1c4 */
/*00d0*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */
/* 0x000ee2000c1e1900 */
/*00e0*/ IADD3 R6, R4, -0x1, RZ ; /* 0xffffffff04067810 */
/* 0x004fca0007ffe0ff */
/*00f0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x168] ; /* 0x00005a0006067625 */
/* 0x000fca00078e0207 */
/*0100*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x008fe2000c101904 */
/*0110*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0120*/ BRA 0x120; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z17make_offset_tablePi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0040*/ IMAD.WIDE R2, R9, R2, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x001fca00078e0202 */
/*0050*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea2000c1e1900 */
/*0060*/ ISETP.GE.AND P1, PT, R9.reuse, 0x1, PT ; /* 0x000000010900780c */
/* 0x040fe40003f26270 */
/*0070*/ ISETP.GE.AND P0, PT, R9, 0x2, PT ; /* 0x000000020900780c */
/* 0x000fe20003f06270 */
/*0080*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x004fe80000004800 */
/*0090*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*00a0*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*00b0*/ @P1 LDS R7, [R9.X4+-0x4] ; /* 0xfffffc0009071984 */
/* 0x000e620000004800 */
/*00c0*/ MOV R5, R4 ; /* 0x0000000400057202 */
/* 0x001fc60000000f00 */
/*00d0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*00e0*/ @P1 IMAD.IADD R5, R4, 0x1, R7 ; /* 0x0000000104051824 */
/* 0x002fe200078e0207 */
/*00f0*/ ISETP.GE.AND P1, PT, R9, 0x4, PT ; /* 0x000000040900780c */
/* 0x000fc80003f26270 */
/*0100*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ LDS R6, [R9.X4] ; /* 0x0000000009067984 */
/* 0x000e280000004800 */
/*0130*/ @P0 LDS R7, [R9.X4+-0x8] ; /* 0xfffff80009070984 */
/* 0x000e620000004800 */
/*0140*/ IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff007224 */
/* 0x001fc600078e0006 */
/*0150*/ STS [R9.X4+0x194], R6 ; /* 0x0001940609007388 */
/* 0x000fe20000004800 */
/*0160*/ @P0 IADD3 R0, R6, R7, RZ ; /* 0x0000000706000210 */
/* 0x002fe40007ffe0ff */
/*0170*/ ISETP.GE.AND P0, PT, R9, 0x8, PT ; /* 0x000000080900780c */
/* 0x000fc60003f06270 */
/*0180*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x000fe80000004800 */
/*0190*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*01a0*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*01b0*/ @P1 LDS R7, [R9.X4+-0x10] ; /* 0xfffff00009071984 */
/* 0x000e620000004800 */
/*01c0*/ IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff057224 */
/* 0x001fc600078e0004 */
/*01d0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*01e0*/ @P1 IMAD.IADD R5, R4, 0x1, R7 ; /* 0x0000000104051824 */
/* 0x002fe200078e0207 */
/*01f0*/ ISETP.GE.AND P1, PT, R9, 0x10, PT ; /* 0x000000100900780c */
/* 0x000fc80003f26270 */
/*0200*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*0210*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0220*/ LDS R6, [R9.X4] ; /* 0x0000000009067984 */
/* 0x000e280000004800 */
/*0230*/ @P0 LDS R7, [R9.X4+-0x20] ; /* 0xffffe00009070984 */
/* 0x000e620000004800 */
/*0240*/ MOV R0, R6 ; /* 0x0000000600007202 */
/* 0x001fc60000000f00 */
/*0250*/ STS [R9.X4+0x194], R6 ; /* 0x0001940609007388 */
/* 0x000fe20000004800 */
/*0260*/ @P0 IMAD.IADD R0, R6, 0x1, R7 ; /* 0x0000000106000824 */
/* 0x002fe200078e0207 */
/*0270*/ ISETP.GE.AND P0, PT, R9, 0x20, PT ; /* 0x000000200900780c */
/* 0x000fc80003f06270 */
/*0280*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x000fe80000004800 */
/*0290*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02a0*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*02b0*/ @P1 LDS R7, [R9.X4+-0x40] ; /* 0xffffc00009071984 */
/* 0x000e620000004800 */
/*02c0*/ IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff057224 */
/* 0x001fc600078e0004 */
/*02d0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*02e0*/ @P1 IADD3 R5, R4, R7, RZ ; /* 0x0000000704051210 */
/* 0x002fe40007ffe0ff */
/*02f0*/ ISETP.GE.AND P1, PT, R9, 0x40, PT ; /* 0x000000400900780c */
/* 0x000fc60003f26270 */
/*0300*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*0310*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0320*/ LDS R6, [R9.X4] ; /* 0x0000000009067984 */
/* 0x000e280000004800 */
/*0330*/ @P0 LDS R7, [R9.X4+-0x80] ; /* 0xffff800009070984 */
/* 0x000e620000004800 */
/*0340*/ IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff007224 */
/* 0x001fc600078e0006 */
/*0350*/ STS [R9.X4+0x194], R6 ; /* 0x0001940609007388 */
/* 0x000fe20000004800 */
/*0360*/ @P0 IADD3 R0, R6, R7, RZ ; /* 0x0000000706000210 */
/* 0x002fca0007ffe0ff */
/*0370*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x000fe80000004800 */
/*0380*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0390*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*03a0*/ @P1 LDS R7, [R9.X4+-0x100] ; /* 0xffff000009071984 */
/* 0x000e620000004800 */
/*03b0*/ IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff057224 */
/* 0x001fc600078e0004 */
/*03c0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*03d0*/ @P1 IADD3 R5, R4, R7, RZ ; /* 0x0000000704051210 */
/* 0x002fca0007ffe0ff */
/*03e0*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*03f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0400*/ LDS R7, [R9.X4] ; /* 0x0000000009077984 */
/* 0x000e280000004800 */
/*0410*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x001fe2000c101904 */
/*0420*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0430*/ BRA 0x430; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z16make_count_tablePiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ BSSY B0, 0x280 ; /* 0x0000024000007945 */
/* 0x000fe40003800000 */
/*0040*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e280000002100 */
/*0050*/ STS.128 [RZ], RZ ; /* 0x000000ffff007388 */
/* 0x000fe80000000c00 */
/*0060*/ STS.128 [0x10], RZ ; /* 0x000010ffff007388 */
/* 0x000fe80000000c00 */
/*0070*/ STS.128 [0x20], RZ ; /* 0x000020ffff007388 */
/* 0x000fe80000000c00 */
/*0080*/ STS.128 [0x30], RZ ; /* 0x000030ffff007388 */
/* 0x000fe80000000c00 */
/*0090*/ STS.128 [0x40], RZ ; /* 0x000040ffff007388 */
/* 0x000fe80000000c00 */
/*00a0*/ STS.128 [0x50], RZ ; /* 0x000050ffff007388 */
/* 0x000fe20000000c00 */
/*00b0*/ IMAD R2, R2, c[0x0][0x0], R7 ; /* 0x0000000002027a24 */
/* 0x001fe200078e0207 */
/*00c0*/ ISETP.GT.AND P1, PT, R7, 0x64, PT ; /* 0x000000640700780c */
/* 0x000fc40003f24270 */
/*00d0*/ STS.128 [0x60], RZ ; /* 0x000060ffff007388 */
/* 0x000fe40000000c00 */
/*00e0*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fe40003f06270 */
/*00f0*/ STS.128 [0x70], RZ ; /* 0x000070ffff007388 */
/* 0x000fe80000000c00 */
/*0100*/ STS.128 [0x80], RZ ; /* 0x000080ffff007388 */
/* 0x000fe80000000c00 */
/*0110*/ STS.128 [0x90], RZ ; /* 0x000090ffff007388 */
/* 0x000fe80000000c00 */
/*0120*/ STS.128 [0xa0], RZ ; /* 0x0000a0ffff007388 */
/* 0x000fe80000000c00 */
/*0130*/ STS.128 [0xb0], RZ ; /* 0x0000b0ffff007388 */
/* 0x000fe80000000c00 */
/*0140*/ STS.128 [0xc0], RZ ; /* 0x0000c0ffff007388 */
/* 0x000fe80000000c00 */
/*0150*/ STS.128 [0xd0], RZ ; /* 0x0000d0ffff007388 */
/* 0x000fe80000000c00 */
/*0160*/ STS.128 [0xe0], RZ ; /* 0x0000e0ffff007388 */
/* 0x000fe80000000c00 */
/*0170*/ STS.128 [0xf0], RZ ; /* 0x0000f0ffff007388 */
/* 0x000fe80000000c00 */
/*0180*/ STS.128 [0x100], RZ ; /* 0x000100ffff007388 */
/* 0x000fe80000000c00 */
/*0190*/ STS.128 [0x110], RZ ; /* 0x000110ffff007388 */
/* 0x000fe80000000c00 */
/*01a0*/ STS.128 [0x120], RZ ; /* 0x000120ffff007388 */
/* 0x000fe80000000c00 */
/*01b0*/ STS.128 [0x130], RZ ; /* 0x000130ffff007388 */
/* 0x000fe80000000c00 */
/*01c0*/ STS.128 [0x140], RZ ; /* 0x000140ffff007388 */
/* 0x000fe80000000c00 */
/*01d0*/ STS.128 [0x150], RZ ; /* 0x000150ffff007388 */
/* 0x000fe80000000c00 */
/*01e0*/ STS.128 [0x160], RZ ; /* 0x000160ffff007388 */
/* 0x000fe80000000c00 */
/*01f0*/ STS.128 [0x170], RZ ; /* 0x000170ffff007388 */
/* 0x000fe80000000c00 */
/*0200*/ STS.128 [0x180], RZ ; /* 0x000180ffff007388 */
/* 0x000fe80000000c00 */
/*0210*/ STS [0x190], RZ ; /* 0x000190ffff007388 */
/* 0x000fe20000000800 */
/*0220*/ @P0 BRA 0x270 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*0230*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fd400000001ff */
/*0240*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0203 */
/*0250*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0260*/ ATOMS.POPC.INC.32 RZ, [R2.X4+URZ] ; /* 0x0000000002ff7f8c */
/* 0x0041e4000d00403f */
/*0270*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0290*/ @P1 EXIT ; /* 0x000000000000194d */
/* 0x000fea0003800000 */
/*02a0*/ LDS R5, [R7.X4] ; /* 0x0000000007057984 */
/* 0x000e620000004800 */
/*02b0*/ MOV R2, 0x4 ; /* 0x0000000400027802 */
/* 0x001fca0000000f00 */
/*02c0*/ IMAD.WIDE R2, R7, R2, c[0x0][0x168] ; /* 0x00005a0007027625 */
/* 0x000fca00078e0202 */
/*02d0*/ RED.E.ADD.STRONG.GPU [R2.64], R5 ; /* 0x000000050200798e */
/* 0x002fe2000c10e184 */
/*02e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02f0*/ BRA 0x2f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include<algorithm>
#include <cuda.h>
using namespace std;
//INSERT CODE HERE---------------------------------
__global__ void make_count_table(int* src, int* count,int size){
__shared__ int dataShared[101];
for(int i =0;i<101;i++){
dataShared[i]=0;
}
int gx = blockIdx.x * blockDim.x + threadIdx.x,
tx = threadIdx.x;
if(gx<size){
atomicAdd(&dataShared[src[gx]],1);
}
__syncthreads();
if(tx<101)
atomicAdd(&count[tx],dataShared[tx]);
}
__global__ void make_offset_table(int* count){
__shared__ int src[101],dst[101];
int tx = threadIdx.x,
temp;
src[tx] = count[tx];
for(int stride=1;stride<101;stride*=2){
__syncthreads();
if(tx-stride>=0)
dst[tx] = src[tx] + src[tx-stride];
else
dst[tx] = src[tx];
temp=dst[tx];
dst[tx]=src[tx];
src[tx]=temp;
}
__syncthreads();
count[tx] = src[tx];
}
__global__ void sort(int* src,int* dst,int* offset,int size){
//__shared__ int OffsetShared[101];
int gx = blockIdx.x * blockDim.x + threadIdx.x;
int n;
/*if(tx<101)
OffsetShared[tx]=offset[tx];
__syncthreads();
*/
if(gx<size){
n=atomicSub(&offset[src[gx]],1);
n=n-1;
//printf("dst[%d] = src[%d]\n",n,gx);
dst[n]=src[gx];
}
}
void verify(int* src, int*result, int input_size){
sort(src, src+input_size);
long long match_cnt=0;
for(int i=0; i<input_size;i++)
{
if(src[i]==result[i])
match_cnt++;
}
if(match_cnt==input_size)
printf("TEST PASSED\n\n");
else
printf("TEST FAILED\n\n");
}
void genData(int* ptr, unsigned int size) {
while (size--) {
*ptr++ = (int)(rand() % 101);
}
}
int main(int argc, char* argv[]) {
int* pSource = NULL;
int* pResult = NULL;
int* pCount = NULL;
int input_size=0;
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
if (argc == 2)
input_size=atoi(argv[1]);
else
{
printf("\n Invalid input parameters!"
"\n Usage: ./sort <input_size>"
"\n");
exit(0);
}
//allocate host memory
pSource=(int*)malloc(input_size*sizeof(int));
pResult=(int*)malloc(input_size*sizeof(int));
pCount=(int*)malloc(101*sizeof(int));
// generate source data
genData(pSource, input_size);
/* for(int i=0;i<input_size;i++)
printf("pSource[%d] = %d\n",i,pSource[i]);*/
//allocate device memory
int* pSourceDev = NULL;
int* pResultDev = NULL;
int* pCountDev = NULL;
cudaMalloc((void**)&pSourceDev,input_size*sizeof(int));
cudaMalloc((void**)&pResultDev,input_size*sizeof(int));
cudaMalloc((void**)&pCountDev,101*sizeof(int));
// start timer
cudaEventRecord(start, 0);
cudaMemcpy(pSourceDev, pSource, input_size * sizeof(int), cudaMemcpyHostToDevice);
dim3 dimGrid(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock(1024,1,1);
make_count_table<<<dimGrid,dimBlock>>>(pSourceDev,pCountDev,input_size);
cudaMemcpy(pCount,pCountDev,101*sizeof(int),cudaMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Count[%d] = %d\n",i,pCount[i]);
}*/
dim3 dimGrid2(1,1,1);
dim3 dimBlock2(101,1,1);
make_offset_table<<<dimGrid2,dimBlock2>>>(pCountDev);
cudaMemcpy(pCount,pCountDev,101*sizeof(int),cudaMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Offset[%d] = %d\n",i,pCount[i]);
}*/
//cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
dim3 dimGrid3(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock3(1024,1,1);
sort<<<dimGrid3,dimBlock3>>>(pSourceDev,pResultDev,pCountDev,input_size);
cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
/*for(int i=0;i<input_size;i++)
printf("Reslut[%d]= %d\n",i,pResult[i]);
*/
//INSERT CODE HERE--------------------
// end timer
float time;
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time, start, stop);
printf("elapsed time = %f msec\n", time);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("Verifying results..."); fflush(stdout);
verify(pSource, pResult, input_size);
fflush(stdout);
/*for( int i=0;i<input_size;i++){
printf("index %d : %d %d \n",i,pSource[i],pResult[i]);
}*/
} | .file "tmpxft_0017acc1_00000000-6_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2342:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2342:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z7genDataPij
.type _Z7genDataPij, @function
_Z7genDataPij:
.LFB2338:
.cfi_startproc
endbr64
testl %esi, %esi
je .L8
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
leal -1(%rsi), %eax
movl %eax, %eax
leaq 4(%rdi,%rax,4), %rbp
.L5:
call rand@PLT
addq $4, %rbx
movslq %eax, %rdx
imulq $680390859, %rdx, %rdx
sarq $36, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $101, %edx, %edx
subl %edx, %eax
movl %eax, -4(%rbx)
cmpq %rbp, %rbx
jne .L5
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2338:
.size _Z7genDataPij, .-_Z7genDataPij
.globl _Z39__device_stub__Z16make_count_tablePiS_iPiS_i
.type _Z39__device_stub__Z16make_count_tablePiS_iPiS_i, @function
_Z39__device_stub__Z16make_count_tablePiS_iPiS_i:
.LFB2364:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z16make_count_tablePiS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2364:
.size _Z39__device_stub__Z16make_count_tablePiS_iPiS_i, .-_Z39__device_stub__Z16make_count_tablePiS_iPiS_i
.globl _Z16make_count_tablePiS_i
.type _Z16make_count_tablePiS_i, @function
_Z16make_count_tablePiS_i:
.LFB2365:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z16make_count_tablePiS_iPiS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2365:
.size _Z16make_count_tablePiS_i, .-_Z16make_count_tablePiS_i
.globl _Z37__device_stub__Z17make_offset_tablePiPi
.type _Z37__device_stub__Z17make_offset_tablePiPi, @function
_Z37__device_stub__Z17make_offset_tablePiPi:
.LFB2366:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z17make_offset_tablePi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2366:
.size _Z37__device_stub__Z17make_offset_tablePiPi, .-_Z37__device_stub__Z17make_offset_tablePiPi
.globl _Z17make_offset_tablePi
.type _Z17make_offset_tablePi, @function
_Z17make_offset_tablePi:
.LFB2367:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z17make_offset_tablePiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2367:
.size _Z17make_offset_tablePi, .-_Z17make_offset_tablePi
.globl _Z28__device_stub__Z4sortPiS_S_iPiS_S_i
.type _Z28__device_stub__Z4sortPiS_S_iPiS_S_i, @function
_Z28__device_stub__Z4sortPiS_S_iPiS_S_i:
.LFB2368:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L31
.L27:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z4sortPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L27
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2368:
.size _Z28__device_stub__Z4sortPiS_S_iPiS_S_i, .-_Z28__device_stub__Z4sortPiS_S_iPiS_S_i
.globl _Z4sortPiS_S_i
.type _Z4sortPiS_S_i, @function
_Z4sortPiS_S_i:
.LFB2369:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z4sortPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2369:
.size _Z4sortPiS_S_i, .-_Z4sortPiS_S_i
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z4sortPiS_S_i"
.LC1:
.string "_Z17make_offset_tablePi"
.LC2:
.string "_Z16make_count_tablePiS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2371:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z4sortPiS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z17make_offset_tablePi(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z16make_count_tablePiS_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2371:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .text._ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_,"axG",@progbits,_ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_,comdat
.weak _ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_
.type _ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_, @function
_ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_:
.LFB2505:
.cfi_startproc
endbr64
movl (%rdi), %ecx
leaq -4(%rdi), %rax
movl -4(%rdi), %edx
cmpl %edx, %ecx
jge .L38
.L39:
movl %edx, 4(%rax)
movq %rax, %rdi
subq $4, %rax
movl (%rax), %edx
cmpl %edx, %ecx
jl .L39
.L38:
movl %ecx, (%rdi)
ret
.cfi_endproc
.LFE2505:
.size _ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_, .-_ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_
.section .text._ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_,"axG",@progbits,_ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_,comdat
.weak _ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.type _ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_, @function
_ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_:
.LFB2495:
.cfi_startproc
endbr64
cmpq %rsi, %rdi
je .L50
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %rbp
movq %rsi, %r13
leaq 4(%rdi), %rbx
cmpq %rbx, %rsi
je .L41
movl $4, %r14d
jmp .L47
.L44:
je .L53
.L45:
movl %r12d, 0(%rbp)
.L46:
addq $4, %rbx
cmpq %rbx, %r13
je .L41
.L47:
movl (%rbx), %r12d
movl 0(%rbp), %eax
cmpl %r12d, %eax
jle .L43
movq %rbx, %rdx
subq %rbp, %rdx
cmpq $4, %rdx
jle .L44
movq %r14, %rdi
subq %rdx, %rdi
addq %rbx, %rdi
movq %rbp, %rsi
call memmove@PLT
jmp .L45
.L53:
movl %eax, (%rbx)
jmp .L45
.L43:
movq %rbx, %rdi
call _ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_
jmp .L46
.L41:
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L50:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE2495:
.size _ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_, .-_ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.section .text._ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_,"axG",@progbits,_ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_,comdat
.weak _ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_
.type _ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_, @function
_ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_:
.LFB2515:
.cfi_startproc
endbr64
movq %rsi, %r8
movl %ecx, %r9d
leaq -1(%rdx), %rax
movq %rax, %r10
shrq $63, %r10
addq %rax, %r10
sarq %r10
cmpq %r10, %rsi
jl .L57
movq %rsi, %rax
testb $1, %dl
jne .L59
movq %r8, %rax
jmp .L61
.L56:
movl (%rdi,%rax,4), %ecx
movl %ecx, (%rdi,%rsi,4)
cmpq %r10, %rax
jge .L66
movq %rax, %rsi
.L57:
leaq 1(%rsi), %rcx
leaq (%rcx,%rcx), %rax
movl -4(%rdi,%rcx,8), %r11d
cmpl %r11d, (%rdi,%rcx,8)
jge .L56
subq $1, %rax
jmp .L56
.L66:
testb $1, %dl
jne .L58
.L61:
subq $2, %rdx
movq %rdx, %rcx
shrq $63, %rcx
addq %rcx, %rdx
sarq %rdx
cmpq %rax, %rdx
je .L67
.L58:
leaq -1(%rax), %rdx
movq %rdx, %rcx
shrq $63, %rcx
addq %rdx, %rcx
sarq %rcx
cmpq %r8, %rax
jg .L60
jmp .L59
.L67:
leaq 2(%rax,%rax), %rdx
movl -4(%rdi,%rdx,4), %ecx
movl %ecx, (%rdi,%rax,4)
leaq -1(%rdx), %rax
jmp .L58
.L63:
movq %rdx, %rcx
.L60:
movl (%rdi,%rcx,4), %edx
cmpl %edx, %r9d
jle .L59
movl %edx, (%rdi,%rax,4)
leaq -1(%rcx), %rdx
movq %rdx, %rax
shrq $63, %rax
addq %rdx, %rax
sarq %rax
movq %rax, %rdx
movq %rcx, %rax
cmpq %rcx, %r8
jl .L63
.L59:
movl %r9d, (%rdi,%rax,4)
ret
.cfi_endproc
.LFE2515:
.size _ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_, .-_ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_
.section .text._ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_,"axG",@progbits,_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_,comdat
.weak _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
.type _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_, @function
_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_:
.LFB2480:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %rbp
movq %rsi, %rax
subq %rdi, %rax
cmpq $64, %rax
jle .L68
movq %rsi, %rdi
movq %rdx, %r12
testq %rdx, %rdx
jne .L71
movq %rdi, %rbx
.L88:
sarq $2, %rax
movq %rax, %r12
leaq -2(%rax), %rax
movq %rax, %r13
shrq $63, %r13
addq %rax, %r13
sarq %r13
jmp .L72
.L96:
subq $1, %r13
.L72:
movl 0(%rbp,%r13,4), %ecx
movq %r12, %rdx
movq %r13, %rsi
movq %rbp, %rdi
call _ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_
testq %r13, %r13
jne .L96
movq %rbx, %rax
subq %rbp, %rax
cmpq $4, %rax
jle .L68
.L73:
subq $4, %rbx
movl (%rbx), %ecx
movl 0(%rbp), %eax
movl %eax, (%rbx)
movq %rbx, %r12
subq %rbp, %r12
movq %r12, %rdx
sarq $2, %rdx
movl $0, %esi
movq %rbp, %rdi
call _ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_
cmpq $4, %r12
jg .L73
.L68:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L76:
.cfi_restore_state
cmpl %esi, %edx
jge .L78
movl 0(%rbp), %eax
movl %esi, 0(%rbp)
movl %eax, -4(%rdi)
jmp .L79
.L78:
movl 0(%rbp), %eax
movl %edx, 0(%rbp)
movl %eax, 4(%rbp)
jmp .L79
.L75:
movl -4(%rdi), %esi
cmpl %esi, %edx
jge .L80
movl 0(%rbp), %eax
movl %edx, 0(%rbp)
movl %eax, 4(%rbp)
jmp .L79
.L80:
cmpl %esi, %eax
jge .L81
movl 0(%rbp), %eax
movl %esi, 0(%rbp)
movl %eax, -4(%rdi)
jmp .L79
.L81:
movl 0(%rbp), %edx
movl %eax, 0(%rbp)
movl %edx, (%rcx)
jmp .L79
.L97:
movq %r12, %rdx
movq %rdi, %rsi
movq %rbx, %rdi
call _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
movq %rbx, %rax
subq %rbp, %rax
cmpq $64, %rax
jle .L68
testq %r12, %r12
je .L88
movq %rbx, %rdi
.L71:
subq $1, %r12
movq %rax, %rdx
sarq $2, %rdx
shrq $63, %rax
addq %rdx, %rax
sarq %rax
leaq 0(%rbp,%rax,4), %rcx
leaq 4(%rbp), %rbx
movl 4(%rbp), %edx
movl (%rcx), %eax
cmpl %eax, %edx
jge .L75
movl -4(%rdi), %esi
cmpl %esi, %eax
jge .L76
movl 0(%rbp), %edx
movl %eax, 0(%rbp)
movl %edx, (%rcx)
.L79:
movq %rdi, %rsi
.L77:
movl (%rbx), %ecx
movl 0(%rbp), %edx
cmpl %edx, %ecx
jge .L82
.L83:
addq $4, %rbx
movl (%rbx), %ecx
cmpl %edx, %ecx
jl .L83
.L82:
leaq -4(%rsi), %rax
movl -4(%rsi), %esi
cmpl %edx, %esi
jle .L84
.L85:
subq $4, %rax
movl (%rax), %esi
cmpl %edx, %esi
jg .L85
.L84:
cmpq %rax, %rbx
jnb .L97
movl %esi, (%rbx)
movl %ecx, (%rax)
addq $4, %rbx
movq %rax, %rsi
jmp .L77
.cfi_endproc
.LFE2480:
.size _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_, .-_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
.section .rodata.str1.1
.LC3:
.string "TEST PASSED\n\n"
.LC4:
.string "TEST FAILED\n\n"
.text
.globl _Z6verifyPiS_i
.type _Z6verifyPiS_i, @function
_Z6verifyPiS_i:
.LFB2337:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %rbx
movq %rsi, %r13
movl %edx, %r14d
movslq %edx, %rbp
salq $2, %rbp
leaq (%rdi,%rbp), %r15
cmpq %rdi, %r15
je .L99
movq %rbp, %rdx
sarq $2, %rdx
movl $64, %eax
je .L100
bsrq %rdx, %rax
xorl $63, %eax
.L100:
movl $63, %edx
subl %eax, %edx
movslq %edx, %rdx
addq %rdx, %rdx
movq %r15, %rsi
movq %rbx, %rdi
call _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
cmpq $64, %rbp
jle .L101
leaq 64(%rbx), %r12
movq %r12, %rsi
movq %rbx, %rdi
call _ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
cmpq %r12, %r15
je .L99
.L102:
movq %r12, %rdi
call _ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_
addq $4, %r12
cmpq %r12, %r15
jne .L102
jmp .L99
.L101:
movq %r15, %rsi
movq %rbx, %rdi
call _ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.L99:
testl %r14d, %r14d
jle .L109
movl $0, %eax
movl $0, %edx
jmp .L105
.L104:
addq $4, %rax
cmpq %rax, %rbp
je .L103
.L105:
movl 0(%r13,%rax), %ecx
cmpl %ecx, (%rbx,%rax)
jne .L104
addq $1, %rdx
jmp .L104
.L109:
movl $0, %edx
.L103:
movslq %r14d, %r14
cmpq %rdx, %r14
je .L113
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L98:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L113:
.cfi_restore_state
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L98
.cfi_endproc
.LFE2337:
.size _Z6verifyPiS_i, .-_Z6verifyPiS_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "\n Invalid input parameters!\n Usage: ./sort <input_size>\n"
.section .rodata.str1.1
.LC7:
.string "elapsed time = %f msec\n"
.LC8:
.string "Verifying results..."
.text
.globl main
.type main, @function
main:
.LFB2339:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $136, %rsp
.cfi_def_cfa_offset 192
movl %edi, %ebx
movq %rsi, %rbp
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
cmpl $2, %ebx
je .L123
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L123:
movq 8(%rbp), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r12
movl %eax, %r15d
movslq %eax, %rbx
salq $2, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rbp
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r13
movl $404, %edi
call malloc@PLT
movq %rax, %r14
movl %r12d, %esi
movq %rbp, %rdi
call _Z7genDataPij
movq $0, 24(%rsp)
movq $0, 32(%rsp)
movq $0, 40(%rsp)
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $404, %esi
call cudaMalloc@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %rbp, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %r12d, %xmm0
mulss .LC5(%rip), %xmm0
call ceilf@PLT
cvttss2siq %xmm0, %r12
movl %r12d, 48(%rsp)
movl $1, 52(%rsp)
movl $1024, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L124
.L116:
movl $2, %ecx
movl $404, %edx
movq 40(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $101, 84(%rsp)
movl $1, 88(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 84(%rsp), %rdx
movl $1, %ecx
movq 72(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L125
.L118:
movl $2, %ecx
movl $404, %edx
movq 40(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
movl %r12d, 96(%rsp)
movl $1, 100(%rsp)
movl $1024, 108(%rsp)
movl $1, 112(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 108(%rsp), %rdx
movl $1, %ecx
movq 96(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L126
.L119:
movl $2, %ecx
movq %rbx, %rdx
movq 32(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movq 16(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 8(%rsp), %rdi
call cudaEventDestroy@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq stdout(%rip), %rdi
call fflush@PLT
movl %r15d, %edx
movq %r13, %rsi
movq %rbp, %rdi
call _Z6verifyPiS_i
movq stdout(%rip), %rdi
call fflush@PLT
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L127
movl $0, %eax
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L124:
.cfi_restore_state
movl %r15d, %edx
movq 40(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z39__device_stub__Z16make_count_tablePiS_iPiS_i
jmp .L116
.L125:
movq 40(%rsp), %rdi
call _Z37__device_stub__Z17make_offset_tablePiPi
jmp .L118
.L126:
movl %r15d, %ecx
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z28__device_stub__Z4sortPiS_S_iPiS_S_i
jmp .L119
.L127:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2339:
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC5:
.long 981467136
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include<algorithm>
#include <cuda.h>
using namespace std;
//INSERT CODE HERE---------------------------------
__global__ void make_count_table(int* src, int* count,int size){
__shared__ int dataShared[101];
for(int i =0;i<101;i++){
dataShared[i]=0;
}
int gx = blockIdx.x * blockDim.x + threadIdx.x,
tx = threadIdx.x;
if(gx<size){
atomicAdd(&dataShared[src[gx]],1);
}
__syncthreads();
if(tx<101)
atomicAdd(&count[tx],dataShared[tx]);
}
__global__ void make_offset_table(int* count){
__shared__ int src[101],dst[101];
int tx = threadIdx.x,
temp;
src[tx] = count[tx];
for(int stride=1;stride<101;stride*=2){
__syncthreads();
if(tx-stride>=0)
dst[tx] = src[tx] + src[tx-stride];
else
dst[tx] = src[tx];
temp=dst[tx];
dst[tx]=src[tx];
src[tx]=temp;
}
__syncthreads();
count[tx] = src[tx];
}
__global__ void sort(int* src,int* dst,int* offset,int size){
//__shared__ int OffsetShared[101];
int gx = blockIdx.x * blockDim.x + threadIdx.x;
int n;
/*if(tx<101)
OffsetShared[tx]=offset[tx];
__syncthreads();
*/
if(gx<size){
n=atomicSub(&offset[src[gx]],1);
n=n-1;
//printf("dst[%d] = src[%d]\n",n,gx);
dst[n]=src[gx];
}
}
void verify(int* src, int*result, int input_size){
sort(src, src+input_size);
long long match_cnt=0;
for(int i=0; i<input_size;i++)
{
if(src[i]==result[i])
match_cnt++;
}
if(match_cnt==input_size)
printf("TEST PASSED\n\n");
else
printf("TEST FAILED\n\n");
}
void genData(int* ptr, unsigned int size) {
while (size--) {
*ptr++ = (int)(rand() % 101);
}
}
int main(int argc, char* argv[]) {
int* pSource = NULL;
int* pResult = NULL;
int* pCount = NULL;
int input_size=0;
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
if (argc == 2)
input_size=atoi(argv[1]);
else
{
printf("\n Invalid input parameters!"
"\n Usage: ./sort <input_size>"
"\n");
exit(0);
}
//allocate host memory
pSource=(int*)malloc(input_size*sizeof(int));
pResult=(int*)malloc(input_size*sizeof(int));
pCount=(int*)malloc(101*sizeof(int));
// generate source data
genData(pSource, input_size);
/* for(int i=0;i<input_size;i++)
printf("pSource[%d] = %d\n",i,pSource[i]);*/
//allocate device memory
int* pSourceDev = NULL;
int* pResultDev = NULL;
int* pCountDev = NULL;
cudaMalloc((void**)&pSourceDev,input_size*sizeof(int));
cudaMalloc((void**)&pResultDev,input_size*sizeof(int));
cudaMalloc((void**)&pCountDev,101*sizeof(int));
// start timer
cudaEventRecord(start, 0);
cudaMemcpy(pSourceDev, pSource, input_size * sizeof(int), cudaMemcpyHostToDevice);
dim3 dimGrid(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock(1024,1,1);
make_count_table<<<dimGrid,dimBlock>>>(pSourceDev,pCountDev,input_size);
cudaMemcpy(pCount,pCountDev,101*sizeof(int),cudaMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Count[%d] = %d\n",i,pCount[i]);
}*/
dim3 dimGrid2(1,1,1);
dim3 dimBlock2(101,1,1);
make_offset_table<<<dimGrid2,dimBlock2>>>(pCountDev);
cudaMemcpy(pCount,pCountDev,101*sizeof(int),cudaMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Offset[%d] = %d\n",i,pCount[i]);
}*/
//cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
dim3 dimGrid3(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock3(1024,1,1);
sort<<<dimGrid3,dimBlock3>>>(pSourceDev,pResultDev,pCountDev,input_size);
cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
/*for(int i=0;i<input_size;i++)
printf("Reslut[%d]= %d\n",i,pResult[i]);
*/
//INSERT CODE HERE--------------------
// end timer
float time;
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time, start, stop);
printf("elapsed time = %f msec\n", time);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("Verifying results..."); fflush(stdout);
verify(pSource, pResult, input_size);
fflush(stdout);
/*for( int i=0;i<input_size;i++){
printf("index %d : %d %d \n",i,pSource[i],pResult[i]);
}*/
} | #include <stdio.h>
#include <stdlib.h>
#include<algorithm>
#include <hip/hip_runtime.h>
using namespace std;
//INSERT CODE HERE---------------------------------
__global__ void make_count_table(int* src, int* count,int size){
__shared__ int dataShared[101];
for(int i =0;i<101;i++){
dataShared[i]=0;
}
int gx = blockIdx.x * blockDim.x + threadIdx.x,
tx = threadIdx.x;
if(gx<size){
atomicAdd(&dataShared[src[gx]],1);
}
__syncthreads();
if(tx<101)
atomicAdd(&count[tx],dataShared[tx]);
}
__global__ void make_offset_table(int* count){
__shared__ int src[101],dst[101];
int tx = threadIdx.x,
temp;
src[tx] = count[tx];
for(int stride=1;stride<101;stride*=2){
__syncthreads();
if(tx-stride>=0)
dst[tx] = src[tx] + src[tx-stride];
else
dst[tx] = src[tx];
temp=dst[tx];
dst[tx]=src[tx];
src[tx]=temp;
}
__syncthreads();
count[tx] = src[tx];
}
__global__ void sort(int* src,int* dst,int* offset,int size){
//__shared__ int OffsetShared[101];
int gx = blockIdx.x * blockDim.x + threadIdx.x;
int n;
/*if(tx<101)
OffsetShared[tx]=offset[tx];
__syncthreads();
*/
if(gx<size){
n=atomicSub(&offset[src[gx]],1);
n=n-1;
//printf("dst[%d] = src[%d]\n",n,gx);
dst[n]=src[gx];
}
}
void verify(int* src, int*result, int input_size){
sort(src, src+input_size);
long long match_cnt=0;
for(int i=0; i<input_size;i++)
{
if(src[i]==result[i])
match_cnt++;
}
if(match_cnt==input_size)
printf("TEST PASSED\n\n");
else
printf("TEST FAILED\n\n");
}
void genData(int* ptr, unsigned int size) {
while (size--) {
*ptr++ = (int)(rand() % 101);
}
}
int main(int argc, char* argv[]) {
int* pSource = NULL;
int* pResult = NULL;
int* pCount = NULL;
int input_size=0;
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
if (argc == 2)
input_size=atoi(argv[1]);
else
{
printf("\n Invalid input parameters!"
"\n Usage: ./sort <input_size>"
"\n");
exit(0);
}
//allocate host memory
pSource=(int*)malloc(input_size*sizeof(int));
pResult=(int*)malloc(input_size*sizeof(int));
pCount=(int*)malloc(101*sizeof(int));
// generate source data
genData(pSource, input_size);
/* for(int i=0;i<input_size;i++)
printf("pSource[%d] = %d\n",i,pSource[i]);*/
//allocate device memory
int* pSourceDev = NULL;
int* pResultDev = NULL;
int* pCountDev = NULL;
hipMalloc((void**)&pSourceDev,input_size*sizeof(int));
hipMalloc((void**)&pResultDev,input_size*sizeof(int));
hipMalloc((void**)&pCountDev,101*sizeof(int));
// start timer
hipEventRecord(start, 0);
hipMemcpy(pSourceDev, pSource, input_size * sizeof(int), hipMemcpyHostToDevice);
dim3 dimGrid(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock(1024,1,1);
make_count_table<<<dimGrid,dimBlock>>>(pSourceDev,pCountDev,input_size);
hipMemcpy(pCount,pCountDev,101*sizeof(int),hipMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Count[%d] = %d\n",i,pCount[i]);
}*/
dim3 dimGrid2(1,1,1);
dim3 dimBlock2(101,1,1);
make_offset_table<<<dimGrid2,dimBlock2>>>(pCountDev);
hipMemcpy(pCount,pCountDev,101*sizeof(int),hipMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Offset[%d] = %d\n",i,pCount[i]);
}*/
//cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
dim3 dimGrid3(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock3(1024,1,1);
sort<<<dimGrid3,dimBlock3>>>(pSourceDev,pResultDev,pCountDev,input_size);
hipMemcpy(pResult, pResultDev, input_size * sizeof(int), hipMemcpyDeviceToHost);
/*for(int i=0;i<input_size;i++)
printf("Reslut[%d]= %d\n",i,pResult[i]);
*/
//INSERT CODE HERE--------------------
// end timer
float time;
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
hipEventElapsedTime(&time, start, stop);
printf("elapsed time = %f msec\n", time);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("Verifying results..."); fflush(stdout);
verify(pSource, pResult, input_size);
fflush(stdout);
/*for( int i=0;i<input_size;i++){
printf("index %d : %d %d \n",i,pSource[i],pResult[i]);
}*/
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include<algorithm>
#include <hip/hip_runtime.h>
using namespace std;
//INSERT CODE HERE---------------------------------
__global__ void make_count_table(int* src, int* count,int size){
__shared__ int dataShared[101];
for(int i =0;i<101;i++){
dataShared[i]=0;
}
int gx = blockIdx.x * blockDim.x + threadIdx.x,
tx = threadIdx.x;
if(gx<size){
atomicAdd(&dataShared[src[gx]],1);
}
__syncthreads();
if(tx<101)
atomicAdd(&count[tx],dataShared[tx]);
}
__global__ void make_offset_table(int* count){
__shared__ int src[101],dst[101];
int tx = threadIdx.x,
temp;
src[tx] = count[tx];
for(int stride=1;stride<101;stride*=2){
__syncthreads();
if(tx-stride>=0)
dst[tx] = src[tx] + src[tx-stride];
else
dst[tx] = src[tx];
temp=dst[tx];
dst[tx]=src[tx];
src[tx]=temp;
}
__syncthreads();
count[tx] = src[tx];
}
__global__ void sort(int* src,int* dst,int* offset,int size){
//__shared__ int OffsetShared[101];
int gx = blockIdx.x * blockDim.x + threadIdx.x;
int n;
/*if(tx<101)
OffsetShared[tx]=offset[tx];
__syncthreads();
*/
if(gx<size){
n=atomicSub(&offset[src[gx]],1);
n=n-1;
//printf("dst[%d] = src[%d]\n",n,gx);
dst[n]=src[gx];
}
}
void verify(int* src, int*result, int input_size){
sort(src, src+input_size);
long long match_cnt=0;
for(int i=0; i<input_size;i++)
{
if(src[i]==result[i])
match_cnt++;
}
if(match_cnt==input_size)
printf("TEST PASSED\n\n");
else
printf("TEST FAILED\n\n");
}
void genData(int* ptr, unsigned int size) {
while (size--) {
*ptr++ = (int)(rand() % 101);
}
}
int main(int argc, char* argv[]) {
int* pSource = NULL;
int* pResult = NULL;
int* pCount = NULL;
int input_size=0;
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
if (argc == 2)
input_size=atoi(argv[1]);
else
{
printf("\n Invalid input parameters!"
"\n Usage: ./sort <input_size>"
"\n");
exit(0);
}
//allocate host memory
pSource=(int*)malloc(input_size*sizeof(int));
pResult=(int*)malloc(input_size*sizeof(int));
pCount=(int*)malloc(101*sizeof(int));
// generate source data
genData(pSource, input_size);
/* for(int i=0;i<input_size;i++)
printf("pSource[%d] = %d\n",i,pSource[i]);*/
//allocate device memory
int* pSourceDev = NULL;
int* pResultDev = NULL;
int* pCountDev = NULL;
hipMalloc((void**)&pSourceDev,input_size*sizeof(int));
hipMalloc((void**)&pResultDev,input_size*sizeof(int));
hipMalloc((void**)&pCountDev,101*sizeof(int));
// start timer
hipEventRecord(start, 0);
hipMemcpy(pSourceDev, pSource, input_size * sizeof(int), hipMemcpyHostToDevice);
dim3 dimGrid(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock(1024,1,1);
make_count_table<<<dimGrid,dimBlock>>>(pSourceDev,pCountDev,input_size);
hipMemcpy(pCount,pCountDev,101*sizeof(int),hipMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Count[%d] = %d\n",i,pCount[i]);
}*/
dim3 dimGrid2(1,1,1);
dim3 dimBlock2(101,1,1);
make_offset_table<<<dimGrid2,dimBlock2>>>(pCountDev);
hipMemcpy(pCount,pCountDev,101*sizeof(int),hipMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Offset[%d] = %d\n",i,pCount[i]);
}*/
//cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
dim3 dimGrid3(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock3(1024,1,1);
sort<<<dimGrid3,dimBlock3>>>(pSourceDev,pResultDev,pCountDev,input_size);
hipMemcpy(pResult, pResultDev, input_size * sizeof(int), hipMemcpyDeviceToHost);
/*for(int i=0;i<input_size;i++)
printf("Reslut[%d]= %d\n",i,pResult[i]);
*/
//INSERT CODE HERE--------------------
// end timer
float time;
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
hipEventElapsedTime(&time, start, stop);
printf("elapsed time = %f msec\n", time);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("Verifying results..."); fflush(stdout);
verify(pSource, pResult, input_size);
fflush(stdout);
/*for( int i=0;i<input_size;i++){
printf("index %d : %d %d \n",i,pSource[i],pResult[i]);
}*/
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16make_count_tablePiS_i
.globl _Z16make_count_tablePiS_i
.p2align 8
.type _Z16make_count_tablePiS_i,@function
_Z16make_count_tablePiS_i:
v_mov_b32_e32 v1, 0
s_mov_b32 s2, 0
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v2, s2
s_add_i32 s2, s2, 4
s_cmpk_eq_i32 s2, 0x194
ds_store_b32 v2, v1
s_cbranch_scc0 .LBB0_1
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_4
s_load_b64 s[4:5], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
v_dual_mov_b32 v2, 1 :: v_dual_lshlrev_b32 v1, 2, v1
ds_add_u32 v1, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 0x65, v0
s_cbranch_execz .LBB0_6
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x8
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16make_count_tablePiS_i
.amdhsa_group_segment_fixed_size 404
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16make_count_tablePiS_i, .Lfunc_end0-_Z16make_count_tablePiS_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z17make_offset_tablePi
.globl _Z17make_offset_tablePi
.p2align 8
.type _Z17make_offset_tablePi,@function
_Z17make_offset_tablePi:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, 0x1a0, v3
s_waitcnt lgkmcnt(0)
global_load_b32 v5, v3, s[0:1]
v_add_co_u32 v1, s0, s0, v3
v_add_co_ci_u32_e64 v2, null, s1, 0, s0
s_mov_b32 s0, 1
s_waitcnt vmcnt(0)
ds_store_b32 v3, v5 offset:416
s_set_inst_prefetch_distance 0x1
s_branch .LBB1_2
.p2align 6
.LBB1_1:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
ds_load_b32 v5, v4
ds_load_b32 v6, v3
s_lshl_b32 s1, s0, 1
s_cmp_gt_u32 s0, 50
s_mov_b32 s0, s1
s_waitcnt lgkmcnt(1)
ds_store_b32 v3, v5
s_waitcnt lgkmcnt(1)
ds_store_b32 v4, v6
s_cbranch_scc1 .LBB1_6
.LBB1_2:
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v5, v4
v_subrev_nc_u32_e32 v6, s0, v0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0, v6
s_xor_b32 s1, exec_lo, s1
s_cbranch_execz .LBB1_4
s_waitcnt lgkmcnt(0)
ds_store_b32 v3, v5
.LBB1_4:
s_and_not1_saveexec_b32 s1, s1
s_cbranch_execz .LBB1_1
v_lshlrev_b32_e32 v6, 2, v6
ds_load_b32 v6, v6 offset:416
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v5, v6, v5
ds_store_b32 v3, v5
s_branch .LBB1_1
.LBB1_6:
s_set_inst_prefetch_distance 0x2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v0, v4
s_waitcnt lgkmcnt(0)
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z17make_offset_tablePi
.amdhsa_group_segment_fixed_size 820
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 8
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 2
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z17make_offset_tablePi, .Lfunc_end1-_Z17make_offset_tablePi
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z4sortPiS_S_i
.globl _Z4sortPiS_S_i
.p2align 8
.type _Z4sortPiS_S_i,@function
_Z4sortPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB2_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v4, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_atomic_add_u32 v2, v[2:3], v4, off glc
global_load_b32 v4, v[0:1], off
s_waitcnt vmcnt(1)
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off offset:-4
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4sortPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z4sortPiS_S_i, .Lfunc_end2-_Z4sortPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 404
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16make_count_tablePiS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16make_count_tablePiS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 820
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z17make_offset_tablePi
.private_segment_fixed_size: 0
.sgpr_count: 2
.sgpr_spill_count: 0
.symbol: _Z17make_offset_tablePi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4sortPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z4sortPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include<algorithm>
#include <hip/hip_runtime.h>
using namespace std;
//INSERT CODE HERE---------------------------------
__global__ void make_count_table(int* src, int* count,int size){
__shared__ int dataShared[101];
for(int i =0;i<101;i++){
dataShared[i]=0;
}
int gx = blockIdx.x * blockDim.x + threadIdx.x,
tx = threadIdx.x;
if(gx<size){
atomicAdd(&dataShared[src[gx]],1);
}
__syncthreads();
if(tx<101)
atomicAdd(&count[tx],dataShared[tx]);
}
__global__ void make_offset_table(int* count){
__shared__ int src[101],dst[101];
int tx = threadIdx.x,
temp;
src[tx] = count[tx];
for(int stride=1;stride<101;stride*=2){
__syncthreads();
if(tx-stride>=0)
dst[tx] = src[tx] + src[tx-stride];
else
dst[tx] = src[tx];
temp=dst[tx];
dst[tx]=src[tx];
src[tx]=temp;
}
__syncthreads();
count[tx] = src[tx];
}
__global__ void sort(int* src,int* dst,int* offset,int size){
//__shared__ int OffsetShared[101];
int gx = blockIdx.x * blockDim.x + threadIdx.x;
int n;
/*if(tx<101)
OffsetShared[tx]=offset[tx];
__syncthreads();
*/
if(gx<size){
n=atomicSub(&offset[src[gx]],1);
n=n-1;
//printf("dst[%d] = src[%d]\n",n,gx);
dst[n]=src[gx];
}
}
void verify(int* src, int*result, int input_size){
sort(src, src+input_size);
long long match_cnt=0;
for(int i=0; i<input_size;i++)
{
if(src[i]==result[i])
match_cnt++;
}
if(match_cnt==input_size)
printf("TEST PASSED\n\n");
else
printf("TEST FAILED\n\n");
}
void genData(int* ptr, unsigned int size) {
while (size--) {
*ptr++ = (int)(rand() % 101);
}
}
int main(int argc, char* argv[]) {
int* pSource = NULL;
int* pResult = NULL;
int* pCount = NULL;
int input_size=0;
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
if (argc == 2)
input_size=atoi(argv[1]);
else
{
printf("\n Invalid input parameters!"
"\n Usage: ./sort <input_size>"
"\n");
exit(0);
}
//allocate host memory
pSource=(int*)malloc(input_size*sizeof(int));
pResult=(int*)malloc(input_size*sizeof(int));
pCount=(int*)malloc(101*sizeof(int));
// generate source data
genData(pSource, input_size);
/* for(int i=0;i<input_size;i++)
printf("pSource[%d] = %d\n",i,pSource[i]);*/
//allocate device memory
int* pSourceDev = NULL;
int* pResultDev = NULL;
int* pCountDev = NULL;
hipMalloc((void**)&pSourceDev,input_size*sizeof(int));
hipMalloc((void**)&pResultDev,input_size*sizeof(int));
hipMalloc((void**)&pCountDev,101*sizeof(int));
// start timer
hipEventRecord(start, 0);
hipMemcpy(pSourceDev, pSource, input_size * sizeof(int), hipMemcpyHostToDevice);
dim3 dimGrid(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock(1024,1,1);
make_count_table<<<dimGrid,dimBlock>>>(pSourceDev,pCountDev,input_size);
hipMemcpy(pCount,pCountDev,101*sizeof(int),hipMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Count[%d] = %d\n",i,pCount[i]);
}*/
dim3 dimGrid2(1,1,1);
dim3 dimBlock2(101,1,1);
make_offset_table<<<dimGrid2,dimBlock2>>>(pCountDev);
hipMemcpy(pCount,pCountDev,101*sizeof(int),hipMemcpyDeviceToHost);
/*for(int i=0;i<101;i++){
printf("Offset[%d] = %d\n",i,pCount[i]);
}*/
//cudaMemcpy(pResult, pResultDev, input_size * sizeof(int), cudaMemcpyDeviceToHost);
dim3 dimGrid3(ceil((float)input_size/(float)1024),1,1);
dim3 dimBlock3(1024,1,1);
sort<<<dimGrid3,dimBlock3>>>(pSourceDev,pResultDev,pCountDev,input_size);
hipMemcpy(pResult, pResultDev, input_size * sizeof(int), hipMemcpyDeviceToHost);
/*for(int i=0;i<input_size;i++)
printf("Reslut[%d]= %d\n",i,pResult[i]);
*/
//INSERT CODE HERE--------------------
// end timer
float time;
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
hipEventElapsedTime(&time, start, stop);
printf("elapsed time = %f msec\n", time);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("Verifying results..."); fflush(stdout);
verify(pSource, pResult, input_size);
fflush(stdout);
/*for( int i=0;i<input_size;i++){
printf("index %d : %d %d \n",i,pSource[i],pResult[i]);
}*/
} | .text
.file "sort.hip"
.globl _Z31__device_stub__make_count_tablePiS_i # -- Begin function _Z31__device_stub__make_count_tablePiS_i
.p2align 4, 0x90
.type _Z31__device_stub__make_count_tablePiS_i,@function
_Z31__device_stub__make_count_tablePiS_i: # @_Z31__device_stub__make_count_tablePiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16make_count_tablePiS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z31__device_stub__make_count_tablePiS_i, .Lfunc_end0-_Z31__device_stub__make_count_tablePiS_i
.cfi_endproc
# -- End function
.globl _Z32__device_stub__make_offset_tablePi # -- Begin function _Z32__device_stub__make_offset_tablePi
.p2align 4, 0x90
.type _Z32__device_stub__make_offset_tablePi,@function
_Z32__device_stub__make_offset_tablePi: # @_Z32__device_stub__make_offset_tablePi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z17make_offset_tablePi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end1:
.size _Z32__device_stub__make_offset_tablePi, .Lfunc_end1-_Z32__device_stub__make_offset_tablePi
.cfi_endproc
# -- End function
.globl _Z19__device_stub__sortPiS_S_i # -- Begin function _Z19__device_stub__sortPiS_S_i
.p2align 4, 0x90
.type _Z19__device_stub__sortPiS_S_i,@function
_Z19__device_stub__sortPiS_S_i: # @_Z19__device_stub__sortPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z4sortPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z19__device_stub__sortPiS_S_i, .Lfunc_end2-_Z19__device_stub__sortPiS_S_i
.cfi_endproc
# -- End function
.globl _Z6verifyPiS_i # -- Begin function _Z6verifyPiS_i
.p2align 4, 0x90
.type _Z6verifyPiS_i,@function
_Z6verifyPiS_i: # @_Z6verifyPiS_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movq %rsi, %rbx
movq %rdi, %r14
movslq %edx, %r12
testl %r12d, %r12d
je .LBB3_2
# %bb.1:
leaq (%r14,%r12,4), %r15
bsrq %r12, %rax
xorl $63, %eax
addl %eax, %eax
movl $126, %edx
subq %rax, %rdx
movq %r14, %rdi
movq %r15, %rsi
callq _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
movq %r14, %rdi
movq %r15, %rsi
callq _ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.LBB3_2: # %_ZSt4sortIPiEvT_S1_.exit
testl %ebp, %ebp
jle .LBB3_3
# %bb.5: # %.lr.ph.preheader
movl %ebp, %ecx
xorl %edx, %edx
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_6: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%r14,%rdx,4), %esi
xorl %edi, %edi
cmpl (%rbx,%rdx,4), %esi
sete %dil
addq %rdi, %rax
incq %rdx
cmpq %rdx, %rcx
jne .LBB3_6
jmp .LBB3_4
.LBB3_3:
xorl %eax, %eax
.LBB3_4: # %._crit_edge
cmpq %r12, %rax
movl $.Lstr.1, %eax
movl $.Lstr, %edi
cmoveq %rax, %rdi
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp puts@PLT # TAILCALL
.Lfunc_end3:
.size _Z6verifyPiS_i, .Lfunc_end3-_Z6verifyPiS_i
.cfi_endproc
# -- End function
.globl _Z7genDataPij # -- Begin function _Z7genDataPij
.p2align 4, 0x90
.type _Z7genDataPij,@function
_Z7genDataPij: # @_Z7genDataPij
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB4_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $680390859, %rax, %rcx # imm = 0x288DF0CB
movq %rcx, %rdx
shrq $63, %rdx
sarq $36, %rcx
addl %edx, %ecx
imull $101, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
cmpl %r15d, %r14d
jne .LBB4_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB4_4: # %._crit_edge
retq
.Lfunc_end4:
.size _Z7genDataPij, .Lfunc_end4-_Z7genDataPij
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI5_0:
.long 0x3a800000 # float 9.765625E-4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
leaq 96(%rsp), %rdi
callq hipEventCreate
leaq 80(%rsp), %rdi
callq hipEventCreate
cmpl $2, %ebp
jne .LBB5_17
# %bb.1:
movq 8(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movslq %r15d, %r13
leaq (,%r13,4), %r12
movq %r12, %rdi
callq malloc
movq %rax, %rbx
movq %r12, %rdi
callq malloc
movq %rax, %r14
movl $404, %edi # imm = 0x194
callq malloc
movq %rax, 168(%rsp) # 8-byte Spill
movq %r13, 176(%rsp) # 8-byte Spill
testl %r13d, %r13d
je .LBB5_4
# %bb.2: # %.lr.ph.i.preheader
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_3: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $680390859, %rax, %rcx # imm = 0x288DF0CB
movq %rcx, %rdx
shrq $63, %rdx
sarq $36, %rcx
addl %edx, %ecx
imull $101, %ecx, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r13,4)
incq %r13
cmpl %r13d, %r15d
jne .LBB5_3
.LBB5_4: # %_Z7genDataPij.exit
movabsq $4294968320, %rbp # imm = 0x100000400
movq $0, 72(%rsp)
movq $0, 88(%rsp)
movq $0, 8(%rsp)
leaq 72(%rsp), %rdi
movq %r12, %rsi
callq hipMalloc
leaq 88(%rsp), %rdi
movq %r12, %rsi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $404, %esi # imm = 0x194
callq hipMalloc
movq 96(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 72(%rsp), %rdi
movq %rbx, %rsi
movq %r12, %rdx
movl $1, %ecx
callq hipMemcpy
cvtsi2ss %r15d, %xmm0
mulss .LCPI5_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %rax
movl %eax, %eax
leaq (%rax,%rbp), %r13
addq $-1024, %r13 # imm = 0xFC00
movq %r13, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_6
# %bb.5:
movq 72(%rsp), %rax
movq 8(%rsp), %rcx
movq %rax, 48(%rsp)
movq %rcx, 40(%rsp)
movl %r15d, 104(%rsp)
leaq 48(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 24(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 112(%rsp), %rcx
callq __hipPopCallConfiguration
movq 24(%rsp), %rsi
movl 32(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z16make_count_tablePiS_i, %edi
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_6:
movq 8(%rsp), %rsi
movl $404, %edx # imm = 0x194
movq 168(%rsp), %rbp # 8-byte Reload
movq %rbp, %rdi
movl $2, %ecx
callq hipMemcpy
movabsq $4294968320, %rax # imm = 0x100000400
leaq -1023(%rax), %rdi
leaq -923(%rax), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_8
# %bb.7:
movq 8(%rsp), %rax
movq %rax, 56(%rsp)
leaq 56(%rsp), %rax
movq %rax, 16(%rsp)
leaq 128(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z17make_offset_tablePi, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_8:
movq 8(%rsp), %rsi
movl $404, %edx # imm = 0x194
movq %rbp, %rdi
movl $2, %ecx
callq hipMemcpy
movq %r13, %rdi
movl $1, %esi
movabsq $4294968320, %rdx # imm = 0x100000400
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_10
# %bb.9:
movq 72(%rsp), %rax
movq 88(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 48(%rsp)
movq %rcx, 40(%rsp)
movq %rdx, 16(%rsp)
movl %r15d, 124(%rsp)
leaq 48(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 124(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 112(%rsp), %rdx
leaq 104(%rsp), %rcx
callq __hipPopCallConfiguration
movq 24(%rsp), %rsi
movl 32(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z4sortPiS_S_i, %edi
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
pushq 120(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_10:
movq 88(%rsp), %rsi
movq %r14, %rdi
movq %r12, %rdx
movl $2, %ecx
callq hipMemcpy
movq 80(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 80(%rsp), %rdi
callq hipEventSynchronize
movq 96(%rsp), %rsi
movq 80(%rsp), %rdx
leaq 128(%rsp), %rdi
callq hipEventElapsedTime
movss 128(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
movq 96(%rsp), %rdi
callq hipEventDestroy
movq 80(%rsp), %rdi
callq hipEventDestroy
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movq stdout(%rip), %rdi
callq fflush
testl %r15d, %r15d
movq 176(%rsp), %r13 # 8-byte Reload
je .LBB5_12
# %bb.11:
leaq (%rbx,%r13,4), %r12
bsrq %r13, %rax
xorl $63, %eax
addl %eax, %eax
movl $126, %edx
subq %rax, %rdx
movq %rbx, %rdi
movq %r12, %rsi
callq _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
movq %rbx, %rdi
movq %r12, %rsi
callq _ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.LBB5_12: # %_ZSt4sortIPiEvT_S1_.exit.i
testl %r15d, %r15d
jle .LBB5_13
# %bb.15: # %.lr.ph.preheader.i
movl %r15d, %ecx
xorl %edx, %edx
xorl %eax, %eax
.p2align 4, 0x90
.LBB5_16: # %.lr.ph.i57
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rdx,4), %esi
xorl %edi, %edi
cmpl (%r14,%rdx,4), %esi
sete %dil
addq %rdi, %rax
incq %rdx
cmpq %rdx, %rcx
jne .LBB5_16
jmp .LBB5_14
.LBB5_13:
xorl %eax, %eax
.LBB5_14: # %._crit_edge.i
cmpq %r13, %rax
movl $.Lstr.1, %eax
movl $.Lstr, %edi
cmoveq %rax, %rdi
callq puts@PLT
movq stdout(%rip), %rdi
callq fflush
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_17:
.cfi_def_cfa_offset 240
movl $.Lstr.2, %edi
callq puts@PLT
xorl %edi, %edi
callq exit
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.section .text._ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_,"axG",@progbits,_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_,comdat
.weak _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_ # -- Begin function _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
.p2align 4, 0x90
.type _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_,@function
_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_: # @_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r12
subq %rdi, %r12
cmpq $65, %r12
jl .LBB6_54
# %bb.1: # %.lr.ph
movq %rdx, %r14
movq %rdi, %rbx
leaq 4(%rdi), %r13
movq $-4, %rbp
subq %rdi, %rbp
jmp .LBB6_3
.p2align 4, 0x90
.LBB6_2: # %_ZSt27__unguarded_partition_pivotIPiN9__gnu_cxx5__ops15_Iter_less_iterEET_S4_S4_T0_.exit
# in Loop: Header=BB6_3 Depth=1
movq %r15, %rdi
movq %r14, %rdx
callq _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
movq %r15, %rsi
cmpq $64, %r12
jle .LBB6_54
.LBB6_3: # =>This Loop Header: Depth=1
# Child Loop BB6_16 Depth 2
# Child Loop BB6_17 Depth 3
# Child Loop BB6_19 Depth 3
subq $1, %r14
jb .LBB6_22
# %bb.4: # in Loop: Header=BB6_3 Depth=1
shrq $3, %r12
movl 4(%rbx), %ecx
movl (%rbx,%r12,4), %edx
movl -4(%rsi), %eax
cmpl %edx, %ecx
jge .LBB6_7
# %bb.5: # in Loop: Header=BB6_3 Depth=1
cmpl %eax, %edx
jge .LBB6_9
# %bb.6: # in Loop: Header=BB6_3 Depth=1
movl (%rbx), %eax
movl %edx, (%rbx)
movl %eax, (%rbx,%r12,4)
jmp .LBB6_15
.p2align 4, 0x90
.LBB6_7: # in Loop: Header=BB6_3 Depth=1
cmpl %eax, %ecx
jge .LBB6_11
# %bb.8: # in Loop: Header=BB6_3 Depth=1
movl (%rbx), %eax
movl %ecx, (%rbx)
movl %eax, 4(%rbx)
jmp .LBB6_15
.p2align 4, 0x90
.LBB6_9: # in Loop: Header=BB6_3 Depth=1
movl (%rbx), %edx
cmpl %eax, %ecx
jge .LBB6_13
# %bb.10: # in Loop: Header=BB6_3 Depth=1
movl %eax, (%rbx)
movl %edx, -4(%rsi)
jmp .LBB6_15
.p2align 4, 0x90
.LBB6_11: # in Loop: Header=BB6_3 Depth=1
movl (%rbx), %ecx
cmpl %eax, %edx
jge .LBB6_14
# %bb.12: # in Loop: Header=BB6_3 Depth=1
movl %eax, (%rbx)
movl %ecx, -4(%rsi)
jmp .LBB6_15
.LBB6_13: # in Loop: Header=BB6_3 Depth=1
movl %ecx, (%rbx)
movl %edx, 4(%rbx)
jmp .LBB6_15
.LBB6_14: # in Loop: Header=BB6_3 Depth=1
movl %edx, (%rbx)
movl %ecx, (%rbx,%r12,4)
.p2align 4, 0x90
.LBB6_15: # %_ZSt22__move_median_to_firstIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_S4_S4_T0_.exit.i.preheader
# in Loop: Header=BB6_3 Depth=1
movq %rsi, %rax
movq %r13, %rcx
.p2align 4, 0x90
.LBB6_16: # %_ZSt22__move_median_to_firstIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_S4_S4_T0_.exit.i
# Parent Loop BB6_3 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB6_17 Depth 3
# Child Loop BB6_19 Depth 3
movl (%rbx), %edx
leaq (%rcx,%rbp), %r12
.p2align 4, 0x90
.LBB6_17: # Parent Loop BB6_3 Depth=1
# Parent Loop BB6_16 Depth=2
# => This Inner Loop Header: Depth=3
movl (%rcx), %edi
addq $4, %rcx
addq $4, %r12
cmpl %edx, %edi
jl .LBB6_17
# %bb.18: # %.preheader.i.i.preheader
# in Loop: Header=BB6_16 Depth=2
leaq -4(%rcx), %r15
.p2align 4, 0x90
.LBB6_19: # %.preheader.i.i
# Parent Loop BB6_3 Depth=1
# Parent Loop BB6_16 Depth=2
# => This Inner Loop Header: Depth=3
movl -4(%rax), %r8d
addq $-4, %rax
cmpl %r8d, %edx
jl .LBB6_19
# %bb.20: # in Loop: Header=BB6_16 Depth=2
cmpq %rax, %r15
jae .LBB6_2
# %bb.21: # in Loop: Header=BB6_16 Depth=2
movl %r8d, (%r15)
movl %edi, (%rax)
jmp .LBB6_16
.LBB6_22:
movq %r12, %rdx
shrq $2, %rdx
leaq -2(%rdx), %rax
movq %rax, %rcx
shrq %rcx
leaq -1(%rdx), %rdi
shrq $63, %rdi
addq %rdi, %rdx
decq %rdx
sarq %rdx
sarq %rax
xorl %edi, %edi
jmp .LBB6_25
.p2align 4, 0x90
.LBB6_23: # in Loop: Header=BB6_25 Depth=1
movq %r9, %r10
.LBB6_24: # %_ZSt13__adjust_heapIPiliN9__gnu_cxx5__ops15_Iter_less_iterEEvT_T0_S5_T1_T2_.exit.i.i
# in Loop: Header=BB6_25 Depth=1
movl %r8d, (%rbx,%r10,4)
movq %rcx, %r8
subq $1, %r8
cmovbq %rdi, %r8
testq %rcx, %rcx
movq %r8, %rcx
je .LBB6_40
.LBB6_25: # =>This Loop Header: Depth=1
# Child Loop BB6_29 Depth 2
# Child Loop BB6_35 Depth 2
movl (%rbx,%rcx,4), %r8d
movq %rcx, %r9
cmpq %rcx, %rdx
jle .LBB6_31
# %bb.26: # %.lr.ph.i.i.i.preheader
# in Loop: Header=BB6_25 Depth=1
movq %rcx, %r10
jmp .LBB6_29
.p2align 4, 0x90
.LBB6_27: # %.lr.ph.i.i.i
# in Loop: Header=BB6_29 Depth=2
leaq 2(,%r10,2), %r9
.LBB6_28: # %.lr.ph.i.i.i
# in Loop: Header=BB6_29 Depth=2
movl (%rbx,%r9,4), %r11d
movl %r11d, (%rbx,%r10,4)
movq %r9, %r10
cmpq %rdx, %r9
jge .LBB6_31
.LBB6_29: # %.lr.ph.i.i.i
# Parent Loop BB6_25 Depth=1
# => This Inner Loop Header: Depth=2
leaq (%r10,%r10), %r9
movl 8(%rbx,%r9,4), %r11d
cmpl 4(%rbx,%r9,4), %r11d
jge .LBB6_27
# %bb.30: # in Loop: Header=BB6_29 Depth=2
leaq 1(,%r10,2), %r9
jmp .LBB6_28
.p2align 4, 0x90
.LBB6_31: # %._crit_edge.i.i.i
# in Loop: Header=BB6_25 Depth=1
testb $4, %r12b
jne .LBB6_34
# %bb.32: # %._crit_edge.i.i.i
# in Loop: Header=BB6_25 Depth=1
cmpq %rax, %r9
jne .LBB6_34
# %bb.33: # in Loop: Header=BB6_25 Depth=1
leaq (%r9,%r9), %r10
movl 4(%rbx,%r10,4), %r10d
movl %r10d, (%rbx,%r9,4)
leaq 1(,%r9,2), %r9
.LBB6_34: # in Loop: Header=BB6_25 Depth=1
cmpq %rcx, %r9
jle .LBB6_23
.p2align 4, 0x90
.LBB6_35: # %.lr.ph.i.i.i.i14
# Parent Loop BB6_25 Depth=1
# => This Inner Loop Header: Depth=2
leaq -1(%r9), %r10
shrq $63, %r10
addq %r9, %r10
decq %r10
sarq %r10
movl (%rbx,%r10,4), %r11d
cmpl %r8d, %r11d
jge .LBB6_23
# %bb.36: # in Loop: Header=BB6_35 Depth=2
movl %r11d, (%rbx,%r9,4)
movq %r10, %r9
cmpq %rcx, %r10
jg .LBB6_35
jmp .LBB6_24
.p2align 4, 0x90
.LBB6_38: # in Loop: Header=BB6_40 Depth=1
movq %rdx, %rdi
.LBB6_39: # %_ZSt10__pop_heapIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_S4_RT0_.exit.i.i
# in Loop: Header=BB6_40 Depth=1
movl %eax, (%rbx,%rdi,4)
cmpq $4, %rcx
jle .LBB6_54
.LBB6_40: # %.lr.ph.i.i
# =>This Loop Header: Depth=1
# Child Loop BB6_44 Depth 2
# Child Loop BB6_51 Depth 2
movl -4(%rsi), %eax
movl (%rbx), %ecx
movl %ecx, -4(%rsi)
addq $-4, %rsi
movq %rsi, %rcx
subq %rbx, %rcx
movq %rcx, %rdi
sarq $2, %rdi
cmpq $3, %rdi
jl .LBB6_46
# %bb.41: # %.lr.ph.i.i.i.i.preheader
# in Loop: Header=BB6_40 Depth=1
leaq -1(%rdi), %rdx
shrq $63, %rdx
leaq (%rdi,%rdx), %r8
decq %r8
sarq %r8
xorl %r9d, %r9d
jmp .LBB6_44
.p2align 4, 0x90
.LBB6_42: # %.lr.ph.i.i.i.i
# in Loop: Header=BB6_44 Depth=2
leaq 2(,%r9,2), %rdx
.LBB6_43: # %.lr.ph.i.i.i.i
# in Loop: Header=BB6_44 Depth=2
movl (%rbx,%rdx,4), %r10d
movl %r10d, (%rbx,%r9,4)
movq %rdx, %r9
cmpq %r8, %rdx
jge .LBB6_47
.LBB6_44: # %.lr.ph.i.i.i.i
# Parent Loop BB6_40 Depth=1
# => This Inner Loop Header: Depth=2
leaq (%r9,%r9), %rdx
movl 8(%rbx,%rdx,4), %r10d
cmpl 4(%rbx,%rdx,4), %r10d
jge .LBB6_42
# %bb.45: # in Loop: Header=BB6_44 Depth=2
leaq 1(,%r9,2), %rdx
jmp .LBB6_43
.p2align 4, 0x90
.LBB6_46: # in Loop: Header=BB6_40 Depth=1
xorl %edx, %edx
.LBB6_47: # %._crit_edge.i.i.i.i
# in Loop: Header=BB6_40 Depth=1
testb $4, %cl
jne .LBB6_50
# %bb.48: # in Loop: Header=BB6_40 Depth=1
addq $-2, %rdi
sarq %rdi
cmpq %rdi, %rdx
jne .LBB6_50
# %bb.49: # in Loop: Header=BB6_40 Depth=1
leaq (%rdx,%rdx), %rdi
movl 4(%rbx,%rdi,4), %edi
movl %edi, (%rbx,%rdx,4)
leaq 1(,%rdx,2), %rdx
.LBB6_50: # in Loop: Header=BB6_40 Depth=1
testq %rdx, %rdx
jle .LBB6_38
.p2align 4, 0x90
.LBB6_51: # %.lr.ph.i.i.i.i.i
# Parent Loop BB6_40 Depth=1
# => This Inner Loop Header: Depth=2
leaq -1(%rdx), %rdi
shrq $63, %rdi
addq %rdx, %rdi
decq %rdi
sarq %rdi
movl (%rbx,%rdi,4), %r8d
cmpl %eax, %r8d
jge .LBB6_38
# %bb.52: # in Loop: Header=BB6_51 Depth=2
movl %r8d, (%rbx,%rdx,4)
cmpq $2, %rdx
movq %rdi, %rdx
jg .LBB6_51
jmp .LBB6_39
.LBB6_54: # %_ZSt14__partial_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_S4_T0_.exit
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size _ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_, .Lfunc_end6-_ZSt16__introsort_loopIPilN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_T1_
.cfi_endproc
# -- End function
.section .text._ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_,"axG",@progbits,_ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_,comdat
.weak _ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_ # -- Begin function _ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.p2align 4, 0x90
.type _ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_,@function
_ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_: # @_ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movq %rdi, %r14
movq %rsi, %rax
subq %rdi, %rax
cmpq $65, %rax
jl .LBB7_12
# %bb.1:
leaq 4(%r14), %r13
movl $4, %r12d
movq %r13, (%rsp) # 8-byte Spill
movq %r14, %rbp
jmp .LBB7_6
.p2align 4, 0x90
.LBB7_2: # in Loop: Header=BB7_6 Depth=1
cmpq $5, %r12
jb .LBB7_10
# %bb.3: # in Loop: Header=BB7_6 Depth=1
movq (%rsp), %rdi # 8-byte Reload
movq %r14, %rsi
movq %r12, %rdx
callq memmove@PLT
.LBB7_4: # %_ZSt13move_backwardIPiS0_ET0_T_S2_S1_.exit.i
# in Loop: Header=BB7_6 Depth=1
movq %r14, %rax
.LBB7_5: # %_ZSt13move_backwardIPiS0_ET0_T_S2_S1_.exit.i
# in Loop: Header=BB7_6 Depth=1
movl %r15d, (%rax)
addq $4, %r12
addq $4, %r13
cmpq $64, %r12
je .LBB7_25
.LBB7_6: # =>This Loop Header: Depth=1
# Child Loop BB7_9 Depth 2
movq %rbp, %rcx
leaq (%r14,%r12), %rbp
movl (%r14,%r12), %r15d
movl (%r14), %edx
cmpl %edx, %r15d
jl .LBB7_2
# %bb.7: # in Loop: Header=BB7_6 Depth=1
movl (%rcx), %ecx
movq %rbp, %rax
cmpl %ecx, %r15d
jge .LBB7_5
# %bb.8: # %.lr.ph.i.i.preheader
# in Loop: Header=BB7_6 Depth=1
movq %r13, %rax
.p2align 4, 0x90
.LBB7_9: # %.lr.ph.i.i
# Parent Loop BB7_6 Depth=1
# => This Inner Loop Header: Depth=2
movl %ecx, (%rax)
movl -8(%rax), %ecx
addq $-4, %rax
cmpl %ecx, %r15d
jl .LBB7_9
jmp .LBB7_5
.LBB7_10: # in Loop: Header=BB7_6 Depth=1
movq %r14, %rax
cmpq $4, %r12
jne .LBB7_5
# %bb.11: # in Loop: Header=BB7_6 Depth=1
movl %edx, 4(%rcx)
jmp .LBB7_4
.LBB7_12:
cmpq %rbx, %r14
je .LBB7_31
# %bb.13:
leaq 4(%r14), %rax
cmpq %rbx, %rax
je .LBB7_31
# %bb.14: # %.lr.ph.i16.preheader
movq %r14, %r15
jmp .LBB7_19
.p2align 4, 0x90
.LBB7_15: # in Loop: Header=BB7_19 Depth=1
movq %r15, %rdx
subq %r14, %rdx
movq %rdx, %rax
sarq $2, %rax
cmpq $2, %rax
jl .LBB7_23
# %bb.16: # in Loop: Header=BB7_19 Depth=1
shlq $2, %rax
subq %rax, %rdi
addq $8, %rdi
movq %r14, %rsi
callq memmove@PLT
.LBB7_17: # %_ZSt13move_backwardIPiS0_ET0_T_S2_S1_.exit.i27
# in Loop: Header=BB7_19 Depth=1
movq %r14, %rax
.LBB7_18: # %_ZSt13move_backwardIPiS0_ET0_T_S2_S1_.exit.i27
# in Loop: Header=BB7_19 Depth=1
movl %ebp, (%rax)
leaq 4(%r15), %rax
cmpq %rbx, %rax
je .LBB7_31
.LBB7_19: # %.lr.ph.i16
# =>This Loop Header: Depth=1
# Child Loop BB7_22 Depth 2
movq %r15, %rdi
movq %rax, %r15
movl 4(%rdi), %ebp
movl (%r14), %ecx
cmpl %ecx, %ebp
jl .LBB7_15
# %bb.20: # in Loop: Header=BB7_19 Depth=1
movl (%rdi), %ecx
movq %r15, %rax
cmpl %ecx, %ebp
jge .LBB7_18
# %bb.21: # %.lr.ph.i.i23.preheader
# in Loop: Header=BB7_19 Depth=1
movq %r15, %rax
.p2align 4, 0x90
.LBB7_22: # %.lr.ph.i.i23
# Parent Loop BB7_19 Depth=1
# => This Inner Loop Header: Depth=2
movl %ecx, (%rax)
movl -8(%rax), %ecx
addq $-4, %rax
cmpl %ecx, %ebp
jl .LBB7_22
jmp .LBB7_18
.LBB7_23: # in Loop: Header=BB7_19 Depth=1
movq %r14, %rax
cmpq $4, %rdx
jne .LBB7_18
# %bb.24: # in Loop: Header=BB7_19 Depth=1
movl %ecx, 4(%rdi)
jmp .LBB7_17
.LBB7_25: # %_ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_.exit
addq $64, %r14
jmp .LBB7_27
.p2align 4, 0x90
.LBB7_26: # %_ZSt25__unguarded_linear_insertIPiN9__gnu_cxx5__ops14_Val_less_iterEEvT_T0_.exit.i8
# in Loop: Header=BB7_27 Depth=1
movl %eax, (%rdx)
addq $4, %r14
.LBB7_27: # %_ZSt16__insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_.exit
# =>This Loop Header: Depth=1
# Child Loop BB7_30 Depth 2
cmpq %rbx, %r14
je .LBB7_31
# %bb.28: # %.lr.ph.i
# in Loop: Header=BB7_27 Depth=1
movl -4(%r14), %ecx
movl (%r14), %eax
movq %r14, %rdx
cmpl %ecx, %eax
jge .LBB7_26
# %bb.29: # %.lr.ph.i.i11.preheader
# in Loop: Header=BB7_27 Depth=1
movq %r14, %rdx
.p2align 4, 0x90
.LBB7_30: # %.lr.ph.i.i11
# Parent Loop BB7_27 Depth=1
# => This Inner Loop Header: Depth=2
movl %ecx, (%rdx)
movl -8(%rdx), %ecx
addq $-4, %rdx
cmpl %ecx, %eax
jl .LBB7_30
jmp .LBB7_26
.LBB7_31: # %_ZSt26__unguarded_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_.exit
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size _ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_, .Lfunc_end7-_ZSt22__final_insertion_sortIPiN9__gnu_cxx5__ops15_Iter_less_iterEEvT_S4_T0_
.cfi_endproc
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB8_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB8_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16make_count_tablePiS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17make_offset_tablePi, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z4sortPiS_S_i, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end8:
.size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB9_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB9_2:
retq
.Lfunc_end9:
.size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16make_count_tablePiS_i,@object # @_Z16make_count_tablePiS_i
.section .rodata,"a",@progbits
.globl _Z16make_count_tablePiS_i
.p2align 3, 0x0
_Z16make_count_tablePiS_i:
.quad _Z31__device_stub__make_count_tablePiS_i
.size _Z16make_count_tablePiS_i, 8
.type _Z17make_offset_tablePi,@object # @_Z17make_offset_tablePi
.globl _Z17make_offset_tablePi
.p2align 3, 0x0
_Z17make_offset_tablePi:
.quad _Z32__device_stub__make_offset_tablePi
.size _Z17make_offset_tablePi, 8
.type _Z4sortPiS_S_i,@object # @_Z4sortPiS_S_i
.globl _Z4sortPiS_S_i
.p2align 3, 0x0
_Z4sortPiS_S_i:
.quad _Z19__device_stub__sortPiS_S_i
.size _Z4sortPiS_S_i, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "elapsed time = %f msec\n"
.size .L.str.3, 24
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Verifying results..."
.size .L.str.4, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16make_count_tablePiS_i"
.size .L__unnamed_1, 26
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z17make_offset_tablePi"
.size .L__unnamed_2, 24
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z4sortPiS_S_i"
.size .L__unnamed_3, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "TEST FAILED\n"
.size .Lstr, 13
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "TEST PASSED\n"
.size .Lstr.1, 13
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "\n Invalid input parameters!\n Usage: ./sort <input_size>"
.size .Lstr.2, 62
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__make_count_tablePiS_i
.addrsig_sym _Z32__device_stub__make_offset_tablePi
.addrsig_sym _Z19__device_stub__sortPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16make_count_tablePiS_i
.addrsig_sym _Z17make_offset_tablePi
.addrsig_sym _Z4sortPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4sortPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R2, R7, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0207 */
/*0090*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ MOV R11, 0xffffffff ; /* 0xffffffff000b7802 */
/* 0x000fe20000000f00 */
/*00b0*/ IMAD.WIDE R4, R4, R7, c[0x0][0x170] ; /* 0x00005c0004047625 */
/* 0x004fcc00078e0207 */
/*00c0*/ ATOMG.E.ADD.STRONG.GPU PT, R4, [R4.64], R11 ; /* 0x0000000b040479a8 */
/* 0x000ea800081ee1c4 */
/*00d0*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */
/* 0x000ee2000c1e1900 */
/*00e0*/ IADD3 R6, R4, -0x1, RZ ; /* 0xffffffff04067810 */
/* 0x004fca0007ffe0ff */
/*00f0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x168] ; /* 0x00005a0006067625 */
/* 0x000fca00078e0207 */
/*0100*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x008fe2000c101904 */
/*0110*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0120*/ BRA 0x120; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z17make_offset_tablePi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0040*/ IMAD.WIDE R2, R9, R2, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x001fca00078e0202 */
/*0050*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea2000c1e1900 */
/*0060*/ ISETP.GE.AND P1, PT, R9.reuse, 0x1, PT ; /* 0x000000010900780c */
/* 0x040fe40003f26270 */
/*0070*/ ISETP.GE.AND P0, PT, R9, 0x2, PT ; /* 0x000000020900780c */
/* 0x000fe20003f06270 */
/*0080*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x004fe80000004800 */
/*0090*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*00a0*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*00b0*/ @P1 LDS R7, [R9.X4+-0x4] ; /* 0xfffffc0009071984 */
/* 0x000e620000004800 */
/*00c0*/ MOV R5, R4 ; /* 0x0000000400057202 */
/* 0x001fc60000000f00 */
/*00d0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*00e0*/ @P1 IMAD.IADD R5, R4, 0x1, R7 ; /* 0x0000000104051824 */
/* 0x002fe200078e0207 */
/*00f0*/ ISETP.GE.AND P1, PT, R9, 0x4, PT ; /* 0x000000040900780c */
/* 0x000fc80003f26270 */
/*0100*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ LDS R6, [R9.X4] ; /* 0x0000000009067984 */
/* 0x000e280000004800 */
/*0130*/ @P0 LDS R7, [R9.X4+-0x8] ; /* 0xfffff80009070984 */
/* 0x000e620000004800 */
/*0140*/ IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff007224 */
/* 0x001fc600078e0006 */
/*0150*/ STS [R9.X4+0x194], R6 ; /* 0x0001940609007388 */
/* 0x000fe20000004800 */
/*0160*/ @P0 IADD3 R0, R6, R7, RZ ; /* 0x0000000706000210 */
/* 0x002fe40007ffe0ff */
/*0170*/ ISETP.GE.AND P0, PT, R9, 0x8, PT ; /* 0x000000080900780c */
/* 0x000fc60003f06270 */
/*0180*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x000fe80000004800 */
/*0190*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*01a0*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*01b0*/ @P1 LDS R7, [R9.X4+-0x10] ; /* 0xfffff00009071984 */
/* 0x000e620000004800 */
/*01c0*/ IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff057224 */
/* 0x001fc600078e0004 */
/*01d0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*01e0*/ @P1 IMAD.IADD R5, R4, 0x1, R7 ; /* 0x0000000104051824 */
/* 0x002fe200078e0207 */
/*01f0*/ ISETP.GE.AND P1, PT, R9, 0x10, PT ; /* 0x000000100900780c */
/* 0x000fc80003f26270 */
/*0200*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*0210*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0220*/ LDS R6, [R9.X4] ; /* 0x0000000009067984 */
/* 0x000e280000004800 */
/*0230*/ @P0 LDS R7, [R9.X4+-0x20] ; /* 0xffffe00009070984 */
/* 0x000e620000004800 */
/*0240*/ MOV R0, R6 ; /* 0x0000000600007202 */
/* 0x001fc60000000f00 */
/*0250*/ STS [R9.X4+0x194], R6 ; /* 0x0001940609007388 */
/* 0x000fe20000004800 */
/*0260*/ @P0 IMAD.IADD R0, R6, 0x1, R7 ; /* 0x0000000106000824 */
/* 0x002fe200078e0207 */
/*0270*/ ISETP.GE.AND P0, PT, R9, 0x20, PT ; /* 0x000000200900780c */
/* 0x000fc80003f06270 */
/*0280*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x000fe80000004800 */
/*0290*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02a0*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*02b0*/ @P1 LDS R7, [R9.X4+-0x40] ; /* 0xffffc00009071984 */
/* 0x000e620000004800 */
/*02c0*/ IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff057224 */
/* 0x001fc600078e0004 */
/*02d0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*02e0*/ @P1 IADD3 R5, R4, R7, RZ ; /* 0x0000000704051210 */
/* 0x002fe40007ffe0ff */
/*02f0*/ ISETP.GE.AND P1, PT, R9, 0x40, PT ; /* 0x000000400900780c */
/* 0x000fc60003f26270 */
/*0300*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*0310*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0320*/ LDS R6, [R9.X4] ; /* 0x0000000009067984 */
/* 0x000e280000004800 */
/*0330*/ @P0 LDS R7, [R9.X4+-0x80] ; /* 0xffff800009070984 */
/* 0x000e620000004800 */
/*0340*/ IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff007224 */
/* 0x001fc600078e0006 */
/*0350*/ STS [R9.X4+0x194], R6 ; /* 0x0001940609007388 */
/* 0x000fe20000004800 */
/*0360*/ @P0 IADD3 R0, R6, R7, RZ ; /* 0x0000000706000210 */
/* 0x002fca0007ffe0ff */
/*0370*/ STS [R9.X4], R0 ; /* 0x0000000009007388 */
/* 0x000fe80000004800 */
/*0380*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0390*/ LDS R4, [R9.X4] ; /* 0x0000000009047984 */
/* 0x000e280000004800 */
/*03a0*/ @P1 LDS R7, [R9.X4+-0x100] ; /* 0xffff000009071984 */
/* 0x000e620000004800 */
/*03b0*/ IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff057224 */
/* 0x001fc600078e0004 */
/*03c0*/ STS [R9.X4+0x194], R4 ; /* 0x0001940409007388 */
/* 0x000fe20000004800 */
/*03d0*/ @P1 IADD3 R5, R4, R7, RZ ; /* 0x0000000704051210 */
/* 0x002fca0007ffe0ff */
/*03e0*/ STS [R9.X4], R5 ; /* 0x0000000509007388 */
/* 0x000fe80000004800 */
/*03f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0400*/ LDS R7, [R9.X4] ; /* 0x0000000009077984 */
/* 0x000e280000004800 */
/*0410*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x001fe2000c101904 */
/*0420*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0430*/ BRA 0x430; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z16make_count_tablePiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ BSSY B0, 0x280 ; /* 0x0000024000007945 */
/* 0x000fe40003800000 */
/*0040*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e280000002100 */
/*0050*/ STS.128 [RZ], RZ ; /* 0x000000ffff007388 */
/* 0x000fe80000000c00 */
/*0060*/ STS.128 [0x10], RZ ; /* 0x000010ffff007388 */
/* 0x000fe80000000c00 */
/*0070*/ STS.128 [0x20], RZ ; /* 0x000020ffff007388 */
/* 0x000fe80000000c00 */
/*0080*/ STS.128 [0x30], RZ ; /* 0x000030ffff007388 */
/* 0x000fe80000000c00 */
/*0090*/ STS.128 [0x40], RZ ; /* 0x000040ffff007388 */
/* 0x000fe80000000c00 */
/*00a0*/ STS.128 [0x50], RZ ; /* 0x000050ffff007388 */
/* 0x000fe20000000c00 */
/*00b0*/ IMAD R2, R2, c[0x0][0x0], R7 ; /* 0x0000000002027a24 */
/* 0x001fe200078e0207 */
/*00c0*/ ISETP.GT.AND P1, PT, R7, 0x64, PT ; /* 0x000000640700780c */
/* 0x000fc40003f24270 */
/*00d0*/ STS.128 [0x60], RZ ; /* 0x000060ffff007388 */
/* 0x000fe40000000c00 */
/*00e0*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fe40003f06270 */
/*00f0*/ STS.128 [0x70], RZ ; /* 0x000070ffff007388 */
/* 0x000fe80000000c00 */
/*0100*/ STS.128 [0x80], RZ ; /* 0x000080ffff007388 */
/* 0x000fe80000000c00 */
/*0110*/ STS.128 [0x90], RZ ; /* 0x000090ffff007388 */
/* 0x000fe80000000c00 */
/*0120*/ STS.128 [0xa0], RZ ; /* 0x0000a0ffff007388 */
/* 0x000fe80000000c00 */
/*0130*/ STS.128 [0xb0], RZ ; /* 0x0000b0ffff007388 */
/* 0x000fe80000000c00 */
/*0140*/ STS.128 [0xc0], RZ ; /* 0x0000c0ffff007388 */
/* 0x000fe80000000c00 */
/*0150*/ STS.128 [0xd0], RZ ; /* 0x0000d0ffff007388 */
/* 0x000fe80000000c00 */
/*0160*/ STS.128 [0xe0], RZ ; /* 0x0000e0ffff007388 */
/* 0x000fe80000000c00 */
/*0170*/ STS.128 [0xf0], RZ ; /* 0x0000f0ffff007388 */
/* 0x000fe80000000c00 */
/*0180*/ STS.128 [0x100], RZ ; /* 0x000100ffff007388 */
/* 0x000fe80000000c00 */
/*0190*/ STS.128 [0x110], RZ ; /* 0x000110ffff007388 */
/* 0x000fe80000000c00 */
/*01a0*/ STS.128 [0x120], RZ ; /* 0x000120ffff007388 */
/* 0x000fe80000000c00 */
/*01b0*/ STS.128 [0x130], RZ ; /* 0x000130ffff007388 */
/* 0x000fe80000000c00 */
/*01c0*/ STS.128 [0x140], RZ ; /* 0x000140ffff007388 */
/* 0x000fe80000000c00 */
/*01d0*/ STS.128 [0x150], RZ ; /* 0x000150ffff007388 */
/* 0x000fe80000000c00 */
/*01e0*/ STS.128 [0x160], RZ ; /* 0x000160ffff007388 */
/* 0x000fe80000000c00 */
/*01f0*/ STS.128 [0x170], RZ ; /* 0x000170ffff007388 */
/* 0x000fe80000000c00 */
/*0200*/ STS.128 [0x180], RZ ; /* 0x000180ffff007388 */
/* 0x000fe80000000c00 */
/*0210*/ STS [0x190], RZ ; /* 0x000190ffff007388 */
/* 0x000fe20000000800 */
/*0220*/ @P0 BRA 0x270 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*0230*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fd400000001ff */
/*0240*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fcc00078e0203 */
/*0250*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0260*/ ATOMS.POPC.INC.32 RZ, [R2.X4+URZ] ; /* 0x0000000002ff7f8c */
/* 0x0041e4000d00403f */
/*0270*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0290*/ @P1 EXIT ; /* 0x000000000000194d */
/* 0x000fea0003800000 */
/*02a0*/ LDS R5, [R7.X4] ; /* 0x0000000007057984 */
/* 0x000e620000004800 */
/*02b0*/ MOV R2, 0x4 ; /* 0x0000000400027802 */
/* 0x001fca0000000f00 */
/*02c0*/ IMAD.WIDE R2, R7, R2, c[0x0][0x168] ; /* 0x00005a0007027625 */
/* 0x000fca00078e0202 */
/*02d0*/ RED.E.ADD.STRONG.GPU [R2.64], R5 ; /* 0x000000050200798e */
/* 0x002fe2000c10e184 */
/*02e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02f0*/ BRA 0x2f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16make_count_tablePiS_i
.globl _Z16make_count_tablePiS_i
.p2align 8
.type _Z16make_count_tablePiS_i,@function
_Z16make_count_tablePiS_i:
v_mov_b32_e32 v1, 0
s_mov_b32 s2, 0
.LBB0_1:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v2, s2
s_add_i32 s2, s2, 4
s_cmpk_eq_i32 s2, 0x194
ds_store_b32 v2, v1
s_cbranch_scc0 .LBB0_1
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_4
s_load_b64 s[4:5], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
v_dual_mov_b32 v2, 1 :: v_dual_lshlrev_b32 v1, 2, v1
ds_add_u32 v1, v2
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 0x65, v0
s_cbranch_execz .LBB0_6
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x8
ds_load_b32 v1, v0
s_waitcnt lgkmcnt(0)
global_atomic_add_u32 v0, v1, s[0:1]
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16make_count_tablePiS_i
.amdhsa_group_segment_fixed_size 404
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16make_count_tablePiS_i, .Lfunc_end0-_Z16make_count_tablePiS_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z17make_offset_tablePi
.globl _Z17make_offset_tablePi
.p2align 8
.type _Z17make_offset_tablePi,@function
_Z17make_offset_tablePi:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, 0x1a0, v3
s_waitcnt lgkmcnt(0)
global_load_b32 v5, v3, s[0:1]
v_add_co_u32 v1, s0, s0, v3
v_add_co_ci_u32_e64 v2, null, s1, 0, s0
s_mov_b32 s0, 1
s_waitcnt vmcnt(0)
ds_store_b32 v3, v5 offset:416
s_set_inst_prefetch_distance 0x1
s_branch .LBB1_2
.p2align 6
.LBB1_1:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt lgkmcnt(0)
ds_load_b32 v5, v4
ds_load_b32 v6, v3
s_lshl_b32 s1, s0, 1
s_cmp_gt_u32 s0, 50
s_mov_b32 s0, s1
s_waitcnt lgkmcnt(1)
ds_store_b32 v3, v5
s_waitcnt lgkmcnt(1)
ds_store_b32 v4, v6
s_cbranch_scc1 .LBB1_6
.LBB1_2:
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v5, v4
v_subrev_nc_u32_e32 v6, s0, v0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e32 0, v6
s_xor_b32 s1, exec_lo, s1
s_cbranch_execz .LBB1_4
s_waitcnt lgkmcnt(0)
ds_store_b32 v3, v5
.LBB1_4:
s_and_not1_saveexec_b32 s1, s1
s_cbranch_execz .LBB1_1
v_lshlrev_b32_e32 v6, 2, v6
ds_load_b32 v6, v6 offset:416
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v5, v6, v5
ds_store_b32 v3, v5
s_branch .LBB1_1
.LBB1_6:
s_set_inst_prefetch_distance 0x2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v0, v4
s_waitcnt lgkmcnt(0)
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z17make_offset_tablePi
.amdhsa_group_segment_fixed_size 820
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 8
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 2
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z17make_offset_tablePi, .Lfunc_end1-_Z17make_offset_tablePi
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z4sortPiS_S_i
.globl _Z4sortPiS_S_i
.p2align 8
.type _Z4sortPiS_S_i,@function
_Z4sortPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB2_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
v_mov_b32_e32 v4, -1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_atomic_add_u32 v2, v[2:3], v4, off glc
global_load_b32 v4, v[0:1], off
s_waitcnt vmcnt(1)
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v4, off offset:-4
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z4sortPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end2:
.size _Z4sortPiS_S_i, .Lfunc_end2-_Z4sortPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 404
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16make_count_tablePiS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16make_count_tablePiS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 820
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z17make_offset_tablePi
.private_segment_fixed_size: 0
.sgpr_count: 2
.sgpr_spill_count: 0
.symbol: _Z17make_offset_tablePi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z4sortPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z4sortPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <fstream>
#include <vector>
#include <unistd.h>
#include <string>
#include <stdio.h>
using std::cout;
using std::endl;
using std::vector;
using std::ifstream;
using std::swap;
using std::string;
using namespace std;
#define ALIVE 'X'
#define DEAD '-'
#define THREADS 512
__global__
void play_game(int rows, int cols, char d_current_gen[], char d_next_gen[]) {
int curr_cell = blockIdx.x * blockDim.x + threadIdx.x;
if (curr_cell < rows * cols) {
// Row and column indexes of current cell
int row_idx = curr_cell / cols;
int col_idx = curr_cell % cols;
int curr_nbr;
int nbr_row;
int nbr_col;
int num_alive = 0;
// Loop through to find every neighbour for the current cell
for (size_t i = row_idx - 1; i <= row_idx + 1; i++) {
for (size_t j = col_idx - 1; j <= col_idx + 1; j++) {
nbr_row = i;
nbr_col = j;
// Implementing world wrapping
if (nbr_row < 0) {
nbr_row += rows;
}
if (nbr_col < 0) {
nbr_col += cols;
}
if (nbr_row == rows) {
nbr_row = 0;
}
if (nbr_col == cols) {
nbr_col = 0;
}
// Formula for calculating the current neighbour
curr_nbr = nbr_row * cols + nbr_col;
// Continue if the neighbour == the current cell
if (curr_nbr == curr_cell) {
continue;
}
// Increment count of ALIVE neighbours if the neighbour is ALIVE
if (d_current_gen[curr_nbr] == ALIVE) {
num_alive++;
}
}
}
// If curr_cell is ALIVE
if (d_current_gen[curr_cell] == ALIVE) {
// If num live neighbours is < 2 or > 3, kill it
if (num_alive < 2 || num_alive > 3) {
d_next_gen[curr_cell] = DEAD;
// Else if num live neighbours == 2 || == 3
} else {
d_next_gen[curr_cell] = ALIVE;
}
// Else if curr_cell is DEAD
} else {
// If num live neighbours == 3, make it alive
if (num_alive == 3) {
d_next_gen[curr_cell] = ALIVE;
} else {
d_next_gen[curr_cell] = DEAD;
}
}
}
}
// Function for printing a grid
void print_grid(int rows, int cols, char grid[]) {
cout << "\n";
for (size_t i = 0; i < rows; i++) {
for (size_t j = 0; j < cols; j++) {
cout << grid[i * cols + j];
}
cout << "\n";
}
}
int main(int argc, char * argv[]) {
int opt;
int num_iterations = 1;
bool verbose = false;
string extension = ".txt";
// Reject the run if no file specified
if ((string(argv[argc - 1]).find(extension)) == std::string::npos) {
cout << "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n";
return EXIT_FAILURE;
}
while ((opt = getopt(argc, argv, "i:v:")) != -1) {
switch (opt) {
case 'i':
num_iterations = atoi(argv[2]);
break;
case 'v':
verbose = true;
break;
}
}
int rows = 0;
int cols = 0;
// Temporary vector to store unknown amount of characters from input file
vector<char> temp;
char c;
// Read in data to temp
ifstream fn;
fn.open(argv[argc - 1], ifstream::in);
while (!fn.eof()) {
// If a newline is reached, increment the number of rows
if (fn.peek() == '\n' || fn.peek() == '\r') {
rows++;
}
fn >> c;
temp.push_back(c);
}
fn.close();
// We need to increment rows again because it will not find a newline at the end of the file
rows++;
cols = temp.size() / rows;
// Declare array and memory allocation size.
int array_size = rows * cols;
const int ARRAY_BYTES = sizeof(char) * array_size;
// Host arrays and allocation of host memory
char * h_current_gen = (char *) malloc(ARRAY_BYTES);
char * h_next_gen = (char *) malloc(ARRAY_BYTES);
// Copy data from vector to host array.
for (size_t i = 0; i < array_size; i++) {
h_current_gen[i] = temp[i];
}
// // Printing out the initial state of the game
print_grid(rows, cols, h_current_gen);
// Device arrays
char * d_current_gen;
char * d_next_gen;
// Allocate GPU memory
cudaMalloc((void**) &d_current_gen, ARRAY_BYTES);
cudaMalloc((void**) &d_next_gen, ARRAY_BYTES);
// Transfer memory to the GPU
cudaMemcpy(d_current_gen, h_current_gen, ARRAY_BYTES,
cudaMemcpyHostToDevice);
// Loop for as many iterations as was specified (1 if unspecified)
for (size_t i = 0; i < num_iterations; i++) {
// Launch kernel
play_game<<<(array_size + THREADS - 1) / THREADS, THREADS>>>(rows, cols,
d_current_gen, d_next_gen);
// Synchronise threads
cudaDeviceSynchronize();
// Memcpy back to host and print the new generation if verbose was set
if (verbose) {
cudaMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES,
cudaMemcpyDeviceToHost);
print_grid(rows, cols, h_next_gen);
}
// Pass the memory of d_next_gen over to d_current_gen
swap(d_current_gen, d_next_gen);
}
// Transfer memory from GPU back to host
cudaMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES, cudaMemcpyDeviceToHost);
// Print final result of game only if verbose was not set
if (!verbose) {
print_grid(rows, cols, h_next_gen);
}
// Free CPU memory
free(h_current_gen);
free(h_next_gen);
// Free GPU memory
cudaFree(d_current_gen);
cudaFree(d_next_gen);
return EXIT_SUCCESS;
} | code for sm_80
Function : _Z9play_gameiiPcS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe40000000a00 */
/*0030*/ UIMAD UR4, UR5, UR4, URZ ; /* 0x00000004050472a4 */
/* 0x000fe2000f8e023f */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */
/* 0x000fda000bf06270 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IABS R5, c[0x0][0x164] ; /* 0x0000590000057a13 */
/* 0x000fe20000000000 */
/*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00a0*/ BSSY B1, 0xe70 ; /* 0x00000dc000017945 */
/* 0x000fe20003800000 */
/*00b0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*00c0*/ I2F.RP R4, R5 ; /* 0x0000000500047306 */
/* 0x000e300000209400 */
/*00d0*/ MUFU.RCP R4, R4 ; /* 0x0000000400047308 */
/* 0x001e240000001000 */
/*00e0*/ IADD3 R2, R4, 0xffffffe, RZ ; /* 0x0ffffffe04027810 */
/* 0x001fcc0007ffe0ff */
/*00f0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000064000021f000 */
/*0100*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x001fe400078e00ff */
/*0110*/ IMAD.MOV R6, RZ, RZ, -R3 ; /* 0x000000ffff067224 */
/* 0x002fc800078e0a03 */
/*0120*/ IMAD R7, R6, R5, RZ ; /* 0x0000000506077224 */
/* 0x000fe200078e02ff */
/*0130*/ IABS R6, R0 ; /* 0x0000000000067213 */
/* 0x000fc60000000000 */
/*0140*/ IMAD.HI.U32 R3, R3, R7, R2 ; /* 0x0000000703037227 */
/* 0x000fe200078e0002 */
/*0150*/ LOP3.LUT R2, R0, c[0x0][0x164], RZ, 0x3c, !PT ; /* 0x0000590000027a12 */
/* 0x000fc800078e3cff */
/*0160*/ ISETP.GE.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe20003f46270 */
/*0170*/ IMAD.HI.U32 R3, R3, R6, RZ ; /* 0x0000000603037227 */
/* 0x000fe200078e00ff */
/*0180*/ LOP3.LUT R2, RZ, c[0x0][0x164], RZ, 0x33, !PT ; /* 0x00005900ff027a12 */
/* 0x000fc600078e33ff */
/*0190*/ IMAD.MOV R4, RZ, RZ, -R3 ; /* 0x000000ffff047224 */
/* 0x000fc800078e0a03 */
/*01a0*/ IMAD R4, R5, R4, R6 ; /* 0x0000000405047224 */
/* 0x000fca00078e0206 */
/*01b0*/ ISETP.GT.U32.AND P1, PT, R5, R4, PT ; /* 0x000000040500720c */
/* 0x000fda0003f24070 */
/*01c0*/ @!P1 IMAD.IADD R4, R4, 0x1, -R5 ; /* 0x0000000104049824 */
/* 0x000fe200078e0a05 */
/*01d0*/ @!P1 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103039810 */
/* 0x000fc80007ffe0ff */
/*01e0*/ ISETP.GE.U32.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */
/* 0x000fda0003f06070 */
/*01f0*/ @P0 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103030810 */
/* 0x000fe40007ffe0ff */
/*0200*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x164], PT ; /* 0x00005900ff007a0c */
/* 0x000fc60003f05270 */
/*0210*/ @!P2 IMAD.MOV R3, RZ, RZ, -R3 ; /* 0x000000ffff03a224 */
/* 0x000fca00078e0a03 */
/*0220*/ SEL R3, R2, R3, !P0 ; /* 0x0000000302037207 */
/* 0x000fc80004000000 */
/*0230*/ IADD3 R11, R3.reuse, -0x1, RZ ; /* 0xffffffff030b7810 */
/* 0x040fe40007ffe0ff */
/*0240*/ IADD3 R8, R3, 0x1, RZ ; /* 0x0000000103087810 */
/* 0x000fc80007ffe0ff */
/*0250*/ ISETP.GT.U32.AND P1, PT, R11, R8, PT ; /* 0x000000080b00720c */
/* 0x000fda0003f24070 */
/*0260*/ @P1 BRA 0xe60 ; /* 0x00000bf000001947 */
/* 0x000fea0003800000 */
/*0270*/ ISETP.GE.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe20003f46270 */
/*0280*/ IMAD.IADD R3, R4, 0x1, -R5 ; /* 0x0000000104037824 */
/* 0x000fe200078e0a05 */
/*0290*/ ISETP.GT.U32.AND P1, PT, R5, R4.reuse, PT ; /* 0x000000040500720c */
/* 0x080fe20003f24070 */
/*02a0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*02b0*/ SHF.R.S32.HI R10, RZ, 0x1f, R11 ; /* 0x0000001fff0a7819 */
/* 0x000fe4000001140b */
/*02c0*/ SEL R3, R3, R4, !P1 ; /* 0x0000000403037207 */
/* 0x000fe40004800000 */
/*02d0*/ SHF.R.S32.HI R15, RZ, 0x1f, R8 ; /* 0x0000001fff0f7819 */
/* 0x000fca0000011408 */
/*02e0*/ @!P2 IMAD.MOV R3, RZ, RZ, -R3 ; /* 0x000000ffff03a224 */
/* 0x000fca00078e0a03 */
/*02f0*/ SEL R2, R2, R3, !P0 ; /* 0x0000000302027207 */
/* 0x000fc80004000000 */
/*0300*/ IADD3 R12, R2.reuse, 0x1, RZ ; /* 0x00000001020c7810 */
/* 0x040fe40007ffe0ff */
/*0310*/ IADD3 R13, R2, -0x1, RZ ; /* 0xffffffff020d7810 */
/* 0x000fe40007ffe0ff */
/*0320*/ SHF.R.S32.HI R14, RZ, 0x1f, R12 ; /* 0x0000001fff0e7819 */
/* 0x000fe4000001140c */
/*0330*/ SHF.R.S32.HI R17, RZ, 0x1f, R13 ; /* 0x0000001fff117819 */
/* 0x000fe4000001140d */
/*0340*/ ISETP.GT.U32.AND P0, PT, R13, R12, PT ; /* 0x0000000c0d00720c */
/* 0x000fe20003f04070 */
/*0350*/ BSSY B0, 0xe10 ; /* 0x00000ab000007945 */
/* 0x000fd80003800000 */
/*0360*/ @P0 BRA 0xe00 ; /* 0x00000a9000000947 */
/* 0x000fea0003800000 */
/*0370*/ ISETP.GE.U32.AND P1, PT, R13, R12, PT ; /* 0x0000000c0d00720c */
/* 0x000fe20003f26070 */
/*0380*/ BSSY B2, 0x580 ; /* 0x000001f000027945 */
/* 0x000fe20003800000 */
/*0390*/ SHF.R.S32.HI R2, RZ, 0x1f, R11 ; /* 0x0000001fff027819 */
/* 0x000fe2000001140b */
/*03a0*/ IMAD.MOV.U32 R21, RZ, RZ, R13 ; /* 0x000000ffff157224 */
/* 0x000fe200078e000d */
/*03b0*/ ISETP.GE.U32.AND.EX P1, PT, R17, R14, PT, P1 ; /* 0x0000000e1100720c */
/* 0x000fe20003f26110 */
/*03c0*/ IMAD.MOV.U32 R19, RZ, RZ, R17 ; /* 0x000000ffff137224 */
/* 0x000fe200078e0011 */
/*03d0*/ LOP3.LUT R2, R2, c[0x0][0x160], RZ, 0xc0, !PT ; /* 0x0000580002027a12 */
/* 0x000fe400078ec0ff */
/*03e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fc60003f0f070 */
/*03f0*/ IMAD.IADD R2, R2, 0x1, R11 ; /* 0x0000000102027824 */
/* 0x000fca00078e020b */
/*0400*/ ISETP.NE.AND P2, PT, R2, c[0x0][0x160], PT ; /* 0x0000580002007a0c */
/* 0x000fc80003f45270 */
/*0410*/ SEL R16, R2, RZ, P2 ; /* 0x000000ff02107207 */
/* 0x000fe20001000000 */
/*0420*/ @!P1 BRA 0x570 ; /* 0x0000014000009947 */
/* 0x000fea0003800000 */
/*0430*/ SHF.R.S32.HI R2, RZ, 0x1f, R21 ; /* 0x0000001fff027819 */
/* 0x000fe20000011415 */
/*0440*/ BSSY B3, 0x560 ; /* 0x0000011000037945 */
/* 0x000fe60003800000 */
/*0450*/ LOP3.LUT R2, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002027a12 */
/* 0x000fca00078ec0ff */
/*0460*/ IMAD.IADD R2, R2, 0x1, R21 ; /* 0x0000000102027824 */
/* 0x000fe200078e0215 */
/*0470*/ IADD3 R21, P2, R21, 0x1, RZ ; /* 0x0000000115157810 */
/* 0x000fc80007f5e0ff */
/*0480*/ ISETP.NE.AND P0, PT, R2, c[0x0][0x164], PT ; /* 0x0000590002007a0c */
/* 0x000fc80003f05270 */
/*0490*/ SEL R3, R2, RZ, P0 ; /* 0x000000ff02037207 */
/* 0x000fe40000000000 */
/*04a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc60003f0e170 */
/*04b0*/ IMAD R3, R16, c[0x0][0x164], R3 ; /* 0x0000590010037a24 */
/* 0x000fca00078e0203 */
/*04c0*/ ISETP.NE.AND P1, PT, R3, R0, PT ; /* 0x000000000300720c */
/* 0x000fda0003f25270 */
/*04d0*/ @!P1 BRA 0x550 ; /* 0x0000007000009947 */
/* 0x000fea0003800000 */
/*04e0*/ IADD3 R2, P1, R3, c[0x0][0x168], RZ ; /* 0x00005a0003027a10 */
/* 0x000fc80007f3e0ff */
/*04f0*/ LEA.HI.X.SX32 R3, R3, c[0x0][0x16c], 0x1, P1 ; /* 0x00005b0003037a11 */
/* 0x000fca00008f0eff */
/*0500*/ LDG.E.U8 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1100 */
/*0510*/ IADD3 R4, R9, 0x1, RZ ; /* 0x0000000109047810 */
/* 0x000fe40007ffe0ff */
/*0520*/ ISETP.NE.AND P1, PT, R2, 0x58, PT ; /* 0x000000580200780c */
/* 0x004fda0003f25270 */
/*0530*/ @P1 IMAD.MOV R4, RZ, RZ, R9 ; /* 0x000000ffff041224 */
/* 0x000fc800078e0209 */
/*0540*/ IMAD.MOV.U32 R9, RZ, RZ, R4 ; /* 0x000000ffff097224 */
/* 0x000fe400078e0004 */
/*0550*/ BSYNC B3 ; /* 0x0000000000037941 */
/* 0x000fea0003800000 */
/*0560*/ IMAD.X R19, RZ, RZ, R19, P2 ; /* 0x000000ffff137224 */
/* 0x000fe400010e0613 */
/*0570*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0580*/ IADD3 R2, P3, R12.reuse, -R21.reuse, RZ ; /* 0x800000150c027210 */
/* 0x0c0fe20007f7e0ff */
/*0590*/ BSSY B2, 0xa40 ; /* 0x000004a000027945 */
/* 0x000fe20003800000 */
/*05a0*/ ISETP.GT.U32.AND P1, PT, R12, R21, PT ; /* 0x000000150c00720c */
/* 0x000fe40003f24070 */
/*05b0*/ ISETP.LE.U32.AND P2, PT, R2, 0x2, PT ; /* 0x000000020200780c */
/* 0x000fe20003f43070 */
/*05c0*/ IMAD.X R2, R14.reuse, 0x1, ~R19, P3 ; /* 0x000000010e027824 */
/* 0x040fe200018e0e13 */
/*05d0*/ ISETP.GT.U32.AND.EX P1, PT, R14, R19, PT, P1 ; /* 0x000000130e00720c */
/* 0x000fc80003f24110 */
/*05e0*/ ISETP.LE.U32.OR.EX P1, PT, R2, RZ, !P1, P2 ; /* 0x000000ff0200720c */
/* 0x000fda0004f23520 */
/*05f0*/ @P1 BRA 0xa30 ; /* 0x0000043000001947 */
/* 0x000fea0003800000 */
/*0600*/ IADD3 R20, P1, R12, -0x2, RZ ; /* 0xfffffffe0c147810 */
/* 0x000fe40007f3e0ff */
/*0610*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0620*/ IADD3.X R18, R14, -0x1, RZ, P1, !PT ; /* 0xffffffff0e127810 */
/* 0x000fe40000ffe4ff */
/*0630*/ SHF.R.S32.HI R2, RZ, 0x1f, R21 ; /* 0x0000001fff027819 */
/* 0x000fe40000011415 */
/*0640*/ IADD3 R5, R21, 0x1, RZ ; /* 0x0000000115057810 */
/* 0x000fe40007ffe0ff */
/*0650*/ LOP3.LUT R2, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002027a12 */
/* 0x000fe400078ec0ff */
/*0660*/ SHF.R.S32.HI R3, RZ, 0x1f, R5 ; /* 0x0000001fff037819 */
/* 0x000fc40000011405 */
/*0670*/ IADD3 R7, R21, 0x2, RZ ; /* 0x0000000215077810 */
/* 0x000fe20007ffe0ff */
/*0680*/ IMAD.IADD R2, R2, 0x1, R21 ; /* 0x0000000102027824 */
/* 0x000fe200078e0215 */
/*0690*/ LOP3.LUT R4, R3, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590003047a12 */
/* 0x000fe400078ec0ff */
/*06a0*/ IADD3 R23, R21, 0x3, RZ ; /* 0x0000000315177810 */
/* 0x000fe40007ffe0ff */
/*06b0*/ ISETP.NE.AND P1, PT, R2, c[0x0][0x164], PT ; /* 0x0000590002007a0c */
/* 0x000fe20003f25270 */
/*06c0*/ IMAD.IADD R4, R4, 0x1, R5 ; /* 0x0000000104047824 */
/* 0x000fc600078e0205 */
/*06d0*/ SEL R3, R2, RZ, P1 ; /* 0x000000ff02037207 */
/* 0x000fe40000800000 */
/*06e0*/ SHF.R.S32.HI R2, RZ, 0x1f, R7 ; /* 0x0000001fff027819 */
/* 0x000fe40000011407 */
/*06f0*/ ISETP.NE.AND P2, PT, R4, c[0x0][0x164], PT ; /* 0x0000590004007a0c */
/* 0x000fe20003f45270 */
/*0700*/ IMAD R3, R16, c[0x0][0x164], R3 ; /* 0x0000590010037a24 */
/* 0x000fe200078e0203 */
/*0710*/ LOP3.LUT R2, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002027a12 */
/* 0x000fe400078ec0ff */
/*0720*/ SEL R5, R4, RZ, P2 ; /* 0x000000ff04057207 */
/* 0x000fe40001000000 */
/*0730*/ ISETP.NE.AND P1, PT, R3, R0, PT ; /* 0x000000000300720c */
/* 0x000fe20003f25270 */
/*0740*/ IMAD.IADD R4, R2, 0x1, R7 ; /* 0x0000000102047824 */
/* 0x000fe200078e0207 */
/*0750*/ SHF.R.S32.HI R2, RZ, 0x1f, R23 ; /* 0x0000001fff027819 */
/* 0x000fe20000011417 */
/*0760*/ IMAD R5, R16, c[0x0][0x164], R5 ; /* 0x0000590010057a24 */
/* 0x000fc600078e0205 */
/*0770*/ ISETP.NE.AND P2, PT, R4, c[0x0][0x164], PT ; /* 0x0000590004007a0c */
/* 0x000fe40003f45270 */
/*0780*/ LOP3.LUT R6, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002067a12 */
/* 0x000fe400078ec0ff */
/*0790*/ ISETP.NE.AND P3, PT, R5, R0, PT ; /* 0x000000000500720c */
/* 0x000fe40003f65270 */
/*07a0*/ SEL R7, R4, RZ, P2 ; /* 0x000000ff04077207 */
/* 0x000fe20001000000 */
/*07b0*/ IMAD.IADD R6, R6, 0x1, R23 ; /* 0x0000000106067824 */
/* 0x000fe200078e0217 */
/*07c0*/ @P1 IADD3 R2, P4, R3, c[0x0][0x168], RZ ; /* 0x00005a0003021a10 */
/* 0x000fc60007f9e0ff */
/*07d0*/ IMAD R23, R16, c[0x0][0x164], R7 ; /* 0x0000590010177a24 */
/* 0x000fe200078e0207 */
/*07e0*/ @P1 LEA.HI.X.SX32 R3, R3, c[0x0][0x16c], 0x1, P4 ; /* 0x00005b0003031a11 */
/* 0x000fe400020f0eff */
/*07f0*/ ISETP.NE.AND P2, PT, R6.reuse, c[0x0][0x164], PT ; /* 0x0000590006007a0c */
/* 0x040fe40003f45270 */
/*0800*/ ISETP.NE.AND P4, PT, R23, R0, PT ; /* 0x000000001700720c */
/* 0x000fe20003f85270 */
/*0810*/ @P1 LDG.E.U8 R22, [R2.64] ; /* 0x0000000402161981 */
/* 0x0000a2000c1e1100 */
/*0820*/ @P3 IADD3 R4, P5, R5.reuse, c[0x0][0x168], RZ ; /* 0x00005a0005043a10 */
/* 0x040fe40007fbe0ff */
/*0830*/ SEL R7, R6, RZ, P2 ; /* 0x000000ff06077207 */
/* 0x000fe40001000000 */
/*0840*/ @P3 LEA.HI.X.SX32 R5, R5, c[0x0][0x16c], 0x1, P5 ; /* 0x00005b0005053a11 */
/* 0x000fc600028f0eff */
/*0850*/ IMAD R25, R16, c[0x0][0x164], R7 ; /* 0x0000590010197a24 */
/* 0x000fe400078e0207 */
/*0860*/ @P3 LDG.E.U8 R4, [R4.64] ; /* 0x0000000404043981 */
/* 0x000ee4000c1e1100 */
/*0870*/ @P4 IADD3 R6, P5, R23, c[0x0][0x168], RZ ; /* 0x00005a0017064a10 */
/* 0x000fe40007fbe0ff */
/*0880*/ ISETP.NE.AND P2, PT, R25, R0, PT ; /* 0x000000001900720c */
/* 0x000fe40003f45270 */
/*0890*/ @P4 LEA.HI.X.SX32 R7, R23, c[0x0][0x16c], 0x1, P5 ; /* 0x00005b0017074a11 */
/* 0x000fca00028f0eff */
/*08a0*/ @P4 LDG.E.U8 R6, [R6.64] ; /* 0x0000000406064981 */
/* 0x000f2c000c1e1100 */
/*08b0*/ @P2 IADD3 R2, P5, R25, c[0x0][0x168], RZ ; /* 0x00005a0019022a10 */
/* 0x001fc80007fbe0ff */
/*08c0*/ @P2 LEA.HI.X.SX32 R3, R25, c[0x0][0x16c], 0x1, P5 ; /* 0x00005b0019032a11 */
/* 0x000fca00028f0eff */
/*08d0*/ @P2 LDG.E.U8 R2, [R2.64] ; /* 0x0000000402022981 */
/* 0x000f62000c1e1100 */
/*08e0*/ ISETP.NE.AND P6, PT, R22, 0x58, P1 ; /* 0x000000581600780c */
/* 0x004fe40000fc5270 */
/*08f0*/ @P1 IADD3 R22, R9, 0x1, RZ ; /* 0x0000000109161810 */
/* 0x000fe40007ffe0ff */
/*0900*/ ISETP.NE.AND P5, PT, R4, 0x58, P3 ; /* 0x000000580400780c */
/* 0x008fd20001fa5270 */
/*0910*/ @P6 IMAD.MOV R22, RZ, RZ, R9 ; /* 0x000000ffff166224 */
/* 0x000fc800078e0209 */
/*0920*/ @P1 IMAD.MOV.U32 R9, RZ, RZ, R22 ; /* 0x000000ffff091224 */
/* 0x000fe200078e0016 */
/*0930*/ ISETP.NE.AND P1, PT, R6, 0x58, P4 ; /* 0x000000580600780c */
/* 0x010fc80002725270 */
/*0940*/ @P3 IADD3 R4, R9, 0x1, RZ ; /* 0x0000000109043810 */
/* 0x000fe20007ffe0ff */
/*0950*/ @P5 IMAD.MOV R4, RZ, RZ, R9 ; /* 0x000000ffff045224 */
/* 0x000fc800078e0209 */
/*0960*/ @P3 IMAD.MOV.U32 R9, RZ, RZ, R4 ; /* 0x000000ffff093224 */
/* 0x000fca00078e0004 */
/*0970*/ @P4 IADD3 R4, R9, 0x1, RZ ; /* 0x0000000109044810 */
/* 0x000fe20007ffe0ff */
/*0980*/ @P1 IMAD.MOV R4, RZ, RZ, R9 ; /* 0x000000ffff041224 */
/* 0x000fe200078e0209 */
/*0990*/ IADD3 R21, P1, R21, 0x4, RZ ; /* 0x0000000415157810 */
/* 0x000fe40007f3e0ff */
/*09a0*/ ISETP.NE.AND P3, PT, R2, 0x58, P2 ; /* 0x000000580200780c */
/* 0x020fe20001765270 */
/*09b0*/ @P4 IMAD.MOV.U32 R9, RZ, RZ, R4 ; /* 0x000000ffff094224 */
/* 0x000fe400078e0004 */
/*09c0*/ IMAD.X R19, RZ, RZ, R19, P1 ; /* 0x000000ffff137224 */
/* 0x000fe200008e0613 */
/*09d0*/ ISETP.GE.U32.AND P1, PT, R21, R20, PT ; /* 0x000000141500720c */
/* 0x000fe40003f26070 */
/*09e0*/ @P2 IADD3 R2, R9, 0x1, RZ ; /* 0x0000000109022810 */
/* 0x000fc40007ffe0ff */
/*09f0*/ ISETP.GE.U32.AND.EX P1, PT, R19, R18, PT, P1 ; /* 0x000000121300720c */
/* 0x000fca0003f26110 */
/*0a00*/ @P3 IMAD.MOV R2, RZ, RZ, R9 ; /* 0x000000ffff023224 */
/* 0x000fc800078e0209 */
/*0a10*/ @P2 IMAD.MOV.U32 R9, RZ, RZ, R2 ; /* 0x000000ffff092224 */
/* 0x000fc800078e0002 */
/*0a20*/ @!P1 BRA 0x630 ; /* 0xfffffc0000009947 */
/* 0x000fea000383ffff */
/*0a30*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0a40*/ IADD3 R2, P3, R12.reuse, -R21.reuse, RZ ; /* 0x800000150c027210 */
/* 0x0c0fe20007f7e0ff */
/*0a50*/ BSSY B2, 0xce0 ; /* 0x0000028000027945 */
/* 0x000fe20003800000 */
/*0a60*/ ISETP.GT.U32.AND P2, PT, R12, R21, PT ; /* 0x000000150c00720c */
/* 0x000fe40003f44070 */
/*0a70*/ ISETP.LE.U32.AND P1, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe20003f23070 */
/*0a80*/ IMAD.X R2, R14.reuse, 0x1, ~R19, P3 ; /* 0x000000010e027824 */
/* 0x040fe200018e0e13 */
/*0a90*/ ISETP.GT.U32.AND.EX P2, PT, R14, R19, PT, P2 ; /* 0x000000130e00720c */
/* 0x000fc80003f44120 */
/*0aa0*/ ISETP.LE.U32.OR.EX P1, PT, R2, RZ, !P2, P1 ; /* 0x000000ff0200720c */
/* 0x000fda0005723510 */
/*0ab0*/ @P1 BRA 0xcd0 ; /* 0x0000021000001947 */
/* 0x000fea0003800000 */
/*0ac0*/ SHF.R.S32.HI R2, RZ, 0x1f, R21 ; /* 0x0000001fff027819 */
/* 0x000fe40000011415 */
/*0ad0*/ IADD3 R6, P1, R21, 0x1, RZ ; /* 0x0000000115067810 */
/* 0x000fe40007f3e0ff */
/*0ae0*/ LOP3.LUT R2, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002027a12 */
/* 0x000fca00078ec0ff */
/*0af0*/ IMAD.IADD R4, R2, 0x1, R21 ; /* 0x0000000102047824 */
/* 0x000fe200078e0215 */
/*0b00*/ SHF.R.S32.HI R2, RZ, 0x1f, R6 ; /* 0x0000001fff027819 */
/* 0x000fc80000011406 */
/*0b10*/ ISETP.NE.AND P0, PT, R4, c[0x0][0x164], PT ; /* 0x0000590004007a0c */
/* 0x000fe40003f05270 */
/*0b20*/ LOP3.LUT R3, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002037a12 */
/* 0x000fe400078ec0ff */
/*0b30*/ SEL R5, R4, RZ, P0 ; /* 0x000000ff04057207 */
/* 0x000fc60000000000 */
/*0b40*/ IMAD.IADD R3, R3, 0x1, R6 ; /* 0x0000000103037824 */
/* 0x000fe400078e0206 */
/*0b50*/ IMAD R5, R16, c[0x0][0x164], R5 ; /* 0x0000590010057a24 */
/* 0x000fc600078e0205 */
/*0b60*/ ISETP.NE.AND P2, PT, R3, c[0x0][0x164], PT ; /* 0x0000590003007a0c */
/* 0x000fe40003f45270 */
/*0b70*/ ISETP.NE.AND P0, PT, R5, R0, PT ; /* 0x000000000500720c */
/* 0x000fe40003f05270 */
/*0b80*/ SEL R3, R3, RZ, P2 ; /* 0x000000ff03037207 */
/* 0x000fca0001000000 */
/*0b90*/ IMAD R3, R16, c[0x0][0x164], R3 ; /* 0x0000590010037a24 */
/* 0x000fca00078e0203 */
/*0ba0*/ ISETP.NE.AND P2, PT, R3, R0, PT ; /* 0x000000000300720c */
/* 0x000fe40003f45270 */
/*0bb0*/ @P0 IADD3 R4, P3, R5, c[0x0][0x168], RZ ; /* 0x00005a0005040a10 */
/* 0x000fc80007f7e0ff */
/*0bc0*/ @P0 LEA.HI.X.SX32 R5, R5, c[0x0][0x16c], 0x1, P3 ; /* 0x00005b0005050a11 */
/* 0x000fca00018f0eff */
/*0bd0*/ @P0 LDG.E.U8 R4, [R4.64] ; /* 0x0000000404040981 */
/* 0x000ea4000c1e1100 */
/*0be0*/ @P2 IADD3 R2, P3, R3, c[0x0][0x168], RZ ; /* 0x00005a0003022a10 */
/* 0x000fc80007f7e0ff */
/*0bf0*/ @P2 LEA.HI.X.SX32 R3, R3, c[0x0][0x16c], 0x1, P3 ; /* 0x00005b0003032a11 */
/* 0x000fca00018f0eff */
/*0c00*/ @P2 LDG.E.U8 R2, [R2.64] ; /* 0x0000000402022981 */
/* 0x000ee2000c1e1100 */
/*0c10*/ @P0 IADD3 R7, R9, 0x1, RZ ; /* 0x0000000109070810 */
/* 0x000fe20007ffe0ff */
/*0c20*/ IMAD.X R19, RZ, RZ, R19, P1 ; /* 0x000000ffff137224 */
/* 0x000fe200008e0613 */
/*0c30*/ ISETP.NE.AND P3, PT, R4, 0x58, P0 ; /* 0x000000580400780c */
/* 0x004fe40000765270 */
/*0c40*/ ISETP.NE.AND P4, PT, R2, 0x58, P2 ; /* 0x000000580200780c */
/* 0x008fd60001785270 */
/*0c50*/ @P3 IMAD.MOV R7, RZ, RZ, R9 ; /* 0x000000ffff073224 */
/* 0x000fe200078e0209 */
/*0c60*/ IADD3 R21, P3, R6, 0x1, RZ ; /* 0x0000000106157810 */
/* 0x000fc60007f7e0ff */
/*0c70*/ @P0 IMAD.MOV.U32 R9, RZ, RZ, R7 ; /* 0x000000ffff090224 */
/* 0x000fe200078e0007 */
/*0c80*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe20003f0e170 */
/*0c90*/ IMAD.X R19, RZ, RZ, R19, P3 ; /* 0x000000ffff137224 */
/* 0x000fc600018e0613 */
/*0ca0*/ @P2 IADD3 R7, R9, 0x1, RZ ; /* 0x0000000109072810 */
/* 0x000fe20007ffe0ff */
/*0cb0*/ @P4 IMAD.MOV R7, RZ, RZ, R9 ; /* 0x000000ffff074224 */
/* 0x000fc800078e0209 */
/*0cc0*/ @P2 IMAD.MOV.U32 R9, RZ, RZ, R7 ; /* 0x000000ffff092224 */
/* 0x000fe400078e0007 */
/*0cd0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0ce0*/ ISETP.LE.U32.AND P1, PT, R21, R12, PT ; /* 0x0000000c1500720c */
/* 0x000fc80003f23070 */
/*0cf0*/ ISETP.LE.U32.OR.EX P0, PT, R19, R14, P0, P1 ; /* 0x0000000e1300720c */
/* 0x000fda0000703510 */
/*0d00*/ @!P0 BRA 0xe00 ; /* 0x000000f000008947 */
/* 0x000fea0003800000 */
/*0d10*/ SHF.R.S32.HI R2, RZ, 0x1f, R21 ; /* 0x0000001fff027819 */
/* 0x000fc80000011415 */
/*0d20*/ LOP3.LUT R2, R2, c[0x0][0x164], RZ, 0xc0, !PT ; /* 0x0000590002027a12 */
/* 0x000fca00078ec0ff */
/*0d30*/ IMAD.IADD R2, R2, 0x1, R21 ; /* 0x0000000102027824 */
/* 0x000fca00078e0215 */
/*0d40*/ ISETP.NE.AND P0, PT, R2, c[0x0][0x164], PT ; /* 0x0000590002007a0c */
/* 0x000fc80003f05270 */
/*0d50*/ SEL R3, R2, RZ, P0 ; /* 0x000000ff02037207 */
/* 0x000fca0000000000 */
/*0d60*/ IMAD R3, R16, c[0x0][0x164], R3 ; /* 0x0000590010037a24 */
/* 0x000fca00078e0203 */
/*0d70*/ ISETP.NE.AND P0, PT, R3, R0, PT ; /* 0x000000000300720c */
/* 0x000fda0003f05270 */
/*0d80*/ @!P0 BRA 0xe00 ; /* 0x0000007000008947 */
/* 0x000fea0003800000 */
/*0d90*/ IADD3 R2, P0, R3, c[0x0][0x168], RZ ; /* 0x00005a0003027a10 */
/* 0x000fc80007f1e0ff */
/*0da0*/ LEA.HI.X.SX32 R3, R3, c[0x0][0x16c], 0x1, P0 ; /* 0x00005b0003037a11 */
/* 0x000fca00000f0eff */
/*0db0*/ LDG.E.U8 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1100 */
/*0dc0*/ IADD3 R4, R9, 0x1, RZ ; /* 0x0000000109047810 */
/* 0x000fe40007ffe0ff */
/*0dd0*/ ISETP.NE.AND P0, PT, R2, 0x58, PT ; /* 0x000000580200780c */
/* 0x004fda0003f05270 */
/*0de0*/ @P0 IMAD.MOV R4, RZ, RZ, R9 ; /* 0x000000ffff040224 */
/* 0x000fc800078e0209 */
/*0df0*/ IMAD.MOV.U32 R9, RZ, RZ, R4 ; /* 0x000000ffff097224 */
/* 0x000fe400078e0004 */
/*0e00*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0e10*/ IADD3 R11, P0, R11, 0x1, RZ ; /* 0x000000010b0b7810 */
/* 0x000fca0007f1e0ff */
/*0e20*/ IMAD.X R10, RZ, RZ, R10, P0 ; /* 0x000000ffff0a7224 */
/* 0x000fe200000e060a */
/*0e30*/ ISETP.GT.U32.AND P0, PT, R11, R8, PT ; /* 0x000000080b00720c */
/* 0x000fc80003f04070 */
/*0e40*/ ISETP.GT.U32.AND.EX P0, PT, R10, R15, PT, P0 ; /* 0x0000000f0a00720c */
/* 0x000fda0003f04100 */
/*0e50*/ @!P0 BRA 0x340 ; /* 0xfffff4e000008947 */
/* 0x000fea000383ffff */
/*0e60*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0e70*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe40000011400 */
/*0e80*/ IADD3 R4, P0, R0, c[0x0][0x168], RZ ; /* 0x00005a0000047a10 */
/* 0x000fc80007f1e0ff */
/*0e90*/ IADD3.X R5, R3, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b0003057a10 */
/* 0x000fca00007fe4ff */
/*0ea0*/ LDG.E.U8 R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1100 */
/*0eb0*/ IADD3 R2, P1, R0, c[0x0][0x170], RZ ; /* 0x00005c0000027a10 */
/* 0x000fc80007f3e0ff */
/*0ec0*/ IADD3.X R3, R3, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d0003037a10 */
/* 0x000fe40000ffe4ff */
/*0ed0*/ ISETP.NE.AND P0, PT, R4, 0x58, PT ; /* 0x000000580400780c */
/* 0x004fda0003f05270 */
/*0ee0*/ @!P0 BRA 0xf60 ; /* 0x0000007000008947 */
/* 0x000fea0003800000 */
/*0ef0*/ ISETP.NE.AND P0, PT, R9, 0x3, PT ; /* 0x000000030900780c */
/* 0x000fe20003f05270 */
/*0f00*/ IMAD.MOV.U32 R0, RZ, RZ, 0x2d ; /* 0x0000002dff007424 */
/* 0x000fd800078e00ff */
/*0f10*/ @P0 STG.E.U8 [R2.64], R0 ; /* 0x0000000002000986 */
/* 0x0001e2000c101104 */
/*0f20*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0f30*/ IMAD.MOV.U32 R0, RZ, RZ, 0x58 ; /* 0x00000058ff007424 */
/* 0x001fca00078e00ff */
/*0f40*/ STG.E.U8 [R2.64], R0 ; /* 0x0000000002007986 */
/* 0x000fe2000c101104 */
/*0f50*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0f60*/ LOP3.LUT R9, R9, 0xfffffffe, RZ, 0xc0, !PT ; /* 0xfffffffe09097812 */
/* 0x000fe200078ec0ff */
/*0f70*/ IMAD.MOV.U32 R0, RZ, RZ, 0x2d ; /* 0x0000002dff007424 */
/* 0x000fc600078e00ff */
/*0f80*/ ISETP.NE.AND P0, PT, R9, 0x2, PT ; /* 0x000000020900780c */
/* 0x000fda0003f05270 */
/*0f90*/ @P0 STG.E.U8 [R2.64], R0 ; /* 0x0000000002000986 */
/* 0x0001e2000c101104 */
/*0fa0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0fb0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x58 ; /* 0x00000058ff007424 */
/* 0x001fca00078e00ff */
/*0fc0*/ STG.E.U8 [R2.64], R0 ; /* 0x0000000002007986 */
/* 0x000fe2000c101104 */
/*0fd0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0fe0*/ BRA 0xfe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0ff0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1000*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1010*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1020*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <fstream>
#include <vector>
#include <unistd.h>
#include <string>
#include <stdio.h>
using std::cout;
using std::endl;
using std::vector;
using std::ifstream;
using std::swap;
using std::string;
using namespace std;
#define ALIVE 'X'
#define DEAD '-'
#define THREADS 512
__global__
void play_game(int rows, int cols, char d_current_gen[], char d_next_gen[]) {
int curr_cell = blockIdx.x * blockDim.x + threadIdx.x;
if (curr_cell < rows * cols) {
// Row and column indexes of current cell
int row_idx = curr_cell / cols;
int col_idx = curr_cell % cols;
int curr_nbr;
int nbr_row;
int nbr_col;
int num_alive = 0;
// Loop through to find every neighbour for the current cell
for (size_t i = row_idx - 1; i <= row_idx + 1; i++) {
for (size_t j = col_idx - 1; j <= col_idx + 1; j++) {
nbr_row = i;
nbr_col = j;
// Implementing world wrapping
if (nbr_row < 0) {
nbr_row += rows;
}
if (nbr_col < 0) {
nbr_col += cols;
}
if (nbr_row == rows) {
nbr_row = 0;
}
if (nbr_col == cols) {
nbr_col = 0;
}
// Formula for calculating the current neighbour
curr_nbr = nbr_row * cols + nbr_col;
// Continue if the neighbour == the current cell
if (curr_nbr == curr_cell) {
continue;
}
// Increment count of ALIVE neighbours if the neighbour is ALIVE
if (d_current_gen[curr_nbr] == ALIVE) {
num_alive++;
}
}
}
// If curr_cell is ALIVE
if (d_current_gen[curr_cell] == ALIVE) {
// If num live neighbours is < 2 or > 3, kill it
if (num_alive < 2 || num_alive > 3) {
d_next_gen[curr_cell] = DEAD;
// Else if num live neighbours == 2 || == 3
} else {
d_next_gen[curr_cell] = ALIVE;
}
// Else if curr_cell is DEAD
} else {
// If num live neighbours == 3, make it alive
if (num_alive == 3) {
d_next_gen[curr_cell] = ALIVE;
} else {
d_next_gen[curr_cell] = DEAD;
}
}
}
}
// Function for printing a grid
void print_grid(int rows, int cols, char grid[]) {
cout << "\n";
for (size_t i = 0; i < rows; i++) {
for (size_t j = 0; j < cols; j++) {
cout << grid[i * cols + j];
}
cout << "\n";
}
}
int main(int argc, char * argv[]) {
int opt;
int num_iterations = 1;
bool verbose = false;
string extension = ".txt";
// Reject the run if no file specified
if ((string(argv[argc - 1]).find(extension)) == std::string::npos) {
cout << "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n";
return EXIT_FAILURE;
}
while ((opt = getopt(argc, argv, "i:v:")) != -1) {
switch (opt) {
case 'i':
num_iterations = atoi(argv[2]);
break;
case 'v':
verbose = true;
break;
}
}
int rows = 0;
int cols = 0;
// Temporary vector to store unknown amount of characters from input file
vector<char> temp;
char c;
// Read in data to temp
ifstream fn;
fn.open(argv[argc - 1], ifstream::in);
while (!fn.eof()) {
// If a newline is reached, increment the number of rows
if (fn.peek() == '\n' || fn.peek() == '\r') {
rows++;
}
fn >> c;
temp.push_back(c);
}
fn.close();
// We need to increment rows again because it will not find a newline at the end of the file
rows++;
cols = temp.size() / rows;
// Declare array and memory allocation size.
int array_size = rows * cols;
const int ARRAY_BYTES = sizeof(char) * array_size;
// Host arrays and allocation of host memory
char * h_current_gen = (char *) malloc(ARRAY_BYTES);
char * h_next_gen = (char *) malloc(ARRAY_BYTES);
// Copy data from vector to host array.
for (size_t i = 0; i < array_size; i++) {
h_current_gen[i] = temp[i];
}
// // Printing out the initial state of the game
print_grid(rows, cols, h_current_gen);
// Device arrays
char * d_current_gen;
char * d_next_gen;
// Allocate GPU memory
cudaMalloc((void**) &d_current_gen, ARRAY_BYTES);
cudaMalloc((void**) &d_next_gen, ARRAY_BYTES);
// Transfer memory to the GPU
cudaMemcpy(d_current_gen, h_current_gen, ARRAY_BYTES,
cudaMemcpyHostToDevice);
// Loop for as many iterations as was specified (1 if unspecified)
for (size_t i = 0; i < num_iterations; i++) {
// Launch kernel
play_game<<<(array_size + THREADS - 1) / THREADS, THREADS>>>(rows, cols,
d_current_gen, d_next_gen);
// Synchronise threads
cudaDeviceSynchronize();
// Memcpy back to host and print the new generation if verbose was set
if (verbose) {
cudaMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES,
cudaMemcpyDeviceToHost);
print_grid(rows, cols, h_next_gen);
}
// Pass the memory of d_next_gen over to d_current_gen
swap(d_current_gen, d_next_gen);
}
// Transfer memory from GPU back to host
cudaMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES, cudaMemcpyDeviceToHost);
// Print final result of game only if verbose was not set
if (!verbose) {
print_grid(rows, cols, h_next_gen);
}
// Free CPU memory
free(h_current_gen);
free(h_next_gen);
// Free GPU memory
cudaFree(d_current_gen);
cudaFree(d_next_gen);
return EXIT_SUCCESS;
} | .file "tmpxft_0018d8d4_00000000-6_grid.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4190:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4190:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "\n"
.text
.globl _Z10print_gridiiPc
.type _Z10print_gridiiPc, @function
_Z10print_gridiiPc:
.LFB4176:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $56, %rsp
.cfi_def_cfa_offset 112
movl %edi, %ebx
movl %esi, %r14d
movq %rdx, %r15
movq %rdx, 24(%rsp)
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $1, %edx
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movslq %ebx, %rax
movq %rax, 16(%rsp)
testl %ebx, %ebx
je .L3
movslq %r14d, %r14
leaq (%r15,%r14), %r12
movl $0, %r15d
movq $0, 8(%rsp)
leaq _ZSt4cout(%rip), %rbp
leaq 39(%rsp), %r13
jmp .L5
.L6:
movsbl %sil, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
.L7:
addq $1, %rbx
cmpq %r12, %rbx
je .L10
.L8:
movzbl (%rbx), %esi
movb %sil, 39(%rsp)
movq 0(%rbp), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbp,%rax)
je .L6
movl $1, %edx
movq %r13, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L7
.L10:
movl $1, %edx
leaq .LC0(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, 8(%rsp)
movq 8(%rsp), %rax
addq %r14, %r12
addq %r14, %r15
movq 16(%rsp), %rcx
cmpq %rcx, %rax
je .L3
.L5:
movq 24(%rsp), %rax
leaq (%rax,%r15), %rbx
testq %r14, %r14
jne .L8
jmp .L10
.L3:
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4176:
.size _Z10print_gridiiPc, .-_Z10print_gridiiPc
.globl _Z32__device_stub__Z9play_gameiiPcS_iiPcS_
.type _Z32__device_stub__Z9play_gameiiPcS_iiPcS_, @function
_Z32__device_stub__Z9play_gameiiPcS_iiPcS_:
.LFB4212:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 28(%rsp)
movl %esi, 24(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L20
.L16:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L21
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z9play_gameiiPcS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4212:
.size _Z32__device_stub__Z9play_gameiiPcS_iiPcS_, .-_Z32__device_stub__Z9play_gameiiPcS_iiPcS_
.globl _Z9play_gameiiPcS_
.type _Z9play_gameiiPcS_, @function
_Z9play_gameiiPcS_:
.LFB4213:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z9play_gameiiPcS_iiPcS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4213:
.size _Z9play_gameiiPcS_, .-_Z9play_gameiiPcS_
.section .rodata.str1.1
.LC1:
.string "_Z9play_gameiiPcS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4215:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z9play_gameiiPcS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4215:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "basic_string: construction from null is not valid"
.section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
.align 2
.weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4534:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $24, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
leaq 16(%rdi), %r12
movq %r12, (%rdi)
testq %rsi, %rsi
je .L35
movq %rdi, %rbx
movq %rsi, %r13
movq %rsi, %rdi
call strlen@PLT
movq %rax, %rbp
movq %rax, (%rsp)
cmpq $15, %rax
ja .L36
cmpq $1, %rax
jne .L31
movzbl 0(%r13), %eax
movb %al, 16(%rbx)
.L32:
movq (%rsp), %rax
movq %rax, 8(%rbx)
movq (%rbx), %rdx
movb $0, (%rdx,%rax)
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L37
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L38
leaq .LC2(%rip), %rdi
call _ZSt19__throw_logic_errorPKc@PLT
.L38:
call __stack_chk_fail@PLT
.L36:
movq %rsp, %rsi
movl $0, %edx
movq %rbx, %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
movq %rax, %r12
movq %rax, (%rbx)
movq (%rsp), %rax
movq %rax, 16(%rbx)
.L30:
movq %rbp, %rdx
movq %r13, %rsi
movq %r12, %rdi
call memcpy@PLT
jmp .L32
.L31:
testq %rax, %rax
je .L32
jmp .L30
.L37:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4534:
.size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.set _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.section .text._ZNSt6vectorIcSaIcEED2Ev,"axG",@progbits,_ZNSt6vectorIcSaIcEED5Ev,comdat
.align 2
.weak _ZNSt6vectorIcSaIcEED2Ev
.type _ZNSt6vectorIcSaIcEED2Ev, @function
_ZNSt6vectorIcSaIcEED2Ev:
.LFB4544:
.cfi_startproc
endbr64
movq (%rdi), %rax
testq %rax, %rax
je .L42
subq $8, %rsp
.cfi_def_cfa_offset 16
movq 16(%rdi), %rsi
subq %rax, %rsi
movq %rax, %rdi
call _ZdlPvm@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.L42:
ret
.cfi_endproc
.LFE4544:
.size _ZNSt6vectorIcSaIcEED2Ev, .-_ZNSt6vectorIcSaIcEED2Ev
.weak _ZNSt6vectorIcSaIcEED1Ev
.set _ZNSt6vectorIcSaIcEED1Ev,_ZNSt6vectorIcSaIcEED2Ev
.section .rodata._ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_.str1.1,"aMS",@progbits,1
.LC3:
.string "vector::_M_realloc_insert"
.section .text._ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_,comdat
.align 2
.weak _ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_
.type _ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_, @function
_ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_:
.LFB4732:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rsi, 8(%rsp)
movq %rdx, 24(%rsp)
movq 8(%rdi), %r12
movq (%rdi), %r13
movq %r12, %rdx
subq %r13, %rdx
movabsq $9223372036854775807, %rax
cmpq %rax, %rdx
je .L60
movq %rdi, %rbp
testq %rdx, %rdx
movl $1, %eax
cmovne %rdx, %rax
addq %rdx, %rax
jc .L47
movabsq $9223372036854775807, %rdx
cmpq %rdx, %rax
cmovbe %rax, %rdx
movq %rdx, 16(%rsp)
movq 8(%rsp), %r15
subq %r13, %r15
movq %r15, %r14
movl $0, %ebx
testq %rax, %rax
je .L48
jmp .L55
.L60:
leaq .LC3(%rip), %rdi
call _ZSt20__throw_length_errorPKc@PLT
.L61:
movq %r14, %rdx
movq %r13, %rsi
movq %rbx, %rdi
call memmove@PLT
leaq 1(%rbx,%r14), %r14
movq 8(%rsp), %rax
subq %rax, %r12
testq %r12, %r12
jg .L50
addq %r12, %r14
movq 16(%rbp), %rsi
subq %r13, %rsi
jmp .L54
.L47:
movq 8(%rsp), %r15
subq %r13, %r15
movq %r15, %r14
movabsq $9223372036854775807, %rax
movq %rax, 16(%rsp)
.L55:
movq 16(%rsp), %rdi
call _Znwm@PLT
movq %rax, %rbx
.L48:
movq 24(%rsp), %rax
movzbl (%rax), %eax
movb %al, (%rbx,%r14)
testq %r15, %r15
jg .L61
leaq 1(%rbx,%r14), %r14
movq 8(%rsp), %rax
subq %rax, %r12
testq %r12, %r12
jle .L52
.L50:
movq %r12, %rdx
movq 8(%rsp), %rsi
movq %r14, %rdi
call memcpy@PLT
.L52:
addq %r12, %r14
testq %r13, %r13
je .L53
movq 16(%rbp), %rsi
subq %r13, %rsi
.L54:
movq %r13, %rdi
call _ZdlPvm@PLT
.L53:
movq %rbx, 0(%rbp)
movq %r14, 8(%rbp)
movq 16(%rsp), %rax
addq %rax, %rbx
movq %rbx, 16(%rbp)
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4732:
.size _ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_, .-_ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_
.section .rodata.str1.1
.LC4:
.string ".txt"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n"
.section .rodata.str1.1
.LC6:
.string "i:v:"
.text
.globl main
.type main, @function
main:
.LFB4177:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4177
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $680, %rsp
.cfi_def_cfa_offset 736
movl %edi, %r12d
movq %rsi, %rbx
movq %fs:40, %rax
movq %rax, 664(%rsp)
xorl %eax, %eax
leaq 80(%rsp), %rbp
leaq 112(%rsp), %rdi
movq %rbp, %rdx
leaq .LC4(%rip), %rsi
.LEHB0:
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE0:
movslq %r12d, %rax
leaq -8(%rbx,%rax,8), %r14
movq (%r14), %rsi
leaq 144(%rsp), %rdi
movq %rbp, %rdx
.LEHB1:
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
leaq 144(%rsp), %rbp
movq 120(%rsp), %rcx
movl $0, %edx
movq 112(%rsp), %rsi
movq %rbp, %rdi
call _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEPKcmm@PLT
movq %rax, %r15
movq %rbp, %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
movl $0, %ebp
movl $1, 28(%rsp)
leaq .LC6(%rip), %r13
cmpq $-1, %r15
jne .L63
leaq .LC5(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.LEHE1:
jmp .L100
.L65:
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, 28(%rsp)
.L63:
movq %r13, %rdx
movq %rbx, %rsi
movl %r12d, %edi
call getopt@PLT
cmpl $-1, %eax
je .L101
cmpl $105, %eax
je .L65
cmpl $118, %eax
movl $1, %eax
cmove %eax, %ebp
jmp .L63
.L101:
movq $0, 80(%rsp)
movq $0, 88(%rsp)
movq $0, 96(%rsp)
leaq 144(%rsp), %rdi
.LEHB2:
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE2:
movq (%r14), %rsi
leaq 144(%rsp), %rdi
movl $8, %edx
.LEHB3:
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
movl 432(%rsp), %r12d
andl $2, %r12d
jne .L89
leaq 144(%rsp), %rbx
jmp .L73
.L104:
cmpl $10, %eax
jne .L102
.L69:
addl $1, %r12d
.L70:
leaq 39(%rsp), %rsi
movq %rbx, %rdi
call _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
jmp .L103
.L102:
movq %rbx, %rdi
call _ZNSi4peekEv@PLT
cmpl $13, %eax
jne .L70
jmp .L69
.L103:
movq 88(%rsp), %rsi
cmpq 96(%rsp), %rsi
je .L71
movzbl 39(%rsp), %eax
movb %al, (%rsi)
addq $1, %rsi
movq %rsi, 88(%rsp)
.L72:
testb $2, 432(%rsp)
jne .L68
.L73:
movq %rbx, %rdi
call _ZNSi4peekEv@PLT
jmp .L104
.L71:
leaq 39(%rsp), %rdx
leaq 80(%rsp), %rdi
call _ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_
jmp .L72
.L89:
movl $0, %r12d
.L68:
leaq 144(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
leal 1(%r12), %edi
movl %edi, 12(%rsp)
movq 80(%rsp), %rbx
movq 88(%rsp), %rax
subq %rbx, %rax
movslq %edi, %rcx
movl $0, %edx
divq %rcx
movl %eax, 24(%rsp)
imull %eax, %edi
movl %edi, %r14d
movslq %edi, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, %r13
movq %r12, %rdi
call malloc@PLT
movq %rax, 16(%rsp)
testq %r12, %r12
je .L74
movl $0, %eax
.L75:
movzbl (%rbx,%rax), %edx
movb %dl, 0(%r13,%rax)
addq $1, %rax
cmpq %rax, %r12
jne .L75
.L74:
movq %r13, %rdx
movl 24(%rsp), %esi
movl 12(%rsp), %edi
call _Z10print_gridiiPc
leaq 40(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r12, %rdx
movq %r13, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl 28(%rsp), %eax
movslq %eax, %r15
testl %eax, %eax
je .L76
leal 1022(%r14), %eax
addl $511, %r14d
cmovs %eax, %r14d
sarl $9, %r14d
movl $0, %ebx
jmp .L79
.L106:
testl %eax, %eax
jne .L77
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movl 24(%rsp), %esi
movl 12(%rsp), %edi
call _Z32__device_stub__Z9play_gameiiPcS_iiPcS_
.L77:
call cudaDeviceSynchronize@PLT
testb %bpl, %bpl
jne .L105
.L78:
movq 40(%rsp), %rax
movq 48(%rsp), %rdx
movq %rdx, 40(%rsp)
movq %rax, 48(%rsp)
addq $1, %rbx
cmpq %r15, %rbx
je .L76
.L79:
movl $512, 68(%rsp)
movl $1, 72(%rsp)
movl %r14d, 56(%rsp)
movl $1, 60(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
jmp .L106
.L105:
movl $2, %ecx
movq %r12, %rdx
movq 48(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rdx
movl 24(%rsp), %esi
movl 12(%rsp), %edi
call _Z10print_gridiiPc
jmp .L78
.L76:
movl $2, %ecx
movq %r12, %rdx
movq 48(%rsp), %rsi
movq 16(%rsp), %rbx
movq %rbx, %rdi
call cudaMemcpy@PLT
testb %bpl, %bpl
jne .L80
movq %rbx, %rdx
movl 24(%rsp), %esi
movl 12(%rsp), %edi
call _Z10print_gridiiPc
.L80:
movq %r13, %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
.LEHE3:
leaq 144(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
leaq 80(%rsp), %rdi
call _ZNSt6vectorIcSaIcEED1Ev
movl $0, %ebx
.L64:
leaq 112(%rsp), %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
movq 664(%rsp), %rax
subq %fs:40, %rax
jne .L107
movl %ebx, %eax
addq $680, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L100:
.cfi_restore_state
movl $1, %ebx
jmp .L64
.L92:
endbr64
movq %rax, %rbx
leaq 144(%rsp), %rdi
call _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
.L82:
leaq 80(%rsp), %rdi
call _ZNSt6vectorIcSaIcEED1Ev
.L83:
leaq 112(%rsp), %rdi
call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
movq 664(%rsp), %rax
subq %fs:40, %rax
je .L84
call __stack_chk_fail@PLT
.L91:
endbr64
movq %rax, %rbx
jmp .L82
.L90:
endbr64
movq %rax, %rbx
jmp .L83
.L84:
movq %rbx, %rdi
.LEHB4:
call _Unwind_Resume@PLT
.LEHE4:
.L107:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4177:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA4177:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE4177-.LLSDACSB4177
.LLSDACSB4177:
.uleb128 .LEHB0-.LFB4177
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB4177
.uleb128 .LEHE1-.LEHB1
.uleb128 .L90-.LFB4177
.uleb128 0
.uleb128 .LEHB2-.LFB4177
.uleb128 .LEHE2-.LEHB2
.uleb128 .L91-.LFB4177
.uleb128 0
.uleb128 .LEHB3-.LFB4177
.uleb128 .LEHE3-.LEHB3
.uleb128 .L92-.LFB4177
.uleb128 0
.uleb128 .LEHB4-.LFB4177
.uleb128 .LEHE4-.LEHB4
.uleb128 0
.uleb128 0
.LLSDACSE4177:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <fstream>
#include <vector>
#include <unistd.h>
#include <string>
#include <stdio.h>
using std::cout;
using std::endl;
using std::vector;
using std::ifstream;
using std::swap;
using std::string;
using namespace std;
#define ALIVE 'X'
#define DEAD '-'
#define THREADS 512
__global__
void play_game(int rows, int cols, char d_current_gen[], char d_next_gen[]) {
int curr_cell = blockIdx.x * blockDim.x + threadIdx.x;
if (curr_cell < rows * cols) {
// Row and column indexes of current cell
int row_idx = curr_cell / cols;
int col_idx = curr_cell % cols;
int curr_nbr;
int nbr_row;
int nbr_col;
int num_alive = 0;
// Loop through to find every neighbour for the current cell
for (size_t i = row_idx - 1; i <= row_idx + 1; i++) {
for (size_t j = col_idx - 1; j <= col_idx + 1; j++) {
nbr_row = i;
nbr_col = j;
// Implementing world wrapping
if (nbr_row < 0) {
nbr_row += rows;
}
if (nbr_col < 0) {
nbr_col += cols;
}
if (nbr_row == rows) {
nbr_row = 0;
}
if (nbr_col == cols) {
nbr_col = 0;
}
// Formula for calculating the current neighbour
curr_nbr = nbr_row * cols + nbr_col;
// Continue if the neighbour == the current cell
if (curr_nbr == curr_cell) {
continue;
}
// Increment count of ALIVE neighbours if the neighbour is ALIVE
if (d_current_gen[curr_nbr] == ALIVE) {
num_alive++;
}
}
}
// If curr_cell is ALIVE
if (d_current_gen[curr_cell] == ALIVE) {
// If num live neighbours is < 2 or > 3, kill it
if (num_alive < 2 || num_alive > 3) {
d_next_gen[curr_cell] = DEAD;
// Else if num live neighbours == 2 || == 3
} else {
d_next_gen[curr_cell] = ALIVE;
}
// Else if curr_cell is DEAD
} else {
// If num live neighbours == 3, make it alive
if (num_alive == 3) {
d_next_gen[curr_cell] = ALIVE;
} else {
d_next_gen[curr_cell] = DEAD;
}
}
}
}
// Function for printing a grid
void print_grid(int rows, int cols, char grid[]) {
cout << "\n";
for (size_t i = 0; i < rows; i++) {
for (size_t j = 0; j < cols; j++) {
cout << grid[i * cols + j];
}
cout << "\n";
}
}
int main(int argc, char * argv[]) {
int opt;
int num_iterations = 1;
bool verbose = false;
string extension = ".txt";
// Reject the run if no file specified
if ((string(argv[argc - 1]).find(extension)) == std::string::npos) {
cout << "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n";
return EXIT_FAILURE;
}
while ((opt = getopt(argc, argv, "i:v:")) != -1) {
switch (opt) {
case 'i':
num_iterations = atoi(argv[2]);
break;
case 'v':
verbose = true;
break;
}
}
int rows = 0;
int cols = 0;
// Temporary vector to store unknown amount of characters from input file
vector<char> temp;
char c;
// Read in data to temp
ifstream fn;
fn.open(argv[argc - 1], ifstream::in);
while (!fn.eof()) {
// If a newline is reached, increment the number of rows
if (fn.peek() == '\n' || fn.peek() == '\r') {
rows++;
}
fn >> c;
temp.push_back(c);
}
fn.close();
// We need to increment rows again because it will not find a newline at the end of the file
rows++;
cols = temp.size() / rows;
// Declare array and memory allocation size.
int array_size = rows * cols;
const int ARRAY_BYTES = sizeof(char) * array_size;
// Host arrays and allocation of host memory
char * h_current_gen = (char *) malloc(ARRAY_BYTES);
char * h_next_gen = (char *) malloc(ARRAY_BYTES);
// Copy data from vector to host array.
for (size_t i = 0; i < array_size; i++) {
h_current_gen[i] = temp[i];
}
// // Printing out the initial state of the game
print_grid(rows, cols, h_current_gen);
// Device arrays
char * d_current_gen;
char * d_next_gen;
// Allocate GPU memory
cudaMalloc((void**) &d_current_gen, ARRAY_BYTES);
cudaMalloc((void**) &d_next_gen, ARRAY_BYTES);
// Transfer memory to the GPU
cudaMemcpy(d_current_gen, h_current_gen, ARRAY_BYTES,
cudaMemcpyHostToDevice);
// Loop for as many iterations as was specified (1 if unspecified)
for (size_t i = 0; i < num_iterations; i++) {
// Launch kernel
play_game<<<(array_size + THREADS - 1) / THREADS, THREADS>>>(rows, cols,
d_current_gen, d_next_gen);
// Synchronise threads
cudaDeviceSynchronize();
// Memcpy back to host and print the new generation if verbose was set
if (verbose) {
cudaMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES,
cudaMemcpyDeviceToHost);
print_grid(rows, cols, h_next_gen);
}
// Pass the memory of d_next_gen over to d_current_gen
swap(d_current_gen, d_next_gen);
}
// Transfer memory from GPU back to host
cudaMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES, cudaMemcpyDeviceToHost);
// Print final result of game only if verbose was not set
if (!verbose) {
print_grid(rows, cols, h_next_gen);
}
// Free CPU memory
free(h_current_gen);
free(h_next_gen);
// Free GPU memory
cudaFree(d_current_gen);
cudaFree(d_next_gen);
return EXIT_SUCCESS;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <vector>
#include <unistd.h>
#include <string>
#include <stdio.h>
using std::cout;
using std::endl;
using std::vector;
using std::ifstream;
using std::swap;
using std::string;
using namespace std;
#define ALIVE 'X'
#define DEAD '-'
#define THREADS 512
__global__
void play_game(int rows, int cols, char d_current_gen[], char d_next_gen[]) {
int curr_cell = blockIdx.x * blockDim.x + threadIdx.x;
if (curr_cell < rows * cols) {
// Row and column indexes of current cell
int row_idx = curr_cell / cols;
int col_idx = curr_cell % cols;
int curr_nbr;
int nbr_row;
int nbr_col;
int num_alive = 0;
// Loop through to find every neighbour for the current cell
for (size_t i = row_idx - 1; i <= row_idx + 1; i++) {
for (size_t j = col_idx - 1; j <= col_idx + 1; j++) {
nbr_row = i;
nbr_col = j;
// Implementing world wrapping
if (nbr_row < 0) {
nbr_row += rows;
}
if (nbr_col < 0) {
nbr_col += cols;
}
if (nbr_row == rows) {
nbr_row = 0;
}
if (nbr_col == cols) {
nbr_col = 0;
}
// Formula for calculating the current neighbour
curr_nbr = nbr_row * cols + nbr_col;
// Continue if the neighbour == the current cell
if (curr_nbr == curr_cell) {
continue;
}
// Increment count of ALIVE neighbours if the neighbour is ALIVE
if (d_current_gen[curr_nbr] == ALIVE) {
num_alive++;
}
}
}
// If curr_cell is ALIVE
if (d_current_gen[curr_cell] == ALIVE) {
// If num live neighbours is < 2 or > 3, kill it
if (num_alive < 2 || num_alive > 3) {
d_next_gen[curr_cell] = DEAD;
// Else if num live neighbours == 2 || == 3
} else {
d_next_gen[curr_cell] = ALIVE;
}
// Else if curr_cell is DEAD
} else {
// If num live neighbours == 3, make it alive
if (num_alive == 3) {
d_next_gen[curr_cell] = ALIVE;
} else {
d_next_gen[curr_cell] = DEAD;
}
}
}
}
// Function for printing a grid
void print_grid(int rows, int cols, char grid[]) {
cout << "\n";
for (size_t i = 0; i < rows; i++) {
for (size_t j = 0; j < cols; j++) {
cout << grid[i * cols + j];
}
cout << "\n";
}
}
int main(int argc, char * argv[]) {
int opt;
int num_iterations = 1;
bool verbose = false;
string extension = ".txt";
// Reject the run if no file specified
if ((string(argv[argc - 1]).find(extension)) == std::string::npos) {
cout << "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n";
return EXIT_FAILURE;
}
while ((opt = getopt(argc, argv, "i:v:")) != -1) {
switch (opt) {
case 'i':
num_iterations = atoi(argv[2]);
break;
case 'v':
verbose = true;
break;
}
}
int rows = 0;
int cols = 0;
// Temporary vector to store unknown amount of characters from input file
vector<char> temp;
char c;
// Read in data to temp
ifstream fn;
fn.open(argv[argc - 1], ifstream::in);
while (!fn.eof()) {
// If a newline is reached, increment the number of rows
if (fn.peek() == '\n' || fn.peek() == '\r') {
rows++;
}
fn >> c;
temp.push_back(c);
}
fn.close();
// We need to increment rows again because it will not find a newline at the end of the file
rows++;
cols = temp.size() / rows;
// Declare array and memory allocation size.
int array_size = rows * cols;
const int ARRAY_BYTES = sizeof(char) * array_size;
// Host arrays and allocation of host memory
char * h_current_gen = (char *) malloc(ARRAY_BYTES);
char * h_next_gen = (char *) malloc(ARRAY_BYTES);
// Copy data from vector to host array.
for (size_t i = 0; i < array_size; i++) {
h_current_gen[i] = temp[i];
}
// // Printing out the initial state of the game
print_grid(rows, cols, h_current_gen);
// Device arrays
char * d_current_gen;
char * d_next_gen;
// Allocate GPU memory
hipMalloc((void**) &d_current_gen, ARRAY_BYTES);
hipMalloc((void**) &d_next_gen, ARRAY_BYTES);
// Transfer memory to the GPU
hipMemcpy(d_current_gen, h_current_gen, ARRAY_BYTES,
hipMemcpyHostToDevice);
// Loop for as many iterations as was specified (1 if unspecified)
for (size_t i = 0; i < num_iterations; i++) {
// Launch kernel
play_game<<<(array_size + THREADS - 1) / THREADS, THREADS>>>(rows, cols,
d_current_gen, d_next_gen);
// Synchronise threads
hipDeviceSynchronize();
// Memcpy back to host and print the new generation if verbose was set
if (verbose) {
hipMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES,
hipMemcpyDeviceToHost);
print_grid(rows, cols, h_next_gen);
}
// Pass the memory of d_next_gen over to d_current_gen
swap(d_current_gen, d_next_gen);
}
// Transfer memory from GPU back to host
hipMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES, hipMemcpyDeviceToHost);
// Print final result of game only if verbose was not set
if (!verbose) {
print_grid(rows, cols, h_next_gen);
}
// Free CPU memory
free(h_current_gen);
free(h_next_gen);
// Free GPU memory
hipFree(d_current_gen);
hipFree(d_next_gen);
return EXIT_SUCCESS;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <vector>
#include <unistd.h>
#include <string>
#include <stdio.h>
using std::cout;
using std::endl;
using std::vector;
using std::ifstream;
using std::swap;
using std::string;
using namespace std;
#define ALIVE 'X'
#define DEAD '-'
#define THREADS 512
__global__
void play_game(int rows, int cols, char d_current_gen[], char d_next_gen[]) {
int curr_cell = blockIdx.x * blockDim.x + threadIdx.x;
if (curr_cell < rows * cols) {
// Row and column indexes of current cell
int row_idx = curr_cell / cols;
int col_idx = curr_cell % cols;
int curr_nbr;
int nbr_row;
int nbr_col;
int num_alive = 0;
// Loop through to find every neighbour for the current cell
for (size_t i = row_idx - 1; i <= row_idx + 1; i++) {
for (size_t j = col_idx - 1; j <= col_idx + 1; j++) {
nbr_row = i;
nbr_col = j;
// Implementing world wrapping
if (nbr_row < 0) {
nbr_row += rows;
}
if (nbr_col < 0) {
nbr_col += cols;
}
if (nbr_row == rows) {
nbr_row = 0;
}
if (nbr_col == cols) {
nbr_col = 0;
}
// Formula for calculating the current neighbour
curr_nbr = nbr_row * cols + nbr_col;
// Continue if the neighbour == the current cell
if (curr_nbr == curr_cell) {
continue;
}
// Increment count of ALIVE neighbours if the neighbour is ALIVE
if (d_current_gen[curr_nbr] == ALIVE) {
num_alive++;
}
}
}
// If curr_cell is ALIVE
if (d_current_gen[curr_cell] == ALIVE) {
// If num live neighbours is < 2 or > 3, kill it
if (num_alive < 2 || num_alive > 3) {
d_next_gen[curr_cell] = DEAD;
// Else if num live neighbours == 2 || == 3
} else {
d_next_gen[curr_cell] = ALIVE;
}
// Else if curr_cell is DEAD
} else {
// If num live neighbours == 3, make it alive
if (num_alive == 3) {
d_next_gen[curr_cell] = ALIVE;
} else {
d_next_gen[curr_cell] = DEAD;
}
}
}
}
// Function for printing a grid
void print_grid(int rows, int cols, char grid[]) {
cout << "\n";
for (size_t i = 0; i < rows; i++) {
for (size_t j = 0; j < cols; j++) {
cout << grid[i * cols + j];
}
cout << "\n";
}
}
int main(int argc, char * argv[]) {
int opt;
int num_iterations = 1;
bool verbose = false;
string extension = ".txt";
// Reject the run if no file specified
if ((string(argv[argc - 1]).find(extension)) == std::string::npos) {
cout << "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n";
return EXIT_FAILURE;
}
while ((opt = getopt(argc, argv, "i:v:")) != -1) {
switch (opt) {
case 'i':
num_iterations = atoi(argv[2]);
break;
case 'v':
verbose = true;
break;
}
}
int rows = 0;
int cols = 0;
// Temporary vector to store unknown amount of characters from input file
vector<char> temp;
char c;
// Read in data to temp
ifstream fn;
fn.open(argv[argc - 1], ifstream::in);
while (!fn.eof()) {
// If a newline is reached, increment the number of rows
if (fn.peek() == '\n' || fn.peek() == '\r') {
rows++;
}
fn >> c;
temp.push_back(c);
}
fn.close();
// We need to increment rows again because it will not find a newline at the end of the file
rows++;
cols = temp.size() / rows;
// Declare array and memory allocation size.
int array_size = rows * cols;
const int ARRAY_BYTES = sizeof(char) * array_size;
// Host arrays and allocation of host memory
char * h_current_gen = (char *) malloc(ARRAY_BYTES);
char * h_next_gen = (char *) malloc(ARRAY_BYTES);
// Copy data from vector to host array.
for (size_t i = 0; i < array_size; i++) {
h_current_gen[i] = temp[i];
}
// // Printing out the initial state of the game
print_grid(rows, cols, h_current_gen);
// Device arrays
char * d_current_gen;
char * d_next_gen;
// Allocate GPU memory
hipMalloc((void**) &d_current_gen, ARRAY_BYTES);
hipMalloc((void**) &d_next_gen, ARRAY_BYTES);
// Transfer memory to the GPU
hipMemcpy(d_current_gen, h_current_gen, ARRAY_BYTES,
hipMemcpyHostToDevice);
// Loop for as many iterations as was specified (1 if unspecified)
for (size_t i = 0; i < num_iterations; i++) {
// Launch kernel
play_game<<<(array_size + THREADS - 1) / THREADS, THREADS>>>(rows, cols,
d_current_gen, d_next_gen);
// Synchronise threads
hipDeviceSynchronize();
// Memcpy back to host and print the new generation if verbose was set
if (verbose) {
hipMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES,
hipMemcpyDeviceToHost);
print_grid(rows, cols, h_next_gen);
}
// Pass the memory of d_next_gen over to d_current_gen
swap(d_current_gen, d_next_gen);
}
// Transfer memory from GPU back to host
hipMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES, hipMemcpyDeviceToHost);
// Print final result of game only if verbose was not set
if (!verbose) {
print_grid(rows, cols, h_next_gen);
}
// Free CPU memory
free(h_current_gen);
free(h_next_gen);
// Free GPU memory
hipFree(d_current_gen);
hipFree(d_next_gen);
return EXIT_SUCCESS;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9play_gameiiPcS_
.globl _Z9play_gameiiPcS_
.p2align 8
.type _Z9play_gameiiPcS_,@function
_Z9play_gameiiPcS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s5, s4
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_22
s_ashr_i32 s2, s5, 31
v_ashrrev_i32_e32 v3, 31, v1
s_add_i32 s3, s5, s2
s_mov_b32 s8, 0
s_xor_b32 s3, s3, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, v1, v3
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s6, 0, s3
v_xor_b32_e32 v4, v4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_xor_b32_e32 v3, s2, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, s6, v0
s_load_b64 s[6:7], s[0:1], 0x8
v_mul_hi_u32 v2, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v2
v_mul_hi_u32 v0, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v2, v0, s3
v_sub_nc_u32_e32 v2, v4, v2
v_add_nc_u32_e32 v4, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v5, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
v_add_nc_u32_e32 v4, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_mov_b32 s3, exec_lo
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v3
v_sub_nc_u32_e32 v3, v0, v3
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, -1, v3
v_add_nc_u32_e32 v4, 1, v3
v_cmpx_le_u32_e64 v2, v4
s_cbranch_execz .LBB0_11
v_mul_lo_u32 v0, v3, s5
v_mul_lo_u32 v3, s5, v4
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v0, v1, v0
v_sub_nc_u32_e32 v7, v3, v1
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v6, -1, v0
v_add_nc_u32_e32 v8, 1, v0
v_add_nc_u32_e32 v12, 1, v7
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v7, 31, v6
v_ashrrev_i32_e32 v9, 31, v8
v_cmp_le_u32_e32 vcc_lo, v6, v8
s_branch .LBB0_5
.LBB0_3:
s_set_inst_prefetch_distance 0x2
s_or_b32 exec_lo, exec_lo, s10
.LBB0_4:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s9
v_add_co_u32 v2, s2, v2, 1
v_add_co_ci_u32_e64 v3, s2, 0, v3, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u64_e64 s2, v[2:3], v[4:5]
s_or_b32 s8, s2, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execz .LBB0_10
.LBB0_5:
s_and_saveexec_b32 s9, vcc_lo
s_cbranch_execz .LBB0_4
v_ashrrev_i32_e32 v10, 31, v2
v_mov_b32_e32 v14, v12
s_mov_b32 s10, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, s4, v10
v_add_nc_u32_e32 v10, v10, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ne_u32_e64 s2, s4, v10
v_cndmask_b32_e64 v10, 0, v10, s2
s_delay_alu instid0(VALU_DEP_1)
v_mul_lo_u32 v13, v10, s5
v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v10, v6
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_8
.p2align 6
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s11
v_add_co_u32 v10, s2, v10, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e64 v11, s2, 0, v11, s2
v_add_nc_u32_e32 v14, -1, v14
v_cmp_gt_u64_e64 s2, v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s10, s2, s10
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execz .LBB0_3
.LBB0_8:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v15, 31, v10
s_mov_b32 s11, exec_lo
v_and_b32_e32 v15, s5, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v16, v15, v10
v_cmp_ne_u32_e64 s2, v15, v14
v_cndmask_b32_e64 v15, 0, v16, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v15, v15, v13
v_cmpx_ne_u32_e64 v15, v1
s_cbranch_execz .LBB0_7
v_ashrrev_i32_e32 v16, 31, v15
s_waitcnt lgkmcnt(0)
v_add_co_u32 v15, s2, s6, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v16, s2, s7, v16, s2
global_load_u8 v15, v[15:16], off
s_waitcnt vmcnt(0)
v_cmp_eq_u16_e64 s2, 0x58, v15
v_add_co_ci_u32_e64 v0, s2, 0, v0, s2
s_branch .LBB0_7
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s8
.LBB0_11:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s3
v_ashrrev_i32_e32 v2, 31, v1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s6, v1
s_load_b64 s[2:3], s[0:1], 0x10
s_mov_b32 s0, exec_lo
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
global_load_u8 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_ne_u16_e32 0x58, v3
s_xor_b32 s1, exec_lo, s0
s_cbranch_execz .LBB0_17
v_cmp_ne_u32_e32 vcc_lo, 3, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, s0, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v1, s0, s3, v2, s0
s_and_saveexec_b32 s0, vcc_lo
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_14
v_mov_b32_e32 v2, 45
global_store_b8 v[0:1], v2, off
.LBB0_14:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_16
v_mov_b32_e32 v2, 0x58
global_store_b8 v[0:1], v2, off
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s0
.LBB0_17:
s_and_not1_saveexec_b32 s0, s1
s_cbranch_execz .LBB0_22
v_add_nc_u32_e32 v0, -4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_lt_u32_e32 vcc_lo, -3, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, s0, s2, v1
v_add_co_ci_u32_e64 v1, s0, s3, v2, s0
s_and_saveexec_b32 s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_20
v_mov_b32_e32 v2, 0x58
global_store_b8 v[0:1], v2, off
.LBB0_20:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_22
v_mov_b32_e32 v2, 45
global_store_b8 v[0:1], v2, off
.LBB0_22:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9play_gameiiPcS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 17
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9play_gameiiPcS_, .Lfunc_end0-_Z9play_gameiiPcS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9play_gameiiPcS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9play_gameiiPcS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 17
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <vector>
#include <unistd.h>
#include <string>
#include <stdio.h>
using std::cout;
using std::endl;
using std::vector;
using std::ifstream;
using std::swap;
using std::string;
using namespace std;
#define ALIVE 'X'
#define DEAD '-'
#define THREADS 512
__global__
void play_game(int rows, int cols, char d_current_gen[], char d_next_gen[]) {
int curr_cell = blockIdx.x * blockDim.x + threadIdx.x;
if (curr_cell < rows * cols) {
// Row and column indexes of current cell
int row_idx = curr_cell / cols;
int col_idx = curr_cell % cols;
int curr_nbr;
int nbr_row;
int nbr_col;
int num_alive = 0;
// Loop through to find every neighbour for the current cell
for (size_t i = row_idx - 1; i <= row_idx + 1; i++) {
for (size_t j = col_idx - 1; j <= col_idx + 1; j++) {
nbr_row = i;
nbr_col = j;
// Implementing world wrapping
if (nbr_row < 0) {
nbr_row += rows;
}
if (nbr_col < 0) {
nbr_col += cols;
}
if (nbr_row == rows) {
nbr_row = 0;
}
if (nbr_col == cols) {
nbr_col = 0;
}
// Formula for calculating the current neighbour
curr_nbr = nbr_row * cols + nbr_col;
// Continue if the neighbour == the current cell
if (curr_nbr == curr_cell) {
continue;
}
// Increment count of ALIVE neighbours if the neighbour is ALIVE
if (d_current_gen[curr_nbr] == ALIVE) {
num_alive++;
}
}
}
// If curr_cell is ALIVE
if (d_current_gen[curr_cell] == ALIVE) {
// If num live neighbours is < 2 or > 3, kill it
if (num_alive < 2 || num_alive > 3) {
d_next_gen[curr_cell] = DEAD;
// Else if num live neighbours == 2 || == 3
} else {
d_next_gen[curr_cell] = ALIVE;
}
// Else if curr_cell is DEAD
} else {
// If num live neighbours == 3, make it alive
if (num_alive == 3) {
d_next_gen[curr_cell] = ALIVE;
} else {
d_next_gen[curr_cell] = DEAD;
}
}
}
}
// Function for printing a grid
void print_grid(int rows, int cols, char grid[]) {
cout << "\n";
for (size_t i = 0; i < rows; i++) {
for (size_t j = 0; j < cols; j++) {
cout << grid[i * cols + j];
}
cout << "\n";
}
}
int main(int argc, char * argv[]) {
int opt;
int num_iterations = 1;
bool verbose = false;
string extension = ".txt";
// Reject the run if no file specified
if ((string(argv[argc - 1]).find(extension)) == std::string::npos) {
cout << "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n";
return EXIT_FAILURE;
}
while ((opt = getopt(argc, argv, "i:v:")) != -1) {
switch (opt) {
case 'i':
num_iterations = atoi(argv[2]);
break;
case 'v':
verbose = true;
break;
}
}
int rows = 0;
int cols = 0;
// Temporary vector to store unknown amount of characters from input file
vector<char> temp;
char c;
// Read in data to temp
ifstream fn;
fn.open(argv[argc - 1], ifstream::in);
while (!fn.eof()) {
// If a newline is reached, increment the number of rows
if (fn.peek() == '\n' || fn.peek() == '\r') {
rows++;
}
fn >> c;
temp.push_back(c);
}
fn.close();
// We need to increment rows again because it will not find a newline at the end of the file
rows++;
cols = temp.size() / rows;
// Declare array and memory allocation size.
int array_size = rows * cols;
const int ARRAY_BYTES = sizeof(char) * array_size;
// Host arrays and allocation of host memory
char * h_current_gen = (char *) malloc(ARRAY_BYTES);
char * h_next_gen = (char *) malloc(ARRAY_BYTES);
// Copy data from vector to host array.
for (size_t i = 0; i < array_size; i++) {
h_current_gen[i] = temp[i];
}
// // Printing out the initial state of the game
print_grid(rows, cols, h_current_gen);
// Device arrays
char * d_current_gen;
char * d_next_gen;
// Allocate GPU memory
hipMalloc((void**) &d_current_gen, ARRAY_BYTES);
hipMalloc((void**) &d_next_gen, ARRAY_BYTES);
// Transfer memory to the GPU
hipMemcpy(d_current_gen, h_current_gen, ARRAY_BYTES,
hipMemcpyHostToDevice);
// Loop for as many iterations as was specified (1 if unspecified)
for (size_t i = 0; i < num_iterations; i++) {
// Launch kernel
play_game<<<(array_size + THREADS - 1) / THREADS, THREADS>>>(rows, cols,
d_current_gen, d_next_gen);
// Synchronise threads
hipDeviceSynchronize();
// Memcpy back to host and print the new generation if verbose was set
if (verbose) {
hipMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES,
hipMemcpyDeviceToHost);
print_grid(rows, cols, h_next_gen);
}
// Pass the memory of d_next_gen over to d_current_gen
swap(d_current_gen, d_next_gen);
}
// Transfer memory from GPU back to host
hipMemcpy(h_next_gen, d_next_gen, ARRAY_BYTES, hipMemcpyDeviceToHost);
// Print final result of game only if verbose was not set
if (!verbose) {
print_grid(rows, cols, h_next_gen);
}
// Free CPU memory
free(h_current_gen);
free(h_next_gen);
// Free GPU memory
hipFree(d_current_gen);
hipFree(d_next_gen);
return EXIT_SUCCESS;
} | .text
.file "grid.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__play_gameiiPcS_ # -- Begin function _Z24__device_stub__play_gameiiPcS_
.p2align 4, 0x90
.type _Z24__device_stub__play_gameiiPcS_,@function
_Z24__device_stub__play_gameiiPcS_: # @_Z24__device_stub__play_gameiiPcS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 12(%rsp)
movl %esi, 8(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 8(%rsp), %rax
movq %rax, 88(%rsp)
leaq 72(%rsp), %rax
movq %rax, 96(%rsp)
leaq 64(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z9play_gameiiPcS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z24__device_stub__play_gameiiPcS_, .Lfunc_end0-_Z24__device_stub__play_gameiiPcS_
.cfi_endproc
# -- End function
.globl _Z10print_gridiiPc # -- Begin function _Z10print_gridiiPc
.p2align 4, 0x90
.type _Z10print_gridiiPc,@function
_Z10print_gridiiPc: # @_Z10print_gridiiPc
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %rbx
movl %esi, 4(%rsp) # 4-byte Spill
movl %edi, %r14d
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
testl %r14d, %r14d
je .LBB1_7
# %bb.1: # %.preheader.lr.ph
movslq %r14d, %r15
movslq 4(%rsp), %r12 # 4-byte Folded Reload
xorl %r13d, %r13d
leaq 3(%rsp), %r14
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_6: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r13
addq %r12, %rbx
cmpq %r15, %r13
je .LBB1_7
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
cmpl $0, 4(%rsp) # 4-byte Folded Reload
je .LBB1_6
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
xorl %ebp, %ebp
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_8: # in Loop: Header=BB1_4 Depth=2
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
.LBB1_9: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
# in Loop: Header=BB1_4 Depth=2
incq %rbp
cmpq %rbp, %r12
je .LBB1_6
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
movzbl (%rbx,%rbp), %eax
movb %al, 3(%rsp)
movq _ZSt4cout(%rip), %rcx
movq -24(%rcx), %rcx
cmpq $0, _ZSt4cout+16(%rcx)
je .LBB1_8
# %bb.5: # in Loop: Header=BB1_4 Depth=2
movl $_ZSt4cout, %edi
movl $1, %edx
movq %r14, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB1_9
.LBB1_7: # %._crit_edge13
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z10print_gridiiPc, .Lfunc_end1-_Z10print_gridiiPc
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $712, %rsp # imm = 0x2C8
.cfi_def_cfa_offset 768
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 72(%rsp), %rax
movq %rax, 56(%rsp)
movl $1954051118, 72(%rsp) # imm = 0x7478742E
movq $4, 64(%rsp)
movb $0, 76(%rsp)
movslq %edi, %r12
movq -8(%rsi,%r12,8), %r14
leaq 208(%rsp), %r13
movq %r13, 192(%rsp)
testq %r14, %r14
je .LBB2_1
# %bb.3:
movq %rsi, %rbx
movl %edi, %ebp
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq strlen
movq %rax, %r15
cmpq $16, %rax
jb .LBB2_12
# %bb.4:
testq %r15, %r15
js .LBB2_5
# %bb.7:
movq %r15, %rdi
incq %rdi
js .LBB2_8
# %bb.10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm.exit.i.i83
.Ltmp0:
.cfi_escape 0x2e, 0x00
callq _Znwm
.Ltmp1:
# %bb.11: # %.noexc89
movq %rax, 192(%rsp)
movq %r15, 208(%rsp)
.LBB2_12:
testq %r15, %r15
je .LBB2_16
# %bb.13:
movq 192(%rsp), %rdi
cmpq $1, %r15
jne .LBB2_15
# %bb.14:
movzbl (%r14), %eax
movb %al, (%rdi)
jmp .LBB2_16
.LBB2_15:
.cfi_escape 0x2e, 0x00
movq %r14, %rsi
movq %r15, %rdx
callq memcpy@PLT
.LBB2_16: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit90
movq %r15, 200(%rsp)
movq 192(%rsp), %rax
movb $0, (%rax,%r15)
movq 64(%rsp), %r14
testq %r14, %r14
je .LBB2_17
# %bb.18:
movq 200(%rsp), %rdx
movq $-1, %r15
testq %rdx, %rdx
je .LBB2_29
# %bb.19:
cmpq %r14, %rdx
jb .LBB2_29
# %bb.20: # %.lr.ph.i.i
movq %r12, 8(%rsp) # 8-byte Spill
movq 56(%rsp), %r15
movq 192(%rsp), %r13
leaq (%rdx,%r13), %r12
movsbl (%r15), %eax
movl %eax, 16(%rsp) # 4-byte Spill
movq %r13, 24(%rsp) # 8-byte Spill
.p2align 4, 0x90
.LBB2_21: # =>This Inner Loop Header: Depth=1
subq %r14, %rdx
incq %rdx
jne .LBB2_23
# %bb.22: # in Loop: Header=BB2_21 Depth=1
xorl %r13d, %r13d
testq %r13, %r13
jne .LBB2_25
jmp .LBB2_28
.p2align 4, 0x90
.LBB2_23: # in Loop: Header=BB2_21 Depth=1
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
movl 16(%rsp), %esi # 4-byte Reload
callq memchr
movq %rax, %r13
testq %r13, %r13
je .LBB2_28
.LBB2_25: # %_ZNSt11char_traitsIcE7compareEPKcS2_m.exit.i.i
# in Loop: Header=BB2_21 Depth=1
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
movq %r15, %rsi
movq %r14, %rdx
callq bcmp@PLT
testl %eax, %eax
je .LBB2_26
# %bb.27: # in Loop: Header=BB2_21 Depth=1
incq %r13
movq %r12, %rdx
subq %r13, %rdx
cmpq %r14, %rdx
jae .LBB2_21
.LBB2_28:
movq 8(%rsp), %r12 # 8-byte Reload
leaq 208(%rsp), %r13
movq $-1, %r15
jmp .LBB2_29
.LBB2_17:
xorl %r15d, %r15d
.LBB2_29: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findERKS4_m.exit
movq 192(%rsp), %rdi
cmpq %r13, %rdi
je .LBB2_31
# %bb.30: # %.critedge.i.i
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_31: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
cmpq $-1, %r15
je .LBB2_109
# %bb.32: # %.preheader125
movl $1, %r14d
movb $1, %al
movl %eax, 8(%rsp) # 4-byte Spill
.p2align 4, 0x90
.LBB2_33: # =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
movl $.L.str.3, %edx
movl %ebp, %edi
movq %rbx, %rsi
callq getopt
cmpl $-1, %eax
je .LBB2_38
# %bb.34: # in Loop: Header=BB2_33 Depth=1
cmpl $118, %eax
je .LBB2_37
# %bb.35: # in Loop: Header=BB2_33 Depth=1
cmpl $105, %eax
jne .LBB2_33
# %bb.36: # in Loop: Header=BB2_33 Depth=1
movq 16(%rbx), %rdi
.cfi_escape 0x2e, 0x00
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
jmp .LBB2_33
.LBB2_37: # in Loop: Header=BB2_33 Depth=1
movl $0, 8(%rsp) # 4-byte Folded Spill
jmp .LBB2_33
.LBB2_38:
.Ltmp2:
.cfi_escape 0x2e, 0x00
leaq 192(%rsp), %r15
movq %r15, %rdi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp3:
# %bb.39:
movq %r14, 88(%rsp) # 8-byte Spill
movq -8(%rbx,%r12,8), %rsi
leaq 208(%rsp), %rdi
xorl %r14d, %r14d
.Ltmp5:
.cfi_escape 0x2e, 0x00
movl $8, %edx
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp6:
# %bb.40: # %.noexc92
movq 192(%rsp), %rcx
addq -24(%rcx), %r15
testq %rax, %rax
jne .LBB2_42
# %bb.41:
movl 32(%r15), %r14d
orl $4, %r14d
.LBB2_42: # %.invoke
xorl %ebx, %ebx
.Ltmp7:
.cfi_escape 0x2e, 0x00
movl %r14d, %esi
xorl %r14d, %r14d
movq %r15, %rdi
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp8:
# %bb.43: # %_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode.exit
movq 192(%rsp), %rax
movq -24(%rax), %rax
testb $2, 224(%rsp,%rax)
jne .LBB2_44
# %bb.45: # %.lr.ph.preheader
xorl %ebx, %ebx
leaq 192(%rsp), %rbp
xorl %r13d, %r13d
xorl %r12d, %r12d
xorl %r15d, %r15d
jmp .LBB2_46
.p2align 4, 0x90
.LBB2_53: # in Loop: Header=BB2_46 Depth=1
movzbl 7(%rsp), %eax
movb %al, (%r12)
movq %r13, %r14
.LBB2_73: # %_ZNSt6vectorIcSaIcEE9push_backERKc.exit
# in Loop: Header=BB2_46 Depth=1
incq %r12
movq 192(%rsp), %rax
movq -24(%rax), %rax
testb $2, 224(%rsp,%rax)
jne .LBB2_74
.LBB2_46: # %.lr.ph
# =>This Inner Loop Header: Depth=1
.Ltmp9:
.cfi_escape 0x2e, 0x00
movq %rbp, %rdi
callq _ZNSi4peekEv
.Ltmp10:
# %bb.47: # in Loop: Header=BB2_46 Depth=1
cmpl $10, %eax
je .LBB2_50
# %bb.48: # in Loop: Header=BB2_46 Depth=1
.Ltmp11:
.cfi_escape 0x2e, 0x00
movq %rbp, %rdi
callq _ZNSi4peekEv
.Ltmp12:
# %bb.49: # in Loop: Header=BB2_46 Depth=1
cmpl $13, %eax
jne .LBB2_51
.LBB2_50: # in Loop: Header=BB2_46 Depth=1
incl %ebx
.LBB2_51: # in Loop: Header=BB2_46 Depth=1
.Ltmp13:
.cfi_escape 0x2e, 0x00
movq %rbp, %rdi
leaq 7(%rsp), %rsi
callq _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
.Ltmp14:
# %bb.52: # in Loop: Header=BB2_46 Depth=1
cmpq %r15, %r12
jne .LBB2_53
# %bb.57: # in Loop: Header=BB2_46 Depth=1
subq %r13, %r12
movabsq $9223372036854775807, %r15 # imm = 0x7FFFFFFFFFFFFFFF
cmpq %r15, %r12
je .LBB2_58
# %bb.60: # %_ZNKSt6vectorIcSaIcEE12_M_check_lenEmPKc.exit.i.i
# in Loop: Header=BB2_46 Depth=1
cmpq $1, %r12
movq %r12, %rax
adcq $0, %rax
leaq (%rax,%r12), %rcx
cmpq %r15, %rcx
jae .LBB2_61
# %bb.62: # %_ZNKSt6vectorIcSaIcEE12_M_check_lenEmPKc.exit.i.i
# in Loop: Header=BB2_46 Depth=1
addq %r12, %rax
jae .LBB2_63
.LBB2_64: # %_ZNKSt6vectorIcSaIcEE12_M_check_lenEmPKc.exit.i.i
# in Loop: Header=BB2_46 Depth=1
testq %r15, %r15
je .LBB2_65
.LBB2_66: # in Loop: Header=BB2_46 Depth=1
.Ltmp15:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _Znwm
.Ltmp16:
# %bb.67: # in Loop: Header=BB2_46 Depth=1
movq %rax, %r14
jmp .LBB2_68
.LBB2_61: # %_ZNKSt6vectorIcSaIcEE12_M_check_lenEmPKc.exit.i.i
# in Loop: Header=BB2_46 Depth=1
movq %r15, %rcx
addq %r12, %rax
jb .LBB2_64
.LBB2_63: # %_ZNKSt6vectorIcSaIcEE12_M_check_lenEmPKc.exit.i.i
# in Loop: Header=BB2_46 Depth=1
movq %rcx, %r15
testq %r15, %r15
jne .LBB2_66
.LBB2_65: # in Loop: Header=BB2_46 Depth=1
xorl %r14d, %r14d
.LBB2_68: # %_ZNSt12_Vector_baseIcSaIcEE11_M_allocateEm.exit.i.i
# in Loop: Header=BB2_46 Depth=1
movzbl 7(%rsp), %eax
movb %al, (%r14,%r12)
testq %r12, %r12
jle .LBB2_70
# %bb.69: # in Loop: Header=BB2_46 Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movq %r13, %rsi
movq %r12, %rdx
callq memmove@PLT
.LBB2_70: # %_ZNSt6vectorIcSaIcEE11_S_relocateEPcS2_S2_RS0_.exit.i.i
# in Loop: Header=BB2_46 Depth=1
testq %r13, %r13
je .LBB2_72
# %bb.71: # in Loop: Header=BB2_46 Depth=1
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq _ZdlPv
.LBB2_72: # %_ZNSt6vectorIcSaIcEE17_M_realloc_insertIJRKcEEEvN9__gnu_cxx17__normal_iteratorIPcS1_EEDpOT_.exit.i
# in Loop: Header=BB2_46 Depth=1
addq %r14, %r12
addq %r14, %r15
movq %r14, %r13
jmp .LBB2_73
.LBB2_109:
movl $1, %ebx
.Ltmp56:
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $88, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp57:
jmp .LBB2_110
.LBB2_44:
xorl %r12d, %r12d
xorl %r14d, %r14d
.LBB2_74: # %._crit_edge
.Ltmp18:
.cfi_escape 0x2e, 0x00
leaq 208(%rsp), %rdi
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp19:
# %bb.75: # %.noexc99
testq %rax, %rax
jne .LBB2_77
# %bb.76:
movq 192(%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
addq $192, %rdi
movl 224(%rsp,%rax), %esi
orl $4, %esi
.Ltmp20:
.cfi_escape 0x2e, 0x00
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp21:
.LBB2_77: # %_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv.exit
incl %ebx
subq %r14, %r12
movslq %ebx, %rcx
movq %r12, %rax
xorl %edx, %edx
divq %rcx
movl %ebx, %ebp
movq %rax, 24(%rsp) # 8-byte Spill
imull %eax, %ebp
movslq %ebp, %r15
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq malloc
movq %rax, %r13
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
testl %r15d, %r15d
je .LBB2_80
# %bb.78: # %.lr.ph143.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_79: # %.lr.ph143
# =>This Inner Loop Header: Depth=1
movzbl (%r14,%rax), %ecx
movb %cl, (%r13,%rax)
incq %rax
cmpq %r15, %rax
jb .LBB2_79
.LBB2_80: # %._crit_edge144
.Ltmp22:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
movq 24(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
movq %r13, %rdx
callq _Z10print_gridiiPc
.Ltmp23:
movq 88(%rsp), %r12 # 8-byte Reload
# %bb.81:
.Ltmp25:
.cfi_escape 0x2e, 0x00
leaq 40(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
.Ltmp26:
# %bb.82:
.Ltmp27:
.cfi_escape 0x2e, 0x00
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
.Ltmp28:
# %bb.83:
movq 40(%rsp), %rdi
.Ltmp29:
.cfi_escape 0x2e, 0x00
movq %r13, %rsi
movq %r15, %rdx
movl $1, %ecx
callq hipMemcpy
.Ltmp30:
# %bb.84: # %.preheader
testl %r12d, %r12d
je .LBB2_95
# %bb.85: # %.lr.ph146
movq %rbp, %rcx
movslq %r12d, %rbp
leal 511(%rcx), %eax
addl $1022, %ecx # imm = 0x3FE
testl %eax, %eax
cmovnsl %eax, %ecx
sarl $9, %ecx
movabsq $4294967296, %r12 # imm = 0x100000000
orq %rcx, %r12
jmp .LBB2_86
.p2align 4, 0x90
.LBB2_94: # in Loop: Header=BB2_86 Depth=1
movq 40(%rsp), %rax
movq 32(%rsp), %rcx
movq %rcx, 40(%rsp)
movq %rax, 32(%rsp)
decq %rbp
je .LBB2_95
.LBB2_86: # =>This Inner Loop Header: Depth=1
.Ltmp31:
.cfi_escape 0x2e, 0x00
movq %r12, %rdi
movl $1, %esi
movabsq $4294967808, %rdx # imm = 0x100000200
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
.Ltmp32:
# %bb.87: # in Loop: Header=BB2_86 Depth=1
testl %eax, %eax
jne .LBB2_90
# %bb.88: # in Loop: Header=BB2_86 Depth=1
movq 40(%rsp), %rax
movq 32(%rsp), %rcx
movl %ebx, 52(%rsp)
movq 24(%rsp), %rdx # 8-byte Reload
movl %edx, 48(%rsp)
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
leaq 52(%rsp), %rax
movq %rax, 160(%rsp)
leaq 48(%rsp), %rax
movq %rax, 168(%rsp)
leaq 152(%rsp), %rax
movq %rax, 176(%rsp)
leaq 144(%rsp), %rax
movq %rax, 184(%rsp)
.Ltmp33:
.cfi_escape 0x2e, 0x00
leaq 128(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
.Ltmp34:
# %bb.89: # %.noexc101
# in Loop: Header=BB2_86 Depth=1
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
.Ltmp35:
.cfi_escape 0x2e, 0x10
movl $_Z9play_gameiiPcS_, %edi
leaq 160(%rsp), %r9
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.Ltmp36:
.LBB2_90: # in Loop: Header=BB2_86 Depth=1
.Ltmp37:
.cfi_escape 0x2e, 0x00
callq hipDeviceSynchronize
.Ltmp38:
# %bb.91: # in Loop: Header=BB2_86 Depth=1
testb $1, 8(%rsp) # 1-byte Folded Reload
jne .LBB2_94
# %bb.92: # in Loop: Header=BB2_86 Depth=1
movq 32(%rsp), %rsi
.Ltmp39:
.cfi_escape 0x2e, 0x00
movq 16(%rsp), %rdi # 8-byte Reload
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
.Ltmp40:
# %bb.93: # in Loop: Header=BB2_86 Depth=1
.Ltmp41:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
movq 24(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
movq 16(%rsp), %rdx # 8-byte Reload
callq _Z10print_gridiiPc
.Ltmp42:
jmp .LBB2_94
.LBB2_95: # %._crit_edge147
movq 32(%rsp), %rsi
.Ltmp44:
.cfi_escape 0x2e, 0x00
movq 16(%rsp), %rdi # 8-byte Reload
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
.Ltmp45:
# %bb.96:
testb $1, 8(%rsp) # 1-byte Folded Reload
je .LBB2_98
# %bb.97:
.Ltmp46:
.cfi_escape 0x2e, 0x00
movl %ebx, %edi
movq 24(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
movq 16(%rsp), %rdx # 8-byte Reload
callq _Z10print_gridiiPc
.Ltmp47:
.LBB2_98:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq free
.cfi_escape 0x2e, 0x00
movq 16(%rsp), %rdi # 8-byte Reload
callq free
movq 40(%rsp), %rdi
.Ltmp48:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp49:
# %bb.99:
movq 32(%rsp), %rdi
.Ltmp50:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp51:
# %bb.100:
.cfi_escape 0x2e, 0x00
leaq 192(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 448(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq _ZNSt8ios_baseD2Ev
xorl %ebx, %ebx
testq %r14, %r14
je .LBB2_110
# %bb.101:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZdlPv
.LBB2_110: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
movq 56(%rsp), %rdi
leaq 72(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_112
# %bb.111: # %.critedge.i.i106
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_112: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit108
movl %ebx, %eax
addq $712, %rsp # imm = 0x2C8
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_26:
.cfi_def_cfa_offset 768
subq 24(%rsp), %r13 # 8-byte Folded Reload
movq %r13, %r15
movq 8(%rsp), %r12 # 8-byte Reload
leaq 208(%rsp), %r13
jmp .LBB2_29
.LBB2_8: # %.noexc11.i84
.Ltmp59:
.cfi_escape 0x2e, 0x00
callq _ZSt17__throw_bad_allocv
.Ltmp60:
# %bb.9: # %.noexc88
.LBB2_58:
.Ltmp53:
.cfi_escape 0x2e, 0x00
movl $.L.str.6, %edi
movq %r13, %r14
callq _ZSt20__throw_length_errorPKc
.Ltmp54:
# %bb.59: # %.noexc96
.LBB2_1:
.Ltmp63:
.cfi_escape 0x2e, 0x00
movl $.L.str.4, %edi
callq _ZSt19__throw_logic_errorPKc
.Ltmp64:
# %bb.2: # %.noexc86
.LBB2_5: # %.noexc.i85
.Ltmp61:
.cfi_escape 0x2e, 0x00
movl $.L.str.5, %edi
callq _ZSt20__throw_length_errorPKc
.Ltmp62:
# %bb.6: # %.noexc87
.LBB2_118:
.Ltmp58:
jmp .LBB2_114
.LBB2_102:
.Ltmp24:
jmp .LBB2_105
.LBB2_54:
.Ltmp4:
movq %rax, %rbx
xorl %r13d, %r13d
jmp .LBB2_107
.LBB2_104:
.Ltmp52:
jmp .LBB2_105
.LBB2_56: # %.loopexit.split-lp
.Ltmp55:
jmp .LBB2_105
.LBB2_55: # %.loopexit
.Ltmp17:
movq %rax, %rbx
jmp .LBB2_106
.LBB2_103:
.Ltmp43:
.LBB2_105:
movq %rax, %rbx
movq %r14, %r13
.LBB2_106:
.cfi_escape 0x2e, 0x00
leaq 192(%rsp), %rdi
movl $_ZTTSt14basic_ifstreamIcSt11char_traitsIcEE, %esi
callq _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev
leaq 448(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq _ZNSt8ios_baseD2Ev
.LBB2_107:
testq %r13, %r13
je .LBB2_115
# %bb.108:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq _ZdlPv
jmp .LBB2_115
.LBB2_113:
.Ltmp65:
.LBB2_114: # %_ZNSt6vectorIcSaIcEED2Ev.exit105
movq %rax, %rbx
.LBB2_115: # %_ZNSt6vectorIcSaIcEED2Ev.exit105
movq 56(%rsp), %rdi
leaq 72(%rsp), %rax
cmpq %rax, %rdi
je .LBB2_117
# %bb.116: # %.critedge.i.i109
.cfi_escape 0x2e, 0x00
callq _ZdlPv
.LBB2_117: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit111
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table2:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1
.uleb128 .Ltmp65-.Lfunc_begin0 # jumps to .Ltmp65
.byte 0 # On action: cleanup
.uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp2-.Ltmp1 # Call between .Ltmp1 and .Ltmp2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp2-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp3-.Ltmp2 # Call between .Ltmp2 and .Ltmp3
.uleb128 .Ltmp4-.Lfunc_begin0 # jumps to .Ltmp4
.byte 0 # On action: cleanup
.uleb128 .Ltmp5-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp8-.Ltmp5 # Call between .Ltmp5 and .Ltmp8
.uleb128 .Ltmp55-.Lfunc_begin0 # jumps to .Ltmp55
.byte 0 # On action: cleanup
.uleb128 .Ltmp9-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp16-.Ltmp9 # Call between .Ltmp9 and .Ltmp16
.uleb128 .Ltmp17-.Lfunc_begin0 # jumps to .Ltmp17
.byte 0 # On action: cleanup
.uleb128 .Ltmp16-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Ltmp56-.Ltmp16 # Call between .Ltmp16 and .Ltmp56
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp56-.Lfunc_begin0 # >> Call Site 7 <<
.uleb128 .Ltmp57-.Ltmp56 # Call between .Ltmp56 and .Ltmp57
.uleb128 .Ltmp58-.Lfunc_begin0 # jumps to .Ltmp58
.byte 0 # On action: cleanup
.uleb128 .Ltmp18-.Lfunc_begin0 # >> Call Site 8 <<
.uleb128 .Ltmp21-.Ltmp18 # Call between .Ltmp18 and .Ltmp21
.uleb128 .Ltmp55-.Lfunc_begin0 # jumps to .Ltmp55
.byte 0 # On action: cleanup
.uleb128 .Ltmp22-.Lfunc_begin0 # >> Call Site 9 <<
.uleb128 .Ltmp23-.Ltmp22 # Call between .Ltmp22 and .Ltmp23
.uleb128 .Ltmp24-.Lfunc_begin0 # jumps to .Ltmp24
.byte 0 # On action: cleanup
.uleb128 .Ltmp25-.Lfunc_begin0 # >> Call Site 10 <<
.uleb128 .Ltmp30-.Ltmp25 # Call between .Ltmp25 and .Ltmp30
.uleb128 .Ltmp52-.Lfunc_begin0 # jumps to .Ltmp52
.byte 0 # On action: cleanup
.uleb128 .Ltmp31-.Lfunc_begin0 # >> Call Site 11 <<
.uleb128 .Ltmp42-.Ltmp31 # Call between .Ltmp31 and .Ltmp42
.uleb128 .Ltmp43-.Lfunc_begin0 # jumps to .Ltmp43
.byte 0 # On action: cleanup
.uleb128 .Ltmp44-.Lfunc_begin0 # >> Call Site 12 <<
.uleb128 .Ltmp51-.Ltmp44 # Call between .Ltmp44 and .Ltmp51
.uleb128 .Ltmp52-.Lfunc_begin0 # jumps to .Ltmp52
.byte 0 # On action: cleanup
.uleb128 .Ltmp59-.Lfunc_begin0 # >> Call Site 13 <<
.uleb128 .Ltmp60-.Ltmp59 # Call between .Ltmp59 and .Ltmp60
.uleb128 .Ltmp65-.Lfunc_begin0 # jumps to .Ltmp65
.byte 0 # On action: cleanup
.uleb128 .Ltmp53-.Lfunc_begin0 # >> Call Site 14 <<
.uleb128 .Ltmp54-.Ltmp53 # Call between .Ltmp53 and .Ltmp54
.uleb128 .Ltmp55-.Lfunc_begin0 # jumps to .Ltmp55
.byte 0 # On action: cleanup
.uleb128 .Ltmp63-.Lfunc_begin0 # >> Call Site 15 <<
.uleb128 .Ltmp62-.Ltmp63 # Call between .Ltmp63 and .Ltmp62
.uleb128 .Ltmp65-.Lfunc_begin0 # jumps to .Ltmp65
.byte 0 # On action: cleanup
.uleb128 .Ltmp62-.Lfunc_begin0 # >> Call Site 16 <<
.uleb128 .Lfunc_end2-.Ltmp62 # Call between .Ltmp62 and .Lfunc_end2
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9play_gameiiPcS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9play_gameiiPcS_,@object # @_Z9play_gameiiPcS_
.section .rodata,"a",@progbits
.globl _Z9play_gameiiPcS_
.p2align 3, 0x0
_Z9play_gameiiPcS_:
.quad _Z24__device_stub__play_gameiiPcS_
.size _Z9play_gameiiPcS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\n"
.size .L.str, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Error: You must specify a .txt file as the last parameter (./cugol -i 100 -v input.txt)\n"
.size .L.str.2, 89
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "i:v:"
.size .L.str.3, 5
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "basic_string: construction from null is not valid"
.size .L.str.4, 50
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "basic_string::_M_create"
.size .L.str.5, 24
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "vector::_M_realloc_insert"
.size .L.str.6, 26
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9play_gameiiPcS_"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__play_gameiiPcS_
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _Z9play_gameiiPcS_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Reads a cell at (x+dx, y+dy)
__device__ int read_cell(int * source_domain, int x, int y, int dx, int dy,
unsigned int domain_x, unsigned int domain_y)
{
x = (unsigned int)(x + dx) % domain_x; // Wrap around
y = (unsigned int)(y + dy) % domain_y;
return source_domain[y * domain_x + x];
}
// Compute kernel
__global__ void life_kernel(int * source_domain, int * dest_domain,
int domain_x, int domain_y)
{
int tx = blockIdx.x * blockDim.x + threadIdx.x;
int ty = blockIdx.y;
// Read cell
int myself = read_cell(source_domain, tx, ty, 0, 0,domain_x, domain_y);
// Read the 8 neighbors and count number of blue and red
int blue = 0, red = 0, alive = 0;
// if the cell is not empty, break out on alive neighboor count exceeding 3
for (int x_offset = -1 ; x_offset < 2 && (!myself || (alive < 4)) ; x_offset++)
{
for (int y_offset = -1 ; y_offset < 2 && (!myself || (alive < 4)) ; y_offset++)
{
// ignore self
if (x_offset == 0 && y_offset == 0)
continue;
switch (read_cell (source_domain, tx, ty, x_offset, y_offset, domain_x, domain_y))
{
case 1: red++; alive++; break;
case 2: blue++; alive++; break;
default: break;
}
}
}
// Compute new value
// empty cell case
if (!myself)
{
if (alive == 3)
if (blue < red)
myself = 1;
else
myself = 2;
}
// live cell cases
else
{
// die cases
if (alive != 2 && alive != 3)
myself = 0;
// else survive
}
// Write it in dest_domain
dest_domain[ty * domain_x + tx] = myself;
} | code for sm_80
Function : _Z11life_kernelPiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ I2F.U32.RP R6, c[0x0][0x170] ; /* 0x00005c0000067b06 */
/* 0x000e220000209000 */
/*0020*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e620000002500 */
/*0030*/ ISETP.NE.U32.AND P3, PT, RZ, c[0x0][0x174], PT ; /* 0x00005d00ff007a0c */
/* 0x000fe20003f65070 */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0050*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e660000002100 */
/*0060*/ I2F.U32.RP R7, c[0x0][0x174] ; /* 0x00005d0000077b06 */
/* 0x000ea20000209000 */
/*0070*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000eee0000002600 */
/*0080*/ MUFU.RCP R6, R6 ; /* 0x0000000600067308 */
/* 0x001e300000001000 */
/*0090*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */
/* 0x004ea20000001000 */
/*00a0*/ IADD3 R2, R6, 0xffffffe, RZ ; /* 0x0ffffffe06027810 */
/* 0x001fce0007ffe0ff */
/*00b0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000122000021f000 */
/*00c0*/ IADD3 R4, R7, 0xffffffe, RZ ; /* 0x0ffffffe07047810 */
/* 0x004fce0007ffe0ff */
/*00d0*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x000462000021f000 */
/*00e0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x001fe400078e00ff */
/*00f0*/ IMAD.MOV R6, RZ, RZ, -R3 ; /* 0x000000ffff067224 */
/* 0x010fe400078e0a03 */
/*0100*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x004fe400078e00ff */
/*0110*/ IMAD R7, R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a24 */
/* 0x000fe400078e02ff */
/*0120*/ IMAD.MOV R11, RZ, RZ, -R5 ; /* 0x000000ffff0b7224 */
/* 0x002fe400078e0a05 */
/*0130*/ IMAD.HI.U32 R2, R3, R7, R2 ; /* 0x0000000703027227 */
/* 0x000fc800078e0002 */
/*0140*/ IMAD R11, R11, c[0x0][0x174], RZ ; /* 0x00005d000b0b7a24 */
/* 0x000fe400078e02ff */
/*0150*/ IMAD R3, R8, c[0x0][0x0], R9 ; /* 0x0000000008037a24 */
/* 0x000fe400078e0209 */
/*0160*/ IMAD.HI.U32 R5, R5, R11, R4 ; /* 0x0000000b05057227 */
/* 0x000fc800078e0004 */
/*0170*/ IMAD.HI.U32 R2, R2, R3, RZ ; /* 0x0000000302027227 */
/* 0x000fc800078e00ff */
/*0180*/ IMAD.HI.U32 R5, R5, R0, RZ ; /* 0x0000000005057227 */
/* 0x008fc800078e00ff */
/*0190*/ IMAD.MOV R2, RZ, RZ, -R2 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0a02 */
/*01a0*/ IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff057224 */
/* 0x000fe400078e0a05 */
/*01b0*/ IMAD R2, R2, c[0x0][0x170], R3 ; /* 0x00005c0002027a24 */
/* 0x000fe400078e0203 */
/*01c0*/ IMAD R5, R5, c[0x0][0x174], R0 ; /* 0x00005d0005057a24 */
/* 0x000fe400078e0200 */
/*01d0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fe200078e00ff */
/*01e0*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fe40003f06070 */
/*01f0*/ ISETP.GE.U32.AND P1, PT, R5, c[0x0][0x174], PT ; /* 0x00005d0005007a0c */
/* 0x000fd60003f26070 */
/*0200*/ @P0 IADD3 R2, R2, -c[0x0][0x170], RZ ; /* 0x80005c0002020a10 */
/* 0x000fe40007ffe0ff */
/*0210*/ @P1 IADD3 R5, R5, -c[0x0][0x174], RZ ; /* 0x80005d0005051a10 */
/* 0x000fe40007ffe0ff */
/*0220*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fe40003f06070 */
/*0230*/ ISETP.GE.U32.AND P2, PT, R5, c[0x0][0x174], PT ; /* 0x00005d0005007a0c */
/* 0x000fe40003f46070 */
/*0240*/ ISETP.NE.U32.AND P1, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */
/* 0x000fd20003f25070 */
/*0250*/ @P0 IADD3 R2, R2, -c[0x0][0x170], RZ ; /* 0x80005c0002020a10 */
/* 0x000fe40007ffe0ff */
/*0260*/ @P2 IADD3 R5, R5, -c[0x0][0x174], RZ ; /* 0x80005d0005052a10 */
/* 0x000fe40007ffe0ff */
/*0270*/ @!P1 LOP3.LUT R2, RZ, c[0x0][0x170], RZ, 0x33, !PT ; /* 0x00005c00ff029a12 */
/* 0x000fe400078e33ff */
/*0280*/ @!P3 LOP3.LUT R5, RZ, c[0x0][0x174], RZ, 0x33, !PT ; /* 0x00005d00ff05ba12 */
/* 0x000fca00078e33ff */
/*0290*/ IMAD R8, R5, c[0x0][0x170], R2 ; /* 0x00005c0005087a24 */
/* 0x000fc800078e0202 */
/*02a0*/ IMAD.WIDE.U32 R8, R8, R9, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fca00078e0009 */
/*02b0*/ LDG.E R2, [R8.64] ; /* 0x0000000408027981 */
/* 0x000162000c1e1900 */
/*02c0*/ BSSY B0, 0x750 ; /* 0x0000048000007945 */
/* 0x000fe20003800000 */
/*02d0*/ IMAD.MOV.U32 R10, RZ, RZ, -0x1 ; /* 0xffffffffff0a7424 */
/* 0x000fe400078e00ff */
/*02e0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe400078e00ff */
/*02f0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fe400078e00ff */
/*0300*/ ISETP.GT.AND P1, PT, R4, 0x3, PT ; /* 0x000000030400780c */
/* 0x000fe20003f24270 */
/*0310*/ BSSY B1, 0x710 ; /* 0x000003f000017945 */
/* 0x000fe20003800000 */
/*0320*/ ISETP.NE.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x020fe40003f45270 */
/*0330*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0e170 */
/*0340*/ @P1 BRA P2, 0x700 ; /* 0x000003b000001947 */
/* 0x001fea0001000000 */
/*0350*/ IMAD.IADD R7, R3, 0x1, R10 ; /* 0x0000000103077824 */
/* 0x000fe400078e020a */
/*0360*/ IMAD.MOV.U32 R11, RZ, RZ, -0x1 ; /* 0xffffffffff0b7424 */
/* 0x000fca00078e00ff */
/*0370*/ LOP3.LUT P0, RZ, R11, R10, RZ, 0xfc, !PT ; /* 0x0000000a0bff7212 */
/* 0x000fe2000780fcff */
/*0380*/ BSSY B2, 0x6b0 ; /* 0x0000032000027945 */
/* 0x000fd80003800000 */
/*0390*/ @!P0 BRA 0x6a0 ; /* 0x0000030000008947 */
/* 0x001fea0003800000 */
/*03a0*/ I2F.U32.RP R14, c[0x0][0x174] ; /* 0x00005d00000e7b06 */
/* 0x000e620000209000 */
/*03b0*/ ISETP.NE.U32.AND P3, PT, RZ, c[0x0][0x174], PT ; /* 0x00005d00ff007a0c */
/* 0x000fe40003f65070 */
/*03c0*/ ISETP.NE.U32.AND P2, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */
/* 0x000fca0003f45070 */
/*03d0*/ I2F.U32.RP R15, c[0x0][0x170] ; /* 0x00005c00000f7b06 */
/* 0x000eb00000209000 */
/*03e0*/ MUFU.RCP R14, R14 ; /* 0x0000000e000e7308 */
/* 0x002e700000001000 */
/*03f0*/ MUFU.RCP R15, R15 ; /* 0x0000000f000f7308 */
/* 0x004ea20000001000 */
/*0400*/ IADD3 R8, R14, 0xffffffe, RZ ; /* 0x0ffffffe0e087810 */
/* 0x003fe20007ffe0ff */
/*0410*/ IMAD.IADD R14, R0, 0x1, R11 ; /* 0x00000001000e7824 */
/* 0x000fcc00078e020b */
/*0420*/ F2I.FTZ.U32.TRUNC.NTZ R9, R8 ; /* 0x0000000800097305 */
/* 0x000062000021f000 */
/*0430*/ IADD3 R12, R15, 0xffffffe, RZ ; /* 0x0ffffffe0f0c7810 */
/* 0x004fce0007ffe0ff */
/*0440*/ F2I.FTZ.U32.TRUNC.NTZ R13, R12 ; /* 0x0000000c000d7305 */
/* 0x0004e2000021f000 */
/*0450*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */
/* 0x001fe400078e00ff */
/*0460*/ IMAD.MOV R17, RZ, RZ, -R9 ; /* 0x000000ffff117224 */
/* 0x002fe400078e0a09 */
/*0470*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x004fe400078e00ff */
/*0480*/ IMAD R17, R17, c[0x0][0x174], RZ ; /* 0x00005d0011117a24 */
/* 0x000fe400078e02ff */
/*0490*/ IMAD.MOV R16, RZ, RZ, -R13 ; /* 0x000000ffff107224 */
/* 0x008fe400078e0a0d */
/*04a0*/ IMAD.HI.U32 R9, R9, R17, R8 ; /* 0x0000001109097227 */
/* 0x000fc800078e0008 */
/*04b0*/ IMAD R15, R16, c[0x0][0x170], RZ ; /* 0x00005c00100f7a24 */
/* 0x000fe400078e02ff */
/*04c0*/ IMAD.HI.U32 R9, R9, R14, RZ ; /* 0x0000000e09097227 */
/* 0x000fc800078e00ff */
/*04d0*/ IMAD.HI.U32 R8, R13, R15, R12 ; /* 0x0000000f0d087227 */
/* 0x000fc800078e000c */
/*04e0*/ IMAD.MOV R9, RZ, RZ, -R9 ; /* 0x000000ffff097224 */
/* 0x000fe400078e0a09 */
/*04f0*/ IMAD.HI.U32 R8, R8, R7, RZ ; /* 0x0000000708087227 */
/* 0x000fc800078e00ff */
/*0500*/ IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff087224 */
/* 0x000fe400078e0a08 */
/*0510*/ IMAD R9, R9, c[0x0][0x174], R14 ; /* 0x00005d0009097a24 */
/* 0x000fe400078e020e */
/*0520*/ IMAD R8, R8, c[0x0][0x170], R7 ; /* 0x00005c0008087a24 */
/* 0x000fe400078e0207 */
/*0530*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ; /* 0x00000004ff0d7424 */
/* 0x000fe200078e00ff */
/*0540*/ ISETP.GE.U32.AND P1, PT, R9, c[0x0][0x174], PT ; /* 0x00005d0009007a0c */
/* 0x000fe40003f26070 */
/*0550*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fd60003f06070 */
/*0560*/ @P1 IADD3 R9, R9, -c[0x0][0x174], RZ ; /* 0x80005d0009091a10 */
/* 0x000fe40007ffe0ff */
/*0570*/ @P0 IADD3 R8, R8, -c[0x0][0x170], RZ ; /* 0x80005c0008080a10 */
/* 0x000fe40007ffe0ff */
/*0580*/ ISETP.GE.U32.AND P1, PT, R9, c[0x0][0x174], PT ; /* 0x00005d0009007a0c */
/* 0x000fe40003f26070 */
/*0590*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fd60003f06070 */
/*05a0*/ @P1 IADD3 R9, R9, -c[0x0][0x174], RZ ; /* 0x80005d0009091a10 */
/* 0x000fe40007ffe0ff */
/*05b0*/ @P0 IADD3 R8, R8, -c[0x0][0x170], RZ ; /* 0x80005c0008080a10 */
/* 0x000fe40007ffe0ff */
/*05c0*/ @!P3 LOP3.LUT R9, RZ, c[0x0][0x174], RZ, 0x33, !PT ; /* 0x00005d00ff09ba12 */
/* 0x000fe400078e33ff */
/*05d0*/ @!P2 LOP3.LUT R8, RZ, c[0x0][0x170], RZ, 0x33, !PT ; /* 0x00005c00ff08aa12 */
/* 0x000fca00078e33ff */
/*05e0*/ IMAD R8, R9, c[0x0][0x170], R8 ; /* 0x00005c0009087a24 */
/* 0x000fc800078e0208 */
/*05f0*/ IMAD.WIDE.U32 R8, R8, R13, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fcc00078e000d */
/*0600*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea4000c1e1900 */
/*0610*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x004fda0003f05270 */
/*0620*/ @!P0 BRA 0x680 ; /* 0x0000005000008947 */
/* 0x000fea0003800000 */
/*0630*/ ISETP.NE.AND P0, PT, R8, 0x2, PT ; /* 0x000000020800780c */
/* 0x000fda0003f05270 */
/*0640*/ @P0 BRA 0x6a0 ; /* 0x0000005000000947 */
/* 0x000fea0003800000 */
/*0650*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */
/* 0x000fe40007ffe0ff */
/*0660*/ IADD3 R4, R4, 0x1, RZ ; /* 0x0000000104047810 */
/* 0x000fe20007ffe0ff */
/*0670*/ BRA 0x6a0 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0680*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */
/* 0x000fe40007ffe0ff */
/*0690*/ IADD3 R4, R4, 0x1, RZ ; /* 0x0000000104047810 */
/* 0x000fe40007ffe0ff */
/*06a0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*06b0*/ ISETP.GE.AND P0, PT, R4, 0x4, PT ; /* 0x000000040400780c */
/* 0x000fe40003f06270 */
/*06c0*/ ISETP.LT.AND P1, PT, R11.reuse, 0x1, PT ; /* 0x000000010b00780c */
/* 0x040fe40003f21270 */
/*06d0*/ ISETP.EQ.OR P0, PT, R2, RZ, !P0 ; /* 0x000000ff0200720c */
/* 0x000fe40004702670 */
/*06e0*/ IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b7810 */
/* 0x000fd60007ffe0ff */
/*06f0*/ @P0 BRA P1, 0x370 ; /* 0xfffffc7000000947 */
/* 0x000fea000083ffff */
/*0700*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0710*/ ISETP.LT.AND P1, PT, R10.reuse, 0x1, PT ; /* 0x000000010a00780c */
/* 0x040fe40003f21270 */
/*0720*/ IADD3 R10, R10, 0x1, RZ ; /* 0x000000010a0a7810 */
/* 0x000fd60007ffe0ff */
/*0730*/ @P0 BRA P1, 0x300 ; /* 0xfffffbc000000947 */
/* 0x000fea000083ffff */
/*0740*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0750*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe20003f05270 */
/*0760*/ IMAD R3, R0, c[0x0][0x170], R3 ; /* 0x00005c0000037a24 */
/* 0x000fd800078e0203 */
/*0770*/ @P0 LOP3.LUT R7, R4, 0x1, RZ, 0xfc, !PT ; /* 0x0000000104070812 */
/* 0x000fe200078efcff */
/*0780*/ @!P0 IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff008424 */
/* 0x000fe200078e00ff */
/*0790*/ @!P0 ISETP.GE.AND P2, PT, R6, R5, PT ; /* 0x000000050600820c */
/* 0x000fe40003f46270 */
/*07a0*/ @P0 ISETP.NE.AND P1, PT, R7, 0x3, PT ; /* 0x000000030700080c */
/* 0x000fe40003f25270 */
/*07b0*/ @!P0 ISETP.NE.AND P3, PT, R4, 0x3, PT ; /* 0x000000030400880c */
/* 0x000fe20003f65270 */
/*07c0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ; /* 0x00000004ff047424 */
/* 0x000fe200078e00ff */
/*07d0*/ @!P0 SEL R0, R0, 0x2, !P2 ; /* 0x0000000200008807 */
/* 0x000fe40005000000 */
/*07e0*/ @P0 SEL R5, R2, RZ, !P1 ; /* 0x000000ff02050207 */
/* 0x000fe20004800000 */
/*07f0*/ IMAD.WIDE R2, R3, R4, c[0x0][0x168] ; /* 0x00005a0003027625 */
/* 0x000fe200078e0204 */
/*0800*/ @!P0 SEL R5, R0, RZ, !P3 ; /* 0x000000ff00058207 */
/* 0x000fca0005800000 */
/*0810*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0820*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0830*/ BRA 0x830; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0840*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Reads a cell at (x+dx, y+dy)
__device__ int read_cell(int * source_domain, int x, int y, int dx, int dy,
unsigned int domain_x, unsigned int domain_y)
{
x = (unsigned int)(x + dx) % domain_x; // Wrap around
y = (unsigned int)(y + dy) % domain_y;
return source_domain[y * domain_x + x];
}
// Compute kernel
__global__ void life_kernel(int * source_domain, int * dest_domain,
int domain_x, int domain_y)
{
int tx = blockIdx.x * blockDim.x + threadIdx.x;
int ty = blockIdx.y;
// Read cell
int myself = read_cell(source_domain, tx, ty, 0, 0,domain_x, domain_y);
// Read the 8 neighbors and count number of blue and red
int blue = 0, red = 0, alive = 0;
// if the cell is not empty, break out on alive neighboor count exceeding 3
for (int x_offset = -1 ; x_offset < 2 && (!myself || (alive < 4)) ; x_offset++)
{
for (int y_offset = -1 ; y_offset < 2 && (!myself || (alive < 4)) ; y_offset++)
{
// ignore self
if (x_offset == 0 && y_offset == 0)
continue;
switch (read_cell (source_domain, tx, ty, x_offset, y_offset, domain_x, domain_y))
{
case 1: red++; alive++; break;
case 2: blue++; alive++; break;
default: break;
}
}
}
// Compute new value
// empty cell case
if (!myself)
{
if (alive == 3)
if (blue < red)
myself = 1;
else
myself = 2;
}
// live cell cases
else
{
// die cases
if (alive != 2 && alive != 3)
myself = 0;
// else survive
}
// Write it in dest_domain
dest_domain[ty * domain_x + tx] = myself;
} | .file "tmpxft_000ea652_00000000-6_life_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9read_cellPiiiiijj
.type _Z9read_cellPiiiiijj, @function
_Z9read_cellPiiiiijj:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z9read_cellPiiiiijj, .-_Z9read_cellPiiiiijj
.globl _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii
.type _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii, @function
_Z35__device_stub__Z11life_kernelPiS_iiPiS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11life_kernelPiS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii, .-_Z35__device_stub__Z11life_kernelPiS_iiPiS_ii
.globl _Z11life_kernelPiS_ii
.type _Z11life_kernelPiS_ii, @function
_Z11life_kernelPiS_ii:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z11life_kernelPiS_ii, .-_Z11life_kernelPiS_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z11life_kernelPiS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11life_kernelPiS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Reads a cell at (x+dx, y+dy)
__device__ int read_cell(int * source_domain, int x, int y, int dx, int dy,
unsigned int domain_x, unsigned int domain_y)
{
x = (unsigned int)(x + dx) % domain_x; // Wrap around
y = (unsigned int)(y + dy) % domain_y;
return source_domain[y * domain_x + x];
}
// Compute kernel
__global__ void life_kernel(int * source_domain, int * dest_domain,
int domain_x, int domain_y)
{
int tx = blockIdx.x * blockDim.x + threadIdx.x;
int ty = blockIdx.y;
// Read cell
int myself = read_cell(source_domain, tx, ty, 0, 0,domain_x, domain_y);
// Read the 8 neighbors and count number of blue and red
int blue = 0, red = 0, alive = 0;
// if the cell is not empty, break out on alive neighboor count exceeding 3
for (int x_offset = -1 ; x_offset < 2 && (!myself || (alive < 4)) ; x_offset++)
{
for (int y_offset = -1 ; y_offset < 2 && (!myself || (alive < 4)) ; y_offset++)
{
// ignore self
if (x_offset == 0 && y_offset == 0)
continue;
switch (read_cell (source_domain, tx, ty, x_offset, y_offset, domain_x, domain_y))
{
case 1: red++; alive++; break;
case 2: blue++; alive++; break;
default: break;
}
}
}
// Compute new value
// empty cell case
if (!myself)
{
if (alive == 3)
if (blue < red)
myself = 1;
else
myself = 2;
}
// live cell cases
else
{
// die cases
if (alive != 2 && alive != 3)
myself = 0;
// else survive
}
// Write it in dest_domain
dest_domain[ty * domain_x + tx] = myself;
} | #include <hip/hip_runtime.h>
// Reads a cell at (x+dx, y+dy)
__device__ int read_cell(int * source_domain, int x, int y, int dx, int dy,
unsigned int domain_x, unsigned int domain_y)
{
x = (unsigned int)(x + dx) % domain_x; // Wrap around
y = (unsigned int)(y + dy) % domain_y;
return source_domain[y * domain_x + x];
}
// Compute kernel
__global__ void life_kernel(int * source_domain, int * dest_domain,
int domain_x, int domain_y)
{
int tx = blockIdx.x * blockDim.x + threadIdx.x;
int ty = blockIdx.y;
// Read cell
int myself = read_cell(source_domain, tx, ty, 0, 0,domain_x, domain_y);
// Read the 8 neighbors and count number of blue and red
int blue = 0, red = 0, alive = 0;
// if the cell is not empty, break out on alive neighboor count exceeding 3
for (int x_offset = -1 ; x_offset < 2 && (!myself || (alive < 4)) ; x_offset++)
{
for (int y_offset = -1 ; y_offset < 2 && (!myself || (alive < 4)) ; y_offset++)
{
// ignore self
if (x_offset == 0 && y_offset == 0)
continue;
switch (read_cell (source_domain, tx, ty, x_offset, y_offset, domain_x, domain_y))
{
case 1: red++; alive++; break;
case 2: blue++; alive++; break;
default: break;
}
}
}
// Compute new value
// empty cell case
if (!myself)
{
if (alive == 3)
if (blue < red)
myself = 1;
else
myself = 2;
}
// live cell cases
else
{
// die cases
if (alive != 2 && alive != 3)
myself = 0;
// else survive
}
// Write it in dest_domain
dest_domain[ty * domain_x + tx] = myself;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// Reads a cell at (x+dx, y+dy)
__device__ int read_cell(int * source_domain, int x, int y, int dx, int dy,
unsigned int domain_x, unsigned int domain_y)
{
x = (unsigned int)(x + dx) % domain_x; // Wrap around
y = (unsigned int)(y + dy) % domain_y;
return source_domain[y * domain_x + x];
}
// Compute kernel
__global__ void life_kernel(int * source_domain, int * dest_domain,
int domain_x, int domain_y)
{
int tx = blockIdx.x * blockDim.x + threadIdx.x;
int ty = blockIdx.y;
// Read cell
int myself = read_cell(source_domain, tx, ty, 0, 0,domain_x, domain_y);
// Read the 8 neighbors and count number of blue and red
int blue = 0, red = 0, alive = 0;
// if the cell is not empty, break out on alive neighboor count exceeding 3
for (int x_offset = -1 ; x_offset < 2 && (!myself || (alive < 4)) ; x_offset++)
{
for (int y_offset = -1 ; y_offset < 2 && (!myself || (alive < 4)) ; y_offset++)
{
// ignore self
if (x_offset == 0 && y_offset == 0)
continue;
switch (read_cell (source_domain, tx, ty, x_offset, y_offset, domain_x, domain_y))
{
case 1: red++; alive++; break;
case 2: blue++; alive++; break;
default: break;
}
}
}
// Compute new value
// empty cell case
if (!myself)
{
if (alive == 3)
if (blue < red)
myself = 1;
else
myself = 2;
}
// live cell cases
else
{
// die cases
if (alive != 2 && alive != 3)
myself = 0;
// else survive
}
// Write it in dest_domain
dest_domain[ty * domain_x + tx] = myself;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11life_kernelPiS_ii
.globl _Z11life_kernelPiS_ii
.p2align 8
.type _Z11life_kernelPiS_ii,@function
_Z11life_kernelPiS_ii:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b32 s2, s[0:1], 0x24
v_mov_b32_e32 v8, 0
s_mov_b32 s9, -1
v_mov_b32_e32 v7, 0
s_waitcnt lgkmcnt(0)
v_cvt_f32_u32_e32 v1, s4
s_sub_i32 s3, 0, s4
v_cvt_f32_u32_e32 v2, s5
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
v_rcp_iflag_f32_e32 v5, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v1
v_mul_lo_u32 v1, s3, v3
s_sub_i32 s3, 0, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mul_hi_u32 v4, v3, v1
v_mad_u64_u32 v[1:2], null, s14, s2, v[0:1]
v_mul_f32_e32 v2, 0x4f7ffffe, v5
v_add_nc_u32_e32 v0, v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v6, v2
v_mul_hi_u32 v3, v1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s2, v6
s_mul_i32 s6, s3, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v2, v3, s4
s_mul_hi_u32 s6, s2, s6
s_add_i32 s2, s2, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s2, s15, s2
s_mul_i32 s2, s2, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_sub_nc_u32_e32 v2, v1, v2
s_sub_i32 s2, s15, s2
s_sub_i32 s6, s2, s5
s_cmp_ge_u32 s2, s5
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v3, s4, v2
v_cmp_le_u32_e32 vcc_lo, s4, v2
s_cselect_b32 s2, s6, s2
s_load_b64 s[6:7], s[0:1], 0x0
s_sub_i32 s8, s2, s5
s_cmp_ge_u32 s2, s5
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_cselect_b32 s2, s8, s2
s_mov_b32 s8, 0
s_add_i32 s10, s15, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s4, v2
v_cmp_le_u32_e32 vcc_lo, s4, v2
v_cndmask_b32_e32 v4, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s2, s4, v[4:5]
v_mov_b32_e32 v3, 0
v_lshlrev_b64 v[4:5], 2, v[2:3]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
global_load_b32 v9, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v9
s_xor_b32 s11, vcc_lo, -1
s_branch .LBB0_4
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s16
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s14
s_add_i32 s9, s9, 1
s_cmp_eq_u32 s9, 2
s_cselect_b32 s2, -1, 0
s_and_not1_b32 s12, s12, exec_lo
s_and_b32 s2, s2, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s12, s12, s2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s13
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, exec_lo, s12
s_or_b32 s8, s2, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execz .LBB0_18
.LBB0_4:
v_cmp_gt_i32_e64 s2, 4, v8
s_or_b32 s12, s12, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s13, s2
s_cbranch_execz .LBB0_3
v_cmp_gt_i32_e64 s2, 4, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s14, s2
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v10, s9, v1
s_mov_b32 s18, -1
s_mov_b32 s16, 0
s_mov_b32 s17, s10
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v10, v0, 0
s_branch .LBB0_10
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s20
.LBB0_8:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s19
.LBB0_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e64 s2, 3, v8
s_add_i32 s19, s18, 1
s_cmp_gt_i32 s18, 0
s_cselect_b32 s18, -1, 0
s_and_b32 s2, s11, s2
s_add_i32 s17, s17, 1
s_or_b32 s2, s18, s2
s_mov_b32 s18, s19
s_and_b32 s2, exec_lo, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s16, s2, s16
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execz .LBB0_1
.LBB0_10:
s_or_b32 s2, s18, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_9
v_readfirstlane_b32 s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v4, v5, s4
s_mul_i32 s19, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_mul_hi_u32 s19, s2, s19
v_sub_nc_u32_e32 v4, v10, v4
s_add_i32 s2, s2, s19
s_add_i32 s19, s15, s18
s_mul_hi_u32 s2, s17, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v11, s4, v4
s_mul_i32 s20, s3, s2
s_not_b32 s21, s2
v_cmp_le_u32_e64 s2, s4, v4
s_add_i32 s20, s19, s20
v_cndmask_b32_e64 v4, v4, v11, s2
s_mul_i32 s2, s5, s21
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_add_i32 s19, s19, s2
s_cmp_ge_u32 s20, s5
v_subrev_nc_u32_e32 v11, s4, v4
v_cmp_le_u32_e64 s2, s4, v4
s_cselect_b32 s19, s19, s20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_sub_i32 s20, s19, s5
s_cmp_ge_u32 s19, s5
v_cndmask_b32_e64 v4, v4, v11, s2
s_cselect_b32 s2, s20, s19
s_mov_b32 s19, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[11:12], null, s2, s4, v[4:5]
v_mov_b32_e32 v12, v3
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v11, s2, s6, v11
v_add_co_ci_u32_e64 v12, s2, s7, v12, s2
global_load_b32 v4, v[11:12], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 1, v4
s_xor_b32 s19, exec_lo, s19
s_cbranch_execz .LBB0_15
s_mov_b32 s20, exec_lo
v_cmpx_eq_u32_e32 2, v4
v_add_nc_u32_e32 v7, 1, v7
v_add_nc_u32_e32 v8, 1, v8
s_or_b32 exec_lo, exec_lo, s20
.LBB0_15:
s_and_not1_saveexec_b32 s19, s19
s_cbranch_execz .LBB0_8
s_mov_b32 s20, exec_lo
v_cmpx_eq_u32_e32 1, v4
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v2, 1, v2
v_add_nc_u32_e32 v8, 1, v8
s_branch .LBB0_7
.LBB0_18:
s_or_b32 exec_lo, exec_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_ne_u32_e32 0, v9
s_xor_b32 s2, exec_lo, s2
v_add_nc_u32_e32 v0, -4, v8
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_u32_e32 vcc_lo, -3, v0
v_cndmask_b32_e32 v0, 0, v9, vcc_lo
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB0_24
v_mov_b32_e32 v0, 0
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 3, v8
v_cmp_lt_i32_e32 vcc_lo, v7, v2
v_cndmask_b32_e64 v0, 2, 1, vcc_lo
s_or_b32 exec_lo, exec_lo, s3
.LBB0_24:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s2
s_load_b64 s[0:1], s[0:1], 0x8
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11life_kernelPiS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 22
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11life_kernelPiS_ii, .Lfunc_end0-_Z11life_kernelPiS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11life_kernelPiS_ii
.private_segment_fixed_size: 0
.sgpr_count: 24
.sgpr_spill_count: 0
.symbol: _Z11life_kernelPiS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// Reads a cell at (x+dx, y+dy)
__device__ int read_cell(int * source_domain, int x, int y, int dx, int dy,
unsigned int domain_x, unsigned int domain_y)
{
x = (unsigned int)(x + dx) % domain_x; // Wrap around
y = (unsigned int)(y + dy) % domain_y;
return source_domain[y * domain_x + x];
}
// Compute kernel
__global__ void life_kernel(int * source_domain, int * dest_domain,
int domain_x, int domain_y)
{
int tx = blockIdx.x * blockDim.x + threadIdx.x;
int ty = blockIdx.y;
// Read cell
int myself = read_cell(source_domain, tx, ty, 0, 0,domain_x, domain_y);
// Read the 8 neighbors and count number of blue and red
int blue = 0, red = 0, alive = 0;
// if the cell is not empty, break out on alive neighboor count exceeding 3
for (int x_offset = -1 ; x_offset < 2 && (!myself || (alive < 4)) ; x_offset++)
{
for (int y_offset = -1 ; y_offset < 2 && (!myself || (alive < 4)) ; y_offset++)
{
// ignore self
if (x_offset == 0 && y_offset == 0)
continue;
switch (read_cell (source_domain, tx, ty, x_offset, y_offset, domain_x, domain_y))
{
case 1: red++; alive++; break;
case 2: blue++; alive++; break;
default: break;
}
}
}
// Compute new value
// empty cell case
if (!myself)
{
if (alive == 3)
if (blue < red)
myself = 1;
else
myself = 2;
}
// live cell cases
else
{
// die cases
if (alive != 2 && alive != 3)
myself = 0;
// else survive
}
// Write it in dest_domain
dest_domain[ty * domain_x + tx] = myself;
} | .text
.file "life_kernel.hip"
.globl _Z26__device_stub__life_kernelPiS_ii # -- Begin function _Z26__device_stub__life_kernelPiS_ii
.p2align 4, 0x90
.type _Z26__device_stub__life_kernelPiS_ii,@function
_Z26__device_stub__life_kernelPiS_ii: # @_Z26__device_stub__life_kernelPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11life_kernelPiS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z26__device_stub__life_kernelPiS_ii, .Lfunc_end0-_Z26__device_stub__life_kernelPiS_ii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11life_kernelPiS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11life_kernelPiS_ii,@object # @_Z11life_kernelPiS_ii
.section .rodata,"a",@progbits
.globl _Z11life_kernelPiS_ii
.p2align 3, 0x0
_Z11life_kernelPiS_ii:
.quad _Z26__device_stub__life_kernelPiS_ii
.size _Z11life_kernelPiS_ii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z11life_kernelPiS_ii"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__life_kernelPiS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11life_kernelPiS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11life_kernelPiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ I2F.U32.RP R6, c[0x0][0x170] ; /* 0x00005c0000067b06 */
/* 0x000e220000209000 */
/*0020*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e620000002500 */
/*0030*/ ISETP.NE.U32.AND P3, PT, RZ, c[0x0][0x174], PT ; /* 0x00005d00ff007a0c */
/* 0x000fe20003f65070 */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0050*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e660000002100 */
/*0060*/ I2F.U32.RP R7, c[0x0][0x174] ; /* 0x00005d0000077b06 */
/* 0x000ea20000209000 */
/*0070*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000eee0000002600 */
/*0080*/ MUFU.RCP R6, R6 ; /* 0x0000000600067308 */
/* 0x001e300000001000 */
/*0090*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */
/* 0x004ea20000001000 */
/*00a0*/ IADD3 R2, R6, 0xffffffe, RZ ; /* 0x0ffffffe06027810 */
/* 0x001fce0007ffe0ff */
/*00b0*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */
/* 0x000122000021f000 */
/*00c0*/ IADD3 R4, R7, 0xffffffe, RZ ; /* 0x0ffffffe07047810 */
/* 0x004fce0007ffe0ff */
/*00d0*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x000462000021f000 */
/*00e0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x001fe400078e00ff */
/*00f0*/ IMAD.MOV R6, RZ, RZ, -R3 ; /* 0x000000ffff067224 */
/* 0x010fe400078e0a03 */
/*0100*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x004fe400078e00ff */
/*0110*/ IMAD R7, R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a24 */
/* 0x000fe400078e02ff */
/*0120*/ IMAD.MOV R11, RZ, RZ, -R5 ; /* 0x000000ffff0b7224 */
/* 0x002fe400078e0a05 */
/*0130*/ IMAD.HI.U32 R2, R3, R7, R2 ; /* 0x0000000703027227 */
/* 0x000fc800078e0002 */
/*0140*/ IMAD R11, R11, c[0x0][0x174], RZ ; /* 0x00005d000b0b7a24 */
/* 0x000fe400078e02ff */
/*0150*/ IMAD R3, R8, c[0x0][0x0], R9 ; /* 0x0000000008037a24 */
/* 0x000fe400078e0209 */
/*0160*/ IMAD.HI.U32 R5, R5, R11, R4 ; /* 0x0000000b05057227 */
/* 0x000fc800078e0004 */
/*0170*/ IMAD.HI.U32 R2, R2, R3, RZ ; /* 0x0000000302027227 */
/* 0x000fc800078e00ff */
/*0180*/ IMAD.HI.U32 R5, R5, R0, RZ ; /* 0x0000000005057227 */
/* 0x008fc800078e00ff */
/*0190*/ IMAD.MOV R2, RZ, RZ, -R2 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0a02 */
/*01a0*/ IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff057224 */
/* 0x000fe400078e0a05 */
/*01b0*/ IMAD R2, R2, c[0x0][0x170], R3 ; /* 0x00005c0002027a24 */
/* 0x000fe400078e0203 */
/*01c0*/ IMAD R5, R5, c[0x0][0x174], R0 ; /* 0x00005d0005057a24 */
/* 0x000fe400078e0200 */
/*01d0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x000fe200078e00ff */
/*01e0*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fe40003f06070 */
/*01f0*/ ISETP.GE.U32.AND P1, PT, R5, c[0x0][0x174], PT ; /* 0x00005d0005007a0c */
/* 0x000fd60003f26070 */
/*0200*/ @P0 IADD3 R2, R2, -c[0x0][0x170], RZ ; /* 0x80005c0002020a10 */
/* 0x000fe40007ffe0ff */
/*0210*/ @P1 IADD3 R5, R5, -c[0x0][0x174], RZ ; /* 0x80005d0005051a10 */
/* 0x000fe40007ffe0ff */
/*0220*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x000fe40003f06070 */
/*0230*/ ISETP.GE.U32.AND P2, PT, R5, c[0x0][0x174], PT ; /* 0x00005d0005007a0c */
/* 0x000fe40003f46070 */
/*0240*/ ISETP.NE.U32.AND P1, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */
/* 0x000fd20003f25070 */
/*0250*/ @P0 IADD3 R2, R2, -c[0x0][0x170], RZ ; /* 0x80005c0002020a10 */
/* 0x000fe40007ffe0ff */
/*0260*/ @P2 IADD3 R5, R5, -c[0x0][0x174], RZ ; /* 0x80005d0005052a10 */
/* 0x000fe40007ffe0ff */
/*0270*/ @!P1 LOP3.LUT R2, RZ, c[0x0][0x170], RZ, 0x33, !PT ; /* 0x00005c00ff029a12 */
/* 0x000fe400078e33ff */
/*0280*/ @!P3 LOP3.LUT R5, RZ, c[0x0][0x174], RZ, 0x33, !PT ; /* 0x00005d00ff05ba12 */
/* 0x000fca00078e33ff */
/*0290*/ IMAD R8, R5, c[0x0][0x170], R2 ; /* 0x00005c0005087a24 */
/* 0x000fc800078e0202 */
/*02a0*/ IMAD.WIDE.U32 R8, R8, R9, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fca00078e0009 */
/*02b0*/ LDG.E R2, [R8.64] ; /* 0x0000000408027981 */
/* 0x000162000c1e1900 */
/*02c0*/ BSSY B0, 0x750 ; /* 0x0000048000007945 */
/* 0x000fe20003800000 */
/*02d0*/ IMAD.MOV.U32 R10, RZ, RZ, -0x1 ; /* 0xffffffffff0a7424 */
/* 0x000fe400078e00ff */
/*02e0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fe400078e00ff */
/*02f0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fe400078e00ff */
/*0300*/ ISETP.GT.AND P1, PT, R4, 0x3, PT ; /* 0x000000030400780c */
/* 0x000fe20003f24270 */
/*0310*/ BSSY B1, 0x710 ; /* 0x000003f000017945 */
/* 0x000fe20003800000 */
/*0320*/ ISETP.NE.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x020fe40003f45270 */
/*0330*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0e170 */
/*0340*/ @P1 BRA P2, 0x700 ; /* 0x000003b000001947 */
/* 0x001fea0001000000 */
/*0350*/ IMAD.IADD R7, R3, 0x1, R10 ; /* 0x0000000103077824 */
/* 0x000fe400078e020a */
/*0360*/ IMAD.MOV.U32 R11, RZ, RZ, -0x1 ; /* 0xffffffffff0b7424 */
/* 0x000fca00078e00ff */
/*0370*/ LOP3.LUT P0, RZ, R11, R10, RZ, 0xfc, !PT ; /* 0x0000000a0bff7212 */
/* 0x000fe2000780fcff */
/*0380*/ BSSY B2, 0x6b0 ; /* 0x0000032000027945 */
/* 0x000fd80003800000 */
/*0390*/ @!P0 BRA 0x6a0 ; /* 0x0000030000008947 */
/* 0x001fea0003800000 */
/*03a0*/ I2F.U32.RP R14, c[0x0][0x174] ; /* 0x00005d00000e7b06 */
/* 0x000e620000209000 */
/*03b0*/ ISETP.NE.U32.AND P3, PT, RZ, c[0x0][0x174], PT ; /* 0x00005d00ff007a0c */
/* 0x000fe40003f65070 */
/*03c0*/ ISETP.NE.U32.AND P2, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */
/* 0x000fca0003f45070 */
/*03d0*/ I2F.U32.RP R15, c[0x0][0x170] ; /* 0x00005c00000f7b06 */
/* 0x000eb00000209000 */
/*03e0*/ MUFU.RCP R14, R14 ; /* 0x0000000e000e7308 */
/* 0x002e700000001000 */
/*03f0*/ MUFU.RCP R15, R15 ; /* 0x0000000f000f7308 */
/* 0x004ea20000001000 */
/*0400*/ IADD3 R8, R14, 0xffffffe, RZ ; /* 0x0ffffffe0e087810 */
/* 0x003fe20007ffe0ff */
/*0410*/ IMAD.IADD R14, R0, 0x1, R11 ; /* 0x00000001000e7824 */
/* 0x000fcc00078e020b */
/*0420*/ F2I.FTZ.U32.TRUNC.NTZ R9, R8 ; /* 0x0000000800097305 */
/* 0x000062000021f000 */
/*0430*/ IADD3 R12, R15, 0xffffffe, RZ ; /* 0x0ffffffe0f0c7810 */
/* 0x004fce0007ffe0ff */
/*0440*/ F2I.FTZ.U32.TRUNC.NTZ R13, R12 ; /* 0x0000000c000d7305 */
/* 0x0004e2000021f000 */
/*0450*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */
/* 0x001fe400078e00ff */
/*0460*/ IMAD.MOV R17, RZ, RZ, -R9 ; /* 0x000000ffff117224 */
/* 0x002fe400078e0a09 */
/*0470*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x004fe400078e00ff */
/*0480*/ IMAD R17, R17, c[0x0][0x174], RZ ; /* 0x00005d0011117a24 */
/* 0x000fe400078e02ff */
/*0490*/ IMAD.MOV R16, RZ, RZ, -R13 ; /* 0x000000ffff107224 */
/* 0x008fe400078e0a0d */
/*04a0*/ IMAD.HI.U32 R9, R9, R17, R8 ; /* 0x0000001109097227 */
/* 0x000fc800078e0008 */
/*04b0*/ IMAD R15, R16, c[0x0][0x170], RZ ; /* 0x00005c00100f7a24 */
/* 0x000fe400078e02ff */
/*04c0*/ IMAD.HI.U32 R9, R9, R14, RZ ; /* 0x0000000e09097227 */
/* 0x000fc800078e00ff */
/*04d0*/ IMAD.HI.U32 R8, R13, R15, R12 ; /* 0x0000000f0d087227 */
/* 0x000fc800078e000c */
/*04e0*/ IMAD.MOV R9, RZ, RZ, -R9 ; /* 0x000000ffff097224 */
/* 0x000fe400078e0a09 */
/*04f0*/ IMAD.HI.U32 R8, R8, R7, RZ ; /* 0x0000000708087227 */
/* 0x000fc800078e00ff */
/*0500*/ IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff087224 */
/* 0x000fe400078e0a08 */
/*0510*/ IMAD R9, R9, c[0x0][0x174], R14 ; /* 0x00005d0009097a24 */
/* 0x000fe400078e020e */
/*0520*/ IMAD R8, R8, c[0x0][0x170], R7 ; /* 0x00005c0008087a24 */
/* 0x000fe400078e0207 */
/*0530*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ; /* 0x00000004ff0d7424 */
/* 0x000fe200078e00ff */
/*0540*/ ISETP.GE.U32.AND P1, PT, R9, c[0x0][0x174], PT ; /* 0x00005d0009007a0c */
/* 0x000fe40003f26070 */
/*0550*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fd60003f06070 */
/*0560*/ @P1 IADD3 R9, R9, -c[0x0][0x174], RZ ; /* 0x80005d0009091a10 */
/* 0x000fe40007ffe0ff */
/*0570*/ @P0 IADD3 R8, R8, -c[0x0][0x170], RZ ; /* 0x80005c0008080a10 */
/* 0x000fe40007ffe0ff */
/*0580*/ ISETP.GE.U32.AND P1, PT, R9, c[0x0][0x174], PT ; /* 0x00005d0009007a0c */
/* 0x000fe40003f26070 */
/*0590*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fd60003f06070 */
/*05a0*/ @P1 IADD3 R9, R9, -c[0x0][0x174], RZ ; /* 0x80005d0009091a10 */
/* 0x000fe40007ffe0ff */
/*05b0*/ @P0 IADD3 R8, R8, -c[0x0][0x170], RZ ; /* 0x80005c0008080a10 */
/* 0x000fe40007ffe0ff */
/*05c0*/ @!P3 LOP3.LUT R9, RZ, c[0x0][0x174], RZ, 0x33, !PT ; /* 0x00005d00ff09ba12 */
/* 0x000fe400078e33ff */
/*05d0*/ @!P2 LOP3.LUT R8, RZ, c[0x0][0x170], RZ, 0x33, !PT ; /* 0x00005c00ff08aa12 */
/* 0x000fca00078e33ff */
/*05e0*/ IMAD R8, R9, c[0x0][0x170], R8 ; /* 0x00005c0009087a24 */
/* 0x000fc800078e0208 */
/*05f0*/ IMAD.WIDE.U32 R8, R8, R13, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fcc00078e000d */
/*0600*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea4000c1e1900 */
/*0610*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x004fda0003f05270 */
/*0620*/ @!P0 BRA 0x680 ; /* 0x0000005000008947 */
/* 0x000fea0003800000 */
/*0630*/ ISETP.NE.AND P0, PT, R8, 0x2, PT ; /* 0x000000020800780c */
/* 0x000fda0003f05270 */
/*0640*/ @P0 BRA 0x6a0 ; /* 0x0000005000000947 */
/* 0x000fea0003800000 */
/*0650*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */
/* 0x000fe40007ffe0ff */
/*0660*/ IADD3 R4, R4, 0x1, RZ ; /* 0x0000000104047810 */
/* 0x000fe20007ffe0ff */
/*0670*/ BRA 0x6a0 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0680*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */
/* 0x000fe40007ffe0ff */
/*0690*/ IADD3 R4, R4, 0x1, RZ ; /* 0x0000000104047810 */
/* 0x000fe40007ffe0ff */
/*06a0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*06b0*/ ISETP.GE.AND P0, PT, R4, 0x4, PT ; /* 0x000000040400780c */
/* 0x000fe40003f06270 */
/*06c0*/ ISETP.LT.AND P1, PT, R11.reuse, 0x1, PT ; /* 0x000000010b00780c */
/* 0x040fe40003f21270 */
/*06d0*/ ISETP.EQ.OR P0, PT, R2, RZ, !P0 ; /* 0x000000ff0200720c */
/* 0x000fe40004702670 */
/*06e0*/ IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b7810 */
/* 0x000fd60007ffe0ff */
/*06f0*/ @P0 BRA P1, 0x370 ; /* 0xfffffc7000000947 */
/* 0x000fea000083ffff */
/*0700*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0710*/ ISETP.LT.AND P1, PT, R10.reuse, 0x1, PT ; /* 0x000000010a00780c */
/* 0x040fe40003f21270 */
/*0720*/ IADD3 R10, R10, 0x1, RZ ; /* 0x000000010a0a7810 */
/* 0x000fd60007ffe0ff */
/*0730*/ @P0 BRA P1, 0x300 ; /* 0xfffffbc000000947 */
/* 0x000fea000083ffff */
/*0740*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0750*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe20003f05270 */
/*0760*/ IMAD R3, R0, c[0x0][0x170], R3 ; /* 0x00005c0000037a24 */
/* 0x000fd800078e0203 */
/*0770*/ @P0 LOP3.LUT R7, R4, 0x1, RZ, 0xfc, !PT ; /* 0x0000000104070812 */
/* 0x000fe200078efcff */
/*0780*/ @!P0 IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff008424 */
/* 0x000fe200078e00ff */
/*0790*/ @!P0 ISETP.GE.AND P2, PT, R6, R5, PT ; /* 0x000000050600820c */
/* 0x000fe40003f46270 */
/*07a0*/ @P0 ISETP.NE.AND P1, PT, R7, 0x3, PT ; /* 0x000000030700080c */
/* 0x000fe40003f25270 */
/*07b0*/ @!P0 ISETP.NE.AND P3, PT, R4, 0x3, PT ; /* 0x000000030400880c */
/* 0x000fe20003f65270 */
/*07c0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ; /* 0x00000004ff047424 */
/* 0x000fe200078e00ff */
/*07d0*/ @!P0 SEL R0, R0, 0x2, !P2 ; /* 0x0000000200008807 */
/* 0x000fe40005000000 */
/*07e0*/ @P0 SEL R5, R2, RZ, !P1 ; /* 0x000000ff02050207 */
/* 0x000fe20004800000 */
/*07f0*/ IMAD.WIDE R2, R3, R4, c[0x0][0x168] ; /* 0x00005a0003027625 */
/* 0x000fe200078e0204 */
/*0800*/ @!P0 SEL R5, R0, RZ, !P3 ; /* 0x000000ff00058207 */
/* 0x000fca0005800000 */
/*0810*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0820*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0830*/ BRA 0x830; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0840*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11life_kernelPiS_ii
.globl _Z11life_kernelPiS_ii
.p2align 8
.type _Z11life_kernelPiS_ii,@function
_Z11life_kernelPiS_ii:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b32 s2, s[0:1], 0x24
v_mov_b32_e32 v8, 0
s_mov_b32 s9, -1
v_mov_b32_e32 v7, 0
s_waitcnt lgkmcnt(0)
v_cvt_f32_u32_e32 v1, s4
s_sub_i32 s3, 0, s4
v_cvt_f32_u32_e32 v2, s5
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
v_rcp_iflag_f32_e32 v5, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v3, v1
v_mul_lo_u32 v1, s3, v3
s_sub_i32 s3, 0, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mul_hi_u32 v4, v3, v1
v_mad_u64_u32 v[1:2], null, s14, s2, v[0:1]
v_mul_f32_e32 v2, 0x4f7ffffe, v5
v_add_nc_u32_e32 v0, v3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v6, v2
v_mul_hi_u32 v3, v1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s2, v6
s_mul_i32 s6, s3, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v2, v3, s4
s_mul_hi_u32 s6, s2, s6
s_add_i32 s2, s2, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s2, s15, s2
s_mul_i32 s2, s2, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_sub_nc_u32_e32 v2, v1, v2
s_sub_i32 s2, s15, s2
s_sub_i32 s6, s2, s5
s_cmp_ge_u32 s2, s5
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v3, s4, v2
v_cmp_le_u32_e32 vcc_lo, s4, v2
s_cselect_b32 s2, s6, s2
s_load_b64 s[6:7], s[0:1], 0x0
s_sub_i32 s8, s2, s5
s_cmp_ge_u32 s2, s5
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_cselect_b32 s2, s8, s2
s_mov_b32 s8, 0
s_add_i32 s10, s15, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s4, v2
v_cmp_le_u32_e32 vcc_lo, s4, v2
v_cndmask_b32_e32 v4, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s2, s4, v[4:5]
v_mov_b32_e32 v3, 0
v_lshlrev_b64 v[4:5], 2, v[2:3]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
global_load_b32 v9, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v9
s_xor_b32 s11, vcc_lo, -1
s_branch .LBB0_4
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s16
.LBB0_2:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s14
s_add_i32 s9, s9, 1
s_cmp_eq_u32 s9, 2
s_cselect_b32 s2, -1, 0
s_and_not1_b32 s12, s12, exec_lo
s_and_b32 s2, s2, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s12, s12, s2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s13
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, exec_lo, s12
s_or_b32 s8, s2, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execz .LBB0_18
.LBB0_4:
v_cmp_gt_i32_e64 s2, 4, v8
s_or_b32 s12, s12, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s13, s2
s_cbranch_execz .LBB0_3
v_cmp_gt_i32_e64 s2, 4, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s14, s2
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v10, s9, v1
s_mov_b32 s18, -1
s_mov_b32 s16, 0
s_mov_b32 s17, s10
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v10, v0, 0
s_branch .LBB0_10
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s20
.LBB0_8:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s19
.LBB0_9:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e64 s2, 3, v8
s_add_i32 s19, s18, 1
s_cmp_gt_i32 s18, 0
s_cselect_b32 s18, -1, 0
s_and_b32 s2, s11, s2
s_add_i32 s17, s17, 1
s_or_b32 s2, s18, s2
s_mov_b32 s18, s19
s_and_b32 s2, exec_lo, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s16, s2, s16
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execz .LBB0_1
.LBB0_10:
s_or_b32 s2, s18, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_9
v_readfirstlane_b32 s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v4, v5, s4
s_mul_i32 s19, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_mul_hi_u32 s19, s2, s19
v_sub_nc_u32_e32 v4, v10, v4
s_add_i32 s2, s2, s19
s_add_i32 s19, s15, s18
s_mul_hi_u32 s2, s17, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v11, s4, v4
s_mul_i32 s20, s3, s2
s_not_b32 s21, s2
v_cmp_le_u32_e64 s2, s4, v4
s_add_i32 s20, s19, s20
v_cndmask_b32_e64 v4, v4, v11, s2
s_mul_i32 s2, s5, s21
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_add_i32 s19, s19, s2
s_cmp_ge_u32 s20, s5
v_subrev_nc_u32_e32 v11, s4, v4
v_cmp_le_u32_e64 s2, s4, v4
s_cselect_b32 s19, s19, s20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_sub_i32 s20, s19, s5
s_cmp_ge_u32 s19, s5
v_cndmask_b32_e64 v4, v4, v11, s2
s_cselect_b32 s2, s20, s19
s_mov_b32 s19, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[11:12], null, s2, s4, v[4:5]
v_mov_b32_e32 v12, v3
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v11, s2, s6, v11
v_add_co_ci_u32_e64 v12, s2, s7, v12, s2
global_load_b32 v4, v[11:12], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 1, v4
s_xor_b32 s19, exec_lo, s19
s_cbranch_execz .LBB0_15
s_mov_b32 s20, exec_lo
v_cmpx_eq_u32_e32 2, v4
v_add_nc_u32_e32 v7, 1, v7
v_add_nc_u32_e32 v8, 1, v8
s_or_b32 exec_lo, exec_lo, s20
.LBB0_15:
s_and_not1_saveexec_b32 s19, s19
s_cbranch_execz .LBB0_8
s_mov_b32 s20, exec_lo
v_cmpx_eq_u32_e32 1, v4
s_cbranch_execz .LBB0_7
v_add_nc_u32_e32 v2, 1, v2
v_add_nc_u32_e32 v8, 1, v8
s_branch .LBB0_7
.LBB0_18:
s_or_b32 exec_lo, exec_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_ne_u32_e32 0, v9
s_xor_b32 s2, exec_lo, s2
v_add_nc_u32_e32 v0, -4, v8
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_u32_e32 vcc_lo, -3, v0
v_cndmask_b32_e32 v0, 0, v9, vcc_lo
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB0_24
v_mov_b32_e32 v0, 0
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 3, v8
v_cmp_lt_i32_e32 vcc_lo, v7, v2
v_cndmask_b32_e64 v0, 2, 1, vcc_lo
s_or_b32 exec_lo, exec_lo, s3
.LBB0_24:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s2
s_load_b64 s[0:1], s[0:1], 0x8
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11life_kernelPiS_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 22
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11life_kernelPiS_ii, .Lfunc_end0-_Z11life_kernelPiS_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11life_kernelPiS_ii
.private_segment_fixed_size: 0
.sgpr_count: 24
.sgpr_spill_count: 0
.symbol: _Z11life_kernelPiS_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ea652_00000000-6_life_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9read_cellPiiiiijj
.type _Z9read_cellPiiiiijj, @function
_Z9read_cellPiiiiijj:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z9read_cellPiiiiijj, .-_Z9read_cellPiiiiijj
.globl _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii
.type _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii, @function
_Z35__device_stub__Z11life_kernelPiS_iiPiS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z11life_kernelPiS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii, .-_Z35__device_stub__Z11life_kernelPiS_iiPiS_ii
.globl _Z11life_kernelPiS_ii
.type _Z11life_kernelPiS_ii, @function
_Z11life_kernelPiS_ii:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z11life_kernelPiS_iiPiS_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z11life_kernelPiS_ii, .-_Z11life_kernelPiS_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z11life_kernelPiS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11life_kernelPiS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "life_kernel.hip"
.globl _Z26__device_stub__life_kernelPiS_ii # -- Begin function _Z26__device_stub__life_kernelPiS_ii
.p2align 4, 0x90
.type _Z26__device_stub__life_kernelPiS_ii,@function
_Z26__device_stub__life_kernelPiS_ii: # @_Z26__device_stub__life_kernelPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z11life_kernelPiS_ii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z26__device_stub__life_kernelPiS_ii, .Lfunc_end0-_Z26__device_stub__life_kernelPiS_ii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11life_kernelPiS_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11life_kernelPiS_ii,@object # @_Z11life_kernelPiS_ii
.section .rodata,"a",@progbits
.globl _Z11life_kernelPiS_ii
.p2align 3, 0x0
_Z11life_kernelPiS_ii:
.quad _Z26__device_stub__life_kernelPiS_ii
.size _Z11life_kernelPiS_ii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z11life_kernelPiS_ii"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__life_kernelPiS_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11life_kernelPiS_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
int main() {
void *d;
for (int i = 0; i < 100000; i++) {
cudaMalloc(&d, 1024);
cudaFree(d);
}
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
int main() {
void *d;
for (int i = 0; i < 100000; i++) {
cudaMalloc(&d, 1024);
cudaFree(d);
}
} | .file "tmpxft_00093e3f_00000000-6_std.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl main
.type main, @function
main:
.LFB2027:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movl $100000, %ebx
movq %rsp, %rbp
.L4:
movl $1024, %esi
movq %rbp, %rdi
call cudaMalloc@PLT
movq (%rsp), %rdi
call cudaFree@PLT
subl $1, %ebx
jne .L4
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L8
movl $0, %eax
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2027:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
int main() {
void *d;
for (int i = 0; i < 100000; i++) {
cudaMalloc(&d, 1024);
cudaFree(d);
}
} | #include <hip/hip_runtime.h>
int main() {
void *d;
for (int i = 0; i < 100000; i++) {
hipMalloc(&d, 1024);
hipFree(d);
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
int main() {
void *d;
for (int i = 0; i < 100000; i++) {
hipMalloc(&d, 1024);
hipFree(d);
}
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
int main() {
void *d;
for (int i = 0; i < 100000; i++) {
hipMalloc(&d, 1024);
hipFree(d);
}
} | .text
.file "std.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
movl $100000, %ebp # imm = 0x186A0
movq %rsp, %rbx
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
movl $1024, %esi # imm = 0x400
movq %rbx, %rdi
callq hipMalloc
movq (%rsp), %rdi
callq hipFree
decl %ebp
jne .LBB0_1
# %bb.2:
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00093e3f_00000000-6_std.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl main
.type main, @function
main:
.LFB2027:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
movl $100000, %ebx
movq %rsp, %rbp
.L4:
movl $1024, %esi
movq %rbp, %rdi
call cudaMalloc@PLT
movq (%rsp), %rdi
call cudaFree@PLT
subl $1, %ebx
jne .L4
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L8
movl $0, %eax
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2027:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "std.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
movl $100000, %ebp # imm = 0x186A0
movq %rsp, %rbx
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
movl $1024, %esi # imm = 0x400
movq %rbx, %rdi
callq hipMalloc
movq (%rsp), %rdi
callq hipFree
decl %ebp
jne .LBB0_1
# %bb.2:
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <cstdlib>
#include <sys/time.h>
#define N 32 // Only powers of 2 to simplify the code
#define BLOCK_SIZE 8
#define NUM_BLOCKS N
#define NUM_THREADS_PER_BLOCK N
#define NUM_BLOCKS_TILED (N*N)/(BLOCK_SIZE*BLOCK_SIZE)
#define NUM_THREADS_PER_BLOCK_TILED BLOCK_SIZE*BLOCK_SIZE
#define TIME_RESOLUTION 1000000
using namespace std;
long long unsigned initial_time;
struct timeval t;
void printResults (long long unsigned tt) {
cout << tt << endl;
}
void start (void) {
gettimeofday(&t, NULL);
initial_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}
long long unsigned stop (void) {
gettimeofday(&t, NULL);
long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
return final_time - initial_time;
}
__global__ void matrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
*(dev_result+blockIdx.x*N+threadIdx.x)=0;
for(unsigned i=0; i < N; i++)
*(dev_result+blockIdx.x*N+threadIdx.x) += *(dev_m1+blockIdx.x*N+i) * *(dev_m2+i*N+threadIdx.x);
}
void gpuMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
long long unsigned stopHostToGPU, beginGPUtoHost, allTime;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
//startTime
start();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
stopHostToGPU = stop();
matrixKernel <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>>(dev_m1, dev_m2, dev_result);
beginGPUtoHost = stop();
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
allTime = stop();
//stopTime
printResults(allTime);
//transfer time
printResults(allTime-beginGPUtoHost+stopHostToGPU);
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
/*
__global__ void tiledMatrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
__shared__ float temp1 [BLOCK_SIZE][BLOCK_SIZE];
__shared__ float temp2 [BLOCK_SIZE][BLOCK_SIZE];
int xIn = threadIdx.x/BLOCK_SIZE;
int yIn = threadIdx.x%BLOCK_SIZE;
int xB = (((blockIdx.x*BLOCK_SIZE) / N) * BLOCK_SIZE) + xIn;
int yB = (((blockIdx.x*BLOCK_SIZE) % N) * BLOCK_SIZE) + yIn;
temp1[xIn][yIn]=*(dev_m1+xB*N+yB);
temp2[xIn][yIn]=*(dev_m2+xB*N+yB);
__syncthreads();
for(unsigned i=0; i < BLOCK_SIZE; i++)
*(dev_result+xB*N+yB) += temp1[xIn][i]*temp2[i][yIn];
}
void gpuTiledMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
start();
//startKernelTime();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
tiledMatrixKernel <<< NUM_THREADS_PER_BLOCK_TILED, NUM_BLOCKS_TILED >>>(dev_m1, dev_m2, dev_result);
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
//stopKernelTime();
printResults(stop());
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
*/
int main (int argc, char *argv[]) {
unsigned seed=0;
float *a = (float*)malloc(sizeof(float)*N*N);
float *b = (float*)malloc(sizeof(float)*N*N);
float *c = (float*)malloc(sizeof(float)*N*N);
srand(seed);
//build matrix A with random values and C initilized with 0's
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++){
*(a+i*N+j) = rand();
*(c+i*N+j) = 0;
}
}
//build matrix B with all elements equals to 1
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++)
*(b+i*N+j) = 1;
}
gpuMatrixMult(a,b,c);
//gpuTiledMatrixMult(a,b,c);
return 0;
} | code for sm_80
Function : _Z12matrixKernelPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ SHF.L.U32 R6, R6, 0x5, RZ ; /* 0x0000000506067819 */
/* 0x001fc800000006ff */
/*0060*/ IADD3 R0, P0, R6.reuse, R5, RZ ; /* 0x0000000506007210 */
/* 0x042fe40007f1e0ff */
/*0070*/ IMAD.WIDE.U32 R6, R6, R4.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x080fe400078e0004 */
/*0080*/ IADD3.X R3, RZ, RZ, RZ, P0, !PT ; /* 0x000000ffff037210 */
/* 0x000fe400007fe4ff */
/*0090*/ IMAD.WIDE.U32 R4, R5, R4, c[0x0][0x168] ; /* 0x00005a0005047625 */
/* 0x000fe200078e0004 */
/*00a0*/ LEA R2, P0, R0, c[0x0][0x170], 0x2 ; /* 0x00005c0000027a11 */
/* 0x000fc800078010ff */
/*00b0*/ LEA.HI.X R3, R0, c[0x0][0x174], R3, 0x2, P0 ; /* 0x00005d0000037a11 */
/* 0x000fca00000f1403 */
/*00c0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x000fe8000c101904 */
/*00d0*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */
/* 0x000ea8000c1e1900 */
/*00e0*/ LDG.E R9, [R4.64] ; /* 0x0000000404097981 */
/* 0x000ea4000c1e1900 */
/*00f0*/ FFMA R9, R0, R9, RZ ; /* 0x0000000900097223 */
/* 0x004fca00000000ff */
/*0100*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0110*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R8, [R4.64+0x80] ; /* 0x0000800404087981 */
/* 0x000ea4000c1e1900 */
/*0130*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x004fca0000000009 */
/*0140*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0150*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */
/* 0x000ea8000c1e1900 */
/*0160*/ LDG.E R8, [R4.64+0x100] ; /* 0x0001000404087981 */
/* 0x000ea4000c1e1900 */
/*0170*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0180*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0190*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */
/* 0x000e28000c1e1900 */
/*01a0*/ LDG.E R8, [R4.64+0x180] ; /* 0x0001800404087981 */
/* 0x000e24000c1e1900 */
/*01b0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*01c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*01d0*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */
/* 0x000e68000c1e1900 */
/*01e0*/ LDG.E R8, [R4.64+0x200] ; /* 0x0002000404087981 */
/* 0x000e64000c1e1900 */
/*01f0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0200*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0210*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */
/* 0x000ea8000c1e1900 */
/*0220*/ LDG.E R8, [R4.64+0x280] ; /* 0x0002800404087981 */
/* 0x000ea4000c1e1900 */
/*0230*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0240*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0250*/ LDG.E R0, [R6.64+0x18] ; /* 0x0000180406007981 */
/* 0x000e28000c1e1900 */
/*0260*/ LDG.E R8, [R4.64+0x300] ; /* 0x0003000404087981 */
/* 0x000e24000c1e1900 */
/*0270*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0280*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0290*/ LDG.E R0, [R6.64+0x1c] ; /* 0x00001c0406007981 */
/* 0x000e68000c1e1900 */
/*02a0*/ LDG.E R8, [R4.64+0x380] ; /* 0x0003800404087981 */
/* 0x000e64000c1e1900 */
/*02b0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*02c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*02d0*/ LDG.E R0, [R6.64+0x20] ; /* 0x0000200406007981 */
/* 0x000ea8000c1e1900 */
/*02e0*/ LDG.E R8, [R4.64+0x400] ; /* 0x0004000404087981 */
/* 0x000ea4000c1e1900 */
/*02f0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0300*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0310*/ LDG.E R0, [R6.64+0x24] ; /* 0x0000240406007981 */
/* 0x000e28000c1e1900 */
/*0320*/ LDG.E R8, [R4.64+0x480] ; /* 0x0004800404087981 */
/* 0x000e24000c1e1900 */
/*0330*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0340*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0350*/ LDG.E R0, [R6.64+0x28] ; /* 0x0000280406007981 */
/* 0x000e68000c1e1900 */
/*0360*/ LDG.E R8, [R4.64+0x500] ; /* 0x0005000404087981 */
/* 0x000e64000c1e1900 */
/*0370*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0380*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0390*/ LDG.E R0, [R6.64+0x2c] ; /* 0x00002c0406007981 */
/* 0x000ea8000c1e1900 */
/*03a0*/ LDG.E R8, [R4.64+0x580] ; /* 0x0005800404087981 */
/* 0x000ea4000c1e1900 */
/*03b0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*03c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*03d0*/ LDG.E R0, [R6.64+0x30] ; /* 0x0000300406007981 */
/* 0x000e28000c1e1900 */
/*03e0*/ LDG.E R8, [R4.64+0x600] ; /* 0x0006000404087981 */
/* 0x000e24000c1e1900 */
/*03f0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0400*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0410*/ LDG.E R0, [R6.64+0x34] ; /* 0x0000340406007981 */
/* 0x000e68000c1e1900 */
/*0420*/ LDG.E R8, [R4.64+0x680] ; /* 0x0006800404087981 */
/* 0x000e64000c1e1900 */
/*0430*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0440*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0450*/ LDG.E R0, [R6.64+0x38] ; /* 0x0000380406007981 */
/* 0x000ea8000c1e1900 */
/*0460*/ LDG.E R8, [R4.64+0x700] ; /* 0x0007000404087981 */
/* 0x000ea4000c1e1900 */
/*0470*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0480*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0490*/ LDG.E R0, [R6.64+0x3c] ; /* 0x00003c0406007981 */
/* 0x000e28000c1e1900 */
/*04a0*/ LDG.E R8, [R4.64+0x780] ; /* 0x0007800404087981 */
/* 0x000e24000c1e1900 */
/*04b0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*04c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*04d0*/ LDG.E R0, [R6.64+0x40] ; /* 0x0000400406007981 */
/* 0x000e68000c1e1900 */
/*04e0*/ LDG.E R8, [R4.64+0x800] ; /* 0x0008000404087981 */
/* 0x000e64000c1e1900 */
/*04f0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0500*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0510*/ LDG.E R0, [R6.64+0x44] ; /* 0x0000440406007981 */
/* 0x000ea8000c1e1900 */
/*0520*/ LDG.E R8, [R4.64+0x880] ; /* 0x0008800404087981 */
/* 0x000ea4000c1e1900 */
/*0530*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0540*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0550*/ LDG.E R0, [R6.64+0x48] ; /* 0x0000480406007981 */
/* 0x000e28000c1e1900 */
/*0560*/ LDG.E R8, [R4.64+0x900] ; /* 0x0009000404087981 */
/* 0x000e24000c1e1900 */
/*0570*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0580*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0590*/ LDG.E R0, [R6.64+0x4c] ; /* 0x00004c0406007981 */
/* 0x000e68000c1e1900 */
/*05a0*/ LDG.E R8, [R4.64+0x980] ; /* 0x0009800404087981 */
/* 0x000e64000c1e1900 */
/*05b0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*05c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*05d0*/ LDG.E R0, [R6.64+0x50] ; /* 0x0000500406007981 */
/* 0x000ea8000c1e1900 */
/*05e0*/ LDG.E R8, [R4.64+0xa00] ; /* 0x000a000404087981 */
/* 0x000ea4000c1e1900 */
/*05f0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0600*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0610*/ LDG.E R0, [R6.64+0x54] ; /* 0x0000540406007981 */
/* 0x000e28000c1e1900 */
/*0620*/ LDG.E R8, [R4.64+0xa80] ; /* 0x000a800404087981 */
/* 0x000e24000c1e1900 */
/*0630*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0640*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0650*/ LDG.E R0, [R6.64+0x58] ; /* 0x0000580406007981 */
/* 0x000e68000c1e1900 */
/*0660*/ LDG.E R8, [R4.64+0xb00] ; /* 0x000b000404087981 */
/* 0x000e64000c1e1900 */
/*0670*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0680*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0690*/ LDG.E R0, [R6.64+0x5c] ; /* 0x00005c0406007981 */
/* 0x000ea8000c1e1900 */
/*06a0*/ LDG.E R8, [R4.64+0xb80] ; /* 0x000b800404087981 */
/* 0x000ea4000c1e1900 */
/*06b0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*06c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*06d0*/ LDG.E R0, [R6.64+0x60] ; /* 0x0000600406007981 */
/* 0x000e28000c1e1900 */
/*06e0*/ LDG.E R8, [R4.64+0xc00] ; /* 0x000c000404087981 */
/* 0x000e24000c1e1900 */
/*06f0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0700*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0710*/ LDG.E R0, [R6.64+0x64] ; /* 0x0000640406007981 */
/* 0x000e68000c1e1900 */
/*0720*/ LDG.E R8, [R4.64+0xc80] ; /* 0x000c800404087981 */
/* 0x000e64000c1e1900 */
/*0730*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0740*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0750*/ LDG.E R0, [R6.64+0x68] ; /* 0x0000680406007981 */
/* 0x000ea8000c1e1900 */
/*0760*/ LDG.E R8, [R4.64+0xd00] ; /* 0x000d000404087981 */
/* 0x000ea4000c1e1900 */
/*0770*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0780*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0790*/ LDG.E R0, [R6.64+0x6c] ; /* 0x00006c0406007981 */
/* 0x000e28000c1e1900 */
/*07a0*/ LDG.E R8, [R4.64+0xd80] ; /* 0x000d800404087981 */
/* 0x000e24000c1e1900 */
/*07b0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*07c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*07d0*/ LDG.E R0, [R6.64+0x70] ; /* 0x0000700406007981 */
/* 0x000e68000c1e1900 */
/*07e0*/ LDG.E R8, [R4.64+0xe00] ; /* 0x000e000404087981 */
/* 0x000e64000c1e1900 */
/*07f0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0800*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0810*/ LDG.E R0, [R6.64+0x74] ; /* 0x0000740406007981 */
/* 0x000ea8000c1e1900 */
/*0820*/ LDG.E R8, [R4.64+0xe80] ; /* 0x000e800404087981 */
/* 0x000ea4000c1e1900 */
/*0830*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0840*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x000fe8000c101904 */
/*0850*/ LDG.E R0, [R6.64+0x78] ; /* 0x0000780406007981 */
/* 0x000e28000c1e1900 */
/*0860*/ LDG.E R8, [R4.64+0xf00] ; /* 0x000f000404087981 */
/* 0x000e24000c1e1900 */
/*0870*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0880*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe8000c101904 */
/*0890*/ LDG.E R0, [R6.64+0x7c] ; /* 0x00007c0406007981 */
/* 0x000e68000c1e1900 */
/*08a0*/ LDG.E R8, [R4.64+0xf80] ; /* 0x000f800404087981 */
/* 0x000e64000c1e1900 */
/*08b0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*08c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe2000c101904 */
/*08d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*08e0*/ BRA 0x8e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0900*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0910*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0920*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0930*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0940*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0950*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0960*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0970*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <cstdlib>
#include <sys/time.h>
#define N 32 // Only powers of 2 to simplify the code
#define BLOCK_SIZE 8
#define NUM_BLOCKS N
#define NUM_THREADS_PER_BLOCK N
#define NUM_BLOCKS_TILED (N*N)/(BLOCK_SIZE*BLOCK_SIZE)
#define NUM_THREADS_PER_BLOCK_TILED BLOCK_SIZE*BLOCK_SIZE
#define TIME_RESOLUTION 1000000
using namespace std;
long long unsigned initial_time;
struct timeval t;
void printResults (long long unsigned tt) {
cout << tt << endl;
}
void start (void) {
gettimeofday(&t, NULL);
initial_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}
long long unsigned stop (void) {
gettimeofday(&t, NULL);
long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
return final_time - initial_time;
}
__global__ void matrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
*(dev_result+blockIdx.x*N+threadIdx.x)=0;
for(unsigned i=0; i < N; i++)
*(dev_result+blockIdx.x*N+threadIdx.x) += *(dev_m1+blockIdx.x*N+i) * *(dev_m2+i*N+threadIdx.x);
}
void gpuMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
long long unsigned stopHostToGPU, beginGPUtoHost, allTime;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
//startTime
start();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
stopHostToGPU = stop();
matrixKernel <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>>(dev_m1, dev_m2, dev_result);
beginGPUtoHost = stop();
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
allTime = stop();
//stopTime
printResults(allTime);
//transfer time
printResults(allTime-beginGPUtoHost+stopHostToGPU);
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
/*
__global__ void tiledMatrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
__shared__ float temp1 [BLOCK_SIZE][BLOCK_SIZE];
__shared__ float temp2 [BLOCK_SIZE][BLOCK_SIZE];
int xIn = threadIdx.x/BLOCK_SIZE;
int yIn = threadIdx.x%BLOCK_SIZE;
int xB = (((blockIdx.x*BLOCK_SIZE) / N) * BLOCK_SIZE) + xIn;
int yB = (((blockIdx.x*BLOCK_SIZE) % N) * BLOCK_SIZE) + yIn;
temp1[xIn][yIn]=*(dev_m1+xB*N+yB);
temp2[xIn][yIn]=*(dev_m2+xB*N+yB);
__syncthreads();
for(unsigned i=0; i < BLOCK_SIZE; i++)
*(dev_result+xB*N+yB) += temp1[xIn][i]*temp2[i][yIn];
}
void gpuTiledMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
start();
//startKernelTime();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
tiledMatrixKernel <<< NUM_THREADS_PER_BLOCK_TILED, NUM_BLOCKS_TILED >>>(dev_m1, dev_m2, dev_result);
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
//stopKernelTime();
printResults(stop());
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
*/
int main (int argc, char *argv[]) {
unsigned seed=0;
float *a = (float*)malloc(sizeof(float)*N*N);
float *b = (float*)malloc(sizeof(float)*N*N);
float *c = (float*)malloc(sizeof(float)*N*N);
srand(seed);
//build matrix A with random values and C initilized with 0's
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++){
*(a+i*N+j) = rand();
*(c+i*N+j) = 0;
}
}
//build matrix B with all elements equals to 1
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++)
*(b+i*N+j) = 1;
}
gpuMatrixMult(a,b,c);
//gpuTiledMatrixMult(a,b,c);
return 0;
} | .file "tmpxft_0013b8ff_00000000-6_dot_product_1.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3676:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z12printResultsy
.type _Z12printResultsy, @function
_Z12printResultsy:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo9_M_insertIyEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L8
cmpb $0, 56(%rbp)
je .L5
movzbl 67(%rbp), %esi
.L6:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call _ZSt16__throw_bad_castv@PLT
.L5:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L6
.cfi_endproc
.LFE3669:
.size _Z12printResultsy, .-_Z12printResultsy
.globl _Z5startv
.type _Z5startv, @function
_Z5startv:
.LFB3670:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl $0, %esi
leaq t(%rip), %rdi
call gettimeofday@PLT
imulq $1000000, t(%rip), %rax
addq 8+t(%rip), %rax
movq %rax, initial_time(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3670:
.size _Z5startv, .-_Z5startv
.globl _Z4stopv
.type _Z4stopv, @function
_Z4stopv:
.LFB3671:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl $0, %esi
leaq t(%rip), %rdi
call gettimeofday@PLT
imulq $1000000, t(%rip), %rax
addq 8+t(%rip), %rax
subq initial_time(%rip), %rax
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3671:
.size _Z4stopv, .-_Z4stopv
.globl _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
.type _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_, @function
_Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_:
.LFB3698:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L17
.L13:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12matrixKernelPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L13
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3698:
.size _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_, .-_Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
.globl _Z12matrixKernelPfS_S_
.type _Z12matrixKernelPfS_S_, @function
_Z12matrixKernelPfS_S_:
.LFB3699:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3699:
.size _Z12matrixKernelPfS_S_, .-_Z12matrixKernelPfS_S_
.globl _Z13gpuMatrixMultPfS_S_
.type _Z13gpuMatrixMultPfS_S_, @function
_Z13gpuMatrixMultPfS_S_:
.LFB3672:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $64, %rsp
.cfi_def_cfa_offset 96
movq %rdi, %r12
movq %rsi, %rbx
movq %rdx, %rbp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
call _Z5startv
movl $1, %ecx
movl $4096, %edx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4096, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
call _Z4stopv
movq %rax, %rbx
movl $32, 44(%rsp)
movl $1, 48(%rsp)
movl $32, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L25
.L22:
call _Z4stopv
movq %rax, %r12
movl $2, %ecx
movl $4096, %edx
movq 24(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
call _Z4stopv
movq %rax, %rbp
movq %rax, %rdi
call _Z12printResultsy
leaq (%rbx,%rbp), %rdi
subq %r12, %rdi
call _Z12printResultsy
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
jmp .L22
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3672:
.size _Z13gpuMatrixMultPfS_S_, .-_Z13gpuMatrixMultPfS_S_
.globl main
.type main, @function
main:
.LFB3673:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movl $4096, %edi
call malloc@PLT
movq %rax, %r14
movl $4096, %edi
call malloc@PLT
movq %rax, %r15
movl $4096, %edi
call malloc@PLT
movq %rax, %r12
movq %rax, 8(%rsp)
movl $0, %edi
call srand@PLT
movq %r14, %rbp
leaq 4096(%r14), %r13
.L28:
movl $0, %ebx
.L29:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rbx)
movl $0x00000000, (%r12,%rbx)
addq $4, %rbx
cmpq $128, %rbx
jne .L29
subq $-128, %rbp
subq $-128, %r12
cmpq %r13, %rbp
jne .L28
leaq 128(%r15), %rdx
leaq 4224(%r15), %rcx
movss .LC1(%rip), %xmm0
.L30:
leaq -128(%rdx), %rax
.L31:
movss %xmm0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L31
subq $-128, %rdx
cmpq %rcx, %rdx
jne .L30
movq 8(%rsp), %rdx
movq %r15, %rsi
movq %r14, %rdi
call _Z13gpuMatrixMultPfS_S_
movl $0, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3673:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "_Z12matrixKernelPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3701:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z12matrixKernelPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3701:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl t
.bss
.align 16
.type t, @object
.size t, 16
t:
.zero 16
.globl initial_time
.align 8
.type initial_time, @object
.size initial_time, 8
initial_time:
.zero 8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1065353216
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <cstdlib>
#include <sys/time.h>
#define N 32 // Only powers of 2 to simplify the code
#define BLOCK_SIZE 8
#define NUM_BLOCKS N
#define NUM_THREADS_PER_BLOCK N
#define NUM_BLOCKS_TILED (N*N)/(BLOCK_SIZE*BLOCK_SIZE)
#define NUM_THREADS_PER_BLOCK_TILED BLOCK_SIZE*BLOCK_SIZE
#define TIME_RESOLUTION 1000000
using namespace std;
long long unsigned initial_time;
struct timeval t;
void printResults (long long unsigned tt) {
cout << tt << endl;
}
void start (void) {
gettimeofday(&t, NULL);
initial_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}
long long unsigned stop (void) {
gettimeofday(&t, NULL);
long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
return final_time - initial_time;
}
__global__ void matrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
*(dev_result+blockIdx.x*N+threadIdx.x)=0;
for(unsigned i=0; i < N; i++)
*(dev_result+blockIdx.x*N+threadIdx.x) += *(dev_m1+blockIdx.x*N+i) * *(dev_m2+i*N+threadIdx.x);
}
void gpuMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
long long unsigned stopHostToGPU, beginGPUtoHost, allTime;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
//startTime
start();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
stopHostToGPU = stop();
matrixKernel <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>>(dev_m1, dev_m2, dev_result);
beginGPUtoHost = stop();
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
allTime = stop();
//stopTime
printResults(allTime);
//transfer time
printResults(allTime-beginGPUtoHost+stopHostToGPU);
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
/*
__global__ void tiledMatrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
__shared__ float temp1 [BLOCK_SIZE][BLOCK_SIZE];
__shared__ float temp2 [BLOCK_SIZE][BLOCK_SIZE];
int xIn = threadIdx.x/BLOCK_SIZE;
int yIn = threadIdx.x%BLOCK_SIZE;
int xB = (((blockIdx.x*BLOCK_SIZE) / N) * BLOCK_SIZE) + xIn;
int yB = (((blockIdx.x*BLOCK_SIZE) % N) * BLOCK_SIZE) + yIn;
temp1[xIn][yIn]=*(dev_m1+xB*N+yB);
temp2[xIn][yIn]=*(dev_m2+xB*N+yB);
__syncthreads();
for(unsigned i=0; i < BLOCK_SIZE; i++)
*(dev_result+xB*N+yB) += temp1[xIn][i]*temp2[i][yIn];
}
void gpuTiledMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
start();
//startKernelTime();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
tiledMatrixKernel <<< NUM_THREADS_PER_BLOCK_TILED, NUM_BLOCKS_TILED >>>(dev_m1, dev_m2, dev_result);
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
//stopKernelTime();
printResults(stop());
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
*/
int main (int argc, char *argv[]) {
unsigned seed=0;
float *a = (float*)malloc(sizeof(float)*N*N);
float *b = (float*)malloc(sizeof(float)*N*N);
float *c = (float*)malloc(sizeof(float)*N*N);
srand(seed);
//build matrix A with random values and C initilized with 0's
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++){
*(a+i*N+j) = rand();
*(c+i*N+j) = 0;
}
}
//build matrix B with all elements equals to 1
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++)
*(b+i*N+j) = 1;
}
gpuMatrixMult(a,b,c);
//gpuTiledMatrixMult(a,b,c);
return 0;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <sys/time.h>
#define N 32 // Only powers of 2 to simplify the code
#define BLOCK_SIZE 8
#define NUM_BLOCKS N
#define NUM_THREADS_PER_BLOCK N
#define NUM_BLOCKS_TILED (N*N)/(BLOCK_SIZE*BLOCK_SIZE)
#define NUM_THREADS_PER_BLOCK_TILED BLOCK_SIZE*BLOCK_SIZE
#define TIME_RESOLUTION 1000000
using namespace std;
long long unsigned initial_time;
struct timeval t;
void printResults (long long unsigned tt) {
cout << tt << endl;
}
void start (void) {
gettimeofday(&t, NULL);
initial_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}
long long unsigned stop (void) {
gettimeofday(&t, NULL);
long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
return final_time - initial_time;
}
__global__ void matrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
*(dev_result+blockIdx.x*N+threadIdx.x)=0;
for(unsigned i=0; i < N; i++)
*(dev_result+blockIdx.x*N+threadIdx.x) += *(dev_m1+blockIdx.x*N+i) * *(dev_m2+i*N+threadIdx.x);
}
void gpuMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
long long unsigned stopHostToGPU, beginGPUtoHost, allTime;
hipMalloc((void**) &dev_m1,N * N * sizeof(float));
hipMalloc((void**) &dev_m2,N * N * sizeof(float));
hipMalloc((void**) &dev_result, N * N * sizeof(float));
//startTime
start();
hipMemcpy(dev_m1, m1, N * N * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(dev_m2, m2, N * N * sizeof(float), hipMemcpyHostToDevice);
stopHostToGPU = stop();
matrixKernel <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>>(dev_m1, dev_m2, dev_result);
beginGPUtoHost = stop();
// copy the output to the host
hipMemcpy(result, dev_result, N * N * sizeof(float), hipMemcpyDeviceToHost);
allTime = stop();
//stopTime
printResults(allTime);
//transfer time
printResults(allTime-beginGPUtoHost+stopHostToGPU);
// free the device memory
hipFree(dev_m1);
hipFree(dev_m2);
hipFree(dev_result);
}
/*
__global__ void tiledMatrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
__shared__ float temp1 [BLOCK_SIZE][BLOCK_SIZE];
__shared__ float temp2 [BLOCK_SIZE][BLOCK_SIZE];
int xIn = threadIdx.x/BLOCK_SIZE;
int yIn = threadIdx.x%BLOCK_SIZE;
int xB = (((blockIdx.x*BLOCK_SIZE) / N) * BLOCK_SIZE) + xIn;
int yB = (((blockIdx.x*BLOCK_SIZE) % N) * BLOCK_SIZE) + yIn;
temp1[xIn][yIn]=*(dev_m1+xB*N+yB);
temp2[xIn][yIn]=*(dev_m2+xB*N+yB);
__syncthreads();
for(unsigned i=0; i < BLOCK_SIZE; i++)
*(dev_result+xB*N+yB) += temp1[xIn][i]*temp2[i][yIn];
}
void gpuTiledMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
start();
//startKernelTime();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
tiledMatrixKernel <<< NUM_THREADS_PER_BLOCK_TILED, NUM_BLOCKS_TILED >>>(dev_m1, dev_m2, dev_result);
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
//stopKernelTime();
printResults(stop());
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
*/
int main (int argc, char *argv[]) {
unsigned seed=0;
float *a = (float*)malloc(sizeof(float)*N*N);
float *b = (float*)malloc(sizeof(float)*N*N);
float *c = (float*)malloc(sizeof(float)*N*N);
srand(seed);
//build matrix A with random values and C initilized with 0's
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++){
*(a+i*N+j) = rand();
*(c+i*N+j) = 0;
}
}
//build matrix B with all elements equals to 1
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++)
*(b+i*N+j) = 1;
}
gpuMatrixMult(a,b,c);
//gpuTiledMatrixMult(a,b,c);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <sys/time.h>
#define N 32 // Only powers of 2 to simplify the code
#define BLOCK_SIZE 8
#define NUM_BLOCKS N
#define NUM_THREADS_PER_BLOCK N
#define NUM_BLOCKS_TILED (N*N)/(BLOCK_SIZE*BLOCK_SIZE)
#define NUM_THREADS_PER_BLOCK_TILED BLOCK_SIZE*BLOCK_SIZE
#define TIME_RESOLUTION 1000000
using namespace std;
long long unsigned initial_time;
struct timeval t;
void printResults (long long unsigned tt) {
cout << tt << endl;
}
void start (void) {
gettimeofday(&t, NULL);
initial_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}
long long unsigned stop (void) {
gettimeofday(&t, NULL);
long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
return final_time - initial_time;
}
__global__ void matrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
*(dev_result+blockIdx.x*N+threadIdx.x)=0;
for(unsigned i=0; i < N; i++)
*(dev_result+blockIdx.x*N+threadIdx.x) += *(dev_m1+blockIdx.x*N+i) * *(dev_m2+i*N+threadIdx.x);
}
void gpuMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
long long unsigned stopHostToGPU, beginGPUtoHost, allTime;
hipMalloc((void**) &dev_m1,N * N * sizeof(float));
hipMalloc((void**) &dev_m2,N * N * sizeof(float));
hipMalloc((void**) &dev_result, N * N * sizeof(float));
//startTime
start();
hipMemcpy(dev_m1, m1, N * N * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(dev_m2, m2, N * N * sizeof(float), hipMemcpyHostToDevice);
stopHostToGPU = stop();
matrixKernel <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>>(dev_m1, dev_m2, dev_result);
beginGPUtoHost = stop();
// copy the output to the host
hipMemcpy(result, dev_result, N * N * sizeof(float), hipMemcpyDeviceToHost);
allTime = stop();
//stopTime
printResults(allTime);
//transfer time
printResults(allTime-beginGPUtoHost+stopHostToGPU);
// free the device memory
hipFree(dev_m1);
hipFree(dev_m2);
hipFree(dev_result);
}
/*
__global__ void tiledMatrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
__shared__ float temp1 [BLOCK_SIZE][BLOCK_SIZE];
__shared__ float temp2 [BLOCK_SIZE][BLOCK_SIZE];
int xIn = threadIdx.x/BLOCK_SIZE;
int yIn = threadIdx.x%BLOCK_SIZE;
int xB = (((blockIdx.x*BLOCK_SIZE) / N) * BLOCK_SIZE) + xIn;
int yB = (((blockIdx.x*BLOCK_SIZE) % N) * BLOCK_SIZE) + yIn;
temp1[xIn][yIn]=*(dev_m1+xB*N+yB);
temp2[xIn][yIn]=*(dev_m2+xB*N+yB);
__syncthreads();
for(unsigned i=0; i < BLOCK_SIZE; i++)
*(dev_result+xB*N+yB) += temp1[xIn][i]*temp2[i][yIn];
}
void gpuTiledMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
start();
//startKernelTime();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
tiledMatrixKernel <<< NUM_THREADS_PER_BLOCK_TILED, NUM_BLOCKS_TILED >>>(dev_m1, dev_m2, dev_result);
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
//stopKernelTime();
printResults(stop());
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
*/
int main (int argc, char *argv[]) {
unsigned seed=0;
float *a = (float*)malloc(sizeof(float)*N*N);
float *b = (float*)malloc(sizeof(float)*N*N);
float *c = (float*)malloc(sizeof(float)*N*N);
srand(seed);
//build matrix A with random values and C initilized with 0's
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++){
*(a+i*N+j) = rand();
*(c+i*N+j) = 0;
}
}
//build matrix B with all elements equals to 1
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++)
*(b+i*N+j) = 1;
}
gpuMatrixMult(a,b,c);
//gpuTiledMatrixMult(a,b,c);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12matrixKernelPfS_S_
.globl _Z12matrixKernelPfS_S_
.p2align 8
.type _Z12matrixKernelPfS_S_,@function
_Z12matrixKernelPfS_S_:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v6, 2, v0
s_mov_b32 s7, 0
s_lshl_b32 s6, s15, 5
v_mov_b32_e32 v4, 0
s_lshl_b64 s[6:7], s[6:7], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s6
v_add_co_u32 v0, s2, s2, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, null, s3, 0, s2
s_addc_u32 s5, s5, s7
v_add_co_u32 v2, s2, s4, v6
v_add_co_ci_u32_e64 v3, null, s5, 0, s2
s_add_u32 s2, s0, s6
s_addc_u32 s3, s1, s7
s_mov_b64 s[0:1], 0
global_store_b32 v6, v4, s[4:5]
.p2align 6
.LBB0_1:
s_add_u32 s4, s2, s0
s_addc_u32 s5, s3, s1
global_load_b32 v6, v[0:1], off
global_load_b32 v7, v4, s[4:5]
v_add_co_u32 v0, vcc_lo, v0, 0x80
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmpk_eq_i32 s0, 0x80
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v7, v6
global_store_b32 v[2:3], v5, off
s_cbranch_scc0 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12matrixKernelPfS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12matrixKernelPfS_S_, .Lfunc_end0-_Z12matrixKernelPfS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12matrixKernelPfS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12matrixKernelPfS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <sys/time.h>
#define N 32 // Only powers of 2 to simplify the code
#define BLOCK_SIZE 8
#define NUM_BLOCKS N
#define NUM_THREADS_PER_BLOCK N
#define NUM_BLOCKS_TILED (N*N)/(BLOCK_SIZE*BLOCK_SIZE)
#define NUM_THREADS_PER_BLOCK_TILED BLOCK_SIZE*BLOCK_SIZE
#define TIME_RESOLUTION 1000000
using namespace std;
long long unsigned initial_time;
struct timeval t;
void printResults (long long unsigned tt) {
cout << tt << endl;
}
void start (void) {
gettimeofday(&t, NULL);
initial_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}
long long unsigned stop (void) {
gettimeofday(&t, NULL);
long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
return final_time - initial_time;
}
__global__ void matrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
*(dev_result+blockIdx.x*N+threadIdx.x)=0;
for(unsigned i=0; i < N; i++)
*(dev_result+blockIdx.x*N+threadIdx.x) += *(dev_m1+blockIdx.x*N+i) * *(dev_m2+i*N+threadIdx.x);
}
void gpuMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
long long unsigned stopHostToGPU, beginGPUtoHost, allTime;
hipMalloc((void**) &dev_m1,N * N * sizeof(float));
hipMalloc((void**) &dev_m2,N * N * sizeof(float));
hipMalloc((void**) &dev_result, N * N * sizeof(float));
//startTime
start();
hipMemcpy(dev_m1, m1, N * N * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(dev_m2, m2, N * N * sizeof(float), hipMemcpyHostToDevice);
stopHostToGPU = stop();
matrixKernel <<< NUM_THREADS_PER_BLOCK, NUM_BLOCKS >>>(dev_m1, dev_m2, dev_result);
beginGPUtoHost = stop();
// copy the output to the host
hipMemcpy(result, dev_result, N * N * sizeof(float), hipMemcpyDeviceToHost);
allTime = stop();
//stopTime
printResults(allTime);
//transfer time
printResults(allTime-beginGPUtoHost+stopHostToGPU);
// free the device memory
hipFree(dev_m1);
hipFree(dev_m2);
hipFree(dev_result);
}
/*
__global__ void tiledMatrixKernel (float *dev_m1, float *dev_m2, float *dev_result) {
__shared__ float temp1 [BLOCK_SIZE][BLOCK_SIZE];
__shared__ float temp2 [BLOCK_SIZE][BLOCK_SIZE];
int xIn = threadIdx.x/BLOCK_SIZE;
int yIn = threadIdx.x%BLOCK_SIZE;
int xB = (((blockIdx.x*BLOCK_SIZE) / N) * BLOCK_SIZE) + xIn;
int yB = (((blockIdx.x*BLOCK_SIZE) % N) * BLOCK_SIZE) + yIn;
temp1[xIn][yIn]=*(dev_m1+xB*N+yB);
temp2[xIn][yIn]=*(dev_m2+xB*N+yB);
__syncthreads();
for(unsigned i=0; i < BLOCK_SIZE; i++)
*(dev_result+xB*N+yB) += temp1[xIn][i]*temp2[i][yIn];
}
void gpuTiledMatrixMult (float *m1, float *m2, float *result) {
float *dev_m1, *dev_m2, *dev_result;
cudaMalloc((void**) &dev_m1,N * N * sizeof(float));
cudaMalloc((void**) &dev_m2,N * N * sizeof(float));
cudaMalloc((void**) &dev_result, N * N * sizeof(float));
start();
//startKernelTime();
cudaMemcpy(dev_m1, m1, N * N * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_m2, m2, N * N * sizeof(float), cudaMemcpyHostToDevice);
tiledMatrixKernel <<< NUM_THREADS_PER_BLOCK_TILED, NUM_BLOCKS_TILED >>>(dev_m1, dev_m2, dev_result);
// copy the output to the host
cudaMemcpy(result, dev_result, N * N * sizeof(float), cudaMemcpyDeviceToHost);
//stopKernelTime();
printResults(stop());
// free the device memory
cudaFree(dev_m1);
cudaFree(dev_m2);
cudaFree(dev_result);
}
*/
int main (int argc, char *argv[]) {
unsigned seed=0;
float *a = (float*)malloc(sizeof(float)*N*N);
float *b = (float*)malloc(sizeof(float)*N*N);
float *c = (float*)malloc(sizeof(float)*N*N);
srand(seed);
//build matrix A with random values and C initilized with 0's
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++){
*(a+i*N+j) = rand();
*(c+i*N+j) = 0;
}
}
//build matrix B with all elements equals to 1
for(int i = 0; i < N; i++){
for(int j = 0; j < N; j++)
*(b+i*N+j) = 1;
}
gpuMatrixMult(a,b,c);
//gpuTiledMatrixMult(a,b,c);
return 0;
} | .text
.file "dot_product_1.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z12printResultsy # -- Begin function _Z12printResultsy
.p2align 4, 0x90
.type _Z12printResultsy,@function
_Z12printResultsy: # @_Z12printResultsy
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq %rdi, %rsi
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIyEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB0_5
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB0_3
# %bb.2:
movzbl 67(%rbx), %ecx
jmp .LBB0_4
.LBB0_3:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB0_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
jmp _ZNSo5flushEv # TAILCALL
.LBB0_5:
.cfi_def_cfa_offset 32
callq _ZSt16__throw_bad_castv
.Lfunc_end0:
.size _Z12printResultsy, .Lfunc_end0-_Z12printResultsy
.cfi_endproc
# -- End function
.globl _Z5startv # -- Begin function _Z5startv
.p2align 4, 0x90
.type _Z5startv,@function
_Z5startv: # @_Z5startv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %rax # imm = 0xF4240
addq t+8(%rip), %rax
movq %rax, initial_time(%rip)
popq %rax
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z5startv, .Lfunc_end1-_Z5startv
.cfi_endproc
# -- End function
.globl _Z4stopv # -- Begin function _Z4stopv
.p2align 4, 0x90
.type _Z4stopv,@function
_Z4stopv: # @_Z4stopv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %rax # imm = 0xF4240
addq t+8(%rip), %rax
subq initial_time(%rip), %rax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z4stopv, .Lfunc_end2-_Z4stopv
.cfi_endproc
# -- End function
.globl _Z27__device_stub__matrixKernelPfS_S_ # -- Begin function _Z27__device_stub__matrixKernelPfS_S_
.p2align 4, 0x90
.type _Z27__device_stub__matrixKernelPfS_S_,@function
_Z27__device_stub__matrixKernelPfS_S_: # @_Z27__device_stub__matrixKernelPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12matrixKernelPfS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z27__device_stub__matrixKernelPfS_S_, .Lfunc_end3-_Z27__device_stub__matrixKernelPfS_S_
.cfi_endproc
# -- End function
.globl _Z13gpuMatrixMultPfS_S_ # -- Begin function _Z13gpuMatrixMultPfS_S_
.p2align 4, 0x90
.type _Z13gpuMatrixMultPfS_S_,@function
_Z13gpuMatrixMultPfS_S_: # @_Z13gpuMatrixMultPfS_S_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
leaq 24(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 16(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 8(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %rax # imm = 0xF4240
addq t+8(%rip), %rax
movq %rax, initial_time(%rip)
movq 24(%rsp), %rdi
movl $4096, %edx # imm = 0x1000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movl $4096, %edx # imm = 0x1000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
movq t(%rip), %r13
movq t+8(%rip), %rbx
movq initial_time(%rip), %r12
movabsq $4294967328, %rdi # imm = 0x100000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_2
# %bb.1:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z12matrixKernelPfS_S_, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_2:
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
movq t(%rip), %rax
movq %rax, 40(%rsp) # 8-byte Spill
movq t+8(%rip), %rax
movq %rax, 48(%rsp) # 8-byte Spill
movq initial_time(%rip), %rbp
movq 8(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %r14 # imm = 0xF4240
addq t+8(%rip), %r14
subq initial_time(%rip), %r14
movl $_ZSt4cout, %edi
movq %r14, %rsi
callq _ZNSo9_M_insertIyEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB4_11
# %bb.3: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i.i
cmpb $0, 56(%r15)
je .LBB4_5
# %bb.4:
movzbl 67(%r15), %ecx
jmp .LBB4_6
.LBB4_5:
movq %r15, %rdi
movq %rbp, 32(%rsp) # 8-byte Spill
movq %rax, %rbp
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %rbp, %rax
movq 32(%rsp), %rbp # 8-byte Reload
.LBB4_6: # %_Z12printResultsy.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
subq 40(%rsp), %r13 # 8-byte Folded Reload
imulq $1000000, %r13, %rax # imm = 0xF4240
addq 48(%rsp), %r12 # 8-byte Folded Reload
subq %r12, %rbx
addq %rbp, %rbx
addq %rax, %rbx
addq %r14, %rbx
movl $_ZSt4cout, %edi
movq %rbx, %rsi
callq _ZNSo9_M_insertIyEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB4_11
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i.i9
cmpb $0, 56(%rbx)
je .LBB4_9
# %bb.8:
movzbl 67(%rbx), %ecx
jmp .LBB4_10
.LBB4_9:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB4_10: # %_Z12printResultsy.exit12
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_11:
.cfi_def_cfa_offset 208
callq _ZSt16__throw_bad_castv
.Lfunc_end4:
.size _Z13gpuMatrixMultPfS_S_, .Lfunc_end4-_Z13gpuMatrixMultPfS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r13
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r14
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r15
xorl %r12d, %r12d
xorl %edi, %edi
callq srand
movq %r13, (%rsp) # 8-byte Spill
movq %r15, %rbp
.p2align 4, 0x90
.LBB5_1: # %.preheader25
# =>This Loop Header: Depth=1
# Child Loop BB5_2 Depth 2
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB5_2: # Parent Loop BB5_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r13,%rbx,4)
movl $0, (%rbp,%rbx,4)
incq %rbx
cmpq $32, %rbx
jne .LBB5_2
# %bb.3: # in Loop: Header=BB5_1 Depth=1
incq %r12
subq $-128, %rbp
subq $-128, %r13
cmpq $32, %r12
jne .LBB5_1
# %bb.4: # %.preheader.preheader
xorl %eax, %eax
movq %r14, %rcx
.p2align 4, 0x90
.LBB5_5: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB5_6 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB5_6: # Parent Loop BB5_5 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%rcx,%rdx,4) # imm = 0x3F800000
incq %rdx
cmpq $32, %rdx
jne .LBB5_6
# %bb.7: # in Loop: Header=BB5_5 Depth=1
incq %rax
subq $-128, %rcx
cmpq $32, %rax
jne .LBB5_5
# %bb.8:
movq (%rsp), %rdi # 8-byte Reload
movq %r14, %rsi
movq %r15, %rdx
callq _Z13gpuMatrixMultPfS_S_
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12matrixKernelPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type initial_time,@object # @initial_time
.bss
.globl initial_time
.p2align 3, 0x0
initial_time:
.quad 0 # 0x0
.size initial_time, 8
.type t,@object # @t
.globl t
.p2align 3, 0x0
t:
.zero 16
.size t, 16
.type _Z12matrixKernelPfS_S_,@object # @_Z12matrixKernelPfS_S_
.section .rodata,"a",@progbits
.globl _Z12matrixKernelPfS_S_
.p2align 3, 0x0
_Z12matrixKernelPfS_S_:
.quad _Z27__device_stub__matrixKernelPfS_S_
.size _Z12matrixKernelPfS_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12matrixKernelPfS_S_"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__matrixKernelPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym t
.addrsig_sym _ZSt4cout
.addrsig_sym _Z12matrixKernelPfS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12matrixKernelPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e620000002100 */
/*0050*/ SHF.L.U32 R6, R6, 0x5, RZ ; /* 0x0000000506067819 */
/* 0x001fc800000006ff */
/*0060*/ IADD3 R0, P0, R6.reuse, R5, RZ ; /* 0x0000000506007210 */
/* 0x042fe40007f1e0ff */
/*0070*/ IMAD.WIDE.U32 R6, R6, R4.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x080fe400078e0004 */
/*0080*/ IADD3.X R3, RZ, RZ, RZ, P0, !PT ; /* 0x000000ffff037210 */
/* 0x000fe400007fe4ff */
/*0090*/ IMAD.WIDE.U32 R4, R5, R4, c[0x0][0x168] ; /* 0x00005a0005047625 */
/* 0x000fe200078e0004 */
/*00a0*/ LEA R2, P0, R0, c[0x0][0x170], 0x2 ; /* 0x00005c0000027a11 */
/* 0x000fc800078010ff */
/*00b0*/ LEA.HI.X R3, R0, c[0x0][0x174], R3, 0x2, P0 ; /* 0x00005d0000037a11 */
/* 0x000fca00000f1403 */
/*00c0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x000fe8000c101904 */
/*00d0*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */
/* 0x000ea8000c1e1900 */
/*00e0*/ LDG.E R9, [R4.64] ; /* 0x0000000404097981 */
/* 0x000ea4000c1e1900 */
/*00f0*/ FFMA R9, R0, R9, RZ ; /* 0x0000000900097223 */
/* 0x004fca00000000ff */
/*0100*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0110*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R8, [R4.64+0x80] ; /* 0x0000800404087981 */
/* 0x000ea4000c1e1900 */
/*0130*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x004fca0000000009 */
/*0140*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0150*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */
/* 0x000ea8000c1e1900 */
/*0160*/ LDG.E R8, [R4.64+0x100] ; /* 0x0001000404087981 */
/* 0x000ea4000c1e1900 */
/*0170*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0180*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0190*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */
/* 0x000e28000c1e1900 */
/*01a0*/ LDG.E R8, [R4.64+0x180] ; /* 0x0001800404087981 */
/* 0x000e24000c1e1900 */
/*01b0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*01c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*01d0*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */
/* 0x000e68000c1e1900 */
/*01e0*/ LDG.E R8, [R4.64+0x200] ; /* 0x0002000404087981 */
/* 0x000e64000c1e1900 */
/*01f0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0200*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0210*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */
/* 0x000ea8000c1e1900 */
/*0220*/ LDG.E R8, [R4.64+0x280] ; /* 0x0002800404087981 */
/* 0x000ea4000c1e1900 */
/*0230*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0240*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0250*/ LDG.E R0, [R6.64+0x18] ; /* 0x0000180406007981 */
/* 0x000e28000c1e1900 */
/*0260*/ LDG.E R8, [R4.64+0x300] ; /* 0x0003000404087981 */
/* 0x000e24000c1e1900 */
/*0270*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0280*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0290*/ LDG.E R0, [R6.64+0x1c] ; /* 0x00001c0406007981 */
/* 0x000e68000c1e1900 */
/*02a0*/ LDG.E R8, [R4.64+0x380] ; /* 0x0003800404087981 */
/* 0x000e64000c1e1900 */
/*02b0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*02c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*02d0*/ LDG.E R0, [R6.64+0x20] ; /* 0x0000200406007981 */
/* 0x000ea8000c1e1900 */
/*02e0*/ LDG.E R8, [R4.64+0x400] ; /* 0x0004000404087981 */
/* 0x000ea4000c1e1900 */
/*02f0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0300*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0310*/ LDG.E R0, [R6.64+0x24] ; /* 0x0000240406007981 */
/* 0x000e28000c1e1900 */
/*0320*/ LDG.E R8, [R4.64+0x480] ; /* 0x0004800404087981 */
/* 0x000e24000c1e1900 */
/*0330*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0340*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0350*/ LDG.E R0, [R6.64+0x28] ; /* 0x0000280406007981 */
/* 0x000e68000c1e1900 */
/*0360*/ LDG.E R8, [R4.64+0x500] ; /* 0x0005000404087981 */
/* 0x000e64000c1e1900 */
/*0370*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0380*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0390*/ LDG.E R0, [R6.64+0x2c] ; /* 0x00002c0406007981 */
/* 0x000ea8000c1e1900 */
/*03a0*/ LDG.E R8, [R4.64+0x580] ; /* 0x0005800404087981 */
/* 0x000ea4000c1e1900 */
/*03b0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*03c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*03d0*/ LDG.E R0, [R6.64+0x30] ; /* 0x0000300406007981 */
/* 0x000e28000c1e1900 */
/*03e0*/ LDG.E R8, [R4.64+0x600] ; /* 0x0006000404087981 */
/* 0x000e24000c1e1900 */
/*03f0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0400*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0410*/ LDG.E R0, [R6.64+0x34] ; /* 0x0000340406007981 */
/* 0x000e68000c1e1900 */
/*0420*/ LDG.E R8, [R4.64+0x680] ; /* 0x0006800404087981 */
/* 0x000e64000c1e1900 */
/*0430*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0440*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0450*/ LDG.E R0, [R6.64+0x38] ; /* 0x0000380406007981 */
/* 0x000ea8000c1e1900 */
/*0460*/ LDG.E R8, [R4.64+0x700] ; /* 0x0007000404087981 */
/* 0x000ea4000c1e1900 */
/*0470*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0480*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0490*/ LDG.E R0, [R6.64+0x3c] ; /* 0x00003c0406007981 */
/* 0x000e28000c1e1900 */
/*04a0*/ LDG.E R8, [R4.64+0x780] ; /* 0x0007800404087981 */
/* 0x000e24000c1e1900 */
/*04b0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*04c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*04d0*/ LDG.E R0, [R6.64+0x40] ; /* 0x0000400406007981 */
/* 0x000e68000c1e1900 */
/*04e0*/ LDG.E R8, [R4.64+0x800] ; /* 0x0008000404087981 */
/* 0x000e64000c1e1900 */
/*04f0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0500*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0510*/ LDG.E R0, [R6.64+0x44] ; /* 0x0000440406007981 */
/* 0x000ea8000c1e1900 */
/*0520*/ LDG.E R8, [R4.64+0x880] ; /* 0x0008800404087981 */
/* 0x000ea4000c1e1900 */
/*0530*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0540*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0550*/ LDG.E R0, [R6.64+0x48] ; /* 0x0000480406007981 */
/* 0x000e28000c1e1900 */
/*0560*/ LDG.E R8, [R4.64+0x900] ; /* 0x0009000404087981 */
/* 0x000e24000c1e1900 */
/*0570*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0580*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0590*/ LDG.E R0, [R6.64+0x4c] ; /* 0x00004c0406007981 */
/* 0x000e68000c1e1900 */
/*05a0*/ LDG.E R8, [R4.64+0x980] ; /* 0x0009800404087981 */
/* 0x000e64000c1e1900 */
/*05b0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*05c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*05d0*/ LDG.E R0, [R6.64+0x50] ; /* 0x0000500406007981 */
/* 0x000ea8000c1e1900 */
/*05e0*/ LDG.E R8, [R4.64+0xa00] ; /* 0x000a000404087981 */
/* 0x000ea4000c1e1900 */
/*05f0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0600*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0610*/ LDG.E R0, [R6.64+0x54] ; /* 0x0000540406007981 */
/* 0x000e28000c1e1900 */
/*0620*/ LDG.E R8, [R4.64+0xa80] ; /* 0x000a800404087981 */
/* 0x000e24000c1e1900 */
/*0630*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0640*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0650*/ LDG.E R0, [R6.64+0x58] ; /* 0x0000580406007981 */
/* 0x000e68000c1e1900 */
/*0660*/ LDG.E R8, [R4.64+0xb00] ; /* 0x000b000404087981 */
/* 0x000e64000c1e1900 */
/*0670*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0680*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0690*/ LDG.E R0, [R6.64+0x5c] ; /* 0x00005c0406007981 */
/* 0x000ea8000c1e1900 */
/*06a0*/ LDG.E R8, [R4.64+0xb80] ; /* 0x000b800404087981 */
/* 0x000ea4000c1e1900 */
/*06b0*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*06c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*06d0*/ LDG.E R0, [R6.64+0x60] ; /* 0x0000600406007981 */
/* 0x000e28000c1e1900 */
/*06e0*/ LDG.E R8, [R4.64+0xc00] ; /* 0x000c000404087981 */
/* 0x000e24000c1e1900 */
/*06f0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0700*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*0710*/ LDG.E R0, [R6.64+0x64] ; /* 0x0000640406007981 */
/* 0x000e68000c1e1900 */
/*0720*/ LDG.E R8, [R4.64+0xc80] ; /* 0x000c800404087981 */
/* 0x000e64000c1e1900 */
/*0730*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0740*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0750*/ LDG.E R0, [R6.64+0x68] ; /* 0x0000680406007981 */
/* 0x000ea8000c1e1900 */
/*0760*/ LDG.E R8, [R4.64+0xd00] ; /* 0x000d000404087981 */
/* 0x000ea4000c1e1900 */
/*0770*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0780*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e8000c101904 */
/*0790*/ LDG.E R0, [R6.64+0x6c] ; /* 0x00006c0406007981 */
/* 0x000e28000c1e1900 */
/*07a0*/ LDG.E R8, [R4.64+0xd80] ; /* 0x000d800404087981 */
/* 0x000e24000c1e1900 */
/*07b0*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*07c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x0001e8000c101904 */
/*07d0*/ LDG.E R0, [R6.64+0x70] ; /* 0x0000700406007981 */
/* 0x000e68000c1e1900 */
/*07e0*/ LDG.E R8, [R4.64+0xe00] ; /* 0x000e000404087981 */
/* 0x000e64000c1e1900 */
/*07f0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*0800*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0003e8000c101904 */
/*0810*/ LDG.E R0, [R6.64+0x74] ; /* 0x0000740406007981 */
/* 0x000ea8000c1e1900 */
/*0820*/ LDG.E R8, [R4.64+0xe80] ; /* 0x000e800404087981 */
/* 0x000ea4000c1e1900 */
/*0830*/ FFMA R13, R0, R8, R11 ; /* 0x00000008000d7223 */
/* 0x004fca000000000b */
/*0840*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x000fe8000c101904 */
/*0850*/ LDG.E R0, [R6.64+0x78] ; /* 0x0000780406007981 */
/* 0x000e28000c1e1900 */
/*0860*/ LDG.E R8, [R4.64+0xf00] ; /* 0x000f000404087981 */
/* 0x000e24000c1e1900 */
/*0870*/ FFMA R9, R0, R8, R13 ; /* 0x0000000800097223 */
/* 0x001fca000000000d */
/*0880*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe8000c101904 */
/*0890*/ LDG.E R0, [R6.64+0x7c] ; /* 0x00007c0406007981 */
/* 0x000e68000c1e1900 */
/*08a0*/ LDG.E R8, [R4.64+0xf80] ; /* 0x000f800404087981 */
/* 0x000e64000c1e1900 */
/*08b0*/ FFMA R11, R0, R8, R9 ; /* 0x00000008000b7223 */
/* 0x002fca0000000009 */
/*08c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x000fe2000c101904 */
/*08d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*08e0*/ BRA 0x8e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0900*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0910*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0920*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0930*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0940*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0950*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0960*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0970*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12matrixKernelPfS_S_
.globl _Z12matrixKernelPfS_S_
.p2align 8
.type _Z12matrixKernelPfS_S_,@function
_Z12matrixKernelPfS_S_:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v6, 2, v0
s_mov_b32 s7, 0
s_lshl_b32 s6, s15, 5
v_mov_b32_e32 v4, 0
s_lshl_b64 s[6:7], s[6:7], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s6
v_add_co_u32 v0, s2, s2, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, null, s3, 0, s2
s_addc_u32 s5, s5, s7
v_add_co_u32 v2, s2, s4, v6
v_add_co_ci_u32_e64 v3, null, s5, 0, s2
s_add_u32 s2, s0, s6
s_addc_u32 s3, s1, s7
s_mov_b64 s[0:1], 0
global_store_b32 v6, v4, s[4:5]
.p2align 6
.LBB0_1:
s_add_u32 s4, s2, s0
s_addc_u32 s5, s3, s1
global_load_b32 v6, v[0:1], off
global_load_b32 v7, v4, s[4:5]
v_add_co_u32 v0, vcc_lo, v0, 0x80
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_cmpk_eq_i32 s0, 0x80
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v7, v6
global_store_b32 v[2:3], v5, off
s_cbranch_scc0 .LBB0_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12matrixKernelPfS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 24
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12matrixKernelPfS_S_, .Lfunc_end0-_Z12matrixKernelPfS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 24
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12matrixKernelPfS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12matrixKernelPfS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013b8ff_00000000-6_dot_product_1.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3676:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z12printResultsy
.type _Z12printResultsy, @function
_Z12printResultsy:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo9_M_insertIyEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L8
cmpb $0, 56(%rbp)
je .L5
movzbl 67(%rbp), %esi
.L6:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call _ZSt16__throw_bad_castv@PLT
.L5:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L6
.cfi_endproc
.LFE3669:
.size _Z12printResultsy, .-_Z12printResultsy
.globl _Z5startv
.type _Z5startv, @function
_Z5startv:
.LFB3670:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl $0, %esi
leaq t(%rip), %rdi
call gettimeofday@PLT
imulq $1000000, t(%rip), %rax
addq 8+t(%rip), %rax
movq %rax, initial_time(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3670:
.size _Z5startv, .-_Z5startv
.globl _Z4stopv
.type _Z4stopv, @function
_Z4stopv:
.LFB3671:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl $0, %esi
leaq t(%rip), %rdi
call gettimeofday@PLT
imulq $1000000, t(%rip), %rax
addq 8+t(%rip), %rax
subq initial_time(%rip), %rax
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3671:
.size _Z4stopv, .-_Z4stopv
.globl _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
.type _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_, @function
_Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_:
.LFB3698:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L17
.L13:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12matrixKernelPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L13
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3698:
.size _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_, .-_Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
.globl _Z12matrixKernelPfS_S_
.type _Z12matrixKernelPfS_S_, @function
_Z12matrixKernelPfS_S_:
.LFB3699:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3699:
.size _Z12matrixKernelPfS_S_, .-_Z12matrixKernelPfS_S_
.globl _Z13gpuMatrixMultPfS_S_
.type _Z13gpuMatrixMultPfS_S_, @function
_Z13gpuMatrixMultPfS_S_:
.LFB3672:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $64, %rsp
.cfi_def_cfa_offset 96
movq %rdi, %r12
movq %rsi, %rbx
movq %rdx, %rbp
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 16(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
call _Z5startv
movl $1, %ecx
movl $4096, %edx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4096, %edx
movq %rbx, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
call _Z4stopv
movq %rax, %rbx
movl $32, 44(%rsp)
movl $1, 48(%rsp)
movl $32, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L25
.L22:
call _Z4stopv
movq %rax, %r12
movl $2, %ecx
movl $4096, %edx
movq 24(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
call _Z4stopv
movq %rax, %rbp
movq %rax, %rdi
call _Z12printResultsy
leaq (%rbx,%rbp), %rdi
subq %r12, %rdi
call _Z12printResultsy
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z36__device_stub__Z12matrixKernelPfS_S_PfS_S_
jmp .L22
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3672:
.size _Z13gpuMatrixMultPfS_S_, .-_Z13gpuMatrixMultPfS_S_
.globl main
.type main, @function
main:
.LFB3673:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movl $4096, %edi
call malloc@PLT
movq %rax, %r14
movl $4096, %edi
call malloc@PLT
movq %rax, %r15
movl $4096, %edi
call malloc@PLT
movq %rax, %r12
movq %rax, 8(%rsp)
movl $0, %edi
call srand@PLT
movq %r14, %rbp
leaq 4096(%r14), %r13
.L28:
movl $0, %ebx
.L29:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp,%rbx)
movl $0x00000000, (%r12,%rbx)
addq $4, %rbx
cmpq $128, %rbx
jne .L29
subq $-128, %rbp
subq $-128, %r12
cmpq %r13, %rbp
jne .L28
leaq 128(%r15), %rdx
leaq 4224(%r15), %rcx
movss .LC1(%rip), %xmm0
.L30:
leaq -128(%rdx), %rax
.L31:
movss %xmm0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L31
subq $-128, %rdx
cmpq %rcx, %rdx
jne .L30
movq 8(%rsp), %rdx
movq %r15, %rsi
movq %r14, %rdi
call _Z13gpuMatrixMultPfS_S_
movl $0, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3673:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "_Z12matrixKernelPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3701:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z12matrixKernelPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3701:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl t
.bss
.align 16
.type t, @object
.size t, 16
t:
.zero 16
.globl initial_time
.align 8
.type initial_time, @object
.size initial_time, 8
initial_time:
.zero 8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1065353216
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "dot_product_1.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z12printResultsy # -- Begin function _Z12printResultsy
.p2align 4, 0x90
.type _Z12printResultsy,@function
_Z12printResultsy: # @_Z12printResultsy
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq %rdi, %rsi
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIyEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB0_5
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB0_3
# %bb.2:
movzbl 67(%rbx), %ecx
jmp .LBB0_4
.LBB0_3:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB0_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
jmp _ZNSo5flushEv # TAILCALL
.LBB0_5:
.cfi_def_cfa_offset 32
callq _ZSt16__throw_bad_castv
.Lfunc_end0:
.size _Z12printResultsy, .Lfunc_end0-_Z12printResultsy
.cfi_endproc
# -- End function
.globl _Z5startv # -- Begin function _Z5startv
.p2align 4, 0x90
.type _Z5startv,@function
_Z5startv: # @_Z5startv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %rax # imm = 0xF4240
addq t+8(%rip), %rax
movq %rax, initial_time(%rip)
popq %rax
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z5startv, .Lfunc_end1-_Z5startv
.cfi_endproc
# -- End function
.globl _Z4stopv # -- Begin function _Z4stopv
.p2align 4, 0x90
.type _Z4stopv,@function
_Z4stopv: # @_Z4stopv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %rax # imm = 0xF4240
addq t+8(%rip), %rax
subq initial_time(%rip), %rax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z4stopv, .Lfunc_end2-_Z4stopv
.cfi_endproc
# -- End function
.globl _Z27__device_stub__matrixKernelPfS_S_ # -- Begin function _Z27__device_stub__matrixKernelPfS_S_
.p2align 4, 0x90
.type _Z27__device_stub__matrixKernelPfS_S_,@function
_Z27__device_stub__matrixKernelPfS_S_: # @_Z27__device_stub__matrixKernelPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12matrixKernelPfS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end3:
.size _Z27__device_stub__matrixKernelPfS_S_, .Lfunc_end3-_Z27__device_stub__matrixKernelPfS_S_
.cfi_endproc
# -- End function
.globl _Z13gpuMatrixMultPfS_S_ # -- Begin function _Z13gpuMatrixMultPfS_S_
.p2align 4, 0x90
.type _Z13gpuMatrixMultPfS_S_,@function
_Z13gpuMatrixMultPfS_S_: # @_Z13gpuMatrixMultPfS_S_
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
leaq 24(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 16(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 8(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %rax # imm = 0xF4240
addq t+8(%rip), %rax
movq %rax, initial_time(%rip)
movq 24(%rsp), %rdi
movl $4096, %edx # imm = 0x1000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
movl $4096, %edx # imm = 0x1000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
movq t(%rip), %r13
movq t+8(%rip), %rbx
movq initial_time(%rip), %r12
movabsq $4294967328, %rdi # imm = 0x100000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_2
# %bb.1:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z12matrixKernelPfS_S_, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_2:
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
movq t(%rip), %rax
movq %rax, 40(%rsp) # 8-byte Spill
movq t+8(%rip), %rax
movq %rax, 48(%rsp) # 8-byte Spill
movq initial_time(%rip), %rbp
movq 8(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movl $t, %edi
xorl %esi, %esi
callq gettimeofday
imulq $1000000, t(%rip), %r14 # imm = 0xF4240
addq t+8(%rip), %r14
subq initial_time(%rip), %r14
movl $_ZSt4cout, %edi
movq %r14, %rsi
callq _ZNSo9_M_insertIyEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB4_11
# %bb.3: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i.i
cmpb $0, 56(%r15)
je .LBB4_5
# %bb.4:
movzbl 67(%r15), %ecx
jmp .LBB4_6
.LBB4_5:
movq %r15, %rdi
movq %rbp, 32(%rsp) # 8-byte Spill
movq %rax, %rbp
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %rbp, %rax
movq 32(%rsp), %rbp # 8-byte Reload
.LBB4_6: # %_Z12printResultsy.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
subq 40(%rsp), %r13 # 8-byte Folded Reload
imulq $1000000, %r13, %rax # imm = 0xF4240
addq 48(%rsp), %r12 # 8-byte Folded Reload
subq %r12, %rbx
addq %rbp, %rbx
addq %rax, %rbx
addq %r14, %rbx
movl $_ZSt4cout, %edi
movq %rbx, %rsi
callq _ZNSo9_M_insertIyEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB4_11
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i.i9
cmpb $0, 56(%rbx)
je .LBB4_9
# %bb.8:
movzbl 67(%rbx), %ecx
jmp .LBB4_10
.LBB4_9:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB4_10: # %_Z12printResultsy.exit12
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq 24(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_11:
.cfi_def_cfa_offset 208
callq _ZSt16__throw_bad_castv
.Lfunc_end4:
.size _Z13gpuMatrixMultPfS_S_, .Lfunc_end4-_Z13gpuMatrixMultPfS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r13
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r14
movl $4096, %edi # imm = 0x1000
callq malloc
movq %rax, %r15
xorl %r12d, %r12d
xorl %edi, %edi
callq srand
movq %r13, (%rsp) # 8-byte Spill
movq %r15, %rbp
.p2align 4, 0x90
.LBB5_1: # %.preheader25
# =>This Loop Header: Depth=1
# Child Loop BB5_2 Depth 2
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB5_2: # Parent Loop BB5_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r13,%rbx,4)
movl $0, (%rbp,%rbx,4)
incq %rbx
cmpq $32, %rbx
jne .LBB5_2
# %bb.3: # in Loop: Header=BB5_1 Depth=1
incq %r12
subq $-128, %rbp
subq $-128, %r13
cmpq $32, %r12
jne .LBB5_1
# %bb.4: # %.preheader.preheader
xorl %eax, %eax
movq %r14, %rcx
.p2align 4, 0x90
.LBB5_5: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB5_6 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB5_6: # Parent Loop BB5_5 Depth=1
# => This Inner Loop Header: Depth=2
movl $1065353216, (%rcx,%rdx,4) # imm = 0x3F800000
incq %rdx
cmpq $32, %rdx
jne .LBB5_6
# %bb.7: # in Loop: Header=BB5_5 Depth=1
incq %rax
subq $-128, %rcx
cmpq $32, %rax
jne .LBB5_5
# %bb.8:
movq (%rsp), %rdi # 8-byte Reload
movq %r14, %rsi
movq %r15, %rdx
callq _Z13gpuMatrixMultPfS_S_
xorl %eax, %eax
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12matrixKernelPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type initial_time,@object # @initial_time
.bss
.globl initial_time
.p2align 3, 0x0
initial_time:
.quad 0 # 0x0
.size initial_time, 8
.type t,@object # @t
.globl t
.p2align 3, 0x0
t:
.zero 16
.size t, 16
.type _Z12matrixKernelPfS_S_,@object # @_Z12matrixKernelPfS_S_
.section .rodata,"a",@progbits
.globl _Z12matrixKernelPfS_S_
.p2align 3, 0x0
_Z12matrixKernelPfS_S_:
.quad _Z27__device_stub__matrixKernelPfS_S_
.size _Z12matrixKernelPfS_S_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12matrixKernelPfS_S_"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__matrixKernelPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym t
.addrsig_sym _ZSt4cout
.addrsig_sym _Z12matrixKernelPfS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void WriteClockValues( unsigned int *completionTimes, unsigned int *threadIDs )
{
size_t globalBlock = blockIdx.x+blockDim.x*(blockIdx.y+blockDim.y*blockIdx.z);
size_t globalThread = threadIdx.x+blockDim.x*(threadIdx.y+blockDim.y*threadIdx.z);
size_t totalBlockSize = blockDim.x*blockDim.y*blockDim.z;
size_t globalIndex = globalBlock*totalBlockSize + globalThread;
completionTimes[globalIndex] = clock();
threadIDs[globalIndex] = threadIdx.y<<4|threadIdx.x;
} | code for sm_80
Function : _Z16WriteClockValuesPjS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.Y ; /* 0x00000000000479c3 */
/* 0x000e220000002600 */
/*0020*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e620000002200 */
/*0030*/ MOV R0, c[0x0][0x0] ; /* 0x0000000000007a02 */
/* 0x000fe20000000f00 */
/*0040*/ ULDC.64 UR8, c[0x0][0x0] ; /* 0x0000000000087ab9 */
/* 0x000fe20000000a00 */
/*0050*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */
/* 0x000fe200078e00ff */
/*0060*/ S2R R2, SR_TID.Z ; /* 0x0000000000027919 */
/* 0x000e640000002300 */
/*0070*/ IMAD R0, R0, c[0x0][0x4], RZ ; /* 0x0000010000007a24 */
/* 0x000fe200078e02ff */
/*0080*/ S2UR UR6, SR_CTAID.Z ; /* 0x00000000000679c3 */
/* 0x000e220000002700 */
/*0090*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000ea40000002100 */
/*00a0*/ IMAD R5, R0, c[0x0][0x8], RZ ; /* 0x0000020000057a24 */
/* 0x000fca00078e02ff */
/*00b0*/ S2UR UR5, SR_CTAID.X ; /* 0x00000000000579c3 */
/* 0x000ee20000002500 */
/*00c0*/ IMAD R2, R2, c[0x0][0x4], R7 ; /* 0x0000010002027a24 */
/* 0x002fe200078e0207 */
/*00d0*/ UIMAD UR4, UR6, UR9, UR4 ; /* 0x00000009060472a4 */
/* 0x001fc6000f8e0204 */
/*00e0*/ IMAD R2, R2, c[0x0][0x0], R9 ; /* 0x0000000002027a24 */
/* 0x004fe200078e0209 */
/*00f0*/ UIMAD UR4, UR4, UR8, UR5 ; /* 0x00000008040472a4 */
/* 0x008fcc000f8e0205 */
/*0100*/ IMAD.WIDE.U32 R2, R5, UR4, R2 ; /* 0x0000000405027c25 */
/* 0x000fe2000f8e0002 */
/*0110*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0120*/ CS2R R4, SR_CLOCKLO ; /* 0x0000000000047805 */
/* 0x000fc60000015000 */
/*0130*/ SHF.L.U32 R6, R2.reuse, 0x2, RZ ; /* 0x0000000202067819 */
/* 0x040fe200000006ff */
/*0140*/ IMAD.SHL.U32 R0, R7, 0x10, RZ ; /* 0x0000001007007824 */
/* 0x000fe200078e00ff */
/*0150*/ SHF.L.U64.HI R5, R2, 0x2, R3 ; /* 0x0000000202057819 */
/* 0x000fe40000010203 */
/*0160*/ IADD3 R2, P0, R6.reuse, c[0x0][0x160], RZ ; /* 0x0000580006027a10 */
/* 0x040fe40007f1e0ff */
/*0170*/ IADD3 R6, P1, R6, c[0x0][0x168], RZ ; /* 0x00005a0006067a10 */
/* 0x000fe40007f3e0ff */
/*0180*/ IADD3.X R3, R5.reuse, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590005037a10 */
/* 0x040fe400007fe4ff */
/*0190*/ IADD3.X R7, R5, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0005077a10 */
/* 0x000fc40000ffe4ff */
/*01a0*/ LOP3.LUT R5, R0, R9, RZ, 0xfc, !PT ; /* 0x0000000900057212 */
/* 0x000fe200078efcff */
/*01b0*/ STG.E [R2.64], R4 ; /* 0x0000000402007986 */
/* 0x000fe8000c101904 */
/*01c0*/ STG.E [R6.64], R5 ; /* 0x0000000506007986 */
/* 0x000fe2000c101904 */
/*01d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void WriteClockValues( unsigned int *completionTimes, unsigned int *threadIDs )
{
size_t globalBlock = blockIdx.x+blockDim.x*(blockIdx.y+blockDim.y*blockIdx.z);
size_t globalThread = threadIdx.x+blockDim.x*(threadIdx.y+blockDim.y*threadIdx.z);
size_t totalBlockSize = blockDim.x*blockDim.y*blockDim.z;
size_t globalIndex = globalBlock*totalBlockSize + globalThread;
completionTimes[globalIndex] = clock();
threadIDs[globalIndex] = threadIdx.y<<4|threadIdx.x;
} | .file "tmpxft_00018da7_00000000-6_WriteClockValues.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z38__device_stub__Z16WriteClockValuesPjS_PjS_
.type _Z38__device_stub__Z16WriteClockValuesPjS_PjS_, @function
_Z38__device_stub__Z16WriteClockValuesPjS_PjS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16WriteClockValuesPjS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z38__device_stub__Z16WriteClockValuesPjS_PjS_, .-_Z38__device_stub__Z16WriteClockValuesPjS_PjS_
.globl _Z16WriteClockValuesPjS_
.type _Z16WriteClockValuesPjS_, @function
_Z16WriteClockValuesPjS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z16WriteClockValuesPjS_PjS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z16WriteClockValuesPjS_, .-_Z16WriteClockValuesPjS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z16WriteClockValuesPjS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z16WriteClockValuesPjS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void WriteClockValues( unsigned int *completionTimes, unsigned int *threadIDs )
{
size_t globalBlock = blockIdx.x+blockDim.x*(blockIdx.y+blockDim.y*blockIdx.z);
size_t globalThread = threadIdx.x+blockDim.x*(threadIdx.y+blockDim.y*threadIdx.z);
size_t totalBlockSize = blockDim.x*blockDim.y*blockDim.z;
size_t globalIndex = globalBlock*totalBlockSize + globalThread;
completionTimes[globalIndex] = clock();
threadIDs[globalIndex] = threadIdx.y<<4|threadIdx.x;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void WriteClockValues( unsigned int *completionTimes, unsigned int *threadIDs )
{
size_t globalBlock = blockIdx.x+blockDim.x*(blockIdx.y+blockDim.y*blockIdx.z);
size_t globalThread = threadIdx.x+blockDim.x*(threadIdx.y+blockDim.y*threadIdx.z);
size_t totalBlockSize = blockDim.x*blockDim.y*blockDim.z;
size_t globalIndex = globalBlock*totalBlockSize + globalThread;
completionTimes[globalIndex] = clock();
threadIDs[globalIndex] = threadIdx.y<<4|threadIdx.x;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void WriteClockValues( unsigned int *completionTimes, unsigned int *threadIDs )
{
size_t globalBlock = blockIdx.x+blockDim.x*(blockIdx.y+blockDim.y*blockIdx.z);
size_t globalThread = threadIdx.x+blockDim.x*(threadIdx.y+blockDim.y*threadIdx.z);
size_t totalBlockSize = blockDim.x*blockDim.y*blockDim.z;
size_t globalIndex = globalBlock*totalBlockSize + globalThread;
completionTimes[globalIndex] = clock();
threadIDs[globalIndex] = threadIdx.y<<4|threadIdx.x;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16WriteClockValuesPjS_
.globl _Z16WriteClockValuesPjS_
.p2align 8
.type _Z16WriteClockValuesPjS_,@function
_Z16WriteClockValuesPjS_:
s_load_b64 s[4:5], s[0:1], 0x1c
v_bfe_u32 v5, v0, 10, 10
v_bfe_u32 v1, v0, 20, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s4, 16
s_and_b32 s4, s4, 0xffff
v_mad_u32_u24 v3, v1, s6, v5
s_mul_i32 s7, s15, s6
s_and_b32 s5, s5, 0xffff
s_add_i32 s7, s7, s14
s_mul_i32 s6, s6, s4
v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
v_mov_b32_e32 v2, 0
s_mul_i32 s4, s7, s4
s_mul_i32 s6, s6, s5
s_add_i32 s4, s4, s13
v_lshl_or_b32 v5, v5, 4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s4, s6, v[1:2]
s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
v_mov_b32_e32 v6, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
global_store_b32 v[3:4], v6, off
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16WriteClockValuesPjS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 13
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 1
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 2
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16WriteClockValuesPjS_, .Lfunc_end0-_Z16WriteClockValuesPjS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16WriteClockValuesPjS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16WriteClockValuesPjS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void WriteClockValues( unsigned int *completionTimes, unsigned int *threadIDs )
{
size_t globalBlock = blockIdx.x+blockDim.x*(blockIdx.y+blockDim.y*blockIdx.z);
size_t globalThread = threadIdx.x+blockDim.x*(threadIdx.y+blockDim.y*threadIdx.z);
size_t totalBlockSize = blockDim.x*blockDim.y*blockDim.z;
size_t globalIndex = globalBlock*totalBlockSize + globalThread;
completionTimes[globalIndex] = clock();
threadIDs[globalIndex] = threadIdx.y<<4|threadIdx.x;
} | .text
.file "WriteClockValues.hip"
.globl _Z31__device_stub__WriteClockValuesPjS_ # -- Begin function _Z31__device_stub__WriteClockValuesPjS_
.p2align 4, 0x90
.type _Z31__device_stub__WriteClockValuesPjS_,@function
_Z31__device_stub__WriteClockValuesPjS_: # @_Z31__device_stub__WriteClockValuesPjS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z16WriteClockValuesPjS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z31__device_stub__WriteClockValuesPjS_, .Lfunc_end0-_Z31__device_stub__WriteClockValuesPjS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16WriteClockValuesPjS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16WriteClockValuesPjS_,@object # @_Z16WriteClockValuesPjS_
.section .rodata,"a",@progbits
.globl _Z16WriteClockValuesPjS_
.p2align 3, 0x0
_Z16WriteClockValuesPjS_:
.quad _Z31__device_stub__WriteClockValuesPjS_
.size _Z16WriteClockValuesPjS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16WriteClockValuesPjS_"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__WriteClockValuesPjS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16WriteClockValuesPjS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16WriteClockValuesPjS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.Y ; /* 0x00000000000479c3 */
/* 0x000e220000002600 */
/*0020*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e620000002200 */
/*0030*/ MOV R0, c[0x0][0x0] ; /* 0x0000000000007a02 */
/* 0x000fe20000000f00 */
/*0040*/ ULDC.64 UR8, c[0x0][0x0] ; /* 0x0000000000087ab9 */
/* 0x000fe20000000a00 */
/*0050*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */
/* 0x000fe200078e00ff */
/*0060*/ S2R R2, SR_TID.Z ; /* 0x0000000000027919 */
/* 0x000e640000002300 */
/*0070*/ IMAD R0, R0, c[0x0][0x4], RZ ; /* 0x0000010000007a24 */
/* 0x000fe200078e02ff */
/*0080*/ S2UR UR6, SR_CTAID.Z ; /* 0x00000000000679c3 */
/* 0x000e220000002700 */
/*0090*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000ea40000002100 */
/*00a0*/ IMAD R5, R0, c[0x0][0x8], RZ ; /* 0x0000020000057a24 */
/* 0x000fca00078e02ff */
/*00b0*/ S2UR UR5, SR_CTAID.X ; /* 0x00000000000579c3 */
/* 0x000ee20000002500 */
/*00c0*/ IMAD R2, R2, c[0x0][0x4], R7 ; /* 0x0000010002027a24 */
/* 0x002fe200078e0207 */
/*00d0*/ UIMAD UR4, UR6, UR9, UR4 ; /* 0x00000009060472a4 */
/* 0x001fc6000f8e0204 */
/*00e0*/ IMAD R2, R2, c[0x0][0x0], R9 ; /* 0x0000000002027a24 */
/* 0x004fe200078e0209 */
/*00f0*/ UIMAD UR4, UR4, UR8, UR5 ; /* 0x00000008040472a4 */
/* 0x008fcc000f8e0205 */
/*0100*/ IMAD.WIDE.U32 R2, R5, UR4, R2 ; /* 0x0000000405027c25 */
/* 0x000fe2000f8e0002 */
/*0110*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0120*/ CS2R R4, SR_CLOCKLO ; /* 0x0000000000047805 */
/* 0x000fc60000015000 */
/*0130*/ SHF.L.U32 R6, R2.reuse, 0x2, RZ ; /* 0x0000000202067819 */
/* 0x040fe200000006ff */
/*0140*/ IMAD.SHL.U32 R0, R7, 0x10, RZ ; /* 0x0000001007007824 */
/* 0x000fe200078e00ff */
/*0150*/ SHF.L.U64.HI R5, R2, 0x2, R3 ; /* 0x0000000202057819 */
/* 0x000fe40000010203 */
/*0160*/ IADD3 R2, P0, R6.reuse, c[0x0][0x160], RZ ; /* 0x0000580006027a10 */
/* 0x040fe40007f1e0ff */
/*0170*/ IADD3 R6, P1, R6, c[0x0][0x168], RZ ; /* 0x00005a0006067a10 */
/* 0x000fe40007f3e0ff */
/*0180*/ IADD3.X R3, R5.reuse, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590005037a10 */
/* 0x040fe400007fe4ff */
/*0190*/ IADD3.X R7, R5, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0005077a10 */
/* 0x000fc40000ffe4ff */
/*01a0*/ LOP3.LUT R5, R0, R9, RZ, 0xfc, !PT ; /* 0x0000000900057212 */
/* 0x000fe200078efcff */
/*01b0*/ STG.E [R2.64], R4 ; /* 0x0000000402007986 */
/* 0x000fe8000c101904 */
/*01c0*/ STG.E [R6.64], R5 ; /* 0x0000000506007986 */
/* 0x000fe2000c101904 */
/*01d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16WriteClockValuesPjS_
.globl _Z16WriteClockValuesPjS_
.p2align 8
.type _Z16WriteClockValuesPjS_,@function
_Z16WriteClockValuesPjS_:
s_load_b64 s[4:5], s[0:1], 0x1c
v_bfe_u32 v5, v0, 10, 10
v_bfe_u32 v1, v0, 20, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s6, s4, 16
s_and_b32 s4, s4, 0xffff
v_mad_u32_u24 v3, v1, s6, v5
s_mul_i32 s7, s15, s6
s_and_b32 s5, s5, 0xffff
s_add_i32 s7, s7, s14
s_mul_i32 s6, s6, s4
v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
v_mov_b32_e32 v2, 0
s_mul_i32 s4, s7, s4
s_mul_i32 s6, s6, s5
s_add_i32 s4, s4, s13
v_lshl_or_b32 v5, v5, 4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s4, s6, v[1:2]
s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
v_mov_b32_e32 v6, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
global_store_b32 v[3:4], v6, off
global_store_b32 v[0:1], v5, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16WriteClockValuesPjS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 13
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 1
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 2
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16WriteClockValuesPjS_, .Lfunc_end0-_Z16WriteClockValuesPjS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16WriteClockValuesPjS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16WriteClockValuesPjS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00018da7_00000000-6_WriteClockValues.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z38__device_stub__Z16WriteClockValuesPjS_PjS_
.type _Z38__device_stub__Z16WriteClockValuesPjS_PjS_, @function
_Z38__device_stub__Z16WriteClockValuesPjS_PjS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16WriteClockValuesPjS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z38__device_stub__Z16WriteClockValuesPjS_PjS_, .-_Z38__device_stub__Z16WriteClockValuesPjS_PjS_
.globl _Z16WriteClockValuesPjS_
.type _Z16WriteClockValuesPjS_, @function
_Z16WriteClockValuesPjS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z16WriteClockValuesPjS_PjS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z16WriteClockValuesPjS_, .-_Z16WriteClockValuesPjS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z16WriteClockValuesPjS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z16WriteClockValuesPjS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "WriteClockValues.hip"
.globl _Z31__device_stub__WriteClockValuesPjS_ # -- Begin function _Z31__device_stub__WriteClockValuesPjS_
.p2align 4, 0x90
.type _Z31__device_stub__WriteClockValuesPjS_,@function
_Z31__device_stub__WriteClockValuesPjS_: # @_Z31__device_stub__WriteClockValuesPjS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z16WriteClockValuesPjS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z31__device_stub__WriteClockValuesPjS_, .Lfunc_end0-_Z31__device_stub__WriteClockValuesPjS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16WriteClockValuesPjS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16WriteClockValuesPjS_,@object # @_Z16WriteClockValuesPjS_
.section .rodata,"a",@progbits
.globl _Z16WriteClockValuesPjS_
.p2align 3, 0x0
_Z16WriteClockValuesPjS_:
.quad _Z31__device_stub__WriteClockValuesPjS_
.size _Z16WriteClockValuesPjS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16WriteClockValuesPjS_"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__WriteClockValuesPjS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16WriteClockValuesPjS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void FpropH(float* layer1, const float* synH, const int offset)
{
int i = blockDim.x*blockIdx.x + threadIdx.x; //256
int j = blockDim.y*blockIdx.y + threadIdx.y; //256
atomicAdd(&layer1[256*offset + j], layer1[256*(offset-1) + i] * synH[i*256 + j]);
//__syncthreads();
//if (i == 0)
// layerH[j] = layer1[j];
} | code for sm_80
Function : _Z6FpropHPfPKfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ MOV R8, c[0x0][0x170] ; /* 0x00005c0000087a02 */
/* 0x000fe20000000f00 */
/*0030*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0060*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002600 */
/*0070*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002200 */
/*0080*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc400078e0203 */
/*0090*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */
/* 0x002fc600078e0205 */
/*00a0*/ LEA R2, R8, R0, 0x8 ; /* 0x0000000008027211 */
/* 0x000fe400078e40ff */
/*00b0*/ LEA R6, R0, R3, 0x8 ; /* 0x0000000300067211 */
/* 0x000fe400078e40ff */
/*00c0*/ IADD3 R2, R2, -0x100, RZ ; /* 0xffffff0002027810 */
/* 0x000fc60007ffe0ff */
/*00d0*/ IMAD.WIDE R6, R6, R9, c[0x0][0x168] ; /* 0x00005a0006067625 */
/* 0x000fc800078e0209 */
/*00e0*/ IMAD.WIDE R4, R2, R9, c[0x0][0x160] ; /* 0x0000580002047625 */
/* 0x000fe400078e0209 */
/*00f0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0110*/ LEA R3, R8, R3, 0x8 ; /* 0x0000000308037211 */
/* 0x000fca00078e40ff */
/*0120*/ IMAD.WIDE R2, R3, R9, c[0x0][0x160] ; /* 0x0000580003027625 */
/* 0x000fc800078e0209 */
/*0130*/ FMUL R9, R4, R7 ; /* 0x0000000704097220 */
/* 0x004fca0000400000 */
/*0140*/ RED.E.ADD.F32.FTZ.RN.STRONG.GPU [R2.64], R9 ; /* 0x000000090200798e */
/* 0x000fe2000c10e784 */
/*0150*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0160*/ BRA 0x160; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void FpropH(float* layer1, const float* synH, const int offset)
{
int i = blockDim.x*blockIdx.x + threadIdx.x; //256
int j = blockDim.y*blockIdx.y + threadIdx.y; //256
atomicAdd(&layer1[256*offset + j], layer1[256*(offset-1) + i] * synH[i*256 + j]);
//__syncthreads();
//if (i == 0)
// layerH[j] = layer1[j];
} | .file "tmpxft_000acd6f_00000000-6_FpropH.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z29__device_stub__Z6FpropHPfPKfiPfPKfi
.type _Z29__device_stub__Z6FpropHPfPKfiPfPKfi, @function
_Z29__device_stub__Z6FpropHPfPKfiPfPKfi:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6FpropHPfPKfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z29__device_stub__Z6FpropHPfPKfiPfPKfi, .-_Z29__device_stub__Z6FpropHPfPKfiPfPKfi
.globl _Z6FpropHPfPKfi
.type _Z6FpropHPfPKfi, @function
_Z6FpropHPfPKfi:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z6FpropHPfPKfiPfPKfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z6FpropHPfPKfi, .-_Z6FpropHPfPKfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z6FpropHPfPKfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z6FpropHPfPKfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void FpropH(float* layer1, const float* synH, const int offset)
{
int i = blockDim.x*blockIdx.x + threadIdx.x; //256
int j = blockDim.y*blockIdx.y + threadIdx.y; //256
atomicAdd(&layer1[256*offset + j], layer1[256*(offset-1) + i] * synH[i*256 + j]);
//__syncthreads();
//if (i == 0)
// layerH[j] = layer1[j];
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void FpropH(float* layer1, const float* synH, const int offset)
{
int i = blockDim.x*blockIdx.x + threadIdx.x; //256
int j = blockDim.y*blockIdx.y + threadIdx.y; //256
atomicAdd(&layer1[256*offset + j], layer1[256*(offset-1) + i] * synH[i*256 + j]);
//__syncthreads();
//if (i == 0)
// layerH[j] = layer1[j];
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void FpropH(float* layer1, const float* synH, const int offset)
{
int i = blockDim.x*blockIdx.x + threadIdx.x; //256
int j = blockDim.y*blockIdx.y + threadIdx.y; //256
atomicAdd(&layer1[256*offset + j], layer1[256*(offset-1) + i] * synH[i*256 + j]);
//__syncthreads();
//if (i == 0)
// layerH[j] = layer1[j];
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6FpropHPfPKfi
.globl _Z6FpropHPfPKfi
.p2align 8
.type _Z6FpropHPfPKfi,@function
_Z6FpropHPfPKfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s4, s4, 8
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add3_u32 v0, s4, 0xffffff00, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshl_add_u32 v2, v2, 8, v3
v_add_nc_u32_e32 v4, s4, v3
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v5, vcc_lo
global_load_b32 v2, v[2:3], off
s_clause 0x1
global_load_b32 v4, v[6:7], off
global_load_b32 v3, v[0:1], off
s_mov_b32 s0, 0
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, v4, v2
.LBB0_1:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_1
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6FpropHPfPKfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6FpropHPfPKfi, .Lfunc_end0-_Z6FpropHPfPKfi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6FpropHPfPKfi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6FpropHPfPKfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void FpropH(float* layer1, const float* synH, const int offset)
{
int i = blockDim.x*blockIdx.x + threadIdx.x; //256
int j = blockDim.y*blockIdx.y + threadIdx.y; //256
atomicAdd(&layer1[256*offset + j], layer1[256*(offset-1) + i] * synH[i*256 + j]);
//__syncthreads();
//if (i == 0)
// layerH[j] = layer1[j];
} | .text
.file "FpropH.hip"
.globl _Z21__device_stub__FpropHPfPKfi # -- Begin function _Z21__device_stub__FpropHPfPKfi
.p2align 4, 0x90
.type _Z21__device_stub__FpropHPfPKfi,@function
_Z21__device_stub__FpropHPfPKfi: # @_Z21__device_stub__FpropHPfPKfi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6FpropHPfPKfi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z21__device_stub__FpropHPfPKfi, .Lfunc_end0-_Z21__device_stub__FpropHPfPKfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6FpropHPfPKfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6FpropHPfPKfi,@object # @_Z6FpropHPfPKfi
.section .rodata,"a",@progbits
.globl _Z6FpropHPfPKfi
.p2align 3, 0x0
_Z6FpropHPfPKfi:
.quad _Z21__device_stub__FpropHPfPKfi
.size _Z6FpropHPfPKfi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z6FpropHPfPKfi"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__FpropHPfPKfi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6FpropHPfPKfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6FpropHPfPKfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ MOV R8, c[0x0][0x170] ; /* 0x00005c0000087a02 */
/* 0x000fe20000000f00 */
/*0030*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0060*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002600 */
/*0070*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002200 */
/*0080*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc400078e0203 */
/*0090*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */
/* 0x002fc600078e0205 */
/*00a0*/ LEA R2, R8, R0, 0x8 ; /* 0x0000000008027211 */
/* 0x000fe400078e40ff */
/*00b0*/ LEA R6, R0, R3, 0x8 ; /* 0x0000000300067211 */
/* 0x000fe400078e40ff */
/*00c0*/ IADD3 R2, R2, -0x100, RZ ; /* 0xffffff0002027810 */
/* 0x000fc60007ffe0ff */
/*00d0*/ IMAD.WIDE R6, R6, R9, c[0x0][0x168] ; /* 0x00005a0006067625 */
/* 0x000fc800078e0209 */
/*00e0*/ IMAD.WIDE R4, R2, R9, c[0x0][0x160] ; /* 0x0000580002047625 */
/* 0x000fe400078e0209 */
/*00f0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0110*/ LEA R3, R8, R3, 0x8 ; /* 0x0000000308037211 */
/* 0x000fca00078e40ff */
/*0120*/ IMAD.WIDE R2, R3, R9, c[0x0][0x160] ; /* 0x0000580003027625 */
/* 0x000fc800078e0209 */
/*0130*/ FMUL R9, R4, R7 ; /* 0x0000000704097220 */
/* 0x004fca0000400000 */
/*0140*/ RED.E.ADD.F32.FTZ.RN.STRONG.GPU [R2.64], R9 ; /* 0x000000090200798e */
/* 0x000fe2000c10e784 */
/*0150*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0160*/ BRA 0x160; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6FpropHPfPKfi
.globl _Z6FpropHPfPKfi
.p2align 8
.type _Z6FpropHPfPKfi,@function
_Z6FpropHPfPKfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s4, s4, 8
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add3_u32 v0, s4, 0xffffff00, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshl_add_u32 v2, v2, 8, v3
v_add_nc_u32_e32 v4, s4, v3
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[4:5], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v5, vcc_lo
global_load_b32 v2, v[2:3], off
s_clause 0x1
global_load_b32 v4, v[6:7], off
global_load_b32 v3, v[0:1], off
s_mov_b32 s0, 0
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, v4, v2
.LBB0_1:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_1
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6FpropHPfPKfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6FpropHPfPKfi, .Lfunc_end0-_Z6FpropHPfPKfi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6FpropHPfPKfi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6FpropHPfPKfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000acd6f_00000000-6_FpropH.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z29__device_stub__Z6FpropHPfPKfiPfPKfi
.type _Z29__device_stub__Z6FpropHPfPKfiPfPKfi, @function
_Z29__device_stub__Z6FpropHPfPKfiPfPKfi:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6FpropHPfPKfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z29__device_stub__Z6FpropHPfPKfiPfPKfi, .-_Z29__device_stub__Z6FpropHPfPKfiPfPKfi
.globl _Z6FpropHPfPKfi
.type _Z6FpropHPfPKfi, @function
_Z6FpropHPfPKfi:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z6FpropHPfPKfiPfPKfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z6FpropHPfPKfi, .-_Z6FpropHPfPKfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z6FpropHPfPKfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z6FpropHPfPKfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "FpropH.hip"
.globl _Z21__device_stub__FpropHPfPKfi # -- Begin function _Z21__device_stub__FpropHPfPKfi
.p2align 4, 0x90
.type _Z21__device_stub__FpropHPfPKfi,@function
_Z21__device_stub__FpropHPfPKfi: # @_Z21__device_stub__FpropHPfPKfi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6FpropHPfPKfi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z21__device_stub__FpropHPfPKfi, .Lfunc_end0-_Z21__device_stub__FpropHPfPKfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6FpropHPfPKfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6FpropHPfPKfi,@object # @_Z6FpropHPfPKfi
.section .rodata,"a",@progbits
.globl _Z6FpropHPfPKfi
.p2align 3, 0x0
_Z6FpropHPfPKfi:
.quad _Z21__device_stub__FpropHPfPKfi
.size _Z6FpropHPfPKfi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z6FpropHPfPKfi"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__FpropHPfPKfi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6FpropHPfPKfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // #include <stdlib.h>
// #include <stdio.h>
// #include <math.h>
// #include <string.h>
//
// //#include "cuPrintf.cu"
// #include "K_Common.cuh"
// #include <cutil.h>
// #include "host_defines.h"
// #include "builtin_types.h"
//
// #include "SimDEM.cuh"
// #include "CudaUtils.cuh"
//
//
// // Grid textures and constants
// #ifdef USE_TEX
// texture<uint, 1, cudaReadModeElementType> neighbors_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_start_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_end_tex;
//
// // Fluid textures and constants
// texture<float_vec, 1, cudaReadModeElementType> position_tex;
// texture<float_vec, 1, cudaReadModeElementType> velocity_tex;
// texture<float_vec, 1, cudaReadModeElementType> veleval_tex;
// texture<float_vec, 1, cudaReadModeElementType> color_tex;
// texture<float_vec, 1, cudaReadModeElementType> force_tex;
// #endif
//
// namespace SimLib { namespace Sim { namespace DEM {
//
// __device__ __constant__ DEMParams cDEMParams;
// __device__ __constant__ GridParams cGridParams;
//
// #include "K_SimDEM.cu"
//
// SimDEM::SimDEM(SimCudaAllocator* SimCudaAllocator)
// : SimBase(SimCudaAllocator)
// , mAlloced(false)
// {
// mGPUTimer = new ocu::GPUTimer();
//
// mDEMBuffers = new BufferManager<DEMBufferID>();
//
// mDEMBuffers->SetBuffer(BufferForce, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// mDEMBuffers->SetBuffer(BufferForceSorted, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// }
//
// SimDEM::~SimDEM()
// {
// delete mGPUTimer; mGPUTimer = NULL;
// delete mDEMBuffers; mDEMBuffers = NULL;
// }
//
//
// void SimDEM::SetParams(uint numParticles, float gridWorldSize, DEMParams &demParams)
// {
// hDEMParams = demParams;
//
// // call base class
// SimBase::SetParams(demParams.collide_dist/demParams.scale_to_simulation, gridWorldSize);
//
// Alloc(numParticles);
//
// GridParams hGridParams = mUniformGrid->GetGridParams();
//
// //Copy the grid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cGridParams, &hGridParams, sizeof(GridParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// //Copy the fluid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cDEMParams, &hDEMParams, sizeof(DEMParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// }
//
// void SimDEM::Alloc(uint numParticles)
// {
// if(!mParams)
// {
// printf("SimDEM::Alloc, no params!");
// return;
// }
//
// if (mAlloced)
// Free();
//
// // call base class
// SimBase::Alloc(numParticles);
//
// mNumParticles = numParticles;
//
// mDEMBuffers->AllocBuffers(mNumParticles);
//
// // cudaPrintfInit();
//
// BindTextures();
//
// mAlloced = true;
// }
//
//
// void SimDEM::Free()
// {
// SimBase::Free();
//
// UnbindTextures();
//
// mDEMBuffers->FreeBuffers();
//
// // cudaPrintfEnd();
//
// mAlloced = false;
// }
//
//
// void SimDEM::Clear()
// {
// SimBase::Clear();
//
// mDEMBuffers->MemsetBuffers(0);
// }
//
// DEMParams& SimDEM::GetFluidParams()
// {
// return hDEMParams;
// }
//
// float SimDEM::GetParticleSize()
// {
// return hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
// float SimDEM::GetParticleSpacing()
// {
// return 2*hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
//
// void SimDEM::Simulate(bool doTiming, bool progress, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// float time_hash,time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces;
//
// time_hash = mUniformGrid->Hash(doTiming, mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>(), mNumParticles);
//
// time_radixsort = mUniformGrid->Sort(doTiming);
//
// time_updatelists = BuildDataStruct(doTiming);
//
// time_computeCollisions = ComputeCollisions(doTiming);
//
// time_integrateForces = Integrate(doTiming, progress, mSettings->GetValue("Timestep"), gridWallCollisions, terrainCollisions, dTerrainData);
//
// if(doTiming)
// {
// char tmp[2048];
// sprintf(tmp,"%4.4f\t%4.4f\t%4.4f\t%4.4f\t%4.4f\t\n", time_hash, time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces);
// printf(tmp);
// }
// }
//
// void SimDEM::BindTextures()
// {
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaBindTexture(0, position_tex, dParticleDataSorted.position, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, velocity_tex, dParticleDataSorted.velocity, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, veleval_tex, dParticleDataSorted.veleval, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, color_tex, dParticleDataSorted.color, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, force_tex, dParticleDataSorted.force, mNumParticles*sizeof(float_vec)));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaBindTexture(0, neighbors_tex, dNeighborList.neighbors, dNeighborList.MAX_NEIGHBORS * dNeighborList.numParticles * sizeof(uint)));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_start_tex, dGridData.cell_indexes_start, mUniformGrid->GetNumCells() * sizeof(uint)));
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_end_tex, dGridData.cell_indexes_end, mUniformGrid->GetNumCells() * sizeof(uint)));
// #endif
// }
//
// void SimDEM::UnbindTextures()
// {
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaUnbindTexture(position_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(velocity_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(veleval_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(color_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(force_tex));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaUnbindTexture(neighbors_tex));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_start_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_end_tex));
// #endif
// }
//
// DEMData SimDEM::GetParticleDataSorted()
// {
// DEMData dParticleDataSorted;
// dParticleDataSorted.color = mBaseBuffers->Get(BufferColorSorted)->GetPtr<float_vec>();
// dParticleDataSorted.position = mBaseBuffers->Get(BufferPositionSorted)->GetPtr<float_vec>();
// dParticleDataSorted.veleval = mBaseBuffers->Get(BufferVelevalSorted)->GetPtr<float_vec>();
// dParticleDataSorted.velocity = mBaseBuffers->Get(BufferVelocitySorted)->GetPtr<float_vec>();
// dParticleDataSorted.force = mDEMBuffers->Get(BufferForceSorted)->GetPtr<float_vec>();
// return dParticleDataSorted;
// }
//
// DEMData SimDEM::GetParticleData()
// {
// DEMData dParticleData;
// dParticleData.color = mBaseBuffers->Get(BufferColor)->GetPtr<float_vec>();
// dParticleData.position = mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>();
// dParticleData.veleval = mBaseBuffers->Get(BufferVeleval)->GetPtr<float_vec>();
// dParticleData.velocity = mBaseBuffers->Get(BufferVelocity)->GetPtr<float_vec>();
// dParticleData.force = mDEMBuffers->Get(BufferForce)->GetPtr<float_vec>();
//
// return dParticleData;
// }
//
//
// float SimDEM::BuildDataStruct(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 10 registers, 192+16 bytes smem, 144 bytes cmem[0], 12 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 128, numBlocks, numThreads);
//
// //dynamically allocated shared memory (per block)
// uint smemSize = sizeof(uint)*(numThreads+1);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// // set all cells to empty
// CUDA_SAFE_CALL(cudaMemset(dGridData.cell_indexes_start, 0xff, mUniformGrid->GetNumCells() * sizeof(uint)));
//
// K_Grid_UpdateSorted<DEMSystem, DEMData><<< numBlocks, numThreads, smemSize>>> (
// mNumParticles,
// dParticleData,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
//
// float SimDEM::ComputeCollisions(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 25 registers, 144+16 bytes smem, 160 bytes cmem[0], 8 bytes cmem[1], 8 bytes cmem[14]
// uint threadsPerBlock = 320;
//
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, threadsPerBlock, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// computeCollisions<<<numBlocks, numThreads>>>(
// mNumParticles,
// dNeighborList,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// float SimDEM::Integrate(bool doTiming, bool progress, float deltaTime, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// //Used 25 registers, 208+16 bytes smem, 144 bytes cmem[0], 16 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 320, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// integrateDEM<<<numBlocks, numThreads>>>(
// mNumParticles,
// gridWallCollisions, terrainCollisions,
// deltaTime,
// progress,
// dGridData,
// dParticleData,
// dParticleDataSorted,
// dTerrainData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// //cudaPrintfDisplay(stdout, true);
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// }}} // namespace SimLib { namespace Sim { namespace SimpleSPH { | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // #include <stdlib.h>
// #include <stdio.h>
// #include <math.h>
// #include <string.h>
//
// //#include "cuPrintf.cu"
// #include "K_Common.cuh"
// #include <cutil.h>
// #include "host_defines.h"
// #include "builtin_types.h"
//
// #include "SimDEM.cuh"
// #include "CudaUtils.cuh"
//
//
// // Grid textures and constants
// #ifdef USE_TEX
// texture<uint, 1, cudaReadModeElementType> neighbors_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_start_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_end_tex;
//
// // Fluid textures and constants
// texture<float_vec, 1, cudaReadModeElementType> position_tex;
// texture<float_vec, 1, cudaReadModeElementType> velocity_tex;
// texture<float_vec, 1, cudaReadModeElementType> veleval_tex;
// texture<float_vec, 1, cudaReadModeElementType> color_tex;
// texture<float_vec, 1, cudaReadModeElementType> force_tex;
// #endif
//
// namespace SimLib { namespace Sim { namespace DEM {
//
// __device__ __constant__ DEMParams cDEMParams;
// __device__ __constant__ GridParams cGridParams;
//
// #include "K_SimDEM.cu"
//
// SimDEM::SimDEM(SimCudaAllocator* SimCudaAllocator)
// : SimBase(SimCudaAllocator)
// , mAlloced(false)
// {
// mGPUTimer = new ocu::GPUTimer();
//
// mDEMBuffers = new BufferManager<DEMBufferID>();
//
// mDEMBuffers->SetBuffer(BufferForce, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// mDEMBuffers->SetBuffer(BufferForceSorted, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// }
//
// SimDEM::~SimDEM()
// {
// delete mGPUTimer; mGPUTimer = NULL;
// delete mDEMBuffers; mDEMBuffers = NULL;
// }
//
//
// void SimDEM::SetParams(uint numParticles, float gridWorldSize, DEMParams &demParams)
// {
// hDEMParams = demParams;
//
// // call base class
// SimBase::SetParams(demParams.collide_dist/demParams.scale_to_simulation, gridWorldSize);
//
// Alloc(numParticles);
//
// GridParams hGridParams = mUniformGrid->GetGridParams();
//
// //Copy the grid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cGridParams, &hGridParams, sizeof(GridParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// //Copy the fluid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cDEMParams, &hDEMParams, sizeof(DEMParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// }
//
// void SimDEM::Alloc(uint numParticles)
// {
// if(!mParams)
// {
// printf("SimDEM::Alloc, no params!");
// return;
// }
//
// if (mAlloced)
// Free();
//
// // call base class
// SimBase::Alloc(numParticles);
//
// mNumParticles = numParticles;
//
// mDEMBuffers->AllocBuffers(mNumParticles);
//
// // cudaPrintfInit();
//
// BindTextures();
//
// mAlloced = true;
// }
//
//
// void SimDEM::Free()
// {
// SimBase::Free();
//
// UnbindTextures();
//
// mDEMBuffers->FreeBuffers();
//
// // cudaPrintfEnd();
//
// mAlloced = false;
// }
//
//
// void SimDEM::Clear()
// {
// SimBase::Clear();
//
// mDEMBuffers->MemsetBuffers(0);
// }
//
// DEMParams& SimDEM::GetFluidParams()
// {
// return hDEMParams;
// }
//
// float SimDEM::GetParticleSize()
// {
// return hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
// float SimDEM::GetParticleSpacing()
// {
// return 2*hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
//
// void SimDEM::Simulate(bool doTiming, bool progress, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// float time_hash,time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces;
//
// time_hash = mUniformGrid->Hash(doTiming, mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>(), mNumParticles);
//
// time_radixsort = mUniformGrid->Sort(doTiming);
//
// time_updatelists = BuildDataStruct(doTiming);
//
// time_computeCollisions = ComputeCollisions(doTiming);
//
// time_integrateForces = Integrate(doTiming, progress, mSettings->GetValue("Timestep"), gridWallCollisions, terrainCollisions, dTerrainData);
//
// if(doTiming)
// {
// char tmp[2048];
// sprintf(tmp,"%4.4f\t%4.4f\t%4.4f\t%4.4f\t%4.4f\t\n", time_hash, time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces);
// printf(tmp);
// }
// }
//
// void SimDEM::BindTextures()
// {
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaBindTexture(0, position_tex, dParticleDataSorted.position, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, velocity_tex, dParticleDataSorted.velocity, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, veleval_tex, dParticleDataSorted.veleval, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, color_tex, dParticleDataSorted.color, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, force_tex, dParticleDataSorted.force, mNumParticles*sizeof(float_vec)));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaBindTexture(0, neighbors_tex, dNeighborList.neighbors, dNeighborList.MAX_NEIGHBORS * dNeighborList.numParticles * sizeof(uint)));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_start_tex, dGridData.cell_indexes_start, mUniformGrid->GetNumCells() * sizeof(uint)));
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_end_tex, dGridData.cell_indexes_end, mUniformGrid->GetNumCells() * sizeof(uint)));
// #endif
// }
//
// void SimDEM::UnbindTextures()
// {
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaUnbindTexture(position_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(velocity_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(veleval_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(color_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(force_tex));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaUnbindTexture(neighbors_tex));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_start_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_end_tex));
// #endif
// }
//
// DEMData SimDEM::GetParticleDataSorted()
// {
// DEMData dParticleDataSorted;
// dParticleDataSorted.color = mBaseBuffers->Get(BufferColorSorted)->GetPtr<float_vec>();
// dParticleDataSorted.position = mBaseBuffers->Get(BufferPositionSorted)->GetPtr<float_vec>();
// dParticleDataSorted.veleval = mBaseBuffers->Get(BufferVelevalSorted)->GetPtr<float_vec>();
// dParticleDataSorted.velocity = mBaseBuffers->Get(BufferVelocitySorted)->GetPtr<float_vec>();
// dParticleDataSorted.force = mDEMBuffers->Get(BufferForceSorted)->GetPtr<float_vec>();
// return dParticleDataSorted;
// }
//
// DEMData SimDEM::GetParticleData()
// {
// DEMData dParticleData;
// dParticleData.color = mBaseBuffers->Get(BufferColor)->GetPtr<float_vec>();
// dParticleData.position = mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>();
// dParticleData.veleval = mBaseBuffers->Get(BufferVeleval)->GetPtr<float_vec>();
// dParticleData.velocity = mBaseBuffers->Get(BufferVelocity)->GetPtr<float_vec>();
// dParticleData.force = mDEMBuffers->Get(BufferForce)->GetPtr<float_vec>();
//
// return dParticleData;
// }
//
//
// float SimDEM::BuildDataStruct(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 10 registers, 192+16 bytes smem, 144 bytes cmem[0], 12 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 128, numBlocks, numThreads);
//
// //dynamically allocated shared memory (per block)
// uint smemSize = sizeof(uint)*(numThreads+1);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// // set all cells to empty
// CUDA_SAFE_CALL(cudaMemset(dGridData.cell_indexes_start, 0xff, mUniformGrid->GetNumCells() * sizeof(uint)));
//
// K_Grid_UpdateSorted<DEMSystem, DEMData><<< numBlocks, numThreads, smemSize>>> (
// mNumParticles,
// dParticleData,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
//
// float SimDEM::ComputeCollisions(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 25 registers, 144+16 bytes smem, 160 bytes cmem[0], 8 bytes cmem[1], 8 bytes cmem[14]
// uint threadsPerBlock = 320;
//
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, threadsPerBlock, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// computeCollisions<<<numBlocks, numThreads>>>(
// mNumParticles,
// dNeighborList,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// float SimDEM::Integrate(bool doTiming, bool progress, float deltaTime, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// //Used 25 registers, 208+16 bytes smem, 144 bytes cmem[0], 16 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 320, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// integrateDEM<<<numBlocks, numThreads>>>(
// mNumParticles,
// gridWallCollisions, terrainCollisions,
// deltaTime,
// progress,
// dGridData,
// dParticleData,
// dParticleDataSorted,
// dTerrainData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// //cudaPrintfDisplay(stdout, true);
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// }}} // namespace SimLib { namespace Sim { namespace SimpleSPH { | .file "tmpxft_000a2995_00000000-6_SimDEM.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // #include <stdlib.h>
// #include <stdio.h>
// #include <math.h>
// #include <string.h>
//
// //#include "cuPrintf.cu"
// #include "K_Common.cuh"
// #include <cutil.h>
// #include "host_defines.h"
// #include "builtin_types.h"
//
// #include "SimDEM.cuh"
// #include "CudaUtils.cuh"
//
//
// // Grid textures and constants
// #ifdef USE_TEX
// texture<uint, 1, cudaReadModeElementType> neighbors_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_start_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_end_tex;
//
// // Fluid textures and constants
// texture<float_vec, 1, cudaReadModeElementType> position_tex;
// texture<float_vec, 1, cudaReadModeElementType> velocity_tex;
// texture<float_vec, 1, cudaReadModeElementType> veleval_tex;
// texture<float_vec, 1, cudaReadModeElementType> color_tex;
// texture<float_vec, 1, cudaReadModeElementType> force_tex;
// #endif
//
// namespace SimLib { namespace Sim { namespace DEM {
//
// __device__ __constant__ DEMParams cDEMParams;
// __device__ __constant__ GridParams cGridParams;
//
// #include "K_SimDEM.cu"
//
// SimDEM::SimDEM(SimCudaAllocator* SimCudaAllocator)
// : SimBase(SimCudaAllocator)
// , mAlloced(false)
// {
// mGPUTimer = new ocu::GPUTimer();
//
// mDEMBuffers = new BufferManager<DEMBufferID>();
//
// mDEMBuffers->SetBuffer(BufferForce, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// mDEMBuffers->SetBuffer(BufferForceSorted, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// }
//
// SimDEM::~SimDEM()
// {
// delete mGPUTimer; mGPUTimer = NULL;
// delete mDEMBuffers; mDEMBuffers = NULL;
// }
//
//
// void SimDEM::SetParams(uint numParticles, float gridWorldSize, DEMParams &demParams)
// {
// hDEMParams = demParams;
//
// // call base class
// SimBase::SetParams(demParams.collide_dist/demParams.scale_to_simulation, gridWorldSize);
//
// Alloc(numParticles);
//
// GridParams hGridParams = mUniformGrid->GetGridParams();
//
// //Copy the grid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cGridParams, &hGridParams, sizeof(GridParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// //Copy the fluid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cDEMParams, &hDEMParams, sizeof(DEMParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// }
//
// void SimDEM::Alloc(uint numParticles)
// {
// if(!mParams)
// {
// printf("SimDEM::Alloc, no params!");
// return;
// }
//
// if (mAlloced)
// Free();
//
// // call base class
// SimBase::Alloc(numParticles);
//
// mNumParticles = numParticles;
//
// mDEMBuffers->AllocBuffers(mNumParticles);
//
// // cudaPrintfInit();
//
// BindTextures();
//
// mAlloced = true;
// }
//
//
// void SimDEM::Free()
// {
// SimBase::Free();
//
// UnbindTextures();
//
// mDEMBuffers->FreeBuffers();
//
// // cudaPrintfEnd();
//
// mAlloced = false;
// }
//
//
// void SimDEM::Clear()
// {
// SimBase::Clear();
//
// mDEMBuffers->MemsetBuffers(0);
// }
//
// DEMParams& SimDEM::GetFluidParams()
// {
// return hDEMParams;
// }
//
// float SimDEM::GetParticleSize()
// {
// return hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
// float SimDEM::GetParticleSpacing()
// {
// return 2*hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
//
// void SimDEM::Simulate(bool doTiming, bool progress, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// float time_hash,time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces;
//
// time_hash = mUniformGrid->Hash(doTiming, mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>(), mNumParticles);
//
// time_radixsort = mUniformGrid->Sort(doTiming);
//
// time_updatelists = BuildDataStruct(doTiming);
//
// time_computeCollisions = ComputeCollisions(doTiming);
//
// time_integrateForces = Integrate(doTiming, progress, mSettings->GetValue("Timestep"), gridWallCollisions, terrainCollisions, dTerrainData);
//
// if(doTiming)
// {
// char tmp[2048];
// sprintf(tmp,"%4.4f\t%4.4f\t%4.4f\t%4.4f\t%4.4f\t\n", time_hash, time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces);
// printf(tmp);
// }
// }
//
// void SimDEM::BindTextures()
// {
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaBindTexture(0, position_tex, dParticleDataSorted.position, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, velocity_tex, dParticleDataSorted.velocity, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, veleval_tex, dParticleDataSorted.veleval, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, color_tex, dParticleDataSorted.color, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, force_tex, dParticleDataSorted.force, mNumParticles*sizeof(float_vec)));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaBindTexture(0, neighbors_tex, dNeighborList.neighbors, dNeighborList.MAX_NEIGHBORS * dNeighborList.numParticles * sizeof(uint)));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_start_tex, dGridData.cell_indexes_start, mUniformGrid->GetNumCells() * sizeof(uint)));
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_end_tex, dGridData.cell_indexes_end, mUniformGrid->GetNumCells() * sizeof(uint)));
// #endif
// }
//
// void SimDEM::UnbindTextures()
// {
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaUnbindTexture(position_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(velocity_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(veleval_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(color_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(force_tex));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaUnbindTexture(neighbors_tex));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_start_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_end_tex));
// #endif
// }
//
// DEMData SimDEM::GetParticleDataSorted()
// {
// DEMData dParticleDataSorted;
// dParticleDataSorted.color = mBaseBuffers->Get(BufferColorSorted)->GetPtr<float_vec>();
// dParticleDataSorted.position = mBaseBuffers->Get(BufferPositionSorted)->GetPtr<float_vec>();
// dParticleDataSorted.veleval = mBaseBuffers->Get(BufferVelevalSorted)->GetPtr<float_vec>();
// dParticleDataSorted.velocity = mBaseBuffers->Get(BufferVelocitySorted)->GetPtr<float_vec>();
// dParticleDataSorted.force = mDEMBuffers->Get(BufferForceSorted)->GetPtr<float_vec>();
// return dParticleDataSorted;
// }
//
// DEMData SimDEM::GetParticleData()
// {
// DEMData dParticleData;
// dParticleData.color = mBaseBuffers->Get(BufferColor)->GetPtr<float_vec>();
// dParticleData.position = mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>();
// dParticleData.veleval = mBaseBuffers->Get(BufferVeleval)->GetPtr<float_vec>();
// dParticleData.velocity = mBaseBuffers->Get(BufferVelocity)->GetPtr<float_vec>();
// dParticleData.force = mDEMBuffers->Get(BufferForce)->GetPtr<float_vec>();
//
// return dParticleData;
// }
//
//
// float SimDEM::BuildDataStruct(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 10 registers, 192+16 bytes smem, 144 bytes cmem[0], 12 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 128, numBlocks, numThreads);
//
// //dynamically allocated shared memory (per block)
// uint smemSize = sizeof(uint)*(numThreads+1);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// // set all cells to empty
// CUDA_SAFE_CALL(cudaMemset(dGridData.cell_indexes_start, 0xff, mUniformGrid->GetNumCells() * sizeof(uint)));
//
// K_Grid_UpdateSorted<DEMSystem, DEMData><<< numBlocks, numThreads, smemSize>>> (
// mNumParticles,
// dParticleData,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
//
// float SimDEM::ComputeCollisions(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 25 registers, 144+16 bytes smem, 160 bytes cmem[0], 8 bytes cmem[1], 8 bytes cmem[14]
// uint threadsPerBlock = 320;
//
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, threadsPerBlock, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// computeCollisions<<<numBlocks, numThreads>>>(
// mNumParticles,
// dNeighborList,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// float SimDEM::Integrate(bool doTiming, bool progress, float deltaTime, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// //Used 25 registers, 208+16 bytes smem, 144 bytes cmem[0], 16 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 320, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// integrateDEM<<<numBlocks, numThreads>>>(
// mNumParticles,
// gridWallCollisions, terrainCollisions,
// deltaTime,
// progress,
// dGridData,
// dParticleData,
// dParticleDataSorted,
// dTerrainData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// //cudaPrintfDisplay(stdout, true);
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// }}} // namespace SimLib { namespace Sim { namespace SimpleSPH { | #include <hip/hip_runtime.h>
// #include <stdlib.h>
// #include <stdio.h>
// #include <math.h>
// #include <string.h>
//
// //#include "cuPrintf.cu"
// #include "K_Common.cuh"
// #include <cutil.h>
// #include "host_defines.h"
// #include "builtin_types.h"
//
// #include "SimDEM.cuh"
// #include "CudaUtils.cuh"
//
//
// // Grid textures and constants
// #ifdef USE_TEX
// texture<uint, 1, cudaReadModeElementType> neighbors_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_start_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_end_tex;
//
// // Fluid textures and constants
// texture<float_vec, 1, cudaReadModeElementType> position_tex;
// texture<float_vec, 1, cudaReadModeElementType> velocity_tex;
// texture<float_vec, 1, cudaReadModeElementType> veleval_tex;
// texture<float_vec, 1, cudaReadModeElementType> color_tex;
// texture<float_vec, 1, cudaReadModeElementType> force_tex;
// #endif
//
// namespace SimLib { namespace Sim { namespace DEM {
//
// __device__ __constant__ DEMParams cDEMParams;
// __device__ __constant__ GridParams cGridParams;
//
// #include "K_SimDEM.cu"
//
// SimDEM::SimDEM(SimCudaAllocator* SimCudaAllocator)
// : SimBase(SimCudaAllocator)
// , mAlloced(false)
// {
// mGPUTimer = new ocu::GPUTimer();
//
// mDEMBuffers = new BufferManager<DEMBufferID>();
//
// mDEMBuffers->SetBuffer(BufferForce, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// mDEMBuffers->SetBuffer(BufferForceSorted, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// }
//
// SimDEM::~SimDEM()
// {
// delete mGPUTimer; mGPUTimer = NULL;
// delete mDEMBuffers; mDEMBuffers = NULL;
// }
//
//
// void SimDEM::SetParams(uint numParticles, float gridWorldSize, DEMParams &demParams)
// {
// hDEMParams = demParams;
//
// // call base class
// SimBase::SetParams(demParams.collide_dist/demParams.scale_to_simulation, gridWorldSize);
//
// Alloc(numParticles);
//
// GridParams hGridParams = mUniformGrid->GetGridParams();
//
// //Copy the grid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cGridParams, &hGridParams, sizeof(GridParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// //Copy the fluid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cDEMParams, &hDEMParams, sizeof(DEMParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// }
//
// void SimDEM::Alloc(uint numParticles)
// {
// if(!mParams)
// {
// printf("SimDEM::Alloc, no params!");
// return;
// }
//
// if (mAlloced)
// Free();
//
// // call base class
// SimBase::Alloc(numParticles);
//
// mNumParticles = numParticles;
//
// mDEMBuffers->AllocBuffers(mNumParticles);
//
// // cudaPrintfInit();
//
// BindTextures();
//
// mAlloced = true;
// }
//
//
// void SimDEM::Free()
// {
// SimBase::Free();
//
// UnbindTextures();
//
// mDEMBuffers->FreeBuffers();
//
// // cudaPrintfEnd();
//
// mAlloced = false;
// }
//
//
// void SimDEM::Clear()
// {
// SimBase::Clear();
//
// mDEMBuffers->MemsetBuffers(0);
// }
//
// DEMParams& SimDEM::GetFluidParams()
// {
// return hDEMParams;
// }
//
// float SimDEM::GetParticleSize()
// {
// return hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
// float SimDEM::GetParticleSpacing()
// {
// return 2*hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
//
// void SimDEM::Simulate(bool doTiming, bool progress, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// float time_hash,time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces;
//
// time_hash = mUniformGrid->Hash(doTiming, mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>(), mNumParticles);
//
// time_radixsort = mUniformGrid->Sort(doTiming);
//
// time_updatelists = BuildDataStruct(doTiming);
//
// time_computeCollisions = ComputeCollisions(doTiming);
//
// time_integrateForces = Integrate(doTiming, progress, mSettings->GetValue("Timestep"), gridWallCollisions, terrainCollisions, dTerrainData);
//
// if(doTiming)
// {
// char tmp[2048];
// sprintf(tmp,"%4.4f\t%4.4f\t%4.4f\t%4.4f\t%4.4f\t\n", time_hash, time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces);
// printf(tmp);
// }
// }
//
// void SimDEM::BindTextures()
// {
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaBindTexture(0, position_tex, dParticleDataSorted.position, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, velocity_tex, dParticleDataSorted.velocity, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, veleval_tex, dParticleDataSorted.veleval, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, color_tex, dParticleDataSorted.color, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, force_tex, dParticleDataSorted.force, mNumParticles*sizeof(float_vec)));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaBindTexture(0, neighbors_tex, dNeighborList.neighbors, dNeighborList.MAX_NEIGHBORS * dNeighborList.numParticles * sizeof(uint)));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_start_tex, dGridData.cell_indexes_start, mUniformGrid->GetNumCells() * sizeof(uint)));
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_end_tex, dGridData.cell_indexes_end, mUniformGrid->GetNumCells() * sizeof(uint)));
// #endif
// }
//
// void SimDEM::UnbindTextures()
// {
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaUnbindTexture(position_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(velocity_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(veleval_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(color_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(force_tex));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaUnbindTexture(neighbors_tex));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_start_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_end_tex));
// #endif
// }
//
// DEMData SimDEM::GetParticleDataSorted()
// {
// DEMData dParticleDataSorted;
// dParticleDataSorted.color = mBaseBuffers->Get(BufferColorSorted)->GetPtr<float_vec>();
// dParticleDataSorted.position = mBaseBuffers->Get(BufferPositionSorted)->GetPtr<float_vec>();
// dParticleDataSorted.veleval = mBaseBuffers->Get(BufferVelevalSorted)->GetPtr<float_vec>();
// dParticleDataSorted.velocity = mBaseBuffers->Get(BufferVelocitySorted)->GetPtr<float_vec>();
// dParticleDataSorted.force = mDEMBuffers->Get(BufferForceSorted)->GetPtr<float_vec>();
// return dParticleDataSorted;
// }
//
// DEMData SimDEM::GetParticleData()
// {
// DEMData dParticleData;
// dParticleData.color = mBaseBuffers->Get(BufferColor)->GetPtr<float_vec>();
// dParticleData.position = mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>();
// dParticleData.veleval = mBaseBuffers->Get(BufferVeleval)->GetPtr<float_vec>();
// dParticleData.velocity = mBaseBuffers->Get(BufferVelocity)->GetPtr<float_vec>();
// dParticleData.force = mDEMBuffers->Get(BufferForce)->GetPtr<float_vec>();
//
// return dParticleData;
// }
//
//
// float SimDEM::BuildDataStruct(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 10 registers, 192+16 bytes smem, 144 bytes cmem[0], 12 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 128, numBlocks, numThreads);
//
// //dynamically allocated shared memory (per block)
// uint smemSize = sizeof(uint)*(numThreads+1);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// // set all cells to empty
// CUDA_SAFE_CALL(cudaMemset(dGridData.cell_indexes_start, 0xff, mUniformGrid->GetNumCells() * sizeof(uint)));
//
// K_Grid_UpdateSorted<DEMSystem, DEMData><<< numBlocks, numThreads, smemSize>>> (
// mNumParticles,
// dParticleData,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
//
// float SimDEM::ComputeCollisions(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 25 registers, 144+16 bytes smem, 160 bytes cmem[0], 8 bytes cmem[1], 8 bytes cmem[14]
// uint threadsPerBlock = 320;
//
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, threadsPerBlock, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// computeCollisions<<<numBlocks, numThreads>>>(
// mNumParticles,
// dNeighborList,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// float SimDEM::Integrate(bool doTiming, bool progress, float deltaTime, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// //Used 25 registers, 208+16 bytes smem, 144 bytes cmem[0], 16 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 320, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// integrateDEM<<<numBlocks, numThreads>>>(
// mNumParticles,
// gridWallCollisions, terrainCollisions,
// deltaTime,
// progress,
// dGridData,
// dParticleData,
// dParticleDataSorted,
// dTerrainData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// //cudaPrintfDisplay(stdout, true);
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// }}} // namespace SimLib { namespace Sim { namespace SimpleSPH { |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// #include <stdlib.h>
// #include <stdio.h>
// #include <math.h>
// #include <string.h>
//
// //#include "cuPrintf.cu"
// #include "K_Common.cuh"
// #include <cutil.h>
// #include "host_defines.h"
// #include "builtin_types.h"
//
// #include "SimDEM.cuh"
// #include "CudaUtils.cuh"
//
//
// // Grid textures and constants
// #ifdef USE_TEX
// texture<uint, 1, cudaReadModeElementType> neighbors_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_start_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_end_tex;
//
// // Fluid textures and constants
// texture<float_vec, 1, cudaReadModeElementType> position_tex;
// texture<float_vec, 1, cudaReadModeElementType> velocity_tex;
// texture<float_vec, 1, cudaReadModeElementType> veleval_tex;
// texture<float_vec, 1, cudaReadModeElementType> color_tex;
// texture<float_vec, 1, cudaReadModeElementType> force_tex;
// #endif
//
// namespace SimLib { namespace Sim { namespace DEM {
//
// __device__ __constant__ DEMParams cDEMParams;
// __device__ __constant__ GridParams cGridParams;
//
// #include "K_SimDEM.cu"
//
// SimDEM::SimDEM(SimCudaAllocator* SimCudaAllocator)
// : SimBase(SimCudaAllocator)
// , mAlloced(false)
// {
// mGPUTimer = new ocu::GPUTimer();
//
// mDEMBuffers = new BufferManager<DEMBufferID>();
//
// mDEMBuffers->SetBuffer(BufferForce, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// mDEMBuffers->SetBuffer(BufferForceSorted, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// }
//
// SimDEM::~SimDEM()
// {
// delete mGPUTimer; mGPUTimer = NULL;
// delete mDEMBuffers; mDEMBuffers = NULL;
// }
//
//
// void SimDEM::SetParams(uint numParticles, float gridWorldSize, DEMParams &demParams)
// {
// hDEMParams = demParams;
//
// // call base class
// SimBase::SetParams(demParams.collide_dist/demParams.scale_to_simulation, gridWorldSize);
//
// Alloc(numParticles);
//
// GridParams hGridParams = mUniformGrid->GetGridParams();
//
// //Copy the grid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cGridParams, &hGridParams, sizeof(GridParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// //Copy the fluid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cDEMParams, &hDEMParams, sizeof(DEMParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// }
//
// void SimDEM::Alloc(uint numParticles)
// {
// if(!mParams)
// {
// printf("SimDEM::Alloc, no params!");
// return;
// }
//
// if (mAlloced)
// Free();
//
// // call base class
// SimBase::Alloc(numParticles);
//
// mNumParticles = numParticles;
//
// mDEMBuffers->AllocBuffers(mNumParticles);
//
// // cudaPrintfInit();
//
// BindTextures();
//
// mAlloced = true;
// }
//
//
// void SimDEM::Free()
// {
// SimBase::Free();
//
// UnbindTextures();
//
// mDEMBuffers->FreeBuffers();
//
// // cudaPrintfEnd();
//
// mAlloced = false;
// }
//
//
// void SimDEM::Clear()
// {
// SimBase::Clear();
//
// mDEMBuffers->MemsetBuffers(0);
// }
//
// DEMParams& SimDEM::GetFluidParams()
// {
// return hDEMParams;
// }
//
// float SimDEM::GetParticleSize()
// {
// return hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
// float SimDEM::GetParticleSpacing()
// {
// return 2*hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
//
// void SimDEM::Simulate(bool doTiming, bool progress, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// float time_hash,time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces;
//
// time_hash = mUniformGrid->Hash(doTiming, mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>(), mNumParticles);
//
// time_radixsort = mUniformGrid->Sort(doTiming);
//
// time_updatelists = BuildDataStruct(doTiming);
//
// time_computeCollisions = ComputeCollisions(doTiming);
//
// time_integrateForces = Integrate(doTiming, progress, mSettings->GetValue("Timestep"), gridWallCollisions, terrainCollisions, dTerrainData);
//
// if(doTiming)
// {
// char tmp[2048];
// sprintf(tmp,"%4.4f\t%4.4f\t%4.4f\t%4.4f\t%4.4f\t\n", time_hash, time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces);
// printf(tmp);
// }
// }
//
// void SimDEM::BindTextures()
// {
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaBindTexture(0, position_tex, dParticleDataSorted.position, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, velocity_tex, dParticleDataSorted.velocity, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, veleval_tex, dParticleDataSorted.veleval, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, color_tex, dParticleDataSorted.color, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, force_tex, dParticleDataSorted.force, mNumParticles*sizeof(float_vec)));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaBindTexture(0, neighbors_tex, dNeighborList.neighbors, dNeighborList.MAX_NEIGHBORS * dNeighborList.numParticles * sizeof(uint)));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_start_tex, dGridData.cell_indexes_start, mUniformGrid->GetNumCells() * sizeof(uint)));
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_end_tex, dGridData.cell_indexes_end, mUniformGrid->GetNumCells() * sizeof(uint)));
// #endif
// }
//
// void SimDEM::UnbindTextures()
// {
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaUnbindTexture(position_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(velocity_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(veleval_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(color_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(force_tex));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaUnbindTexture(neighbors_tex));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_start_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_end_tex));
// #endif
// }
//
// DEMData SimDEM::GetParticleDataSorted()
// {
// DEMData dParticleDataSorted;
// dParticleDataSorted.color = mBaseBuffers->Get(BufferColorSorted)->GetPtr<float_vec>();
// dParticleDataSorted.position = mBaseBuffers->Get(BufferPositionSorted)->GetPtr<float_vec>();
// dParticleDataSorted.veleval = mBaseBuffers->Get(BufferVelevalSorted)->GetPtr<float_vec>();
// dParticleDataSorted.velocity = mBaseBuffers->Get(BufferVelocitySorted)->GetPtr<float_vec>();
// dParticleDataSorted.force = mDEMBuffers->Get(BufferForceSorted)->GetPtr<float_vec>();
// return dParticleDataSorted;
// }
//
// DEMData SimDEM::GetParticleData()
// {
// DEMData dParticleData;
// dParticleData.color = mBaseBuffers->Get(BufferColor)->GetPtr<float_vec>();
// dParticleData.position = mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>();
// dParticleData.veleval = mBaseBuffers->Get(BufferVeleval)->GetPtr<float_vec>();
// dParticleData.velocity = mBaseBuffers->Get(BufferVelocity)->GetPtr<float_vec>();
// dParticleData.force = mDEMBuffers->Get(BufferForce)->GetPtr<float_vec>();
//
// return dParticleData;
// }
//
//
// float SimDEM::BuildDataStruct(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 10 registers, 192+16 bytes smem, 144 bytes cmem[0], 12 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 128, numBlocks, numThreads);
//
// //dynamically allocated shared memory (per block)
// uint smemSize = sizeof(uint)*(numThreads+1);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// // set all cells to empty
// CUDA_SAFE_CALL(cudaMemset(dGridData.cell_indexes_start, 0xff, mUniformGrid->GetNumCells() * sizeof(uint)));
//
// K_Grid_UpdateSorted<DEMSystem, DEMData><<< numBlocks, numThreads, smemSize>>> (
// mNumParticles,
// dParticleData,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
//
// float SimDEM::ComputeCollisions(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 25 registers, 144+16 bytes smem, 160 bytes cmem[0], 8 bytes cmem[1], 8 bytes cmem[14]
// uint threadsPerBlock = 320;
//
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, threadsPerBlock, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// computeCollisions<<<numBlocks, numThreads>>>(
// mNumParticles,
// dNeighborList,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// float SimDEM::Integrate(bool doTiming, bool progress, float deltaTime, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// //Used 25 registers, 208+16 bytes smem, 144 bytes cmem[0], 16 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 320, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// integrateDEM<<<numBlocks, numThreads>>>(
// mNumParticles,
// gridWallCollisions, terrainCollisions,
// deltaTime,
// progress,
// dGridData,
// dParticleData,
// dParticleDataSorted,
// dTerrainData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// //cudaPrintfDisplay(stdout, true);
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// }}} // namespace SimLib { namespace Sim { namespace SimpleSPH { | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// #include <stdlib.h>
// #include <stdio.h>
// #include <math.h>
// #include <string.h>
//
// //#include "cuPrintf.cu"
// #include "K_Common.cuh"
// #include <cutil.h>
// #include "host_defines.h"
// #include "builtin_types.h"
//
// #include "SimDEM.cuh"
// #include "CudaUtils.cuh"
//
//
// // Grid textures and constants
// #ifdef USE_TEX
// texture<uint, 1, cudaReadModeElementType> neighbors_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_start_tex;
// texture<uint, 1, cudaReadModeElementType> cell_indexes_end_tex;
//
// // Fluid textures and constants
// texture<float_vec, 1, cudaReadModeElementType> position_tex;
// texture<float_vec, 1, cudaReadModeElementType> velocity_tex;
// texture<float_vec, 1, cudaReadModeElementType> veleval_tex;
// texture<float_vec, 1, cudaReadModeElementType> color_tex;
// texture<float_vec, 1, cudaReadModeElementType> force_tex;
// #endif
//
// namespace SimLib { namespace Sim { namespace DEM {
//
// __device__ __constant__ DEMParams cDEMParams;
// __device__ __constant__ GridParams cGridParams;
//
// #include "K_SimDEM.cu"
//
// SimDEM::SimDEM(SimCudaAllocator* SimCudaAllocator)
// : SimBase(SimCudaAllocator)
// , mAlloced(false)
// {
// mGPUTimer = new ocu::GPUTimer();
//
// mDEMBuffers = new BufferManager<DEMBufferID>();
//
// mDEMBuffers->SetBuffer(BufferForce, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// mDEMBuffers->SetBuffer(BufferForceSorted, new SimBufferCuda(mSimCudaAllocator, Device, sizeof(float_vec)));
// }
//
// SimDEM::~SimDEM()
// {
// delete mGPUTimer; mGPUTimer = NULL;
// delete mDEMBuffers; mDEMBuffers = NULL;
// }
//
//
// void SimDEM::SetParams(uint numParticles, float gridWorldSize, DEMParams &demParams)
// {
// hDEMParams = demParams;
//
// // call base class
// SimBase::SetParams(demParams.collide_dist/demParams.scale_to_simulation, gridWorldSize);
//
// Alloc(numParticles);
//
// GridParams hGridParams = mUniformGrid->GetGridParams();
//
// //Copy the grid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cGridParams, &hGridParams, sizeof(GridParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// //Copy the fluid parameters to the GPU
// CUDA_SAFE_CALL(cudaMemcpyToSymbol (cDEMParams, &hDEMParams, sizeof(DEMParams) ) );
// CUDA_SAFE_CALL(cudaThreadSynchronize());
//
// }
//
// void SimDEM::Alloc(uint numParticles)
// {
// if(!mParams)
// {
// printf("SimDEM::Alloc, no params!");
// return;
// }
//
// if (mAlloced)
// Free();
//
// // call base class
// SimBase::Alloc(numParticles);
//
// mNumParticles = numParticles;
//
// mDEMBuffers->AllocBuffers(mNumParticles);
//
// // cudaPrintfInit();
//
// BindTextures();
//
// mAlloced = true;
// }
//
//
// void SimDEM::Free()
// {
// SimBase::Free();
//
// UnbindTextures();
//
// mDEMBuffers->FreeBuffers();
//
// // cudaPrintfEnd();
//
// mAlloced = false;
// }
//
//
// void SimDEM::Clear()
// {
// SimBase::Clear();
//
// mDEMBuffers->MemsetBuffers(0);
// }
//
// DEMParams& SimDEM::GetFluidParams()
// {
// return hDEMParams;
// }
//
// float SimDEM::GetParticleSize()
// {
// return hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
// float SimDEM::GetParticleSpacing()
// {
// return 2*hDEMParams.particle_radius/hDEMParams.scale_to_simulation;
// }
//
// void SimDEM::Simulate(bool doTiming, bool progress, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// float time_hash,time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces;
//
// time_hash = mUniformGrid->Hash(doTiming, mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>(), mNumParticles);
//
// time_radixsort = mUniformGrid->Sort(doTiming);
//
// time_updatelists = BuildDataStruct(doTiming);
//
// time_computeCollisions = ComputeCollisions(doTiming);
//
// time_integrateForces = Integrate(doTiming, progress, mSettings->GetValue("Timestep"), gridWallCollisions, terrainCollisions, dTerrainData);
//
// if(doTiming)
// {
// char tmp[2048];
// sprintf(tmp,"%4.4f\t%4.4f\t%4.4f\t%4.4f\t%4.4f\t\n", time_hash, time_radixsort, time_updatelists, time_computeCollisions, time_integrateForces);
// printf(tmp);
// }
// }
//
// void SimDEM::BindTextures()
// {
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaBindTexture(0, position_tex, dParticleDataSorted.position, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, velocity_tex, dParticleDataSorted.velocity, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, veleval_tex, dParticleDataSorted.veleval, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, color_tex, dParticleDataSorted.color, mNumParticles*sizeof(float_vec)));
// CUDA_SAFE_CALL(cudaBindTexture(0, force_tex, dParticleDataSorted.force, mNumParticles*sizeof(float_vec)));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaBindTexture(0, neighbors_tex, dNeighborList.neighbors, dNeighborList.MAX_NEIGHBORS * dNeighborList.numParticles * sizeof(uint)));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_start_tex, dGridData.cell_indexes_start, mUniformGrid->GetNumCells() * sizeof(uint)));
// CUDA_SAFE_CALL(cudaBindTexture(0, cell_indexes_end_tex, dGridData.cell_indexes_end, mUniformGrid->GetNumCells() * sizeof(uint)));
// #endif
// }
//
// void SimDEM::UnbindTextures()
// {
// #ifdef USE_TEX
// CUDA_SAFE_CALL(cudaUnbindTexture(position_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(velocity_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(veleval_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(color_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(force_tex));
//
// #ifdef SPHSIMLIB_USE_NEIGHBORLIST
// CUDA_SAFE_CALL(cudaUnbindTexture(neighbors_tex));
// #endif
//
// GridData dGridData = mUniformGrid->GetGridData();
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_start_tex));
// CUDA_SAFE_CALL(cudaUnbindTexture(cell_indexes_end_tex));
// #endif
// }
//
// DEMData SimDEM::GetParticleDataSorted()
// {
// DEMData dParticleDataSorted;
// dParticleDataSorted.color = mBaseBuffers->Get(BufferColorSorted)->GetPtr<float_vec>();
// dParticleDataSorted.position = mBaseBuffers->Get(BufferPositionSorted)->GetPtr<float_vec>();
// dParticleDataSorted.veleval = mBaseBuffers->Get(BufferVelevalSorted)->GetPtr<float_vec>();
// dParticleDataSorted.velocity = mBaseBuffers->Get(BufferVelocitySorted)->GetPtr<float_vec>();
// dParticleDataSorted.force = mDEMBuffers->Get(BufferForceSorted)->GetPtr<float_vec>();
// return dParticleDataSorted;
// }
//
// DEMData SimDEM::GetParticleData()
// {
// DEMData dParticleData;
// dParticleData.color = mBaseBuffers->Get(BufferColor)->GetPtr<float_vec>();
// dParticleData.position = mBaseBuffers->Get(BufferPosition)->GetPtr<float_vec>();
// dParticleData.veleval = mBaseBuffers->Get(BufferVeleval)->GetPtr<float_vec>();
// dParticleData.velocity = mBaseBuffers->Get(BufferVelocity)->GetPtr<float_vec>();
// dParticleData.force = mDEMBuffers->Get(BufferForce)->GetPtr<float_vec>();
//
// return dParticleData;
// }
//
//
// float SimDEM::BuildDataStruct(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 10 registers, 192+16 bytes smem, 144 bytes cmem[0], 12 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 128, numBlocks, numThreads);
//
// //dynamically allocated shared memory (per block)
// uint smemSize = sizeof(uint)*(numThreads+1);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// // set all cells to empty
// CUDA_SAFE_CALL(cudaMemset(dGridData.cell_indexes_start, 0xff, mUniformGrid->GetNumCells() * sizeof(uint)));
//
// K_Grid_UpdateSorted<DEMSystem, DEMData><<< numBlocks, numThreads, smemSize>>> (
// mNumParticles,
// dParticleData,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
//
// float SimDEM::ComputeCollisions(bool doTiming)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// // Used 25 registers, 144+16 bytes smem, 160 bytes cmem[0], 8 bytes cmem[1], 8 bytes cmem[14]
// uint threadsPerBlock = 320;
//
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, threadsPerBlock, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// computeCollisions<<<numBlocks, numThreads>>>(
// mNumParticles,
// dNeighborList,
// dParticleDataSorted,
// dGridData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// float SimDEM::Integrate(bool doTiming, bool progress, float deltaTime, bool gridWallCollisions, bool terrainCollisions, TerrainData dTerrainData)
// {
// GridData dGridData = mUniformGrid->GetGridData();
// DEMData dParticleData = GetParticleData();
// DEMData dParticleDataSorted = GetParticleDataSorted();
//
// //Used 25 registers, 208+16 bytes smem, 144 bytes cmem[0], 16 bytes cmem[1]
// uint numThreads, numBlocks;
// computeGridSize(mNumParticles, 320, numBlocks, numThreads);
//
// if(doTiming)
// {
// mGPUTimer->start();
// }
//
// integrateDEM<<<numBlocks, numThreads>>>(
// mNumParticles,
// gridWallCollisions, terrainCollisions,
// deltaTime,
// progress,
// dGridData,
// dParticleData,
// dParticleDataSorted,
// dTerrainData
// );
//
// //CUT_CHECK_ERROR("Kernel execution failed");
//
// //cudaPrintfDisplay(stdout, true);
//
// if(doTiming)
// {
// mGPUTimer->stop();
// return mGPUTimer->elapsed_ms();
// }
//
// return 0;
// }
//
// }}} // namespace SimLib { namespace Sim { namespace SimpleSPH { | .text
.file "SimDEM.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a2995_00000000-6_SimDEM.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "SimDEM.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* dijkstras-test.cu
*
* Created on: Apr 20, 2015
* Author: luke
*/
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <climits>
#include <stdint.h>
#include <ctime>
void CudaMallocErrorCheck(void** ptr, int size);
void DijkstrasSetupCuda(int *V, int *E, int *We, int *sigma, int *F, int *U, int num_v, int num_e);
void Extremas(int *V, int *E, int num_v, int num_e, int *extrema_vertex, int source_vertex);
void Initialize(int *V, int *E, int num_v, int num_e, int **dev_V, int **dev_E, int **dev_U, int **dev_F, int **dev_sigma, int source);
int Minimum(int *U, int *sigma, int *V, int *E, int num_v, int num_e, int *dev_dest, int *dev_src);
__global__ void InitializeGPU(int *V, int *E, int *U, int *F, int *sigma, int src, int size_v, int size_e);
__global__ void Relax(int *U, int *F, int *sigma, int *V, int *E, int num_v, int num_e);
__global__ void Update(int *U, int *F, int *sigma, int delta, int size);
__global__ void reduce(int *g_idata, int *g_odata, unsigned int n, int *U, int *sigma);
__global__ void reduce_fix(int *g_idata, int *g_odata, unsigned int n, unsigned int s_size, unsigned int loops, int *U, int *sigma);
uint32_t NearestPowerTwo(uint32_t N);
uint32_t NearestPowerBase(uint32_t N, uint32_t base, uint32_t &power);
// Generate V_a, E_a, Start_a, End_a, Weight_a
int main(int argc, char **argv) {
// Initialize graph
int V[] = {0, 1, 5, 7, 9};
int E[] = {1, 0, 2, 3, 4, 1, 4, 1, 4, 1, 2, 3};
int Sv[] = {0, 1, 1, 1, 1, 2, 2, 3, 3, 4, 4, 4};
int Ev[] = {1, 0, 2, 3, 4, 1, 4, 1, 4, 1, 2, 3};
int We[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
// Initialize Unsettled, Frontier, Sigma function
int sigma[]= {0,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1}; // -1 = inf
int F[] = {1, 0, 0, 0, 0};
int U[] = {0, 1, 1, 1, 1};
DijkstrasSetupCuda(V, E, We, sigma, F, U, 5, 12);
}
void DijkstrasSetupCuda(int *V, int *E, int *We, int *sigma, int *F, int *U, int num_v, int num_e) {
int extrema_vertex;
Extremas(V, E, num_v, num_e, &extrema_vertex, 0);
}
void Extremas(int *V, int *E, int num_v, int num_e, int *extrema_vertex, int source_vertex) {
// Define Unsettled sigma and Frontier nodes
int *dev_U, *dev_sigma, *dev_F, *dev_V, *dev_E, *dev_src, *dev_dest;
int delta = 0;
float elapsedTime=0;
// Initialize reduce function mem
CudaMallocErrorCheck((void**)&dev_src, num_v*sizeof(int));
CudaMallocErrorCheck((void**)&dev_dest, num_v*sizeof(int));
Initialize(V, E, num_v, num_e, &dev_V, &dev_E, &dev_U, &dev_F, &dev_sigma, source_vertex);
// Relax<<<1, 5>>>(dev_U, dev_F, dev_sigma, dev_V, dev_E, num_v, num_e);
// int test = Minimum(dev_U, dev_sigma, dev_V, dev_E, num_v, num_e, dev_dest, dev_src);
// Update<<<1,5>>>(dev_U, dev_F, dev_sigma, test, num_v);
// printf("Test: %d\n", test);
//
cudaEvent_t start, end;
cudaEventCreate(&start);
cudaEventCreate(&end);
cudaEventRecord(start, 0);
while (delta != INT_MAX) {
Relax<<<1, 5>>>(dev_U, dev_F, dev_sigma, dev_V, dev_E, num_v, num_e);
delta = Minimum(dev_U, dev_sigma, dev_V, dev_E, num_v, num_e, dev_dest, dev_src);
Update<<<1, 5>>>(dev_U, dev_F, dev_sigma, delta, num_v);
}
cudaEventRecord(end, 0);
cudaEventSynchronize(end);
cudaEventElapsedTime(&elapsedTime, start, end);
printf("Elapsed Time: %f\n", elapsedTime);
cudaEventDestroy(start);
cudaEventDestroy(end);
int sigma[num_v];
// int V_t[num_v];
// int U_t[num_v];
cudaMemcpy(sigma, dev_sigma, num_v*sizeof(int), cudaMemcpyDeviceToHost);
// cudaMemcpy(V_t, dev_F, num_v*sizeof(int), cudaMemcpyDeviceToHost);
// cudaMemcpy(U_t, dev_U, num_v*sizeof(int), cudaMemcpyDeviceToHost);
for (int i = 0; i < num_v; ++i) {
printf("Sigma[%d] : %d\n", i, sigma[i]);
// printf("Frontier[%d] : %d\n", i, V_t[i]);
// printf("Unsettled[%d]: %d\n", i, U_t[i]);
}
}
void Initialize(int *V, int *E, int num_v, int num_e, int **dev_V, int **dev_E, int **dev_U, int **dev_F, int **dev_sigma, int source) {
// Allocate the device memory
CudaMallocErrorCheck((void**)dev_V, num_v*sizeof(int));
CudaMallocErrorCheck((void**)dev_E, num_e*sizeof(int));
CudaMallocErrorCheck((void**)dev_U, num_v*sizeof(int));
CudaMallocErrorCheck((void**)dev_F, num_v*sizeof(int));
CudaMallocErrorCheck((void**)dev_sigma, num_v*sizeof(int));
// copy graph to device
cudaMemcpy(*dev_V, V, num_v*sizeof(int), cudaMemcpyHostToDevice);
cudaMemcpy(*dev_E, E, num_e*sizeof(int), cudaMemcpyHostToDevice);
// initialize Frontier
// Initialize Unselttled
// Initialize Sigma distance function
int threads_per_block, blocks_per_dim;
blocks_per_dim = num_v / 1024 + 1;
threads_per_block = num_v / blocks_per_dim;
InitializeGPU<<<blocks_per_dim, threads_per_block>>>(*dev_V, *dev_E, *dev_U, *dev_F, *dev_sigma, source, num_e, num_v);
}
__global__ void InitializeGPU(int *V, int *E, int *U, int *F, int *sigma, int src, int size_v, int size_e) {
int offset = blockDim.x * blockIdx.x + threadIdx.x;
int U_t, F_t, sigma_t;
if (offset < size_v) {
U_t = 1;
F_t = 0;
sigma_t = INT_MAX - 1;
if (offset == src) {
U_t = 0;
F_t = 1;
sigma_t = 0;
}
U[offset] = U_t;
F[offset] = F_t;
sigma[offset] = sigma_t;
}
}
__global__ void Relax(int *U, int *F, int *sigma, int *V, int *E, int num_v, int num_e) {
int offset = blockDim.x * blockIdx.x + threadIdx.x;
if (offset < num_v) {
if (F[offset] == 1) {
for (int i = V[offset]; i < V[offset+1] && i < num_e; ++i) {
if (U[E[i]] == 1) {
atomicMin(&sigma[E[i]], sigma[offset] + 1);
}
}
}
}
}
__global__ void Update(int *U, int *F, int *sigma, int delta, int size) {
int offset = blockDim.x * blockIdx.x + threadIdx.x;
if (offset < size){
F[offset] = 0;
if (U[offset] == 1 && sigma[offset] <= delta) {
U[offset] = 0;
F[offset] = 1;
}
}
}
int Minimum(int *U, int *sigma, int *V, int *E, int num_v, int num_e, int *dev_dest, int *dev_src) {
uint32_t blocks = (num_v+1) / 1024 + 1;
uint32_t threads = (num_v+1) / blocks / 2;
uint32_t loops;
uint32_t n_multiple = NearestPowerBase(num_v, threads * blocks * 2, loops);
uint32_t dev_dest_size = NearestPowerTwo(blocks*loops);
uint32_t share = NearestPowerTwo(threads);
// printf("Blocks: %d, Threads:%d\n", blocks, threads);
reduce_fix<<<blocks, threads, share*sizeof(int)>>>(V, dev_dest, n_multiple,
share, loops, U, sigma);
// Recall GPU function: Assumption Destination is power of 2. calculate block
// and threads for each call.
// GPU Call loop until Threshold
if (dev_dest_size > 1024) {
threads = 512;
blocks = dev_dest_size / threads / 2;
} else {
threads = dev_dest_size / 2;
blocks = 1;
}
while (dev_dest_size > 1) {
int * temp = dev_dest;
dev_dest = dev_src;
dev_src = temp;
reduce<<<blocks, threads, threads*sizeof(int)>>>(dev_src, dev_dest,
dev_dest_size, U, sigma);
dev_dest_size = blocks;
if (dev_dest_size > 1024) {
threads = 512;
blocks = dev_dest_size / threads / 2;
} else {
threads = dev_dest_size / 2;
blocks = 1;
}
}
int result;
cudaMemcpy(&result, dev_dest, sizeof(int), cudaMemcpyDeviceToHost);
return result;
}
void CudaMallocErrorCheck(void** ptr, int size) {
cudaError_t err = cudaMalloc(ptr, size);
if (err != cudaSuccess) {
printf("Error: %s", cudaGetErrorString(err));
exit(1);
}
}
uint32_t NearestPowerTwo(uint32_t N) {
uint32_t result = 1;
while (result < N) {
result <<= 1;
}
return result;
}
uint32_t NearestPowerBase(uint32_t N, uint32_t base, uint32_t &power) {
uint32_t result = base;
power = 1;
while (result < N) {
result += base;
power++;
}
return result;
}
__global__ void reduce(int *g_idata, int *g_odata, unsigned int n, int *U, int *sigma) {
// Pointer to shared memory
extern __shared__ int share_mem[];
unsigned int thread_id = threadIdx.x;
unsigned int block_id = blockIdx.x;
unsigned int block_dim = blockDim.x;
unsigned int offset = block_id*block_dim*2 + thread_id;
// Temp result float
int result = (offset < n && U[offset] == 1) ? g_idata[offset] : INT_MAX;
// Perform summation
if (offset + block_dim < n && U[offset + block_dim] == 1)
result = min(result, g_idata[offset+block_dim]);
share_mem[thread_id] = result;
// Sync Threads in a single Block
__syncthreads();
// store result to shared memory
for (unsigned int s=block_dim/2; s>0; s>>=1) {
if (thread_id < s) {
share_mem[thread_id] = result = min(result, share_mem[thread_id + s]);
}
__syncthreads();
}
// Store result to output data pointer
if (thread_id == 0) g_odata[block_id] = result;
}
__global__ void reduce_fix(int *g_idata, int *g_odata, unsigned int n, unsigned int s_size, unsigned int loops, int *U, int *sigma) {
// Pointer to shared memory
extern __shared__ int share_mem[];
unsigned int thread_id = threadIdx.x;
for (int i = 0; i < loops; ++i) {
unsigned int offset = blockIdx.x*blockDim.x*2 + threadIdx.x + blockDim.x * 2 * gridDim.x * i;
// Temp result float
int result = (offset < n && U[offset] == 1) ? g_idata[offset] : INT_MAX;
// Perform summation
if (offset + blockDim.x < n && U[offset + blockDim.x] == 1)
result = min(result, g_idata[offset+blockDim.x]);
share_mem[thread_id] = result;
// printf("Result: %d\n", result);
// Sync Threads in a single Block
int delta = s_size - blockDim.x;
if (thread_id + delta > blockDim.x-1) {
share_mem[thread_id+delta] = INT_MAX;
}
__syncthreads();
// store result to shared memory
for (unsigned int s=s_size/2; s>0; s>>=1) {
if (thread_id < s) {
share_mem[thread_id] = result = min(result, share_mem[thread_id + s]);
}
__syncthreads();
}
// Store result to output data pointer
if (thread_id == 0) {
g_odata[blockIdx.x+ gridDim.x*i] = result;
}
}
} | code for sm_80
Function : _Z10reduce_fixPiS_jjjS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */
/* 0x000fda0003f05270 */
/*0020*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0030*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0040*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x000fe200078e00ff */
/*0050*/ ULDC UR4, c[0x0][0x174] ; /* 0x00005d0000047ab9 */
/* 0x000fe40000000800 */
/*0060*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e620000002500 */
/*0070*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ; /* 0x000000013f047899 */
/* 0x000fe20008011604 */
/*0080*/ IADD3 R7, -R5.reuse, c[0x0][0x174], RZ ; /* 0x00005d0005077a10 */
/* 0x040fe20007ffe1ff */
/*0090*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*00a0*/ IADD3 R4, R5.reuse, -0x1, RZ ; /* 0xffffffff05047810 */
/* 0x040fe20007ffe0ff */
/*00b0*/ IMAD.SHL.U32 R5, R5, 0x2, RZ ; /* 0x0000000205057824 */
/* 0x000fe400078e00ff */
/*00c0*/ IMAD.IADD R3, R7, 0x1, R2 ; /* 0x0000000107037824 */
/* 0x001fca00078e0202 */
/*00d0*/ ISETP.GT.U32.AND P0, PT, R3, R4, PT ; /* 0x000000040300720c */
/* 0x000fe20003f04070 */
/*00e0*/ IMAD.SHL.U32 R4, R2, 0x4, RZ ; /* 0x0000000402047824 */
/* 0x000fe400078e00ff */
/*00f0*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */
/* 0x000fe400078e00ff */
/*0100*/ IMAD R6, R7, 0x4, R4 ; /* 0x0000000407067824 */
/* 0x002fcc00078e0204 */
/*0110*/ IMAD R10, R3, c[0x0][0xc], R0 ; /* 0x00000300030a7a24 */
/* 0x000fe200078e0200 */
/*0120*/ BSSY B0, 0x230 ; /* 0x0000010000007945 */
/* 0x000fe20003800000 */
/*0130*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, 0x7fffffff ; /* 0x7fffffffff0b0424 */
/* 0x000fe400078e00ff */
/*0140*/ IMAD R13, R5, R10, R2 ; /* 0x0000000a050d7224 */
/* 0x000fe400078e0202 */
/*0150*/ IMAD.MOV.U32 R7, RZ, RZ, 0x7fffffff ; /* 0x7fffffffff077424 */
/* 0x001fc600078e00ff */
/*0160*/ ISETP.GE.U32.AND P2, PT, R13.reuse, c[0x0][0x170], PT ; /* 0x00005c000d007a0c */
/* 0x040fe40003f46070 */
/*0170*/ IADD3 R12, R13, c[0x0][0x0], RZ ; /* 0x000000000d0c7a10 */
/* 0x000fc80007ffe0ff */
/*0180*/ ISETP.GE.U32.AND P1, PT, R12, c[0x0][0x170], PT ; /* 0x00005c000c007a0c */
/* 0x000fce0003f26070 */
/*0190*/ @P2 BRA 0x220 ; /* 0x0000008000002947 */
/* 0x000fea0003800000 */
/*01a0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x4 ; /* 0x00000004ff087424 */
/* 0x000fc800078e00ff */
/*01b0*/ IMAD.WIDE.U32 R8, R13, R8, c[0x0][0x180] ; /* 0x000060000d087625 */
/* 0x000fcc00078e0008 */
/*01c0*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ea4000c1e1900 */
/*01d0*/ ISETP.NE.AND P2, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x004fda0003f45270 */
/*01e0*/ @P2 BRA 0x220 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*01f0*/ LEA R8, P2, R13, c[0x0][0x160], 0x2 ; /* 0x000058000d087a11 */
/* 0x000fc800078410ff */
/*0200*/ LEA.HI.X R9, R13, c[0x0][0x164], RZ, 0x2, P2 ; /* 0x000059000d097a11 */
/* 0x000fca00010f14ff */
/*0210*/ LDG.E R7, [R8.64] ; /* 0x0000000608077981 */
/* 0x000168000c1e1900 */
/*0220*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0230*/ BSSY B0, 0x2f0 ; /* 0x000000b000007945 */
/* 0x000fe20003800000 */
/*0240*/ @P1 BRA 0x2e0 ; /* 0x0000009000001947 */
/* 0x000fea0003800000 */
/*0250*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */
/* 0x001fc800078e00ff */
/*0260*/ IMAD.WIDE.U32 R8, R12, R9, c[0x0][0x180] ; /* 0x000060000c087625 */
/* 0x000fcc00078e0009 */
/*0270*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ea4000c1e1900 */
/*0280*/ ISETP.NE.AND P1, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x004fda0003f25270 */
/*0290*/ @P1 BRA 0x2e0 ; /* 0x0000004000001947 */
/* 0x000fea0003800000 */
/*02a0*/ LEA R8, P1, R12, c[0x0][0x160], 0x2 ; /* 0x000058000c087a11 */
/* 0x000fc800078210ff */
/*02b0*/ LEA.HI.X R9, R12, c[0x0][0x164], RZ, 0x2, P1 ; /* 0x000059000c097a11 */
/* 0x000fca00008f14ff */
/*02c0*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ea4000c1e1900 */
/*02d0*/ IMNMX R7, R7, R8, PT ; /* 0x0000000807077217 */
/* 0x024fe40003800200 */
/*02e0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02f0*/ ISETP.NE.AND P2, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */
/* 0x000fe2000bf45270 */
/*0300*/ STS [R2.X4], R7 ; /* 0x0000000702007388 */
/* 0x0203e20000004800 */
/*0310*/ IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103037810 */
/* 0x000fc60007ffe0ff */
/*0320*/ @P0 STS [R6], R11 ; /* 0x0000000b06000388 */
/* 0x0003e80000000800 */
/*0330*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0340*/ ISETP.GE.U32.AND P1, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */
/* 0x000fca0003f26070 */
/*0350*/ @!P2 BRA 0x400 ; /* 0x000000a00000a947 */
/* 0x000fea0003800000 */
/*0360*/ IMAD.U32 R9, RZ, RZ, UR4 ; /* 0x00000004ff097e24 */
/* 0x003fca000f8e00ff */
/*0370*/ ISETP.GE.U32.AND P2, PT, R2, R9, PT ; /* 0x000000090200720c */
/* 0x000fda0003f46070 */
/*0380*/ @!P2 IMAD R8, R9, 0x4, R4 ; /* 0x000000040908a824 */
/* 0x000fe200078e0204 */
/*0390*/ SHF.R.U32.HI R9, RZ, 0x1, R9 ; /* 0x00000001ff097819 */
/* 0x000fca0000011609 */
/*03a0*/ @!P2 LDS R8, [R8] ; /* 0x000000000808a984 */
/* 0x000e240000000800 */
/*03b0*/ @!P2 IMNMX R7, R7, R8, PT ; /* 0x000000080707a217 */
/* 0x001fca0003800200 */
/*03c0*/ @!P2 STS [R2.X4], R7 ; /* 0x000000070200a388 */
/* 0x0001e80000004800 */
/*03d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*03e0*/ ISETP.NE.AND P2, PT, R9, RZ, PT ; /* 0x000000ff0900720c */
/* 0x000fda0003f45270 */
/*03f0*/ @P2 BRA 0x370 ; /* 0xffffff7000002947 */
/* 0x001fea000383ffff */
/*0400*/ ISETP.NE.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x002fda0003f45270 */
/*0410*/ @!P2 IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff09a424 */
/* 0x001fc800078e00ff */
/*0420*/ @!P2 IMAD.WIDE.U32 R8, R10, R9, c[0x0][0x168] ; /* 0x00005a000a08a625 */
/* 0x000fca00078e0009 */
/*0430*/ @!P2 STG.E [R8.64], R7 ; /* 0x000000070800a986 */
/* 0x0001e2000c101906 */
/*0440*/ @!P1 BRA 0x110 ; /* 0xfffffcc000009947 */
/* 0x000fea000383ffff */
/*0450*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0460*/ BRA 0x460; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z6reducePiS_jS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */
/* 0x000fe20000000800 */
/*0030*/ BSSY B0, 0x160 ; /* 0x0000012000007945 */
/* 0x000fe20003800000 */
/*0040*/ USHF.L.U32 UR5, UR4, 0x1, URZ ; /* 0x0000000104057899 */
/* 0x000fe2000800063f */
/*0050*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
/*0060*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*0070*/ IMAD.MOV.U32 R5, RZ, RZ, 0x7fffffff ; /* 0x7fffffffff057424 */
/* 0x000fc600078e00ff */
/*0080*/ IMAD R0, R6, UR5, R8 ; /* 0x0000000506007c24 */
/* 0x001fca000f8e0208 */
/*0090*/ ISETP.GE.U32.AND P1, PT, R0.reuse, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x040fe40003f26070 */
/*00a0*/ IADD3 R4, R0, c[0x0][0x0], RZ ; /* 0x0000000000047a10 */
/* 0x000fc80007ffe0ff */
/*00b0*/ ISETP.GE.U32.AND P0, PT, R4, c[0x0][0x170], PT ; /* 0x00005c0004007a0c */
/* 0x000fce0003f06070 */
/*00c0*/ @P1 BRA 0x150 ; /* 0x0000008000001947 */
/* 0x000fea0003800000 */
/*00d0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fc800078e00ff */
/*00e0*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x178] ; /* 0x00005e0000027625 */
/* 0x000fcc00078e0003 */
/*00f0*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */
/* 0x000ea4000c1e1900 */
/*0100*/ ISETP.NE.AND P1, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x004fda0003f25270 */
/*0110*/ @P1 BRA 0x150 ; /* 0x0000003000001947 */
/* 0x000fea0003800000 */
/*0120*/ LEA R2, P1, R0, c[0x0][0x160], 0x2 ; /* 0x0000580000027a11 */
/* 0x000fc800078210ff */
/*0130*/ LEA.HI.X R3, R0, c[0x0][0x164], RZ, 0x2, P1 ; /* 0x0000590000037a11 */
/* 0x000fca00008f14ff */
/*0140*/ LDG.E R5, [R2.64] ; /* 0x0000000602057981 */
/* 0x000168000c1e1900 */
/*0150*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0160*/ BSSY B0, 0x220 ; /* 0x000000b000007945 */
/* 0x000fe20003800000 */
/*0170*/ @P0 BRA 0x210 ; /* 0x0000009000000947 */
/* 0x000fea0003800000 */
/*0180*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x001fc800078e00ff */
/*0190*/ IMAD.WIDE.U32 R2, R4, R3, c[0x0][0x178] ; /* 0x00005e0004027625 */
/* 0x000fcc00078e0003 */
/*01a0*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */
/* 0x000ea4000c1e1900 */
/*01b0*/ ISETP.NE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x004fda0003f05270 */
/*01c0*/ @P0 BRA 0x210 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*01d0*/ LEA R2, P0, R4, c[0x0][0x160], 0x2 ; /* 0x0000580004027a11 */
/* 0x000fc800078010ff */
/*01e0*/ LEA.HI.X R3, R4, c[0x0][0x164], RZ, 0x2, P0 ; /* 0x0000590004037a11 */
/* 0x000fca00000f14ff */
/*01f0*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */
/* 0x000ea4000c1e1900 */
/*0200*/ IMNMX R5, R5, R2, PT ; /* 0x0000000205057217 */
/* 0x024fe40003800200 */
/*0210*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0220*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ; /* 0x000000013f047899 */
/* 0x000fe20008011604 */
/*0230*/ STS [R8.X4], R5 ; /* 0x0000000508007388 */
/* 0x0203e80000004800 */
/*0240*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0250*/ ISETP.NE.AND P1, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */
/* 0x000fe4000bf25270 */
/*0260*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fd60003f05270 */
/*0270*/ @!P1 BRA 0x330 ; /* 0x000000b000009947 */
/* 0x000fea0003800000 */
/*0280*/ IMAD.SHL.U32 R0, R8, 0x4, RZ ; /* 0x0000000408007824 */
/* 0x002fe400078e00ff */
/*0290*/ IMAD.U32 R3, RZ, RZ, UR4 ; /* 0x00000004ff037e24 */
/* 0x001fca000f8e00ff */
/*02a0*/ ISETP.GE.U32.AND P1, PT, R8, R3, PT ; /* 0x000000030800720c */
/* 0x000fda0003f26070 */
/*02b0*/ @!P1 IMAD R2, R3, 0x4, R0 ; /* 0x0000000403029824 */
/* 0x000fe200078e0200 */
/*02c0*/ SHF.R.U32.HI R3, RZ, 0x1, R3 ; /* 0x00000001ff037819 */
/* 0x000fca0000011603 */
/*02d0*/ @!P1 LDS R2, [R2] ; /* 0x0000000002029984 */
/* 0x000e240000000800 */
/*02e0*/ @!P1 IMNMX R5, R5, R2, PT ; /* 0x0000000205059217 */
/* 0x001fca0003800200 */
/*02f0*/ @!P1 STS [R8.X4], R5 ; /* 0x0000000508009388 */
/* 0x0001e80000004800 */
/*0300*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0310*/ ISETP.NE.AND P1, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fda0003f25270 */
/*0320*/ @P1 BRA 0x2a0 ; /* 0xffffff7000001947 */
/* 0x001fea000383ffff */
/*0330*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x002fea0003800000 */
/*0340*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x001fc800078e00ff */
/*0350*/ IMAD.WIDE.U32 R2, R6, R3, c[0x0][0x168] ; /* 0x00005a0006027625 */
/* 0x000fca00078e0003 */
/*0360*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101906 */
/*0370*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0380*/ BRA 0x380; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0400*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0410*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0420*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0430*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z6UpdatePiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0080*/ IMAD.WIDE R2, R0, R5, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fc800078e0205 */
/*0090*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fe200078e0205 */
/*00a0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x0001e8000c101904 */
/*00b0*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */
/* 0x000ea4000c1e1900 */
/*00c0*/ ISETP.NE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x004fda0003f05270 */
/*00d0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00e0*/ SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff077819 */
/* 0x001fe40000011400 */
/*00f0*/ LEA R6, P0, R0, c[0x0][0x170], 0x2 ; /* 0x00005c0000067a11 */
/* 0x000fc800078010ff */
/*0100*/ LEA.HI.X R7, R0, c[0x0][0x174], R7, 0x2, P0 ; /* 0x00005d0000077a11 */
/* 0x000fca00000f1407 */
/*0110*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea4000c1e1900 */
/*0120*/ ISETP.GT.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */
/* 0x004fda0003f04270 */
/*0130*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0140*/ IMAD.MOV.U32 R7, RZ, RZ, 0x1 ; /* 0x00000001ff077424 */
/* 0x000fe200078e00ff */
/*0150*/ STG.E [R4.64], RZ ; /* 0x000000ff04007986 */
/* 0x000fe8000c101904 */
/*0160*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe2000c101904 */
/*0170*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0180*/ BRA 0x180; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z5RelaxPiS_S_S_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x188], PT ; /* 0x0000620000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0080*/ IMAD.WIDE R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fcc00078e0203 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea4000c1e1900 */
/*00a0*/ ISETP.NE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x004fda0003f05270 */
/*00b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00c0*/ IMAD.SHL.U32 R4, R0, 0x4, RZ ; /* 0x0000000400047824 */
/* 0x000fe200078e00ff */
/*00d0*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fc80000011400 */
/*00e0*/ SHF.L.U64.HI R6, R0, 0x2, R3 ; /* 0x0000000200067819 */
/* 0x000fe40000010203 */
/*00f0*/ IADD3 R2, P0, R4, c[0x0][0x178], RZ ; /* 0x00005e0004027a10 */
/* 0x000fc80007f1e0ff */
/*0100*/ IADD3.X R3, R6, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f0006037a10 */
/* 0x000fca00007fe4ff */
/*0110*/ LDG.E R0, [R2.64+0x4] ; /* 0x0000040402007981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */
/* 0x000ea4000c1e1900 */
/*0130*/ ISETP.GE.AND P0, PT, R5, R0, PT ; /* 0x000000000500720c */
/* 0x004fc80003f06270 */
/*0140*/ ISETP.GE.OR P0, PT, R5, c[0x0][0x18c], P0 ; /* 0x0000630005007a0c */
/* 0x000fda0000706670 */
/*0150*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R4, P0, R4, c[0x0][0x170], RZ ; /* 0x00005c0004047a10 */
/* 0x000fe20007f1e0ff */
/*0170*/ IMAD.MOV.U32 R10, RZ, RZ, R5 ; /* 0x000000ffff0a7224 */
/* 0x000fc600078e0005 */
/*0180*/ IADD3.X R5, R6, c[0x0][0x174], RZ, P0, !PT ; /* 0x00005d0006057a10 */
/* 0x000fe400007fe4ff */
/*0190*/ IMAD.MOV.U32 R8, RZ, RZ, 0x4 ; /* 0x00000004ff087424 */
/* 0x000fc800078e00ff */
/*01a0*/ IMAD.WIDE R6, R10, R8, c[0x0][0x180] ; /* 0x000060000a067625 */
/* 0x001fcc00078e0208 */
/*01b0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ea4000c1e1900 */
/*01c0*/ IMAD.WIDE R8, R7, R8, c[0x0][0x160] ; /* 0x0000580007087625 */
/* 0x004fcc00078e0208 */
/*01d0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea2000c1e1900 */
/*01e0*/ IADD3 R10, R10, 0x1, RZ ; /* 0x000000010a0a7810 */
/* 0x000fe20007ffe0ff */
/*01f0*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0200*/ BSSY B0, 0x2c0 ; /* 0x000000b000007945 */
/* 0x000fe40003800000 */
/*0210*/ ISETP.GE.AND P0, PT, R10, c[0x0][0x18c], PT ; /* 0x000063000a007a0c */
/* 0x000fe40003f06270 */
/*0220*/ ISETP.NE.AND P1, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x004fda0003f25270 */
/*0230*/ @P1 BRA 0x2b0 ; /* 0x0000007000001947 */
/* 0x000fea0003800000 */
/*0240*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */
/* 0x000ea2000c1e1900 */
/*0250*/ SHF.R.S32.HI R8, RZ, 0x1f, R7 ; /* 0x0000001fff087819 */
/* 0x000fe40000011407 */
/*0260*/ LEA R6, P1, R7, c[0x0][0x170], 0x2 ; /* 0x00005c0007067a11 */
/* 0x000fc800078210ff */
/*0270*/ LEA.HI.X R7, R7, c[0x0][0x174], R8, 0x2, P1 ; /* 0x00005d0007077a11 */
/* 0x000fe400008f1408 */
/*0280*/ IADD3 R9, R0, 0x1, RZ ; /* 0x0000000100097810 */
/* 0x004fca0007ffe0ff */
/*0290*/ RED.E.MIN.S32.STRONG.GPU [R6.64], R9 ; /* 0x000000090600798e */
/* 0x0001e8000c90e384 */
/*02a0*/ LDG.E R0, [R2.64+0x4] ; /* 0x0000040402007981 */
/* 0x000164000c1e1900 */
/*02b0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02c0*/ ISETP.LT.AND P1, PT, R10, R0, PT ; /* 0x000000000a00720c */
/* 0x020fda0003f21270 */
/*02d0*/ @!P0 BRA P1, 0x190 ; /* 0xfffffeb000008947 */
/* 0x000fea000083ffff */
/*02e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02f0*/ BRA 0x2f0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z13InitializeGPUPiS_S_S_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x18c], PT ; /* 0x0000630006007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */
/* 0x000fe200078e00ff */
/*0070*/ ISETP.NE.AND P0, PT, R6.reuse, c[0x0][0x188], PT ; /* 0x0000620006007a0c */
/* 0x040fe20003f05270 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0090*/ ISETP.NE.AND P1, PT, R6.reuse, c[0x0][0x188], PT ; /* 0x0000620006007a0c */
/* 0x040fe20003f25270 */
/*00a0*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x170] ; /* 0x00005c0006027625 */
/* 0x0c0fe200078e0207 */
/*00b0*/ SEL R9, RZ, 0x1, !P0 ; /* 0x00000001ff097807 */
/* 0x000fe40004000000 */
/*00c0*/ SEL R11, RZ, 0x1, P1 ; /* 0x00000001ff0b7807 */
/* 0x000fe20000800000 */
/*00d0*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x178] ; /* 0x00005e0006047625 */
/* 0x0c0fe200078e0207 */
/*00e0*/ SEL R13, RZ, 0x7ffffffe, !P1 ; /* 0x7ffffffeff0d7807 */
/* 0x000fe20004800000 */
/*00f0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe4000c101904 */
/*0100*/ IMAD.WIDE R6, R6, R7, c[0x0][0x180] ; /* 0x0000600006067625 */
/* 0x000fc400078e0207 */
/*0110*/ STG.E [R4.64], R11 ; /* 0x0000000b04007986 */
/* 0x000fe8000c101904 */
/*0120*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x000fe2000c101904 */
/*0130*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0140*/ BRA 0x140; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
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