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# Using a regex for set_io_pin_constraint -names
Tool: Pin Placer
Subcategory: Usage question
## Conversation
### oharboe
How can I get a list of the names of the pins, such that I can pass in a list of names to set_io_pin_constraint that match a regex?
Something like:
```
set_io_pin_constraint ... -names [lsearch -all -inline $pins $regex]
```
Answering myself..
This will do it:
```
proc match_pins { regex } {
set pins {}
foreach pin [sta::find_port_pins_matching $regex 1 0] {
lappend pins [get_property $pin name]
}
return $pins
}
set_io_pin_constraint -region top:* -pin_names [match_pins someregex]
```
### maliberty
See discussion in https://github.com/The-OpenROAD-Project/OpenROAD/pull/2839
### maliberty
The point being there isn't a default mechanism right now but rather a discussion of how best to do it. get_pins will return a list of pins objects rather than names. You could convert them to names or you could use the odb APIs to traverse the db yourself.
### oharboe
This will do it:
```
set_io_pin_constraint ... -names [sta::find_port_pins_matching $regex 1 0]
```
### maliberty
What do you mean by "verilog pin names"? Those look ok to me for instance pins
### maliberty
Perhaps you want get_ports? I would call those port names as Verilog includes the instance pins as well.
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