# how to fix metal spacing DRCs

Tool: Detailed Routing

Subcategory: DRC violation

## Conversation

### gkamendje
After 64 iterations DRT stopped on my design a generated a DRC report. It turns out that most of the DRC are related to METAL1 spacing  (with net VSS) and Metal SpacingTableTw. The design is not very congested so I wonder why the tool could not fix these rules. Could it be that I am missing something here (maybe something in my platform definition)? Is there a way to fix these violations? 
![image](https://github.com/The-OpenROAD-Project/OpenROAD/assets/56942214/af73acfe-92fb-4590-baaf-31be8548e95e)

![image](https://github.com/The-OpenROAD-Project/OpenROAD/assets/56942214/4ed7f795-fef7-4d49-9f78-76b85c9cae37)



### maliberty
Can you provide a test case?  

### maliberty
You have very wide METAL1 power stripes:

![image](https://github.com/The-OpenROAD-Project/OpenROAD/assets/761514/ec146977-bcb3-4725-8140-4bef3c0137ef)

The pin is less than the min space (0.19 < 0.23) from the stripe so there is always going to be a DRC error here.   You need to adjust your PDN definition to be resolve this.