Datasets:
Formats:
csv
Size:
1K - 10K
ArXiv:
Tags:
electronic-design-automation
chip-placement
physical-design
ppa-prediction
timing-analysis
graph-neural-networks
License:
Clean up
Browse files- README.md +19 -46
- release_manifest.json +25 -93
- samples.csv +0 -0
- samples.jsonl +0 -0
README.md
CHANGED
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@@ -38,8 +38,8 @@ complete mixed-size DREAMPlace placements with post-global-routing timing,
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power, and area labels produced by a consistent ChiPBench/OpenROAD flow.
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The dataset supports research on post-route PPA prediction, placement ranking,
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-
cross-circuit generalization, learned placement objectives, and
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-
electronic design automation.
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## At a glance
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@@ -52,12 +52,11 @@ electronic design automation.
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| Post-GRT targets | WNS, TNS, total power, core area |
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| Paper | Accepted at **ICCAD 2026** |
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| Paper preprint | [`arXiv:2608.13790`](https://arxiv.org/abs/2608.13790) |
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| Compressed download |
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| Certified source payload | 198,591,827,060 bytes (**184.95 GiB**) |
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Every pair consists of one final placement DEF and its matching OpenROAD label
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JSON. `samples.csv` and `samples.jsonl` provide a lightweight 5,000-row index
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-
with paths, labels, generation
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## Why this dataset
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@@ -65,11 +64,11 @@ with paths, labels, generation hyperparameters, byte counts, and hashes.
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not a placement-only proxy.
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- **Complete placement state:** DEFs contain macros and standard cells, which
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enables full mixed-size spatial features.
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-
- **Controlled diversity:** placements
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DREAMPlace configurations and
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- **Balanced circuits:** every circuit contributes exactly 500
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- **
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-
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## Circuits
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@@ -86,9 +85,6 @@ with paths, labels, generation hyperparameters, byte counts, and hashes.
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| `swerv_wrapper43` | 500 | 500 | 0.54 GiB |
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| `vga_lcd` | 500 | 500 | 0.70 GiB |
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Per-archive hashes are intentionally kept in `SHA256SUMS` instead of this
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overview table.
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## Labels and sample index
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| PPAPlace target | OpenROAD field | Meaning |
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| `power` | `globalroute__power__total` | Estimated total power |
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| `area` | `globalroute__design__core__area` | Core area |
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The root `samples.csv` is directly previewable on Hugging Face. Each row
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hyperparameters, random seed, and
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## Download
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@@ -118,11 +114,11 @@ hf download ValleyC/PPAPlace-5000 \
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--local-dir data/PPAPlace-5000
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```
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Or download one circuit
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```bash
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hf download ValleyC/PPAPlace-5000 \
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data/bp_fe.tar.zst samples.csv
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--repo-type dataset \
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--local-dir data/PPAPlace-5000
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```
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@@ -139,7 +135,6 @@ snapshot_download(
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allow_patterns=[
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"README.md",
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"samples.csv",
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"SHA256SUMS",
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"data/bp_fe.tar.zst",
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],
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)
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DREAMPlace configurations. It ran mixed-size global placement, macro
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legalization, and a standard-cell-only placement pass, followed by the
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ChiPBench/OpenROAD post-GRT flow. The selector retained exactly 500 candidates
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with complete DEF/label pairs and
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Macros are marked `FIXED` only during the third pass so standard cells can be
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placed around that candidate's legalized macro solution. Macro coordinates are
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-
not fixed across samples.
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inputs, non-collapsed spatial channels, and measurable movement by every
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The generation
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published in the
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[PPAPlace repository](https://github.com/ValleyC/PPAPlace).
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## Integrity and reproducibility
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-
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Verify the downloaded release with:
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```bash
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cd data/PPAPlace-5000
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sha256sum -c SHA256SUMS
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```
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-
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Important integrity records include:
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-
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- `release_manifest.json`: archive counts, sizes, and hashes.
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- `metadata/certificate.json`: immutable exact-5,000 certificate.
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- `metadata/snapshot_artifacts.json`: every DEF and label byte count/hash.
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- `metadata/exact5000_independent_audit.json`: independent final audit.
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- `metadata/tensor_audit.json`: model-input/content validation.
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-
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Every circuit archive was decompressed after creation and compared
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byte-for-byte with the certified source inventory. The certified aggregate
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content SHA-256 is
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`f51ba91e7da337518c4f0c00738157a1d51bb22ce094ff15ce7e6de8b4a1eea4`.
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-
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## Provenance and license
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This dataset is marked `license: other` because its generated placement DEFs
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power, and area labels produced by a consistent ChiPBench/OpenROAD flow.
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The dataset supports research on post-route PPA prediction, placement ranking,
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+
cross-circuit generalization, learned placement objectives, and machine
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+
learning for electronic design automation.
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## At a glance
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|
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|
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| Post-GRT targets | WNS, TNS, total power, core area |
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| Paper | Accepted at **ICCAD 2026** |
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| Paper preprint | [`arXiv:2608.13790`](https://arxiv.org/abs/2608.13790) |
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+
| Compressed download | **8.47 GiB** |
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Every pair consists of one final placement DEF and its matching OpenROAD label
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JSON. `samples.csv` and `samples.jsonl` provide a lightweight 5,000-row index
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+
with archive paths, labels, generation parameters, and file sizes.
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## Why this dataset
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not a placement-only proxy.
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- **Complete placement state:** DEFs contain macros and standard cells, which
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| 66 |
enables full mixed-size spatial features.
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| 67 |
+
- **Controlled diversity:** placements come from deterministic randomized
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+
DREAMPlace configurations and contain distinct macro placements.
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+
- **Balanced circuits:** every circuit contributes exactly 500 pairs.
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- **Ready for training:** the sample indexes expose the target values and the
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corresponding archive members directly.
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## Circuits
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| `swerv_wrapper43` | 500 | 500 | 0.54 GiB |
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| `vga_lcd` | 500 | 500 | 0.70 GiB |
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## Labels and sample index
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| PPAPlace target | OpenROAD field | Meaning |
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| `power` | `globalroute__power__total` | Estimated total power |
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| `area` | `globalroute__design__core__area` | Core area |
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+
The root `samples.csv` is directly previewable on Hugging Face. Each row records
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the circuit, configuration ID, archive member paths, file sizes, DREAMPlace
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hyperparameters, random seed, and post-GRT labels.
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## Download
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--local-dir data/PPAPlace-5000
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```
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Or download one circuit and the sample index:
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```bash
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hf download ValleyC/PPAPlace-5000 \
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+
data/bp_fe.tar.zst samples.csv \
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--repo-type dataset \
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--local-dir data/PPAPlace-5000
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```
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allow_patterns=[
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"README.md",
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"samples.csv",
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"data/bp_fe.tar.zst",
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],
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)
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DREAMPlace configurations. It ran mixed-size global placement, macro
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legalization, and a standard-cell-only placement pass, followed by the
|
| 192 |
ChiPBench/OpenROAD post-GRT flow. The selector retained exactly 500 candidates
|
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+
with complete DEF/label pairs and different macro placements.
|
| 194 |
|
| 195 |
Macros are marked `FIXED` only during the third pass so standard cells can be
|
| 196 |
placed around that candidate's legalized macro solution. Macro coordinates are
|
| 197 |
+
not fixed across samples. The final corpus checks confirmed different combined
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+
model inputs, non-collapsed spatial channels, and measurable movement by every
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+
macro.
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+
The generation and selection tools are published in the
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[PPAPlace repository](https://github.com/ValleyC/PPAPlace).
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## Provenance and license
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This dataset is marked `license: other` because its generated placement DEFs
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release_manifest.json
CHANGED
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@@ -1,146 +1,78 @@
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{
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"archives": [
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{
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"archive_bytes": 217828692,
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-
"circuit": "bp_be12",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 5397572379,
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-
"verified_at_utc": "2026-08-18T15:13:33.386656+00:00"
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},
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{
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"archive": "data/bp_fe.tar.zst",
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"archive_bytes": 185780392,
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-
"archive_sha256": "b9ca630ff311cc2925247e27a80e46fbebf786f7364cc5840e177548b757e933",
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-
"circuit": "bp_fe",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 4528855968,
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-
"verified_at_utc": "2026-08-18T15:14:24.398923+00:00"
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},
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{
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"archive": "data/bp_multi.tar.zst",
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"archive_bytes": 961603967,
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"archive_sha256": "23071960c668e6d2b0f91f77bcfa5ce8bb335650c46589baf19e3c87c09927b6",
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-
"circuit": "bp_multi",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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"passed": true,
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"source_bytes": 27346138383,
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{
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"archive": "data/dft68.tar.zst",
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"archive_bytes": 239888805,
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"archive_sha256": "fac0d1c1486100ef81b8ccf986b20a44948192e73a62821af7885fcc9becf102",
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-
"circuit": "dft68",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 5658359369,
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-
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},
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{
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"archive": "data/ethernet.tar.zst",
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"archive_bytes": 197268554,
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"archive_sha256": "343b8d2a8ea0284aa7ebca570d1043a300614499d9a3420f5bbe704db8e1786b",
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"circuit": "ethernet",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 4545804129,
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-
"verified_at_utc": "2026-08-18T15:21:30.796121+00:00"
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},
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{
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"archive": "data/isa_npu.tar.zst",
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"archive_bytes": 5333377170,
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"archive_sha256": "f9e2ee8b04818c3a3f00a97d6239106494a97d76b742769f6559c43c0bc8152e",
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-
"circuit": "isa_npu",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 103240017423,
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-
"verified_at_utc": "2026-08-18T15:45:23.411513+00:00"
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},
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{
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"archive": "data/mor1kx.tar.zst",
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"archive_bytes": 474631446,
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"archive_sha256": "cef3034871f596386fa5a1e003a2e51d3e2b5a150cabf6f585bcf1a3046a407a",
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-
"circuit": "mor1kx",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 17637119843,
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-
"verified_at_utc": "2026-08-18T15:48:07.117507+00:00"
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},
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{
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"archive": "data/or1200.tar.zst",
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"archive_bytes": 153941735,
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-
"archive_sha256": "b7c7d025b41b4029f568a498455e46c5464f993fb92bfe6ac14404198ba40009",
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-
"circuit": "or1200",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 4142724047,
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-
"verified_at_utc": "2026-08-18T15:48:52.397620+00:00"
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{
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"archive": "data/swerv_wrapper43.tar.zst",
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"archive_bytes": 579928858,
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-
"archive_sha256": "c1b0cf03640b2297bddf698bc82888cbeec6703c05983f2518bae4e02598f938",
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-
"circuit": "swerv_wrapper43",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 13038550670,
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-
"verified_at_utc": "2026-08-18T15:51:28.121945+00:00"
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},
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{
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"archive": "data/vga_lcd.tar.zst",
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"archive_bytes": 752574940,
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-
"archive_sha256": "234ee1dd04529b3c25c9fc41846ae3cec6c202820eb87b77ada877d17ebaeb53",
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-
"circuit": "vga_lcd",
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"def_count": 500,
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-
"label_count": 500
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-
"member_count": 1000,
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-
"passed": true,
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-
"source_bytes": 13056684849,
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-
"verified_at_utc": "2026-08-18T15:54:31.518558+00:00"
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}
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-
]
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-
"created_at_utc": "2026-08-18T15:54:31.555511+00:00",
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"dataset_name": "PPAPlace Exact-5000 Training Dataset",
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"expected_circuits": [
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"bp_be12",
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"bp_fe",
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"bp_multi",
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"dft68",
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"ethernet",
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"isa_npu",
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| 133 |
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"mor1kx",
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"or1200",
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| 135 |
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"swerv_wrapper43",
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-
"vga_lcd"
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-
],
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| 138 |
-
"pairs_per_circuit": 500,
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-
"passed": true,
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-
"schema_version": 1,
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-
"source_artifact_bytes": 198591827060,
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-
"source_artifact_content_sha256": "f51ba91e7da337518c4f0c00738157a1d51bb22ce094ff15ce7e6de8b4a1eea4",
|
| 143 |
-
"source_artifact_count": 10000,
|
| 144 |
-
"source_certificate_sha256": "1b5a879fe14f6f6e99b9f7e8c7c7e65a3ebb5c228762d70639953281eef67e2e",
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-
"total_pairs": 5000
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}
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{
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+
"dataset_name": "PPAPlace-5000",
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+
"schema_version": 2,
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+
"total_pairs": 5000,
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| 5 |
+
"pairs_per_circuit": 500,
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"archives": [
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| 7 |
{
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| 8 |
+
"circuit": "bp_be12",
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"archive": "data/bp_be12.tar.zst",
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"archive_bytes": 217828692,
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"def_count": 500,
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"label_count": 500
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},
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{
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| 15 |
+
"circuit": "bp_fe",
|
| 16 |
"archive": "data/bp_fe.tar.zst",
|
| 17 |
"archive_bytes": 185780392,
|
|
|
|
|
|
|
| 18 |
"def_count": 500,
|
| 19 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 20 |
},
|
| 21 |
{
|
| 22 |
+
"circuit": "bp_multi",
|
| 23 |
"archive": "data/bp_multi.tar.zst",
|
| 24 |
"archive_bytes": 961603967,
|
|
|
|
|
|
|
| 25 |
"def_count": 500,
|
| 26 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 27 |
},
|
| 28 |
{
|
| 29 |
+
"circuit": "dft68",
|
| 30 |
"archive": "data/dft68.tar.zst",
|
| 31 |
"archive_bytes": 239888805,
|
|
|
|
|
|
|
| 32 |
"def_count": 500,
|
| 33 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 34 |
},
|
| 35 |
{
|
| 36 |
+
"circuit": "ethernet",
|
| 37 |
"archive": "data/ethernet.tar.zst",
|
| 38 |
"archive_bytes": 197268554,
|
|
|
|
|
|
|
| 39 |
"def_count": 500,
|
| 40 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 41 |
},
|
| 42 |
{
|
| 43 |
+
"circuit": "isa_npu",
|
| 44 |
"archive": "data/isa_npu.tar.zst",
|
| 45 |
"archive_bytes": 5333377170,
|
|
|
|
|
|
|
| 46 |
"def_count": 500,
|
| 47 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 48 |
},
|
| 49 |
{
|
| 50 |
+
"circuit": "mor1kx",
|
| 51 |
"archive": "data/mor1kx.tar.zst",
|
| 52 |
"archive_bytes": 474631446,
|
|
|
|
|
|
|
| 53 |
"def_count": 500,
|
| 54 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 55 |
},
|
| 56 |
{
|
| 57 |
+
"circuit": "or1200",
|
| 58 |
"archive": "data/or1200.tar.zst",
|
| 59 |
"archive_bytes": 153941735,
|
|
|
|
|
|
|
| 60 |
"def_count": 500,
|
| 61 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 62 |
},
|
| 63 |
{
|
| 64 |
+
"circuit": "swerv_wrapper43",
|
| 65 |
"archive": "data/swerv_wrapper43.tar.zst",
|
| 66 |
"archive_bytes": 579928858,
|
|
|
|
|
|
|
| 67 |
"def_count": 500,
|
| 68 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 69 |
},
|
| 70 |
{
|
| 71 |
+
"circuit": "vga_lcd",
|
| 72 |
"archive": "data/vga_lcd.tar.zst",
|
| 73 |
"archive_bytes": 752574940,
|
|
|
|
|
|
|
| 74 |
"def_count": 500,
|
| 75 |
+
"label_count": 500
|
|
|
|
|
|
|
|
|
|
|
|
|
| 76 |
}
|
| 77 |
+
]
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 78 |
}
|
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