uid int64 2 114k | input stringlengths 101 58.4k | output stringlengths 422 72.4k | input_tokens int64 24 31.2k | output_tokens int64 182 31.2k |
|---|---|---|---|---|
2 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z8MyKernelPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R2, SR_TID.X ;
S2R R3, SR_CTAID.X ;
IMAD R2, R3, c[0x0][0x0],... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8MyKernelPii ; -- Begin function _Z8MyKernelPii
.globl _Z8MyKernelPii
.p2align 8
.type _Z8MyKernelPii,@function
_Z8MyKernelPii: ; @_Z8MyKernelPii
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b3... | 319 | 2,342 |
3 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00122270_00000000-6_occupancy.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cud... | ```amdasm
.text
.file "occupancy.hip"
.globl _Z23__device_stub__MyKernelPii # -- Begin function _Z23__device_stub__MyKernelPii
.type _Z23__device_stub__MyKernelPii,@function
_Z23__device_stub__MyKernelPii: # @_Z23__device_stub__MyKernelPii
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq... | 3,445 | 2,809 |
4 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z10matrix_addPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R0, SR_TID.X ;
HFMA2.MMA R7, -RZ, RZ, 0, 2.3841857910... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10matrix_addPKfS0_Pf ; -- Begin function _Z10matrix_addPKfS0_Pf
.globl _Z10matrix_addPKfS0_Pf
.p2align 8
.type _Z10matrix_addPKfS0_Pf,@function
_Z10matrix_addPKfS0_Pf: ; @_Z10matrix_addPKfS0_Pf
; %bb.0:
s_clause 0x1
s_load... | 426 | 2,589 |
5 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00124e24_00000000-6_adder.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFat... | ```amdasm
.text
.file "adder.hip"
.globl _Z25__device_stub__matrix_addPKfS0_Pf # -- Begin function _Z25__device_stub__matrix_addPKfS0_Pf
.type _Z25__device_stub__matrix_addPKfS0_Pf,@function
_Z25__device_stub__matrix_addPKfS0_Pf: # @_Z25__device_stub__matrix_addPKfS0_Pf
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_d... | 5,103 | 5,531 |
8 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : kernel
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ;
ULDC.64 UR4, c[... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected kernel ; -- Begin function kernel
.globl kernel
.p2align 8
.type kernel,@function
kernel: ; @kernel
; %bb.0:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x34
v_bfe_u... | 3,587 | 4,111 |
9 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_001780a1_00000000-6_mandel_brot_kernel.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _... | ```amdasm
.text
.file "mandel_brot_kernel.hip"
.globl __device_stub__kernel # -- Begin function __device_stub__kernel
.type __device_stub__kernel,@function
__device_stub__kernel: # @__device_stub__kernel
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cf... | 1,915 | 1,961 |
10 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z10kernel_addPKfS0_iPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R0, SR_CTAID.X ;
S2R R3, SR_TID.X ;
IMAD R0, R0, c[0... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10kernel_addPKfS0_iPf ; -- Begin function _Z10kernel_addPKfS0_iPf
.globl _Z10kernel_addPKfS0_iPf
.p2align 8
.type _Z10kernel_addPKfS0_iPf,@function
_Z10kernel_addPKfS0_iPf: ; @_Z10kernel_addPKfS0_iPf
; %bb.0:
s_clause 0x1
s_... | 472 | 2,816 |
11 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0005fcf2_00000000-6_kernel_add.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "kernel_add.hip"
.globl _Z25__device_stub__kernel_addPKfS0_iPf # -- Begin function _Z25__device_stub__kernel_addPKfS0_iPf
.type _Z25__device_stub__kernel_addPKfS0_iPf,@function
_Z25__device_stub__kernel_addPKfS0_iPf: # @_Z25__device_stub__kernel_addPKfS0_iPf
.cfi_startproc
# %bb.0:
pushq %r1... | 2,111 | 2,117 |
12 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z20sum_Matrices_columnaPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R2, SR_CTAID.Y ;
S2R R3, SR_... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19sum_Matrices_NormalPiS_S_ ; -- Begin function _Z19sum_Matrices_NormalPiS_S_
.globl _Z19sum_Matrices_NormalPiS_S_
.p2align 8
.type _Z19sum_Matrices_NormalPiS_S_,@function
_Z19sum_Matrices_NormalPiS_S_: ; @_Z19sum_Matrices_NormalPiS... | 3,649 | 8,081 |
13 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0002ae34_00000000-6_sum.cudafe1.cpp"
.text
.globl _ZSt21ios_base_library_initv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def... | ```amdasm
.text
.file "sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z34__device_stub__sum_Matrices_NormalPiS_S_ # -- Begin function _Z34__device_stub__su... | 7,547 | 8,180 |
16 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
17 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000d7a49_00000000-6_cuda_syn_block.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20... | ```amdasm
.text
.file "cuda_syn_block.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c9... | 922 | 185 |
18 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z15calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R34, SR_TID.... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i ; -- Begin function _Z15calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i
.globl _Z15calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i
.p2align 8
.type _Z15calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i,@function
_... | 5,743 | 7,383 |
19 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000a6892_00000000-6_sw_cuda.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaF... | ```amdasm
.text
.file "sw_cuda.hip"
.globl _Z30__device_stub__calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i # -- Begin function _Z30__device_stub__calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i
.type _Z30__device_stub__calculateMatrixPKcPiS1_S1_S1_S1_S1_S1_S1_i,@function
_Z30__device_stub__calculateMatrixPKcPiS1_S1_S1_S1_... | 5,843 | 6,480 |
20 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z24ForwardEliminationColumnPdPiS0_S0_S0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
IMAD.MOV.U32 R4, RZ, ... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24ForwardEliminationColumnPdPiS0_S0_S0_ ; -- Begin function _Z24ForwardEliminationColumnPdPiS0_S0_S0_
.globl _Z24ForwardEliminationColumnPdPiS0_S0_S0_
.p2align 8
.type _Z24ForwardEliminationColumnPdPiS0_S0_S0_,@function
_Z24ForwardEliminatio... | 4,894 | 3,974 |
21 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00046ab2_00000000-6_ForwardEliminationColumn.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
... | ```amdasm
.text
.file "ForwardEliminationColumn.hip"
.globl _Z39__device_stub__ForwardEliminationColumnPdPiS0_S0_S0_ # -- Begin function _Z39__device_stub__ForwardEliminationColumnPdPiS0_S0_S0_
.type _Z39__device_stub__ForwardEliminationColumnPdPiS0_S0_S0_,@function
_Z39__device_stub__ForwardEliminationColumnPdPiS0... | 2,067 | 2,236 |
22 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z26convolution_forward_kernelPfS_S_S_iiiiiif
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
ULDC UR6, c[0x0][... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26convolution_forward_kernelPfS_S_S_iiiiiif ; -- Begin function _Z26convolution_forward_kernelPfS_S_S_iiiiiif
.globl _Z26convolution_forward_kernelPfS_S_S_iiiiiif
.p2align 8
.type _Z26convolution_forward_kernelPfS_S_S_iiiiiif,@function
_Z26c... | 5,807 | 7,240 |
23 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0002129f_00000000-6_convolution_forward_kernel.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16... | ```amdasm
.text
.file "convolution_forward_kernel.hip"
.globl _Z41__device_stub__convolution_forward_kernelPfS_S_S_iiiiiif # -- Begin function _Z41__device_stub__convolution_forward_kernelPfS_S_S_iiiiiif
.type _Z41__device_stub__convolution_forward_kernelPfS_S_S_iiiiiif,@function
_Z41__device_stub__convolution_forw... | 2,355 | 2,412 |
24 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
25 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00073149_00000000-6_cudasift.cudafe1.cpp"
.text
.globl _ZSt21ios_base_library_initv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cf... | ```amdasm
.text
.file "cudasift.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.type main,@function
ma... | 1,630 | 953 |
26 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z12jacobikernelPfS_S_iifffi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R0, SR_TID.X ;
IMAD.MOV.U32 R8... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12jacobikernelPfS_S_iifffi ; -- Begin function _Z12jacobikernelPfS_S_iifffi
.globl _Z12jacobikernelPfS_S_iifffi
.p2align 8
.type _Z12jacobikernelPfS_S_iifffi,@function
_Z12jacobikernelPfS_S_iifffi: ; @_Z12jacobikernelPfS_S_iifffi
;... | 4,286 | 6,296 |
27 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000ca89e_00000000-6_Neeraja_1k_GFLOPS.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _Z... | ```amdasm
.text
.file "Neeraja_1k_GFLOPS.hip"
.globl _Z27__device_stub__jacobikernelPfS_S_iifffi # -- Begin function _Z27__device_stub__jacobikernelPfS_S_iifffi
.type _Z27__device_stub__jacobikernelPfS_S_iifffi,@function
_Z27__device_stub__jacobikernelPfS_S_iifffi: # @_Z27__device_stub__jacobikernelPfS_S_iifffi
.c... | 6,623 | 7,469 |
28 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z11myMatrixAddiPjS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R4, SR_CTAID.X ;
HFMA2.MMA R5, -RZ, RZ, 0, 2.3841857910... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11myMatrixMuliPjS_S_ ; -- Begin function _Z11myMatrixMuliPjS_S_
.globl _Z11myMatrixMuliPjS_S_
.p2align 8
.type _Z11myMatrixMuliPjS_S_,@function
_Z11myMatrixMuliPjS_S_: ; @_Z11myMatrixMuliPjS_S_
; %bb.0:
s_clause 0x1
s_load... | 3,803 | 6,062 |
29 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000e96c3_00000000-6_main.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatC... | ```amdasm
.text
.file "main.hip"
.globl _Z7CeilDivii # -- Begin function _Z7CeilDivii
.type _Z7CeilDivii,@function
_Z7CeilDivii: # @_Z7CeilDivii
.cfi_startproc
# %bb.0:
# kill: def $edi killed $edi def $rdi
leal -1(%rdi), %eax
c... | 7,156 | 9,138 |
30 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z3sumPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R8, SR_CTAID.X ;
HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-0... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3sumPfS_S_ ; -- Begin function _Z3sumPfS_S_
.globl _Z3sumPfS_S_
.p2align 8
.type _Z3sumPfS_S_,@function
_Z3sumPfS_S_: ; @_Z3sumPfS_S_
; %bb.0:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b128 s[4:7... | 784 | 2,977 |
31 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0016bda3_00000000-6_CUDA_homework2.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20... | ```amdasm
.text
.file "CUDA_homework2.hip"
.globl _Z18__device_stub__sumPfS_S_ # -- Begin function _Z18__device_stub__sumPfS_S_
.type _Z18__device_stub__sumPfS_S_,@function
_Z18__device_stub__sumPfS_S_: # @_Z18__device_stub__sumPfS_S_
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq ... | 2,973 | 3,153 |
32 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
33 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0011d53c_00000000-6_pipelined_merge_sort.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq... | ```amdasm
.text
.file "pipelined_merge_sort.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf... | 750 | 187 |
36 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z6VecAddPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R6, SR_TID.X ;
HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6VecAddPfS_S_ ; -- Begin function _Z6VecAddPfS_S_
.globl _Z6VecAddPfS_S_
.p2align 8
.type _Z6VecAddPfS_S_,@function
_Z6VecAddPfS_S_: ; @_Z6VecAddPfS_S_
; %bb.0:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e... | 324 | 1,784 |
37 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000a6ee2_00000000-6_vec_add.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaF... | ```amdasm
.text
.file "vec_add.hip"
.globl _Z21__device_stub__VecAddPfS_S_ # -- Begin function _Z21__device_stub__VecAddPfS_S_
.type _Z21__device_stub__VecAddPfS_S_,@function
_Z21__device_stub__VecAddPfS_S_: # @_Z21__device_stub__VecAddPfS_S_
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
push... | 3,530 | 3,483 |
38 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _ZN8mmdeploy9operation4cuda9transposeIfEEvPKT_iiiiPS3_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R19, SR_CTAID.Y ;
S2... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i,"axG",@progbits,_ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i,comdat
.protected _ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i ; -- Begin function _ZN8mmdeploy9operat... | 3,548 | 6,181 |
39 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000c4f4e_00000000-6_transpose.cudafe1.cpp"
.text
.type _ZL69__device_stub__ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_iPKhiiiiPhi, @function
_ZL69__device_stub__ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3... | ```amdasm
.text
.file "transpose.hip"
.section .text._ZN8mmdeploy9operation4cuda9TransposeIhEEvPKT_iiiPS3_P12ihipStream_t,"axG",@progbits,_ZN8mmdeploy9operation4cuda9TransposeIhEEvPKT_iiiPS3_P12ihipStream_t,comdat
.weak _ZN8mmdeploy9operation4cuda9TransposeIhEEvPKT_iiiPS3_P12ihipStream_t # -- Begin function _ZN8mmd... | 5,670 | 6,188 |
40 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z14mandelbrot_setddddiiiPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R2, SR_CTAID.Y ;
S2R R3, SR_TID... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14mandelbrot_setddddiiiPi ; -- Begin function _Z14mandelbrot_setddddiiiPi
.globl _Z14mandelbrot_setddddiiiPi
.p2align 8
.type _Z14mandelbrot_setddddiiiPi,@function
_Z14mandelbrot_setddddiiiPi: ; @_Z14mandelbrot_setddddiiiPi
; %bb.... | 6,389 | 6,603 |
41 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000b1f83_00000000-6_mandelbrot.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "mandelbrot.hip"
.globl _Z29__device_stub__mandelbrot_setddddiiiPi # -- Begin function _Z29__device_stub__mandelbrot_setddddiiiPi
.type _Z29__device_stub__mandelbrot_setddddiiiPi,@function
_Z29__device_stub__mandelbrot_setddddiiiPi: # @_Z29__device_stub__mandelbrot_setddddiiiPi
.cfi_startproc... | 3,809 | 4,016 |
50 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z12testKernel4rPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R2, SR_CTAID.X ;
IMAD.MOV.U32 R3, RZ, ... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12testKernel4rPfS_ ; -- Begin function _Z12testKernel4rPfS_
.globl _Z12testKernel4rPfS_
.p2align 8
.type _Z12testKernel4rPfS_,@function
_Z12testKernel4rPfS_: ; @_Z12testKernel4rPfS_
; %bb.0:
s_load_b128 s[0:3], s[0:1], ... | 3,565 | 4,685 |
51 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0009a3e2_00000000-6_testKernel4r.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__... | ```amdasm
.text
.file "testKernel4r.hip"
.globl _Z27__device_stub__testKernel4rPfS_ # -- Begin function _Z27__device_stub__testKernel4rPfS_
.type _Z27__device_stub__testKernel4rPfS_,@function
_Z27__device_stub__testKernel4rPfS_: # @_Z27__device_stub__testKernel4rPfS_
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_de... | 1,818 | 2,010 |
56 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z7FW_CudaiPiS_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R5, SR_CTAID.X ;
S2R R2, SR_TID.X ;
S2R R0... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7FW_CudaiPiS_j ; -- Begin function _Z7FW_CudaiPiS_j
.globl _Z7FW_CudaiPiS_j
.p2align 8
.type _Z7FW_CudaiPiS_j,@function
_Z7FW_CudaiPiS_j: ; @_Z7FW_CudaiPiS_j
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s... | 837 | 3,259 |
57 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00017643_00000000-6_fw_cuda.cudafe1.cpp"
.text
.globl _ZSt21ios_base_library_initv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3807:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi... | ```amdasm
.text
.file "fw_cuda.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z11printMatrixPij # -- Begin function _Z11printMatrixPij
.type _Z11... | 13,100 | 16,801 |
60 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z11get_averagePfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R4, SR_TID.X ;
ISETP.GE.AND P0, PT, R... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11get_averagePfS_ii ; -- Begin function _Z11get_averagePfS_ii
.globl _Z11get_averagePfS_ii
.p2align 8
.type _Z11get_averagePfS_ii,@function
_Z11get_averagePfS_ii: ; @_Z11get_averagePfS_ii
; %bb.0:
s_load_b64 s[4:5], s[0:1... | 8,607 | 4,240 |
61 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0015a20a_00000000-6_cudaversion.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__c... | ```amdasm
.text
.file "cudaversion.hip"
.globl _Z26__device_stub__get_averagePfS_ii # -- Begin function _Z26__device_stub__get_averagePfS_ii
.type _Z26__device_stub__get_averagePfS_ii,@function
_Z26__device_stub__get_averagePfS_ii: # @_Z26__device_stub__get_averagePfS_ii
.cfi_startproc
# %bb.0:
pushq %r15
.cfi... | 4,663 | 5,300 |
64 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z31access_from_max_into_min_kernelPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
EXIT ;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z31access_from_min_into_max_kernelPiS_ ; -- Begin function _Z31access_from_min_into_max_kernelPiS_
.globl _Z31access_from_min_into_max_kernelPiS_
.p2align 8
.type _Z31access_from_min_into_max_kernelPiS_,@function
_Z31access_from_min_into_max_... | 226 | 2,900 |
65 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000d411a_00000000-6_two_array_global.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL... | ```amdasm
.text
.file "two_array_global.hip"
.globl _Z46__device_stub__access_from_min_into_max_kernelPiS_ # -- Begin function _Z46__device_stub__access_from_min_into_max_kernelPiS_
.type _Z46__device_stub__access_from_min_into_max_kernelPiS_,@function
_Z46__device_stub__access_from_min_into_max_kernelPiS_: # @_Z46... | 3,564 | 3,844 |
68 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z14actiune_threadPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R9, SR_CTAID.X ;
ISETP.LT.AND P0, PT, RZ, c[0x0][0... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14actiune_threadPfS_S_i ; -- Begin function _Z14actiune_threadPfS_S_i
.globl _Z14actiune_threadPfS_S_i
.p2align 8
.type _Z14actiune_threadPfS_S_i,@function
_Z14actiune_threadPfS_S_i: ; @_Z14actiune_threadPfS_S_i
; %bb.0:
s_clau... | 2,621 | 2,884 |
69 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000aa7e6_00000000-6_cudaCode.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cuda... | ```amdasm
.text
.file "cudaCode.hip"
.globl _Z29__device_stub__actiune_threadPfS_S_i # -- Begin function _Z29__device_stub__actiune_threadPfS_S_i
.type _Z29__device_stub__actiune_threadPfS_S_i,@function
_Z29__device_stub__actiune_threadPfS_S_i: # @_Z29__device_stub__actiune_threadPfS_S_i
.cfi_startproc
# %bb.0:
p... | 2,493 | 2,683 |
70 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z14matrixMultiplyPfS_S_iiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R5, SR_CTAID.X ;
MOV R2, c[0x0][0x180] ;
ULDC... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14matrixMultiplyPfS_S_iiiiii ; -- Begin function _Z14matrixMultiplyPfS_S_iiiiii
.globl _Z14matrixMultiplyPfS_S_iiiiii
.p2align 8
.type _Z14matrixMultiplyPfS_S_iiiiii,@function
_Z14matrixMultiplyPfS_S_iiiiii: ; @_Z14matrixMultiplyPfS_... | 1,837 | 3,996 |
71 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0002d5d2_00000000-6_matrixMultiply.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20... | ```amdasm
.text
.file "matrixMultiply.hip"
.globl _Z29__device_stub__matrixMultiplyPfS_S_iiiiii # -- Begin function _Z29__device_stub__matrixMultiplyPfS_S_iiiiii
.type _Z29__device_stub__matrixMultiplyPfS_S_iiiiii,@function
_Z29__device_stub__matrixMultiplyPfS_S_iiiiii: # @_Z29__device_stub__matrixMultiplyPfS_S_iii... | 2,217 | 2,293 |
72 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z18channelFirstKernelPhPfiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
IABS R7, c[0x0][0x178] ;
S2R R0,... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18channelFirstKernelPhPfiiii ; -- Begin function _Z18channelFirstKernelPhPfiiii
.globl _Z18channelFirstKernelPhPfiiii
.p2align 8
.type _Z18channelFirstKernelPhPfiiii,@function
_Z18channelFirstKernelPhPfiiii: ; @_Z18channelFirstKernel... | 1,515 | 4,398 |
73 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00121c33_00000000-6_channel_first.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20_... | ```amdasm
.text
.file "channel_first.hip"
.globl _Z33__device_stub__channelFirstKernelPhPfiiii # -- Begin function _Z33__device_stub__channelFirstKernelPhPfiiii
.type _Z33__device_stub__channelFirstKernelPhPfiiii,@function
_Z33__device_stub__channelFirstKernelPhPfiiii: # @_Z33__device_stub__channelFirstKernelPhPfii... | 2,831 | 3,053 |
74 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
75 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000f6830_00000000-6_hello.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFat... | ```amdasm
.text
.file "hello.hip"
.globl main # -- Begin function main
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5C8
... | 2,776 | 2,114 |
78 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z6kernelPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R5, SR_CTAID.X ;
HFMA2.MMA R2, -RZ, RZ, 0, 2.384185791015625e-07... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPi ; -- Begin function _Z6kernelPi
.globl _Z6kernelPi
.p2align 8
.type _Z6kernelPi,@function
_Z6kernelPi: ; @_Z6kernelPi
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[... | 265 | 2,169 |
79 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0000f095_00000000-6_cuda_1.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFa... | ```amdasm
.text
.file "cuda_1.hip"
.globl _Z21__device_stub__kernelPi # -- Begin function _Z21__device_stub__kernelPi
.type _Z21__device_stub__kernelPi,@function
_Z21__device_stub__kernelPi: # @_Z21__device_stub__kernelPi
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_... | 2,708 | 2,834 |
80 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z24bpnn_adjust_weights_cudaPfiS_iS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R11, SR_TID.X ;
ULDC UR4, c[0x0][0x16... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24bpnn_adjust_weights_cudaPfiS_iS_S_ ; -- Begin function _Z24bpnn_adjust_weights_cudaPfiS_iS_S_
.globl _Z24bpnn_adjust_weights_cudaPfiS_iS_S_
.p2align 8
.type _Z24bpnn_adjust_weights_cudaPfiS_iS_S_,@function
_Z24bpnn_adjust_weights_cudaPfiS_... | 1,352 | 3,916 |
81 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0011f10c_00000000-6_bpnn_adjust_weights_cuda.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
... | ```amdasm
.text
.file "bpnn_adjust_weights_cuda.hip"
.globl _Z39__device_stub__bpnn_adjust_weights_cudaPfiS_iS_S_ # -- Begin function _Z39__device_stub__bpnn_adjust_weights_cudaPfiS_iS_S_
.type _Z39__device_stub__bpnn_adjust_weights_cudaPfiS_iS_S_,@function
_Z39__device_stub__bpnn_adjust_weights_cudaPfiS_iS_S_: # @... | 2,058 | 2,237 |
84 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z3addiiPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x164] ;
MOV R2, c[0... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addiiPi ; -- Begin function _Z3addiiPi
.globl _Z3addiiPi
.p2align 8
.type _Z3addiiPi,@function
_Z3addiiPi: ; @_Z3addiiPi
; %bb.0:
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s0,... | 256 | 1,675 |
85 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0010c552_00000000-6_add.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCu... | ```amdasm
.text
.file "add.hip"
.globl _Z18__device_stub__addiiPi # -- Begin function _Z18__device_stub__addiiPi
.type _Z18__device_stub__addiiPi,@function
_Z18__device_stub__addiiPi: # @_Z18__device_stub__addiiPi
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cf... | 2,570 | 2,661 |
86 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z19calcDenseForwardGPUPfS_S_S_iiiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R0, SR_CTAID.Y ;
ULD... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19calcDenseForwardGPUPfS_S_S_iiiiiii ; -- Begin function _Z19calcDenseForwardGPUPfS_S_S_iiiiiii
.globl _Z19calcDenseForwardGPUPfS_S_S_iiiiiii
.p2align 8
.type _Z19calcDenseForwardGPUPfS_S_S_iiiiiii,@function
_Z19calcDenseForwardGPUPfS_S_S_ii... | 5,778 | 6,849 |
87 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00008dc1_00000000-6_calcDenseForwardGPU.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq ... | ```amdasm
.text
.file "calcDenseForwardGPU.hip"
.globl _Z34__device_stub__calcDenseForwardGPUPfS_S_S_iiiiiii # -- Begin function _Z34__device_stub__calcDenseForwardGPUPfS_S_S_iiiiiii
.type _Z34__device_stub__calcDenseForwardGPUPfS_S_S_iiiiiii,@function
_Z34__device_stub__calcDenseForwardGPUPfS_S_S_iiiiiii: # @_Z34_... | 2,388 | 2,420 |
88 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
89 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_001a6fc1_00000000-6_test_sort_mat.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20_... | ```amdasm
.text
.file "test_sort_mat.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI0_0:
.long 0 # 0x0
.long 1 # 0x1
.long 2 # 0x2
.long 3 ... | 3,068 | 2,715 |
90 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
91 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_001bdc9d_00000000-6_utilities.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2162:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cud... | ```amdasm
.text
.file "utilities.hip"
.globl _Z16get_current_timev # -- Begin function _Z16get_current_timev
.type _Z16get_current_timev,@function
_Z16get_current_timev: # @_Z16get_current_timev
.cfi_startproc
# %bb.0:
jmp _ZNSt6chrono3_V212system_clock3nowEv # TAILCALL
.Lfunc_end0:
.s... | 5,139 | 6,071 |
98 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
99 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000adc47_00000000-6_DeviceProperties.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL... | ```amdasm
.text
.file "DeviceProperties.hip"
.globl main # -- Begin function main
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq... | 3,676 | 3,302 |
100 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
101 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000cc553_00000000-6_rcp_fused_nchw_8.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL... | ```amdasm
.text
.file "rcp_fused_nchw_8.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55... | 752 | 190 |
104 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z9skalarProPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R7, SR_CTAID.X ;
ULDC.64 UR6, c[0x0][0x1... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9skalarProPfS_S_ ; -- Begin function _Z9skalarProPfS_S_
.globl _Z9skalarProPfS_S_
.p2align 8
.type _Z9skalarProPfS_S_,@function
_Z9skalarProPfS_S_: ; @_Z9skalarProPfS_S_
; %bb.0:
s_clause 0x2
s_load_b32 s3, s[0:1],... | 914 | 3,313 |
105 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00040088_00000000-6_skalarPro.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cud... | ```amdasm
.text
.file "skalarPro.hip"
.globl _Z24__device_stub__skalarProPfS_S_ # -- Begin function _Z24__device_stub__skalarProPfS_S_
.type _Z24__device_stub__skalarProPfS_S_,@function
_Z24__device_stub__skalarProPfS_S_: # @_Z24__device_stub__skalarProPfS_S_
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_o... | 3,589 | 4,092 |
106 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
107 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_001aa8a5_00000000-6_getInfo.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2684:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaF... | ```amdasm
.text
.file "getInfo.hip"
.globl main # -- Begin function main
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1488, %... | 2,699 | 2,070 |
108 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z9dev_add_nPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R6, SR_CTAID.X ;
ISETP.GE.AND P0, PT, R6, c[0x0][0x178],... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5set_Ni ; -- Begin function _Z5set_Ni
.globl _Z5set_Ni
.p2align 8
.type _Z5set_Ni,@function
_Z5set_Ni: ; @_Z5set_Ni
; %bb.0:
s_load_b32 s2, s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_getpc_b64 s[0:1]
s_a... | 929 | 5,234 |
109 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00197093_00000000-6_add.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCu... | ```amdasm
.text
.file "add.hip"
.globl _Z20__device_stub__set_Ni # -- Begin function _Z20__device_stub__set_Ni
.type _Z20__device_stub__set_Ni,@function
_Z20__device_stub__set_Ni: # @_Z20__device_stub__set_Ni
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_o... | 6,362 | 6,684 |
110 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z13cuComputeNormPfiiiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R12, SR_CTAID.X ;
S2R R5, SR_TID.X ;
IMAD R0, R12, ... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13cuComputeNormPfiiiS_ ; -- Begin function _Z13cuComputeNormPfiiiS_
.globl _Z13cuComputeNormPfiiiS_
.p2align 8
.type _Z13cuComputeNormPfiiiS_,@function
_Z13cuComputeNormPfiiiS_: ; @_Z13cuComputeNormPfiiiS_
; %bb.0:
s_clause 0x... | 1,286 | 2,849 |
111 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000cc80f_00000000-6_cuComputeNorm.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20_... | ```amdasm
.text
.file "cuComputeNorm.hip"
.globl _Z28__device_stub__cuComputeNormPfiiiS_ # -- Begin function _Z28__device_stub__cuComputeNormPfiiiS_
.type _Z28__device_stub__cuComputeNormPfiiiS_,@function
_Z28__device_stub__cuComputeNormPfiiiS_: # @_Z28__device_stub__cuComputeNormPfiiiS_
.cfi_startproc
# %bb.0:
p... | 1,937 | 2,123 |
112 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z12file1_kerneliRi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
IMAD.MOV R5, RZ, RZ, -c[0x0][0x160] ;
MOV R... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12file1_kerneliRi ; -- Begin function _Z12file1_kerneliRi
.globl _Z12file1_kerneliRi
.p2align 8
.type _Z12file1_kerneliRi,@function
_Z12file1_kerneliRi: ; @_Z12file1_kerneliRi
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0... | 220 | 1,718 |
113 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000fbb7a_00000000-6_file1.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFat... | ```amdasm
.text
.file "file1.hip"
.globl _Z27__device_stub__file1_kerneliRi # -- Begin function _Z27__device_stub__file1_kerneliRi
.type _Z27__device_stub__file1_kerneliRi,@function
_Z27__device_stub__file1_kerneliRi: # @_Z27__device_stub__file1_kerneliRi
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offse... | 2,287 | 2,487 |
114 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z5printv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R8, SR_TID.X ;
IADD3 R1, R1, -0x8, RZ ;
IMAD.MOV.... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5printv ; -- Begin function _Z5printv
.globl _Z5printv
.p2align 8
.type _Z5printv,@function
_Z5printv: ; @_Z5printv
; %bb.0:
s_load_b64 s[2:3], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v31, -1, 0
v_mov_b3... | 402 | 29,052 |
115 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00190aa8_00000000-6_first_cuda.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "first_cuda.hip"
.globl _Z20__device_stub__printv # -- Begin function _Z20__device_stub__printv
.type _Z20__device_stub__printv,@function
_Z20__device_stub__printv: # @_Z20__device_stub__printv
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_de... | 1,931 | 2,042 |
118 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z14matrix_productPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R7, SR_CTAID.Y ;
HFMA2.MMA R6, -RZ, RZ, 0, 0 ;
MOV ... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14matrix_productPiS_S_ ; -- Begin function _Z14matrix_productPiS_S_
.globl _Z14matrix_productPiS_S_
.p2align 8
.type _Z14matrix_productPiS_S_,@function
_Z14matrix_productPiS_S_: ; @_Z14matrix_productPiS_S_
; %bb.0:
v_and_b32_e... | 1,535 | 2,571 |
119 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00143726_00000000-6_matrix_product.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20... | ```amdasm
.text
.file "matrix_product.hip"
.globl _Z29__device_stub__matrix_productPiS_S_ # -- Begin function _Z29__device_stub__matrix_productPiS_S_
.type _Z29__device_stub__matrix_productPiS_S_,@function
_Z29__device_stub__matrix_productPiS_S_: # @_Z29__device_stub__matrix_productPiS_S_
.cfi_startproc
# %bb.0:
... | 3,581 | 4,051 |
120 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
121 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_001524fd_00000000-6_brick_sort.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "brick_sort.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490... | 747 | 184 |
122 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : kernel
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R2, SR_TID.X ;
S2R R3, SR_CTAID.X ;
IMAD R2, R3, c[0x0][0x0], R2 ;
IS... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.p2align 2 ; -- Begin function square
.type square,@function
square: ; @square
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
v_mul_f32_e32 v0, v0, v0
s_setpc_b64 s[30:31]
.Lfunc_end0:
.si... | 372 | 2,503 |
123 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0000f90b_00000000-6_simpleFunc.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "simpleFunc.hip"
.globl __device_stub__kernel # -- Begin function __device_stub__kernel
.type __device_stub__kernel,@function
__device_stub__kernel: # @__device_stub__kernel
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset... | 3,342 | 3,475 |
128 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z13voronoiKernelPiiiiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R2, SR_CTAID.Y ;
ULDC.64 UR8, c... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.p2align 2 ; -- Begin function _Z13eucludianDistiiii
.type _Z13eucludianDistiiii,@function
_Z13eucludianDistiiii: ; @_Z13eucludianDistiiii
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
v_sub_nc_u32_e32 v8... | 7,304 | 19,427 |
129 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00092caf_00000000-6_kernel.cudafe1.cpp"
.text
.globl _ZSt21ios_base_library_initv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4037:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_... | ```amdasm
.text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__voronoiKernelPiiiiS_S_i # -- Begin function _Z28__device_stub__v... | 6,226 | 5,243 |
130 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z4loopv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;
S2R R0, SR_TID.X ;
MOV R2, 0x0 ;
IMAD.MOV.U32 R4, RZ, ... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4loopv ; -- Begin function _Z4loopv
.globl _Z4loopv
.p2align 8
.type _Z4loopv,@function
_Z4loopv: ; @_Z4loopv
; %bb.0:
s_clause 0x1
s_load_b32 s14, s[0:1], 0xc
s_load_b64 s[2:3], s[0:1], 0x50
... | 431 | 29,093 |
131 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000257a8_00000000-6_02-multi-block-loop.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq ... | ```amdasm
.text
.file "02-multi-block-loop.hip"
.globl _Z19__device_stub__loopv # -- Begin function _Z19__device_stub__loopv
.type _Z19__device_stub__loopv,@function
_Z19__device_stub__loopv: # @_Z19__device_stub__loopv
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.... | 1,928 | 2,037 |
132 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
133 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00113739_00000000-6_properties.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "properties.hip"
.globl main # -- Begin function main
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
callq _Z19list_env_propertiesv
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
... | 2,088 | 1,484 |
136 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
``` | ```amdasm
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object ; @__hip_cuid_
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ; 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCom... | 24 | 306 |
137 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0004906c_00000000-6_mycudamath.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cu... | ```amdasm
.text
.file "mycudamath.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490... | 2,078 | 187 |
140 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z6matmulPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R6, SR_CTAID.X ;
ISETP.NE.AND P0, PT, RZ, c[0x0][0xc], PT ;
... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6matmulPiS_S_ ; -- Begin function _Z6matmulPiS_S_
.globl _Z6matmulPiS_S_
.p2align 8
.type _Z6matmulPiS_S_,@function
_Z6matmulPiS_S_: ; @_Z6matmulPiS_S_
; %bb.0:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x18
s_loa... | 8,411 | 3,719 |
141 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_00118bac_00000000-6_cuda_matmul_fast.cudafe1.cpp"
.text
.globl _ZSt21ios_base_library_initv
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %... | ```amdasm
.text
.file "cuda_matmul_fast.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__matmulPiS_S_ # -- Begin function _Z21__device_stub__ma... | 3,897 | 4,499 |
142 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
EXIT ;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPiS_S_ ; -- Begin function _Z3addPiS_S_
.globl _Z3addPiS_S_
.p2align 8
.type _Z3addPiS_S_,@function
_Z3addPiS_S_: ; @_Z3addPiS_S_
; %bb.0:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.... | 120 | 1,584 |
143 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_0002a485_00000000-6_vectoradd.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cud... | ```amdasm
.text
.file "vectoradd.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z8get_timev
.LCPI0_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.text
.globl _Z8get_timev
.type _Z8get_timev,@function
_Z8get_timev: ... | 3,654 | 4,506 |
144 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z15MatrixMulKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R4, SR_TID.Y ;
MOV R2, c[0x0][0x178] ;
ULDC.64 UR... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15MatrixMulKernelPfS_S_i ; -- Begin function _Z15MatrixMulKernelPfS_S_i
.globl _Z15MatrixMulKernelPfS_S_i
.p2align 8
.type _Z15MatrixMulKernelPfS_S_i,@function
_Z15MatrixMulKernelPfS_S_i: ; @_Z15MatrixMulKernelPfS_S_i
; %bb.0:
s... | 3,527 | 2,641 |
145 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_000ce093_00000000-6_mat_multiply.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__... | ```amdasm
.text
.file "mat_multiply.hip"
.globl _Z30__device_stub__MatrixMulKernelPfS_S_i # -- Begin function _Z30__device_stub__MatrixMulKernelPfS_S_i
.type _Z30__device_stub__MatrixMulKernelPfS_S_i,@function
_Z30__device_stub__MatrixMulKernelPfS_S_i: # @_Z30__device_stub__MatrixMulKernelPfS_S_i
.cfi_startproc
# ... | 3,399 | 3,731 |
148 | Convert the following CUDA device assembly code to AMD device assembly:
```cudaasm
code for sm_80
Function : _Z18backtestStrategiesP8Strategy
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
MOV R1, c[0x0][0x28] ;
S2R R0, SR_CTAID.X ;
S2R R3, SR_TID.X ;
IMAD R0... | ```amdasm
.text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18backtestStrategiesP8Strategy ; -- Begin function _Z18backtestStrategiesP8Strategy
.globl _Z18backtestStrategiesP8Strategy
.p2align 8
.type _Z18backtestStrategiesP8Strategy,@function
_Z18backtestStrategiesP8Strategy: ; @_Z18backtestSt... | 403 | 2,556 |
149 | Convert the following CUDA host assembly code to AMD host assembly:
```cudaasm
.file "tmpxft_001b7f5d_00000000-6_class.cudafe1.cpp"
.text
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2070:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFat... | ```amdasm
.text
.file "class.hip"
.globl _Z33__device_stub__backtestStrategiesP8Strategy # -- Begin function _Z33__device_stub__backtestStrategiesP8Strategy
.type _Z33__device_stub__backtestStrategiesP8Strategy,@function
_Z33__device_stub__backtestStrategiesP8Strategy: # @_Z33__device_stub__backtestStrategiesP8Stra... | 2,824 | 2,989 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.