tb_file_path: Source Code/ALU/alu_tb.v

simulator: iverilog

top_module: alu

sources:
Source Code/ALU/alu_tb.v
Source Code/ALU/alu.v


tb_file_path: Source Code/Memory/memory_tb.v

top_module: memory

sources:
Source Code/Memory/memory_tb.v
Source Code/Memory/memory.v


tb_file_path: Source Code/Memory/memory_tb2.v

sources:
Source Code/Memory/memory_tb2.v
Source Code/Memory/memory.v


tb_file_path: Source Code/stack/stack_memory_tb.v

sources:
Source Code/stack/stack_memory_tb.v
Source Code/stack/stack_memory.v