diff --git a/definitions/conv/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json b/definitions/conv/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json deleted file mode 100644 index 83e5647e88c77067af956189793762fa621bde40..0000000000000000000000000000000000000000 --- a/definitions/conv/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "name": "conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "op_type": "conv2d", - "description": "2D conv 1x1 stride=(1,1) dilation=(1,1) pad=(0,0) C_out=256. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 256 - }, - "Kh": { - "type": "const", - "value": 1 - }, - "Kw": { - "type": "const", - "value": 1 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad_top": { - "type": "const", - "value": 0 - }, - "pad_left": { - "type": "const", - "value": 0 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "activation_type": { - "shape": null, - "dtype": "int32" - }, - "with_bias": { - "shape": null, - "dtype": "int32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad_top - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad_left - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, activation_type, with_bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight)\n return F.conv2d(x, w, None, stride=(1, 1), padding=(0, 0), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/conv/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json b/definitions/conv/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json deleted file mode 100644 index a51d38d0bc24c1014a9f80cf9471c0ec99f4d549..0000000000000000000000000000000000000000 --- a/definitions/conv/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "name": "conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "op_type": "conv2d", - "description": "2D conv 3x3 stride=(1,1) dilation=(1,1) pad=(1,1) C_out=128. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 128 - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad_top": { - "type": "const", - "value": 1 - }, - "pad_left": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "activation_type": { - "shape": null, - "dtype": "int32" - }, - "with_bias": { - "shape": null, - "dtype": "int32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad_top - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad_left - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, activation_type, with_bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight)\n return F.conv2d(x, w, None, stride=(1, 1), padding=(1, 1), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/conv/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json b/definitions/conv/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json deleted file mode 100644 index 492e75cb68df0b9a15732f43e1ca0b591fe62a2e..0000000000000000000000000000000000000000 --- a/definitions/conv/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "name": "conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "op_type": "conv2d", - "description": "2D conv 3x3 stride=(1,1) dilation=(2,2) pad=(2,2) C_out=256. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 256 - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 2 - }, - "Dw": { - "type": "const", - "value": 2 - }, - "pad_top": { - "type": "const", - "value": 2 - }, - "pad_left": { - "type": "const", - "value": 2 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "activation_type": { - "shape": null, - "dtype": "int32" - }, - "with_bias": { - "shape": null, - "dtype": "int32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad_top - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad_left - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, activation_type, with_bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight)\n return F.conv2d(x, w, None, stride=(1, 1), padding=(2, 2), dilation=(2, 2)).numpy()\n" -} diff --git a/definitions/conv/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json b/definitions/conv/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json deleted file mode 100644 index 39b5d56d2e34a811ddb03940045064cca5bf086b..0000000000000000000000000000000000000000 --- a/definitions/conv/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "name": "conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "op_type": "conv2d", - "description": "2D conv 3x3 stride=(2,2) dilation=(1,1) pad=(1,1) C_out=128. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 128 - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 2 - }, - "Sw": { - "type": "const", - "value": 2 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad_top": { - "type": "const", - "value": 1 - }, - "pad_left": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "activation_type": { - "shape": null, - "dtype": "int32" - }, - "with_bias": { - "shape": null, - "dtype": "int32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad_top - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad_left - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, activation_type, with_bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight)\n return F.conv2d(x, w, None, stride=(2, 2), padding=(1, 1), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/conv/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json b/definitions/conv/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json deleted file mode 100644 index b061cf9258549d385f34572de738709f2e525bc6..0000000000000000000000000000000000000000 --- a/definitions/conv/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "name": "conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "op_type": "conv2d", - "description": "2D conv 5x5 stride=(1,1) dilation=(1,1) pad=(2,2) C_out=64. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 64 - }, - "Kh": { - "type": "const", - "value": 5 - }, - "Kw": { - "type": "const", - "value": 5 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad_top": { - "type": "const", - "value": 2 - }, - "pad_left": { - "type": "const", - "value": 2 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "activation_type": { - "shape": null, - "dtype": "int32" - }, - "with_bias": { - "shape": null, - "dtype": "int32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad_top - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad_left - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, activation_type, with_bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight)\n return F.conv2d(x, w, None, stride=(1, 1), padding=(2, 2), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/conv/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json b/definitions/conv/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json deleted file mode 100644 index ad17feefc4018911b8527f225e562a85a38dda03..0000000000000000000000000000000000000000 --- a/definitions/conv/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json +++ /dev/null @@ -1,112 +0,0 @@ -{ - "name": "conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "op_type": "conv2d", - "description": "2D conv 7x7 stride=(2,2) dilation=(1,1) pad=(3,3) C_out=64. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 64 - }, - "Kh": { - "type": "const", - "value": 7 - }, - "Kw": { - "type": "const", - "value": 7 - }, - "Sh": { - "type": "const", - "value": 2 - }, - "Sw": { - "type": "const", - "value": 2 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad_top": { - "type": "const", - "value": 3 - }, - "pad_left": { - "type": "const", - "value": 3 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "activation_type": { - "shape": null, - "dtype": "int32" - }, - "with_bias": { - "shape": null, - "dtype": "int32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad_top - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad_left - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, activation_type, with_bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight)\n return F.conv2d(x, w, None, stride=(2, 2), padding=(3, 3), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json b/definitions/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json deleted file mode 100644 index 9dca22dd35c0a55c1721730963d720446f08f348..0000000000000000000000000000000000000000 --- a/definitions/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json +++ /dev/null @@ -1,75 +0,0 @@ -{ - "name": "conv1d_kw1_sw1_dw1_cout512_p0", - "op_type": "conv1d", - "description": "1D conv kw=1 stride=1 dilation=1 pad=0 C_out=512. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "W": { - "type": "var" - }, - "W_out": { - "type": "var" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 512 - }, - "Kw": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad": { - "type": "const", - "value": 0 - } - }, - "inputs": { - "input": { - "shape": [ - "C_in", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C_out" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "C_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "W_out == (W + 2*pad - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n x = torch.from_numpy(input).unsqueeze(0)\n w = torch.from_numpy(weight)\n b = torch.from_numpy(bias)\n return F.conv1d(x, w, b, stride=1, padding=0, dilation=1).squeeze(0).numpy()\n" -} diff --git a/definitions/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json b/definitions/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json deleted file mode 100644 index ce89645b4596e65d6544c906c7867936b9611d5f..0000000000000000000000000000000000000000 --- a/definitions/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json +++ /dev/null @@ -1,75 +0,0 @@ -{ - "name": "conv1d_kw3_sw1_dw1_cout512_p1", - "op_type": "conv1d", - "description": "1D conv kw=3 stride=1 dilation=1 pad=1 C_out=512. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "W": { - "type": "var" - }, - "W_out": { - "type": "var" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 512 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "C_in", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C_out" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "C_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "W_out == (W + 2*pad - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n x = torch.from_numpy(input).unsqueeze(0)\n w = torch.from_numpy(weight)\n b = torch.from_numpy(bias)\n return F.conv1d(x, w, b, stride=1, padding=1, dilation=1).squeeze(0).numpy()\n" -} diff --git a/definitions/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json b/definitions/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json deleted file mode 100644 index 10413c8c9da0ff9a9d84dd64f1a1a8f6c9ecb8be..0000000000000000000000000000000000000000 --- a/definitions/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json +++ /dev/null @@ -1,101 +0,0 @@ -{ - "name": "conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "op_type": "conv2d_depthwise", - "description": "Depthwise 2D conv 3x3 stride=(1,1) dilation=(1,1) pad=1. C varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C": { - "type": "var" - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n c = input.shape[1]\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).unsqueeze(1)\n b = torch.from_numpy(bias)\n return F.conv2d(x, w, b, stride=(1, 1), padding=(1, 1), dilation=(1, 1), groups=c).numpy()\n" -} diff --git a/definitions/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json b/definitions/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json deleted file mode 100644 index 9bdf2c43420c51f9af6f993b1073795d5be2cfb7..0000000000000000000000000000000000000000 --- a/definitions/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json +++ /dev/null @@ -1,101 +0,0 @@ -{ - "name": "conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "op_type": "conv2d_depthwise", - "description": "Depthwise 2D conv 3x3 stride=(2,2) dilation=(1,1) pad=1. C varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C": { - "type": "var" - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 2 - }, - "Sw": { - "type": "const", - "value": 2 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n c = input.shape[1]\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).unsqueeze(1)\n b = torch.from_numpy(bias)\n return F.conv2d(x, w, b, stride=(2, 2), padding=(1, 1), dilation=(1, 1), groups=c).numpy()\n" -} diff --git a/definitions/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json b/definitions/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json deleted file mode 100644 index 216c7c07872634f64310b110d0e9ffb7000b78e1..0000000000000000000000000000000000000000 --- a/definitions/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json +++ /dev/null @@ -1,101 +0,0 @@ -{ - "name": "conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "op_type": "conv2d_depthwise", - "description": "Depthwise 2D conv 5x5 stride=(1,1) dilation=(1,1) pad=2. C varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C": { - "type": "var" - }, - "Kh": { - "type": "const", - "value": 5 - }, - "Kw": { - "type": "const", - "value": 5 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - }, - "pad": { - "type": "const", - "value": 2 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H + 2*pad - Dh*(Kh-1) - 1) // Sh + 1", - "W_out == (W + 2*pad - Dw*(Kw-1) - 1) // Sw + 1" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n c = input.shape[1]\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).unsqueeze(1)\n b = torch.from_numpy(bias)\n return F.conv2d(x, w, b, stride=(1, 1), padding=(2, 2), dilation=(1, 1), groups=c).numpy()\n" -} diff --git a/definitions/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json b/definitions/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json deleted file mode 100644 index 703fa1b496179d798c87fd6ab112142d9274f91e..0000000000000000000000000000000000000000 --- a/definitions/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json +++ /dev/null @@ -1,102 +0,0 @@ -{ - "name": "deconv2d_kh3_kw3_sh1_sw1_cout256", - "op_type": "deconv2d", - "description": "Transposed 2D conv 3x3 stride=(1,1) dilation=(1,1) pad=0 C_out=256. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 256 - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C_out" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H - 1) * Sh + Kh", - "W_out == (W - 1) * Sw + Kw" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).permute(1, 0, 2, 3)\n b = torch.from_numpy(bias)\n return F.conv_transpose2d(x, w, b, stride=(1, 1), padding=(0, 0), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json b/definitions/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json deleted file mode 100644 index 2e068fcb1f7afdd3d7955ba36f930fb92f16a552..0000000000000000000000000000000000000000 --- a/definitions/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json +++ /dev/null @@ -1,102 +0,0 @@ -{ - "name": "deconv2d_kh3_kw3_sh2_sw2_cout256", - "op_type": "deconv2d", - "description": "Transposed 2D conv 3x3 stride=(2,2) dilation=(1,1) pad=0 C_out=256. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 256 - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 2 - }, - "Sw": { - "type": "const", - "value": 2 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C_out" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H - 1) * Sh + Kh", - "W_out == (W - 1) * Sw + Kw" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).permute(1, 0, 2, 3)\n b = torch.from_numpy(bias)\n return F.conv_transpose2d(x, w, b, stride=(2, 2), padding=(0, 0), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json b/definitions/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json deleted file mode 100644 index afb8f2d5b7460335e5b9bfff733819bba9df0a73..0000000000000000000000000000000000000000 --- a/definitions/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json +++ /dev/null @@ -1,102 +0,0 @@ -{ - "name": "deconv2d_kh4_kw4_sh1_sw1_cout128", - "op_type": "deconv2d", - "description": "Transposed 2D conv 4x4 stride=(1,1) dilation=(1,1) pad=0 C_out=128. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 128 - }, - "Kh": { - "type": "const", - "value": 4 - }, - "Kw": { - "type": "const", - "value": 4 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C_out" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H - 1) * Sh + Kh", - "W_out == (W - 1) * Sw + Kw" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).permute(1, 0, 2, 3)\n b = torch.from_numpy(bias)\n return F.conv_transpose2d(x, w, b, stride=(1, 1), padding=(0, 0), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json b/definitions/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json deleted file mode 100644 index 4dd15993a2bf93bc52073f9ce6f33a97830519d3..0000000000000000000000000000000000000000 --- a/definitions/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json +++ /dev/null @@ -1,102 +0,0 @@ -{ - "name": "deconv2d_kh4_kw4_sh2_sw2_cout128", - "op_type": "deconv2d", - "description": "Transposed 2D conv 4x4 stride=(2,2) dilation=(1,1) pad=0 C_out=128. C_in varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C_in": { - "type": "var" - }, - "C_out": { - "type": "const", - "value": 128 - }, - "Kh": { - "type": "const", - "value": 4 - }, - "Kw": { - "type": "const", - "value": 4 - }, - "Sh": { - "type": "const", - "value": 2 - }, - "Sw": { - "type": "const", - "value": 2 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C_in", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C_out", - "C_in", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C_out" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C_out", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H - 1) * Sh + Kh", - "W_out == (W - 1) * Sw + Kw" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).permute(1, 0, 2, 3)\n b = torch.from_numpy(bias)\n return F.conv_transpose2d(x, w, b, stride=(2, 2), padding=(0, 0), dilation=(1, 1)).numpy()\n" -} diff --git a/definitions/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json b/definitions/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json deleted file mode 100644 index c58c65e17fcc64f849382fe2b1b7288c95493006..0000000000000000000000000000000000000000 --- a/definitions/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json +++ /dev/null @@ -1,97 +0,0 @@ -{ - "name": "deconv2d_depthwise_kh2_kw2_sh2_sw2", - "op_type": "deconv2d_depthwise", - "description": "Depthwise transposed 2D conv 2x2 stride=(2,2) dilation=(1,1) pad=0. C varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C": { - "type": "var" - }, - "Kh": { - "type": "const", - "value": 2 - }, - "Kw": { - "type": "const", - "value": 2 - }, - "Sh": { - "type": "const", - "value": 2 - }, - "Sw": { - "type": "const", - "value": 2 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H - 1) * Sh + Kh", - "W_out == (W - 1) * Sw + Kw" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n c = input.shape[1]\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).unsqueeze(1)\n b = torch.from_numpy(bias)\n return F.conv_transpose2d(x, w, b, stride=(2, 2), padding=(0, 0), dilation=(1, 1), groups=c).numpy()\n" -} diff --git a/definitions/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json b/definitions/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json deleted file mode 100644 index ae9bd10fb2f70dd050356a5e20e8c9a42e9dcf6a..0000000000000000000000000000000000000000 --- a/definitions/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json +++ /dev/null @@ -1,97 +0,0 @@ -{ - "name": "deconv2d_depthwise_kh3_kw3_sh1_sw1", - "op_type": "deconv2d_depthwise", - "description": "Depthwise transposed 2D conv 3x3 stride=(1,1) dilation=(1,1) pad=0. C varies per workload.", - "tags": [ - "status:active" - ], - "axes": { - "N": { - "type": "var" - }, - "H": { - "type": "var", - "parent": "N" - }, - "W": { - "type": "var", - "parent": "N" - }, - "H_out": { - "type": "var", - "parent": "N" - }, - "W_out": { - "type": "var", - "parent": "N" - }, - "C": { - "type": "var" - }, - "Kh": { - "type": "const", - "value": 3 - }, - "Kw": { - "type": "const", - "value": 3 - }, - "Sh": { - "type": "const", - "value": 1 - }, - "Sw": { - "type": "const", - "value": 1 - }, - "Dh": { - "type": "const", - "value": 1 - }, - "Dw": { - "type": "const", - "value": 1 - } - }, - "inputs": { - "input": { - "shape": [ - "N", - "C", - "H", - "W" - ], - "dtype": "float32" - }, - "weight": { - "shape": [ - "C", - "Kh", - "Kw" - ], - "dtype": "float32" - }, - "bias": { - "shape": [ - "C" - ], - "dtype": "float32" - } - }, - "outputs": { - "output": { - "shape": [ - "N", - "C", - "H_out", - "W_out" - ], - "dtype": "float32" - } - }, - "constraints": [ - "H_out == (H - 1) * Sh + Kh", - "W_out == (W - 1) * Sw + Kw" - ], - "reference": "import torch\nimport torch.nn.functional as F\n\ndef run(input, weight, bias):\n c = input.shape[1]\n x = torch.from_numpy(input)\n w = torch.from_numpy(weight).unsqueeze(1)\n b = torch.from_numpy(bias)\n return F.conv_transpose2d(x, w, b, stride=(1, 1), padding=(0, 0), dilation=(1, 1), groups=c).numpy()\n" -} diff --git a/definitions/simd-loop/loop_005.json b/definitions/simd-loop/loop_005.json new file mode 100644 index 0000000000000000000000000000000000000000..fe88a20e21192e44001f0d23e95908a2da26cd56 --- /dev/null +++ b/definitions/simd-loop/loop_005.json @@ -0,0 +1,36 @@ +{ + "name": "loop_005", + "op_type": "loop_005", + "description": "Compute the length of many short null-terminated strings", + "tags": [ + "simd-loop" + ], + "axes": { + "N": { + "type": "var", + "description": "Buffer length (bytes)" + } + }, + "inputs": { + "p": { + "shape": [ + "N" + ], + "dtype": "uint8" + } + }, + "outputs": { + "checksum": { + "shape": null, + "dtype": "uint32", + "description": "Scalar checksum" + } + }, + "reference": "import numpy as np\n\ndef run(p):\n b = p; n = len(b); i = 0; res = 0\n while i < n:\n j = i\n while j < n and int(b[j]) != 0: j += 1\n length = j - i; i = j + 1\n res = (res + 1) & 0xffffffff\n res ^= ((length % 0xffff) << 16) & 0xffffffff\n res &= 0xffffffff\n return np.uint32(res)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [] + } +} diff --git a/definitions/simd-loop/loop_006.json b/definitions/simd-loop/loop_006.json new file mode 100644 index 0000000000000000000000000000000000000000..92d46840325026c5fe3cd84e14282a66d0ffebfe --- /dev/null +++ b/definitions/simd-loop/loop_006.json @@ -0,0 +1,36 @@ +{ + "name": "loop_006", + "op_type": "loop_006", + "description": "Compute the length of many long null-terminated strings", + "tags": [ + "simd-loop" + ], + "axes": { + "N": { + "type": "var", + "description": "Buffer length (bytes)" + } + }, + "inputs": { + "p": { + "shape": [ + "N" + ], + "dtype": "uint8" + } + }, + "outputs": { + "checksum": { + "shape": null, + "dtype": "uint32", + "description": "Scalar checksum" + } + }, + "reference": "import numpy as np\n\ndef run(p):\n b = p; n = len(b); i = 0; res = 0\n while i < n:\n j = i\n while j < n and int(b[j]) != 0: j += 1\n length = j - i; i = j + 1\n res = (res + 1) & 0xffffffff\n res ^= ((length % 0xffff) << 16) & 0xffffffff\n res &= 0xffffffff\n return np.uint32(res)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [] + } +} diff --git a/definitions/simd-loop/loop_034.json b/definitions/simd-loop/loop_034.json new file mode 100644 index 0000000000000000000000000000000000000000..74846e80967733f8693c80fd180dd78127336011 --- /dev/null +++ b/definitions/simd-loop/loop_034.json @@ -0,0 +1,42 @@ +{ + "name": "loop_034", + "op_type": "loop_034", + "description": "Compare many short null-terminated strings for equality", + "tags": [ + "simd-loop" + ], + "axes": { + "N": { + "type": "var", + "description": "Buffer length (bytes)" + } + }, + "inputs": { + "a": { + "shape": [ + "N" + ], + "dtype": "uint8" + }, + "b": { + "shape": [ + "N" + ], + "dtype": "uint8" + } + }, + "outputs": { + "checksum": { + "shape": null, + "dtype": "uint32", + "description": "Scalar checksum" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n n = len(a); res = 0; cnt = 0; length = 13; off = 0\n while off < n:\n k = off\n while k < n and a[k] == b[k] and int(a[k]) != 0: k += 1\n av = int(a[k]) if k < n else 0\n bv = int(b[k]) if k < n else 0\n r = av - bv\n cmp = 2 if r > 0 else (3 if r < 0 else 1)\n res = (res + cnt * cmp) & 0xffffffff\n off += length; cnt += 1; length = 3 + (length + 11) % 43\n return np.uint32(res)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [] + } +} diff --git a/definitions/simd-loop/loop_037.json b/definitions/simd-loop/loop_037.json new file mode 100644 index 0000000000000000000000000000000000000000..701d52dcad2b50efd63cbce29a51a77078a80725 --- /dev/null +++ b/definitions/simd-loop/loop_037.json @@ -0,0 +1,54 @@ +{ + "name": "loop_037", + "op_type": "loop_037", + "description": "Element-wise complex multiplication of two FP32 complex-number arrays (interleaved re/im)", + "tags": [ + "simd-loop" + ], + "axes": { + "size": { + "type": "var", + "description": "axis size" + }, + "cdim": { + "type": "const", + "value": 2, + "description": "const cdim" + } + }, + "inputs": { + "a0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "float32" + }, + "b0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "float32" + } + }, + "outputs": { + "c0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "float32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a0, b0):\n ar, ai = a0[:, 0], a0[:, 1]\n br, bi = b0[:, 0], b0[:, 1]\n cr = ar * br - ai * bi\n ci = ar * bi + ai * br\n return np.stack([cr, ci], axis=1).astype(np.float32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "size" + ] + } +} diff --git a/definitions/simd-loop/loop_038.json b/definitions/simd-loop/loop_038.json new file mode 100644 index 0000000000000000000000000000000000000000..ec598ad19189477a5c3157ef2f1db54f909d9c25 --- /dev/null +++ b/definitions/simd-loop/loop_038.json @@ -0,0 +1,49 @@ +{ + "name": "loop_038", + "op_type": "loop_038", + "description": "1D convolution of an FP16 signal with an FP16 filter kernel", + "tags": [ + "simd-loop" + ], + "axes": { + "dim": { + "type": "var", + "description": "axis dim" + } + }, + "inputs": { + "a": { + "shape": [ + "dim", + "dim" + ], + "dtype": "float16" + }, + "b": { + "shape": [ + "dim", + "dim" + ], + "dtype": "float16" + } + }, + "outputs": { + "c": { + "shape": [ + "dim", + "dim" + ], + "dtype": "float16", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n dim = a.shape[0]\n c = np.zeros((dim, dim), dtype=np.float16)\n if dim >= 2:\n k = np.float16(0.25)\n s0 = a[:-1, :-1]; s1 = a[:-1, 1:]; s2 = a[1:, :-1]; s3 = a[1:, 1:]\n r = (b[:-1, :-1] + s0 * k).astype(np.float16)\n r = (r + s1 * k).astype(np.float16)\n r = (r + s2 * k).astype(np.float16)\n r = (r + s3 * k).astype(np.float16)\n c[:-1, :-1] = r\n return c\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "dim" + ] + } +} diff --git a/definitions/simd-loop/loop_101.json b/definitions/simd-loop/loop_101.json new file mode 100644 index 0000000000000000000000000000000000000000..30dbb097593262cbfd507d52fb80eba45bfc4729 --- /dev/null +++ b/definitions/simd-loop/loop_101.json @@ -0,0 +1,44 @@ +{ + "name": "loop_101", + "op_type": "loop_101", + "description": "Upscale a pixel buffer by splitting each element into its high and low halves", + "tags": [ + "simd-loop" + ], + "axes": { + "n": { + "type": "var", + "description": "axis n" + }, + "out_len": { + "type": "var", + "description": "axis out_len" + } + }, + "inputs": { + "b": { + "shape": [ + "n" + ], + "dtype": "uint8" + } + }, + "outputs": { + "a": { + "shape": [ + "out_len" + ], + "dtype": "uint8", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(b):\n n = b.shape[0]\n a = np.zeros(2 * (n - 1), dtype=np.uint8)\n if n >= 2:\n s1 = b[:-1].astype(np.uint16)\n s2 = b[1:].astype(np.uint16)\n a[0::2] = ((3 * s1 + s2 + 2) >> 2).astype(np.uint8)\n a[1::2] = ((3 * s2 + s1 + 2) >> 2).astype(np.uint8)\n return a\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_102.json b/definitions/simd-loop/loop_102.json new file mode 100644 index 0000000000000000000000000000000000000000..446d0fc525f21eb4921829e8d18adab805da4a10 --- /dev/null +++ b/definitions/simd-loop/loop_102.json @@ -0,0 +1,46 @@ +{ + "name": "loop_102", + "op_type": "loop_102", + "description": "Count the frequency of each byte value in a large buffer (histogram)", + "tags": [ + "simd-loop" + ], + "axes": { + "num_records": { + "type": "var", + "description": "axis num_records" + }, + "histogram_size": { + "type": "const", + "value": 128, + "description": "const histogram_size" + } + }, + "inputs": { + "records": { + "shape": [ + "num_records" + ], + "dtype": "uint32" + } + }, + "outputs": { + "histogram": { + "shape": [ + "histogram_size" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(records):\n return np.bincount(records.astype(np.int64), minlength=128)[:128].astype(np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "histogram_size", + "num_records" + ] + } +} diff --git a/definitions/simd-loop/loop_103.json b/definitions/simd-loop/loop_103.json new file mode 100644 index 0000000000000000000000000000000000000000..e54f54caa84aa7923742d10173f9bf79268cc241 --- /dev/null +++ b/definitions/simd-loop/loop_103.json @@ -0,0 +1,36 @@ +{ + "name": "loop_103", + "op_type": "loop_103", + "description": "Find all whitespace character positions in a byte string", + "tags": [ + "simd-loop" + ], + "axes": { + "N": { + "type": "var", + "description": "Buffer length (bytes)" + } + }, + "inputs": { + "p": { + "shape": [ + "N" + ], + "dtype": "uint8" + } + }, + "outputs": { + "checksum": { + "shape": null, + "dtype": "int32", + "description": "Scalar checksum" + } + }, + "reference": "import numpy as np\n\n_WS = {32, 10, 13, 9}\n\ndef run(p):\n b = p; n = len(b); i = 0\n while i < n and int(b[i]) in _WS: i += 1\n count = 0\n while i < n:\n count += 1\n while i < n and int(b[i]) not in _WS: i += 1\n while i < n and int(b[i]) in _WS: i += 1\n return np.int32(count)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [] + } +} diff --git a/definitions/simd-loop/loop_104.json b/definitions/simd-loop/loop_104.json new file mode 100644 index 0000000000000000000000000000000000000000..07127c25fdf4f374268d33ac927de48e08158354 --- /dev/null +++ b/definitions/simd-loop/loop_104.json @@ -0,0 +1,46 @@ +{ + "name": "loop_104", + "op_type": "loop_104", + "description": "Compute byte-value frequency histogram using segmented counting", + "tags": [ + "simd-loop" + ], + "axes": { + "n": { + "type": "var", + "description": "axis n" + }, + "histogram_size": { + "type": "const", + "value": 256, + "description": "const histogram_size" + } + }, + "inputs": { + "data": { + "shape": [ + "n" + ], + "dtype": "uint8" + } + }, + "outputs": { + "histogram": { + "shape": [ + "histogram_size" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(data):\n return np.bincount(data.astype(np.int64), minlength=256)[:256].astype(np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "histogram_size", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_105.json b/definitions/simd-loop/loop_105.json new file mode 100644 index 0000000000000000000000000000000000000000..e767a8661fefa0b4deefd8735a7d0f5eac6e38d8 --- /dev/null +++ b/definitions/simd-loop/loop_105.json @@ -0,0 +1,41 @@ +{ + "name": "loop_105", + "op_type": "loop_105", + "description": "Sum adjacent FP value pairs in a cascading pairwise reduction", + "tags": [ + "simd-loop" + ], + "axes": { + "N": { + "type": "var", + "description": "Array length" + } + }, + "inputs": { + "a": { + "shape": [ + "N" + ], + "dtype": "float32" + }, + "b": { + "shape": [ + "N" + ], + "dtype": "float32" + } + }, + "outputs": { + "res": { + "shape": null, + "dtype": "float32", + "description": "Scalar result" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n return np.float32(np.sum(a.astype(np.float64)))\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [] + } +} diff --git a/definitions/simd-loop/loop_106.json b/definitions/simd-loop/loop_106.json new file mode 100644 index 0000000000000000000000000000000000000000..2ae092e2584548d6ce0c68f596edfea0cf7c318b --- /dev/null +++ b/definitions/simd-loop/loop_106.json @@ -0,0 +1,40 @@ +{ + "name": "loop_106", + "op_type": "loop_106", + "description": "Partition a vector by bit flag, concentrating set-bit elements to one side", + "tags": [ + "simd-loop" + ], + "axes": { + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "n" + ], + "dtype": "uint32" + } + }, + "outputs": { + "b": { + "shape": [ + "n" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\n_M = 0xFFFFFFFF\n\ndef _popcount(x):\n return bin(x & _M).count('1')\n\ndef _compress(x, m):\n x &= m\n mk = (~m << 1) & _M\n for i in range(5):\n mp = (mk ^ (mk << 1)) & _M\n mp = (mp ^ (mp << 2)) & _M\n mp = (mp ^ (mp << 4)) & _M\n mp = (mp ^ (mp << 8)) & _M\n mp = (mp ^ (mp << 16)) & _M\n mv = mp & m\n m = (m ^ mv) | (mv >> (1 << i))\n t = x & mv\n x = (x ^ t) | (t >> (1 << i))\n mk &= (~mp) & _M\n return x & _M\n\ndef _sag(x, m):\n return (((_compress(x, m) << _popcount(m)) & _M) | _compress(x, (~m) & _M)) & _M\n\n_PC = [0xaaaaaaaa, 0xcccccccc, 0x0f0f0f0f, 0x0ff00ff0, 0x0ffff000]\n_P = [_PC[0], _sag(_PC[1], _PC[0]), _sag(_PC[2], _PC[0]),\n _sag(_PC[3], _PC[0]), _sag(_PC[4], _PC[0])]\n\ndef _permute(x):\n for pi in _P:\n x = _sag(x, pi)\n return x\n\ndef run(a):\n return np.array([_permute(int(v)) for v in a], dtype=np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_109.json b/definitions/simd-loop/loop_109.json new file mode 100644 index 0000000000000000000000000000000000000000..ed8dd7a31e623fa08f2e41e06d0f40aeaf2e36ab --- /dev/null +++ b/definitions/simd-loop/loop_109.json @@ -0,0 +1,54 @@ +{ + "name": "loop_109", + "op_type": "loop_109", + "description": "Element-wise addition of complex numbers stored as interleaved uint32 (re, im) pairs", + "tags": [ + "simd-loop" + ], + "axes": { + "size": { + "type": "var", + "description": "axis size" + }, + "cdim": { + "type": "const", + "value": 2, + "description": "const cdim" + } + }, + "inputs": { + "a0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "uint32" + }, + "b0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "uint32" + } + }, + "outputs": { + "c0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\n_M = np.uint64(0xffffffff)\n\ndef run(a0, b0):\n cr = (a0[:, 0].astype(np.uint64) - b0[:, 1].astype(np.uint64)) & _M\n ci = (a0[:, 1].astype(np.uint64) + b0[:, 0].astype(np.uint64)) & _M\n return np.stack([cr, ci], axis=1).astype(np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "size" + ] + } +} diff --git a/definitions/simd-loop/loop_110.json b/definitions/simd-loop/loop_110.json new file mode 100644 index 0000000000000000000000000000000000000000..baee1fa65dd4e7697ab6123fd0dd0d1e44b4043a --- /dev/null +++ b/definitions/simd-loop/loop_110.json @@ -0,0 +1,58 @@ +{ + "name": "loop_110", + "op_type": "loop_110", + "description": "Compute complex dot product of two arrays of uint32 complex numbers", + "tags": [ + "simd-loop" + ], + "axes": { + "size": { + "type": "var", + "description": "axis size" + }, + "size2": { + "type": "var", + "description": "axis size2" + }, + "cdim": { + "type": "const", + "value": 2, + "description": "const cdim" + } + }, + "inputs": { + "a0": { + "shape": [ + "size2", + "cdim" + ], + "dtype": "int8" + }, + "b0": { + "shape": [ + "size2", + "cdim" + ], + "dtype": "int8" + } + }, + "outputs": { + "c0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "int32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a0, b0):\n a = a0.astype(np.int64); b = b0.astype(np.int64)\n ae, ao = a[0::2], a[1::2]; be, bo = b[0::2], b[1::2]\n cr = (ae[:, 0]*be[:, 0] - ae[:, 1]*be[:, 1]) + (ao[:, 0]*bo[:, 0] - ao[:, 1]*bo[:, 1])\n ci = (ae[:, 1]*be[:, 0] + ae[:, 0]*be[:, 1]) + (ao[:, 1]*bo[:, 0] + ao[:, 0]*bo[:, 1])\n return np.stack([cr, ci], axis=1).astype(np.int32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "size" + ] + } +} diff --git a/definitions/simd-loop/loop_112.json b/definitions/simd-loop/loop_112.json new file mode 100644 index 0000000000000000000000000000000000000000..763a0209566b7c2a24717a0bf6f22053a7cd523e --- /dev/null +++ b/definitions/simd-loop/loop_112.json @@ -0,0 +1,54 @@ +{ + "name": "loop_112", + "op_type": "loop_112", + "description": "Complex multiply-accumulate over arrays of uint32 complex numbers", + "tags": [ + "simd-loop" + ], + "axes": { + "size": { + "type": "var", + "description": "axis size" + }, + "cdim": { + "type": "const", + "value": 2, + "description": "const cdim" + } + }, + "inputs": { + "a0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "uint32" + }, + "b0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "uint32" + } + }, + "outputs": { + "c0": { + "shape": [ + "size", + "cdim" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\n_M = np.uint64(0xffffffff)\n\ndef run(a0, b0):\n ar = a0[:, 0].astype(np.uint64); ai = a0[:, 1].astype(np.uint64)\n br = b0[:, 0].astype(np.uint64); bi = b0[:, 1].astype(np.uint64)\n cr = (ar * br - ai * bi) & _M\n ci = (ar * bi + ai * br) & _M\n return np.stack([cr, ci], axis=1).astype(np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "size" + ] + } +} diff --git a/definitions/simd-loop/loop_114.json b/definitions/simd-loop/loop_114.json new file mode 100644 index 0000000000000000000000000000000000000000..9a9ab4bca6b0ff9fc02c439cff5ab433e3af2cdd --- /dev/null +++ b/definitions/simd-loop/loop_114.json @@ -0,0 +1,51 @@ +{ + "name": "loop_114", + "op_type": "loop_114", + "description": "Compute auto-correlation of an integer array with widening accumulation", + "tags": [ + "simd-loop" + ], + "axes": { + "n": { + "type": "var", + "description": "axis n" + }, + "lags": { + "type": "var", + "description": "axis lags" + }, + "scale": { + "type": "const", + "value": 4, + "description": "const scale" + } + }, + "inputs": { + "data": { + "shape": [ + "n" + ], + "dtype": "int16" + } + }, + "outputs": { + "res": { + "shape": [ + "lags" + ], + "dtype": "int16", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(data):\n n = int(data.shape[0])\n scale = 4\n d = data.astype(np.int64)\n res = np.zeros(n, dtype=np.int16)\n for lag in range(n):\n acc = int(((d[:n - lag] * d[lag:]) >> scale).sum())\n res[lag] = np.int16(acc >> 16)\n return res\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "n", + "lags", + "scale" + ] + } +} diff --git a/definitions/simd-loop/loop_130.json b/definitions/simd-loop/loop_130.json new file mode 100644 index 0000000000000000000000000000000000000000..68ae4caeb5fc78d22b251f8088e60c53a1ad7622 --- /dev/null +++ b/definitions/simd-loop/loop_130.json @@ -0,0 +1,59 @@ +{ + "name": "loop_130", + "op_type": "loop_130", + "description": "Multiply two FP32 matrices using tiled register accumulation", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + }, + "k": { + "type": "var", + "description": "axis k" + } + }, + "inputs": { + "a": { + "shape": [ + "m", + "k" + ], + "dtype": "float32" + }, + "b": { + "shape": [ + "k", + "n" + ], + "dtype": "float32" + } + }, + "outputs": { + "c": { + "shape": [ + "m", + "n" + ], + "dtype": "float32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n return (a.astype(np.float64) @ b.astype(np.float64)).astype(np.float32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n", + "k" + ] + } +} diff --git a/definitions/simd-loop/loop_135.json b/definitions/simd-loop/loop_135.json new file mode 100644 index 0000000000000000000000000000000000000000..674200c1a5c4140c13ae0ba7cfaa8ea9e984efc5 --- /dev/null +++ b/definitions/simd-loop/loop_135.json @@ -0,0 +1,59 @@ +{ + "name": "loop_135", + "op_type": "loop_135", + "description": "Multiply INT8 matrices accumulating into INT32 using tiled 4-element dot products", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + }, + "k": { + "type": "var", + "description": "axis k" + } + }, + "inputs": { + "a": { + "shape": [ + "m", + "k" + ], + "dtype": "int8" + }, + "b": { + "shape": [ + "k", + "n" + ], + "dtype": "int8" + } + }, + "outputs": { + "c": { + "shape": [ + "m", + "n" + ], + "dtype": "int32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n return (a.astype(np.int64) @ b.astype(np.int64)).astype(np.int32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n", + "k" + ] + } +} diff --git a/definitions/simd-loop/loop_216.json b/definitions/simd-loop/loop_216.json new file mode 100644 index 0000000000000000000000000000000000000000..3bef460cacf70354c2caf1eee2e416028d842091 --- /dev/null +++ b/definitions/simd-loop/loop_216.json @@ -0,0 +1,52 @@ +{ + "name": "loop_216", + "op_type": "loop_216", + "description": "Multiply an FP32 matrix by an FP32 vector (column-major GEMV)", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "n", + "m" + ], + "dtype": "float32" + }, + "x": { + "shape": [ + "n" + ], + "dtype": "float32" + } + }, + "outputs": { + "b": { + "shape": [ + "m" + ], + "dtype": "float32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, x):\n return (a.astype(np.float64).T @ x.astype(np.float64)).astype(np.float32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_217.json b/definitions/simd-loop/loop_217.json new file mode 100644 index 0000000000000000000000000000000000000000..59de1cf6fd18232548688bfc464e63a64dd74da9 --- /dev/null +++ b/definitions/simd-loop/loop_217.json @@ -0,0 +1,52 @@ +{ + "name": "loop_217", + "op_type": "loop_217", + "description": "Multiply an INT8 matrix by an INT8 vector accumulating into INT32 (row-major GEMV)", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "m", + "n" + ], + "dtype": "uint8" + }, + "b": { + "shape": [ + "n" + ], + "dtype": "uint8" + } + }, + "outputs": { + "c": { + "shape": [ + "m" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n return (a.astype(np.uint64) @ b.astype(np.uint64)).astype(np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_218.json b/definitions/simd-loop/loop_218.json new file mode 100644 index 0000000000000000000000000000000000000000..766119a00a122db7a869fa0c0f57d3f2ef4501f8 --- /dev/null +++ b/definitions/simd-loop/loop_218.json @@ -0,0 +1,52 @@ +{ + "name": "loop_218", + "op_type": "loop_218", + "description": "Multiply an FP64 matrix by an FP64 vector (column-major GEMV)", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "n", + "m" + ], + "dtype": "float64" + }, + "x": { + "shape": [ + "n" + ], + "dtype": "float64" + } + }, + "outputs": { + "b": { + "shape": [ + "m" + ], + "dtype": "float64", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, x):\n return a.astype(np.float64).T @ x.astype(np.float64)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_219.json b/definitions/simd-loop/loop_219.json new file mode 100644 index 0000000000000000000000000000000000000000..02b895e5620b8a5d187a08da89394dbab35e5984 --- /dev/null +++ b/definitions/simd-loop/loop_219.json @@ -0,0 +1,52 @@ +{ + "name": "loop_219", + "op_type": "loop_219", + "description": "Multiply an INT8 matrix by an INT8 vector accumulating into INT32 (column-major GEMV)", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "n", + "m" + ], + "dtype": "uint8" + }, + "b": { + "shape": [ + "n" + ], + "dtype": "uint8" + } + }, + "outputs": { + "c": { + "shape": [ + "m" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, b):\n return (a.astype(np.uint64).T @ b.astype(np.uint64)).astype(np.uint32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_220.json b/definitions/simd-loop/loop_220.json new file mode 100644 index 0000000000000000000000000000000000000000..f382e3db265335b96c05be34701b26542f86d7e1 --- /dev/null +++ b/definitions/simd-loop/loop_220.json @@ -0,0 +1,52 @@ +{ + "name": "loop_220", + "op_type": "loop_220", + "description": "Multiply an FP32 matrix by an FP32 vector (row-major GEMV)", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "m", + "n" + ], + "dtype": "float32" + }, + "x": { + "shape": [ + "n" + ], + "dtype": "float32" + } + }, + "outputs": { + "b": { + "shape": [ + "m" + ], + "dtype": "float32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, x):\n return (a.astype(np.float64) @ x.astype(np.float64)).astype(np.float32)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_221.json b/definitions/simd-loop/loop_221.json new file mode 100644 index 0000000000000000000000000000000000000000..71474f353dad35312bd574e30d4a09db3856d241 --- /dev/null +++ b/definitions/simd-loop/loop_221.json @@ -0,0 +1,52 @@ +{ + "name": "loop_221", + "op_type": "loop_221", + "description": "Multiply an FP64 matrix by an FP64 vector (row-major GEMV)", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "m", + "n" + ], + "dtype": "float64" + }, + "x": { + "shape": [ + "n" + ], + "dtype": "float64" + } + }, + "outputs": { + "b": { + "shape": [ + "m" + ], + "dtype": "float64", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a, x):\n return a.astype(np.float64) @ x.astype(np.float64)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/definitions/simd-loop/loop_223.json b/definitions/simd-loop/loop_223.json new file mode 100644 index 0000000000000000000000000000000000000000..d88baed912d76522c38747dcdf947d5c197b20d4 --- /dev/null +++ b/definitions/simd-loop/loop_223.json @@ -0,0 +1,47 @@ +{ + "name": "loop_223", + "op_type": "loop_223", + "description": "Transpose a matrix in-place using interleaved load and store", + "tags": [ + "simd-loop" + ], + "axes": { + "m": { + "type": "var", + "description": "axis m" + }, + "n": { + "type": "var", + "description": "axis n" + } + }, + "inputs": { + "a": { + "shape": [ + "m", + "n" + ], + "dtype": "uint32" + } + }, + "outputs": { + "at": { + "shape": [ + "n", + "m" + ], + "dtype": "uint32", + "description": "Output array" + } + }, + "reference": "import numpy as np\n\ndef run(a):\n return np.ascontiguousarray(a.T)\n", + "simd_loop_meta": { + "output_inplace": false, + "array_pad": 0, + "scratch": [], + "axes_order": [ + "m", + "n" + ] + } +} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json b/solutions/ncnn/baseline-ncnn-arm/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json deleted file mode 100644 index ae7ab84366689cb6488ce3e4f0134a08544d0559..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv1d_kw1_sw1_dw1_cout512_p0", - "definition": "conv1d_kw1_sw1_dw1_cout512_p0", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv1d_kw1_sw1_dw1_cout512_p0. binding.cpp bakes constexpr params and implements armbench_entry_conv1d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv1d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv1d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv1d baseline.\n// Called by armbench_entry_conv1d (binding.cpp); implemented by kernel.cpp.\n// Input/output are 2D ncnn::Mats (w=seq_len, h=channels).\n// num_output is encoded in top_blob.h (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution1d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_w, int stride_w, int dilation_w,\n int activation_type, const Mat& activation_params,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv1d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int out_c = 512;\nconstexpr int kernel_w = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_left = 0;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv1d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n // bottom is 2D ncnn::Mat (w=seq_len, h=C_in) \u2014 created by NcnnDataset.\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& act = *reinterpret_cast(act_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Pad the sequence (w) dimension symmetrically.\n ncnn::Mat bordered;\n ncnn::copy_make_border(bottom, bordered, 0, 0, pad_left, pad_left,\n ncnn::BORDER_CONSTANT, 0.f, opt);\n\n // Compute output sequence length.\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int out_w = (bordered.w - ext_kw) / stride_w + 1;\n\n // Pre-allocate top as 2D (w=out_w, h=out_c) so kernel reads out_c from top.h.\n top.create(out_w, out_c, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution1d_kernel(\n bordered, top, weight, bias,\n kernel_w, stride_w, dilation_w,\n activation_type, act, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv1d.h\"\n#include \"convolution1d_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution1d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_w, int stride_w, int dilation_w,\n int activation_type, const Mat& activation_params,\n const Option& opt)\n{\n // top_blob is pre-allocated 2D (w=out_w, h=out_c); read out_c from top_blob.h.\n const int num_output = top_blob.h;\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n Convolution1D_arm* conv = new Convolution1D_arm();\n conv->num_output = num_output;\n conv->kernel_w = kernel_w;\n conv->stride_w = stride_w;\n conv->dilation_w = dilation_w;\n conv->pad_left = 0;\n conv->pad_right = 0;\n conv->pad_value = 0.f;\n conv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv->weight_data_size = static_cast(weight_data.total());\n conv->activation_type = activation_type;\n conv->activation_params = activation_params;\n conv->dynamic_weight = 0;\n conv->weight_data = const_cast(weight_data);\n if (conv->bias_term) conv->bias_data = const_cast(bias_data);\n\n if (conv->create_pipeline(opt) != 0) { delete conv; return -1; }\n\n Mat local_top;\n int ret = conv->forward(bottom_blob, local_top, opt);\n delete conv;\n if (ret != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob (both 2D, same shape).\n for (int c = 0; c < num_output; ++c)\n std::memcpy(top_blob.row(c), local_top.row(c), top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json b/solutions/ncnn/baseline-ncnn-arm/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json deleted file mode 100644 index 57ca119d539346479ae7702d6e7aa2512e3a000b..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv1d_kw3_sw1_dw1_cout512_p1", - "definition": "conv1d_kw3_sw1_dw1_cout512_p1", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv1d_kw3_sw1_dw1_cout512_p1. binding.cpp bakes constexpr params and implements armbench_entry_conv1d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv1d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv1d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv1d baseline.\n// Called by armbench_entry_conv1d (binding.cpp); implemented by kernel.cpp.\n// Input/output are 2D ncnn::Mats (w=seq_len, h=channels).\n// num_output is encoded in top_blob.h (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution1d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_w, int stride_w, int dilation_w,\n int activation_type, const Mat& activation_params,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv1d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int out_c = 512;\nconstexpr int kernel_w = 3;\nconstexpr int stride_w = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv1d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n // bottom is 2D ncnn::Mat (w=seq_len, h=C_in) \u2014 created by NcnnDataset.\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& act = *reinterpret_cast(act_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Pad the sequence (w) dimension symmetrically.\n ncnn::Mat bordered;\n ncnn::copy_make_border(bottom, bordered, 0, 0, pad_left, pad_left,\n ncnn::BORDER_CONSTANT, 0.f, opt);\n\n // Compute output sequence length.\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int out_w = (bordered.w - ext_kw) / stride_w + 1;\n\n // Pre-allocate top as 2D (w=out_w, h=out_c) so kernel reads out_c from top.h.\n top.create(out_w, out_c, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution1d_kernel(\n bordered, top, weight, bias,\n kernel_w, stride_w, dilation_w,\n activation_type, act, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv1d.h\"\n#include \"convolution1d_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution1d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_w, int stride_w, int dilation_w,\n int activation_type, const Mat& activation_params,\n const Option& opt)\n{\n // top_blob is pre-allocated 2D (w=out_w, h=out_c); read out_c from top_blob.h.\n const int num_output = top_blob.h;\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n Convolution1D_arm* conv = new Convolution1D_arm();\n conv->num_output = num_output;\n conv->kernel_w = kernel_w;\n conv->stride_w = stride_w;\n conv->dilation_w = dilation_w;\n conv->pad_left = 0;\n conv->pad_right = 0;\n conv->pad_value = 0.f;\n conv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv->weight_data_size = static_cast(weight_data.total());\n conv->activation_type = activation_type;\n conv->activation_params = activation_params;\n conv->dynamic_weight = 0;\n conv->weight_data = const_cast(weight_data);\n if (conv->bias_term) conv->bias_data = const_cast(bias_data);\n\n if (conv->create_pipeline(opt) != 0) { delete conv; return -1; }\n\n Mat local_top;\n int ret = conv->forward(bottom_blob, local_top, opt);\n delete conv;\n if (ret != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob (both 2D, same shape).\n for (int c = 0; c < num_output; ++c)\n std::memcpy(top_blob.row(c), local_top.row(c), top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json b/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json deleted file mode 100644 index 60fd3a38dbc39228b15de28e0ff69e280c38bbba..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "definition": "conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256. binding.cpp bakes constexpr params and implements armbench_entry_conv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d baseline.\n// Called by armbench_entry_conv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 256;\nconstexpr int kernel_h = 1;\nconstexpr int kernel_w = 1;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_top = 0;\nconstexpr int pad_left = 0;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Compute output spatial dims.\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad_top - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad_left - ext_kw) / stride_w + 1;\n\n // Pre-allocate top so kernel reads num_output from top.c.\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad_top, pad_left,\n activation_type, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \"convolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n Convolution_arm conv;\n conv.num_output = num_output;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad_top; conv.pad_bottom = pad_top;\n conv.pad_left = pad_left; conv.pad_right = pad_left;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.int8_scale_term = 0;\n conv.activation_type = activation_type;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob, channel by channel.\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json b/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json deleted file mode 100644 index c7f6c1396d4ac7f7d2626cae1d2a5b7c9acaaece..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "definition": "conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128. binding.cpp bakes constexpr params and implements armbench_entry_conv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d baseline.\n// Called by armbench_entry_conv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 128;\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_top = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Compute output spatial dims.\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad_top - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad_left - ext_kw) / stride_w + 1;\n\n // Pre-allocate top so kernel reads num_output from top.c.\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad_top, pad_left,\n activation_type, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \"convolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n Convolution_arm conv;\n conv.num_output = num_output;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad_top; conv.pad_bottom = pad_top;\n conv.pad_left = pad_left; conv.pad_right = pad_left;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.int8_scale_term = 0;\n conv.activation_type = activation_type;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob, channel by channel.\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json b/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json deleted file mode 100644 index 6b3c598819ee50c0a6f35ef442862ceb05376e87..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "definition": "conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256. binding.cpp bakes constexpr params and implements armbench_entry_conv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d baseline.\n// Called by armbench_entry_conv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 256;\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 2;\nconstexpr int dilation_w = 2;\nconstexpr int pad_top = 2;\nconstexpr int pad_left = 2;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Compute output spatial dims.\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad_top - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad_left - ext_kw) / stride_w + 1;\n\n // Pre-allocate top so kernel reads num_output from top.c.\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad_top, pad_left,\n activation_type, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \"convolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n Convolution_arm conv;\n conv.num_output = num_output;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad_top; conv.pad_bottom = pad_top;\n conv.pad_left = pad_left; conv.pad_right = pad_left;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.int8_scale_term = 0;\n conv.activation_type = activation_type;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob, channel by channel.\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json b/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json deleted file mode 100644 index fc93296209481a966dfbb20906b438f23e0b8d0e..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "definition": "conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128. binding.cpp bakes constexpr params and implements armbench_entry_conv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d baseline.\n// Called by armbench_entry_conv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 128;\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 2;\nconstexpr int stride_w = 2;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_top = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Compute output spatial dims.\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad_top - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad_left - ext_kw) / stride_w + 1;\n\n // Pre-allocate top so kernel reads num_output from top.c.\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad_top, pad_left,\n activation_type, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \"convolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n Convolution_arm conv;\n conv.num_output = num_output;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad_top; conv.pad_bottom = pad_top;\n conv.pad_left = pad_left; conv.pad_right = pad_left;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.int8_scale_term = 0;\n conv.activation_type = activation_type;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob, channel by channel.\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json b/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json deleted file mode 100644 index deaca33522b0776ec5cafb66bc2ff29a5907c6d6..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "definition": "conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64. binding.cpp bakes constexpr params and implements armbench_entry_conv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d baseline.\n// Called by armbench_entry_conv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 64;\nconstexpr int kernel_h = 5;\nconstexpr int kernel_w = 5;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_top = 2;\nconstexpr int pad_left = 2;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Compute output spatial dims.\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad_top - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad_left - ext_kw) / stride_w + 1;\n\n // Pre-allocate top so kernel reads num_output from top.c.\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad_top, pad_left,\n activation_type, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \"convolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n Convolution_arm conv;\n conv.num_output = num_output;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad_top; conv.pad_bottom = pad_top;\n conv.pad_left = pad_left; conv.pad_right = pad_left;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.int8_scale_term = 0;\n conv.activation_type = activation_type;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob, channel by channel.\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json b/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json deleted file mode 100644 index 3ff73f960b9f1f6ea3d651985141f7771e4d6732..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "definition": "conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64. binding.cpp bakes constexpr params and implements armbench_entry_conv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d baseline.\n// Called by armbench_entry_conv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 64;\nconstexpr int kernel_h = 7;\nconstexpr int kernel_w = 7;\nconstexpr int stride_h = 2;\nconstexpr int stride_w = 2;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad_top = 3;\nconstexpr int pad_left = 3;\nconstexpr int activation_type = 0;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Compute output spatial dims.\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad_top - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad_left - ext_kw) / stride_w + 1;\n\n // Pre-allocate top so kernel reads num_output from top.c.\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::convolution2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad_top, pad_left,\n activation_type, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \"convolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::convolution2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad_top, int pad_left,\n int activation_type,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n Convolution_arm conv;\n conv.num_output = num_output;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad_top; conv.pad_bottom = pad_top;\n conv.pad_left = pad_left; conv.pad_right = pad_left;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.int8_scale_term = 0;\n conv.activation_type = activation_type;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n // Copy from local_top to pre-allocated top_blob, channel by channel.\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json b/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json deleted file mode 100644 index 717adef41808e02b0653a5014fbf1ae8ab345c92..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "definition": "conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1. binding.cpp bakes constexpr params and implements armbench_entry_conv2d_depthwise with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d_depthwise baseline.\n// Called by armbench_entry_conv2d_depthwise (binding.cpp); implemented by kernel.cpp.\n// num_output (== C, group == C) is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint conv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d_depthwise(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Depthwise: num_output == input channels.\n const int C = bottom.c;\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad - ext_kw) / stride_w + 1;\n\n top.create(W_out, H_out, C, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::conv2d_depthwise_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \"convolutiondepthwise_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::conv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad,\n const Option& opt)\n{\n const int C = top_blob.c; // pre-set by binding.cpp (== input channels)\n\n // ncnn's pack1 convdw3x3s1_neon reads 12 floats per iteration (for 8 outputs),\n // potentially overreading past the last channel's allocation when the bordered blob\n // lands near a page boundary. Use pack4 (4-channel interleaved) when possible to\n // take the safe convdw3x3s1_pack4_neon path instead.\n if (C % 4 == 0) {\n Option opt4 = opt;\n opt4.use_packing_layout = true;\n\n Mat bottom_pack4;\n convert_packing(bottom_blob, bottom_pack4, 4, opt4);\n\n ConvolutionDepthWise_arm conv;\n conv.num_output = C;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad; conv.pad_bottom = pad;\n conv.pad_left = pad; conv.pad_right = pad;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.group = C;\n conv.int8_scale_term = 0;\n conv.activation_type = 0;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt4) != 0) return -1;\n Mat top_pack4;\n if (conv.forward(bottom_pack4, top_pack4, opt4) != 0) return -1;\n\n Mat local_top;\n convert_packing(top_pack4, local_top, 1, opt);\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n }\n\n // Fallback pack1 path for C not divisible by 4.\n ConvolutionDepthWise_arm conv;\n conv.num_output = C;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad; conv.pad_bottom = pad;\n conv.pad_left = pad; conv.pad_right = pad;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.group = C;\n conv.int8_scale_term = 0;\n conv.activation_type = 0;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json b/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json deleted file mode 100644 index 80a9020bc444e669d21c039fafa06ad5160d6b9f..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "definition": "conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1. binding.cpp bakes constexpr params and implements armbench_entry_conv2d_depthwise with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d_depthwise baseline.\n// Called by armbench_entry_conv2d_depthwise (binding.cpp); implemented by kernel.cpp.\n// num_output (== C, group == C) is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint conv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 2;\nconstexpr int stride_w = 2;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d_depthwise(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Depthwise: num_output == input channels.\n const int C = bottom.c;\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad - ext_kw) / stride_w + 1;\n\n top.create(W_out, H_out, C, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::conv2d_depthwise_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \"convolutiondepthwise_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::conv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad,\n const Option& opt)\n{\n const int C = top_blob.c; // pre-set by binding.cpp (== input channels)\n\n // ncnn's pack1 convdw3x3s1_neon reads 12 floats per iteration (for 8 outputs),\n // potentially overreading past the last channel's allocation when the bordered blob\n // lands near a page boundary. Use pack4 (4-channel interleaved) when possible to\n // take the safe convdw3x3s1_pack4_neon path instead.\n if (C % 4 == 0) {\n Option opt4 = opt;\n opt4.use_packing_layout = true;\n\n Mat bottom_pack4;\n convert_packing(bottom_blob, bottom_pack4, 4, opt4);\n\n ConvolutionDepthWise_arm conv;\n conv.num_output = C;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad; conv.pad_bottom = pad;\n conv.pad_left = pad; conv.pad_right = pad;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.group = C;\n conv.int8_scale_term = 0;\n conv.activation_type = 0;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt4) != 0) return -1;\n Mat top_pack4;\n if (conv.forward(bottom_pack4, top_pack4, opt4) != 0) return -1;\n\n Mat local_top;\n convert_packing(top_pack4, local_top, 1, opt);\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n }\n\n // Fallback pack1 path for C not divisible by 4.\n ConvolutionDepthWise_arm conv;\n conv.num_output = C;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad; conv.pad_bottom = pad;\n conv.pad_left = pad; conv.pad_right = pad;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.group = C;\n conv.int8_scale_term = 0;\n conv.activation_type = 0;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json b/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json deleted file mode 100644 index af26d558c038e862de3b917fe19bb3ffc4a16b02..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "definition": "conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2. binding.cpp bakes constexpr params and implements armbench_entry_conv2d_depthwise with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for conv2d_depthwise baseline.\n// Called by armbench_entry_conv2d_depthwise (binding.cpp); implemented by kernel.cpp.\n// num_output (== C, group == C) is encoded in top_blob.c (pre-allocated by binding.cpp).\nnamespace ncnn {\nint conv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int kernel_h = 5;\nconstexpr int kernel_w = 5;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\nconstexpr int pad = 2;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_conv2d_depthwise(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Depthwise: num_output == input channels.\n const int C = bottom.c;\n const int ext_kh = dilation_h * (kernel_h - 1) + 1;\n const int ext_kw = dilation_w * (kernel_w - 1) + 1;\n const int H_out = (bottom.h + 2 * pad - ext_kh) / stride_h + 1;\n const int W_out = (bottom.w + 2 * pad - ext_kw) / stride_w + 1;\n\n top.create(W_out, H_out, C, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::conv2d_depthwise_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w,\n pad, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \"convolutiondepthwise_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::conv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n int pad,\n const Option& opt)\n{\n const int C = top_blob.c; // pre-set by binding.cpp (== input channels)\n\n // ncnn's pack1 convdw3x3s1_neon reads 12 floats per iteration (for 8 outputs),\n // potentially overreading past the last channel's allocation when the bordered blob\n // lands near a page boundary. Use pack4 (4-channel interleaved) when possible to\n // take the safe convdw3x3s1_pack4_neon path instead.\n if (C % 4 == 0) {\n Option opt4 = opt;\n opt4.use_packing_layout = true;\n\n Mat bottom_pack4;\n convert_packing(bottom_blob, bottom_pack4, 4, opt4);\n\n ConvolutionDepthWise_arm conv;\n conv.num_output = C;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad; conv.pad_bottom = pad;\n conv.pad_left = pad; conv.pad_right = pad;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.group = C;\n conv.int8_scale_term = 0;\n conv.activation_type = 0;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt4) != 0) return -1;\n Mat top_pack4;\n if (conv.forward(bottom_pack4, top_pack4, opt4) != 0) return -1;\n\n Mat local_top;\n convert_packing(top_pack4, local_top, 1, opt);\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n }\n\n // Fallback pack1 path for C not divisible by 4.\n ConvolutionDepthWise_arm conv;\n conv.num_output = C;\n conv.kernel_h = kernel_h; conv.kernel_w = kernel_w;\n conv.stride_h = stride_h; conv.stride_w = stride_w;\n conv.dilation_h = dilation_h; conv.dilation_w = dilation_w;\n conv.pad_top = pad; conv.pad_bottom = pad;\n conv.pad_left = pad; conv.pad_right = pad;\n conv.pad_value = 0.f;\n conv.bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n conv.weight_data_size = static_cast(weight_data.total());\n conv.group = C;\n conv.int8_scale_term = 0;\n conv.activation_type = 0;\n conv.activation_params = Mat();\n conv.dynamic_weight = 0;\n conv.weight_data = const_cast(weight_data);\n if (conv.bias_term) conv.bias_data = const_cast(bias_data);\n\n if (conv.create_pipeline(opt) != 0) return -1;\n Mat local_top;\n if (conv.forward(bottom_blob, local_top, opt) != 0) return -1;\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json b/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json deleted file mode 100644 index 72ff72d351524e491e28288a9d3bd9ed21b82d9e..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_deconv2d_kh3_kw3_sh1_sw1_cout256", - "definition": "deconv2d_kh3_kw3_sh1_sw1_cout256", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for deconv2d_kh3_kw3_sh1_sw1_cout256. binding.cpp bakes constexpr params and implements armbench_entry_deconv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for deconv2d baseline (transposed conv2d).\n// Called by armbench_entry_deconv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\n// No input/output padding \u2014 all deconv2d definitions have pad=0.\nnamespace ncnn {\nint deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"deconv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 256;\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_deconv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Standard transposed-conv output size with pad=0, output_pad=0.\n const int H_out = (bottom.h - 1) * stride_h + kernel_h;\n const int W_out = (bottom.w - 1) * stride_w + kernel_w;\n\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::deconv2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"deconv2d.h\"\n#include \"deconvolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n Deconvolution_arm* deconv = new Deconvolution_arm();\n deconv->num_output = num_output;\n deconv->kernel_h = kernel_h; deconv->kernel_w = kernel_w;\n deconv->stride_h = stride_h; deconv->stride_w = stride_w;\n deconv->dilation_h = dilation_h; deconv->dilation_w = dilation_w;\n deconv->pad_top = 0; deconv->pad_bottom = 0;\n deconv->pad_left = 0; deconv->pad_right = 0;\n deconv->output_pad_right = 0; deconv->output_pad_bottom = 0;\n deconv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n deconv->weight_data_size = static_cast(weight_data.total());\n deconv->activation_type = 0;\n deconv->activation_params = Mat();\n deconv->dynamic_weight = 0;\n deconv->weight_data = const_cast(weight_data);\n if (deconv->bias_term) deconv->bias_data = const_cast(bias_data);\n\n if (deconv->create_pipeline(opt) != 0) { delete deconv; return -1; }\n\n Mat local_top;\n int ret = deconv->forward(bottom_blob, local_top, opt);\n delete deconv;\n if (ret != 0) return -1;\n\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json b/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json deleted file mode 100644 index cecf6a6e503b0e7ae4e9172c17669cd949663b7d..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_deconv2d_kh3_kw3_sh2_sw2_cout256", - "definition": "deconv2d_kh3_kw3_sh2_sw2_cout256", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for deconv2d_kh3_kw3_sh2_sw2_cout256. binding.cpp bakes constexpr params and implements armbench_entry_deconv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for deconv2d baseline (transposed conv2d).\n// Called by armbench_entry_deconv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\n// No input/output padding \u2014 all deconv2d definitions have pad=0.\nnamespace ncnn {\nint deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"deconv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 256;\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 2;\nconstexpr int stride_w = 2;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_deconv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Standard transposed-conv output size with pad=0, output_pad=0.\n const int H_out = (bottom.h - 1) * stride_h + kernel_h;\n const int W_out = (bottom.w - 1) * stride_w + kernel_w;\n\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::deconv2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"deconv2d.h\"\n#include \"deconvolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n Deconvolution_arm* deconv = new Deconvolution_arm();\n deconv->num_output = num_output;\n deconv->kernel_h = kernel_h; deconv->kernel_w = kernel_w;\n deconv->stride_h = stride_h; deconv->stride_w = stride_w;\n deconv->dilation_h = dilation_h; deconv->dilation_w = dilation_w;\n deconv->pad_top = 0; deconv->pad_bottom = 0;\n deconv->pad_left = 0; deconv->pad_right = 0;\n deconv->output_pad_right = 0; deconv->output_pad_bottom = 0;\n deconv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n deconv->weight_data_size = static_cast(weight_data.total());\n deconv->activation_type = 0;\n deconv->activation_params = Mat();\n deconv->dynamic_weight = 0;\n deconv->weight_data = const_cast(weight_data);\n if (deconv->bias_term) deconv->bias_data = const_cast(bias_data);\n\n if (deconv->create_pipeline(opt) != 0) { delete deconv; return -1; }\n\n Mat local_top;\n int ret = deconv->forward(bottom_blob, local_top, opt);\n delete deconv;\n if (ret != 0) return -1;\n\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json b/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json deleted file mode 100644 index 78dcf45d6534f8b32699e0b05c75ce4d1b66c8be..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_deconv2d_kh4_kw4_sh1_sw1_cout128", - "definition": "deconv2d_kh4_kw4_sh1_sw1_cout128", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for deconv2d_kh4_kw4_sh1_sw1_cout128. binding.cpp bakes constexpr params and implements armbench_entry_deconv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for deconv2d baseline (transposed conv2d).\n// Called by armbench_entry_deconv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\n// No input/output padding \u2014 all deconv2d definitions have pad=0.\nnamespace ncnn {\nint deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"deconv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 128;\nconstexpr int kernel_h = 4;\nconstexpr int kernel_w = 4;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_deconv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Standard transposed-conv output size with pad=0, output_pad=0.\n const int H_out = (bottom.h - 1) * stride_h + kernel_h;\n const int W_out = (bottom.w - 1) * stride_w + kernel_w;\n\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::deconv2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"deconv2d.h\"\n#include \"deconvolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n Deconvolution_arm* deconv = new Deconvolution_arm();\n deconv->num_output = num_output;\n deconv->kernel_h = kernel_h; deconv->kernel_w = kernel_w;\n deconv->stride_h = stride_h; deconv->stride_w = stride_w;\n deconv->dilation_h = dilation_h; deconv->dilation_w = dilation_w;\n deconv->pad_top = 0; deconv->pad_bottom = 0;\n deconv->pad_left = 0; deconv->pad_right = 0;\n deconv->output_pad_right = 0; deconv->output_pad_bottom = 0;\n deconv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n deconv->weight_data_size = static_cast(weight_data.total());\n deconv->activation_type = 0;\n deconv->activation_params = Mat();\n deconv->dynamic_weight = 0;\n deconv->weight_data = const_cast(weight_data);\n if (deconv->bias_term) deconv->bias_data = const_cast(bias_data);\n\n if (deconv->create_pipeline(opt) != 0) { delete deconv; return -1; }\n\n Mat local_top;\n int ret = deconv->forward(bottom_blob, local_top, opt);\n delete deconv;\n if (ret != 0) return -1;\n\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json b/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json deleted file mode 100644 index 80962a730ae285c539ea541e14902075ccd44f7c..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_deconv2d_kh4_kw4_sh2_sw2_cout128", - "definition": "deconv2d_kh4_kw4_sh2_sw2_cout128", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for deconv2d_kh4_kw4_sh2_sw2_cout128. binding.cpp bakes constexpr params and implements armbench_entry_deconv2d with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for deconv2d baseline (transposed conv2d).\n// Called by armbench_entry_deconv2d (binding.cpp); implemented by kernel.cpp.\n// num_output is encoded in top_blob.c (pre-allocated by binding.cpp).\n// No input/output padding \u2014 all deconv2d definitions have pad=0.\nnamespace ncnn {\nint deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"deconv2d.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int num_output = 128;\nconstexpr int kernel_h = 4;\nconstexpr int kernel_w = 4;\nconstexpr int stride_h = 2;\nconstexpr int stride_w = 2;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_deconv2d(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Standard transposed-conv output size with pad=0, output_pad=0.\n const int H_out = (bottom.h - 1) * stride_h + kernel_h;\n const int W_out = (bottom.w - 1) * stride_w + kernel_w;\n\n top.create(W_out, H_out, num_output, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::deconv2d_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"deconv2d.h\"\n#include \"deconvolution_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::deconv2d_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt)\n{\n const int num_output = top_blob.c; // pre-set by binding.cpp\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n Deconvolution_arm* deconv = new Deconvolution_arm();\n deconv->num_output = num_output;\n deconv->kernel_h = kernel_h; deconv->kernel_w = kernel_w;\n deconv->stride_h = stride_h; deconv->stride_w = stride_w;\n deconv->dilation_h = dilation_h; deconv->dilation_w = dilation_w;\n deconv->pad_top = 0; deconv->pad_bottom = 0;\n deconv->pad_left = 0; deconv->pad_right = 0;\n deconv->output_pad_right = 0; deconv->output_pad_bottom = 0;\n deconv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n deconv->weight_data_size = static_cast(weight_data.total());\n deconv->activation_type = 0;\n deconv->activation_params = Mat();\n deconv->dynamic_weight = 0;\n deconv->weight_data = const_cast(weight_data);\n if (deconv->bias_term) deconv->bias_data = const_cast(bias_data);\n\n if (deconv->create_pipeline(opt) != 0) { delete deconv; return -1; }\n\n Mat local_top;\n int ret = deconv->forward(bottom_blob, local_top, opt);\n delete deconv;\n if (ret != 0) return -1;\n\n for (int c = 0; c < num_output; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json b/solutions/ncnn/baseline-ncnn-arm/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json deleted file mode 100644 index 6715c3fc72e322f09f9252535ccab96a6f3416b3..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_deconv2d_depthwise_kh2_kw2_sh2_sw2", - "definition": "deconv2d_depthwise_kh2_kw2_sh2_sw2", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for deconv2d_depthwise_kh2_kw2_sh2_sw2. binding.cpp bakes constexpr params and implements armbench_entry_deconv2d_depthwise with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_deconv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "deconv2d_depthwise.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for deconv2d_depthwise baseline (depthwise transposed conv2d).\n// Called by armbench_entry_deconv2d_depthwise (binding.cpp); implemented by kernel.cpp.\n// num_output (== C, group == C) is encoded in top_blob.c (pre-allocated by binding.cpp).\n// No input/output padding \u2014 all deconv2d_depthwise definitions have pad=0.\nnamespace ncnn {\nint deconv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"deconv2d_depthwise.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int kernel_h = 2;\nconstexpr int kernel_w = 2;\nconstexpr int stride_h = 2;\nconstexpr int stride_w = 2;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_deconv2d_depthwise(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Depthwise: num_output == input channels, pad=0, output_pad=0.\n const int C = bottom.c;\n const int H_out = (bottom.h - 1) * stride_h + kernel_h;\n const int W_out = (bottom.w - 1) * stride_w + kernel_w;\n\n top.create(W_out, H_out, C, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::deconv2d_depthwise_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"deconv2d_depthwise.h\"\n#include \"deconvolutiondepthwise_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::deconv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt)\n{\n const int C = top_blob.c; // pre-set by binding.cpp (== input channels)\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n DeconvolutionDepthWise_arm* dconv = new DeconvolutionDepthWise_arm();\n dconv->num_output = C;\n dconv->kernel_h = kernel_h; dconv->kernel_w = kernel_w;\n dconv->stride_h = stride_h; dconv->stride_w = stride_w;\n dconv->dilation_h = dilation_h; dconv->dilation_w = dilation_w;\n dconv->pad_top = 0; dconv->pad_bottom = 0;\n dconv->pad_left = 0; dconv->pad_right = 0;\n dconv->output_pad_right = 0; dconv->output_pad_bottom = 0;\n dconv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n dconv->weight_data_size = static_cast(weight_data.total());\n dconv->group = C;\n dconv->activation_type = 0;\n dconv->activation_params = Mat();\n dconv->dynamic_weight = 0;\n dconv->weight_data = const_cast(weight_data);\n if (dconv->bias_term) dconv->bias_data = const_cast(bias_data);\n\n if (dconv->create_pipeline(opt) != 0) { delete dconv; return -1; }\n\n Mat local_top;\n int ret = dconv->forward(bottom_blob, local_top, opt);\n delete dconv;\n if (ret != 0) return -1;\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/baseline-ncnn-arm/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json b/solutions/ncnn/baseline-ncnn-arm/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json deleted file mode 100644 index 29c81af160e176d6601de27943c270499714e77c..0000000000000000000000000000000000000000 --- a/solutions/ncnn/baseline-ncnn-arm/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "baseline-ncnn-arm_deconv2d_depthwise_kh3_kw3_sh1_sw1", - "definition": "deconv2d_depthwise_kh3_kw3_sh1_sw1", - "dataset": "ncnn", - "author": "baseline-ncnn-arm", - "description": "ncnn::*_arm baseline for deconv2d_depthwise_kh3_kw3_sh1_sw1. binding.cpp bakes constexpr params and implements armbench_entry_deconv2d_depthwise with void* ncnn::Mat ABI; kernel.cpp delegates to libncnn.a. Timing baseline for speedup computation.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve", - "graviton4", - "aarch64-sve2" - ], - "entry_point": "binding.cpp::armbench_entry_deconv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O3", - "-std=c++17" - ], - "link_flags": [ - "-fopenmp" - ] - }, - "sources": [ - { - "path": "deconv2d_depthwise.h", - "content": "#pragma once\n#include \"mat.h\"\n#include \"option.h\"\n\n// Harness contract for deconv2d_depthwise baseline (depthwise transposed conv2d).\n// Called by armbench_entry_deconv2d_depthwise (binding.cpp); implemented by kernel.cpp.\n// num_output (== C, group == C) is encoded in top_blob.c (pre-allocated by binding.cpp).\n// No input/output padding \u2014 all deconv2d_depthwise definitions have pad=0.\nnamespace ncnn {\nint deconv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt);\n}\n" - }, - { - "path": "binding.cpp", - "content": "#include \"deconv2d_depthwise.h\"\n#include \"mat.h\"\n#include \"option.h\"\n\nnamespace {\nconstexpr int kernel_h = 3;\nconstexpr int kernel_w = 3;\nconstexpr int stride_h = 1;\nconstexpr int stride_w = 1;\nconstexpr int dilation_h = 1;\nconstexpr int dilation_w = 1;\n} // namespace\n\nextern \"C\" {\nint armbench_entry_deconv2d_depthwise(\n void* bottom_v, void* top_v,\n void* weight_v, void* bias_v,\n void* act_v, void* opt_v)\n{\n const auto& bottom = *reinterpret_cast(bottom_v);\n auto& top = *reinterpret_cast(top_v);\n const auto& weight = *reinterpret_cast(weight_v);\n const auto& bias = *reinterpret_cast(bias_v);\n const auto& opt = *reinterpret_cast(opt_v);\n\n // Depthwise: num_output == input channels, pad=0, output_pad=0.\n const int C = bottom.c;\n const int H_out = (bottom.h - 1) * stride_h + kernel_h;\n const int W_out = (bottom.w - 1) * stride_w + kernel_w;\n\n top.create(W_out, H_out, C, (size_t)4u, opt.blob_allocator);\n if (top.empty()) return -1;\n\n return ncnn::deconv2d_depthwise_kernel(\n bottom, top, weight, bias,\n kernel_h, kernel_w,\n stride_h, stride_w,\n dilation_h, dilation_w, opt);\n}\n} // extern \"C\"\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"deconv2d_depthwise.h\"\n#include \"deconvolutiondepthwise_arm.h\"\n#include \"mat.h\"\n#include \"option.h\"\n#include \n\nint ncnn::deconv2d_depthwise_kernel(\n const Mat& bottom_blob, Mat& top_blob,\n const Mat& weight_data, const Mat& bias_data,\n int kernel_h, int kernel_w,\n int stride_h, int stride_w,\n int dilation_h, int dilation_w,\n const Option& opt)\n{\n const int C = top_blob.c; // pre-set by binding.cpp (== input channels)\n\n // Use heap allocation: stack-allocated ncnn ARM layers fail to populate\n // weight_data_tm in create_pipeline on AArch64 with -O3.\n DeconvolutionDepthWise_arm* dconv = new DeconvolutionDepthWise_arm();\n dconv->num_output = C;\n dconv->kernel_h = kernel_h; dconv->kernel_w = kernel_w;\n dconv->stride_h = stride_h; dconv->stride_w = stride_w;\n dconv->dilation_h = dilation_h; dconv->dilation_w = dilation_w;\n dconv->pad_top = 0; dconv->pad_bottom = 0;\n dconv->pad_left = 0; dconv->pad_right = 0;\n dconv->output_pad_right = 0; dconv->output_pad_bottom = 0;\n dconv->bias_term = (!bias_data.empty() && bias_data.total() > 0) ? 1 : 0;\n dconv->weight_data_size = static_cast(weight_data.total());\n dconv->group = C;\n dconv->activation_type = 0;\n dconv->activation_params = Mat();\n dconv->dynamic_weight = 0;\n dconv->weight_data = const_cast(weight_data);\n if (dconv->bias_term) dconv->bias_data = const_cast(bias_data);\n\n if (dconv->create_pipeline(opt) != 0) { delete dconv; return -1; }\n\n Mat local_top;\n int ret = dconv->forward(bottom_blob, local_top, opt);\n delete dconv;\n if (ret != 0) return -1;\n\n for (int c = 0; c < C; ++c)\n std::memcpy((float*)top_blob.channel(c), (const float*)local_top.channel(c),\n top_blob.h * top_blob.w * sizeof(float));\n return 0;\n}\n" - } - ] -} diff --git a/solutions/ncnn/claude-sonnet-4-6/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json b/solutions/ncnn/claude-sonnet-4-6/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json deleted file mode 100644 index c60dbaa7a7c9fe5cfab4ef3ef26be6ff7a90f35d..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv1d_kw1_sw1_dw1_cout512_p0", - "definition": "conv1d_kw1_sw1_dw1_cout512_p0", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv1d.cpp::armbench_entry_conv1d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv1d.h", - "content": "#pragma once\n\n// Per-definition constants for this conv1d specialisation.\nnamespace conv1d_def {\nconstexpr int Cout = 512;\nconstexpr int Kw = 1;\nconstexpr int Sw = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 0;\n} // namespace conv1d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// C_in, W, W_out are var dims; W_out is pre-computed by the binding harness.\n// Input layout: (C_in, W), output layout: (Cout, W_out).\nvoid inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv1d.cpp", - "content": "// Binding harness: computes W_out from constexpr params, calls inner_conv1d.\n// ABI: armbench_entry_conv1d(input*, output*, weight*, bias*, C_in, W)\n// Input layout: (C_in, W); output layout: (Cout, W_out).\n#include \"conv1d.h\"\nusing namespace conv1d_def;\n\nextern \"C\" int armbench_entry_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W)\n{\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv1d(input, output, weight, bias, C_in, W, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized conv1d kernel for Kw=1, Sw=1, Dw=1, Cout=512, pad=0\n// Since Kw=1, this reduces to a matrix multiplication:\n// output[oc, ow] = bias[oc] + sum_ic(weight[oc, ic] * input[ic, ow])\n//\n// Strategy: GEMM with OC_TILE=16, vectorize over W_out with SVE.\n// Each ic iteration: load 1 input vector, FMA into 16 output rows.\n// This maximizes register reuse of the input vector and amortizes weight loads.\n// Use 2 SVE vectors per OC row to increase ILP.\n\n#include \"conv1d.h\"\n#include \n\nusing namespace conv1d_def;\n\n// Process 16 output channels at a time, vectorizing over W_out\n// This is a GEMM: output(Cout x W_out) += weight(Cout x C_in) * input(C_in x W_out)\n// For each ic: broadcast weight[oc+i, ic] and FMA with input[ic, ow:ow+vl]\nstatic void __attribute__((noinline)) gemm_oc16(\n const float* __restrict__ input,\n float* __restrict__ output,\n const float* __restrict__ weight,\n int C_in, int W_out,\n int oc_base)\n{\n svbool_t pg = svptrue_b32();\n const int vl = svcntw();\n\n // Pointers to 16 output rows\n float* o0 = output + (long)(oc_base+ 0) * W_out;\n float* o1 = output + (long)(oc_base+ 1) * W_out;\n float* o2 = output + (long)(oc_base+ 2) * W_out;\n float* o3 = output + (long)(oc_base+ 3) * W_out;\n float* o4 = output + (long)(oc_base+ 4) * W_out;\n float* o5 = output + (long)(oc_base+ 5) * W_out;\n float* o6 = output + (long)(oc_base+ 6) * W_out;\n float* o7 = output + (long)(oc_base+ 7) * W_out;\n float* o8 = output + (long)(oc_base+ 8) * W_out;\n float* o9 = output + (long)(oc_base+ 9) * W_out;\n float* o10 = output + (long)(oc_base+10) * W_out;\n float* o11 = output + (long)(oc_base+11) * W_out;\n float* o12 = output + (long)(oc_base+12) * W_out;\n float* o13 = output + (long)(oc_base+13) * W_out;\n float* o14 = output + (long)(oc_base+14) * W_out;\n float* o15 = output + (long)(oc_base+15) * W_out;\n\n // Pointers to 16 weight rows\n const float* w0 = weight + (long)(oc_base+ 0) * C_in;\n const float* w1 = weight + (long)(oc_base+ 1) * C_in;\n const float* w2 = weight + (long)(oc_base+ 2) * C_in;\n const float* w3 = weight + (long)(oc_base+ 3) * C_in;\n const float* w4 = weight + (long)(oc_base+ 4) * C_in;\n const float* w5 = weight + (long)(oc_base+ 5) * C_in;\n const float* w6 = weight + (long)(oc_base+ 6) * C_in;\n const float* w7 = weight + (long)(oc_base+ 7) * C_in;\n const float* w8 = weight + (long)(oc_base+ 8) * C_in;\n const float* w9 = weight + (long)(oc_base+ 9) * C_in;\n const float* w10 = weight + (long)(oc_base+10) * C_in;\n const float* w11 = weight + (long)(oc_base+11) * C_in;\n const float* w12 = weight + (long)(oc_base+12) * C_in;\n const float* w13 = weight + (long)(oc_base+13) * C_in;\n const float* w14 = weight + (long)(oc_base+14) * C_in;\n const float* w15 = weight + (long)(oc_base+15) * C_in;\n\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_row = input + (long)ic * W_out;\n\n // Load 16 weight scalars\n svfloat32_t vw0 = svdup_f32(w0[ic]);\n svfloat32_t vw1 = svdup_f32(w1[ic]);\n svfloat32_t vw2 = svdup_f32(w2[ic]);\n svfloat32_t vw3 = svdup_f32(w3[ic]);\n svfloat32_t vw4 = svdup_f32(w4[ic]);\n svfloat32_t vw5 = svdup_f32(w5[ic]);\n svfloat32_t vw6 = svdup_f32(w6[ic]);\n svfloat32_t vw7 = svdup_f32(w7[ic]);\n svfloat32_t vw8 = svdup_f32(w8[ic]);\n svfloat32_t vw9 = svdup_f32(w9[ic]);\n svfloat32_t vw10 = svdup_f32(w10[ic]);\n svfloat32_t vw11 = svdup_f32(w11[ic]);\n svfloat32_t vw12 = svdup_f32(w12[ic]);\n svfloat32_t vw13 = svdup_f32(w13[ic]);\n svfloat32_t vw14 = svdup_f32(w14[ic]);\n svfloat32_t vw15 = svdup_f32(w15[ic]);\n\n int ow = 0;\n // Main loop: process 2 SVE vectors at a time\n for (; ow + 2*vl <= W_out; ow += 2*vl) {\n svfloat32_t vin0 = svld1_f32(pg, in_row + ow);\n svfloat32_t vin1 = svld1_f32(pg, in_row + ow + vl);\n\n #define FMA2(op, vw) \\\n do { \\\n svfloat32_t va = svld1_f32(pg, op + ow); \\\n svfloat32_t vb = svld1_f32(pg, op + ow + vl); \\\n va = svmla_f32_x(pg, va, vin0, vw); \\\n vb = svmla_f32_x(pg, vb, vin1, vw); \\\n svst1_f32(pg, op + ow, va); \\\n svst1_f32(pg, op + ow + vl, vb); \\\n } while(0)\n\n FMA2(o0, vw0);\n FMA2(o1, vw1);\n FMA2(o2, vw2);\n FMA2(o3, vw3);\n FMA2(o4, vw4);\n FMA2(o5, vw5);\n FMA2(o6, vw6);\n FMA2(o7, vw7);\n FMA2(o8, vw8);\n FMA2(o9, vw9);\n FMA2(o10, vw10);\n FMA2(o11, vw11);\n FMA2(o12, vw12);\n FMA2(o13, vw13);\n FMA2(o14, vw14);\n FMA2(o15, vw15);\n #undef FMA2\n }\n\n // Handle remaining full vectors\n for (; ow + vl <= W_out; ow += vl) {\n svfloat32_t vin = svld1_f32(pg, in_row + ow);\n\n #define FMA1(op, vw) \\\n do { \\\n svfloat32_t va = svld1_f32(pg, op + ow); \\\n va = svmla_f32_x(pg, va, vin, vw); \\\n svst1_f32(pg, op + ow, va); \\\n } while(0)\n\n FMA1(o0, vw0);\n FMA1(o1, vw1);\n FMA1(o2, vw2);\n FMA1(o3, vw3);\n FMA1(o4, vw4);\n FMA1(o5, vw5);\n FMA1(o6, vw6);\n FMA1(o7, vw7);\n FMA1(o8, vw8);\n FMA1(o9, vw9);\n FMA1(o10, vw10);\n FMA1(o11, vw11);\n FMA1(o12, vw12);\n FMA1(o13, vw13);\n FMA1(o14, vw14);\n FMA1(o15, vw15);\n #undef FMA1\n }\n\n // Handle tail\n if (ow < W_out) {\n svbool_t ptail = svwhilelt_b32(ow, W_out);\n svfloat32_t vin = svld1_f32(ptail, in_row + ow);\n\n #define FMAT(op, vw) \\\n do { \\\n svfloat32_t va = svld1_f32(ptail, op + ow); \\\n va = svmla_f32_x(ptail, va, vin, vw); \\\n svst1_f32(ptail, op + ow, va); \\\n } while(0)\n\n FMAT(o0, vw0);\n FMAT(o1, vw1);\n FMAT(o2, vw2);\n FMAT(o3, vw3);\n FMAT(o4, vw4);\n FMAT(o5, vw5);\n FMAT(o6, vw6);\n FMAT(o7, vw7);\n FMAT(o8, vw8);\n FMAT(o9, vw9);\n FMAT(o10, vw10);\n FMAT(o11, vw11);\n FMAT(o12, vw12);\n FMAT(o13, vw13);\n FMAT(o14, vw14);\n FMAT(o15, vw15);\n #undef FMAT\n }\n }\n}\n\nextern \"C\" void inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out)\n{\n const int vl = svcntw();\n svbool_t pg = svptrue_b32();\n\n // Initialize output with bias\n for (int oc = 0; oc < Cout; ++oc) {\n float* out_c = output + (long)oc * W_out;\n svfloat32_t vb = svdup_f32(bias[oc]);\n int ow = 0;\n for (; ow + vl <= W_out; ow += vl) {\n svst1_f32(pg, out_c + ow, vb);\n }\n if (ow < W_out) {\n svbool_t ptail = svwhilelt_b32(ow, W_out);\n svst1_f32(ptail, out_c + ow, vb);\n }\n }\n\n // Main GEMM loop: output += weight * input\n // Cout=512 is divisible by 16\n for (int oc = 0; oc < Cout; oc += 16) {\n gemm_oc16(input, output, weight, C_in, W_out, oc);\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json b/solutions/ncnn/claude-sonnet-4-6/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json deleted file mode 100644 index ece4030ad662ec0fed40500394e0313941e5131f..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv1d_kw3_sw1_dw1_cout512_p1", - "definition": "conv1d_kw3_sw1_dw1_cout512_p1", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv1d.cpp::armbench_entry_conv1d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv1d.h", - "content": "#pragma once\n\n// Per-definition constants for this conv1d specialisation.\nnamespace conv1d_def {\nconstexpr int Cout = 512;\nconstexpr int Kw = 3;\nconstexpr int Sw = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 1;\n} // namespace conv1d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// C_in, W, W_out are var dims; W_out is pre-computed by the binding harness.\n// Input layout: (C_in, W), output layout: (Cout, W_out).\nvoid inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv1d.cpp", - "content": "// Binding harness: computes W_out from constexpr params, calls inner_conv1d.\n// ABI: armbench_entry_conv1d(input*, output*, weight*, bias*, C_in, W)\n// Input layout: (C_in, W); output layout: (Cout, W_out).\n#include \"conv1d.h\"\nusing namespace conv1d_def;\n\nextern \"C\" int armbench_entry_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W)\n{\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv1d(input, output, weight, bias, C_in, W, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv1d.h\"\n#include \n#include \n#include \n\nusing namespace conv1d_def;\n\n// Observation: v3 achieves ~1.4x cycle speedup with 4-OC tiling.\n// Key bottleneck: IPC ~2.6, cache misses are low (good).\n// The inner loop does scalar weight loads (mov z.s, s) which is inefficient.\n// Strategy: Increase OC tile to 8, and also tile over ow (multiple SVE vectors per oc group).\n// This increases register reuse and hides FMA latency (4 cycles on Graviton3).\n// With 8 accumulators per ow position and 2 ow positions, we have 16 FMA chains.\n\nextern \"C\" void inner_conv1d(\n const float* __restrict__ input, float* __restrict__ output,\n const float* __restrict__ weight, const float* __restrict__ bias,\n int C_in, int W, int W_out)\n{\n const int vl = svcntw(); // SVE vector length in floats (8 for 256-bit)\n svbool_t pg_all = svptrue_b32();\n \n // Process 8 output channels at a time\n const int OC_TILE = 8;\n \n for (int oc_base = 0; oc_base < Cout; oc_base += OC_TILE) {\n // Output pointers for 8 channels\n float* out0 = output + (long)(oc_base + 0) * W_out;\n float* out1 = output + (long)(oc_base + 1) * W_out;\n float* out2 = output + (long)(oc_base + 2) * W_out;\n float* out3 = output + (long)(oc_base + 3) * W_out;\n float* out4 = output + (long)(oc_base + 4) * W_out;\n float* out5 = output + (long)(oc_base + 5) * W_out;\n float* out6 = output + (long)(oc_base + 6) * W_out;\n float* out7 = output + (long)(oc_base + 7) * W_out;\n \n // Weight pointers for 8 channels\n const float* w0 = weight + (long)(oc_base + 0) * C_in * Kw;\n const float* w1 = weight + (long)(oc_base + 1) * C_in * Kw;\n const float* w2 = weight + (long)(oc_base + 2) * C_in * Kw;\n const float* w3 = weight + (long)(oc_base + 3) * C_in * Kw;\n const float* w4 = weight + (long)(oc_base + 4) * C_in * Kw;\n const float* w5 = weight + (long)(oc_base + 5) * C_in * Kw;\n const float* w6 = weight + (long)(oc_base + 6) * C_in * Kw;\n const float* w7 = weight + (long)(oc_base + 7) * C_in * Kw;\n \n // Bias values\n float b0 = bias[oc_base + 0];\n float b1 = bias[oc_base + 1];\n float b2 = bias[oc_base + 2];\n float b3 = bias[oc_base + 3];\n float b4 = bias[oc_base + 4];\n float b5 = bias[oc_base + 5];\n float b6 = bias[oc_base + 6];\n float b7 = bias[oc_base + 7];\n \n svfloat32_t vb0 = svdup_f32(b0);\n svfloat32_t vb1 = svdup_f32(b1);\n svfloat32_t vb2 = svdup_f32(b2);\n svfloat32_t vb3 = svdup_f32(b3);\n svfloat32_t vb4 = svdup_f32(b4);\n svfloat32_t vb5 = svdup_f32(b5);\n svfloat32_t vb6 = svdup_f32(b6);\n svfloat32_t vb7 = svdup_f32(b7);\n \n // Process ow in blocks of vl\n // W_out = W (since pad=1, Kw=3, Sw=1)\n int ow = 0;\n for (; ow + vl <= W_out; ow += vl) {\n svfloat32_t acc0 = vb0;\n svfloat32_t acc1 = vb1;\n svfloat32_t acc2 = vb2;\n svfloat32_t acc3 = vb3;\n svfloat32_t acc4 = vb4;\n svfloat32_t acc5 = vb5;\n svfloat32_t acc6 = vb6;\n svfloat32_t acc7 = vb7;\n \n bool left_boundary = (ow == 0);\n bool right_boundary = (ow + vl == W_out);\n \n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_c = input + (long)ic * W;\n int woff = ic * Kw;\n \n float wv00 = w0[woff], wv01 = w0[woff+1], wv02 = w0[woff+2];\n float wv10 = w1[woff], wv11 = w1[woff+1], wv12 = w1[woff+2];\n float wv20 = w2[woff], wv21 = w2[woff+1], wv22 = w2[woff+2];\n float wv30 = w3[woff], wv31 = w3[woff+1], wv32 = w3[woff+2];\n float wv40 = w4[woff], wv41 = w4[woff+1], wv42 = w4[woff+2];\n float wv50 = w5[woff], wv51 = w5[woff+1], wv52 = w5[woff+2];\n float wv60 = w6[woff], wv61 = w6[woff+1], wv62 = w6[woff+2];\n float wv70 = w7[woff], wv71 = w7[woff+1], wv72 = w7[woff+2];\n \n // kw=0: iw = ow - 1 + lane\n if (!left_boundary) {\n svfloat32_t vin = svld1_f32(pg_all, in_c + ow - 1);\n acc0 = svmla_n_f32_m(pg_all, acc0, vin, wv00);\n acc1 = svmla_n_f32_m(pg_all, acc1, vin, wv10);\n acc2 = svmla_n_f32_m(pg_all, acc2, vin, wv20);\n acc3 = svmla_n_f32_m(pg_all, acc3, vin, wv30);\n acc4 = svmla_n_f32_m(pg_all, acc4, vin, wv40);\n acc5 = svmla_n_f32_m(pg_all, acc5, vin, wv50);\n acc6 = svmla_n_f32_m(pg_all, acc6, vin, wv60);\n acc7 = svmla_n_f32_m(pg_all, acc7, vin, wv70);\n } else {\n svbool_t pg_k0 = svnot_b_z(pg_all, svwhilelt_b32(0, 1));\n svfloat32_t vin = svld1_f32(pg_k0, in_c - 1);\n acc0 = svmla_n_f32_m(pg_k0, acc0, vin, wv00);\n acc1 = svmla_n_f32_m(pg_k0, acc1, vin, wv10);\n acc2 = svmla_n_f32_m(pg_k0, acc2, vin, wv20);\n acc3 = svmla_n_f32_m(pg_k0, acc3, vin, wv30);\n acc4 = svmla_n_f32_m(pg_k0, acc4, vin, wv40);\n acc5 = svmla_n_f32_m(pg_k0, acc5, vin, wv50);\n acc6 = svmla_n_f32_m(pg_k0, acc6, vin, wv60);\n acc7 = svmla_n_f32_m(pg_k0, acc7, vin, wv70);\n }\n \n // kw=1: iw = ow + lane, always valid\n {\n svfloat32_t vin = svld1_f32(pg_all, in_c + ow);\n acc0 = svmla_n_f32_m(pg_all, acc0, vin, wv01);\n acc1 = svmla_n_f32_m(pg_all, acc1, vin, wv11);\n acc2 = svmla_n_f32_m(pg_all, acc2, vin, wv21);\n acc3 = svmla_n_f32_m(pg_all, acc3, vin, wv31);\n acc4 = svmla_n_f32_m(pg_all, acc4, vin, wv41);\n acc5 = svmla_n_f32_m(pg_all, acc5, vin, wv51);\n acc6 = svmla_n_f32_m(pg_all, acc6, vin, wv61);\n acc7 = svmla_n_f32_m(pg_all, acc7, vin, wv71);\n }\n \n // kw=2: iw = ow + 1 + lane\n if (!right_boundary) {\n svfloat32_t vin = svld1_f32(pg_all, in_c + ow + 1);\n acc0 = svmla_n_f32_m(pg_all, acc0, vin, wv02);\n acc1 = svmla_n_f32_m(pg_all, acc1, vin, wv12);\n acc2 = svmla_n_f32_m(pg_all, acc2, vin, wv22);\n acc3 = svmla_n_f32_m(pg_all, acc3, vin, wv32);\n acc4 = svmla_n_f32_m(pg_all, acc4, vin, wv42);\n acc5 = svmla_n_f32_m(pg_all, acc5, vin, wv52);\n acc6 = svmla_n_f32_m(pg_all, acc6, vin, wv62);\n acc7 = svmla_n_f32_m(pg_all, acc7, vin, wv72);\n } else {\n svbool_t pg_k2 = svwhilelt_b32(0, vl - 1);\n svfloat32_t vin = svld1_f32(pg_k2, in_c + ow + 1);\n acc0 = svmla_n_f32_m(pg_k2, acc0, vin, wv02);\n acc1 = svmla_n_f32_m(pg_k2, acc1, vin, wv12);\n acc2 = svmla_n_f32_m(pg_k2, acc2, vin, wv22);\n acc3 = svmla_n_f32_m(pg_k2, acc3, vin, wv32);\n acc4 = svmla_n_f32_m(pg_k2, acc4, vin, wv42);\n acc5 = svmla_n_f32_m(pg_k2, acc5, vin, wv52);\n acc6 = svmla_n_f32_m(pg_k2, acc6, vin, wv62);\n acc7 = svmla_n_f32_m(pg_k2, acc7, vin, wv72);\n }\n }\n \n svst1_f32(pg_all, out0 + ow, acc0);\n svst1_f32(pg_all, out1 + ow, acc1);\n svst1_f32(pg_all, out2 + ow, acc2);\n svst1_f32(pg_all, out3 + ow, acc3);\n svst1_f32(pg_all, out4 + ow, acc4);\n svst1_f32(pg_all, out5 + ow, acc5);\n svst1_f32(pg_all, out6 + ow, acc6);\n svst1_f32(pg_all, out7 + ow, acc7);\n }\n \n // Handle remaining output positions (scalar)\n for (; ow < W_out; ++ow) {\n float sum0 = b0, sum1 = b1, sum2 = b2, sum3 = b3;\n float sum4 = b4, sum5 = b5, sum6 = b6, sum7 = b7;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_c = input + (long)ic * W;\n int woff = ic * Kw;\n for (int kw = 0; kw < Kw; ++kw) {\n int iw = ow - pad + kw;\n if (iw >= 0 && iw < W) {\n float inv = in_c[iw];\n sum0 += inv * w0[woff + kw];\n sum1 += inv * w1[woff + kw];\n sum2 += inv * w2[woff + kw];\n sum3 += inv * w3[woff + kw];\n sum4 += inv * w4[woff + kw];\n sum5 += inv * w5[woff + kw];\n sum6 += inv * w6[woff + kw];\n sum7 += inv * w7[woff + kw];\n }\n }\n }\n out0[ow] = sum0; out1[ow] = sum1; out2[ow] = sum2; out3[ow] = sum3;\n out4[ow] = sum4; out5[ow] = sum5; out6[ow] = sum6; out7[ow] = sum7;\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json b/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json deleted file mode 100644 index e1d224414b7fcc4aef8d0e101a6e73adfd987040..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "definition": "conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py — do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 1;\nconstexpr int Kw = 1;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 0;\nconstexpr int pad_left = 0;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized conv2d kernel for Kh=1, Kw=1, Sh=1, Sw=1, Dh=1, Dw=1, Cout=256\n// This is a GEMM: output[n, oc, hw] = sum_ic input[n, ic, hw] * weight[oc, ic]\n// Key insight: The bottleneck is memory bandwidth for large HW (224x224).\n// Strategy: Reorder loops to (ic, oc_tile, hw) so input is read once per ic,\n// and use large OC tiles (16) with multiple HW vectors to maximize FMA throughput.\n// The key problem with v2 is that for large HW, we're reading/writing output \n// C_in times each - this is very cache-unfriendly.\n// Better: tile over HW so output fits in L1/L2 cache.\n\n#include \"conv2d.h\"\n#include \n#include \n\nusing namespace conv2d_def;\n\n// HW tile size: process this many spatial elements at once\n// For 256-bit SVE, vl=8 floats. Use 4 vectors = 32 elements per OC.\n// With 16 OC and 4 HW vectors: 16*4 = 64 accumulators (too many registers)\n// Use 8 OC and 4 HW vectors: 32 accumulators - fits in 32 SVE registers\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const int HW = H_out * W_out;\n const int vl = (int)svcntw(); // 8 for 256-bit SVE\n \n // HW tile: process HW_TILE spatial positions at once\n // This keeps output tiles in registers while iterating over IC\n const int HW_TILE = 4 * vl; // 4 SVE vectors = 32 floats\n \n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * HW;\n float* out_n = output + (long)n * Cout * HW;\n \n // Tile over HW dimension\n for (int hw_start = 0; hw_start < HW; hw_start += HW_TILE) {\n int hw_end = hw_start + HW_TILE;\n if (hw_end > HW) hw_end = HW;\n int hw_len = hw_end - hw_start;\n \n // Process 8 output channels at a time\n for (int oc = 0; oc < Cout; oc += 8) {\n // Accumulator registers: 8 OC x 4 HW vectors = 32 registers\n svfloat32_t acc00, acc01, acc02, acc03;\n svfloat32_t acc10, acc11, acc12, acc13;\n svfloat32_t acc20, acc21, acc22, acc23;\n svfloat32_t acc30, acc31, acc32, acc33;\n svfloat32_t acc40, acc41, acc42, acc43;\n svfloat32_t acc50, acc51, acc52, acc53;\n svfloat32_t acc60, acc61, acc62, acc63;\n svfloat32_t acc70, acc71, acc72, acc73;\n \n svbool_t pg = svptrue_b32();\n svfloat32_t zero = svdup_f32(0.0f);\n \n // Determine predicates for each of the 4 HW vectors\n int hw0 = hw_start;\n int hw1 = hw_start + vl;\n int hw2 = hw_start + 2*vl;\n int hw3 = hw_start + 3*vl;\n \n svbool_t pg0 = svwhilelt_b32(hw0, HW);\n svbool_t pg1 = svwhilelt_b32(hw1, HW);\n svbool_t pg2 = svwhilelt_b32(hw2, HW);\n svbool_t pg3 = svwhilelt_b32(hw3, HW);\n \n // Initialize accumulators to zero\n acc00 = acc01 = acc02 = acc03 = zero;\n acc10 = acc11 = acc12 = acc13 = zero;\n acc20 = acc21 = acc22 = acc23 = zero;\n acc30 = acc31 = acc32 = acc33 = zero;\n acc40 = acc41 = acc42 = acc43 = zero;\n acc50 = acc51 = acc52 = acc53 = zero;\n acc60 = acc61 = acc62 = acc63 = zero;\n acc70 = acc71 = acc72 = acc73 = zero;\n \n // Accumulate over input channels\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_ic = in_n + (long)ic * HW + hw_start;\n \n // Load 4 HW vectors of input\n svfloat32_t vin0 = svld1_f32(pg0, in_ic + 0);\n svfloat32_t vin1 = svld1_f32(pg1, in_ic + vl);\n svfloat32_t vin2 = svld1_f32(pg2, in_ic + 2*vl);\n svfloat32_t vin3 = svld1_f32(pg3, in_ic + 3*vl);\n \n // Load 8 weight values\n const float* wbase = weight + (long)oc * C_in + ic;\n float w0 = wbase[0 * C_in];\n float w1 = wbase[1 * C_in];\n float w2 = wbase[2 * C_in];\n float w3 = wbase[3 * C_in];\n float w4 = wbase[4 * C_in];\n float w5 = wbase[5 * C_in];\n float w6 = wbase[6 * C_in];\n float w7 = wbase[7 * C_in];\n \n // FMA: acc[oc_i][hw_j] += vin[hw_j] * w[oc_i]\n acc00 = svmla_n_f32_x(pg, acc00, vin0, w0);\n acc01 = svmla_n_f32_x(pg, acc01, vin1, w0);\n acc02 = svmla_n_f32_x(pg, acc02, vin2, w0);\n acc03 = svmla_n_f32_x(pg, acc03, vin3, w0);\n \n acc10 = svmla_n_f32_x(pg, acc10, vin0, w1);\n acc11 = svmla_n_f32_x(pg, acc11, vin1, w1);\n acc12 = svmla_n_f32_x(pg, acc12, vin2, w1);\n acc13 = svmla_n_f32_x(pg, acc13, vin3, w1);\n \n acc20 = svmla_n_f32_x(pg, acc20, vin0, w2);\n acc21 = svmla_n_f32_x(pg, acc21, vin1, w2);\n acc22 = svmla_n_f32_x(pg, acc22, vin2, w2);\n acc23 = svmla_n_f32_x(pg, acc23, vin3, w2);\n \n acc30 = svmla_n_f32_x(pg, acc30, vin0, w3);\n acc31 = svmla_n_f32_x(pg, acc31, vin1, w3);\n acc32 = svmla_n_f32_x(pg, acc32, vin2, w3);\n acc33 = svmla_n_f32_x(pg, acc33, vin3, w3);\n \n acc40 = svmla_n_f32_x(pg, acc40, vin0, w4);\n acc41 = svmla_n_f32_x(pg, acc41, vin1, w4);\n acc42 = svmla_n_f32_x(pg, acc42, vin2, w4);\n acc43 = svmla_n_f32_x(pg, acc43, vin3, w4);\n \n acc50 = svmla_n_f32_x(pg, acc50, vin0, w5);\n acc51 = svmla_n_f32_x(pg, acc51, vin1, w5);\n acc52 = svmla_n_f32_x(pg, acc52, vin2, w5);\n acc53 = svmla_n_f32_x(pg, acc53, vin3, w5);\n \n acc60 = svmla_n_f32_x(pg, acc60, vin0, w6);\n acc61 = svmla_n_f32_x(pg, acc61, vin1, w6);\n acc62 = svmla_n_f32_x(pg, acc62, vin2, w6);\n acc63 = svmla_n_f32_x(pg, acc63, vin3, w6);\n \n acc70 = svmla_n_f32_x(pg, acc70, vin0, w7);\n acc71 = svmla_n_f32_x(pg, acc71, vin1, w7);\n acc72 = svmla_n_f32_x(pg, acc72, vin2, w7);\n acc73 = svmla_n_f32_x(pg, acc73, vin3, w7);\n }\n \n // Store results\n float* out0 = out_n + (long)(oc + 0) * HW + hw_start;\n float* out1 = out_n + (long)(oc + 1) * HW + hw_start;\n float* out2 = out_n + (long)(oc + 2) * HW + hw_start;\n float* out3 = out_n + (long)(oc + 3) * HW + hw_start;\n float* out4 = out_n + (long)(oc + 4) * HW + hw_start;\n float* out5 = out_n + (long)(oc + 5) * HW + hw_start;\n float* out6 = out_n + (long)(oc + 6) * HW + hw_start;\n float* out7 = out_n + (long)(oc + 7) * HW + hw_start;\n \n svst1_f32(pg0, out0 + 0, acc00);\n svst1_f32(pg1, out0 + vl, acc01);\n svst1_f32(pg2, out0 + 2*vl, acc02);\n svst1_f32(pg3, out0 + 3*vl, acc03);\n \n svst1_f32(pg0, out1 + 0, acc10);\n svst1_f32(pg1, out1 + vl, acc11);\n svst1_f32(pg2, out1 + 2*vl, acc12);\n svst1_f32(pg3, out1 + 3*vl, acc13);\n \n svst1_f32(pg0, out2 + 0, acc20);\n svst1_f32(pg1, out2 + vl, acc21);\n svst1_f32(pg2, out2 + 2*vl, acc22);\n svst1_f32(pg3, out2 + 3*vl, acc23);\n \n svst1_f32(pg0, out3 + 0, acc30);\n svst1_f32(pg1, out3 + vl, acc31);\n svst1_f32(pg2, out3 + 2*vl, acc32);\n svst1_f32(pg3, out3 + 3*vl, acc33);\n \n svst1_f32(pg0, out4 + 0, acc40);\n svst1_f32(pg1, out4 + vl, acc41);\n svst1_f32(pg2, out4 + 2*vl, acc42);\n svst1_f32(pg3, out4 + 3*vl, acc43);\n \n svst1_f32(pg0, out5 + 0, acc50);\n svst1_f32(pg1, out5 + vl, acc51);\n svst1_f32(pg2, out5 + 2*vl, acc52);\n svst1_f32(pg3, out5 + 3*vl, acc53);\n \n svst1_f32(pg0, out6 + 0, acc60);\n svst1_f32(pg1, out6 + vl, acc61);\n svst1_f32(pg2, out6 + 2*vl, acc62);\n svst1_f32(pg3, out6 + 3*vl, acc63);\n \n svst1_f32(pg0, out7 + 0, acc70);\n svst1_f32(pg1, out7 + vl, acc71);\n svst1_f32(pg2, out7 + 2*vl, acc72);\n svst1_f32(pg3, out7 + 3*vl, acc73);\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json b/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json deleted file mode 100644 index cb895478928146cfce2ecb3ace17a02a2968bac7..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "definition": "conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py — do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized conv2d kernel for Graviton3 (SVE, 256-bit = 8 floats per vector)\n// Strategy: im2col-free direct convolution with:\n// - Outer loop over output channels (oc) in blocks of 8 (register tiling)\n// - Inner loop vectorized over output width (ow) using SVE\n// - Multiple SVE accumulators per oc to hide FMA latency (4 cycles)\n// - Weight broadcast, input loaded contiguously\n// - Accumulate over (ic, kh, kw) with pre-computed valid ranges\n// - Tiling over oh to improve cache reuse\n\n#include \"conv2d.h\"\n#include \n#include \n\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* __restrict__ input,\n float* __restrict__ output,\n const float* __restrict__ weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n // Weight shape: [Cout=128, C_in, Kh=3, Kw=3]\n // Input shape: [N, C_in, H, W]\n // Output shape: [N, Cout=128, H_out, W_out]\n\n const int KhKw = Kh * Kw;\n const long HW = (long)H * W;\n const long H_out_W_out = (long)H_out * W_out;\n const int vl = svcntw(); // SVE vector length in floats (8 for 256-bit)\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n\n // Initialize output to zero\n memset(out_n, 0, sizeof(float) * Cout * H_out * W_out);\n\n // Process output channels in blocks of 8\n const int OC_BLOCK = 8;\n for (int oc_base = 0; oc_base < Cout; oc_base += OC_BLOCK) {\n int oc_end = oc_base + OC_BLOCK;\n if (oc_end > Cout) oc_end = Cout;\n int oc_count = oc_end - oc_base;\n\n // Pointers to output for each oc in block\n float* out_oc[OC_BLOCK];\n for (int i = 0; i < oc_count; i++) {\n out_oc[i] = out_n + (long)(oc_base + i) * H_out_W_out;\n }\n\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_ic = in_n + (long)ic * HW;\n\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n // Load weights for all oc in block\n float wvals[OC_BLOCK];\n for (int i = 0; i < oc_count; i++) {\n int widx = ((oc_base + i) * C_in + ic) * KhKw + kh * Kw + kw;\n wvals[i] = weight[widx];\n }\n\n // Compute valid output row range\n int ow_start = pad_left - kw;\n if (ow_start < 0) ow_start = 0;\n int ow_end = W - kw + pad_left;\n if (ow_end > W_out) ow_end = W_out;\n\n if (ow_start >= ow_end) continue;\n\n for (int oh = 0; oh < H_out; ++oh) {\n int ih = oh - pad_top + kh;\n if (ih < 0 || ih >= H) continue;\n\n const float* in_row = in_ic + ih * W + (kw - pad_left);\n\n // Process each oc in block with SVE\n // Use 2 accumulators per oc to hide FMA latency\n if (oc_count == OC_BLOCK) {\n svfloat32_t vw0 = svdup_f32(wvals[0]);\n svfloat32_t vw1 = svdup_f32(wvals[1]);\n svfloat32_t vw2 = svdup_f32(wvals[2]);\n svfloat32_t vw3 = svdup_f32(wvals[3]);\n svfloat32_t vw4 = svdup_f32(wvals[4]);\n svfloat32_t vw5 = svdup_f32(wvals[5]);\n svfloat32_t vw6 = svdup_f32(wvals[6]);\n svfloat32_t vw7 = svdup_f32(wvals[7]);\n\n float* out_row0 = out_oc[0] + oh * W_out;\n float* out_row1 = out_oc[1] + oh * W_out;\n float* out_row2 = out_oc[2] + oh * W_out;\n float* out_row3 = out_oc[3] + oh * W_out;\n float* out_row4 = out_oc[4] + oh * W_out;\n float* out_row5 = out_oc[5] + oh * W_out;\n float* out_row6 = out_oc[6] + oh * W_out;\n float* out_row7 = out_oc[7] + oh * W_out;\n\n int ow = ow_start;\n while (ow < ow_end) {\n svbool_t pg = svwhilelt_b32(ow, ow_end);\n svfloat32_t vin = svld1_f32(pg, in_row + ow);\n\n svfloat32_t vout0 = svld1_f32(pg, out_row0 + ow);\n svfloat32_t vout1 = svld1_f32(pg, out_row1 + ow);\n svfloat32_t vout2 = svld1_f32(pg, out_row2 + ow);\n svfloat32_t vout3 = svld1_f32(pg, out_row3 + ow);\n svfloat32_t vout4 = svld1_f32(pg, out_row4 + ow);\n svfloat32_t vout5 = svld1_f32(pg, out_row5 + ow);\n svfloat32_t vout6 = svld1_f32(pg, out_row6 + ow);\n svfloat32_t vout7 = svld1_f32(pg, out_row7 + ow);\n\n vout0 = svmla_f32_m(pg, vout0, vin, vw0);\n vout1 = svmla_f32_m(pg, vout1, vin, vw1);\n vout2 = svmla_f32_m(pg, vout2, vin, vw2);\n vout3 = svmla_f32_m(pg, vout3, vin, vw3);\n vout4 = svmla_f32_m(pg, vout4, vin, vw4);\n vout5 = svmla_f32_m(pg, vout5, vin, vw5);\n vout6 = svmla_f32_m(pg, vout6, vin, vw6);\n vout7 = svmla_f32_m(pg, vout7, vin, vw7);\n\n svst1_f32(pg, out_row0 + ow, vout0);\n svst1_f32(pg, out_row1 + ow, vout1);\n svst1_f32(pg, out_row2 + ow, vout2);\n svst1_f32(pg, out_row3 + ow, vout3);\n svst1_f32(pg, out_row4 + ow, vout4);\n svst1_f32(pg, out_row5 + ow, vout5);\n svst1_f32(pg, out_row6 + ow, vout6);\n svst1_f32(pg, out_row7 + ow, vout7);\n\n ow += vl;\n }\n } else {\n for (int i = 0; i < oc_count; i++) {\n svfloat32_t vw = svdup_f32(wvals[i]);\n float* out_row = out_oc[i] + oh * W_out;\n int ow = ow_start;\n while (ow < ow_end) {\n svbool_t pg = svwhilelt_b32(ow, ow_end);\n svfloat32_t vin = svld1_f32(pg, in_row + ow);\n svfloat32_t vout = svld1_f32(pg, out_row + ow);\n vout = svmla_f32_m(pg, vout, vin, vw);\n svst1_f32(pg, out_row + ow, vout);\n ow += vl;\n }\n }\n }\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json b/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json deleted file mode 100644 index 0e947f3e1c0c76c17f70542d3231a5d58fca96a2..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "definition": "conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py — do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 2;\nconstexpr int Dw = 2;\nconstexpr int pad_top = 2;\nconstexpr int pad_left = 2;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d.h\"\n#include \n#include \n#include \n\nusing namespace conv2d_def;\n\n// Optimized conv2d for:\n// Kh=3, Kw=3, Sh=1, Sw=1, Dh=2, Dw=2\n// pad_top=2, pad_left=2\n// Cout=256\n//\n// Key insight: The reference scalar is fast because it uses NEON auto-vectorization.\n// Our v2 was slower because it vectorizes over ow (W_out), but W_out can be small.\n//\n// Better strategy: im2col + GEMM approach\n// - Precompute im2col buffer: shape [C_in*Kh*Kw, H_out*W_out]\n// - Then do GEMM: weight[Cout, C_in*Kh*Kw] x im2col[C_in*Kh*Kw, H_out*W_out]\n// - Vectorize over Cout (output channels) using SVE\n//\n// Weight layout: [Cout, C_in, Kh, Kw] = [Cout, C_in*Kh*Kw]\n// im2col layout: [C_in*Kh*Kw, H_out*W_out]\n// Output layout: [Cout, H_out*W_out]\n//\n// GEMM: for each oc, dot product of weight row with each im2col column\n// Vectorize over oc: load 8 weight values (one per oc), broadcast im2col value, FMA\n// Actually better: vectorize over H_out*W_out (output pixels)\n//\n// For each (oc, k) where k = ic*Kh*Kw + kh*Kw + kw:\n// output[oc, :] += weight[oc, k] * im2col[k, :]\n// Vectorize over output pixels (H_out*W_out)\n//\n// This is the same as v2 but with im2col precomputed to avoid boundary checks in inner loop.\n\n// im2col buffer size: C_in * Kh * Kw * H_out * W_out\n// For C_in=256, Kh=3, Kw=3, H_out=14, W_out=14: 256*9*196 = 451584 floats = 1.8MB\n// For C_in=64, H_out=56, W_out=56: 64*9*3136 = 1806336 floats = 7.2MB - too large for L2\n// So im2col may not be cache-friendly for large inputs.\n//\n// Alternative: tile over output pixels to keep im2col in cache.\n// Process output pixels in tiles of T, so im2col tile = C_in*Kh*Kw*T floats\n// T=64: 64*9*64 = 36864 floats = 144KB - fits in L2\n//\n// Actually, let's try a different approach:\n// Loop order: oc_block (8), oh_tile, ow_tile, ic, kh, kw\n// For each oc_block of 8 output channels:\n// For each output tile (oh_tile, ow_tile):\n// Accumulate over ic, kh, kw\n// Weight: weight[oc_block:oc_block+8, ic, kh, kw] - need to load 8 values with stride C_in*Kh*Kw\n// Input: input[ic, ih, iw] - scalar broadcast\n// Output: output[oc_block:oc_block+8, oh, ow] - strided store\n//\n// This still has gather/scatter issues.\n//\n// Let's try the most cache-friendly approach:\n// Repack weights to [C_in*Kh*Kw, Cout] layout (transposed)\n// Then for each output pixel (oh, ow):\n// Accumulate over k = ic*Kh*Kw + kh*Kw + kw:\n// output[0:Cout] += weight_T[k, 0:Cout] * im2col[k, oh*W_out+ow]\n// This is a GEMV: output_vec += weight_T_row * scalar\n// Vectorize over Cout (contiguous in weight_T)\n//\n// Weight repacking: [Cout, C_in*Kh*Kw] -> [C_in*Kh*Kw, Cout]\n// This is a transpose. We do it once per call.\n// Then inner loop: for each output pixel, for each k, FMA into output[0:Cout]\n// This is very cache-friendly: weight_T rows are contiguous, output is contiguous.\n\n// Stack-allocate weight transpose buffer (max size: 256 * 256 * 9 = 589824 floats = 2.3MB)\n// Too large for stack. Use static or heap.\n\n// Actually, let's think about the sizes:\n// Cout=256, C_in*Kh*Kw = C_in*9\n// For C_in=256: 256*9*256 = 589824 floats = 2.3MB\n// For C_in=128: 128*9*256 = 294912 floats = 1.2MB\n// For C_in=64: 64*9*256 = 147456 floats = 576KB\n// For C_in=11: 11*9*256 = 25344 floats = 99KB\n//\n// The weight_T buffer fits in L3 but not L2 for large C_in.\n// However, we only need to load each weight once per output pixel.\n// The output buffer (256 * H_out * W_out) is also large.\n//\n// Let's try a blocked approach:\n// - Process output pixels in blocks of OW_TILE\n// - For each block, accumulate over all k\n// - This keeps the output block in registers/L1\n\n// Approach: tile over output pixels (ow_tile), vectorize over Cout\n// For each ow_tile of size T:\n// Initialize output[0:Cout, ow_tile] = 0\n// For each k (ic, kh, kw):\n// For each ow in ow_tile:\n// output[0:Cout, ow] += weight[0:Cout, k] * input[ic, ih, iw+ow]\n// Store output[0:Cout, ow_tile]\n//\n// This requires weight[0:Cout, k] to be contiguous - but weight is [Cout, C_in, Kh, Kw]\n// so weight[oc, k] has stride C_in*Kh*Kw between oc values.\n// We need to transpose weight first.\n\n// Let's just try the simplest approach that should work well:\n// Reorder loops to maximize cache reuse:\n// N, oh, ow_block (tile), oc_block (tile), ic, kh, kw\n// With oc vectorized using SVE\n\n// Actually, let me try a completely different approach:\n// Use the im2col + GEMM pattern but with the GEMM vectorized over Cout.\n// The key is to precompute im2col once, then do the GEMM.\n// For the GEMM, we vectorize over Cout (the M dimension).\n\n// im2col: [K, P] where K = C_in*Kh*Kw, P = H_out*W_out\n// weight: [Cout, K] (M x K)\n// output: [Cout, P] (M x P)\n// GEMM: output = weight * im2col\n\n// For the GEMM, we can use a standard blocked GEMM:\n// - Block over P (output pixels): p_tile\n// - Block over K: k_tile \n// - Vectorize over M (Cout): use SVE to process 8 output channels at once\n\n// Let's implement this with a simple but effective approach:\n// For each output pixel p:\n// For each k:\n// output[0:Cout, p] += weight[0:Cout, k] * im2col[k, p]\n// Vectorize over Cout.\n// This requires weight to be in [K, Cout] layout (transposed).\n\n// We'll precompute the transposed weight once.\n\nstatic float weight_T_buf[256 * 256 * 9]; // [K, Cout] = [C_in*Kh*Kw, Cout]\n\nextern \"C\" void inner_conv2d(\n const float* __restrict__ input, float* __restrict__ output, const float* __restrict__ weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const int vl = svcntw(); // 8 for 256-bit SVE\n const int K = C_in * Kh * Kw; // number of weight elements per output channel\n const int P = H_out * W_out; // number of output pixels per channel\n\n // Transpose weight: [Cout, K] -> [K, Cout]\n // weight_T[k, oc] = weight[oc, k]\n float* weight_T = weight_T_buf;\n for (int oc = 0; oc < Cout; ++oc) {\n const float* w_oc = weight + (long)oc * K;\n for (int k = 0; k < K; ++k) {\n weight_T[k * Cout + oc] = w_oc[k];\n }\n }\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n\n // Initialize output to zero\n long out_size = (long)Cout * H_out * W_out;\n memset(out_n, 0, out_size * sizeof(float));\n\n // For each output pixel (oh, ow), accumulate over k = (ic, kh, kw)\n // output[oc, oh*W_out+ow] += weight_T[k, oc] * im2col[k, oh*W_out+ow]\n //\n // Loop order: k (outer), p (inner), vectorize over Cout\n // For each k:\n // For each p = (oh, ow):\n // val = im2col[k, p] = input[ic, ih, iw]\n // output[0:Cout, p] += weight_T[k, 0:Cout] * val\n //\n // This is: for each k, do a rank-1 update of output matrix\n // weight_T[k, 0:Cout] is contiguous (Cout=256 floats = 1KB)\n // output[0:Cout, p] is strided (stride = P)\n //\n // Better: swap loops: for each p, for each k\n // output[0:Cout, p] += weight_T[k, 0:Cout] * val(k, p)\n // This is a GEMV for each p: output_col = weight_T * im2col_col\n // weight_T is [K, Cout], im2col_col is [K], output_col is [Cout]\n // But output is [Cout, P] so output_col[oc] = output[oc*P + p] - strided!\n //\n // To avoid strided access, we need output in [P, Cout] layout.\n // Let's use a temporary output buffer in [P, Cout] layout, then transpose.\n\n // Actually, let's think differently.\n // The most cache-friendly GEMM for [Cout, K] x [K, P] = [Cout, P]:\n // - Vectorize over Cout (M dimension)\n // - For each p (output pixel), for each k:\n // output[0:Cout, p] += weight[0:Cout, k] * im2col[k, p]\n // But output[0:Cout, p] is strided (stride P).\n //\n // Alternative: use output in [P, Cout] layout temporarily\n // Then for each p, for each k:\n // out_tmp[p, 0:Cout] += weight_T[k, 0:Cout] * im2col[k, p]\n // This is contiguous in Cout for both out_tmp and weight_T!\n // Then at the end, transpose out_tmp back to [Cout, P].\n\n // out_tmp size: P * Cout = H_out * W_out * 256 floats\n // For H_out=W_out=56: 56*56*256 = 802816 floats = 3.2MB - too large for stack\n // For H_out=W_out=28: 28*28*256 = 200704 floats = 784KB\n // For H_out=W_out=14: 14*14*256 = 50176 floats = 196KB\n //\n // We need to tile over P to keep things in cache.\n // Let's use a tile of P_TILE output pixels.\n // P_TILE * Cout = P_TILE * 256 floats\n // For P_TILE=64: 64*256 = 16384 floats = 64KB (fits in L1/L2)\n // For P_TILE=256: 256*256 = 65536 floats = 256KB (fits in L2)\n\n // Use a stack buffer for the output tile\n // P_TILE=64: 64*256*4 = 65536 bytes = 64KB - too large for stack\n // Use static buffer\n // Actually let's use P_TILE=32: 32*256*4 = 32768 bytes = 32KB\n\n // For now, let's try the direct approach without im2col:\n // Loop: k (ic, kh, kw), oh, ow, vectorize over Cout\n // For each (ic, kh, kw, oh, ow):\n // val = input[ic, ih, iw] (scalar)\n // w_row = weight_T[k, 0:Cout] (contiguous)\n // out_col = output[0:Cout, oh*W_out+ow] (strided by P)\n // out_col += w_row * val\n //\n // The strided output access is the problem.\n // But if we process multiple ow at once (ow_tile), we can keep\n // multiple output columns in registers.\n\n // Let's try: for each (ic, kh, kw, oh), process ow in tiles of OW_TILE\n // For each ow in tile:\n // val[ow] = input[ic, ih, iw+ow]\n // output[0:Cout, oh*W_out+ow] += weight_T[k, 0:Cout] * val[ow]\n // This still has strided output.\n\n // The fundamental issue: output is [Cout, H_out, W_out] and we want to\n // vectorize over Cout, but output pixels are not contiguous in Cout.\n\n // Best approach for this layout: vectorize over output pixels (ow),\n // which is what v2 does. The issue is that W_out can be small (14).\n // For W_out=14, we only get 1-2 SVE vectors per row.\n\n // Let's try a different tiling: process multiple oh rows simultaneously.\n // For each (ic, kh, kw, oc), process multiple (oh, ow) at once.\n // This is the approach of v2 but with oc as outer loop.\n\n // Actually, let me try the approach of tiling over oc AND ow:\n // Process OC_TILE output channels and OW_TILE output pixels simultaneously.\n // This requires OC_TILE * OW_TILE accumulators.\n // With SVE (8 floats), OC_TILE=8, OW_TILE=4: 32 accumulators (z0-z31)\n\n // For each (oc_block, oh, ow_block):\n // acc[0:OC_TILE, 0:OW_TILE] = 0\n // For each (ic, kh, kw):\n // For each ow in ow_block:\n // val = input[ic, ih, iw+ow]\n // w_vec = weight[oc_block:oc_block+OC_TILE, ic, kh, kw] (gather, stride K)\n // acc[:, ow] += w_vec * val\n // Store acc[0:OC_TILE, 0:OW_TILE] to output (strided)\n\n // The weight gather is expensive. Let's use weight_T instead:\n // w_vec = weight_T[k, oc_block:oc_block+OC_TILE] (contiguous!)\n // This is the key insight: with transposed weights, we get contiguous access.\n\n // Let's implement this:\n // OC_TILE = vl (8 for 256-bit SVE)\n // OW_TILE = 4 (process 4 output pixels simultaneously)\n // For each (oc_block, oh, ow_block):\n // acc[0:4] = {z0, z1, z2, z3} (each is a vector of OC_TILE floats)\n // For each k = (ic, kh, kw):\n // w_vec = weight_T[k, oc_block:oc_block+OC_TILE] (8 floats, contiguous)\n // For each ow in [0, OW_TILE):\n // val = input[ic, ih, iw+ow] (scalar)\n // acc[ow] += w_vec * val\n // Store acc[0:4] to output[oc_block:oc_block+OC_TILE, oh, ow_block:ow_block+OW_TILE]\n // (strided store: stride = H_out*W_out)\n\n // This approach:\n // - Weight access: contiguous (weight_T[k, oc_block:oc_block+OC_TILE])\n // - Input access: scalar (one value per k per ow)\n // - Output access: strided store (stride = P = H_out*W_out)\n // - Arithmetic intensity: OC_TILE * OW_TILE FMAs per weight load + OW_TILE input loads\n // - For OC_TILE=8, OW_TILE=4: 32 FMAs per 8 weight floats = 4 FMAs/float\n\n // The strided output store is still a concern, but it's only done once per (oc_block, oh, ow_block).\n // The inner loop (over k) has no strided access.\n\n // Let's implement this approach.\n // We'll use OW_TILE=4 accumulators per oc_block.\n\n const int OW_TILE = 4;\n\n for (int oc_base = 0; oc_base < Cout; oc_base += vl) {\n svbool_t pg_oc = svwhilelt_b32(oc_base, Cout);\n const float* wT_oc = weight_T + oc_base; // weight_T[0, oc_base:oc_base+vl]\n\n for (int oh = 0; oh < H_out; ++oh) {\n // Output pointers for this (oc_base, oh)\n // output[oc, oh, ow] = out_n[oc * P + oh * W_out + ow]\n // For oc in [oc_base, oc_base+vl), stride between oc = P\n\n int ow = 0;\n for (; ow + OW_TILE <= W_out; ow += OW_TILE) {\n // 4 accumulators, each holding OC_TILE values\n svfloat32_t acc0 = svdup_f32(0.0f);\n svfloat32_t acc1 = svdup_f32(0.0f);\n svfloat32_t acc2 = svdup_f32(0.0f);\n svfloat32_t acc3 = svdup_f32(0.0f);\n\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_ic = in_n + (long)ic * H * W;\n const float* wT_ic = wT_oc + (long)ic * Kh * Kw * Cout;\n\n for (int kh = 0; kh < Kh; ++kh) {\n int ih = oh * Sh - pad_top + kh * Dh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = in_ic + ih * W;\n\n for (int kw = 0; kw < Kw; ++kw) {\n int iw_base = ow * Sw - pad_left + kw * Dw;\n // Load weight vector for this k\n const float* wT_k = wT_ic + (kh * Kw + kw) * Cout;\n svfloat32_t vw = svld1_f32(pg_oc, wT_k);\n\n // Process 4 output pixels\n auto fma_if_valid = [&](svfloat32_t& acc, int iw) {\n if (iw >= 0 && iw < W) {\n svfloat32_t vpx = svdup_f32(in_row[iw]);\n acc = svmla_f32_m(pg_oc, acc, vw, vpx);\n }\n };\n fma_if_valid(acc0, iw_base);\n fma_if_valid(acc1, iw_base + Sw);\n fma_if_valid(acc2, iw_base + 2*Sw);\n fma_if_valid(acc3, iw_base + 3*Sw);\n }\n }\n }\n\n // Store accumulators to output (strided by P)\n long p_base = (long)oh * W_out + ow;\n auto store_acc = [&](svfloat32_t acc, int ow_off) {\n long p = p_base + ow_off;\n // output[oc, p] for oc in [oc_base, oc_base+vl)\n // These are at out_n[oc*P + p] for oc in [oc_base, oc_base+vl)\n // Stride between consecutive oc = P\n // Use scatter store\n svuint64_t idx = svindex_u64(0, (uint64_t)P);\n // Actually, use scatter with 32-bit indices\n // idx[i] = i * P (in elements)\n // But P can be large (56*56=3136), so 32-bit index is fine\n svuint32_t idx32 = svindex_u32(0, (uint32_t)P);\n float* out_base = out_n + (long)oc_base * P + p;\n svst1_scatter_u32index_f32(pg_oc, out_base, idx32, acc);\n };\n store_acc(acc0, 0);\n store_acc(acc1, 1);\n store_acc(acc2, 2);\n store_acc(acc3, 3);\n }\n\n // Handle remaining ow\n for (; ow < W_out; ++ow) {\n svfloat32_t acc = svdup_f32(0.0f);\n\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_ic = in_n + (long)ic * H * W;\n const float* wT_ic = wT_oc + (long)ic * Kh * Kw * Cout;\n\n for (int kh = 0; kh < Kh; ++kh) {\n int ih = oh * Sh - pad_top + kh * Dh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = in_ic + ih * W;\n\n for (int kw = 0; kw < Kw; ++kw) {\n int iw = ow * Sw - pad_left + kw * Dw;\n if (iw < 0 || iw >= W) continue;\n\n const float* wT_k = wT_ic + (kh * Kw + kw) * Cout;\n svfloat32_t vw = svld1_f32(pg_oc, wT_k);\n svfloat32_t vpx = svdup_f32(in_row[iw]);\n acc = svmla_f32_m(pg_oc, acc, vw, vpx);\n }\n }\n }\n\n // Scatter store\n long p = (long)oh * W_out + ow;\n svuint32_t idx32 = svindex_u32(0, (uint32_t)P);\n float* out_base = out_n + (long)oc_base * P + p;\n svst1_scatter_u32index_f32(pg_oc, out_base, idx32, acc);\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json b/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json deleted file mode 100644 index 8cfba763a29876332b55180560e86288c4b9700f..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "definition": "conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py — do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized conv2d kernel for:\n// Cout=128, Kh=3, Kw=3, Sh=2, Sw=2, Dh=1, Dw=1, pad_top=1, pad_left=1\n//\n// Key strategy: \n// 1. Transpose weight to [ksize, Cout] layout for contiguous access over Cout\n// 2. For each output pixel, do a GEMV: acc[0..127] += px * weight_T[w_offset * 128 + 0..127]\n// 3. SVE vectorizes the inner loop over Cout (contiguous 128 floats)\n// 4. Process multiple output pixels (ow) simultaneously to amortize weight loads\n\n#include \"conv2d.h\"\n#include \n#include \n#include \n#include \n#include \n\nusing namespace conv2d_def;\n\nstatic float* g_weight_T = nullptr;\nstatic int g_weight_T_ksize = 0;\nstatic int g_weight_T_cin = 0;\n\n// Transpose weight from [Cout, C_in, Kh, Kw] to [C_in, Kh, Kw, Cout]\n// so that for a given (ic, kh, kw), all Cout weights are contiguous\nstatic void transpose_weight(const float* weight, float* weight_T, int C_in) {\n int ksize = C_in * Kh * Kw;\n // weight[oc * ksize + k] -> weight_T[k * Cout + oc]\n for (int oc = 0; oc < Cout; ++oc) {\n const float* w_oc = weight + (long)oc * ksize;\n for (int k = 0; k < ksize; ++k) {\n weight_T[(long)k * Cout + oc] = w_oc[k];\n }\n }\n}\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n int ksize = C_in * Kh * Kw;\n \n // Allocate and build transposed weight if needed\n // (In practice weight is constant across calls with same C_in)\n float* weight_T = (float*)aligned_alloc(64, (long)ksize * Cout * sizeof(float));\n if (!weight_T) return;\n \n transpose_weight(weight, weight_T, C_in);\n \n // Process multiple output pixels at once (tile over ow)\n // For each tile of OW_TILE output pixels, we accumulate into OW_TILE * 128 accumulators\n // This amortizes the weight_T load cost\n \n const int OW_TILE = 4; // process 4 output pixels at a time\n \n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n \n for (int oh = 0; oh < H_out; ++oh) {\n int ih_base = oh * Sh - pad_top;\n \n // Allocate tile accumulators on stack\n // OW_TILE * 128 floats = 4 * 128 * 4 = 2048 bytes\n float acc[OW_TILE][128] __attribute__((aligned(64)));\n \n int ow = 0;\n for (; ow + OW_TILE <= W_out; ow += OW_TILE) {\n // Zero accumulators\n memset(acc, 0, sizeof(float) * OW_TILE * 128);\n \n // Precompute iw_base for each pixel in tile\n int iw_bases[OW_TILE];\n for (int t = 0; t < OW_TILE; ++t) {\n iw_bases[t] = (ow + t) * Sw - pad_left;\n }\n \n // Accumulate over ic, kh, kw\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n int w_ic_base = ic * Kh * Kw;\n \n for (int kh = 0; kh < Kh; ++kh) {\n int ih = ih_base + kh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = inc + ih * W;\n \n for (int kw = 0; kw < Kw; ++kw) {\n int k = w_ic_base + kh * Kw + kw;\n const float* wT_row = weight_T + (long)k * Cout;\n \n // For each pixel in tile\n for (int t = 0; t < OW_TILE; ++t) {\n int iw = iw_bases[t] + kw;\n if (iw < 0 || iw >= W) continue;\n float px = in_row[iw];\n \n // SVE: acc[t][0..127] += px * wT_row[0..127]\n svfloat32_t vpx = svdup_f32(px);\n float* acc_t = acc[t];\n \n // 128 floats = 16 SVE vectors of 8 floats (256-bit)\n // Unroll 4x\n for (int oc = 0; oc < 128; oc += 32) {\n svbool_t pg = svptrue_b32();\n \n svfloat32_t va0 = svld1_f32(pg, acc_t + oc);\n svfloat32_t vw0 = svld1_f32(pg, wT_row + oc);\n va0 = svmla_f32_m(pg, va0, vpx, vw0);\n svst1_f32(pg, acc_t + oc, va0);\n \n svfloat32_t va1 = svld1_f32(pg, acc_t + oc + 8);\n svfloat32_t vw1 = svld1_f32(pg, wT_row + oc + 8);\n va1 = svmla_f32_m(pg, va1, vpx, vw1);\n svst1_f32(pg, acc_t + oc + 8, va1);\n \n svfloat32_t va2 = svld1_f32(pg, acc_t + oc + 16);\n svfloat32_t vw2 = svld1_f32(pg, wT_row + oc + 16);\n va2 = svmla_f32_m(pg, va2, vpx, vw2);\n svst1_f32(pg, acc_t + oc + 16, va2);\n \n svfloat32_t va3 = svld1_f32(pg, acc_t + oc + 24);\n svfloat32_t vw3 = svld1_f32(pg, wT_row + oc + 24);\n va3 = svmla_f32_m(pg, va3, vpx, vw3);\n svst1_f32(pg, acc_t + oc + 24, va3);\n }\n }\n }\n }\n }\n \n // Write tile results to output\n for (int t = 0; t < OW_TILE; ++t) {\n long out_pixel_offset = (long)oh * W_out + (ow + t);\n for (int oc = 0; oc < Cout; ++oc) {\n out_n[(long)oc * H_out * W_out + out_pixel_offset] = acc[t][oc];\n }\n }\n }\n \n // Handle remaining output pixels\n for (; ow < W_out; ++ow) {\n float acc1[128] __attribute__((aligned(64)));\n memset(acc1, 0, sizeof(float) * 128);\n int iw_base = ow * Sw - pad_left;\n \n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n int w_ic_base = ic * Kh * Kw;\n \n for (int kh = 0; kh < Kh; ++kh) {\n int ih = ih_base + kh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = inc + ih * W;\n \n for (int kw = 0; kw < Kw; ++kw) {\n int iw = iw_base + kw;\n if (iw < 0 || iw >= W) continue;\n float px = in_row[iw];\n int k = w_ic_base + kh * Kw + kw;\n const float* wT_row = weight_T + (long)k * Cout;\n \n svfloat32_t vpx = svdup_f32(px);\n for (int oc = 0; oc < 128; oc += 8) {\n svbool_t pg = svptrue_b32();\n svfloat32_t va = svld1_f32(pg, acc1 + oc);\n svfloat32_t vw = svld1_f32(pg, wT_row + oc);\n va = svmla_f32_m(pg, va, vpx, vw);\n svst1_f32(pg, acc1 + oc, va);\n }\n }\n }\n }\n \n long out_pixel_offset = (long)oh * W_out + ow;\n for (int oc = 0; oc < Cout; ++oc) {\n out_n[(long)oc * H_out * W_out + out_pixel_offset] = acc1[oc];\n }\n }\n }\n }\n \n free(weight_T);\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json b/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json deleted file mode 100644 index 35bbec3d7d75817eea855d7dd7d9182429001937..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "definition": "conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py — do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 64;\nconstexpr int Kh = 5;\nconstexpr int Kw = 5;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 2;\nconstexpr int pad_left = 2;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized conv2d kernel for AArch64 SVE (Graviton3, 256-bit = 8 floats)\n// conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64\n//\n// Strategy: Im2col-free direct convolution with aggressive tiling.\n// Key insight: The reference scalar is FASTER than v1 (speedup=0.3x).\n// v1 was loading input pixels one-by-one into a stack buffer — terrible.\n//\n// New approach:\n// - Loop order: N, oh, ow_tile(8), oc_tile(8), ic, kh, kw\n// - 8 output channels (oc) x 8 output widths (ow) = 64 accumulators\n// - For each (ic, kh, kw): load 8 input pixels as SVE vector,\n// broadcast 8 weights (one per oc), do 8 fmla ops\n// - Handle boundary rows/cols by pre-padding or masking\n// - Pre-compute which rows/cols are in-bounds to avoid per-pixel checks\n//\n// Weight layout: [Cout=64, Cin, Kh=5, Kw=5]\n// Input layout: [N, Cin, H, W]\n// Output layout: [N, Cout=64, H_out, W_out]\n\n#include \"conv2d.h\"\n#include \n#include \n#include \n#include \n\nusing namespace conv2d_def;\n\n// Tile sizes\nstatic constexpr int OC_TILE = 8; // process 8 output channels at once\nstatic constexpr int OW_TILE = 8; // process 8 output widths at once (= SVE vector width for float32 at 256-bit)\n\nextern \"C\" void inner_conv2d(\n const float* __restrict__ input,\n float* __restrict__ output,\n const float* __restrict__ weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const int OC = Cout; // 64\n const int KH = Kh; // 5\n const int KW = Kw; // 5\n const int PAD_TOP = pad_top; // 2\n const int PAD_LEFT = pad_left; // 2\n\n // SVE predicate for 8 floats (256-bit / 32-bit = 8 lanes)\n const svbool_t ptrue = svptrue_b32();\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * OC * H_out * W_out;\n\n // Tile over output channels (8 at a time)\n for (int oc_base = 0; oc_base < OC; oc_base += OC_TILE) {\n // Pointers to weight rows for each of the 8 output channels\n // weight[oc, ic, kh, kw] = weight + ((oc*C_in + ic)*KH + kh)*KW + kw\n // stride between consecutive oc: C_in * KH * KW floats\n const long w_oc_stride = (long)C_in * KH * KW;\n\n // Tile over output rows\n for (int oh = 0; oh < H_out; ++oh) {\n // Tile over output columns (8 at a time)\n int ow = 0;\n for (; ow + OW_TILE <= W_out; ow += OW_TILE) {\n // 8 accumulators for 8 output channels, each holding 8 output widths\n svfloat32_t acc0 = svdup_f32(0.0f);\n svfloat32_t acc1 = svdup_f32(0.0f);\n svfloat32_t acc2 = svdup_f32(0.0f);\n svfloat32_t acc3 = svdup_f32(0.0f);\n svfloat32_t acc4 = svdup_f32(0.0f);\n svfloat32_t acc5 = svdup_f32(0.0f);\n svfloat32_t acc6 = svdup_f32(0.0f);\n svfloat32_t acc7 = svdup_f32(0.0f);\n\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_ic = in_n + (long)ic * H * W;\n // Weight pointer for this (oc_base, ic) combination\n // weight[(oc_base+o)*C_in*KH*KW + ic*KH*KW + kh*KW + kw]\n const float* w_base = weight + ((long)(oc_base) * C_in + ic) * KH * KW;\n\n for (int kh = 0; kh < KH; ++kh) {\n int ih = oh - PAD_TOP + kh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = in_ic + ih * W;\n\n for (int kw = 0; kw < KW; ++kw) {\n int iw_base = ow - PAD_LEFT + kw;\n // iw_base + 0..7 are the input column indices\n // For the main tile (ow + OW_TILE <= W_out), check boundaries:\n // iw_base can be negative (left pad) or >= W (right pad)\n // iw_base + 7 can be >= W\n\n svfloat32_t vin;\n if (iw_base >= 0 && iw_base + OW_TILE <= W) {\n // Fully in-bounds: load 8 consecutive floats\n vin = svld1_f32(ptrue, in_row + iw_base);\n } else {\n // Boundary case: load with masking\n // Create index vector [iw_base, iw_base+1, ..., iw_base+7]\n // and mask out-of-bounds\n float tmp[8];\n for (int i = 0; i < 8; ++i) {\n int iw = iw_base + i;\n tmp[i] = (iw >= 0 && iw < W) ? in_row[iw] : 0.0f;\n }\n vin = svld1_f32(ptrue, tmp);\n }\n\n // Weight pointer for this (ic, kh, kw)\n const float* wp = w_base + (kh * KW + kw);\n // Load 8 weights (one per output channel), broadcast each\n float w0 = wp[0 * w_oc_stride];\n float w1 = wp[1 * w_oc_stride];\n float w2 = wp[2 * w_oc_stride];\n float w3 = wp[3 * w_oc_stride];\n float w4 = wp[4 * w_oc_stride];\n float w5 = wp[5 * w_oc_stride];\n float w6 = wp[6 * w_oc_stride];\n float w7 = wp[7 * w_oc_stride];\n\n acc0 = svmla_n_f32_m(ptrue, acc0, vin, w0);\n acc1 = svmla_n_f32_m(ptrue, acc1, vin, w1);\n acc2 = svmla_n_f32_m(ptrue, acc2, vin, w2);\n acc3 = svmla_n_f32_m(ptrue, acc3, vin, w3);\n acc4 = svmla_n_f32_m(ptrue, acc4, vin, w4);\n acc5 = svmla_n_f32_m(ptrue, acc5, vin, w5);\n acc6 = svmla_n_f32_m(ptrue, acc6, vin, w6);\n acc7 = svmla_n_f32_m(ptrue, acc7, vin, w7);\n }\n }\n }\n\n // Store 8 output channels x 8 output widths\n long out_off = (long)oh * W_out + ow;\n svst1_f32(ptrue, out_n + (long)(oc_base+0) * H_out * W_out + out_off, acc0);\n svst1_f32(ptrue, out_n + (long)(oc_base+1) * H_out * W_out + out_off, acc1);\n svst1_f32(ptrue, out_n + (long)(oc_base+2) * H_out * W_out + out_off, acc2);\n svst1_f32(ptrue, out_n + (long)(oc_base+3) * H_out * W_out + out_off, acc3);\n svst1_f32(ptrue, out_n + (long)(oc_base+4) * H_out * W_out + out_off, acc4);\n svst1_f32(ptrue, out_n + (long)(oc_base+5) * H_out * W_out + out_off, acc5);\n svst1_f32(ptrue, out_n + (long)(oc_base+6) * H_out * W_out + out_off, acc6);\n svst1_f32(ptrue, out_n + (long)(oc_base+7) * H_out * W_out + out_off, acc7);\n }\n\n // Handle remaining output widths (scalar)\n for (; ow < W_out; ++ow) {\n float sums[OC_TILE] = {};\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_ic = in_n + (long)ic * H * W;\n const float* w_base = weight + ((long)(oc_base) * C_in + ic) * KH * KW;\n for (int kh = 0; kh < KH; ++kh) {\n int ih = oh - PAD_TOP + kh;\n if (ih < 0 || ih >= H) continue;\n for (int kw = 0; kw < KW; ++kw) {\n int iw = ow - PAD_LEFT + kw;\n if (iw < 0 || iw >= W) continue;\n float px = in_ic[ih * W + iw];\n const float* wp = w_base + (kh * KW + kw);\n for (int o = 0; o < OC_TILE; ++o) {\n sums[o] += px * wp[o * w_oc_stride];\n }\n }\n }\n }\n long out_off = (long)oh * W_out + ow;\n for (int o = 0; o < OC_TILE; ++o) {\n out_n[(long)(oc_base+o) * H_out * W_out + out_off] = sums[o];\n }\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json b/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json deleted file mode 100644 index 39dac96c79287b6e4ba1d8304f5398d84cea470b..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "definition": "conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py — do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 64;\nconstexpr int Kh = 7;\nconstexpr int Kw = 7;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 3;\nconstexpr int pad_left = 3;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "\n// Optimized conv2d kernel for conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64\n// Strategy: vectorize over output channels (Cout=64)\n// Weight layout: [Cout=64, C_in, Kh=7, Kw=7]\n// For each (oh, ow), compute all 64 output channels using SVE\n// SVE 256-bit = 8 floats per vector, so 8 vectors cover all 64 oc\n// Key fix: weight[oc, ic, kh, kw] = weight[oc * C_in * Kh * Kw + ic * Kh * Kw + kh * Kw + kw]\n// For fixed (ic, kh, kw), consecutive oc values are C_in*Kh*Kw apart (strided)\n// We need to load 8 consecutive oc at a time from strided locations\n// Better approach: reorder weight to [C_in, Kh, Kw, Cout] for contiguous Cout access\n\n#include \"conv2d.h\"\n#include \n#include \n#include \n#include \n\nusing namespace conv2d_def;\n\n// Repack weight from [Cout, C_in, Kh, Kw] to [C_in, Kh, Kw, Cout]\n// so that for fixed (ic, kh, kw), all Cout values are contiguous\nstatic void repack_weight(const float* __restrict__ src, float* __restrict__ dst,\n int C_in)\n{\n // src[oc, ic, kh, kw] = src[oc * C_in * Kh * Kw + ic * Kh * Kw + kh * Kw + kw]\n // dst[ic, kh, kw, oc] = dst[(ic * Kh * Kw + kh * Kw + kw) * Cout + oc]\n for (int oc = 0; oc < Cout; ++oc) {\n for (int ic = 0; ic < C_in; ++ic) {\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int src_idx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n int dst_idx = ((ic * Kh + kh) * Kw + kw) * Cout + oc;\n dst[dst_idx] = src[src_idx];\n }\n }\n }\n }\n}\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const int KhKw = Kh * Kw;\n const int total_w = C_in * KhKw * Cout;\n\n // Repack weight to [C_in, Kh, Kw, Cout=64] layout\n float* w_packed = (float*)malloc(total_w * sizeof(float));\n repack_weight(weight, w_packed, C_in);\n\n svbool_t ptrue = svptrue_b32();\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n\n for (int oh = 0; oh < H_out; ++oh) {\n int ih_base = oh * Sh - pad_top;\n for (int ow = 0; ow < W_out; ++ow) {\n int iw_base = ow * Sw - pad_left;\n\n // 8 accumulators for 64 output channels (8 floats each)\n svfloat32_t acc0 = svdup_f32(0.0f);\n svfloat32_t acc1 = svdup_f32(0.0f);\n svfloat32_t acc2 = svdup_f32(0.0f);\n svfloat32_t acc3 = svdup_f32(0.0f);\n svfloat32_t acc4 = svdup_f32(0.0f);\n svfloat32_t acc5 = svdup_f32(0.0f);\n svfloat32_t acc6 = svdup_f32(0.0f);\n svfloat32_t acc7 = svdup_f32(0.0f);\n\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n // w_packed[ic, kh, kw, :] starts at w_packed + (ic * KhKw) * Cout\n const float* wp_ic = w_packed + (long)ic * KhKw * Cout;\n\n for (int kh = 0; kh < Kh; ++kh) {\n int ih = ih_base + kh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = inc + ih * W;\n\n for (int kw = 0; kw < Kw; ++kw) {\n int iw = iw_base + kw;\n if (iw < 0 || iw >= W) continue;\n float px = in_row[iw];\n svfloat32_t vpx = svdup_f32(px);\n\n // w_packed[ic, kh, kw, 0..63] is contiguous\n const float* wp = wp_ic + (kh * Kw + kw) * Cout;\n\n acc0 = svmla_f32_x(ptrue, acc0, vpx, svld1_f32(ptrue, wp + 0));\n acc1 = svmla_f32_x(ptrue, acc1, vpx, svld1_f32(ptrue, wp + 8));\n acc2 = svmla_f32_x(ptrue, acc2, vpx, svld1_f32(ptrue, wp + 16));\n acc3 = svmla_f32_x(ptrue, acc3, vpx, svld1_f32(ptrue, wp + 24));\n acc4 = svmla_f32_x(ptrue, acc4, vpx, svld1_f32(ptrue, wp + 32));\n acc5 = svmla_f32_x(ptrue, acc5, vpx, svld1_f32(ptrue, wp + 40));\n acc6 = svmla_f32_x(ptrue, acc6, vpx, svld1_f32(ptrue, wp + 48));\n acc7 = svmla_f32_x(ptrue, acc7, vpx, svld1_f32(ptrue, wp + 56));\n }\n }\n }\n\n // Store: output[oc, oh, ow] for oc=0..63\n // output layout: [Cout, H_out, W_out]\n long out_pos = (long)oh * W_out + ow;\n long oc_stride = (long)H_out * W_out;\n\n // Store 8 floats per vector to non-contiguous output locations\n // Each group of 8 oc values goes to consecutive oc channels\n // out_n[oc * oc_stride + out_pos] for oc=0..7, 8..15, etc.\n // These are strided stores - use scatter or scalar store\n // For simplicity, use scalar store from SVE vector\n float tmp[64];\n svst1_f32(ptrue, tmp + 0, acc0);\n svst1_f32(ptrue, tmp + 8, acc1);\n svst1_f32(ptrue, tmp + 16, acc2);\n svst1_f32(ptrue, tmp + 24, acc3);\n svst1_f32(ptrue, tmp + 32, acc4);\n svst1_f32(ptrue, tmp + 40, acc5);\n svst1_f32(ptrue, tmp + 48, acc6);\n svst1_f32(ptrue, tmp + 56, acc7);\n\n for (int oc = 0; oc < Cout; ++oc) {\n out_n[oc * oc_stride + out_pos] = tmp[oc];\n }\n }\n }\n }\n\n free(w_packed);\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json b/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json deleted file mode 100644 index 05d2a6e661d3d5f37b2da83f2f1d31f58db13050..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "definition": "conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d_depthwise.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this conv2d_depthwise specialisation.\nnamespace conv2d_depthwise_def {\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 1;\n} // namespace conv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\nvoid inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_conv2d_depthwise.\n// ABI: armbench_entry_conv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "\n#include \"conv2d_depthwise.h\"\n#include \n#include \n\nusing namespace conv2d_depthwise_def;\n\n// Optimized depthwise conv2d with SVE intrinsics\n// Strategy:\n// - For each (n, c), process the output row by row\n// - For each output row, vectorize over output width (ow) using SVE\n// - Preload the 9 weights for the 3x3 kernel\n// - Handle padding by zeroing out-of-bounds input accesses\n// - Use fused multiply-add for efficiency\n\nextern \"C\" void inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n const int vl = svcntw(); // SVE vector length in floats\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n\n // Load all 9 weights\n float w00 = w_c[0], w01 = w_c[1], w02 = w_c[2];\n float w10 = w_c[3], w11 = w_c[4], w12 = w_c[5];\n float w20 = w_c[6], w21 = w_c[7], w22 = w_c[8];\n float b = bias[c];\n\n svfloat32_t vw00 = svdup_f32(w00), vw01 = svdup_f32(w01), vw02 = svdup_f32(w02);\n svfloat32_t vw10 = svdup_f32(w10), vw11 = svdup_f32(w11), vw12 = svdup_f32(w12);\n svfloat32_t vw20 = svdup_f32(w20), vw21 = svdup_f32(w21), vw22 = svdup_f32(w22);\n svfloat32_t vbias = svdup_f32(b);\n\n for (int oh = 0; oh < H_out; ++oh) {\n // ih0, ih1, ih2 are the three input rows\n int ih0 = oh - 1; // oh*Sh - pad + 0*Dh\n int ih1 = oh; // oh*Sh - pad + 1*Dh\n int ih2 = oh + 1; // oh*Sh - pad + 2*Dh\n\n const float* row0 = (ih0 >= 0 && ih0 < H) ? in_c + ih0 * W : nullptr;\n const float* row1 = (ih1 >= 0 && ih1 < H) ? in_c + ih1 * W : nullptr;\n const float* row2 = (ih2 >= 0 && ih2 < H) ? in_c + ih2 * W : nullptr;\n\n float* out_row = out_c + oh * W_out;\n\n // Process output width in SVE vector chunks\n // For each output pixel ow, input pixel iw = ow - 1, ow, ow+1\n // We need to handle left/right padding carefully\n // \n // Strategy: process interior pixels (ow=1..W_out-2) with full SVE,\n // handle boundary pixels (ow=0 and ow=W_out-1) separately.\n //\n // For interior: iw ranges from 0 to W-1 (no padding needed)\n // We load row[ow-1..ow+1] for each kernel column\n\n // Handle ow=0 (left boundary) scalar\n {\n int ow = 0;\n float sum = b;\n // kw=0: iw = -1 (out of bounds)\n // kw=1: iw = 0\n // kw=2: iw = 1\n if (row0) { sum += row0[0] * w01; if (W > 1) sum += row0[1] * w02; }\n if (row1) { sum += row1[0] * w11; if (W > 1) sum += row1[1] * w12; }\n if (row2) { sum += row2[0] * w21; if (W > 1) sum += row2[1] * w22; }\n out_row[0] = sum;\n }\n\n // Interior: ow = 1 .. W_out-2 (vectorized)\n // For these, iw-1 = ow-2 >= 0 and iw+1 = ow <= W-1 (since ow <= W_out-2 = W-2 when pad=1, sh=1)\n // Actually W_out = H (same spatial), so ow goes 0..W-1\n // Interior: ow=1..W-2, iw ranges 0..W-1\n {\n int ow_start = 1;\n int ow_end = W_out - 1; // exclusive\n\n for (int ow = ow_start; ow < ow_end; ) {\n svbool_t pg = svwhilelt_b32(ow, ow_end);\n int64_t ow64 = (int64_t)ow;\n\n svfloat32_t acc = vbias;\n\n // For interior pixels, iw = ow - 1, ow, ow + 1 are all valid\n // Load row0 contributions\n if (row0) {\n // col 0: row0[ow-1]\n svfloat32_t v = svld1(pg, row0 + ow - 1);\n acc = svmla_f32_m(pg, acc, v, vw00);\n // col 1: row0[ow]\n v = svld1(pg, row0 + ow);\n acc = svmla_f32_m(pg, acc, v, vw01);\n // col 2: row0[ow+1]\n v = svld1(pg, row0 + ow + 1);\n acc = svmla_f32_m(pg, acc, v, vw02);\n }\n\n if (row1) {\n svfloat32_t v = svld1(pg, row1 + ow - 1);\n acc = svmla_f32_m(pg, acc, v, vw10);\n v = svld1(pg, row1 + ow);\n acc = svmla_f32_m(pg, acc, v, vw11);\n v = svld1(pg, row1 + ow + 1);\n acc = svmla_f32_m(pg, acc, v, vw12);\n }\n\n if (row2) {\n svfloat32_t v = svld1(pg, row2 + ow - 1);\n acc = svmla_f32_m(pg, acc, v, vw20);\n v = svld1(pg, row2 + ow);\n acc = svmla_f32_m(pg, acc, v, vw21);\n v = svld1(pg, row2 + ow + 1);\n acc = svmla_f32_m(pg, acc, v, vw22);\n }\n\n svst1(pg, out_row + ow, acc);\n ow += vl;\n }\n }\n\n // Handle ow=W_out-1 (right boundary) scalar\n if (W_out > 1) {\n int ow = W_out - 1;\n float sum = b;\n // kw=0: iw = ow-1 = W-2 (valid if W>=2)\n // kw=1: iw = ow = W-1 (valid)\n // kw=2: iw = ow+1 = W (out of bounds)\n if (row0) { if (W >= 2) sum += row0[ow-1] * w00; sum += row0[ow] * w01; }\n if (row1) { if (W >= 2) sum += row1[ow-1] * w10; sum += row1[ow] * w11; }\n if (row2) { if (W >= 2) sum += row2[ow-1] * w20; sum += row2[ow] * w21; }\n out_row[ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json b/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json deleted file mode 100644 index c99748a04ac0a00af323765beb4128487df2b937..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "definition": "conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d_depthwise.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this conv2d_depthwise specialisation.\nnamespace conv2d_depthwise_def {\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 1;\n} // namespace conv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\nvoid inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_conv2d_depthwise.\n// ABI: armbench_entry_conv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "#include \"conv2d_depthwise.h\"\n#include \n#include \n\nusing namespace conv2d_depthwise_def;\n\n// Optimized depthwise conv2d: 3x3 kernel, stride=2, pad=1\n// Key insight: use LD2 for stride-2 deinterleave in the fast path (no boundary)\n// Process multiple output rows (oh) at once to amortize weight loading\n// and improve instruction-level parallelism.\n\nextern \"C\" void inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n const int vl = svcntw(); // SVE vector length in floats (8 for 256-bit)\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n\n // Load 3x3 weights\n const float w00 = w_c[0], w01 = w_c[1], w02 = w_c[2];\n const float w10 = w_c[3], w11 = w_c[4], w12 = w_c[5];\n const float w20 = w_c[6], w21 = w_c[7], w22 = w_c[8];\n const float b = bias[c];\n\n const svfloat32_t vw00 = svdup_f32(w00), vw01 = svdup_f32(w01), vw02 = svdup_f32(w02);\n const svfloat32_t vw10 = svdup_f32(w10), vw11 = svdup_f32(w11), vw12 = svdup_f32(w12);\n const svfloat32_t vw20 = svdup_f32(w20), vw21 = svdup_f32(w21), vw22 = svdup_f32(w22);\n const svfloat32_t vbias = svdup_f32(b);\n const svbool_t ptrue = svptrue_b32();\n\n // Process 2 output rows at a time when possible\n int oh = 0;\n for (; oh + 1 < H_out; oh += 2) {\n // oh and oh+1 share input rows:\n // oh uses ih: oh*2-1, oh*2, oh*2+1\n // oh+1 uses ih: oh*2+1, oh*2+2, oh*2+3\n // Shared: ih = oh*2+1\n int ih0 = oh * 2 - 1;\n int ih1 = oh * 2;\n int ih2 = oh * 2 + 1; // shared\n int ih3 = oh * 2 + 2;\n int ih4 = oh * 2 + 3;\n\n const float* row0 = (ih0 >= 0 && ih0 < H) ? in_c + ih0 * W : nullptr;\n const float* row1 = (ih1 >= 0 && ih1 < H) ? in_c + ih1 * W : nullptr;\n const float* row2 = (ih2 >= 0 && ih2 < H) ? in_c + ih2 * W : nullptr;\n const float* row3 = (ih3 >= 0 && ih3 < H) ? in_c + ih3 * W : nullptr;\n const float* row4 = (ih4 >= 0 && ih4 < H) ? in_c + ih4 * W : nullptr;\n\n float* out_row0 = out_c + oh * W_out;\n float* out_row1 = out_c + (oh + 1) * W_out;\n\n int ow = 0;\n for (; ow + vl <= W_out; ow += vl) {\n int iw_base = 2 * ow - 1;\n bool left_ok = (iw_base >= 0);\n bool right_ok = (iw_base + 2 * vl < W);\n\n if (left_ok && right_ok) {\n // Fast path: LD2 for stride-2 deinterleave\n // row0 -> oh row, kh=0\n // row1 -> oh row, kh=1; oh+1 row, kh=0 (not used for oh+1 since row1 is ih1=oh*2)\n // Actually for oh+1: kh=0 is ih2=oh*2+1=row2, kh=1 is ih3=row3, kh=2 is ih4=row4\n\n svfloat32_t acc0 = vbias;\n svfloat32_t acc1 = vbias;\n\n // Process row0 (for oh, kh=0)\n if (row0) {\n svfloat32x2_t v = svld2_f32(ptrue, row0 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0); // kw=0\n svfloat32_t o1 = svget2_f32(v, 1); // kw=1\n float extra = row0[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1); // kw=2\n acc0 = svmla_f32_x(ptrue, acc0, e0, vw00);\n acc0 = svmla_f32_x(ptrue, acc0, o1, vw01);\n acc0 = svmla_f32_x(ptrue, acc0, e2, vw02);\n }\n // Process row1 (for oh, kh=1)\n if (row1) {\n svfloat32x2_t v = svld2_f32(ptrue, row1 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row1[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc0 = svmla_f32_x(ptrue, acc0, e0, vw10);\n acc0 = svmla_f32_x(ptrue, acc0, o1, vw11);\n acc0 = svmla_f32_x(ptrue, acc0, e2, vw12);\n }\n // Process row2 (for oh, kh=2; for oh+1, kh=0)\n if (row2) {\n svfloat32x2_t v = svld2_f32(ptrue, row2 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row2[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc0 = svmla_f32_x(ptrue, acc0, e0, vw20);\n acc0 = svmla_f32_x(ptrue, acc0, o1, vw21);\n acc0 = svmla_f32_x(ptrue, acc0, e2, vw22);\n acc1 = svmla_f32_x(ptrue, acc1, e0, vw00);\n acc1 = svmla_f32_x(ptrue, acc1, o1, vw01);\n acc1 = svmla_f32_x(ptrue, acc1, e2, vw02);\n }\n // Process row3 (for oh+1, kh=1)\n if (row3) {\n svfloat32x2_t v = svld2_f32(ptrue, row3 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row3[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc1 = svmla_f32_x(ptrue, acc1, e0, vw10);\n acc1 = svmla_f32_x(ptrue, acc1, o1, vw11);\n acc1 = svmla_f32_x(ptrue, acc1, e2, vw12);\n }\n // Process row4 (for oh+1, kh=2)\n if (row4) {\n svfloat32x2_t v = svld2_f32(ptrue, row4 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row4[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc1 = svmla_f32_x(ptrue, acc1, e0, vw20);\n acc1 = svmla_f32_x(ptrue, acc1, o1, vw21);\n acc1 = svmla_f32_x(ptrue, acc1, e2, vw22);\n }\n\n svst1_f32(ptrue, out_row0 + ow, acc0);\n svst1_f32(ptrue, out_row1 + ow, acc1);\n } else {\n // Boundary path: gather with masking\n svint32_t idx_base_vec = svindex_s32(0, 2);\n svint32_t col0 = svadd_n_s32_x(ptrue, idx_base_vec, iw_base + 0);\n svint32_t col1 = svadd_n_s32_x(ptrue, idx_base_vec, iw_base + 1);\n svint32_t col2 = svadd_n_s32_x(ptrue, idx_base_vec, iw_base + 2);\n svint32_t vW = svdup_n_s32(W);\n\n svbool_t valid0 = svand_b_z(ptrue,\n svcmpge_n_s32(ptrue, col0, 0),\n svcmplt_s32(ptrue, col0, vW));\n svbool_t valid1 = svand_b_z(ptrue,\n svcmpge_n_s32(ptrue, col1, 0),\n svcmplt_s32(ptrue, col1, vW));\n svbool_t valid2 = svand_b_z(ptrue,\n svcmpge_n_s32(ptrue, col2, 0),\n svcmplt_s32(ptrue, col2, vW));\n\n svfloat32_t acc0 = vbias;\n svfloat32_t acc1 = vbias;\n\n if (row0) {\n svfloat32_t v0 = svld1_gather_s32index_f32(valid0, row0, col0);\n svfloat32_t v1 = svld1_gather_s32index_f32(valid1, row0, col1);\n svfloat32_t v2 = svld1_gather_s32index_f32(valid2, row0, col2);\n acc0 = svmla_f32_x(ptrue, acc0, v0, vw00);\n acc0 = svmla_f32_x(ptrue, acc0, v1, vw01);\n acc0 = svmla_f32_x(ptrue, acc0, v2, vw02);\n }\n if (row1) {\n svfloat32_t v0 = svld1_gather_s32index_f32(valid0, row1, col0);\n svfloat32_t v1 = svld1_gather_s32index_f32(valid1, row1, col1);\n svfloat32_t v2 = svld1_gather_s32index_f32(valid2, row1, col2);\n acc0 = svmla_f32_x(ptrue, acc0, v0, vw10);\n acc0 = svmla_f32_x(ptrue, acc0, v1, vw11);\n acc0 = svmla_f32_x(ptrue, acc0, v2, vw12);\n }\n if (row2) {\n svfloat32_t v0 = svld1_gather_s32index_f32(valid0, row2, col0);\n svfloat32_t v1 = svld1_gather_s32index_f32(valid1, row2, col1);\n svfloat32_t v2 = svld1_gather_s32index_f32(valid2, row2, col2);\n acc0 = svmla_f32_x(ptrue, acc0, v0, vw20);\n acc0 = svmla_f32_x(ptrue, acc0, v1, vw21);\n acc0 = svmla_f32_x(ptrue, acc0, v2, vw22);\n acc1 = svmla_f32_x(ptrue, acc1, v0, vw00);\n acc1 = svmla_f32_x(ptrue, acc1, v1, vw01);\n acc1 = svmla_f32_x(ptrue, acc1, v2, vw02);\n }\n if (row3) {\n svfloat32_t v0 = svld1_gather_s32index_f32(valid0, row3, col0);\n svfloat32_t v1 = svld1_gather_s32index_f32(valid1, row3, col1);\n svfloat32_t v2 = svld1_gather_s32index_f32(valid2, row3, col2);\n acc1 = svmla_f32_x(ptrue, acc1, v0, vw10);\n acc1 = svmla_f32_x(ptrue, acc1, v1, vw11);\n acc1 = svmla_f32_x(ptrue, acc1, v2, vw12);\n }\n if (row4) {\n svfloat32_t v0 = svld1_gather_s32index_f32(valid0, row4, col0);\n svfloat32_t v1 = svld1_gather_s32index_f32(valid1, row4, col1);\n svfloat32_t v2 = svld1_gather_s32index_f32(valid2, row4, col2);\n acc1 = svmla_f32_x(ptrue, acc1, v0, vw20);\n acc1 = svmla_f32_x(ptrue, acc1, v1, vw21);\n acc1 = svmla_f32_x(ptrue, acc1, v2, vw22);\n }\n\n svst1_f32(ptrue, out_row0 + ow, acc0);\n svst1_f32(ptrue, out_row1 + ow, acc1);\n }\n }\n\n // Scalar tail for both rows\n for (; ow < W_out; ++ow) {\n float sum0 = b, sum1 = b;\n for (int kh = 0; kh < 3; ++kh) {\n int ih_a = oh * 2 - 1 + kh;\n int ih_b = (oh+1) * 2 - 1 + kh;\n for (int kw = 0; kw < 3; ++kw) {\n int iw = ow * 2 - 1 + kw;\n if (iw >= 0 && iw < W) {\n if (ih_a >= 0 && ih_a < H) sum0 += in_c[ih_a * W + iw] * w_c[kh * 3 + kw];\n if (ih_b >= 0 && ih_b < H) sum1 += in_c[ih_b * W + iw] * w_c[kh * 3 + kw];\n }\n }\n }\n out_row0[ow] = sum0;\n out_row1[ow] = sum1;\n }\n }\n\n // Handle remaining odd row\n for (; oh < H_out; ++oh) {\n int ih0 = oh * 2 - 1;\n int ih1 = oh * 2;\n int ih2 = oh * 2 + 1;\n\n const float* row0 = (ih0 >= 0 && ih0 < H) ? in_c + ih0 * W : nullptr;\n const float* row1 = (ih1 >= 0 && ih1 < H) ? in_c + ih1 * W : nullptr;\n const float* row2 = (ih2 >= 0 && ih2 < H) ? in_c + ih2 * W : nullptr;\n\n float* out_row = out_c + oh * W_out;\n\n int ow = 0;\n for (; ow + vl <= W_out; ow += vl) {\n int iw_base = 2 * ow - 1;\n bool left_ok = (iw_base >= 0);\n bool right_ok = (iw_base + 2 * vl < W);\n\n svfloat32_t acc = vbias;\n\n if (left_ok && right_ok) {\n if (row0) {\n svfloat32x2_t v = svld2_f32(ptrue, row0 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row0[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc = svmla_f32_x(ptrue, acc, e0, vw00);\n acc = svmla_f32_x(ptrue, acc, o1, vw01);\n acc = svmla_f32_x(ptrue, acc, e2, vw02);\n }\n if (row1) {\n svfloat32x2_t v = svld2_f32(ptrue, row1 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row1[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc = svmla_f32_x(ptrue, acc, e0, vw10);\n acc = svmla_f32_x(ptrue, acc, o1, vw11);\n acc = svmla_f32_x(ptrue, acc, e2, vw12);\n }\n if (row2) {\n svfloat32x2_t v = svld2_f32(ptrue, row2 + iw_base);\n svfloat32_t e0 = svget2_f32(v, 0);\n svfloat32_t o1 = svget2_f32(v, 1);\n float extra = row2[iw_base + 2 * vl];\n svfloat32_t e2 = svext_f32(e0, svdup_f32(extra), 1);\n acc = svmla_f32_x(ptrue, acc, e0, vw20);\n acc = svmla_f32_x(ptrue, acc, o1, vw21);\n acc = svmla_f32_x(ptrue, acc, e2, vw22);\n }\n } else {\n svint32_t idx_base_vec = svindex_s32(0, 2);\n svint32_t col0 = svadd_n_s32_x(ptrue, idx_base_vec, iw_base + 0);\n svint32_t col1 = svadd_n_s32_x(ptrue, idx_base_vec, iw_base + 1);\n svint32_t col2 = svadd_n_s32_x(ptrue, idx_base_vec, iw_base + 2);\n svint32_t vW = svdup_n_s32(W);\n\n svbool_t valid0 = svand_b_z(ptrue, svcmpge_n_s32(ptrue, col0, 0), svcmplt_s32(ptrue, col0, vW));\n svbool_t valid1 = svand_b_z(ptrue, svcmpge_n_s32(ptrue, col1, 0), svcmplt_s32(ptrue, col1, vW));\n svbool_t valid2 = svand_b_z(ptrue, svcmpge_n_s32(ptrue, col2, 0), svcmplt_s32(ptrue, col2, vW));\n\n if (row0) {\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid0, row0, col0), vw00);\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid1, row0, col1), vw01);\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid2, row0, col2), vw02);\n }\n if (row1) {\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid0, row1, col0), vw10);\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid1, row1, col1), vw11);\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid2, row1, col2), vw12);\n }\n if (row2) {\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid0, row2, col0), vw20);\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid1, row2, col1), vw21);\n acc = svmla_f32_x(ptrue, acc, svld1_gather_s32index_f32(valid2, row2, col2), vw22);\n }\n }\n\n svst1_f32(ptrue, out_row + ow, acc);\n }\n\n // Scalar tail\n for (; ow < W_out; ++ow) {\n float sum = b;\n for (int kh = 0; kh < 3; ++kh) {\n int ih = oh * 2 - 1 + kh;\n if (ih < 0 || ih >= H) continue;\n for (int kw = 0; kw < 3; ++kw) {\n int iw = ow * 2 - 1 + kw;\n if (iw < 0 || iw >= W) continue;\n sum += in_c[ih * W + iw] * w_c[kh * 3 + kw];\n }\n }\n out_row[ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json b/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json deleted file mode 100644 index f238943bf4a45e93bf20a3c3f584fac881bd3c7d..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "definition": "conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d_depthwise.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this conv2d_depthwise specialisation.\nnamespace conv2d_depthwise_def {\nconstexpr int Kh = 5;\nconstexpr int Kw = 5;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 2;\n} // namespace conv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\nvoid inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_conv2d_depthwise.\n// ABI: armbench_entry_conv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "\n#include \"conv2d_depthwise.h\"\n#include \n\nusing namespace conv2d_depthwise_def;\n\n// Optimized depthwise conv2d with 5x5 kernel, stride 1, dilation 1, pad 2\n//\n// Key insight from v1 analysis:\n// - v1 has IPC=4.3 but is SLOWER than scalar (cycle_speedup=0.7)\n// - The scalar reference is already well-optimized by the compiler\n// - The issue: SVE overhead (predicate setup, etc.) for small W doesn't pay off\n// - The v1 assembly shows complex predicate logic and many register moves\n//\n// New strategy:\n// - Use explicit inline assembly for the hot inner loop\n// - Process multiple output rows simultaneously to reuse input data\n// - Use 4 accumulators per SVE iteration (4 output rows at once)\n// - This amortizes the 25 weight broadcasts over 4 outputs\n// - Key: load each input row once, multiply by 4 different weights\n//\n// For 4 output rows oh, oh+1, oh+2, oh+3:\n// - They share input rows: oh-2..oh+5 (8 rows total)\n// - For each input row ir[i], it contributes to output rows with different kernel weights\n// - ir[0] (ih=oh-2): kh=0 for oh, kh=4 for oh-4 (not in tile), etc.\n// Actually: ir[i] contributes to output row oh+t with kh = i-t\n// So ir[0] -> oh+0 with kh=0, ir[1] -> oh+0 with kh=1 AND oh+1 with kh=0, etc.\n\nextern \"C\" void inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n svbool_t pg_all = svptrue_b32();\n const int64_t vl = svcntw();\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * 25;\n float bias_val = bias[c];\n\n // Load all 25 weights\n float wf[25];\n for (int i = 0; i < 25; ++i) wf[i] = w_c[i];\n\n // Process interior rows in groups of 4\n // Interior: oh in [2, H_out-2)\n // For these rows, all 5 input rows are valid\n\n // Scalar helper for border rows\n auto scalar_row = [&](int oh) __attribute__((noinline)) {\n float* out_row = out_c + oh * W_out;\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = bias_val;\n for (int kh = 0; kh < 5; ++kh) {\n int ih = oh - 2 + kh;\n if (ih < 0 || ih >= H) continue;\n const float* in_row = in_c + ih * W;\n for (int kw = 0; kw < 5; ++kw) {\n int iw = ow - 2 + kw;\n if (iw >= 0 && iw < W)\n sum += in_row[iw] * wf[kh*5+kw];\n }\n }\n out_row[ow] = sum;\n }\n };\n\n // Border rows\n int oh_int_start = (H_out >= 2) ? 2 : H_out;\n int oh_int_end = (H_out >= 2) ? H_out - 2 : 0;\n\n for (int oh = 0; oh < oh_int_start; ++oh) scalar_row(oh);\n for (int oh = (oh_int_end > oh_int_start ? oh_int_end : oh_int_start); oh < H_out; ++oh) scalar_row(oh);\n\n // Interior rows: process 4 at a time\n for (int oh = oh_int_start; oh < oh_int_end; oh += 4) {\n int tile = oh_int_end - oh;\n if (tile > 4) tile = 4;\n\n // Input row pointers (tile+4 rows needed)\n const float* ir[8];\n for (int i = 0; i < tile + 4; ++i)\n ir[i] = in_c + (oh - 2 + i) * W;\n\n // Process each output row in the tile\n for (int t = 0; t < tile; ++t) {\n float* out_row = out_c + (oh + t) * W_out;\n const float* r0 = ir[t];\n const float* r1 = ir[t+1];\n const float* r2 = ir[t+2];\n const float* r3 = ir[t+3];\n const float* r4 = ir[t+4];\n\n // Scalar left border (ow = 0, 1)\n // ow=0: kw offsets -2,-1,0,1,2 -> only 0,1,2 valid (kw=2,3,4)\n {\n float sum = bias_val\n + r0[0]*wf[2] + r0[1]*wf[3] + r0[2]*wf[4]\n + r1[0]*wf[7] + r1[1]*wf[8] + r1[2]*wf[9]\n + r2[0]*wf[12] + r2[1]*wf[13] + r2[2]*wf[14]\n + r3[0]*wf[17] + r3[1]*wf[18] + r3[2]*wf[19]\n + r4[0]*wf[22] + r4[1]*wf[23] + r4[2]*wf[24];\n out_row[0] = sum;\n }\n if (W_out > 1) {\n // ow=1: kw offsets -1,0,1,2,3 -> only 0,1,2,3 valid (kw=1,2,3,4)\n float sum = bias_val\n + r0[0]*wf[1] + r0[1]*wf[2] + r0[2]*wf[3] + r0[3]*wf[4]\n + r1[0]*wf[6] + r1[1]*wf[7] + r1[2]*wf[8] + r1[3]*wf[9]\n + r2[0]*wf[11] + r2[1]*wf[12] + r2[2]*wf[13] + r2[3]*wf[14]\n + r3[0]*wf[16] + r3[1]*wf[17] + r3[2]*wf[18] + r3[3]*wf[19]\n + r4[0]*wf[21] + r4[1]*wf[22] + r4[2]*wf[23] + r4[3]*wf[24];\n out_row[1] = sum;\n }\n\n // SVE interior: ow in [2, W_out-2)\n // All loads ow-2..ow+vl-1+2 are in [0, W-1]\n // Condition: ow >= 2 and ow + vl + 1 < W_out\n // i.e., ow + vl <= W_out - 2\n int ow = 2;\n int ow_sve_end = W_out - 2;\n\n // Broadcast weights once outside the loop\n svfloat32_t vw0 = svdup_f32(wf[0]);\n svfloat32_t vw1 = svdup_f32(wf[1]);\n svfloat32_t vw2 = svdup_f32(wf[2]);\n svfloat32_t vw3 = svdup_f32(wf[3]);\n svfloat32_t vw4 = svdup_f32(wf[4]);\n svfloat32_t vw5 = svdup_f32(wf[5]);\n svfloat32_t vw6 = svdup_f32(wf[6]);\n svfloat32_t vw7 = svdup_f32(wf[7]);\n svfloat32_t vw8 = svdup_f32(wf[8]);\n svfloat32_t vw9 = svdup_f32(wf[9]);\n svfloat32_t vw10 = svdup_f32(wf[10]);\n svfloat32_t vw11 = svdup_f32(wf[11]);\n svfloat32_t vw12 = svdup_f32(wf[12]);\n svfloat32_t vw13 = svdup_f32(wf[13]);\n svfloat32_t vw14 = svdup_f32(wf[14]);\n svfloat32_t vw15 = svdup_f32(wf[15]);\n svfloat32_t vw16 = svdup_f32(wf[16]);\n svfloat32_t vw17 = svdup_f32(wf[17]);\n svfloat32_t vw18 = svdup_f32(wf[18]);\n svfloat32_t vw19 = svdup_f32(wf[19]);\n svfloat32_t vw20 = svdup_f32(wf[20]);\n svfloat32_t vw21 = svdup_f32(wf[21]);\n svfloat32_t vw22 = svdup_f32(wf[22]);\n svfloat32_t vw23 = svdup_f32(wf[23]);\n svfloat32_t vw24 = svdup_f32(wf[24]);\n svfloat32_t vbias = svdup_f32(bias_val);\n\n for (; ow + (int)vl <= ow_sve_end; ow += vl) {\n svfloat32_t acc = vbias;\n // kh=0: r0\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r0+ow-2), vw0);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r0+ow-1), vw1);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r0+ow ), vw2);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r0+ow+1), vw3);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r0+ow+2), vw4);\n // kh=1: r1\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r1+ow-2), vw5);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r1+ow-1), vw6);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r1+ow ), vw7);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r1+ow+1), vw8);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r1+ow+2), vw9);\n // kh=2: r2\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r2+ow-2), vw10);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r2+ow-1), vw11);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r2+ow ), vw12);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r2+ow+1), vw13);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r2+ow+2), vw14);\n // kh=3: r3\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r3+ow-2), vw15);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r3+ow-1), vw16);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r3+ow ), vw17);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r3+ow+1), vw18);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r3+ow+2), vw19);\n // kh=4: r4\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r4+ow-2), vw20);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r4+ow-1), vw21);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r4+ow ), vw22);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r4+ow+1), vw23);\n acc = svmla_f32_m(pg_all, acc, svld1_f32(pg_all, r4+ow+2), vw24);\n svst1_f32(pg_all, out_row + ow, acc);\n }\n\n // Scalar right border (ow in [ow_sve_end, W_out))\n // Also handles the tail of the SVE loop\n for (; ow < W_out; ++ow) {\n float sum = bias_val;\n for (int kw = 0; kw < 5; ++kw) {\n int iw = ow - 2 + kw;\n if (iw >= 0 && iw < W) {\n sum += r0[iw] * wf[kw];\n sum += r1[iw] * wf[5+kw];\n sum += r2[iw] * wf[10+kw];\n sum += r3[iw] * wf[15+kw];\n sum += r4[iw] * wf[20+kw];\n }\n }\n out_row[ow] = sum;\n }\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json b/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json deleted file mode 100644 index bf0652da39e44012bc8470db9b6c29556d801b74..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_deconv2d_kh3_kw3_sh1_sw1_cout256", - "definition": "deconv2d_kh3_kw3_sh1_sw1_cout256", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized deconv2d kernel for AArch64 SVE (Graviton3)\n// Strategy:\n// 1. Transpose weight from (Cout, C_in, Kh, Kw) to (C_in, Kh, Kw, Cout)\n// so that for fixed (ci, kh, kw), weight values across co are contiguous.\n// 2. Loop order: n, oh, ow (tiled), kh, kw, ci -> vectorize over co\n// 3. Use local accumulator buffers (one per tile column)\n// 4. Multiple SVE accumulators to hide FMA latency (4-cycle latency)\n// 5. Wider tile (OW_TILE=8) to amortize weight loads across more output columns\n// 6. Unroll co loop with 4 accumulators per tile column\n\n#include \"deconv2d.h\"\n#include \n#include \n#include \n\nusing namespace deconv2d_def;\n\n// Cout=256 floats = 1KB per accumulator buffer\n// With SVE 256-bit = 8 floats per vector\n// 256/8 = 32 vectors per accumulator\n\nextern \"C\" void inner_deconv2d(\n const float* __restrict__ input, float* __restrict__ output,\n const float* __restrict__ weight, const float* __restrict__ bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const int HW_out = H_out * W_out;\n const int KhKw = Kh * Kw;\n const int CinKhKw = C_in * KhKw;\n\n // Transpose weight from (Cout, C_in, Kh, Kw) to (C_in, Kh, Kw, Cout)\n // weight_T[(ci*KhKw + kh*Kw + kw)*Cout + co] = weight[co*CinKhKw + ci*KhKw + kh*Kw + kw]\n float* weight_T = (float*)aligned_alloc(64, (size_t)Cout * CinKhKw * sizeof(float));\n \n for (int co = 0; co < Cout; ++co) {\n const float* w_co = weight + (long)co * CinKhKw;\n for (int idx = 0; idx < CinKhKw; ++idx) {\n weight_T[(long)idx * Cout + co] = w_co[idx];\n }\n }\n\n // Bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * Cout * HW_out;\n for (int co = 0; co < Cout; ++co) {\n float b = bias[co];\n float* out_co = out_n + (long)co * HW_out;\n // Use SVE to fill\n svfloat32_t vb = svdup_f32(b);\n int i = 0;\n for (; i + (int)svcntw() <= HW_out; i += svcntw()) {\n svst1_f32(svptrue_b32(), out_co + i, vb);\n }\n if (i < HW_out) {\n svbool_t pg = svwhilelt_b32(i, HW_out);\n svst1_f32(pg, out_co + i, vb);\n }\n }\n }\n\n // Main computation\n // For each (n, oh, ow): accumulate over (kh, kw, ci) into acc[Cout]\n // then write back to output\n // \n // Key insight: weight_T[(ci*KhKw + kh*Kw + kw)*Cout + co] is contiguous in co\n // acc[co] += in_val * weight_T[...co...] -- FMLA with broadcast scalar\n\n // OW_TILE=8: process 8 output columns at once\n // Each accumulator is 256 floats = 1KB\n // 8 accumulators = 8KB - fits in L1 cache\n const int OW_TILE = 8;\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * HW_out;\n\n for (int oh = 0; oh < H_out; ++oh) {\n int ow = 0;\n for (; ow + OW_TILE <= W_out; ow += OW_TILE) {\n // Local accumulators for 8 output columns\n float acc0[256] __attribute__((aligned(64)));\n float acc1[256] __attribute__((aligned(64)));\n float acc2[256] __attribute__((aligned(64)));\n float acc3[256] __attribute__((aligned(64)));\n float acc4[256] __attribute__((aligned(64)));\n float acc5[256] __attribute__((aligned(64)));\n float acc6[256] __attribute__((aligned(64)));\n float acc7[256] __attribute__((aligned(64)));\n\n // Load from output (already initialized with bias)\n // output layout: (co, H_out, W_out) -> out_n[co * HW_out + oh * W_out + ow + t]\n // This is strided - do it scalar\n for (int co = 0; co < Cout; ++co) {\n long base = (long)co * HW_out + oh * W_out;\n acc0[co] = out_n[base + ow];\n acc1[co] = out_n[base + ow + 1];\n acc2[co] = out_n[base + ow + 2];\n acc3[co] = out_n[base + ow + 3];\n acc4[co] = out_n[base + ow + 4];\n acc5[co] = out_n[base + ow + 5];\n acc6[co] = out_n[base + ow + 6];\n acc7[co] = out_n[base + ow + 7];\n }\n\n for (int kh = 0; kh < Kh; ++kh) {\n int ih = oh - kh;\n if (ih < 0 || ih >= H) continue;\n for (int kw = 0; kw < Kw; ++kw) {\n // iw[t] = ow + t - kw\n int iw_base = ow - kw;\n // Valid range: iw in [0, W)\n // t valid if iw_base + t in [0, W)\n // t in [max(0, -iw_base), min(OW_TILE, W - iw_base))\n int t_start = (iw_base < 0) ? -iw_base : 0;\n int t_end = (iw_base + OW_TILE > W) ? (W - iw_base) : OW_TILE;\n if (t_start >= t_end) continue;\n\n const float* wptr_base = weight_T + (kh * Kw + kw) * Cout;\n\n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_row = in_n + (long)ci * H * W + ih * W;\n const float* wp = wptr_base + (long)ci * KhKw * Cout;\n\n // Process each valid tile column\n // Use 4 SVE accumulators per column to hide FMA latency\n // Cout=256, svcntw()=8 -> 32 iterations\n // With 4 accumulators: 8 iterations each\n\n // Preload input values for valid columns\n float in_vals[8] = {0,0,0,0,0,0,0,0};\n for (int t = t_start; t < t_end; ++t) {\n in_vals[t] = in_row[iw_base + t];\n }\n\n // Process co in chunks of 32 (4 vectors of 8)\n // to allow multiple accumulators\n svbool_t pg = svptrue_b32();\n \n for (int co = 0; co < 256; co += 32) {\n // Load 4 weight vectors (co, co+8, co+16, co+24)\n svfloat32_t vw0 = svld1_f32(pg, wp + co);\n svfloat32_t vw1 = svld1_f32(pg, wp + co + 8);\n svfloat32_t vw2 = svld1_f32(pg, wp + co + 16);\n svfloat32_t vw3 = svld1_f32(pg, wp + co + 24);\n\n // For each valid tile column, update 4 accumulators\n #define DO_TILE(acc_arr, t_idx) \\\n if (t_idx >= t_start && t_idx < t_end) { \\\n svfloat32_t vin = svdup_f32(in_vals[t_idx]); \\\n svfloat32_t va0 = svld1_f32(pg, acc_arr + co); \\\n svfloat32_t va1 = svld1_f32(pg, acc_arr + co + 8); \\\n svfloat32_t va2 = svld1_f32(pg, acc_arr + co + 16); \\\n svfloat32_t va3 = svld1_f32(pg, acc_arr + co + 24); \\\n va0 = svmla_f32_m(pg, va0, vin, vw0); \\\n va1 = svmla_f32_m(pg, va1, vin, vw1); \\\n va2 = svmla_f32_m(pg, va2, vin, vw2); \\\n va3 = svmla_f32_m(pg, va3, vin, vw3); \\\n svst1_f32(pg, acc_arr + co, va0); \\\n svst1_f32(pg, acc_arr + co + 8, va1); \\\n svst1_f32(pg, acc_arr + co + 16, va2); \\\n svst1_f32(pg, acc_arr + co + 24, va3); \\\n }\n\n DO_TILE(acc0, 0)\n DO_TILE(acc1, 1)\n DO_TILE(acc2, 2)\n DO_TILE(acc3, 3)\n DO_TILE(acc4, 4)\n DO_TILE(acc5, 5)\n DO_TILE(acc6, 6)\n DO_TILE(acc7, 7)\n #undef DO_TILE\n }\n }\n }\n }\n\n // Write back accumulators to output (strided)\n for (int co = 0; co < Cout; ++co) {\n long base = (long)co * HW_out + oh * W_out;\n out_n[base + ow] = acc0[co];\n out_n[base + ow + 1] = acc1[co];\n out_n[base + ow + 2] = acc2[co];\n out_n[base + ow + 3] = acc3[co];\n out_n[base + ow + 4] = acc4[co];\n out_n[base + ow + 5] = acc5[co];\n out_n[base + ow + 6] = acc6[co];\n out_n[base + ow + 7] = acc7[co];\n }\n }\n\n // Handle remaining columns\n for (; ow < W_out; ++ow) {\n float acc[256] __attribute__((aligned(64)));\n for (int co = 0; co < Cout; ++co)\n acc[co] = out_n[(long)co * HW_out + oh * W_out + ow];\n\n for (int kh = 0; kh < Kh; ++kh) {\n int ih = oh - kh;\n if (ih < 0 || ih >= H) continue;\n for (int kw = 0; kw < Kw; ++kw) {\n int iw = ow - kw;\n if (iw < 0 || iw >= W) continue;\n const float* wptr = weight_T + (kh * Kw + kw) * Cout;\n for (int ci = 0; ci < C_in; ++ci) {\n float in_val = in_n[(long)ci * H * W + ih * W + iw];\n svfloat32_t vin = svdup_f32(in_val);\n const float* wp = wptr + (long)ci * KhKw * Cout;\n svbool_t pg = svptrue_b32();\n for (int co = 0; co < 256; co += 32) {\n svfloat32_t va0 = svld1_f32(pg, acc + co);\n svfloat32_t va1 = svld1_f32(pg, acc + co + 8);\n svfloat32_t va2 = svld1_f32(pg, acc + co + 16);\n svfloat32_t va3 = svld1_f32(pg, acc + co + 24);\n svfloat32_t vw0 = svld1_f32(pg, wp + co);\n svfloat32_t vw1 = svld1_f32(pg, wp + co + 8);\n svfloat32_t vw2 = svld1_f32(pg, wp + co + 16);\n svfloat32_t vw3 = svld1_f32(pg, wp + co + 24);\n va0 = svmla_f32_m(pg, va0, vin, vw0);\n va1 = svmla_f32_m(pg, va1, vin, vw1);\n va2 = svmla_f32_m(pg, va2, vin, vw2);\n va3 = svmla_f32_m(pg, va3, vin, vw3);\n svst1_f32(pg, acc + co, va0);\n svst1_f32(pg, acc + co + 8, va1);\n svst1_f32(pg, acc + co + 16, va2);\n svst1_f32(pg, acc + co + 24, va3);\n }\n }\n }\n }\n\n for (int co = 0; co < Cout; ++co)\n out_n[(long)co * HW_out + oh * W_out + ow] = acc[co];\n }\n }\n }\n\n free(weight_T);\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json b/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json deleted file mode 100644 index ab00c15e96e07797d592c507691b1b4fedc237ff..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_deconv2d_kh3_kw3_sh2_sw2_cout256", - "definition": "deconv2d_kh3_kw3_sh2_sw2_cout256", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized deconv2d kernel for AArch64 SVE (Graviton3, 256-bit = 8 floats/vector)\n// Key insight: The bottleneck is scatter writes to output[co][oh][ow].\n// Strategy: Change the loop order to iterate over output positions (oh, ow)\n// and accumulate contributions from all (ci, kh, kw) that map to each output pixel.\n// This gives sequential writes to output[co][oh][ow] for all co (stride HW).\n// Better: use a temporary buffer of size Cout per output pixel, accumulate,\n// then write back. But Cout=256 floats = 1KB, fits in L1.\n//\n// Actually the best approach for this problem:\n// Loop: n, oh, ow, co (vectorized over 256 with SVE)\n// For each (oh, ow), find all (ci, ih, iw, kh, kw) that contribute:\n// ih = (oh - kh) / Sh (only if (oh - kh) % Sh == 0)\n// iw = (ow - kw) / Sw (only if (ow - kw) % Sw == 0)\n// This is the \"gather\" approach for deconv2d.\n//\n// For Sh=Sw=2, Kh=Kw=3: each output pixel has at most ceil(3/2)*ceil(3/2)=4 contributing (kh,kw) pairs\n// and C_in contributing channels.\n//\n// Loop: n, oh, ow, ci, (kh,kw valid pairs), co (vectorized)\n// Output write: output[n][co][oh][ow] += input[n][ci][ih][iw] * weight[co][ci][kh][kw]\n// With co vectorized: 256/8=32 SVE ops per (oh,ow,ci,kh,kw)\n// Output access: out_n + co*HW + oh*W_out + ow (strided by HW in co)\n// Weight access: weight + co*C_in*Kh*Kw + ci*Kh*Kw + kh*Kw + kw (strided by C_in*Kh*Kw in co)\n//\n// Both weight and output are strided in co. Need transposed weight.\n// With transposed weight (C_in, Kh, Kw, Cout): weight_T[ci][kh][kw][co] contiguous in co.\n// Output still strided by HW in co.\n//\n// For the output, use a local accumulator acc[Cout] per (oh, ow), then scatter to output.\n// This avoids repeated scatter stores and improves cache behavior.\n\n#include \"deconv2d.h\"\n#include \n#include \n#include \n\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* __restrict__ input, float* __restrict__ output,\n const float* __restrict__ weight, const float* __restrict__ bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const long HW = (long)H_out * W_out;\n const long CoutHW = (long)Cout * HW;\n const long KhKw = Kh * Kw;\n const long CinKhKw = (long)C_in * KhKw;\n\n // Transpose weights: (Cout, C_in, Kh, Kw) -> (C_in, Kh, Kw, Cout)\n const int wT_size = C_in * Kh * Kw * Cout;\n float* weight_T = (float*)aligned_alloc(64, ((wT_size * sizeof(float) + 63) / 64) * 64);\n\n for (int co = 0; co < Cout; ++co) {\n const float* w_co = weight + (long)co * CinKhKw;\n for (int ci = 0; ci < C_in; ++ci) {\n const float* w_co_ci = w_co + (long)ci * KhKw;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n long dst = ((long)ci * Kh + kh) * Kw * Cout + kw * Cout + co;\n weight_T[dst] = w_co_ci[kh * Kw + kw];\n }\n }\n }\n }\n\n // Allocate per-pixel accumulator (Cout floats = 1KB)\n float* acc = (float*)aligned_alloc(64, Cout * sizeof(float));\n\n svbool_t pg = svptrue_b32();\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * CoutHW;\n\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n // Initialize accumulator with bias\n for (int co = 0; co < Cout; co += 8) {\n svfloat32_t vb = svld1_f32(pg, bias + co);\n svst1_f32(pg, acc + co, vb);\n }\n\n // Find all (ci, kh, kw) that contribute to (oh, ow)\n for (int kh = 0; kh < Kh; ++kh) {\n int rem_h = oh - kh;\n if (rem_h < 0 || rem_h % Sh != 0) continue;\n int ih = rem_h / Sh;\n if (ih >= H) continue;\n\n for (int kw = 0; kw < Kw; ++kw) {\n int rem_w = ow - kw;\n if (rem_w < 0 || rem_w % Sw != 0) continue;\n int iw = rem_w / Sw;\n if (iw >= W) continue;\n\n const float* wT_base = weight_T + ((long)0 * Kh + kh) * Kw * Cout + kw * Cout;\n // wT_base[ci * Kh * Kw * Cout + co] for ci=0..C_in-1\n\n for (int ci = 0; ci < C_in; ++ci) {\n float in_val = in_n[(long)ci * H * W + ih * W + iw];\n svfloat32_t vin = svdup_f32(in_val);\n const float* wT = wT_base + (long)ci * Kh * Kw * Cout;\n\n // Vectorize over co: 256 floats = 32 SVE vectors\n for (int co = 0; co < Cout; co += 8) {\n svfloat32_t vacc = svld1_f32(pg, acc + co);\n svfloat32_t vw = svld1_f32(pg, wT + co);\n vacc = svmla_f32_m(pg, vacc, vin, vw);\n svst1_f32(pg, acc + co, vacc);\n }\n }\n }\n }\n\n // Write accumulator to output (scatter by HW stride)\n long out_offset = (long)oh * W_out + ow;\n float* out_base = out_n + out_offset;\n for (int co = 0; co < Cout; ++co) {\n out_base[(long)co * HW] = acc[co];\n }\n }\n }\n }\n\n free(acc);\n free(weight_T);\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json b/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json deleted file mode 100644 index b387b4e5dca44f1654649b773cf550671c4be2ce..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_deconv2d_kh4_kw4_sh1_sw1_cout128", - "definition": "deconv2d_kh4_kw4_sh1_sw1_cout128", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 4;\nconstexpr int Kw = 4;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Optimized deconv2d kernel for AArch64 SVE (Graviton3/4)\n// v4: Further improvements over v3\n// Key observations from v3:\n// - IPC ~2.67, cycle_speedup ~7.76\n// - The inner loop (iw) does 128-float fmla with 4x unroll - good\n// - The final transpose is scalar - can be improved\n// - The bias init loop is good\n// - Main bottleneck: for each (ci, kh, kw, ih, iw), we do 128 fmla ops\n// with w_ptr reloaded each time. We can hoist w_ptr loads outside iw loop.\n//\n// New optimizations:\n// 1. Hoist weight loads outside the iw loop (w_ptr is constant for fixed ci,kh,kw,ih)\n// 2. Process multiple iw positions together to reuse weight registers\n// 3. Use 8x unroll for the co loop (Cout=128, vl=8 -> 16 iters -> 2 groups of 8)\n// 4. Improve the transpose with SVE\n\n#include \"deconv2d.h\"\n#include \n#include \n#include \n\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const long HW_out = (long)H_out * W_out;\n const long Cout_HW_out = (long)Cout * HW_out;\n const long KhKw = Kh * Kw;\n const long CinKhKw = (long)C_in * KhKw;\n\n // Transpose weight from (Cout, C_in, Kh, Kw) to (C_in, Kh, Kw, Cout)\n float* wt = (float*)malloc((long)C_in * KhKw * Cout * sizeof(float));\n for (int co = 0; co < Cout; ++co) {\n for (int ci = 0; ci < C_in; ++ci) {\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n long src_idx = (long)co * CinKhKw + ci * KhKw + kh * Kw + kw;\n long dst_idx = ((long)ci * KhKw + kh * Kw + kw) * Cout + co;\n wt[dst_idx] = weight[src_idx];\n }\n }\n }\n }\n\n // Allocate temporary output buffer in (N, H_out, W_out, Cout) layout\n float* tmp_out = (float*)malloc((long)N * HW_out * Cout * sizeof(float));\n\n svbool_t ptrue = svptrue_b32();\n const int vl = svcntw(); // 8 for 256-bit SVE\n\n // Initialize with bias: tmp_out[n][oh][ow][co] = bias[co]\n for (int n = 0; n < N; ++n) {\n float* tmp_n = tmp_out + (long)n * HW_out * Cout;\n // Load bias into SVE registers (128 floats = 16 vectors of 8)\n // Then replicate across all HW_out positions\n for (long hw = 0; hw < HW_out; ++hw) {\n float* dst = tmp_n + hw * Cout;\n int co = 0;\n for (; co + 4*vl <= Cout; co += 4*vl) {\n svst1_f32(ptrue, dst + co, svld1_f32(ptrue, bias + co));\n svst1_f32(ptrue, dst + co + vl, svld1_f32(ptrue, bias + co + vl));\n svst1_f32(ptrue, dst + co + 2*vl, svld1_f32(ptrue, bias + co + 2*vl));\n svst1_f32(ptrue, dst + co + 3*vl, svld1_f32(ptrue, bias + co + 3*vl));\n }\n for (; co + vl <= Cout; co += vl) {\n svst1_f32(ptrue, dst + co, svld1_f32(ptrue, bias + co));\n }\n }\n }\n\n // Main computation: accumulate into tmp_out (N, H_out, W_out, Cout)\n // Loop order: n, ci, kh, kw, ih, iw\n // Key: for fixed (ci, kh, kw), w_ptr is constant -> hoist weight loads\n // For fixed (ci, kh, kw, ih), process multiple iw at once\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* tmp_n = tmp_out + (long)n * HW_out * Cout;\n\n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_ci = in_n + (long)ci * H * W;\n\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n const float* w_ptr = wt + ((long)ci * KhKw + kh * Kw + kw) * Cout;\n\n // Pre-load all weight vectors (Cout=128, vl=8 -> 16 vectors)\n // With 4x unroll: 4 groups of 4 vectors\n svfloat32_t vw0 = svld1_f32(ptrue, w_ptr + 0*vl);\n svfloat32_t vw1 = svld1_f32(ptrue, w_ptr + 1*vl);\n svfloat32_t vw2 = svld1_f32(ptrue, w_ptr + 2*vl);\n svfloat32_t vw3 = svld1_f32(ptrue, w_ptr + 3*vl);\n svfloat32_t vw4 = svld1_f32(ptrue, w_ptr + 4*vl);\n svfloat32_t vw5 = svld1_f32(ptrue, w_ptr + 5*vl);\n svfloat32_t vw6 = svld1_f32(ptrue, w_ptr + 6*vl);\n svfloat32_t vw7 = svld1_f32(ptrue, w_ptr + 7*vl);\n svfloat32_t vw8 = svld1_f32(ptrue, w_ptr + 8*vl);\n svfloat32_t vw9 = svld1_f32(ptrue, w_ptr + 9*vl);\n svfloat32_t vw10 = svld1_f32(ptrue, w_ptr + 10*vl);\n svfloat32_t vw11 = svld1_f32(ptrue, w_ptr + 11*vl);\n svfloat32_t vw12 = svld1_f32(ptrue, w_ptr + 12*vl);\n svfloat32_t vw13 = svld1_f32(ptrue, w_ptr + 13*vl);\n svfloat32_t vw14 = svld1_f32(ptrue, w_ptr + 14*vl);\n svfloat32_t vw15 = svld1_f32(ptrue, w_ptr + 15*vl);\n\n for (int ih = 0; ih < H; ++ih) {\n int oh = ih + kh;\n const float* in_row = in_ci + ih * W;\n float* out_row = tmp_n + ((long)oh * W_out + kw) * Cout;\n\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_row[iw];\n float* dst = out_row + (long)iw * Cout;\n\n svfloat32_t vin = svdup_f32(in_val);\n\n // Load dst, fmla, store - 16 vectors for Cout=128\n svfloat32_t vd0 = svld1_f32(ptrue, dst + 0*vl);\n svfloat32_t vd1 = svld1_f32(ptrue, dst + 1*vl);\n svfloat32_t vd2 = svld1_f32(ptrue, dst + 2*vl);\n svfloat32_t vd3 = svld1_f32(ptrue, dst + 3*vl);\n svfloat32_t vd4 = svld1_f32(ptrue, dst + 4*vl);\n svfloat32_t vd5 = svld1_f32(ptrue, dst + 5*vl);\n svfloat32_t vd6 = svld1_f32(ptrue, dst + 6*vl);\n svfloat32_t vd7 = svld1_f32(ptrue, dst + 7*vl);\n svfloat32_t vd8 = svld1_f32(ptrue, dst + 8*vl);\n svfloat32_t vd9 = svld1_f32(ptrue, dst + 9*vl);\n svfloat32_t vd10 = svld1_f32(ptrue, dst + 10*vl);\n svfloat32_t vd11 = svld1_f32(ptrue, dst + 11*vl);\n svfloat32_t vd12 = svld1_f32(ptrue, dst + 12*vl);\n svfloat32_t vd13 = svld1_f32(ptrue, dst + 13*vl);\n svfloat32_t vd14 = svld1_f32(ptrue, dst + 14*vl);\n svfloat32_t vd15 = svld1_f32(ptrue, dst + 15*vl);\n\n vd0 = svmla_f32_m(ptrue, vd0, vin, vw0);\n vd1 = svmla_f32_m(ptrue, vd1, vin, vw1);\n vd2 = svmla_f32_m(ptrue, vd2, vin, vw2);\n vd3 = svmla_f32_m(ptrue, vd3, vin, vw3);\n vd4 = svmla_f32_m(ptrue, vd4, vin, vw4);\n vd5 = svmla_f32_m(ptrue, vd5, vin, vw5);\n vd6 = svmla_f32_m(ptrue, vd6, vin, vw6);\n vd7 = svmla_f32_m(ptrue, vd7, vin, vw7);\n vd8 = svmla_f32_m(ptrue, vd8, vin, vw8);\n vd9 = svmla_f32_m(ptrue, vd9, vin, vw9);\n vd10 = svmla_f32_m(ptrue, vd10, vin, vw10);\n vd11 = svmla_f32_m(ptrue, vd11, vin, vw11);\n vd12 = svmla_f32_m(ptrue, vd12, vin, vw12);\n vd13 = svmla_f32_m(ptrue, vd13, vin, vw13);\n vd14 = svmla_f32_m(ptrue, vd14, vin, vw14);\n vd15 = svmla_f32_m(ptrue, vd15, vin, vw15);\n\n svst1_f32(ptrue, dst + 0*vl, vd0);\n svst1_f32(ptrue, dst + 1*vl, vd1);\n svst1_f32(ptrue, dst + 2*vl, vd2);\n svst1_f32(ptrue, dst + 3*vl, vd3);\n svst1_f32(ptrue, dst + 4*vl, vd4);\n svst1_f32(ptrue, dst + 5*vl, vd5);\n svst1_f32(ptrue, dst + 6*vl, vd6);\n svst1_f32(ptrue, dst + 7*vl, vd7);\n svst1_f32(ptrue, dst + 8*vl, vd8);\n svst1_f32(ptrue, dst + 9*vl, vd9);\n svst1_f32(ptrue, dst + 10*vl, vd10);\n svst1_f32(ptrue, dst + 11*vl, vd11);\n svst1_f32(ptrue, dst + 12*vl, vd12);\n svst1_f32(ptrue, dst + 13*vl, vd13);\n svst1_f32(ptrue, dst + 14*vl, vd14);\n svst1_f32(ptrue, dst + 15*vl, vd15);\n }\n }\n }\n }\n }\n }\n\n // Transpose tmp_out from (N, H_out, W_out, Cout) to output (N, Cout, H_out, W_out)\n // Use tiled transpose for cache efficiency\n for (int n = 0; n < N; ++n) {\n const float* tmp_n = tmp_out + (long)n * HW_out * Cout;\n float* out_n = output + (long)n * Cout_HW_out;\n\n // Tile over hw and co dimensions\n const int TILE_HW = 8;\n const int TILE_CO = 8; // = vl for SVE 256-bit\n\n for (long hw0 = 0; hw0 < HW_out; hw0 += TILE_HW) {\n long hw_end = hw0 + TILE_HW < HW_out ? hw0 + TILE_HW : HW_out;\n for (int co0 = 0; co0 < Cout; co0 += TILE_CO) {\n // Transpose TILE_HW x TILE_CO block\n for (long hw = hw0; hw < hw_end; ++hw) {\n const float* src = tmp_n + hw * Cout + co0;\n for (int co = co0; co < co0 + TILE_CO && co < Cout; ++co) {\n out_n[(long)co * HW_out + hw] = src[co - co0];\n }\n }\n }\n }\n }\n\n free(wt);\n free(tmp_out);\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json b/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json deleted file mode 100644 index 9f264a29eed3aa8fe66d3a722f0e959bb4c2f7ed..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_deconv2d_kh4_kw4_sh2_sw2_cout128", - "definition": "deconv2d_kh4_kw4_sh2_sw2_cout128", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 4;\nconstexpr int Kw = 4;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Observation: v3 achieves 1.699x speedup with IPC ~1.64. The assembly shows the weight\n// transpose uses scalar loads/stores (ldr s0, str s1 pairs) which is slow.\n// The main loop has good structure but IPC is limited.\n// \n// Key insight: The bottleneck is likely the output transpose at the end (strided scatter)\n// and the weight transpose at the start. Also, the main loop loads weights repeatedly\n// for each iw - we should hoist weight loads outside the iw loop.\n//\n// New strategy: For each (ci, kh, kw), load the 16 weight vectors ONCE, then\n// iterate over iw, loading/storing output. This dramatically reduces weight loads.\n// Also use prefetching to hide memory latency.\n//\n// Additionally, tile over iw with factor 4 to process 4 input pixels at once,\n// sharing the weight vectors across 4 output pixels per kw.\n\n#include \"deconv2d.h\"\n#include \n#include \n#include \n\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* __restrict__ input, float* __restrict__ output,\n const float* __restrict__ weight, const float* __restrict__ bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n const int HW = H * W;\n const int HoWo = H_out * W_out;\n \n // Allocate transposed weight: [C_in, Kh, Kw, Cout]\n const int w_size = C_in * Kh * Kw * Cout;\n float* w_trans = (float*)malloc(w_size * sizeof(float));\n \n // Transpose weight from [Cout, C_in, Kh, Kw] to [C_in, Kh, Kw, Cout]\n // weight[co, ci, kh, kw] -> w_trans[ci, kh, kw, co]\n {\n const int stride = C_in * Kh * Kw; // stride in co dimension\n for (int ci = 0; ci < C_in; ++ci) {\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n float* dst = w_trans + ((ci * Kh + kh) * Kw + kw) * Cout;\n const float* src = weight + (ci * Kh + kh) * Kw + kw;\n // Unroll over Cout=128\n for (int co = 0; co < Cout; co += 4) {\n dst[co+0] = src[(co+0) * stride];\n dst[co+1] = src[(co+1) * stride];\n dst[co+2] = src[(co+2) * stride];\n dst[co+3] = src[(co+3) * stride];\n }\n }\n }\n }\n }\n \n // Allocate temporary output in [N, H_out, W_out, Cout] layout\n const long out_size = (long)N * H_out * W_out * Cout;\n float* out_tmp = (float*)malloc(out_size * sizeof(float));\n \n // Initialize with bias - fully unrolled over Cout=128 (16 SVE vectors of 8 floats)\n {\n svbool_t pg = svptrue_b32();\n svfloat32_t b0 = svld1_f32(pg, bias + 0);\n svfloat32_t b1 = svld1_f32(pg, bias + 8);\n svfloat32_t b2 = svld1_f32(pg, bias + 16);\n svfloat32_t b3 = svld1_f32(pg, bias + 24);\n svfloat32_t b4 = svld1_f32(pg, bias + 32);\n svfloat32_t b5 = svld1_f32(pg, bias + 40);\n svfloat32_t b6 = svld1_f32(pg, bias + 48);\n svfloat32_t b7 = svld1_f32(pg, bias + 56);\n svfloat32_t b8 = svld1_f32(pg, bias + 64);\n svfloat32_t b9 = svld1_f32(pg, bias + 72);\n svfloat32_t b10 = svld1_f32(pg, bias + 80);\n svfloat32_t b11 = svld1_f32(pg, bias + 88);\n svfloat32_t b12 = svld1_f32(pg, bias + 96);\n svfloat32_t b13 = svld1_f32(pg, bias + 104);\n svfloat32_t b14 = svld1_f32(pg, bias + 112);\n svfloat32_t b15 = svld1_f32(pg, bias + 120);\n \n long total_pixels = (long)N * H_out * W_out;\n float* ptr = out_tmp;\n for (long i = 0; i < total_pixels; ++i, ptr += Cout) {\n svst1_f32(pg, ptr + 0, b0);\n svst1_f32(pg, ptr + 8, b1);\n svst1_f32(pg, ptr + 16, b2);\n svst1_f32(pg, ptr + 24, b3);\n svst1_f32(pg, ptr + 32, b4);\n svst1_f32(pg, ptr + 40, b5);\n svst1_f32(pg, ptr + 48, b6);\n svst1_f32(pg, ptr + 56, b7);\n svst1_f32(pg, ptr + 64, b8);\n svst1_f32(pg, ptr + 72, b9);\n svst1_f32(pg, ptr + 80, b10);\n svst1_f32(pg, ptr + 88, b11);\n svst1_f32(pg, ptr + 96, b12);\n svst1_f32(pg, ptr + 104, b13);\n svst1_f32(pg, ptr + 112, b14);\n svst1_f32(pg, ptr + 120, b15);\n }\n }\n \n // Main computation\n // Loop order: n, ci, ih, kh, iw, kw, co(vectorized)\n // Key optimization: hoist weight loads for (ci, kh, kw) outside iw loop\n \n svbool_t pg = svptrue_b32();\n \n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * HW;\n float* out_n = out_tmp + (long)n * H_out * W_out * Cout;\n \n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_ci = in_n + (long)ci * HW;\n const float* w_ci = w_trans + (long)ci * Kh * Kw * Cout;\n \n for (int ih = 0; ih < H; ++ih) {\n const float* in_row = in_ci + ih * W;\n \n for (int kh = 0; kh < Kh; ++kh) {\n int oh = ih * Sh + kh;\n float* out_row = out_n + oh * W_out * Cout;\n const float* w_kh = w_ci + kh * Kw * Cout;\n \n // For each kw, load weights ONCE and iterate over iw\n // kw=0\n {\n const float* wptr = w_kh + 0 * Cout;\n // Load 16 weight vectors (128 floats) once\n svfloat32_t w0 = svld1_f32(pg, wptr + 0);\n svfloat32_t w1 = svld1_f32(pg, wptr + 8);\n svfloat32_t w2 = svld1_f32(pg, wptr + 16);\n svfloat32_t w3 = svld1_f32(pg, wptr + 24);\n svfloat32_t w4 = svld1_f32(pg, wptr + 32);\n svfloat32_t w5 = svld1_f32(pg, wptr + 40);\n svfloat32_t w6 = svld1_f32(pg, wptr + 48);\n svfloat32_t w7 = svld1_f32(pg, wptr + 56);\n svfloat32_t w8 = svld1_f32(pg, wptr + 64);\n svfloat32_t w9 = svld1_f32(pg, wptr + 72);\n svfloat32_t w10 = svld1_f32(pg, wptr + 80);\n svfloat32_t w11 = svld1_f32(pg, wptr + 88);\n svfloat32_t w12 = svld1_f32(pg, wptr + 96);\n svfloat32_t w13 = svld1_f32(pg, wptr + 104);\n svfloat32_t w14 = svld1_f32(pg, wptr + 112);\n svfloat32_t w15 = svld1_f32(pg, wptr + 120);\n \n for (int iw = 0; iw < W; ++iw) {\n svfloat32_t sv_in = svdup_f32(in_row[iw]);\n float* optr = out_row + (iw * Sw + 0) * Cout;\n svfloat32_t o0 = svld1_f32(pg, optr + 0);\n svfloat32_t o1 = svld1_f32(pg, optr + 8);\n svfloat32_t o2 = svld1_f32(pg, optr + 16);\n svfloat32_t o3 = svld1_f32(pg, optr + 24);\n svfloat32_t o4 = svld1_f32(pg, optr + 32);\n svfloat32_t o5 = svld1_f32(pg, optr + 40);\n svfloat32_t o6 = svld1_f32(pg, optr + 48);\n svfloat32_t o7 = svld1_f32(pg, optr + 56);\n svfloat32_t o8 = svld1_f32(pg, optr + 64);\n svfloat32_t o9 = svld1_f32(pg, optr + 72);\n svfloat32_t o10 = svld1_f32(pg, optr + 80);\n svfloat32_t o11 = svld1_f32(pg, optr + 88);\n svfloat32_t o12 = svld1_f32(pg, optr + 96);\n svfloat32_t o13 = svld1_f32(pg, optr + 104);\n svfloat32_t o14 = svld1_f32(pg, optr + 112);\n svfloat32_t o15 = svld1_f32(pg, optr + 120);\n o0 = svmla_f32_x(pg, o0, sv_in, w0);\n o1 = svmla_f32_x(pg, o1, sv_in, w1);\n o2 = svmla_f32_x(pg, o2, sv_in, w2);\n o3 = svmla_f32_x(pg, o3, sv_in, w3);\n o4 = svmla_f32_x(pg, o4, sv_in, w4);\n o5 = svmla_f32_x(pg, o5, sv_in, w5);\n o6 = svmla_f32_x(pg, o6, sv_in, w6);\n o7 = svmla_f32_x(pg, o7, sv_in, w7);\n o8 = svmla_f32_x(pg, o8, sv_in, w8);\n o9 = svmla_f32_x(pg, o9, sv_in, w9);\n o10 = svmla_f32_x(pg, o10, sv_in, w10);\n o11 = svmla_f32_x(pg, o11, sv_in, w11);\n o12 = svmla_f32_x(pg, o12, sv_in, w12);\n o13 = svmla_f32_x(pg, o13, sv_in, w13);\n o14 = svmla_f32_x(pg, o14, sv_in, w14);\n o15 = svmla_f32_x(pg, o15, sv_in, w15);\n svst1_f32(pg, optr + 0, o0);\n svst1_f32(pg, optr + 8, o1);\n svst1_f32(pg, optr + 16, o2);\n svst1_f32(pg, optr + 24, o3);\n svst1_f32(pg, optr + 32, o4);\n svst1_f32(pg, optr + 40, o5);\n svst1_f32(pg, optr + 48, o6);\n svst1_f32(pg, optr + 56, o7);\n svst1_f32(pg, optr + 64, o8);\n svst1_f32(pg, optr + 72, o9);\n svst1_f32(pg, optr + 80, o10);\n svst1_f32(pg, optr + 88, o11);\n svst1_f32(pg, optr + 96, o12);\n svst1_f32(pg, optr + 104, o13);\n svst1_f32(pg, optr + 112, o14);\n svst1_f32(pg, optr + 120, o15);\n }\n }\n // kw=1\n {\n const float* wptr = w_kh + 1 * Cout;\n svfloat32_t w0 = svld1_f32(pg, wptr + 0);\n svfloat32_t w1 = svld1_f32(pg, wptr + 8);\n svfloat32_t w2 = svld1_f32(pg, wptr + 16);\n svfloat32_t w3 = svld1_f32(pg, wptr + 24);\n svfloat32_t w4 = svld1_f32(pg, wptr + 32);\n svfloat32_t w5 = svld1_f32(pg, wptr + 40);\n svfloat32_t w6 = svld1_f32(pg, wptr + 48);\n svfloat32_t w7 = svld1_f32(pg, wptr + 56);\n svfloat32_t w8 = svld1_f32(pg, wptr + 64);\n svfloat32_t w9 = svld1_f32(pg, wptr + 72);\n svfloat32_t w10 = svld1_f32(pg, wptr + 80);\n svfloat32_t w11 = svld1_f32(pg, wptr + 88);\n svfloat32_t w12 = svld1_f32(pg, wptr + 96);\n svfloat32_t w13 = svld1_f32(pg, wptr + 104);\n svfloat32_t w14 = svld1_f32(pg, wptr + 112);\n svfloat32_t w15 = svld1_f32(pg, wptr + 120);\n \n for (int iw = 0; iw < W; ++iw) {\n svfloat32_t sv_in = svdup_f32(in_row[iw]);\n float* optr = out_row + (iw * Sw + 1) * Cout;\n svfloat32_t o0 = svld1_f32(pg, optr + 0);\n svfloat32_t o1 = svld1_f32(pg, optr + 8);\n svfloat32_t o2 = svld1_f32(pg, optr + 16);\n svfloat32_t o3 = svld1_f32(pg, optr + 24);\n svfloat32_t o4 = svld1_f32(pg, optr + 32);\n svfloat32_t o5 = svld1_f32(pg, optr + 40);\n svfloat32_t o6 = svld1_f32(pg, optr + 48);\n svfloat32_t o7 = svld1_f32(pg, optr + 56);\n svfloat32_t o8 = svld1_f32(pg, optr + 64);\n svfloat32_t o9 = svld1_f32(pg, optr + 72);\n svfloat32_t o10 = svld1_f32(pg, optr + 80);\n svfloat32_t o11 = svld1_f32(pg, optr + 88);\n svfloat32_t o12 = svld1_f32(pg, optr + 96);\n svfloat32_t o13 = svld1_f32(pg, optr + 104);\n svfloat32_t o14 = svld1_f32(pg, optr + 112);\n svfloat32_t o15 = svld1_f32(pg, optr + 120);\n o0 = svmla_f32_x(pg, o0, sv_in, w0);\n o1 = svmla_f32_x(pg, o1, sv_in, w1);\n o2 = svmla_f32_x(pg, o2, sv_in, w2);\n o3 = svmla_f32_x(pg, o3, sv_in, w3);\n o4 = svmla_f32_x(pg, o4, sv_in, w4);\n o5 = svmla_f32_x(pg, o5, sv_in, w5);\n o6 = svmla_f32_x(pg, o6, sv_in, w6);\n o7 = svmla_f32_x(pg, o7, sv_in, w7);\n o8 = svmla_f32_x(pg, o8, sv_in, w8);\n o9 = svmla_f32_x(pg, o9, sv_in, w9);\n o10 = svmla_f32_x(pg, o10, sv_in, w10);\n o11 = svmla_f32_x(pg, o11, sv_in, w11);\n o12 = svmla_f32_x(pg, o12, sv_in, w12);\n o13 = svmla_f32_x(pg, o13, sv_in, w13);\n o14 = svmla_f32_x(pg, o14, sv_in, w14);\n o15 = svmla_f32_x(pg, o15, sv_in, w15);\n svst1_f32(pg, optr + 0, o0);\n svst1_f32(pg, optr + 8, o1);\n svst1_f32(pg, optr + 16, o2);\n svst1_f32(pg, optr + 24, o3);\n svst1_f32(pg, optr + 32, o4);\n svst1_f32(pg, optr + 40, o5);\n svst1_f32(pg, optr + 48, o6);\n svst1_f32(pg, optr + 56, o7);\n svst1_f32(pg, optr + 64, o8);\n svst1_f32(pg, optr + 72, o9);\n svst1_f32(pg, optr + 80, o10);\n svst1_f32(pg, optr + 88, o11);\n svst1_f32(pg, optr + 96, o12);\n svst1_f32(pg, optr + 104, o13);\n svst1_f32(pg, optr + 112, o14);\n svst1_f32(pg, optr + 120, o15);\n }\n }\n // kw=2\n {\n const float* wptr = w_kh + 2 * Cout;\n svfloat32_t w0 = svld1_f32(pg, wptr + 0);\n svfloat32_t w1 = svld1_f32(pg, wptr + 8);\n svfloat32_t w2 = svld1_f32(pg, wptr + 16);\n svfloat32_t w3 = svld1_f32(pg, wptr + 24);\n svfloat32_t w4 = svld1_f32(pg, wptr + 32);\n svfloat32_t w5 = svld1_f32(pg, wptr + 40);\n svfloat32_t w6 = svld1_f32(pg, wptr + 48);\n svfloat32_t w7 = svld1_f32(pg, wptr + 56);\n svfloat32_t w8 = svld1_f32(pg, wptr + 64);\n svfloat32_t w9 = svld1_f32(pg, wptr + 72);\n svfloat32_t w10 = svld1_f32(pg, wptr + 80);\n svfloat32_t w11 = svld1_f32(pg, wptr + 88);\n svfloat32_t w12 = svld1_f32(pg, wptr + 96);\n svfloat32_t w13 = svld1_f32(pg, wptr + 104);\n svfloat32_t w14 = svld1_f32(pg, wptr + 112);\n svfloat32_t w15 = svld1_f32(pg, wptr + 120);\n \n for (int iw = 0; iw < W; ++iw) {\n svfloat32_t sv_in = svdup_f32(in_row[iw]);\n float* optr = out_row + (iw * Sw + 2) * Cout;\n svfloat32_t o0 = svld1_f32(pg, optr + 0);\n svfloat32_t o1 = svld1_f32(pg, optr + 8);\n svfloat32_t o2 = svld1_f32(pg, optr + 16);\n svfloat32_t o3 = svld1_f32(pg, optr + 24);\n svfloat32_t o4 = svld1_f32(pg, optr + 32);\n svfloat32_t o5 = svld1_f32(pg, optr + 40);\n svfloat32_t o6 = svld1_f32(pg, optr + 48);\n svfloat32_t o7 = svld1_f32(pg, optr + 56);\n svfloat32_t o8 = svld1_f32(pg, optr + 64);\n svfloat32_t o9 = svld1_f32(pg, optr + 72);\n svfloat32_t o10 = svld1_f32(pg, optr + 80);\n svfloat32_t o11 = svld1_f32(pg, optr + 88);\n svfloat32_t o12 = svld1_f32(pg, optr + 96);\n svfloat32_t o13 = svld1_f32(pg, optr + 104);\n svfloat32_t o14 = svld1_f32(pg, optr + 112);\n svfloat32_t o15 = svld1_f32(pg, optr + 120);\n o0 = svmla_f32_x(pg, o0, sv_in, w0);\n o1 = svmla_f32_x(pg, o1, sv_in, w1);\n o2 = svmla_f32_x(pg, o2, sv_in, w2);\n o3 = svmla_f32_x(pg, o3, sv_in, w3);\n o4 = svmla_f32_x(pg, o4, sv_in, w4);\n o5 = svmla_f32_x(pg, o5, sv_in, w5);\n o6 = svmla_f32_x(pg, o6, sv_in, w6);\n o7 = svmla_f32_x(pg, o7, sv_in, w7);\n o8 = svmla_f32_x(pg, o8, sv_in, w8);\n o9 = svmla_f32_x(pg, o9, sv_in, w9);\n o10 = svmla_f32_x(pg, o10, sv_in, w10);\n o11 = svmla_f32_x(pg, o11, sv_in, w11);\n o12 = svmla_f32_x(pg, o12, sv_in, w12);\n o13 = svmla_f32_x(pg, o13, sv_in, w13);\n o14 = svmla_f32_x(pg, o14, sv_in, w14);\n o15 = svmla_f32_x(pg, o15, sv_in, w15);\n svst1_f32(pg, optr + 0, o0);\n svst1_f32(pg, optr + 8, o1);\n svst1_f32(pg, optr + 16, o2);\n svst1_f32(pg, optr + 24, o3);\n svst1_f32(pg, optr + 32, o4);\n svst1_f32(pg, optr + 40, o5);\n svst1_f32(pg, optr + 48, o6);\n svst1_f32(pg, optr + 56, o7);\n svst1_f32(pg, optr + 64, o8);\n svst1_f32(pg, optr + 72, o9);\n svst1_f32(pg, optr + 80, o10);\n svst1_f32(pg, optr + 88, o11);\n svst1_f32(pg, optr + 96, o12);\n svst1_f32(pg, optr + 104, o13);\n svst1_f32(pg, optr + 112, o14);\n svst1_f32(pg, optr + 120, o15);\n }\n }\n // kw=3\n {\n const float* wptr = w_kh + 3 * Cout;\n svfloat32_t w0 = svld1_f32(pg, wptr + 0);\n svfloat32_t w1 = svld1_f32(pg, wptr + 8);\n svfloat32_t w2 = svld1_f32(pg, wptr + 16);\n svfloat32_t w3 = svld1_f32(pg, wptr + 24);\n svfloat32_t w4 = svld1_f32(pg, wptr + 32);\n svfloat32_t w5 = svld1_f32(pg, wptr + 40);\n svfloat32_t w6 = svld1_f32(pg, wptr + 48);\n svfloat32_t w7 = svld1_f32(pg, wptr + 56);\n svfloat32_t w8 = svld1_f32(pg, wptr + 64);\n svfloat32_t w9 = svld1_f32(pg, wptr + 72);\n svfloat32_t w10 = svld1_f32(pg, wptr + 80);\n svfloat32_t w11 = svld1_f32(pg, wptr + 88);\n svfloat32_t w12 = svld1_f32(pg, wptr + 96);\n svfloat32_t w13 = svld1_f32(pg, wptr + 104);\n svfloat32_t w14 = svld1_f32(pg, wptr + 112);\n svfloat32_t w15 = svld1_f32(pg, wptr + 120);\n \n for (int iw = 0; iw < W; ++iw) {\n svfloat32_t sv_in = svdup_f32(in_row[iw]);\n float* optr = out_row + (iw * Sw + 3) * Cout;\n svfloat32_t o0 = svld1_f32(pg, optr + 0);\n svfloat32_t o1 = svld1_f32(pg, optr + 8);\n svfloat32_t o2 = svld1_f32(pg, optr + 16);\n svfloat32_t o3 = svld1_f32(pg, optr + 24);\n svfloat32_t o4 = svld1_f32(pg, optr + 32);\n svfloat32_t o5 = svld1_f32(pg, optr + 40);\n svfloat32_t o6 = svld1_f32(pg, optr + 48);\n svfloat32_t o7 = svld1_f32(pg, optr + 56);\n svfloat32_t o8 = svld1_f32(pg, optr + 64);\n svfloat32_t o9 = svld1_f32(pg, optr + 72);\n svfloat32_t o10 = svld1_f32(pg, optr + 80);\n svfloat32_t o11 = svld1_f32(pg, optr + 88);\n svfloat32_t o12 = svld1_f32(pg, optr + 96);\n svfloat32_t o13 = svld1_f32(pg, optr + 104);\n svfloat32_t o14 = svld1_f32(pg, optr + 112);\n svfloat32_t o15 = svld1_f32(pg, optr + 120);\n o0 = svmla_f32_x(pg, o0, sv_in, w0);\n o1 = svmla_f32_x(pg, o1, sv_in, w1);\n o2 = svmla_f32_x(pg, o2, sv_in, w2);\n o3 = svmla_f32_x(pg, o3, sv_in, w3);\n o4 = svmla_f32_x(pg, o4, sv_in, w4);\n o5 = svmla_f32_x(pg, o5, sv_in, w5);\n o6 = svmla_f32_x(pg, o6, sv_in, w6);\n o7 = svmla_f32_x(pg, o7, sv_in, w7);\n o8 = svmla_f32_x(pg, o8, sv_in, w8);\n o9 = svmla_f32_x(pg, o9, sv_in, w9);\n o10 = svmla_f32_x(pg, o10, sv_in, w10);\n o11 = svmla_f32_x(pg, o11, sv_in, w11);\n o12 = svmla_f32_x(pg, o12, sv_in, w12);\n o13 = svmla_f32_x(pg, o13, sv_in, w13);\n o14 = svmla_f32_x(pg, o14, sv_in, w14);\n o15 = svmla_f32_x(pg, o15, sv_in, w15);\n svst1_f32(pg, optr + 0, o0);\n svst1_f32(pg, optr + 8, o1);\n svst1_f32(pg, optr + 16, o2);\n svst1_f32(pg, optr + 24, o3);\n svst1_f32(pg, optr + 32, o4);\n svst1_f32(pg, optr + 40, o5);\n svst1_f32(pg, optr + 48, o6);\n svst1_f32(pg, optr + 56, o7);\n svst1_f32(pg, optr + 64, o8);\n svst1_f32(pg, optr + 72, o9);\n svst1_f32(pg, optr + 80, o10);\n svst1_f32(pg, optr + 88, o11);\n svst1_f32(pg, optr + 96, o12);\n svst1_f32(pg, optr + 104, o13);\n svst1_f32(pg, optr + 112, o14);\n svst1_f32(pg, optr + 120, o15);\n }\n }\n } // kh\n } // ih\n } // ci\n } // n\n \n // Transpose output from [N, H_out, W_out, Cout] back to [N, Cout, H_out, W_out]\n // Vectorize the transpose using SVE\n for (int n = 0; n < N; ++n) {\n const float* out_tmp_n = out_tmp + (long)n * H_out * W_out * Cout;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i) {\n out_co[i] = out_tmp_n[i * Cout + co];\n }\n }\n }\n \n free(w_trans);\n free(out_tmp);\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json b/solutions/ncnn/claude-sonnet-4-6/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json deleted file mode 100644 index 5e300a5dbd10839a32a5bf5af222a6c2084f2549..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_deconv2d_depthwise_kh2_kw2_sh2_sw2", - "definition": "deconv2d_depthwise_kh2_kw2_sh2_sw2", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d_depthwise.cpp::armbench_entry_deconv2d_depthwise", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d_depthwise specialisation.\nnamespace deconv2d_depthwise_def {\nconstexpr int Kh = 2;\nconstexpr int Kw = 2;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\n// Weight layout: (C, Kh, Kw) — one filter per channel.\nvoid inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d_depthwise.\n// ABI: armbench_entry_deconv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"deconv2d_depthwise.h\"\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "\n#include \"deconv2d_depthwise.h\"\n#include \n#include \n\nusing namespace deconv2d_depthwise_def;\n\n// Kh=2, Kw=2, Sh=2, Sw=2, Dh=1, Dw=1\n// Output: H_out = (H-1)*Sh + Kh = 2H, W_out = 2W (approximately)\n// Weight layout: (C, 2, 2) => w[c][kh][kw]\n// For each input pixel (ih, iw), it contributes to output pixels:\n// oh = ih*2 + kh, ow = iw*2 + kw, for kh,kw in {0,1}\n//\n// Key insight: with Sh=Sw=2, Kh=Kw=2, each output pixel is written by exactly one input pixel.\n// So we can restructure as: for each channel, scatter input to output.\n//\n// Optimization strategy:\n// 1. Process multiple channels at once using SVE\n// 2. For each (ih, iw), load input value, multiply by 4 weights, scatter to output\n// 3. Use SVE to vectorize over the W dimension (iw loop)\n\nextern \"C\" void inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n const long HW = (long)H * W;\n const long H_out_W_out = (long)H_out * W_out;\n\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * HW;\n float* out_n = output + (long)n * C * H_out_W_out;\n\n // Initialize output with bias\n for (int c = 0; c < C; ++c) {\n float* out_c = out_n + (long)c * H_out_W_out;\n float b = bias[c];\n svfloat32_t vb = svdup_f32(b);\n long total = H_out_W_out;\n long i = 0;\n svbool_t pg;\n while (i < total) {\n pg = svwhilelt_b32((uint64_t)i, (uint64_t)total);\n svst1_f32(pg, out_c + i, vb);\n i += svcntw();\n }\n }\n\n // Scatter-accumulate\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * HW;\n float* out_c = out_n + (long)c * H_out_W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n\n // weights: w00, w01, w10, w11\n float w00 = w_c[0], w01 = w_c[1], w10 = w_c[2], w11 = w_c[3];\n svfloat32_t vw00 = svdup_f32(w00);\n svfloat32_t vw01 = svdup_f32(w01);\n svfloat32_t vw10 = svdup_f32(w10);\n svfloat32_t vw11 = svdup_f32(w11);\n\n for (int ih = 0; ih < H; ++ih) {\n const float* in_row = in_c + ih * W;\n // Output rows: oh0 = ih*2, oh1 = ih*2+1\n float* out_row0 = out_c + (long)(ih * 2) * W_out;\n float* out_row1 = out_c + (long)(ih * 2 + 1) * W_out;\n\n // For each iw, output at:\n // out_row0[iw*2] += in_val * w00\n // out_row0[iw*2+1] += in_val * w01\n // out_row1[iw*2] += in_val * w10\n // out_row1[iw*2+1] += in_val * w11\n //\n // Since Sw=2, output columns are at iw*2 and iw*2+1\n // We can process iw in chunks using SVE\n // Load W input values, then interleave to produce 2W output values\n\n // Process iw in SVE vector chunks\n int iw = 0;\n long vl = svcntw();\n\n while (iw + (int)vl <= W) {\n svbool_t pg = svptrue_b32();\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n\n // For row0: output at iw*2 and iw*2+1 (interleaved)\n // We need to store: [v0*w00, v0*w01, v1*w00, v1*w01, ...]\n // This is a zip/interleave pattern\n\n // Compute products\n svfloat32_t prod00 = svmul_f32_x(pg, vin, vw00);\n svfloat32_t prod01 = svmul_f32_x(pg, vin, vw01);\n svfloat32_t prod10 = svmul_f32_x(pg, vin, vw10);\n svfloat32_t prod11 = svmul_f32_x(pg, vin, vw11);\n\n // Interleave prod00 and prod01 -> row0 output\n // zip1: [p00[0], p01[0], p00[1], p01[1], ...]\n svfloat32_t zip0_lo = svzip1_f32(prod00, prod01);\n svfloat32_t zip0_hi = svzip2_f32(prod00, prod01);\n\n // Load existing output and add\n svfloat32_t out0_lo = svld1_f32(pg, out_row0 + iw*2);\n svfloat32_t out0_hi = svld1_f32(pg, out_row0 + iw*2 + vl);\n out0_lo = svadd_f32_x(pg, out0_lo, zip0_lo);\n out0_hi = svadd_f32_x(pg, out0_hi, zip0_hi);\n svst1_f32(pg, out_row0 + iw*2, out0_lo);\n svst1_f32(pg, out_row0 + iw*2 + vl, out0_hi);\n\n // Interleave prod10 and prod11 -> row1 output\n svfloat32_t zip1_lo = svzip1_f32(prod10, prod11);\n svfloat32_t zip1_hi = svzip2_f32(prod10, prod11);\n\n svfloat32_t out1_lo = svld1_f32(pg, out_row1 + iw*2);\n svfloat32_t out1_hi = svld1_f32(pg, out_row1 + iw*2 + vl);\n out1_lo = svadd_f32_x(pg, out1_lo, zip1_lo);\n out1_hi = svadd_f32_x(pg, out1_hi, zip1_hi);\n svst1_f32(pg, out_row1 + iw*2, out1_lo);\n svst1_f32(pg, out_row1 + iw*2 + vl, out1_hi);\n\n iw += vl;\n }\n\n // Tail\n if (iw < W) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n\n svfloat32_t prod00 = svmul_f32_x(pg, vin, vw00);\n svfloat32_t prod01 = svmul_f32_x(pg, vin, vw01);\n svfloat32_t prod10 = svmul_f32_x(pg, vin, vw10);\n svfloat32_t prod11 = svmul_f32_x(pg, vin, vw11);\n\n // For tail, fall back to scalar\n // Extract and process individually\n while (iw < W) {\n float in_val = in_row[iw];\n out_row0[iw*2] += in_val * w00;\n out_row0[iw*2+1] += in_val * w01;\n out_row1[iw*2] += in_val * w10;\n out_row1[iw*2+1] += in_val * w11;\n iw++;\n }\n (void)prod00; (void)prod01; (void)prod10; (void)prod11;\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/claude-sonnet-4-6/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json b/solutions/ncnn/claude-sonnet-4-6/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json deleted file mode 100644 index 00fabbadc7eb137d6a518665281bbf97ddd95124..0000000000000000000000000000000000000000 --- a/solutions/ncnn/claude-sonnet-4-6/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json +++ /dev/null @@ -1,38 +0,0 @@ -{ - "name": "claude-sonnet-4-6_deconv2d_depthwise_kh3_kw3_sh1_sw1", - "definition": "deconv2d_depthwise_kh3_kw3_sh1_sw1", - "dataset": "ncnn", - "author": "claude-sonnet-4-6", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d_depthwise.cpp::armbench_entry_deconv2d_depthwise", - "dependencies": [], - "isa_features": [ - "sve" - ], - "compile_flags": [ - "-O3", - "-march=armv8.2-a+sve", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d_depthwise specialisation.\nnamespace deconv2d_depthwise_def {\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\n// Weight layout: (C, Kh, Kw) — one filter per channel.\nvoid inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d_depthwise.\n// ABI: armbench_entry_deconv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"deconv2d_depthwise.h\"\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "\n#include \"deconv2d_depthwise.h\"\n#include \n#include \n\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" void inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n const long HW_out = (long)H_out * W_out;\n const long HW_in = (long)H * W;\n\n // Zero-fill + bias initialisation using SVE\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * C * HW_out;\n for (int c = 0; c < C; ++c) {\n float* out_c = out_n + (long)c * HW_out;\n float bval = bias[c];\n svfloat32_t vbias = svdup_f32(bval);\n long i = 0;\n long total = HW_out;\n svbool_t pg;\n while (i < total) {\n pg = svwhilelt_b32((uint64_t)i, (uint64_t)total);\n svst1_f32(pg, out_c + i, vbias);\n i += svcntw();\n }\n }\n }\n\n // Scatter-accumulate: for each input pixel, scatter to 3x3 output region\n // Key insight: with Sh=Sw=1, Kh=Kw=3, each input pixel (ih,iw) contributes to\n // output pixels (ih+kh, iw+kw) for kh,kw in [0,2].\n // We process multiple input pixels (along W) simultaneously using SVE.\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * HW_in;\n float* out_n = output + (long)n * C * HW_out;\n\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * HW_in;\n float* out_c = out_n + (long)c * HW_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n\n // Preload all 9 weights\n float w00 = w_c[0], w01 = w_c[1], w02 = w_c[2];\n float w10 = w_c[3], w11 = w_c[4], w12 = w_c[5];\n float w20 = w_c[6], w21 = w_c[7], w22 = w_c[8];\n\n svfloat32_t vw00 = svdup_f32(w00), vw01 = svdup_f32(w01), vw02 = svdup_f32(w02);\n svfloat32_t vw10 = svdup_f32(w10), vw11 = svdup_f32(w11), vw12 = svdup_f32(w12);\n svfloat32_t vw20 = svdup_f32(w20), vw21 = svdup_f32(w21), vw22 = svdup_f32(w22);\n\n for (int ih = 0; ih < H; ++ih) {\n const float* in_row = in_c + ih * W;\n // For each kh, the output row is ih + kh\n float* out_row0 = out_c + (ih + 0) * W_out;\n float* out_row1 = out_c + (ih + 1) * W_out;\n float* out_row2 = out_c + (ih + 2) * W_out;\n\n // Process iw in chunks using SVE\n // For a vector of iw values, we load in_val[iw] and update\n // out[oh][iw+kw] for kw=0,1,2\n // Since kw offsets are 0,1,2 (contiguous), we can do:\n // out_row[iw+0] += in_val * w_k0\n // out_row[iw+1] += in_val * w_k1\n // out_row[iw+2] += in_val * w_k2\n // These are overlapping stores, so we need to be careful.\n // We process sequentially to avoid conflicts.\n\n long vl = svcntw();\n long iw = 0;\n\n // Process in chunks of vl, but since stores overlap (iw+1 of chunk i\n // overlaps iw of chunk i+1), we need to handle carefully.\n // Actually with stride=1, consecutive iw values write to consecutive\n // output positions with overlap. Let's just do scalar for now and\n // use SVE for the load + multiply but scalar stores.\n // Better: process each kh/kw row separately as a convolution.\n\n // For kh=0: out_row0[iw..iw+W-1+2] += in_row[iw] * w0k\n // This is equivalent to: for each output position ow in [0, W+1],\n // out_row0[ow] += sum over iw where iw <= ow <= iw+2 of in_row[iw]*w0[ow-iw]\n // But we're doing scatter from input, not gather to output.\n\n // Let's do it row by row for each kh, vectorizing over iw:\n // For fixed kh, kw=0: out_row_kh[iw+0] += in_row[iw] * w_kh0 (for all iw)\n // For fixed kh, kw=1: out_row_kh[iw+1] += in_row[iw] * w_kh1 (for all iw)\n // For fixed kh, kw=2: out_row_kh[iw+2] += in_row[iw] * w_kh2 (for all iw)\n // Each of these is a simple vector fmadd with stride-1 load/store,\n // but the stores for kw=0,1,2 are offset by 1 from each other.\n // No overlap within a single kw pass (each iw writes to a unique ow=iw+kw).\n // So we can vectorize each kw pass independently!\n\n // kh=0, kw=0: out_row0[iw] += in_row[iw] * w00\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row0 + iw);\n vout = svmla_f32_m(pg, vout, vin, vw00);\n svst1_f32(pg, out_row0 + iw, vout);\n iw += vl;\n }\n // kh=0, kw=1: out_row0[iw+1] += in_row[iw] * w01\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row0 + iw + 1);\n vout = svmla_f32_m(pg, vout, vin, vw01);\n svst1_f32(pg, out_row0 + iw + 1, vout);\n iw += vl;\n }\n // kh=0, kw=2: out_row0[iw+2] += in_row[iw] * w02\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row0 + iw + 2);\n vout = svmla_f32_m(pg, vout, vin, vw02);\n svst1_f32(pg, out_row0 + iw + 2, vout);\n iw += vl;\n }\n\n // kh=1, kw=0\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row1 + iw);\n vout = svmla_f32_m(pg, vout, vin, vw10);\n svst1_f32(pg, out_row1 + iw, vout);\n iw += vl;\n }\n // kh=1, kw=1\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row1 + iw + 1);\n vout = svmla_f32_m(pg, vout, vin, vw11);\n svst1_f32(pg, out_row1 + iw + 1, vout);\n iw += vl;\n }\n // kh=1, kw=2\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row1 + iw + 2);\n vout = svmla_f32_m(pg, vout, vin, vw12);\n svst1_f32(pg, out_row1 + iw + 2, vout);\n iw += vl;\n }\n\n // kh=2, kw=0\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row2 + iw);\n vout = svmla_f32_m(pg, vout, vin, vw20);\n svst1_f32(pg, out_row2 + iw, vout);\n iw += vl;\n }\n // kh=2, kw=1\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row2 + iw + 1);\n vout = svmla_f32_m(pg, vout, vin, vw21);\n svst1_f32(pg, out_row2 + iw + 1, vout);\n iw += vl;\n }\n // kh=2, kw=2\n for (iw = 0; iw < W; ) {\n svbool_t pg = svwhilelt_b32((uint64_t)iw, (uint64_t)W);\n svfloat32_t vin = svld1_f32(pg, in_row + iw);\n svfloat32_t vout = svld1_f32(pg, out_row2 + iw + 2);\n vout = svmla_f32_m(pg, vout, vin, vw22);\n svst1_f32(pg, out_row2 + iw + 2, vout);\n iw += vl;\n }\n }\n }\n }\n}\n" - } - ] -} \ No newline at end of file diff --git a/solutions/ncnn/reference-scalar/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json b/solutions/ncnn/reference-scalar/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json deleted file mode 100644 index de33cfa19c0d35ed02941b75c330e2713762e10d..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv1d_kw1_sw1_dw1_cout512_p0", - "definition": "conv1d_kw1_sw1_dw1_cout512_p0", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv1d for conv1d_kw1_sw1_dw1_cout512_p0. Constexpr-baked dims; armbench_entry_conv1d calls inner_conv1d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv1d.cpp::armbench_entry_conv1d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv1d.h", - "content": "#pragma once\n\n// Per-definition constants for this conv1d specialisation.\nnamespace conv1d_def {\nconstexpr int Cout = 512;\nconstexpr int Kw = 1;\nconstexpr int Sw = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 0;\n} // namespace conv1d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// C_in, W, W_out are var dims; W_out is pre-computed by the binding harness.\n// Input layout: (C_in, W), output layout: (Cout, W_out).\nvoid inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv1d.cpp", - "content": "// Binding harness: computes W_out from constexpr params, calls inner_conv1d.\n// ABI: armbench_entry_conv1d(input*, output*, weight*, bias*, C_in, W)\n// Input layout: (C_in, W); output layout: (Cout, W_out).\n#include \"conv1d.h\"\nusing namespace conv1d_def;\n\nextern \"C\" int armbench_entry_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W)\n{\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv1d(input, output, weight, bias, C_in, W, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv1d.\n// LLM target: replace this file with an optimised inner_conv1d.\n// All per-definition constants live in conv1d_def:: (conv1d.h).\n#include \"conv1d.h\"\nusing namespace conv1d_def;\n\nextern \"C\" void inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out)\n{\n for (int oc = 0; oc < Cout; ++oc) {\n float* out_c = output + (long)oc * W_out;\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = bias[oc];\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_c = input + (long)ic * W;\n for (int kw = 0; kw < Kw; ++kw) {\n int iw = ow * Sw - pad + kw * Dw;\n if (iw >= 0 && iw < W)\n sum += in_c[iw] * weight[((long)oc * C_in + ic) * Kw + kw];\n }\n }\n out_c[ow] = sum;\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json b/solutions/ncnn/reference-scalar/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json deleted file mode 100644 index aa6fa137d4cb98d0345dc9bb89f6811de3dc844f..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv1d/conv1d_kw3_sw1_dw1_cout512_p1.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv1d_kw3_sw1_dw1_cout512_p1", - "definition": "conv1d_kw3_sw1_dw1_cout512_p1", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv1d for conv1d_kw3_sw1_dw1_cout512_p1. Constexpr-baked dims; armbench_entry_conv1d calls inner_conv1d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv1d.cpp::armbench_entry_conv1d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv1d.h", - "content": "#pragma once\n\n// Per-definition constants for this conv1d specialisation.\nnamespace conv1d_def {\nconstexpr int Cout = 512;\nconstexpr int Kw = 3;\nconstexpr int Sw = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 1;\n} // namespace conv1d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// C_in, W, W_out are var dims; W_out is pre-computed by the binding harness.\n// Input layout: (C_in, W), output layout: (Cout, W_out).\nvoid inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv1d.cpp", - "content": "// Binding harness: computes W_out from constexpr params, calls inner_conv1d.\n// ABI: armbench_entry_conv1d(input*, output*, weight*, bias*, C_in, W)\n// Input layout: (C_in, W); output layout: (Cout, W_out).\n#include \"conv1d.h\"\nusing namespace conv1d_def;\n\nextern \"C\" int armbench_entry_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W)\n{\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv1d(input, output, weight, bias, C_in, W, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv1d.\n// LLM target: replace this file with an optimised inner_conv1d.\n// All per-definition constants live in conv1d_def:: (conv1d.h).\n#include \"conv1d.h\"\nusing namespace conv1d_def;\n\nextern \"C\" void inner_conv1d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int C_in, int W, int W_out)\n{\n for (int oc = 0; oc < Cout; ++oc) {\n float* out_c = output + (long)oc * W_out;\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = bias[oc];\n for (int ic = 0; ic < C_in; ++ic) {\n const float* in_c = input + (long)ic * W;\n for (int kw = 0; kw < Kw; ++kw) {\n int iw = ow * Sw - pad + kw * Dw;\n if (iw >= 0 && iw < W)\n sum += in_c[iw] * weight[((long)oc * C_in + ic) * Kw + kw];\n }\n }\n out_c[ow] = sum;\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json b/solutions/ncnn/reference-scalar/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json deleted file mode 100644 index 1293f60bbcf4b9388c174bc743a90c7997bef677..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "definition": "conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d for conv2d_kh1_kw1_sh1_sw1_dh1_dw1_cout256. Constexpr-baked dims; armbench_entry_conv2d calls inner_conv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py \u2014 do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 1;\nconstexpr int Kw = 1;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 0;\nconstexpr int pad_left = 0;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv2d \u2014 port of ref_conv.h::ref_conv2d.\n// LLM target: replace this file with an optimised inner_conv2d.\n// All per-definition constants live in conv2d_def:: (conv2d.h).\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int oc = 0; oc < Cout; ++oc) {\n float* outc = out_n + (long)oc * H_out * W_out;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = 0.0f;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad_top + kh * Dh;\n int iw = ow * Sw - pad_left + kw * Dw;\n float px = (ih >= 0 && ih < H && iw >= 0 && iw < W)\n ? inc[ih * W + iw] : 0.0f;\n int widx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n sum += px * weight[widx];\n }\n }\n }\n if (activation_type == 1 && sum < 0.0f) sum = 0.0f;\n outc[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json b/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json deleted file mode 100644 index 7bef927757adaf52201adcad1b4d4a08c8fe976f..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "definition": "conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d for conv2d_kh3_kw3_sh1_sw1_dh1_dw1_cout128. Constexpr-baked dims; armbench_entry_conv2d calls inner_conv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py \u2014 do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv2d \u2014 port of ref_conv.h::ref_conv2d.\n// LLM target: replace this file with an optimised inner_conv2d.\n// All per-definition constants live in conv2d_def:: (conv2d.h).\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int oc = 0; oc < Cout; ++oc) {\n float* outc = out_n + (long)oc * H_out * W_out;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = 0.0f;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad_top + kh * Dh;\n int iw = ow * Sw - pad_left + kw * Dw;\n float px = (ih >= 0 && ih < H && iw >= 0 && iw < W)\n ? inc[ih * W + iw] : 0.0f;\n int widx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n sum += px * weight[widx];\n }\n }\n }\n if (activation_type == 1 && sum < 0.0f) sum = 0.0f;\n outc[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json b/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json deleted file mode 100644 index c55139a807ee705270a5eb9969f258887fc4b199..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "definition": "conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d for conv2d_kh3_kw3_sh1_sw1_dh2_dw2_cout256. Constexpr-baked dims; armbench_entry_conv2d calls inner_conv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py \u2014 do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 2;\nconstexpr int Dw = 2;\nconstexpr int pad_top = 2;\nconstexpr int pad_left = 2;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv2d \u2014 port of ref_conv.h::ref_conv2d.\n// LLM target: replace this file with an optimised inner_conv2d.\n// All per-definition constants live in conv2d_def:: (conv2d.h).\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int oc = 0; oc < Cout; ++oc) {\n float* outc = out_n + (long)oc * H_out * W_out;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = 0.0f;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad_top + kh * Dh;\n int iw = ow * Sw - pad_left + kw * Dw;\n float px = (ih >= 0 && ih < H && iw >= 0 && iw < W)\n ? inc[ih * W + iw] : 0.0f;\n int widx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n sum += px * weight[widx];\n }\n }\n }\n if (activation_type == 1 && sum < 0.0f) sum = 0.0f;\n outc[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json b/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json deleted file mode 100644 index ece078dce170caf83a8f704c8127b517029b1dd0..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "definition": "conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d for conv2d_kh3_kw3_sh2_sw2_dh1_dw1_cout128. Constexpr-baked dims; armbench_entry_conv2d calls inner_conv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py \u2014 do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 1;\nconstexpr int pad_left = 1;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv2d \u2014 port of ref_conv.h::ref_conv2d.\n// LLM target: replace this file with an optimised inner_conv2d.\n// All per-definition constants live in conv2d_def:: (conv2d.h).\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int oc = 0; oc < Cout; ++oc) {\n float* outc = out_n + (long)oc * H_out * W_out;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = 0.0f;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad_top + kh * Dh;\n int iw = ow * Sw - pad_left + kw * Dw;\n float px = (ih >= 0 && ih < H && iw >= 0 && iw < W)\n ? inc[ih * W + iw] : 0.0f;\n int widx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n sum += px * weight[widx];\n }\n }\n }\n if (activation_type == 1 && sum < 0.0f) sum = 0.0f;\n outc[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json b/solutions/ncnn/reference-scalar/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json deleted file mode 100644 index 9122b8e69d60950dfccebb81bb318854eebdaa19..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "definition": "conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d for conv2d_kh5_kw5_sh1_sw1_dh1_dw1_cout64. Constexpr-baked dims; armbench_entry_conv2d calls inner_conv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py \u2014 do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 64;\nconstexpr int Kh = 5;\nconstexpr int Kw = 5;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 2;\nconstexpr int pad_left = 2;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv2d \u2014 port of ref_conv.h::ref_conv2d.\n// LLM target: replace this file with an optimised inner_conv2d.\n// All per-definition constants live in conv2d_def:: (conv2d.h).\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int oc = 0; oc < Cout; ++oc) {\n float* outc = out_n + (long)oc * H_out * W_out;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = 0.0f;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad_top + kh * Dh;\n int iw = ow * Sw - pad_left + kw * Dw;\n float px = (ih >= 0 && ih < H && iw >= 0 && iw < W)\n ? inc[ih * W + iw] : 0.0f;\n int widx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n sum += px * weight[widx];\n }\n }\n }\n if (activation_type == 1 && sum < 0.0f) sum = 0.0f;\n outc[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json b/solutions/ncnn/reference-scalar/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json deleted file mode 100644 index 0ee5bcbb656b19ad8dd5de380d1a19c0459c4eac..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d/conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "definition": "conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d for conv2d_kh7_kw7_sh2_sw2_dh1_dw1_cout64. Constexpr-baked dims; armbench_entry_conv2d calls inner_conv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d.cpp::armbench_entry_conv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d.h", - "content": "// Auto-generated by scripts/gen_candidate_solution.py \u2014 do not hand-edit.\n#pragma once\n\n// Per-definition constants for this conv2d specialisation.\nnamespace conv2d_def {\nconstexpr int Cout = 64;\nconstexpr int Kh = 7;\nconstexpr int Kw = 7;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad_top = 3;\nconstexpr int pad_left = 3;\nconstexpr int activation_type = 0;\n} // namespace conv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\nvoid inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d.cpp", - "content": "// Binding harness: computes output dims from constexpr params, calls inner_conv2d.\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" int armbench_entry_conv2d(\n const float* input, float* output,\n const float* weight,\n int N, int C_in, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad_top - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad_left - ext_kw) / Sw + 1;\n inner_conv2d(input, output, weight, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar conv2d \u2014 port of ref_conv.h::ref_conv2d.\n// LLM target: replace this file with an optimised inner_conv2d.\n// All per-definition constants live in conv2d_def:: (conv2d.h).\n#include \"conv2d.h\"\nusing namespace conv2d_def;\n\nextern \"C\" void inner_conv2d(\n const float* input, float* output, const float* weight,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int oc = 0; oc < Cout; ++oc) {\n float* outc = out_n + (long)oc * H_out * W_out;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = 0.0f;\n for (int ic = 0; ic < C_in; ++ic) {\n const float* inc = in_n + (long)ic * H * W;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad_top + kh * Dh;\n int iw = ow * Sw - pad_left + kw * Dw;\n float px = (ih >= 0 && ih < H && iw >= 0 && iw < W)\n ? inc[ih * W + iw] : 0.0f;\n int widx = ((oc * C_in + ic) * Kh + kh) * Kw + kw;\n sum += px * weight[widx];\n }\n }\n }\n if (activation_type == 1 && sum < 0.0f) sum = 0.0f;\n outc[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json b/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json deleted file mode 100644 index 0fa4c1c5349f5437bce30af9ff77762ecb1cf09b..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "definition": "conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d_depthwise for conv2d_depthwise_kh3_kw3_sh1_sw1_dh1_dw1_p1. Constexpr-baked dims; armbench_entry_conv2d_depthwise calls inner_conv2d_depthwise. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d_depthwise.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this conv2d_depthwise specialisation.\nnamespace conv2d_depthwise_def {\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 1;\n} // namespace conv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\nvoid inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_conv2d_depthwise.\n// ABI: armbench_entry_conv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar depthwise conv2d.\n// LLM target: replace this file with an optimised inner_conv2d_depthwise.\n// All per-definition constants live in conv2d_depthwise_def:: (conv2d_depthwise.h).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" void inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = bias[c];\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad + kh * Dh;\n int iw = ow * Sw - pad + kw * Dw;\n if (ih >= 0 && ih < H && iw >= 0 && iw < W)\n sum += in_c[ih * W + iw] * w_c[kh * Kw + kw];\n }\n }\n out_c[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json b/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json deleted file mode 100644 index 6ae43c6f8d8c030370b0871ca3734598a23f6a03..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "definition": "conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d_depthwise for conv2d_depthwise_kh3_kw3_sh2_sw2_dh1_dw1_p1. Constexpr-baked dims; armbench_entry_conv2d_depthwise calls inner_conv2d_depthwise. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d_depthwise.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this conv2d_depthwise specialisation.\nnamespace conv2d_depthwise_def {\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 1;\n} // namespace conv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\nvoid inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_conv2d_depthwise.\n// ABI: armbench_entry_conv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar depthwise conv2d.\n// LLM target: replace this file with an optimised inner_conv2d_depthwise.\n// All per-definition constants live in conv2d_depthwise_def:: (conv2d_depthwise.h).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" void inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = bias[c];\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad + kh * Dh;\n int iw = ow * Sw - pad + kw * Dw;\n if (ih >= 0 && ih < H && iw >= 0 && iw < W)\n sum += in_c[ih * W + iw] * w_c[kh * Kw + kw];\n }\n }\n out_c[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json b/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json deleted file mode 100644 index f195267de17ec708c614634f3c888bcc515d26a9..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/conv2d_depthwise/conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "definition": "conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* conv2d_depthwise for conv2d_depthwise_kh5_kw5_sh1_sw1_dh1_dw1_p2. Constexpr-baked dims; armbench_entry_conv2d_depthwise calls inner_conv2d_depthwise. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "conv2d_depthwise.cpp::armbench_entry_conv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "conv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this conv2d_depthwise specialisation.\nnamespace conv2d_depthwise_def {\nconstexpr int Kh = 5;\nconstexpr int Kw = 5;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\nconstexpr int pad = 2;\n} // namespace conv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\nvoid inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "conv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_conv2d_depthwise.\n// ABI: armbench_entry_conv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n constexpr int ext_kh = Dh * (Kh - 1) + 1;\n constexpr int ext_kw = Dw * (Kw - 1) + 1;\n const int H_out = (H + 2 * pad - ext_kh) / Sh + 1;\n const int W_out = (W + 2 * pad - ext_kw) / Sw + 1;\n inner_conv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar depthwise conv2d.\n// LLM target: replace this file with an optimised inner_conv2d_depthwise.\n// All per-definition constants live in conv2d_depthwise_def:: (conv2d_depthwise.h).\n#include \"conv2d_depthwise.h\"\nusing namespace conv2d_depthwise_def;\n\nextern \"C\" void inner_conv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n for (int oh = 0; oh < H_out; ++oh) {\n for (int ow = 0; ow < W_out; ++ow) {\n float sum = bias[c];\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int ih = oh * Sh - pad + kh * Dh;\n int iw = ow * Sw - pad + kw * Dw;\n if (ih >= 0 && ih < H && iw >= 0 && iw < W)\n sum += in_c[ih * W + iw] * w_c[kh * Kw + kw];\n }\n }\n out_c[oh * W_out + ow] = sum;\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json b/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json deleted file mode 100644 index d6aa26e2e39a88f568f02abbe464135d05aaac98..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh3_kw3_sh1_sw1_cout256.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_deconv2d_kh3_kw3_sh1_sw1_cout256", - "definition": "deconv2d_kh3_kw3_sh1_sw1_cout256", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* deconv2d for deconv2d_kh3_kw3_sh1_sw1_cout256. Constexpr-baked dims; armbench_entry_deconv2d calls inner_deconv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar transposed conv2d (deconv2d).\n// LLM target: replace this file with an optimised inner_deconv2d.\n// All per-definition constants live in deconv2d_def:: (deconv2d.h).\n// Weight layout: (Cout, C_in, Kh, Kw); no padding applied.\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n // Zero-fill + bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i)\n out_co[i] = bias[co];\n }\n }\n\n // Scatter-accumulate from each input element\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_ci = in_n + (long)ci * H * W;\n for (int ih = 0; ih < H; ++ih) {\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_ci[ih * W + iw];\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n const float* w_co_ci = weight +\n ((long)co * C_in + ci) * Kh * Kw;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int oh = ih * Sh + kh;\n int ow = iw * Sw + kw;\n out_co[oh * W_out + ow] +=\n in_val * w_co_ci[kh * Kw + kw];\n }\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json b/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json deleted file mode 100644 index 4e9c6d1ec68d99c06568efffb0fa295f71a43d40..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh3_kw3_sh2_sw2_cout256.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_deconv2d_kh3_kw3_sh2_sw2_cout256", - "definition": "deconv2d_kh3_kw3_sh2_sw2_cout256", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* deconv2d for deconv2d_kh3_kw3_sh2_sw2_cout256. Constexpr-baked dims; armbench_entry_deconv2d calls inner_deconv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 256;\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar transposed conv2d (deconv2d).\n// LLM target: replace this file with an optimised inner_deconv2d.\n// All per-definition constants live in deconv2d_def:: (deconv2d.h).\n// Weight layout: (Cout, C_in, Kh, Kw); no padding applied.\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n // Zero-fill + bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i)\n out_co[i] = bias[co];\n }\n }\n\n // Scatter-accumulate from each input element\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_ci = in_n + (long)ci * H * W;\n for (int ih = 0; ih < H; ++ih) {\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_ci[ih * W + iw];\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n const float* w_co_ci = weight +\n ((long)co * C_in + ci) * Kh * Kw;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int oh = ih * Sh + kh;\n int ow = iw * Sw + kw;\n out_co[oh * W_out + ow] +=\n in_val * w_co_ci[kh * Kw + kw];\n }\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json b/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json deleted file mode 100644 index 1f5b8424ca36326e86aeed5aa4e9d43341c5c6c7..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh4_kw4_sh1_sw1_cout128.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_deconv2d_kh4_kw4_sh1_sw1_cout128", - "definition": "deconv2d_kh4_kw4_sh1_sw1_cout128", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* deconv2d for deconv2d_kh4_kw4_sh1_sw1_cout128. Constexpr-baked dims; armbench_entry_deconv2d calls inner_deconv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 4;\nconstexpr int Kw = 4;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar transposed conv2d (deconv2d).\n// LLM target: replace this file with an optimised inner_deconv2d.\n// All per-definition constants live in deconv2d_def:: (deconv2d.h).\n// Weight layout: (Cout, C_in, Kh, Kw); no padding applied.\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n // Zero-fill + bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i)\n out_co[i] = bias[co];\n }\n }\n\n // Scatter-accumulate from each input element\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_ci = in_n + (long)ci * H * W;\n for (int ih = 0; ih < H; ++ih) {\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_ci[ih * W + iw];\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n const float* w_co_ci = weight +\n ((long)co * C_in + ci) * Kh * Kw;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int oh = ih * Sh + kh;\n int ow = iw * Sw + kw;\n out_co[oh * W_out + ow] +=\n in_val * w_co_ci[kh * Kw + kw];\n }\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json b/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json deleted file mode 100644 index 4c77933a6f7d1efcb5c3eb2d99b69d636044668b..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/deconv2d/deconv2d_kh4_kw4_sh2_sw2_cout128.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_deconv2d_kh4_kw4_sh2_sw2_cout128", - "definition": "deconv2d_kh4_kw4_sh2_sw2_cout128", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* deconv2d for deconv2d_kh4_kw4_sh2_sw2_cout128. Constexpr-baked dims; armbench_entry_deconv2d calls inner_deconv2d. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d.cpp::armbench_entry_deconv2d", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d specialisation.\nnamespace deconv2d_def {\nconstexpr int Cout = 128;\nconstexpr int Kh = 4;\nconstexpr int Kw = 4;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C_in, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C_in, H, W), output layout: (N, Cout, H_out, W_out).\n// Weight layout: (Cout, C_in, Kh, Kw).\nvoid inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d.\n// ABI: armbench_entry_deconv2d(input*, output*, weight*, bias*, N, C_in, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C_in, H, W); output layout: (N, Cout, H_out, W_out).\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" int armbench_entry_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d(input, output, weight, bias, N, C_in, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar transposed conv2d (deconv2d).\n// LLM target: replace this file with an optimised inner_deconv2d.\n// All per-definition constants live in deconv2d_def:: (deconv2d.h).\n// Weight layout: (Cout, C_in, Kh, Kw); no padding applied.\n#include \"deconv2d.h\"\nusing namespace deconv2d_def;\n\nextern \"C\" void inner_deconv2d(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C_in, int H, int W, int H_out, int W_out)\n{\n // Zero-fill + bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i)\n out_co[i] = bias[co];\n }\n }\n\n // Scatter-accumulate from each input element\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C_in * H * W;\n float* out_n = output + (long)n * Cout * H_out * W_out;\n for (int ci = 0; ci < C_in; ++ci) {\n const float* in_ci = in_n + (long)ci * H * W;\n for (int ih = 0; ih < H; ++ih) {\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_ci[ih * W + iw];\n for (int co = 0; co < Cout; ++co) {\n float* out_co = out_n + (long)co * H_out * W_out;\n const float* w_co_ci = weight +\n ((long)co * C_in + ci) * Kh * Kw;\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int oh = ih * Sh + kh;\n int ow = iw * Sw + kw;\n out_co[oh * W_out + ow] +=\n in_val * w_co_ci[kh * Kw + kw];\n }\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json b/solutions/ncnn/reference-scalar/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json deleted file mode 100644 index ce203f7db6bea97f55f037f94812728b7daab496..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/deconv2d_depthwise/deconv2d_depthwise_kh2_kw2_sh2_sw2.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_deconv2d_depthwise_kh2_kw2_sh2_sw2", - "definition": "deconv2d_depthwise_kh2_kw2_sh2_sw2", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* deconv2d_depthwise for deconv2d_depthwise_kh2_kw2_sh2_sw2. Constexpr-baked dims; armbench_entry_deconv2d_depthwise calls inner_deconv2d_depthwise. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d_depthwise.cpp::armbench_entry_deconv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d_depthwise specialisation.\nnamespace deconv2d_depthwise_def {\nconstexpr int Kh = 2;\nconstexpr int Kw = 2;\nconstexpr int Sh = 2;\nconstexpr int Sw = 2;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\n// Weight layout: (C, Kh, Kw) \u2014 one filter per channel.\nvoid inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d_depthwise.\n// ABI: armbench_entry_deconv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"deconv2d_depthwise.h\"\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar depthwise transposed conv2d (deconv2d_depthwise).\n// LLM target: replace this file with an optimised inner_deconv2d_depthwise.\n// All per-definition constants live in deconv2d_depthwise_def:: (deconv2d_depthwise.h).\n// Weight layout: (C, Kh, Kw); no padding applied.\n#include \"deconv2d_depthwise.h\"\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" void inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n // Zero-fill + bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n float* out_c = out_n + (long)c * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i)\n out_c[i] = bias[c];\n }\n }\n\n // Scatter-accumulate from each input element (depthwise: channels independent)\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n for (int ih = 0; ih < H; ++ih) {\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_c[ih * W + iw];\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int oh = ih * Sh + kh;\n int ow = iw * Sw + kw;\n out_c[oh * W_out + ow] += in_val * w_c[kh * Kw + kw];\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/ncnn/reference-scalar/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json b/solutions/ncnn/reference-scalar/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json deleted file mode 100644 index 6f60cc0031c664f4a0a7a392b6ead0328dc47163..0000000000000000000000000000000000000000 --- a/solutions/ncnn/reference-scalar/deconv2d_depthwise/deconv2d_depthwise_kh3_kw3_sh1_sw1.json +++ /dev/null @@ -1,36 +0,0 @@ -{ - "name": "reference-scalar_deconv2d_depthwise_kh3_kw3_sh1_sw1", - "definition": "deconv2d_depthwise_kh3_kw3_sh1_sw1", - "dataset": "ncnn", - "author": "reference-scalar", - "description": "Scalar raw-float* deconv2d_depthwise for deconv2d_depthwise_kh3_kw3_sh1_sw1. Constexpr-baked dims; armbench_entry_deconv2d_depthwise calls inner_deconv2d_depthwise. Ground-truth correctness baseline.", - "spec": { - "language": "cpp", - "target_hardware": [ - "graviton3", - "aarch64-sve" - ], - "entry_point": "deconv2d_depthwise.cpp::armbench_entry_deconv2d_depthwise", - "dependencies": [], - "isa_features": [], - "compile_flags": [ - "-O2", - "-std=c++14" - ], - "link_flags": [] - }, - "sources": [ - { - "path": "deconv2d_depthwise.h", - "content": "#pragma once\n\n// Per-definition constants for this deconv2d_depthwise specialisation.\nnamespace deconv2d_depthwise_def {\nconstexpr int Kh = 3;\nconstexpr int Kw = 3;\nconstexpr int Sh = 1;\nconstexpr int Sw = 1;\nconstexpr int Dh = 1;\nconstexpr int Dw = 1;\n} // namespace deconv2d_depthwise_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// N, C, H, W are var dims; H_out/W_out are pre-computed by the binding harness.\n// Input layout: (N, C, H, W), output layout: (N, C, H_out, W_out).\n// Weight layout: (C, Kh, Kw) \u2014 one filter per channel.\nvoid inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out);\n#ifdef __cplusplus\n}\n#endif\n" - }, - { - "path": "deconv2d_depthwise.cpp", - "content": "// Binding harness: computes H_out/W_out from constexpr params, calls inner_deconv2d_depthwise.\n// ABI: armbench_entry_deconv2d_depthwise(input*, output*, weight*, bias*, N, C, H, W)\n// H_out = (H - 1) * Sh + Kh (no-padding formula)\n// Input layout: (N, C, H, W); output layout: (N, C, H_out, W_out).\n#include \"deconv2d_depthwise.h\"\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" int armbench_entry_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W)\n{\n const int H_out = (H - 1) * Sh + Kh;\n const int W_out = (W - 1) * Sw + Kw;\n inner_deconv2d_depthwise(input, output, weight, bias, N, C, H, W, H_out, W_out);\n return 0;\n}\n" - }, - { - "path": "kernel.cpp", - "content": "// Reference-scalar depthwise transposed conv2d (deconv2d_depthwise).\n// LLM target: replace this file with an optimised inner_deconv2d_depthwise.\n// All per-definition constants live in deconv2d_depthwise_def:: (deconv2d_depthwise.h).\n// Weight layout: (C, Kh, Kw); no padding applied.\n#include \"deconv2d_depthwise.h\"\nusing namespace deconv2d_depthwise_def;\n\nextern \"C\" void inner_deconv2d_depthwise(\n const float* input, float* output,\n const float* weight, const float* bias,\n int N, int C, int H, int W, int H_out, int W_out)\n{\n // Zero-fill + bias initialisation\n for (int n = 0; n < N; ++n) {\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n float* out_c = out_n + (long)c * H_out * W_out;\n for (int i = 0; i < H_out * W_out; ++i)\n out_c[i] = bias[c];\n }\n }\n\n // Scatter-accumulate from each input element (depthwise: channels independent)\n for (int n = 0; n < N; ++n) {\n const float* in_n = input + (long)n * C * H * W;\n float* out_n = output + (long)n * C * H_out * W_out;\n for (int c = 0; c < C; ++c) {\n const float* in_c = in_n + (long)c * H * W;\n float* out_c = out_n + (long)c * H_out * W_out;\n const float* w_c = weight + (long)c * Kh * Kw;\n for (int ih = 0; ih < H; ++ih) {\n for (int iw = 0; iw < W; ++iw) {\n float in_val = in_c[ih * W + iw];\n for (int kh = 0; kh < Kh; ++kh) {\n for (int kw = 0; kw < Kw; ++kw) {\n int oh = ih * Sh + kh;\n int ow = iw * Sw + kw;\n out_c[oh * W_out + ow] += in_val * w_c[kh * Kw + kw];\n }\n }\n }\n }\n }\n }\n}\n" - } - ] -} diff --git a/solutions/simd-loop/reference-scalar/loop_001/reference-scalar_loop_001.json b/solutions/simd-loop/autovec/loop_001/autovec_loop_001.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_001/reference-scalar_loop_001.json rename to solutions/simd-loop/autovec/loop_001/autovec_loop_001.json index 990ed4736fa3d054b06c938e7f5ab382e6d692a5..f5ed2c84e68319bbffb1f64c793a9df943dc5d86 100644 --- a/solutions/simd-loop/reference-scalar/loop_001/reference-scalar_loop_001.json +++ b/solutions/simd-loop/autovec/loop_001/autovec_loop_001.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_001", + "name": "autovec_loop_001", "definition": "loop_001", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_001.h\"\n#include \n\nextern \"C\" void inner_loop_001(struct loop_001_data *data) {\n float *a = data->a;\n float *b = data->b;\n int n = data->n;\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += (double)a[i] * (double)b[i];\n }\n data->res = (float)res;\n}\n" } ], - "description": "Scalar reference for loop_001. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_001. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_002/reference-scalar_loop_002.json b/solutions/simd-loop/autovec/loop_002/autovec_loop_002.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_002/reference-scalar_loop_002.json rename to solutions/simd-loop/autovec/loop_002/autovec_loop_002.json index 8e677ce9a27094f8b7429c7fe0ee59daed9d9a20..83d513532384b0921be35aa778c6ab52e5545566 100644 --- a/solutions/simd-loop/reference-scalar/loop_002/reference-scalar_loop_002.json +++ b/solutions/simd-loop/autovec/loop_002/autovec_loop_002.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_002", + "name": "autovec_loop_002", "definition": "loop_002", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_002.h\"\n#include \n\nextern \"C\" void inner_loop_002(struct loop_002_data * input) {\n uint32_t * a = input->a;\n uint32_t * b = input->b;\n int n = input->n;\n\n uint32_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n input->res = res;\n}\n" } ], - "description": "Scalar reference for loop_002. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_002. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_003/reference-scalar_loop_003.json b/solutions/simd-loop/autovec/loop_003/autovec_loop_003.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_003/reference-scalar_loop_003.json rename to solutions/simd-loop/autovec/loop_003/autovec_loop_003.json index 4b69e2c19c7fc87f86119626b00063339a657dc7..9587ba3893afb50dfa626da07e08528dab25f49d 100644 --- a/solutions/simd-loop/reference-scalar/loop_003/reference-scalar_loop_003.json +++ b/solutions/simd-loop/autovec/loop_003/autovec_loop_003.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_003", + "name": "autovec_loop_003", "definition": "loop_003", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_003.h\"\n#include \n\nextern \"C\" void inner_loop_003(struct loop_003_data * data) {\n double * a = data->a;\n double * b = data->b;\n int n = data->n;\n\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n data->res = res;\n}\n" } ], - "description": "Scalar reference for loop_003. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_003. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_004/reference-scalar_loop_004.json b/solutions/simd-loop/autovec/loop_004/autovec_loop_004.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_004/reference-scalar_loop_004.json rename to solutions/simd-loop/autovec/loop_004/autovec_loop_004.json index 40be7ba3465e8e2d02e64565c9856f4ad43153ac..185c695171dd8a2c145502890e3bd5f060bb56c9 100644 --- a/solutions/simd-loop/reference-scalar/loop_004/reference-scalar_loop_004.json +++ b/solutions/simd-loop/autovec/loop_004/autovec_loop_004.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_004", + "name": "autovec_loop_004", "definition": "loop_004", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_004.h\"\n#include \n\nextern \"C\" void inner_loop_004(struct loop_004_data * data) {\n uint64_t *a = data->a;\n uint64_t *b = data->b;\n int n = data->n;\n\n uint64_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n data->res = res;\n}\n" } ], - "description": "Scalar reference for loop_004. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_004. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/autovec/loop_005/autovec_loop_005.json b/solutions/simd-loop/autovec/loop_005/autovec_loop_005.json new file mode 100644 index 0000000000000000000000000000000000000000..a727f7b67bec0889a93e950f6f2bcbb3b90ae8d1 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_005/autovec_loop_005.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_005", + "definition": "loop_005", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_005", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_005.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_005_data {\n uint8_t *p;\n uint8_t *lmt;\n uint32_t checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_005(void *p, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_005.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_005.h\"\n#include \n\nextern \"C\" void inner_loop_005(struct loop_005_data *data);\n\nextern \"C\" int armbench_entry_loop_005(void *p, int64_t n, void *res_out) {\n struct loop_005_data _kd;\n _kd.p = static_cast(p);\n _kd.lmt = static_cast(p) + n;\n _kd.checksum = 0;\n inner_loop_005(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_005.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_005(struct loop_005_data *data) {\n uint8_t *p = data->p; uint8_t *lmt = data->lmt;\n uint32_t res = 0;\n while (p < lmt) {\n uint32_t len = (uint32_t)strlen((const char *)p);\n p += len + 1; res += 1; res ^= (len % 0xffff) << 16;\n }\n data->checksum = res;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_005. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_006/autovec_loop_006.json b/solutions/simd-loop/autovec/loop_006/autovec_loop_006.json new file mode 100644 index 0000000000000000000000000000000000000000..1b2d96efd7ecbd6a32516cce736d348deba29336 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_006/autovec_loop_006.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_006", + "definition": "loop_006", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_006", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_006.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_006_data {\n uint8_t *p;\n uint8_t *lmt;\n uint32_t checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_006(void *p, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_006.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_006.h\"\n#include \n\nextern \"C\" void inner_loop_006(struct loop_006_data *data);\n\nextern \"C\" int armbench_entry_loop_006(void *p, int64_t n, void *res_out) {\n struct loop_006_data _kd;\n _kd.p = static_cast(p);\n _kd.lmt = static_cast(p) + n;\n _kd.checksum = 0;\n inner_loop_006(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_006.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_006(struct loop_006_data *data) {\n uint8_t *p = data->p; uint8_t *lmt = data->lmt;\n uint32_t res = 0;\n while (p < lmt) {\n uint32_t len = (uint32_t)strlen((const char *)p);\n p += len + 1; res += 1; res ^= (len % 0xffff) << 16;\n }\n data->checksum = res;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_006. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference-scalar/loop_008/reference-scalar_loop_008.json b/solutions/simd-loop/autovec/loop_008/autovec_loop_008.json similarity index 88% rename from solutions/simd-loop/reference-scalar/loop_008/reference-scalar_loop_008.json rename to solutions/simd-loop/autovec/loop_008/autovec_loop_008.json index 91cc0938b032d114b0e4b1d2621c3b1ffe41eed8..b73d18b694f2b21bae4f82bce5b7b039a8646221 100644 --- a/solutions/simd-loop/reference-scalar/loop_008/reference-scalar_loop_008.json +++ b/solutions/simd-loop/autovec/loop_008/autovec_loop_008.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_008", + "name": "autovec_loop_008", "definition": "loop_008", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_008.h\"\n#include \n\nextern \"C\" void inner_loop_008(struct loop_008_data * data) {\n double *a = data->a;\n int n = data->n;\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += a[i];\n }\n data->res = res;\n}\n" } ], - "description": "Scalar reference for loop_008. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_008. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_010/reference-scalar_loop_010.json b/solutions/simd-loop/autovec/loop_010/autovec_loop_010.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_010/reference-scalar_loop_010.json rename to solutions/simd-loop/autovec/loop_010/autovec_loop_010.json index 63147189bc4e25ed6ae67dff677ea5ae49bc9ef1..98cc536f647f907fec099635f5b379246ff15ba5 100644 --- a/solutions/simd-loop/reference-scalar/loop_010/reference-scalar_loop_010.json +++ b/solutions/simd-loop/autovec/loop_010/autovec_loop_010.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_010", + "name": "autovec_loop_010", "definition": "loop_010", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_010.h\"\n#include \n\nextern \"C\" void inner_loop_010(struct loop_010_data * data) {\n float *a = data->a;\n uint64_t n = data->n;\n\n bool any = 0;\n bool all = 1;\n\n for (int i = 0; i < n; i++) {\n if (a[i] < 0.0f) {\n any = 1;\n } else {\n all = 0;\n }\n }\n data->res = all ? 1 : any ? 2 : 3;\n}\n" } ], - "description": "Scalar reference for loop_010. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_010. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_024/reference-scalar_loop_024.json b/solutions/simd-loop/autovec/loop_024/autovec_loop_024.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_024/reference-scalar_loop_024.json rename to solutions/simd-loop/autovec/loop_024/autovec_loop_024.json index 5c15ee0170e2e9c397e2d93e3d175af04916623d..c79a44870e46eccc54fcb60b578b4356ebcc088b 100644 --- a/solutions/simd-loop/reference-scalar/loop_024/reference-scalar_loop_024.json +++ b/solutions/simd-loop/autovec/loop_024/autovec_loop_024.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_024", + "name": "autovec_loop_024", "definition": "loop_024", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_024.h\"\n#include \n\nextern \"C\" void inner_loop_024(struct loop_024_data * data) {\n uint8_t * a = data->a;\n uint8_t * b = data->b;\n int64_t n = data->n;\n\n uint32_t sum = 0;\n for (int i = 0; i < n; i++) {\n sum += __builtin_abs(a[i] - b[i]);\n }\n data->res = sum;\n}\n" } ], - "description": "Scalar reference for loop_024. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_024. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_027/reference-scalar_loop_027.json b/solutions/simd-loop/autovec/loop_027/autovec_loop_027.json similarity index 88% rename from solutions/simd-loop/reference-scalar/loop_027/reference-scalar_loop_027.json rename to solutions/simd-loop/autovec/loop_027/autovec_loop_027.json index d30baccc4df6097163b9eb9e3c567b9715b40fa9..bb5f4687b8a46a7cfbd2b03df95759c2db11a439 100644 --- a/solutions/simd-loop/reference-scalar/loop_027/reference-scalar_loop_027.json +++ b/solutions/simd-loop/autovec/loop_027/autovec_loop_027.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_027", + "name": "autovec_loop_027", "definition": "loop_027", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_027.h\"\n#include \n\nextern \"C\" void inner_loop_027(struct loop_027_data * data) {\n float *input = data->input;\n float *output = data->output;\n int64_t size = data->size;\n\n for (int64_t i = 0; i < size; i++) {\n output[i] = __builtin_sqrtf(input[i]);\n }\n}\n" } ], - "description": "Scalar reference for loop_027. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_027. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_028/reference-scalar_loop_028.json b/solutions/simd-loop/autovec/loop_028/autovec_loop_028.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_028/reference-scalar_loop_028.json rename to solutions/simd-loop/autovec/loop_028/autovec_loop_028.json index 62eedb4c9a616169916a488ccca69989a6fe1340..854728a52d6e969cc6e5b0fad464907ec6d0fe65 100644 --- a/solutions/simd-loop/reference-scalar/loop_028/reference-scalar_loop_028.json +++ b/solutions/simd-loop/autovec/loop_028/autovec_loop_028.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_028", + "name": "autovec_loop_028", "definition": "loop_028", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_028.h\"\n#include \n\nextern \"C\" void inner_loop_028(struct loop_028_data * data) {\n double * input1 = data->input1;\n double * input2 = data->input2;\n double * output = data->output;\n int64_t size = data->size;\n\n for (int64_t i = 0; i < size; i++) {\n output[i] = input1[i] / input2[i];\n }\n}\n" } ], - "description": "Scalar reference for loop_028. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_028. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_029/reference-scalar_loop_029.json b/solutions/simd-loop/autovec/loop_029/autovec_loop_029.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_029/reference-scalar_loop_029.json rename to solutions/simd-loop/autovec/loop_029/autovec_loop_029.json index c093cbfc8ed327a251e2aa553dfd6b9ffaeffa01..e714c012957072002e3208ce01cf635b2371337c 100644 --- a/solutions/simd-loop/reference-scalar/loop_029/reference-scalar_loop_029.json +++ b/solutions/simd-loop/autovec/loop_029/autovec_loop_029.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_029", + "name": "autovec_loop_029", "definition": "loop_029", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_029.h\"\n#include \n\nextern \"C\" void inner_loop_029(struct loop_029_data * data) {\n double *input = data->input;\n int64_t *scale = data->scale;\n double *output = data->output;\n int64_t size = data->size;\n\n for (int64_t i = 0; i < size; i++) {\n output[i] = __builtin_scalbn(input[i], (int)scale[i]);\n }\n}\n" } ], - "description": "Scalar reference for loop_029. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_029. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_032/reference-scalar_loop_032.json b/solutions/simd-loop/autovec/loop_032/autovec_loop_032.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_032/reference-scalar_loop_032.json rename to solutions/simd-loop/autovec/loop_032/autovec_loop_032.json index 8064dd77c97017d2026c97902a5c970c8fa8d283..4bc61d14a606ebe199f31063e506312205e7df3b 100644 --- a/solutions/simd-loop/reference-scalar/loop_032/reference-scalar_loop_032.json +++ b/solutions/simd-loop/autovec/loop_032/autovec_loop_032.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_032", + "name": "autovec_loop_032", "definition": "loop_032", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_032.h\"\n#include \n\nextern \"C\" void inner_loop_032(struct loop_032_data * input) {\n double *a = input->a;\n double *b = input->b;\n int n = input->n;\n\n double res = 0.0;\n int lw = 0;\n for (int j = 4; j < n; j = j + 5) {\n res -= a[lw] * b[j];\n lw++;\n }\n input->res = res;\n}\n" } ], - "description": "Scalar reference for loop_032. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_032. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_033/reference-scalar_loop_033.json b/solutions/simd-loop/autovec/loop_033/autovec_loop_033.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_033/reference-scalar_loop_033.json rename to solutions/simd-loop/autovec/loop_033/autovec_loop_033.json index 31ec10307bb6137121db91e5049684c1183bc801..45b5543792833809e468c08b729bc9fedcd80754 100644 --- a/solutions/simd-loop/reference-scalar/loop_033/reference-scalar_loop_033.json +++ b/solutions/simd-loop/autovec/loop_033/autovec_loop_033.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_033", + "name": "autovec_loop_033", "definition": "loop_033", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_033.h\"\n#include \n\nextern \"C\" void inner_loop_033(struct loop_033_data * input) {\n double *a = input->a;\n double *b = input->b;\n int64_t n = input->n;\n\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n input->res = res;\n}\n" } ], - "description": "Scalar reference for loop_033. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_033. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/autovec/loop_034/autovec_loop_034.json b/solutions/simd-loop/autovec/loop_034/autovec_loop_034.json new file mode 100644 index 0000000000000000000000000000000000000000..739021af93ea7ae19fc4efbeb79a663434b6d592 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_034/autovec_loop_034.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_034", + "definition": "loop_034", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_034", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_034.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_034_data {\n uint8_t *a;\n uint8_t *b;\n uint8_t *lmt;\n uint32_t checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_034(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_034.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_034.h\"\n#include \n\nextern \"C\" void inner_loop_034(struct loop_034_data *data);\n\nextern \"C\" int armbench_entry_loop_034(void *a, void *b, int64_t n, void *res_out) {\n struct loop_034_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.lmt = static_cast(a) + n;\n _kd.checksum = 0;\n inner_loop_034(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_034.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_034(struct loop_034_data *data) {\n uint8_t *p1 = data->a; uint8_t *p2 = data->b; uint8_t *lmt = data->lmt;\n uint32_t res = 0, cnt = 0; int length = 13;\n while (p1 < lmt) {\n int64_t r = strcmp((const char *)p1, (const char *)p2);\n uint32_t cmp = 1; if (r > 0) cmp = 2; if (r < 0) cmp = 3;\n res += cnt * cmp; p1 += length; p2 += length; cnt++;\n length = 3 + (length + 11) % 43;\n }\n data->checksum = res;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_034. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference-scalar/loop_035/reference-scalar_loop_035.json b/solutions/simd-loop/autovec/loop_035/autovec_loop_035.json similarity index 88% rename from solutions/simd-loop/reference-scalar/loop_035/reference-scalar_loop_035.json rename to solutions/simd-loop/autovec/loop_035/autovec_loop_035.json index d6c6adbc37385d3b4629877c19812871a614921c..d1b6657a8ee19a1c6efe46b26870b2190cf737ff 100644 --- a/solutions/simd-loop/reference-scalar/loop_035/reference-scalar_loop_035.json +++ b/solutions/simd-loop/autovec/loop_035/autovec_loop_035.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_035", + "name": "autovec_loop_035", "definition": "loop_035", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_035.h\"\n#include \n\nextern \"C\" void inner_loop_035(struct loop_035_data * input) {\n float * a = input->a;\n float * b = input->b;\n float * c = input->c;\n int64_t n = input->n;\n\n for (int64_t i = 0; i < n; i++) {\n c[i] = a[i] + b[i];\n }\n}\n" } ], - "description": "Scalar reference for loop_035. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_035. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/autovec/loop_037/autovec_loop_037.json b/solutions/simd-loop/autovec/loop_037/autovec_loop_037.json new file mode 100644 index 0000000000000000000000000000000000000000..0c5379f4c47c3c66731570ff62917e693d5bafed --- /dev/null +++ b/solutions/simd-loop/autovec/loop_037/autovec_loop_037.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_037", + "definition": "loop_037", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_037", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_037.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { float re; float im; } cfloat32_t;\n\nstruct loop_037_data {\n cfloat32_t *a0;\n cfloat32_t *b0;\n cfloat32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_037(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_037.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_037.h\"\n#include \n\nextern \"C\" void inner_loop_037(struct loop_037_data *data);\n\nextern \"C\" int armbench_entry_loop_037(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_037_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_037(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_037.h\"\n#include \n\nextern \"C\" void inner_loop_037(struct loop_037_data *data) {\n cfloat32_t *a = data->a0; cfloat32_t *b = data->b0; cfloat32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = (a[i].re * b[i].re) - (a[i].im * b[i].im);\n c[i].im = (a[i].re * b[i].im) + (a[i].im * b[i].re);\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_037. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_038/autovec_loop_038.json b/solutions/simd-loop/autovec/loop_038/autovec_loop_038.json new file mode 100644 index 0000000000000000000000000000000000000000..0e22ae838e974b7626ab5a818599e946e0ac20a1 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_038/autovec_loop_038.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_038", + "definition": "loop_038", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_038", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_038.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_038_data {\n _Float16 *a;\n _Float16 *b;\n _Float16 *c;\n int dim;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_038(void *a, void *b, int64_t dim, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_038.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_038.h\"\n#include \n\nextern \"C\" void inner_loop_038(struct loop_038_data *data);\n\nextern \"C\" int armbench_entry_loop_038(void *a, void *b, int64_t dim, void *res_out) {\n struct loop_038_data _kd;\n _kd.a = static_cast<_Float16 *>(a);\n _kd.b = static_cast<_Float16 *>(b);\n _kd.c = static_cast<_Float16 *>(res_out);\n _kd.dim = static_cast(dim);\n inner_loop_038(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_038.h\"\n#include \n\nextern \"C\" void inner_loop_038(struct loop_038_data *data) {\n _Float16 *a = data->a;\n _Float16 *b = data->b;\n _Float16 *c = data->c;\n int dim = data->dim;\n _Float16 k = (_Float16)0.25f;\n for (int row = 0; row < dim - 1; row++) {\n for (int col = 0; col < dim - 1; col++) {\n _Float16 s0 = a[row * dim + col];\n _Float16 s1 = a[row * dim + col + 1];\n _Float16 s2 = a[(row + 1) * dim + col];\n _Float16 s3 = a[(row + 1) * dim + col + 1];\n _Float16 ac = b[row * dim + col];\n c[row * dim + col] = ac + s0 * k + s1 * k + s2 * k + s3 * k;\n }\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_038. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_101/autovec_loop_101.json b/solutions/simd-loop/autovec/loop_101/autovec_loop_101.json new file mode 100644 index 0000000000000000000000000000000000000000..88ed69473a64ba6ecbc1263c66cda37ba6d990c3 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_101/autovec_loop_101.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_101", + "definition": "loop_101", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_101", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_101.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_101_data {\n uint8_t *a;\n uint8_t *b;\n int n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_101(void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_101.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_101.h\"\n#include \n\nextern \"C\" void inner_loop_101(struct loop_101_data *data);\n\nextern \"C\" int armbench_entry_loop_101(void *b, int64_t n, void *res_out) {\n struct loop_101_data _kd;\n _kd.b = static_cast(b);\n _kd.a = static_cast(res_out);\n _kd.n = static_cast(n);\n inner_loop_101(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_101.h\"\n#include \n\nextern \"C\" void inner_loop_101(struct loop_101_data *data) {\n uint8_t *a = data->a;\n uint8_t *b = data->b;\n int n = data->n;\n for (int i = 0; i < n - 1; i++) {\n uint16_t s1 = b[i];\n uint16_t s2 = b[i + 1];\n a[2 * i] = (3 * s1 + s2 + 2) >> 2;\n a[2 * i + 1] = (3 * s2 + s1 + 2) >> 2;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_101. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_102/autovec_loop_102.json b/solutions/simd-loop/autovec/loop_102/autovec_loop_102.json new file mode 100644 index 0000000000000000000000000000000000000000..466de2b29336425c4754325073d76bed20d6b568 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_102/autovec_loop_102.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_102", + "definition": "loop_102", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_102", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_102.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_102_data {\n uint32_t *histogram;\n uint64_t histogram_size;\n uint32_t *records;\n int64_t num_records;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_102(void *records, int64_t histogram_size, int64_t num_records, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_102.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_102.h\"\n#include \n\nextern \"C\" void inner_loop_102(struct loop_102_data *data);\n\nextern \"C\" int armbench_entry_loop_102(void *records, int64_t histogram_size, int64_t num_records, void *res_out) {\n struct loop_102_data _kd;\n _kd.records = static_cast(records);\n _kd.histogram = static_cast(res_out);\n _kd.histogram_size = static_cast(histogram_size);\n _kd.num_records = static_cast(num_records);\n inner_loop_102(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_102.h\"\n#include \n\nextern \"C\" void inner_loop_102(struct loop_102_data *data) {\n uint32_t *histogram = data->histogram;\n uint64_t histogram_size = data->histogram_size;\n uint32_t *records = data->records;\n int64_t num_records = data->num_records;\n for (uint64_t i = 0; i < histogram_size; i++) histogram[i] = 0;\n for (int64_t i = 0; i < num_records; i++) histogram[records[i]] += 1;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_102. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_103/autovec_loop_103.json b/solutions/simd-loop/autovec/loop_103/autovec_loop_103.json new file mode 100644 index 0000000000000000000000000000000000000000..ad1b55e57ccab478d95307579bca09c2165364db --- /dev/null +++ b/solutions/simd-loop/autovec/loop_103/autovec_loop_103.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_103", + "definition": "loop_103", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_103", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_103.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_103_data {\n uint8_t *p;\n uint8_t *end;\n int checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_103(void *p, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_103.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_103.h\"\n#include \n\nextern \"C\" void inner_loop_103(struct loop_103_data *data);\n\nextern \"C\" int armbench_entry_loop_103(void *p, int64_t n, void *res_out) {\n struct loop_103_data _kd;\n _kd.p = static_cast(p);\n _kd.end = static_cast(p) + n;\n _kd.checksum = 0;\n inner_loop_103(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_103.h\"\n#include \n\nstatic uint8_t *skip_ws(uint8_t *p, uint8_t *end) {\n while (p != end && (*p == ' ' || *p == '\\n' || *p == '\\r' || *p == '\\t')) p++;\n return p;\n}\nstatic uint8_t *skip_wd(uint8_t *p, uint8_t *end) {\n while (p != end && *p != ' ' && *p != '\\n' && *p != '\\r' && *p != '\\t') p++;\n return p;\n}\nextern \"C\" void inner_loop_103(struct loop_103_data *data) {\n uint8_t *p = data->p; uint8_t *end = data->end;\n int count = 0;\n p = skip_ws(p, end);\n while (p != end) { count++; p = skip_wd(p, end); p = skip_ws(p, end); }\n data->checksum = count;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_103. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_104/autovec_loop_104.json b/solutions/simd-loop/autovec/loop_104/autovec_loop_104.json new file mode 100644 index 0000000000000000000000000000000000000000..9adfa5c9608f2ec53e0bef3e5c8bd80d77a3d3a8 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_104/autovec_loop_104.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_104", + "definition": "loop_104", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_104", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_104.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_104_data {\n uint32_t *histogram;\n uint64_t histogram_size;\n uint8_t *data;\n int n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_104(void *data, int64_t histogram_size, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_104.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_104.h\"\n#include \n\nextern \"C\" void inner_loop_104(struct loop_104_data *data);\n\nextern \"C\" int armbench_entry_loop_104(void *data, int64_t histogram_size, int64_t n, void *res_out) {\n struct loop_104_data _kd;\n _kd.data = static_cast(data);\n _kd.histogram = static_cast(res_out);\n _kd.histogram_size = static_cast(histogram_size);\n _kd.n = static_cast(n);\n inner_loop_104(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_104.h\"\n#include \n\nextern \"C\" void inner_loop_104(struct loop_104_data *data) {\n uint32_t *histogram = data->histogram;\n uint64_t histogram_size = data->histogram_size;\n uint8_t *d = data->data;\n int n = data->n;\n for (uint64_t i = 0; i < histogram_size; i++) histogram[i] = 0;\n for (int i = 0; i < n; i++) histogram[d[i]] += 1;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_104. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_105/autovec_loop_105.json b/solutions/simd-loop/autovec/loop_105/autovec_loop_105.json new file mode 100644 index 0000000000000000000000000000000000000000..dfb99a825a8672e8bb602c8c7e5d35270a5fc1ba --- /dev/null +++ b/solutions/simd-loop/autovec/loop_105/autovec_loop_105.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_105", + "definition": "loop_105", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_105", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_105.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_105_data {\n float *a;\n float *b;\n int n;\n float res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_105(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_105.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_105.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_105(struct loop_105_data *data);\n\nextern \"C\" int armbench_entry_loop_105(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_105_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0.0f;\n inner_loop_105(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_105.h\"\n\nextern \"C\" void inner_loop_105(struct loop_105_data *data) {\n float *a = data->a;\n int n = data->n;\n double res = 0.0;\n for (int i = 0; i < n; i++) res += (double)a[i];\n data->res = (float)res;\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_105. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_106/autovec_loop_106.json b/solutions/simd-loop/autovec/loop_106/autovec_loop_106.json new file mode 100644 index 0000000000000000000000000000000000000000..69c75cd9e569b65baec07ea6b2889c9fc14a37a9 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_106/autovec_loop_106.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_106", + "definition": "loop_106", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_106", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_106.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_106_data {\n uint32_t *a;\n uint32_t *b;\n uint32_t *perm;\n int64_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_106(void *a, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_106.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_106.h\"\n#include \n\nextern \"C\" void inner_loop_106(struct loop_106_data *data);\n\nextern \"C\" int armbench_entry_loop_106(void *a, int64_t n, void *res_out) {\n struct loop_106_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(res_out);\n _kd.n = static_cast(n);\n inner_loop_106(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_106.h\"\n#include \n\nstatic uint32_t popcount106(uint32_t x) {\n x = (x & 0x55555555u) + ((x >> 1) & 0x55555555u);\n x = (x & 0x33333333u) + ((x >> 2) & 0x33333333u);\n x = (x & 0x0F0F0F0Fu) + ((x >> 4) & 0x0F0F0F0Fu);\n x = (x & 0x00FF00FFu) + ((x >> 8) & 0x00FF00FFu);\n x = (x & 0x0000FFFFu) + ((x >> 16) & 0x0000FFFFu);\n return x;\n}\nstatic uint32_t compress106(uint32_t x, uint32_t m) {\n uint32_t mk, mp, mv, t;\n x = x & m;\n mk = ~m << 1;\n for (int i = 0; i < 5; i++) {\n mp = mk ^ (mk << 1);\n mp = mp ^ (mp << 2);\n mp = mp ^ (mp << 4);\n mp = mp ^ (mp << 8);\n mp = mp ^ (mp << 16);\n mv = mp & m;\n m = (m ^ mv) | (mv >> (1 << i));\n t = x & mv;\n x = (x ^ t) | (t >> (1 << i));\n mk = mk & ~mp;\n }\n return x;\n}\nstatic uint32_t sag106(uint32_t x, uint32_t m) {\n return (compress106(x, m) << popcount106(m)) | compress106(x, ~m);\n}\nstatic uint32_t permute106(uint32_t x, uint32_t p[5]) {\n x = sag106(x, p[0]);\n x = sag106(x, p[1]);\n x = sag106(x, p[2]);\n x = sag106(x, p[3]);\n return sag106(x, p[4]);\n}\nextern \"C\" void inner_loop_106(struct loop_106_data *data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n int64_t n = data->n;\n uint32_t permutation[5] = {0xaaaaaaaau, 0xccccccccu, 0x0f0f0f0fu, 0x0ff00ff0u, 0x0ffff000u};\n uint32_t p[5];\n p[0] = permutation[0];\n p[1] = sag106(permutation[1], permutation[0]);\n p[2] = sag106(permutation[2], permutation[0]);\n p[3] = sag106(permutation[3], permutation[0]);\n p[4] = sag106(permutation[4], permutation[0]);\n for (int64_t i = 0; i < n; i++) b[i] = permute106(a[i], p);\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_106. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference-scalar/loop_108/reference-scalar_loop_108.json b/solutions/simd-loop/autovec/loop_108/autovec_loop_108.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_108/reference-scalar_loop_108.json rename to solutions/simd-loop/autovec/loop_108/autovec_loop_108.json index 2fa98caf43691a12f71115a3c99b1bf24b63f3bc..25b0f00df25df5806469873c1975b27d0534d1d3 100644 --- a/solutions/simd-loop/reference-scalar/loop_108/reference-scalar_loop_108.json +++ b/solutions/simd-loop/autovec/loop_108/autovec_loop_108.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_108", + "name": "autovec_loop_108", "definition": "loop_108", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_108.h\"\n#include \n\nextern \"C\" void inner_loop_108(struct loop_108_data *data) {\n uint32_t *rgba = data->rgba;\n uint8_t *y = data->y;\n int64_t n = data->n;\n for (int64_t i = 0; i < n; i++) {\n y[i] = (rgba[i] >> 24) >> 2;\n y[i] += ((rgba[i] >> 16) & 0xff) >> 1;\n y[i] += ((rgba[i] >> 16) & 0xff) >> 3;\n y[i] += ((rgba[i] >> 8) & 0xff) >> 3;\n }\n}\n" } ], - "description": "Scalar reference for loop_108. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_108. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/autovec/loop_109/autovec_loop_109.json b/solutions/simd-loop/autovec/loop_109/autovec_loop_109.json new file mode 100644 index 0000000000000000000000000000000000000000..ebdbe3340683f27785828092d50b5a6d915ac7b4 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_109/autovec_loop_109.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_109", + "definition": "loop_109", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_109", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_109.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { uint32_t re; uint32_t im; } cuint32_t;\n\nstruct loop_109_data {\n cuint32_t *a0;\n cuint32_t *b0;\n cuint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_109(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_109.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_109.h\"\n#include \n\nextern \"C\" void inner_loop_109(struct loop_109_data *data);\n\nextern \"C\" int armbench_entry_loop_109(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_109_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_109(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_109.h\"\n#include \n\nextern \"C\" void inner_loop_109(struct loop_109_data *data) {\n cuint32_t *a = data->a0; cuint32_t *b = data->b0; cuint32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = a[i].re - b[i].im;\n c[i].im = a[i].im + b[i].re;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_109. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_110/autovec_loop_110.json b/solutions/simd-loop/autovec/loop_110/autovec_loop_110.json new file mode 100644 index 0000000000000000000000000000000000000000..bef369bd5ea84d4f9481520f6efa65d8afc3b896 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_110/autovec_loop_110.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_110", + "definition": "loop_110", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_110", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_110.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { int8_t re; int8_t im; } cint8_t;\ntypedef struct { int32_t re; int32_t im; } cint32_t;\n\nstruct loop_110_data {\n cint8_t *a0;\n cint8_t *b0;\n cint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_110(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_110.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_110.h\"\n#include \n\nextern \"C\" void inner_loop_110(struct loop_110_data *data);\n\nextern \"C\" int armbench_entry_loop_110(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_110_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_110(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_110.h\"\n#include \n\nextern \"C\" void inner_loop_110(struct loop_110_data *data) {\n cint8_t *a = data->a0; cint8_t *b = data->b0; cint32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = (int32_t)(((a[2*i].re * b[2*i].re) - (a[2*i].im * b[2*i].im)) +\n ((a[2*i+1].re * b[2*i+1].re) - (a[2*i+1].im * b[2*i+1].im)));\n c[i].im = (int32_t)(((a[2*i].im * b[2*i].re) + (a[2*i].re * b[2*i].im)) +\n ((a[2*i+1].im * b[2*i+1].re) + (a[2*i+1].re * b[2*i+1].im)));\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_110. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_112/autovec_loop_112.json b/solutions/simd-loop/autovec/loop_112/autovec_loop_112.json new file mode 100644 index 0000000000000000000000000000000000000000..aeb43738646681342f59518ed7a76e20c07b8989 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_112/autovec_loop_112.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_112", + "definition": "loop_112", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_112", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_112.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { uint32_t re; uint32_t im; } cuint32_t;\n\nstruct loop_112_data {\n cuint32_t *a0;\n cuint32_t *b0;\n cuint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_112(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_112.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_112.h\"\n#include \n\nextern \"C\" void inner_loop_112(struct loop_112_data *data);\n\nextern \"C\" int armbench_entry_loop_112(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_112_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_112(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_112.h\"\n#include \n\nextern \"C\" void inner_loop_112(struct loop_112_data *data) {\n cuint32_t *a = data->a0; cuint32_t *b = data->b0; cuint32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = (a[i].re * b[i].re) - (a[i].im * b[i].im);\n c[i].im = (a[i].re * b[i].im) + (a[i].im * b[i].re);\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_112. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference-scalar/loop_113/reference-scalar_loop_113.json b/solutions/simd-loop/autovec/loop_113/autovec_loop_113.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_113/reference-scalar_loop_113.json rename to solutions/simd-loop/autovec/loop_113/autovec_loop_113.json index 62d6471d02c2bf0cb2021ebaea271badd4bf7e80..1d07824439d1ee1b8fde042439882ea5eb1983e8 100644 --- a/solutions/simd-loop/reference-scalar/loop_113/reference-scalar_loop_113.json +++ b/solutions/simd-loop/autovec/loop_113/autovec_loop_113.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_113", + "name": "autovec_loop_113", "definition": "loop_113", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_113.h\"\n#include \n\nextern \"C\" void inner_loop_113(struct loop_113_data * input) {\n uint32_t * a = input->a0;\n uint32_t * b = input->b0;\n uint32_t * c = input->c0;\n uint64_t size = input->size;\n\n uint64_t i;\n\n for (i = 0; i < size; i += 2) {\n c[i] = a[i] + a[i + 1];\n c[i + 1] = b[i] + b[i + 1];\n }\n}\n" } ], - "description": "Scalar reference for loop_113. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_113. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/autovec/loop_114/autovec_loop_114.json b/solutions/simd-loop/autovec/loop_114/autovec_loop_114.json new file mode 100644 index 0000000000000000000000000000000000000000..b4aae58ef37bc7d1703c9c1a1fab0118c2a0e54a --- /dev/null +++ b/solutions/simd-loop/autovec/loop_114/autovec_loop_114.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_114", + "definition": "loop_114", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_114", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_114.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_114_data {\n int16_t *data;\n int16_t *res;\n int32_t n;\n int32_t lags;\n int16_t scale;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_114(void *data, int64_t n, int64_t lags, int64_t scale, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_114.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_114.h\"\n#include \n\nextern \"C\" void inner_loop_114(struct loop_114_data *data);\n\nextern \"C\" int armbench_entry_loop_114(void *data, int64_t n, int64_t lags, int64_t scale, void *res_out) {\n struct loop_114_data _kd;\n _kd.data = static_cast(data);\n _kd.res = static_cast(res_out);\n _kd.n = static_cast(n);\n _kd.lags = static_cast(lags);\n _kd.scale = static_cast(scale);\n inner_loop_114(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_114.h\"\n#include \n\nextern \"C\" void inner_loop_114(struct loop_114_data *data) {\n int16_t *d = data->data;\n int16_t *res = data->res;\n int32_t n = data->n;\n int32_t lags = data->lags;\n int16_t scale = data->scale;\n for (int lag = 0; lag < lags; lag++) {\n int32_t acc = 0;\n int lmt = n - lag;\n for (int i = 0; i < lmt; i++)\n acc += ((int32_t)d[i] * (int32_t)d[i + lag]) >> scale;\n res[lag] = (int16_t)(acc >> 16);\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_114. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference-scalar/loop_120/reference-scalar_loop_120.json b/solutions/simd-loop/autovec/loop_120/autovec_loop_120.json similarity index 87% rename from solutions/simd-loop/reference-scalar/loop_120/reference-scalar_loop_120.json rename to solutions/simd-loop/autovec/loop_120/autovec_loop_120.json index 2a4b91deffd777de6a6f04e75c0badf6bb5e8da8..f68d1f2c85d32595064b55dc9e345d55cf956c18 100644 --- a/solutions/simd-loop/reference-scalar/loop_120/reference-scalar_loop_120.json +++ b/solutions/simd-loop/autovec/loop_120/autovec_loop_120.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_120", + "name": "autovec_loop_120", "definition": "loop_120", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_120.h\"\n#include \n\nextern \"C\" void inner_loop_120(struct loop_120_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" } ], - "description": "Scalar reference for loop_120. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_120. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_121/reference-scalar_loop_121.json b/solutions/simd-loop/autovec/loop_121/autovec_loop_121.json similarity index 87% rename from solutions/simd-loop/reference-scalar/loop_121/reference-scalar_loop_121.json rename to solutions/simd-loop/autovec/loop_121/autovec_loop_121.json index f346a255206f2eb67d7b34426670ecf1006a8d33..87108bceafbdaa638fabcd16d79c6f0687edf34f 100644 --- a/solutions/simd-loop/reference-scalar/loop_121/reference-scalar_loop_121.json +++ b/solutions/simd-loop/autovec/loop_121/autovec_loop_121.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_121", + "name": "autovec_loop_121", "definition": "loop_121", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_121.h\"\n#include \n\nextern \"C\" void inner_loop_121(struct loop_121_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" } ], - "description": "Scalar reference for loop_121. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_121. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_122/reference-scalar_loop_122.json b/solutions/simd-loop/autovec/loop_122/autovec_loop_122.json similarity index 87% rename from solutions/simd-loop/reference-scalar/loop_122/reference-scalar_loop_122.json rename to solutions/simd-loop/autovec/loop_122/autovec_loop_122.json index b32ad59eb83af009f13194dd66fb75856f1c67ac..b6af31a9ff7a24fed405ca8636917015593aabbc 100644 --- a/solutions/simd-loop/reference-scalar/loop_122/reference-scalar_loop_122.json +++ b/solutions/simd-loop/autovec/loop_122/autovec_loop_122.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_122", + "name": "autovec_loop_122", "definition": "loop_122", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_122.h\"\n#include \n\nextern \"C\" void inner_loop_122(struct loop_122_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" } ], - "description": "Scalar reference for loop_122. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_122. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_123/reference-scalar_loop_123.json b/solutions/simd-loop/autovec/loop_123/autovec_loop_123.json similarity index 88% rename from solutions/simd-loop/reference-scalar/loop_123/reference-scalar_loop_123.json rename to solutions/simd-loop/autovec/loop_123/autovec_loop_123.json index c957cdee4fddae22368fb019cac087dd88a71ffd..dc4b8593da212f2d96f8493d7de21fe7150246a9 100644 --- a/solutions/simd-loop/reference-scalar/loop_123/reference-scalar_loop_123.json +++ b/solutions/simd-loop/autovec/loop_123/autovec_loop_123.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_123", + "name": "autovec_loop_123", "definition": "loop_123", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_123.h\"\n#include \n\nextern \"C\" void inner_loop_123(struct loop_123_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" } ], - "description": "Scalar reference for loop_123. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_123. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_124/reference-scalar_loop_124.json b/solutions/simd-loop/autovec/loop_124/autovec_loop_124.json similarity index 88% rename from solutions/simd-loop/reference-scalar/loop_124/reference-scalar_loop_124.json rename to solutions/simd-loop/autovec/loop_124/autovec_loop_124.json index 5e8d1a518ad5f1543fe89591507e7e3ad1b401e4..013bb84c273fc4e3cfef3ff4f6c88537ebc1c363 100644 --- a/solutions/simd-loop/reference-scalar/loop_124/reference-scalar_loop_124.json +++ b/solutions/simd-loop/autovec/loop_124/autovec_loop_124.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_124", + "name": "autovec_loop_124", "definition": "loop_124", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_124.h\"\n#include \n\nextern \"C\" void inner_loop_124(struct loop_124_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" } ], - "description": "Scalar reference for loop_124. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_124. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_126/reference-scalar_loop_126.json b/solutions/simd-loop/autovec/loop_126/autovec_loop_126.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_126/reference-scalar_loop_126.json rename to solutions/simd-loop/autovec/loop_126/autovec_loop_126.json index 7efabf74bddc64efc6abb4ed68ad6b59a3a70e01..b51153fbfb85dc6637239c57961576f1a0559bf3 100644 --- a/solutions/simd-loop/reference-scalar/loop_126/reference-scalar_loop_126.json +++ b/solutions/simd-loop/autovec/loop_126/autovec_loop_126.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_126", + "name": "autovec_loop_126", "definition": "loop_126", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_126.h\"\n#include \n\nextern \"C\" void inner_loop_126(struct loop_126_data * data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n int n = data->n;\n\n uint32_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n if (res % 2) {\n res++;\n }\n }\n data->res = res;\n}\n" } ], - "description": "Scalar reference for loop_126. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_126. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_127/reference-scalar_loop_127.json b/solutions/simd-loop/autovec/loop_127/autovec_loop_127.json similarity index 89% rename from solutions/simd-loop/reference-scalar/loop_127/reference-scalar_loop_127.json rename to solutions/simd-loop/autovec/loop_127/autovec_loop_127.json index db122a77e66eeebef8f6e66a14c2ecdd77dea031..39dbf309f99170f162c3e7e245457a9b9d8e8250 100644 --- a/solutions/simd-loop/reference-scalar/loop_127/reference-scalar_loop_127.json +++ b/solutions/simd-loop/autovec/loop_127/autovec_loop_127.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_127", + "name": "autovec_loop_127", "definition": "loop_127", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_127.h\"\n#include \n\nextern \"C\" void inner_loop_127(struct loop_127_data * data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n int n = data->n;\n\n uint32_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n if (a[i] == 512) {\n break;\n }\n }\n data->res = res;\n}\n" } ], - "description": "Scalar reference for loop_127. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_127. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/reference-scalar/loop_128/reference-scalar_loop_128.json b/solutions/simd-loop/autovec/loop_128/autovec_loop_128.json similarity index 88% rename from solutions/simd-loop/reference-scalar/loop_128/reference-scalar_loop_128.json rename to solutions/simd-loop/autovec/loop_128/autovec_loop_128.json index 5f44a3718e26b0072e23089497d1792bbfbc2133..a28a134edcb9ed1afe0f6b28dcef282079e7eb62 100644 --- a/solutions/simd-loop/reference-scalar/loop_128/reference-scalar_loop_128.json +++ b/solutions/simd-loop/autovec/loop_128/autovec_loop_128.json @@ -1,8 +1,8 @@ { - "name": "reference-scalar_loop_128", + "name": "autovec_loop_128", "definition": "loop_128", "dataset": "simd-loop", - "author": "reference-scalar", + "author": "autovec", "spec": { "language": "cpp", "target_hardware": [ @@ -12,8 +12,9 @@ "dependencies": [], "isa_features": [], "compile_flags": [ - "-O2", - "-std=c++14" + "-O3", + "-std=c++14", + "-march=native" ], "link_flags": [] }, @@ -31,5 +32,5 @@ "content": "#include \"loop_128.h\"\n#include \n\nextern \"C\" void inner_loop_128(struct loop_128_data * data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n uint32_t *c = data->c;\n int n = data->n;\n\n for (int i = 0; i < n; i++) {\n c[i] = a[i] + b[i];\n }\n}\n" } ], - "description": "Scalar reference for loop_128. Baseline for speedup measurement." + "description": "Compiler auto-vectorized baseline for loop_128. Baseline for speedup measurement." } diff --git a/solutions/simd-loop/autovec/loop_130/autovec_loop_130.json b/solutions/simd-loop/autovec/loop_130/autovec_loop_130.json new file mode 100644 index 0000000000000000000000000000000000000000..30ffacdf6a518bce5898055ee6536cdc57fd320e --- /dev/null +++ b/solutions/simd-loop/autovec/loop_130/autovec_loop_130.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_130", + "definition": "loop_130", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_130", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_130.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_130_data {\n uint64_t m;\n uint64_t n;\n uint64_t k;\n float *a;\n float *b;\n float *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_130(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_130.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_130.h\"\n#include \n\nextern \"C\" void inner_loop_130(struct loop_130_data *data);\n\nextern \"C\" int armbench_entry_loop_130(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out) {\n struct loop_130_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n _kd.k = static_cast(k);\n inner_loop_130(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_130.h\"\n#include \n\nextern \"C\" void inner_loop_130(struct loop_130_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint64_t k = data->k;\n float *a = data->a;\n float *b = data->b;\n float *c = data->c;\n for (uint64_t y = 0; y < m; y++) {\n for (uint64_t x = 0; x < n; x++) {\n float d = 0;\n for (uint64_t z = 0; z < k; z++) d += a[y * k + z] * b[z * n + x];\n c[y * n + x] = d;\n }\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_130. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_135/autovec_loop_135.json b/solutions/simd-loop/autovec/loop_135/autovec_loop_135.json new file mode 100644 index 0000000000000000000000000000000000000000..a2fe9ff9f59a79c24369db869e72731d7df6555b --- /dev/null +++ b/solutions/simd-loop/autovec/loop_135/autovec_loop_135.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_135", + "definition": "loop_135", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_135", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_135.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_135_data {\n uint64_t m;\n uint64_t n;\n uint64_t k;\n int8_t *a;\n int8_t *b;\n int32_t *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_135(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_135.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_135.h\"\n#include \n\nextern \"C\" void inner_loop_135(struct loop_135_data *data);\n\nextern \"C\" int armbench_entry_loop_135(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out) {\n struct loop_135_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n _kd.k = static_cast(k);\n inner_loop_135(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_135.h\"\n#include \n\nextern \"C\" void inner_loop_135(struct loop_135_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint64_t k = data->k;\n int8_t *a = data->a;\n int8_t *b = data->b;\n int32_t *c = data->c;\n for (uint64_t x = 0; x < m; x++) {\n for (uint64_t y = 0; y < n; y++) {\n int32_t acc = 0;\n for (uint64_t z = 0; z < k; z++)\n acc += (int32_t)a[x * k + z] * (int32_t)b[z * n + y];\n c[x * n + y] = acc;\n }\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_135. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_216/autovec_loop_216.json b/solutions/simd-loop/autovec/loop_216/autovec_loop_216.json new file mode 100644 index 0000000000000000000000000000000000000000..d286e4e3dc562e0393776b4e19b3ad92d20fccd2 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_216/autovec_loop_216.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_216", + "definition": "loop_216", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_216", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_216.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_216_data {\n uint64_t m;\n uint64_t n;\n float *a;\n float *x;\n float *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_216(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_216.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_216.h\"\n#include \n\nextern \"C\" void inner_loop_216(struct loop_216_data *data);\n\nextern \"C\" int armbench_entry_loop_216(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_216_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_216(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_216.h\"\n#include \n\nextern \"C\" void inner_loop_216(struct loop_216_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n float *a = data->a;\n float *x = data->x;\n float *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n float d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(m * j) + i] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_216. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_217/autovec_loop_217.json b/solutions/simd-loop/autovec/loop_217/autovec_loop_217.json new file mode 100644 index 0000000000000000000000000000000000000000..9a1b80d477f431975456c9c76b64c54250f0eda8 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_217/autovec_loop_217.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_217", + "definition": "loop_217", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_217", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_217.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_217_data {\n uint64_t m;\n uint64_t n;\n uint8_t *a;\n uint8_t *b;\n uint32_t *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_217(void *a, void *b, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_217.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_217.h\"\n#include \n\nextern \"C\" void inner_loop_217(struct loop_217_data *data);\n\nextern \"C\" int armbench_entry_loop_217(void *a, void *b, int64_t m, int64_t n, void *res_out) {\n struct loop_217_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_217(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_217.h\"\n#include \n\nextern \"C\" void inner_loop_217(struct loop_217_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint8_t *a = data->a;\n uint8_t *b = data->b;\n uint32_t *c = data->c;\n for (uint64_t y = 0; y < m; y++) {\n uint32_t d = 0;\n for (uint64_t x = 0; x < n; x++) d += (uint32_t)a[y * n + x] * (uint32_t)b[x];\n c[y] = d;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_217. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_218/autovec_loop_218.json b/solutions/simd-loop/autovec/loop_218/autovec_loop_218.json new file mode 100644 index 0000000000000000000000000000000000000000..62a23687c887e26512bc34a6b1c9debd5e394925 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_218/autovec_loop_218.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_218", + "definition": "loop_218", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_218", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_218.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_218_data {\n uint64_t m;\n uint64_t n;\n double *a;\n double *x;\n double *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_218(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_218.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_218.h\"\n#include \n\nextern \"C\" void inner_loop_218(struct loop_218_data *data);\n\nextern \"C\" int armbench_entry_loop_218(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_218_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_218(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_218.h\"\n#include \n\nextern \"C\" void inner_loop_218(struct loop_218_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n double *a = data->a;\n double *x = data->x;\n double *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n double d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(m * j) + i] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_218. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_219/autovec_loop_219.json b/solutions/simd-loop/autovec/loop_219/autovec_loop_219.json new file mode 100644 index 0000000000000000000000000000000000000000..af64ec8df46ae491906c096745041c9439d0f447 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_219/autovec_loop_219.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_219", + "definition": "loop_219", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_219", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_219.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_219_data {\n uint64_t m;\n uint64_t n;\n uint8_t *a;\n uint8_t *b;\n uint32_t *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_219(void *a, void *b, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_219.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_219.h\"\n#include \n\nextern \"C\" void inner_loop_219(struct loop_219_data *data);\n\nextern \"C\" int armbench_entry_loop_219(void *a, void *b, int64_t m, int64_t n, void *res_out) {\n struct loop_219_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_219(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_219.h\"\n#include \n\nextern \"C\" void inner_loop_219(struct loop_219_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint8_t *a = data->a;\n uint8_t *b = data->b;\n uint32_t *c = data->c;\n for (uint64_t y = 0; y < m; y++) {\n uint32_t d = 0;\n for (uint64_t x = 0; x < n; x++) d += (uint32_t)a[x * m + y] * (uint32_t)b[x];\n c[y] = d;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_219. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_220/autovec_loop_220.json b/solutions/simd-loop/autovec/loop_220/autovec_loop_220.json new file mode 100644 index 0000000000000000000000000000000000000000..bdafda9ab10bb0225a229d3b941a916d3a770207 --- /dev/null +++ b/solutions/simd-loop/autovec/loop_220/autovec_loop_220.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_220", + "definition": "loop_220", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_220", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_220.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_220_data {\n uint64_t m;\n uint64_t n;\n float *a;\n float *x;\n float *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_220(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_220.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_220.h\"\n#include \n\nextern \"C\" void inner_loop_220(struct loop_220_data *data);\n\nextern \"C\" int armbench_entry_loop_220(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_220_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_220(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_220.h\"\n#include \n\nextern \"C\" void inner_loop_220(struct loop_220_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n float *a = data->a;\n float *x = data->x;\n float *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n float d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(i * n) + j] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_220. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_221/autovec_loop_221.json b/solutions/simd-loop/autovec/loop_221/autovec_loop_221.json new file mode 100644 index 0000000000000000000000000000000000000000..f906eeb51c551cbecea157ae660a5fcab31c95fc --- /dev/null +++ b/solutions/simd-loop/autovec/loop_221/autovec_loop_221.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_221", + "definition": "loop_221", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_221", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_221.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_221_data {\n uint64_t m;\n uint64_t n;\n double *a;\n double *x;\n double *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_221(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_221.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_221.h\"\n#include \n\nextern \"C\" void inner_loop_221(struct loop_221_data *data);\n\nextern \"C\" int armbench_entry_loop_221(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_221_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_221(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_221.h\"\n#include \n\nextern \"C\" void inner_loop_221(struct loop_221_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n double *a = data->a;\n double *x = data->x;\n double *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n double d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(i * n) + j] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_221. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/autovec/loop_223/autovec_loop_223.json b/solutions/simd-loop/autovec/loop_223/autovec_loop_223.json new file mode 100644 index 0000000000000000000000000000000000000000..24c83777bab3cbbc860157080b0614e16db9139d --- /dev/null +++ b/solutions/simd-loop/autovec/loop_223/autovec_loop_223.json @@ -0,0 +1,36 @@ +{ + "name": "autovec_loop_223", + "definition": "loop_223", + "dataset": "simd-loop", + "author": "autovec", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_223", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O3", + "-std=c++14", + "-march=native" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_223.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_223_data {\n uint64_t m;\n uint64_t n;\n uint32_t *a;\n uint32_t *at;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_223(void *a, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_223.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_223.h\"\n#include \n\nextern \"C\" void inner_loop_223(struct loop_223_data *data);\n\nextern \"C\" int armbench_entry_loop_223(void *a, int64_t m, int64_t n, void *res_out) {\n struct loop_223_data _kd;\n _kd.a = static_cast(a);\n _kd.at = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_223(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_223.h\"\n#include \n\nextern \"C\" void inner_loop_223(struct loop_223_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint32_t *a = data->a;\n uint32_t *at = data->at;\n for (uint64_t i = 0; i < m; i++)\n for (uint64_t j = 0; j < n; j++)\n at[j * m + i] = a[i * n + j];\n}\n" + } + ], + "description": "Compiler auto-vectorized baseline for loop_223. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_001/reference_loop_001.json b/solutions/simd-loop/reference/loop_001/reference_loop_001.json new file mode 100644 index 0000000000000000000000000000000000000000..81a978a1896ac24d1d5213bc17f0971684141b41 --- /dev/null +++ b/solutions/simd-loop/reference/loop_001/reference_loop_001.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_001", + "definition": "loop_001", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_001", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_001.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_001_data {\n float *a;\n float *b;\n int n;\n float res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_001(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_001.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_001.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_001(struct loop_001_data *data);\n\nextern \"C\" int armbench_entry_loop_001(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_001_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0.0f;\n inner_loop_001(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_001.h\"\n#include \n\nextern \"C\" void inner_loop_001(struct loop_001_data *data) {\n float *a = data->a;\n float *b = data->b;\n int n = data->n;\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += (double)a[i] * (double)b[i];\n }\n data->res = (float)res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_001. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_002/reference_loop_002.json b/solutions/simd-loop/reference/loop_002/reference_loop_002.json new file mode 100644 index 0000000000000000000000000000000000000000..527ba7297634d6130f9d4ee7bc11fdd252304f99 --- /dev/null +++ b/solutions/simd-loop/reference/loop_002/reference_loop_002.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_002", + "definition": "loop_002", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_002", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_002.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_002_data {\n uint32_t *a;\n uint32_t *b;\n int n;\n uint32_t res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_002(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_002.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_002.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_002(struct loop_002_data *data);\n\nextern \"C\" int armbench_entry_loop_002(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_002_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0u;\n inner_loop_002(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_002.h\"\n#include \n\nextern \"C\" void inner_loop_002(struct loop_002_data * input) {\n uint32_t * a = input->a;\n uint32_t * b = input->b;\n int n = input->n;\n\n uint32_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n input->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_002. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_003/reference_loop_003.json b/solutions/simd-loop/reference/loop_003/reference_loop_003.json new file mode 100644 index 0000000000000000000000000000000000000000..ab4377b9515917d32093d07a01fdc0d8839a0209 --- /dev/null +++ b/solutions/simd-loop/reference/loop_003/reference_loop_003.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_003", + "definition": "loop_003", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_003", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_003.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_003_data {\n double *a;\n double *b;\n int n;\n double res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_003(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_003.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_003.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_003(struct loop_003_data *data);\n\nextern \"C\" int armbench_entry_loop_003(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_003_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0.0;\n inner_loop_003(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_003.h\"\n#include \n\nextern \"C\" void inner_loop_003(struct loop_003_data * data) {\n double * a = data->a;\n double * b = data->b;\n int n = data->n;\n\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n data->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_003. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_004/reference_loop_004.json b/solutions/simd-loop/reference/loop_004/reference_loop_004.json new file mode 100644 index 0000000000000000000000000000000000000000..d37153938437b92d1c6adeb0e448ac1b6a26d505 --- /dev/null +++ b/solutions/simd-loop/reference/loop_004/reference_loop_004.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_004", + "definition": "loop_004", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_004", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_004.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_004_data {\n uint64_t *a;\n uint64_t *b;\n int n;\n uint64_t res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_004(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_004.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_004.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_004(struct loop_004_data *data);\n\nextern \"C\" int armbench_entry_loop_004(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_004_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0ull;\n inner_loop_004(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_004.h\"\n#include \n\nextern \"C\" void inner_loop_004(struct loop_004_data * data) {\n uint64_t *a = data->a;\n uint64_t *b = data->b;\n int n = data->n;\n\n uint64_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n data->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_004. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_005/reference_loop_005.json b/solutions/simd-loop/reference/loop_005/reference_loop_005.json new file mode 100644 index 0000000000000000000000000000000000000000..0d013775306a5a60a412790d25da9d2018c43423 --- /dev/null +++ b/solutions/simd-loop/reference/loop_005/reference_loop_005.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_005", + "definition": "loop_005", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_005", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_005.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_005_data {\n uint8_t *p;\n uint8_t *lmt;\n uint32_t checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_005(void *p, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_005.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_005.h\"\n#include \n\nextern \"C\" void inner_loop_005(struct loop_005_data *data);\n\nextern \"C\" int armbench_entry_loop_005(void *p, int64_t n, void *res_out) {\n struct loop_005_data _kd;\n _kd.p = static_cast(p);\n _kd.lmt = static_cast(p) + n;\n _kd.checksum = 0;\n inner_loop_005(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_005.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_005(struct loop_005_data *data) {\n uint8_t *p = data->p; uint8_t *lmt = data->lmt;\n uint32_t res = 0;\n while (p < lmt) {\n uint32_t len = (uint32_t)strlen((const char *)p);\n p += len + 1; res += 1; res ^= (len % 0xffff) << 16;\n }\n data->checksum = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_005. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_006/reference_loop_006.json b/solutions/simd-loop/reference/loop_006/reference_loop_006.json new file mode 100644 index 0000000000000000000000000000000000000000..871d1bf07ae057a6dfe02ca32b0a60715ebe73e5 --- /dev/null +++ b/solutions/simd-loop/reference/loop_006/reference_loop_006.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_006", + "definition": "loop_006", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_006", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_006.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_006_data {\n uint8_t *p;\n uint8_t *lmt;\n uint32_t checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_006(void *p, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_006.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_006.h\"\n#include \n\nextern \"C\" void inner_loop_006(struct loop_006_data *data);\n\nextern \"C\" int armbench_entry_loop_006(void *p, int64_t n, void *res_out) {\n struct loop_006_data _kd;\n _kd.p = static_cast(p);\n _kd.lmt = static_cast(p) + n;\n _kd.checksum = 0;\n inner_loop_006(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_006.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_006(struct loop_006_data *data) {\n uint8_t *p = data->p; uint8_t *lmt = data->lmt;\n uint32_t res = 0;\n while (p < lmt) {\n uint32_t len = (uint32_t)strlen((const char *)p);\n p += len + 1; res += 1; res ^= (len % 0xffff) << 16;\n }\n data->checksum = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_006. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_008/reference_loop_008.json b/solutions/simd-loop/reference/loop_008/reference_loop_008.json new file mode 100644 index 0000000000000000000000000000000000000000..547c7d665b78d1e261a74a7da4d42cf91ba540f9 --- /dev/null +++ b/solutions/simd-loop/reference/loop_008/reference_loop_008.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_008", + "definition": "loop_008", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_008", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_008.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_008_data {\n double *a;\n int n;\n double res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_008(void *a, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_008.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_008.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_008(struct loop_008_data *data);\n\nextern \"C\" int armbench_entry_loop_008(void *a, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_008_data data;\n data.a = static_cast(a);\n data.n = static_cast(n);\n data.res = 0.0;\n inner_loop_008(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_008.h\"\n#include \n\nextern \"C\" void inner_loop_008(struct loop_008_data * data) {\n double *a = data->a;\n int n = data->n;\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += a[i];\n }\n data->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_008. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_010/reference_loop_010.json b/solutions/simd-loop/reference/loop_010/reference_loop_010.json new file mode 100644 index 0000000000000000000000000000000000000000..dd38dfdf52301c418f06633ebbbc7e8e580c4df3 --- /dev/null +++ b/solutions/simd-loop/reference/loop_010/reference_loop_010.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_010", + "definition": "loop_010", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_010", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_010.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_010_data {\n float *a;\n uint64_t n;\n int res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_010(void *a, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_010.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_010.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_010(struct loop_010_data *data);\n\nextern \"C\" int armbench_entry_loop_010(void *a, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_010_data data;\n data.a = static_cast(a);\n data.n = static_cast(n);\n data.res = 0;\n inner_loop_010(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_010.h\"\n#include \n\nextern \"C\" void inner_loop_010(struct loop_010_data * data) {\n float *a = data->a;\n uint64_t n = data->n;\n\n bool any = 0;\n bool all = 1;\n\n for (int i = 0; i < n; i++) {\n if (a[i] < 0.0f) {\n any = 1;\n } else {\n all = 0;\n }\n }\n data->res = all ? 1 : any ? 2 : 3;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_010. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_024/reference_loop_024.json b/solutions/simd-loop/reference/loop_024/reference_loop_024.json new file mode 100644 index 0000000000000000000000000000000000000000..1eb1cafa4027612c9fc61122bf086747f82ea3b3 --- /dev/null +++ b/solutions/simd-loop/reference/loop_024/reference_loop_024.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_024", + "definition": "loop_024", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_024", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_024.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_024_data {\n uint8_t *a;\n uint8_t *b;\n int64_t n;\n uint32_t res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_024(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_024.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_024.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_024(struct loop_024_data *data);\n\nextern \"C\" int armbench_entry_loop_024(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_024_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0u;\n inner_loop_024(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_024.h\"\n#include \n\nextern \"C\" void inner_loop_024(struct loop_024_data * data) {\n uint8_t * a = data->a;\n uint8_t * b = data->b;\n int64_t n = data->n;\n\n uint32_t sum = 0;\n for (int i = 0; i < n; i++) {\n sum += __builtin_abs(a[i] - b[i]);\n }\n data->res = sum;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_024. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_027/reference_loop_027.json b/solutions/simd-loop/reference/loop_027/reference_loop_027.json new file mode 100644 index 0000000000000000000000000000000000000000..5254ed3cb8154c35a556ddc820ad0fc33c305ab7 --- /dev/null +++ b/solutions/simd-loop/reference/loop_027/reference_loop_027.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_027", + "definition": "loop_027", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_027", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_027.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_027_data {\n float *input;\n float *output;\n int64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_027(void *input, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_027.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_027.h\"\n#include \n\nextern \"C\" void inner_loop_027(struct loop_027_data *data);\n\nextern \"C\" int armbench_entry_loop_027(void *input, int64_t n, void *res_out) {\n struct loop_027_data data;\n data.input = static_cast(input);\n data.output = static_cast(res_out);\n data.size = static_cast(n);\n inner_loop_027(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_027.h\"\n#include \n\nextern \"C\" void inner_loop_027(struct loop_027_data * data) {\n float *input = data->input;\n float *output = data->output;\n int64_t size = data->size;\n\n for (int64_t i = 0; i < size; i++) {\n output[i] = __builtin_sqrtf(input[i]);\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_027. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_028/reference_loop_028.json b/solutions/simd-loop/reference/loop_028/reference_loop_028.json new file mode 100644 index 0000000000000000000000000000000000000000..b5f8b66365b6cc424154656d77bb97f6d712d6b9 --- /dev/null +++ b/solutions/simd-loop/reference/loop_028/reference_loop_028.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_028", + "definition": "loop_028", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_028", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_028.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_028_data {\n double *input1;\n double *input2;\n double *output;\n int64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_028(void *input1, void *input2, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_028.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_028.h\"\n#include \n\nextern \"C\" void inner_loop_028(struct loop_028_data *data);\n\nextern \"C\" int armbench_entry_loop_028(void *input1, void *input2, int64_t n, void *res_out) {\n struct loop_028_data data;\n data.input1 = static_cast(input1);\n data.input2 = static_cast(input2);\n data.output = static_cast(res_out);\n data.size = static_cast(n);\n inner_loop_028(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_028.h\"\n#include \n\nextern \"C\" void inner_loop_028(struct loop_028_data * data) {\n double * input1 = data->input1;\n double * input2 = data->input2;\n double * output = data->output;\n int64_t size = data->size;\n\n for (int64_t i = 0; i < size; i++) {\n output[i] = input1[i] / input2[i];\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_028. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_029/reference_loop_029.json b/solutions/simd-loop/reference/loop_029/reference_loop_029.json new file mode 100644 index 0000000000000000000000000000000000000000..f964cfa7e64966f8e3484182f4642bb3653fae88 --- /dev/null +++ b/solutions/simd-loop/reference/loop_029/reference_loop_029.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_029", + "definition": "loop_029", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_029", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_029.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_029_data {\n double *input;\n int64_t *scale;\n double *output;\n int64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_029(void *input, void *scale, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_029.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_029.h\"\n#include \n\nextern \"C\" void inner_loop_029(struct loop_029_data *data);\n\nextern \"C\" int armbench_entry_loop_029(void *input, void *scale, int64_t n, void *res_out) {\n struct loop_029_data data;\n data.input = static_cast(input);\n data.scale = static_cast(scale);\n data.output = static_cast(res_out);\n data.size = static_cast(n);\n inner_loop_029(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_029.h\"\n#include \n\nextern \"C\" void inner_loop_029(struct loop_029_data * data) {\n double *input = data->input;\n int64_t *scale = data->scale;\n double *output = data->output;\n int64_t size = data->size;\n\n for (int64_t i = 0; i < size; i++) {\n output[i] = __builtin_scalbn(input[i], (int)scale[i]);\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_029. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_032/reference_loop_032.json b/solutions/simd-loop/reference/loop_032/reference_loop_032.json new file mode 100644 index 0000000000000000000000000000000000000000..b4bfb360724d4b08134de39445065357b4bc82c3 --- /dev/null +++ b/solutions/simd-loop/reference/loop_032/reference_loop_032.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_032", + "definition": "loop_032", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_032", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_032.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_032_data {\n double *a;\n double *b;\n int n;\n double res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_032(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_032.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_032.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_032(struct loop_032_data *data);\n\nextern \"C\" int armbench_entry_loop_032(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_032_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0.0;\n inner_loop_032(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_032.h\"\n#include \n\nextern \"C\" void inner_loop_032(struct loop_032_data * input) {\n double *a = input->a;\n double *b = input->b;\n int n = input->n;\n\n double res = 0.0;\n int lw = 0;\n for (int j = 4; j < n; j = j + 5) {\n res -= a[lw] * b[j];\n lw++;\n }\n input->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_032. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_033/reference_loop_033.json b/solutions/simd-loop/reference/loop_033/reference_loop_033.json new file mode 100644 index 0000000000000000000000000000000000000000..e98372a1c0041fe85c95061ed7d2b790d7803cf4 --- /dev/null +++ b/solutions/simd-loop/reference/loop_033/reference_loop_033.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_033", + "definition": "loop_033", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_033", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_033.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_033_data {\n double *a;\n double *b;\n int64_t n;\n double res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_033(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_033.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_033.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_033(struct loop_033_data *data);\n\nextern \"C\" int armbench_entry_loop_033(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_033_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0.0;\n inner_loop_033(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_033.h\"\n#include \n\nextern \"C\" void inner_loop_033(struct loop_033_data * input) {\n double *a = input->a;\n double *b = input->b;\n int64_t n = input->n;\n\n double res = 0.0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n }\n input->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_033. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_034/reference_loop_034.json b/solutions/simd-loop/reference/loop_034/reference_loop_034.json new file mode 100644 index 0000000000000000000000000000000000000000..84b66e4063294f2748a43550ad7b856fbd2e89ce --- /dev/null +++ b/solutions/simd-loop/reference/loop_034/reference_loop_034.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_034", + "definition": "loop_034", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_034", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_034.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_034_data {\n uint8_t *a;\n uint8_t *b;\n uint8_t *lmt;\n uint32_t checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_034(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_034.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_034.h\"\n#include \n\nextern \"C\" void inner_loop_034(struct loop_034_data *data);\n\nextern \"C\" int armbench_entry_loop_034(void *a, void *b, int64_t n, void *res_out) {\n struct loop_034_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.lmt = static_cast(a) + n;\n _kd.checksum = 0;\n inner_loop_034(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_034.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_034(struct loop_034_data *data) {\n uint8_t *p1 = data->a; uint8_t *p2 = data->b; uint8_t *lmt = data->lmt;\n uint32_t res = 0, cnt = 0; int length = 13;\n while (p1 < lmt) {\n int64_t r = strcmp((const char *)p1, (const char *)p2);\n uint32_t cmp = 1; if (r > 0) cmp = 2; if (r < 0) cmp = 3;\n res += cnt * cmp; p1 += length; p2 += length; cnt++;\n length = 3 + (length + 11) % 43;\n }\n data->checksum = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_034. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_035/reference_loop_035.json b/solutions/simd-loop/reference/loop_035/reference_loop_035.json new file mode 100644 index 0000000000000000000000000000000000000000..b4ec439f9b33b75c644a79f45ebdc26270692901 --- /dev/null +++ b/solutions/simd-loop/reference/loop_035/reference_loop_035.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_035", + "definition": "loop_035", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_035", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_035.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_035_data {\n float *a;\n float *b;\n float *c;\n int64_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_035(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_035.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_035.h\"\n#include \n\nextern \"C\" void inner_loop_035(struct loop_035_data *data);\n\nextern \"C\" int armbench_entry_loop_035(void *a, void *b, int64_t n, void *res_out) {\n struct loop_035_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.c = static_cast(res_out);\n data.n = static_cast(n);\n inner_loop_035(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_035.h\"\n#include \n\nextern \"C\" void inner_loop_035(struct loop_035_data * input) {\n float * a = input->a;\n float * b = input->b;\n float * c = input->c;\n int64_t n = input->n;\n\n for (int64_t i = 0; i < n; i++) {\n c[i] = a[i] + b[i];\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_035. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_037/reference_loop_037.json b/solutions/simd-loop/reference/loop_037/reference_loop_037.json new file mode 100644 index 0000000000000000000000000000000000000000..3b4f6d3a2e35cb48f42b31144106cd3614a8ea9e --- /dev/null +++ b/solutions/simd-loop/reference/loop_037/reference_loop_037.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_037", + "definition": "loop_037", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_037", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_037.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { float re; float im; } cfloat32_t;\n\nstruct loop_037_data {\n cfloat32_t *a0;\n cfloat32_t *b0;\n cfloat32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_037(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_037.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_037.h\"\n#include \n\nextern \"C\" void inner_loop_037(struct loop_037_data *data);\n\nextern \"C\" int armbench_entry_loop_037(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_037_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_037(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_037.h\"\n#include \n\nextern \"C\" void inner_loop_037(struct loop_037_data *data) {\n cfloat32_t *a = data->a0; cfloat32_t *b = data->b0; cfloat32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = (a[i].re * b[i].re) - (a[i].im * b[i].im);\n c[i].im = (a[i].re * b[i].im) + (a[i].im * b[i].re);\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_037. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_038/reference_loop_038.json b/solutions/simd-loop/reference/loop_038/reference_loop_038.json new file mode 100644 index 0000000000000000000000000000000000000000..640b9e905801371447b89cf55ca8805016a6312a --- /dev/null +++ b/solutions/simd-loop/reference/loop_038/reference_loop_038.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_038", + "definition": "loop_038", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_038", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_038.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_038_data {\n _Float16 *a;\n _Float16 *b;\n _Float16 *c;\n int dim;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_038(void *a, void *b, int64_t dim, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_038.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_038.h\"\n#include \n\nextern \"C\" void inner_loop_038(struct loop_038_data *data);\n\nextern \"C\" int armbench_entry_loop_038(void *a, void *b, int64_t dim, void *res_out) {\n struct loop_038_data _kd;\n _kd.a = static_cast<_Float16 *>(a);\n _kd.b = static_cast<_Float16 *>(b);\n _kd.c = static_cast<_Float16 *>(res_out);\n _kd.dim = static_cast(dim);\n inner_loop_038(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_038.h\"\n#include \n\nextern \"C\" void inner_loop_038(struct loop_038_data *data) {\n _Float16 *a = data->a;\n _Float16 *b = data->b;\n _Float16 *c = data->c;\n int dim = data->dim;\n _Float16 k = (_Float16)0.25f;\n for (int row = 0; row < dim - 1; row++) {\n for (int col = 0; col < dim - 1; col++) {\n _Float16 s0 = a[row * dim + col];\n _Float16 s1 = a[row * dim + col + 1];\n _Float16 s2 = a[(row + 1) * dim + col];\n _Float16 s3 = a[(row + 1) * dim + col + 1];\n _Float16 ac = b[row * dim + col];\n c[row * dim + col] = ac + s0 * k + s1 * k + s2 * k + s3 * k;\n }\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_038. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_101/reference_loop_101.json b/solutions/simd-loop/reference/loop_101/reference_loop_101.json new file mode 100644 index 0000000000000000000000000000000000000000..d77d321dd9c3c16eecbc0eb3cb3d1788314ccf76 --- /dev/null +++ b/solutions/simd-loop/reference/loop_101/reference_loop_101.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_101", + "definition": "loop_101", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_101", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_101.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_101_data {\n uint8_t *a;\n uint8_t *b;\n int n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_101(void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_101.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_101.h\"\n#include \n\nextern \"C\" void inner_loop_101(struct loop_101_data *data);\n\nextern \"C\" int armbench_entry_loop_101(void *b, int64_t n, void *res_out) {\n struct loop_101_data _kd;\n _kd.b = static_cast(b);\n _kd.a = static_cast(res_out);\n _kd.n = static_cast(n);\n inner_loop_101(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_101.h\"\n#include \n\nextern \"C\" void inner_loop_101(struct loop_101_data *data) {\n uint8_t *a = data->a;\n uint8_t *b = data->b;\n int n = data->n;\n for (int i = 0; i < n - 1; i++) {\n uint16_t s1 = b[i];\n uint16_t s2 = b[i + 1];\n a[2 * i] = (3 * s1 + s2 + 2) >> 2;\n a[2 * i + 1] = (3 * s2 + s1 + 2) >> 2;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_101. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_102/reference_loop_102.json b/solutions/simd-loop/reference/loop_102/reference_loop_102.json new file mode 100644 index 0000000000000000000000000000000000000000..3cbc94c7a8a201e79538c2bcbca6475c97d594bd --- /dev/null +++ b/solutions/simd-loop/reference/loop_102/reference_loop_102.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_102", + "definition": "loop_102", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_102", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_102.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_102_data {\n uint32_t *histogram;\n uint64_t histogram_size;\n uint32_t *records;\n int64_t num_records;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_102(void *records, int64_t histogram_size, int64_t num_records, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_102.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_102.h\"\n#include \n\nextern \"C\" void inner_loop_102(struct loop_102_data *data);\n\nextern \"C\" int armbench_entry_loop_102(void *records, int64_t histogram_size, int64_t num_records, void *res_out) {\n struct loop_102_data _kd;\n _kd.records = static_cast(records);\n _kd.histogram = static_cast(res_out);\n _kd.histogram_size = static_cast(histogram_size);\n _kd.num_records = static_cast(num_records);\n inner_loop_102(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_102.h\"\n#include \n\nextern \"C\" void inner_loop_102(struct loop_102_data *data) {\n uint32_t *histogram = data->histogram;\n uint64_t histogram_size = data->histogram_size;\n uint32_t *records = data->records;\n int64_t num_records = data->num_records;\n for (uint64_t i = 0; i < histogram_size; i++) histogram[i] = 0;\n for (int64_t i = 0; i < num_records; i++) histogram[records[i]] += 1;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_102. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_103/reference_loop_103.json b/solutions/simd-loop/reference/loop_103/reference_loop_103.json new file mode 100644 index 0000000000000000000000000000000000000000..d0f7ce60642437a46fc4c10206e7484efddf09aa --- /dev/null +++ b/solutions/simd-loop/reference/loop_103/reference_loop_103.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_103", + "definition": "loop_103", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_103", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_103.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_103_data {\n uint8_t *p;\n uint8_t *end;\n int checksum;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_103(void *p, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_103.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_103.h\"\n#include \n\nextern \"C\" void inner_loop_103(struct loop_103_data *data);\n\nextern \"C\" int armbench_entry_loop_103(void *p, int64_t n, void *res_out) {\n struct loop_103_data _kd;\n _kd.p = static_cast(p);\n _kd.end = static_cast(p) + n;\n _kd.checksum = 0;\n inner_loop_103(&_kd);\n *static_cast(res_out) = _kd.checksum;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_103.h\"\n#include \n\nstatic uint8_t *skip_ws(uint8_t *p, uint8_t *end) {\n while (p != end && (*p == ' ' || *p == '\\n' || *p == '\\r' || *p == '\\t')) p++;\n return p;\n}\nstatic uint8_t *skip_wd(uint8_t *p, uint8_t *end) {\n while (p != end && *p != ' ' && *p != '\\n' && *p != '\\r' && *p != '\\t') p++;\n return p;\n}\nextern \"C\" void inner_loop_103(struct loop_103_data *data) {\n uint8_t *p = data->p; uint8_t *end = data->end;\n int count = 0;\n p = skip_ws(p, end);\n while (p != end) { count++; p = skip_wd(p, end); p = skip_ws(p, end); }\n data->checksum = count;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_103. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_104/reference_loop_104.json b/solutions/simd-loop/reference/loop_104/reference_loop_104.json new file mode 100644 index 0000000000000000000000000000000000000000..0711abc857e88f8477abc773ad8059551fb0c0ce --- /dev/null +++ b/solutions/simd-loop/reference/loop_104/reference_loop_104.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_104", + "definition": "loop_104", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_104", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_104.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_104_data {\n uint32_t *histogram;\n uint64_t histogram_size;\n uint8_t *data;\n int n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_104(void *data, int64_t histogram_size, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_104.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_104.h\"\n#include \n\nextern \"C\" void inner_loop_104(struct loop_104_data *data);\n\nextern \"C\" int armbench_entry_loop_104(void *data, int64_t histogram_size, int64_t n, void *res_out) {\n struct loop_104_data _kd;\n _kd.data = static_cast(data);\n _kd.histogram = static_cast(res_out);\n _kd.histogram_size = static_cast(histogram_size);\n _kd.n = static_cast(n);\n inner_loop_104(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_104.h\"\n#include \n\nextern \"C\" void inner_loop_104(struct loop_104_data *data) {\n uint32_t *histogram = data->histogram;\n uint64_t histogram_size = data->histogram_size;\n uint8_t *d = data->data;\n int n = data->n;\n for (uint64_t i = 0; i < histogram_size; i++) histogram[i] = 0;\n for (int i = 0; i < n; i++) histogram[d[i]] += 1;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_104. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_105/reference_loop_105.json b/solutions/simd-loop/reference/loop_105/reference_loop_105.json new file mode 100644 index 0000000000000000000000000000000000000000..ec4af88ca9d3303fea5e18e8cc8738e8122697ba --- /dev/null +++ b/solutions/simd-loop/reference/loop_105/reference_loop_105.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_105", + "definition": "loop_105", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_105", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_105.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_105_data {\n float *a;\n float *b;\n int n;\n float res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_105(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_105.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_105.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_105(struct loop_105_data *data);\n\nextern \"C\" int armbench_entry_loop_105(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_105_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0.0f;\n inner_loop_105(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_105.h\"\n\nextern \"C\" void inner_loop_105(struct loop_105_data *data) {\n float *a = data->a;\n int n = data->n;\n double res = 0.0;\n for (int i = 0; i < n; i++) res += (double)a[i];\n data->res = (float)res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_105. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_106/reference_loop_106.json b/solutions/simd-loop/reference/loop_106/reference_loop_106.json new file mode 100644 index 0000000000000000000000000000000000000000..f4f7953d136d92c48ea02671a637a9a8199ff1f2 --- /dev/null +++ b/solutions/simd-loop/reference/loop_106/reference_loop_106.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_106", + "definition": "loop_106", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_106", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_106.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_106_data {\n uint32_t *a;\n uint32_t *b;\n uint32_t *perm;\n int64_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_106(void *a, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_106.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_106.h\"\n#include \n\nextern \"C\" void inner_loop_106(struct loop_106_data *data);\n\nextern \"C\" int armbench_entry_loop_106(void *a, int64_t n, void *res_out) {\n struct loop_106_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(res_out);\n _kd.n = static_cast(n);\n inner_loop_106(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_106.h\"\n#include \n\nstatic uint32_t popcount106(uint32_t x) {\n x = (x & 0x55555555u) + ((x >> 1) & 0x55555555u);\n x = (x & 0x33333333u) + ((x >> 2) & 0x33333333u);\n x = (x & 0x0F0F0F0Fu) + ((x >> 4) & 0x0F0F0F0Fu);\n x = (x & 0x00FF00FFu) + ((x >> 8) & 0x00FF00FFu);\n x = (x & 0x0000FFFFu) + ((x >> 16) & 0x0000FFFFu);\n return x;\n}\nstatic uint32_t compress106(uint32_t x, uint32_t m) {\n uint32_t mk, mp, mv, t;\n x = x & m;\n mk = ~m << 1;\n for (int i = 0; i < 5; i++) {\n mp = mk ^ (mk << 1);\n mp = mp ^ (mp << 2);\n mp = mp ^ (mp << 4);\n mp = mp ^ (mp << 8);\n mp = mp ^ (mp << 16);\n mv = mp & m;\n m = (m ^ mv) | (mv >> (1 << i));\n t = x & mv;\n x = (x ^ t) | (t >> (1 << i));\n mk = mk & ~mp;\n }\n return x;\n}\nstatic uint32_t sag106(uint32_t x, uint32_t m) {\n return (compress106(x, m) << popcount106(m)) | compress106(x, ~m);\n}\nstatic uint32_t permute106(uint32_t x, uint32_t p[5]) {\n x = sag106(x, p[0]);\n x = sag106(x, p[1]);\n x = sag106(x, p[2]);\n x = sag106(x, p[3]);\n return sag106(x, p[4]);\n}\nextern \"C\" void inner_loop_106(struct loop_106_data *data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n int64_t n = data->n;\n uint32_t permutation[5] = {0xaaaaaaaau, 0xccccccccu, 0x0f0f0f0fu, 0x0ff00ff0u, 0x0ffff000u};\n uint32_t p[5];\n p[0] = permutation[0];\n p[1] = sag106(permutation[1], permutation[0]);\n p[2] = sag106(permutation[2], permutation[0]);\n p[3] = sag106(permutation[3], permutation[0]);\n p[4] = sag106(permutation[4], permutation[0]);\n for (int64_t i = 0; i < n; i++) b[i] = permute106(a[i], p);\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_106. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_108/reference_loop_108.json b/solutions/simd-loop/reference/loop_108/reference_loop_108.json new file mode 100644 index 0000000000000000000000000000000000000000..e23c875352b539491f5242b5553247bd1b3c38c0 --- /dev/null +++ b/solutions/simd-loop/reference/loop_108/reference_loop_108.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_108", + "definition": "loop_108", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_108", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_108.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_108_data {\n uint32_t *rgba;\n uint8_t *y;\n int64_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_108(void *rgba, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_108.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_108.h\"\n#include \n\nextern \"C\" void inner_loop_108(struct loop_108_data *data);\n\nextern \"C\" int armbench_entry_loop_108(void *rgba, int64_t n, void *res_out) {\n struct loop_108_data data;\n data.rgba = static_cast(rgba);\n data.y = static_cast(res_out);\n data.n = static_cast(n);\n inner_loop_108(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_108.h\"\n#include \n\nextern \"C\" void inner_loop_108(struct loop_108_data *data) {\n uint32_t *rgba = data->rgba;\n uint8_t *y = data->y;\n int64_t n = data->n;\n for (int64_t i = 0; i < n; i++) {\n y[i] = (rgba[i] >> 24) >> 2;\n y[i] += ((rgba[i] >> 16) & 0xff) >> 1;\n y[i] += ((rgba[i] >> 16) & 0xff) >> 3;\n y[i] += ((rgba[i] >> 8) & 0xff) >> 3;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_108. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_109/reference_loop_109.json b/solutions/simd-loop/reference/loop_109/reference_loop_109.json new file mode 100644 index 0000000000000000000000000000000000000000..a43731f68b89252887d4ad347c5cc6d95c06dc49 --- /dev/null +++ b/solutions/simd-loop/reference/loop_109/reference_loop_109.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_109", + "definition": "loop_109", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_109", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_109.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { uint32_t re; uint32_t im; } cuint32_t;\n\nstruct loop_109_data {\n cuint32_t *a0;\n cuint32_t *b0;\n cuint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_109(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_109.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_109.h\"\n#include \n\nextern \"C\" void inner_loop_109(struct loop_109_data *data);\n\nextern \"C\" int armbench_entry_loop_109(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_109_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_109(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_109.h\"\n#include \n\nextern \"C\" void inner_loop_109(struct loop_109_data *data) {\n cuint32_t *a = data->a0; cuint32_t *b = data->b0; cuint32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = a[i].re - b[i].im;\n c[i].im = a[i].im + b[i].re;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_109. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_110/reference_loop_110.json b/solutions/simd-loop/reference/loop_110/reference_loop_110.json new file mode 100644 index 0000000000000000000000000000000000000000..1a302a770274d6b8fbc89484a096d4a78b1c24bd --- /dev/null +++ b/solutions/simd-loop/reference/loop_110/reference_loop_110.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_110", + "definition": "loop_110", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_110", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_110.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { int8_t re; int8_t im; } cint8_t;\ntypedef struct { int32_t re; int32_t im; } cint32_t;\n\nstruct loop_110_data {\n cint8_t *a0;\n cint8_t *b0;\n cint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_110(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_110.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_110.h\"\n#include \n\nextern \"C\" void inner_loop_110(struct loop_110_data *data);\n\nextern \"C\" int armbench_entry_loop_110(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_110_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_110(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_110.h\"\n#include \n\nextern \"C\" void inner_loop_110(struct loop_110_data *data) {\n cint8_t *a = data->a0; cint8_t *b = data->b0; cint32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = (int32_t)(((a[2*i].re * b[2*i].re) - (a[2*i].im * b[2*i].im)) +\n ((a[2*i+1].re * b[2*i+1].re) - (a[2*i+1].im * b[2*i+1].im)));\n c[i].im = (int32_t)(((a[2*i].im * b[2*i].re) + (a[2*i].re * b[2*i].im)) +\n ((a[2*i+1].im * b[2*i+1].re) + (a[2*i+1].re * b[2*i+1].im)));\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_110. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_112/reference_loop_112.json b/solutions/simd-loop/reference/loop_112/reference_loop_112.json new file mode 100644 index 0000000000000000000000000000000000000000..78b2f263be2f1fde22e700451f32a9d197ab4a68 --- /dev/null +++ b/solutions/simd-loop/reference/loop_112/reference_loop_112.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_112", + "definition": "loop_112", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_112", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_112.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\ntypedef struct { uint32_t re; uint32_t im; } cuint32_t;\n\nstruct loop_112_data {\n cuint32_t *a0;\n cuint32_t *b0;\n cuint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_112(void *a0, void *b0, int64_t size, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_112.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_112.h\"\n#include \n\nextern \"C\" void inner_loop_112(struct loop_112_data *data);\n\nextern \"C\" int armbench_entry_loop_112(void *a0, void *b0, int64_t size, void *res_out) {\n struct loop_112_data _kd;\n _kd.a0 = static_cast(a0);\n _kd.b0 = static_cast(b0);\n _kd.c0 = static_cast(res_out);\n _kd.size = static_cast(size);\n inner_loop_112(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_112.h\"\n#include \n\nextern \"C\" void inner_loop_112(struct loop_112_data *data) {\n cuint32_t *a = data->a0; cuint32_t *b = data->b0; cuint32_t *c = data->c0;\n uint64_t size = data->size;\n for (uint64_t i = 0; i < size; i++) {\n c[i].re = (a[i].re * b[i].re) - (a[i].im * b[i].im);\n c[i].im = (a[i].re * b[i].im) + (a[i].im * b[i].re);\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_112. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_113/reference_loop_113.json b/solutions/simd-loop/reference/loop_113/reference_loop_113.json new file mode 100644 index 0000000000000000000000000000000000000000..b6d8b5c0324836eceefccb9b792d6f12192d9882 --- /dev/null +++ b/solutions/simd-loop/reference/loop_113/reference_loop_113.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_113", + "definition": "loop_113", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_113", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_113.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_113_data {\n uint32_t *a0;\n uint32_t *b0;\n uint32_t *c0;\n uint64_t size;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_113(void *a0, void *b0, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_113.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_113.h\"\n#include \n\nextern \"C\" void inner_loop_113(struct loop_113_data *data);\n\nextern \"C\" int armbench_entry_loop_113(void *a0, void *b0, int64_t n, void *res_out) {\n struct loop_113_data data;\n data.a0 = static_cast(a0);\n data.b0 = static_cast(b0);\n data.c0 = static_cast(res_out);\n data.size = static_cast(n);\n inner_loop_113(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_113.h\"\n#include \n\nextern \"C\" void inner_loop_113(struct loop_113_data * input) {\n uint32_t * a = input->a0;\n uint32_t * b = input->b0;\n uint32_t * c = input->c0;\n uint64_t size = input->size;\n\n uint64_t i;\n\n for (i = 0; i < size; i += 2) {\n c[i] = a[i] + a[i + 1];\n c[i + 1] = b[i] + b[i + 1];\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_113. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_114/reference_loop_114.json b/solutions/simd-loop/reference/loop_114/reference_loop_114.json new file mode 100644 index 0000000000000000000000000000000000000000..d423e5fd91927b00c1aa5b3564eedb27cb54d8cb --- /dev/null +++ b/solutions/simd-loop/reference/loop_114/reference_loop_114.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_114", + "definition": "loop_114", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_114", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_114.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_114_data {\n int16_t *data;\n int16_t *res;\n int32_t n;\n int32_t lags;\n int16_t scale;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_114(void *data, int64_t n, int64_t lags, int64_t scale, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_114.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_114.h\"\n#include \n\nextern \"C\" void inner_loop_114(struct loop_114_data *data);\n\nextern \"C\" int armbench_entry_loop_114(void *data, int64_t n, int64_t lags, int64_t scale, void *res_out) {\n struct loop_114_data _kd;\n _kd.data = static_cast(data);\n _kd.res = static_cast(res_out);\n _kd.n = static_cast(n);\n _kd.lags = static_cast(lags);\n _kd.scale = static_cast(scale);\n inner_loop_114(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_114.h\"\n#include \n\nextern \"C\" void inner_loop_114(struct loop_114_data *data) {\n int16_t *d = data->data;\n int16_t *res = data->res;\n int32_t n = data->n;\n int32_t lags = data->lags;\n int16_t scale = data->scale;\n for (int lag = 0; lag < lags; lag++) {\n int32_t acc = 0;\n int lmt = n - lag;\n for (int i = 0; i < lmt; i++)\n acc += ((int32_t)d[i] * (int32_t)d[i + lag]) >> scale;\n res[lag] = (int16_t)(acc >> 16);\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_114. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_120/reference_loop_120.json b/solutions/simd-loop/reference/loop_120/reference_loop_120.json new file mode 100644 index 0000000000000000000000000000000000000000..5bb0ed856961023d8166e1bd26e067d4f87e48d8 --- /dev/null +++ b/solutions/simd-loop/reference/loop_120/reference_loop_120.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_120", + "definition": "loop_120", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_120", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_120.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_120_data {\n int32_t *data;\n uint32_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_120(void *data, int64_t n, void *unused);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_120.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_120.h\"\n#include \n\nextern \"C\" void inner_loop_120(struct loop_120_data *data);\n\nextern \"C\" int armbench_entry_loop_120(void *data, int64_t n, void *unused) {\n struct loop_120_data d;\n d.n = static_cast(n);\n d.data = static_cast(data);\n inner_loop_120(&d);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_120.h\"\n#include \n\nextern \"C\" void inner_loop_120(struct loop_120_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_120. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_121/reference_loop_121.json b/solutions/simd-loop/reference/loop_121/reference_loop_121.json new file mode 100644 index 0000000000000000000000000000000000000000..c1f2af4d403dede15e5ead00a0a6ab5365996d0a --- /dev/null +++ b/solutions/simd-loop/reference/loop_121/reference_loop_121.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_121", + "definition": "loop_121", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_121", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_121.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_121_data {\n int32_t *data;\n int32_t *temp;\n uint32_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_121(void *data, void *temp, int64_t n, void *unused);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_121.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_121.h\"\n#include \n\nextern \"C\" void inner_loop_121(struct loop_121_data *data);\n\nextern \"C\" int armbench_entry_loop_121(void *data, void *temp, int64_t n, void *unused) {\n struct loop_121_data d;\n d.n = static_cast(n);\n d.data = static_cast(data);\n d.temp = static_cast(temp);\n inner_loop_121(&d);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_121.h\"\n#include \n\nextern \"C\" void inner_loop_121(struct loop_121_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_121. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_122/reference_loop_122.json b/solutions/simd-loop/reference/loop_122/reference_loop_122.json new file mode 100644 index 0000000000000000000000000000000000000000..c29cbd059b43a19b93eba83879c45796874fd3f9 --- /dev/null +++ b/solutions/simd-loop/reference/loop_122/reference_loop_122.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_122", + "definition": "loop_122", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_122", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_122.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_122_data {\n int32_t *data;\n uint32_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_122(void *data, int64_t n, void *unused);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_122.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_122.h\"\n#include \n\nextern \"C\" void inner_loop_122(struct loop_122_data *data);\n\nextern \"C\" int armbench_entry_loop_122(void *data, int64_t n, void *unused) {\n struct loop_122_data d;\n d.n = static_cast(n);\n d.data = static_cast(data);\n inner_loop_122(&d);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_122.h\"\n#include \n\nextern \"C\" void inner_loop_122(struct loop_122_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_122. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_123/reference_loop_123.json b/solutions/simd-loop/reference/loop_123/reference_loop_123.json new file mode 100644 index 0000000000000000000000000000000000000000..79f3c8211488213ab8b6b67aa176c4d3da7a6e69 --- /dev/null +++ b/solutions/simd-loop/reference/loop_123/reference_loop_123.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_123", + "definition": "loop_123", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_123", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_123.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_123_data {\n int32_t *data;\n int32_t *temp;\n uint32_t *block_sizes;\n uint32_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_123(void *data, void *temp, void *block_sizes, int64_t n, void *unused);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_123.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_123.h\"\n#include \n\nextern \"C\" void inner_loop_123(struct loop_123_data *data);\n\nextern \"C\" int armbench_entry_loop_123(void *data, void *temp, void *block_sizes, int64_t n, void *unused) {\n struct loop_123_data d;\n d.n = static_cast(n);\n d.data = static_cast(data);\n d.temp = static_cast(temp);\n d.block_sizes = static_cast(block_sizes);\n inner_loop_123(&d);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_123.h\"\n#include \n\nextern \"C\" void inner_loop_123(struct loop_123_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_123. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_124/reference_loop_124.json b/solutions/simd-loop/reference/loop_124/reference_loop_124.json new file mode 100644 index 0000000000000000000000000000000000000000..f95a3074204e525ee1e51bb2dde4689721b604b8 --- /dev/null +++ b/solutions/simd-loop/reference/loop_124/reference_loop_124.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_124", + "definition": "loop_124", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_124", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_124.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_124_data {\n int32_t *data;\n int32_t *temp;\n uint32_t *hist;\n uint32_t *prfx;\n uint32_t n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_124(void *data, void *temp, void *hist, void *prfx, int64_t n, void *unused);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_124.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_124.h\"\n#include \n\nextern \"C\" void inner_loop_124(struct loop_124_data *data);\n\nextern \"C\" int armbench_entry_loop_124(void *data, void *temp, void *hist, void *prfx, int64_t n, void *unused) {\n struct loop_124_data d;\n d.n = static_cast(n);\n d.data = static_cast(data);\n d.temp = static_cast(temp);\n d.hist = static_cast(hist);\n d.prfx = static_cast(prfx);\n inner_loop_124(&d);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_124.h\"\n#include \n\nextern \"C\" void inner_loop_124(struct loop_124_data *data) {\n std::sort(data->data, data->data + data->n);\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_124. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_126/reference_loop_126.json b/solutions/simd-loop/reference/loop_126/reference_loop_126.json new file mode 100644 index 0000000000000000000000000000000000000000..1782a1a1d8b7e8a6a4e20396dd91da7ca8b6b5d8 --- /dev/null +++ b/solutions/simd-loop/reference/loop_126/reference_loop_126.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_126", + "definition": "loop_126", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_126", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_126.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_126_data {\n uint32_t *a;\n uint32_t *b;\n int n;\n uint32_t res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_126(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_126.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_126.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_126(struct loop_126_data *data);\n\nextern \"C\" int armbench_entry_loop_126(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_126_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0u;\n inner_loop_126(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_126.h\"\n#include \n\nextern \"C\" void inner_loop_126(struct loop_126_data * data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n int n = data->n;\n\n uint32_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n if (res % 2) {\n res++;\n }\n }\n data->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_126. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_127/reference_loop_127.json b/solutions/simd-loop/reference/loop_127/reference_loop_127.json new file mode 100644 index 0000000000000000000000000000000000000000..ca928d489ca9f3f12e12251c5033c6041f8e36f1 --- /dev/null +++ b/solutions/simd-loop/reference/loop_127/reference_loop_127.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_127", + "definition": "loop_127", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_127", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_127.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_127_data {\n uint32_t *a;\n uint32_t *b;\n int n;\n uint32_t res;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_127(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_127.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_127.h\"\n#include \n#include \n\nextern \"C\" void inner_loop_127(struct loop_127_data *data);\n\nextern \"C\" int armbench_entry_loop_127(void *a, void *b, int64_t n, void *res_out) {\n if (n < 0 || n > std::numeric_limits::max()) return -1;\n struct loop_127_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.n = static_cast(n);\n data.res = 0u;\n inner_loop_127(&data);\n *static_cast(res_out) = data.res;\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_127.h\"\n#include \n\nextern \"C\" void inner_loop_127(struct loop_127_data * data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n int n = data->n;\n\n uint32_t res = 0;\n for (int i = 0; i < n; i++) {\n res += a[i] * b[i];\n if (a[i] == 512) {\n break;\n }\n }\n data->res = res;\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_127. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_128/reference_loop_128.json b/solutions/simd-loop/reference/loop_128/reference_loop_128.json new file mode 100644 index 0000000000000000000000000000000000000000..3be779e6634cb8c42ac1c959043a40da573e41f9 --- /dev/null +++ b/solutions/simd-loop/reference/loop_128/reference_loop_128.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_128", + "definition": "loop_128", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_128", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_128.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_128_data {\n uint32_t *a;\n uint32_t *b;\n uint32_t *c;\n int n;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_128(void *a, void *b, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_128.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_128.h\"\n#include \n\nextern \"C\" void inner_loop_128(struct loop_128_data *data);\n\nextern \"C\" int armbench_entry_loop_128(void *a, void *b, int64_t n, void *res_out) {\n struct loop_128_data data;\n data.a = static_cast(a);\n data.b = static_cast(b);\n data.c = static_cast(res_out);\n data.n = static_cast(n);\n inner_loop_128(&data);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_128.h\"\n#include \n\nextern \"C\" void inner_loop_128(struct loop_128_data * data) {\n uint32_t *a = data->a;\n uint32_t *b = data->b;\n uint32_t *c = data->c;\n int n = data->n;\n\n for (int i = 0; i < n; i++) {\n c[i] = a[i] + b[i];\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_128. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_130/reference_loop_130.json b/solutions/simd-loop/reference/loop_130/reference_loop_130.json new file mode 100644 index 0000000000000000000000000000000000000000..d92d7e87fa7b475f78b8ff911bb3ee64303429d0 --- /dev/null +++ b/solutions/simd-loop/reference/loop_130/reference_loop_130.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_130", + "definition": "loop_130", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_130", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_130.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_130_data {\n uint64_t m;\n uint64_t n;\n uint64_t k;\n float *a;\n float *b;\n float *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_130(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_130.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_130.h\"\n#include \n\nextern \"C\" void inner_loop_130(struct loop_130_data *data);\n\nextern \"C\" int armbench_entry_loop_130(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out) {\n struct loop_130_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n _kd.k = static_cast(k);\n inner_loop_130(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_130.h\"\n#include \n\nextern \"C\" void inner_loop_130(struct loop_130_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint64_t k = data->k;\n float *a = data->a;\n float *b = data->b;\n float *c = data->c;\n for (uint64_t y = 0; y < m; y++) {\n for (uint64_t x = 0; x < n; x++) {\n float d = 0;\n for (uint64_t z = 0; z < k; z++) d += a[y * k + z] * b[z * n + x];\n c[y * n + x] = d;\n }\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_130. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_135/reference_loop_135.json b/solutions/simd-loop/reference/loop_135/reference_loop_135.json new file mode 100644 index 0000000000000000000000000000000000000000..5746061a7e986aa86c3354b0896a169fd626daeb --- /dev/null +++ b/solutions/simd-loop/reference/loop_135/reference_loop_135.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_135", + "definition": "loop_135", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_135", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_135.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_135_data {\n uint64_t m;\n uint64_t n;\n uint64_t k;\n int8_t *a;\n int8_t *b;\n int32_t *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_135(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_135.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_135.h\"\n#include \n\nextern \"C\" void inner_loop_135(struct loop_135_data *data);\n\nextern \"C\" int armbench_entry_loop_135(void *a, void *b, int64_t m, int64_t n, int64_t k, void *res_out) {\n struct loop_135_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n _kd.k = static_cast(k);\n inner_loop_135(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_135.h\"\n#include \n\nextern \"C\" void inner_loop_135(struct loop_135_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint64_t k = data->k;\n int8_t *a = data->a;\n int8_t *b = data->b;\n int32_t *c = data->c;\n for (uint64_t x = 0; x < m; x++) {\n for (uint64_t y = 0; y < n; y++) {\n int32_t acc = 0;\n for (uint64_t z = 0; z < k; z++)\n acc += (int32_t)a[x * k + z] * (int32_t)b[z * n + y];\n c[x * n + y] = acc;\n }\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_135. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_216/reference_loop_216.json b/solutions/simd-loop/reference/loop_216/reference_loop_216.json new file mode 100644 index 0000000000000000000000000000000000000000..ea5d983ea38cf43c196bdd700739efe72c6c231f --- /dev/null +++ b/solutions/simd-loop/reference/loop_216/reference_loop_216.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_216", + "definition": "loop_216", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_216", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_216.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_216_data {\n uint64_t m;\n uint64_t n;\n float *a;\n float *x;\n float *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_216(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_216.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_216.h\"\n#include \n\nextern \"C\" void inner_loop_216(struct loop_216_data *data);\n\nextern \"C\" int armbench_entry_loop_216(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_216_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_216(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_216.h\"\n#include \n\nextern \"C\" void inner_loop_216(struct loop_216_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n float *a = data->a;\n float *x = data->x;\n float *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n float d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(m * j) + i] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_216. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_217/reference_loop_217.json b/solutions/simd-loop/reference/loop_217/reference_loop_217.json new file mode 100644 index 0000000000000000000000000000000000000000..c3a6adb8dd7445cfea14053ea965ff4c7a776a91 --- /dev/null +++ b/solutions/simd-loop/reference/loop_217/reference_loop_217.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_217", + "definition": "loop_217", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_217", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_217.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_217_data {\n uint64_t m;\n uint64_t n;\n uint8_t *a;\n uint8_t *b;\n uint32_t *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_217(void *a, void *b, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_217.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_217.h\"\n#include \n\nextern \"C\" void inner_loop_217(struct loop_217_data *data);\n\nextern \"C\" int armbench_entry_loop_217(void *a, void *b, int64_t m, int64_t n, void *res_out) {\n struct loop_217_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_217(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_217.h\"\n#include \n\nextern \"C\" void inner_loop_217(struct loop_217_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint8_t *a = data->a;\n uint8_t *b = data->b;\n uint32_t *c = data->c;\n for (uint64_t y = 0; y < m; y++) {\n uint32_t d = 0;\n for (uint64_t x = 0; x < n; x++) d += (uint32_t)a[y * n + x] * (uint32_t)b[x];\n c[y] = d;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_217. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_218/reference_loop_218.json b/solutions/simd-loop/reference/loop_218/reference_loop_218.json new file mode 100644 index 0000000000000000000000000000000000000000..6288b96967f7720f42cb258be124a44e76c2dbf3 --- /dev/null +++ b/solutions/simd-loop/reference/loop_218/reference_loop_218.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_218", + "definition": "loop_218", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_218", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_218.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_218_data {\n uint64_t m;\n uint64_t n;\n double *a;\n double *x;\n double *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_218(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_218.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_218.h\"\n#include \n\nextern \"C\" void inner_loop_218(struct loop_218_data *data);\n\nextern \"C\" int armbench_entry_loop_218(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_218_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_218(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_218.h\"\n#include \n\nextern \"C\" void inner_loop_218(struct loop_218_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n double *a = data->a;\n double *x = data->x;\n double *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n double d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(m * j) + i] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_218. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_219/reference_loop_219.json b/solutions/simd-loop/reference/loop_219/reference_loop_219.json new file mode 100644 index 0000000000000000000000000000000000000000..d88a16f7947e209e589b2cbe5378108671c148a7 --- /dev/null +++ b/solutions/simd-loop/reference/loop_219/reference_loop_219.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_219", + "definition": "loop_219", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_219", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_219.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_219_data {\n uint64_t m;\n uint64_t n;\n uint8_t *a;\n uint8_t *b;\n uint32_t *c;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_219(void *a, void *b, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_219.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_219.h\"\n#include \n\nextern \"C\" void inner_loop_219(struct loop_219_data *data);\n\nextern \"C\" int armbench_entry_loop_219(void *a, void *b, int64_t m, int64_t n, void *res_out) {\n struct loop_219_data _kd;\n _kd.a = static_cast(a);\n _kd.b = static_cast(b);\n _kd.c = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_219(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_219.h\"\n#include \n\nextern \"C\" void inner_loop_219(struct loop_219_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint8_t *a = data->a;\n uint8_t *b = data->b;\n uint32_t *c = data->c;\n for (uint64_t y = 0; y < m; y++) {\n uint32_t d = 0;\n for (uint64_t x = 0; x < n; x++) d += (uint32_t)a[x * m + y] * (uint32_t)b[x];\n c[y] = d;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_219. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_220/reference_loop_220.json b/solutions/simd-loop/reference/loop_220/reference_loop_220.json new file mode 100644 index 0000000000000000000000000000000000000000..c369d1bbd00c64fd7c97ac5745b4bd89e0e57ef1 --- /dev/null +++ b/solutions/simd-loop/reference/loop_220/reference_loop_220.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_220", + "definition": "loop_220", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_220", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_220.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_220_data {\n uint64_t m;\n uint64_t n;\n float *a;\n float *x;\n float *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_220(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_220.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_220.h\"\n#include \n\nextern \"C\" void inner_loop_220(struct loop_220_data *data);\n\nextern \"C\" int armbench_entry_loop_220(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_220_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_220(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_220.h\"\n#include \n\nextern \"C\" void inner_loop_220(struct loop_220_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n float *a = data->a;\n float *x = data->x;\n float *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n float d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(i * n) + j] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_220. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_221/reference_loop_221.json b/solutions/simd-loop/reference/loop_221/reference_loop_221.json new file mode 100644 index 0000000000000000000000000000000000000000..8ab1f8a31bc79486187dd1551f00e6280c8a4718 --- /dev/null +++ b/solutions/simd-loop/reference/loop_221/reference_loop_221.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_221", + "definition": "loop_221", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_221", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_221.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_221_data {\n uint64_t m;\n uint64_t n;\n double *a;\n double *x;\n double *b;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_221(void *a, void *x, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_221.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_221.h\"\n#include \n\nextern \"C\" void inner_loop_221(struct loop_221_data *data);\n\nextern \"C\" int armbench_entry_loop_221(void *a, void *x, int64_t m, int64_t n, void *res_out) {\n struct loop_221_data _kd;\n _kd.a = static_cast(a);\n _kd.x = static_cast(x);\n _kd.b = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_221(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_221.h\"\n#include \n\nextern \"C\" void inner_loop_221(struct loop_221_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n double *a = data->a;\n double *x = data->x;\n double *b = data->b;\n for (uint64_t i = 0; i < m; i++) {\n double d = 0;\n for (uint64_t j = 0; j < n; j++) d += a[(i * n) + j] * x[j];\n b[i] = d;\n }\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_221. Baseline for speedup measurement." +} diff --git a/solutions/simd-loop/reference/loop_223/reference_loop_223.json b/solutions/simd-loop/reference/loop_223/reference_loop_223.json new file mode 100644 index 0000000000000000000000000000000000000000..a86871ad3ebd8d38d2c6500191ed6bdc6c8b0bee --- /dev/null +++ b/solutions/simd-loop/reference/loop_223/reference_loop_223.json @@ -0,0 +1,37 @@ +{ + "name": "reference_loop_223", + "definition": "loop_223", + "dataset": "simd-loop", + "author": "reference", + "spec": { + "language": "cpp", + "target_hardware": [ + "aarch64" + ], + "entry_point": "kernel.cpp::inner_loop_223", + "dependencies": [], + "isa_features": [], + "compile_flags": [ + "-O2", + "-std=c++14", + "-fno-vectorize", + "-fno-slp-vectorize" + ], + "link_flags": [] + }, + "sources": [ + { + "path": "loop_223.h", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#pragma once\n#include \n\nstruct loop_223_data {\n uint64_t m;\n uint64_t n;\n uint32_t *a;\n uint32_t *at;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint armbench_entry_loop_223(void *a, int64_t m, int64_t n, void *res_out);\n#ifdef __cplusplus\n}\n#endif\n" + }, + { + "path": "loop_223.cpp", + "content": "// Auto-generated by scripts/gen_simd_loop_harness.py \u2014 do not hand-edit.\n#include \"loop_223.h\"\n#include \n\nextern \"C\" void inner_loop_223(struct loop_223_data *data);\n\nextern \"C\" int armbench_entry_loop_223(void *a, int64_t m, int64_t n, void *res_out) {\n struct loop_223_data _kd;\n _kd.a = static_cast(a);\n _kd.at = static_cast(res_out);\n _kd.m = static_cast(m);\n _kd.n = static_cast(n);\n inner_loop_223(&_kd);\n return 0;\n}\n" + }, + { + "path": "kernel.cpp", + "content": "#include \"loop_223.h\"\n#include \n\nextern \"C\" void inner_loop_223(struct loop_223_data *data) {\n uint64_t m = data->m;\n uint64_t n = data->n;\n uint32_t *a = data->a;\n uint32_t *at = data->at;\n for (uint64_t i = 0; i < m; i++)\n for (uint64_t j = 0; j < n; j++)\n at[j * m + i] = a[i * n + j];\n}\n" + } + ], + "description": "Scalar reference (auto-vectorization disabled) for loop_223. Baseline for speedup measurement." +} diff --git a/traces/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.jsonl b/traces/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.jsonl deleted file mode 100644 index 9b4873ebf97fb10881eb9b4ae475dcd62929aba3..0000000000000000000000000000000000000000 --- a/traces/conv1d/conv1d_kw1_sw1_dw1_cout512_p0.jsonl +++ /dev/null @@ -1,20 +0,0 @@ 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a/traces/loop_033/loop_033.jsonl +++ /dev/null @@ -1,6 +0,0 @@ -{"definition":"loop_033","workload":{"axes":{"N":1},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"8557c066b9385ad697afbd6e23979f61","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_033","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:19.574471+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":760,"p5_ns":761,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":3543,"instructions":9528,"ipc":2.689,"cache_misses":16.54,"reference_cycles":null}}} -{"definition":"loop_033","workload":{"axes":{"N":3},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"c31980a0567a5c27b55f9e671e3e04c4","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_033","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:19.574471+00:00","log":"","correctness":{"max_relative_error":1.5550425631919803e-16,"max_absolute_error":5.551115123125783e-17,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":756,"p5_ns":760,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":3396,"instructions":9539,"ipc":2.8089,"cache_misses":16.16,"reference_cycles":null}}} -{"definition":"loop_033","workload":{"axes":{"N":2999},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"9d667b430c8c5549b52f339ec93b1a7f","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_033","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:19.574471+00:00","log":"","correctness":{"max_relative_error":3.284794759496207e-15,"max_absolute_error":4.085620730620576e-14,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":3101,"p5_ns":3106,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":9521,"instructions":20029,"ipc":2.1036,"cache_misses":169.98,"reference_cycles":null}}} -{"definition":"loop_033","workload":{"axes":{"N":3001},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"ecdf3e7918315138a0952bfc1c8bf290","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_033","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:19.574471+00:00","log":"","correctness":{"max_relative_error":4.2439590093939196e-15,"max_absolute_error":8.881784197001252e-14,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":3092,"p5_ns":3097,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":9402,"instructions":20032,"ipc":2.1306,"cache_misses":171.16,"reference_cycles":null}}} -{"definition":"loop_033","workload":{"axes":{"N":8000000},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"60dfe8bb5b0857f4861ff055601fbb91","tags":{"source":"perf"},"description":null},"solution":"reference-scalar_loop_033","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:19.574471+00:00","log":"","correctness":{"max_relative_error":6.074471642568212e-14,"max_absolute_error":2.3590018827235326e-11,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":6199646,"p5_ns":6201707,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":16112311,"instructions":28055762,"ipc":1.7413,"cache_misses":5095.32,"reference_cycles":null}}} -{"definition":"loop_033","workload":{"axes":{"N":32000000},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"0deb322ce3115fa0a390d30abeb7e771","tags":{"source":"perf"},"description":null},"solution":"reference-scalar_loop_033","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:19.574471+00:00","log":"","correctness":{"max_relative_error":4.537945700779778e-13,"max_absolute_error":1.3301360013429075e-10,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":24782261,"p5_ns":24786690,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":64340846,"instructions":112188992,"ipc":1.7437,"cache_misses":18989.14,"reference_cycles":null}}} diff --git a/traces/loop_035/loop_035.jsonl b/traces/loop_035/loop_035.jsonl deleted file mode 100644 index 54860d30a2562b6f77543e6b04333e9a3cd83414..0000000000000000000000000000000000000000 --- a/traces/loop_035/loop_035.jsonl +++ /dev/null @@ -1,6 +0,0 @@ -{"definition":"loop_035","workload":{"axes":{"N":1},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"edf3063d2543527c9d92cb158f02d1ba","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_035","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:21.875687+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":769,"p5_ns":770,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":4090,"instructions":9682,"ipc":2.3669,"cache_misses":25.7,"reference_cycles":null}}} -{"definition":"loop_035","workload":{"axes":{"N":7},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"ec3ccb1d36d85386b98f88d8d28424fb","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_035","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:21.875687+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":766,"p5_ns":770,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":3339,"instructions":9590,"ipc":2.8723,"cache_misses":17.9,"reference_cycles":null}}} -{"definition":"loop_035","workload":{"axes":{"N":9999},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"c07f949b2d1655429cfacf134144ed9a","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_035","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:21.875687+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":2091,"p5_ns":2098,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":7568,"instructions":22245,"ipc":2.9393,"cache_misses":384.66,"reference_cycles":null}}} -{"definition":"loop_035","workload":{"axes":{"N":10001},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"c000abcb0b9f55d3a474f5c5d1a57b9f","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_035","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:21.875687+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":2098,"p5_ns":2119,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":7091,"instructions":22034,"ipc":3.1071,"cache_misses":379.9,"reference_cycles":null}}} -{"definition":"loop_035","workload":{"axes":{"N":4000000},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"47a35c4ec9b05981a2642f052146f91a","tags":{"source":"perf"},"description":null},"solution":"reference-scalar_loop_035","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:21.875687+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":779146,"p5_ns":783247,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":2088298,"instructions":5015701,"ipc":2.4018,"cache_misses":340993.56,"reference_cycles":null}}} -{"definition":"loop_035","workload":{"axes":{"N":16000000},"inputs":{"a":{"type":"random"},"b":{"type":"random"}},"uuid":"0e670d83c32952f399747f68a3287d7d","tags":{"source":"perf"},"description":null},"solution":"reference-scalar_loop_035","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:21.875687+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":3749333,"p5_ns":3753974,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":9854209,"instructions":20036858,"ipc":2.0333,"cache_misses":1439062.86,"reference_cycles":null}}} diff --git a/traces/loop_108/loop_108.jsonl b/traces/loop_108/loop_108.jsonl deleted file mode 100644 index 90bedd9d24721d6aaea4e77d1a726d1cedd00ebd..0000000000000000000000000000000000000000 --- a/traces/loop_108/loop_108.jsonl +++ /dev/null @@ -1,6 +0,0 @@ -{"definition":"loop_108","workload":{"axes":{"N":1},"inputs":{"rgba":{"type":"random"}},"uuid":"9e355256598e5974ada0e65a89d513ba","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_108","evaluation":{"status":"RUNTIME_ERROR","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.592128+00:00","log":"gen_inputs failed: dtype DType.UINT32 not yet supported by inputs.py\nTraceback (most recent call last):\n File \"/home/ubuntu/arm-bench/bench/evaluators/default.py\", line 51, in build_baseline\n np_inputs = gen_inputs_for_workload(definition, workload)\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 160, in gen_inputs_for_workload\n out[tname] = _gen_random_tensor(shape, _dtype_to_np(tspec.dtype), rng)\n ^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 124, in _dtype_to_np\n raise NotImplementedError(f\"dtype {dt} not yet supported by inputs.py\")\nNotImplementedError: dtype DType.UINT32 not yet supported by inputs.py\n","correctness":null,"performance":null}} -{"definition":"loop_108","workload":{"axes":{"N":7},"inputs":{"rgba":{"type":"random"}},"uuid":"5426013671ee59d1a0599ea232ba73e8","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_108","evaluation":{"status":"RUNTIME_ERROR","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.592128+00:00","log":"gen_inputs failed: dtype DType.UINT32 not yet supported by inputs.py\nTraceback (most recent call last):\n File \"/home/ubuntu/arm-bench/bench/evaluators/default.py\", line 51, in build_baseline\n np_inputs = gen_inputs_for_workload(definition, workload)\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 160, in gen_inputs_for_workload\n out[tname] = _gen_random_tensor(shape, _dtype_to_np(tspec.dtype), rng)\n ^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 124, in _dtype_to_np\n raise NotImplementedError(f\"dtype {dt} not yet supported by inputs.py\")\nNotImplementedError: dtype DType.UINT32 not yet supported by inputs.py\n","correctness":null,"performance":null}} -{"definition":"loop_108","workload":{"axes":{"N":9999},"inputs":{"rgba":{"type":"random"}},"uuid":"ac8ed2981cad59b1aeb36b2c70786bb0","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_108","evaluation":{"status":"RUNTIME_ERROR","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.592128+00:00","log":"gen_inputs failed: dtype DType.UINT32 not yet supported by inputs.py\nTraceback (most recent call last):\n File \"/home/ubuntu/arm-bench/bench/evaluators/default.py\", line 51, in build_baseline\n np_inputs = gen_inputs_for_workload(definition, workload)\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 160, in gen_inputs_for_workload\n out[tname] = _gen_random_tensor(shape, _dtype_to_np(tspec.dtype), rng)\n ^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 124, in _dtype_to_np\n raise NotImplementedError(f\"dtype {dt} not yet supported by inputs.py\")\nNotImplementedError: dtype DType.UINT32 not yet supported by inputs.py\n","correctness":null,"performance":null}} -{"definition":"loop_108","workload":{"axes":{"N":10001},"inputs":{"rgba":{"type":"random"}},"uuid":"34466b56eb3b5952acc996b0a9667d3d","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_108","evaluation":{"status":"RUNTIME_ERROR","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.592128+00:00","log":"gen_inputs failed: dtype DType.UINT32 not yet supported by inputs.py\nTraceback (most recent call last):\n File \"/home/ubuntu/arm-bench/bench/evaluators/default.py\", line 51, in build_baseline\n np_inputs = gen_inputs_for_workload(definition, workload)\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 160, in gen_inputs_for_workload\n out[tname] = _gen_random_tensor(shape, _dtype_to_np(tspec.dtype), rng)\n ^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 124, in _dtype_to_np\n raise NotImplementedError(f\"dtype {dt} not yet supported by inputs.py\")\nNotImplementedError: dtype DType.UINT32 not yet supported by inputs.py\n","correctness":null,"performance":null}} -{"definition":"loop_108","workload":{"axes":{"N":8000000},"inputs":{"rgba":{"type":"random"}},"uuid":"1829cbb347a6523d862a7242bd9240e5","tags":{"source":"perf"},"description":null},"solution":"reference-scalar_loop_108","evaluation":{"status":"RUNTIME_ERROR","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.592128+00:00","log":"gen_inputs failed: dtype DType.UINT32 not yet supported by inputs.py\nTraceback (most recent call last):\n File \"/home/ubuntu/arm-bench/bench/evaluators/default.py\", line 51, in build_baseline\n np_inputs = gen_inputs_for_workload(definition, workload)\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 160, in gen_inputs_for_workload\n out[tname] = _gen_random_tensor(shape, _dtype_to_np(tspec.dtype), rng)\n ^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 124, in _dtype_to_np\n raise NotImplementedError(f\"dtype {dt} not yet supported by inputs.py\")\nNotImplementedError: dtype DType.UINT32 not yet supported by inputs.py\n","correctness":null,"performance":null}} -{"definition":"loop_108","workload":{"axes":{"N":32000000},"inputs":{"rgba":{"type":"random"}},"uuid":"67e882c66af45a2dba1efd9e2bba27b5","tags":{"source":"perf"},"description":null},"solution":"reference-scalar_loop_108","evaluation":{"status":"RUNTIME_ERROR","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.592128+00:00","log":"gen_inputs failed: dtype DType.UINT32 not yet supported by inputs.py\nTraceback (most recent call last):\n File \"/home/ubuntu/arm-bench/bench/evaluators/default.py\", line 51, in build_baseline\n np_inputs = gen_inputs_for_workload(definition, workload)\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 160, in gen_inputs_for_workload\n out[tname] = _gen_random_tensor(shape, _dtype_to_np(tspec.dtype), rng)\n ^^^^^^^^^^^^^^^^^^^^^^^^^\n File \"/home/ubuntu/arm-bench/bench/runtime/inputs.py\", line 124, in _dtype_to_np\n raise NotImplementedError(f\"dtype {dt} not yet supported by inputs.py\")\nNotImplementedError: dtype DType.UINT32 not yet supported by inputs.py\n","correctness":null,"performance":null}} diff --git a/traces/loop_113/loop_113.jsonl b/traces/loop_113/loop_113.jsonl deleted file mode 100644 index 04ea9411eb133a916201f632ffed179c81b99c51..0000000000000000000000000000000000000000 --- a/traces/loop_113/loop_113.jsonl +++ /dev/null @@ -1,6 +0,0 @@ -{"definition":"loop_113","workload":{"axes":{"N":1},"inputs":{"a0":{"type":"random"},"b0":{"type":"random"}},"uuid":"f023767efc6e58d0b307b0d4630c5fd3","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_113","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.708315+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":755,"p5_ns":762,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":3801,"instructions":9598,"ipc":2.525,"cache_misses":19.24,"reference_cycles":null}}} -{"definition":"loop_113","workload":{"axes":{"N":7},"inputs":{"a0":{"type":"random"},"b0":{"type":"random"}},"uuid":"842e841aafe655bd842d5ab3949ddd48","tags":{"source":"edge"},"description":null},"solution":"reference-scalar_loop_113","evaluation":{"status":"PASSED","environment":{"hardware":"aarch64-ip-172-31-48-206","cpu_pinned":0,"libs":{"python":"3.12.3","numpy":"2.4.6"}},"timestamp":"2026-06-20T03:33:22.708315+00:00","log":"","correctness":{"max_relative_error":0.0,"max_absolute_error":0.0,"matched_ratio":1.0,"extra":null},"performance":{"min_ns":764,"p5_ns":766,"reference_min_ns":null,"cycle_speedup":null,"time_speedup":null,"repeat":50,"warmup":5,"cycles":3433,"instructions":9558,"ipc":2.7842,"cache_misses":16.0,"reference_cycles":null}}} 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