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| #ifndef _CG_GRID_H
|
| #define _CG_GRID_H
|
|
|
| #include "info.h"
|
|
|
| _CG_BEGIN_NAMESPACE
|
|
|
| namespace details
|
| {
|
|
|
| typedef unsigned int barrier_t;
|
|
|
| _CG_STATIC_QUALIFIER bool bar_has_flipped(unsigned int old_arrive, unsigned int current_arrive) {
|
| return (((old_arrive ^ current_arrive) & 0x80000000) != 0);
|
| }
|
|
|
| _CG_STATIC_QUALIFIER bool is_cta_master() {
|
| return (threadIdx.x + threadIdx.y + threadIdx.z == 0);
|
| }
|
|
|
| _CG_STATIC_QUALIFIER unsigned int sync_grids_arrive(volatile barrier_t *arrived) {
|
| unsigned int oldArrive = 0;
|
|
|
| __barrier_sync(0);
|
|
|
| if (is_cta_master()) {
|
| unsigned int expected = gridDim.x * gridDim.y * gridDim.z;
|
| bool gpu_master = (blockIdx.x + blockIdx.y + blockIdx.z == 0);
|
| unsigned int nb = 1;
|
|
|
| if (gpu_master) {
|
| nb = 0x80000000 - (expected - 1);
|
| }
|
|
|
| #if __CUDA_ARCH__ < 700
|
|
|
| __threadfence();
|
|
|
| oldArrive = atomicAdd((unsigned int*)arrived, nb);
|
| #else
|
|
|
| asm volatile("atom.add.release.gpu.u32 %0,[%1],%2;" : "=r"(oldArrive) : _CG_ASM_PTR_CONSTRAINT((unsigned int*)arrived), "r"(nb) : "memory");
|
| #endif
|
| }
|
|
|
| return oldArrive;
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER void sync_grids_wait(unsigned int oldArrive, volatile barrier_t *arrived) {
|
| if (is_cta_master()) {
|
| #if __CUDA_ARCH__ < 700
|
| while (!bar_has_flipped(oldArrive, *arrived));
|
|
|
| __threadfence();
|
|
|
| #else
|
| unsigned int current_arrive;
|
| do {
|
| asm volatile("ld.acquire.gpu.u32 %0,[%1];" : "=r"(current_arrive) : _CG_ASM_PTR_CONSTRAINT((unsigned int *)arrived) : "memory");
|
| } while (!bar_has_flipped(oldArrive, current_arrive));
|
| #endif
|
| }
|
|
|
| __barrier_sync(0);
|
| }
|
|
|
|
|
|
|
|
|
| _CG_STATIC_QUALIFIER unsigned int atom_or_acq_rel_cta(unsigned int *addr, unsigned int val) {
|
| unsigned int old;
|
| #if __CUDA_ARCH__ < 700
|
| __threadfence_block();
|
| old = atomicOr(addr, val);
|
| #else
|
| asm volatile("atom.or.acq_rel.cta.b32 %0,[%1],%2;" : "=r"(old) : _CG_ASM_PTR_CONSTRAINT(addr), "r"(val) : "memory");
|
| #endif
|
| return old;
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER void red_or_release_cta(unsigned int *addr, unsigned int val) {
|
| #if __CUDA_ARCH__ < 700
|
| __threadfence_block();
|
| atomicOr(addr, val);
|
| #else
|
| asm volatile("red.or.release.cta.b32 [%0],%1;" :: _CG_ASM_PTR_CONSTRAINT(addr), "r"(val) : "memory");
|
| #endif
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER void red_and_relaxed_cta(unsigned int *addr, unsigned int val) {
|
| #if __CUDA_ARCH__ < 700
|
| atomicAnd(addr, val);
|
| #else
|
| asm volatile("red.and.relaxed.cta.b32 [%0],%1;" :: _CG_ASM_PTR_CONSTRAINT(addr), "r"(val) : "memory");
|
| #endif
|
| }
|
|
|
|
|
|
|
| _CG_STATIC_QUALIFIER void red_and_release_cta(unsigned int *addr, unsigned int val) {
|
| #if __CUDA_ARCH__ < 700
|
| __threadfence_block();
|
| atomicAnd(addr, val);
|
| #else
|
| asm volatile("red.and.release.cta.b32 [%0],%1;" :: _CG_ASM_PTR_CONSTRAINT(addr), "r"(val) : "memory");
|
| #endif
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER unsigned int ld_acquire_cta(unsigned int *addr) {
|
| unsigned int val;
|
| #if __CUDA_ARCH__ < 700
|
| val = *((volatile unsigned int*) addr);
|
| __threadfence_block();
|
| #else
|
| asm volatile("ld.acquire.cta.u32 %0,[%1];" : "=r"(val) : _CG_ASM_PTR_CONSTRAINT(addr) : "memory");
|
| #endif
|
| return val;
|
| }
|
|
|
|
|
|
|
|
|
| _CG_STATIC_QUALIFIER unsigned int get_group_mask(unsigned int thread_rank, unsigned int num_warps) {
|
| return num_warps == 32 ? ~0 : ((1 << num_warps) - 1) << (num_warps * (thread_rank / (num_warps * 32)));
|
| }
|
|
|
| _CG_STATIC_QUALIFIER void barrier_wait(barrier_t *arrived, unsigned int warp_bit) {
|
| while(ld_acquire_cta(arrived) & warp_bit);
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER void sync_warps(barrier_t *arrived, unsigned int thread_rank, unsigned int num_warps) {
|
| unsigned int warp_id = thread_rank / 32;
|
| bool warp_master = (thread_rank % 32 == 0);
|
| unsigned int warp_bit = 1 << warp_id;
|
| unsigned int group_mask = get_group_mask(thread_rank, num_warps);
|
|
|
| __syncwarp(0xFFFFFFFF);
|
|
|
| if (warp_master) {
|
| unsigned int old = atom_or_acq_rel_cta(arrived, warp_bit);
|
| if (((old | warp_bit) & group_mask) == group_mask) {
|
| red_and_relaxed_cta(arrived, ~group_mask);
|
| }
|
| else {
|
| barrier_wait(arrived, warp_bit);
|
| }
|
| }
|
|
|
| __syncwarp(0xFFFFFFFF);
|
| }
|
|
|
|
|
|
|
| _CG_STATIC_QUALIFIER bool sync_warps_last_releases(barrier_t *arrived, unsigned int thread_rank, unsigned int num_warps) {
|
| unsigned int warp_id = thread_rank / 32;
|
| bool warp_master = (thread_rank % 32 == 0);
|
| unsigned int warp_bit = 1 << warp_id;
|
| unsigned int group_mask = get_group_mask(thread_rank, num_warps);
|
|
|
| __syncwarp(0xFFFFFFFF);
|
|
|
| unsigned int old = 0;
|
| if (warp_master) {
|
| old = atom_or_acq_rel_cta(arrived, warp_bit);
|
| }
|
| old = __shfl_sync(0xFFFFFFFF, old, 0);
|
| if (((old | warp_bit) & group_mask) == group_mask) {
|
| return true;
|
| }
|
| barrier_wait(arrived, warp_bit);
|
|
|
| return false;
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER void sync_warps_release(barrier_t *arrived, bool is_master, unsigned int thread_rank, unsigned int num_warps) {
|
| unsigned int group_mask = get_group_mask(thread_rank, num_warps);
|
| if (is_master) {
|
| red_and_release_cta(arrived, ~group_mask);
|
| }
|
| }
|
|
|
|
|
|
|
| _CG_STATIC_QUALIFIER void sync_warps_arrive(barrier_t *arrived, unsigned int thread_rank, unsigned int num_warps) {
|
| unsigned int warp_id = thread_rank / 32;
|
| bool warp_master = (thread_rank % 32 == 0);
|
| unsigned int warp_bit = 1 << warp_id;
|
| unsigned int group_mask = get_group_mask(thread_rank, num_warps);
|
|
|
| __syncwarp(0xFFFFFFFF);
|
|
|
| if (warp_master) {
|
| red_or_release_cta(arrived, warp_bit);
|
| }
|
| }
|
|
|
|
|
| _CG_STATIC_QUALIFIER void sync_warps_wait(barrier_t *arrived, unsigned int thread_rank) {
|
| unsigned int warp_id = thread_rank / 32;
|
| unsigned int warp_bit = 1 << warp_id;
|
|
|
| barrier_wait(arrived, warp_bit);
|
| }
|
|
|
|
|
| _CG_QUALIFIER void sync_warps_wait_for_specific_warp(barrier_t *arrived, unsigned int wait_warp_id) {
|
| unsigned int wait_mask = 1 << wait_warp_id;
|
| while((ld_acquire_cta(arrived) & wait_mask) != wait_mask);
|
| }
|
|
|
|
|
| _CG_QUALIFIER void sync_warps_reset(barrier_t *arrived, unsigned int thread_rank) {
|
| unsigned int warp_id = thread_rank / 32;
|
| unsigned int warp_bit = 1 << warp_id;
|
|
|
| __syncwarp(0xFFFFFFFF);
|
|
|
| if (thread_rank % 32 == 0) {
|
| red_and_release_cta(arrived, ~warp_bit);
|
| }
|
|
|
| }
|
|
|
| }
|
|
|
| _CG_END_NAMESPACE
|
|
|
| #endif
|
|
|