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0000000000000000000000000000000000000000..6b183e3f568b384a2c8794d59b6395a45a11770a Binary files /dev/null and b/java/bin/zip.dll differ diff --git a/java/conf/jaxp-strict.properties.template b/java/conf/jaxp-strict.properties.template new file mode 100644 index 0000000000000000000000000000000000000000..2d6cbc951e20e5e6183d27d09606c4711fe55109 --- /dev/null +++ b/java/conf/jaxp-strict.properties.template @@ -0,0 +1,123 @@ +################################################################################ +# JAXP Strict Configuration Template +# +# This file, jaxp-strict.properties.template, provides a template for creating +# custom configuration files. The settings in this file are more restrictive than +# those in the default configuration, jaxp.properties. In particular: +# - JDKCatalog Resolve is on "strict" setting +# - Extension Functions are disabled +# - JAXP Limits are set to smaller numbers +# +# To create a configuration file, copy the template to a new file with +# the .properties extension, that is: +# +# cp $JAVA_HOME/conf/jaxp-strict.properties.template /path/to/jaxp-strict.properties +# +# The configuration file can then be set up using the system property +# java.xml.config.file to override the default configuration jaxp.properties +# and used to assess the impact of a stricter configuration, for example: +# +# java -Djava.xml.config.file=/path/to/jaxp-strict.properties +# +# The system property java.xml.config.file is defined in the java.xml module +# description. +# +################################################################################ + +# +# ---- Implementation Specific Properties ---- +# For a complete list of properties, refer to the Implementation Specific Properties +# table in the java.xml/module-summary. +# +# Extension Functions: +# +# This property determines whether XSLT and XPath extension functions are allowed. +# The value type is boolean and the default value is true (allowing +# extension functions). The following entry overrides the default value and +# disallows extension functions: +# +jdk.xml.enableExtensionFunctions=false +# +# +# Overriding the default parser: +# +# This property allows a third party implementation to override the default +# parser provided by the JDK. The value type is boolean and the default value is +# false, disallowing overriding the default parser. The setting below reflects +# the default property setting: +# +jdk.xml.overrideDefaultParser=false +# +# Implementation Specific Properties - jdkcatalog.resolve +# +# This property instructs the JDK default CatalogResolver to act in accordance with +# the setting when unable to resolve an external reference with the built-in Catalog. +# The options are: +# continue -- indicates that the processing should continue +# ignore -- indicates that the reference is skipped +# strict -- indicates that the resolver should throw a CatalogException +# +# The following setting causes the default CatalogResolver to throw a CatalogException +# when external references are not resolved by a user-defined resolver or catalog, +# or the built-in Catalog: +jdk.xml.jdkcatalog.resolve=strict +# +# Implementation Specific Properties - DTD +# +# This property instructs the parsers to deny, ignore or allow DTD processing. +# The following setting causes the parser to reject DTDs by throwing an exception. +# jdk.xml.dtd.support=deny +# +# The following setting permits the processor to continue processing DTDs. Note +# that while DTDs are allowed in this configuration, external references are +# restricted, and limits on DTD entities are tightened: +jdk.xml.dtd.support=allow +# +# Implementation Specific Properties - Limits +# +# Limits have a value type Integer. The values must be positive integers. Zero +# means no limit. +# +# Limits the number of entity expansions +jdk.xml.entityExpansionLimit=2500 +# +# Limits the total size of all entities that include general and parameter entities. +# The size is calculated as an aggregation of all entities. +jdk.xml.totalEntitySizeLimit=100000 +# +# Limits the maximum size of any general entities. +jdk.xml.maxGeneralEntitySizeLimit=100000 +# +# Limits the maximum size of any parameter entities, including the result of +# nesting multiple parameter entities. +jdk.xml.maxParameterEntitySizeLimit=15000 +# +# Limits the total number of nodes in all entity references. +jdk.xml.entityReplacementLimit=100000 +# +# Limits the number of attributes an element can have. The default value is 10000. +jdk.xml.elementAttributeLimit=10000 +# +# Limits the number of content model nodes that may be created when building a +# grammar for a W3C XML Schema that contains maxOccurs attributes with values +# other than "unbounded". The default value is 5000. +jdk.xml.maxOccurLimit=5000 +# +# Limits the maximum element depth. The default value is 0. +jdk.xml.maxElementDepth=0 +# +# Limits the maximum size of XML names, including element name, attribute name +# and namespace prefix and URI. The default value is 1000. +jdk.xml.maxXMLNameLimit=1000 +# +# +# XPath Limits +# +# Limits the number of groups an XPath expression can contain. The default value is 10. +jdk.xml.xpathExprGrpLimit=10 +# +# Limits the number of operators an XPath expression can contain. The default value is 100. +jdk.xml.xpathExprOpLimit=100 +# +# Limits the total number of XPath operators in an XSL Stylesheet. The default value is 10000. +jdk.xml.xpathTotalOpLimit=10000 diff --git a/java/conf/jaxp.properties b/java/conf/jaxp.properties new file mode 100644 index 0000000000000000000000000000000000000000..53835f637438a36c42a4b3f8b5a51118854ce7b7 --- /dev/null +++ b/java/conf/jaxp.properties @@ -0,0 +1,201 @@ +################################################################################ +# JAXP Configuration File +# +# jaxp.properties (this file) is the default configuration file for JAXP, the API +# defined in the java.xml module. It is in java.util.Properties format and typically +# located in the {java.home}/conf directory. It may contain key/value pairs for +# specifying the implementation classes of JAXP factories and/or properties +# that have corresponding system properties. +# +# A user-specified configuration file can be set up using the system property +# java.xml.config.file to override any or all of the entries in jaxp.properties. +# The following statement provides myConfigurationFile as a custom configuration +# file: +# java -Djava.xml.config.file=myConfigurationFile +################################################################################ + +# ---- JAXP Default Configuration ---- +# +# The JAXP default configuration (jaxp.properties) contains entries for the +# Factory Lookup Mechanism and properties with corresponding system properties. +# The values are generally set to the default values of the properties. +# +# +# JAXP Lookup Mechanism: +# +# The JAXP configuration file ranks 2nd to the System Property in the precedent +# order of the JAXP Lookup Mechanism. When the System Property is not specified, +# a JAXP factory reads the configuration file in order to locate an implementation +# class. If found, the class specified will be used as the factory implementation +# class. +# +# The format of an entry is key=value where the key is the fully qualified name +# of the factory and value that of the implementation class. The following entry +# sets a DocumentBuilderFactory implementation class: +# +# javax.xml.parsers.DocumentBuilderFactory=com.sun.org.apache.xerces.internal.jaxp.DocumentBuilderFactoryImpl +# +# +# Java SE and JDK Implementation Specific Properties: +# +# The JAXP configuration file ranks above the default settings in the Property +# Precedence in that its entries will override the default values of the corresponding +# properties. +# +# All properties that have System Properties defined in Java SE or supported +# by the JDK Implementation can be placed in the configuration file to override +# the default property values. The format is: +# system-property-name=value +# +# For example, the RESOLVE property in CatalogFeatures has an associated system +# property called javax.xml.catalog.resolve. An entry for the RESOLVE property in the +# configuration file therefore uses javax.xml.catalog.resolve as the key, that +# is: +# javax.xml.catalog.resolve=strict +# +# +# Extension Functions: +# +# This property determines whether XSLT and XPath extension functions are allowed. +# The value type is boolean and the default value is true (allowing +# extension functions). The following entry overrides the default value and +# disallows extension functions: +# +# jdk.xml.enableExtensionFunctions=false +# +# +# Overriding the default parser: +# +# This property allows a third party implementation to override the default +# parser provided by the JDK. The value type is boolean and the default value is +# false, disallowing overriding the default parser. The setting below reflects +# the default property setting: +# +jdk.xml.overrideDefaultParser=false +# +# +# External Access Properties: +# +# The External Access Properties are defined in javax.xml.XMLConstants. Their +# system properties are javax.xml.accessExternalDTD, javax.xml.accessExternalSchema, +# and javax.xml.accessExternalStylesheet. The values are a list of protocols separated +# by comma, plus empty string ("") to represent no protocol allowed and the key +# word "all" for all access. The default is "all", allowing all external resources +# to be fetched. The followings are example of external access settings: +# +# allow local (file) DTDs to be retrieved +# javax.xml.accessExternalDTD=file +# +# allow local (file) and remote (http) external schemas +# javax.xml.accessExternalSchema=file, http +# +# reject any external stylesheets +# javax.xml.accessExternalStylesheet="" +# +# allow all external stylesheets +# javax.xml.accessExternalStylesheet="all" +# +# +# Catalog Properties: +# +# The Catalog API defines four features: FILES, PREFER, DEFER and RESOLVE. +# Except PREFER, all other properties can be placed in the configuration file +# using the system properties defined for them. +# +# FILES: A semicolon-delimited list of URIs to locate the catalog files. The URIs +# must be absolute and have a URL protocol handler for the URI scheme. The following +# is an example of setting up a catalog file: +# +# javax.xml.catalog.files = file:///users/auser/catalog/catalog.xml +# +# DEFER: Indicates that the alternative catalogs including those specified in +# delegate entries or nextCatalog are not read until they are needed. The value +# is a boolean and the default value is true. +# +# javax.xml.catalog.defer=true +# +# RESOLVE: Determines the action if there is no matching entry found after all of +# the specified catalogs are exhausted. The values are key words: strict, continue, +# and ignore. The default is strict. The following setting reflects the default +# setting. +# +# javax.xml.catalog.resolve=strict +# +# +# useCatalog: +# This property instructs XML processors to use XML Catalogs to resolve entity +# references. The value is a boolean and the default value is true. +# +# javax.xml.useCatalog=true +# +# Implementation Specific Properties - jdkcatalog.resolve +# +# This property instructs the JDK default CatalogResolver to act in accordance with +# the setting when unable to resolve an external reference with the built-in Catalog. +# The options are: +# continue -- indicates that the processing should continue +# ignore -- indicates that the reference is skipped +# strict -- indicates that the resolver should throw a CatalogException +# +# The following setting allows the resolution to continue in cases where +# external references are not resolved by a user-defined resolver or catalog if +# any, and the built-in Catalog: +jdk.xml.jdkcatalog.resolve=continue +# +# Implementation Specific Properties - DTD +# +# This property instructs the parsers to deny, ignore or allow DTD processing. +# The following setting causes the parser to reject DTDs by throwing an exception. +# jdk.xml.dtd.support=deny +# +# The following setting permits the processor to continue processing DTDs +jdk.xml.dtd.support=allow +# +# Implementation Specific Properties - Limits +# +# Limits have a value type Integer. The values must be positive integers. Zero +# means no limit. +# +# Limits the number of entity expansions. The default value is 64000 +# jdk.xml.entityExpansionLimit=64000 +# +# Limits the total size of all entities that include general and parameter entities. +# The size is calculated as an aggregation of all entities. The default value is 5x10^7. +# jdk.xml.totalEntitySizeLimit=50000000 +# +# Limits the maximum size of any general entities. The default value is 0. +# jdk.xml.maxGeneralEntitySizeLimit=0 +# +# Limits the maximum size of any parameter entities, including the result of +# nesting multiple parameter entities. The default value is 10^6. +# jdk.xml.maxParameterEntitySizeLimit=1000000 +# +# Limits the total number of nodes in all entity references. The default value is 3x10^6. +# jdk.xml.entityReplacementLimit=3000000 +# +# Limits the number of attributes an element can have. The default value is 10000. +# jdk.xml.elementAttributeLimit=10000 +# +# Limits the number of content model nodes that may be created when building a +# grammar for a W3C XML Schema that contains maxOccurs attributes with values +# other than "unbounded". The default value is 5000. +# jdk.xml.maxOccurLimit=5000 +# +# Limits the maximum element depth. The default value is 0. +# jdk.xml.maxElementDepth=0 +# +# Limits the maximum size of XML names, including element name, attribute name +# and namespace prefix and URI. The default value is 1000. +jdk.xml.maxXMLNameLimit=1000 +# +# +# XPath Limits +# +# Limits the number of groups an XPath expression can contain. The default value is 10. +jdk.xml.xpathExprGrpLimit=10 +# +# Limits the number of operators an XPath expression can contain. The default value is 100. +jdk.xml.xpathExprOpLimit=100 +# +# Limits the total number of XPath operators in an XSL Stylesheet. The default value is 10000. +jdk.xml.xpathTotalOpLimit=10000 diff --git a/java/conf/logging.properties b/java/conf/logging.properties new file mode 100644 index 0000000000000000000000000000000000000000..2c11b193c13e35bf23d8cd70c477b5d926bb29ff --- /dev/null +++ b/java/conf/logging.properties @@ -0,0 +1,63 @@ +############################################################ +# Default Logging Configuration File +# +# You can use a different file by specifying a filename +# with the java.util.logging.config.file system property. +# For example, java -Djava.util.logging.config.file=myfile +############################################################ + +############################################################ +# Global properties +############################################################ + +# "handlers" specifies a comma-separated list of log Handler +# classes. These handlers will be installed during VM startup. +# Note that these classes must be on the system classpath. +# By default we only configure a ConsoleHandler, which will only +# show messages at the INFO and above levels. +handlers= java.util.logging.ConsoleHandler + +# To also add the FileHandler, use the following line instead. +#handlers= java.util.logging.FileHandler, java.util.logging.ConsoleHandler + +# Default global logging level. +# This specifies which kinds of events are logged across +# all loggers. For any given facility this global level +# can be overridden by a facility-specific level +# Note that the ConsoleHandler also has a separate level +# setting to limit messages printed to the console. +.level= INFO + +############################################################ +# Handler specific properties. +# Describes specific configuration info for Handlers. +############################################################ + +# default file output is in user's home directory. +java.util.logging.FileHandler.pattern = %h/java%u.log +java.util.logging.FileHandler.limit = 50000 +java.util.logging.FileHandler.count = 1 +# Default number of locks FileHandler can obtain synchronously. +# This specifies maximum number of attempts to obtain lock file by FileHandler +# implemented by incrementing the unique field %u as per FileHandler API documentation. +java.util.logging.FileHandler.maxLocks = 100 +java.util.logging.FileHandler.formatter = java.util.logging.XMLFormatter + +# Limit the messages that are printed on the console to INFO and above. +java.util.logging.ConsoleHandler.level = INFO +java.util.logging.ConsoleHandler.formatter = java.util.logging.SimpleFormatter + +# Example to customize the SimpleFormatter output format +# to print one-line log message like this: +# : [] +# +# java.util.logging.SimpleFormatter.format=%4$s: %5$s [%1$tc]%n + +############################################################ +# Facility-specific properties. +# Provides extra control for each logger. +############################################################ + +# For example, set the com.xyz.foo logger to only log SEVERE +# messages: +# com.xyz.foo.level = SEVERE diff --git a/java/conf/net.properties b/java/conf/net.properties new file mode 100644 index 0000000000000000000000000000000000000000..eac987eaaa3596f50ce5f8b4266d39d5ccecdfb1 --- /dev/null +++ b/java/conf/net.properties @@ -0,0 +1,168 @@ +############################################################ +# Default Networking Configuration File +# +# This file may contain default values for the networking system properties. +# These values are only used when the system properties are not specified +# on the command line or set programmatically. +# For now, only the various proxy settings can be configured here. +############################################################ + +# Whether or not the DefaultProxySelector will default to System Proxy +# settings when they do exist. +# Set it to 'true' to enable this feature and check for platform +# specific proxy settings +# Note that the system properties that do explicitly set proxies +# (like http.proxyHost) do take precedence over the system settings +# even if java.net.useSystemProxies is set to true. + +java.net.useSystemProxies=false + +#------------------------------------------------------------------------ +# Proxy configuration for the various protocol handlers. +# DO NOT uncomment these lines if you have set java.net.useSystemProxies +# to true as the protocol specific properties will take precedence over +# system settings. +#------------------------------------------------------------------------ + +# HTTP Proxy settings. proxyHost is the name of the proxy server +# (e.g. proxy.mydomain.com), proxyPort is the port number to use (default +# value is 80) and nonProxyHosts is a '|' separated list of hostnames which +# should be accessed directly, ignoring the proxy server (default value is +# localhost & 127.0.0.1). +# +# http.proxyHost= +# http.proxyPort=80 +http.nonProxyHosts=localhost|127.*|[::1] +# +# HTTPS Proxy Settings. proxyHost is the name of the proxy server +# (e.g. proxy.mydomain.com), proxyPort is the port number to use (default +# value is 443). The HTTPS protocol handlers uses the http nonProxyHosts list. +# +# https.proxyHost= +# https.proxyPort=443 +# +# FTP Proxy settings. proxyHost is the name of the proxy server +# (e.g. proxy.mydomain.com), proxyPort is the port number to use (default +# value is 80) and nonProxyHosts is a '|' separated list of hostnames which +# should be accessed directly, ignoring the proxy server (default value is +# localhost & 127.0.0.1). +# +# ftp.proxyHost= +# ftp.proxyPort=80 +ftp.nonProxyHosts=localhost|127.*|[::1] +# +# Socks proxy settings. socksProxyHost is the name of the proxy server +# (e.g. socks.domain.com), socksProxyPort is the port number to use +# (default value is 1080) +# +# socksProxyHost= +# socksProxyPort=1080 +# +# HTTP Keep Alive settings. remainingData is the maximum amount of data +# in kilobytes that will be cleaned off the underlying socket so that it +# can be reused (default value is 512K), queuedConnections is the maximum +# number of Keep Alive connections to be on the queue for clean up (default +# value is 10). +# http.KeepAlive.remainingData=512 +# http.KeepAlive.queuedConnections=10 + +# Authentication Scheme restrictions for HTTP and HTTPS. +# +# In some environments certain authentication schemes may be undesirable +# when proxying HTTP or HTTPS. For example, "Basic" results in effectively the +# cleartext transmission of the user's password over the physical network. +# This section describes the mechanism for disabling authentication schemes +# based on the scheme name. Disabled schemes will be treated as if they are not +# supported by the implementation. +# +# The 'jdk.http.auth.tunneling.disabledSchemes' property lists the authentication +# schemes that will be disabled when tunneling HTTPS over a proxy, HTTP CONNECT. +# The 'jdk.http.auth.proxying.disabledSchemes' property lists the authentication +# schemes that will be disabled when proxying HTTP. +# +# In both cases the property is a comma-separated list of, case-insensitive, +# authentication scheme names, as defined by their relevant RFCs. An +# implementation may, but is not required to, support common schemes whose names +# include: 'Basic', 'Digest', 'NTLM', 'Kerberos', 'Negotiate'. A scheme that +# is not known, or not supported, by the implementation is ignored. +# +# Note: This property is currently used by the JDK Reference implementation. It +# is not guaranteed to be examined and used by other implementations. +# +#jdk.http.auth.proxying.disabledSchemes= +jdk.http.auth.tunneling.disabledSchemes=Basic + +# +# Allow restricted HTTP request headers +# +# By default, the following request headers are not allowed to be set by user code +# in HttpRequests: "connection", "content-length", "expect", "host" and "upgrade". +# The 'jdk.httpclient.allowRestrictedHeaders' property allows one or more of these +# headers to be specified as a comma separated list to override the default restriction. +# The names are case-insensitive and white-space is ignored (removed before processing +# the list). Note, this capability is mostly intended for testing and isn't expected +# to be used in real deployments. Protocol errors or other undefined behavior is likely +# to occur when using them. The property is not set by default. +# Note also, that there may be other headers that are restricted from being set +# depending on the context. This includes the "Authorization" header when the +# relevant HttpClient has an authenticator set. These restrictions cannot be +# overridden by this property. +# +# jdk.httpclient.allowRestrictedHeaders=host +# +# +# Transparent NTLM HTTP authentication mode on Windows. Transparent authentication +# can be used for the NTLM scheme, where the security credentials based on the +# currently logged in user's name and password can be obtained directly from the +# operating system, without prompting the user. This property has three possible +# values which regulate the behavior as shown below. Other unrecognized values +# are handled the same as 'disabled'. Note, that NTLM is not considered to be a +# strongly secure authentication scheme and care should be taken before enabling +# this mechanism. +# +# Transparent authentication never used. +#jdk.http.ntlm.transparentAuth=disabled +# +# Enabled for all hosts. +#jdk.http.ntlm.transparentAuth=allHosts +# +# Enabled for hosts that are trusted in Windows Internet settings +#jdk.http.ntlm.transparentAuth=trustedHosts +# +jdk.http.ntlm.transparentAuth=disabled + +# +# Maximum HTTP field section size that a client is prepared to accept +# +# jdk.http.maxHeaderSize=393216 +# +# This is the maximum header field section size that a client is prepared to accept. +# This is computed as the sum of the size of the uncompressed header name, plus +# the size of the uncompressed header value, plus an overhead of 32 bytes for +# each field section line. If a peer sends a field section that exceeds this +# size a {@link java.net.ProtocolException ProtocolException} will be raised. +# This applies to all versions of the HTTP protocol. A value of zero or a negative +# value means no limit. If left unspecified, the default value is 393216 bytes +# or 384kB. +# +# Note: This property is currently used by the JDK Reference implementation. It +# is not guaranteed to be examined and used by other implementations. +# +# Default directory where automatically bound Unix domain server +# sockets are stored. Sockets are automatically bound when bound +# with a null address. +# +# The search order for the directory on Windows is: +# +# 1. System property "jdk.net.unixdomain.tmpdir" +# +# 2. Networking property "jdk.net.unixdomain.tmpdir" specified +# in this file (not set by default) +# +# 3. The TEMP environment variable (the effective default) +# +# 4. The java.io.tmpdir system property +# +#jdk.net.unixdomain.tmpdir= +# + diff --git a/java/conf/sound.properties b/java/conf/sound.properties new file mode 100644 index 0000000000000000000000000000000000000000..68309d111a6050739ccd938dd4d4b9fae3f4e36d --- /dev/null +++ b/java/conf/sound.properties @@ -0,0 +1,39 @@ +############################################################ +# Sound Configuration File +############################################################ +# +# This properties file is used to specify default service +# providers for javax.sound.midi.MidiSystem and +# javax.sound.sampled.AudioSystem. +# +# The following keys are recognized by MidiSystem methods: +# +# javax.sound.midi.Receiver +# javax.sound.midi.Sequencer +# javax.sound.midi.Synthesizer +# javax.sound.midi.Transmitter +# +# The following keys are recognized by AudioSystem methods: +# +# javax.sound.sampled.Clip +# javax.sound.sampled.Port +# javax.sound.sampled.SourceDataLine +# javax.sound.sampled.TargetDataLine +# +# The values specify the full class name of the service +# provider, or the device name. +# +# See the class descriptions for details. +# +# Example 1: +# Use MyDeviceProvider as default for SourceDataLines: +# javax.sound.sampled.SourceDataLine=com.xyz.MyDeviceProvider +# +# Example 2: +# Specify the default Synthesizer by its name "InternalSynth". +# javax.sound.midi.Synthesizer=#InternalSynth +# +# Example 3: +# Specify the default Receiver by provider and name: +# javax.sound.midi.Receiver=com.sun.media.sound.MidiProvider#SunMIDI1 +# diff --git a/java/include/classfile_constants.h b/java/include/classfile_constants.h new file mode 100644 index 0000000000000000000000000000000000000000..3d1f94b284551aa23c6f316d46bd9b88e9455da6 --- /dev/null +++ b/java/include/classfile_constants.h @@ -0,0 +1,588 @@ +/* + * Copyright (c) 2004, 2019, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +#ifndef CLASSFILE_CONSTANTS_H +#define CLASSFILE_CONSTANTS_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Classfile version number for this information */ +#define JVM_CLASSFILE_MAJOR_VERSION 67 +#define JVM_CLASSFILE_MINOR_VERSION 0 + +/* Flags */ + +enum { + JVM_ACC_PUBLIC = 0x0001, + JVM_ACC_PRIVATE = 0x0002, + JVM_ACC_PROTECTED = 0x0004, + JVM_ACC_STATIC = 0x0008, + JVM_ACC_FINAL = 0x0010, + JVM_ACC_SYNCHRONIZED = 0x0020, + JVM_ACC_SUPER = 0x0020, + JVM_ACC_VOLATILE = 0x0040, + JVM_ACC_BRIDGE = 0x0040, + JVM_ACC_TRANSIENT = 0x0080, + JVM_ACC_VARARGS = 0x0080, + JVM_ACC_NATIVE = 0x0100, + JVM_ACC_INTERFACE = 0x0200, + JVM_ACC_ABSTRACT = 0x0400, + JVM_ACC_STRICT = 0x0800, + JVM_ACC_SYNTHETIC = 0x1000, + JVM_ACC_ANNOTATION = 0x2000, + JVM_ACC_ENUM = 0x4000, + JVM_ACC_MODULE = 0x8000 +}; + +#define JVM_ACC_PUBLIC_BIT 0 +#define JVM_ACC_PRIVATE_BIT 1 +#define JVM_ACC_PROTECTED_BIT 2 +#define JVM_ACC_STATIC_BIT 3 +#define JVM_ACC_FINAL_BIT 4 +#define JVM_ACC_SYNCHRONIZED_BIT 5 +#define JVM_ACC_SUPER_BIT 5 +#define JVM_ACC_VOLATILE_BIT 6 +#define JVM_ACC_BRIDGE_BIT 6 +#define JVM_ACC_TRANSIENT_BIT 7 +#define JVM_ACC_VARARGS_BIT 7 +#define JVM_ACC_NATIVE_BIT 8 +#define JVM_ACC_INTERFACE_BIT 9 +#define JVM_ACC_ABSTRACT_BIT 10 +#define JVM_ACC_STRICT_BIT 11 +#define JVM_ACC_SYNTHETIC_BIT 12 +#define JVM_ACC_ANNOTATION_BIT 13 +#define JVM_ACC_ENUM_BIT 14 + +/* Used in newarray instruction. */ + +enum { + JVM_T_BOOLEAN = 4, + JVM_T_CHAR = 5, + JVM_T_FLOAT = 6, + JVM_T_DOUBLE = 7, + JVM_T_BYTE = 8, + JVM_T_SHORT = 9, + JVM_T_INT = 10, + JVM_T_LONG = 11 +}; + +/* Constant Pool Entries */ + +enum { + JVM_CONSTANT_Utf8 = 1, + JVM_CONSTANT_Unicode = 2, /* unused */ + JVM_CONSTANT_Integer = 3, + JVM_CONSTANT_Float = 4, + JVM_CONSTANT_Long = 5, + JVM_CONSTANT_Double = 6, + JVM_CONSTANT_Class = 7, + JVM_CONSTANT_String = 8, + JVM_CONSTANT_Fieldref = 9, + JVM_CONSTANT_Methodref = 10, + JVM_CONSTANT_InterfaceMethodref = 11, + JVM_CONSTANT_NameAndType = 12, + JVM_CONSTANT_MethodHandle = 15, // JSR 292 + JVM_CONSTANT_MethodType = 16, // JSR 292 + JVM_CONSTANT_Dynamic = 17, + JVM_CONSTANT_InvokeDynamic = 18, + JVM_CONSTANT_Module = 19, + JVM_CONSTANT_Package = 20, + JVM_CONSTANT_ExternalMax = 20 +}; + +/* JVM_CONSTANT_MethodHandle subtypes */ +enum { + JVM_REF_getField = 1, + JVM_REF_getStatic = 2, + JVM_REF_putField = 3, + JVM_REF_putStatic = 4, + JVM_REF_invokeVirtual = 5, + JVM_REF_invokeStatic = 6, + JVM_REF_invokeSpecial = 7, + JVM_REF_newInvokeSpecial = 8, + JVM_REF_invokeInterface = 9 +}; + +/* StackMapTable type item numbers */ + +enum { + JVM_ITEM_Top = 0, + JVM_ITEM_Integer = 1, + JVM_ITEM_Float = 2, + JVM_ITEM_Double = 3, + JVM_ITEM_Long = 4, + JVM_ITEM_Null = 5, + JVM_ITEM_UninitializedThis = 6, + JVM_ITEM_Object = 7, + JVM_ITEM_Uninitialized = 8 +}; + +/* Type signatures */ + +enum { + JVM_SIGNATURE_SLASH = '/', + JVM_SIGNATURE_DOT = '.', + JVM_SIGNATURE_SPECIAL = '<', + JVM_SIGNATURE_ENDSPECIAL = '>', + JVM_SIGNATURE_ARRAY = '[', + JVM_SIGNATURE_BYTE = 'B', + JVM_SIGNATURE_CHAR = 'C', + JVM_SIGNATURE_CLASS = 'L', + JVM_SIGNATURE_ENDCLASS = ';', + JVM_SIGNATURE_ENUM = 'E', + JVM_SIGNATURE_FLOAT = 'F', + JVM_SIGNATURE_DOUBLE = 'D', + JVM_SIGNATURE_FUNC = '(', + JVM_SIGNATURE_ENDFUNC = ')', + JVM_SIGNATURE_INT = 'I', + JVM_SIGNATURE_LONG = 'J', + JVM_SIGNATURE_SHORT = 'S', + JVM_SIGNATURE_VOID = 'V', + JVM_SIGNATURE_BOOLEAN = 'Z' +}; + +/* Opcodes */ + +enum { + JVM_OPC_nop = 0, + JVM_OPC_aconst_null = 1, + JVM_OPC_iconst_m1 = 2, + JVM_OPC_iconst_0 = 3, + JVM_OPC_iconst_1 = 4, + JVM_OPC_iconst_2 = 5, + JVM_OPC_iconst_3 = 6, + JVM_OPC_iconst_4 = 7, + JVM_OPC_iconst_5 = 8, + JVM_OPC_lconst_0 = 9, + JVM_OPC_lconst_1 = 10, + JVM_OPC_fconst_0 = 11, + JVM_OPC_fconst_1 = 12, + JVM_OPC_fconst_2 = 13, + JVM_OPC_dconst_0 = 14, + JVM_OPC_dconst_1 = 15, + JVM_OPC_bipush = 16, + JVM_OPC_sipush = 17, + JVM_OPC_ldc = 18, + JVM_OPC_ldc_w = 19, + JVM_OPC_ldc2_w = 20, + JVM_OPC_iload = 21, + JVM_OPC_lload = 22, + JVM_OPC_fload = 23, + JVM_OPC_dload = 24, + JVM_OPC_aload = 25, + JVM_OPC_iload_0 = 26, + JVM_OPC_iload_1 = 27, + JVM_OPC_iload_2 = 28, + JVM_OPC_iload_3 = 29, + JVM_OPC_lload_0 = 30, + JVM_OPC_lload_1 = 31, + JVM_OPC_lload_2 = 32, + JVM_OPC_lload_3 = 33, + JVM_OPC_fload_0 = 34, + JVM_OPC_fload_1 = 35, + JVM_OPC_fload_2 = 36, + JVM_OPC_fload_3 = 37, + JVM_OPC_dload_0 = 38, + JVM_OPC_dload_1 = 39, + JVM_OPC_dload_2 = 40, + JVM_OPC_dload_3 = 41, + JVM_OPC_aload_0 = 42, + JVM_OPC_aload_1 = 43, + JVM_OPC_aload_2 = 44, + JVM_OPC_aload_3 = 45, + JVM_OPC_iaload = 46, + JVM_OPC_laload = 47, + JVM_OPC_faload = 48, + JVM_OPC_daload = 49, + JVM_OPC_aaload = 50, + JVM_OPC_baload = 51, + JVM_OPC_caload = 52, + JVM_OPC_saload = 53, + JVM_OPC_istore = 54, + JVM_OPC_lstore = 55, + JVM_OPC_fstore = 56, + JVM_OPC_dstore = 57, + JVM_OPC_astore = 58, + JVM_OPC_istore_0 = 59, + JVM_OPC_istore_1 = 60, + JVM_OPC_istore_2 = 61, + JVM_OPC_istore_3 = 62, + JVM_OPC_lstore_0 = 63, + JVM_OPC_lstore_1 = 64, + JVM_OPC_lstore_2 = 65, + JVM_OPC_lstore_3 = 66, + JVM_OPC_fstore_0 = 67, + JVM_OPC_fstore_1 = 68, + JVM_OPC_fstore_2 = 69, + JVM_OPC_fstore_3 = 70, + JVM_OPC_dstore_0 = 71, + JVM_OPC_dstore_1 = 72, + JVM_OPC_dstore_2 = 73, + JVM_OPC_dstore_3 = 74, + JVM_OPC_astore_0 = 75, + JVM_OPC_astore_1 = 76, + JVM_OPC_astore_2 = 77, + JVM_OPC_astore_3 = 78, + JVM_OPC_iastore = 79, + JVM_OPC_lastore = 80, + JVM_OPC_fastore = 81, + JVM_OPC_dastore = 82, + JVM_OPC_aastore = 83, + JVM_OPC_bastore = 84, + JVM_OPC_castore = 85, + JVM_OPC_sastore = 86, + JVM_OPC_pop = 87, + JVM_OPC_pop2 = 88, + JVM_OPC_dup = 89, + JVM_OPC_dup_x1 = 90, + JVM_OPC_dup_x2 = 91, + JVM_OPC_dup2 = 92, + JVM_OPC_dup2_x1 = 93, + JVM_OPC_dup2_x2 = 94, + JVM_OPC_swap = 95, + JVM_OPC_iadd = 96, + JVM_OPC_ladd = 97, + JVM_OPC_fadd = 98, + JVM_OPC_dadd = 99, + JVM_OPC_isub = 100, + JVM_OPC_lsub = 101, + JVM_OPC_fsub = 102, + JVM_OPC_dsub = 103, + JVM_OPC_imul = 104, + JVM_OPC_lmul = 105, + JVM_OPC_fmul = 106, + JVM_OPC_dmul = 107, + JVM_OPC_idiv = 108, + JVM_OPC_ldiv = 109, + JVM_OPC_fdiv = 110, + JVM_OPC_ddiv = 111, + JVM_OPC_irem = 112, + JVM_OPC_lrem = 113, + JVM_OPC_frem = 114, + JVM_OPC_drem = 115, + JVM_OPC_ineg = 116, + JVM_OPC_lneg = 117, + JVM_OPC_fneg = 118, + JVM_OPC_dneg = 119, + JVM_OPC_ishl = 120, + JVM_OPC_lshl = 121, + JVM_OPC_ishr = 122, + JVM_OPC_lshr = 123, + JVM_OPC_iushr = 124, + JVM_OPC_lushr = 125, + JVM_OPC_iand = 126, + JVM_OPC_land = 127, + JVM_OPC_ior = 128, + JVM_OPC_lor = 129, + JVM_OPC_ixor = 130, + JVM_OPC_lxor = 131, + JVM_OPC_iinc = 132, + JVM_OPC_i2l = 133, + JVM_OPC_i2f = 134, + JVM_OPC_i2d = 135, + JVM_OPC_l2i = 136, + JVM_OPC_l2f = 137, + JVM_OPC_l2d = 138, + JVM_OPC_f2i = 139, + JVM_OPC_f2l = 140, + JVM_OPC_f2d = 141, + JVM_OPC_d2i = 142, + JVM_OPC_d2l = 143, + JVM_OPC_d2f = 144, + JVM_OPC_i2b = 145, + JVM_OPC_i2c = 146, + JVM_OPC_i2s = 147, + JVM_OPC_lcmp = 148, + JVM_OPC_fcmpl = 149, + JVM_OPC_fcmpg = 150, + JVM_OPC_dcmpl = 151, + JVM_OPC_dcmpg = 152, + JVM_OPC_ifeq = 153, + JVM_OPC_ifne = 154, + JVM_OPC_iflt = 155, + JVM_OPC_ifge = 156, + JVM_OPC_ifgt = 157, + JVM_OPC_ifle = 158, + JVM_OPC_if_icmpeq = 159, + JVM_OPC_if_icmpne = 160, + JVM_OPC_if_icmplt = 161, + JVM_OPC_if_icmpge = 162, + JVM_OPC_if_icmpgt = 163, + JVM_OPC_if_icmple = 164, + JVM_OPC_if_acmpeq = 165, + JVM_OPC_if_acmpne = 166, + JVM_OPC_goto = 167, + JVM_OPC_jsr = 168, + JVM_OPC_ret = 169, + JVM_OPC_tableswitch = 170, + JVM_OPC_lookupswitch = 171, + JVM_OPC_ireturn = 172, + JVM_OPC_lreturn = 173, + JVM_OPC_freturn = 174, + JVM_OPC_dreturn = 175, + JVM_OPC_areturn = 176, + JVM_OPC_return = 177, + JVM_OPC_getstatic = 178, + JVM_OPC_putstatic = 179, + JVM_OPC_getfield = 180, + JVM_OPC_putfield = 181, + JVM_OPC_invokevirtual = 182, + JVM_OPC_invokespecial = 183, + JVM_OPC_invokestatic = 184, + JVM_OPC_invokeinterface = 185, + JVM_OPC_invokedynamic = 186, + JVM_OPC_new = 187, + JVM_OPC_newarray = 188, + JVM_OPC_anewarray = 189, + JVM_OPC_arraylength = 190, + JVM_OPC_athrow = 191, + JVM_OPC_checkcast = 192, + JVM_OPC_instanceof = 193, + JVM_OPC_monitorenter = 194, + JVM_OPC_monitorexit = 195, + JVM_OPC_wide = 196, + JVM_OPC_multianewarray = 197, + JVM_OPC_ifnull = 198, + JVM_OPC_ifnonnull = 199, + JVM_OPC_goto_w = 200, + JVM_OPC_jsr_w = 201, + JVM_OPC_MAX = 201 +}; + +/* Opcode length initializer, use with something like: + * unsigned char opcode_length[JVM_OPC_MAX+1] = JVM_OPCODE_LENGTH_INITIALIZER; + */ +#define JVM_OPCODE_LENGTH_INITIALIZER { \ + 1, /* nop */ \ + 1, /* aconst_null */ \ + 1, /* iconst_m1 */ \ + 1, /* iconst_0 */ \ + 1, /* iconst_1 */ \ + 1, /* iconst_2 */ \ + 1, /* iconst_3 */ \ + 1, /* iconst_4 */ \ + 1, /* iconst_5 */ \ + 1, /* lconst_0 */ \ + 1, /* lconst_1 */ \ + 1, /* fconst_0 */ \ + 1, /* fconst_1 */ \ + 1, /* fconst_2 */ \ + 1, /* dconst_0 */ \ + 1, /* dconst_1 */ \ + 2, /* bipush */ \ + 3, /* sipush */ \ + 2, /* ldc */ \ + 3, /* ldc_w */ \ + 3, /* ldc2_w */ \ + 2, /* iload */ \ + 2, /* lload */ \ + 2, /* fload */ \ + 2, /* dload */ \ + 2, /* aload */ \ + 1, /* iload_0 */ \ + 1, /* iload_1 */ \ + 1, /* iload_2 */ \ + 1, /* iload_3 */ \ + 1, /* lload_0 */ \ + 1, /* lload_1 */ \ + 1, /* lload_2 */ \ + 1, /* lload_3 */ \ + 1, /* fload_0 */ \ + 1, /* fload_1 */ \ + 1, /* fload_2 */ \ + 1, /* fload_3 */ \ + 1, /* dload_0 */ \ + 1, /* dload_1 */ \ + 1, /* dload_2 */ \ + 1, /* dload_3 */ \ + 1, /* aload_0 */ \ + 1, /* aload_1 */ \ + 1, /* aload_2 */ \ + 1, /* aload_3 */ \ + 1, /* iaload */ \ + 1, /* laload */ \ + 1, /* faload */ \ + 1, /* daload */ \ + 1, /* aaload */ \ + 1, /* baload */ \ + 1, /* caload */ \ + 1, /* saload */ \ + 2, /* istore */ \ + 2, /* lstore */ \ + 2, /* fstore */ \ + 2, /* dstore */ \ + 2, /* astore */ \ + 1, /* istore_0 */ \ + 1, /* istore_1 */ \ + 1, /* istore_2 */ \ + 1, /* istore_3 */ \ + 1, /* lstore_0 */ \ + 1, /* lstore_1 */ \ + 1, /* lstore_2 */ \ + 1, /* lstore_3 */ \ + 1, /* fstore_0 */ \ + 1, /* fstore_1 */ \ + 1, /* fstore_2 */ \ + 1, /* fstore_3 */ \ + 1, /* dstore_0 */ \ + 1, /* dstore_1 */ \ + 1, /* dstore_2 */ \ + 1, /* dstore_3 */ \ + 1, /* astore_0 */ \ + 1, /* astore_1 */ \ + 1, /* astore_2 */ \ + 1, /* astore_3 */ \ + 1, /* iastore */ \ + 1, /* lastore */ \ + 1, /* fastore */ \ + 1, /* dastore */ \ + 1, /* aastore */ \ + 1, /* bastore */ \ + 1, /* castore */ \ + 1, /* sastore */ \ + 1, /* pop */ \ + 1, /* pop2 */ \ + 1, /* dup */ \ + 1, /* dup_x1 */ \ + 1, /* dup_x2 */ \ + 1, /* dup2 */ \ + 1, /* dup2_x1 */ \ + 1, /* dup2_x2 */ \ + 1, /* swap */ \ + 1, /* iadd */ \ + 1, /* ladd */ \ + 1, /* fadd */ \ + 1, /* dadd */ \ + 1, /* isub */ \ + 1, /* lsub */ \ + 1, /* fsub */ \ + 1, /* dsub */ \ + 1, /* imul */ \ + 1, /* lmul */ \ + 1, /* fmul */ \ + 1, /* dmul */ \ + 1, /* idiv */ \ + 1, /* ldiv */ \ + 1, /* fdiv */ \ + 1, /* ddiv */ \ + 1, /* irem */ \ + 1, /* lrem */ \ + 1, /* frem */ \ + 1, /* drem */ \ + 1, /* ineg */ \ + 1, /* lneg */ \ + 1, /* fneg */ \ + 1, /* dneg */ \ + 1, /* ishl */ \ + 1, /* lshl */ \ + 1, /* ishr */ \ + 1, /* lshr */ \ + 1, /* iushr */ \ + 1, /* lushr */ \ + 1, /* iand */ \ + 1, /* land */ \ + 1, /* ior */ \ + 1, /* lor */ \ + 1, /* ixor */ \ + 1, /* lxor */ \ + 3, /* iinc */ \ + 1, /* i2l */ \ + 1, /* i2f */ \ + 1, /* i2d */ \ + 1, /* l2i */ \ + 1, /* l2f */ \ + 1, /* l2d */ \ + 1, /* f2i */ \ + 1, /* f2l */ \ + 1, /* f2d */ \ + 1, /* d2i */ \ + 1, /* d2l */ \ + 1, /* d2f */ \ + 1, /* i2b */ \ + 1, /* i2c */ \ + 1, /* i2s */ \ + 1, /* lcmp */ \ + 1, /* fcmpl */ \ + 1, /* fcmpg */ \ + 1, /* dcmpl */ \ + 1, /* dcmpg */ \ + 3, /* ifeq */ \ + 3, /* ifne */ \ + 3, /* iflt */ \ + 3, /* ifge */ \ + 3, /* ifgt */ \ + 3, /* ifle */ \ + 3, /* if_icmpeq */ \ + 3, /* if_icmpne */ \ + 3, /* if_icmplt */ \ + 3, /* if_icmpge */ \ + 3, /* if_icmpgt */ \ + 3, /* if_icmple */ \ + 3, /* if_acmpeq */ \ + 3, /* if_acmpne */ \ + 3, /* goto */ \ + 3, /* jsr */ \ + 2, /* ret */ \ + 99, /* tableswitch */ \ + 99, /* lookupswitch */ \ + 1, /* ireturn */ \ + 1, /* lreturn */ \ + 1, /* freturn */ \ + 1, /* dreturn */ \ + 1, /* areturn */ \ + 1, /* return */ \ + 3, /* getstatic */ \ + 3, /* putstatic */ \ + 3, /* getfield */ \ + 3, /* putfield */ \ + 3, /* invokevirtual */ \ + 3, /* invokespecial */ \ + 3, /* invokestatic */ \ + 5, /* invokeinterface */ \ + 5, /* invokedynamic */ \ + 3, /* new */ \ + 2, /* newarray */ \ + 3, /* anewarray */ \ + 1, /* arraylength */ \ + 1, /* athrow */ \ + 3, /* checkcast */ \ + 3, /* instanceof */ \ + 1, /* monitorenter */ \ + 1, /* monitorexit */ \ + 0, /* wide */ \ + 4, /* multianewarray */ \ + 3, /* ifnull */ \ + 3, /* ifnonnull */ \ + 5, /* goto_w */ \ + 5 /* jsr_w */ \ +} + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* CLASSFILE_CONSTANTS */ diff --git a/java/include/jawt.h b/java/include/jawt.h new file mode 100644 index 0000000000000000000000000000000000000000..2079b0bc1b3de1b60aa8d8707e722f03be81dd1e --- /dev/null +++ b/java/include/jawt.h @@ -0,0 +1,356 @@ +/* + * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +#ifndef _JAVASOFT_JAWT_H_ +#define _JAVASOFT_JAWT_H_ + +#include "jni.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * AWT native interface. + * + * The AWT native interface allows a native C or C++ application a means + * by which to access native structures in AWT. This is to facilitate moving + * legacy C and C++ applications to Java and to target the needs of the + * developers who need to do their own native rendering to canvases + * for performance or other reasons. + * + * Conversely it also provides mechanisms for an application which already + * has a native window to provide that to AWT for AWT rendering. + * + * Since every platform may be different in its native data structures + * and APIs for windowing systems the application must necessarily + * provided per-platform source and compile and deliver per-platform + * native code to use this API. + * + * These interfaces are not part of the Java SE specification and + * a VM is not required to implement this API. However it is strongly + * recommended that all implementations which support headful AWT + * also support these interfaces. + * + */ + +/* + * AWT Native Drawing Surface (JAWT_DrawingSurface). + * + * For each platform, there is a native drawing surface structure. This + * platform-specific structure can be found in jawt_md.h. It is recommended + * that additional platforms follow the same model. It is also recommended + * that VMs on all platforms support the existing structures in jawt_md.h. + * + ******************* + * EXAMPLE OF USAGE: + ******************* + * + * In Win32, a programmer wishes to access the HWND of a canvas to perform + * native rendering into it. The programmer has declared the paint() method + * for their canvas subclass to be native: + * + * + * MyCanvas.java: + * + * import java.awt.*; + * + * public class MyCanvas extends Canvas { + * + * static { + * System.loadLibrary("mylib"); + * } + * + * public native void paint(Graphics g); + * } + * + * + * myfile.c: + * + * #include "jawt_md.h" + * #include + * + * JNIEXPORT void JNICALL + * Java_MyCanvas_paint(JNIEnv* env, jobject canvas, jobject graphics) + * { + * JAWT awt; + * JAWT_DrawingSurface* ds; + * JAWT_DrawingSurfaceInfo* dsi; + * JAWT_Win32DrawingSurfaceInfo* dsi_win; + * jboolean result; + * jint lock; + * + * // Get the AWT. Request version 9 to access features in that release. + * awt.version = JAWT_VERSION_9; + * result = JAWT_GetAWT(env, &awt); + * assert(result != JNI_FALSE); + * + * // Get the drawing surface + * ds = awt.GetDrawingSurface(env, canvas); + * assert(ds != NULL); + * + * // Lock the drawing surface + * lock = ds->Lock(ds); + * assert((lock & JAWT_LOCK_ERROR) == 0); + * + * // Get the drawing surface info + * dsi = ds->GetDrawingSurfaceInfo(ds); + * + * // Get the platform-specific drawing info + * dsi_win = (JAWT_Win32DrawingSurfaceInfo*)dsi->platformInfo; + * + * ////////////////////////////// + * // !!! DO PAINTING HERE !!! // + * ////////////////////////////// + * + * // Free the drawing surface info + * ds->FreeDrawingSurfaceInfo(dsi); + * + * // Unlock the drawing surface + * ds->Unlock(ds); + * + * // Free the drawing surface + * awt.FreeDrawingSurface(ds); + * } + * + */ + +/* + * JAWT_Rectangle + * Structure for a native rectangle. + */ +typedef struct jawt_Rectangle { + jint x; + jint y; + jint width; + jint height; +} JAWT_Rectangle; + +struct jawt_DrawingSurface; + +/* + * JAWT_DrawingSurfaceInfo + * Structure for containing the underlying drawing information of a component. + */ +typedef struct jawt_DrawingSurfaceInfo { + /* + * Pointer to the platform-specific information. This can be safely + * cast to a JAWT_Win32DrawingSurfaceInfo on Windows or a + * JAWT_X11DrawingSurfaceInfo on Linux and Solaris. On Mac OS X this is a + * pointer to a NSObject that conforms to the JAWT_SurfaceLayers + * protocol. See jawt_md.h for details. + */ + void* platformInfo; + /* Cached pointer to the underlying drawing surface */ + struct jawt_DrawingSurface* ds; + /* Bounding rectangle of the drawing surface */ + JAWT_Rectangle bounds; + /* Number of rectangles in the clip */ + jint clipSize; + /* Clip rectangle array */ + JAWT_Rectangle* clip; +} JAWT_DrawingSurfaceInfo; + +#define JAWT_LOCK_ERROR 0x00000001 +#define JAWT_LOCK_CLIP_CHANGED 0x00000002 +#define JAWT_LOCK_BOUNDS_CHANGED 0x00000004 +#define JAWT_LOCK_SURFACE_CHANGED 0x00000008 + +/* + * JAWT_DrawingSurface + * Structure for containing the underlying drawing information of a component. + * All operations on a JAWT_DrawingSurface MUST be performed from the same + * thread as the call to GetDrawingSurface. + */ +typedef struct jawt_DrawingSurface { + /* + * Cached reference to the Java environment of the calling thread. + * If Lock(), Unlock(), GetDrawingSurfaceInfo() or + * FreeDrawingSurfaceInfo() are called from a different thread, + * this data member should be set before calling those functions. + */ + JNIEnv* env; + /* Cached reference to the target object */ + jobject target; + /* + * Lock the surface of the target component for native rendering. + * When finished drawing, the surface must be unlocked with + * Unlock(). This function returns a bitmask with one or more of the + * following values: + * + * JAWT_LOCK_ERROR - When an error has occurred and the surface could not + * be locked. + * + * JAWT_LOCK_CLIP_CHANGED - When the clip region has changed. + * + * JAWT_LOCK_BOUNDS_CHANGED - When the bounds of the surface have changed. + * + * JAWT_LOCK_SURFACE_CHANGED - When the surface itself has changed + */ + jint (JNICALL *Lock) + (struct jawt_DrawingSurface* ds); + /* + * Get the drawing surface info. + * The value returned may be cached, but the values may change if + * additional calls to Lock() or Unlock() are made. + * Lock() must be called before this can return a valid value. + * Returns NULL if an error has occurred. + * When finished with the returned value, FreeDrawingSurfaceInfo must be + * called. + */ + JAWT_DrawingSurfaceInfo* (JNICALL *GetDrawingSurfaceInfo) + (struct jawt_DrawingSurface* ds); + /* + * Free the drawing surface info. + */ + void (JNICALL *FreeDrawingSurfaceInfo) + (JAWT_DrawingSurfaceInfo* dsi); + /* + * Unlock the drawing surface of the target component for native rendering. + */ + void (JNICALL *Unlock) + (struct jawt_DrawingSurface* ds); +} JAWT_DrawingSurface; + +/* + * JAWT + * Structure for containing native AWT functions. + */ +typedef struct jawt { + /* + * Version of this structure. This must always be set before + * calling JAWT_GetAWT(). It affects the functions returned. + * Must be one of the known pre-defined versions. + */ + jint version; + /* + * Return a drawing surface from a target jobject. This value + * may be cached. + * Returns NULL if an error has occurred. + * Target must be a java.awt.Component (should be a Canvas + * or Window for native rendering). + * FreeDrawingSurface() must be called when finished with the + * returned JAWT_DrawingSurface. + */ + JAWT_DrawingSurface* (JNICALL *GetDrawingSurface) + (JNIEnv* env, jobject target); + /* + * Free the drawing surface allocated in GetDrawingSurface. + */ + void (JNICALL *FreeDrawingSurface) + (JAWT_DrawingSurface* ds); + /* + * Since 1.4 + * Locks the entire AWT for synchronization purposes + */ + void (JNICALL *Lock)(JNIEnv* env); + /* + * Since 1.4 + * Unlocks the entire AWT for synchronization purposes + */ + void (JNICALL *Unlock)(JNIEnv* env); + /* + * Since 1.4 + * Returns a reference to a java.awt.Component from a native + * platform handle. On Windows, this corresponds to an HWND; + * on Solaris and Linux, this is a Drawable. For other platforms, + * see the appropriate machine-dependent header file for a description. + * The reference returned by this function is a local + * reference that is only valid in this environment. + * This function returns a NULL reference if no component could be + * found with matching platform information. + */ + jobject (JNICALL *GetComponent)(JNIEnv* env, void* platformInfo); + + /** + * Since 9 + * Creates a java.awt.Frame placed in a native container. Container is + * referenced by the native platform handle. For example on Windows this + * corresponds to an HWND. For other platforms, see the appropriate + * machine-dependent header file for a description. The reference returned + * by this function is a local reference that is only valid in this + * environment. This function returns a NULL reference if no frame could be + * created with matching platform information. + */ + jobject (JNICALL *CreateEmbeddedFrame) (JNIEnv *env, void* platformInfo); + + /** + * Since 9 + * Moves and resizes the embedded frame. The new location of the top-left + * corner is specified by x and y parameters relative to the native parent + * component. The new size is specified by width and height. + * + * The embedded frame should be created by CreateEmbeddedFrame() method, or + * this function will not have any effect. + * + * java.awt.Component.setLocation() and java.awt.Component.setBounds() for + * EmbeddedFrame really don't move it within the native parent. These + * methods always locate the embedded frame at (0, 0) for backward + * compatibility. To allow moving embedded frames this method was + * introduced, and it works just the same way as setLocation() and + * setBounds() for usual, non-embedded components. + * + * Using usual get/setLocation() and get/setBounds() together with this new + * method is not recommended. + */ + void (JNICALL *SetBounds) (JNIEnv *env, jobject embeddedFrame, + jint x, jint y, jint w, jint h); + /** + * Since 9 + * Synthesize a native message to activate or deactivate an EmbeddedFrame + * window depending on the value of parameter doActivate, if "true" + * activates the window; otherwise, deactivates the window. + * + * The embedded frame should be created by CreateEmbeddedFrame() method, or + * this function will not have any effect. + */ + void (JNICALL *SynthesizeWindowActivation) (JNIEnv *env, + jobject embeddedFrame, jboolean doActivate); +} JAWT; + +/* + * Get the AWT native structure. This function returns JNI_FALSE if + * an error occurs. + */ +_JNI_IMPORT_OR_EXPORT_ +jboolean JNICALL JAWT_GetAWT(JNIEnv* env, JAWT* awt); + +/* + * Specify one of these constants as the JAWT.version + * Specifying an earlier version will limit the available functions to + * those provided in that earlier version of JAWT. + * See the "Since" note on each API. Methods with no "Since" + * may be presumed to be present in JAWT_VERSION_1_3. + */ +#define JAWT_VERSION_1_3 0x00010003 +#define JAWT_VERSION_1_4 0x00010004 +#define JAWT_VERSION_1_7 0x00010007 +#define JAWT_VERSION_9 0x00090000 + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /* !_JAVASOFT_JAWT_H_ */ diff --git a/java/include/jdwpTransport.h b/java/include/jdwpTransport.h new file mode 100644 index 0000000000000000000000000000000000000000..227a7222897dcc9f7b5e1f82a8d09550990257f8 --- /dev/null +++ b/java/include/jdwpTransport.h @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * Java Debug Wire Protocol Transport Service Provider Interface. + */ + +#ifndef JDWPTRANSPORT_H +#define JDWPTRANSPORT_H + +#include "jni.h" + +enum { + JDWPTRANSPORT_VERSION_1_0 = 0x00010000, + JDWPTRANSPORT_VERSION_1_1 = 0x00010001 +}; + +#ifdef __cplusplus +extern "C" { +#endif + +struct jdwpTransportNativeInterface_; + +struct _jdwpTransportEnv; + +#ifdef __cplusplus +typedef _jdwpTransportEnv jdwpTransportEnv; +#else +typedef const struct jdwpTransportNativeInterface_ *jdwpTransportEnv; +#endif /* __cplusplus */ + +/* + * Errors. Universal errors with JVMTI/JVMDI equivalents keep the + * values the same. + */ +typedef enum { + JDWPTRANSPORT_ERROR_NONE = 0, + JDWPTRANSPORT_ERROR_ILLEGAL_ARGUMENT = 103, + JDWPTRANSPORT_ERROR_OUT_OF_MEMORY = 110, + JDWPTRANSPORT_ERROR_INTERNAL = 113, + JDWPTRANSPORT_ERROR_ILLEGAL_STATE = 201, + JDWPTRANSPORT_ERROR_IO_ERROR = 202, + JDWPTRANSPORT_ERROR_TIMEOUT = 203, + JDWPTRANSPORT_ERROR_MSG_NOT_AVAILABLE = 204 +} jdwpTransportError; + + +/* + * Structure to define capabilities + */ +typedef struct { + unsigned int can_timeout_attach :1; + unsigned int can_timeout_accept :1; + unsigned int can_timeout_handshake :1; + unsigned int reserved3 :1; + unsigned int reserved4 :1; + unsigned int reserved5 :1; + unsigned int reserved6 :1; + unsigned int reserved7 :1; + unsigned int reserved8 :1; + unsigned int reserved9 :1; + unsigned int reserved10 :1; + unsigned int reserved11 :1; + unsigned int reserved12 :1; + unsigned int reserved13 :1; + unsigned int reserved14 :1; + unsigned int reserved15 :1; +} JDWPTransportCapabilities; + + +/* + * Structures to define packet layout. + * + * See: http://java.sun.com/j2se/1.5/docs/guide/jpda/jdwp-spec.html + */ + +#define JDWP_HEADER_SIZE 11 + +enum { + /* + * If additional flags are added that apply to jdwpCmdPacket, + * then debugLoop.c: reader() will need to be updated to + * accept more than JDWPTRANSPORT_FLAGS_NONE. + */ + JDWPTRANSPORT_FLAGS_NONE = 0x0, + JDWPTRANSPORT_FLAGS_REPLY = 0x80 +}; + +typedef struct { + jint len; + jint id; + jbyte flags; + jbyte cmdSet; + jbyte cmd; + jbyte *data; +} jdwpCmdPacket; + +typedef struct { + jint len; + jint id; + jbyte flags; + jshort errorCode; + jbyte *data; +} jdwpReplyPacket; + +typedef struct { + union { + jdwpCmdPacket cmd; + jdwpReplyPacket reply; + } type; +} jdwpPacket; + +/* + * JDWP functions called by the transport. + */ +typedef struct jdwpTransportCallback { + void *(*alloc)(jint numBytes); /* Call this for all allocations */ + void (*free)(void *buffer); /* Call this for all deallocations */ +} jdwpTransportCallback; + +typedef jint (JNICALL *jdwpTransport_OnLoad_t)(JavaVM *jvm, + jdwpTransportCallback *callback, + jint version, + jdwpTransportEnv** env); + +/* + * JDWP transport configuration from the agent. + */ +typedef struct jdwpTransportConfiguration { + /* Field added in JDWPTRANSPORT_VERSION_1_1: */ + const char* allowed_peers; /* Peers allowed for connection */ +} jdwpTransportConfiguration; + + +/* Function Interface */ + +struct jdwpTransportNativeInterface_ { + /* 1 : RESERVED */ + void *reserved1; + + /* 2 : Get Capabilities */ + jdwpTransportError (JNICALL *GetCapabilities)(jdwpTransportEnv* env, + JDWPTransportCapabilities *capabilities_ptr); + + /* 3 : Attach */ + jdwpTransportError (JNICALL *Attach)(jdwpTransportEnv* env, + const char* address, + jlong attach_timeout, + jlong handshake_timeout); + + /* 4: StartListening */ + jdwpTransportError (JNICALL *StartListening)(jdwpTransportEnv* env, + const char* address, + char** actual_address); + + /* 5: StopListening */ + jdwpTransportError (JNICALL *StopListening)(jdwpTransportEnv* env); + + /* 6: Accept */ + jdwpTransportError (JNICALL *Accept)(jdwpTransportEnv* env, + jlong accept_timeout, + jlong handshake_timeout); + + /* 7: IsOpen */ + jboolean (JNICALL *IsOpen)(jdwpTransportEnv* env); + + /* 8: Close */ + jdwpTransportError (JNICALL *Close)(jdwpTransportEnv* env); + + /* 9: ReadPacket */ + jdwpTransportError (JNICALL *ReadPacket)(jdwpTransportEnv* env, + jdwpPacket *pkt); + + /* 10: Write Packet */ + jdwpTransportError (JNICALL *WritePacket)(jdwpTransportEnv* env, + const jdwpPacket* pkt); + + /* 11: GetLastError */ + jdwpTransportError (JNICALL *GetLastError)(jdwpTransportEnv* env, + char** error); + + /* 12: SetTransportConfiguration added in JDWPTRANSPORT_VERSION_1_1 */ + jdwpTransportError (JNICALL *SetTransportConfiguration)(jdwpTransportEnv* env, + jdwpTransportConfiguration *config); +}; + + +/* + * Use inlined functions so that C++ code can use syntax such as + * env->Attach("mymachine:5000", 10*1000, 0); + * + * rather than using C's :- + * + * (*env)->Attach(env, "mymachine:5000", 10*1000, 0); + */ +struct _jdwpTransportEnv { + const struct jdwpTransportNativeInterface_ *functions; +#ifdef __cplusplus + + jdwpTransportError GetCapabilities(JDWPTransportCapabilities *capabilities_ptr) { + return functions->GetCapabilities(this, capabilities_ptr); + } + + jdwpTransportError Attach(const char* address, jlong attach_timeout, + jlong handshake_timeout) { + return functions->Attach(this, address, attach_timeout, handshake_timeout); + } + + jdwpTransportError StartListening(const char* address, + char** actual_address) { + return functions->StartListening(this, address, actual_address); + } + + jdwpTransportError StopListening(void) { + return functions->StopListening(this); + } + + jdwpTransportError Accept(jlong accept_timeout, jlong handshake_timeout) { + return functions->Accept(this, accept_timeout, handshake_timeout); + } + + jboolean IsOpen(void) { + return functions->IsOpen(this); + } + + jdwpTransportError Close(void) { + return functions->Close(this); + } + + jdwpTransportError ReadPacket(jdwpPacket *pkt) { + return functions->ReadPacket(this, pkt); + } + + jdwpTransportError WritePacket(const jdwpPacket* pkt) { + return functions->WritePacket(this, pkt); + } + + jdwpTransportError GetLastError(char** error) { + return functions->GetLastError(this, error); + } + + /* SetTransportConfiguration added in JDWPTRANSPORT_VERSION_1_1 */ + jdwpTransportError SetTransportConfiguration(jdwpTransportConfiguration *config) { + return functions->SetTransportConfiguration(this, config); + } + +#endif /* __cplusplus */ +}; + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* JDWPTRANSPORT_H */ diff --git a/java/include/jni.h b/java/include/jni.h new file mode 100644 index 0000000000000000000000000000000000000000..c85da1bc67f2e86f6d86644bf28511c1a4b6adc1 --- /dev/null +++ b/java/include/jni.h @@ -0,0 +1,2001 @@ +/* + * Copyright (c) 1996, 2023, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * We used part of Netscape's Java Runtime Interface (JRI) as the starting + * point of our design and implementation. + */ + +/****************************************************************************** + * Java Runtime Interface + * Copyright (c) 1996 Netscape Communications Corporation. All rights reserved. + *****************************************************************************/ + +#ifndef _JAVASOFT_JNI_H_ +#define _JAVASOFT_JNI_H_ + +#include +#include + +/* jni_md.h contains the machine-dependent typedefs for jbyte, jint + and jlong */ + +#include "jni_md.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * JNI Types + */ + +#ifndef JNI_TYPES_ALREADY_DEFINED_IN_JNI_MD_H + +typedef unsigned char jboolean; +typedef unsigned short jchar; +typedef short jshort; +typedef float jfloat; +typedef double jdouble; + +typedef jint jsize; + +#ifdef __cplusplus + +class _jobject {}; +class _jclass : public _jobject {}; +class _jthrowable : public _jobject {}; +class _jstring : public _jobject {}; +class _jarray : public _jobject {}; +class _jbooleanArray : public _jarray {}; +class _jbyteArray : public _jarray {}; +class _jcharArray : public _jarray {}; +class _jshortArray : public _jarray {}; +class _jintArray : public _jarray {}; +class _jlongArray : public _jarray {}; +class _jfloatArray : public _jarray {}; +class _jdoubleArray : public _jarray {}; +class _jobjectArray : public _jarray {}; + +typedef _jobject *jobject; +typedef _jclass *jclass; +typedef _jthrowable *jthrowable; +typedef _jstring *jstring; +typedef _jarray *jarray; +typedef _jbooleanArray *jbooleanArray; +typedef _jbyteArray *jbyteArray; +typedef _jcharArray *jcharArray; +typedef _jshortArray *jshortArray; +typedef _jintArray *jintArray; +typedef _jlongArray *jlongArray; +typedef _jfloatArray *jfloatArray; +typedef _jdoubleArray *jdoubleArray; +typedef _jobjectArray *jobjectArray; + +#else + +struct _jobject; + +typedef struct _jobject *jobject; +typedef jobject jclass; +typedef jobject jthrowable; +typedef jobject jstring; +typedef jobject jarray; +typedef jarray jbooleanArray; +typedef jarray jbyteArray; +typedef jarray jcharArray; +typedef jarray jshortArray; +typedef jarray jintArray; +typedef jarray jlongArray; +typedef jarray jfloatArray; +typedef jarray jdoubleArray; +typedef jarray jobjectArray; + +#endif + +typedef jobject jweak; + +typedef union jvalue { + jboolean z; + jbyte b; + jchar c; + jshort s; + jint i; + jlong j; + jfloat f; + jdouble d; + jobject l; +} jvalue; + +struct _jfieldID; +typedef struct _jfieldID *jfieldID; + +struct _jmethodID; +typedef struct _jmethodID *jmethodID; + +/* Return values from jobjectRefType */ +typedef enum _jobjectType { + JNIInvalidRefType = 0, + JNILocalRefType = 1, + JNIGlobalRefType = 2, + JNIWeakGlobalRefType = 3 +} jobjectRefType; + + +#endif /* JNI_TYPES_ALREADY_DEFINED_IN_JNI_MD_H */ + +/* + * jboolean constants + */ + +#define JNI_FALSE 0 +#define JNI_TRUE 1 + +/* + * possible return values for JNI functions. + */ + +#define JNI_OK 0 /* success */ +#define JNI_ERR (-1) /* unknown error */ +#define JNI_EDETACHED (-2) /* thread detached from the VM */ +#define JNI_EVERSION (-3) /* JNI version error */ +#define JNI_ENOMEM (-4) /* not enough memory */ +#define JNI_EEXIST (-5) /* VM already created */ +#define JNI_EINVAL (-6) /* invalid arguments */ + +/* + * used in ReleaseScalarArrayElements + */ + +#define JNI_COMMIT 1 +#define JNI_ABORT 2 + +/* + * used in RegisterNatives to describe native method name, signature, + * and function pointer. + */ + +typedef struct { + char *name; + char *signature; + void *fnPtr; +} JNINativeMethod; + +/* + * JNI Native Method Interface. + */ + +struct JNINativeInterface_; + +struct JNIEnv_; + +#ifdef __cplusplus +typedef JNIEnv_ JNIEnv; +#else +typedef const struct JNINativeInterface_ *JNIEnv; +#endif + +/* + * JNI Invocation Interface. + */ + +struct JNIInvokeInterface_; + +struct JavaVM_; + +#ifdef __cplusplus +typedef JavaVM_ JavaVM; +#else +typedef const struct JNIInvokeInterface_ *JavaVM; +#endif + +struct JNINativeInterface_ { + void *reserved0; + void *reserved1; + void *reserved2; + + void *reserved3; + jint (JNICALL *GetVersion)(JNIEnv *env); + + jclass (JNICALL *DefineClass) + (JNIEnv *env, const char *name, jobject loader, const jbyte *buf, + jsize len); + jclass (JNICALL *FindClass) + (JNIEnv *env, const char *name); + + jmethodID (JNICALL *FromReflectedMethod) + (JNIEnv *env, jobject method); + jfieldID (JNICALL *FromReflectedField) + (JNIEnv *env, jobject field); + + jobject (JNICALL *ToReflectedMethod) + (JNIEnv *env, jclass cls, jmethodID methodID, jboolean isStatic); + + jclass (JNICALL *GetSuperclass) + (JNIEnv *env, jclass sub); + jboolean (JNICALL *IsAssignableFrom) + (JNIEnv *env, jclass sub, jclass sup); + + jobject (JNICALL *ToReflectedField) + (JNIEnv *env, jclass cls, jfieldID fieldID, jboolean isStatic); + + jint (JNICALL *Throw) + (JNIEnv *env, jthrowable obj); + jint (JNICALL *ThrowNew) + (JNIEnv *env, jclass clazz, const char *msg); + jthrowable (JNICALL *ExceptionOccurred) + (JNIEnv *env); + void (JNICALL *ExceptionDescribe) + (JNIEnv *env); + void (JNICALL *ExceptionClear) + (JNIEnv *env); + void (JNICALL *FatalError) + (JNIEnv *env, const char *msg); + + jint (JNICALL *PushLocalFrame) + (JNIEnv *env, jint capacity); + jobject (JNICALL *PopLocalFrame) + (JNIEnv *env, jobject result); + + jobject (JNICALL *NewGlobalRef) + (JNIEnv *env, jobject lobj); + void (JNICALL *DeleteGlobalRef) + (JNIEnv *env, jobject gref); + void (JNICALL *DeleteLocalRef) + (JNIEnv *env, jobject obj); + jboolean (JNICALL *IsSameObject) + (JNIEnv *env, jobject obj1, jobject obj2); + jobject (JNICALL *NewLocalRef) + (JNIEnv *env, jobject ref); + jint (JNICALL *EnsureLocalCapacity) + (JNIEnv *env, jint capacity); + + jobject (JNICALL *AllocObject) + (JNIEnv *env, jclass clazz); + jobject (JNICALL *NewObject) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jobject (JNICALL *NewObjectV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jobject (JNICALL *NewObjectA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jclass (JNICALL *GetObjectClass) + (JNIEnv *env, jobject obj); + jboolean (JNICALL *IsInstanceOf) + (JNIEnv *env, jobject obj, jclass clazz); + + jmethodID (JNICALL *GetMethodID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + + jobject (JNICALL *CallObjectMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jobject (JNICALL *CallObjectMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jobject (JNICALL *CallObjectMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue * args); + + jboolean (JNICALL *CallBooleanMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jboolean (JNICALL *CallBooleanMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jboolean (JNICALL *CallBooleanMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue * args); + + jbyte (JNICALL *CallByteMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jbyte (JNICALL *CallByteMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jbyte (JNICALL *CallByteMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jchar (JNICALL *CallCharMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jchar (JNICALL *CallCharMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jchar (JNICALL *CallCharMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jshort (JNICALL *CallShortMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jshort (JNICALL *CallShortMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jshort (JNICALL *CallShortMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jint (JNICALL *CallIntMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jint (JNICALL *CallIntMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jint (JNICALL *CallIntMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jlong (JNICALL *CallLongMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jlong (JNICALL *CallLongMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jlong (JNICALL *CallLongMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jfloat (JNICALL *CallFloatMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jfloat (JNICALL *CallFloatMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jfloat (JNICALL *CallFloatMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jdouble (JNICALL *CallDoubleMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jdouble (JNICALL *CallDoubleMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jdouble (JNICALL *CallDoubleMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + void (JNICALL *CallVoidMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + void (JNICALL *CallVoidMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + void (JNICALL *CallVoidMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue * args); + + jobject (JNICALL *CallNonvirtualObjectMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jobject (JNICALL *CallNonvirtualObjectMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jobject (JNICALL *CallNonvirtualObjectMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue * args); + + jboolean (JNICALL *CallNonvirtualBooleanMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jboolean (JNICALL *CallNonvirtualBooleanMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jboolean (JNICALL *CallNonvirtualBooleanMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue * args); + + jbyte (JNICALL *CallNonvirtualByteMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jbyte (JNICALL *CallNonvirtualByteMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jbyte (JNICALL *CallNonvirtualByteMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jchar (JNICALL *CallNonvirtualCharMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jchar (JNICALL *CallNonvirtualCharMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jchar (JNICALL *CallNonvirtualCharMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jshort (JNICALL *CallNonvirtualShortMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jshort (JNICALL *CallNonvirtualShortMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jshort (JNICALL *CallNonvirtualShortMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jint (JNICALL *CallNonvirtualIntMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jint (JNICALL *CallNonvirtualIntMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jint (JNICALL *CallNonvirtualIntMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jlong (JNICALL *CallNonvirtualLongMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jlong (JNICALL *CallNonvirtualLongMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jlong (JNICALL *CallNonvirtualLongMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jfloat (JNICALL *CallNonvirtualFloatMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jfloat (JNICALL *CallNonvirtualFloatMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jfloat (JNICALL *CallNonvirtualFloatMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jdouble (JNICALL *CallNonvirtualDoubleMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jdouble (JNICALL *CallNonvirtualDoubleMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jdouble (JNICALL *CallNonvirtualDoubleMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + void (JNICALL *CallNonvirtualVoidMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + void (JNICALL *CallNonvirtualVoidMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + void (JNICALL *CallNonvirtualVoidMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue * args); + + jfieldID (JNICALL *GetFieldID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + + jobject (JNICALL *GetObjectField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jboolean (JNICALL *GetBooleanField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jbyte (JNICALL *GetByteField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jchar (JNICALL *GetCharField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jshort (JNICALL *GetShortField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jint (JNICALL *GetIntField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jlong (JNICALL *GetLongField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jfloat (JNICALL *GetFloatField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jdouble (JNICALL *GetDoubleField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + + void (JNICALL *SetObjectField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jobject val); + void (JNICALL *SetBooleanField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jboolean val); + void (JNICALL *SetByteField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jbyte val); + void (JNICALL *SetCharField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jchar val); + void (JNICALL *SetShortField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jshort val); + void (JNICALL *SetIntField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jint val); + void (JNICALL *SetLongField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jlong val); + void (JNICALL *SetFloatField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jfloat val); + void (JNICALL *SetDoubleField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jdouble val); + + jmethodID (JNICALL *GetStaticMethodID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + + jobject (JNICALL *CallStaticObjectMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jobject (JNICALL *CallStaticObjectMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jobject (JNICALL *CallStaticObjectMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jboolean (JNICALL *CallStaticBooleanMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jboolean (JNICALL *CallStaticBooleanMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jboolean (JNICALL *CallStaticBooleanMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jbyte (JNICALL *CallStaticByteMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jbyte (JNICALL *CallStaticByteMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jbyte (JNICALL *CallStaticByteMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jchar (JNICALL *CallStaticCharMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jchar (JNICALL *CallStaticCharMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jchar (JNICALL *CallStaticCharMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jshort (JNICALL *CallStaticShortMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jshort (JNICALL *CallStaticShortMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jshort (JNICALL *CallStaticShortMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jint (JNICALL *CallStaticIntMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jint (JNICALL *CallStaticIntMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jint (JNICALL *CallStaticIntMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jlong (JNICALL *CallStaticLongMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jlong (JNICALL *CallStaticLongMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jlong (JNICALL *CallStaticLongMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jfloat (JNICALL *CallStaticFloatMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jfloat (JNICALL *CallStaticFloatMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jfloat (JNICALL *CallStaticFloatMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jdouble (JNICALL *CallStaticDoubleMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jdouble (JNICALL *CallStaticDoubleMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jdouble (JNICALL *CallStaticDoubleMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + void (JNICALL *CallStaticVoidMethod) + (JNIEnv *env, jclass cls, jmethodID methodID, ...); + void (JNICALL *CallStaticVoidMethodV) + (JNIEnv *env, jclass cls, jmethodID methodID, va_list args); + void (JNICALL *CallStaticVoidMethodA) + (JNIEnv *env, jclass cls, jmethodID methodID, const jvalue * args); + + jfieldID (JNICALL *GetStaticFieldID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + jobject (JNICALL *GetStaticObjectField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jboolean (JNICALL *GetStaticBooleanField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jbyte (JNICALL *GetStaticByteField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jchar (JNICALL *GetStaticCharField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jshort (JNICALL *GetStaticShortField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jint (JNICALL *GetStaticIntField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jlong (JNICALL *GetStaticLongField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jfloat (JNICALL *GetStaticFloatField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jdouble (JNICALL *GetStaticDoubleField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + + void (JNICALL *SetStaticObjectField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jobject value); + void (JNICALL *SetStaticBooleanField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jboolean value); + void (JNICALL *SetStaticByteField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jbyte value); + void (JNICALL *SetStaticCharField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jchar value); + void (JNICALL *SetStaticShortField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jshort value); + void (JNICALL *SetStaticIntField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jint value); + void (JNICALL *SetStaticLongField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jlong value); + void (JNICALL *SetStaticFloatField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jfloat value); + void (JNICALL *SetStaticDoubleField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jdouble value); + + jstring (JNICALL *NewString) + (JNIEnv *env, const jchar *unicode, jsize len); + jsize (JNICALL *GetStringLength) + (JNIEnv *env, jstring str); + const jchar *(JNICALL *GetStringChars) + (JNIEnv *env, jstring str, jboolean *isCopy); + void (JNICALL *ReleaseStringChars) + (JNIEnv *env, jstring str, const jchar *chars); + + jstring (JNICALL *NewStringUTF) + (JNIEnv *env, const char *utf); + jsize (JNICALL *GetStringUTFLength) + (JNIEnv *env, jstring str); + const char* (JNICALL *GetStringUTFChars) + (JNIEnv *env, jstring str, jboolean *isCopy); + void (JNICALL *ReleaseStringUTFChars) + (JNIEnv *env, jstring str, const char* chars); + + + jsize (JNICALL *GetArrayLength) + (JNIEnv *env, jarray array); + + jobjectArray (JNICALL *NewObjectArray) + (JNIEnv *env, jsize len, jclass clazz, jobject init); + jobject (JNICALL *GetObjectArrayElement) + (JNIEnv *env, jobjectArray array, jsize index); + void (JNICALL *SetObjectArrayElement) + (JNIEnv *env, jobjectArray array, jsize index, jobject val); + + jbooleanArray (JNICALL *NewBooleanArray) + (JNIEnv *env, jsize len); + jbyteArray (JNICALL *NewByteArray) + (JNIEnv *env, jsize len); + jcharArray (JNICALL *NewCharArray) + (JNIEnv *env, jsize len); + jshortArray (JNICALL *NewShortArray) + (JNIEnv *env, jsize len); + jintArray (JNICALL *NewIntArray) + (JNIEnv *env, jsize len); + jlongArray (JNICALL *NewLongArray) + (JNIEnv *env, jsize len); + jfloatArray (JNICALL *NewFloatArray) + (JNIEnv *env, jsize len); + jdoubleArray (JNICALL *NewDoubleArray) + (JNIEnv *env, jsize len); + + jboolean * (JNICALL *GetBooleanArrayElements) + (JNIEnv *env, jbooleanArray array, jboolean *isCopy); + jbyte * (JNICALL *GetByteArrayElements) + (JNIEnv *env, jbyteArray array, jboolean *isCopy); + jchar * (JNICALL *GetCharArrayElements) + (JNIEnv *env, jcharArray array, jboolean *isCopy); + jshort * (JNICALL *GetShortArrayElements) + (JNIEnv *env, jshortArray array, jboolean *isCopy); + jint * (JNICALL *GetIntArrayElements) + (JNIEnv *env, jintArray array, jboolean *isCopy); + jlong * (JNICALL *GetLongArrayElements) + (JNIEnv *env, jlongArray array, jboolean *isCopy); + jfloat * (JNICALL *GetFloatArrayElements) + (JNIEnv *env, jfloatArray array, jboolean *isCopy); + jdouble * (JNICALL *GetDoubleArrayElements) + (JNIEnv *env, jdoubleArray array, jboolean *isCopy); + + void (JNICALL *ReleaseBooleanArrayElements) + (JNIEnv *env, jbooleanArray array, jboolean *elems, jint mode); + void (JNICALL *ReleaseByteArrayElements) + (JNIEnv *env, jbyteArray array, jbyte *elems, jint mode); + void (JNICALL *ReleaseCharArrayElements) + (JNIEnv *env, jcharArray array, jchar *elems, jint mode); + void (JNICALL *ReleaseShortArrayElements) + (JNIEnv *env, jshortArray array, jshort *elems, jint mode); + void (JNICALL *ReleaseIntArrayElements) + (JNIEnv *env, jintArray array, jint *elems, jint mode); + void (JNICALL *ReleaseLongArrayElements) + (JNIEnv *env, jlongArray array, jlong *elems, jint mode); + void (JNICALL *ReleaseFloatArrayElements) + (JNIEnv *env, jfloatArray array, jfloat *elems, jint mode); + void (JNICALL *ReleaseDoubleArrayElements) + (JNIEnv *env, jdoubleArray array, jdouble *elems, jint mode); + + void (JNICALL *GetBooleanArrayRegion) + (JNIEnv *env, jbooleanArray array, jsize start, jsize l, jboolean *buf); + void (JNICALL *GetByteArrayRegion) + (JNIEnv *env, jbyteArray array, jsize start, jsize len, jbyte *buf); + void (JNICALL *GetCharArrayRegion) + (JNIEnv *env, jcharArray array, jsize start, jsize len, jchar *buf); + void (JNICALL *GetShortArrayRegion) + (JNIEnv *env, jshortArray array, jsize start, jsize len, jshort *buf); + void (JNICALL *GetIntArrayRegion) + (JNIEnv *env, jintArray array, jsize start, jsize len, jint *buf); + void (JNICALL *GetLongArrayRegion) + (JNIEnv *env, jlongArray array, jsize start, jsize len, jlong *buf); + void (JNICALL *GetFloatArrayRegion) + (JNIEnv *env, jfloatArray array, jsize start, jsize len, jfloat *buf); + void (JNICALL *GetDoubleArrayRegion) + (JNIEnv *env, jdoubleArray array, jsize start, jsize len, jdouble *buf); + + void (JNICALL *SetBooleanArrayRegion) + (JNIEnv *env, jbooleanArray array, jsize start, jsize l, const jboolean *buf); + void (JNICALL *SetByteArrayRegion) + (JNIEnv *env, jbyteArray array, jsize start, jsize len, const jbyte *buf); + void (JNICALL *SetCharArrayRegion) + (JNIEnv *env, jcharArray array, jsize start, jsize len, const jchar *buf); + void (JNICALL *SetShortArrayRegion) + (JNIEnv *env, jshortArray array, jsize start, jsize len, const jshort *buf); + void (JNICALL *SetIntArrayRegion) + (JNIEnv *env, jintArray array, jsize start, jsize len, const jint *buf); + void (JNICALL *SetLongArrayRegion) + (JNIEnv *env, jlongArray array, jsize start, jsize len, const jlong *buf); + void (JNICALL *SetFloatArrayRegion) + (JNIEnv *env, jfloatArray array, jsize start, jsize len, const jfloat *buf); + void (JNICALL *SetDoubleArrayRegion) + (JNIEnv *env, jdoubleArray array, jsize start, jsize len, const jdouble *buf); + + jint (JNICALL *RegisterNatives) + (JNIEnv *env, jclass clazz, const JNINativeMethod *methods, + jint nMethods); + jint (JNICALL *UnregisterNatives) + (JNIEnv *env, jclass clazz); + + jint (JNICALL *MonitorEnter) + (JNIEnv *env, jobject obj); + jint (JNICALL *MonitorExit) + (JNIEnv *env, jobject obj); + + jint (JNICALL *GetJavaVM) + (JNIEnv *env, JavaVM **vm); + + void (JNICALL *GetStringRegion) + (JNIEnv *env, jstring str, jsize start, jsize len, jchar *buf); + void (JNICALL *GetStringUTFRegion) + (JNIEnv *env, jstring str, jsize start, jsize len, char *buf); + + void * (JNICALL *GetPrimitiveArrayCritical) + (JNIEnv *env, jarray array, jboolean *isCopy); + void (JNICALL *ReleasePrimitiveArrayCritical) + (JNIEnv *env, jarray array, void *carray, jint mode); + + const jchar * (JNICALL *GetStringCritical) + (JNIEnv *env, jstring string, jboolean *isCopy); + void (JNICALL *ReleaseStringCritical) + (JNIEnv *env, jstring string, const jchar *cstring); + + jweak (JNICALL *NewWeakGlobalRef) + (JNIEnv *env, jobject obj); + void (JNICALL *DeleteWeakGlobalRef) + (JNIEnv *env, jweak ref); + + jboolean (JNICALL *ExceptionCheck) + (JNIEnv *env); + + jobject (JNICALL *NewDirectByteBuffer) + (JNIEnv* env, void* address, jlong capacity); + void* (JNICALL *GetDirectBufferAddress) + (JNIEnv* env, jobject buf); + jlong (JNICALL *GetDirectBufferCapacity) + (JNIEnv* env, jobject buf); + + /* New JNI 1.6 Features */ + + jobjectRefType (JNICALL *GetObjectRefType) + (JNIEnv* env, jobject obj); + + /* Module Features */ + + jobject (JNICALL *GetModule) + (JNIEnv* env, jclass clazz); + + /* Virtual threads */ + + jboolean (JNICALL *IsVirtualThread) + (JNIEnv* env, jobject obj); +}; + +/* + * We use inlined functions for C++ so that programmers can write: + * + * env->FindClass("java/lang/String") + * + * in C++ rather than: + * + * (*env)->FindClass(env, "java/lang/String") + * + * in C. + */ + +struct JNIEnv_ { + const struct JNINativeInterface_ *functions; +#ifdef __cplusplus + + jint GetVersion() { + return functions->GetVersion(this); + } + jclass DefineClass(const char *name, jobject loader, const jbyte *buf, + jsize len) { + return functions->DefineClass(this, name, loader, buf, len); + } + jclass FindClass(const char *name) { + return functions->FindClass(this, name); + } + jmethodID FromReflectedMethod(jobject method) { + return functions->FromReflectedMethod(this,method); + } + jfieldID FromReflectedField(jobject field) { + return functions->FromReflectedField(this,field); + } + + jobject ToReflectedMethod(jclass cls, jmethodID methodID, jboolean isStatic) { + return functions->ToReflectedMethod(this, cls, methodID, isStatic); + } + + jclass GetSuperclass(jclass sub) { + return functions->GetSuperclass(this, sub); + } + jboolean IsAssignableFrom(jclass sub, jclass sup) { + return functions->IsAssignableFrom(this, sub, sup); + } + + jobject ToReflectedField(jclass cls, jfieldID fieldID, jboolean isStatic) { + return functions->ToReflectedField(this,cls,fieldID,isStatic); + } + + jint Throw(jthrowable obj) { + return functions->Throw(this, obj); + } + jint ThrowNew(jclass clazz, const char *msg) { + return functions->ThrowNew(this, clazz, msg); + } + jthrowable ExceptionOccurred() { + return functions->ExceptionOccurred(this); + } + void ExceptionDescribe() { + functions->ExceptionDescribe(this); + } + void ExceptionClear() { + functions->ExceptionClear(this); + } + void FatalError(const char *msg) { + functions->FatalError(this, msg); + } + + jint PushLocalFrame(jint capacity) { + return functions->PushLocalFrame(this,capacity); + } + jobject PopLocalFrame(jobject result) { + return functions->PopLocalFrame(this,result); + } + + jobject NewGlobalRef(jobject lobj) { + return functions->NewGlobalRef(this,lobj); + } + void DeleteGlobalRef(jobject gref) { + functions->DeleteGlobalRef(this,gref); + } + void DeleteLocalRef(jobject obj) { + functions->DeleteLocalRef(this, obj); + } + + jboolean IsSameObject(jobject obj1, jobject obj2) { + return functions->IsSameObject(this,obj1,obj2); + } + + jobject NewLocalRef(jobject ref) { + return functions->NewLocalRef(this,ref); + } + jint EnsureLocalCapacity(jint capacity) { + return functions->EnsureLocalCapacity(this,capacity); + } + + jobject AllocObject(jclass clazz) { + return functions->AllocObject(this,clazz); + } + jobject NewObject(jclass clazz, jmethodID methodID, ...) { + va_list args; + jobject result; + va_start(args, methodID); + result = functions->NewObjectV(this,clazz,methodID,args); + va_end(args); + return result; + } + jobject NewObjectV(jclass clazz, jmethodID methodID, + va_list args) { + return functions->NewObjectV(this,clazz,methodID,args); + } + jobject NewObjectA(jclass clazz, jmethodID methodID, + const jvalue *args) { + return functions->NewObjectA(this,clazz,methodID,args); + } + + jclass GetObjectClass(jobject obj) { + return functions->GetObjectClass(this,obj); + } + jboolean IsInstanceOf(jobject obj, jclass clazz) { + return functions->IsInstanceOf(this,obj,clazz); + } + + jmethodID GetMethodID(jclass clazz, const char *name, + const char *sig) { + return functions->GetMethodID(this,clazz,name,sig); + } + + jobject CallObjectMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jobject result; + va_start(args,methodID); + result = functions->CallObjectMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jobject CallObjectMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallObjectMethodV(this,obj,methodID,args); + } + jobject CallObjectMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallObjectMethodA(this,obj,methodID,args); + } + + jboolean CallBooleanMethod(jobject obj, + jmethodID methodID, ...) { + va_list args; + jboolean result; + va_start(args,methodID); + result = functions->CallBooleanMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jboolean CallBooleanMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallBooleanMethodV(this,obj,methodID,args); + } + jboolean CallBooleanMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallBooleanMethodA(this,obj,methodID, args); + } + + jbyte CallByteMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jbyte result; + va_start(args,methodID); + result = functions->CallByteMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jbyte CallByteMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallByteMethodV(this,obj,methodID,args); + } + jbyte CallByteMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallByteMethodA(this,obj,methodID,args); + } + + jchar CallCharMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jchar result; + va_start(args,methodID); + result = functions->CallCharMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jchar CallCharMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallCharMethodV(this,obj,methodID,args); + } + jchar CallCharMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallCharMethodA(this,obj,methodID,args); + } + + jshort CallShortMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jshort result; + va_start(args,methodID); + result = functions->CallShortMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jshort CallShortMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallShortMethodV(this,obj,methodID,args); + } + jshort CallShortMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallShortMethodA(this,obj,methodID,args); + } + + jint CallIntMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jint result; + va_start(args,methodID); + result = functions->CallIntMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jint CallIntMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallIntMethodV(this,obj,methodID,args); + } + jint CallIntMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallIntMethodA(this,obj,methodID,args); + } + + jlong CallLongMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jlong result; + va_start(args,methodID); + result = functions->CallLongMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jlong CallLongMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallLongMethodV(this,obj,methodID,args); + } + jlong CallLongMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallLongMethodA(this,obj,methodID,args); + } + + jfloat CallFloatMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jfloat result; + va_start(args,methodID); + result = functions->CallFloatMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jfloat CallFloatMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallFloatMethodV(this,obj,methodID,args); + } + jfloat CallFloatMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallFloatMethodA(this,obj,methodID,args); + } + + jdouble CallDoubleMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jdouble result; + va_start(args,methodID); + result = functions->CallDoubleMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jdouble CallDoubleMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallDoubleMethodV(this,obj,methodID,args); + } + jdouble CallDoubleMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallDoubleMethodA(this,obj,methodID,args); + } + + void CallVoidMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + va_start(args,methodID); + functions->CallVoidMethodV(this,obj,methodID,args); + va_end(args); + } + void CallVoidMethodV(jobject obj, jmethodID methodID, + va_list args) { + functions->CallVoidMethodV(this,obj,methodID,args); + } + void CallVoidMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + functions->CallVoidMethodA(this,obj,methodID,args); + } + + jobject CallNonvirtualObjectMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jobject result; + va_start(args,methodID); + result = functions->CallNonvirtualObjectMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jobject CallNonvirtualObjectMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualObjectMethodV(this,obj,clazz, + methodID,args); + } + jobject CallNonvirtualObjectMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualObjectMethodA(this,obj,clazz, + methodID,args); + } + + jboolean CallNonvirtualBooleanMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jboolean result; + va_start(args,methodID); + result = functions->CallNonvirtualBooleanMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jboolean CallNonvirtualBooleanMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualBooleanMethodV(this,obj,clazz, + methodID,args); + } + jboolean CallNonvirtualBooleanMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualBooleanMethodA(this,obj,clazz, + methodID, args); + } + + jbyte CallNonvirtualByteMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jbyte result; + va_start(args,methodID); + result = functions->CallNonvirtualByteMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jbyte CallNonvirtualByteMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualByteMethodV(this,obj,clazz, + methodID,args); + } + jbyte CallNonvirtualByteMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualByteMethodA(this,obj,clazz, + methodID,args); + } + + jchar CallNonvirtualCharMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jchar result; + va_start(args,methodID); + result = functions->CallNonvirtualCharMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jchar CallNonvirtualCharMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualCharMethodV(this,obj,clazz, + methodID,args); + } + jchar CallNonvirtualCharMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualCharMethodA(this,obj,clazz, + methodID,args); + } + + jshort CallNonvirtualShortMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jshort result; + va_start(args,methodID); + result = functions->CallNonvirtualShortMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jshort CallNonvirtualShortMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualShortMethodV(this,obj,clazz, + methodID,args); + } + jshort CallNonvirtualShortMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualShortMethodA(this,obj,clazz, + methodID,args); + } + + jint CallNonvirtualIntMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jint result; + va_start(args,methodID); + result = functions->CallNonvirtualIntMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jint CallNonvirtualIntMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualIntMethodV(this,obj,clazz, + methodID,args); + } + jint CallNonvirtualIntMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualIntMethodA(this,obj,clazz, + methodID,args); + } + + jlong CallNonvirtualLongMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jlong result; + va_start(args,methodID); + result = functions->CallNonvirtualLongMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jlong CallNonvirtualLongMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualLongMethodV(this,obj,clazz, + methodID,args); + } + jlong CallNonvirtualLongMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualLongMethodA(this,obj,clazz, + methodID,args); + } + + jfloat CallNonvirtualFloatMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jfloat result; + va_start(args,methodID); + result = functions->CallNonvirtualFloatMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jfloat CallNonvirtualFloatMethodV(jobject obj, jclass clazz, + jmethodID methodID, + va_list args) { + return functions->CallNonvirtualFloatMethodV(this,obj,clazz, + methodID,args); + } + jfloat CallNonvirtualFloatMethodA(jobject obj, jclass clazz, + jmethodID methodID, + const jvalue * args) { + return functions->CallNonvirtualFloatMethodA(this,obj,clazz, + methodID,args); + } + + jdouble CallNonvirtualDoubleMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jdouble result; + va_start(args,methodID); + result = functions->CallNonvirtualDoubleMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jdouble CallNonvirtualDoubleMethodV(jobject obj, jclass clazz, + jmethodID methodID, + va_list args) { + return functions->CallNonvirtualDoubleMethodV(this,obj,clazz, + methodID,args); + } + jdouble CallNonvirtualDoubleMethodA(jobject obj, jclass clazz, + jmethodID methodID, + const jvalue * args) { + return functions->CallNonvirtualDoubleMethodA(this,obj,clazz, + methodID,args); + } + + void CallNonvirtualVoidMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + va_start(args,methodID); + functions->CallNonvirtualVoidMethodV(this,obj,clazz,methodID,args); + va_end(args); + } + void CallNonvirtualVoidMethodV(jobject obj, jclass clazz, + jmethodID methodID, + va_list args) { + functions->CallNonvirtualVoidMethodV(this,obj,clazz,methodID,args); + } + void CallNonvirtualVoidMethodA(jobject obj, jclass clazz, + jmethodID methodID, + const jvalue * args) { + functions->CallNonvirtualVoidMethodA(this,obj,clazz,methodID,args); + } + + jfieldID GetFieldID(jclass clazz, const char *name, + const char *sig) { + return functions->GetFieldID(this,clazz,name,sig); + } + + jobject GetObjectField(jobject obj, jfieldID fieldID) { + return functions->GetObjectField(this,obj,fieldID); + } + jboolean GetBooleanField(jobject obj, jfieldID fieldID) { + return functions->GetBooleanField(this,obj,fieldID); + } + jbyte GetByteField(jobject obj, jfieldID fieldID) { + return functions->GetByteField(this,obj,fieldID); + } + jchar GetCharField(jobject obj, jfieldID fieldID) { + return functions->GetCharField(this,obj,fieldID); + } + jshort GetShortField(jobject obj, jfieldID fieldID) { + return functions->GetShortField(this,obj,fieldID); + } + jint GetIntField(jobject obj, jfieldID fieldID) { + return functions->GetIntField(this,obj,fieldID); + } + jlong GetLongField(jobject obj, jfieldID fieldID) { + return functions->GetLongField(this,obj,fieldID); + } + jfloat GetFloatField(jobject obj, jfieldID fieldID) { + return functions->GetFloatField(this,obj,fieldID); + } + jdouble GetDoubleField(jobject obj, jfieldID fieldID) { + return functions->GetDoubleField(this,obj,fieldID); + } + + void SetObjectField(jobject obj, jfieldID fieldID, jobject val) { + functions->SetObjectField(this,obj,fieldID,val); + } + void SetBooleanField(jobject obj, jfieldID fieldID, + jboolean val) { + functions->SetBooleanField(this,obj,fieldID,val); + } + void SetByteField(jobject obj, jfieldID fieldID, + jbyte val) { + functions->SetByteField(this,obj,fieldID,val); + } + void SetCharField(jobject obj, jfieldID fieldID, + jchar val) { + functions->SetCharField(this,obj,fieldID,val); + } + void SetShortField(jobject obj, jfieldID fieldID, + jshort val) { + functions->SetShortField(this,obj,fieldID,val); + } + void SetIntField(jobject obj, jfieldID fieldID, + jint val) { + functions->SetIntField(this,obj,fieldID,val); + } + void SetLongField(jobject obj, jfieldID fieldID, + jlong val) { + functions->SetLongField(this,obj,fieldID,val); + } + void SetFloatField(jobject obj, jfieldID fieldID, + jfloat val) { + functions->SetFloatField(this,obj,fieldID,val); + } + void SetDoubleField(jobject obj, jfieldID fieldID, + jdouble val) { + functions->SetDoubleField(this,obj,fieldID,val); + } + + jmethodID GetStaticMethodID(jclass clazz, const char *name, + const char *sig) { + return functions->GetStaticMethodID(this,clazz,name,sig); + } + + jobject CallStaticObjectMethod(jclass clazz, jmethodID methodID, + ...) { + va_list args; + jobject result; + va_start(args,methodID); + result = functions->CallStaticObjectMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jobject CallStaticObjectMethodV(jclass clazz, jmethodID methodID, + va_list args) { + return functions->CallStaticObjectMethodV(this,clazz,methodID,args); + } + jobject CallStaticObjectMethodA(jclass clazz, jmethodID methodID, + const jvalue *args) { + return functions->CallStaticObjectMethodA(this,clazz,methodID,args); + } + + jboolean CallStaticBooleanMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jboolean result; + va_start(args,methodID); + result = functions->CallStaticBooleanMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jboolean CallStaticBooleanMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticBooleanMethodV(this,clazz,methodID,args); + } + jboolean CallStaticBooleanMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticBooleanMethodA(this,clazz,methodID,args); + } + + jbyte CallStaticByteMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jbyte result; + va_start(args,methodID); + result = functions->CallStaticByteMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jbyte CallStaticByteMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticByteMethodV(this,clazz,methodID,args); + } + jbyte CallStaticByteMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticByteMethodA(this,clazz,methodID,args); + } + + jchar CallStaticCharMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jchar result; + va_start(args,methodID); + result = functions->CallStaticCharMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jchar CallStaticCharMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticCharMethodV(this,clazz,methodID,args); + } + jchar CallStaticCharMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticCharMethodA(this,clazz,methodID,args); + } + + jshort CallStaticShortMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jshort result; + va_start(args,methodID); + result = functions->CallStaticShortMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jshort CallStaticShortMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticShortMethodV(this,clazz,methodID,args); + } + jshort CallStaticShortMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticShortMethodA(this,clazz,methodID,args); + } + + jint CallStaticIntMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jint result; + va_start(args,methodID); + result = functions->CallStaticIntMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jint CallStaticIntMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticIntMethodV(this,clazz,methodID,args); + } + jint CallStaticIntMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticIntMethodA(this,clazz,methodID,args); + } + + jlong CallStaticLongMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jlong result; + va_start(args,methodID); + result = functions->CallStaticLongMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jlong CallStaticLongMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticLongMethodV(this,clazz,methodID,args); + } + jlong CallStaticLongMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticLongMethodA(this,clazz,methodID,args); + } + + jfloat CallStaticFloatMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jfloat result; + va_start(args,methodID); + result = functions->CallStaticFloatMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jfloat CallStaticFloatMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticFloatMethodV(this,clazz,methodID,args); + } + jfloat CallStaticFloatMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticFloatMethodA(this,clazz,methodID,args); + } + + jdouble CallStaticDoubleMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jdouble result; + va_start(args,methodID); + result = functions->CallStaticDoubleMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jdouble CallStaticDoubleMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticDoubleMethodV(this,clazz,methodID,args); + } + jdouble CallStaticDoubleMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticDoubleMethodA(this,clazz,methodID,args); + } + + void CallStaticVoidMethod(jclass cls, jmethodID methodID, ...) { + va_list args; + va_start(args,methodID); + functions->CallStaticVoidMethodV(this,cls,methodID,args); + va_end(args); + } + void CallStaticVoidMethodV(jclass cls, jmethodID methodID, + va_list args) { + functions->CallStaticVoidMethodV(this,cls,methodID,args); + } + void CallStaticVoidMethodA(jclass cls, jmethodID methodID, + const jvalue * args) { + functions->CallStaticVoidMethodA(this,cls,methodID,args); + } + + jfieldID GetStaticFieldID(jclass clazz, const char *name, + const char *sig) { + return functions->GetStaticFieldID(this,clazz,name,sig); + } + jobject GetStaticObjectField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticObjectField(this,clazz,fieldID); + } + jboolean GetStaticBooleanField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticBooleanField(this,clazz,fieldID); + } + jbyte GetStaticByteField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticByteField(this,clazz,fieldID); + } + jchar GetStaticCharField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticCharField(this,clazz,fieldID); + } + jshort GetStaticShortField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticShortField(this,clazz,fieldID); + } + jint GetStaticIntField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticIntField(this,clazz,fieldID); + } + jlong GetStaticLongField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticLongField(this,clazz,fieldID); + } + jfloat GetStaticFloatField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticFloatField(this,clazz,fieldID); + } + jdouble GetStaticDoubleField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticDoubleField(this,clazz,fieldID); + } + + void SetStaticObjectField(jclass clazz, jfieldID fieldID, + jobject value) { + functions->SetStaticObjectField(this,clazz,fieldID,value); + } + void SetStaticBooleanField(jclass clazz, jfieldID fieldID, + jboolean value) { + functions->SetStaticBooleanField(this,clazz,fieldID,value); + } + void SetStaticByteField(jclass clazz, jfieldID fieldID, + jbyte value) { + functions->SetStaticByteField(this,clazz,fieldID,value); + } + void SetStaticCharField(jclass clazz, jfieldID fieldID, + jchar value) { + functions->SetStaticCharField(this,clazz,fieldID,value); + } + void SetStaticShortField(jclass clazz, jfieldID fieldID, + jshort value) { + functions->SetStaticShortField(this,clazz,fieldID,value); + } + void SetStaticIntField(jclass clazz, jfieldID fieldID, + jint value) { + functions->SetStaticIntField(this,clazz,fieldID,value); + } + void SetStaticLongField(jclass clazz, jfieldID fieldID, + jlong value) { + functions->SetStaticLongField(this,clazz,fieldID,value); + } + void SetStaticFloatField(jclass clazz, jfieldID fieldID, + jfloat value) { + functions->SetStaticFloatField(this,clazz,fieldID,value); + } + void SetStaticDoubleField(jclass clazz, jfieldID fieldID, + jdouble value) { + functions->SetStaticDoubleField(this,clazz,fieldID,value); + } + + jstring NewString(const jchar *unicode, jsize len) { + return functions->NewString(this,unicode,len); + } + jsize GetStringLength(jstring str) { + return functions->GetStringLength(this,str); + } + const jchar *GetStringChars(jstring str, jboolean *isCopy) { + return functions->GetStringChars(this,str,isCopy); + } + void ReleaseStringChars(jstring str, const jchar *chars) { + functions->ReleaseStringChars(this,str,chars); + } + + jstring NewStringUTF(const char *utf) { + return functions->NewStringUTF(this,utf); + } + jsize GetStringUTFLength(jstring str) { + return functions->GetStringUTFLength(this,str); + } + const char* GetStringUTFChars(jstring str, jboolean *isCopy) { + return functions->GetStringUTFChars(this,str,isCopy); + } + void ReleaseStringUTFChars(jstring str, const char* chars) { + functions->ReleaseStringUTFChars(this,str,chars); + } + + jsize GetArrayLength(jarray array) { + return functions->GetArrayLength(this,array); + } + + jobjectArray NewObjectArray(jsize len, jclass clazz, + jobject init) { + return functions->NewObjectArray(this,len,clazz,init); + } + jobject GetObjectArrayElement(jobjectArray array, jsize index) { + return functions->GetObjectArrayElement(this,array,index); + } + void SetObjectArrayElement(jobjectArray array, jsize index, + jobject val) { + functions->SetObjectArrayElement(this,array,index,val); + } + + jbooleanArray NewBooleanArray(jsize len) { + return functions->NewBooleanArray(this,len); + } + jbyteArray NewByteArray(jsize len) { + return functions->NewByteArray(this,len); + } + jcharArray NewCharArray(jsize len) { + return functions->NewCharArray(this,len); + } + jshortArray NewShortArray(jsize len) { + return functions->NewShortArray(this,len); + } + jintArray NewIntArray(jsize len) { + return functions->NewIntArray(this,len); + } + jlongArray NewLongArray(jsize len) { + return functions->NewLongArray(this,len); + } + jfloatArray NewFloatArray(jsize len) { + return functions->NewFloatArray(this,len); + } + jdoubleArray NewDoubleArray(jsize len) { + return functions->NewDoubleArray(this,len); + } + + jboolean * GetBooleanArrayElements(jbooleanArray array, jboolean *isCopy) { + return functions->GetBooleanArrayElements(this,array,isCopy); + } + jbyte * GetByteArrayElements(jbyteArray array, jboolean *isCopy) { + return functions->GetByteArrayElements(this,array,isCopy); + } + jchar * GetCharArrayElements(jcharArray array, jboolean *isCopy) { + return functions->GetCharArrayElements(this,array,isCopy); + } + jshort * GetShortArrayElements(jshortArray array, jboolean *isCopy) { + return functions->GetShortArrayElements(this,array,isCopy); + } + jint * GetIntArrayElements(jintArray array, jboolean *isCopy) { + return functions->GetIntArrayElements(this,array,isCopy); + } + jlong * GetLongArrayElements(jlongArray array, jboolean *isCopy) { + return functions->GetLongArrayElements(this,array,isCopy); + } + jfloat * GetFloatArrayElements(jfloatArray array, jboolean *isCopy) { + return functions->GetFloatArrayElements(this,array,isCopy); + } + jdouble * GetDoubleArrayElements(jdoubleArray array, jboolean *isCopy) { + return functions->GetDoubleArrayElements(this,array,isCopy); + } + + void ReleaseBooleanArrayElements(jbooleanArray array, + jboolean *elems, + jint mode) { + functions->ReleaseBooleanArrayElements(this,array,elems,mode); + } + void ReleaseByteArrayElements(jbyteArray array, + jbyte *elems, + jint mode) { + functions->ReleaseByteArrayElements(this,array,elems,mode); + } + void ReleaseCharArrayElements(jcharArray array, + jchar *elems, + jint mode) { + functions->ReleaseCharArrayElements(this,array,elems,mode); + } + void ReleaseShortArrayElements(jshortArray array, + jshort *elems, + jint mode) { + functions->ReleaseShortArrayElements(this,array,elems,mode); + } + void ReleaseIntArrayElements(jintArray array, + jint *elems, + jint mode) { + functions->ReleaseIntArrayElements(this,array,elems,mode); + } + void ReleaseLongArrayElements(jlongArray array, + jlong *elems, + jint mode) { + functions->ReleaseLongArrayElements(this,array,elems,mode); + } + void ReleaseFloatArrayElements(jfloatArray array, + jfloat *elems, + jint mode) { + functions->ReleaseFloatArrayElements(this,array,elems,mode); + } + void ReleaseDoubleArrayElements(jdoubleArray array, + jdouble *elems, + jint mode) { + functions->ReleaseDoubleArrayElements(this,array,elems,mode); + } + + void GetBooleanArrayRegion(jbooleanArray array, + jsize start, jsize len, jboolean *buf) { + functions->GetBooleanArrayRegion(this,array,start,len,buf); + } + void GetByteArrayRegion(jbyteArray array, + jsize start, jsize len, jbyte *buf) { + functions->GetByteArrayRegion(this,array,start,len,buf); + } + void GetCharArrayRegion(jcharArray array, + jsize start, jsize len, jchar *buf) { + functions->GetCharArrayRegion(this,array,start,len,buf); + } + void GetShortArrayRegion(jshortArray array, + jsize start, jsize len, jshort *buf) { + functions->GetShortArrayRegion(this,array,start,len,buf); + } + void GetIntArrayRegion(jintArray array, + jsize start, jsize len, jint *buf) { + functions->GetIntArrayRegion(this,array,start,len,buf); + } + void GetLongArrayRegion(jlongArray array, + jsize start, jsize len, jlong *buf) { + functions->GetLongArrayRegion(this,array,start,len,buf); + } + void GetFloatArrayRegion(jfloatArray array, + jsize start, jsize len, jfloat *buf) { + functions->GetFloatArrayRegion(this,array,start,len,buf); + } + void GetDoubleArrayRegion(jdoubleArray array, + jsize start, jsize len, jdouble *buf) { + functions->GetDoubleArrayRegion(this,array,start,len,buf); + } + + void SetBooleanArrayRegion(jbooleanArray array, jsize start, jsize len, + const jboolean *buf) { + functions->SetBooleanArrayRegion(this,array,start,len,buf); + } + void SetByteArrayRegion(jbyteArray array, jsize start, jsize len, + const jbyte *buf) { + functions->SetByteArrayRegion(this,array,start,len,buf); + } + void SetCharArrayRegion(jcharArray array, jsize start, jsize len, + const jchar *buf) { + functions->SetCharArrayRegion(this,array,start,len,buf); + } + void SetShortArrayRegion(jshortArray array, jsize start, jsize len, + const jshort *buf) { + functions->SetShortArrayRegion(this,array,start,len,buf); + } + void SetIntArrayRegion(jintArray array, jsize start, jsize len, + const jint *buf) { + functions->SetIntArrayRegion(this,array,start,len,buf); + } + void SetLongArrayRegion(jlongArray array, jsize start, jsize len, + const jlong *buf) { + functions->SetLongArrayRegion(this,array,start,len,buf); + } + void SetFloatArrayRegion(jfloatArray array, jsize start, jsize len, + const jfloat *buf) { + functions->SetFloatArrayRegion(this,array,start,len,buf); + } + void SetDoubleArrayRegion(jdoubleArray array, jsize start, jsize len, + const jdouble *buf) { + functions->SetDoubleArrayRegion(this,array,start,len,buf); + } + + jint RegisterNatives(jclass clazz, const JNINativeMethod *methods, + jint nMethods) { + return functions->RegisterNatives(this,clazz,methods,nMethods); + } + jint UnregisterNatives(jclass clazz) { + return functions->UnregisterNatives(this,clazz); + } + + jint MonitorEnter(jobject obj) { + return functions->MonitorEnter(this,obj); + } + jint MonitorExit(jobject obj) { + return functions->MonitorExit(this,obj); + } + + jint GetJavaVM(JavaVM **vm) { + return functions->GetJavaVM(this,vm); + } + + void GetStringRegion(jstring str, jsize start, jsize len, jchar *buf) { + functions->GetStringRegion(this,str,start,len,buf); + } + void GetStringUTFRegion(jstring str, jsize start, jsize len, char *buf) { + functions->GetStringUTFRegion(this,str,start,len,buf); + } + + void * GetPrimitiveArrayCritical(jarray array, jboolean *isCopy) { + return functions->GetPrimitiveArrayCritical(this,array,isCopy); + } + void ReleasePrimitiveArrayCritical(jarray array, void *carray, jint mode) { + functions->ReleasePrimitiveArrayCritical(this,array,carray,mode); + } + + const jchar * GetStringCritical(jstring string, jboolean *isCopy) { + return functions->GetStringCritical(this,string,isCopy); + } + void ReleaseStringCritical(jstring string, const jchar *cstring) { + functions->ReleaseStringCritical(this,string,cstring); + } + + jweak NewWeakGlobalRef(jobject obj) { + return functions->NewWeakGlobalRef(this,obj); + } + void DeleteWeakGlobalRef(jweak ref) { + functions->DeleteWeakGlobalRef(this,ref); + } + + jboolean ExceptionCheck() { + return functions->ExceptionCheck(this); + } + + jobject NewDirectByteBuffer(void* address, jlong capacity) { + return functions->NewDirectByteBuffer(this, address, capacity); + } + void* GetDirectBufferAddress(jobject buf) { + return functions->GetDirectBufferAddress(this, buf); + } + jlong GetDirectBufferCapacity(jobject buf) { + return functions->GetDirectBufferCapacity(this, buf); + } + jobjectRefType GetObjectRefType(jobject obj) { + return functions->GetObjectRefType(this, obj); + } + + /* Module Features */ + + jobject GetModule(jclass clazz) { + return functions->GetModule(this, clazz); + } + + /* Virtual threads */ + + jboolean IsVirtualThread(jobject obj) { + return functions->IsVirtualThread(this, obj); + } + +#endif /* __cplusplus */ +}; + +/* + * optionString may be any option accepted by the JVM, or one of the + * following: + * + * -D= Set a system property. + * -verbose[:class|gc|jni] Enable verbose output, comma-separated. E.g. + * "-verbose:class" or "-verbose:gc,class" + * Standard names include: gc, class, and jni. + * All nonstandard (VM-specific) names must begin + * with "X". + * vfprintf extraInfo is a pointer to the vfprintf hook. + * exit extraInfo is a pointer to the exit hook. + * abort extraInfo is a pointer to the abort hook. + */ +typedef struct JavaVMOption { + char *optionString; + void *extraInfo; +} JavaVMOption; + +typedef struct JavaVMInitArgs { + jint version; + + jint nOptions; + JavaVMOption *options; + jboolean ignoreUnrecognized; +} JavaVMInitArgs; + +typedef struct JavaVMAttachArgs { + jint version; + + char *name; + jobject group; +} JavaVMAttachArgs; + +/* These will be VM-specific. */ + +#define JDK1_2 +#define JDK1_4 + +/* End VM-specific. */ + +struct JNIInvokeInterface_ { + void *reserved0; + void *reserved1; + void *reserved2; + + jint (JNICALL *DestroyJavaVM)(JavaVM *vm); + + jint (JNICALL *AttachCurrentThread)(JavaVM *vm, void **penv, void *args); + + jint (JNICALL *DetachCurrentThread)(JavaVM *vm); + + jint (JNICALL *GetEnv)(JavaVM *vm, void **penv, jint version); + + jint (JNICALL *AttachCurrentThreadAsDaemon)(JavaVM *vm, void **penv, void *args); +}; + +struct JavaVM_ { + const struct JNIInvokeInterface_ *functions; +#ifdef __cplusplus + + jint DestroyJavaVM() { + return functions->DestroyJavaVM(this); + } + jint AttachCurrentThread(void **penv, void *args) { + return functions->AttachCurrentThread(this, penv, args); + } + jint DetachCurrentThread() { + return functions->DetachCurrentThread(this); + } + + jint GetEnv(void **penv, jint version) { + return functions->GetEnv(this, penv, version); + } + jint AttachCurrentThreadAsDaemon(void **penv, void *args) { + return functions->AttachCurrentThreadAsDaemon(this, penv, args); + } +#endif +}; + +#ifdef _JNI_IMPLEMENTATION_ +#define _JNI_IMPORT_OR_EXPORT_ JNIEXPORT +#else +#define _JNI_IMPORT_OR_EXPORT_ JNIIMPORT +#endif +_JNI_IMPORT_OR_EXPORT_ jint JNICALL +JNI_GetDefaultJavaVMInitArgs(void *args); + +_JNI_IMPORT_OR_EXPORT_ jint JNICALL +JNI_CreateJavaVM(JavaVM **pvm, void **penv, void *args); + +_JNI_IMPORT_OR_EXPORT_ jint JNICALL +JNI_GetCreatedJavaVMs(JavaVM **, jsize, jsize *); + +/* Defined by native libraries. */ +JNIEXPORT jint JNICALL +JNI_OnLoad(JavaVM *vm, void *reserved); + +JNIEXPORT void JNICALL +JNI_OnUnload(JavaVM *vm, void *reserved); + +#define JNI_VERSION_1_1 0x00010001 +#define JNI_VERSION_1_2 0x00010002 +#define JNI_VERSION_1_4 0x00010004 +#define JNI_VERSION_1_6 0x00010006 +#define JNI_VERSION_1_8 0x00010008 +#define JNI_VERSION_9 0x00090000 +#define JNI_VERSION_10 0x000a0000 +#define JNI_VERSION_19 0x00130000 +#define JNI_VERSION_20 0x00140000 +#define JNI_VERSION_21 0x00150000 + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* !_JAVASOFT_JNI_H_ */ diff --git a/java/include/jvmti.h b/java/include/jvmti.h new file mode 100644 index 0000000000000000000000000000000000000000..549394d4f8a230a5a68416349075278f66a81bf0 --- /dev/null +++ b/java/include/jvmti.h @@ -0,0 +1,2659 @@ +/* + * Copyright (c) 2002, 2024, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + + /* AUTOMATICALLY GENERATED FILE - DO NOT EDIT */ + + /* Include file for the Java(tm) Virtual Machine Tool Interface */ + +#ifndef _JAVA_JVMTI_H_ +#define _JAVA_JVMTI_H_ + +#include "jni.h" + +#ifdef __cplusplus +extern "C" { +#endif + +enum { + JVMTI_VERSION_1 = 0x30010000, + JVMTI_VERSION_1_0 = 0x30010000, + JVMTI_VERSION_1_1 = 0x30010100, + JVMTI_VERSION_1_2 = 0x30010200, + JVMTI_VERSION_9 = 0x30090000, + JVMTI_VERSION_11 = 0x300B0000, + JVMTI_VERSION_19 = 0x30130000, + JVMTI_VERSION_21 = 0x30150000, + + JVMTI_VERSION = 0x30000000 + (23 * 0x10000) + ( 0 * 0x100) + 0 /* version: 23.0.0 */ +}; + +JNIEXPORT jint JNICALL +Agent_OnLoad(JavaVM *vm, char *options, void *reserved); + +JNIEXPORT jint JNICALL +Agent_OnAttach(JavaVM* vm, char* options, void* reserved); + +JNIEXPORT void JNICALL +Agent_OnUnload(JavaVM *vm); + + /* Forward declaration of the environment */ + +struct _jvmtiEnv; + +struct jvmtiInterface_1_; + +#ifdef __cplusplus +typedef _jvmtiEnv jvmtiEnv; +#else +typedef const struct jvmtiInterface_1_ *jvmtiEnv; +#endif /* __cplusplus */ + +/* Derived Base Types */ + +typedef jobject jthread; +typedef jobject jthreadGroup; +typedef jlong jlocation; +struct _jrawMonitorID; +typedef struct _jrawMonitorID *jrawMonitorID; +typedef struct JNINativeInterface_ jniNativeInterface; + + /* Constants */ + + + /* Thread State Flags */ + +enum { + JVMTI_THREAD_STATE_ALIVE = 0x0001, + JVMTI_THREAD_STATE_TERMINATED = 0x0002, + JVMTI_THREAD_STATE_RUNNABLE = 0x0004, + JVMTI_THREAD_STATE_BLOCKED_ON_MONITOR_ENTER = 0x0400, + JVMTI_THREAD_STATE_WAITING = 0x0080, + JVMTI_THREAD_STATE_WAITING_INDEFINITELY = 0x0010, + JVMTI_THREAD_STATE_WAITING_WITH_TIMEOUT = 0x0020, + JVMTI_THREAD_STATE_SLEEPING = 0x0040, + JVMTI_THREAD_STATE_IN_OBJECT_WAIT = 0x0100, + JVMTI_THREAD_STATE_PARKED = 0x0200, + JVMTI_THREAD_STATE_SUSPENDED = 0x100000, + JVMTI_THREAD_STATE_INTERRUPTED = 0x200000, + JVMTI_THREAD_STATE_IN_NATIVE = 0x400000, + JVMTI_THREAD_STATE_VENDOR_1 = 0x10000000, + JVMTI_THREAD_STATE_VENDOR_2 = 0x20000000, + JVMTI_THREAD_STATE_VENDOR_3 = 0x40000000 +}; + + /* java.lang.Thread.State Conversion Masks */ + +enum { + JVMTI_JAVA_LANG_THREAD_STATE_MASK = JVMTI_THREAD_STATE_TERMINATED | JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_RUNNABLE | JVMTI_THREAD_STATE_BLOCKED_ON_MONITOR_ENTER | JVMTI_THREAD_STATE_WAITING | JVMTI_THREAD_STATE_WAITING_INDEFINITELY | JVMTI_THREAD_STATE_WAITING_WITH_TIMEOUT, + JVMTI_JAVA_LANG_THREAD_STATE_NEW = 0, + JVMTI_JAVA_LANG_THREAD_STATE_TERMINATED = JVMTI_THREAD_STATE_TERMINATED, + JVMTI_JAVA_LANG_THREAD_STATE_RUNNABLE = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_RUNNABLE, + JVMTI_JAVA_LANG_THREAD_STATE_BLOCKED = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_BLOCKED_ON_MONITOR_ENTER, + JVMTI_JAVA_LANG_THREAD_STATE_WAITING = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_WAITING | JVMTI_THREAD_STATE_WAITING_INDEFINITELY, + JVMTI_JAVA_LANG_THREAD_STATE_TIMED_WAITING = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_WAITING | JVMTI_THREAD_STATE_WAITING_WITH_TIMEOUT +}; + + /* Thread Priority Constants */ + +enum { + JVMTI_THREAD_MIN_PRIORITY = 1, + JVMTI_THREAD_NORM_PRIORITY = 5, + JVMTI_THREAD_MAX_PRIORITY = 10 +}; + + /* Heap Filter Flags */ + +enum { + JVMTI_HEAP_FILTER_TAGGED = 0x4, + JVMTI_HEAP_FILTER_UNTAGGED = 0x8, + JVMTI_HEAP_FILTER_CLASS_TAGGED = 0x10, + JVMTI_HEAP_FILTER_CLASS_UNTAGGED = 0x20 +}; + + /* Heap Visit Control Flags */ + +enum { + JVMTI_VISIT_OBJECTS = 0x100, + JVMTI_VISIT_ABORT = 0x8000 +}; + + /* Heap Reference Enumeration */ + +typedef enum { + JVMTI_HEAP_REFERENCE_CLASS = 1, + JVMTI_HEAP_REFERENCE_FIELD = 2, + JVMTI_HEAP_REFERENCE_ARRAY_ELEMENT = 3, + JVMTI_HEAP_REFERENCE_CLASS_LOADER = 4, + JVMTI_HEAP_REFERENCE_SIGNERS = 5, + JVMTI_HEAP_REFERENCE_PROTECTION_DOMAIN = 6, + JVMTI_HEAP_REFERENCE_INTERFACE = 7, + JVMTI_HEAP_REFERENCE_STATIC_FIELD = 8, + JVMTI_HEAP_REFERENCE_CONSTANT_POOL = 9, + JVMTI_HEAP_REFERENCE_SUPERCLASS = 10, + JVMTI_HEAP_REFERENCE_JNI_GLOBAL = 21, + JVMTI_HEAP_REFERENCE_SYSTEM_CLASS = 22, + JVMTI_HEAP_REFERENCE_MONITOR = 23, + JVMTI_HEAP_REFERENCE_STACK_LOCAL = 24, + JVMTI_HEAP_REFERENCE_JNI_LOCAL = 25, + JVMTI_HEAP_REFERENCE_THREAD = 26, + JVMTI_HEAP_REFERENCE_OTHER = 27 +} jvmtiHeapReferenceKind; + + /* Primitive Type Enumeration */ + +typedef enum { + JVMTI_PRIMITIVE_TYPE_BOOLEAN = 90, + JVMTI_PRIMITIVE_TYPE_BYTE = 66, + JVMTI_PRIMITIVE_TYPE_CHAR = 67, + JVMTI_PRIMITIVE_TYPE_SHORT = 83, + JVMTI_PRIMITIVE_TYPE_INT = 73, + JVMTI_PRIMITIVE_TYPE_LONG = 74, + JVMTI_PRIMITIVE_TYPE_FLOAT = 70, + JVMTI_PRIMITIVE_TYPE_DOUBLE = 68 +} jvmtiPrimitiveType; + + /* Heap Object Filter Enumeration */ + +typedef enum { + JVMTI_HEAP_OBJECT_TAGGED = 1, + JVMTI_HEAP_OBJECT_UNTAGGED = 2, + JVMTI_HEAP_OBJECT_EITHER = 3 +} jvmtiHeapObjectFilter; + + /* Heap Root Kind Enumeration */ + +typedef enum { + JVMTI_HEAP_ROOT_JNI_GLOBAL = 1, + JVMTI_HEAP_ROOT_SYSTEM_CLASS = 2, + JVMTI_HEAP_ROOT_MONITOR = 3, + JVMTI_HEAP_ROOT_STACK_LOCAL = 4, + JVMTI_HEAP_ROOT_JNI_LOCAL = 5, + JVMTI_HEAP_ROOT_THREAD = 6, + JVMTI_HEAP_ROOT_OTHER = 7 +} jvmtiHeapRootKind; + + /* Object Reference Enumeration */ + +typedef enum { + JVMTI_REFERENCE_CLASS = 1, + JVMTI_REFERENCE_FIELD = 2, + JVMTI_REFERENCE_ARRAY_ELEMENT = 3, + JVMTI_REFERENCE_CLASS_LOADER = 4, + JVMTI_REFERENCE_SIGNERS = 5, + JVMTI_REFERENCE_PROTECTION_DOMAIN = 6, + JVMTI_REFERENCE_INTERFACE = 7, + JVMTI_REFERENCE_STATIC_FIELD = 8, + JVMTI_REFERENCE_CONSTANT_POOL = 9 +} jvmtiObjectReferenceKind; + + /* Iteration Control Enumeration */ + +typedef enum { + JVMTI_ITERATION_CONTINUE = 1, + JVMTI_ITERATION_IGNORE = 2, + JVMTI_ITERATION_ABORT = 0 +} jvmtiIterationControl; + + /* Class Status Flags */ + +enum { + JVMTI_CLASS_STATUS_VERIFIED = 1, + JVMTI_CLASS_STATUS_PREPARED = 2, + JVMTI_CLASS_STATUS_INITIALIZED = 4, + JVMTI_CLASS_STATUS_ERROR = 8, + JVMTI_CLASS_STATUS_ARRAY = 16, + JVMTI_CLASS_STATUS_PRIMITIVE = 32 +}; + + /* Event Enable/Disable */ + +typedef enum { + JVMTI_ENABLE = 1, + JVMTI_DISABLE = 0 +} jvmtiEventMode; + + /* Extension Function/Event Parameter Types */ + +typedef enum { + JVMTI_TYPE_JBYTE = 101, + JVMTI_TYPE_JCHAR = 102, + JVMTI_TYPE_JSHORT = 103, + JVMTI_TYPE_JINT = 104, + JVMTI_TYPE_JLONG = 105, + JVMTI_TYPE_JFLOAT = 106, + JVMTI_TYPE_JDOUBLE = 107, + JVMTI_TYPE_JBOOLEAN = 108, + JVMTI_TYPE_JOBJECT = 109, + JVMTI_TYPE_JTHREAD = 110, + JVMTI_TYPE_JCLASS = 111, + JVMTI_TYPE_JVALUE = 112, + JVMTI_TYPE_JFIELDID = 113, + JVMTI_TYPE_JMETHODID = 114, + JVMTI_TYPE_CCHAR = 115, + JVMTI_TYPE_CVOID = 116, + JVMTI_TYPE_JNIENV = 117 +} jvmtiParamTypes; + + /* Extension Function/Event Parameter Kinds */ + +typedef enum { + JVMTI_KIND_IN = 91, + JVMTI_KIND_IN_PTR = 92, + JVMTI_KIND_IN_BUF = 93, + JVMTI_KIND_ALLOC_BUF = 94, + JVMTI_KIND_ALLOC_ALLOC_BUF = 95, + JVMTI_KIND_OUT = 96, + JVMTI_KIND_OUT_BUF = 97 +} jvmtiParamKind; + + /* Timer Kinds */ + +typedef enum { + JVMTI_TIMER_USER_CPU = 30, + JVMTI_TIMER_TOTAL_CPU = 31, + JVMTI_TIMER_ELAPSED = 32 +} jvmtiTimerKind; + + /* Phases of execution */ + +typedef enum { + JVMTI_PHASE_ONLOAD = 1, + JVMTI_PHASE_PRIMORDIAL = 2, + JVMTI_PHASE_START = 6, + JVMTI_PHASE_LIVE = 4, + JVMTI_PHASE_DEAD = 8 +} jvmtiPhase; + + /* Version Interface Types */ + +enum { + JVMTI_VERSION_INTERFACE_JNI = 0x00000000, + JVMTI_VERSION_INTERFACE_JVMTI = 0x30000000 +}; + + /* Version Masks */ + +enum { + JVMTI_VERSION_MASK_INTERFACE_TYPE = 0x70000000, + JVMTI_VERSION_MASK_MAJOR = 0x0FFF0000, + JVMTI_VERSION_MASK_MINOR = 0x0000FF00, + JVMTI_VERSION_MASK_MICRO = 0x000000FF +}; + + /* Version Shifts */ + +enum { + JVMTI_VERSION_SHIFT_MAJOR = 16, + JVMTI_VERSION_SHIFT_MINOR = 8, + JVMTI_VERSION_SHIFT_MICRO = 0 +}; + + /* Verbose Flag Enumeration */ + +typedef enum { + JVMTI_VERBOSE_OTHER = 0, + JVMTI_VERBOSE_GC = 1, + JVMTI_VERBOSE_CLASS = 2, + JVMTI_VERBOSE_JNI = 4 +} jvmtiVerboseFlag; + + /* JLocation Format Enumeration */ + +typedef enum { + JVMTI_JLOCATION_JVMBCI = 1, + JVMTI_JLOCATION_MACHINEPC = 2, + JVMTI_JLOCATION_OTHER = 0 +} jvmtiJlocationFormat; + + /* Resource Exhaustion Flags */ + +enum { + JVMTI_RESOURCE_EXHAUSTED_OOM_ERROR = 0x0001, + JVMTI_RESOURCE_EXHAUSTED_JAVA_HEAP = 0x0002, + JVMTI_RESOURCE_EXHAUSTED_THREADS = 0x0004 +}; + + /* Errors */ + +typedef enum { + JVMTI_ERROR_NONE = 0, + JVMTI_ERROR_INVALID_THREAD = 10, + JVMTI_ERROR_INVALID_THREAD_GROUP = 11, + JVMTI_ERROR_INVALID_PRIORITY = 12, + JVMTI_ERROR_THREAD_NOT_SUSPENDED = 13, + JVMTI_ERROR_THREAD_SUSPENDED = 14, + JVMTI_ERROR_THREAD_NOT_ALIVE = 15, + JVMTI_ERROR_INVALID_OBJECT = 20, + JVMTI_ERROR_INVALID_CLASS = 21, + JVMTI_ERROR_CLASS_NOT_PREPARED = 22, + JVMTI_ERROR_INVALID_METHODID = 23, + JVMTI_ERROR_INVALID_LOCATION = 24, + JVMTI_ERROR_INVALID_FIELDID = 25, + JVMTI_ERROR_INVALID_MODULE = 26, + JVMTI_ERROR_NO_MORE_FRAMES = 31, + JVMTI_ERROR_OPAQUE_FRAME = 32, + JVMTI_ERROR_TYPE_MISMATCH = 34, + JVMTI_ERROR_INVALID_SLOT = 35, + JVMTI_ERROR_DUPLICATE = 40, + JVMTI_ERROR_NOT_FOUND = 41, + JVMTI_ERROR_INVALID_MONITOR = 50, + JVMTI_ERROR_NOT_MONITOR_OWNER = 51, + JVMTI_ERROR_INTERRUPT = 52, + JVMTI_ERROR_INVALID_CLASS_FORMAT = 60, + JVMTI_ERROR_CIRCULAR_CLASS_DEFINITION = 61, + JVMTI_ERROR_FAILS_VERIFICATION = 62, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_METHOD_ADDED = 63, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_SCHEMA_CHANGED = 64, + JVMTI_ERROR_INVALID_TYPESTATE = 65, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_HIERARCHY_CHANGED = 66, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_METHOD_DELETED = 67, + JVMTI_ERROR_UNSUPPORTED_VERSION = 68, + JVMTI_ERROR_NAMES_DONT_MATCH = 69, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_CLASS_MODIFIERS_CHANGED = 70, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_METHOD_MODIFIERS_CHANGED = 71, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_CLASS_ATTRIBUTE_CHANGED = 72, + JVMTI_ERROR_UNSUPPORTED_OPERATION = 73, + JVMTI_ERROR_UNMODIFIABLE_CLASS = 79, + JVMTI_ERROR_UNMODIFIABLE_MODULE = 80, + JVMTI_ERROR_NOT_AVAILABLE = 98, + JVMTI_ERROR_MUST_POSSESS_CAPABILITY = 99, + JVMTI_ERROR_NULL_POINTER = 100, + JVMTI_ERROR_ABSENT_INFORMATION = 101, + JVMTI_ERROR_INVALID_EVENT_TYPE = 102, + JVMTI_ERROR_ILLEGAL_ARGUMENT = 103, + JVMTI_ERROR_NATIVE_METHOD = 104, + JVMTI_ERROR_CLASS_LOADER_UNSUPPORTED = 106, + JVMTI_ERROR_OUT_OF_MEMORY = 110, + JVMTI_ERROR_ACCESS_DENIED = 111, + JVMTI_ERROR_WRONG_PHASE = 112, + JVMTI_ERROR_INTERNAL = 113, + JVMTI_ERROR_UNATTACHED_THREAD = 115, + JVMTI_ERROR_INVALID_ENVIRONMENT = 116, + JVMTI_ERROR_MAX = 116 +} jvmtiError; + + /* Event IDs */ + +typedef enum { + JVMTI_MIN_EVENT_TYPE_VAL = 50, + JVMTI_EVENT_VM_INIT = 50, + JVMTI_EVENT_VM_DEATH = 51, + JVMTI_EVENT_THREAD_START = 52, + JVMTI_EVENT_THREAD_END = 53, + JVMTI_EVENT_CLASS_FILE_LOAD_HOOK = 54, + JVMTI_EVENT_CLASS_LOAD = 55, + JVMTI_EVENT_CLASS_PREPARE = 56, + JVMTI_EVENT_VM_START = 57, + JVMTI_EVENT_EXCEPTION = 58, + JVMTI_EVENT_EXCEPTION_CATCH = 59, + JVMTI_EVENT_SINGLE_STEP = 60, + JVMTI_EVENT_FRAME_POP = 61, + JVMTI_EVENT_BREAKPOINT = 62, + JVMTI_EVENT_FIELD_ACCESS = 63, + JVMTI_EVENT_FIELD_MODIFICATION = 64, + JVMTI_EVENT_METHOD_ENTRY = 65, + JVMTI_EVENT_METHOD_EXIT = 66, + JVMTI_EVENT_NATIVE_METHOD_BIND = 67, + JVMTI_EVENT_COMPILED_METHOD_LOAD = 68, + JVMTI_EVENT_COMPILED_METHOD_UNLOAD = 69, + JVMTI_EVENT_DYNAMIC_CODE_GENERATED = 70, + JVMTI_EVENT_DATA_DUMP_REQUEST = 71, + JVMTI_EVENT_MONITOR_WAIT = 73, + JVMTI_EVENT_MONITOR_WAITED = 74, + JVMTI_EVENT_MONITOR_CONTENDED_ENTER = 75, + JVMTI_EVENT_MONITOR_CONTENDED_ENTERED = 76, + JVMTI_EVENT_RESOURCE_EXHAUSTED = 80, + JVMTI_EVENT_GARBAGE_COLLECTION_START = 81, + JVMTI_EVENT_GARBAGE_COLLECTION_FINISH = 82, + JVMTI_EVENT_OBJECT_FREE = 83, + JVMTI_EVENT_VM_OBJECT_ALLOC = 84, + JVMTI_EVENT_SAMPLED_OBJECT_ALLOC = 86, + JVMTI_EVENT_VIRTUAL_THREAD_START = 87, + JVMTI_EVENT_VIRTUAL_THREAD_END = 88, + JVMTI_MAX_EVENT_TYPE_VAL = 88 +} jvmtiEvent; + + + /* Pre-Declarations */ +struct jvmtiThreadInfo; +typedef struct jvmtiThreadInfo jvmtiThreadInfo; +struct jvmtiMonitorStackDepthInfo; +typedef struct jvmtiMonitorStackDepthInfo jvmtiMonitorStackDepthInfo; +struct jvmtiThreadGroupInfo; +typedef struct jvmtiThreadGroupInfo jvmtiThreadGroupInfo; +struct jvmtiFrameInfo; +typedef struct jvmtiFrameInfo jvmtiFrameInfo; +struct jvmtiStackInfo; +typedef struct jvmtiStackInfo jvmtiStackInfo; +struct jvmtiHeapReferenceInfoField; +typedef struct jvmtiHeapReferenceInfoField jvmtiHeapReferenceInfoField; +struct jvmtiHeapReferenceInfoArray; +typedef struct jvmtiHeapReferenceInfoArray jvmtiHeapReferenceInfoArray; +struct jvmtiHeapReferenceInfoConstantPool; +typedef struct jvmtiHeapReferenceInfoConstantPool jvmtiHeapReferenceInfoConstantPool; +struct jvmtiHeapReferenceInfoStackLocal; +typedef struct jvmtiHeapReferenceInfoStackLocal jvmtiHeapReferenceInfoStackLocal; +struct jvmtiHeapReferenceInfoJniLocal; +typedef struct jvmtiHeapReferenceInfoJniLocal jvmtiHeapReferenceInfoJniLocal; +struct jvmtiHeapReferenceInfoReserved; +typedef struct jvmtiHeapReferenceInfoReserved jvmtiHeapReferenceInfoReserved; +union jvmtiHeapReferenceInfo; +typedef union jvmtiHeapReferenceInfo jvmtiHeapReferenceInfo; +struct jvmtiHeapCallbacks; +typedef struct jvmtiHeapCallbacks jvmtiHeapCallbacks; +struct jvmtiClassDefinition; +typedef struct jvmtiClassDefinition jvmtiClassDefinition; +struct jvmtiMonitorUsage; +typedef struct jvmtiMonitorUsage jvmtiMonitorUsage; +struct jvmtiLineNumberEntry; +typedef struct jvmtiLineNumberEntry jvmtiLineNumberEntry; +struct jvmtiLocalVariableEntry; +typedef struct jvmtiLocalVariableEntry jvmtiLocalVariableEntry; +struct jvmtiParamInfo; +typedef struct jvmtiParamInfo jvmtiParamInfo; +struct jvmtiExtensionFunctionInfo; +typedef struct jvmtiExtensionFunctionInfo jvmtiExtensionFunctionInfo; +struct jvmtiExtensionEventInfo; +typedef struct jvmtiExtensionEventInfo jvmtiExtensionEventInfo; +struct jvmtiTimerInfo; +typedef struct jvmtiTimerInfo jvmtiTimerInfo; +struct jvmtiAddrLocationMap; +typedef struct jvmtiAddrLocationMap jvmtiAddrLocationMap; + + /* Function Types */ + +typedef void (JNICALL *jvmtiStartFunction) + (jvmtiEnv* jvmti_env, JNIEnv* jni_env, void* arg); + +typedef jint (JNICALL *jvmtiHeapIterationCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, jint length, void* user_data); + +typedef jint (JNICALL *jvmtiHeapReferenceCallback) + (jvmtiHeapReferenceKind reference_kind, const jvmtiHeapReferenceInfo* reference_info, jlong class_tag, jlong referrer_class_tag, jlong size, jlong* tag_ptr, jlong* referrer_tag_ptr, jint length, void* user_data); + +typedef jint (JNICALL *jvmtiPrimitiveFieldCallback) + (jvmtiHeapReferenceKind kind, const jvmtiHeapReferenceInfo* info, jlong object_class_tag, jlong* object_tag_ptr, jvalue value, jvmtiPrimitiveType value_type, void* user_data); + +typedef jint (JNICALL *jvmtiArrayPrimitiveValueCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, jint element_count, jvmtiPrimitiveType element_type, const void* elements, void* user_data); + +typedef jint (JNICALL *jvmtiStringPrimitiveValueCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, const jchar* value, jint value_length, void* user_data); + +typedef jint (JNICALL *jvmtiReservedCallback) + (); + +typedef jvmtiIterationControl (JNICALL *jvmtiHeapObjectCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, void* user_data); + +typedef jvmtiIterationControl (JNICALL *jvmtiHeapRootCallback) + (jvmtiHeapRootKind root_kind, jlong class_tag, jlong size, jlong* tag_ptr, void* user_data); + +typedef jvmtiIterationControl (JNICALL *jvmtiStackReferenceCallback) + (jvmtiHeapRootKind root_kind, jlong class_tag, jlong size, jlong* tag_ptr, jlong thread_tag, jint depth, jmethodID method, jint slot, void* user_data); + +typedef jvmtiIterationControl (JNICALL *jvmtiObjectReferenceCallback) + (jvmtiObjectReferenceKind reference_kind, jlong class_tag, jlong size, jlong* tag_ptr, jlong referrer_tag, jint referrer_index, void* user_data); + +typedef jvmtiError (JNICALL *jvmtiExtensionFunction) + (jvmtiEnv* jvmti_env, ...); + +typedef void (JNICALL *jvmtiExtensionEvent) + (jvmtiEnv* jvmti_env, ...); + + + /* Structure Types */ +struct jvmtiThreadInfo { + char* name; + jint priority; + jboolean is_daemon; + jthreadGroup thread_group; + jobject context_class_loader; +}; +struct jvmtiMonitorStackDepthInfo { + jobject monitor; + jint stack_depth; +}; +struct jvmtiThreadGroupInfo { + jthreadGroup parent; + char* name; + jint max_priority; + jboolean is_daemon; +}; +struct jvmtiFrameInfo { + jmethodID method; + jlocation location; +}; +struct jvmtiStackInfo { + jthread thread; + jint state; + jvmtiFrameInfo* frame_buffer; + jint frame_count; +}; +struct jvmtiHeapReferenceInfoField { + jint index; +}; +struct jvmtiHeapReferenceInfoArray { + jint index; +}; +struct jvmtiHeapReferenceInfoConstantPool { + jint index; +}; +struct jvmtiHeapReferenceInfoStackLocal { + jlong thread_tag; + jlong thread_id; + jint depth; + jmethodID method; + jlocation location; + jint slot; +}; +struct jvmtiHeapReferenceInfoJniLocal { + jlong thread_tag; + jlong thread_id; + jint depth; + jmethodID method; +}; +struct jvmtiHeapReferenceInfoReserved { + jlong reserved1; + jlong reserved2; + jlong reserved3; + jlong reserved4; + jlong reserved5; + jlong reserved6; + jlong reserved7; + jlong reserved8; +}; +union jvmtiHeapReferenceInfo { + jvmtiHeapReferenceInfoField field; + jvmtiHeapReferenceInfoArray array; + jvmtiHeapReferenceInfoConstantPool constant_pool; + jvmtiHeapReferenceInfoStackLocal stack_local; + jvmtiHeapReferenceInfoJniLocal jni_local; + jvmtiHeapReferenceInfoReserved other; +}; +struct jvmtiHeapCallbacks { + jvmtiHeapIterationCallback heap_iteration_callback; + jvmtiHeapReferenceCallback heap_reference_callback; + jvmtiPrimitiveFieldCallback primitive_field_callback; + jvmtiArrayPrimitiveValueCallback array_primitive_value_callback; + jvmtiStringPrimitiveValueCallback string_primitive_value_callback; + jvmtiReservedCallback reserved5; + jvmtiReservedCallback reserved6; + jvmtiReservedCallback reserved7; + jvmtiReservedCallback reserved8; + jvmtiReservedCallback reserved9; + jvmtiReservedCallback reserved10; + jvmtiReservedCallback reserved11; + jvmtiReservedCallback reserved12; + jvmtiReservedCallback reserved13; + jvmtiReservedCallback reserved14; + jvmtiReservedCallback reserved15; +}; +struct jvmtiClassDefinition { + jclass klass; + jint class_byte_count; + const unsigned char* class_bytes; +}; +struct jvmtiMonitorUsage { + jthread owner; + jint entry_count; + jint waiter_count; + jthread* waiters; + jint notify_waiter_count; + jthread* notify_waiters; +}; +struct jvmtiLineNumberEntry { + jlocation start_location; + jint line_number; +}; +struct jvmtiLocalVariableEntry { + jlocation start_location; + jint length; + char* name; + char* signature; + char* generic_signature; + jint slot; +}; +struct jvmtiParamInfo { + char* name; + jvmtiParamKind kind; + jvmtiParamTypes base_type; + jboolean null_ok; +}; +struct jvmtiExtensionFunctionInfo { + jvmtiExtensionFunction func; + char* id; + char* short_description; + jint param_count; + jvmtiParamInfo* params; + jint error_count; + jvmtiError* errors; +}; +struct jvmtiExtensionEventInfo { + jint extension_event_index; + char* id; + char* short_description; + jint param_count; + jvmtiParamInfo* params; +}; +struct jvmtiTimerInfo { + jlong max_value; + jboolean may_skip_forward; + jboolean may_skip_backward; + jvmtiTimerKind kind; + jlong reserved1; + jlong reserved2; +}; +struct jvmtiAddrLocationMap { + const void* start_address; + jlocation location; +}; + +typedef struct { + unsigned int can_tag_objects : 1; + unsigned int can_generate_field_modification_events : 1; + unsigned int can_generate_field_access_events : 1; + unsigned int can_get_bytecodes : 1; + unsigned int can_get_synthetic_attribute : 1; + unsigned int can_get_owned_monitor_info : 1; + unsigned int can_get_current_contended_monitor : 1; + unsigned int can_get_monitor_info : 1; + unsigned int can_pop_frame : 1; + unsigned int can_redefine_classes : 1; + unsigned int can_signal_thread : 1; + unsigned int can_get_source_file_name : 1; + unsigned int can_get_line_numbers : 1; + unsigned int can_get_source_debug_extension : 1; + unsigned int can_access_local_variables : 1; + unsigned int can_maintain_original_method_order : 1; + unsigned int can_generate_single_step_events : 1; + unsigned int can_generate_exception_events : 1; + unsigned int can_generate_frame_pop_events : 1; + unsigned int can_generate_breakpoint_events : 1; + unsigned int can_suspend : 1; + unsigned int can_redefine_any_class : 1; + unsigned int can_get_current_thread_cpu_time : 1; + unsigned int can_get_thread_cpu_time : 1; + unsigned int can_generate_method_entry_events : 1; + unsigned int can_generate_method_exit_events : 1; + unsigned int can_generate_all_class_hook_events : 1; + unsigned int can_generate_compiled_method_load_events : 1; + unsigned int can_generate_monitor_events : 1; + unsigned int can_generate_vm_object_alloc_events : 1; + unsigned int can_generate_native_method_bind_events : 1; + unsigned int can_generate_garbage_collection_events : 1; + unsigned int can_generate_object_free_events : 1; + unsigned int can_force_early_return : 1; + unsigned int can_get_owned_monitor_stack_depth_info : 1; + unsigned int can_get_constant_pool : 1; + unsigned int can_set_native_method_prefix : 1; + unsigned int can_retransform_classes : 1; + unsigned int can_retransform_any_class : 1; + unsigned int can_generate_resource_exhaustion_heap_events : 1; + unsigned int can_generate_resource_exhaustion_threads_events : 1; + unsigned int can_generate_early_vmstart : 1; + unsigned int can_generate_early_class_hook_events : 1; + unsigned int can_generate_sampled_object_alloc_events : 1; + unsigned int can_support_virtual_threads : 1; + unsigned int : 3; + unsigned int : 16; + unsigned int : 16; + unsigned int : 16; + unsigned int : 16; + unsigned int : 16; +} jvmtiCapabilities; + + + /* Event Definitions */ + +typedef void (JNICALL *jvmtiEventReserved)(void); + + +typedef void (JNICALL *jvmtiEventBreakpoint) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location); + +typedef void (JNICALL *jvmtiEventClassFileLoadHook) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jclass class_being_redefined, + jobject loader, + const char* name, + jobject protection_domain, + jint class_data_len, + const unsigned char* class_data, + jint* new_class_data_len, + unsigned char** new_class_data); + +typedef void (JNICALL *jvmtiEventClassLoad) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jclass klass); + +typedef void (JNICALL *jvmtiEventClassPrepare) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jclass klass); + +typedef void (JNICALL *jvmtiEventCompiledMethodLoad) + (jvmtiEnv *jvmti_env, + jmethodID method, + jint code_size, + const void* code_addr, + jint map_length, + const jvmtiAddrLocationMap* map, + const void* compile_info); + +typedef void (JNICALL *jvmtiEventCompiledMethodUnload) + (jvmtiEnv *jvmti_env, + jmethodID method, + const void* code_addr); + +typedef void (JNICALL *jvmtiEventDataDumpRequest) + (jvmtiEnv *jvmti_env); + +typedef void (JNICALL *jvmtiEventDynamicCodeGenerated) + (jvmtiEnv *jvmti_env, + const char* name, + const void* address, + jint length); + +typedef void (JNICALL *jvmtiEventException) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jobject exception, + jmethodID catch_method, + jlocation catch_location); + +typedef void (JNICALL *jvmtiEventExceptionCatch) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jobject exception); + +typedef void (JNICALL *jvmtiEventFieldAccess) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jclass field_klass, + jobject object, + jfieldID field); + +typedef void (JNICALL *jvmtiEventFieldModification) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jclass field_klass, + jobject object, + jfieldID field, + char signature_type, + jvalue new_value); + +typedef void (JNICALL *jvmtiEventFramePop) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jboolean was_popped_by_exception); + +typedef void (JNICALL *jvmtiEventGarbageCollectionFinish) + (jvmtiEnv *jvmti_env); + +typedef void (JNICALL *jvmtiEventGarbageCollectionStart) + (jvmtiEnv *jvmti_env); + +typedef void (JNICALL *jvmtiEventMethodEntry) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method); + +typedef void (JNICALL *jvmtiEventMethodExit) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jboolean was_popped_by_exception, + jvalue return_value); + +typedef void (JNICALL *jvmtiEventMonitorContendedEnter) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object); + +typedef void (JNICALL *jvmtiEventMonitorContendedEntered) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object); + +typedef void (JNICALL *jvmtiEventMonitorWait) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jlong timeout); + +typedef void (JNICALL *jvmtiEventMonitorWaited) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jboolean timed_out); + +typedef void (JNICALL *jvmtiEventNativeMethodBind) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + void* address, + void** new_address_ptr); + +typedef void (JNICALL *jvmtiEventObjectFree) + (jvmtiEnv *jvmti_env, + jlong tag); + +typedef void (JNICALL *jvmtiEventResourceExhausted) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jint flags, + const void* reserved, + const char* description); + +typedef void (JNICALL *jvmtiEventSampledObjectAlloc) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jclass object_klass, + jlong size); + +typedef void (JNICALL *jvmtiEventSingleStep) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location); + +typedef void (JNICALL *jvmtiEventThreadEnd) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread); + +typedef void (JNICALL *jvmtiEventThreadStart) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread); + +typedef void (JNICALL *jvmtiEventVirtualThreadEnd) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread virtual_thread); + +typedef void (JNICALL *jvmtiEventVirtualThreadStart) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread virtual_thread); + +typedef void (JNICALL *jvmtiEventVMDeath) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env); + +typedef void (JNICALL *jvmtiEventVMInit) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread); + +typedef void (JNICALL *jvmtiEventVMObjectAlloc) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jclass object_klass, + jlong size); + +typedef void (JNICALL *jvmtiEventVMStart) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env); + + /* Event Callback Structure */ + +typedef struct { + /* 50 : VM Initialization Event */ + jvmtiEventVMInit VMInit; + /* 51 : VM Death Event */ + jvmtiEventVMDeath VMDeath; + /* 52 : Thread Start */ + jvmtiEventThreadStart ThreadStart; + /* 53 : Thread End */ + jvmtiEventThreadEnd ThreadEnd; + /* 54 : Class File Load Hook */ + jvmtiEventClassFileLoadHook ClassFileLoadHook; + /* 55 : Class Load */ + jvmtiEventClassLoad ClassLoad; + /* 56 : Class Prepare */ + jvmtiEventClassPrepare ClassPrepare; + /* 57 : VM Start Event */ + jvmtiEventVMStart VMStart; + /* 58 : Exception */ + jvmtiEventException Exception; + /* 59 : Exception Catch */ + jvmtiEventExceptionCatch ExceptionCatch; + /* 60 : Single Step */ + jvmtiEventSingleStep SingleStep; + /* 61 : Frame Pop */ + jvmtiEventFramePop FramePop; + /* 62 : Breakpoint */ + jvmtiEventBreakpoint Breakpoint; + /* 63 : Field Access */ + jvmtiEventFieldAccess FieldAccess; + /* 64 : Field Modification */ + jvmtiEventFieldModification FieldModification; + /* 65 : Method Entry */ + jvmtiEventMethodEntry MethodEntry; + /* 66 : Method Exit */ + jvmtiEventMethodExit MethodExit; + /* 67 : Native Method Bind */ + jvmtiEventNativeMethodBind NativeMethodBind; + /* 68 : Compiled Method Load */ + jvmtiEventCompiledMethodLoad CompiledMethodLoad; + /* 69 : Compiled Method Unload */ + jvmtiEventCompiledMethodUnload CompiledMethodUnload; + /* 70 : Dynamic Code Generated */ + jvmtiEventDynamicCodeGenerated DynamicCodeGenerated; + /* 71 : Data Dump Request */ + jvmtiEventDataDumpRequest DataDumpRequest; + /* 72 */ + jvmtiEventReserved reserved72; + /* 73 : Monitor Wait */ + jvmtiEventMonitorWait MonitorWait; + /* 74 : Monitor Waited */ + jvmtiEventMonitorWaited MonitorWaited; + /* 75 : Monitor Contended Enter */ + jvmtiEventMonitorContendedEnter MonitorContendedEnter; + /* 76 : Monitor Contended Entered */ + jvmtiEventMonitorContendedEntered MonitorContendedEntered; + /* 77 */ + jvmtiEventReserved reserved77; + /* 78 */ + jvmtiEventReserved reserved78; + /* 79 */ + jvmtiEventReserved reserved79; + /* 80 : Resource Exhausted */ + jvmtiEventResourceExhausted ResourceExhausted; + /* 81 : Garbage Collection Start */ + jvmtiEventGarbageCollectionStart GarbageCollectionStart; + /* 82 : Garbage Collection Finish */ + jvmtiEventGarbageCollectionFinish GarbageCollectionFinish; + /* 83 : Object Free */ + jvmtiEventObjectFree ObjectFree; + /* 84 : VM Object Allocation */ + jvmtiEventVMObjectAlloc VMObjectAlloc; + /* 85 */ + jvmtiEventReserved reserved85; + /* 86 : Sampled Object Allocation */ + jvmtiEventSampledObjectAlloc SampledObjectAlloc; + /* 87 : Virtual Thread Start */ + jvmtiEventVirtualThreadStart VirtualThreadStart; + /* 88 : Virtual Thread End */ + jvmtiEventVirtualThreadEnd VirtualThreadEnd; +} jvmtiEventCallbacks; + + + /* Function Interface */ + +typedef struct jvmtiInterface_1_ { + + /* 1 : RESERVED */ + void *reserved1; + + /* 2 : Set Event Notification Mode */ + jvmtiError (JNICALL *SetEventNotificationMode) (jvmtiEnv* env, + jvmtiEventMode mode, + jvmtiEvent event_type, + jthread event_thread, + ...); + + /* 3 : Get All Modules */ + jvmtiError (JNICALL *GetAllModules) (jvmtiEnv* env, + jint* module_count_ptr, + jobject** modules_ptr); + + /* 4 : Get All Threads */ + jvmtiError (JNICALL *GetAllThreads) (jvmtiEnv* env, + jint* threads_count_ptr, + jthread** threads_ptr); + + /* 5 : Suspend Thread */ + jvmtiError (JNICALL *SuspendThread) (jvmtiEnv* env, + jthread thread); + + /* 6 : Resume Thread */ + jvmtiError (JNICALL *ResumeThread) (jvmtiEnv* env, + jthread thread); + + /* 7 : Stop Thread */ + jvmtiError (JNICALL *StopThread) (jvmtiEnv* env, + jthread thread, + jobject exception); + + /* 8 : Interrupt Thread */ + jvmtiError (JNICALL *InterruptThread) (jvmtiEnv* env, + jthread thread); + + /* 9 : Get Thread Info */ + jvmtiError (JNICALL *GetThreadInfo) (jvmtiEnv* env, + jthread thread, + jvmtiThreadInfo* info_ptr); + + /* 10 : Get Owned Monitor Info */ + jvmtiError (JNICALL *GetOwnedMonitorInfo) (jvmtiEnv* env, + jthread thread, + jint* owned_monitor_count_ptr, + jobject** owned_monitors_ptr); + + /* 11 : Get Current Contended Monitor */ + jvmtiError (JNICALL *GetCurrentContendedMonitor) (jvmtiEnv* env, + jthread thread, + jobject* monitor_ptr); + + /* 12 : Run Agent Thread */ + jvmtiError (JNICALL *RunAgentThread) (jvmtiEnv* env, + jthread thread, + jvmtiStartFunction proc, + const void* arg, + jint priority); + + /* 13 : Get Top Thread Groups */ + jvmtiError (JNICALL *GetTopThreadGroups) (jvmtiEnv* env, + jint* group_count_ptr, + jthreadGroup** groups_ptr); + + /* 14 : Get Thread Group Info */ + jvmtiError (JNICALL *GetThreadGroupInfo) (jvmtiEnv* env, + jthreadGroup group, + jvmtiThreadGroupInfo* info_ptr); + + /* 15 : Get Thread Group Children */ + jvmtiError (JNICALL *GetThreadGroupChildren) (jvmtiEnv* env, + jthreadGroup group, + jint* thread_count_ptr, + jthread** threads_ptr, + jint* group_count_ptr, + jthreadGroup** groups_ptr); + + /* 16 : Get Frame Count */ + jvmtiError (JNICALL *GetFrameCount) (jvmtiEnv* env, + jthread thread, + jint* count_ptr); + + /* 17 : Get Thread State */ + jvmtiError (JNICALL *GetThreadState) (jvmtiEnv* env, + jthread thread, + jint* thread_state_ptr); + + /* 18 : Get Current Thread */ + jvmtiError (JNICALL *GetCurrentThread) (jvmtiEnv* env, + jthread* thread_ptr); + + /* 19 : Get Frame Location */ + jvmtiError (JNICALL *GetFrameLocation) (jvmtiEnv* env, + jthread thread, + jint depth, + jmethodID* method_ptr, + jlocation* location_ptr); + + /* 20 : Notify Frame Pop */ + jvmtiError (JNICALL *NotifyFramePop) (jvmtiEnv* env, + jthread thread, + jint depth); + + /* 21 : Get Local Variable - Object */ + jvmtiError (JNICALL *GetLocalObject) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jobject* value_ptr); + + /* 22 : Get Local Variable - Int */ + jvmtiError (JNICALL *GetLocalInt) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jint* value_ptr); + + /* 23 : Get Local Variable - Long */ + jvmtiError (JNICALL *GetLocalLong) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jlong* value_ptr); + + /* 24 : Get Local Variable - Float */ + jvmtiError (JNICALL *GetLocalFloat) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jfloat* value_ptr); + + /* 25 : Get Local Variable - Double */ + jvmtiError (JNICALL *GetLocalDouble) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jdouble* value_ptr); + + /* 26 : Set Local Variable - Object */ + jvmtiError (JNICALL *SetLocalObject) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jobject value); + + /* 27 : Set Local Variable - Int */ + jvmtiError (JNICALL *SetLocalInt) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jint value); + + /* 28 : Set Local Variable - Long */ + jvmtiError (JNICALL *SetLocalLong) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jlong value); + + /* 29 : Set Local Variable - Float */ + jvmtiError (JNICALL *SetLocalFloat) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jfloat value); + + /* 30 : Set Local Variable - Double */ + jvmtiError (JNICALL *SetLocalDouble) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jdouble value); + + /* 31 : Create Raw Monitor */ + jvmtiError (JNICALL *CreateRawMonitor) (jvmtiEnv* env, + const char* name, + jrawMonitorID* monitor_ptr); + + /* 32 : Destroy Raw Monitor */ + jvmtiError (JNICALL *DestroyRawMonitor) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 33 : Raw Monitor Enter */ + jvmtiError (JNICALL *RawMonitorEnter) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 34 : Raw Monitor Exit */ + jvmtiError (JNICALL *RawMonitorExit) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 35 : Raw Monitor Wait */ + jvmtiError (JNICALL *RawMonitorWait) (jvmtiEnv* env, + jrawMonitorID monitor, + jlong millis); + + /* 36 : Raw Monitor Notify */ + jvmtiError (JNICALL *RawMonitorNotify) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 37 : Raw Monitor Notify All */ + jvmtiError (JNICALL *RawMonitorNotifyAll) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 38 : Set Breakpoint */ + jvmtiError (JNICALL *SetBreakpoint) (jvmtiEnv* env, + jmethodID method, + jlocation location); + + /* 39 : Clear Breakpoint */ + jvmtiError (JNICALL *ClearBreakpoint) (jvmtiEnv* env, + jmethodID method, + jlocation location); + + /* 40 : Get Named Module */ + jvmtiError (JNICALL *GetNamedModule) (jvmtiEnv* env, + jobject class_loader, + const char* package_name, + jobject* module_ptr); + + /* 41 : Set Field Access Watch */ + jvmtiError (JNICALL *SetFieldAccessWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 42 : Clear Field Access Watch */ + jvmtiError (JNICALL *ClearFieldAccessWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 43 : Set Field Modification Watch */ + jvmtiError (JNICALL *SetFieldModificationWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 44 : Clear Field Modification Watch */ + jvmtiError (JNICALL *ClearFieldModificationWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 45 : Is Modifiable Class */ + jvmtiError (JNICALL *IsModifiableClass) (jvmtiEnv* env, + jclass klass, + jboolean* is_modifiable_class_ptr); + + /* 46 : Allocate */ + jvmtiError (JNICALL *Allocate) (jvmtiEnv* env, + jlong size, + unsigned char** mem_ptr); + + /* 47 : Deallocate */ + jvmtiError (JNICALL *Deallocate) (jvmtiEnv* env, + unsigned char* mem); + + /* 48 : Get Class Signature */ + jvmtiError (JNICALL *GetClassSignature) (jvmtiEnv* env, + jclass klass, + char** signature_ptr, + char** generic_ptr); + + /* 49 : Get Class Status */ + jvmtiError (JNICALL *GetClassStatus) (jvmtiEnv* env, + jclass klass, + jint* status_ptr); + + /* 50 : Get Source File Name */ + jvmtiError (JNICALL *GetSourceFileName) (jvmtiEnv* env, + jclass klass, + char** source_name_ptr); + + /* 51 : Get Class Modifiers */ + jvmtiError (JNICALL *GetClassModifiers) (jvmtiEnv* env, + jclass klass, + jint* modifiers_ptr); + + /* 52 : Get Class Methods */ + jvmtiError (JNICALL *GetClassMethods) (jvmtiEnv* env, + jclass klass, + jint* method_count_ptr, + jmethodID** methods_ptr); + + /* 53 : Get Class Fields */ + jvmtiError (JNICALL *GetClassFields) (jvmtiEnv* env, + jclass klass, + jint* field_count_ptr, + jfieldID** fields_ptr); + + /* 54 : Get Implemented Interfaces */ + jvmtiError (JNICALL *GetImplementedInterfaces) (jvmtiEnv* env, + jclass klass, + jint* interface_count_ptr, + jclass** interfaces_ptr); + + /* 55 : Is Interface */ + jvmtiError (JNICALL *IsInterface) (jvmtiEnv* env, + jclass klass, + jboolean* is_interface_ptr); + + /* 56 : Is Array Class */ + jvmtiError (JNICALL *IsArrayClass) (jvmtiEnv* env, + jclass klass, + jboolean* is_array_class_ptr); + + /* 57 : Get Class Loader */ + jvmtiError (JNICALL *GetClassLoader) (jvmtiEnv* env, + jclass klass, + jobject* classloader_ptr); + + /* 58 : Get Object Hash Code */ + jvmtiError (JNICALL *GetObjectHashCode) (jvmtiEnv* env, + jobject object, + jint* hash_code_ptr); + + /* 59 : Get Object Monitor Usage */ + jvmtiError (JNICALL *GetObjectMonitorUsage) (jvmtiEnv* env, + jobject object, + jvmtiMonitorUsage* info_ptr); + + /* 60 : Get Field Name (and Signature) */ + jvmtiError (JNICALL *GetFieldName) (jvmtiEnv* env, + jclass klass, + jfieldID field, + char** name_ptr, + char** signature_ptr, + char** generic_ptr); + + /* 61 : Get Field Declaring Class */ + jvmtiError (JNICALL *GetFieldDeclaringClass) (jvmtiEnv* env, + jclass klass, + jfieldID field, + jclass* declaring_class_ptr); + + /* 62 : Get Field Modifiers */ + jvmtiError (JNICALL *GetFieldModifiers) (jvmtiEnv* env, + jclass klass, + jfieldID field, + jint* modifiers_ptr); + + /* 63 : Is Field Synthetic */ + jvmtiError (JNICALL *IsFieldSynthetic) (jvmtiEnv* env, + jclass klass, + jfieldID field, + jboolean* is_synthetic_ptr); + + /* 64 : Get Method Name (and Signature) */ + jvmtiError (JNICALL *GetMethodName) (jvmtiEnv* env, + jmethodID method, + char** name_ptr, + char** signature_ptr, + char** generic_ptr); + + /* 65 : Get Method Declaring Class */ + jvmtiError (JNICALL *GetMethodDeclaringClass) (jvmtiEnv* env, + jmethodID method, + jclass* declaring_class_ptr); + + /* 66 : Get Method Modifiers */ + jvmtiError (JNICALL *GetMethodModifiers) (jvmtiEnv* env, + jmethodID method, + jint* modifiers_ptr); + + /* 67 : RESERVED */ + void *reserved67; + + /* 68 : Get Max Locals */ + jvmtiError (JNICALL *GetMaxLocals) (jvmtiEnv* env, + jmethodID method, + jint* max_ptr); + + /* 69 : Get Arguments Size */ + jvmtiError (JNICALL *GetArgumentsSize) (jvmtiEnv* env, + jmethodID method, + jint* size_ptr); + + /* 70 : Get Line Number Table */ + jvmtiError (JNICALL *GetLineNumberTable) (jvmtiEnv* env, + jmethodID method, + jint* entry_count_ptr, + jvmtiLineNumberEntry** table_ptr); + + /* 71 : Get Method Location */ + jvmtiError (JNICALL *GetMethodLocation) (jvmtiEnv* env, + jmethodID method, + jlocation* start_location_ptr, + jlocation* end_location_ptr); + + /* 72 : Get Local Variable Table */ + jvmtiError (JNICALL *GetLocalVariableTable) (jvmtiEnv* env, + jmethodID method, + jint* entry_count_ptr, + jvmtiLocalVariableEntry** table_ptr); + + /* 73 : Set Native Method Prefix */ + jvmtiError (JNICALL *SetNativeMethodPrefix) (jvmtiEnv* env, + const char* prefix); + + /* 74 : Set Native Method Prefixes */ + jvmtiError (JNICALL *SetNativeMethodPrefixes) (jvmtiEnv* env, + jint prefix_count, + char** prefixes); + + /* 75 : Get Bytecodes */ + jvmtiError (JNICALL *GetBytecodes) (jvmtiEnv* env, + jmethodID method, + jint* bytecode_count_ptr, + unsigned char** bytecodes_ptr); + + /* 76 : Is Method Native */ + jvmtiError (JNICALL *IsMethodNative) (jvmtiEnv* env, + jmethodID method, + jboolean* is_native_ptr); + + /* 77 : Is Method Synthetic */ + jvmtiError (JNICALL *IsMethodSynthetic) (jvmtiEnv* env, + jmethodID method, + jboolean* is_synthetic_ptr); + + /* 78 : Get Loaded Classes */ + jvmtiError (JNICALL *GetLoadedClasses) (jvmtiEnv* env, + jint* class_count_ptr, + jclass** classes_ptr); + + /* 79 : Get Classloader Classes */ + jvmtiError (JNICALL *GetClassLoaderClasses) (jvmtiEnv* env, + jobject initiating_loader, + jint* class_count_ptr, + jclass** classes_ptr); + + /* 80 : Pop Frame */ + jvmtiError (JNICALL *PopFrame) (jvmtiEnv* env, + jthread thread); + + /* 81 : Force Early Return - Object */ + jvmtiError (JNICALL *ForceEarlyReturnObject) (jvmtiEnv* env, + jthread thread, + jobject value); + + /* 82 : Force Early Return - Int */ + jvmtiError (JNICALL *ForceEarlyReturnInt) (jvmtiEnv* env, + jthread thread, + jint value); + + /* 83 : Force Early Return - Long */ + jvmtiError (JNICALL *ForceEarlyReturnLong) (jvmtiEnv* env, + jthread thread, + jlong value); + + /* 84 : Force Early Return - Float */ + jvmtiError (JNICALL *ForceEarlyReturnFloat) (jvmtiEnv* env, + jthread thread, + jfloat value); + + /* 85 : Force Early Return - Double */ + jvmtiError (JNICALL *ForceEarlyReturnDouble) (jvmtiEnv* env, + jthread thread, + jdouble value); + + /* 86 : Force Early Return - Void */ + jvmtiError (JNICALL *ForceEarlyReturnVoid) (jvmtiEnv* env, + jthread thread); + + /* 87 : Redefine Classes */ + jvmtiError (JNICALL *RedefineClasses) (jvmtiEnv* env, + jint class_count, + const jvmtiClassDefinition* class_definitions); + + /* 88 : Get Version Number */ + jvmtiError (JNICALL *GetVersionNumber) (jvmtiEnv* env, + jint* version_ptr); + + /* 89 : Get Capabilities */ + jvmtiError (JNICALL *GetCapabilities) (jvmtiEnv* env, + jvmtiCapabilities* capabilities_ptr); + + /* 90 : Get Source Debug Extension */ + jvmtiError (JNICALL *GetSourceDebugExtension) (jvmtiEnv* env, + jclass klass, + char** source_debug_extension_ptr); + + /* 91 : Is Method Obsolete */ + jvmtiError (JNICALL *IsMethodObsolete) (jvmtiEnv* env, + jmethodID method, + jboolean* is_obsolete_ptr); + + /* 92 : Suspend Thread List */ + jvmtiError (JNICALL *SuspendThreadList) (jvmtiEnv* env, + jint request_count, + const jthread* request_list, + jvmtiError* results); + + /* 93 : Resume Thread List */ + jvmtiError (JNICALL *ResumeThreadList) (jvmtiEnv* env, + jint request_count, + const jthread* request_list, + jvmtiError* results); + + /* 94 : Add Module Reads */ + jvmtiError (JNICALL *AddModuleReads) (jvmtiEnv* env, + jobject module, + jobject to_module); + + /* 95 : Add Module Exports */ + jvmtiError (JNICALL *AddModuleExports) (jvmtiEnv* env, + jobject module, + const char* pkg_name, + jobject to_module); + + /* 96 : Add Module Opens */ + jvmtiError (JNICALL *AddModuleOpens) (jvmtiEnv* env, + jobject module, + const char* pkg_name, + jobject to_module); + + /* 97 : Add Module Uses */ + jvmtiError (JNICALL *AddModuleUses) (jvmtiEnv* env, + jobject module, + jclass service); + + /* 98 : Add Module Provides */ + jvmtiError (JNICALL *AddModuleProvides) (jvmtiEnv* env, + jobject module, + jclass service, + jclass impl_class); + + /* 99 : Is Modifiable Module */ + jvmtiError (JNICALL *IsModifiableModule) (jvmtiEnv* env, + jobject module, + jboolean* is_modifiable_module_ptr); + + /* 100 : Get All Stack Traces */ + jvmtiError (JNICALL *GetAllStackTraces) (jvmtiEnv* env, + jint max_frame_count, + jvmtiStackInfo** stack_info_ptr, + jint* thread_count_ptr); + + /* 101 : Get Thread List Stack Traces */ + jvmtiError (JNICALL *GetThreadListStackTraces) (jvmtiEnv* env, + jint thread_count, + const jthread* thread_list, + jint max_frame_count, + jvmtiStackInfo** stack_info_ptr); + + /* 102 : Get Thread Local Storage */ + jvmtiError (JNICALL *GetThreadLocalStorage) (jvmtiEnv* env, + jthread thread, + void** data_ptr); + + /* 103 : Set Thread Local Storage */ + jvmtiError (JNICALL *SetThreadLocalStorage) (jvmtiEnv* env, + jthread thread, + const void* data); + + /* 104 : Get Stack Trace */ + jvmtiError (JNICALL *GetStackTrace) (jvmtiEnv* env, + jthread thread, + jint start_depth, + jint max_frame_count, + jvmtiFrameInfo* frame_buffer, + jint* count_ptr); + + /* 105 : RESERVED */ + void *reserved105; + + /* 106 : Get Tag */ + jvmtiError (JNICALL *GetTag) (jvmtiEnv* env, + jobject object, + jlong* tag_ptr); + + /* 107 : Set Tag */ + jvmtiError (JNICALL *SetTag) (jvmtiEnv* env, + jobject object, + jlong tag); + + /* 108 : Force Garbage Collection */ + jvmtiError (JNICALL *ForceGarbageCollection) (jvmtiEnv* env); + + /* 109 : Iterate Over Objects Reachable From Object */ + jvmtiError (JNICALL *IterateOverObjectsReachableFromObject) (jvmtiEnv* env, + jobject object, + jvmtiObjectReferenceCallback object_reference_callback, + const void* user_data); + + /* 110 : Iterate Over Reachable Objects */ + jvmtiError (JNICALL *IterateOverReachableObjects) (jvmtiEnv* env, + jvmtiHeapRootCallback heap_root_callback, + jvmtiStackReferenceCallback stack_ref_callback, + jvmtiObjectReferenceCallback object_ref_callback, + const void* user_data); + + /* 111 : Iterate Over Heap */ + jvmtiError (JNICALL *IterateOverHeap) (jvmtiEnv* env, + jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data); + + /* 112 : Iterate Over Instances Of Class */ + jvmtiError (JNICALL *IterateOverInstancesOfClass) (jvmtiEnv* env, + jclass klass, + jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data); + + /* 113 : RESERVED */ + void *reserved113; + + /* 114 : Get Objects With Tags */ + jvmtiError (JNICALL *GetObjectsWithTags) (jvmtiEnv* env, + jint tag_count, + const jlong* tags, + jint* count_ptr, + jobject** object_result_ptr, + jlong** tag_result_ptr); + + /* 115 : Follow References */ + jvmtiError (JNICALL *FollowReferences) (jvmtiEnv* env, + jint heap_filter, + jclass klass, + jobject initial_object, + const jvmtiHeapCallbacks* callbacks, + const void* user_data); + + /* 116 : Iterate Through Heap */ + jvmtiError (JNICALL *IterateThroughHeap) (jvmtiEnv* env, + jint heap_filter, + jclass klass, + const jvmtiHeapCallbacks* callbacks, + const void* user_data); + + /* 117 : RESERVED */ + void *reserved117; + + /* 118 : Suspend All Virtual Threads */ + jvmtiError (JNICALL *SuspendAllVirtualThreads) (jvmtiEnv* env, + jint except_count, + const jthread* except_list); + + /* 119 : Resume All Virtual Threads */ + jvmtiError (JNICALL *ResumeAllVirtualThreads) (jvmtiEnv* env, + jint except_count, + const jthread* except_list); + + /* 120 : Set JNI Function Table */ + jvmtiError (JNICALL *SetJNIFunctionTable) (jvmtiEnv* env, + const jniNativeInterface* function_table); + + /* 121 : Get JNI Function Table */ + jvmtiError (JNICALL *GetJNIFunctionTable) (jvmtiEnv* env, + jniNativeInterface** function_table); + + /* 122 : Set Event Callbacks */ + jvmtiError (JNICALL *SetEventCallbacks) (jvmtiEnv* env, + const jvmtiEventCallbacks* callbacks, + jint size_of_callbacks); + + /* 123 : Generate Events */ + jvmtiError (JNICALL *GenerateEvents) (jvmtiEnv* env, + jvmtiEvent event_type); + + /* 124 : Get Extension Functions */ + jvmtiError (JNICALL *GetExtensionFunctions) (jvmtiEnv* env, + jint* extension_count_ptr, + jvmtiExtensionFunctionInfo** extensions); + + /* 125 : Get Extension Events */ + jvmtiError (JNICALL *GetExtensionEvents) (jvmtiEnv* env, + jint* extension_count_ptr, + jvmtiExtensionEventInfo** extensions); + + /* 126 : Set Extension Event Callback */ + jvmtiError (JNICALL *SetExtensionEventCallback) (jvmtiEnv* env, + jint extension_event_index, + jvmtiExtensionEvent callback); + + /* 127 : Dispose Environment */ + jvmtiError (JNICALL *DisposeEnvironment) (jvmtiEnv* env); + + /* 128 : Get Error Name */ + jvmtiError (JNICALL *GetErrorName) (jvmtiEnv* env, + jvmtiError error, + char** name_ptr); + + /* 129 : Get JLocation Format */ + jvmtiError (JNICALL *GetJLocationFormat) (jvmtiEnv* env, + jvmtiJlocationFormat* format_ptr); + + /* 130 : Get System Properties */ + jvmtiError (JNICALL *GetSystemProperties) (jvmtiEnv* env, + jint* count_ptr, + char*** property_ptr); + + /* 131 : Get System Property */ + jvmtiError (JNICALL *GetSystemProperty) (jvmtiEnv* env, + const char* property, + char** value_ptr); + + /* 132 : Set System Property */ + jvmtiError (JNICALL *SetSystemProperty) (jvmtiEnv* env, + const char* property, + const char* value_ptr); + + /* 133 : Get Phase */ + jvmtiError (JNICALL *GetPhase) (jvmtiEnv* env, + jvmtiPhase* phase_ptr); + + /* 134 : Get Current Thread CPU Timer Information */ + jvmtiError (JNICALL *GetCurrentThreadCpuTimerInfo) (jvmtiEnv* env, + jvmtiTimerInfo* info_ptr); + + /* 135 : Get Current Thread CPU Time */ + jvmtiError (JNICALL *GetCurrentThreadCpuTime) (jvmtiEnv* env, + jlong* nanos_ptr); + + /* 136 : Get Thread CPU Timer Information */ + jvmtiError (JNICALL *GetThreadCpuTimerInfo) (jvmtiEnv* env, + jvmtiTimerInfo* info_ptr); + + /* 137 : Get Thread CPU Time */ + jvmtiError (JNICALL *GetThreadCpuTime) (jvmtiEnv* env, + jthread thread, + jlong* nanos_ptr); + + /* 138 : Get Timer Information */ + jvmtiError (JNICALL *GetTimerInfo) (jvmtiEnv* env, + jvmtiTimerInfo* info_ptr); + + /* 139 : Get Time */ + jvmtiError (JNICALL *GetTime) (jvmtiEnv* env, + jlong* nanos_ptr); + + /* 140 : Get Potential Capabilities */ + jvmtiError (JNICALL *GetPotentialCapabilities) (jvmtiEnv* env, + jvmtiCapabilities* capabilities_ptr); + + /* 141 : RESERVED */ + void *reserved141; + + /* 142 : Add Capabilities */ + jvmtiError (JNICALL *AddCapabilities) (jvmtiEnv* env, + const jvmtiCapabilities* capabilities_ptr); + + /* 143 : Relinquish Capabilities */ + jvmtiError (JNICALL *RelinquishCapabilities) (jvmtiEnv* env, + const jvmtiCapabilities* capabilities_ptr); + + /* 144 : Get Available Processors */ + jvmtiError (JNICALL *GetAvailableProcessors) (jvmtiEnv* env, + jint* processor_count_ptr); + + /* 145 : Get Class Version Numbers */ + jvmtiError (JNICALL *GetClassVersionNumbers) (jvmtiEnv* env, + jclass klass, + jint* minor_version_ptr, + jint* major_version_ptr); + + /* 146 : Get Constant Pool */ + jvmtiError (JNICALL *GetConstantPool) (jvmtiEnv* env, + jclass klass, + jint* constant_pool_count_ptr, + jint* constant_pool_byte_count_ptr, + unsigned char** constant_pool_bytes_ptr); + + /* 147 : Get Environment Local Storage */ + jvmtiError (JNICALL *GetEnvironmentLocalStorage) (jvmtiEnv* env, + void** data_ptr); + + /* 148 : Set Environment Local Storage */ + jvmtiError (JNICALL *SetEnvironmentLocalStorage) (jvmtiEnv* env, + const void* data); + + /* 149 : Add To Bootstrap Class Loader Search */ + jvmtiError (JNICALL *AddToBootstrapClassLoaderSearch) (jvmtiEnv* env, + const char* segment); + + /* 150 : Set Verbose Flag */ + jvmtiError (JNICALL *SetVerboseFlag) (jvmtiEnv* env, + jvmtiVerboseFlag flag, + jboolean value); + + /* 151 : Add To System Class Loader Search */ + jvmtiError (JNICALL *AddToSystemClassLoaderSearch) (jvmtiEnv* env, + const char* segment); + + /* 152 : Retransform Classes */ + jvmtiError (JNICALL *RetransformClasses) (jvmtiEnv* env, + jint class_count, + const jclass* classes); + + /* 153 : Get Owned Monitor Stack Depth Info */ + jvmtiError (JNICALL *GetOwnedMonitorStackDepthInfo) (jvmtiEnv* env, + jthread thread, + jint* monitor_info_count_ptr, + jvmtiMonitorStackDepthInfo** monitor_info_ptr); + + /* 154 : Get Object Size */ + jvmtiError (JNICALL *GetObjectSize) (jvmtiEnv* env, + jobject object, + jlong* size_ptr); + + /* 155 : Get Local Instance */ + jvmtiError (JNICALL *GetLocalInstance) (jvmtiEnv* env, + jthread thread, + jint depth, + jobject* value_ptr); + + /* 156 : Set Heap Sampling Interval */ + jvmtiError (JNICALL *SetHeapSamplingInterval) (jvmtiEnv* env, + jint sampling_interval); + +} jvmtiInterface_1; + +struct _jvmtiEnv { + const struct jvmtiInterface_1_ *functions; +#ifdef __cplusplus + + + jvmtiError Allocate(jlong size, + unsigned char** mem_ptr) { + return functions->Allocate(this, size, mem_ptr); + } + + jvmtiError Deallocate(unsigned char* mem) { + return functions->Deallocate(this, mem); + } + + jvmtiError GetThreadState(jthread thread, + jint* thread_state_ptr) { + return functions->GetThreadState(this, thread, thread_state_ptr); + } + + jvmtiError GetCurrentThread(jthread* thread_ptr) { + return functions->GetCurrentThread(this, thread_ptr); + } + + jvmtiError GetAllThreads(jint* threads_count_ptr, + jthread** threads_ptr) { + return functions->GetAllThreads(this, threads_count_ptr, threads_ptr); + } + + jvmtiError SuspendThread(jthread thread) { + return functions->SuspendThread(this, thread); + } + + jvmtiError SuspendThreadList(jint request_count, + const jthread* request_list, + jvmtiError* results) { + return functions->SuspendThreadList(this, request_count, request_list, results); + } + + jvmtiError SuspendAllVirtualThreads(jint except_count, + const jthread* except_list) { + return functions->SuspendAllVirtualThreads(this, except_count, except_list); + } + + jvmtiError ResumeThread(jthread thread) { + return functions->ResumeThread(this, thread); + } + + jvmtiError ResumeThreadList(jint request_count, + const jthread* request_list, + jvmtiError* results) { + return functions->ResumeThreadList(this, request_count, request_list, results); + } + + jvmtiError ResumeAllVirtualThreads(jint except_count, + const jthread* except_list) { + return functions->ResumeAllVirtualThreads(this, except_count, except_list); + } + + jvmtiError StopThread(jthread thread, + jobject exception) { + return functions->StopThread(this, thread, exception); + } + + jvmtiError InterruptThread(jthread thread) { + return functions->InterruptThread(this, thread); + } + + jvmtiError GetThreadInfo(jthread thread, + jvmtiThreadInfo* info_ptr) { + return functions->GetThreadInfo(this, thread, info_ptr); + } + + jvmtiError GetOwnedMonitorInfo(jthread thread, + jint* owned_monitor_count_ptr, + jobject** owned_monitors_ptr) { + return functions->GetOwnedMonitorInfo(this, thread, owned_monitor_count_ptr, owned_monitors_ptr); + } + + jvmtiError GetOwnedMonitorStackDepthInfo(jthread thread, + jint* monitor_info_count_ptr, + jvmtiMonitorStackDepthInfo** monitor_info_ptr) { + return functions->GetOwnedMonitorStackDepthInfo(this, thread, monitor_info_count_ptr, monitor_info_ptr); + } + + jvmtiError GetCurrentContendedMonitor(jthread thread, + jobject* monitor_ptr) { + return functions->GetCurrentContendedMonitor(this, thread, monitor_ptr); + } + + jvmtiError RunAgentThread(jthread thread, + jvmtiStartFunction proc, + const void* arg, + jint priority) { + return functions->RunAgentThread(this, thread, proc, arg, priority); + } + + jvmtiError SetThreadLocalStorage(jthread thread, + const void* data) { + return functions->SetThreadLocalStorage(this, thread, data); + } + + jvmtiError GetThreadLocalStorage(jthread thread, + void** data_ptr) { + return functions->GetThreadLocalStorage(this, thread, data_ptr); + } + + jvmtiError GetTopThreadGroups(jint* group_count_ptr, + jthreadGroup** groups_ptr) { + return functions->GetTopThreadGroups(this, group_count_ptr, groups_ptr); + } + + jvmtiError GetThreadGroupInfo(jthreadGroup group, + jvmtiThreadGroupInfo* info_ptr) { + return functions->GetThreadGroupInfo(this, group, info_ptr); + } + + jvmtiError GetThreadGroupChildren(jthreadGroup group, + jint* thread_count_ptr, + jthread** threads_ptr, + jint* group_count_ptr, + jthreadGroup** groups_ptr) { + return functions->GetThreadGroupChildren(this, group, thread_count_ptr, threads_ptr, group_count_ptr, groups_ptr); + } + + jvmtiError GetStackTrace(jthread thread, + jint start_depth, + jint max_frame_count, + jvmtiFrameInfo* frame_buffer, + jint* count_ptr) { + return functions->GetStackTrace(this, thread, start_depth, max_frame_count, frame_buffer, count_ptr); + } + + jvmtiError GetAllStackTraces(jint max_frame_count, + jvmtiStackInfo** stack_info_ptr, + jint* thread_count_ptr) { + return functions->GetAllStackTraces(this, max_frame_count, stack_info_ptr, thread_count_ptr); + } + + jvmtiError GetThreadListStackTraces(jint thread_count, + const jthread* thread_list, + jint max_frame_count, + jvmtiStackInfo** stack_info_ptr) { + return functions->GetThreadListStackTraces(this, thread_count, thread_list, max_frame_count, stack_info_ptr); + } + + jvmtiError GetFrameCount(jthread thread, + jint* count_ptr) { + return functions->GetFrameCount(this, thread, count_ptr); + } + + jvmtiError PopFrame(jthread thread) { + return functions->PopFrame(this, thread); + } + + jvmtiError GetFrameLocation(jthread thread, + jint depth, + jmethodID* method_ptr, + jlocation* location_ptr) { + return functions->GetFrameLocation(this, thread, depth, method_ptr, location_ptr); + } + + jvmtiError NotifyFramePop(jthread thread, + jint depth) { + return functions->NotifyFramePop(this, thread, depth); + } + + jvmtiError ForceEarlyReturnObject(jthread thread, + jobject value) { + return functions->ForceEarlyReturnObject(this, thread, value); + } + + jvmtiError ForceEarlyReturnInt(jthread thread, + jint value) { + return functions->ForceEarlyReturnInt(this, thread, value); + } + + jvmtiError ForceEarlyReturnLong(jthread thread, + jlong value) { + return functions->ForceEarlyReturnLong(this, thread, value); + } + + jvmtiError ForceEarlyReturnFloat(jthread thread, + jfloat value) { + return functions->ForceEarlyReturnFloat(this, thread, value); + } + + jvmtiError ForceEarlyReturnDouble(jthread thread, + jdouble value) { + return functions->ForceEarlyReturnDouble(this, thread, value); + } + + jvmtiError ForceEarlyReturnVoid(jthread thread) { + return functions->ForceEarlyReturnVoid(this, thread); + } + + jvmtiError FollowReferences(jint heap_filter, + jclass klass, + jobject initial_object, + const jvmtiHeapCallbacks* callbacks, + const void* user_data) { + return functions->FollowReferences(this, heap_filter, klass, initial_object, callbacks, user_data); + } + + jvmtiError IterateThroughHeap(jint heap_filter, + jclass klass, + const jvmtiHeapCallbacks* callbacks, + const void* user_data) { + return functions->IterateThroughHeap(this, heap_filter, klass, callbacks, user_data); + } + + jvmtiError GetTag(jobject object, + jlong* tag_ptr) { + return functions->GetTag(this, object, tag_ptr); + } + + jvmtiError SetTag(jobject object, + jlong tag) { + return functions->SetTag(this, object, tag); + } + + jvmtiError GetObjectsWithTags(jint tag_count, + const jlong* tags, + jint* count_ptr, + jobject** object_result_ptr, + jlong** tag_result_ptr) { + return functions->GetObjectsWithTags(this, tag_count, tags, count_ptr, object_result_ptr, tag_result_ptr); + } + + jvmtiError ForceGarbageCollection() { + return functions->ForceGarbageCollection(this); + } + + jvmtiError IterateOverObjectsReachableFromObject(jobject object, + jvmtiObjectReferenceCallback object_reference_callback, + const void* user_data) { + return functions->IterateOverObjectsReachableFromObject(this, object, object_reference_callback, user_data); + } + + jvmtiError IterateOverReachableObjects(jvmtiHeapRootCallback heap_root_callback, + jvmtiStackReferenceCallback stack_ref_callback, + jvmtiObjectReferenceCallback object_ref_callback, + const void* user_data) { + return functions->IterateOverReachableObjects(this, heap_root_callback, stack_ref_callback, object_ref_callback, user_data); + } + + jvmtiError IterateOverHeap(jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data) { + return functions->IterateOverHeap(this, object_filter, heap_object_callback, user_data); + } + + jvmtiError IterateOverInstancesOfClass(jclass klass, + jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data) { + return functions->IterateOverInstancesOfClass(this, klass, object_filter, heap_object_callback, user_data); + } + + jvmtiError GetLocalObject(jthread thread, + jint depth, + jint slot, + jobject* value_ptr) { + return functions->GetLocalObject(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalInstance(jthread thread, + jint depth, + jobject* value_ptr) { + return functions->GetLocalInstance(this, thread, depth, value_ptr); + } + + jvmtiError GetLocalInt(jthread thread, + jint depth, + jint slot, + jint* value_ptr) { + return functions->GetLocalInt(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalLong(jthread thread, + jint depth, + jint slot, + jlong* value_ptr) { + return functions->GetLocalLong(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalFloat(jthread thread, + jint depth, + jint slot, + jfloat* value_ptr) { + return functions->GetLocalFloat(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalDouble(jthread thread, + jint depth, + jint slot, + jdouble* value_ptr) { + return functions->GetLocalDouble(this, thread, depth, slot, value_ptr); + } + + jvmtiError SetLocalObject(jthread thread, + jint depth, + jint slot, + jobject value) { + return functions->SetLocalObject(this, thread, depth, slot, value); + } + + jvmtiError SetLocalInt(jthread thread, + jint depth, + jint slot, + jint value) { + return functions->SetLocalInt(this, thread, depth, slot, value); + } + + jvmtiError SetLocalLong(jthread thread, + jint depth, + jint slot, + jlong value) { + return functions->SetLocalLong(this, thread, depth, slot, value); + } + + jvmtiError SetLocalFloat(jthread thread, + jint depth, + jint slot, + jfloat value) { + return functions->SetLocalFloat(this, thread, depth, slot, value); + } + + jvmtiError SetLocalDouble(jthread thread, + jint depth, + jint slot, + jdouble value) { + return functions->SetLocalDouble(this, thread, depth, slot, value); + } + + jvmtiError SetBreakpoint(jmethodID method, + jlocation location) { + return functions->SetBreakpoint(this, method, location); + } + + jvmtiError ClearBreakpoint(jmethodID method, + jlocation location) { + return functions->ClearBreakpoint(this, method, location); + } + + jvmtiError SetFieldAccessWatch(jclass klass, + jfieldID field) { + return functions->SetFieldAccessWatch(this, klass, field); + } + + jvmtiError ClearFieldAccessWatch(jclass klass, + jfieldID field) { + return functions->ClearFieldAccessWatch(this, klass, field); + } + + jvmtiError SetFieldModificationWatch(jclass klass, + jfieldID field) { + return functions->SetFieldModificationWatch(this, klass, field); + } + + jvmtiError ClearFieldModificationWatch(jclass klass, + jfieldID field) { + return functions->ClearFieldModificationWatch(this, klass, field); + } + + jvmtiError GetAllModules(jint* module_count_ptr, + jobject** modules_ptr) { + return functions->GetAllModules(this, module_count_ptr, modules_ptr); + } + + jvmtiError GetNamedModule(jobject class_loader, + const char* package_name, + jobject* module_ptr) { + return functions->GetNamedModule(this, class_loader, package_name, module_ptr); + } + + jvmtiError AddModuleReads(jobject module, + jobject to_module) { + return functions->AddModuleReads(this, module, to_module); + } + + jvmtiError AddModuleExports(jobject module, + const char* pkg_name, + jobject to_module) { + return functions->AddModuleExports(this, module, pkg_name, to_module); + } + + jvmtiError AddModuleOpens(jobject module, + const char* pkg_name, + jobject to_module) { + return functions->AddModuleOpens(this, module, pkg_name, to_module); + } + + jvmtiError AddModuleUses(jobject module, + jclass service) { + return functions->AddModuleUses(this, module, service); + } + + jvmtiError AddModuleProvides(jobject module, + jclass service, + jclass impl_class) { + return functions->AddModuleProvides(this, module, service, impl_class); + } + + jvmtiError IsModifiableModule(jobject module, + jboolean* is_modifiable_module_ptr) { + return functions->IsModifiableModule(this, module, is_modifiable_module_ptr); + } + + jvmtiError GetLoadedClasses(jint* class_count_ptr, + jclass** classes_ptr) { + return functions->GetLoadedClasses(this, class_count_ptr, classes_ptr); + } + + jvmtiError GetClassLoaderClasses(jobject initiating_loader, + jint* class_count_ptr, + jclass** classes_ptr) { + return functions->GetClassLoaderClasses(this, initiating_loader, class_count_ptr, classes_ptr); + } + + jvmtiError GetClassSignature(jclass klass, + char** signature_ptr, + char** generic_ptr) { + return functions->GetClassSignature(this, klass, signature_ptr, generic_ptr); + } + + jvmtiError GetClassStatus(jclass klass, + jint* status_ptr) { + return functions->GetClassStatus(this, klass, status_ptr); + } + + jvmtiError GetSourceFileName(jclass klass, + char** source_name_ptr) { + return functions->GetSourceFileName(this, klass, source_name_ptr); + } + + jvmtiError GetClassModifiers(jclass klass, + jint* modifiers_ptr) { + return functions->GetClassModifiers(this, klass, modifiers_ptr); + } + + jvmtiError GetClassMethods(jclass klass, + jint* method_count_ptr, + jmethodID** methods_ptr) { + return functions->GetClassMethods(this, klass, method_count_ptr, methods_ptr); + } + + jvmtiError GetClassFields(jclass klass, + jint* field_count_ptr, + jfieldID** fields_ptr) { + return functions->GetClassFields(this, klass, field_count_ptr, fields_ptr); + } + + jvmtiError GetImplementedInterfaces(jclass klass, + jint* interface_count_ptr, + jclass** interfaces_ptr) { + return functions->GetImplementedInterfaces(this, klass, interface_count_ptr, interfaces_ptr); + } + + jvmtiError GetClassVersionNumbers(jclass klass, + jint* minor_version_ptr, + jint* major_version_ptr) { + return functions->GetClassVersionNumbers(this, klass, minor_version_ptr, major_version_ptr); + } + + jvmtiError GetConstantPool(jclass klass, + jint* constant_pool_count_ptr, + jint* constant_pool_byte_count_ptr, + unsigned char** constant_pool_bytes_ptr) { + return functions->GetConstantPool(this, klass, constant_pool_count_ptr, constant_pool_byte_count_ptr, constant_pool_bytes_ptr); + } + + jvmtiError IsInterface(jclass klass, + jboolean* is_interface_ptr) { + return functions->IsInterface(this, klass, is_interface_ptr); + } + + jvmtiError IsArrayClass(jclass klass, + jboolean* is_array_class_ptr) { + return functions->IsArrayClass(this, klass, is_array_class_ptr); + } + + jvmtiError IsModifiableClass(jclass klass, + jboolean* is_modifiable_class_ptr) { + return functions->IsModifiableClass(this, klass, is_modifiable_class_ptr); + } + + jvmtiError GetClassLoader(jclass klass, + jobject* classloader_ptr) { + return functions->GetClassLoader(this, klass, classloader_ptr); + } + + jvmtiError GetSourceDebugExtension(jclass klass, + char** source_debug_extension_ptr) { + return functions->GetSourceDebugExtension(this, klass, source_debug_extension_ptr); + } + + jvmtiError RetransformClasses(jint class_count, + const jclass* classes) { + return functions->RetransformClasses(this, class_count, classes); + } + + jvmtiError RedefineClasses(jint class_count, + const jvmtiClassDefinition* class_definitions) { + return functions->RedefineClasses(this, class_count, class_definitions); + } + + jvmtiError GetObjectSize(jobject object, + jlong* size_ptr) { + return functions->GetObjectSize(this, object, size_ptr); + } + + jvmtiError GetObjectHashCode(jobject object, + jint* hash_code_ptr) { + return functions->GetObjectHashCode(this, object, hash_code_ptr); + } + + jvmtiError GetObjectMonitorUsage(jobject object, + jvmtiMonitorUsage* info_ptr) { + return functions->GetObjectMonitorUsage(this, object, info_ptr); + } + + jvmtiError GetFieldName(jclass klass, + jfieldID field, + char** name_ptr, + char** signature_ptr, + char** generic_ptr) { + return functions->GetFieldName(this, klass, field, name_ptr, signature_ptr, generic_ptr); + } + + jvmtiError GetFieldDeclaringClass(jclass klass, + jfieldID field, + jclass* declaring_class_ptr) { + return functions->GetFieldDeclaringClass(this, klass, field, declaring_class_ptr); + } + + jvmtiError GetFieldModifiers(jclass klass, + jfieldID field, + jint* modifiers_ptr) { + return functions->GetFieldModifiers(this, klass, field, modifiers_ptr); + } + + jvmtiError IsFieldSynthetic(jclass klass, + jfieldID field, + jboolean* is_synthetic_ptr) { + return functions->IsFieldSynthetic(this, klass, field, is_synthetic_ptr); + } + + jvmtiError GetMethodName(jmethodID method, + char** name_ptr, + char** signature_ptr, + char** generic_ptr) { + return functions->GetMethodName(this, method, name_ptr, signature_ptr, generic_ptr); + } + + jvmtiError GetMethodDeclaringClass(jmethodID method, + jclass* declaring_class_ptr) { + return functions->GetMethodDeclaringClass(this, method, declaring_class_ptr); + } + + jvmtiError GetMethodModifiers(jmethodID method, + jint* modifiers_ptr) { + return functions->GetMethodModifiers(this, method, modifiers_ptr); + } + + jvmtiError GetMaxLocals(jmethodID method, + jint* max_ptr) { + return functions->GetMaxLocals(this, method, max_ptr); + } + + jvmtiError GetArgumentsSize(jmethodID method, + jint* size_ptr) { + return functions->GetArgumentsSize(this, method, size_ptr); + } + + jvmtiError GetLineNumberTable(jmethodID method, + jint* entry_count_ptr, + jvmtiLineNumberEntry** table_ptr) { + return functions->GetLineNumberTable(this, method, entry_count_ptr, table_ptr); + } + + jvmtiError GetMethodLocation(jmethodID method, + jlocation* start_location_ptr, + jlocation* end_location_ptr) { + return functions->GetMethodLocation(this, method, start_location_ptr, end_location_ptr); + } + + jvmtiError GetLocalVariableTable(jmethodID method, + jint* entry_count_ptr, + jvmtiLocalVariableEntry** table_ptr) { + return functions->GetLocalVariableTable(this, method, entry_count_ptr, table_ptr); + } + + jvmtiError GetBytecodes(jmethodID method, + jint* bytecode_count_ptr, + unsigned char** bytecodes_ptr) { + return functions->GetBytecodes(this, method, bytecode_count_ptr, bytecodes_ptr); + } + + jvmtiError IsMethodNative(jmethodID method, + jboolean* is_native_ptr) { + return functions->IsMethodNative(this, method, is_native_ptr); + } + + jvmtiError IsMethodSynthetic(jmethodID method, + jboolean* is_synthetic_ptr) { + return functions->IsMethodSynthetic(this, method, is_synthetic_ptr); + } + + jvmtiError IsMethodObsolete(jmethodID method, + jboolean* is_obsolete_ptr) { + return functions->IsMethodObsolete(this, method, is_obsolete_ptr); + } + + jvmtiError SetNativeMethodPrefix(const char* prefix) { + return functions->SetNativeMethodPrefix(this, prefix); + } + + jvmtiError SetNativeMethodPrefixes(jint prefix_count, + char** prefixes) { + return functions->SetNativeMethodPrefixes(this, prefix_count, prefixes); + } + + jvmtiError CreateRawMonitor(const char* name, + jrawMonitorID* monitor_ptr) { + return functions->CreateRawMonitor(this, name, monitor_ptr); + } + + jvmtiError DestroyRawMonitor(jrawMonitorID monitor) { + return functions->DestroyRawMonitor(this, monitor); + } + + jvmtiError RawMonitorEnter(jrawMonitorID monitor) { + return functions->RawMonitorEnter(this, monitor); + } + + jvmtiError RawMonitorExit(jrawMonitorID monitor) { + return functions->RawMonitorExit(this, monitor); + } + + jvmtiError RawMonitorWait(jrawMonitorID monitor, + jlong millis) { + return functions->RawMonitorWait(this, monitor, millis); + } + + jvmtiError RawMonitorNotify(jrawMonitorID monitor) { + return functions->RawMonitorNotify(this, monitor); + } + + jvmtiError RawMonitorNotifyAll(jrawMonitorID monitor) { + return functions->RawMonitorNotifyAll(this, monitor); + } + + jvmtiError SetJNIFunctionTable(const jniNativeInterface* function_table) { + return functions->SetJNIFunctionTable(this, function_table); + } + + jvmtiError GetJNIFunctionTable(jniNativeInterface** function_table) { + return functions->GetJNIFunctionTable(this, function_table); + } + + jvmtiError SetEventCallbacks(const jvmtiEventCallbacks* callbacks, + jint size_of_callbacks) { + return functions->SetEventCallbacks(this, callbacks, size_of_callbacks); + } + + jvmtiError SetEventNotificationMode(jvmtiEventMode mode, + jvmtiEvent event_type, + jthread event_thread, + ...) { + return functions->SetEventNotificationMode(this, mode, event_type, event_thread); + } + + jvmtiError GenerateEvents(jvmtiEvent event_type) { + return functions->GenerateEvents(this, event_type); + } + + jvmtiError GetExtensionFunctions(jint* extension_count_ptr, + jvmtiExtensionFunctionInfo** extensions) { + return functions->GetExtensionFunctions(this, extension_count_ptr, extensions); + } + + jvmtiError GetExtensionEvents(jint* extension_count_ptr, + jvmtiExtensionEventInfo** extensions) { + return functions->GetExtensionEvents(this, extension_count_ptr, extensions); + } + + jvmtiError SetExtensionEventCallback(jint extension_event_index, + jvmtiExtensionEvent callback) { + return functions->SetExtensionEventCallback(this, extension_event_index, callback); + } + + jvmtiError GetPotentialCapabilities(jvmtiCapabilities* capabilities_ptr) { + return functions->GetPotentialCapabilities(this, capabilities_ptr); + } + + jvmtiError AddCapabilities(const jvmtiCapabilities* capabilities_ptr) { + return functions->AddCapabilities(this, capabilities_ptr); + } + + jvmtiError RelinquishCapabilities(const jvmtiCapabilities* capabilities_ptr) { + return functions->RelinquishCapabilities(this, capabilities_ptr); + } + + jvmtiError GetCapabilities(jvmtiCapabilities* capabilities_ptr) { + return functions->GetCapabilities(this, capabilities_ptr); + } + + jvmtiError GetCurrentThreadCpuTimerInfo(jvmtiTimerInfo* info_ptr) { + return functions->GetCurrentThreadCpuTimerInfo(this, info_ptr); + } + + jvmtiError GetCurrentThreadCpuTime(jlong* nanos_ptr) { + return functions->GetCurrentThreadCpuTime(this, nanos_ptr); + } + + jvmtiError GetThreadCpuTimerInfo(jvmtiTimerInfo* info_ptr) { + return functions->GetThreadCpuTimerInfo(this, info_ptr); + } + + jvmtiError GetThreadCpuTime(jthread thread, + jlong* nanos_ptr) { + return functions->GetThreadCpuTime(this, thread, nanos_ptr); + } + + jvmtiError GetTimerInfo(jvmtiTimerInfo* info_ptr) { + return functions->GetTimerInfo(this, info_ptr); + } + + jvmtiError GetTime(jlong* nanos_ptr) { + return functions->GetTime(this, nanos_ptr); + } + + jvmtiError GetAvailableProcessors(jint* processor_count_ptr) { + return functions->GetAvailableProcessors(this, processor_count_ptr); + } + + jvmtiError AddToBootstrapClassLoaderSearch(const char* segment) { + return functions->AddToBootstrapClassLoaderSearch(this, segment); + } + + jvmtiError AddToSystemClassLoaderSearch(const char* segment) { + return functions->AddToSystemClassLoaderSearch(this, segment); + } + + jvmtiError GetSystemProperties(jint* count_ptr, + char*** property_ptr) { + return functions->GetSystemProperties(this, count_ptr, property_ptr); + } + + jvmtiError GetSystemProperty(const char* property, + char** value_ptr) { + return functions->GetSystemProperty(this, property, value_ptr); + } + + jvmtiError SetSystemProperty(const char* property, + const char* value_ptr) { + return functions->SetSystemProperty(this, property, value_ptr); + } + + jvmtiError GetPhase(jvmtiPhase* phase_ptr) { + return functions->GetPhase(this, phase_ptr); + } + + jvmtiError DisposeEnvironment() { + return functions->DisposeEnvironment(this); + } + + jvmtiError SetEnvironmentLocalStorage(const void* data) { + return functions->SetEnvironmentLocalStorage(this, data); + } + + jvmtiError GetEnvironmentLocalStorage(void** data_ptr) { + return functions->GetEnvironmentLocalStorage(this, data_ptr); + } + + jvmtiError GetVersionNumber(jint* version_ptr) { + return functions->GetVersionNumber(this, version_ptr); + } + + jvmtiError GetErrorName(jvmtiError error, + char** name_ptr) { + return functions->GetErrorName(this, error, name_ptr); + } + + jvmtiError SetVerboseFlag(jvmtiVerboseFlag flag, + jboolean value) { + return functions->SetVerboseFlag(this, flag, value); + } + + jvmtiError GetJLocationFormat(jvmtiJlocationFormat* format_ptr) { + return functions->GetJLocationFormat(this, format_ptr); + } + + jvmtiError SetHeapSamplingInterval(jint sampling_interval) { + return functions->SetHeapSamplingInterval(this, sampling_interval); + } + +#endif /* __cplusplus */ +}; + + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* !_JAVA_JVMTI_H_ */ diff --git a/java/include/jvmticmlr.h b/java/include/jvmticmlr.h new file mode 100644 index 0000000000000000000000000000000000000000..c2106d3a7dc27fc1e5de32c7d68edc8a4e0e9dbf --- /dev/null +++ b/java/include/jvmticmlr.h @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * This header file defines the data structures sent by the VM + * through the JVMTI CompiledMethodLoad callback function via the + * "void * compile_info" parameter. The memory pointed to by the + * compile_info parameter may not be referenced after returning from + * the CompiledMethodLoad callback. These are VM implementation + * specific data structures that may evolve in future releases. A + * JVMTI agent should interpret a non-NULL compile_info as a pointer + * to a region of memory containing a list of records. In a typical + * usage scenario, a JVMTI agent would cast each record to a + * jvmtiCompiledMethodLoadRecordHeader, a struct that represents + * arbitrary information. This struct contains a kind field to indicate + * the kind of information being passed, and a pointer to the next + * record. If the kind field indicates inlining information, then the + * agent would cast the record to a jvmtiCompiledMethodLoadInlineRecord. + * This record contains an array of PCStackInfo structs, which indicate + * for every pc address what are the methods on the invocation stack. + * The "methods" and "bcis" fields in each PCStackInfo struct specify a + * 1-1 mapping between these inlined methods and their bytecode indices. + * This can be used to derive the proper source lines of the inlined + * methods. + */ + +#ifndef _JVMTI_CMLR_H_ +#define _JVMTI_CMLR_H_ + +enum { + JVMTI_CMLR_MAJOR_VERSION_1 = 0x00000001, + JVMTI_CMLR_MINOR_VERSION_0 = 0x00000000, + + JVMTI_CMLR_MAJOR_VERSION = 0x00000001, + JVMTI_CMLR_MINOR_VERSION = 0x00000000 + + /* + * This comment is for the "JDK import from HotSpot" sanity check: + * version: 1.0.0 + */ +}; + +typedef enum { + JVMTI_CMLR_DUMMY = 1, + JVMTI_CMLR_INLINE_INFO = 2 +} jvmtiCMLRKind; + +/* + * Record that represents arbitrary information passed through JVMTI + * CompiledMethodLoadEvent void pointer. + */ +typedef struct _jvmtiCompiledMethodLoadRecordHeader { + jvmtiCMLRKind kind; /* id for the kind of info passed in the record */ + jint majorinfoversion; /* major and minor info version values. Init'ed */ + jint minorinfoversion; /* to current version value in jvmtiExport.cpp. */ + + struct _jvmtiCompiledMethodLoadRecordHeader* next; +} jvmtiCompiledMethodLoadRecordHeader; + +/* + * Record that gives information about the methods on the compile-time + * stack at a specific pc address of a compiled method. Each element in + * the methods array maps to same element in the bcis array. + */ +typedef struct _PCStackInfo { + void* pc; /* the pc address for this compiled method */ + jint numstackframes; /* number of methods on the stack */ + jmethodID* methods; /* array of numstackframes method ids */ + jint* bcis; /* array of numstackframes bytecode indices */ +} PCStackInfo; + +/* + * Record that contains inlining information for each pc address of + * an nmethod. + */ +typedef struct _jvmtiCompiledMethodLoadInlineRecord { + jvmtiCompiledMethodLoadRecordHeader header; /* common header for casting */ + jint numpcs; /* number of pc descriptors in this nmethod */ + PCStackInfo* pcinfo; /* array of numpcs pc descriptors */ +} jvmtiCompiledMethodLoadInlineRecord; + +/* + * Dummy record used to test that we can pass records with different + * information through the void pointer provided that they can be cast + * to a jvmtiCompiledMethodLoadRecordHeader. + */ + +typedef struct _jvmtiCompiledMethodLoadDummyRecord { + jvmtiCompiledMethodLoadRecordHeader header; /* common header for casting */ + char message[50]; +} jvmtiCompiledMethodLoadDummyRecord; + +#endif diff --git a/java/jmods/java.datatransfer.jmod b/java/jmods/java.datatransfer.jmod new file mode 100644 index 0000000000000000000000000000000000000000..fff408b858902dd34638ebaddf76816b23ff5fac Binary files /dev/null and b/java/jmods/java.datatransfer.jmod differ diff --git a/java/jmods/java.instrument.jmod b/java/jmods/java.instrument.jmod new file mode 100644 index 0000000000000000000000000000000000000000..2b253c40765d7e0f5340fae09d55eedfef871d07 Binary files /dev/null and b/java/jmods/java.instrument.jmod differ diff --git a/java/jmods/java.management.rmi.jmod b/java/jmods/java.management.rmi.jmod new file mode 100644 index 0000000000000000000000000000000000000000..30a37b9c81a42613de198f5ef0fc0ac335401441 Binary files /dev/null and b/java/jmods/java.management.rmi.jmod differ diff --git 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b/java/legal/java.base/ADDITIONAL_LICENSE_INFO @@ -0,0 +1,37 @@ + ADDITIONAL INFORMATION ABOUT LICENSING + +Certain files distributed by Oracle America, Inc. and/or its affiliates are +subject to the following clarification and special exception to the GPLv2, +based on the GNU Project exception for its Classpath libraries, known as the +GNU Classpath Exception. + +Note that Oracle includes multiple, independent programs in this software +package. Some of those programs are provided under licenses deemed +incompatible with the GPLv2 by the Free Software Foundation and others. +For example, the package includes programs licensed under the Apache +License, Version 2.0 and may include FreeType. Such programs are licensed +to you under their original licenses. + +Oracle facilitates your further distribution of this package by adding the +Classpath Exception to the necessary parts of its GPLv2 code, which permits +you to use that code in combination with other independent modules not +licensed under the GPLv2. However, note that this would not permit you to +commingle code under an incompatible license with Oracle's GPLv2 licensed +code by, for example, cutting and pasting such code into a file also +containing Oracle's GPLv2 licensed code and then distributing the result. + +Additionally, if you were to remove the Classpath Exception from any of the +files to which it applies and distribute the result, you would likely be +required to license some or all of the other code in that distribution under +the GPLv2 as well, and since the GPLv2 is incompatible with the license terms +of some items included in the distribution by Oracle, removing the Classpath +Exception could therefore effectively compromise your ability to further +distribute the package. + +Failing to distribute notices associated with some files may also create +unexpected legal consequences. + +Proceed with caution and we recommend that you obtain the advice of a lawyer +skilled in open source matters before removing the Classpath Exception or +making modifications to this package which may subsequently be redistributed +and/or involve the use of third party software. diff --git a/java/legal/java.base/ASSEMBLY_EXCEPTION b/java/legal/java.base/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..429666664e9ff5029d51dc7f807e1ec9eff2dd9f --- /dev/null +++ b/java/legal/java.base/ASSEMBLY_EXCEPTION @@ -0,0 +1,27 @@ + +OPENJDK ASSEMBLY EXCEPTION + +The OpenJDK source code made available by Oracle America, Inc. (Oracle) at +openjdk.org ("OpenJDK Code") is distributed under the terms of the GNU +General Public License version 2 +only ("GPL2"), with the following clarification and special exception. + + Linking this OpenJDK Code statically or dynamically with other code + is making a combined work based on this library. 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You may modify your copy or copies of the Program or any portion of it, thus +forming a work based on the Program, and copy and distribute such modifications +or work under the terms of Section 1 above, provided that you also meet all of +these conditions: + + a) You must cause the modified files to carry prominent notices stating + that you changed the files and the date of any change. + + b) You must cause any work that you distribute or publish, that in whole or + in part contains or is derived from the Program or any part thereof, to be + licensed as a whole at no charge to all third parties under the terms of + this License. + + c) If the modified program normally reads commands interactively when run, + you must cause it, when started running for such interactive use in the + most ordinary way, to print or display an announcement including an + appropriate copyright notice and a notice that there is no warranty (or + else, saying that you provide a warranty) and that users may redistribute + the program under these conditions, and telling the user how to view a copy + of this License. (Exception: if the Program itself is interactive but does + not normally print such an announcement, your work based on the Program is + not required to print an announcement.) + +These requirements apply to the modified work as a whole. If identifiable +sections of that work are not derived from the Program, and can be reasonably +considered independent and separate works in themselves, then this License, and +its terms, do not apply to those sections when you distribute them as separate +works. But when you distribute the same sections as part of a whole which is a +work based on the Program, the distribution of the whole must be on the terms +of this License, whose permissions for other licensees extend to the entire +whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest your +rights to work written entirely by you; rather, the intent is to exercise the +right to control the distribution of derivative or collective works based on +the Program. + +In addition, mere aggregation of another work not based on the Program with the +Program (or with a work based on the Program) on a volume of a storage or +distribution medium does not bring the other work under the scope of this +License. + +3. You may copy and distribute the Program (or a work based on it, under +Section 2) in object code or executable form under the terms of Sections 1 and +2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable source + code, which must be distributed under the terms of Sections 1 and 2 above + on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three years, to + give any third party, for a charge no more than your cost of physically + performing source distribution, a complete machine-readable copy of the + corresponding source code, to be distributed under the terms of Sections 1 + and 2 above on a medium customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer to + distribute corresponding source code. (This alternative is allowed only + for noncommercial distribution and only if you received the program in + object code or executable form with such an offer, in accord with + Subsection b above.) + +The source code for a work means the preferred form of the work for making +modifications to it. For an executable work, complete source code means all +the source code for all modules it contains, plus any associated interface +definition files, plus the scripts used to control compilation and installation +of the executable. However, as a special exception, the source code +distributed need not include anything that is normally distributed (in either +source or binary form) with the major components (compiler, kernel, and so on) +of the operating system on which the executable runs, unless that component +itself accompanies the executable. + +If distribution of executable or object code is made by offering access to copy +from a designated place, then offering equivalent access to copy the source +code from the same place counts as distribution of the source code, even though +third parties are not compelled to copy the source along with the object code. + +4. You may not copy, modify, sublicense, or distribute the Program except as +expressly provided under this License. Any attempt otherwise to copy, modify, +sublicense or distribute the Program is void, and will automatically terminate +your rights under this License. However, parties who have received copies, or +rights, from you under this License will not have their licenses terminated so +long as such parties remain in full compliance. + +5. You are not required to accept this License, since you have not signed it. +However, nothing else grants you permission to modify or distribute the Program +or its derivative works. These actions are prohibited by law if you do not +accept this License. Therefore, by modifying or distributing the Program (or +any work based on the Program), you indicate your acceptance of this License to +do so, and all its terms and conditions for copying, distributing or modifying +the Program or works based on it. + +6. Each time you redistribute the Program (or any work based on the Program), +the recipient automatically receives a license from the original licensor to +copy, distribute or modify the Program subject to these terms and conditions. +You may not impose any further restrictions on the recipients' exercise of the +rights granted herein. You are not responsible for enforcing compliance by +third parties to this License. + +7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), conditions +are imposed on you (whether by court order, agreement or otherwise) that +contradict the conditions of this License, they do not excuse you from the +conditions of this License. If you cannot distribute so as to satisfy +simultaneously your obligations under this License and any other pertinent +obligations, then as a consequence you may not distribute the Program at all. +For example, if a patent license would not permit royalty-free redistribution +of the Program by all those who receive copies directly or indirectly through +you, then the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under any +particular circumstance, the balance of the section is intended to apply and +the section as a whole is intended to apply in other circumstances. + +It is not the purpose of this section to induce you to infringe any patents or +other property right claims or to contest validity of any such claims; this +section has the sole purpose of protecting the integrity of the free software +distribution system, which is implemented by public license practices. Many +people have made generous contributions to the wide range of software +distributed through that system in reliance on consistent application of that +system; it is up to the author/donor to decide if he or she is willing to +distribute software through any other system and a licensee cannot impose that +choice. + +This section is intended to make thoroughly clear what is believed to be a +consequence of the rest of this License. + +8. If the distribution and/or use of the Program is restricted in certain +countries either by patents or by copyrighted interfaces, the original +copyright holder who places the Program under this License may add an explicit +geographical distribution limitation excluding those countries, so that +distribution is permitted only in or among countries not thus excluded. In +such case, this License incorporates the limitation as if written in the body +of this License. + +9. The Free Software Foundation may publish revised and/or new versions of the +General Public License from time to time. Such new versions will be similar in +spirit to the present version, but may differ in detail to address new problems +or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any later +version", you have the option of following the terms and conditions either of +that version or of any later version published by the Free Software Foundation. +If the Program does not specify a version number of this License, you may +choose any version ever published by the Free Software Foundation. + +10. If you wish to incorporate parts of the Program into other free programs +whose distribution conditions are different, write to the author to ask for +permission. For software which is copyrighted by the Free Software Foundation, +write to the Free Software Foundation; we sometimes make exceptions for this. +Our decision will be guided by the two goals of preserving the free status of +all derivatives of our free software and of promoting the sharing and reuse of +software generally. + +NO WARRANTY + +11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR +THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE +STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE +PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, +INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND +PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, +YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. + +12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL +ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE +PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY +GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR +INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA +BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A +FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER +OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +END OF TERMS AND CONDITIONS + +How to Apply These Terms to Your New Programs + +If you develop a new program, and you want it to be of the greatest possible +use to the public, the best way to achieve this is to make it free software +which everyone can redistribute and change under these terms. + +To do so, attach the following notices to the program. It is safest to attach +them to the start of each source file to most effectively convey the exclusion +of warranty; and each file should have at least the "copyright" line and a +pointer to where the full notice is found. + + One line to give the program's name and a brief idea of what it does. + + Copyright (C) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this when it +starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author Gnomovision comes + with ABSOLUTELY NO WARRANTY; for details type 'show w'. This is free + software, and you are welcome to redistribute it under certain conditions; + type 'show c' for details. + +The hypothetical commands 'show w' and 'show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may be +called something other than 'show w' and 'show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your school, +if any, to sign a "copyright disclaimer" for the program, if necessary. Here +is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + 'Gnomovision' (which makes passes at compilers) written by James Hacker. + + signature of Ty Coon, 1 April 1989 + + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General Public +License instead of this License. + + +"CLASSPATH" EXCEPTION TO THE GPL + +Certain source files distributed by Oracle America and/or its affiliates are +subject to the following clarification and special exception to the GPL, but +only where Oracle has expressly included in the particular source file's header +the words "Oracle designates this particular file as subject to the "Classpath" +exception as provided by Oracle in the LICENSE file that accompanied this code." + + Linking this library statically or dynamically with other modules is making + a combined work based on this library. Thus, the terms and conditions of + the GNU General Public License cover the whole combination. + + As a special exception, the copyright holders of this library give you + permission to link this library with independent modules to produce an + executable, regardless of the license terms of these independent modules, + and to copy and distribute the resulting executable under terms of your + choice, provided that you also meet, for each linked independent module, + the terms and conditions of the license of that module. An independent + module is a module which is not derived from or based on this library. If + you modify this library, you may extend this exception to your version of + the library, but you are not obligated to do so. If you do not wish to do + so, delete this exception statement from your version. diff --git a/java/legal/java.base/aes.md b/java/legal/java.base/aes.md new file mode 100644 index 0000000000000000000000000000000000000000..6d0ee2e2bb4a501ec2f8174f6b13b8883f54175c --- /dev/null +++ b/java/legal/java.base/aes.md @@ -0,0 +1,36 @@ +## Cryptix AES v3.2.0 + +### Cryptix General License +
+
+Cryptix General License
+
+Copyright (c) 1995-2005 The Cryptix Foundation Limited.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+  1. Redistributions of source code must retain the copyright notice,
+     this list of conditions and the following disclaimer.
+
+  2. Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE CRYPTIX FOUNDATION LIMITED AND
+CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE CRYPTIX FOUNDATION LIMITED OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java/legal/java.base/asm.md b/java/legal/java.base/asm.md new file mode 100644 index 0000000000000000000000000000000000000000..40edc652e7ccae6d68d44e7a8435ae0b268a70cb --- /dev/null +++ b/java/legal/java.base/asm.md @@ -0,0 +1,36 @@ +## ASM Bytecode Manipulation Framework v9.6 + +### ASM License +
+
+Copyright (c) 2000-2011 France Télécom
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+
+3. Neither the name of the copyright holders nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java/legal/java.base/c-libutl.md b/java/legal/java.base/c-libutl.md new file mode 100644 index 0000000000000000000000000000000000000000..8bc98806825f58b159b6d8b369fff17ebb420f0a --- /dev/null +++ b/java/legal/java.base/c-libutl.md @@ -0,0 +1,35 @@ +## c-libutl 20160225 + +### c-libutl License +``` + +This software is distributed under the terms of the BSD license. + +== BSD LICENSE =============================================================== + + (C) 2009 by Remo Dentato (rdentato@gmail.com) + + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +http://opensource.org/licenses/bsd-license.php + +``` diff --git a/java/legal/java.base/cldr.md b/java/legal/java.base/cldr.md new file mode 100644 index 0000000000000000000000000000000000000000..97331fcba9f3b30648b731e7a37aae85ed75e591 --- /dev/null +++ b/java/legal/java.base/cldr.md @@ -0,0 +1,100 @@ +## Unicode Common Local Data Repository (CLDR) v45 + +### CLDR License + +``` + + +UNICODE LICENSE V3 + +COPYRIGHT AND PERMISSION NOTICE + +Copyright © 1991-2024 Unicode, Inc. + +NOTICE TO USER: Carefully read the following legal agreement. BY +DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING DATA FILES, AND/OR +SOFTWARE, YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, ALL OF THE +TERMS AND CONDITIONS OF THIS AGREEMENT. IF YOU DO NOT AGREE, DO NOT +DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA FILES OR SOFTWARE. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of data files and any associated documentation (the "Data Files") or +software and any associated documentation (the "Software") to deal in the +Data Files or Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, and/or sell +copies of the Data Files or Software, and to permit persons to whom the +Data Files or Software are furnished to do so, provided that either (a) +this copyright and permission notice appear with all copies of the Data +Files or Software, or (b) this copyright and permission notice appear in +associated Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY +KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF +THIRD PARTY RIGHTS. + +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS NOTICE +BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, +OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, +WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE DATA +FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder shall +not be used in advertising or otherwise to promote the sale, use or other +dealings in these Data Files or Software without prior written +authorization of the copyright holder. + +SPDX-License-Identifier: Unicode-3.0 + +———————————— + +Unicode® Copyright and Terms of Use +For the general privacy policy governing access to this site, see the Unicode Privacy Policy. + +Unicode Copyright +Copyright © 1991-2024 Unicode, Inc. All rights reserved. +Definitions +Unicode Data Files ("DATA FILES") include all data files under the directories: +https://www.unicode.org/Public/ +https://www.unicode.org/reports/ +https://www.unicode.org/ivd/data/ + +Unicode Data Files do not include PDF online code charts under the directory: +https://www.unicode.org/Public/ + +Unicode Software ("SOFTWARE") includes any source code published in the Unicode Standard +or any source code or compiled code under the directories: +https://www.unicode.org/Public/PROGRAMS/ +https://www.unicode.org/Public/cldr/ +http://site.icu-project.org/download/ +Terms of Use +Certain documents and files on this website contain a legend indicating that "Modification is permitted." Any person is hereby authorized, without fee, to modify such documents and files to create derivative works conforming to the Unicode® Standard, subject to Terms and Conditions herein. +Any person is hereby authorized, without fee, to view, use, reproduce, and distribute all documents and files, subject to the Terms and Conditions herein. +Further specifications of rights and restrictions pertaining to the use of the Unicode DATA FILES and SOFTWARE can be found in the Unicode Data Files and Software License. +Each version of the Unicode Standard has further specifications of rights and restrictions of use. For the book editions (Unicode 5.0 and earlier), these are found on the back of the title page. +The Unicode PDF online code charts carry specific restrictions. Those restrictions are incorporated as the first page of each PDF code chart. +All other files, including online documentation of the core specification for Unicode 6.0 and later, are covered under these general Terms of Use. +No license is granted to "mirror" the Unicode website where a fee is charged for access to the "mirror" site. +Modification is not permitted with respect to this document. All copies of this document must be verbatim. +Restricted Rights Legend +Any technical data or software which is licensed to the United States of America, its agencies and/or instrumentalities under this Agreement is commercial technical data or commercial computer software developed exclusively at private expense as defined in FAR 2.101, or DFARS 252.227-7014 (June 1995), as applicable. For technical data, use, duplication, or disclosure by the Government is subject to restrictions as set forth in DFARS 202.227-7015 Technical Data, Commercial and Items (Nov 1995) and this Agreement. For Software, in accordance with FAR 12-212 or DFARS 227-7202, as applicable, use, duplication or disclosure by the Government is subject to the restrictions set forth in this Agreement. +Warranties and Disclaimers +This publication and/or website may include technical or typographical errors or other inaccuracies. Changes are periodically added to the information herein; these changes will be incorporated in new editions of the publication and/or website. Unicode, Inc. may make improvements and/or changes in the product(s) and/or program(s) described in this publication and/or website at any time. +If this file has been purchased on magnetic or optical media from Unicode, Inc. the sole and exclusive remedy for any claim will be exchange of the defective media within ninety (90) days of original purchase. +EXCEPT AS PROVIDED IN SECTION E.2, THIS PUBLICATION AND/OR SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EITHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. UNICODE, INC. AND ITS LICENSORS ASSUME NO RESPONSIBILITY FOR ERRORS OR OMISSIONS IN THIS PUBLICATION AND/OR SOFTWARE OR OTHER DOCUMENTS WHICH ARE REFERENCED BY OR LINKED TO THIS PUBLICATION OR THE UNICODE WEBSITE. +Waiver of Damages +In no event shall Unicode, Inc. or its licensors be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, whether or not Unicode, Inc. was advised of the possibility of the damage, including, without limitation, those resulting from the following: loss of use, data or profits, in connection with the use, modification or distribution of this information or its derivatives. +Trademarks & Logos +The Unicode Word Mark and the Unicode Logo are trademarks of Unicode, Inc. “The Unicode Consortium” and “Unicode, Inc.” are trade names of Unicode, Inc. Use of the information and materials found on this website indicates your acknowledgement of Unicode, Inc.’s exclusive worldwide rights in the Unicode Word Mark, the Unicode Logo, and the Unicode trade names. +The Unicode Consortium Name and Trademark Usage Policy (“Trademark Policy”) are incorporated herein by reference and you agree to abide by the provisions of the Trademark Policy, which may be changed from time to time in the sole discretion of Unicode, Inc. +All third party trademarks referenced herein are the property of their respective owners. +Miscellaneous +Jurisdiction and Venue. This website is operated from a location in the State of California, United States of America. Unicode, Inc. makes no representation that the materials are appropriate for use in other locations. If you access this website from other locations, you are responsible for compliance with local laws. This Agreement, all use of this website and any claims and damages resulting from use of this website are governed solely by the laws of the State of California without regard to any principles which would apply the laws of a different jurisdiction. The user agrees that any disputes regarding this website shall be resolved solely in the courts located in Santa Clara County, California. The user agrees said courts have personal jurisdiction and agree to waive any right to transfer the dispute to any other forum. +Modification by Unicode, Inc. Unicode, Inc. shall have the right to modify this Agreement at any time by posting it to this website. The user may not assign any part of this Agreement without Unicode, Inc.’s prior written consent. +Taxes. The user agrees to pay any taxes arising from access to this website or use of the information herein, except for those based on Unicode’s net income. +Severability. If any provision of this Agreement is declared invalid or unenforceable, the remaining provisions of this Agreement shall remain in effect. +Entire Agreement. This Agreement constitutes the entire agreement between the parties. + + +``` diff --git a/java/legal/java.base/icu.md b/java/legal/java.base/icu.md new file mode 100644 index 0000000000000000000000000000000000000000..588e88e35fbe6d902c727e61911896713b3a7daa --- /dev/null +++ b/java/legal/java.base/icu.md @@ -0,0 +1,172 @@ +## International Components for Unicode (ICU4J) v74.1 + +### ICU4J License +``` +UNICODE LICENSE V3 + +COPYRIGHT AND PERMISSION NOTICE + +Copyright © 2016-2023 Unicode, Inc. + +NOTICE TO USER: Carefully read the following legal agreement. BY +DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING DATA FILES, AND/OR +SOFTWARE, YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, ALL OF THE +TERMS AND CONDITIONS OF THIS AGREEMENT. IF YOU DO NOT AGREE, DO NOT +DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA FILES OR SOFTWARE. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of data files and any associated documentation (the "Data Files") or +software and any associated documentation (the "Software") to deal in the +Data Files or Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, and/or sell +copies of the Data Files or Software, and to permit persons to whom the +Data Files or Software are furnished to do so, provided that either (a) +this copyright and permission notice appear with all copies of the Data +Files or Software, or (b) this copyright and permission notice appear in +associated Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY +KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF +THIRD PARTY RIGHTS. + +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS NOTICE +BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, +OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, +WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE DATA +FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder shall +not be used in advertising or otherwise to promote the sale, use or other +dealings in these Data Files or Software without prior written +authorization of the copyright holder. + +---------------------------------------------------------------------- + +Third-Party Software Licenses + +This section contains third-party software notices and/or additional +terms for licensed third-party software components included within ICU +libraries. + +---------------------------------------------------------------------- + +ICU License - ICU 1.8.1 to ICU 57.1 + +COPYRIGHT AND PERMISSION NOTICE + +Copyright (c) 1995-2016 International Business Machines Corporation and others +All rights reserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, and/or sell copies of the Software, and to permit persons +to whom the Software is furnished to do so, provided that the above +copyright notice(s) and this permission notice appear in all copies of +the Software and that both the above copyright notice(s) and this +permission notice appear in supporting documentation. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT +OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR +HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY +SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER +RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN +CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +Except as contained in this notice, the name of a copyright holder +shall not be used in advertising or otherwise to promote the sale, use +or other dealings in this Software without prior written authorization +of the copyright holder. + +All trademarks and registered trademarks mentioned herein are the +property of their respective owners. + +---------------------------------------------------------------------- + + +Time Zone Database + + ICU uses the public domain data and code derived from Time Zone +Database for its time zone support. The ownership of the TZ database +is explained in BCP 175: Procedure for Maintaining the Time Zone +Database section 7. + + # 7. Database Ownership + # + # The TZ database itself is not an IETF Contribution or an IETF + # document. Rather it is a pre-existing and regularly updated work + # that is in the public domain, and is intended to remain in the + # public domain. Therefore, BCPs 78 [RFC5378] and 79 [RFC3979] do + # not apply to the TZ Database or contributions that individuals make + # to it. Should any claims be made and substantiated against the TZ + # Database, the organization that is providing the IANA + # Considerations defined in this RFC, under the memorandum of + # understanding with the IETF, currently ICANN, may act in accordance + # with all competent court orders. No ownership claims will be made + # by ICANN or the IETF Trust on the database or the code. Any person + # making a contribution to the database or code waives all rights to + # future claims in that contribution or in the TZ Database. + +---------------------------------------------------------------------- + +====================================================================== + + +From: https://www.unicode.org/copyright.html + +For the general privacy policy governing access to this site, see the Unicode Privacy Policy. + + Unicode Copyright + Copyright © 1991-2023 Unicode, Inc. All rights reserved. + Definitions + + Unicode Data Files ("DATA FILES") include all data files under the directories: + https://www.unicode.org/Public/ + https://www.unicode.org/reports/ + https://www.unicode.org/ivd/data/ + + Unicode Data Files do not include PDF online code charts under the directory: + https://www.unicode.org/Public/ + + Unicode Software ("SOFTWARE") includes any source code published in the Unicode Standard + or any source code or compiled code under the directories: + https://www.unicode.org/Public/PROGRAMS/ + https://www.unicode.org/Public/cldr/ + http://site.icu-project.org/download/ + + Terms of Use + Certain documents and files on this website contain a legend indicating that "Modification is permitted." Any person is hereby authorized, without fee, to modify such documents and files to create derivative works conforming to the Unicode® Standard, subject to Terms and Conditions herein. + Any person is hereby authorized, without fee, to view, use, reproduce, and distribute all documents and files, subject to the Terms and Conditions herein. + Further specifications of rights and restrictions pertaining to the use of the Unicode DATA FILES and SOFTWARE can be found in the Unicode Data Files and Software License. + Each version of the Unicode Standard has further specifications of rights and restrictions of use. For the book editions (Unicode 5.0 and earlier), these are found on the back of the title page. + The Unicode PDF online code charts carry specific restrictions. Those restrictions are incorporated as the first page of each PDF code chart. + All other files, including online documentation of the core specification for Unicode 6.0 and later, are covered under these general Terms of Use. + No license is granted to "mirror" the Unicode website where a fee is charged for access to the "mirror" site. + Modification is not permitted with respect to this document. All copies of this document must be verbatim. + Restricted Rights Legend + Any technical data or software which is licensed to the United States of America, its agencies and/or instrumentalities under this Agreement is commercial technical data or commercial computer software developed exclusively at private expense as defined in FAR 2.101, or DFARS 252.227-7014 (June 1995), as applicable. For technical data, use, duplication, or disclosure by the Government is subject to restrictions as set forth in DFARS 202.227-7015 Technical Data, Commercial and Items (Nov 1995) and this Agreement. For Software, in accordance with FAR 12-212 or DFARS 227-7202, as applicable, use, duplication or disclosure by the Government is subject to the restrictions set forth in this Agreement. + Warranties and Disclaimers + This publication and/or website may include technical or typographical errors or other inaccuracies. Changes are periodically added to the information herein; these changes will be incorporated in new editions of the publication and/or website. Unicode, Inc. may make improvements and/or changes in the product(s) and/or program(s) described in this publication and/or website at any time. + If this file has been purchased on magnetic or optical media from Unicode, Inc. the sole and exclusive remedy for any claim will be exchange of the defective media within ninety (90) days of original purchase. + EXCEPT AS PROVIDED IN SECTION E.2, THIS PUBLICATION AND/OR SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EITHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. UNICODE, INC. AND ITS LICENSORS ASSUME NO RESPONSIBILITY FOR ERRORS OR OMISSIONS IN THIS PUBLICATION AND/OR SOFTWARE OR OTHER DOCUMENTS WHICH ARE REFERENCED BY OR LINKED TO THIS PUBLICATION OR THE UNICODE WEBSITE. + Waiver of Damages + In no event shall Unicode, Inc. or its licensors be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, whether or not Unicode, Inc. was advised of the possibility of the damage, including, without limitation, those resulting from the following: loss of use, data or profits, in connection with the use, modification or distribution of this information or its derivatives. + Trademarks & Logos + The Unicode Word Mark and the Unicode Logo are trademarks of Unicode, Inc. “The Unicode Consortium” and “Unicode, Inc.” are trade names of Unicode, Inc. Use of the information and materials found on this website indicates your acknowledgement of Unicode, Inc.’s exclusive worldwide rights in the Unicode Word Mark, the Unicode Logo, and the Unicode trade names. + The Unicode Consortium Name and Trademark Usage Policy (“Trademark Policy”) are incorporated herein by reference and you agree to abide by the provisions of the Trademark Policy, which may be changed from time to time in the sole discretion of Unicode, Inc. + All third party trademarks referenced herein are the property of their respective owners. + Miscellaneous + Jurisdiction and Venue. This website is operated from a location in the State of California, United States of America. Unicode, Inc. makes no representation that the materials are appropriate for use in other locations. If you access this website from other locations, you are responsible for compliance with local laws. This Agreement, all use of this website and any claims and damages resulting from use of this website are governed solely by the laws of the State of California without regard to any principles which would apply the laws of a different jurisdiction. The user agrees that any disputes regarding this website shall be resolved solely in the courts located in Santa Clara County, California. The user agrees said courts have personal jurisdiction and agree to waive any right to transfer the dispute to any other forum. + Modification by Unicode, Inc. Unicode, Inc. shall have the right to modify this Agreement at any time by posting it to this website. The user may not assign any part of this Agreement without Unicode, Inc.’s prior written consent. + Taxes. The user agrees to pay any taxes arising from access to this website or use of the information herein, except for those based on Unicode’s net income. + Severability. If any provision of this Agreement is declared invalid or unenforceable, the remaining provisions of this Agreement shall remain in effect. + Entire Agreement. This Agreement constitutes the entire agreement between the parties. + +``` + diff --git a/java/legal/java.base/public_suffix.md b/java/legal/java.base/public_suffix.md new file mode 100644 index 0000000000000000000000000000000000000000..02481558af6542579f97323aa3cc960e08f75f6f --- /dev/null +++ b/java/legal/java.base/public_suffix.md @@ -0,0 +1,399 @@ +## Mozilla Public Suffix List + +### Public Suffix Notice +``` +You are receiving a copy of the Mozilla Public Suffix List in the following +file: /lib/security/public_suffix_list.dat. The terms of the +Oracle license do NOT apply to this file; it is licensed under the +Mozilla Public License 2.0, separately from the Oracle programs you receive. +If you do not wish to use the Public Suffix List, you may remove the +/lib/security/public_suffix_list.dat file. + +The Source Code of this file is available under the +Mozilla Public License, v. 2.0 and is located at +https://raw.githubusercontent.com/publicsuffix/list/1cbd6e71a9b83620b1d0b11e49d3d9ff48c27e22/public_suffix_list.dat. +If a copy of the MPL was not distributed with this file, you can obtain one +at https://mozilla.org/MPL/2.0/. + +Software distributed under the License is distributed on an "AS IS" basis, +WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License +for the specific language governing rights and limitations under the License. +``` + +### MPL v2.0 +``` +Mozilla Public License Version 2.0 +================================== + +1. Definitions +-------------- + +1.1. "Contributor" + means each individual or legal entity that creates, contributes to + the creation of, or owns Covered Software. + +1.2. "Contributor Version" + means the combination of the Contributions of others (if any) used + by a Contributor and that particular Contributor's Contribution. + +1.3. "Contribution" + means Covered Software of a particular Contributor. + +1.4. "Covered Software" + means Source Code Form to which the initial Contributor has attached + the notice in Exhibit A, the Executable Form of such Source Code + Form, and Modifications of such Source Code Form, in each case + including portions thereof. + +1.5. "Incompatible With Secondary Licenses" + means + + (a) that the initial Contributor has attached the notice described + in Exhibit B to the Covered Software; or + + (b) that the Covered Software was made available under the terms of + version 1.1 or earlier of the License, but not also under the + terms of a Secondary License. + +1.6. "Executable Form" + means any form of the work other than Source Code Form. + +1.7. "Larger Work" + means a work that combines Covered Software with other material, in + a separate file or files, that is not Covered Software. + +1.8. "License" + means this document. + +1.9. "Licensable" + means having the right to grant, to the maximum extent possible, + whether at the time of the initial grant or subsequently, any and + all of the rights conveyed by this License. + +1.10. "Modifications" + means any of the following: + + (a) any file in Source Code Form that results from an addition to, + deletion from, or modification of the contents of Covered + Software; or + + (b) any new file in Source Code Form that contains any Covered + Software. + +1.11. "Patent Claims" of a Contributor + means any patent claim(s), including without limitation, method, + process, and apparatus claims, in any patent Licensable by such + Contributor that would be infringed, but for the grant of the + License, by the making, using, selling, offering for sale, having + made, import, or transfer of either its Contributions or its + Contributor Version. + +1.12. "Secondary License" + means either the GNU General Public License, Version 2.0, the GNU + Lesser General Public License, Version 2.1, the GNU Affero General + Public License, Version 3.0, or any later versions of those + licenses. + +1.13. "Source Code Form" + means the form of the work preferred for making modifications. + +1.14. "You" (or "Your") + means an individual or a legal entity exercising rights under this + License. For legal entities, "You" includes any entity that + controls, is controlled by, or is under common control with You. For + purposes of this definition, "control" means (a) the power, direct + or indirect, to cause the direction or management of such entity, + whether by contract or otherwise, or (b) ownership of more than + fifty percent (50%) of the outstanding shares or beneficial + ownership of such entity. + +2. License Grants and Conditions +-------------------------------- + +2.1. Grants + +Each Contributor hereby grants You a world-wide, royalty-free, +non-exclusive license: + +(a) under intellectual property rights (other than patent or trademark) + Licensable by such Contributor to use, reproduce, make available, + modify, display, perform, distribute, and otherwise exploit its + Contributions, either on an unmodified basis, with Modifications, or + as part of a Larger Work; and + +(b) under Patent Claims of such Contributor to make, use, sell, offer + for sale, have made, import, and otherwise transfer either its + Contributions or its Contributor Version. + +2.2. Effective Date + +The licenses granted in Section 2.1 with respect to any Contribution +become effective for each Contribution on the date the Contributor first +distributes such Contribution. + +2.3. Limitations on Grant Scope + +The licenses granted in this Section 2 are the only rights granted under +this License. No additional rights or licenses will be implied from the +distribution or licensing of Covered Software under this License. +Notwithstanding Section 2.1(b) above, no patent license is granted by a +Contributor: + +(a) for any code that a Contributor has removed from Covered Software; + or + +(b) for infringements caused by: (i) Your and any other third party's + modifications of Covered Software, or (ii) the combination of its + Contributions with other software (except as part of its Contributor + Version); or + +(c) under Patent Claims infringed by Covered Software in the absence of + its Contributions. + +This License does not grant any rights in the trademarks, service marks, +or logos of any Contributor (except as may be necessary to comply with +the notice requirements in Section 3.4). + +2.4. Subsequent Licenses + +No Contributor makes additional grants as a result of Your choice to +distribute the Covered Software under a subsequent version of this +License (see Section 10.2) or under the terms of a Secondary License (if +permitted under the terms of Section 3.3). + +2.5. Representation + +Each Contributor represents that the Contributor believes its +Contributions are its original creation(s) or it has sufficient rights +to grant the rights to its Contributions conveyed by this License. + +2.6. Fair Use + +This License is not intended to limit any rights You have under +applicable copyright doctrines of fair use, fair dealing, or other +equivalents. + +2.7. Conditions + +Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted +in Section 2.1. + +3. Responsibilities +------------------- + +3.1. Distribution of Source Form + +All distribution of Covered Software in Source Code Form, including any +Modifications that You create or to which You contribute, must be under +the terms of this License. You must inform recipients that the Source +Code Form of the Covered Software is governed by the terms of this +License, and how they can obtain a copy of this License. You may not +attempt to alter or restrict the recipients' rights in the Source Code +Form. + +3.2. Distribution of Executable Form + +If You distribute Covered Software in Executable Form then: + +(a) such Covered Software must also be made available in Source Code + Form, as described in Section 3.1, and You must inform recipients of + the Executable Form how they can obtain a copy of such Source Code + Form by reasonable means in a timely manner, at a charge no more + than the cost of distribution to the recipient; and + +(b) You may distribute such Executable Form under the terms of this + License, or sublicense it under different terms, provided that the + license for the Executable Form does not attempt to limit or alter + the recipients' rights in the Source Code Form under this License. + +3.3. Distribution of a Larger Work + +You may create and distribute a Larger Work under terms of Your choice, +provided that You also comply with the requirements of this License for +the Covered Software. If the Larger Work is a combination of Covered +Software with a work governed by one or more Secondary Licenses, and the +Covered Software is not Incompatible With Secondary Licenses, this +License permits You to additionally distribute such Covered Software +under the terms of such Secondary License(s), so that the recipient of +the Larger Work may, at their option, further distribute the Covered +Software under the terms of either this License or such Secondary +License(s). + +3.4. Notices + +You may not remove or alter the substance of any license notices +(including copyright notices, patent notices, disclaimers of warranty, +or limitations of liability) contained within the Source Code Form of +the Covered Software, except that You may alter any license notices to +the extent required to remedy known factual inaccuracies. + +3.5. Application of Additional Terms + +You may choose to offer, and to charge a fee for, warranty, support, +indemnity or liability obligations to one or more recipients of Covered +Software. However, You may do so only on Your own behalf, and not on +behalf of any Contributor. You must make it absolutely clear that any +such warranty, support, indemnity, or liability obligation is offered by +You alone, and You hereby agree to indemnify every Contributor for any +liability incurred by such Contributor as a result of warranty, support, +indemnity or liability terms You offer. You may include additional +disclaimers of warranty and limitations of liability specific to any +jurisdiction. + +4. Inability to Comply Due to Statute or Regulation +--------------------------------------------------- + +If it is impossible for You to comply with any of the terms of this +License with respect to some or all of the Covered Software due to +statute, judicial order, or regulation then You must: (a) comply with +the terms of this License to the maximum extent possible; and (b) +describe the limitations and the code they affect. Such description must +be placed in a text file included with all distributions of the Covered +Software under this License. Except to the extent prohibited by statute +or regulation, such description must be sufficiently detailed for a +recipient of ordinary skill to be able to understand it. + +5. Termination +-------------- + +5.1. The rights granted under this License will terminate automatically +if You fail to comply with any of its terms. However, if You become +compliant, then the rights granted under this License from a particular +Contributor are reinstated (a) provisionally, unless and until such +Contributor explicitly and finally terminates Your grants, and (b) on an +ongoing basis, if such Contributor fails to notify You of the +non-compliance by some reasonable means prior to 60 days after You have +come back into compliance. Moreover, Your grants from a particular +Contributor are reinstated on an ongoing basis if such Contributor +notifies You of the non-compliance by some reasonable means, this is the +first time You have received notice of non-compliance with this License +from such Contributor, and You become compliant prior to 30 days after +Your receipt of the notice. + +5.2. If You initiate litigation against any entity by asserting a patent +infringement claim (excluding declaratory judgment actions, +counter-claims, and cross-claims) alleging that a Contributor Version +directly or indirectly infringes any patent, then the rights granted to +You by any and all Contributors for the Covered Software under Section +2.1 of this License shall terminate. + +5.3. In the event of termination under Sections 5.1 or 5.2 above, all +end user license agreements (excluding distributors and resellers) which +have been validly granted by You or Your distributors under this License +prior to termination shall survive termination. + +************************************************************************ +* * +* 6. Disclaimer of Warranty * +* ------------------------- * +* * +* Covered Software is provided under this License on an "as is" * +* basis, without warranty of any kind, either expressed, implied, or * +* statutory, including, without limitation, warranties that the * +* Covered Software is free of defects, merchantable, fit for a * +* particular purpose or non-infringing. The entire risk as to the * +* quality and performance of the Covered Software is with You. * +* Should any Covered Software prove defective in any respect, You * +* (not any Contributor) assume the cost of any necessary servicing, * +* repair, or correction. This disclaimer of warranty constitutes an * +* essential part of this License. No use of any Covered Software is * +* authorized under this License except under this disclaimer. * +* * +************************************************************************ + +************************************************************************ +* * +* 7. Limitation of Liability * +* -------------------------- * +* * +* Under no circumstances and under no legal theory, whether tort * +* (including negligence), contract, or otherwise, shall any * +* Contributor, or anyone who distributes Covered Software as * +* permitted above, be liable to You for any direct, indirect, * +* special, incidental, or consequential damages of any character * +* including, without limitation, damages for lost profits, loss of * +* goodwill, work stoppage, computer failure or malfunction, or any * +* and all other commercial damages or losses, even if such party * +* shall have been informed of the possibility of such damages. This * +* limitation of liability shall not apply to liability for death or * +* personal injury resulting from such party's negligence to the * +* extent applicable law prohibits such limitation. Some * +* jurisdictions do not allow the exclusion or limitation of * +* incidental or consequential damages, so this exclusion and * +* limitation may not apply to You. * +* * +************************************************************************ + +8. Litigation +------------- + +Any litigation relating to this License may be brought only in the +courts of a jurisdiction where the defendant maintains its principal +place of business and such litigation shall be governed by laws of that +jurisdiction, without reference to its conflict-of-law provisions. +Nothing in this Section shall prevent a party's ability to bring +cross-claims or counter-claims. + +9. Miscellaneous +---------------- + +This License represents the complete agreement concerning the subject +matter hereof. If any provision of this License is held to be +unenforceable, such provision shall be reformed only to the extent +necessary to make it enforceable. Any law or regulation which provides +that the language of a contract shall be construed against the drafter +shall not be used to construe this License against a Contributor. + +10. Versions of the License +--------------------------- + +10.1. New Versions + +Mozilla Foundation is the license steward. Except as provided in Section +10.3, no one other than the license steward has the right to modify or +publish new versions of this License. Each version will be given a +distinguishing version number. + +10.2. Effect of New Versions + +You may distribute the Covered Software under the terms of the version +of the License under which You originally received the Covered Software, +or under the terms of any subsequent version published by the license +steward. + +10.3. Modified Versions + +If you create software not governed by this License, and you want to +create a new license for such software, you may create and use a +modified version of this License if you rename the license and remove +any references to the name of the license steward (except to note that +such modified license differs from this License). + +10.4. Distributing Source Code Form that is Incompatible With Secondary +Licenses + +If You choose to distribute Source Code Form that is Incompatible With +Secondary Licenses under the terms of this version of the License, the +notice described in Exhibit B of this License must be attached. + +Exhibit A - Source Code Form License Notice +------------------------------------------- + + This Source Code Form is subject to the terms of the Mozilla Public + License, v. 2.0. If a copy of the MPL was not distributed with this + file, You can obtain one at https://mozilla.org/MPL/2.0/. + +If it is not possible or desirable to put the notice in a particular +file, then You may include the notice in a location (such as a LICENSE +file in a relevant directory) where a recipient would be likely to look +for such a notice. + +You may add additional accurate notices of copyright ownership. + +Exhibit B - "Incompatible With Secondary Licenses" Notice +--------------------------------------------------------- + + This Source Code Form is "Incompatible With Secondary Licenses", as + defined by the Mozilla Public License, v. 2.0. + +``` diff --git a/java/legal/java.base/siphash.md b/java/legal/java.base/siphash.md new file mode 100644 index 0000000000000000000000000000000000000000..a1183acf2b0d6dbcde6fcb381c46e64269a03864 --- /dev/null +++ b/java/legal/java.base/siphash.md @@ -0,0 +1,150 @@ +## SipHash v1.0-68c8a7c + +### Notice +SipHash reference C implementation + +``` + Copyright (c) 2016 Jean-Philippe Aumasson + + To the extent possible under law, the author(s) have dedicated all copyright + and related and neighboring rights to this software to the public domain + worldwide. This software is distributed without any warranty. + + You should have received a copy of the CC0 Public Domain Dedication along + with + this software. If not, see + . +``` + +### Licenses +The code is dual-licensed CCO and MIT + +#### MIT License +``` +Copyright 2012-2024 JP Aumasson + +Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +``` + +#### CC0 1.0 Universal +``` +Statement of Purpose + +The laws of most jurisdictions throughout the world automatically confer +exclusive Copyright and Related Rights (defined below) upon the creator and +subsequent owner(s) (each and all, an "owner") of an original work of +authorship and/or a database (each, a "Work"). + +Certain owners wish to permanently relinquish those rights to a Work for the +purpose of contributing to a commons of creative, cultural and scientific +works ("Commons") that the public can reliably and without fear of later +claims of infringement build upon, modify, incorporate in other works, reuse +and redistribute as freely as possible in any form whatsoever and for any +purposes, including without limitation commercial purposes. These owners may +contribute to the Commons to promote the ideal of a free culture and the +further production of creative, cultural and scientific works, or to gain +reputation or greater distribution for their Work in part through the use and +efforts of others. + +For these and/or other purposes and motivations, and without any expectation +of additional consideration or compensation, the person associating CC0 with a +Work (the "Affirmer"), to the extent that he or she is an owner of Copyright +and Related Rights in the Work, voluntarily elects to apply CC0 to the Work +and publicly distribute the Work under its terms, with knowledge of his or her +Copyright and Related Rights in the Work and the meaning and intended legal +effect of CC0 on those rights. + +1. Copyright and Related Rights. A Work made available under CC0 may be +protected by copyright and related or neighboring rights ("Copyright and +Related Rights"). Copyright and Related Rights include, but are not limited +to, the following: + + i. the right to reproduce, adapt, distribute, perform, display, communicate, + and translate a Work; + + ii. moral rights retained by the original author(s) and/or performer(s); + + iii. publicity and privacy rights pertaining to a person's image or likeness + depicted in a Work; + + iv. rights protecting against unfair competition in regards to a Work, + subject to the limitations in paragraph 4(a), below; + + v. rights protecting the extraction, dissemination, use and reuse of data in + a Work; + + vi. database rights (such as those arising under Directive 96/9/EC of the + European Parliament and of the Council of 11 March 1996 on the legal + protection of databases, and under any national implementation thereof, + including any amended or successor version of such directive); and + + vii. other similar, equivalent or corresponding rights throughout the world + based on applicable law or treaty, and any national implementations thereof. + +2. Waiver. To the greatest extent permitted by, but not in contravention of, +applicable law, Affirmer hereby overtly, fully, permanently, irrevocably and +unconditionally waives, abandons, and surrenders all of Affirmer's Copyright +and Related Rights and associated claims and causes of action, whether now +known or unknown (including existing as well as future claims and causes of +action), in the Work (i) in all territories worldwide, (ii) for the maximum +duration provided by applicable law or treaty (including future time +extensions), (iii) in any current or future medium and for any number of +copies, and (iv) for any purpose whatsoever, including without limitation +commercial, advertising or promotional purposes (the "Waiver"). Affirmer makes +the Waiver for the benefit of each member of the public at large and to the +detriment of Affirmer's heirs and successors, fully intending that such Waiver +shall not be subject to revocation, rescission, cancellation, termination, or +any other legal or equitable action to disrupt the quiet enjoyment of the Work +by the public as contemplated by Affirmer's express Statement of Purpose. + +3. Public License Fallback. Should any part of the Waiver for any reason be +judged legally invalid or ineffective under applicable law, then the Waiver +shall be preserved to the maximum extent permitted taking into account +Affirmer's express Statement of Purpose. In addition, to the extent the Waiver +is so judged Affirmer hereby grants to each affected person a royalty-free, +non transferable, non sublicensable, non exclusive, irrevocable and +unconditional license to exercise Affirmer's Copyright and Related Rights in +the Work (i) in all territories worldwide, (ii) for the maximum duration +provided by applicable law or treaty (including future time extensions), (iii) +in any current or future medium and for any number of copies, and (iv) for any +purpose whatsoever, including without limitation commercial, advertising or +promotional purposes (the "License"). The License shall be deemed effective as +of the date CC0 was applied by Affirmer to the Work. Should any part of the +License for any reason be judged legally invalid or ineffective under +applicable law, such partial invalidity or ineffectiveness shall not +invalidate the remainder of the License, and in such case Affirmer hereby +affirms that he or she will not (i) exercise any of his or her remaining +Copyright and Related Rights in the Work or (ii) assert any associated claims +and causes of action with respect to the Work, in either case contrary to +Affirmer's express Statement of Purpose. + +4. Limitations and Disclaimers. + + a. No trademark or patent rights held by Affirmer are waived, abandoned, + surrendered, licensed or otherwise affected by this document. + + b. Affirmer offers the Work as-is and makes no representations or warranties + of any kind concerning the Work, express, implied, statutory or otherwise, + including without limitation warranties of title, merchantability, fitness + for a particular purpose, non infringement, or the absence of latent or + other defects, accuracy, or the present or absence of errors, whether or not + discoverable, all to the greatest extent permissible under applicable law. + + c. Affirmer disclaims responsibility for clearing rights of other persons + that may apply to the Work or any use thereof, including without limitation + any person's Copyright and Related Rights in the Work. Further, Affirmer + disclaims responsibility for obtaining any necessary consents, permissions + or other rights required for any use of the Work. + + d. Affirmer understands and acknowledges that Creative Commons is not a + party to this document and has no duty or obligation with respect to this + CC0 or use of the Work. + +For more information, please see + + +``` diff --git a/java/legal/java.base/unicode.md b/java/legal/java.base/unicode.md new file mode 100644 index 0000000000000000000000000000000000000000..a128f8a7b0e49ec057fbbc7d11f20d9e767d2219 --- /dev/null +++ b/java/legal/java.base/unicode.md @@ -0,0 +1,104 @@ +## The Unicode Standard, Unicode Character Database, Version 15.1.0 + +### Unicode Character Database +``` + +UNICODE LICENSE V3 + +COPYRIGHT AND PERMISSION NOTICE + +Copyright © 1991-2023 Unicode, Inc. + +NOTICE TO USER: Carefully read the following legal agreement. BY +DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING DATA FILES, AND/OR +SOFTWARE, YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, ALL OF THE +TERMS AND CONDITIONS OF THIS AGREEMENT. IF YOU DO NOT AGREE, DO NOT +DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA FILES OR SOFTWARE. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of data files and any associated documentation (the "Data Files") or +software and any associated documentation (the "Software") to deal in the +Data Files or Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, and/or sell +copies of the Data Files or Software, and to permit persons to whom the +Data Files or Software are furnished to do so, provided that either (a) +this copyright and permission notice appear with all copies of the Data +Files or Software, or (b) this copyright and permission notice appear in +associated Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY +KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF +THIRD PARTY RIGHTS. + +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS NOTICE +BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, +OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, +WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE DATA +FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder shall +not be used in advertising or otherwise to promote the sale, use or other +dealings in these Data Files or Software without prior written +authorization of the copyright holder. + + +------------------ + +Unicode® Copyright and Terms of Use +For the general privacy policy governing access to this site, see the Unicode Privacy Policy. + + A. Unicode Copyright + Copyright © 1991-2023 Unicode, Inc. All rights reserved. + + B. Definitions + Unicode Data Files ("DATA FILES") include all data files under the directories: + https://www.unicode.org/Public/ + https://www.unicode.org/reports/ + https://www.unicode.org/ivd/data/ + + Unicode Data Files do not include PDF online code charts under the directory: + https://www.unicode.org/Public/ + + Unicode Software ("SOFTWARE") includes any source code published in the Unicode Standard + or any source code or compiled code under the directories: + https://www.unicode.org/Public/PROGRAMS/ + https://www.unicode.org/Public/cldr/ + http://site.icu-project.org/download/ + + C. Terms of Use + 1. Certain documents and files on this website contain a legend indicating that "Modification is permitted." Any person is hereby authorized, without fee, to modify such documents and files to create derivative works conforming to the Unicode® Standard, subject to Terms and Conditions herein. + 2. Any person is hereby authorized, without fee, to view, use, reproduce, and distribute all documents and files, subject to the Terms and Conditions herein. + 3. Further specifications of rights and restrictions pertaining to the use of the Unicode DATA FILES and SOFTWARE can be found in the Unicode Data Files and Software License. + 4. Each version of the Unicode Standard has further specifications of rights and restrictions of use. For the book editions (Unicode 5.0 and earlier), these are found on the back of the title page. + 5. The Unicode PDF online code charts carry specific restrictions. Those restrictions are incorporated as the first page of each PDF code chart. + 6. All other files, including online documentation of the core specification for Unicode 6.0 and later, are covered under these general Terms of Use. + 7. No license is granted to "mirror" the Unicode website where a fee is charged for access to the "mirror" site. + 8. Modification is not permitted with respect to this document. All copies of this document must be verbatim. + + D. Restricted Rights Legend + 1. Any technical data or software which is licensed to the United States of America, its agencies and/or instrumentalities under this Agreement is commercial technical data or commercial computer software developed exclusively at private expense as defined in FAR 2.101, or DFARS 252.227-7014 (June 1995), as applicable. For technical data, use, duplication, or disclosure by the Government is subject to restrictions as set forth in DFARS 202.227-7015 Technical Data, Commercial and Items (Nov 1995) and this Agreement. For Software, in accordance with FAR 12-212 or DFARS 227-7202, as applicable, use, duplication or disclosure by the Government is subject to the restrictions set forth in this Agreement. + + E. Warranties and Disclaimers + 1. This publication and/or website may include technical or typographical errors or other inaccuracies. Changes are periodically added to the information herein; these changes will be incorporated in new editions of the publication and/or website. Unicode, Inc. may make improvements and/or changes in the product(s) and/or program(s) described in this publication and/or website at any time. + 2. If this file has been purchased on magnetic or optical media from Unicode, Inc. the sole and exclusive remedy for any claim will be exchange of the defective media within ninety (90) days of original purchase. + 3. EXCEPT AS PROVIDED IN SECTION E.2, THIS PUBLICATION AND/OR SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EITHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. UNICODE, INC. AND ITS LICENSORS ASSUME NO RESPONSIBILITY FOR ERRORS OR OMISSIONS IN THIS PUBLICATION AND/OR SOFTWARE OR OTHER DOCUMENTS WHICH ARE REFERENCED BY OR LINKED TO THIS PUBLICATION OR THE UNICODE WEBSITE. + + F. Waiver of Damages + 1. In no event shall Unicode, Inc. or its licensors be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, whether or not Unicode, Inc. was advised of the possibility of the damage, including, without limitation, those resulting from the following: loss of use, data or profits, in connection with the use, modification or distribution of this information or its derivatives. + + G. Trademarks & Logos + 1. The Unicode Word Mark and the Unicode Logo are trademarks of Unicode, Inc. "The Unicode Consortium" and "Unicode, Inc." are trade names of Unicode, Inc. Use of the information and materials found on this website indicates your acknowledgement of Unicode, Inc.'s exclusive worldwide rights in the Unicode Word Mark, the Unicode Logo, and the Unicode trade names. + 2. The Unicode Consortium Name and Trademark Usage Policy ("Trademark Policy") are incorporated herein by reference and you agree to abide by the provisions of the Trademark Policy, which may be changed from time to time in the sole discretion of Unicode, Inc. + All third party trademarks referenced herein are the property of their respective owners. + + H. Miscellaneous + 1. Jurisdiction and Venue. This website is operated from a location in the State of California, United States of America. Unicode, Inc. makes no representation that the materials are appropriate for use in other locations. If you access this website from other locations, you are responsible for compliance with local laws. This Agreement, all use of this website and any claims and damages resulting from use of this website are governed solely by the laws of the State of California without regard to any principles which would apply the laws of a different jurisdiction. The user agrees that any disputes regarding this website shall be resolved solely in the courts located in Santa Clara County, California. The user agrees said courts have personal jurisdiction and agree to waive any right to transfer the dispute to any other forum. + 2. Modification by Unicode, Inc. Unicode, Inc. shall have the right to modify this Agreement at any time by posting it to this website. The user may not assign any part of this Agreement without Unicode, Inc.'s prior written consent. + 3. Taxes. The user agrees to pay any taxes arising from access to this website or use of the information herein, except for those based on Unicode's net income. + 4. Severability. If any provision of this Agreement is declared invalid or unenforceable, the remaining provisions of this Agreement shall remain in effect. + 5. Entire Agreement. This Agreement constitutes the entire agreement between the parties. + +``` + diff --git a/java/legal/java.base/wepoll.md b/java/legal/java.base/wepoll.md new file mode 100644 index 0000000000000000000000000000000000000000..f2d954486eabe590cd0aa5b2c1c828a61bd57844 --- /dev/null +++ b/java/legal/java.base/wepoll.md @@ -0,0 +1,34 @@ +## Bert Belder: wepoll v 1.5.8 + +### wepoll License +``` +wepoll - epoll for Windows +https://github.com/piscisaureus/wepoll + +Copyright 2012-2020, Bert Belder +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +``` diff --git a/java/legal/java.base/zlib.md b/java/legal/java.base/zlib.md new file mode 100644 index 0000000000000000000000000000000000000000..fcc5457bf5b6070b5321524fdf8ee117cb5457f9 --- /dev/null +++ b/java/legal/java.base/zlib.md @@ -0,0 +1,27 @@ +## zlib v1.3.1 + +### zlib License +
+
+Copyright (C) 1995-2024 Jean-loup Gailly and Mark Adler
+
+This software is provided 'as-is', without any express or implied
+warranty.  In no event will the authors be held liable for any damages
+arising from the use of this software.
+
+Permission is granted to anyone to use this software for any purpose,
+including commercial applications, and to alter it and redistribute it
+freely, subject to the following restrictions:
+
+1. The origin of this software must not be misrepresented; you must not
+   claim that you wrote the original software. If you use this software
+   in a product, an acknowledgment in the product documentation would be
+   appreciated but is not required.
+2. Altered source versions must be plainly marked as such, and must not be
+   misrepresented as being the original software.
+3. This notice may not be removed or altered from any source distribution.
+
+Jean-loup Gailly        Mark Adler
+jloup@gzip.org          madler@alumni.caltech.edu
+
+
diff --git a/java/legal/java.compiler/ADDITIONAL_LICENSE_INFO b/java/legal/java.compiler/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.compiler/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.compiler/ASSEMBLY_EXCEPTION b/java/legal/java.compiler/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.compiler/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.compiler/LICENSE b/java/legal/java.compiler/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.compiler/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.datatransfer/ADDITIONAL_LICENSE_INFO b/java/legal/java.datatransfer/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.datatransfer/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.datatransfer/ASSEMBLY_EXCEPTION b/java/legal/java.datatransfer/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.datatransfer/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.datatransfer/LICENSE b/java/legal/java.datatransfer/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.datatransfer/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.desktop/ADDITIONAL_LICENSE_INFO b/java/legal/java.desktop/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.desktop/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.desktop/ASSEMBLY_EXCEPTION b/java/legal/java.desktop/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.desktop/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.desktop/LICENSE b/java/legal/java.desktop/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.desktop/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.desktop/colorimaging.md b/java/legal/java.desktop/colorimaging.md new file mode 100644 index 0000000000000000000000000000000000000000..eeb9932e1377f7c063279e0f1d341177f689660e --- /dev/null +++ b/java/legal/java.desktop/colorimaging.md @@ -0,0 +1,7 @@ +## Eastman Kodak Company: Portions of color management and imaging software + +### Eastman Kodak Notice +
+Portions Copyright Eastman Kodak Company 1991-2003
+
+ diff --git a/java/legal/java.desktop/freetype.md b/java/legal/java.desktop/freetype.md new file mode 100644 index 0000000000000000000000000000000000000000..0ddbe9b1136956a9f70a10d443d00bafa1cb4a01 --- /dev/null +++ b/java/legal/java.desktop/freetype.md @@ -0,0 +1,649 @@ +## The FreeType Project: Freetype v2.13.2 + + +### FreeType Notice + +``` +FreeType comes with two licenses from which you can choose the one +which fits your needs best. + + The FreeType License (FTL) is the most commonly used one. It is + a BSD-style license with a credit clause and thus compatible with + the GNU Public License (GPL) version 3, but not with the + GPL version 2. + + The GNU General Public License (GPL), version 2. Use it for all + projects which use the GPLv2 also, or which need a license + compatible to the GPLv2. + +``` + +### FreeType License +``` + +Copyright (C) 1996-2023 by David Turner, Robert Wilhelm, and Werner Lemberg. +Copyright (C) 2007-2023 by Dereg Clegg and Michael Toftdal. +Copyright (C) 1996-2023 by Just van Rossum, David Turner, Robert Wilhelm, and Werner Lemberg. +Copyright (C) 2022-2023 by David Turner, Robert Wilhelm, Werner Lemberg, George Williams, and +Copyright (C) 2004-2023 by Masatake YAMATO and Redhat K.K. +Copyright (C) 2007-2023 by Derek Clegg and Michael Toftdal. +Copyright (C) 2003-2023 by Masatake YAMATO, Red Hat K.K., +Copyright (C) 1996-2023 by David Turner, Robert Wilhelm, Werner Lemberg, and Dominik Röttsches. +Copyright (C) 2007-2023 by David Turner. +Copyright (C) 2022-2023 by David Turner, Robert Wilhelm, Werner Lemberg, and Moazin Khatti. +Copyright (C) 2007-2023 by Rahul Bhalerao , . +Copyright (C) 2008-2023 by David Turner, Robert Wilhelm, Werner Lemberg, and suzuki toshiya. +Copyright (C) 2013-2023 by Google, Inc. +Copyright (C) 2019-2023 by Nikhil Ramakrishnan, David Turner, Robert Wilhelm, and Werner Lemberg. +Copyright (C) 2009-2023 by Oran Agra and Mickey Gabel. +Copyright (C) 2018-2023 by David Turner, Robert Wilhelm, Dominik Röttsches, and Werner Lemberg. +Copyright (C) 2004-2023 by David Turner, Robert Wilhelm, Werner Lemberg, and George Williams. + + + The FreeType Project LICENSE + ---------------------------- + + 2006-Jan-27 + + Copyright 1996-2002, 2006 by + David Turner, Robert Wilhelm, and Werner Lemberg + + + +Introduction +============ + + The FreeType Project is distributed in several archive packages; + some of them may contain, in addition to the FreeType font engine, + various tools and contributions which rely on, or relate to, the + FreeType Project. + + This license applies to all files found in such packages, and + which do not fall under their own explicit license. The license + affects thus the FreeType font engine, the test programs, + documentation and makefiles, at the very least. + + This license was inspired by the BSD, Artistic, and IJG + (Independent JPEG Group) licenses, which all encourage inclusion + and use of free software in commercial and freeware products + alike. As a consequence, its main points are that: + + o We don't promise that this software works. However, we will be + interested in any kind of bug reports. (`as is' distribution) + + o You can use this software for whatever you want, in parts or + full form, without having to pay us. (`royalty-free' usage) + + o You may not pretend that you wrote this software. If you use + it, or only parts of it, in a program, you must acknowledge + somewhere in your documentation that you have used the + FreeType code. (`credits') + + We specifically permit and encourage the inclusion of this + software, with or without modifications, in commercial products. + We disclaim all warranties covering The FreeType Project and + assume no liability related to The FreeType Project. + + + Finally, many people asked us for a preferred form for a + credit/disclaimer to use in compliance with this license. We thus + encourage you to use the following text: + + """ + Portions of this software are copyright © The FreeType + Project (www.freetype.org). All rights reserved. + """ + + Please replace with the value from the FreeType version you + actually use. + + +Legal Terms +=========== + +0. Definitions +-------------- + + Throughout this license, the terms `package', `FreeType Project', + and `FreeType archive' refer to the set of files originally + distributed by the authors (David Turner, Robert Wilhelm, and + Werner Lemberg) as the `FreeType Project', be they named as alpha, + beta or final release. + + `You' refers to the licensee, or person using the project, where + `using' is a generic term including compiling the project's source + code as well as linking it to form a `program' or `executable'. + This program is referred to as `a program using the FreeType + engine'. + + This license applies to all files distributed in the original + FreeType Project, including all source code, binaries and + documentation, unless otherwise stated in the file in its + original, unmodified form as distributed in the original archive. + If you are unsure whether or not a particular file is covered by + this license, you must contact us to verify this. + + The FreeType Project is copyright (C) 1996-2000 by David Turner, + Robert Wilhelm, and Werner Lemberg. All rights reserved except as + specified below. + +1. No Warranty +-------------- + + THE FREETYPE PROJECT IS PROVIDED `AS IS' WITHOUT WARRANTY OF ANY + KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + PURPOSE. IN NO EVENT WILL ANY OF THE AUTHORS OR COPYRIGHT HOLDERS + BE LIABLE FOR ANY DAMAGES CAUSED BY THE USE OR THE INABILITY TO + USE, OF THE FREETYPE PROJECT. + +2. Redistribution +----------------- + + This license grants a worldwide, royalty-free, perpetual and + irrevocable right and license to use, execute, perform, compile, + display, copy, create derivative works of, distribute and + sublicense the FreeType Project (in both source and object code + forms) and derivative works thereof for any purpose; and to + authorize others to exercise some or all of the rights granted + herein, subject to the following conditions: + + o Redistribution of source code must retain this license file + (`FTL.TXT') unaltered; any additions, deletions or changes to + the original files must be clearly indicated in accompanying + documentation. The copyright notices of the unaltered, + original files must be preserved in all copies of source + files. + + o Redistribution in binary form must provide a disclaimer that + states that the software is based in part of the work of the + FreeType Team, in the distribution documentation. We also + encourage you to put an URL to the FreeType web page in your + documentation, though this isn't mandatory. + + These conditions apply to any software derived from or based on + the FreeType Project, not just the unmodified files. If you use + our work, you must acknowledge us. However, no fee need be paid + to us. + +3. Advertising +-------------- + + Neither the FreeType authors and contributors nor you shall use + the name of the other for commercial, advertising, or promotional + purposes without specific prior written permission. + + We suggest, but do not require, that you use one or more of the + following phrases to refer to this software in your documentation + or advertising materials: `FreeType Project', `FreeType Engine', + `FreeType library', or `FreeType Distribution'. + + As you have not signed this license, you are not required to + accept it. However, as the FreeType Project is copyrighted + material, only this license, or another one contracted with the + authors, grants you the right to use, distribute, and modify it. + Therefore, by using, distributing, or modifying the FreeType + Project, you indicate that you understand and accept all the terms + of this license. + +4. Contacts +----------- + + There are two mailing lists related to FreeType: + + o freetype@nongnu.org + + Discusses general use and applications of FreeType, as well as + future and wanted additions to the library and distribution. + If you are looking for support, start in this list if you + haven't found anything to help you in the documentation. + + o freetype-devel@nongnu.org + + Discusses bugs, as well as engine internals, design issues, + specific licenses, porting, etc. + + Our home page can be found at + + https://www.freetype.org + +``` + +### GPL v2 + +``` + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Library General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. To prevent this, we have made it clear that any +patent must be licensed for everyone's free use or not licensed at all. + + The precise terms and conditions for copying, distribution and +modification follow. + + GNU GENERAL PUBLIC LICENSE + TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION + + 0. This License applies to any program or other work which contains +a notice placed by the copyright holder saying it may be distributed +under the terms of this General Public License. The "Program", below, +refers to any such program or work, and a "work based on the Program" +means either the Program or any derivative work under copyright law: +that is to say, a work containing the Program or a portion of it, +either verbatim or with modifications and/or translated into another +language. (Hereinafter, translation is included without limitation in +the term "modification".) Each licensee is addressed as "you". + +Activities other than copying, distribution and modification are not +covered by this License; they are outside its scope. The act of +running the Program is not restricted, and the output from the Program +is covered only if its contents constitute a work based on the +Program (independent of having been made by running the Program). +Whether that is true depends on what the Program does. + + 1. You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. You may modify your copy or copies of the Program or any portion +of it, thus forming a work based on the Program, and copy and +distribute such modifications or work under the terms of Section 1 +above, provided that you also meet all of these conditions: + + a) You must cause the modified files to carry prominent notices + stating that you changed the files and the date of any change. + + b) You must cause any work that you distribute or publish, that in + whole or in part contains or is derived from the Program or any + part thereof, to be licensed as a whole at no charge to all third + parties under the terms of this License. + + c) If the modified program normally reads commands interactively + when run, you must cause it, when started running for such + interactive use in the most ordinary way, to print or display an + announcement including an appropriate copyright notice and a + notice that there is no warranty (or else, saying that you provide + a warranty) and that users may redistribute the program under + these conditions, and telling the user how to view a copy of this + License. (Exception: if the Program itself is interactive but + does not normally print such an announcement, your work based on + the Program is not required to print an announcement.) + +These requirements apply to the modified work as a whole. If +identifiable sections of that work are not derived from the Program, +and can be reasonably considered independent and separate works in +themselves, then this License, and its terms, do not apply to those +sections when you distribute them as separate works. But when you +distribute the same sections as part of a whole which is a work based +on the Program, the distribution of the whole must be on the terms of +this License, whose permissions for other licensees extend to the +entire whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest +your rights to work written entirely by you; rather, the intent is to +exercise the right to control the distribution of derivative or +collective works based on the Program. + +In addition, mere aggregation of another work not based on the Program +with the Program (or with a work based on the Program) on a volume of +a storage or distribution medium does not bring the other work under +the scope of this License. + + 3. You may copy and distribute the Program (or a work based on it, +under Section 2) in object code or executable form under the terms of +Sections 1 and 2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable + source code, which must be distributed under the terms of Sections + 1 and 2 above on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three + years, to give any third party, for a charge no more than your + cost of physically performing source distribution, a complete + machine-readable copy of the corresponding source code, to be + distributed under the terms of Sections 1 and 2 above on a medium + customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer + to distribute corresponding source code. (This alternative is + allowed only for noncommercial distribution and only if you + received the program in object code or executable form with such + an offer, in accord with Subsection b above.) + +The source code for a work means the preferred form of the work for +making modifications to it. For an executable work, complete source +code means all the source code for all modules it contains, plus any +associated interface definition files, plus the scripts used to +control compilation and installation of the executable. However, as a +special exception, the source code distributed need not include +anything that is normally distributed (in either source or binary +form) with the major components (compiler, kernel, and so on) of the +operating system on which the executable runs, unless that component +itself accompanies the executable. + +If distribution of executable or object code is made by offering +access to copy from a designated place, then offering equivalent +access to copy the source code from the same place counts as +distribution of the source code, even though third parties are not +compelled to copy the source along with the object code. + + 4. You may not copy, modify, sublicense, or distribute the Program +except as expressly provided under this License. Any attempt +otherwise to copy, modify, sublicense or distribute the Program is +void, and will automatically terminate your rights under this License. +However, parties who have received copies, or rights, from you under +this License will not have their licenses terminated so long as such +parties remain in full compliance. + + 5. You are not required to accept this License, since you have not +signed it. However, nothing else grants you permission to modify or +distribute the Program or its derivative works. These actions are +prohibited by law if you do not accept this License. Therefore, by +modifying or distributing the Program (or any work based on the +Program), you indicate your acceptance of this License to do so, and +all its terms and conditions for copying, distributing or modifying +the Program or works based on it. + + 6. Each time you redistribute the Program (or any work based on the +Program), the recipient automatically receives a license from the +original licensor to copy, distribute or modify the Program subject to +these terms and conditions. You may not impose any further +restrictions on the recipients' exercise of the rights granted herein. +You are not responsible for enforcing compliance by third parties to +this License. + + 7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), +conditions are imposed on you (whether by court order, agreement or +otherwise) that contradict the conditions of this License, they do not +excuse you from the conditions of this License. If you cannot +distribute so as to satisfy simultaneously your obligations under this +License and any other pertinent obligations, then as a consequence you +may not distribute the Program at all. For example, if a patent +license would not permit royalty-free redistribution of the Program by +all those who receive copies directly or indirectly through you, then +the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under +any particular circumstance, the balance of the section is intended to +apply and the section as a whole is intended to apply in other +circumstances. + +It is not the purpose of this section to induce you to infringe any +patents or other property right claims or to contest validity of any +such claims; this section has the sole purpose of protecting the +integrity of the free software distribution system, which is +implemented by public license practices. Many people have made +generous contributions to the wide range of software distributed +through that system in reliance on consistent application of that +system; it is up to the author/donor to decide if he or she is willing +to distribute software through any other system and a licensee cannot +impose that choice. + +This section is intended to make thoroughly clear what is believed to +be a consequence of the rest of this License. + + 8. If the distribution and/or use of the Program is restricted in +certain countries either by patents or by copyrighted interfaces, the +original copyright holder who places the Program under this License +may add an explicit geographical distribution limitation excluding +those countries, so that distribution is permitted only in or among +countries not thus excluded. In such case, this License incorporates +the limitation as if written in the body of this License. + + 9. The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. + +``` + +### Additional Freetype Attributions +``` + +--------------------------------- +The below license applies to the following files: +libfreetype/src/psaux/psarrst.c +libfreetype/src/psaux/psarrst.h +libfreetype/src/psaux/psblues.c +libfreetype/src/psaux/psblues.h +libfreetype/src/psaux/pserror.c +libfreetype/src/psaux/pserror.h +libfreetype/src/psaux/psfixed.h +libfreetype/src/psaux/psfont.c +libfreetype/src/psaux/psfont.h +libfreetype/src/psaux/psft.c +libfreetype/src/psaux/psft.h +libfreetype/src/psaux/psglue.h +libfreetype/src/psaux/pshints.c +libfreetype/src/psaux/pshints.h +libfreetype/src/psaux/psintrp.c +libfreetype/src/psaux/psintrp.h +libfreetype/src/psaux/psread.c +libfreetype/src/psaux/psread.h +libfreetype/src/psaux/psstack.c +libfreetype/src/psaux/psstack.h +libfreetype/src/psaux/pstypes.h + +Copyright 2006-2014 Adobe Systems Incorporated. + +This software, and all works of authorship, whether in source or +object code form as indicated by the copyright notice(s) included +herein (collectively, the "Work") is made available, and may only be +used, modified, and distributed under the FreeType Project License, +LICENSE.TXT. Additionally, subject to the terms and conditions of the +FreeType Project License, each contributor to the Work hereby grants +to any individual or legal entity exercising permissions granted by +the FreeType Project License and this section (hereafter, "You" or +"Your") a perpetual, worldwide, non-exclusive, no-charge, +royalty-free, irrevocable (except as stated in this section) patent +license to make, have made, use, offer to sell, sell, import, and +otherwise transfer the Work, where such license applies only to those +patent claims licensable by such contributor that are necessarily +infringed by their contribution(s) alone or by combination of their +contribution(s) with the Work to which such contribution(s) was +submitted. If You institute patent litigation against any entity +(including a cross-claim or counterclaim in a lawsuit) alleging that +the Work or a contribution incorporated within the Work constitutes +direct or contributory patent infringement, then any patent licenses +granted to You under this License for that Work shall terminate as of +the date such litigation is filed. + +By using, modifying, or distributing the Work you indicate that you +have read and understood the terms and conditions of the +FreeType Project License as well as those provided in this section, +and you accept them fully. + + +``` + +### MIT License +``` + +--------------------------------- +The below license applies to the following files: +libfreetype/include/freetype/internal/fthash.h +libfreetype/src/base/fthash.c + +Copyright 2000 Computing Research Labs, New Mexico State University +Copyright 2001-2015 + + Francesco Zappa Nardelli + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sublicense, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +THE COMPUTING RESEARCH LAB OR NEW MEXICO STATE UNIVERSITY BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT +OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR +THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + +``` diff --git a/java/legal/java.desktop/giflib.md b/java/legal/java.desktop/giflib.md new file mode 100644 index 0000000000000000000000000000000000000000..8b8fde8706d9289cbb0c9ce937ba6525847a9a60 --- /dev/null +++ b/java/legal/java.desktop/giflib.md @@ -0,0 +1,50 @@ +## GIFLIB v5.2.2 + +### GIFLIB License +``` + +The GIFLIB distribution is Copyright (c) 1997 Eric S. Raymond + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + + +tree/README + +== Authors == + +Gershon Elber +original giflib code + +Toshio Kuratomi +uncompressed gif writing code +former maintainer + +Eric Raymond +current as well as long time former maintainer of giflib code + +There have been many other contributors; see the attributions in the +version-control history to learn more. + + +tree/openbsd-reallocarray.c + +Copyright (C) 2008 Otto Moerbeek +SPDX-License-Identifier: MIT + +``` diff --git a/java/legal/java.desktop/harfbuzz.md b/java/legal/java.desktop/harfbuzz.md new file mode 100644 index 0000000000000000000000000000000000000000..3ae73d215b046bf30e11d070ad0ba526ec10cc00 --- /dev/null +++ b/java/legal/java.desktop/harfbuzz.md @@ -0,0 +1,103 @@ +## Harfbuzz v8.2.2 + +### Harfbuzz License + +
+
+HarfBuzz is licensed under the so-called "Old MIT" license.  Details follow.
+For parts of HarfBuzz that are licensed under different licenses see individual
+files names COPYING in subdirectories where applicable.
+
+Copyright © 2010-2023  Google, Inc.
+Copyright © 2018-2020  Ebrahim Byagowi
+Copyright © 2004-2013  Red Hat, Inc.
+Copyright © 2019  Facebook, Inc.
+Copyright (C) 2012 Zilong Tan (eric.zltan@gmail.com)
+Copyright © 2007  Chris Wilson
+Copyright © 2018-2019 Adobe Inc.
+Copyright © 2006-2023 Behdad Esfahbod
+Copyright © 1998-2004  David Turner and Werner Lemberg
+Copyright © 2009  Keith Stribley
+Copyright © 2018  Khaled Hosny
+Copyright © 2016  Elie Roux 
+Copyright © 2016  Igalia S.L.
+Copyright © 2015  Mozilla Foundation.
+Copyright © 1999  David Turner
+Copyright © 2005  Werner Lemberg
+Copyright © 2013-2015  Alexei Podtelezhnikov
+Copyright © 2022 Matthias Clasen
+Copyright © 2011  Codethink Limited
+
+For full copyright notices consult the individual files in the package.
+
+
+Permission is hereby granted, without written agreement and without
+license or royalty fees, to use, copy, modify, and distribute this
+software and its documentation for any purpose, provided that the
+above copyright notice and the following two paragraphs appear in
+all copies of this software.
+
+IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE TO ANY PARTY FOR
+DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+IF THE COPYRIGHT HOLDER HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+DAMAGE.
+
+THE COPYRIGHT HOLDER SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING,
+BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ON AN "AS IS" BASIS, AND THE COPYRIGHT HOLDER HAS NO OBLIGATION TO
+PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+
+All source code, except for one section, is licensed as above. The one
+exception is licensed with a slightly different MIT variant:
+The contents of this directory are licensed under the following terms:
+
+---------------------------------
+The below license applies to the following files:
+libharfbuzz/hb-ucd.cc
+
+Copyright (C) 2012 Grigori Goronzy 
+
+Permission to use, copy, modify, and/or distribute this software for any
+purpose with or without fee is hereby granted, provided that the above
+copyright notice and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+
+---------------------------------
+The below license applies to the following files:
+libharfbuzz/hb-unicode-emoji-table.hh
+
+© 2023 Unicode®, Inc.
+Unicode and the Unicode Logo are registered trademarks of Unicode, Inc.
+in the U.S. and other countries.
+For terms of use, see https://www.unicode.org/terms_of_use.html
+
+
+ +### AUTHORS File Information +``` + +Behdad Esfahbod +David Corbett +David Turner +Ebrahim Byagowi +Garret Rieger +Jonathan Kew +Khaled Hosny +Lars Knoll +Martin Hosken +Owen Taylor +Roderick Sheeter +Roozbeh Pournader +Simon Hausmann +Werner Lemberg + +``` diff --git a/java/legal/java.desktop/jpeg.md b/java/legal/java.desktop/jpeg.md new file mode 100644 index 0000000000000000000000000000000000000000..479d7a3ba90418927f6db7c19c401cd377dc6f78 --- /dev/null +++ b/java/legal/java.desktop/jpeg.md @@ -0,0 +1,77 @@ +## Independent JPEG Group: JPEG release 6b + +### JPEG License + +``` +**************************************************************************** + +Copyright (C) 1991-1998, Thomas G. Lane. + +This software is the work of Tom Lane, Philip Gladstone, Jim Boucher, +Lee Crocker, Julian Minguillon, Luis Ortiz, George Phillips, Davide Rossi, +Guido Vollbeding, Ge' Weijers, and other members of the Independent JPEG +Group. + +IJG is not affiliated with the official ISO JPEG standards committee. + +The authors make NO WARRANTY or representation, either express or implied, +with respect to this software, its quality, accuracy, merchantability, or +fitness for a particular purpose. This software is provided "AS IS", +and you, its user, assume the entire risk as to its quality and accuracy. + +This software is copyright (C) 1991-1998, Thomas G. Lane. +All Rights Reserved except as specified below. + +Permission is hereby granted to use, copy, modify, and distribute +this software (or portions thereof) for any purpose, without fee, +subject to these conditions: + +(1) If any part of the source code for this software is distributed, +then this README file must be included, with this copyright and no-warranty +notice unaltered; and any additions, deletions, or changes to the original +files must be clearly indicated in accompanying documentation. + +(2) If only executable code is distributed, then the accompanying documentation +must state that "this software is based in part on the work of the +Independent JPEG Group". + +(3) Permission for use of this software is granted only if the user accepts +full responsibility for any undesirable consequences; the authors accept +NO LIABILITY for damages of any kind. + +These conditions apply to any software derived from or based on the IJG code, +not just to the unmodified library. If you use our work, you ought to +acknowledge us. + +Permission is NOT granted for the use of any IJG author's name or company name +in advertising or publicity relating to this software or products derived +from it. This software may be referred to only as "the Independent JPEG +Group's software". + +We specifically permit and encourage the use of this software as the basis +of commercial products, provided that all warranty or liability claims are +assumed by the product vendor. + +It appears that the arithmetic coding option of the JPEG spec is covered +by patents owned by IBM, AT&T, and Mitsubishi. Hence arithmetic coding +cannot legally be used without obtaining one or more licenses. For this +reason, support for arithmetic coding has been removed from the free +JPEG software. (Since arithmetic coding provides only a marginal gain +over the unpatented Huffman mode, it is unlikely that very many +implementations will support it.) So far as we are aware, there are +no patent restrictions on the remaining code. + +The IJG distribution formerly included code to read and write GIF files. +To avoid entanglement with the Unisys LZW patent, GIF reading support +has been removed altogether, and the GIF writer has been simplified to +produce "uncompressed GIFs". This technique does not use the LZW algorithm; +the resulting GIF files are larger than usual, but are readable by all +standard GIF decoders. + +We are required to state that "The Graphics Interchange Format(c) is +the Copyright property of CompuServe Incorporated. GIF(sm) is a +Service Mark property of CompuServe Incorporated." + +**************************************************************************** +``` + diff --git a/java/legal/java.desktop/lcms.md b/java/legal/java.desktop/lcms.md new file mode 100644 index 0000000000000000000000000000000000000000..02af4fff0005ebf29988fe7c26b6113f791476a5 --- /dev/null +++ b/java/legal/java.desktop/lcms.md @@ -0,0 +1,103 @@ +## Little Color Management System (LCMS) v2.16 + +### LCMS License +
+
+MIT License
+
+Copyright (C) 1998-2023 Marti Maria Saguer
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the Software
+is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
+THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+---------------------------------
+The below license applies to the following files:
+liblcms/cmssm.c
+
+Copyright 2001, softSurfer (www.softsurfer.com)
+
+This code may be freely used and modified for any purpose
+providing that this copyright notice is included with it.
+SoftSurfer makes no warranty for this code, and cannot be held
+liable for any real or imagined damage resulting from its use.
+Users of this code must verify correctness for their application.
+
+
+ +### AUTHORS File Information +``` + +Main Author +------------ +Marti Maria + + +Contributors +------------ +Bob Friesenhahn +Kai-Uwe Behrmann +Stuart Nixon +Jordi Vilar +Richard Hughes +Auke Nauta +Chris Evans (Google) +Lorenzo Ridolfi +Robin Watts (Artifex) +Shawn Pedersen +Andrew Brygin +Samuli Suominen +Florian Hˆch +Aurelien Jarno +Claudiu Cebuc +Michael Vhrel (Artifex) +Michal Cihar +Daniel Kaneider +Mateusz Jurczyk (Google) +Paul Miller +SÈbastien LÈon +Christian Schmitz +XhmikosR +Stanislav Brabec (SuSe) +Leonhard Gruenschloss (Google) +Patrick Noffke +Christopher James Halse Rogers +John Hein +Thomas Weber (Debian) +Mark Allen +Noel Carboni +Sergei Trofimovic +Philipp Knechtges +Amyspark +Lovell Fuller +Eli Schwartz +Diogo Teles Sant'Anna + +Special Thanks +-------------- +Artifex software +AlienSkin software +libVIPS +Jan Morovic +Jos Vernon (WebSupergoo) +Harald Schneider (Maxon) +Christian Albrecht +Dimitrios Anastassakis +Lemke Software +Tim Zaman + +``` diff --git a/java/legal/java.desktop/libpng.md b/java/legal/java.desktop/libpng.md new file mode 100644 index 0000000000000000000000000000000000000000..cbffed81332097b5df0373262cf567a6197f063b --- /dev/null +++ b/java/legal/java.desktop/libpng.md @@ -0,0 +1,215 @@ +## libpng v1.6.43 + +### libpng License +
+
+COPYRIGHT NOTICE, DISCLAIMER, and LICENSE
+=========================================
+
+PNG Reference Library License version 2
+---------------------------------------
+
+Copyright (C) 1995-2024 The PNG Reference Library Authors.
+Copyright (C) 2018-2024 Cosmin Truta
+Copyright (C) 1998-2018 Glenn Randers-Pehrson
+Copyright (C) 1996-1997 Andreas Dilger
+Copyright (C) 1995-1996 Guy Eric Schalnat, Group 42, Inc.
+
+The software is supplied "as is", without warranty of any kind,
+express or implied, including, without limitation, the warranties
+of merchantability, fitness for a particular purpose, title, and
+non-infringement.  In no event shall the Copyright owners, or
+anyone distributing the software, be liable for any damages or
+other liability, whether in contract, tort or otherwise, arising
+from, out of, or in connection with the software, or the use or
+other dealings in the software, even if advised of the possibility
+of such damage.
+
+Permission is hereby granted to use, copy, modify, and distribute
+this software, or portions hereof, for any purpose, without fee,
+subject to the following restrictions:
+
+ 1. The origin of this software must not be misrepresented; you
+    must not claim that you wrote the original software.  If you
+    use this software in a product, an acknowledgment in the product
+    documentation would be appreciated, but is not required.
+
+ 2. Altered source versions must be plainly marked as such, and must
+    not be misrepresented as being the original software.
+
+ 3. This Copyright notice may not be removed or altered from any
+    source or altered source distribution.
+
+
+PNG Reference Library License version 1 (for libpng 0.5 through 1.6.35)
+-----------------------------------------------------------------------
+
+libpng versions 1.0.7, July 1, 2000, through 1.6.35, July 15, 2018 are
+Copyright (c) 2000-2002, 2004, 2006-2018 Glenn Randers-Pehrson, are
+derived from libpng-1.0.6, and are distributed according to the same
+disclaimer and license as libpng-1.0.6 with the following individuals
+added to the list of Contributing Authors:
+
+    Simon-Pierre Cadieux
+    Eric S. Raymond
+    Mans Rullgard
+    Cosmin Truta
+    Gilles Vollant
+    James Yu
+    Mandar Sahastrabuddhe
+    Google Inc.
+    Vadim Barkov
+
+and with the following additions to the disclaimer:
+
+    There is no warranty against interference with your enjoyment of
+    the library or against infringement.  There is no warranty that our
+    efforts or the library will fulfill any of your particular purposes
+    or needs.  This library is provided with all faults, and the entire
+    risk of satisfactory quality, performance, accuracy, and effort is
+    with the user.
+
+Some files in the "contrib" directory and some configure-generated
+files that are distributed with libpng have other copyright owners, and
+are released under other open source licenses.
+
+libpng versions 0.97, January 1998, through 1.0.6, March 20, 2000, are
+Copyright (c) 1998-2000 Glenn Randers-Pehrson, are derived from
+libpng-0.96, and are distributed according to the same disclaimer and
+license as libpng-0.96, with the following individuals added to the
+list of Contributing Authors:
+
+    Tom Lane
+    Glenn Randers-Pehrson
+    Willem van Schaik
+
+libpng versions 0.89, June 1996, through 0.96, May 1997, are
+Copyright (c) 1996-1997 Andreas Dilger, are derived from libpng-0.88,
+and are distributed according to the same disclaimer and license as
+libpng-0.88, with the following individuals added to the list of
+Contributing Authors:
+
+    John Bowler
+    Kevin Bracey
+    Sam Bushell
+    Magnus Holmgren
+    Greg Roelofs
+    Tom Tanner
+
+Some files in the "scripts" directory have other copyright owners,
+but are released under this license.
+
+libpng versions 0.5, May 1995, through 0.88, January 1996, are
+Copyright (c) 1995-1996 Guy Eric Schalnat, Group 42, Inc.
+
+For the purposes of this copyright and license, "Contributing Authors"
+is defined as the following set of individuals:
+
+    Andreas Dilger
+    Dave Martindale
+    Guy Eric Schalnat
+    Paul Schmidt
+    Tim Wegner
+
+The PNG Reference Library is supplied "AS IS".  The Contributing
+Authors and Group 42, Inc. disclaim all warranties, expressed or
+implied, including, without limitation, the warranties of
+merchantability and of fitness for any purpose.  The Contributing
+Authors and Group 42, Inc. assume no liability for direct, indirect,
+incidental, special, exemplary, or consequential damages, which may
+result from the use of the PNG Reference Library, even if advised of
+the possibility of such damage.
+
+Permission is hereby granted to use, copy, modify, and distribute this
+source code, or portions hereof, for any purpose, without fee, subject
+to the following restrictions:
+
+ 1. The origin of this source code must not be misrepresented.
+
+ 2. Altered versions must be plainly marked as such and must not
+    be misrepresented as being the original source.
+
+ 3. This Copyright notice may not be removed or altered from any
+    source or altered source distribution.
+
+The Contributing Authors and Group 42, Inc. specifically permit,
+without fee, and encourage the use of this source code as a component
+to supporting the PNG file format in commercial products.  If you use
+this source code in a product, acknowledgment is not required but would
+be appreciated.
+
+TRADEMARK
+=========
+
+The name "libpng" has not been registered by the Copyright owners
+as a trademark in any jurisdiction.  However, because libpng has
+been distributed and maintained world-wide, continually since 1995,
+the Copyright owners claim "common-law trademark protection" in any
+jurisdiction where common-law trademark is recognized.
+
+
+ +### AUTHORS File Information +``` +PNG REFERENCE LIBRARY AUTHORS +============================= + +This is the list of PNG Reference Library ("libpng") Contributing +Authors, for copyright and licensing purposes. + + * Adam Richter + * Andreas Dilger + * Chris Blume + * Cosmin Truta + * Dave Martindale + * Eric S. Raymond + * Gilles Vollant + * Glenn Randers-Pehrson + * Greg Roelofs + * Guy Eric Schalnat + * James Yu + * John Bowler + * Kevin Bracey + * Magnus Holmgren + * Mandar Sahastrabuddhe + * Mans Rullgard + * Matt Sarett + * Mike Klein + * Pascal Massimino + * Paul Schmidt + * Philippe Antoine + * Qiang Zhou + * Sam Bushell + * Samuel Williams + * Simon-Pierre Cadieux + * Tim Wegner + * Tom Lane + * Tom Tanner + * Vadim Barkov + * Willem van Schaik + * Zhijie Liang + * Apple Inc. + - Zixu Wang (王子旭) + * Arm Holdings + - Richard Townsend + * Google Inc. + - Dan Field + - Leon Scroggins III + - Matt Sarett + - Mike Klein + - Sami Boukortt + - Wan-Teh Chang + * Loongson Technology Corporation Ltd. + - GuXiWei (顾希伟) + - JinBo (金波) + - ZhangLixia (张利霞) + +The build projects, the build scripts, the test scripts, and other +files in the "projects", "scripts" and "tests" directories, have +other copyright owners, but are released under the libpng license. + +Some files in the "ci" and "contrib" directories, as well as some +of the tools-generated files that are distributed with libpng, have +other copyright owners, and are released under other open source +licenses. +``` diff --git a/java/legal/java.desktop/mesa3d.md b/java/legal/java.desktop/mesa3d.md new file mode 100644 index 0000000000000000000000000000000000000000..cdaa1acb2930bff36dce3622b207ed8d9dc40290 --- /dev/null +++ b/java/legal/java.desktop/mesa3d.md @@ -0,0 +1,134 @@ +## Mesa 3-D Graphics Library v21.0.3 + +### Mesa License + +``` +Copyright (C) 1999-2007 Brian Paul All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sublicense, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included +in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + +Attention, Contributors + +When contributing to the Mesa project you must agree to the licensing terms +of the component to which you're contributing. +The following section lists the primary components of the Mesa distribution +and their respective licenses. +Mesa Component Licenses + + + +Component Location License +------------------------------------------------------------------ +Main Mesa code src/mesa/ MIT +Device drivers src/mesa/drivers/* MIT, generally + +Gallium code src/gallium/ MIT + +Ext headers GL/glext.h Khronos + GL/glxext.h Khronos + GL/wglext.h Khronos + KHR/khrplatform.h Khronos + +***************************************************************************** + +---- +include/GL/gl.h : + + + Mesa 3-D graphics library + + Copyright (C) 1999-2006 Brian Paul All Rights Reserved. + Copyright (C) 2009 VMware, Inc. All Rights Reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + OTHER DEALINGS IN THE SOFTWARE. + + ***************************************************************************** + +---- +include/GL/glext.h +include/GL/glxext.h +include/GL/wglxext.h : + + + Copyright (c) 2013 - 2018 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the + "Materials"), to deal in the Materials without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Materials, and to + permit persons to whom the Materials are furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Materials. + + THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + + ***************************************************************************** + +---- +include/KHR/khrplatform.h : + + Copyright (c) 2008 - 2018 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the + "Materials"), to deal in the Materials without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Materials, and to + permit persons to whom the Materials are furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Materials. + + THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + + ***************************************************************************** + +``` diff --git a/java/legal/java.instrument/ADDITIONAL_LICENSE_INFO b/java/legal/java.instrument/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.instrument/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.instrument/ASSEMBLY_EXCEPTION b/java/legal/java.instrument/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.instrument/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.instrument/LICENSE b/java/legal/java.instrument/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.instrument/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.logging/ADDITIONAL_LICENSE_INFO b/java/legal/java.logging/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.logging/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.logging/ASSEMBLY_EXCEPTION b/java/legal/java.logging/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.logging/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.logging/LICENSE b/java/legal/java.logging/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.logging/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.management.rmi/ADDITIONAL_LICENSE_INFO b/java/legal/java.management.rmi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.management.rmi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.management.rmi/ASSEMBLY_EXCEPTION b/java/legal/java.management.rmi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.management.rmi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.management.rmi/LICENSE b/java/legal/java.management.rmi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.management.rmi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.management/ADDITIONAL_LICENSE_INFO b/java/legal/java.management/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.management/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.management/ASSEMBLY_EXCEPTION b/java/legal/java.management/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.management/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.management/LICENSE b/java/legal/java.management/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.management/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.naming/ADDITIONAL_LICENSE_INFO b/java/legal/java.naming/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.naming/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.naming/ASSEMBLY_EXCEPTION b/java/legal/java.naming/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.naming/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.naming/LICENSE b/java/legal/java.naming/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.naming/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.net.http/ADDITIONAL_LICENSE_INFO b/java/legal/java.net.http/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.net.http/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.net.http/ASSEMBLY_EXCEPTION b/java/legal/java.net.http/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.net.http/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.net.http/LICENSE b/java/legal/java.net.http/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.net.http/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git 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a/java/legal/java.sql/ADDITIONAL_LICENSE_INFO b/java/legal/java.sql/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.sql/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.sql/ASSEMBLY_EXCEPTION b/java/legal/java.sql/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.sql/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.sql/LICENSE b/java/legal/java.sql/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.sql/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.transaction.xa/ADDITIONAL_LICENSE_INFO b/java/legal/java.transaction.xa/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.transaction.xa/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.transaction.xa/ASSEMBLY_EXCEPTION b/java/legal/java.transaction.xa/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.transaction.xa/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.transaction.xa/LICENSE b/java/legal/java.transaction.xa/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.transaction.xa/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.xml.crypto/ADDITIONAL_LICENSE_INFO b/java/legal/java.xml.crypto/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.xml.crypto/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.xml.crypto/ASSEMBLY_EXCEPTION b/java/legal/java.xml.crypto/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.xml.crypto/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.xml.crypto/LICENSE b/java/legal/java.xml.crypto/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.xml.crypto/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.xml.crypto/santuario.md b/java/legal/java.xml.crypto/santuario.md new file mode 100644 index 0000000000000000000000000000000000000000..768f0c7b144a4b47c899269901fa1fab3b395858 --- /dev/null +++ b/java/legal/java.xml.crypto/santuario.md @@ -0,0 +1,227 @@ +## Apache Santuario v3.0.3 + +### Apache 2.0 License +``` + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + +TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + +1. Definitions. + + "License" shall mean the terms and conditions for use, reproduction, + and distribution as defined by Sections 1 through 9 of this document. + + "Licensor" shall mean the copyright owner or entity authorized by + the copyright owner that is granting the License. + + "Legal Entity" shall mean the union of the acting entity and all + other entities that control, are controlled by, or are under common + control with that entity. For the purposes of this definition, + "control" means (i) the power, direct or indirect, to cause the + direction or management of such entity, whether by contract or + otherwise, or (ii) ownership of fifty percent (50%) or more of the + outstanding shares, or (iii) beneficial ownership of such entity. + + "You" (or "Your") shall mean an individual or Legal Entity + exercising permissions granted by this License. + + "Source" form shall mean the preferred form for making modifications, + including but not limited to software source code, documentation + source, and configuration files. + + "Object" form shall mean any form resulting from mechanical + transformation or translation of a Source form, including but + not limited to compiled object code, generated documentation, + and conversions to other media types. + + "Work" shall mean the work of authorship, whether in Source or + Object form, made available under the License, as indicated by a + copyright notice that is included in or attached to the work + (an example is provided in the Appendix below). + + "Derivative Works" shall mean any work, whether in Source or Object + form, that is based on (or derived from) the Work and for which the + editorial revisions, annotations, elaborations, or other modifications + represent, as a whole, an original work of authorship. For the purposes + of this License, Derivative Works shall not include works that remain + separable from, or merely link (or bind by name) to the interfaces of, + the Work and Derivative Works thereof. + + "Contribution" shall mean any work of authorship, including + the original version of the Work and any modifications or additions + to that Work or Derivative Works thereof, that is intentionally + submitted to Licensor for inclusion in the Work by the copyright owner + or by an individual or Legal Entity authorized to submit on behalf of + the copyright owner. For the purposes of this definition, "submitted" + means any form of electronic, verbal, or written communication sent + to the Licensor or its representatives, including but not limited to + communication on electronic mailing lists, source code control systems, + and issue tracking systems that are managed by, or on behalf of, the + Licensor for the purpose of discussing and improving the Work, but + excluding communication that is conspicuously marked or otherwise + designated in writing by the copyright owner as "Not a Contribution." + + "Contributor" shall mean Licensor and any individual or Legal Entity + on behalf of whom a Contribution has been received by Licensor and + subsequently incorporated within the Work. + +2. Grant of Copyright License. Subject to the terms and conditions of + this License, each Contributor hereby grants to You a perpetual, + worldwide, non-exclusive, no-charge, royalty-free, irrevocable + copyright license to reproduce, prepare Derivative Works of, + publicly display, publicly perform, sublicense, and distribute the + Work and such Derivative Works in Source or Object form. + +3. Grant of Patent License. Subject to the terms and conditions of + this License, each Contributor hereby grants to You a perpetual, + worldwide, non-exclusive, no-charge, royalty-free, irrevocable + (except as stated in this section) patent license to make, have made, + use, offer to sell, sell, import, and otherwise transfer the Work, + where such license applies only to those patent claims licensable + by such Contributor that are necessarily infringed by their + Contribution(s) alone or by combination of their Contribution(s) + with the Work to which such Contribution(s) was submitted. If You + institute patent litigation against any entity (including a + cross-claim or counterclaim in a lawsuit) alleging that the Work + or a Contribution incorporated within the Work constitutes direct + or contributory patent infringement, then any patent licenses + granted to You under this License for that Work shall terminate + as of the date such litigation is filed. + +4. Redistribution. You may reproduce and distribute copies of the + Work or Derivative Works thereof in any medium, with or without + modifications, and in Source or Object form, provided that You + meet the following conditions: + + (a) You must give any other recipients of the Work or + Derivative Works a copy of this License; and + + (b) You must cause any modified files to carry prominent notices + stating that You changed the files; and + + (c) You must retain, in the Source form of any Derivative Works + that You distribute, all copyright, patent, trademark, and + attribution notices from the Source form of the Work, + excluding those notices that do not pertain to any part of + the Derivative Works; and + + (d) If the Work includes a "NOTICE" text file as part of its + distribution, then any Derivative Works that You distribute must + include a readable copy of the attribution notices contained + within such NOTICE file, excluding those notices that do not + pertain to any part of the Derivative Works, in at least one + of the following places: within a NOTICE text file distributed + as part of the Derivative Works; within the Source form or + documentation, if provided along with the Derivative Works; or, + within a display generated by the Derivative Works, if and + wherever such third-party notices normally appear. The contents + of the NOTICE file are for informational purposes only and + do not modify the License. You may add Your own attribution + notices within Derivative Works that You distribute, alongside + or as an addendum to the NOTICE text from the Work, provided + that such additional attribution notices cannot be construed + as modifying the License. + + You may add Your own copyright statement to Your modifications and + may provide additional or different license terms and conditions + for use, reproduction, or distribution of Your modifications, or + for any such Derivative Works as a whole, provided Your use, + reproduction, and distribution of the Work otherwise complies with + the conditions stated in this License. + +5. Submission of Contributions. Unless You explicitly state otherwise, + any Contribution intentionally submitted for inclusion in the Work + by You to the Licensor shall be under the terms and conditions of + this License, without any additional terms or conditions. + Notwithstanding the above, nothing herein shall supersede or modify + the terms of any separate license agreement you may have executed + with Licensor regarding such Contributions. + +6. Trademarks. This License does not grant permission to use the trade + names, trademarks, service marks, or product names of the Licensor, + except as required for reasonable and customary use in describing the + origin of the Work and reproducing the content of the NOTICE file. + +7. Disclaimer of Warranty. Unless required by applicable law or + agreed to in writing, Licensor provides the Work (and each + Contributor provides its Contributions) on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied, including, without limitation, any warranties or conditions + of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A + PARTICULAR PURPOSE. You are solely responsible for determining the + appropriateness of using or redistributing the Work and assume any + risks associated with Your exercise of permissions under this License. + +8. Limitation of Liability. In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + +9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + +END OF TERMS AND CONDITIONS + +APPENDIX: How to apply the Apache License to your work. + + To apply the Apache License to your work, attach the following + boilerplate notice, with the fields enclosed by brackets "[]" + replaced with your own identifying information. (Don't include + the brackets!) The text should be enclosed in the appropriate + comment syntax for the file format. We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + +Copyright [yyyy] [name of copyright owner] + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +``` + +### Apache Santuario Notice +``` + +Apache Santuario - XML Security for Java +Copyright 1999-2023 The Apache Software Foundation + +This product includes software developed at +The Apache Software Foundation (http://www.apache.org/). + +It was originally based on software copyright (c) 2001, Institute for +Data Communications Systems, . + +The development of this software was partly funded by the European +Commission in the project in the ISIS Programme. + +This product contains software that is +copyright (c) 2021, Oracle and/or its affiliates. +``` diff --git a/java/legal/java.xml/ADDITIONAL_LICENSE_INFO b/java/legal/java.xml/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/java.xml/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/java.xml/ASSEMBLY_EXCEPTION b/java/legal/java.xml/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/java.xml/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/java.xml/LICENSE b/java/legal/java.xml/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/java.xml/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/java.xml/bcel.md b/java/legal/java.xml/bcel.md new file mode 100644 index 0000000000000000000000000000000000000000..2c673d6b1af3ef3fa6896f14e6d1e646b01aec0e --- /dev/null +++ b/java/legal/java.xml/bcel.md @@ -0,0 +1,219 @@ +## Apache Commons Byte Code Engineering Library (BCEL) Version 6.7.0 + +### Apache Commons BCEL Notice +
+
+    Apache Commons BCEL
+    Copyright 2004-2022 The Apache Software Foundation
+
+    This product includes software developed at
+    The Apache Software Foundation (https://www.apache.org/).
+
+
+ +### Apache 2.0 License +
+
+                              Apache License
+                        Version 2.0, January 2004
+                     http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+   "License" shall mean the terms and conditions for use, reproduction,
+   and distribution as defined by Sections 1 through 9 of this document.
+
+   "Licensor" shall mean the copyright owner or entity authorized by
+   the copyright owner that is granting the License.
+
+   "Legal Entity" shall mean the union of the acting entity and all
+   other entities that control, are controlled by, or are under common
+   control with that entity. For the purposes of this definition,
+   "control" means (i) the power, direct or indirect, to cause the
+   direction or management of such entity, whether by contract or
+   otherwise, or (ii) ownership of fifty percent (50%) or more of the
+   outstanding shares, or (iii) beneficial ownership of such entity.
+
+   "You" (or "Your") shall mean an individual or Legal Entity
+   exercising permissions granted by this License.
+
+   "Source" form shall mean the preferred form for making modifications,
+   including but not limited to software source code, documentation
+   source, and configuration files.
+
+   "Object" form shall mean any form resulting from mechanical
+   transformation or translation of a Source form, including but
+   not limited to compiled object code, generated documentation,
+   and conversions to other media types.
+
+   "Work" shall mean the work of authorship, whether in Source or
+   Object form, made available under the License, as indicated by a
+   copyright notice that is included in or attached to the work
+   (an example is provided in the Appendix below).
+
+   "Derivative Works" shall mean any work, whether in Source or Object
+   form, that is based on (or derived from) the Work and for which the
+   editorial revisions, annotations, elaborations, or other modifications
+   represent, as a whole, an original work of authorship. For the purposes
+   of this License, Derivative Works shall not include works that remain
+   separable from, or merely link (or bind by name) to the interfaces of,
+   the Work and Derivative Works thereof.
+
+   "Contribution" shall mean any work of authorship, including
+   the original version of the Work and any modifications or additions
+   to that Work or Derivative Works thereof, that is intentionally
+   submitted to Licensor for inclusion in the Work by the copyright owner
+   or by an individual or Legal Entity authorized to submit on behalf of
+   the copyright owner. For the purposes of this definition, "submitted"
+   means any form of electronic, verbal, or written communication sent
+   to the Licensor or its representatives, including but not limited to
+   communication on electronic mailing lists, source code control systems,
+   and issue tracking systems that are managed by, or on behalf of, the
+   Licensor for the purpose of discussing and improving the Work, but
+   excluding communication that is conspicuously marked or otherwise
+   designated in writing by the copyright owner as "Not a Contribution."
+
+   "Contributor" shall mean Licensor and any individual or Legal Entity
+   on behalf of whom a Contribution has been received by Licensor and
+   subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   copyright license to reproduce, prepare Derivative Works of,
+   publicly display, publicly perform, sublicense, and distribute the
+   Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   (except as stated in this section) patent license to make, have made,
+   use, offer to sell, sell, import, and otherwise transfer the Work,
+   where such license applies only to those patent claims licensable
+   by such Contributor that are necessarily infringed by their
+   Contribution(s) alone or by combination of their Contribution(s)
+   with the Work to which such Contribution(s) was submitted. If You
+   institute patent litigation against any entity (including a
+   cross-claim or counterclaim in a lawsuit) alleging that the Work
+   or a Contribution incorporated within the Work constitutes direct
+   or contributory patent infringement, then any patent licenses
+   granted to You under this License for that Work shall terminate
+   as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the
+   Work or Derivative Works thereof in any medium, with or without
+   modifications, and in Source or Object form, provided that You
+   meet the following conditions:
+
+   (a) You must give any other recipients of the Work or
+       Derivative Works a copy of this License; and
+
+   (b) You must cause any modified files to carry prominent notices
+       stating that You changed the files; and
+
+   (c) You must retain, in the Source form of any Derivative Works
+       that You distribute, all copyright, patent, trademark, and
+       attribution notices from the Source form of the Work,
+       excluding those notices that do not pertain to any part of
+       the Derivative Works; and
+
+   (d) If the Work includes a "NOTICE" text file as part of its
+       distribution, then any Derivative Works that You distribute must
+       include a readable copy of the attribution notices contained
+       within such NOTICE file, excluding those notices that do not
+       pertain to any part of the Derivative Works, in at least one
+       of the following places: within a NOTICE text file distributed
+       as part of the Derivative Works; within the Source form or
+       documentation, if provided along with the Derivative Works; or,
+       within a display generated by the Derivative Works, if and
+       wherever such third-party notices normally appear. The contents
+       of the NOTICE file are for informational purposes only and
+       do not modify the License. You may add Your own attribution
+       notices within Derivative Works that You distribute, alongside
+       or as an addendum to the NOTICE text from the Work, provided
+       that such additional attribution notices cannot be construed
+       as modifying the License.
+
+   You may add Your own copyright statement to Your modifications and
+   may provide additional or different license terms and conditions
+   for use, reproduction, or distribution of Your modifications, or
+   for any such Derivative Works as a whole, provided Your use,
+   reproduction, and distribution of the Work otherwise complies with
+   the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise,
+   any Contribution intentionally submitted for inclusion in the Work
+   by You to the Licensor shall be under the terms and conditions of
+   this License, without any additional terms or conditions.
+   Notwithstanding the above, nothing herein shall supersede or modify
+   the terms of any separate license agreement you may have executed
+   with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+   names, trademarks, service marks, or product names of the Licensor,
+   except as required for reasonable and customary use in describing the
+   origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or
+   agreed to in writing, Licensor provides the Work (and each
+   Contributor provides its Contributions) on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+   implied, including, without limitation, any warranties or conditions
+   of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+   PARTICULAR PURPOSE. You are solely responsible for determining the
+   appropriateness of using or redistributing the Work and assume any
+   risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory,
+   whether in tort (including negligence), contract, or otherwise,
+   unless required by applicable law (such as deliberate and grossly
+   negligent acts) or agreed to in writing, shall any Contributor be
+   liable to You for damages, including any direct, indirect, special,
+   incidental, or consequential damages of any character arising as a
+   result of this License or out of the use or inability to use the
+   Work (including but not limited to damages for loss of goodwill,
+   work stoppage, computer failure or malfunction, or any and all
+   other commercial damages or losses), even if such Contributor
+   has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing
+   the Work or Derivative Works thereof, You may choose to offer,
+   and charge a fee for, acceptance of support, warranty, indemnity,
+   or other liability obligations and/or rights consistent with this
+   License. However, in accepting such obligations, You may act only
+   on Your own behalf and on Your sole responsibility, not on behalf
+   of any other Contributor, and only if You agree to indemnify,
+   defend, and hold each Contributor harmless for any liability
+   incurred by, or claims asserted against, such Contributor by reason
+   of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
+
+APPENDIX: How to apply the Apache License to your work.
+
+   To apply the Apache License to your work, attach the following
+   boilerplate notice, with the fields enclosed by brackets "[]"
+   replaced with your own identifying information. (Don't include
+   the brackets!)  The text should be enclosed in the appropriate
+   comment syntax for the file format. We also recommend that a
+   file or class name and description of purpose be included on the
+   same "printed page" as the copyright notice for easier
+   identification within third-party archives.
+
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+
diff --git a/java/legal/java.xml/dom.md b/java/legal/java.xml/dom.md new file mode 100644 index 0000000000000000000000000000000000000000..4fe80935ed184e2fbced1752ac14cc8d2057a3cf --- /dev/null +++ b/java/legal/java.xml/dom.md @@ -0,0 +1,77 @@ +## DOM Level 3 Core Specification v1.0 + +### W3C Software Notice +
+Copyright © 2004 World Wide Web Consortium, (Massachusetts Institute of Technology,
+European Research Consortium for Informatics and Mathematics, Keio University).
+All Rights Reserved.
+
+The DOM bindings are published under the W3C Software Copyright Notice and License.
+The software license requires "Notice of any changes or modifications to the W3C
+files, including the date changes were made." Consequently, modified versions of
+the DOM bindings must document that they do not conform to the W3C standard; in the
+case of the IDL definitions, the pragma prefix can no longer be 'w3c.org'; in the
+case of the Java language binding, the package names can no longer be in the
+'org.w3c' package.
+
+ +### W3C License +
+
+W3C SOFTWARE NOTICE AND LICENSE
+
+http://www.w3.org/Consortium/Legal/2002/copyright-software-20021231
+
+This work (and included software, documentation such as READMEs, or other
+related items) is being provided by the copyright holders under the following
+license. By obtaining, using and/or copying this work, you (the licensee)
+agree that you have read, understood, and will comply with the following terms
+and conditions.
+
+Permission to copy, modify, and distribute this software and its
+documentation, with or without modification, for any purpose and without fee
+or royalty is hereby granted, provided that you include the following on ALL
+copies of the software and documentation or portions thereof, including
+modifications:
+
+   1.The full text of this NOTICE in a location viewable to users of the
+   redistributed or derivative work.
+
+   2.Any pre-existing intellectual property disclaimers, notices, or terms and
+   conditions. If none exist, the W3C Software Short Notice should be included
+   (hypertext is preferred, text is permitted) within the body of any
+   redistributed or derivative code.
+
+   3.Notice of any changes or modifications to the files, including the date
+   changes were made. (We recommend you provide URIs to the location from
+   which the code is derived.)
+
+THIS SOFTWARE AND DOCUMENTATION IS PROVIDED "AS IS," AND COPYRIGHT HOLDERS
+MAKE NO REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
+LIMITED TO, WARRANTIES OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR
+PURPOSE OR THAT THE USE OF THE SOFTWARE OR DOCUMENTATION WILL NOT INFRINGE ANY
+THIRD PARTY PATENTS,COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS.
+
+COPYRIGHT HOLDERS WILL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL
+OR CONSEQUENTIAL DAMAGES ARISING OUT OF ANY USE OF THE SOFTWARE OR
+DOCUMENTATION.  The name and trademarks of copyright holders may NOT be used
+in advertising or publicity pertaining to the software without specific,
+written prior permission. Title to copyright in this software and any
+associated documentation will at all times remain with copyright holders.
+
+____________________________________
+
+This formulation of W3C's notice and license became active on December 31
+2002. This version removes the copyright ownership notice such that this
+license can be used with materials other than those owned by the W3C, reflects
+that ERCIM is now a host of the W3C, includes references to this specific
+dated version of the license, and removes the ambiguous grant of "use".
+Otherwise, this version is the same as the previous version and is written so
+as to preserve the Free Software Foundation's assessment of GPL compatibility
+and OSI's certification under the Open Source Definition. Please see our
+Copyright FAQ for common questions about using materials from our site,
+including specific terms and conditions for packages like libwww, Amaya, and
+Jigsaw. Other questions about this notice can be directed to
+site-policy@w3.org.
+
+
diff --git a/java/legal/java.xml/jcup.md b/java/legal/java.xml/jcup.md new file mode 100644 index 0000000000000000000000000000000000000000..bc566b7d2dbd9746f1085f1d19c70e57cb9654ca --- /dev/null +++ b/java/legal/java.xml/jcup.md @@ -0,0 +1,31 @@ +## CUP Parser Generator for Java v 0.11b + +### CUP Parser Generator License + +``` +Copyright 1996-2015 by Scott Hudson, Frank Flannery, C. Scott Ananian, Michael Petter + +Permission to use, copy, modify, and distribute this software and its +documentation for any purpose and without fee is hereby granted, provided +that the above copyright notice appear in all copies and that both +the copyright notice and this permission notice and warranty disclaimer +appear in supporting documentation, and that the names of the authors or +their employers not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior permission. + +The authors and their employers disclaim all warranties with regard to +this software, including all implied warranties of merchantability and +fitness. In no event shall the authors or their employers be liable for +any special, indirect or consequential damages or any damages whatsoever +resulting from loss of use, data or profits, whether in an action of +contract, negligence or other tortious action, arising out of or in +connection with the use or performance of this software. +``` +--- +``` +This is an open source license. It is also GPL-Compatible (see entry for +"Standard ML of New Jersey"). The portions of CUP output which are hard-coded +into the CUP source code are (naturally) covered by this same license, as is +the CUP runtime code linked with the generated parser. +``` + diff --git a/java/legal/java.xml/xalan.md b/java/legal/java.xml/xalan.md new file mode 100644 index 0000000000000000000000000000000000000000..3e2019063b6f41f5e0be389ff54da83faa0eddc7 --- /dev/null +++ b/java/legal/java.xml/xalan.md @@ -0,0 +1,255 @@ +## Apache Xalan v2.7.3 + +### Apache Xalan Notice +
+
+    ======================================================================================
+    ==  NOTICE file corresponding to the section 4d of the Apache License, Version 2.0, ==
+    ==  in this case for the Apache Xalan distribution.                                 ==
+    ======================================================================================
+
+   This product includes software developed by
+   The Apache Software Foundation (http://www.apache.org/).
+
+   Specifically, we only include the XSLTC portion of the source from the Xalan distribution.
+   The Xalan project has two processors: an interpretive one (Xalan Interpretive) and a
+   compiled one (The XSLT Compiler (XSLTC)). We *only* use the XSLTC part of Xalan; We use
+   the source from the packages that are part of the XSLTC sources.
+
+   Portions of this software was originally based on the following:
+
+     - software copyright (c) 1999-2002, Lotus Development Corporation., http://www.lotus.com.
+     - software copyright (c) 2001-2002, Sun Microsystems., http://www.sun.com.
+     - software copyright (c) 2003, IBM Corporation., http://www.ibm.com.
+     - voluntary contributions made by Ovidiu Predescu (ovidiu@cup.hp.com) on behalf of the
+       Apache Software Foundation and was originally developed at Hewlett Packard Company.
+
+
+ +### Apache 2.0 License +
+
+                              Apache License
+                        Version 2.0, January 2004
+                     http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+   "License" shall mean the terms and conditions for use, reproduction,
+   and distribution as defined by Sections 1 through 9 of this document.
+
+   "Licensor" shall mean the copyright owner or entity authorized by
+   the copyright owner that is granting the License.
+
+   "Legal Entity" shall mean the union of the acting entity and all
+   other entities that control, are controlled by, or are under common
+   control with that entity. For the purposes of this definition,
+   "control" means (i) the power, direct or indirect, to cause the
+   direction or management of such entity, whether by contract or
+   otherwise, or (ii) ownership of fifty percent (50%) or more of the
+   outstanding shares, or (iii) beneficial ownership of such entity.
+
+   "You" (or "Your") shall mean an individual or Legal Entity
+   exercising permissions granted by this License.
+
+   "Source" form shall mean the preferred form for making modifications,
+   including but not limited to software source code, documentation
+   source, and configuration files.
+
+   "Object" form shall mean any form resulting from mechanical
+   transformation or translation of a Source form, including but
+   not limited to compiled object code, generated documentation,
+   and conversions to other media types.
+
+   "Work" shall mean the work of authorship, whether in Source or
+   Object form, made available under the License, as indicated by a
+   copyright notice that is included in or attached to the work
+   (an example is provided in the Appendix below).
+
+   "Derivative Works" shall mean any work, whether in Source or Object
+   form, that is based on (or derived from) the Work and for which the
+   editorial revisions, annotations, elaborations, or other modifications
+   represent, as a whole, an original work of authorship. For the purposes
+   of this License, Derivative Works shall not include works that remain
+   separable from, or merely link (or bind by name) to the interfaces of,
+   the Work and Derivative Works thereof.
+
+   "Contribution" shall mean any work of authorship, including
+   the original version of the Work and any modifications or additions
+   to that Work or Derivative Works thereof, that is intentionally
+   submitted to Licensor for inclusion in the Work by the copyright owner
+   or by an individual or Legal Entity authorized to submit on behalf of
+   the copyright owner. For the purposes of this definition, "submitted"
+   means any form of electronic, verbal, or written communication sent
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+   communication on electronic mailing lists, source code control systems,
+   and issue tracking systems that are managed by, or on behalf of, the
+   Licensor for the purpose of discussing and improving the Work, but
+   excluding communication that is conspicuously marked or otherwise
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+
+   "Contributor" shall mean Licensor and any individual or Legal Entity
+   on behalf of whom a Contribution has been received by Licensor and
+   subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   copyright license to reproduce, prepare Derivative Works of,
+   publicly display, publicly perform, sublicense, and distribute the
+   Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   (except as stated in this section) patent license to make, have made,
+   use, offer to sell, sell, import, and otherwise transfer the Work,
+   where such license applies only to those patent claims licensable
+   by such Contributor that are necessarily infringed by their
+   Contribution(s) alone or by combination of their Contribution(s)
+   with the Work to which such Contribution(s) was submitted. If You
+   institute patent litigation against any entity (including a
+   cross-claim or counterclaim in a lawsuit) alleging that the Work
+   or a Contribution incorporated within the Work constitutes direct
+   or contributory patent infringement, then any patent licenses
+   granted to You under this License for that Work shall terminate
+   as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the
+   Work or Derivative Works thereof in any medium, with or without
+   modifications, and in Source or Object form, provided that You
+   meet the following conditions:
+
+   (a) You must give any other recipients of the Work or
+       Derivative Works a copy of this License; and
+
+   (b) You must cause any modified files to carry prominent notices
+       stating that You changed the files; and
+
+   (c) You must retain, in the Source form of any Derivative Works
+       that You distribute, all copyright, patent, trademark, and
+       attribution notices from the Source form of the Work,
+       excluding those notices that do not pertain to any part of
+       the Derivative Works; and
+
+   (d) If the Work includes a "NOTICE" text file as part of its
+       distribution, then any Derivative Works that You distribute must
+       include a readable copy of the attribution notices contained
+       within such NOTICE file, excluding those notices that do not
+       pertain to any part of the Derivative Works, in at least one
+       of the following places: within a NOTICE text file distributed
+       as part of the Derivative Works; within the Source form or
+       documentation, if provided along with the Derivative Works; or,
+       within a display generated by the Derivative Works, if and
+       wherever such third-party notices normally appear. The contents
+       of the NOTICE file are for informational purposes only and
+       do not modify the License. You may add Your own attribution
+       notices within Derivative Works that You distribute, alongside
+       or as an addendum to the NOTICE text from the Work, provided
+       that such additional attribution notices cannot be construed
+       as modifying the License.
+
+   You may add Your own copyright statement to Your modifications and
+   may provide additional or different license terms and conditions
+   for use, reproduction, or distribution of Your modifications, or
+   for any such Derivative Works as a whole, provided Your use,
+   reproduction, and distribution of the Work otherwise complies with
+   the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise,
+   any Contribution intentionally submitted for inclusion in the Work
+   by You to the Licensor shall be under the terms and conditions of
+   this License, without any additional terms or conditions.
+   Notwithstanding the above, nothing herein shall supersede or modify
+   the terms of any separate license agreement you may have executed
+   with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+   names, trademarks, service marks, or product names of the Licensor,
+   except as required for reasonable and customary use in describing the
+   origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or
+   agreed to in writing, Licensor provides the Work (and each
+   Contributor provides its Contributions) on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+   implied, including, without limitation, any warranties or conditions
+   of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+   PARTICULAR PURPOSE. You are solely responsible for determining the
+   appropriateness of using or redistributing the Work and assume any
+   risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory,
+   whether in tort (including negligence), contract, or otherwise,
+   unless required by applicable law (such as deliberate and grossly
+   negligent acts) or agreed to in writing, shall any Contributor be
+   liable to You for damages, including any direct, indirect, special,
+   incidental, or consequential damages of any character arising as a
+   result of this License or out of the use or inability to use the
+   Work (including but not limited to damages for loss of goodwill,
+   work stoppage, computer failure or malfunction, or any and all
+   other commercial damages or losses), even if such Contributor
+   has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing
+   the Work or Derivative Works thereof, You may choose to offer,
+   and charge a fee for, acceptance of support, warranty, indemnity,
+   or other liability obligations and/or rights consistent with this
+   License. However, in accepting such obligations, You may act only
+   on Your own behalf and on Your sole responsibility, not on behalf
+   of any other Contributor, and only if You agree to indemnify,
+   defend, and hold each Contributor harmless for any liability
+   incurred by, or claims asserted against, such Contributor by reason
+   of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
+
+APPENDIX: How to apply the Apache License to your work.
+
+   To apply the Apache License to your work, attach the following
+   boilerplate notice, with the fields enclosed by brackets "[]"
+   replaced with your own identifying information. (Don't include
+   the brackets!)  The text should be enclosed in the appropriate
+   comment syntax for the file format. We also recommend that a
+   file or class name and description of purpose be included on the
+   same "printed page" as the copyright notice for easier
+   identification within third-party archives.
+
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+
+JLEX COPYRIGHT NOTICE, LICENSE AND DISCLAIMER.
+Copyright 1996-2003 by Elliot Joel Berk and C. Scott Ananian
+Permission to use, copy, modify, and distribute this software and
+its documentation for any purpose and without fee is hereby granted,
+provided that the above copyright notice appear in all copies and that
+both the copyright notice and this permission notice and warranty
+disclaimer appear in supporting documentation, and that the name of
+the authors or their employers not be used in advertising or publicity
+pertaining to distribution of the software without specific, written
+prior permission.
+The authors and their employers disclaim all warranties with regard to
+this software, including all implied warranties of merchantability and
+fitness. In no event shall the authors or their employers be liable for
+any special, indirect or consequential damages or any damages whatsoever
+resulting from loss of use, data or profits, whether in an action of
+contract, negligence or other tortious action, arising out of or in
+connection with the use or performance of this software.The portions of
+JLex output which are hard-coded into the JLex source code are (naturally)
+covered by this same license.
+
+
diff --git a/java/legal/java.xml/xerces.md b/java/legal/java.xml/xerces.md new file mode 100644 index 0000000000000000000000000000000000000000..ad01181b8b4335c5b0be9e386070d9ea9d8f780c --- /dev/null +++ b/java/legal/java.xml/xerces.md @@ -0,0 +1,229 @@ +## Apache Xerces v2.12.2 + +### Apache Xerces Notice +
+    =========================================================================
+    == NOTICE file corresponding to section 4(d) of the Apache License,    ==
+    == Version 2.0, in this case for the Apache Xerces Java distribution.  ==
+    =========================================================================
+
+    Apache Xerces Java
+    Copyright 1999-2022 The Apache Software Foundation
+
+    This product includes software developed at
+    The Apache Software Foundation (http://www.apache.org/).
+
+    Portions of this software were originally based on the following:
+    - software copyright (c) 1999, IBM Corporation., http://www.ibm.com.
+    - software copyright (c) 1999, Sun Microsystems., http://www.sun.com.
+    - voluntary contributions made by Paul Eng on behalf of the
+    Apache Software Foundation that were originally developed at iClick, Inc.,
+    software copyright (c) 1999.
+
+ +### Apache 2.0 License +
+
+                              Apache License
+                        Version 2.0, January 2004
+                     http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+   "License" shall mean the terms and conditions for use, reproduction,
+   and distribution as defined by Sections 1 through 9 of this document.
+
+   "Licensor" shall mean the copyright owner or entity authorized by
+   the copyright owner that is granting the License.
+
+   "Legal Entity" shall mean the union of the acting entity and all
+   other entities that control, are controlled by, or are under common
+   control with that entity. For the purposes of this definition,
+   "control" means (i) the power, direct or indirect, to cause the
+   direction or management of such entity, whether by contract or
+   otherwise, or (ii) ownership of fifty percent (50%) or more of the
+   outstanding shares, or (iii) beneficial ownership of such entity.
+
+   "You" (or "Your") shall mean an individual or Legal Entity
+   exercising permissions granted by this License.
+
+   "Source" form shall mean the preferred form for making modifications,
+   including but not limited to software source code, documentation
+   source, and configuration files.
+
+   "Object" form shall mean any form resulting from mechanical
+   transformation or translation of a Source form, including but
+   not limited to compiled object code, generated documentation,
+   and conversions to other media types.
+
+   "Work" shall mean the work of authorship, whether in Source or
+   Object form, made available under the License, as indicated by a
+   copyright notice that is included in or attached to the work
+   (an example is provided in the Appendix below).
+
+   "Derivative Works" shall mean any work, whether in Source or Object
+   form, that is based on (or derived from) the Work and for which the
+   editorial revisions, annotations, elaborations, or other modifications
+   represent, as a whole, an original work of authorship. For the purposes
+   of this License, Derivative Works shall not include works that remain
+   separable from, or merely link (or bind by name) to the interfaces of,
+   the Work and Derivative Works thereof.
+
+   "Contribution" shall mean any work of authorship, including
+   the original version of the Work and any modifications or additions
+   to that Work or Derivative Works thereof, that is intentionally
+   submitted to Licensor for inclusion in the Work by the copyright owner
+   or by an individual or Legal Entity authorized to submit on behalf of
+   the copyright owner. For the purposes of this definition, "submitted"
+   means any form of electronic, verbal, or written communication sent
+   to the Licensor or its representatives, including but not limited to
+   communication on electronic mailing lists, source code control systems,
+   and issue tracking systems that are managed by, or on behalf of, the
+   Licensor for the purpose of discussing and improving the Work, but
+   excluding communication that is conspicuously marked or otherwise
+   designated in writing by the copyright owner as "Not a Contribution."
+
+   "Contributor" shall mean Licensor and any individual or Legal Entity
+   on behalf of whom a Contribution has been received by Licensor and
+   subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   copyright license to reproduce, prepare Derivative Works of,
+   publicly display, publicly perform, sublicense, and distribute the
+   Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   (except as stated in this section) patent license to make, have made,
+   use, offer to sell, sell, import, and otherwise transfer the Work,
+   where such license applies only to those patent claims licensable
+   by such Contributor that are necessarily infringed by their
+   Contribution(s) alone or by combination of their Contribution(s)
+   with the Work to which such Contribution(s) was submitted. If You
+   institute patent litigation against any entity (including a
+   cross-claim or counterclaim in a lawsuit) alleging that the Work
+   or a Contribution incorporated within the Work constitutes direct
+   or contributory patent infringement, then any patent licenses
+   granted to You under this License for that Work shall terminate
+   as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the
+   Work or Derivative Works thereof in any medium, with or without
+   modifications, and in Source or Object form, provided that You
+   meet the following conditions:
+
+   (a) You must give any other recipients of the Work or
+       Derivative Works a copy of this License; and
+
+   (b) You must cause any modified files to carry prominent notices
+       stating that You changed the files; and
+
+   (c) You must retain, in the Source form of any Derivative Works
+       that You distribute, all copyright, patent, trademark, and
+       attribution notices from the Source form of the Work,
+       excluding those notices that do not pertain to any part of
+       the Derivative Works; and
+
+   (d) If the Work includes a "NOTICE" text file as part of its
+       distribution, then any Derivative Works that You distribute must
+       include a readable copy of the attribution notices contained
+       within such NOTICE file, excluding those notices that do not
+       pertain to any part of the Derivative Works, in at least one
+       of the following places: within a NOTICE text file distributed
+       as part of the Derivative Works; within the Source form or
+       documentation, if provided along with the Derivative Works; or,
+       within a display generated by the Derivative Works, if and
+       wherever such third-party notices normally appear. The contents
+       of the NOTICE file are for informational purposes only and
+       do not modify the License. You may add Your own attribution
+       notices within Derivative Works that You distribute, alongside
+       or as an addendum to the NOTICE text from the Work, provided
+       that such additional attribution notices cannot be construed
+       as modifying the License.
+
+   You may add Your own copyright statement to Your modifications and
+   may provide additional or different license terms and conditions
+   for use, reproduction, or distribution of Your modifications, or
+   for any such Derivative Works as a whole, provided Your use,
+   reproduction, and distribution of the Work otherwise complies with
+   the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise,
+   any Contribution intentionally submitted for inclusion in the Work
+   by You to the Licensor shall be under the terms and conditions of
+   this License, without any additional terms or conditions.
+   Notwithstanding the above, nothing herein shall supersede or modify
+   the terms of any separate license agreement you may have executed
+   with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+   names, trademarks, service marks, or product names of the Licensor,
+   except as required for reasonable and customary use in describing the
+   origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or
+   agreed to in writing, Licensor provides the Work (and each
+   Contributor provides its Contributions) on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+   implied, including, without limitation, any warranties or conditions
+   of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+   PARTICULAR PURPOSE. You are solely responsible for determining the
+   appropriateness of using or redistributing the Work and assume any
+   risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory,
+   whether in tort (including negligence), contract, or otherwise,
+   unless required by applicable law (such as deliberate and grossly
+   negligent acts) or agreed to in writing, shall any Contributor be
+   liable to You for damages, including any direct, indirect, special,
+   incidental, or consequential damages of any character arising as a
+   result of this License or out of the use or inability to use the
+   Work (including but not limited to damages for loss of goodwill,
+   work stoppage, computer failure or malfunction, or any and all
+   other commercial damages or losses), even if such Contributor
+   has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing
+   the Work or Derivative Works thereof, You may choose to offer,
+   and charge a fee for, acceptance of support, warranty, indemnity,
+   or other liability obligations and/or rights consistent with this
+   License. However, in accepting such obligations, You may act only
+   on Your own behalf and on Your sole responsibility, not on behalf
+   of any other Contributor, and only if You agree to indemnify,
+   defend, and hold each Contributor harmless for any liability
+   incurred by, or claims asserted against, such Contributor by reason
+   of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
+
+APPENDIX: How to apply the Apache License to your work.
+
+   To apply the Apache License to your work, attach the following
+   boilerplate notice, with the fields enclosed by brackets "[]"
+   replaced with your own identifying information. (Don't include
+   the brackets!)  The text should be enclosed in the appropriate
+   comment syntax for the file format. We also recommend that a
+   file or class name and description of purpose be included on the
+   same "printed page" as the copyright notice for easier
+   identification within third-party archives.
+
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+
diff --git a/java/legal/jdk.accessibility/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.accessibility/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.accessibility/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.accessibility/ASSEMBLY_EXCEPTION b/java/legal/jdk.accessibility/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.accessibility/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.accessibility/LICENSE b/java/legal/jdk.accessibility/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.accessibility/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.attach/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.attach/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.attach/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.attach/ASSEMBLY_EXCEPTION b/java/legal/jdk.attach/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.attach/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.attach/LICENSE b/java/legal/jdk.attach/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.attach/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.charsets/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.charsets/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.charsets/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.charsets/ASSEMBLY_EXCEPTION b/java/legal/jdk.charsets/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.charsets/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.charsets/LICENSE b/java/legal/jdk.charsets/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.charsets/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.compiler/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.compiler/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.compiler/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.compiler/ASSEMBLY_EXCEPTION b/java/legal/jdk.compiler/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.compiler/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.compiler/LICENSE b/java/legal/jdk.compiler/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.compiler/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.crypto.cryptoki/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.crypto.cryptoki/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.crypto.cryptoki/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.crypto.cryptoki/ASSEMBLY_EXCEPTION b/java/legal/jdk.crypto.cryptoki/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.crypto.cryptoki/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.crypto.cryptoki/LICENSE b/java/legal/jdk.crypto.cryptoki/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.crypto.cryptoki/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.crypto.cryptoki/pkcs11cryptotoken.md b/java/legal/jdk.crypto.cryptoki/pkcs11cryptotoken.md new file mode 100644 index 0000000000000000000000000000000000000000..08d1e3c713d923f3675bc671514994c7d9e55b6f --- /dev/null +++ b/java/legal/jdk.crypto.cryptoki/pkcs11cryptotoken.md @@ -0,0 +1,72 @@ +## OASIS PKCS #11 Cryptographic Token Interface v3.0 + +### OASIS PKCS #11 Cryptographic Token Interface License +
+
+Copyright © OASIS Open 2020. All Rights Reserved.
+
+    All capitalized terms in the following text have the meanings
+assigned to them in the OASIS Intellectual Property Rights Policy (the
+"OASIS IPR Policy"). The full Policy may be found at the OASIS website:
+[http://www.oasis-open.org/policies-guidelines/ipr]
+
+    This document and translations of it may be copied and furnished to
+others, and derivative works that comment on or otherwise explain it or
+assist in its implementation may be prepared, copied, published, and
+distributed, in whole or in part, without restriction of any kind,
+provided that the above copyright notice and this section are included
+on all such copies and derivative works. However, this document itself
+may not be modified in any way, including by removing the copyright
+notice or references to OASIS, except as needed for the purpose of
+developing any document or deliverable produced by an OASIS Technical
+Committee (in which case the rules applicable to copyrights, as set
+forth in the OASIS IPR Policy, must be followed) or as required to
+translate it into languages other than English.
+
+    The limited permissions granted above are perpetual and will not be
+revoked by OASIS or its successors or assigns.
+
+    This document and the information contained herein is provided on an
+"AS IS" basis and OASIS DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED,
+INCLUDING BUT NOT LIMITED TO ANY WARRANTY THAT THE USE OF THE
+INFORMATION HEREIN WILL NOT INFRINGE ANY OWNERSHIP RIGHTS OR ANY IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. OASIS
+AND ITS MEMBERS WILL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL OR
+CONSEQUENTIAL DAMAGES ARISING OUT OF ANY USE OF THIS DOCUMENT OR ANY
+PART THEREOF.
+
+    [OASIS requests that any OASIS Party or any other party that
+believes it has patent claims that would necessarily be infringed by
+implementations of this OASIS Standards Final Deliverable, to notify
+OASIS TC Administrator and provide an indication of its willingness to
+grant patent licenses to such patent claims in a manner consistent with
+the IPR Mode of the OASIS Technical Committee that produced this
+deliverable.]
+
+    [OASIS invites any party to contact the OASIS TC Administrator if it
+is aware of a claim of ownership of any patent claims that would
+necessarily be infringed by implementations of this OASIS Standards
+Final Deliverable by a patent holder that is not willing to provide a
+license to such patent claims in a manner consistent with the IPR Mode
+of the OASIS Technical Committee that produced this OASIS Standards
+Final Deliverable. OASIS may include such claims on its website, but
+disclaims any obligation to do so.]
+
+    [OASIS takes no position regarding the validity or scope of any
+intellectual property or other rights that might be claimed to pertain
+to the implementation or use of the technology described in this OASIS
+Standards Final Deliverable or the extent to which any license under
+such rights might or might not be available; neither does it represent
+that it has made any effort to identify any such rights. Information on
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+such proprietary rights by implementers or users of this OASIS Standards
+Final Deliverable, can be obtained from the OASIS TC Administrator.
+OASIS makes no representation that any information or list of
+intellectual property rights will at any time be complete, or that any
+claims in such list are, in fact, Essential Claims.]
+
+
diff --git a/java/legal/jdk.crypto.cryptoki/pkcs11wrapper.md b/java/legal/jdk.crypto.cryptoki/pkcs11wrapper.md new file mode 100644 index 0000000000000000000000000000000000000000..9eb453bca8dcbe38a0da162f215c29c0ca21dff1 --- /dev/null +++ b/java/legal/jdk.crypto.cryptoki/pkcs11wrapper.md @@ -0,0 +1,46 @@ +## IAIK (Institute for Applied Information Processing and Communication) PKCS#11 wrapper files v1 + +### IAIK License +
+
+Copyright (c) 2002 Graz University of Technology. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+   this list of conditions and the following disclaimer in the documentation
+   and/or other materials provided with the distribution.
+
+3. The end-user documentation included with the redistribution, if any, must
+   include the following acknowledgment:
+
+   "This product includes software developed by IAIK of Graz University of
+    Technology."
+
+   Alternately, this acknowledgment may appear in the software itself, if and
+   wherever such third-party acknowledgments normally appear.
+
+4. The names "Graz University of Technology" and "IAIK of Graz University of
+   Technology" must not be used to endorse or promote products derived from this
+   software without prior written permission.
+
+5. Products derived from this software may not be called "IAIK PKCS Wrapper",
+   nor may "IAIK" appear in their name, without prior written permission of
+   Graz University of Technology.
+
+THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESSED OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+LICENSOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java/legal/jdk.crypto.ec/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.crypto.ec/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.crypto.ec/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.crypto.ec/ASSEMBLY_EXCEPTION b/java/legal/jdk.crypto.ec/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.crypto.ec/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.crypto.ec/LICENSE b/java/legal/jdk.crypto.ec/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.crypto.ec/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.crypto.mscapi/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.crypto.mscapi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.crypto.mscapi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.crypto.mscapi/ASSEMBLY_EXCEPTION b/java/legal/jdk.crypto.mscapi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.crypto.mscapi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.crypto.mscapi/LICENSE b/java/legal/jdk.crypto.mscapi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.crypto.mscapi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.dynalink/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.dynalink/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.dynalink/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.dynalink/ASSEMBLY_EXCEPTION b/java/legal/jdk.dynalink/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.dynalink/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.dynalink/LICENSE b/java/legal/jdk.dynalink/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.dynalink/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.dynalink/dynalink.md b/java/legal/jdk.dynalink/dynalink.md new file mode 100644 index 0000000000000000000000000000000000000000..309efc7cbd864a29ce63e846c6411c090f5a63a7 --- /dev/null +++ b/java/legal/jdk.dynalink/dynalink.md @@ -0,0 +1,32 @@ +## Dynalink v.5 + +### Dynalink License +
+
+Copyright (c) 2009-2013, Attila Szegedi
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+* Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+* Neither the name of the copyright holder nor the names of
+  contributors may be used to endorse or promote products derived from
+  this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER
+BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java/legal/jdk.editpad/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.editpad/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.editpad/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.editpad/ASSEMBLY_EXCEPTION b/java/legal/jdk.editpad/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.editpad/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.editpad/LICENSE b/java/legal/jdk.editpad/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.editpad/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.graal.compiler.management/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.graal.compiler.management/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.graal.compiler.management/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.graal.compiler.management/ASSEMBLY_EXCEPTION b/java/legal/jdk.graal.compiler.management/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.graal.compiler.management/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.graal.compiler.management/LICENSE b/java/legal/jdk.graal.compiler.management/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.graal.compiler.management/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.graal.compiler/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.graal.compiler/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.graal.compiler/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.graal.compiler/ASSEMBLY_EXCEPTION b/java/legal/jdk.graal.compiler/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.graal.compiler/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.graal.compiler/LICENSE b/java/legal/jdk.graal.compiler/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.graal.compiler/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.hotspot.agent/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.hotspot.agent/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.hotspot.agent/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.hotspot.agent/ASSEMBLY_EXCEPTION b/java/legal/jdk.hotspot.agent/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.hotspot.agent/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.hotspot.agent/LICENSE b/java/legal/jdk.hotspot.agent/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.hotspot.agent/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.httpserver/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.httpserver/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.httpserver/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.httpserver/ASSEMBLY_EXCEPTION b/java/legal/jdk.httpserver/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.httpserver/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.httpserver/LICENSE b/java/legal/jdk.httpserver/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.httpserver/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.incubator.vector/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.incubator.vector/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.incubator.vector/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.incubator.vector/ASSEMBLY_EXCEPTION b/java/legal/jdk.incubator.vector/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.incubator.vector/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.incubator.vector/LICENSE b/java/legal/jdk.incubator.vector/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.incubator.vector/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.internal.ed/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.internal.ed/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.internal.ed/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.internal.ed/ASSEMBLY_EXCEPTION b/java/legal/jdk.internal.ed/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.internal.ed/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.internal.ed/LICENSE b/java/legal/jdk.internal.ed/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.internal.ed/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.internal.jvmstat/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.internal.jvmstat/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.internal.jvmstat/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.internal.jvmstat/ASSEMBLY_EXCEPTION b/java/legal/jdk.internal.jvmstat/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.internal.jvmstat/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.internal.jvmstat/LICENSE b/java/legal/jdk.internal.jvmstat/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.internal.jvmstat/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.internal.le/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.internal.le/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.internal.le/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.internal.le/ASSEMBLY_EXCEPTION b/java/legal/jdk.internal.le/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.internal.le/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.internal.le/LICENSE b/java/legal/jdk.internal.le/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.internal.le/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.internal.le/jline.md b/java/legal/jdk.internal.le/jline.md new file mode 100644 index 0000000000000000000000000000000000000000..5b813c0af2fafc172462cebd492a8e77c32f6bd6 --- /dev/null +++ b/java/legal/jdk.internal.le/jline.md @@ -0,0 +1,41 @@ +## JLine v3.26.1 + +### JLine License +
+
+Copyright (c) 2002-2023, the original author or authors.
+All rights reserved.
+
+https://opensource.org/licenses/BSD-3-Clause
+
+Redistribution and use in source and binary forms, with or
+without modification, are permitted provided that the following
+conditions are met:
+
+Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer
+in the documentation and/or other materials provided with
+the distribution.
+
+Neither the name of JLine nor the names of its contributors
+may be used to endorse or promote products derived from this
+software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
+BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java/legal/jdk.internal.md/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.internal.md/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.internal.md/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.internal.md/ASSEMBLY_EXCEPTION b/java/legal/jdk.internal.md/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.internal.md/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.internal.md/LICENSE b/java/legal/jdk.internal.md/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.internal.md/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.internal.md/commonmark.md b/java/legal/jdk.internal.md/commonmark.md new file mode 100644 index 0000000000000000000000000000000000000000..1fd2d7eb01b1e4431d2893bf6e6a81f54799a554 --- /dev/null +++ b/java/legal/jdk.internal.md/commonmark.md @@ -0,0 +1,29 @@ +## CommonMark 0.22.0 + +### CommonMark License +``` +Copyright (c) 2015, Atlassian Pty Ltd +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +* Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +``` diff --git a/java/legal/jdk.internal.opt/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.internal.opt/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.internal.opt/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.internal.opt/ASSEMBLY_EXCEPTION b/java/legal/jdk.internal.opt/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.internal.opt/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.internal.opt/LICENSE b/java/legal/jdk.internal.opt/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.internal.opt/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.internal.opt/jopt-simple.md b/java/legal/jdk.internal.opt/jopt-simple.md new file mode 100644 index 0000000000000000000000000000000000000000..c08b3b4b94c59d8dc4fb8a31e574f08e62419d04 --- /dev/null +++ b/java/legal/jdk.internal.opt/jopt-simple.md @@ -0,0 +1,27 @@ +## jopt-simple v5.0.4 + +### MIT License +
+
+Copyright (c) 2004-2015 Paul R. Holser, Jr.
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+OTHER DEALINGS IN THE SOFTWARE.
+
+
diff --git a/java/legal/jdk.internal.vm.ci/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.internal.vm.ci/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.internal.vm.ci/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.internal.vm.ci/ASSEMBLY_EXCEPTION b/java/legal/jdk.internal.vm.ci/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.internal.vm.ci/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.internal.vm.ci/LICENSE b/java/legal/jdk.internal.vm.ci/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.internal.vm.ci/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.jartool/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.jartool/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.jartool/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.jartool/ASSEMBLY_EXCEPTION b/java/legal/jdk.jartool/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.jartool/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.jartool/LICENSE b/java/legal/jdk.jartool/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java/legal/jdk.jartool/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java/legal/jdk.javadoc/ADDITIONAL_LICENSE_INFO b/java/legal/jdk.javadoc/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java/legal/jdk.javadoc/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java/legal/jdk.javadoc/ASSEMBLY_EXCEPTION b/java/legal/jdk.javadoc/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java/legal/jdk.javadoc/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java/legal/jdk.javadoc/dejavufonts.md b/java/legal/jdk.javadoc/dejavufonts.md new file mode 100644 index 0000000000000000000000000000000000000000..8c9e3cf3e3ae6f73bc815ba1f6e2491e2a5f8651 --- /dev/null +++ b/java/legal/jdk.javadoc/dejavufonts.md @@ -0,0 +1,191 @@ +## DejaVu fonts v2.37 + +### DejaVu License +
+Fonts are (c) Bitstream (see below). DejaVu changes are in public domain.
+Glyphs imported from Arev fonts are (c) Tavmjong Bah (see below)
+
+
+Bitstream Vera Fonts Copyright
+------------------------------
+
+Copyright (c) 2003 by Bitstream, Inc. All Rights Reserved. Bitstream Vera is
+a trademark of Bitstream, Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of the fonts accompanying this license ("Fonts") and associated
+documentation files (the "Font Software"), to reproduce and distribute the
+Font Software, including without limitation the rights to use, copy, merge,
+publish, distribute, and/or sell copies of the Font Software, and to permit
+persons to whom the Font Software is furnished to do so, subject to the
+following conditions:
+
+The above copyright and trademark notices and this permission notice shall
+be included in all copies of one or more of the Font Software typefaces.
+
+The Font Software may be modified, altered, or added to, and in particular
+the designs of glyphs or characters in the Fonts may be modified and
+additional glyphs or characters may be added to the Fonts, only if the fonts
+are renamed to names not containing either the words "Bitstream" or the word
+"Vera".
+
+This License becomes null and void to the extent applicable to Fonts or Font
+Software that has been modified and is distributed under the "Bitstream
+Vera" names.
+
+The Font Software may be sold as part of a larger software package but no
+copy of one or more of the Font Software typefaces may be sold by itself.
+
+THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF COPYRIGHT, PATENT,
+TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL BITSTREAM OR THE GNOME
+FOUNDATION BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, INCLUDING
+ANY GENERAL, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES,
+WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+THE USE OR INABILITY TO USE THE FONT SOFTWARE OR FROM OTHER DEALINGS IN THE
+FONT SOFTWARE.
+
+Except as contained in this notice, the names of Gnome, the Gnome
+Foundation, and Bitstream Inc., shall not be used in advertising or
+otherwise to promote the sale, use or other dealings in this Font Software
+without prior written authorization from the Gnome Foundation or Bitstream
+Inc., respectively. For further information, contact: fonts at gnome dot
+org.
+
+Arev Fonts Copyright
+------------------------------
+
+Copyright (c) 2006 by Tavmjong Bah. All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of the fonts accompanying this license ("Fonts") and
+associated documentation files (the "Font Software"), to reproduce
+and distribute the modifications to the Bitstream Vera Font Software,
+including without limitation the rights to use, copy, merge, publish,
+distribute, and/or sell copies of the Font Software, and to permit
+persons to whom the Font Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright and trademark notices and this permission notice
+shall be included in all copies of one or more of the Font Software
+typefaces.
+
+The Font Software may be modified, altered, or added to, and in
+particular the designs of glyphs or characters in the Fonts may be
+modified and additional glyphs or characters may be added to the
+Fonts, only if the fonts are renamed to names not containing either
+the words "Tavmjong Bah" or the word "Arev".
+
+This License becomes null and void to the extent applicable to Fonts
+or Font Software that has been modified and is distributed under the
+"Tavmjong Bah Arev" names.
+
+The Font Software may be sold as part of a larger software package but
+no copy of one or more of the Font Software typefaces may be sold by
+itself.
+
+THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
+OF COPYRIGHT, PATENT, TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL
+TAVMJONG BAH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+INCLUDING ANY GENERAL, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
+DAMAGES, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+FROM, OUT OF THE USE OR INABILITY TO USE THE FONT SOFTWARE OR FROM
+OTHER DEALINGS IN THE FONT SOFTWARE.
+
+Except as contained in this notice, the name of Tavmjong Bah shall not
+be used in advertising or otherwise to promote the sale, use or other
+dealings in this Font Software without prior written authorization
+from Tavmjong Bah. For further information, contact: tavmjong @ free
+. fr.
+
+TeX Gyre DJV Math
+-----------------
+Fonts are (c) Bitstream (see below). DejaVu changes are in public domain.
+
+Math extensions done by B. Jackowski, P. Strzelczyk and P. Pianowski
+(on behalf of TeX users groups) are in public domain.
+
+Letters imported from Euler Fraktur from AMSfonts are (c) American
+Mathematical Society (see below).
+Bitstream Vera Fonts Copyright
+Copyright (c) 2003 by Bitstream, Inc. All Rights Reserved. Bitstream Vera
+is a trademark of Bitstream, Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of the fonts accompanying this license ("Fonts") and associated
+documentation
+files (the "Font Software"), to reproduce and distribute the Font Software,
+including without limitation the rights to use, copy, merge, publish,
+distribute,
+and/or sell copies of the Font Software, and to permit persons  to whom
+the Font Software is furnished to do so, subject to the following
+conditions:
+
+The above copyright and trademark notices and this permission notice
+shall be
+included in all copies of one or more of the Font Software typefaces.
+
+The Font Software may be modified, altered, or added to, and in particular
+the designs of glyphs or characters in the Fonts may be modified and
+additional
+glyphs or characters may be added to the Fonts, only if the fonts are
+renamed
+to names not containing either the words "Bitstream" or the word "Vera".
+
+This License becomes null and void to the extent applicable to Fonts or
+Font Software
+that has been modified and is distributed under the "Bitstream Vera"
+names.
+
+The Font Software may be sold as part of a larger software package but
+no copy
+of one or more of the Font Software typefaces may be sold by itself.
+
+THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF COPYRIGHT, PATENT,
+TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL BITSTREAM OR THE GNOME
+FOUNDATION
+BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, INCLUDING ANY GENERAL,
+SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHETHER IN AN
+ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF THE USE OR
+INABILITY TO USE
+THE FONT SOFTWARE OR FROM OTHER DEALINGS IN THE FONT SOFTWARE.
+Except as contained in this notice, the names of GNOME, the GNOME
+Foundation,
+and Bitstream Inc., shall not be used in advertising or otherwise to promote
+the sale, use or other dealings in this Font Software without prior written
+authorization from the GNOME Foundation or Bitstream Inc., respectively.
+For further information, contact: fonts at gnome dot org.
+
+AMSFonts (v. 2.2) copyright
+
+The PostScript Type 1 implementation of the AMSFonts produced by and
+previously distributed by Blue Sky Research and Y&Y, Inc. are now freely
+available for general use. This has been accomplished through the
+cooperation
+of a consortium of scientific publishers with Blue Sky Research and Y&Y.
+Members of this consortium include:
+
+Elsevier Science IBM Corporation Society for Industrial and Applied
+Mathematics (SIAM) Springer-Verlag American Mathematical Society (AMS)
+
+In order to assure the authenticity of these fonts, copyright will be
+held by
+the American Mathematical Society. This is not meant to restrict in any way
+the legitimate use of the fonts, such as (but not limited to) electronic
+distribution of documents containing these fonts, inclusion of these fonts
+into other public domain or commercial font collections or computer
+applications, use of the outline data to create derivative fonts and/or
+faces, etc. However, the AMS does require that the AMS copyright notice be
+removed from any derivative versions of the fonts which have been altered in
+any way. In addition, to ensure the fidelity of TeX documents using Computer
+Modern fonts, Professor Donald Knuth, creator of the Computer Modern faces,
+has requested that any alterations which yield different font metrics be
+given a different name.
+
+
diff --git a/java/lib/classlist b/java/lib/classlist new file mode 100644 index 0000000000000000000000000000000000000000..704479c1f5ffb22e7e8b3ea0f91c44ac20498581 --- /dev/null +++ b/java/lib/classlist @@ -0,0 +1,1708 @@ +# NOTE: Do not modify this file. +# +# This file is generated via the -XX:DumpLoadedClassList= option +# and is used at CDS archive dump time (see -Xshare:dump). +# +java/io/BufferedInputStream +java/io/BufferedOutputStream +java/io/BufferedWriter +java/io/ByteArrayInputStream +java/io/ByteArrayOutputStream +java/io/Closeable +java/io/DataInput +java/io/DataInputStream +java/io/DataOutput +java/io/DefaultFileSystem +java/io/File +java/io/File$PathStatus +java/io/FileCleanable +java/io/FileDescriptor +java/io/FileDescriptor$1 +java/io/FileInputStream +java/io/FileInputStream$1 +java/io/FileOutputStream +java/io/FilePermission +java/io/FileSystem +java/io/FilterInputStream +java/io/FilterOutputStream +java/io/Flushable +java/io/InputStream +java/io/ObjectStreamField +java/io/OutputStream +java/io/OutputStreamWriter +java/io/PrintStream +java/io/PrintStream$1 +java/io/RandomAccessFile +java/io/RandomAccessFile$1 +java/io/RandomAccessFile$2 +java/io/Serializable +java/io/WinNTFileSystem +java/io/Writer +java/lang/AbstractStringBuilder +java/lang/Appendable +java/lang/ApplicationShutdownHooks +java/lang/ApplicationShutdownHooks$1 +java/lang/ArithmeticException +java/lang/ArrayStoreException +java/lang/AssertionStatusDirectives +java/lang/AutoCloseable +java/lang/BaseVirtualThread +java/lang/Boolean +java/lang/BootstrapMethodError +java/lang/Byte +java/lang/CharSequence +java/lang/Character +java/lang/Character$CharacterCache +java/lang/CharacterData +java/lang/CharacterData00 +java/lang/CharacterDataLatin1 +java/lang/Class +java/lang/Class$1 +java/lang/Class$3 +java/lang/Class$Atomic +java/lang/Class$ReflectionData +java/lang/ClassCastException +java/lang/ClassFrameInfo +java/lang/ClassLoader +java/lang/ClassLoader$ParallelLoaders +java/lang/ClassNotFoundException +java/lang/Cloneable +java/lang/Comparable +java/lang/CompoundEnumeration +java/lang/Double +java/lang/Enum +java/lang/Enum$EnumDesc +java/lang/Error +java/lang/Exception +java/lang/Float +java/lang/IllegalArgumentException +java/lang/IllegalMonitorStateException +java/lang/IncompatibleClassChangeError +java/lang/Integer +java/lang/Integer$IntegerCache +java/lang/InternalError +java/lang/Iterable +java/lang/LinkageError +java/lang/LiveStackFrame +java/lang/LiveStackFrameInfo +java/lang/Long +java/lang/Long$LongCache +java/lang/Math +java/lang/Module +java/lang/Module$ArchivedData +java/lang/Module$EnableNativeAccess +java/lang/ModuleLayer +java/lang/ModuleLayer$Controller +java/lang/NamedPackage +java/lang/NoClassDefFoundError +java/lang/NoSuchFieldException +java/lang/NoSuchMethodError +java/lang/NoSuchMethodException +java/lang/NullPointerException +java/lang/Number +java/lang/Object +java/lang/OutOfMemoryError +java/lang/Package +java/lang/Package$VersionInfo +java/lang/PublicMethods$Key +java/lang/PublicMethods$MethodList +java/lang/Readable +java/lang/Record +java/lang/ReflectiveOperationException +java/lang/Runnable +java/lang/Runtime +java/lang/Runtime$Version +java/lang/RuntimeException +java/lang/RuntimePermission +java/lang/SecurityManager +java/lang/Short +java/lang/Shutdown +java/lang/Shutdown$Lock +java/lang/StackFrameInfo +java/lang/StackOverflowError +java/lang/StackStreamFactory$AbstractStackWalker +java/lang/StackTraceElement +java/lang/StackWalker +java/lang/StackWalker$StackFrame +java/lang/StrictMath +java/lang/String +java/lang/String$CaseInsensitiveComparator +java/lang/StringBuffer +java/lang/StringBuilder +java/lang/StringCoding +java/lang/StringConcatHelper +java/lang/StringLatin1 +java/lang/StringUTF16 +java/lang/System +java/lang/System$2 +java/lang/System$In +java/lang/System$Logger +java/lang/System$LoggerFinder +java/lang/System$Out +java/lang/Terminator +java/lang/Terminator$1 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+sun/nio/fs/AbstractFileSystemProvider +sun/nio/fs/DefaultFileSystemProvider +sun/nio/fs/DynamicFileAttributeView +sun/nio/fs/NativeBuffer +sun/nio/fs/NativeBuffer$Deallocator +sun/nio/fs/NativeBuffers +sun/nio/fs/NativeBuffers$1 +sun/nio/fs/Util +sun/nio/fs/WindowsFileAttributeViews +sun/nio/fs/WindowsFileAttributeViews$Basic +sun/nio/fs/WindowsFileAttributes +sun/nio/fs/WindowsFileSystem +sun/nio/fs/WindowsFileSystemProvider +sun/nio/fs/WindowsNativeDispatcher +sun/nio/fs/WindowsNativeDispatcher$Account +sun/nio/fs/WindowsNativeDispatcher$AclInformation +sun/nio/fs/WindowsNativeDispatcher$CompletionStatus +sun/nio/fs/WindowsNativeDispatcher$DiskFreeSpace +sun/nio/fs/WindowsNativeDispatcher$FirstFile +sun/nio/fs/WindowsNativeDispatcher$FirstStream +sun/nio/fs/WindowsNativeDispatcher$VolumeInformation +sun/nio/fs/WindowsPath +sun/nio/fs/WindowsPathParser +sun/nio/fs/WindowsPathParser$Result +sun/nio/fs/WindowsPathType +sun/nio/fs/WindowsUriSupport +sun/reflect/annotation/AnnotationParser +sun/security/action/GetBooleanAction +sun/security/action/GetIntegerAction +sun/security/action/GetPropertyAction +sun/security/util/Debug +sun/security/util/FilePermCompat +sun/security/util/LazyCodeSourcePermissionCollection +sun/security/util/SecurityProperties +sun/security/util/SignatureFileVerifier +sun/text/resources/cldr/FormatData +sun/util/PreHashedMap +sun/util/calendar/AbstractCalendar +sun/util/calendar/BaseCalendar +sun/util/calendar/BaseCalendar$Date +sun/util/calendar/CalendarDate +sun/util/calendar/CalendarSystem +sun/util/calendar/CalendarSystem$GregorianHolder +sun/util/calendar/CalendarUtils +sun/util/calendar/Gregorian +sun/util/calendar/Gregorian$Date +sun/util/calendar/ZoneInfo +sun/util/calendar/ZoneInfoFile +sun/util/calendar/ZoneInfoFile$1 +sun/util/calendar/ZoneInfoFile$ZoneOffsetTransitionRule +sun/util/cldr/CLDRBaseLocaleDataMetaInfo +sun/util/cldr/CLDRCalendarDataProviderImpl +sun/util/cldr/CLDRLocaleProviderAdapter +sun/util/locale/BaseLocale +sun/util/locale/BaseLocale$1 +sun/util/locale/InternalLocaleBuilder +sun/util/locale/InternalLocaleBuilder$CaseInsensitiveChar +sun/util/locale/LanguageTag +sun/util/locale/LocaleUtils +sun/util/locale/ParseStatus +sun/util/locale/StringTokenIterator +sun/util/locale/provider/AvailableLanguageTags +sun/util/locale/provider/CalendarDataProviderImpl +sun/util/locale/provider/CalendarDataUtility +sun/util/locale/provider/CalendarDataUtility$CalendarWeekParameterGetter +sun/util/locale/provider/CalendarProviderImpl +sun/util/locale/provider/DateFormatProviderImpl +sun/util/locale/provider/DateFormatSymbolsProviderImpl +sun/util/locale/provider/DecimalFormatSymbolsProviderImpl +sun/util/locale/provider/JRELocaleProviderAdapter +sun/util/locale/provider/LocaleDataMetaInfo +sun/util/locale/provider/LocaleProviderAdapter +sun/util/locale/provider/LocaleProviderAdapter$Type +sun/util/locale/provider/LocaleResources +sun/util/locale/provider/LocaleResources$ResourceReference +sun/util/locale/provider/LocaleServiceProviderPool +sun/util/locale/provider/LocaleServiceProviderPool$LocalizedObjectGetter +sun/util/locale/provider/NumberFormatProviderImpl +sun/util/locale/provider/ResourceBundleBasedAdapter +sun/util/logging/PlatformLogger$Bridge +sun/util/logging/PlatformLogger$ConfigurableBridge +sun/util/logging/internal/LoggingProviderImpl +sun/util/logging/internal/LoggingProviderImpl$LogManagerAccess +sun/util/resources/Bundles +sun/util/resources/Bundles$1 +sun/util/resources/Bundles$BundleReference +sun/util/resources/Bundles$CacheKey +sun/util/resources/Bundles$CacheKeyReference +sun/util/resources/Bundles$Strategy +sun/util/resources/LocaleData +sun/util/resources/LocaleData$1 +sun/util/resources/LocaleData$LocaleDataStrategy +sun/util/resources/cldr/CalendarData +sun/util/spi/CalendarProvider +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder delegate L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder delegate L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L3_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJL3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LLILL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LLJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getDouble LL_D +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getInt LL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getLong LL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getReference LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeInterface L3_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L10_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L11_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L12_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3D_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3F_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3ILL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3I_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3I_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3I_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L4_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L4_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L5_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L6_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L9_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLDL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLD_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLFL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLF_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLII_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLII_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLILILILLI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL4_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL5_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLII_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LL_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L10_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L11_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L12_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3DL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3D_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3IL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3I_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3I_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L4J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L5J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L5_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L6J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L6_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L9_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LD_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LF_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LI3_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LII_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LILILILLIL_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LI_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJL3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LLILL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LLI_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LLJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStaticInit L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStaticInit LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStaticInit L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeVirtual L3_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeVirtual LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LII_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LILILILLI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invoke_MT LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod DLL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod DL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod FLL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod FL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod IIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod ILILILLIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod ILL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod IL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod JJL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod JL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L10_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L11_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L9_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LDL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LFL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LIL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_D LD_D +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_I LI_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_J LJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_L LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_D L_D +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_I L_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_J L_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_L L_L +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_D +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_DL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_I +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_IL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_L +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LJ +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLJ +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLJ +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.SimpleMethodHandle +@lambda-proxy java/lang/classfile/ClassBuilder accept (Ljava/util/function/Consumer;)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeStatic java/lang/classfile/ClassBuilder lambda$withMethodBody$2 (Ljava/util/function/Consumer;Ljava/lang/classfile/MethodBuilder;)V (Ljava/lang/classfile/MethodBuilder;)V +@lambda-proxy java/lang/module/ModuleDescriptor$Builder accept ()Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeStatic jdk/internal/module/Checks requirePackageName (Ljava/lang/String;)Ljava/lang/String; (Ljava/lang/String;)V +@lambda-proxy java/lang/module/ModuleFinder$2 accept (Ljava/lang/module/ModuleFinder$2;Ljava/lang/String;)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeVirtual java/lang/module/ModuleFinder$2 lambda$find$1 (Ljava/lang/String;Ljava/lang/module/ModuleReference;)V (Ljava/lang/module/ModuleReference;)V +@lambda-proxy java/lang/module/ModuleFinder$2 accept (Ljava/lang/module/ModuleFinder$2;Ljava/util/Set;)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeVirtual java/lang/module/ModuleFinder$2 lambda$findAll$3 (Ljava/util/Set;Ljava/lang/module/ModuleReference;)V (Ljava/lang/module/ModuleReference;)V +@lambda-proxy java/lang/module/ModuleFinder$2 apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/lang/module/ModuleFinder$2 lambda$findAll$2 (Ljava/lang/module/ModuleFinder;)Ljava/util/stream/Stream; (Ljava/lang/module/ModuleFinder;)Ljava/util/stream/Stream; +@lambda-proxy java/lang/module/ModuleFinder$2 apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy java/lang/module/ModuleFinder$2 apply (Ljava/lang/String;)Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/lang/module/ModuleFinder$2 lambda$find$0 (Ljava/lang/String;Ljava/lang/module/ModuleFinder;)Ljava/util/Optional; (Ljava/lang/module/ModuleFinder;)Ljava/util/Optional; +@lambda-proxy java/lang/runtime/SwitchBootstraps accept (I[Ljava/lang/Object;ILjava/lang/Class;ILjava/util/List;Ljava/util/List;I)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeStatic java/lang/runtime/SwitchBootstraps lambda$generateTypeSwitchSkeleton$2 (I[Ljava/lang/Object;ILjava/lang/Class;ILjava/util/List;Ljava/util/List;ILjava/lang/classfile/CodeBuilder;)V (Ljava/lang/classfile/CodeBuilder;)V +@lambda-proxy java/lang/runtime/SwitchBootstraps accept (Ljava/lang/Class;[Ljava/lang/Object;Ljava/util/List;Ljava/util/List;)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeStatic java/lang/runtime/SwitchBootstraps lambda$generateTypeSwitch$3 (Ljava/lang/Class;[Ljava/lang/Object;Ljava/util/List;Ljava/util/List;Ljava/lang/classfile/ClassBuilder;)V (Ljava/lang/classfile/ClassBuilder;)V +@lambda-proxy java/security/Security run ()Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeStatic java/security/Security lambda$static$0 ()Ljava/lang/Object; ()Ljava/lang/Object; +@lambda-proxy java/time/ZoneOffset apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/time/ZoneOffset lambda$ofTotalSeconds$0 (Ljava/lang/Integer;)Ljava/time/ZoneOffset; (Ljava/lang/Integer;)Ljava/time/ZoneOffset; +@lambda-proxy java/time/format/DateTimeFormatter queryFrom ()Ljava/time/temporal/TemporalQuery; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Object; REF_invokeStatic java/time/format/DateTimeFormatter lambda$static$0 (Ljava/time/temporal/TemporalAccessor;)Ljava/time/Period; (Ljava/time/temporal/TemporalAccessor;)Ljava/time/Period; +@lambda-proxy java/time/format/DateTimeFormatter queryFrom ()Ljava/time/temporal/TemporalQuery; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Object; REF_invokeStatic java/time/format/DateTimeFormatter lambda$static$1 (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Boolean; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Boolean; +@lambda-proxy java/time/format/DateTimeFormatterBuilder queryFrom ()Ljava/time/temporal/TemporalQuery; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Object; REF_invokeStatic java/time/format/DateTimeFormatterBuilder lambda$static$0 (Ljava/time/temporal/TemporalAccessor;)Ljava/time/ZoneId; (Ljava/time/temporal/TemporalAccessor;)Ljava/time/ZoneId; +@lambda-proxy java/util/ResourceBundle$Control apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/ResourceBundle$Control createCandidateList (Lsun/util/locale/BaseLocale;)Ljava/util/List; (Lsun/util/locale/BaseLocale;)Ljava/util/List; +@lambda-proxy java/util/ResourceBundle$Control get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/concurrent/ConcurrentHashMap ()V ()Ljava/util/Map; +@lambda-proxy java/util/ResourceBundle$ResourceBundleProviderHelper run (Ljava/lang/reflect/Constructor;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeStatic java/util/ResourceBundle$ResourceBundleProviderHelper lambda$newResourceBundle$0 (Ljava/lang/reflect/Constructor;)Ljava/lang/Void; ()Ljava/lang/Void; +@lambda-proxy java/util/logging/Level apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/logging/Level$KnownLevel mirrored ()Ljava/util/Optional; (Ljava/util/logging/Level$KnownLevel;)Ljava/util/Optional; +@lambda-proxy java/util/logging/Level$KnownLevel apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/logging/Level$KnownLevel lambda$add$3 (Ljava/lang/String;)Ljava/util/List; (Ljava/lang/String;)Ljava/util/List; +@lambda-proxy java/util/logging/Level$KnownLevel apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/logging/Level$KnownLevel lambda$add$4 (Ljava/lang/Integer;)Ljava/util/List; (Ljava/lang/Integer;)Ljava/util/List; +@lambda-proxy java/util/logging/Level$KnownLevel apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy java/util/regex/CharPredicates is ()Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/CharPredicates lambda$ASCII_DIGIT$18 (I)Z (I)Z +@lambda-proxy java/util/regex/CharPredicates is ()Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/CharPredicates lambda$ASCII_SPACE$20 (I)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (I)Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$Single$14 (II)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (II)Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$Range$17 (III)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (Ljava/util/regex/Pattern$CharPredicate;)Ljava/util/regex/Pattern$CharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$negate$7 (Ljava/util/regex/Pattern$CharPredicate;I)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (Ljava/util/regex/Pattern$CharPredicate;Ljava/util/regex/Pattern$CharPredicate;)Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$union$3 (Ljava/util/regex/Pattern$CharPredicate;Ljava/util/regex/Pattern$CharPredicate;I)Z (I)Z +@lambda-proxy java/util/stream/Collectors accept ()Ljava/util/function/BiConsumer; (Ljava/lang/Object;Ljava/lang/Object;)V REF_invokeInterface java/util/Set add (Ljava/lang/Object;)Z (Ljava/util/HashSet;Ljava/lang/Object;)V +@lambda-proxy java/util/stream/Collectors accept ()Ljava/util/function/BiConsumer; (Ljava/lang/Object;Ljava/lang/Object;)V REF_invokeVirtual java/util/StringJoiner add (Ljava/lang/CharSequence;)Ljava/util/StringJoiner; (Ljava/util/StringJoiner;Ljava/lang/CharSequence;)V +@lambda-proxy java/util/stream/Collectors accept (Ljava/util/function/BiConsumer;Ljava/util/function/Predicate;)Ljava/util/function/BiConsumer; (Ljava/lang/Object;Ljava/lang/Object;)V REF_invokeStatic java/util/stream/Collectors lambda$partitioningBy$62 (Ljava/util/function/BiConsumer;Ljava/util/function/Predicate;Ljava/util/stream/Collectors$Partition;Ljava/lang/Object;)V (Ljava/util/stream/Collectors$Partition;Ljava/lang/Object;)V +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/BinaryOperator; (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$toSet$7 (Ljava/util/HashSet;Ljava/util/HashSet;)Ljava/util/HashSet; (Ljava/util/HashSet;Ljava/util/HashSet;)Ljava/util/HashSet; +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/BinaryOperator; (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/StringJoiner merge (Ljava/util/StringJoiner;)Ljava/util/StringJoiner; (Ljava/util/StringJoiner;Ljava/util/StringJoiner;)Ljava/util/StringJoiner; +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$castingIdentity$2 (Ljava/lang/Object;)Ljava/lang/Object; (Ljava/lang/Object;)Ljava/lang/Object; +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/StringJoiner toString ()Ljava/lang/String; (Ljava/util/StringJoiner;)Ljava/lang/String; +@lambda-proxy java/util/stream/Collectors apply (Ljava/util/function/BinaryOperator;)Ljava/util/function/BinaryOperator; (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$partitioningBy$63 (Ljava/util/function/BinaryOperator;Ljava/util/stream/Collectors$Partition;Ljava/util/stream/Collectors$Partition;)Ljava/util/stream/Collectors$Partition; (Ljava/util/stream/Collectors$Partition;Ljava/util/stream/Collectors$Partition;)Ljava/util/stream/Collectors$Partition; +@lambda-proxy java/util/stream/Collectors get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/HashSet ()V ()Ljava/util/HashSet; +@lambda-proxy java/util/stream/Collectors get (Ljava/lang/CharSequence;Ljava/lang/CharSequence;Ljava/lang/CharSequence;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$joining$11 (Ljava/lang/CharSequence;Ljava/lang/CharSequence;Ljava/lang/CharSequence;)Ljava/util/StringJoiner; ()Ljava/util/StringJoiner; +@lambda-proxy java/util/stream/Collectors get (Ljava/util/stream/Collector;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$partitioningBy$64 (Ljava/util/stream/Collector;)Ljava/util/stream/Collectors$Partition; ()Ljava/util/stream/Collectors$Partition; +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/stream/FindOps$FindSink$OfRef ()V ()Ljava/util/stream/TerminalSink; +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/stream/FindOps$FindSink$OfRef ()V ()Ljava/util/stream/TerminalSink; +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeVirtual java/util/Optional isPresent ()Z (Ljava/util/Optional;)Z +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeVirtual java/util/Optional isPresent ()Z (Ljava/util/Optional;)Z +@lambda-proxy java/util/stream/MatchOps get (Ljava/util/stream/MatchOps$MatchKind;Ljava/util/function/Predicate;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic java/util/stream/MatchOps lambda$makeRef$0 (Ljava/util/stream/MatchOps$MatchKind;Ljava/util/function/Predicate;)Ljava/util/stream/MatchOps$BooleanTerminalSink; ()Ljava/util/stream/MatchOps$BooleanTerminalSink; +@lambda-proxy java/util/zip/ZipFile apply (Ljava/util/zip/ZipFile;)Ljava/util/function/IntFunction; (I)Ljava/lang/Object; REF_invokeVirtual java/util/zip/ZipFile lambda$jarStream$1 (I)Ljava/util/jar/JarEntry; (I)Ljava/util/jar/JarEntry; +@lambda-proxy jdk/internal/module/DefaultRoots apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/lang/module/ModuleDescriptor name ()Ljava/lang/String; (Ljava/lang/module/ModuleDescriptor;)Ljava/lang/String; +@lambda-proxy jdk/internal/module/DefaultRoots apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/lang/module/ModuleReference descriptor ()Ljava/lang/module/ModuleDescriptor; (Ljava/lang/module/ModuleReference;)Ljava/lang/module/ModuleDescriptor; +@lambda-proxy jdk/internal/module/DefaultRoots test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/DefaultRoots lambda$compute$0 (Ljava/lang/module/ModuleReference;)Z (Ljava/lang/module/ModuleReference;)Z +@lambda-proxy jdk/internal/module/DefaultRoots test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/DefaultRoots lambda$exportsAPI$2 (Ljava/lang/module/ModuleDescriptor$Exports;)Z (Ljava/lang/module/ModuleDescriptor$Exports;)Z +@lambda-proxy jdk/internal/module/DefaultRoots test (Ljava/lang/module/ModuleFinder;)Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/DefaultRoots lambda$compute$1 (Ljava/lang/module/ModuleFinder;Ljava/lang/module/ModuleDescriptor;)Z (Ljava/lang/module/ModuleDescriptor;)Z +@lambda-proxy jdk/internal/module/ModulePath apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy jdk/internal/module/ModulePath apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy jdk/internal/module/ModulePath apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/zip/ZipEntry getName ()Ljava/lang/String; (Ljava/util/jar/JarEntry;)Ljava/lang/String; +@lambda-proxy jdk/internal/module/ModulePath apply (Ljdk/internal/module/ModulePath;)Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual jdk/internal/module/ModulePath toPackageName (Ljava/lang/String;)Ljava/util/Optional; (Ljava/lang/String;)Ljava/util/Optional; +@lambda-proxy jdk/internal/module/ModulePath apply (Ljdk/internal/module/ModulePath;)Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual jdk/internal/module/ModulePath toServiceName (Ljava/lang/String;)Ljava/util/Optional; (Ljava/lang/String;)Ljava/util/Optional; +@lambda-proxy jdk/internal/module/ModulePath test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/ModulePath lambda$deriveModuleDescriptor$2 (Ljava/util/jar/JarEntry;)Z (Ljava/util/jar/JarEntry;)Z +@lambda-proxy jdk/internal/module/ModulePath test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/ModulePath lambda$deriveModuleDescriptor$3 (Ljava/lang/String;)Z (Ljava/lang/String;)Z +@lambda-proxy jdk/internal/module/ModulePath test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/ModulePath lambda$deriveModuleDescriptor$4 (Ljava/lang/String;)Z (Ljava/lang/String;)Z +@lambda-proxy jdk/internal/module/ModuleReferences generate (Ljava/util/function/Supplier;)Ljdk/internal/module/ModuleHashes$HashSupplier; (Ljava/lang/String;)[B REF_invokeStatic jdk/internal/module/ModuleReferences lambda$newJarModule$1 (Ljava/util/function/Supplier;Ljava/lang/String;)[B (Ljava/lang/String;)[B +@lambda-proxy jdk/internal/module/ModuleReferences get (Ljava/nio/file/Path;Ljava/net/URI;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic jdk/internal/module/ModuleReferences lambda$newJarModule$0 (Ljava/nio/file/Path;Ljava/net/URI;)Ljava/lang/module/ModuleReader; ()Ljava/lang/module/ModuleReader; +@lambda-proxy sun/util/cldr/CLDRLocaleProviderAdapter apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic sun/util/cldr/CLDRLocaleProviderAdapter lambda$applyAliases$5 (Ljava/util/Locale;)Ljava/util/Locale; (Ljava/util/Locale;)Ljava/util/Locale; +@lambda-proxy sun/util/cldr/CLDRLocaleProviderAdapter run ()Ljava/security/PrivilegedExceptionAction; ()Ljava/lang/Object; REF_invokeStatic sun/util/cldr/CLDRLocaleProviderAdapter lambda$new$0 ()Lsun/util/locale/provider/LocaleDataMetaInfo; ()Lsun/util/locale/provider/LocaleDataMetaInfo; +@lambda-proxy sun/util/cldr/CLDRLocaleProviderAdapter run (Lsun/util/cldr/CLDRLocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/cldr/CLDRLocaleProviderAdapter lambda$getCalendarDataProvider$1 ()Ljava/util/spi/CalendarDataProvider; ()Ljava/util/spi/CalendarDataProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getCalendarProvider$11 ()Lsun/util/spi/CalendarProvider; ()Lsun/util/spi/CalendarProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getDateFormatProvider$2 ()Ljava/text/spi/DateFormatProvider; ()Ljava/text/spi/DateFormatProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getDateFormatSymbolsProvider$3 ()Ljava/text/spi/DateFormatSymbolsProvider; ()Ljava/text/spi/DateFormatSymbolsProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getDecimalFormatSymbolsProvider$4 ()Ljava/text/spi/DecimalFormatSymbolsProvider; ()Ljava/text/spi/DecimalFormatSymbolsProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getNumberFormatProvider$5 ()Ljava/text/spi/NumberFormatProvider; ()Ljava/text/spi/NumberFormatProvider; +@lambda-proxy sun/util/locale/provider/LocaleProviderAdapter apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic sun/util/locale/provider/LocaleProviderAdapter lambda$toLocaleArray$0 (Ljava/lang/String;)Ljava/util/Locale; (Ljava/lang/String;)Ljava/util/Locale; +@lambda-proxy sun/util/locale/provider/LocaleProviderAdapter apply ()Ljava/util/function/IntFunction; (I)Ljava/lang/Object; REF_invokeStatic sun/util/locale/provider/LocaleProviderAdapter lambda$toLocaleArray$1 (I)[Ljava/util/Locale; (I)[Ljava/util/Locale; diff --git a/java/lib/fontconfig.bfc b/java/lib/fontconfig.bfc new file mode 100644 index 0000000000000000000000000000000000000000..24d81b7b1ee936a711d74264442eb00fc87550ca Binary files /dev/null and b/java/lib/fontconfig.bfc differ diff --git a/java/lib/fontconfig.properties.src b/java/lib/fontconfig.properties.src new file mode 100644 index 0000000000000000000000000000000000000000..40e40ca55af9f2a09483444bfd8c6e79d6a6ab1c --- /dev/null +++ b/java/lib/fontconfig.properties.src @@ -0,0 +1,332 @@ +# +# +# Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. Oracle designates this +# particular file as subject to the "Classpath" exception as provided +# by Oracle in the LICENSE file that accompanied this code. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. +# + +# Version + +version=1 + +# Component Font Mappings + +allfonts.chinese-ms936=SimSun +allfonts.chinese-ms936-extb=SimSun-ExtB +allfonts.chinese-gb18030=SimSun-18030 +allfonts.chinese-gb18030-extb=SimSun-ExtB +allfonts.chinese-hkscs=MingLiU_HKSCS +allfonts.chinese-ms950-extb=MingLiU-ExtB +allfonts.devanagari=Mangal +allfonts.bengali=Vrinda +allfonts.gujarati=Shruti +allfonts.gurmukhi=Raavi +allfonts.kannada=Tunga +allfonts.malayalam=Kartika +allfonts.oriya=Kalinga +allfonts.sinhala=Iskoola Pota +allfonts.tamil=Latha +allfonts.telugu=Gautami +allfonts.khmer=Khmer UI +allfonts.mongolian=Mongolian Baiti +allfonts.myanmar=Myanmar Text +allfonts.dingbats=Wingdings +allfonts.symbol=Symbol +allfonts.symbols=Segoe UI Symbol +allfonts.thai=DokChampa +allfonts.georgian=Sylfaen +allfonts.korean-fallback=Malgun Gothic + +serif.plain.alphabetic=Times New Roman +serif.plain.chinese-ms950=MingLiU +serif.plain.chinese-ms950-extb=MingLiU-ExtB +serif.plain.hebrew=David +serif.plain.japanese=MS Mincho +serif.plain.korean=Batang + +serif.bold.alphabetic=Times New Roman Bold +serif.bold.chinese-ms950=PMingLiU +serif.bold.chinese-ms950-extb=PMingLiU-ExtB +serif.bold.hebrew=David Bold +serif.bold.japanese=MS Mincho +serif.bold.korean=Batang + +serif.italic.alphabetic=Times New Roman Italic +serif.italic.chinese-ms950=PMingLiU +serif.italic.chinese-ms950-extb=PMingLiU-ExtB +serif.italic.hebrew=David +serif.italic.japanese=MS Mincho +serif.italic.korean=Batang + +serif.bolditalic.alphabetic=Times New Roman Bold Italic +serif.bolditalic.chinese-ms950=PMingLiU +serif.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +serif.bolditalic.hebrew=David Bold +serif.bolditalic.japanese=MS Mincho +serif.bolditalic.korean=Batang + +sansserif.plain.alphabetic=Arial +sansserif.plain.chinese-ms950=MingLiU +sansserif.plain.chinese-ms950-extb=MingLiU-ExtB +sansserif.plain.hebrew=David +sansserif.plain.japanese=MS Gothic +sansserif.plain.korean=Malgun Gothic + +sansserif.bold.alphabetic=Arial Bold +sansserif.bold.chinese-ms950=PMingLiU +sansserif.bold.chinese-ms950-extb=PMingLiU-ExtB +sansserif.bold.hebrew=David Bold +sansserif.bold.japanese=MS Gothic +sansserif.bold.korean=Malgun Gothic Bold + +sansserif.italic.alphabetic=Arial Italic +sansserif.italic.chinese-ms950=PMingLiU +sansserif.italic.chinese-ms950-extb=PMingLiU-ExtB +sansserif.italic.hebrew=David +sansserif.italic.japanese=MS Gothic +sansserif.italic.korean=Malgun Gothic + +sansserif.bolditalic.alphabetic=Arial Bold Italic +sansserif.bolditalic.chinese-ms950=PMingLiU +sansserif.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +sansserif.bolditalic.hebrew=David Bold +sansserif.bolditalic.japanese=MS Gothic +sansserif.bolditalic.korean=Malgun Gothic Bold + +monospaced.plain.alphabetic=Courier New +monospaced.plain.chinese-ms950=MingLiU +monospaced.plain.chinese-ms950-extb=MingLiU-ExtB +monospaced.plain.hebrew=Courier New +monospaced.plain.japanese=MS Gothic +monospaced.plain.korean=GulimChe + +monospaced.bold.alphabetic=Courier New Bold +monospaced.bold.chinese-ms950=PMingLiU +monospaced.bold.chinese-ms950-extb=PMingLiU-ExtB +monospaced.bold.hebrew=Courier New Bold +monospaced.bold.japanese=MS Gothic +monospaced.bold.korean=GulimChe + +monospaced.italic.alphabetic=Courier New Italic +monospaced.italic.chinese-ms950=PMingLiU +monospaced.italic.chinese-ms950-extb=PMingLiU-ExtB +monospaced.italic.hebrew=Courier New +monospaced.italic.japanese=MS Gothic +monospaced.italic.korean=GulimChe + +monospaced.bolditalic.alphabetic=Courier New Bold Italic +monospaced.bolditalic.chinese-ms950=PMingLiU +monospaced.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +monospaced.bolditalic.hebrew=Courier New Bold +monospaced.bolditalic.japanese=MS Gothic +monospaced.bolditalic.korean=GulimChe + +dialog.plain.alphabetic=Arial +dialog.plain.chinese-ms950=MingLiU +dialog.plain.chinese-ms950-extb=MingLiU-ExtB +dialog.plain.hebrew=David +dialog.plain.japanese=MS Gothic +dialog.plain.korean=Malgun Gothic + +dialog.bold.alphabetic=Arial Bold +dialog.bold.chinese-ms950=PMingLiU +dialog.bold.chinese-ms950-extb=PMingLiU-ExtB +dialog.bold.hebrew=David Bold +dialog.bold.japanese=MS Gothic +dialog.bold.korean=Malgun Gothic Bold + +dialog.italic.alphabetic=Arial Italic +dialog.italic.chinese-ms950=PMingLiU +dialog.italic.chinese-ms950-extb=PMingLiU-ExtB +dialog.italic.hebrew=David +dialog.italic.japanese=MS Gothic +dialog.italic.korean=Malgun Gothic + +dialog.bolditalic.alphabetic=Arial Bold Italic +dialog.bolditalic.chinese-ms950=PMingLiU +dialog.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +dialog.bolditalic.hebrew=David Bold +dialog.bolditalic.japanese=MS Gothic +dialog.bolditalic.korean=Malgun Gothic Bold + +dialoginput.plain.alphabetic=Courier New +dialoginput.plain.chinese-ms950=MingLiU +dialoginput.plain.chinese-ms950-extb=MingLiU-ExtB +dialoginput.plain.hebrew=David +dialoginput.plain.japanese=MS Gothic +dialoginput.plain.korean=Gulim + +dialoginput.bold.alphabetic=Courier New Bold +dialoginput.bold.chinese-ms950=PMingLiU +dialoginput.bold.chinese-ms950-extb=PMingLiU-ExtB +dialoginput.bold.hebrew=David Bold +dialoginput.bold.japanese=MS Gothic +dialoginput.bold.korean=Gulim + +dialoginput.italic.alphabetic=Courier New Italic +dialoginput.italic.chinese-ms950=PMingLiU +dialoginput.italic.chinese-ms950-extb=PMingLiU-ExtB +dialoginput.italic.hebrew=David +dialoginput.italic.japanese=MS Gothic +dialoginput.italic.korean=Gulim + +dialoginput.bolditalic.alphabetic=Courier New Bold Italic +dialoginput.bolditalic.chinese-ms950=PMingLiU +dialoginput.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +dialoginput.bolditalic.hebrew=David Bold +dialoginput.bolditalic.japanese=MS Gothic +dialoginput.bolditalic.korean=Gulim + +# Search Sequences + +sequence.allfonts=alphabetic/default,dingbats,symbol + +sequence.serif.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb +sequence.sansserif.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb +sequence.monospaced.GBK=chinese-ms936,alphabetic,dingbats,symbol,chinese-ms936-extb +sequence.dialog.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb +sequence.dialoginput.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb + +sequence.serif.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb +sequence.sansserif.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb +sequence.monospaced.GB18030=chinese-gb18030,alphabetic,dingbats,symbol,chinese-gb18030-extb +sequence.dialog.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb +sequence.dialoginput.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb + +sequence.serif.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb +sequence.sansserif.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb +sequence.monospaced.x-windows-950=chinese-ms950,alphabetic,dingbats,symbol,chinese-ms950-extb +sequence.dialog.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb +sequence.dialoginput.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb + +sequence.serif.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.sansserif.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.monospaced.x-MS950-HKSCS=chinese-ms950,alphabetic,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialog.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialoginput.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb + +sequence.serif.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.sansserif.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.monospaced.x-MS950-HKSCS-XP=chinese-ms950,alphabetic,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialog.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialoginput.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb + +sequence.allfonts.UTF-8.hi=alphabetic/1252,devanagari,dingbats,symbol +sequence.allfonts.UTF-8.ja=alphabetic,japanese,dingbats,symbol +sequence.allfonts.UTF-8.ko=alphabetic,korean,dingbats,symbol + +sequence.allfonts.windows-1255=hebrew,alphabetic/1252,dingbats,symbol + +sequence.serif.windows-31j=alphabetic,japanese,dingbats,symbol +sequence.sansserif.windows-31j=alphabetic,japanese,dingbats,symbol +sequence.monospaced.windows-31j=japanese,alphabetic,dingbats,symbol +sequence.dialog.windows-31j=alphabetic,japanese,dingbats,symbol +sequence.dialoginput.windows-31j=alphabetic,japanese,dingbats,symbol + +sequence.serif.x-windows-949=alphabetic,korean,dingbats,symbol +sequence.sansserif.x-windows-949=alphabetic,korean,dingbats,symbol +sequence.monospaced.x-windows-949=korean,alphabetic,dingbats,symbol +sequence.dialog.x-windows-949=alphabetic,korean,dingbats,symbol +sequence.dialoginput.x-windows-949=alphabetic,korean,dingbats,symbol + +sequence.allfonts.x-windows-874=alphabetic,thai,dingbats,symbol + +sequence.fallback=symbols,\ + chinese-ms950,chinese-hkscs,chinese-ms936,chinese-gb18030,\ + japanese,korean-fallback,chinese-ms950-extb,chinese-ms936-extb,\ + georgian,devanagari,bengali,gujarati,gurmukhi,kannada,\ + malayalam,oriya,sinhala,tamil,telugu,thai,khmer,mongolian,\ + myanmar + +# Exclusion Ranges + +exclusion.alphabetic=0700-1cff,1d80-1e9f,1f00-2017,2020-20ab,20ad-20b8,20bb-20bc,20be-f8ff +exclusion.chinese-gb18030=0390-03d6,2200-22ef,2701-27be +exclusion.hebrew=0041-005a,0060-007a,007f-00ff,20ac-20ac + +# Monospaced to Proportional width variant mapping +# (Experimental private syntax) +proportional.MS_Gothic=MS PGothic +proportional.MS_Mincho=MS PMincho +proportional.MingLiU=PMingLiU +proportional.MingLiU-ExtB=PMingLiU-ExtB + +# Font File Names + +filename.Arial=ARIAL.TTF +filename.Arial_Bold=ARIALBD.TTF +filename.Arial_Italic=ARIALI.TTF +filename.Arial_Bold_Italic=ARIALBI.TTF + +filename.Courier_New=COUR.TTF +filename.Courier_New_Bold=COURBD.TTF +filename.Courier_New_Italic=COURI.TTF +filename.Courier_New_Bold_Italic=COURBI.TTF + +filename.Times_New_Roman=TIMES.TTF +filename.Times_New_Roman_Bold=TIMESBD.TTF +filename.Times_New_Roman_Italic=TIMESI.TTF +filename.Times_New_Roman_Bold_Italic=TIMESBI.TTF + +filename.SimSun=SIMSUN.TTC +filename.SimSun-18030=SIMSUN18030.TTC +filename.SimSun-ExtB=SIMSUNB.TTF + +filename.MingLiU=MINGLIU.TTC +filename.MingLiU-ExtB=MINGLIUB.TTC +filename.PMingLiU=MINGLIU.TTC +filename.PMingLiU-ExtB=MINGLIUB.TTC +filename.MingLiU_HKSCS=hkscsm3u.ttf + +filename.David=DAVID.TTF +filename.David_Bold=DAVIDBD.TTF + +filename.MS_Mincho=MSMINCHO.TTC +filename.MS_PMincho=MSMINCHO.TTC +filename.MS_Gothic=MSGOTHIC.TTC +filename.MS_PGothic=MSGOTHIC.TTC + +filename.Gulim=gulim.TTC +filename.Batang=batang.TTC +filename.GulimChe=gulim.TTC + +filename.Gautami=gautami.ttf +filename.Iskoola_Pota=iskpota.ttf +filename.Kalinga=kalinga.ttf +filename.Kartika=kartika.ttf +filename.Latha=latha.ttf +filename.Mangal=MANGAL.TTF +filename.Raavi=raavi.ttf +filename.Shruti=shruti.ttf +filename.Tunga=TUNGA.TTF +filename.Vrinda=vrinda.ttf +filename.DokChampa=dokchamp.ttf +filename.Khmer_UI=KhmerUI.ttf +filename.Mongolian_Baiti=monbaiti.ttf +filename.Myanmar_Text=mmrtext.ttf +filename.Symbol=SYMBOL.TTF +filename.Wingdings=WINGDING.TTF + +filename.Sylfaen=sylfaen.ttf +filename.Segoe_UI_Symbol=SEGUISYM.TTF +filename.Malgun_Gothic=malgun.ttf +filename.Malgun_Gothic_Bold=malgunbd.TTF diff --git a/java/lib/jawt.lib b/java/lib/jawt.lib new file mode 100644 index 0000000000000000000000000000000000000000..2c1c87c608c5f6350485b491452329522cc9d037 Binary files /dev/null and b/java/lib/jawt.lib differ diff --git a/java/lib/jfr/default.jfc b/java/lib/jfr/default.jfc new file mode 100644 index 0000000000000000000000000000000000000000..79aee3f334925160050eefabd06637a228a6df8a --- /dev/null +++ b/java/lib/jfr/default.jfc @@ -0,0 +1,1148 @@ + + + + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + 10 s + + + + true + 10 s + + + + true + true + + + + true + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + false + true + + + + false + + + + true + true + 20 ms + + + + true + true + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + false + true + 20 ms + + + + true + true + + + + false + false + 0 ms + + + + false + false + 0 ms + + + + false + + + + false + + + + false + + + + false + + + + true + true + + + + false + true + 0 ms + + + + false + true + + + + true + true + 0 ms + + + + true + true + 0 ms + + + + true + + + + false + + + + true + beginChunk + + + + true + beginChunk + + + + true + 20 ms + + + + true + 20 ms + + + + true + 10 ms + + + + false + 10 ms + + + + false + 10 ms + + + + true + 10 ms + + + + true + true + + + + true + everyChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + false + everyChunk + + + + true + everyChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + false + + + + true + everyChunk + + + + true + everyChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + true + + + + true + true + + + + true + + + + true + 0 ms + + + + true + 0 ms + true + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + 0 ms + + + + true + + + + true + + + + false + + + + false + + + + true + + + + false + true + + + + true + + + + false + everyChunk + + + + false + + + + false + everyChunk + + + + false + + + + true + false + 0 ns + + + + true + 1000 ms + + + + true + 1000 ms + + + + true + beginChunk + + + + true + 1000 ms + + + + true + 1000 ms + + + + true + 60 s + + + + false + + + + false + + + + true + + + + true + beginChunk + + + + true + everyChunk + + + + true + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + beginChunk + + + + true + 10 s + + + + true + 1000 ms + + + + true + 10 s + + + + true + beginChunk + + + + true + endChunk + + + + true + true + + + + true + 5 s + + + + true + 10 s + + + + true + beginChunk + + + + true + everyChunk + + + + true + everyChunk + + + + false + true + + + + false + true + + + + true + 150/s + true + + + + true + everyChunk + + + + true + true + 0 ms + + + + true + true + 0 ms + + + + true + endChunk + + + + true + endChunk + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + false + true + + + + false + + + + true + beginChunk + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + true + true + + + + true + 1000 ms + + + + true + + + + true + + + + false + 0 ns + + + + true + + + + true + + + + true + true + 0 ms + + + + true + true + 1 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + false + + + + true + 0 ns + true + + + + true + 5 s + + + + true + 1 s + true + + + + true + endChunk + + + + true + endChunk + + + + true + endChunk + + + + true + true + forRemoval + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 20 ms + + 20 ms + + 20 ms + + false + + + diff --git a/java/lib/jfr/profile.jfc b/java/lib/jfr/profile.jfc new file mode 100644 index 0000000000000000000000000000000000000000..6691638e5d41dfa5f25e3b695331a08e7ba932e7 --- /dev/null +++ b/java/lib/jfr/profile.jfc @@ -0,0 +1,1147 @@ + + + + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + 10 s + + + + true + 10 s + + + + true + true + + + + true + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + false + true + + + + false + + + + true + true + 20 ms + + + + true + true + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + + + + false + false + 0 ms + + + + false + false + 0 ms + + + + false + + + + false + + + + false + + + + false + + + + true + true + + + + false + true + 0 ms + + + + false + true + + + + true + true + 0 ms + + + + true + true + 0 ms + + + + true + + + + false + + + + true + beginChunk + + + + true + beginChunk + + + + true + 10 ms + + + + true + 20 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + true + + + + true + 60 s + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + false + everyChunk + + + + true + everyChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + false + + + + true + everyChunk + + + + true + everyChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + true + + + + true + true + + + + true + + + + true + 0 ms + + + + true + 0 ms + true + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + 0 ms + + + + true + + + + true + + + + true + + + + true + + + + true + + + + false + true + + + + true + + + + false + everyChunk + + + + false + + + + false + everyChunk + + + + false + + + + true + true + 0 ns + + + + true + 1000 ms + + + + true + 1000 ms + + + + true + beginChunk + + + + true + 1000 ms + + + + true + 100 ms + + + + true + 10 s + + + + true + + + + false + + + + true + + + + true + beginChunk + + + + true + everyChunk + + + + true + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + beginChunk + + + + true + 10 s + + + + true + 1000 ms + + + + true + 10 s + + + + true + beginChunk + + + + true + endChunk + + + + true + true + + + + true + 5 s + + + + true + 5 s + + + + true + beginChunk + + + + true + everyChunk + + + + true + everyChunk + + + + false + true + + + + false + true + + + + true + 300/s + true + + + + true + everyChunk + + + + true + true + 0 ms + + + + true + true + 0 ms + + + + true + endChunk + + + + true + endChunk + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + false + true + + + + true + + + + true + beginChunk + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + true + true + + + + true + 1000 ms + + + + true + + + + true + + + + false + 0 ns + + + + true + + + + true + + + + true + true + 0 ms + + + + true + true + 1 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + true + + + + true + 0 ns + true + + + + true + 5 s + + + + true + 100 ms + true + + + + true + endChunk + + + + true + endChunk + + + + true + endChunk + + + + true + true + forRemoval + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 10 ms + + 10 ms + + 10 ms + + false + + + diff --git a/java/lib/jvm.cfg b/java/lib/jvm.cfg new file mode 100644 index 0000000000000000000000000000000000000000..97225c8fead9610efc47615e847cc20c2b3b8c19 --- /dev/null +++ b/java/lib/jvm.cfg @@ -0,0 +1,2 @@ +-server KNOWN +-client IGNORE diff --git a/java/lib/psfont.properties.ja b/java/lib/psfont.properties.ja new file mode 100644 index 0000000000000000000000000000000000000000..d17cf40d19618db82fec55e4c80fc9713d9fd7a1 --- /dev/null +++ b/java/lib/psfont.properties.ja @@ -0,0 +1,119 @@ +# +# +# Copyright (c) 1996, 2000, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. Oracle designates this +# particular file as subject to the "Classpath" exception as provided +# by Oracle in the LICENSE file that accompanied this code. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. +# + +# +# Japanese PostScript printer property file +# +font.num=16 +# +serif=serif +timesroman=serif +sansserif=sansserif +helvetica=sansserif +monospaced=monospaced +courier=monospaced +dialog=sansserif +dialoginput=monospaced +# +serif.latin1.plain=Times-Roman +serif.latin1.italic=Times-Italic +serif.latin1.bolditalic=Times-BoldItalic +serif.latin1.bold=Times-Bold +# +sansserif.latin1.plain=Helvetica +sansserif.latin1.italic=Helvetica-Oblique +sansserif.latin1.bolditalic=Helvetica-BoldOblique +sansserif.latin1.bold=Helvetica-Bold +# +monospaced.latin1.plain=Courier +monospaced.latin1.italic=Courier-Oblique +monospaced.latin1.bolditalic=Courier-BoldOblique +monospaced.latin1.bold=Courier-Bold +# +serif.x11jis0208.plain=Ryumin-Light-H +serif.x11jis0208.italic=Ryumin-Light-H +serif.x11jis0208.bolditalic=Ryumin-Light-H +serif.x11jis0208.bold=Ryumin-Light-H +# +sansserif.x11jis0208.plain=GothicBBB-Medium-H +sansserif.x11jis0208.italic=GothicBBB-Medium-H +sansserif.x11jis0208.bolditalic=GothicBBB-Medium-H +sansserif.x11jis0208.bold=GothicBBB-Medium-H +# +monospaced.x11jis0208.plain=GothicBBB-Medium-H +monospaced.x11jis0208.italic=GothicBBB-Medium-H +monospaced.x11jis0208.bolditalic=GothicBBB-Medium-H +monospaced.x11jis0208.bold=GothicBBB-Medium-H +# +serif.x11jis0201.plain=Ryumin-Light.Hankaku +serif.x11jis0201.italic=Ryumin-Light.Hankaku +serif.x11jis0201.bolditalic=Ryumin-Light.Hankaku +serif.x11jis0201.bold=Ryumin-Light.Hankaku +# +sansserif.x11jis0201.plain=GothicBBB-Medium.Hankaku +sansserif.x11jis0201.italic=GothicBBB-Medium.Hankaku +sansserif.x11jis0201.bolditalic=GothicBBB-Medium.Hankaku +sansserif.x11jis0201.bold=GothicBBB-Medium.Hankaku +# +monospaced.x11jis0201.plain=GothicBBB-Medium.Hankaku +monospaced.x11jis0201.italic=GothicBBB-Medium.Hankaku +monospaced.x11jis0201.bolditalic=GothicBBB-Medium.Hankaku +monospaced.x11jis0201.bold=GothicBBB-Medium.Hankaku +# +Helvetica=0 +Helvetica-Bold=1 +Helvetica-Oblique=2 +Helvetica-BoldOblique=3 +Times-Roman=4 +Times-Bold=5 +Times-Italic=6 +Times-BoldItalic=7 +Courier=8 +Courier-Bold=9 +Courier-Oblique=10 +Courier-BoldOblique=11 +GothicBBB-Medium-H=12 +Ryumin-Light-H=13 +GothicBBB-Medium.Hankaku=14 +Ryumin-Light.Hankaku=15 +# +font.0=Helvetica ISOF +font.1=Helvetica-Bold ISOF +font.2=Helvetica-Oblique ISOF +font.3=Helvetica-BoldOblique ISOF +font.4=Times-Roman ISOF +font.5=Times-Bold ISOF +font.6=Times-Italic ISOF +font.7=Times-BoldItalic ISOF +font.8=Courier ISOF +font.9=Courier-Bold ISOF +font.10=Courier-Oblique ISOF +font.11=Courier-BoldOblique ISOF +font.12=GothicBBB-Medium-H findfont +font.13=Ryumin-Light-H findfont +font.14=GothicBBB-Medium.Hankaku findfont +font.15=Ryumin-Light.Hankaku findfont +# diff --git a/java/lib/psfontj2d.properties b/java/lib/psfontj2d.properties new file mode 100644 index 0000000000000000000000000000000000000000..0feee66de02de98703297cbc5cead2a2152aad32 --- /dev/null +++ b/java/lib/psfontj2d.properties @@ -0,0 +1,323 @@ +# +# +# Copyright (c) 1999, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. Oracle designates this +# particular file as subject to the "Classpath" exception as provided +# by Oracle in the LICENSE file that accompanied this code. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. + +# +# PostScript printer property file for Java 2D printing. +# +# WARNING: This is an internal implementation file, not a public file. +# Any customisation or reliance on the existence of this file and its +# contents or syntax is discouraged and unsupported. +# It may be incompatibly changed or removed without any notice. +# +# +font.num=35 +# +# Legacy logical font family names and logical font aliases should all +# map to the primary logical font names. +# +serif=serif +times=serif +timesroman=serif +sansserif=sansserif +helvetica=sansserif +dialog=sansserif +dialoginput=monospaced +monospaced=monospaced +courier=monospaced +# +# Next, physical fonts which can be safely mapped to standard postscript fonts +# These keys generally map to a value which is the same as the key, so +# the key/value is just a way to say the font has a mapping. +# Sometimes however we map more than one screen font to the same PS font. +# +avantgarde=avantgarde_book +avantgarde_book=avantgarde_book +avantgarde_demi=avantgarde_demi +avantgarde_book_oblique=avantgarde_book_oblique +avantgarde_demi_oblique=avantgarde_demi_oblique +# +itcavantgarde=avantgarde_book +itcavantgarde=avantgarde_book +itcavantgarde_demi=avantgarde_demi +itcavantgarde_oblique=avantgarde_book_oblique +itcavantgarde_demi_oblique=avantgarde_demi_oblique +# +bookman=bookman_light +bookman_light=bookman_light +bookman_demi=bookman_demi +bookman_light_italic=bookman_light_italic +bookman_demi_italic=bookman_demi_italic +# +# Exclude "helvetica" on its own as that's a legacy name for a logical font +helvetica_bold=helvetica_bold +helvetica_oblique=helvetica_oblique +helvetica_bold_oblique=helvetica_bold_oblique +# +itcbookman_light=bookman_light +itcbookman_demi=bookman_demi +itcbookman_light_italic=bookman_light_italic +itcbookman_demi_italic=bookman_demi_italic +# +# Exclude "courier" on its own as that's a legacy name for a logical font +courier_bold=courier_bold +courier_oblique=courier_oblique +courier_bold_oblique=courier_bold_oblique +# +courier_new=courier +courier_new_bold=courier_bold +# +monotype_century_schoolbook=newcenturyschoolbook +monotype_century_schoolbook_bold=newcenturyschoolbook_bold +monotype_century_schoolbook_italic=newcenturyschoolbook_italic +monotype_century_schoolbook_bold_italic=newcenturyschoolbook_bold_italic +# +newcenturyschoolbook=newcenturyschoolbook +newcenturyschoolbook_bold=newcenturyschoolbook_bold +newcenturyschoolbook_italic=newcenturyschoolbook_italic +newcenturyschoolbook_bold_italic=newcenturyschoolbook_bold_italic +# +palatino=palatino +palatino_bold=palatino_bold +palatino_italic=palatino_italic +palatino_bold_italic=palatino_bold_italic +# +# Exclude "times" on its own as that's a legacy name for a logical font +times_bold=times_roman_bold +times_italic=times_roman_italic +times_bold_italic=times_roman_bold_italic +# +times_roman=times_roman +times_roman_bold=times_roman_bold +times_roman_italic=times_roman_italic +times_roman_bold_italic=times_roman_bold_italic +# +times_new_roman=times_roman +times_new_roman_bold=times_roman_bold +times_new_roman_italic=times_roman_italic +times_new_roman_bold_italic=times_roman_bold_italic +# +zapfchancery_italic=zapfchancery_italic +itczapfchancery_italic=zapfchancery_italic +# +# Next the mapping of the font name + charset + style to Postscript font name +# for the logical fonts. +# +serif.latin1.plain=Times-Roman +serif.latin1.bold=Times-Bold +serif.latin1.italic=Times-Italic +serif.latin1.bolditalic=Times-BoldItalic +serif.symbol.plain=Symbol +serif.dingbats.plain=ZapfDingbats +serif.symbol.bold=Symbol +serif.dingbats.bold=ZapfDingbats +serif.symbol.italic=Symbol +serif.dingbats.italic=ZapfDingbats +serif.symbol.bolditalic=Symbol +serif.dingbats.bolditalic=ZapfDingbats +# +sansserif.latin1.plain=Helvetica +sansserif.latin1.bold=Helvetica-Bold +sansserif.latin1.italic=Helvetica-Oblique +sansserif.latin1.bolditalic=Helvetica-BoldOblique +sansserif.symbol.plain=Symbol +sansserif.dingbats.plain=ZapfDingbats +sansserif.symbol.bold=Symbol +sansserif.dingbats.bold=ZapfDingbats +sansserif.symbol.italic=Symbol +sansserif.dingbats.italic=ZapfDingbats +sansserif.symbol.bolditalic=Symbol +sansserif.dingbats.bolditalic=ZapfDingbats +# +monospaced.latin1.plain=Courier +monospaced.latin1.bold=Courier-Bold +monospaced.latin1.italic=Courier-Oblique +monospaced.latin1.bolditalic=Courier-BoldOblique +monospaced.symbol.plain=Symbol +monospaced.dingbats.plain=ZapfDingbats +monospaced.symbol.bold=Symbol +monospaced.dingbats.bold=ZapfDingbats +monospaced.symbol.italic=Symbol +monospaced.dingbats.italic=ZapfDingbats +monospaced.symbol.bolditalic=Symbol +monospaced.dingbats.bolditalic=ZapfDingbats +# +# Next the mapping of the font name + charset + style to Postscript font name +# for the physical fonts. Since these always report style as plain, the +# style key is always plain. So we map using the face name to the correct +# style for the postscript font. This is possible since the face names can +# be replied upon to be different for each style. +# However an application may try to create a Font applying a style to an +# physical name. We want to map to the correct Postscript font there too +# if possible but we do not map cases where the application tries to +# augment a style (eg ask for a bold version of a bold font) +# Defer to the 2D package to attempt create an artificially styled version +# +avantgarde_book.latin1.plain=AvantGarde-Book +avantgarde_demi.latin1.plain=AvantGarde-Demi +avantgarde_book_oblique.latin1.plain=AvantGarde-BookOblique +avantgarde_demi_oblique.latin1.plain=AvantGarde-DemiOblique +# +avantgarde_book.latin1.bold=AvantGarde-Demi +avantgarde_book.latin1.italic=AvantGarde-BookOblique +avantgarde_book.latin1.bolditalic=AvantGarde-DemiOblique +avantgarde_demi.latin1.italic=AvantGarde-DemiOblique +avantgarde_book_oblique.latin1.bold=AvantGarde-DemiOblique +# +bookman_light.latin1.plain=Bookman-Light +bookman_demi.latin1.plain=Bookman-Demi +bookman_light_italic.latin1.plain=Bookman-LightItalic +bookman_demi_italic.latin1.plain=Bookman-DemiItalic +# +bookman_light.latin1.bold=Bookman-Demi +bookman_light.latin1.italic=Bookman-LightItalic +bookman_light.latin1.bolditalic=Bookman-DemiItalic +bookman_light_bold.latin1.italic=Bookman-DemiItalic +bookman_light_italic.latin1.bold=Bookman-DemiItalic +# +courier.latin1.plain=Courier +courier_bold.latin1.plain=Courier-Bold +courier_oblique.latin1.plain=Courier-Oblique +courier_bold_oblique.latin1.plain=Courier-BoldOblique +courier.latin1.bold=Courier-Bold +courier.latin1.italic=Courier-Oblique +courier.latin1.bolditalic=Courier-BoldOblique +courier_bold.latin1.italic=Courier-BoldOblique +courier_italic.latin1.bold=Courier-BoldOblique +# +helvetica_bold.latin1.plain=Helvetica-Bold +helvetica_oblique.latin1.plain=Helvetica-Oblique +helvetica_bold_oblique.latin1.plain=Helvetica-BoldOblique +helvetica.latin1.bold=Helvetica-Bold +helvetica.latin1.italic=Helvetica-Oblique +helvetica.latin1.bolditalic=Helvetica-BoldOblique +helvetica_bold.latin1.italic=Helvetica-BoldOblique +helvetica_italic.latin1.bold=Helvetica-BoldOblique +# +newcenturyschoolbook.latin1.plain=NewCenturySchlbk-Roman +newcenturyschoolbook_bold.latin1.plain=NewCenturySchlbk-Bold +newcenturyschoolbook_italic.latin1.plain=NewCenturySchlbk-Italic +newcenturyschoolbook_bold_italic.latin1.plain=NewCenturySchlbk-BoldItalic +newcenturyschoolbook.latin1.bold=NewCenturySchlbk-Bold +newcenturyschoolbook.latin1.italic=NewCenturySchlbk-Italic +newcenturyschoolbook.latin1.bolditalic=NewCenturySchlbk-BoldItalic +newcenturyschoolbook_bold.latin1.italic=NewCenturySchlbk-BoldItalic +newcenturyschoolbook_italic.latin1.bold=NewCenturySchlbk-BoldItalic +# +palatino.latin1.plain=Palatino-Roman +palatino_bold.latin1.plain=Palatino-Bold +palatino_italic.latin1.plain=Palatino-Italic +palatino_bold_italic.latin1.plain=Palatino-BoldItalic +palatino.latin1.bold=Palatino-Bold +palatino.latin1.italic=Palatino-Italic +palatino.latin1.bolditalic=Palatino-BoldItalic +palatino_bold.latin1.italic=Palatino-BoldItalic +palatino_italic.latin1.bold=Palatino-BoldItalic +# +times_roman.latin1.plain=Times-Roman +times_roman_bold.latin1.plain=Times-Bold +times_roman_italic.latin1.plain=Times-Italic +times_roman_bold_italic.latin1.plain=Times-BoldItalic +times_roman.latin1.bold=Times-Bold +times_roman.latin1.italic=Times-Italic +times_roman.latin1.bolditalic=Times-BoldItalic +times_roman_bold.latin1.italic=Times-BoldItalic +times_roman_italic.latin1.bold=Times-BoldItalic +# +zapfchancery_italic.latin1.plain=ZapfChancery-MediumItalic +# +# Finally the mappings of PS font names to indexes. +# +AvantGarde-Book=0 +AvantGarde-BookOblique=1 +AvantGarde-Demi=2 +AvantGarde-DemiOblique=3 +Bookman-Demi=4 +Bookman-DemiItalic=5 +Bookman-Light=6 +Bookman-LightItalic=7 +Courier=8 +Courier-Bold=9 +Courier-BoldOblique=10 +Courier-Oblique=11 +Helvetica=12 +Helvetica-Bold=13 +Helvetica-BoldOblique=14 +Helvetica-Narrow=15 +Helvetica-Narrow-Bold=16 +Helvetica-Narrow-BoldOblique=17 +Helvetica-Narrow-Oblique=18 +Helvetica-Oblique=19 +NewCenturySchlbk-Bold=20 +NewCenturySchlbk-BoldItalic=21 +NewCenturySchlbk-Italic=22 +NewCenturySchlbk-Roman=23 +Palatino-Bold=24 +Palatino-BoldItalic=25 +Palatino-Italic=26 +Palatino-Roman=27 +Symbol=28 +Times-Bold=29 +Times-BoldItalic=30 +Times-Italic=31 +Times-Roman=32 +ZapfDingbats=33 +ZapfChancery-MediumItalic=34 +# +font.0=AvantGarde-Book ISOF +font.1=AvantGarde-BookOblique ISOF +font.2=AvantGarde-Demi ISOF +font.3=AvantGarde-DemiOblique ISOF +font.4=Bookman-Demi ISOF +font.5=Bookman-DemiItalic ISOF +font.6=Bookman-Light ISOF +font.7=Bookman-LightItalic ISOF +font.8=Courier ISOF +font.9=Courier-Bold ISOF +font.10=Courier-BoldOblique ISOF +font.11=Courier-Oblique ISOF +font.12=Helvetica ISOF +font.13=Helvetica-Bold ISOF +font.14=Helvetica-BoldOblique ISOF +font.15=Helvetica-Narrow ISOF +font.16=Helvetica-Narrow-Bold ISOF +font.17=Helvetica-Narrow-BoldOblique ISOF +font.18=Helvetica-Narrow-Oblique ISOF +font.19=Helvetica-Oblique ISOF +font.20=NewCenturySchlbk-Bold ISOF +font.21=NewCenturySchlbk-BoldItalic ISOF +font.22=NewCenturySchlbk-Italic ISOF +font.23=NewCenturySchlbk-Roman ISOF +font.24=Palatino-Bold ISOF +font.25=Palatino-BoldItalic ISOF +font.26=Palatino-Italic ISOF +font.27=Palatino-Roman ISOF +font.28=Symbol findfont +font.29=Times-Bold ISOF +font.30=Times-BoldItalic ISOF +font.31=Times-Italic ISOF +font.32=Times-Roman ISOF +font.33=ZapfDingbats findfont +font.34=ZapfChancery-MediumItalic ISOF +# diff --git a/java/lib/security/blocked.certs b/java/lib/security/blocked.certs new file mode 100644 index 0000000000000000000000000000000000000000..4fd291b74fa5c9ee35ff87f78ab3593fed10d6e5 --- /dev/null +++ b/java/lib/security/blocked.certs @@ -0,0 +1,39 @@ +Algorithm=SHA-256 +03DB9E5E79FE6117177F81C11595AF598CB176AF766290DBCEB2C318B32E39A2 +08C396C006A21055D00826A5781A5CCFCE2C8D053AB3C197637A4A7A5BB9A650 +14E6D2764A4B06701C6CBC376A253775F79C782FBCB6C0EE6F99DE4BA1024ADD +1C5E6985ACC09221DBD1A4B7BBC6D3A8C3F8540D19F20763A9537FDD42B4FFE7 +1F6BF8A3F2399AF7FD04516C2719C566CBAD51F412738F66D0457E1E6BDE6F2D +2A464E4113141352C7962FBD1706ED4B88533EF24D7BBA6CCC5D797FD202F1C4 +31C8FD37DB9B56E708B03D1F01848B068C6DA66F36FB5D82C008C6040FA3E133 +3946901F46B0071E90D78279E82FABABCA177231A704BE72C5B0E8918566EA66 +3E11CF90719F6FB44D94EAC9A156B89BEBE7B8598F28EC58913F2BFCAF91D0C0 +423279423B9FC8CB06F1BB7C3B247522B948D5F18939F378ECC901126DE40BFB +450F1B421BB05C8609854884559C323319619E8B06B001EA2DCBB74A23AA3BE2 +4CBBF8256BC9888A8007B2F386940A2E394378B0D903CBB3863C5A6394B889CE +4FEE0163686ECBD65DB968E7494F55D84B25486D438E9DE558D629D28CD4D176 +535D04DFCE027C70BD5F8A9E0AD4F218E9AFDCF5BBCF9B6DE0D81E148E2E3172 +568FAF38D9F155F624838E2181B1CEB4D8459305EE652B0F810C97C3611BFE19 +585CFE6B7436CBD4E732763A2137D7F49599BA9B1790E688FCEC799C58EB84A6 +5E83124D68D24E8E177E306DF643D5EA99C5A94D6FC34B072F7544A1CABB7C7B +71CB00749B9130FB2707A2664BFF958D0FCC8E161D9674C7450BA0FC2BEAF9D3 +76A45A496031E4DD2D7ED23E8F6FF97DBDEA980BAAC8B0BA94D7EDB551348645 +8A1BD21661C60015065212CC98B1ABB50DFD14C872A208E66BAE890F25C448AF +9ED8F9B0E8E42A1656B8E1DD18F42BA42DC06FE52686173BA2FC70E756F207DC +9FADCE80D62A959F9930D748488C1E22E821F4E1E4A43584B848C2FC11E04D77 +A686FEE577C88AB664D0787ECDFFF035F4806F3DE418DC9E4D516324FFF02083 +A90132CEA1D4F7185E4F688EFFD16F6AC14DFD78356A807599A5DABBEEF3333E +B8686723E415534BC0DBD16326F9486F85B0B0799BF6639334E61DAAE67F36CD +C0D1F42B9F4BF7ACC045B7BB5D4805E10737F67B6310CE505248D543D0D5FE07 +D0156949F1381943442C6974E9B5B49EF441BB799EF20477B90A89C3F33620CE +D151962D954970501C60079258EBCFA38502E0A9F03CD640322B08C0A3117FE5 +D24566BF315F4E597D6E381C87119FB4198F5E9E2607F5F4AB362EF7E2E7672F +D3A936E1A7775A45217C8296A1F22AC5631DCDEC45594099E78EEEBBEDCBA967 +D6CEAE5D9E047FAF7D797858D229AC991AD44316D1E2A37A21926D763153593A +DF21016B00FC54F9FE3BC8B039911BB216E9162FAD2FD14D990AB96E951B49BE +E0E740E4B0F8B3548181FF75B5372FAF4C70B99EC995D694ED0FB91B03FF8D21 +EC30C9C3065A06BB07DC5B1C6B497F370C1CA65C0F30C08E042BA6BCECC78F2C +F5B6F88F75D391A4B1EB336F9E201239FB6B1377DB8CFA7B84736216E5AFFFD7 +FBB12938ABD86C125796EDF4162D291028890A7D6C0C1CCA75FD4B95EBFA7A1A +FC02FD48DB92D4DCE6F11679D38354CF750CFC7F584A520EB90BDE80E241F2BD +FDEDB5BDFCB67411513A61AEE5CB5B5D7C52AF06028EFC996CC1B05B1D6CEA2B diff --git a/java/lib/security/default.policy b/java/lib/security/default.policy new file mode 100644 index 0000000000000000000000000000000000000000..b9eeed5299e5f0e970800d4b9b954c7c96a92e28 --- /dev/null +++ b/java/lib/security/default.policy @@ -0,0 +1,230 @@ +// +// Permissions required by modules stored in a run-time image and loaded +// by the platform class loader. +// +// NOTE that this file is not intended to be modified. If additional +// permissions need to be granted to the modules in this file, it is +// recommended that they be configured in a separate policy file or +// ${java.home}/conf/security/java.policy. +// + + +grant codeBase "jrt:/java.compiler" { + permission java.security.AllPermission; +}; + + +grant codeBase "jrt:/java.net.http" { + permission java.lang.RuntimePermission "accessClassInPackage.sun.net"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.net.util"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.net.www"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.misc"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.ref"; + permission java.lang.RuntimePermission "modifyThread"; + permission java.net.SocketPermission "*","connect,resolve"; + // required if the HTTPClient is configured to use a local bind address + permission java.net.SocketPermission "localhost:*","listen,resolve"; + permission java.net.URLPermission "http:*","*:*"; + permission java.net.URLPermission "https:*","*:*"; + permission java.net.URLPermission "ws:*","*:*"; + permission java.net.URLPermission "wss:*","*:*"; + permission java.net.URLPermission "socket:*","CONNECT"; // proxy + // For request/response body processors, fromFile, asFile + permission java.io.FilePermission "<>","read,write,delete"; + permission java.util.PropertyPermission "*","read"; + permission java.net.NetPermission "getProxySelector"; +}; + +grant codeBase "jrt:/java.scripting" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/java.security.jgss" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/java.smartcardio" { + permission javax.smartcardio.CardPermission "*", "*"; + permission java.lang.RuntimePermission "loadLibrary.j2pcsc"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.jca"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.util"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.util"; + permission java.util.PropertyPermission + "javax.smartcardio.TerminalFactory.DefaultType", "read"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "os.arch", "read"; + permission java.util.PropertyPermission "sun.arch.data.model", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.library", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.t0GetResponse", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.t1GetResponse", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.t1StripLe", "read"; + // needed for looking up native PC/SC library + permission java.io.FilePermission "<>","read"; + permission java.security.SecurityPermission "putProviderProperty.SunPCSC"; + permission java.security.SecurityPermission + "clearProviderProperties.SunPCSC"; + permission java.security.SecurityPermission + "removeProviderProperty.SunPCSC"; +}; + +grant codeBase "jrt:/java.sql" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/java.sql.rowset" { + permission java.security.AllPermission; +}; + + +grant codeBase "jrt:/java.xml.crypto" { + permission java.lang.RuntimePermission + "getStackWalkerWithClassReference"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.util"; + permission java.util.PropertyPermission "*", "read"; + permission java.security.SecurityPermission "putProviderProperty.XMLDSig"; + permission java.security.SecurityPermission + "clearProviderProperties.XMLDSig"; + permission java.security.SecurityPermission + "removeProviderProperty.XMLDSig"; + permission java.security.SecurityPermission + "com.sun.org.apache.xml.internal.security.register"; + permission java.security.SecurityPermission + "getProperty.jdk.xml.dsig.hereFunctionSupported"; + permission java.security.SecurityPermission + "getProperty.jdk.xml.dsig.secureValidationPolicy"; + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.org.apache.xml.internal.*"; + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.org.apache.xpath.internal"; + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.org.apache.xpath.internal.*"; + permission java.io.FilePermission "<>","read"; + permission java.net.SocketPermission "*", "connect,resolve"; +}; + + +grant codeBase "jrt:/jdk.accessibility" { + permission java.lang.RuntimePermission "accessClassInPackage.sun.awt"; +}; + +grant codeBase "jrt:/jdk.charsets" { + permission java.util.PropertyPermission "os.name", "read"; + permission java.lang.RuntimePermission "charsetProvider"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.access"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.misc"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.util"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.nio.cs"; +}; + +grant codeBase "jrt:/jdk.crypto.cryptoki" { + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.crypto.provider"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.misc"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.access"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.*"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.nio.ch"; + permission java.lang.RuntimePermission "loadLibrary.j2pkcs11"; + permission java.util.PropertyPermission "sun.security.pkcs11.allowSingleThreadedModules", "read"; + permission java.util.PropertyPermission "sun.security.pkcs11.disableKeyExtraction", "read"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "os.arch", "read"; + permission java.util.PropertyPermission "jdk.crypto.KeyAgreement.legacyKDF", "read"; + permission java.security.SecurityPermission "putProviderProperty.*"; + permission java.security.SecurityPermission "clearProviderProperties.*"; + permission java.security.SecurityPermission "removeProviderProperty.*"; + permission java.security.SecurityPermission + "getProperty.auth.login.defaultCallbackHandler"; + permission java.security.SecurityPermission "authProvider.*"; + // Needed for reading PKCS11 config file and NSS library check + permission java.io.FilePermission "<>", "read"; +}; + +grant codeBase "jrt:/jdk.dynalink" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.httpserver" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.internal.le" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.graal.compiler" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.jsobject" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.localedata" { + permission java.lang.RuntimePermission "accessClassInPackage.sun.text.*"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.util.*"; +}; + +grant codeBase "jrt:/jdk.naming.dns" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.scripting.nashorn" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.scripting.nashorn.shell" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.security.auth" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.security.jgss" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.zipfs" { + permission java.io.FilePermission "<>", "read,write,delete"; + permission java.lang.RuntimePermission "fileSystemProvider"; + permission java.lang.RuntimePermission "accessUserInformation"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "user.dir", "read"; + permission java.util.PropertyPermission "user.name", "read"; +}; + +// permissions needed by applications using java.desktop module +grant { + permission java.lang.RuntimePermission "accessClassInPackage.com.sun.beans"; + permission java.lang.RuntimePermission "accessClassInPackage.com.sun.beans.*"; + permission java.lang.RuntimePermission "accessClassInPackage.com.sun.java.swing.plaf.*"; + permission java.lang.RuntimePermission "accessClassInPackage.com.apple.*"; +}; +grant codeBase "jrt:/jdk.accessibility" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.crypto.mscapi" { + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.*"; + permission java.lang.RuntimePermission "loadLibrary.sunmscapi"; + permission java.security.SecurityPermission "putProviderProperty.SunMSCAPI"; + permission java.security.SecurityPermission + "clearProviderProperties.SunMSCAPI"; + permission java.security.SecurityPermission + "removeProviderProperty.SunMSCAPI"; + permission java.security.SecurityPermission "authProvider.SunMSCAPI"; + permission java.util.PropertyPermission "*", "read"; +}; diff --git a/java/lib/tzmappings b/java/lib/tzmappings new file mode 100644 index 0000000000000000000000000000000000000000..7dae4117506056db44e3bb88adf5e20c707ef971 --- /dev/null +++ b/java/lib/tzmappings @@ -0,0 +1,365 @@ +AUS Central Standard Time:001:Australia/Darwin: +AUS Eastern Standard Time:001:Australia/Sydney: +Afghanistan Standard Time:001:Asia/Kabul: +Alaskan Standard Time:001:America/Anchorage: +Aleutian Standard Time:001:America/Adak: +Altai Standard Time:001:Asia/Barnaul: +Arab Standard Time:BH:Asia/Bahrain: +Arab Standard Time:KW:Asia/Kuwait: +Arab Standard Time:QA:Asia/Qatar: +Arab Standard Time:YE:Asia/Aden: +Arab Standard Time:001:Asia/Riyadh: +Arabian Standard Time:OM:Asia/Muscat: +Arabian Standard Time:ZZ:Etc/GMT-4: +Arabian Standard Time:001:Asia/Dubai: +Arabic Standard Time:001:Asia/Baghdad: +Argentina Standard Time:001:America/Buenos_Aires: +Astrakhan Standard Time:001:Europe/Astrakhan: +Atlantic Standard Time:BM:Atlantic/Bermuda: +Atlantic Standard Time:GL:America/Thule: +Atlantic Standard Time:001:America/Halifax: +Aus Central W. Standard Time:001:Australia/Eucla: +Azerbaijan Standard Time:001:Asia/Baku: +Azores Standard Time:GL:America/Scoresbysund: +Azores Standard Time:001:Atlantic/Azores: +Bahia Standard Time:001:America/Bahia: +Bangladesh Standard Time:BT:Asia/Thimphu: +Bangladesh Standard Time:001:Asia/Dhaka: +Belarus Standard Time:001:Europe/Minsk: +Bougainville Standard Time:001:Pacific/Bougainville: +Canada Central Standard Time:001:America/Regina: +Cape Verde Standard Time:ZZ:Etc/GMT+1: +Cape Verde Standard Time:001:Atlantic/Cape_Verde: +Caucasus Standard Time:001:Asia/Yerevan: +Cen. Australia Standard Time:001:Australia/Adelaide: +Central America Standard Time:BZ:America/Belize: +Central America Standard Time:CR:America/Costa_Rica: +Central America Standard Time:EC:Pacific/Galapagos: +Central America Standard Time:HN:America/Tegucigalpa: +Central America Standard Time:NI:America/Managua: +Central America Standard Time:SV:America/El_Salvador: +Central America Standard Time:ZZ:Etc/GMT+6: +Central America Standard Time:001:America/Guatemala: +Central Asia Standard Time:AQ:Antarctica/Vostok: +Central Asia Standard Time:CN:Asia/Urumqi: +Central Asia Standard Time:IO:Indian/Chagos: +Central Asia Standard Time:ZZ:Etc/GMT-6: +Central Asia Standard Time:001:Asia/Bishkek: +Central Brazilian Standard Time:001:America/Cuiaba: +Central Europe Standard Time:AL:Europe/Tirane: +Central Europe Standard Time:CZ:Europe/Prague: +Central Europe Standard Time:ME:Europe/Podgorica: +Central Europe Standard Time:RS:Europe/Belgrade: +Central Europe Standard Time:SI:Europe/Ljubljana: +Central Europe Standard Time:SK:Europe/Bratislava: +Central Europe Standard Time:001:Europe/Budapest: +Central European Standard Time:BA:Europe/Sarajevo: +Central European Standard Time:HR:Europe/Zagreb: +Central European Standard Time:MK:Europe/Skopje: +Central European Standard Time:001:Europe/Warsaw: +Central Pacific Standard Time:AQ:Antarctica/Casey: +Central Pacific Standard Time:FM:Pacific/Ponape: +Central Pacific Standard Time:NC:Pacific/Noumea: +Central Pacific Standard Time:VU:Pacific/Efate: +Central Pacific Standard Time:ZZ:Etc/GMT-11: +Central Pacific Standard Time:001:Pacific/Guadalcanal: +Central Standard Time:CA:America/Winnipeg: +Central Standard Time:MX:America/Matamoros: +Central Standard Time:ZZ:CST6CDT: +Central Standard Time:001:America/Chicago: +Central Standard Time (Mexico):001:America/Mexico_City: +Chatham Islands Standard Time:001:Pacific/Chatham: +China Standard Time:HK:Asia/Hong_Kong: +China Standard Time:MO:Asia/Macau: +China Standard Time:001:Asia/Shanghai: +Cuba Standard Time:001:America/Havana: +Dateline Standard Time:001:Etc/GMT+12: +E. Africa Standard Time:AQ:Antarctica/Syowa: +E. Africa Standard Time:DJ:Africa/Djibouti: +E. Africa Standard Time:ER:Africa/Asmera: +E. Africa Standard Time:ET:Africa/Addis_Ababa: +E. Africa Standard Time:KM:Indian/Comoro: +E. Africa Standard Time:MG:Indian/Antananarivo: +E. Africa Standard Time:SO:Africa/Mogadishu: +E. Africa Standard Time:TZ:Africa/Dar_es_Salaam: +E. Africa Standard Time:UG:Africa/Kampala: +E. Africa Standard Time:YT:Indian/Mayotte: +E. Africa Standard Time:ZZ:Etc/GMT-3: +E. Africa Standard Time:001:Africa/Nairobi: +E. Australia Standard Time:001:Australia/Brisbane: +E. Europe Standard Time:001:Europe/Chisinau: +E. South America Standard Time:001:America/Sao_Paulo: +Easter Island Standard Time:001:Pacific/Easter: +Eastern Standard Time:BS:America/Nassau: +Eastern Standard Time:CA:America/Toronto: +Eastern Standard Time:ZZ:EST5EDT: +Eastern Standard Time:001:America/New_York: +Eastern Standard Time (Mexico):001:America/Cancun: +Egypt Standard Time:001:Africa/Cairo: +Ekaterinburg Standard Time:001:Asia/Yekaterinburg: +FLE Standard Time:AX:Europe/Mariehamn: +FLE Standard Time:BG:Europe/Sofia: +FLE Standard Time:EE:Europe/Tallinn: +FLE Standard Time:FI:Europe/Helsinki: +FLE Standard Time:LT:Europe/Vilnius: +FLE Standard Time:LV:Europe/Riga: +FLE Standard Time:001:Europe/Kiev: +Fiji Standard Time:001:Pacific/Fiji: +GMT Standard Time:ES:Atlantic/Canary: +GMT Standard Time:FO:Atlantic/Faeroe: +GMT Standard Time:GG:Europe/Guernsey: +GMT Standard Time:IE:Europe/Dublin: +GMT Standard Time:IM:Europe/Isle_of_Man: +GMT Standard Time:JE:Europe/Jersey: +GMT Standard Time:PT:Europe/Lisbon: +GMT Standard Time:001:Europe/London: +GTB Standard Time:CY:Asia/Nicosia: +GTB Standard Time:GR:Europe/Athens: +GTB Standard Time:001:Europe/Bucharest: +Georgian Standard Time:001:Asia/Tbilisi: +Greenland Standard Time:001:America/Godthab: +Greenwich Standard Time:BF:Africa/Ouagadougou: +Greenwich Standard Time:CI:Africa/Abidjan: +Greenwich Standard Time:GH:Africa/Accra: +Greenwich Standard Time:GL:America/Danmarkshavn: +Greenwich Standard Time:GM:Africa/Banjul: +Greenwich Standard Time:GN:Africa/Conakry: +Greenwich Standard Time:GW:Africa/Bissau: +Greenwich Standard Time:LR:Africa/Monrovia: +Greenwich Standard Time:ML:Africa/Bamako: +Greenwich Standard Time:MR:Africa/Nouakchott: +Greenwich Standard Time:SH:Atlantic/St_Helena: +Greenwich Standard Time:SL:Africa/Freetown: +Greenwich Standard Time:SN:Africa/Dakar: +Greenwich Standard Time:TG:Africa/Lome: +Greenwich Standard Time:001:Atlantic/Reykjavik: +Haiti Standard Time:001:America/Port-au-Prince: +Hawaiian Standard Time:CK:Pacific/Rarotonga: +Hawaiian Standard Time:PF:Pacific/Tahiti: +Hawaiian Standard Time:ZZ:Etc/GMT+10: +Hawaiian Standard Time:001:Pacific/Honolulu: +India Standard Time:001:Asia/Calcutta: +Iran Standard Time:001:Asia/Tehran: +Israel Standard Time:001:Asia/Jerusalem: +Jordan Standard Time:001:Asia/Amman: +Kaliningrad Standard Time:001:Europe/Kaliningrad: +Korea Standard Time:001:Asia/Seoul: +Libya Standard Time:001:Africa/Tripoli: +Line Islands Standard Time:ZZ:Etc/GMT-14: +Line Islands Standard Time:001:Pacific/Kiritimati: +Lord Howe Standard Time:001:Australia/Lord_Howe: +Magadan Standard Time:001:Asia/Magadan: +Magallanes Standard Time:001:America/Punta_Arenas: +Marquesas Standard Time:001:Pacific/Marquesas: +Mauritius Standard Time:RE:Indian/Reunion: +Mauritius Standard Time:SC:Indian/Mahe: +Mauritius Standard Time:001:Indian/Mauritius: +Middle East Standard Time:001:Asia/Beirut: +Montevideo Standard Time:001:America/Montevideo: +Morocco Standard Time:EH:Africa/El_Aaiun: +Morocco Standard Time:001:Africa/Casablanca: +Mountain Standard Time:CA:America/Edmonton: +Mountain Standard Time:MX:America/Ciudad_Juarez: +Mountain Standard Time:ZZ:MST7MDT: +Mountain Standard Time:001:America/Denver: +Mountain Standard Time (Mexico):001:America/Mazatlan: +Myanmar Standard Time:CC:Indian/Cocos: +Myanmar Standard Time:001:Asia/Rangoon: +N. Central Asia Standard Time:001:Asia/Novosibirsk: +Namibia Standard Time:001:Africa/Windhoek: +Nepal Standard Time:001:Asia/Katmandu: +New Zealand Standard Time:AQ:Antarctica/McMurdo: +New Zealand Standard Time:001:Pacific/Auckland: +Newfoundland Standard Time:001:America/St_Johns: +Norfolk Standard Time:001:Pacific/Norfolk: +North Asia East Standard Time:001:Asia/Irkutsk: +North Asia Standard Time:001:Asia/Krasnoyarsk: +North Korea Standard Time:001:Asia/Pyongyang: +Omsk Standard Time:001:Asia/Omsk: +Pacific SA Standard Time:001:America/Santiago: +Pacific Standard Time:CA:America/Vancouver: +Pacific Standard Time:ZZ:PST8PDT: +Pacific Standard Time:001:America/Los_Angeles: +Pacific Standard Time (Mexico):001:America/Tijuana: +Pakistan Standard Time:001:Asia/Karachi: +Paraguay Standard Time:001:America/Asuncion: +Qyzylorda Standard Time:001:Asia/Qyzylorda: +Romance Standard Time:BE:Europe/Brussels: +Romance Standard Time:DK:Europe/Copenhagen: +Romance Standard Time:ES:Europe/Madrid: +Romance Standard Time:001:Europe/Paris: +Russia Time Zone 10:001:Asia/Srednekolymsk: +Russia Time Zone 11:001:Asia/Kamchatka: +Russia Time Zone 3:001:Europe/Samara: +Russian Standard Time:UA:Europe/Simferopol: +Russian Standard Time:001:Europe/Moscow: +SA Eastern Standard Time:AQ:Antarctica/Rothera: +SA Eastern Standard Time:BR:America/Fortaleza: +SA Eastern Standard Time:FK:Atlantic/Stanley: +SA Eastern Standard Time:SR:America/Paramaribo: +SA Eastern Standard Time:ZZ:Etc/GMT+3: +SA Eastern Standard Time:001:America/Cayenne: +SA Pacific Standard Time:BR:America/Rio_Branco: +SA Pacific Standard Time:CA:America/Coral_Harbour: +SA Pacific Standard Time:EC:America/Guayaquil: +SA Pacific Standard Time:JM:America/Jamaica: +SA Pacific Standard Time:KY:America/Cayman: +SA Pacific Standard Time:PA:America/Panama: +SA Pacific Standard Time:PE:America/Lima: +SA Pacific Standard Time:ZZ:Etc/GMT+5: +SA Pacific Standard Time:001:America/Bogota: +SA Western Standard Time:AG:America/Antigua: +SA Western Standard Time:AI:America/Anguilla: +SA Western Standard Time:AW:America/Aruba: +SA Western Standard Time:BB:America/Barbados: +SA Western Standard Time:BL:America/St_Barthelemy: +SA Western Standard Time:BQ:America/Kralendijk: +SA Western Standard Time:BR:America/Manaus: +SA Western Standard Time:CA:America/Blanc-Sablon: +SA Western Standard Time:CW:America/Curacao: +SA Western Standard Time:DM:America/Dominica: +SA Western Standard Time:DO:America/Santo_Domingo: +SA Western Standard Time:GD:America/Grenada: +SA Western Standard Time:GP:America/Guadeloupe: +SA Western Standard Time:GY:America/Guyana: +SA Western Standard Time:KN:America/St_Kitts: +SA Western Standard Time:LC:America/St_Lucia: +SA Western Standard Time:MF:America/Marigot: +SA Western Standard Time:MQ:America/Martinique: +SA Western Standard Time:MS:America/Montserrat: +SA Western Standard Time:PR:America/Puerto_Rico: +SA Western Standard Time:SX:America/Lower_Princes: +SA Western Standard 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+################################################################################ +# JAXP Configuration File +# +# jaxp.properties (this file) is the default configuration file for JAXP, the API +# defined in the java.xml module. It is in java.util.Properties format and typically +# located in the {java.home}/conf directory. It may contain key/value pairs for +# specifying the implementation classes of JAXP factories and/or properties +# that have corresponding system properties. +# +# A user-specified configuration file can be set up using the system property +# java.xml.config.file to override any or all of the entries in jaxp.properties. +# The following statement provides myConfigurationFile as a custom configuration +# file: +# java -Djava.xml.config.file=myConfigurationFile +################################################################################ + +# ---- JAXP Default Configuration ---- +# +# The JAXP default configuration (jaxp.properties) contains entries for the +# Factory Lookup Mechanism and properties with corresponding system properties. +# The values are generally set to the default values of the properties. +# +# +# JAXP Lookup Mechanism: +# +# The JAXP configuration file ranks 2nd to the System Property in the precedent +# order of the JAXP Lookup Mechanism. When the System Property is not specified, +# a JAXP factory reads the configuration file in order to locate an implementation +# class. If found, the class specified will be used as the factory implementation +# class. +# +# The format of an entry is key=value where the key is the fully qualified name +# of the factory and value that of the implementation class. The following entry +# set a DocumentBuilderFactory implementation class: +# +# javax.xml.parsers.DocumentBuilderFactory=com.sun.org.apache.xerces.internal.jaxp.DocumentBuilderFactoryImpl +# +# +# Java SE and JDK Implementation Specific Properties: +# +# The JAXP configuration file ranks above the default settings in the Property +# Precedence in that its entries will override the default values of the corresponding +# properties. +# +# All properties that have System Properties defined in Java SE or supported +# by the JDK Implementation can be placed in the configuration file to override +# the default property values. The format is: +# system-property-name=value +# +# For example, the FILES property in CatalogFeatures has an associated system +# property called javax.xml.catalog.files. An entry for the FILES property in the +# configuration file would therefore use javax.xml.catalog.files as the key, that +# is: +# javax.xml.catalog.files=strict +# +# +# Extension Functions: +# +# This property determines whether XSLT and XPath extension functions are allowed. +# The value type is boolean and the default value is true (allowing +# extension functions). The following entry would override the default value and +# disallow extension functions: +# +# jdk.xml.enableExtensionFunctions=false +# +# +# Overriding the default parser: +# +# This property allows using a third party implementation to override the default +# parser provided by the JDK. The value type is boolean and the default value is +# false, disallowing overriding the default parser. The setting below reflects +# the default property setting: +# +jdk.xml.overrideDefaultParser=false +# +# +# External Access Properties: +# +# The External Access Properties are defined in javax.xml.XMLConstants. Their +# system properties are javax.xml.accessExternalDTD, javax.xml.accessExternalSchema, +# and javax.xml.accessExternalStylesheet. The values are a list of protocols separated +# by comma, plus empty string ("") to represent no protocol allowed and the key +# word "all" for all access. The default is "all", allowing all external resources +# to be fetched. The followings are example of external access settings: +# +# allow local (file) DTDs to be retrieved +# javax.xml.accessExternalDTD=file +# +# allow local (file) and remote (http) external schemas +# javax.xml.accessExternalSchema=file, http +# +# reject any external stylesheets +# javax.xml.accessExternalStylesheet="" +# +# allow all external stylesheets +# javax.xml.accessExternalStylesheet="all" +# +# +# Catalog Properties: +# +# The Catalog API defines four features: FILES, PREFER, DEFER and RESOLVE. +# Except PREFER, all other properties can be placed in the configuration file +# using the system properties defined for them. +# +# FILES: A semicolon-delimited list of URIs to locate the catalog files. The URIs +# must be absolute and have a URL protocol handler for the URI scheme. The following +# is an example of setting up a catalog file: +# +# javax.xml.catalog.files = file:///users/auser/catalog/catalog.xml +# +# DEFER: Indicates that the alternative catalogs including those specified in +# delegate entries or nextCatalog are not read until they are needed. The value +# is a boolean and the default value is true. +# +# javax.xml.catalog.defer=true +# +# RESOLVE: Determines the action if there is no matching entry found after all of +# the specified catalogs are exhausted. The values are key words: strict, continue, +# and ignore. The default is strict. The following setting reflects the default +# setting. +# +# javax.xml.catalog.resolve=strict +# +# +# useCatalog: +# This property instructs XML processors to use XML Catalogs to resolve entity +# references. The value is a boolean and the default value is true. +# +# javax.xml.useCatalog=true +# +# +# Implementation Specific Properties - Limits +# +# Limits have a value type Integer. The values must be positive integers. Zero +# means no limit. +# +# Limits the number of entity expansions. The default value is 64000 +# jdk.xml.entityExpansionLimit=64000 +# +# Limits the total size of all entities that include general and parameter entities. +# The size is calculated as an aggregation of all entities. The default value is 5x10^7. +# jdk.xml.totalEntitySizeLimit=5E7 +# +# Limits the maximum size of any general entities. The default value is 0. +# jdk.xml.maxGeneralEntitySizeLimit=0 +# +# Limits the maximum size of any parameter entities, including the result of +# nesting multiple parameter entities. The default value is 10^6. +# jdk.xml.maxParameterEntitySizeLimit=1E6 +# +# Limits the total number of nodes in all entity references. The default value is 3x10^6. +# jdk.xml.entityReplacementLimit=3E6 +# +# Limits the number of attributes an element can have. The default value is 10000. +# jdk.xml.elementAttributeLimit=10000 +# +# Limits the number of content model nodes that may be created when building a +# grammar for a W3C XML Schema that contains maxOccurs attributes with values +# other than "unbounded". The default value is 5000. +# jdk.xml.maxOccurLimit=5000 +# +# Limits the maximum element depth. The default value is 0. +# jdk.xml.maxElementDepth=0 +# +# Limits the maximum size of XML names, including element name, attribute name +# and namespace prefix and URI. The default value is 1000. +jdk.xml.maxXMLNameLimit=1000 +# +# +# XPath Limits +# +# Limits the number of groups an XPath expression can contain. The default value is 10. +jdk.xml.xpathExprGrpLimit=10 +# +# Limits the number of operators an XPath expression can contain. The default value is 100. +jdk.xml.xpathExprOpLimit=100 +# +# Limits the total number of XPath operators in an XSL Stylesheet. The default value is 10000. +jdk.xml.xpathTotalOpLimit=10000 + diff --git a/java21/conf/logging.properties b/java21/conf/logging.properties new file mode 100644 index 0000000000000000000000000000000000000000..99a385072902340b95ffc99ebbaa6b00dfa8fc52 --- /dev/null +++ b/java21/conf/logging.properties @@ -0,0 +1,63 @@ +############################################################ +# Default Logging Configuration File +# +# You can use a different file by specifying a filename +# with the java.util.logging.config.file system property. +# For example, java -Djava.util.logging.config.file=myfile +############################################################ + +############################################################ +# Global properties +############################################################ + +# "handlers" specifies a comma-separated list of log Handler +# classes. These handlers will be installed during VM startup. +# Note that these classes must be on the system classpath. +# By default we only configure a ConsoleHandler, which will only +# show messages at the INFO and above levels. +handlers= java.util.logging.ConsoleHandler + +# To also add the FileHandler, use the following line instead. +#handlers= java.util.logging.FileHandler, java.util.logging.ConsoleHandler + +# Default global logging level. +# This specifies which kinds of events are logged across +# all loggers. For any given facility this global level +# can be overridden by a facility-specific level +# Note that the ConsoleHandler also has a separate level +# setting to limit messages printed to the console. +.level= INFO + +############################################################ +# Handler specific properties. +# Describes specific configuration info for Handlers. +############################################################ + +# default file output is in user's home directory. +java.util.logging.FileHandler.pattern = %h/java%u.log +java.util.logging.FileHandler.limit = 50000 +java.util.logging.FileHandler.count = 1 +# Default number of locks FileHandler can obtain synchronously. +# This specifies maximum number of attempts to obtain lock file by FileHandler +# implemented by incrementing the unique field %u as per FileHandler API documentation. +java.util.logging.FileHandler.maxLocks = 100 +java.util.logging.FileHandler.formatter = java.util.logging.XMLFormatter + +# Limit the messages that are printed on the console to INFO and above. +java.util.logging.ConsoleHandler.level = INFO +java.util.logging.ConsoleHandler.formatter = java.util.logging.SimpleFormatter + +# Example to customize the SimpleFormatter output format +# to print one-line log message like this: +# : [] +# +# java.util.logging.SimpleFormatter.format=%4$s: %5$s [%1$tc]%n + +############################################################ +# Facility-specific properties. +# Provides extra control for each logger. +############################################################ + +# For example, set the com.xyz.foo logger to only log SEVERE +# messages: +# com.xyz.foo.level = SEVERE diff --git a/java21/conf/management/jmxremote.access b/java21/conf/management/jmxremote.access new file mode 100644 index 0000000000000000000000000000000000000000..a09e008fe34c565323833e38e21408628e219e20 --- /dev/null +++ b/java21/conf/management/jmxremote.access @@ -0,0 +1,79 @@ +###################################################################### +# Default Access Control File for Remote JMX(TM) Monitoring +###################################################################### +# +# Access control file for Remote JMX API access to monitoring. +# This file defines the allowed access for different roles. The +# password file (jmxremote.password by default) defines the roles and their +# passwords. To be functional, a role must have an entry in +# both the password and the access files. +# +# The default location of this file is $JRE/conf/management/jmxremote.access +# You can specify an alternate location by specifying a property in +# the management config file $JRE/conf/management/management.properties +# (See that file for details) +# +# The file format for password and access files is syntactically the same +# as the Properties file format. The syntax is described in the Javadoc +# for java.util.Properties.load. +# A typical access file has multiple lines, where each line is blank, +# a comment (like this one), or an access control entry. +# +# An access control entry consists of a role name, and an +# associated access level. The role name is any string that does not +# itself contain spaces or tabs. It corresponds to an entry in the +# password file (jmxremote.password). The access level is one of the +# following: +# "readonly" grants access to read attributes of MBeans. +# For monitoring, this means that a remote client in this +# role can read measurements but cannot perform any action +# that changes the environment of the running program. +# "readwrite" grants access to read and write attributes of MBeans, +# to invoke operations on them, and optionally +# to create or remove them. This access should be granted +# only to trusted clients, since they can potentially +# interfere with the smooth operation of a running program. +# +# The "readwrite" access level can optionally be followed by the "create" and/or +# "unregister" keywords. The "unregister" keyword grants access to unregister +# (delete) MBeans. The "create" keyword grants access to create MBeans of a +# particular class or of any class matching a particular pattern. Access +# should only be granted to create MBeans of known and trusted classes. +# +# For example, the following entry would grant readwrite access +# to "controlRole", as well as access to create MBeans of the class +# javax.management.monitor.CounterMonitor and to unregister any MBean: +# controlRole readwrite \ +# create javax.management.monitor.CounterMonitorMBean \ +# unregister +# or equivalently: +# controlRole readwrite unregister create javax.management.monitor.CounterMBean +# +# The following entry would grant readwrite access as well as access to create +# MBeans of any class in the packages javax.management.monitor and +# javax.management.timer: +# controlRole readwrite \ +# create javax.management.monitor.*,javax.management.timer.* \ +# unregister +# +# The \ character is defined in the Properties file syntax to allow continuation +# lines as shown here. A * in a class pattern matches a sequence of characters +# other than dot (.), so javax.management.monitor.* matches +# javax.management.monitor.CounterMonitor but not +# javax.management.monitor.foo.Bar. +# +# A given role should have at most one entry in this file. If a role +# has no entry, it has no access. +# If multiple entries are found for the same role name, then the last +# access entry is used. +# +# +# Default access control entries: +# o The "monitorRole" role has readonly access. +# o The "controlRole" role has readwrite access and can create the standard +# Timer and Monitor MBeans defined by the JMX API. + +monitorRole readonly +controlRole readwrite \ + create javax.management.monitor.*,javax.management.timer.* \ + unregister diff --git a/java21/conf/management/jmxremote.password.template b/java21/conf/management/jmxremote.password.template new file mode 100644 index 0000000000000000000000000000000000000000..c98a0ad253a422f0542cbdf52443a94d96ce1ada --- /dev/null +++ b/java21/conf/management/jmxremote.password.template @@ -0,0 +1,115 @@ +# ---------------------------------------------------------------------- +# Template for jmxremote.password +# +# o Copy this template to jmxremote.password +# o Set the user/password entries in jmxremote.password +# o Change the permission of jmxremote.password to be accessible +# only by the owner. +# o The jmxremote.passwords file will be re-written by the server +# to replace all plain text passwords with hashed passwords when +# the file is read by the server. +# + +############################################################## +# Password File for Remote JMX Monitoring +############################################################## +# +# Password file for Remote JMX API access to monitoring. This +# file defines the different roles and their passwords. The access +# control file (jmxremote.access by default) defines the allowed +# access for each role. To be functional, a role must have an entry +# in both the password and the access files. +# +# Default location of this file is $JRE/conf/management/jmxremote.password +# You can specify an alternate location by specifying a property in +# the management config file $JRE/conf/management/management.properties +# or by specifying a system property (See that file for details). + +############################################################## +# File format of the jmxremote.password file +############################################################## +# +# The file contains multiple lines where each line is blank, +# a comment (like this one), or a password entry. +# +# password entry follows the below syntax +# role_name W [clearPassword|hashedPassword] +# +# role_name is any string that does not itself contain spaces or tabs. +# W = spaces or tabs +# +# Passwords can be specified via clear text or via a hash. Clear text password +# is any string that does not contain spaces or tabs. Hashed passwords must +# follow the below format. +# hashedPassword = base64_encoded_64_byte_salt W base64_encoded_hash W hash_algorithm +# where, +# base64_encoded_64_byte_salt = 64 byte random salt +# base64_encoded_hash = Hash_algorithm(password + salt) +# W = spaces or tabs +# hash_algorithm = Algorithm string specified using the format below +# https://docs.oracle.com/javase/9/docs/specs/security/standard-names.html#messagedigest-algorithms +# This is an optional field. If not specified, SHA3-512 will be assumed. +# +# If passwords are in clear, they will be overwritten by their hash if all of +# the below criteria are met. +# * com.sun.management.jmxremote.password.toHashes property is set to true in +# management.properties file +# * the password file is writable +# * the system security policy allows writing into the password file, if a +# security manager is configured +# +# In order to change the password for a role, replace the hashed password entry +# with a new clear text password or a new hashed password. If the new password +# is in clear, it will be replaced with its hash when a new login attempt is made. +# +# A given role should have at most one entry in this file. If a role +# has no entry, it has no access. +# If multiple entries are found for the same role name, then the last one +# is used. +# +# A user generated hashed password file can also be used instead of clear-text +# password file. If generated by the user, hashed passwords must follow the +# format specified above. +# +# Caution: It is recommended not to edit the password file while the +# agent is running, as edits could be lost if a client connection triggers the +# hashing of the password file at the same time that the file is externally modified. +# The integrity of the file is guaranteed, but any external edits made to the +# file during the short period between the time that the agent reads the file +# and the time that it writes it back might get lost + +############################################################## +# File permissions of the jmxremote.password file +############################################################## +# This file must be made accessible by ONLY the owner, +# otherwise the program will exit with an error. +# +# In a typical installation, this file can be accessed by anybody on the +# local machine, and possibly by people on other machines. +# For security, you should either restrict the access to this file except for owner, +# or specify another, less accessible file in the management config file +# as described above. +# +# In order to prevent inadverent edits to the password file in the +# production environment, it is recommended to deploy a read-only +# hashed password file. The hashed entries for clear passwords can be generated +# in advance by running the JMX agent. +# + +############################################################## +# Sample of the jmxremote.password file +############################################################## +# Following are two commented-out entries. The "monitorRole" role has +# password "QED". The "controlRole" role has password "R&D". This is an example +# of specifying passwords in the clear +# +# monitorRole QED +# controlRole R&D +# +# Once a login attempt is made, passwords will be hashed and the file will have +# below entries with clear passwords overwritten by their respective +# SHA3-512 hash +# +# monitorRole trilby APzBTt34rV2l+OMbuvbnOQ4si8UZmfRCVbIY1+fAofV5CkQzXS/FDMGteQQk/R3q1wtt104qImzJEA7gCwl6dw== 4EeTdSJ7X6Imu0Mb+dWqIns7a7QPIBoM3NB/XlpMQSPSicE7PnlALVWn2pBY3Q3pGDHyAb32Hd8GUToQbUhAjA== SHA3-512 +# controlRole roHEJSbRqSSTII4Z4+NOCV2OJaZVQ/dw153Fy2u4ILDP9XiZ426GwzCzc3RtpoqNMwqYIcfdd74xWXSMrWtGaA== w9qDsekgKn0WOVJycDyU0kLBa081zbStcCjUAVEqlfon5Sgx7XHtaodbmzpLegA1jT7Ag36T0zHaEWRHJe2fdA== SHA3-512 +# \ No newline at end of file diff --git a/java21/conf/management/management.properties b/java21/conf/management/management.properties new file mode 100644 index 0000000000000000000000000000000000000000..6df414e922466e78462ae6e3f5a09ff2443216f1 --- /dev/null +++ b/java21/conf/management/management.properties @@ -0,0 +1,327 @@ +##################################################################### +# Default Configuration File for Java Platform Management +##################################################################### +# +# The Management Configuration file (in java.util.Properties format) +# will be read if one of the following system properties is set: +# -Dcom.sun.management.jmxremote.port= +# or -Dcom.sun.management.config.file= +# +# The default Management Configuration file is: +# +# $JRE/conf/management/management.properties +# +# Another location for the Management Configuration File can be specified +# by the following property on the Java command line: +# +# -Dcom.sun.management.config.file= +# +# If -Dcom.sun.management.config.file= is set, the port +# number for the management agent can be specified in the config file +# using the following lines: +# +# ################ Management Agent Port ######################### +# +# For setting the JMX RMI agent port use the following line +# com.sun.management.jmxremote.port= +# +# For setting the JMX local server port use the following line +# com.sun.management.jmxremote.local.port= + +##################################################################### +# Optional Instrumentation +##################################################################### +# +# By default only the basic instrumentation with low overhead is on. +# The following properties allow to selectively turn on optional +# instrumentation which are off by default and may have some +# additional overhead. +# +# com.sun.management.enableThreadContentionMonitoring +# +# This option enables thread contention monitoring if the +# Java virtual machine supports such instrumentation. +# Refer to the specification for the java.lang.management.ThreadMXBean +# interface - see isThreadContentionMonitoringSupported() method. +# + +# To enable thread contention monitoring, uncomment the following line +# com.sun.management.enableThreadContentionMonitoring + +##################################################################### +# RMI Management Properties +##################################################################### +# +# If system property -Dcom.sun.management.jmxremote.port= +# is set then +# - A MBean server is started +# - JRE Platform MBeans are registered in the MBean server +# - RMI connector is published in a private readonly registry at +# specified port using a well known name, "jmxrmi" +# - the following properties are read for JMX remote management. +# +# The configuration can be specified only at startup time. +# Later changes to above system property (e.g. via setProperty method), +# this config file, the password file, or the access file have no effect to the +# running MBean server, the connector, or the registry. +# + +# +# ########## RMI connector settings for local management ########## +# +# com.sun.management.jmxremote.local.only=true|false +# Default for this property is true. (Case for true/false ignored) +# If this property is specified as true then the local JMX RMI connector +# server will only accept connection requests from clients running on +# the host where the out-of-the-box JMX management agent is running. +# In order to ensure backwards compatibility this property could be +# set to false. However, deploying the local management agent in this +# way is discouraged because the local JMX RMI connector server will +# accept connection requests from any client either local or remote. +# For remote management the remote JMX RMI connector server should +# be used instead with authentication and SSL/TLS encryption enabled. +# + +# For allowing the local management agent accept local +# and remote connection requests use the following line +# com.sun.management.jmxremote.local.only=false + +# +# ###################### RMI SSL ############################# +# +# com.sun.management.jmxremote.ssl=true|false +# Default for this property is true. (Case for true/false ignored) +# If this property is specified as false then SSL is not used. +# + +# For RMI monitoring without SSL use the following line +# com.sun.management.jmxremote.ssl=false + +# com.sun.management.jmxremote.ssl.config.file=filepath +# Specifies the location of the SSL configuration file. A properties +# file can be used to supply the keystore and truststore location and +# password settings thus avoiding to pass them as cleartext in the +# command-line. +# +# The current implementation of the out-of-the-box management agent will +# look up and use the properties specified below to configure the SSL +# keystore and truststore, if present: +# javax.net.ssl.keyStore= +# javax.net.ssl.keyStorePassword= +# javax.net.ssl.trustStore= +# javax.net.ssl.trustStorePassword= +# Any other properties in the file will be ignored. This will allow us +# to extend the property set in the future if required by the default +# SSL implementation. +# +# If the property "com.sun.management.jmxremote.ssl" is set to false, +# then this property is ignored. +# + +# For supplying the keystore settings in a file use the following line +# com.sun.management.jmxremote.ssl.config.file=filepath + +# com.sun.management.jmxremote.ssl.enabled.cipher.suites= +# The value of this property is a string that is a comma-separated list +# of SSL/TLS cipher suites to enable. This property can be specified in +# conjunction with the previous property "com.sun.management.jmxremote.ssl" +# in order to control which particular SSL/TLS cipher suites are enabled +# for use by accepted connections. If this property is not specified then +# the SSL/TLS RMI Server Socket Factory uses the SSL/TLS cipher suites that +# are enabled by default. +# + +# com.sun.management.jmxremote.ssl.enabled.protocols= +# The value of this property is a string that is a comma-separated list +# of SSL/TLS protocol versions to enable. This property can be specified in +# conjunction with the previous property "com.sun.management.jmxremote.ssl" +# in order to control which particular SSL/TLS protocol versions are +# enabled for use by accepted connections. If this property is not +# specified then the SSL/TLS RMI Server Socket Factory uses the SSL/TLS +# protocol versions that are enabled by default. +# + +# com.sun.management.jmxremote.ssl.need.client.auth=true|false +# Default for this property is false. (Case for true/false ignored) +# If this property is specified as true in conjunction with the previous +# property "com.sun.management.jmxremote.ssl" then the SSL/TLS RMI Server +# Socket Factory will require client authentication. +# + +# For RMI monitoring with SSL client authentication use the following line +# com.sun.management.jmxremote.ssl.need.client.auth=true + +# com.sun.management.jmxremote.registry.ssl=true|false +# Default for this property is false. (Case for true/false ignored) +# If this property is specified as true then the RMI registry used +# to bind the RMIServer remote object is protected with SSL/TLS +# RMI Socket Factories that can be configured with the properties: +# com.sun.management.jmxremote.ssl.config.file +# com.sun.management.jmxremote.ssl.enabled.cipher.suites +# com.sun.management.jmxremote.ssl.enabled.protocols +# com.sun.management.jmxremote.ssl.need.client.auth +# If the two properties below are true at the same time, i.e. +# com.sun.management.jmxremote.ssl=true +# com.sun.management.jmxremote.registry.ssl=true +# then the RMIServer remote object and the RMI registry are +# both exported with the same SSL/TLS RMI Socket Factories. +# + +# For using an SSL/TLS protected RMI registry use the following line +# com.sun.management.jmxremote.registry.ssl=true + +# +# ################ RMI User authentication ################ +# +# com.sun.management.jmxremote.authenticate=true|false +# Default for this property is true. (Case for true/false ignored) +# If this property is specified as false then no authentication is +# performed and all users are allowed all access. +# + +# For RMI monitoring without any checking use the following line +# com.sun.management.jmxremote.authenticate=false + +# +# ################ RMI Login configuration ################### +# +# com.sun.management.jmxremote.login.config= +# Specifies the name of a JAAS login configuration entry to use when +# authenticating users of RMI monitoring. +# +# Setting this property is optional - the default login configuration +# specifies a file-based authentication that uses the password file. +# +# When using this property to override the default login configuration +# then the named configuration entry must be in a file that gets loaded +# by JAAS. In addition, the login module(s) specified in the configuration +# should use the name and/or password callbacks to acquire the user's +# credentials. See the NameCallback and PasswordCallback classes in the +# javax.security.auth.callback package for more details. +# +# If the property "com.sun.management.jmxremote.authenticate" is set to +# false, then this property and the password & access files are ignored. +# + +# For a non-default login configuration use the following line +# com.sun.management.jmxremote.login.config= + +# +# ################ RMI Password file location ################## +# +# com.sun.management.jmxremote.password.file=filepath +# Specifies location for password file +# This is optional - default location is +# $JRE/conf/management/jmxremote.password +# +# If the property "com.sun.management.jmxremote.authenticate" is set to +# false, then this property and the password & access files are ignored. +# Otherwise the password file must exist and be in the valid format. +# If the password file is empty or non-existent then no access is allowed. +# + +# For a non-default password file location use the following line +# com.sun.management.jmxremote.password.file=filepath + +# +# ################# Hash passwords in password file ############## +# com.sun.management.jmxremote.password.toHashes = true|false +# Default for this property is true. +# Specifies if passwords in the password file should be hashed or not. +# If this property is true, and if the password file is writable, and if the +# system security policy allows writing into the password file, +# all the clear passwords in the password file will be replaced by +# their SHA3-512 hash when the file is read by the server +# + +# +# ################ RMI Access file location ##################### +# +# com.sun.management.jmxremote.access.file=filepath +# Specifies location for access file +# This is optional - default location is +# $JRE/conf/management/jmxremote.access +# +# If the property "com.sun.management.jmxremote.authenticate" is set to +# false, then this property and the password & access files are ignored. +# Otherwise, the access file must exist and be in the valid format. +# If the access file is empty or non-existent then no access is allowed. +# + +# For a non-default password file location use the following line +# com.sun.management.jmxremote.access.file=filepath +# + +# ################ Management agent listen interface ######################### +# +# com.sun.management.jmxremote.host= +# Specifies the local interface on which the JMX RMI agent will bind. +# This is useful when running on machines which have several +# interfaces defined. It makes it possible to listen to a specific +# subnet accessible through that interface. +# +# The format of the value for that property is any string accepted +# by java.net.InetAddress.getByName(String). +# + +# ################ Filter for ObjectInputStream ############################# +# com.sun.management.jmxremote.serial.filter.pattern= +# A filter, if configured, is used by java.io.ObjectInputStream during +# deserialization of parameters sent to the JMX default agent to validate the +# contents of the stream. +# A filter is configured as a sequence of patterns, each pattern is either +# matched against the name of a class in the stream or defines a limit. +# Patterns are separated by ";" (semicolon). +# Whitespace is significant and is considered part of the pattern. +# +# If a pattern includes a "=", it sets a limit. +# If a limit appears more than once the last value is used. +# Limits are checked before classes regardless of the order in the sequence of patterns. +# If any of the limits are exceeded, the filter status is REJECTED. +# +# maxdepth=value - the maximum depth of a graph +# maxrefs=value - the maximum number of internal references +# maxbytes=value - the maximum number of bytes in the input stream +# maxarray=value - the maximum array length allowed +# +# Other patterns, from left to right, match the class or package name as +# returned from Class.getName. +# If the class is an array type, the class or package to be matched is the element type. +# Arrays of any number of dimensions are treated the same as the element type. +# For example, a pattern of "!example.Foo", rejects creation of any instance or +# array of example.Foo. +# +# If the pattern starts with "!", the status is REJECTED if the remaining pattern +# is matched; otherwise the status is ALLOWED if the pattern matches. +# If the pattern contains "/", the non-empty prefix up to the "/" is the module name; +# if the module name matches the module name of the class then +# the remaining pattern is matched with the class name. +# If there is no "/", the module name is not compared. +# If the pattern ends with ".**" it matches any class in the package and all subpackages. +# If the pattern ends with ".*" it matches any class in the package. +# If the pattern ends with "*", it matches any class with the pattern as a prefix. +# If the pattern is equal to the class name, it matches. +# Otherwise, the status is UNDECIDED. +# +# Ending with !* ensures we reject classes which are otherwise unmatched. +com.sun.management.jmxremote.serial.filter.pattern=\ +java.lang.*;\ +java.lang.reflect.Proxy;\ +java.math.BigInteger;\ +java.math.BigDecimal;\ +java.util.*;\ +javax.management.*;\ +javax.management.modelmbean.*;\ +javax.management.monitor.*;\ +javax.management.openmbean.*;\ +javax.management.relation.*;\ +javax.management.remote.*;\ +javax.management.remote.rmi.*;\ +javax.management.timer.*;\ +javax.rmi.ssl.*;\ +java.rmi.MarshalledObject;\ +java.rmi.dgc.*;\ +java.rmi.server.*;\ +javax.security.auth.Subject;\ +!* + diff --git a/java21/conf/net.properties b/java21/conf/net.properties new file mode 100644 index 0000000000000000000000000000000000000000..eac987eaaa3596f50ce5f8b4266d39d5ccecdfb1 --- /dev/null +++ b/java21/conf/net.properties @@ -0,0 +1,168 @@ +############################################################ +# Default Networking Configuration File +# +# This file may contain default values for the networking system properties. +# These values are only used when the system properties are not specified +# on the command line or set programmatically. +# For now, only the various proxy settings can be configured here. +############################################################ + +# Whether or not the DefaultProxySelector will default to System Proxy +# settings when they do exist. +# Set it to 'true' to enable this feature and check for platform +# specific proxy settings +# Note that the system properties that do explicitly set proxies +# (like http.proxyHost) do take precedence over the system settings +# even if java.net.useSystemProxies is set to true. + +java.net.useSystemProxies=false + +#------------------------------------------------------------------------ +# Proxy configuration for the various protocol handlers. +# DO NOT uncomment these lines if you have set java.net.useSystemProxies +# to true as the protocol specific properties will take precedence over +# system settings. +#------------------------------------------------------------------------ + +# HTTP Proxy settings. proxyHost is the name of the proxy server +# (e.g. proxy.mydomain.com), proxyPort is the port number to use (default +# value is 80) and nonProxyHosts is a '|' separated list of hostnames which +# should be accessed directly, ignoring the proxy server (default value is +# localhost & 127.0.0.1). +# +# http.proxyHost= +# http.proxyPort=80 +http.nonProxyHosts=localhost|127.*|[::1] +# +# HTTPS Proxy Settings. proxyHost is the name of the proxy server +# (e.g. proxy.mydomain.com), proxyPort is the port number to use (default +# value is 443). The HTTPS protocol handlers uses the http nonProxyHosts list. +# +# https.proxyHost= +# https.proxyPort=443 +# +# FTP Proxy settings. proxyHost is the name of the proxy server +# (e.g. proxy.mydomain.com), proxyPort is the port number to use (default +# value is 80) and nonProxyHosts is a '|' separated list of hostnames which +# should be accessed directly, ignoring the proxy server (default value is +# localhost & 127.0.0.1). +# +# ftp.proxyHost= +# ftp.proxyPort=80 +ftp.nonProxyHosts=localhost|127.*|[::1] +# +# Socks proxy settings. socksProxyHost is the name of the proxy server +# (e.g. socks.domain.com), socksProxyPort is the port number to use +# (default value is 1080) +# +# socksProxyHost= +# socksProxyPort=1080 +# +# HTTP Keep Alive settings. remainingData is the maximum amount of data +# in kilobytes that will be cleaned off the underlying socket so that it +# can be reused (default value is 512K), queuedConnections is the maximum +# number of Keep Alive connections to be on the queue for clean up (default +# value is 10). +# http.KeepAlive.remainingData=512 +# http.KeepAlive.queuedConnections=10 + +# Authentication Scheme restrictions for HTTP and HTTPS. +# +# In some environments certain authentication schemes may be undesirable +# when proxying HTTP or HTTPS. For example, "Basic" results in effectively the +# cleartext transmission of the user's password over the physical network. +# This section describes the mechanism for disabling authentication schemes +# based on the scheme name. Disabled schemes will be treated as if they are not +# supported by the implementation. +# +# The 'jdk.http.auth.tunneling.disabledSchemes' property lists the authentication +# schemes that will be disabled when tunneling HTTPS over a proxy, HTTP CONNECT. +# The 'jdk.http.auth.proxying.disabledSchemes' property lists the authentication +# schemes that will be disabled when proxying HTTP. +# +# In both cases the property is a comma-separated list of, case-insensitive, +# authentication scheme names, as defined by their relevant RFCs. An +# implementation may, but is not required to, support common schemes whose names +# include: 'Basic', 'Digest', 'NTLM', 'Kerberos', 'Negotiate'. A scheme that +# is not known, or not supported, by the implementation is ignored. +# +# Note: This property is currently used by the JDK Reference implementation. It +# is not guaranteed to be examined and used by other implementations. +# +#jdk.http.auth.proxying.disabledSchemes= +jdk.http.auth.tunneling.disabledSchemes=Basic + +# +# Allow restricted HTTP request headers +# +# By default, the following request headers are not allowed to be set by user code +# in HttpRequests: "connection", "content-length", "expect", "host" and "upgrade". +# The 'jdk.httpclient.allowRestrictedHeaders' property allows one or more of these +# headers to be specified as a comma separated list to override the default restriction. +# The names are case-insensitive and white-space is ignored (removed before processing +# the list). Note, this capability is mostly intended for testing and isn't expected +# to be used in real deployments. Protocol errors or other undefined behavior is likely +# to occur when using them. The property is not set by default. +# Note also, that there may be other headers that are restricted from being set +# depending on the context. This includes the "Authorization" header when the +# relevant HttpClient has an authenticator set. These restrictions cannot be +# overridden by this property. +# +# jdk.httpclient.allowRestrictedHeaders=host +# +# +# Transparent NTLM HTTP authentication mode on Windows. Transparent authentication +# can be used for the NTLM scheme, where the security credentials based on the +# currently logged in user's name and password can be obtained directly from the +# operating system, without prompting the user. This property has three possible +# values which regulate the behavior as shown below. Other unrecognized values +# are handled the same as 'disabled'. Note, that NTLM is not considered to be a +# strongly secure authentication scheme and care should be taken before enabling +# this mechanism. +# +# Transparent authentication never used. +#jdk.http.ntlm.transparentAuth=disabled +# +# Enabled for all hosts. +#jdk.http.ntlm.transparentAuth=allHosts +# +# Enabled for hosts that are trusted in Windows Internet settings +#jdk.http.ntlm.transparentAuth=trustedHosts +# +jdk.http.ntlm.transparentAuth=disabled + +# +# Maximum HTTP field section size that a client is prepared to accept +# +# jdk.http.maxHeaderSize=393216 +# +# This is the maximum header field section size that a client is prepared to accept. +# This is computed as the sum of the size of the uncompressed header name, plus +# the size of the uncompressed header value, plus an overhead of 32 bytes for +# each field section line. If a peer sends a field section that exceeds this +# size a {@link java.net.ProtocolException ProtocolException} will be raised. +# This applies to all versions of the HTTP protocol. A value of zero or a negative +# value means no limit. If left unspecified, the default value is 393216 bytes +# or 384kB. +# +# Note: This property is currently used by the JDK Reference implementation. It +# is not guaranteed to be examined and used by other implementations. +# +# Default directory where automatically bound Unix domain server +# sockets are stored. Sockets are automatically bound when bound +# with a null address. +# +# The search order for the directory on Windows is: +# +# 1. System property "jdk.net.unixdomain.tmpdir" +# +# 2. Networking property "jdk.net.unixdomain.tmpdir" specified +# in this file (not set by default) +# +# 3. The TEMP environment variable (the effective default) +# +# 4. The java.io.tmpdir system property +# +#jdk.net.unixdomain.tmpdir= +# + diff --git a/java21/conf/security/java.policy b/java21/conf/security/java.policy new file mode 100644 index 0000000000000000000000000000000000000000..88e8753dee27ead9ca1c5678371dd87931e25591 --- /dev/null +++ b/java21/conf/security/java.policy @@ -0,0 +1,46 @@ +// +// This system policy file grants a set of default permissions to all domains +// and can be configured to grant additional permissions to modules and other +// code sources. The code source URL scheme for modules linked into a +// run-time image is "jrt". +// +// For example, to grant permission to read the "foo" property to the module +// "com.greetings", the grant entry is: +// +// grant codeBase "jrt:/com.greetings" { +// permission java.util.PropertyPermission "foo", "read"; +// }; +// + +// default permissions granted to all domains +grant { + // allows anyone to listen on dynamic ports + permission java.net.SocketPermission "localhost:0", "listen"; + + // "standard" properties that can be read by anyone + permission java.util.PropertyPermission "java.version", "read"; + permission java.util.PropertyPermission "java.vendor", "read"; + permission java.util.PropertyPermission "java.vendor.url", "read"; + permission java.util.PropertyPermission "java.class.version", "read"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "os.version", "read"; + permission java.util.PropertyPermission "os.arch", "read"; + permission java.util.PropertyPermission "file.separator", "read"; + permission java.util.PropertyPermission "path.separator", "read"; + permission java.util.PropertyPermission "line.separator", "read"; + permission java.util.PropertyPermission + "java.specification.version", "read"; + permission java.util.PropertyPermission + "java.specification.maintenance.version", "read"; + permission java.util.PropertyPermission "java.specification.vendor", "read"; + permission java.util.PropertyPermission "java.specification.name", "read"; + permission java.util.PropertyPermission + "java.vm.specification.version", "read"; + permission java.util.PropertyPermission + "java.vm.specification.vendor", "read"; + permission java.util.PropertyPermission + "java.vm.specification.name", "read"; + permission java.util.PropertyPermission "java.vm.version", "read"; + permission java.util.PropertyPermission "java.vm.vendor", "read"; + permission java.util.PropertyPermission "java.vm.name", "read"; +}; diff --git a/java21/conf/security/java.security b/java21/conf/security/java.security new file mode 100644 index 0000000000000000000000000000000000000000..1fdf5cfbd126c4e36bfe837c35e05b8f3e13a743 --- /dev/null +++ b/java21/conf/security/java.security @@ -0,0 +1,1634 @@ +# +# This is the "master security properties file". +# +# An alternate java.security properties file may be specified +# from the command line via the system property +# +# -Djava.security.properties= +# +# This properties file appends to the master security properties file. +# If both properties files specify values for the same key, the value +# from the command-line properties file is selected, as it is the last +# one loaded. +# +# Also, if you specify +# +# -Djava.security.properties== (2 equals), +# +# then that properties file completely overrides the master security +# properties file. +# +# To disable the ability to specify an additional properties file from +# the command line, set the key security.overridePropertiesFile +# to false in the master security properties file. It is set to true +# by default. +# +# If this properties file fails to load, the JDK implementation will throw +# an unspecified error when initializing the java.security.Security class. +# Properties in this file are typically parsed only once. If any of the +# properties are modified, applications should be restarted to ensure the +# changes are properly reflected. + +# In this file, various security properties are set for use by +# java.security classes. This is where users can statically register +# Cryptography Package Providers ("providers" for short). The term +# "provider" refers to a package or set of packages that supply a +# concrete implementation of a subset of the cryptography aspects of +# the Java Security API. A provider may, for example, implement one or +# more digital signature algorithms or message digest algorithms. +# +# Each provider must implement a subclass of the Provider class. +# To register a provider in this master security properties file, +# specify the provider and priority in the format +# +# security.provider.= +# +# This declares a provider, and specifies its preference +# order n. The preference order is the order in which providers are +# searched for requested algorithms (when no specific provider is +# requested). The order is 1-based; 1 is the most preferred, followed +# by 2, and so on. +# +# must specify the name of the Provider as passed to its super +# class java.security.Provider constructor. This is for providers loaded +# through the ServiceLoader mechanism. +# +# must specify the subclass of the Provider class whose +# constructor sets the values of various properties that are required +# for the Java Security API to look up the algorithms or other +# facilities implemented by the provider. This is for providers loaded +# through classpath. +# +# Note: Providers can be dynamically registered instead by calls to +# either the addProvider or insertProviderAt method in the Security +# class. + +# +# List of providers and their preference orders (see above): +# +security.provider.1=SUN +security.provider.2=SunRsaSign +security.provider.3=SunEC +security.provider.4=SunJSSE +security.provider.5=SunJCE +security.provider.6=SunJGSS +security.provider.7=SunSASL +security.provider.8=XMLDSig +security.provider.9=SunPCSC +security.provider.10=JdkLDAP +security.provider.11=JdkSASL +security.provider.12=SunMSCAPI +security.provider.13=SunPKCS11 + +# +# A list of preferred providers for specific algorithms. These providers will +# be searched for matching algorithms before the list of registered providers. +# Entries containing errors (parsing, etc) will be ignored. Use the +# -Djava.security.debug=jca property to debug these errors. +# +# The property is a comma-separated list of serviceType.algorithm:provider +# entries. The serviceType (example: "MessageDigest") is optional, and if +# not specified, the algorithm applies to all service types that support it. +# The algorithm is the standard algorithm name or transformation. +# Transformations can be specified in their full standard name +# (ex: AES/CBC/PKCS5Padding), or as partial matches (ex: AES, AES/CBC). +# The provider is the name of the provider. Any provider that does not +# also appear in the registered list will be ignored. +# +# There is a special serviceType for this property only to group a set of +# algorithms together. The type is "Group" and is followed by an algorithm +# keyword. Groups are to simplify and lessen the entries on the property +# line. Current groups are: +# Group.SHA2 = SHA-224, SHA-256, SHA-384, SHA-512, SHA-512/224, SHA-512/256 +# Group.HmacSHA2 = HmacSHA224, HmacSHA256, HmacSHA384, HmacSHA512 +# Group.SHA2RSA = SHA224withRSA, SHA256withRSA, SHA384withRSA, SHA512withRSA +# Group.SHA2DSA = SHA224withDSA, SHA256withDSA, SHA384withDSA, SHA512withDSA +# Group.SHA2ECDSA = SHA224withECDSA, SHA256withECDSA, SHA384withECDSA, \ +# SHA512withECDSA +# Group.SHA3 = SHA3-224, SHA3-256, SHA3-384, SHA3-512 +# Group.HmacSHA3 = HmacSHA3-224, HmacSHA3-256, HmacSHA3-384, HmacSHA3-512 +# +# Example: +# jdk.security.provider.preferred=AES/GCM/NoPadding:SunJCE, \ +# MessageDigest.SHA-256:SUN, Group.HmacSHA2:SunJCE +# +#jdk.security.provider.preferred= + + +# +# Sun Provider SecureRandom seed source. +# +# Select the primary source of seed data for the "NativePRNG", "SHA1PRNG" +# and "DRBG" SecureRandom implementations in the "Sun" provider. +# (Other SecureRandom implementations might also use this property.) +# +# On Unix-like systems (for example, Linux/MacOS), the +# "NativePRNG", "SHA1PRNG" and "DRBG" implementations obtains seed data from +# special device files such as file:/dev/random. +# +# On Windows systems, specifying the URLs "file:/dev/random" or +# "file:/dev/urandom" will enable the native Microsoft CryptoAPI seeding +# mechanism for SHA1PRNG and DRBG. +# +# By default, an attempt is made to use the entropy gathering device +# specified by the "securerandom.source" Security property. If an +# exception occurs while accessing the specified URL: +# +# NativePRNG: +# a default value of /dev/random will be used. If neither +# are available, the implementation will be disabled. +# "file" is the only currently supported protocol type. +# +# SHA1PRNG and DRBG: +# the traditional system/thread activity algorithm will be used. +# +# The entropy gathering device can also be specified with the System +# property "java.security.egd". For example: +# +# % java -Djava.security.egd=file:/dev/random MainClass +# +# Specifying this System property will override the +# "securerandom.source" Security property. +# +# In addition, if "file:/dev/random" or "file:/dev/urandom" is +# specified, the "NativePRNG" implementation will be more preferred than +# DRBG and SHA1PRNG in the Sun provider. +# +securerandom.source=file:/dev/random + +# +# A list of known strong SecureRandom implementations. +# +# To help guide applications in selecting a suitable strong +# java.security.SecureRandom implementation, Java distributions should +# indicate a list of known strong implementations using the property. +# +# This is a comma-separated list of algorithm and/or algorithm:provider +# entries. +# +securerandom.strongAlgorithms=Windows-PRNG:SunMSCAPI,DRBG:SUN + +# +# Sun provider DRBG configuration and default instantiation request. +# +# NIST SP 800-90Ar1 lists several DRBG mechanisms. Each can be configured +# with a DRBG algorithm name, and can be instantiated with a security strength, +# prediction resistance support, etc. This property defines the configuration +# and the default instantiation request of "DRBG" SecureRandom implementations +# in the SUN provider. (Other DRBG implementations can also use this property.) +# Applications can request different instantiation parameters like security +# strength, capability, personalization string using one of the +# getInstance(...,SecureRandomParameters,...) methods with a +# DrbgParameters.Instantiation argument, but other settings such as the +# mechanism and DRBG algorithm names are not currently configurable by any API. +# +# Please note that the SUN implementation of DRBG always supports reseeding. +# +# The value of this property is a comma-separated list of all configurable +# aspects. The aspects can appear in any order but the same aspect can only +# appear at most once. Its BNF-style definition is: +# +# Value: +# aspect { "," aspect } +# +# aspect: +# mech_name | algorithm_name | strength | capability | df +# +# // The DRBG mechanism to use. Default "Hash_DRBG" +# mech_name: +# "Hash_DRBG" | "HMAC_DRBG" | "CTR_DRBG" +# +# // The DRBG algorithm name. The "SHA-***" names are for Hash_DRBG and +# // HMAC_DRBG, default "SHA-256". The "AES-***" names are for CTR_DRBG, +# // default "AES-128" when using the limited cryptographic or "AES-256" +# // when using the unlimited. +# algorithm_name: +# "SHA-224" | "SHA-512/224" | "SHA-256" | +# "SHA-512/256" | "SHA-384" | "SHA-512" | +# "AES-128" | "AES-192" | "AES-256" +# +# // Security strength requested. Default "128" +# strength: +# "112" | "128" | "192" | "256" +# +# // Prediction resistance and reseeding request. Default "none" +# // "pr_and_reseed" - Both prediction resistance and reseeding +# // support requested +# // "reseed_only" - Only reseeding support requested +# // "none" - Neither prediction resistance not reseeding +# // support requested +# pr: +# "pr_and_reseed" | "reseed_only" | "none" +# +# // Whether a derivation function should be used. only applicable +# // to CTR_DRBG. Default "use_df" +# df: +# "use_df" | "no_df" +# +# Examples, +# securerandom.drbg.config=Hash_DRBG,SHA-224,112,none +# securerandom.drbg.config=CTR_DRBG,AES-256,192,pr_and_reseed,use_df +# +# The default value is an empty string, which is equivalent to +# securerandom.drbg.config=Hash_DRBG,SHA-256,128,none +# +securerandom.drbg.config= + +# +# Class to instantiate as the javax.security.auth.login.Configuration +# provider. +# +login.configuration.provider=sun.security.provider.ConfigFile + +# +# Default login configuration file +# +#login.config.url.1=file:${user.home}/.java.login.config + +# +# Class to instantiate as the system Policy. This is the name of the class +# that will be used as the Policy object. The system class loader is used to +# locate this class. +# +policy.provider=sun.security.provider.PolicyFile + +# The default is to have a single system-wide policy file, +# and a policy file in the user's home directory. +# +policy.url.1=file:${java.home}/conf/security/java.policy +policy.url.2=file:${user.home}/.java.policy + +# Controls whether or not properties are expanded in policy and login +# configuration files. If set to false, properties (${...}) will not +# be expanded in policy and login configuration files. If commented out or +# set to an empty string, the default value is "false" for policy files and +# "true" for login configuration files. +# +policy.expandProperties=true + +# Controls whether or not an extra policy or login configuration file is +# allowed to be passed on the command line with -Djava.security.policy=somefile +# or -Djava.security.auth.login.config=somefile. If commented out or set to +# an empty string, the default value is "false". +# +policy.allowSystemProperty=true + +# whether or not we look into the IdentityScope for trusted Identities +# when encountering a 1.1 signed JAR file. If the identity is found +# and is trusted, we grant it AllPermission. Note: the default policy +# provider (sun.security.provider.PolicyFile) does not support this property. +# +policy.ignoreIdentityScope=false + +# +# Default keystore type. +# +keystore.type=pkcs12 + +# +# Controls compatibility mode for JKS and PKCS12 keystore types. +# +# When set to 'true', both JKS and PKCS12 keystore types support loading +# keystore files in either JKS or PKCS12 format. When set to 'false' the +# JKS keystore type supports loading only JKS keystore files and the PKCS12 +# keystore type supports loading only PKCS12 keystore files. +# +keystore.type.compat=true + +# +# List of comma-separated packages that start with or equal this string +# will cause a security exception to be thrown when passed to the +# SecurityManager::checkPackageAccess method unless the corresponding +# RuntimePermission("accessClassInPackage."+package) has been granted. +# +package.access=sun.misc.,\ + sun.reflect. + +# +# List of comma-separated packages that start with or equal this string +# will cause a security exception to be thrown when passed to the +# SecurityManager::checkPackageDefinition method unless the corresponding +# RuntimePermission("defineClassInPackage."+package) has been granted. +# +# By default, none of the class loaders supplied with the JDK call +# checkPackageDefinition. +# +package.definition=sun.misc.,\ + sun.reflect. + +# +# Determines whether this properties file can be appended to +# or overridden on the command line via -Djava.security.properties +# +security.overridePropertiesFile=true + +# +# Determines the default key and trust manager factory algorithms for +# the javax.net.ssl package. +# +ssl.KeyManagerFactory.algorithm=SunX509 +ssl.TrustManagerFactory.algorithm=PKIX + +# +# The Java-level namelookup cache policy for successful lookups: +# +# any negative value: caching forever +# any positive value: the number of seconds to cache an address for +# zero: do not cache +# +# default value is forever (FOREVER). For security reasons, this +# caching is made forever when a security manager is set. When a security +# manager is not set, the default behavior in this implementation +# is to cache for 30 seconds. +# +# NOTE: setting this to anything other than the default value can have +# serious security implications. Do not set it unless +# you are sure you are not exposed to DNS spoofing attack. +# +#networkaddress.cache.ttl=-1 + +# +# The Java-level namelookup cache stale policy: +# +# any positive value: the number of seconds to use the stale names +# zero: do not use stale names +# negative values are ignored +# +# default value is 0 (NEVER). +# +#networkaddress.cache.stale.ttl=0 + +# The Java-level namelookup cache policy for failed lookups: +# +# any negative value: cache forever +# any positive value: the number of seconds to cache negative lookup results +# zero: do not cache +# +# In some Microsoft Windows networking environments that employ +# the WINS name service in addition to DNS, name service lookups +# that fail may take a noticeably long time to return (approx. 5 seconds). +# For this reason the default caching policy is to maintain these +# results for 10 seconds. +# +networkaddress.cache.negative.ttl=10 + +# +# Properties to configure OCSP for certificate revocation checking +# + +# Enable OCSP +# +# By default, OCSP is not used for certificate revocation checking. +# This property enables the use of OCSP when set to the value "true". +# +# NOTE: SocketPermission is required to connect to an OCSP responder. +# +# Example, +# ocsp.enable=true + +# +# Location of the OCSP responder +# +# By default, the location of the OCSP responder is determined implicitly +# from the certificate being validated. This property explicitly specifies +# the location of the OCSP responder. The property is used when the +# Authority Information Access extension (defined in RFC 5280) is absent +# from the certificate or when it requires overriding. +# +# Example, +# ocsp.responderURL=http://ocsp.example.net:80 + +# +# Subject name of the OCSP responder's certificate +# +# By default, the certificate of the OCSP responder is that of the issuer +# of the certificate being validated. This property identifies the certificate +# of the OCSP responder when the default does not apply. Its value is a string +# distinguished name (defined in RFC 2253) which identifies a certificate in +# the set of certificates supplied during cert path validation. In cases where +# the subject name alone is not sufficient to uniquely identify the certificate +# then both the "ocsp.responderCertIssuerName" and +# "ocsp.responderCertSerialNumber" properties must be used instead. When this +# property is set then those two properties are ignored. +# +# Example, +# ocsp.responderCertSubjectName=CN=OCSP Responder, O=XYZ Corp + +# +# Issuer name of the OCSP responder's certificate +# +# By default, the certificate of the OCSP responder is that of the issuer +# of the certificate being validated. This property identifies the certificate +# of the OCSP responder when the default does not apply. Its value is a string +# distinguished name (defined in RFC 2253) which identifies a certificate in +# the set of certificates supplied during cert path validation. When this +# property is set then the "ocsp.responderCertSerialNumber" property must also +# be set. When the "ocsp.responderCertSubjectName" property is set then this +# property is ignored. +# +# Example, +# ocsp.responderCertIssuerName=CN=Enterprise CA, O=XYZ Corp + +# +# Serial number of the OCSP responder's certificate +# +# By default, the certificate of the OCSP responder is that of the issuer +# of the certificate being validated. This property identifies the certificate +# of the OCSP responder when the default does not apply. Its value is a string +# of hexadecimal digits (colon or space separators may be present) which +# identifies a certificate in the set of certificates supplied during cert path +# validation. When this property is set then the "ocsp.responderCertIssuerName" +# property must also be set. When the "ocsp.responderCertSubjectName" property +# is set then this property is ignored. +# +# Example, +# ocsp.responderCertSerialNumber=2A:FF:00 + +# +# Policy for failed Kerberos KDC lookups: +# +# When a KDC is unavailable (network error, service failure, etc), it is +# put inside a secondary list and accessed less often for future requests. The +# value (case-insensitive) for this policy can be: +# +# tryLast +# KDCs in the secondary list are always tried after those not on the list. +# +# tryLess[:max_retries,timeout] +# KDCs in the secondary list are still tried by their order in the +# configuration, but with smaller max_retries and timeout values. +# max_retries and timeout are optional numerical parameters (default 1 and +# 5000, which means once and 5 seconds). Please note that if any of the +# values defined here are more than what is defined in krb5.conf, it will be +# ignored. +# +# Whenever a KDC is detected as available, it is removed from the secondary +# list. The secondary list is reset when krb5.conf is reloaded. You can add +# refreshKrb5Config=true to a JAAS configuration file so that krb5.conf is +# reloaded whenever a JAAS authentication is attempted. +# +# Example, +# krb5.kdc.bad.policy = tryLast +# krb5.kdc.bad.policy = tryLess:2,2000 +# +krb5.kdc.bad.policy = tryLast + +# +# Kerberos cross-realm referrals (RFC 6806) +# +# OpenJDK's Kerberos client supports cross-realm referrals as defined in +# RFC 6806. This allows to setup more dynamic environments in which clients +# do not need to know in advance how to reach the realm of a target principal +# (either a user or service). +# +# When a client issues an AS or a TGS request, the "canonicalize" option +# is set to announce support of this feature. A KDC server may fulfill the +# request or reply referring the client to a different one. If referred, +# the client will issue a new request and the cycle repeats. +# +# In addition to referrals, the "canonicalize" option allows the KDC server +# to change the client name in response to an AS request. For security reasons, +# RFC 6806 (section 11) FAST scheme is enforced. +# +# Disable Kerberos cross-realm referrals. Value may be overwritten with a +# System property (-Dsun.security.krb5.disableReferrals). +sun.security.krb5.disableReferrals=false + +# Maximum number of AS or TGS referrals to avoid infinite loops. Value may +# be overwritten with a System property (-Dsun.security.krb5.maxReferrals). +sun.security.krb5.maxReferrals=5 + +# +# This property contains a list of disabled EC Named Curves that can be included +# in the jdk.[tls|certpath|jar].disabledAlgorithms properties. To include this +# list in any of the disabledAlgorithms properties, add the property name as +# an entry. +#jdk.disabled.namedCurves= + +# +# Algorithm restrictions for certification path (CertPath) processing +# +# In some environments, certain algorithms or key lengths may be undesirable +# for certification path building and validation. For example, "MD2" is +# generally no longer considered to be a secure hash algorithm. This section +# describes the mechanism for disabling algorithms based on algorithm name +# and/or key length. This includes algorithms used in certificates, as well +# as revocation information such as CRLs and signed OCSP Responses. +# The syntax of the disabled algorithm string is described as follows: +# DisabledAlgorithms: +# " DisabledAlgorithm { , DisabledAlgorithm } " +# +# DisabledAlgorithm: +# AlgorithmName [Constraint] { '&' Constraint } | IncludeProperty +# +# AlgorithmName: +# (see below) +# +# Constraint: +# KeySizeConstraint | CAConstraint | DenyAfterConstraint | +# UsageConstraint +# +# KeySizeConstraint: +# keySize Operator KeyLength +# +# Operator: +# <= | < | == | != | >= | > +# +# KeyLength: +# Integer value of the algorithm's key length in bits +# +# CAConstraint: +# jdkCA +# +# DenyAfterConstraint: +# denyAfter YYYY-MM-DD +# +# UsageConstraint: +# usage [TLSServer] [TLSClient] [SignedJAR] +# +# IncludeProperty: +# include +# +# The "AlgorithmName" is the standard algorithm name of the disabled +# algorithm. See the Java Security Standard Algorithm Names Specification +# for information about Standard Algorithm Names. Matching is +# performed using a case-insensitive sub-element matching rule. (For +# example, in "SHA1withECDSA" the sub-elements are "SHA1" for hashing and +# "ECDSA" for signatures.) If the assertion "AlgorithmName" is a +# sub-element of the certificate algorithm name, the algorithm will be +# rejected during certification path building and validation. For example, +# the assertion algorithm name "DSA" will disable all certificate algorithms +# that rely on DSA, such as NONEwithDSA, SHA1withDSA. However, the assertion +# will not disable algorithms related to "ECDSA". +# +# The "IncludeProperty" allows a implementation-defined security property that +# can be included in the disabledAlgorithms properties. These properties are +# to help manage common actions easier across multiple disabledAlgorithm +# properties. +# There is one defined security property: jdk.disabled.namedCurves +# See the property for more specific details. +# +# +# A "Constraint" defines restrictions on the keys and/or certificates for +# a specified AlgorithmName: +# +# KeySizeConstraint: +# keySize Operator KeyLength +# The constraint requires a key of a valid size range if the +# "AlgorithmName" is of a key algorithm. The "KeyLength" indicates +# the key size specified in number of bits. For example, +# "RSA keySize <= 1024" indicates that any RSA key with key size less +# than or equal to 1024 bits should be disabled, and +# "RSA keySize < 1024, RSA keySize > 2048" indicates that any RSA key +# with key size less than 1024 or greater than 2048 should be disabled. +# This constraint is only used on algorithms that have a key size. +# +# CAConstraint: +# jdkCA +# This constraint prohibits the specified algorithm only if the +# algorithm is used in a certificate chain that terminates at a marked +# trust anchor in the lib/security/cacerts keystore. If the jdkCA +# constraint is not set, then all chains using the specified algorithm +# are restricted. jdkCA may only be used once in a DisabledAlgorithm +# expression. +# Example: To apply this constraint to SHA-1 certificates, include +# the following: "SHA1 jdkCA" +# +# DenyAfterConstraint: +# denyAfter YYYY-MM-DD +# This constraint prohibits a certificate with the specified algorithm +# from being used after the date regardless of the certificate's +# validity. JAR files that are signed and timestamped before the +# constraint date with certificates containing the disabled algorithm +# will not be restricted. The date is processed in the UTC timezone. +# This constraint can only be used once in a DisabledAlgorithm +# expression. +# Example: To deny usage of RSA 2048 bit certificates after Feb 3 2020, +# use the following: "RSA keySize == 2048 & denyAfter 2020-02-03" +# +# UsageConstraint: +# usage [TLSServer] [TLSClient] [SignedJAR] +# This constraint prohibits the specified algorithm for +# a specified usage. This should be used when disabling an algorithm +# for all usages is not practical. 'TLSServer' restricts the algorithm +# in TLS server certificate chains when server authentication is +# performed. 'TLSClient' restricts the algorithm in TLS client +# certificate chains when client authentication is performed. +# 'SignedJAR' constrains use of certificates in signed jar files. +# The usage type follows the keyword and more than one usage type can +# be specified with a whitespace delimiter. +# Example: "SHA1 usage TLSServer TLSClient" +# +# When an algorithm must satisfy more than one constraint, it must be +# delimited by an ampersand '&'. For example, to restrict certificates in a +# chain that terminate at a distribution provided trust anchor and contain +# RSA keys that are less than or equal to 1024 bits, add the following +# constraint: "RSA keySize <= 1024 & jdkCA". +# +# All DisabledAlgorithms expressions are processed in the order defined in the +# property. This requires lower keysize constraints to be specified +# before larger keysize constraints of the same algorithm. For example: +# "RSA keySize < 1024 & jdkCA, RSA keySize < 2048". +# +# Note: The algorithm restrictions do not apply to trust anchors or +# self-signed certificates. +# +# Note: This property is currently used by Oracle's PKIX implementation. It +# is not guaranteed to be examined and used by other implementations. +# +# Example: +# jdk.certpath.disabledAlgorithms=MD2, DSA, RSA keySize < 2048 +# +# +jdk.certpath.disabledAlgorithms=MD2, MD5, SHA1 jdkCA & usage TLSServer, \ + RSA keySize < 1024, DSA keySize < 1024, EC keySize < 224, \ + SHA1 usage SignedJAR & denyAfter 2019-01-01 + +# +# Legacy cryptographic algorithms and key lengths. +# +# In some environments, a certain algorithm or key length may be undesirable. +# +# Tools such as keytool and jarsigner may emit warnings when these legacy +# algorithms are used. See the man pages for those tools for more information. +# +# The syntax is the same as the "jdk.certpath.disabledAlgorithms" and +# "jdk.jar.disabledAlgorithms" security properties. +# +# Note: This property is currently used by the JDK Reference +# implementation. It is not guaranteed to be examined and used by other +# implementations. + +jdk.security.legacyAlgorithms=SHA1, \ + RSA keySize < 2048, DSA keySize < 2048, \ + DES, DESede, MD5, RC2, ARCFOUR + +# +# Algorithm restrictions for signed JAR files +# +# In some environments, certain algorithms or key lengths may be undesirable +# for signed JAR validation. For example, "MD2" is generally no longer +# considered to be a secure hash algorithm. This section describes the +# mechanism for disabling algorithms based on algorithm name and/or key length. +# JARs signed with any of the disabled algorithms or key sizes will be treated +# as unsigned. +# +# The syntax of the disabled algorithm string is described as follows: +# DisabledAlgorithms: +# " DisabledAlgorithm { , DisabledAlgorithm } " +# +# DisabledAlgorithm: +# AlgorithmName [Constraint] { '&' Constraint } +# +# AlgorithmName: +# (see below) +# +# Constraint: +# KeySizeConstraint | DenyAfterConstraint +# +# KeySizeConstraint: +# keySize Operator KeyLength +# +# DenyAfterConstraint: +# denyAfter YYYY-MM-DD +# +# Operator: +# <= | < | == | != | >= | > +# +# KeyLength: +# Integer value of the algorithm's key length in bits +# +# Note: This property is currently used by the JDK Reference +# implementation. It is not guaranteed to be examined and used by other +# implementations. +# +# See "jdk.certpath.disabledAlgorithms" for syntax descriptions. +# +jdk.jar.disabledAlgorithms=MD2, MD5, RSA keySize < 1024, \ + DSA keySize < 1024, SHA1 denyAfter 2019-01-01 + +# +# Disabled message digest algorithms for use with plaintext +# HTTP Digest authentication (java.net.HttpURLConnection). +# This includes HTTPS Digest authentication to proxies. +# This may be overridden by setting the networking (or system) +# property "http.auth.digest.reEnabledAlgorithms" to a comma +# separated list of algorithms to be allowed. +# +http.auth.digest.disabledAlgorithms = MD5, SHA-1 + +# +# Algorithm restrictions for Secure Socket Layer/Transport Layer Security +# (SSL/TLS/DTLS) processing +# +# In some environments, certain algorithms or key lengths may be undesirable +# when using SSL/TLS/DTLS. This section describes the mechanism for disabling +# algorithms during SSL/TLS/DTLS security parameters negotiation, including +# protocol version negotiation, cipher suites selection, named groups +# selection, signature schemes selection, peer authentication and key +# exchange mechanisms. +# +# Disabled algorithms will not be negotiated for SSL/TLS connections, even +# if they are enabled explicitly in an application. +# +# For PKI-based peer authentication and key exchange mechanisms, this list +# of disabled algorithms will also be checked during certification path +# building and validation, including algorithms used in certificates, as +# well as revocation information such as CRLs and signed OCSP Responses. +# This is in addition to the jdk.certpath.disabledAlgorithms property above. +# +# See the specification of "jdk.certpath.disabledAlgorithms" for the +# syntax of the disabled algorithm string. +# +# Additional TLS-specific syntax supported by this property: +# +# - TLS cipher suites can be disabled with this property using one or more +# "*" wildcard characters. For example, "TLS_RSA_*" disables all cipher +# suites that start with "TLS_RSA_". Only cipher suites starting with +# "TLS_" are allowed to have wildcard characters. +# +# - TLS protocol specific usage constraints are supported by this property: +# +# UsageConstraint: +# usage UsageType { UsageType } +# +# UsageType: +# HandshakeSignature | CertificateSignature +# +# HandshakeSignature restricts the use of the algorithm in TLS handshake +# signatures. CertificateSignature restricts the use of the algorithm in +# certificate signatures. An algorithm with this constraint cannot include +# other usage types defined in the jdk.certpath.disabledAlgorithms +# property. The usage type follows the keyword and more than one usage type +# can be specified with a whitespace delimiter. +# Example: "rsa_pkcs1_sha1 usage HandshakeSignature" +# +# Note: The algorithm restrictions do not apply to trust anchors or +# self-signed certificates. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# Example: +# jdk.tls.disabledAlgorithms=MD5, SSLv3, DSA, RSA keySize < 2048, \ +# rsa_pkcs1_sha1, secp224r1, TLS_RSA_* +jdk.tls.disabledAlgorithms=SSLv3, TLSv1, TLSv1.1, DTLSv1.0, RC4, DES, \ + MD5withRSA, DH keySize < 1024, EC keySize < 224, 3DES_EDE_CBC, anon, NULL, \ + ECDH, TLS_RSA_*, rsa_pkcs1_sha1 usage HandshakeSignature, \ + ecdsa_sha1 usage HandshakeSignature, dsa_sha1 usage HandshakeSignature + +# +# Algorithm restrictions for Java Crypto API services +# +# In some environments, certain algorithms may be undesirable for certain +# cryptographic services. For example, "MD2" is generally no longer considered +# to be a secure hash algorithm. This section describes the mechanism for +# disabling algorithms at the JCA/JCE level based on service name and algorithm +# name. +# +# If a system property of the same name is also specified, it supersedes the +# security property value defined here. +# +# The syntax of the disabled services string is described as follows: +# "DisabledService {, DisabledService}" +# +# DisabledService: +# Service.AlgorithmName +# +# Service: (one of the following, more services may be added later) +# Cipher | KeyStore | MessageDigest | Signature +# +# AlgorithmName: +# (see below) +# +# The "AlgorithmName" is the standard algorithm name of the disabled +# service. See the Java Security Standard Algorithm Names Specification +# for information about Standard Algorithm Names. Matching is +# performed using a case-insensitive exact matching rule. For Cipher service, +# its algorithm is the transformation string. +# +# Note: If the property value contains entries with invalid syntax or +# unsupported services at the time of checking, an ExceptionInInitializerError +# with a cause of IllegalArgumentException will be thrown. +# +# Note: The restriction is applied in the various getInstance(...) methods +# of the supported Service classes, i.e. Cipher, KeyStore, MessageDigest, +# and Signature. If the algorithm is disabled, a NoSuchAlgorithmException will +# be thrown by the getInstance methods of Cipher, MessageDigest, and Signature +# and a KeyStoreException by the getInstance methods of KeyStore. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# Example: +# jdk.crypto.disabledAlgorithms=Cipher.RSA/ECB/PKCS1Padding, MessageDigest.MD2 +# +#jdk.crypto.disabledAlgorithms= + +# +# Legacy algorithms for Secure Socket Layer/Transport Layer Security (SSL/TLS) +# processing in JSSE implementation. +# +# In some environments, a certain algorithm may be undesirable but it +# cannot be disabled because of its use in legacy applications. Legacy +# algorithms may still be supported, but applications should not use them +# as the security strength of legacy algorithms are usually not strong enough +# in practice. +# +# During SSL/TLS security parameters negotiation, legacy algorithms will +# not be negotiated unless there are no other candidates. +# +# The syntax of the legacy algorithms string is described as this Java +# BNF-style: +# LegacyAlgorithms: +# " LegacyAlgorithm { , LegacyAlgorithm } " +# +# LegacyAlgorithm: +# AlgorithmName (standard JSSE algorithm name) +# +# See the specification of security property "jdk.certpath.disabledAlgorithms" +# for the syntax and description of the "AlgorithmName" notation. +# +# Per SSL/TLS specifications, cipher suites have the form: +# SSL_KeyExchangeAlg_WITH_CipherAlg_MacAlg +# or +# TLS_KeyExchangeAlg_WITH_CipherAlg_MacAlg +# +# For example, the cipher suite TLS_RSA_WITH_AES_128_CBC_SHA uses RSA as the +# key exchange algorithm, AES_128_CBC (128 bits AES cipher algorithm in CBC +# mode) as the cipher (encryption) algorithm, and SHA-1 as the message digest +# algorithm for HMAC. +# +# The LegacyAlgorithm can be one of the following standard algorithm names: +# 1. JSSE cipher suite name, e.g., TLS_RSA_WITH_AES_128_CBC_SHA +# 2. JSSE key exchange algorithm name, e.g., RSA +# 3. JSSE cipher (encryption) algorithm name, e.g., AES_128_CBC +# 4. JSSE message digest algorithm name, e.g., SHA +# +# See SSL/TLS specifications and the Java Security Standard Algorithm Names +# Specification for information about the algorithm names. +# +# Note: If a legacy algorithm is also restricted through the +# jdk.tls.disabledAlgorithms property or the +# java.security.AlgorithmConstraints API (See +# javax.net.ssl.SSLParameters.setAlgorithmConstraints()), +# then the algorithm is completely disabled and will not be negotiated. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# There is no guarantee the property will continue to exist or be of the +# same syntax in future releases. +# +# Example: +# jdk.tls.legacyAlgorithms=DH_anon, DES_CBC, SSL_RSA_WITH_RC4_128_MD5 +# +jdk.tls.legacyAlgorithms=NULL, anon, RC4, DES, 3DES_EDE_CBC + +# +# The pre-defined default finite field Diffie-Hellman ephemeral (DHE) +# parameters for Transport Layer Security (SSL/TLS/DTLS) processing. +# +# In traditional SSL/TLS/DTLS connections where finite field DHE parameters +# negotiation mechanism is not used, the server offers the client group +# parameters, base generator g and prime modulus p, for DHE key exchange. +# It is recommended to use dynamic group parameters. This property defines +# a mechanism that allows you to specify custom group parameters. +# +# The syntax of this property string is described as this Java BNF-style: +# DefaultDHEParameters: +# DefinedDHEParameters { , DefinedDHEParameters } +# +# DefinedDHEParameters: +# "{" DHEPrimeModulus , DHEBaseGenerator "}" +# +# DHEPrimeModulus: +# HexadecimalDigits +# +# DHEBaseGenerator: +# HexadecimalDigits +# +# HexadecimalDigits: +# HexadecimalDigit { HexadecimalDigit } +# +# HexadecimalDigit: one of +# 0 1 2 3 4 5 6 7 8 9 A B C D E F a b c d e f +# +# Whitespace characters are ignored. +# +# The "DefinedDHEParameters" defines the custom group parameters, prime +# modulus p and base generator g, for a particular size of prime modulus p. +# The "DHEPrimeModulus" defines the hexadecimal prime modulus p, and the +# "DHEBaseGenerator" defines the hexadecimal base generator g of a group +# parameter. It is recommended to use safe primes for the custom group +# parameters. +# +# If this property is not defined or the value is empty, the underlying JSSE +# provider's default group parameter is used for each connection. +# +# If the property value does not follow the grammar, or a particular group +# parameter is not valid, the connection will fall back and use the +# underlying JSSE provider's default group parameter. +# +# Note: This property is currently used by OpenJDK's JSSE implementation. It +# is not guaranteed to be examined and used by other implementations. +# +# Example: +# jdk.tls.server.defaultDHEParameters= +# { \ +# FFFFFFFF FFFFFFFF C90FDAA2 2168C234 C4C6628B 80DC1CD1 \ +# 29024E08 8A67CC74 020BBEA6 3B139B22 514A0879 8E3404DD \ +# EF9519B3 CD3A431B 302B0A6D F25F1437 4FE1356D 6D51C245 \ +# E485B576 625E7EC6 F44C42E9 A637ED6B 0BFF5CB6 F406B7ED \ +# EE386BFB 5A899FA5 AE9F2411 7C4B1FE6 49286651 ECE65381 \ +# FFFFFFFF FFFFFFFF, 2} + +# +# TLS key limits on symmetric cryptographic algorithms +# +# This security property sets limits on algorithms key usage in TLS 1.3. +# When the amount of data encrypted exceeds the algorithm value listed below, +# a KeyUpdate message will trigger a key change. This is for symmetric ciphers +# with TLS 1.3 only. +# +# The syntax for the property is described below: +# KeyLimits: +# " KeyLimit { , KeyLimit } " +# +# WeakKeyLimit: +# AlgorithmName Action Length +# +# AlgorithmName: +# A full algorithm transformation. +# +# Action: +# KeyUpdate +# +# Length: +# The amount of encrypted data in a session before the Action occurs +# This value may be an integer value in bytes, or as a power of two, 2^29. +# +# KeyUpdate: +# The TLS 1.3 KeyUpdate handshake process begins when the Length amount +# is fulfilled. +# +# Note: This property is currently used by OpenJDK's JSSE implementation. It +# is not guaranteed to be examined and used by other implementations. +# +jdk.tls.keyLimits=AES/GCM/NoPadding KeyUpdate 2^37, \ + ChaCha20-Poly1305 KeyUpdate 2^37 + +# +# Cryptographic Jurisdiction Policy defaults +# +# Import and export control rules on cryptographic software vary from +# country to country. By default, Java provides two different sets of +# cryptographic policy files[1]: +# +# unlimited: These policy files contain no restrictions on cryptographic +# strengths or algorithms +# +# limited: These policy files contain more restricted cryptographic +# strengths +# +# The default setting is determined by the value of the "crypto.policy" +# Security property below. If your country or usage requires the +# traditional restrictive policy, the "limited" Java cryptographic +# policy is still available and may be appropriate for your environment. +# +# If you have restrictions that do not fit either use case mentioned +# above, Java provides the capability to customize these policy files. +# The "crypto.policy" security property points to a subdirectory +# within /conf/security/policy/ which can be customized. +# Please see the /conf/security/policy/README.txt file or consult +# the Java Security Guide/JCA documentation for more information. +# +# YOU ARE ADVISED TO CONSULT YOUR EXPORT/IMPORT CONTROL COUNSEL OR ATTORNEY +# TO DETERMINE THE EXACT REQUIREMENTS. +# +# [1] Please note that the JCE for Java SE, including the JCE framework, +# cryptographic policy files, and standard JCE providers provided with +# the Java SE, have been reviewed and approved for export as mass market +# encryption item by the US Bureau of Industry and Security. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +crypto.policy=unlimited + +# +# The policy for the XML Signature secure validation mode. Validation of +# XML Signatures that violate any of these constraints will fail. +# The mode can be enabled or disabled by setting the property +# "org.jcp.xml.dsig.secureValidation" to Boolean.TRUE or Boolean.FALSE with +# the javax.xml.crypto.XMLCryptoContext.setProperty() method, or by setting +# the system property "org.jcp.xml.dsig.secureValidation" to "true" or +# "false". Any other value for the system property is also treated as "false". +# If the system property is set, it supersedes the XMLCryptoContext property +# value. +# +# The secure validation mode is enabled by default. +# +# Policy: +# Constraint {"," Constraint } +# Constraint: +# AlgConstraint | MaxTransformsConstraint | MaxReferencesConstraint | +# ReferenceUriSchemeConstraint | KeySizeConstraint | OtherConstraint +# AlgConstraint +# "disallowAlg" Uri +# MaxTransformsConstraint: +# "maxTransforms" Integer +# MaxReferencesConstraint: +# "maxReferences" Integer +# ReferenceUriSchemeConstraint: +# "disallowReferenceUriSchemes" String { String } +# KeySizeConstraint: +# "minKeySize" KeyAlg Integer +# OtherConstraint: +# "noDuplicateIds" | "noRetrievalMethodLoops" +# +# For AlgConstraint, Uri is the algorithm URI String that is not allowed. +# See the XML Signature Recommendation for more information on algorithm +# URI Identifiers. For KeySizeConstraint, KeyAlg is the standard algorithm +# name of the key type (ex: "RSA"). If the MaxTransformsConstraint, +# MaxReferencesConstraint or KeySizeConstraint (for the same key type) is +# specified more than once, only the last entry is enforced. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +jdk.xml.dsig.secureValidationPolicy=\ + disallowAlg http://www.w3.org/TR/1999/REC-xslt-19991116,\ + disallowAlg http://www.w3.org/2001/04/xmldsig-more#rsa-md5,\ + disallowAlg http://www.w3.org/2001/04/xmldsig-more#hmac-md5,\ + disallowAlg http://www.w3.org/2001/04/xmldsig-more#md5,\ + disallowAlg http://www.w3.org/2000/09/xmldsig#sha1,\ + disallowAlg http://www.w3.org/2000/09/xmldsig#dsa-sha1,\ + disallowAlg http://www.w3.org/2000/09/xmldsig#rsa-sha1,\ + disallowAlg http://www.w3.org/2007/05/xmldsig-more#sha1-rsa-MGF1,\ + disallowAlg http://www.w3.org/2001/04/xmldsig-more#ecdsa-sha1,\ + maxTransforms 5,\ + maxReferences 30,\ + disallowReferenceUriSchemes file http https,\ + minKeySize RSA 1024,\ + minKeySize DSA 1024,\ + minKeySize EC 224,\ + noDuplicateIds,\ + noRetrievalMethodLoops + +# +# Support for the here() function +# +# This security property determines whether the here() XPath function is +# supported in XML Signature generation and verification. +# +# If this property is set to false, the here() function is not supported. +# Generating an XML Signature that uses the here() function will throw an +# XMLSignatureException. Validating an existing XML Signature that uses the +# here() function will also throw an XMLSignatureException. +# +# The default value for this property is true. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +#jdk.xml.dsig.hereFunctionSupported=true + +# +# Deserialization JVM-wide filter factory +# +# A filter factory class name is used to configure the JVM-wide filter factory. +# The class must be public, must have a public zero-argument constructor, implement the +# java.util.function.BinaryOperator interface, provide its +# implementation and be accessible via the application class loader. +# A builtin filter factory is used if no filter factory is defined. +# See java.io.ObjectInputFilter.Config for more information. +# +# If the system property jdk.serialFilterFactory is also specified, it supersedes +# the security property value defined here. +# +#jdk.serialFilterFactory= + +# +# Deserialization JVM-wide filter +# +# A filter, if configured, is used by the filter factory to provide the filter used by +# java.io.ObjectInputStream during deserialization to check the contents of the stream. +# A filter is configured as a sequence of patterns, each pattern is either +# matched against the name of a class in the stream or defines a limit. +# Patterns are separated by ";" (semicolon). +# Whitespace is significant and is considered part of the pattern. +# +# If the system property jdk.serialFilter is also specified, it supersedes +# the security property value defined here. +# +# If a pattern includes a "=", it sets a limit. +# If a limit appears more than once the last value is used. +# Limits are checked before classes regardless of the order in the +# sequence of patterns. +# If any of the limits are exceeded, the filter status is REJECTED. +# +# maxdepth=value - the maximum depth of a graph +# maxrefs=value - the maximum number of internal references +# maxbytes=value - the maximum number of bytes in the input stream +# maxarray=value - the maximum array length allowed +# +# Other patterns, from left to right, match the class or package name as +# returned from Class.getName. +# If the class is an array type, the class or package to be matched is the +# element type. +# Arrays of any number of dimensions are treated the same as the element type. +# For example, a pattern of "!example.Foo", rejects creation of any instance or +# array of example.Foo. +# +# If the pattern starts with "!", the status is REJECTED if the remaining +# pattern is matched; otherwise the status is ALLOWED if the pattern matches. +# If the pattern contains "/", the non-empty prefix up to the "/" is the +# module name; +# if the module name matches the module name of the class then +# the remaining pattern is matched with the class name. +# If there is no "/", the module name is not compared. +# If the pattern ends with ".**" it matches any class in the package and all +# subpackages. +# If the pattern ends with ".*" it matches any class in the package. +# If the pattern ends with "*", it matches any class with the pattern as a +# prefix. +# If the pattern is equal to the class name, it matches. +# Otherwise, the status is UNDECIDED. +# +#jdk.serialFilter=pattern;pattern + +# +# RMI Registry Serial Filter +# +# The filter pattern uses the same format as jdk.serialFilter. +# This filter can override the builtin filter if additional types need to be +# allowed or rejected from the RMI Registry or to decrease limits but not +# to increase limits. +# If the limits (maxdepth, maxrefs, or maxbytes) are exceeded, the object is rejected. +# +# Each non-array type is allowed or rejected if it matches one of the patterns, +# evaluated from left to right, and is otherwise allowed. Arrays of any +# component type, including subarrays and arrays of primitives, are allowed. +# +# Array construction of any component type, including subarrays and arrays of +# primitives, are allowed unless the length is greater than the maxarray limit. +# The filter is applied to each array element. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# The built-in filter allows subclasses of allowed classes and +# can approximately be represented as the pattern: +# +#sun.rmi.registry.registryFilter=\ +# maxarray=1000000;\ +# maxdepth=20;\ +# java.lang.String;\ +# java.lang.Number;\ +# java.lang.reflect.Proxy;\ +# java.rmi.Remote;\ +# sun.rmi.server.UnicastRef;\ +# sun.rmi.server.RMIClientSocketFactory;\ +# sun.rmi.server.RMIServerSocketFactory;\ +# java.rmi.server.UID +# +# RMI Distributed Garbage Collector (DGC) Serial Filter +# +# The filter pattern uses the same format as jdk.serialFilter. +# This filter can override the builtin filter if additional types need to be +# allowed or rejected from the RMI DGC. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# The builtin DGC filter can approximately be represented as the filter pattern: +# +#sun.rmi.transport.dgcFilter=\ +# java.rmi.server.ObjID;\ +# java.rmi.server.UID;\ +# java.rmi.dgc.VMID;\ +# java.rmi.dgc.Lease;\ +# maxdepth=5;maxarray=10000 + +# +# JCEKS Encrypted Key Serial Filter +# +# This filter, if configured, is used by the JCEKS KeyStore during the +# deserialization of the encrypted Key object stored inside a key entry. +# If not configured or the filter result is UNDECIDED (i.e. none of the patterns +# matches), the filter configured by jdk.serialFilter will be consulted. +# +# If the system property jceks.key.serialFilter is also specified, it supersedes +# the security property value defined here. +# +# The filter pattern uses the same format as jdk.serialFilter. The default +# pattern allows java.lang.Enum, java.security.KeyRep, java.security.KeyRep$Type, +# and javax.crypto.spec.SecretKeySpec and rejects all the others. +jceks.key.serialFilter = java.base/java.lang.Enum;java.base/java.security.KeyRep;\ + java.base/java.security.KeyRep$Type;java.base/javax.crypto.spec.SecretKeySpec;!* + +# The iteration count used for password-based encryption (PBE) in JCEKS +# keystores. Values in the range 10000 to 5000000 are considered valid. +# If the value is out of this range, or is not a number, or is unspecified; +# a default of 200000 is used. +# +# If the system property jdk.jceks.iterationCount is also specified, it +# supersedes the security property value defined here. +# +#jdk.jceks.iterationCount = 200000 + +# +# PKCS12 KeyStore properties +# +# The following properties, if configured, are used by the PKCS12 KeyStore +# implementation during the creation of a new keystore. Several of the +# properties may also be used when modifying an existing keystore. The +# properties can be overridden by a KeyStore API that specifies its own +# algorithms and parameters. +# +# If an existing PKCS12 keystore is loaded and then stored, the algorithm and +# parameter used to generate the existing Mac will be reused. If the existing +# keystore does not have a Mac, no Mac will be created while storing. If there +# is at least one certificate in the existing keystore, the algorithm and +# parameters used to encrypt the last certificate in the existing keystore will +# be reused to encrypt all certificates while storing. If the last certificate +# in the existing keystore is not encrypted, all certificates will be stored +# unencrypted. If there is no certificate in the existing keystore, any newly +# added certificate will be encrypted (or stored unencrypted if algorithm +# value is "NONE") using the "keystore.pkcs12.certProtectionAlgorithm" and +# "keystore.pkcs12.certPbeIterationCount" values defined here. Existing private +# and secret key(s) are not changed. Newly set private and secret key(s) will +# be encrypted using the "keystore.pkcs12.keyProtectionAlgorithm" and +# "keystore.pkcs12.keyPbeIterationCount" values defined here. +# +# In order to apply new algorithms and parameters to all entries in an +# existing keystore, one can create a new keystore and add entries in the +# existing keystore into the new keystore. This can be achieved by calling the +# "keytool -importkeystore" command. +# +# If a system property of the same name is also specified, it supersedes the +# security property value defined here. +# +# If the property is set to an illegal value, an iteration count that is not +# a positive integer, or an unknown algorithm name, an exception will be thrown +# when the property is used. If the property is not set or empty, a default +# value will be used. +# +# Some PKCS12 tools and libraries may not support algorithms based on PBES2 +# and AES. To create a PKCS12 keystore which they can load, set the system +# property "keystore.pkcs12.legacy" which overrides the values of the properties +# defined below with legacy algorithms. Setting this system property (which can +# only be enabled and has no value) is equivalent to +# +# -Dkeystore.pkcs12.certProtectionAlgorithm=PBEWithSHA1AndRC2_40 +# -Dkeystore.pkcs12.keyProtectionAlgorithm=PBEWithSHA1AndDESede +# -Dkeystore.pkcs12.macAlgorithm=HmacPBESHA1 +# -Dkeystore.pkcs12.certPbeIterationCount=50000 +# -Dkeystore.pkcs12.keyPbeIterationCount=50000 +# -Dkeystore.pkcs12.macIterationCount=100000 +# +# Also, you can downgrade an existing PKCS12 keystore created with stronger +# algorithms to legacy algorithms with +# +# keytool -J-Dkeystore.pkcs12.legacy -importkeystore -srckeystore ks -destkeystore ks +# +# This system property should be used at your own risk. +# +# Note: These properties are currently used by the JDK Reference implementation. +# They are not guaranteed to be examined and used by other implementations. + +# The algorithm used to encrypt a certificate. This can be any non-Hmac PBE +# algorithm defined in the Cipher section of the Java Security Standard +# Algorithm Names Specification. When set to "NONE", the certificate +# is not encrypted. The default value is "PBEWithHmacSHA256AndAES_256". +#keystore.pkcs12.certProtectionAlgorithm = PBEWithHmacSHA256AndAES_256 + +# The iteration count used by the PBE algorithm when encrypting a certificate. +# This value must be a positive integer. The default value is 10000. +#keystore.pkcs12.certPbeIterationCount = 10000 + +# The algorithm used to encrypt a private key or secret key. This can be +# any non-Hmac PBE algorithm defined in the Cipher section of the Java +# Security Standard Algorithm Names Specification. The value must not be "NONE". +# The default value is "PBEWithHmacSHA256AndAES_256". +#keystore.pkcs12.keyProtectionAlgorithm = PBEWithHmacSHA256AndAES_256 + +# The iteration count used by the PBE algorithm when encrypting a private key +# or a secret key. This value must be a positive integer. The default value +# is 10000. +#keystore.pkcs12.keyPbeIterationCount = 10000 + +# The algorithm used to calculate the optional MacData at the end of a PKCS12 +# file. This can be any HmacPBE algorithm defined in the Mac section of the +# Java Security Standard Algorithm Names Specification. When set to "NONE", +# no Mac is generated. The default value is "HmacPBESHA256". +#keystore.pkcs12.macAlgorithm = HmacPBESHA256 + +# The iteration count used by the MacData algorithm. This value must be a +# positive integer. The default value is 10000. +#keystore.pkcs12.macIterationCount = 10000 + +# +# Enhanced exception message information +# +# By default, exception messages should not include potentially sensitive +# information such as file names, host names, or port numbers. This property +# accepts one or more comma separated values, each of which represents a +# category of enhanced exception message information to enable. Values are +# case-insensitive. Leading and trailing whitespaces, surrounding each value, +# are ignored. Unknown values are ignored. +# +# NOTE: Use caution before setting this property. Setting this property +# exposes sensitive information in Exceptions, which could, for example, +# propagate to untrusted code or be emitted in stack traces that are +# inadvertently disclosed and made accessible over a public network. +# +# The categories are: +# +# hostInfo - IOExceptions thrown by java.net.Socket and the socket types in the +# java.nio.channels package will contain enhanced exception +# message information +# +# jar - enables more detailed information in the IOExceptions thrown +# by classes in the java.util.jar package +# +# The property setting in this file can be overridden by a system property of +# the same name, with the same syntax and possible values. +# +#jdk.includeInExceptions=hostInfo,jar + +# +# Disabled mechanisms for the Simple Authentication and Security Layer (SASL) +# +# Disabled mechanisms will not be negotiated by both SASL clients and servers. +# These mechanisms will be ignored if they are specified in the "mechanisms" +# argument of "Sasl.createSaslClient" or the "mechanism" argument of +# "Sasl.createSaslServer". +# +# The value of this property is a comma-separated list of SASL mechanisms. +# The mechanisms are case-sensitive. Whitespaces around the commas are ignored. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# Example: +# jdk.sasl.disabledMechanisms=PLAIN, CRAM-MD5, DIGEST-MD5 +jdk.sasl.disabledMechanisms= + +# +# Policies for distrusting Certificate Authorities (CAs). +# +# This is a comma separated value of one or more case-sensitive strings, each +# of which represents a policy for determining if a CA should be distrusted. +# The supported values are: +# +# SYMANTEC_TLS : Distrust TLS Server certificates anchored by a Symantec +# root CA and issued after April 16, 2019 unless issued by one of the +# following subordinate CAs which have a later distrust date: +# 1. Apple IST CA 2 - G1, SHA-256 fingerprint: +# AC2B922ECFD5E01711772FEA8ED372DE9D1E2245FCE3F57A9CDBEC77296A424B +# Distrust after December 31, 2019. +# 2. Apple IST CA 8 - G1, SHA-256 fingerprint: +# A4FE7C7F15155F3F0AEF7AAA83CF6E06DEB97CA3F909DF920AC1490882D488ED +# Distrust after December 31, 2019. +# +# ENTRUST_TLS : Distrust TLS Server certificates anchored by +# an Entrust root CA and issued after November 11, 2024. +# +# CAMERFIRMA_TLS : Distrust TLS Server certificates anchored by +# a Camerfirma root CA and issued after April 15, 2025. +# +# CHUNGHWA_TLS : Distrust TLS Server certificates anchored by +# a Chunghwa root CA and issued after March 17, 2026. +# +# Leading and trailing whitespace surrounding each value are ignored. +# Unknown values are ignored. If the property is commented out or set to the +# empty String, no policies are enforced. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be supported by other SE implementations. Also, this +# property does not override other security properties which can restrict +# certificates such as jdk.tls.disabledAlgorithms or +# jdk.certpath.disabledAlgorithms; those restrictions are still enforced even +# if this property is not enabled. +# +jdk.security.caDistrustPolicies=SYMANTEC_TLS,ENTRUST_TLS,CAMERFIRMA_TLS,\ + CHUNGHWA_TLS + +# +# FilePermission path canonicalization +# +# This security property dictates how the path argument is processed and stored +# while constructing a FilePermission object. If the value is set to true, the +# path argument is canonicalized and FilePermission methods (such as implies, +# equals, and hashCode) are implemented based on this canonicalized result. +# Otherwise, the path argument is not canonicalized and FilePermission methods are +# implemented based on the original input. See the implementation note of the +# FilePermission class for more details. +# +# If a system property of the same name is also specified, it supersedes the +# security property value defined here. +# +# The default value for this property is false. +# +jdk.io.permissionsUseCanonicalPath=false + + +# +# Policies for the proxy_impersonator Kerberos ccache configuration entry +# +# The proxy_impersonator ccache configuration entry indicates that the ccache +# is a synthetic delegated credential for use with S4U2Proxy by an intermediate +# server. The ccache file should also contain the TGT of this server and +# an evidence ticket from the default principal of the ccache to this server. +# +# This security property determines how Java uses this configuration entry. +# There are 3 possible values: +# +# no-impersonate - Ignore this configuration entry, and always act as +# the owner of the TGT (if it exists). +# +# try-impersonate - Try impersonation when this configuration entry exists. +# If no matching TGT or evidence ticket is found, +# fallback to no-impersonate. +# +# always-impersonate - Always impersonate when this configuration entry exists. +# If no matching TGT or evidence ticket is found, +# no initial credential is read from the ccache. +# +# The default value is "always-impersonate". +# +# If a system property of the same name is also specified, it supersedes the +# security property value defined here. +# +#jdk.security.krb5.default.initiate.credential=always-impersonate + +# +# Trust Anchor Certificates - CA Basic Constraint check +# +# X.509 v3 certificates used as Trust Anchors (to validate signed code or TLS +# connections) must have the cA Basic Constraint field set to 'true'. Also, if +# they include a Key Usage extension, the keyCertSign bit must be set. These +# checks, enabled by default, can be disabled for backward-compatibility +# purposes with the jdk.security.allowNonCaAnchor System and Security +# properties. In the case that both properties are simultaneously set, the +# System value prevails. The default value of the property is "false". +# +#jdk.security.allowNonCaAnchor=true + +# +# The default Character set name (java.nio.charset.Charset.forName()) +# for converting TLS ALPN values between byte arrays and Strings. +# Prior versions of the JDK may use UTF-8 as the default charset. If +# you experience interoperability issues, setting this property to UTF-8 +# may help. +# +# jdk.tls.alpnCharset=UTF-8 +jdk.tls.alpnCharset=ISO_8859_1 + +# +# Global JNDI Object Factories Filter +# +# This filter is used by the JNDI runtime to control the set of object factory classes +# which will be allowed to instantiate objects from object references returned by +# naming/directory systems. The factory class named by the reference instance will be +# matched against this filter. The filter property supports pattern-based filter syntax +# with the same format as jdk.serialFilter. Limit patterns specified in the filter property +# are unused. +# +# Each class name pattern is matched against the factory class name to allow or disallow its +# instantiation. The access to a factory class is allowed if the filter returns +# ALLOWED. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# If the system property jdk.jndi.object.factoriesFilter is also specified, it supersedes +# the security property value defined here. The default value of the property is "*". +# +# The default pattern value allows any object factory class specified by the reference +# instance to recreate the referenced object. +#jdk.jndi.object.factoriesFilter=* + +# +# Protocol Specific JNDI/LDAP Object Factories Filter +# +# This filter is used by the JNDI/LDAP provider implementation in the JDK to further control the +# set of object factory classes which will be allowed to instantiate objects from object +# references bound to LDAP contexts. The factory class named by the reference instance will +# be matched against this filter. The filter property supports pattern-based filter syntax +# with the same format as jdk.serialFilter. Limit patterns specified in the filter property +# are unused. +# +# Each class name pattern is matched against the factory class name to allow or disallow its +# instantiation. The access to a factory class is allowed only when it is not rejected by this filter +# or by the global filter defined by "jdk.jndi.object.factoriesFilter", and at least one of these +# two filters returns ALLOWED. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# If the system property jdk.jndi.ldap.object.factoriesFilter is also specified, it supersedes +# the security property value defined here. The default value of the property is +# "java.naming/com.sun.jndi.ldap.**;!*". +# +# The default pattern value allows any object factory class defined in the java.naming module +# to be specified by the reference instance, but rejects any other. +#jdk.jndi.ldap.object.factoriesFilter=java.naming/com.sun.jndi.ldap.**;!* + +# +# Protocol Specific JNDI/RMI Object Factories Filter +# +# This filter is used by the JNDI/RMI provider implementation in the JDK to further control the +# set of object factory classes which will be allowed to instantiate objects from object +# references bound to RMI names. The factory class named by the reference instance will +# be matched against this filter. The filter property supports pattern-based filter syntax +# with the same format as jdk.serialFilter. Limit patterns specified in the filter property +# are unused. +# +# Each class name pattern is matched against the factory class name to allow or disallow its +# instantiation. The access to a factory class is allowed only when it is not rejected by this filter +# or by the global filter defined by "jdk.jndi.object.factoriesFilter", and at least one of these +# two filters returns ALLOWED. +# +# Note: This property is currently used by the JDK Reference implementation. +# It is not guaranteed to be examined and used by other implementations. +# +# If the system property jdk.jndi.rmi.object.factoriesFilter is also specified, it supersedes +# the security property value defined here. The default value of the property is +# "jdk.naming.rmi/com.sun.jndi.rmi.**;!*". +# +# The default pattern value allows any object factory class defined in the jdk.naming.rmi module +# to be specified by the reference instance, but rejects any other. +#jdk.jndi.rmi.object.factoriesFilter=jdk.naming.rmi/com.sun.jndi.rmi.**;!* + +# +# Policy for non-forwardable service ticket in a S4U2proxy request +# +# The Service for User to Proxy (S4U2proxy) Kerberos extension enables a middle service +# to obtain a service ticket to another service on behalf of a user. It requires that +# the user's service ticket to the first service has the forwardable flag set [1]. +# However, some KDC implementations ignore this requirement and accept service tickets +# with the flag unset. +# +# If this security property is set to "true", then +# +# 1) The user service ticket, when obtained by the middle service after a S4U2self +# impersonation, is not required to have the forwardable flag set; and, +# +# 2) If a S4U2proxy request receives a KRB_ERROR of the KDC_ERR_BADOPTION error code +# and the ticket to the middle service is not forwardable, OpenJDK will try the same +# request with another KDC instead of treating it as a fatal failure. +# +# The default value is "false". +# +# If a system property of the same name is also specified, it supersedes the +# security property value defined here. +# +# [1] https://docs.microsoft.com/en-us/openspecs/windows_protocols/ms-sfu/bde93b0e-f3c9-4ddf-9f44-e1453be7af5a +#jdk.security.krb5.s4u2proxy.acceptNonForwardableServiceTicket=false + +# +# X.509 AuthorityInfoAccess caIssuer URI Filtering +# +# This property defines a whitespace-separated list of filters that +# are applied to URIs found in the authorityInfoAccess extension in +# X.509 certificates. Any caIssuers URIs in X.509 certificates are only +# followed when the com.sun.security.enableAIAcaIssuers System property is +# enabled and the filter allows the URI. By default this property imposes a +# deny-all ruleset. This property may be overridden by a System property +# of the same name. +# +# The filters must take the form of absolute, hierarchical URIs as defined by +# the java.net.URI class. Additionally, only the following protocols are +# allowed as filters: http, https, ldap and ftp. +# See RFC 5280, section 4.2.2.1 for details about the types of URIs allowed for +# the extension and their specific requirements. +# The filter matching rules are applied to each CA issuer URI as follows: +# 1. The scheme must match (case-insensitive). +# 2. A hostname or address must be specified in the filter URI. It must match +# the host or address in the caIssuers URI (case-insensitive). No name +# resolution is performed on hostnames to match IP addresses. +# 3. The port number must match. For filter and caIssuer URIs, when a port +# number is omitted, the well-known port for that scheme will be used in the +# comparison. +# 4. For hierarchical filesystem schemes (e.g. http[s], ftp): +# a. The normalized path portion of the filter URI is matched in a +# case-sensitive manner. If the final component of the path does not end +# in a slash (/), it is considered to be a file path component and must +# be an exact match of the caIssuer's URI file path component. If the +# final filter component ends in a slash, then it must either match or be +# a prefix of the caIssuer's URI path component (e.g. a filter path of +# /ab/cd/ will match a caIssuer path of /ab/cd/, /ab/cd/ef and +# /ab/cd/ef/ghi). +# b. Query strings will be ignored in filter rules and caIssuer URIs. +# c. Fragments will be ignored in filter rules and caIssuer URIs. +# 5. For ldap URIs: +# a. The base DN must be an exact match (case-insensitive). +# b. Any query string in the rule, if specified, is ignored. +# 6. A single value "any" (case-insensitive) will create an allow-all rule. +# +# As an example, here is a valid filter policy consisting of two rules: +# com.sun.security.allowedAIALocations=http://some.company.com/cacert \ +# ldap://ldap.company.com/dc=company,dc=com?caCertificate;binary +com.sun.security.allowedAIALocations= diff --git a/java21/conf/security/policy/README.txt b/java21/conf/security/policy/README.txt new file mode 100644 index 0000000000000000000000000000000000000000..fdf77d3e3a401f0d6f0be18c53f6bec7cf4b0f25 --- /dev/null +++ b/java21/conf/security/policy/README.txt @@ -0,0 +1,54 @@ + + Java(TM) Cryptography Extension Policy Files + for the Java(TM) Platform, Standard Edition Runtime Environment + + README +------------------------------------------------------------------------ + +Import and export control rules on cryptographic software vary from +country to country. The Java Cryptography Extension (JCE) architecture +allows flexible cryptographic key strength to be configured via the +jurisdiction policy files which are referenced by the "crypto.policy" +security property in the /conf/security/java.security file. + +By default, Java provides two different sets of cryptographic policy +files: + + unlimited: These policy files contain no restrictions on cryptographic + strengths or algorithms + + limited: These policy files contain more restricted cryptographic + strengths + +These files reside in /conf/security/policy in the "unlimited" +or "limited" subdirectories respectively. + +Each subdirectory contains a complete policy configuration, +and subdirectories can be added/edited/removed to reflect your +import or export control product requirements. + +Within a subdirectory, the effective policy is the combined minimum +permissions of the grant statements in the file(s) matching the filename +pattern "default_*.policy". At least one grant is required. For example: + + limited = Export (all) + Import (limited) = Limited + unlimited = Export (all) + Import (all) = Unlimited + +The effective exemption policy is the combined minimum permissions +of the grant statements in the file(s) matching the filename pattern +"exempt_*.policy". Exemption grants are optional. For example: + + limited = grants exemption permissions, by which the + effective policy can be circumvented. + e.g. KeyRecovery/KeyEscrow/KeyWeakening. + +Please see the Java Cryptography Architecture (JCA) documentation for +additional information on these files and formats. + +YOU ARE ADVISED TO CONSULT YOUR EXPORT/IMPORT CONTROL COUNSEL OR ATTORNEY +TO DETERMINE THE EXACT REQUIREMENTS. + +Please note that the JCE for Java SE, including the JCE framework, +cryptographic policy files, and standard JCE providers provided with +the Java SE, have been reviewed and approved for export as mass market +encryption item by the US Bureau of Industry and Security. diff --git a/java21/conf/security/policy/limited/default_US_export.policy b/java21/conf/security/policy/limited/default_US_export.policy new file mode 100644 index 0000000000000000000000000000000000000000..1f389340585d2a0a2f671fa3b3c273281986071c --- /dev/null +++ b/java21/conf/security/policy/limited/default_US_export.policy @@ -0,0 +1,6 @@ +// Default US Export policy file. + +grant { + // There is no restriction to any algorithms. + permission javax.crypto.CryptoAllPermission; +}; diff --git a/java21/conf/security/policy/limited/default_local.policy b/java21/conf/security/policy/limited/default_local.policy new file mode 100644 index 0000000000000000000000000000000000000000..2a6d5134047c001361528e9300daab3ebc28ebb0 --- /dev/null +++ b/java21/conf/security/policy/limited/default_local.policy @@ -0,0 +1,14 @@ +// Some countries have import limits on crypto strength. This policy file +// is worldwide importable. + +grant { + permission javax.crypto.CryptoPermission "DES", 64; + permission javax.crypto.CryptoPermission "DESede", *; + permission javax.crypto.CryptoPermission "RC2", 128, + "javax.crypto.spec.RC2ParameterSpec", 128; + permission javax.crypto.CryptoPermission "RC4", 128; + permission javax.crypto.CryptoPermission "RC5", 128, + "javax.crypto.spec.RC5ParameterSpec", *, 12, *; + permission javax.crypto.CryptoPermission "RSA", *; + permission javax.crypto.CryptoPermission *, 128; +}; diff --git a/java21/conf/security/policy/limited/exempt_local.policy b/java21/conf/security/policy/limited/exempt_local.policy new file mode 100644 index 0000000000000000000000000000000000000000..9dd5b91b06d768bea47022ab61d02dcbcccff410 --- /dev/null +++ b/java21/conf/security/policy/limited/exempt_local.policy @@ -0,0 +1,13 @@ +// Some countries have import limits on crypto strength, but may allow for +// these exemptions if the exemption mechanism is used. + +grant { + // There is no restriction to any algorithms if KeyRecovery is enforced. + permission javax.crypto.CryptoPermission *, "KeyRecovery"; + + // There is no restriction to any algorithms if KeyEscrow is enforced. + permission javax.crypto.CryptoPermission *, "KeyEscrow"; + + // There is no restriction to any algorithms if KeyWeakening is enforced. + permission javax.crypto.CryptoPermission *, "KeyWeakening"; +}; diff --git a/java21/conf/security/policy/unlimited/default_US_export.policy b/java21/conf/security/policy/unlimited/default_US_export.policy new file mode 100644 index 0000000000000000000000000000000000000000..1f389340585d2a0a2f671fa3b3c273281986071c --- /dev/null +++ b/java21/conf/security/policy/unlimited/default_US_export.policy @@ -0,0 +1,6 @@ +// Default US Export policy file. + +grant { + // There is no restriction to any algorithms. + permission javax.crypto.CryptoAllPermission; +}; diff --git a/java21/conf/security/policy/unlimited/default_local.policy b/java21/conf/security/policy/unlimited/default_local.policy new file mode 100644 index 0000000000000000000000000000000000000000..2b907e25895d6fa4cd7bc2692cdc50db4f38adf7 --- /dev/null +++ b/java21/conf/security/policy/unlimited/default_local.policy @@ -0,0 +1,6 @@ +// Country-specific policy file for countries with no limits on crypto strength. + +grant { + // There is no restriction to any algorithms. + permission javax.crypto.CryptoAllPermission; +}; diff --git a/java21/conf/sound.properties b/java21/conf/sound.properties new file mode 100644 index 0000000000000000000000000000000000000000..68309d111a6050739ccd938dd4d4b9fae3f4e36d --- /dev/null +++ b/java21/conf/sound.properties @@ -0,0 +1,39 @@ +############################################################ +# Sound Configuration File +############################################################ +# +# This properties file is used to specify default service +# providers for javax.sound.midi.MidiSystem and +# javax.sound.sampled.AudioSystem. +# +# The following keys are recognized by MidiSystem methods: +# +# javax.sound.midi.Receiver +# javax.sound.midi.Sequencer +# javax.sound.midi.Synthesizer +# javax.sound.midi.Transmitter +# +# The following keys are recognized by AudioSystem methods: +# +# javax.sound.sampled.Clip +# javax.sound.sampled.Port +# javax.sound.sampled.SourceDataLine +# javax.sound.sampled.TargetDataLine +# +# The values specify the full class name of the service +# provider, or the device name. +# +# See the class descriptions for details. +# +# Example 1: +# Use MyDeviceProvider as default for SourceDataLines: +# javax.sound.sampled.SourceDataLine=com.xyz.MyDeviceProvider +# +# Example 2: +# Specify the default Synthesizer by its name "InternalSynth". +# javax.sound.midi.Synthesizer=#InternalSynth +# +# Example 3: +# Specify the default Receiver by provider and name: +# javax.sound.midi.Receiver=com.sun.media.sound.MidiProvider#SunMIDI1 +# diff --git a/java21/include/classfile_constants.h b/java21/include/classfile_constants.h new file mode 100644 index 0000000000000000000000000000000000000000..9f6a18002feaf8ca2b934d838c5a5adfeddaa587 --- /dev/null +++ b/java21/include/classfile_constants.h @@ -0,0 +1,588 @@ +/* + * Copyright (c) 2004, 2019, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +#ifndef CLASSFILE_CONSTANTS_H +#define CLASSFILE_CONSTANTS_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Classfile version number for this information */ +#define JVM_CLASSFILE_MAJOR_VERSION 65 +#define JVM_CLASSFILE_MINOR_VERSION 0 + +/* Flags */ + +enum { + JVM_ACC_PUBLIC = 0x0001, + JVM_ACC_PRIVATE = 0x0002, + JVM_ACC_PROTECTED = 0x0004, + JVM_ACC_STATIC = 0x0008, + JVM_ACC_FINAL = 0x0010, + JVM_ACC_SYNCHRONIZED = 0x0020, + JVM_ACC_SUPER = 0x0020, + JVM_ACC_VOLATILE = 0x0040, + JVM_ACC_BRIDGE = 0x0040, + JVM_ACC_TRANSIENT = 0x0080, + JVM_ACC_VARARGS = 0x0080, + JVM_ACC_NATIVE = 0x0100, + JVM_ACC_INTERFACE = 0x0200, + JVM_ACC_ABSTRACT = 0x0400, + JVM_ACC_STRICT = 0x0800, + JVM_ACC_SYNTHETIC = 0x1000, + JVM_ACC_ANNOTATION = 0x2000, + JVM_ACC_ENUM = 0x4000, + JVM_ACC_MODULE = 0x8000 +}; + +#define JVM_ACC_PUBLIC_BIT 0 +#define JVM_ACC_PRIVATE_BIT 1 +#define JVM_ACC_PROTECTED_BIT 2 +#define JVM_ACC_STATIC_BIT 3 +#define JVM_ACC_FINAL_BIT 4 +#define JVM_ACC_SYNCHRONIZED_BIT 5 +#define JVM_ACC_SUPER_BIT 5 +#define JVM_ACC_VOLATILE_BIT 6 +#define JVM_ACC_BRIDGE_BIT 6 +#define JVM_ACC_TRANSIENT_BIT 7 +#define JVM_ACC_VARARGS_BIT 7 +#define JVM_ACC_NATIVE_BIT 8 +#define JVM_ACC_INTERFACE_BIT 9 +#define JVM_ACC_ABSTRACT_BIT 10 +#define JVM_ACC_STRICT_BIT 11 +#define JVM_ACC_SYNTHETIC_BIT 12 +#define JVM_ACC_ANNOTATION_BIT 13 +#define JVM_ACC_ENUM_BIT 14 + +/* Used in newarray instruction. */ + +enum { + JVM_T_BOOLEAN = 4, + JVM_T_CHAR = 5, + JVM_T_FLOAT = 6, + JVM_T_DOUBLE = 7, + JVM_T_BYTE = 8, + JVM_T_SHORT = 9, + JVM_T_INT = 10, + JVM_T_LONG = 11 +}; + +/* Constant Pool Entries */ + +enum { + JVM_CONSTANT_Utf8 = 1, + JVM_CONSTANT_Unicode = 2, /* unused */ + JVM_CONSTANT_Integer = 3, + JVM_CONSTANT_Float = 4, + JVM_CONSTANT_Long = 5, + JVM_CONSTANT_Double = 6, + JVM_CONSTANT_Class = 7, + JVM_CONSTANT_String = 8, + JVM_CONSTANT_Fieldref = 9, + JVM_CONSTANT_Methodref = 10, + JVM_CONSTANT_InterfaceMethodref = 11, + JVM_CONSTANT_NameAndType = 12, + JVM_CONSTANT_MethodHandle = 15, // JSR 292 + JVM_CONSTANT_MethodType = 16, // JSR 292 + JVM_CONSTANT_Dynamic = 17, + JVM_CONSTANT_InvokeDynamic = 18, + JVM_CONSTANT_Module = 19, + JVM_CONSTANT_Package = 20, + JVM_CONSTANT_ExternalMax = 20 +}; + +/* JVM_CONSTANT_MethodHandle subtypes */ +enum { + JVM_REF_getField = 1, + JVM_REF_getStatic = 2, + JVM_REF_putField = 3, + JVM_REF_putStatic = 4, + JVM_REF_invokeVirtual = 5, + JVM_REF_invokeStatic = 6, + JVM_REF_invokeSpecial = 7, + JVM_REF_newInvokeSpecial = 8, + JVM_REF_invokeInterface = 9 +}; + +/* StackMapTable type item numbers */ + +enum { + JVM_ITEM_Top = 0, + JVM_ITEM_Integer = 1, + JVM_ITEM_Float = 2, + JVM_ITEM_Double = 3, + JVM_ITEM_Long = 4, + JVM_ITEM_Null = 5, + JVM_ITEM_UninitializedThis = 6, + JVM_ITEM_Object = 7, + JVM_ITEM_Uninitialized = 8 +}; + +/* Type signatures */ + +enum { + JVM_SIGNATURE_SLASH = '/', + JVM_SIGNATURE_DOT = '.', + JVM_SIGNATURE_SPECIAL = '<', + JVM_SIGNATURE_ENDSPECIAL = '>', + JVM_SIGNATURE_ARRAY = '[', + JVM_SIGNATURE_BYTE = 'B', + JVM_SIGNATURE_CHAR = 'C', + JVM_SIGNATURE_CLASS = 'L', + JVM_SIGNATURE_ENDCLASS = ';', + JVM_SIGNATURE_ENUM = 'E', + JVM_SIGNATURE_FLOAT = 'F', + JVM_SIGNATURE_DOUBLE = 'D', + JVM_SIGNATURE_FUNC = '(', + JVM_SIGNATURE_ENDFUNC = ')', + JVM_SIGNATURE_INT = 'I', + JVM_SIGNATURE_LONG = 'J', + JVM_SIGNATURE_SHORT = 'S', + JVM_SIGNATURE_VOID = 'V', + JVM_SIGNATURE_BOOLEAN = 'Z' +}; + +/* Opcodes */ + +enum { + JVM_OPC_nop = 0, + JVM_OPC_aconst_null = 1, + JVM_OPC_iconst_m1 = 2, + JVM_OPC_iconst_0 = 3, + JVM_OPC_iconst_1 = 4, + JVM_OPC_iconst_2 = 5, + JVM_OPC_iconst_3 = 6, + JVM_OPC_iconst_4 = 7, + JVM_OPC_iconst_5 = 8, + JVM_OPC_lconst_0 = 9, + JVM_OPC_lconst_1 = 10, + JVM_OPC_fconst_0 = 11, + JVM_OPC_fconst_1 = 12, + JVM_OPC_fconst_2 = 13, + JVM_OPC_dconst_0 = 14, + JVM_OPC_dconst_1 = 15, + JVM_OPC_bipush = 16, + JVM_OPC_sipush = 17, + JVM_OPC_ldc = 18, + JVM_OPC_ldc_w = 19, + JVM_OPC_ldc2_w = 20, + JVM_OPC_iload = 21, + JVM_OPC_lload = 22, + JVM_OPC_fload = 23, + JVM_OPC_dload = 24, + JVM_OPC_aload = 25, + JVM_OPC_iload_0 = 26, + JVM_OPC_iload_1 = 27, + JVM_OPC_iload_2 = 28, + JVM_OPC_iload_3 = 29, + JVM_OPC_lload_0 = 30, + JVM_OPC_lload_1 = 31, + JVM_OPC_lload_2 = 32, + JVM_OPC_lload_3 = 33, + JVM_OPC_fload_0 = 34, + JVM_OPC_fload_1 = 35, + JVM_OPC_fload_2 = 36, + JVM_OPC_fload_3 = 37, + JVM_OPC_dload_0 = 38, + JVM_OPC_dload_1 = 39, + JVM_OPC_dload_2 = 40, + JVM_OPC_dload_3 = 41, + JVM_OPC_aload_0 = 42, + JVM_OPC_aload_1 = 43, + JVM_OPC_aload_2 = 44, + JVM_OPC_aload_3 = 45, + JVM_OPC_iaload = 46, + JVM_OPC_laload = 47, + JVM_OPC_faload = 48, + JVM_OPC_daload = 49, + JVM_OPC_aaload = 50, + JVM_OPC_baload = 51, + JVM_OPC_caload = 52, + JVM_OPC_saload = 53, + JVM_OPC_istore = 54, + JVM_OPC_lstore = 55, + JVM_OPC_fstore = 56, + JVM_OPC_dstore = 57, + JVM_OPC_astore = 58, + JVM_OPC_istore_0 = 59, + JVM_OPC_istore_1 = 60, + JVM_OPC_istore_2 = 61, + JVM_OPC_istore_3 = 62, + JVM_OPC_lstore_0 = 63, + JVM_OPC_lstore_1 = 64, + JVM_OPC_lstore_2 = 65, + JVM_OPC_lstore_3 = 66, + JVM_OPC_fstore_0 = 67, + JVM_OPC_fstore_1 = 68, + JVM_OPC_fstore_2 = 69, + JVM_OPC_fstore_3 = 70, + JVM_OPC_dstore_0 = 71, + JVM_OPC_dstore_1 = 72, + JVM_OPC_dstore_2 = 73, + JVM_OPC_dstore_3 = 74, + JVM_OPC_astore_0 = 75, + JVM_OPC_astore_1 = 76, + JVM_OPC_astore_2 = 77, + JVM_OPC_astore_3 = 78, + JVM_OPC_iastore = 79, + JVM_OPC_lastore = 80, + JVM_OPC_fastore = 81, + JVM_OPC_dastore = 82, + JVM_OPC_aastore = 83, + JVM_OPC_bastore = 84, + JVM_OPC_castore = 85, + JVM_OPC_sastore = 86, + JVM_OPC_pop = 87, + JVM_OPC_pop2 = 88, + JVM_OPC_dup = 89, + JVM_OPC_dup_x1 = 90, + JVM_OPC_dup_x2 = 91, + JVM_OPC_dup2 = 92, + JVM_OPC_dup2_x1 = 93, + JVM_OPC_dup2_x2 = 94, + JVM_OPC_swap = 95, + JVM_OPC_iadd = 96, + JVM_OPC_ladd = 97, + JVM_OPC_fadd = 98, + JVM_OPC_dadd = 99, + JVM_OPC_isub = 100, + JVM_OPC_lsub = 101, + JVM_OPC_fsub = 102, + JVM_OPC_dsub = 103, + JVM_OPC_imul = 104, + JVM_OPC_lmul = 105, + JVM_OPC_fmul = 106, + JVM_OPC_dmul = 107, + JVM_OPC_idiv = 108, + JVM_OPC_ldiv = 109, + JVM_OPC_fdiv = 110, + JVM_OPC_ddiv = 111, + JVM_OPC_irem = 112, + JVM_OPC_lrem = 113, + JVM_OPC_frem = 114, + JVM_OPC_drem = 115, + JVM_OPC_ineg = 116, + JVM_OPC_lneg = 117, + JVM_OPC_fneg = 118, + JVM_OPC_dneg = 119, + JVM_OPC_ishl = 120, + JVM_OPC_lshl = 121, + JVM_OPC_ishr = 122, + JVM_OPC_lshr = 123, + JVM_OPC_iushr = 124, + JVM_OPC_lushr = 125, + JVM_OPC_iand = 126, + JVM_OPC_land = 127, + JVM_OPC_ior = 128, + JVM_OPC_lor = 129, + JVM_OPC_ixor = 130, + JVM_OPC_lxor = 131, + JVM_OPC_iinc = 132, + JVM_OPC_i2l = 133, + JVM_OPC_i2f = 134, + JVM_OPC_i2d = 135, + JVM_OPC_l2i = 136, + JVM_OPC_l2f = 137, + JVM_OPC_l2d = 138, + JVM_OPC_f2i = 139, + JVM_OPC_f2l = 140, + JVM_OPC_f2d = 141, + JVM_OPC_d2i = 142, + JVM_OPC_d2l = 143, + JVM_OPC_d2f = 144, + JVM_OPC_i2b = 145, + JVM_OPC_i2c = 146, + JVM_OPC_i2s = 147, + JVM_OPC_lcmp = 148, + JVM_OPC_fcmpl = 149, + JVM_OPC_fcmpg = 150, + JVM_OPC_dcmpl = 151, + JVM_OPC_dcmpg = 152, + JVM_OPC_ifeq = 153, + JVM_OPC_ifne = 154, + JVM_OPC_iflt = 155, + JVM_OPC_ifge = 156, + JVM_OPC_ifgt = 157, + JVM_OPC_ifle = 158, + JVM_OPC_if_icmpeq = 159, + JVM_OPC_if_icmpne = 160, + JVM_OPC_if_icmplt = 161, + JVM_OPC_if_icmpge = 162, + JVM_OPC_if_icmpgt = 163, + JVM_OPC_if_icmple = 164, + JVM_OPC_if_acmpeq = 165, + JVM_OPC_if_acmpne = 166, + JVM_OPC_goto = 167, + JVM_OPC_jsr = 168, + JVM_OPC_ret = 169, + JVM_OPC_tableswitch = 170, + JVM_OPC_lookupswitch = 171, + JVM_OPC_ireturn = 172, + JVM_OPC_lreturn = 173, + JVM_OPC_freturn = 174, + JVM_OPC_dreturn = 175, + JVM_OPC_areturn = 176, + JVM_OPC_return = 177, + JVM_OPC_getstatic = 178, + JVM_OPC_putstatic = 179, + JVM_OPC_getfield = 180, + JVM_OPC_putfield = 181, + JVM_OPC_invokevirtual = 182, + JVM_OPC_invokespecial = 183, + JVM_OPC_invokestatic = 184, + JVM_OPC_invokeinterface = 185, + JVM_OPC_invokedynamic = 186, + JVM_OPC_new = 187, + JVM_OPC_newarray = 188, + JVM_OPC_anewarray = 189, + JVM_OPC_arraylength = 190, + JVM_OPC_athrow = 191, + JVM_OPC_checkcast = 192, + JVM_OPC_instanceof = 193, + JVM_OPC_monitorenter = 194, + JVM_OPC_monitorexit = 195, + JVM_OPC_wide = 196, + JVM_OPC_multianewarray = 197, + JVM_OPC_ifnull = 198, + JVM_OPC_ifnonnull = 199, + JVM_OPC_goto_w = 200, + JVM_OPC_jsr_w = 201, + JVM_OPC_MAX = 201 +}; + +/* Opcode length initializer, use with something like: + * unsigned char opcode_length[JVM_OPC_MAX+1] = JVM_OPCODE_LENGTH_INITIALIZER; + */ +#define JVM_OPCODE_LENGTH_INITIALIZER { \ + 1, /* nop */ \ + 1, /* aconst_null */ \ + 1, /* iconst_m1 */ \ + 1, /* iconst_0 */ \ + 1, /* iconst_1 */ \ + 1, /* iconst_2 */ \ + 1, /* iconst_3 */ \ + 1, /* iconst_4 */ \ + 1, /* iconst_5 */ \ + 1, /* lconst_0 */ \ + 1, /* lconst_1 */ \ + 1, /* fconst_0 */ \ + 1, /* fconst_1 */ \ + 1, /* fconst_2 */ \ + 1, /* dconst_0 */ \ + 1, /* dconst_1 */ \ + 2, /* bipush */ \ + 3, /* sipush */ \ + 2, /* ldc */ \ + 3, /* ldc_w */ \ + 3, /* ldc2_w */ \ + 2, /* iload */ \ + 2, /* lload */ \ + 2, /* fload */ \ + 2, /* dload */ \ + 2, /* aload */ \ + 1, /* iload_0 */ \ + 1, /* iload_1 */ \ + 1, /* iload_2 */ \ + 1, /* iload_3 */ \ + 1, /* lload_0 */ \ + 1, /* lload_1 */ \ + 1, /* lload_2 */ \ + 1, /* lload_3 */ \ + 1, /* fload_0 */ \ + 1, /* fload_1 */ \ + 1, /* fload_2 */ \ + 1, /* fload_3 */ \ + 1, /* dload_0 */ \ + 1, /* dload_1 */ \ + 1, /* dload_2 */ \ + 1, /* dload_3 */ \ + 1, /* aload_0 */ \ + 1, /* aload_1 */ \ + 1, /* aload_2 */ \ + 1, /* aload_3 */ \ + 1, /* iaload */ \ + 1, /* laload */ \ + 1, /* faload */ \ + 1, /* daload */ \ + 1, /* aaload */ \ + 1, /* baload */ \ + 1, /* caload */ \ + 1, /* saload */ \ + 2, /* istore */ \ + 2, /* lstore */ \ + 2, /* fstore */ \ + 2, /* dstore */ \ + 2, /* astore */ \ + 1, /* istore_0 */ \ + 1, /* istore_1 */ \ + 1, /* istore_2 */ \ + 1, /* istore_3 */ \ + 1, /* lstore_0 */ \ + 1, /* lstore_1 */ \ + 1, /* lstore_2 */ \ + 1, /* lstore_3 */ \ + 1, /* fstore_0 */ \ + 1, /* fstore_1 */ \ + 1, /* fstore_2 */ \ + 1, /* fstore_3 */ \ + 1, /* dstore_0 */ \ + 1, /* dstore_1 */ \ + 1, /* dstore_2 */ \ + 1, /* dstore_3 */ \ + 1, /* astore_0 */ \ + 1, /* astore_1 */ \ + 1, /* astore_2 */ \ + 1, /* astore_3 */ \ + 1, /* iastore */ \ + 1, /* lastore */ \ + 1, /* fastore */ \ + 1, /* dastore */ \ + 1, /* aastore */ \ + 1, /* bastore */ \ + 1, /* castore */ \ + 1, /* sastore */ \ + 1, /* pop */ \ + 1, /* pop2 */ \ + 1, /* dup */ \ + 1, /* dup_x1 */ \ + 1, /* dup_x2 */ \ + 1, /* dup2 */ \ + 1, /* dup2_x1 */ \ + 1, /* dup2_x2 */ \ + 1, /* swap */ \ + 1, /* iadd */ \ + 1, /* ladd */ \ + 1, /* fadd */ \ + 1, /* dadd */ \ + 1, /* isub */ \ + 1, /* lsub */ \ + 1, /* fsub */ \ + 1, /* dsub */ \ + 1, /* imul */ \ + 1, /* lmul */ \ + 1, /* fmul */ \ + 1, /* dmul */ \ + 1, /* idiv */ \ + 1, /* ldiv */ \ + 1, /* fdiv */ \ + 1, /* ddiv */ \ + 1, /* irem */ \ + 1, /* lrem */ \ + 1, /* frem */ \ + 1, /* drem */ \ + 1, /* ineg */ \ + 1, /* lneg */ \ + 1, /* fneg */ \ + 1, /* dneg */ \ + 1, /* ishl */ \ + 1, /* lshl */ \ + 1, /* ishr */ \ + 1, /* lshr */ \ + 1, /* iushr */ \ + 1, /* lushr */ \ + 1, /* iand */ \ + 1, /* land */ \ + 1, /* ior */ \ + 1, /* lor */ \ + 1, /* ixor */ \ + 1, /* lxor */ \ + 3, /* iinc */ \ + 1, /* i2l */ \ + 1, /* i2f */ \ + 1, /* i2d */ \ + 1, /* l2i */ \ + 1, /* l2f */ \ + 1, /* l2d */ \ + 1, /* f2i */ \ + 1, /* f2l */ \ + 1, /* f2d */ \ + 1, /* d2i */ \ + 1, /* d2l */ \ + 1, /* d2f */ \ + 1, /* i2b */ \ + 1, /* i2c */ \ + 1, /* i2s */ \ + 1, /* lcmp */ \ + 1, /* fcmpl */ \ + 1, /* fcmpg */ \ + 1, /* dcmpl */ \ + 1, /* dcmpg */ \ + 3, /* ifeq */ \ + 3, /* ifne */ \ + 3, /* iflt */ \ + 3, /* ifge */ \ + 3, /* ifgt */ \ + 3, /* ifle */ \ + 3, /* if_icmpeq */ \ + 3, /* if_icmpne */ \ + 3, /* if_icmplt */ \ + 3, /* if_icmpge */ \ + 3, /* if_icmpgt */ \ + 3, /* if_icmple */ \ + 3, /* if_acmpeq */ \ + 3, /* if_acmpne */ \ + 3, /* goto */ \ + 3, /* jsr */ \ + 2, /* ret */ \ + 99, /* tableswitch */ \ + 99, /* lookupswitch */ \ + 1, /* ireturn */ \ + 1, /* lreturn */ \ + 1, /* freturn */ \ + 1, /* dreturn */ \ + 1, /* areturn */ \ + 1, /* return */ \ + 3, /* getstatic */ \ + 3, /* putstatic */ \ + 3, /* getfield */ \ + 3, /* putfield */ \ + 3, /* invokevirtual */ \ + 3, /* invokespecial */ \ + 3, /* invokestatic */ \ + 5, /* invokeinterface */ \ + 5, /* invokedynamic */ \ + 3, /* new */ \ + 2, /* newarray */ \ + 3, /* anewarray */ \ + 1, /* arraylength */ \ + 1, /* athrow */ \ + 3, /* checkcast */ \ + 3, /* instanceof */ \ + 1, /* monitorenter */ \ + 1, /* monitorexit */ \ + 0, /* wide */ \ + 4, /* multianewarray */ \ + 3, /* ifnull */ \ + 3, /* ifnonnull */ \ + 5, /* goto_w */ \ + 5 /* jsr_w */ \ +} + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* CLASSFILE_CONSTANTS */ diff --git a/java21/include/jawt.h b/java21/include/jawt.h new file mode 100644 index 0000000000000000000000000000000000000000..2079b0bc1b3de1b60aa8d8707e722f03be81dd1e --- /dev/null +++ b/java21/include/jawt.h @@ -0,0 +1,356 @@ +/* + * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +#ifndef _JAVASOFT_JAWT_H_ +#define _JAVASOFT_JAWT_H_ + +#include "jni.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * AWT native interface. + * + * The AWT native interface allows a native C or C++ application a means + * by which to access native structures in AWT. This is to facilitate moving + * legacy C and C++ applications to Java and to target the needs of the + * developers who need to do their own native rendering to canvases + * for performance or other reasons. + * + * Conversely it also provides mechanisms for an application which already + * has a native window to provide that to AWT for AWT rendering. + * + * Since every platform may be different in its native data structures + * and APIs for windowing systems the application must necessarily + * provided per-platform source and compile and deliver per-platform + * native code to use this API. + * + * These interfaces are not part of the Java SE specification and + * a VM is not required to implement this API. However it is strongly + * recommended that all implementations which support headful AWT + * also support these interfaces. + * + */ + +/* + * AWT Native Drawing Surface (JAWT_DrawingSurface). + * + * For each platform, there is a native drawing surface structure. This + * platform-specific structure can be found in jawt_md.h. It is recommended + * that additional platforms follow the same model. It is also recommended + * that VMs on all platforms support the existing structures in jawt_md.h. + * + ******************* + * EXAMPLE OF USAGE: + ******************* + * + * In Win32, a programmer wishes to access the HWND of a canvas to perform + * native rendering into it. The programmer has declared the paint() method + * for their canvas subclass to be native: + * + * + * MyCanvas.java: + * + * import java.awt.*; + * + * public class MyCanvas extends Canvas { + * + * static { + * System.loadLibrary("mylib"); + * } + * + * public native void paint(Graphics g); + * } + * + * + * myfile.c: + * + * #include "jawt_md.h" + * #include + * + * JNIEXPORT void JNICALL + * Java_MyCanvas_paint(JNIEnv* env, jobject canvas, jobject graphics) + * { + * JAWT awt; + * JAWT_DrawingSurface* ds; + * JAWT_DrawingSurfaceInfo* dsi; + * JAWT_Win32DrawingSurfaceInfo* dsi_win; + * jboolean result; + * jint lock; + * + * // Get the AWT. Request version 9 to access features in that release. + * awt.version = JAWT_VERSION_9; + * result = JAWT_GetAWT(env, &awt); + * assert(result != JNI_FALSE); + * + * // Get the drawing surface + * ds = awt.GetDrawingSurface(env, canvas); + * assert(ds != NULL); + * + * // Lock the drawing surface + * lock = ds->Lock(ds); + * assert((lock & JAWT_LOCK_ERROR) == 0); + * + * // Get the drawing surface info + * dsi = ds->GetDrawingSurfaceInfo(ds); + * + * // Get the platform-specific drawing info + * dsi_win = (JAWT_Win32DrawingSurfaceInfo*)dsi->platformInfo; + * + * ////////////////////////////// + * // !!! DO PAINTING HERE !!! // + * ////////////////////////////// + * + * // Free the drawing surface info + * ds->FreeDrawingSurfaceInfo(dsi); + * + * // Unlock the drawing surface + * ds->Unlock(ds); + * + * // Free the drawing surface + * awt.FreeDrawingSurface(ds); + * } + * + */ + +/* + * JAWT_Rectangle + * Structure for a native rectangle. + */ +typedef struct jawt_Rectangle { + jint x; + jint y; + jint width; + jint height; +} JAWT_Rectangle; + +struct jawt_DrawingSurface; + +/* + * JAWT_DrawingSurfaceInfo + * Structure for containing the underlying drawing information of a component. + */ +typedef struct jawt_DrawingSurfaceInfo { + /* + * Pointer to the platform-specific information. This can be safely + * cast to a JAWT_Win32DrawingSurfaceInfo on Windows or a + * JAWT_X11DrawingSurfaceInfo on Linux and Solaris. On Mac OS X this is a + * pointer to a NSObject that conforms to the JAWT_SurfaceLayers + * protocol. See jawt_md.h for details. + */ + void* platformInfo; + /* Cached pointer to the underlying drawing surface */ + struct jawt_DrawingSurface* ds; + /* Bounding rectangle of the drawing surface */ + JAWT_Rectangle bounds; + /* Number of rectangles in the clip */ + jint clipSize; + /* Clip rectangle array */ + JAWT_Rectangle* clip; +} JAWT_DrawingSurfaceInfo; + +#define JAWT_LOCK_ERROR 0x00000001 +#define JAWT_LOCK_CLIP_CHANGED 0x00000002 +#define JAWT_LOCK_BOUNDS_CHANGED 0x00000004 +#define JAWT_LOCK_SURFACE_CHANGED 0x00000008 + +/* + * JAWT_DrawingSurface + * Structure for containing the underlying drawing information of a component. + * All operations on a JAWT_DrawingSurface MUST be performed from the same + * thread as the call to GetDrawingSurface. + */ +typedef struct jawt_DrawingSurface { + /* + * Cached reference to the Java environment of the calling thread. + * If Lock(), Unlock(), GetDrawingSurfaceInfo() or + * FreeDrawingSurfaceInfo() are called from a different thread, + * this data member should be set before calling those functions. + */ + JNIEnv* env; + /* Cached reference to the target object */ + jobject target; + /* + * Lock the surface of the target component for native rendering. + * When finished drawing, the surface must be unlocked with + * Unlock(). This function returns a bitmask with one or more of the + * following values: + * + * JAWT_LOCK_ERROR - When an error has occurred and the surface could not + * be locked. + * + * JAWT_LOCK_CLIP_CHANGED - When the clip region has changed. + * + * JAWT_LOCK_BOUNDS_CHANGED - When the bounds of the surface have changed. + * + * JAWT_LOCK_SURFACE_CHANGED - When the surface itself has changed + */ + jint (JNICALL *Lock) + (struct jawt_DrawingSurface* ds); + /* + * Get the drawing surface info. + * The value returned may be cached, but the values may change if + * additional calls to Lock() or Unlock() are made. + * Lock() must be called before this can return a valid value. + * Returns NULL if an error has occurred. + * When finished with the returned value, FreeDrawingSurfaceInfo must be + * called. + */ + JAWT_DrawingSurfaceInfo* (JNICALL *GetDrawingSurfaceInfo) + (struct jawt_DrawingSurface* ds); + /* + * Free the drawing surface info. + */ + void (JNICALL *FreeDrawingSurfaceInfo) + (JAWT_DrawingSurfaceInfo* dsi); + /* + * Unlock the drawing surface of the target component for native rendering. + */ + void (JNICALL *Unlock) + (struct jawt_DrawingSurface* ds); +} JAWT_DrawingSurface; + +/* + * JAWT + * Structure for containing native AWT functions. + */ +typedef struct jawt { + /* + * Version of this structure. This must always be set before + * calling JAWT_GetAWT(). It affects the functions returned. + * Must be one of the known pre-defined versions. + */ + jint version; + /* + * Return a drawing surface from a target jobject. This value + * may be cached. + * Returns NULL if an error has occurred. + * Target must be a java.awt.Component (should be a Canvas + * or Window for native rendering). + * FreeDrawingSurface() must be called when finished with the + * returned JAWT_DrawingSurface. + */ + JAWT_DrawingSurface* (JNICALL *GetDrawingSurface) + (JNIEnv* env, jobject target); + /* + * Free the drawing surface allocated in GetDrawingSurface. + */ + void (JNICALL *FreeDrawingSurface) + (JAWT_DrawingSurface* ds); + /* + * Since 1.4 + * Locks the entire AWT for synchronization purposes + */ + void (JNICALL *Lock)(JNIEnv* env); + /* + * Since 1.4 + * Unlocks the entire AWT for synchronization purposes + */ + void (JNICALL *Unlock)(JNIEnv* env); + /* + * Since 1.4 + * Returns a reference to a java.awt.Component from a native + * platform handle. On Windows, this corresponds to an HWND; + * on Solaris and Linux, this is a Drawable. For other platforms, + * see the appropriate machine-dependent header file for a description. + * The reference returned by this function is a local + * reference that is only valid in this environment. + * This function returns a NULL reference if no component could be + * found with matching platform information. + */ + jobject (JNICALL *GetComponent)(JNIEnv* env, void* platformInfo); + + /** + * Since 9 + * Creates a java.awt.Frame placed in a native container. Container is + * referenced by the native platform handle. For example on Windows this + * corresponds to an HWND. For other platforms, see the appropriate + * machine-dependent header file for a description. The reference returned + * by this function is a local reference that is only valid in this + * environment. This function returns a NULL reference if no frame could be + * created with matching platform information. + */ + jobject (JNICALL *CreateEmbeddedFrame) (JNIEnv *env, void* platformInfo); + + /** + * Since 9 + * Moves and resizes the embedded frame. The new location of the top-left + * corner is specified by x and y parameters relative to the native parent + * component. The new size is specified by width and height. + * + * The embedded frame should be created by CreateEmbeddedFrame() method, or + * this function will not have any effect. + * + * java.awt.Component.setLocation() and java.awt.Component.setBounds() for + * EmbeddedFrame really don't move it within the native parent. These + * methods always locate the embedded frame at (0, 0) for backward + * compatibility. To allow moving embedded frames this method was + * introduced, and it works just the same way as setLocation() and + * setBounds() for usual, non-embedded components. + * + * Using usual get/setLocation() and get/setBounds() together with this new + * method is not recommended. + */ + void (JNICALL *SetBounds) (JNIEnv *env, jobject embeddedFrame, + jint x, jint y, jint w, jint h); + /** + * Since 9 + * Synthesize a native message to activate or deactivate an EmbeddedFrame + * window depending on the value of parameter doActivate, if "true" + * activates the window; otherwise, deactivates the window. + * + * The embedded frame should be created by CreateEmbeddedFrame() method, or + * this function will not have any effect. + */ + void (JNICALL *SynthesizeWindowActivation) (JNIEnv *env, + jobject embeddedFrame, jboolean doActivate); +} JAWT; + +/* + * Get the AWT native structure. This function returns JNI_FALSE if + * an error occurs. + */ +_JNI_IMPORT_OR_EXPORT_ +jboolean JNICALL JAWT_GetAWT(JNIEnv* env, JAWT* awt); + +/* + * Specify one of these constants as the JAWT.version + * Specifying an earlier version will limit the available functions to + * those provided in that earlier version of JAWT. + * See the "Since" note on each API. Methods with no "Since" + * may be presumed to be present in JAWT_VERSION_1_3. + */ +#define JAWT_VERSION_1_3 0x00010003 +#define JAWT_VERSION_1_4 0x00010004 +#define JAWT_VERSION_1_7 0x00010007 +#define JAWT_VERSION_9 0x00090000 + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /* !_JAVASOFT_JAWT_H_ */ diff --git a/java21/include/jdwpTransport.h b/java21/include/jdwpTransport.h new file mode 100644 index 0000000000000000000000000000000000000000..227a7222897dcc9f7b5e1f82a8d09550990257f8 --- /dev/null +++ b/java21/include/jdwpTransport.h @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * Java Debug Wire Protocol Transport Service Provider Interface. + */ + +#ifndef JDWPTRANSPORT_H +#define JDWPTRANSPORT_H + +#include "jni.h" + +enum { + JDWPTRANSPORT_VERSION_1_0 = 0x00010000, + JDWPTRANSPORT_VERSION_1_1 = 0x00010001 +}; + +#ifdef __cplusplus +extern "C" { +#endif + +struct jdwpTransportNativeInterface_; + +struct _jdwpTransportEnv; + +#ifdef __cplusplus +typedef _jdwpTransportEnv jdwpTransportEnv; +#else +typedef const struct jdwpTransportNativeInterface_ *jdwpTransportEnv; +#endif /* __cplusplus */ + +/* + * Errors. Universal errors with JVMTI/JVMDI equivalents keep the + * values the same. + */ +typedef enum { + JDWPTRANSPORT_ERROR_NONE = 0, + JDWPTRANSPORT_ERROR_ILLEGAL_ARGUMENT = 103, + JDWPTRANSPORT_ERROR_OUT_OF_MEMORY = 110, + JDWPTRANSPORT_ERROR_INTERNAL = 113, + JDWPTRANSPORT_ERROR_ILLEGAL_STATE = 201, + JDWPTRANSPORT_ERROR_IO_ERROR = 202, + JDWPTRANSPORT_ERROR_TIMEOUT = 203, + JDWPTRANSPORT_ERROR_MSG_NOT_AVAILABLE = 204 +} jdwpTransportError; + + +/* + * Structure to define capabilities + */ +typedef struct { + unsigned int can_timeout_attach :1; + unsigned int can_timeout_accept :1; + unsigned int can_timeout_handshake :1; + unsigned int reserved3 :1; + unsigned int reserved4 :1; + unsigned int reserved5 :1; + unsigned int reserved6 :1; + unsigned int reserved7 :1; + unsigned int reserved8 :1; + unsigned int reserved9 :1; + unsigned int reserved10 :1; + unsigned int reserved11 :1; + unsigned int reserved12 :1; + unsigned int reserved13 :1; + unsigned int reserved14 :1; + unsigned int reserved15 :1; +} JDWPTransportCapabilities; + + +/* + * Structures to define packet layout. + * + * See: http://java.sun.com/j2se/1.5/docs/guide/jpda/jdwp-spec.html + */ + +#define JDWP_HEADER_SIZE 11 + +enum { + /* + * If additional flags are added that apply to jdwpCmdPacket, + * then debugLoop.c: reader() will need to be updated to + * accept more than JDWPTRANSPORT_FLAGS_NONE. + */ + JDWPTRANSPORT_FLAGS_NONE = 0x0, + JDWPTRANSPORT_FLAGS_REPLY = 0x80 +}; + +typedef struct { + jint len; + jint id; + jbyte flags; + jbyte cmdSet; + jbyte cmd; + jbyte *data; +} jdwpCmdPacket; + +typedef struct { + jint len; + jint id; + jbyte flags; + jshort errorCode; + jbyte *data; +} jdwpReplyPacket; + +typedef struct { + union { + jdwpCmdPacket cmd; + jdwpReplyPacket reply; + } type; +} jdwpPacket; + +/* + * JDWP functions called by the transport. + */ +typedef struct jdwpTransportCallback { + void *(*alloc)(jint numBytes); /* Call this for all allocations */ + void (*free)(void *buffer); /* Call this for all deallocations */ +} jdwpTransportCallback; + +typedef jint (JNICALL *jdwpTransport_OnLoad_t)(JavaVM *jvm, + jdwpTransportCallback *callback, + jint version, + jdwpTransportEnv** env); + +/* + * JDWP transport configuration from the agent. + */ +typedef struct jdwpTransportConfiguration { + /* Field added in JDWPTRANSPORT_VERSION_1_1: */ + const char* allowed_peers; /* Peers allowed for connection */ +} jdwpTransportConfiguration; + + +/* Function Interface */ + +struct jdwpTransportNativeInterface_ { + /* 1 : RESERVED */ + void *reserved1; + + /* 2 : Get Capabilities */ + jdwpTransportError (JNICALL *GetCapabilities)(jdwpTransportEnv* env, + JDWPTransportCapabilities *capabilities_ptr); + + /* 3 : Attach */ + jdwpTransportError (JNICALL *Attach)(jdwpTransportEnv* env, + const char* address, + jlong attach_timeout, + jlong handshake_timeout); + + /* 4: StartListening */ + jdwpTransportError (JNICALL *StartListening)(jdwpTransportEnv* env, + const char* address, + char** actual_address); + + /* 5: StopListening */ + jdwpTransportError (JNICALL *StopListening)(jdwpTransportEnv* env); + + /* 6: Accept */ + jdwpTransportError (JNICALL *Accept)(jdwpTransportEnv* env, + jlong accept_timeout, + jlong handshake_timeout); + + /* 7: IsOpen */ + jboolean (JNICALL *IsOpen)(jdwpTransportEnv* env); + + /* 8: Close */ + jdwpTransportError (JNICALL *Close)(jdwpTransportEnv* env); + + /* 9: ReadPacket */ + jdwpTransportError (JNICALL *ReadPacket)(jdwpTransportEnv* env, + jdwpPacket *pkt); + + /* 10: Write Packet */ + jdwpTransportError (JNICALL *WritePacket)(jdwpTransportEnv* env, + const jdwpPacket* pkt); + + /* 11: GetLastError */ + jdwpTransportError (JNICALL *GetLastError)(jdwpTransportEnv* env, + char** error); + + /* 12: SetTransportConfiguration added in JDWPTRANSPORT_VERSION_1_1 */ + jdwpTransportError (JNICALL *SetTransportConfiguration)(jdwpTransportEnv* env, + jdwpTransportConfiguration *config); +}; + + +/* + * Use inlined functions so that C++ code can use syntax such as + * env->Attach("mymachine:5000", 10*1000, 0); + * + * rather than using C's :- + * + * (*env)->Attach(env, "mymachine:5000", 10*1000, 0); + */ +struct _jdwpTransportEnv { + const struct jdwpTransportNativeInterface_ *functions; +#ifdef __cplusplus + + jdwpTransportError GetCapabilities(JDWPTransportCapabilities *capabilities_ptr) { + return functions->GetCapabilities(this, capabilities_ptr); + } + + jdwpTransportError Attach(const char* address, jlong attach_timeout, + jlong handshake_timeout) { + return functions->Attach(this, address, attach_timeout, handshake_timeout); + } + + jdwpTransportError StartListening(const char* address, + char** actual_address) { + return functions->StartListening(this, address, actual_address); + } + + jdwpTransportError StopListening(void) { + return functions->StopListening(this); + } + + jdwpTransportError Accept(jlong accept_timeout, jlong handshake_timeout) { + return functions->Accept(this, accept_timeout, handshake_timeout); + } + + jboolean IsOpen(void) { + return functions->IsOpen(this); + } + + jdwpTransportError Close(void) { + return functions->Close(this); + } + + jdwpTransportError ReadPacket(jdwpPacket *pkt) { + return functions->ReadPacket(this, pkt); + } + + jdwpTransportError WritePacket(const jdwpPacket* pkt) { + return functions->WritePacket(this, pkt); + } + + jdwpTransportError GetLastError(char** error) { + return functions->GetLastError(this, error); + } + + /* SetTransportConfiguration added in JDWPTRANSPORT_VERSION_1_1 */ + jdwpTransportError SetTransportConfiguration(jdwpTransportConfiguration *config) { + return functions->SetTransportConfiguration(this, config); + } + +#endif /* __cplusplus */ +}; + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* JDWPTRANSPORT_H */ diff --git a/java21/include/jni.h b/java21/include/jni.h new file mode 100644 index 0000000000000000000000000000000000000000..c85da1bc67f2e86f6d86644bf28511c1a4b6adc1 --- /dev/null +++ b/java21/include/jni.h @@ -0,0 +1,2001 @@ +/* + * Copyright (c) 1996, 2023, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * We used part of Netscape's Java Runtime Interface (JRI) as the starting + * point of our design and implementation. + */ + +/****************************************************************************** + * Java Runtime Interface + * Copyright (c) 1996 Netscape Communications Corporation. All rights reserved. + *****************************************************************************/ + +#ifndef _JAVASOFT_JNI_H_ +#define _JAVASOFT_JNI_H_ + +#include +#include + +/* jni_md.h contains the machine-dependent typedefs for jbyte, jint + and jlong */ + +#include "jni_md.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * JNI Types + */ + +#ifndef JNI_TYPES_ALREADY_DEFINED_IN_JNI_MD_H + +typedef unsigned char jboolean; +typedef unsigned short jchar; +typedef short jshort; +typedef float jfloat; +typedef double jdouble; + +typedef jint jsize; + +#ifdef __cplusplus + +class _jobject {}; +class _jclass : public _jobject {}; +class _jthrowable : public _jobject {}; +class _jstring : public _jobject {}; +class _jarray : public _jobject {}; +class _jbooleanArray : public _jarray {}; +class _jbyteArray : public _jarray {}; +class _jcharArray : public _jarray {}; +class _jshortArray : public _jarray {}; +class _jintArray : public _jarray {}; +class _jlongArray : public _jarray {}; +class _jfloatArray : public _jarray {}; +class _jdoubleArray : public _jarray {}; +class _jobjectArray : public _jarray {}; + +typedef _jobject *jobject; +typedef _jclass *jclass; +typedef _jthrowable *jthrowable; +typedef _jstring *jstring; +typedef _jarray *jarray; +typedef _jbooleanArray *jbooleanArray; +typedef _jbyteArray *jbyteArray; +typedef _jcharArray *jcharArray; +typedef _jshortArray *jshortArray; +typedef _jintArray *jintArray; +typedef _jlongArray *jlongArray; +typedef _jfloatArray *jfloatArray; +typedef _jdoubleArray *jdoubleArray; +typedef _jobjectArray *jobjectArray; + +#else + +struct _jobject; + +typedef struct _jobject *jobject; +typedef jobject jclass; +typedef jobject jthrowable; +typedef jobject jstring; +typedef jobject jarray; +typedef jarray jbooleanArray; +typedef jarray jbyteArray; +typedef jarray jcharArray; +typedef jarray jshortArray; +typedef jarray jintArray; +typedef jarray jlongArray; +typedef jarray jfloatArray; +typedef jarray jdoubleArray; +typedef jarray jobjectArray; + +#endif + +typedef jobject jweak; + +typedef union jvalue { + jboolean z; + jbyte b; + jchar c; + jshort s; + jint i; + jlong j; + jfloat f; + jdouble d; + jobject l; +} jvalue; + +struct _jfieldID; +typedef struct _jfieldID *jfieldID; + +struct _jmethodID; +typedef struct _jmethodID *jmethodID; + +/* Return values from jobjectRefType */ +typedef enum _jobjectType { + JNIInvalidRefType = 0, + JNILocalRefType = 1, + JNIGlobalRefType = 2, + JNIWeakGlobalRefType = 3 +} jobjectRefType; + + +#endif /* JNI_TYPES_ALREADY_DEFINED_IN_JNI_MD_H */ + +/* + * jboolean constants + */ + +#define JNI_FALSE 0 +#define JNI_TRUE 1 + +/* + * possible return values for JNI functions. + */ + +#define JNI_OK 0 /* success */ +#define JNI_ERR (-1) /* unknown error */ +#define JNI_EDETACHED (-2) /* thread detached from the VM */ +#define JNI_EVERSION (-3) /* JNI version error */ +#define JNI_ENOMEM (-4) /* not enough memory */ +#define JNI_EEXIST (-5) /* VM already created */ +#define JNI_EINVAL (-6) /* invalid arguments */ + +/* + * used in ReleaseScalarArrayElements + */ + +#define JNI_COMMIT 1 +#define JNI_ABORT 2 + +/* + * used in RegisterNatives to describe native method name, signature, + * and function pointer. + */ + +typedef struct { + char *name; + char *signature; + void *fnPtr; +} JNINativeMethod; + +/* + * JNI Native Method Interface. + */ + +struct JNINativeInterface_; + +struct JNIEnv_; + +#ifdef __cplusplus +typedef JNIEnv_ JNIEnv; +#else +typedef const struct JNINativeInterface_ *JNIEnv; +#endif + +/* + * JNI Invocation Interface. + */ + +struct JNIInvokeInterface_; + +struct JavaVM_; + +#ifdef __cplusplus +typedef JavaVM_ JavaVM; +#else +typedef const struct JNIInvokeInterface_ *JavaVM; +#endif + +struct JNINativeInterface_ { + void *reserved0; + void *reserved1; + void *reserved2; + + void *reserved3; + jint (JNICALL *GetVersion)(JNIEnv *env); + + jclass (JNICALL *DefineClass) + (JNIEnv *env, const char *name, jobject loader, const jbyte *buf, + jsize len); + jclass (JNICALL *FindClass) + (JNIEnv *env, const char *name); + + jmethodID (JNICALL *FromReflectedMethod) + (JNIEnv *env, jobject method); + jfieldID (JNICALL *FromReflectedField) + (JNIEnv *env, jobject field); + + jobject (JNICALL *ToReflectedMethod) + (JNIEnv *env, jclass cls, jmethodID methodID, jboolean isStatic); + + jclass (JNICALL *GetSuperclass) + (JNIEnv *env, jclass sub); + jboolean (JNICALL *IsAssignableFrom) + (JNIEnv *env, jclass sub, jclass sup); + + jobject (JNICALL *ToReflectedField) + (JNIEnv *env, jclass cls, jfieldID fieldID, jboolean isStatic); + + jint (JNICALL *Throw) + (JNIEnv *env, jthrowable obj); + jint (JNICALL *ThrowNew) + (JNIEnv *env, jclass clazz, const char *msg); + jthrowable (JNICALL *ExceptionOccurred) + (JNIEnv *env); + void (JNICALL *ExceptionDescribe) + (JNIEnv *env); + void (JNICALL *ExceptionClear) + (JNIEnv *env); + void (JNICALL *FatalError) + (JNIEnv *env, const char *msg); + + jint (JNICALL *PushLocalFrame) + (JNIEnv *env, jint capacity); + jobject (JNICALL *PopLocalFrame) + (JNIEnv *env, jobject result); + + jobject (JNICALL *NewGlobalRef) + (JNIEnv *env, jobject lobj); + void (JNICALL *DeleteGlobalRef) + (JNIEnv *env, jobject gref); + void (JNICALL *DeleteLocalRef) + (JNIEnv *env, jobject obj); + jboolean (JNICALL *IsSameObject) + (JNIEnv *env, jobject obj1, jobject obj2); + jobject (JNICALL *NewLocalRef) + (JNIEnv *env, jobject ref); + jint (JNICALL *EnsureLocalCapacity) + (JNIEnv *env, jint capacity); + + jobject (JNICALL *AllocObject) + (JNIEnv *env, jclass clazz); + jobject (JNICALL *NewObject) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jobject (JNICALL *NewObjectV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jobject (JNICALL *NewObjectA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jclass (JNICALL *GetObjectClass) + (JNIEnv *env, jobject obj); + jboolean (JNICALL *IsInstanceOf) + (JNIEnv *env, jobject obj, jclass clazz); + + jmethodID (JNICALL *GetMethodID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + + jobject (JNICALL *CallObjectMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jobject (JNICALL *CallObjectMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jobject (JNICALL *CallObjectMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue * args); + + jboolean (JNICALL *CallBooleanMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jboolean (JNICALL *CallBooleanMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jboolean (JNICALL *CallBooleanMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue * args); + + jbyte (JNICALL *CallByteMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jbyte (JNICALL *CallByteMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jbyte (JNICALL *CallByteMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jchar (JNICALL *CallCharMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jchar (JNICALL *CallCharMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jchar (JNICALL *CallCharMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jshort (JNICALL *CallShortMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jshort (JNICALL *CallShortMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jshort (JNICALL *CallShortMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jint (JNICALL *CallIntMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jint (JNICALL *CallIntMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jint (JNICALL *CallIntMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jlong (JNICALL *CallLongMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jlong (JNICALL *CallLongMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jlong (JNICALL *CallLongMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jfloat (JNICALL *CallFloatMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jfloat (JNICALL *CallFloatMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jfloat (JNICALL *CallFloatMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + jdouble (JNICALL *CallDoubleMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + jdouble (JNICALL *CallDoubleMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + jdouble (JNICALL *CallDoubleMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue *args); + + void (JNICALL *CallVoidMethod) + (JNIEnv *env, jobject obj, jmethodID methodID, ...); + void (JNICALL *CallVoidMethodV) + (JNIEnv *env, jobject obj, jmethodID methodID, va_list args); + void (JNICALL *CallVoidMethodA) + (JNIEnv *env, jobject obj, jmethodID methodID, const jvalue * args); + + jobject (JNICALL *CallNonvirtualObjectMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jobject (JNICALL *CallNonvirtualObjectMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jobject (JNICALL *CallNonvirtualObjectMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue * args); + + jboolean (JNICALL *CallNonvirtualBooleanMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jboolean (JNICALL *CallNonvirtualBooleanMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jboolean (JNICALL *CallNonvirtualBooleanMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue * args); + + jbyte (JNICALL *CallNonvirtualByteMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jbyte (JNICALL *CallNonvirtualByteMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jbyte (JNICALL *CallNonvirtualByteMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jchar (JNICALL *CallNonvirtualCharMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jchar (JNICALL *CallNonvirtualCharMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jchar (JNICALL *CallNonvirtualCharMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jshort (JNICALL *CallNonvirtualShortMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jshort (JNICALL *CallNonvirtualShortMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jshort (JNICALL *CallNonvirtualShortMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jint (JNICALL *CallNonvirtualIntMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jint (JNICALL *CallNonvirtualIntMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jint (JNICALL *CallNonvirtualIntMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jlong (JNICALL *CallNonvirtualLongMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jlong (JNICALL *CallNonvirtualLongMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jlong (JNICALL *CallNonvirtualLongMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jfloat (JNICALL *CallNonvirtualFloatMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jfloat (JNICALL *CallNonvirtualFloatMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jfloat (JNICALL *CallNonvirtualFloatMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + jdouble (JNICALL *CallNonvirtualDoubleMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + jdouble (JNICALL *CallNonvirtualDoubleMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + jdouble (JNICALL *CallNonvirtualDoubleMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue *args); + + void (JNICALL *CallNonvirtualVoidMethod) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, ...); + void (JNICALL *CallNonvirtualVoidMethodV) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + va_list args); + void (JNICALL *CallNonvirtualVoidMethodA) + (JNIEnv *env, jobject obj, jclass clazz, jmethodID methodID, + const jvalue * args); + + jfieldID (JNICALL *GetFieldID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + + jobject (JNICALL *GetObjectField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jboolean (JNICALL *GetBooleanField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jbyte (JNICALL *GetByteField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jchar (JNICALL *GetCharField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jshort (JNICALL *GetShortField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jint (JNICALL *GetIntField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jlong (JNICALL *GetLongField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jfloat (JNICALL *GetFloatField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + jdouble (JNICALL *GetDoubleField) + (JNIEnv *env, jobject obj, jfieldID fieldID); + + void (JNICALL *SetObjectField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jobject val); + void (JNICALL *SetBooleanField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jboolean val); + void (JNICALL *SetByteField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jbyte val); + void (JNICALL *SetCharField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jchar val); + void (JNICALL *SetShortField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jshort val); + void (JNICALL *SetIntField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jint val); + void (JNICALL *SetLongField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jlong val); + void (JNICALL *SetFloatField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jfloat val); + void (JNICALL *SetDoubleField) + (JNIEnv *env, jobject obj, jfieldID fieldID, jdouble val); + + jmethodID (JNICALL *GetStaticMethodID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + + jobject (JNICALL *CallStaticObjectMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jobject (JNICALL *CallStaticObjectMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jobject (JNICALL *CallStaticObjectMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jboolean (JNICALL *CallStaticBooleanMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jboolean (JNICALL *CallStaticBooleanMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jboolean (JNICALL *CallStaticBooleanMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jbyte (JNICALL *CallStaticByteMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jbyte (JNICALL *CallStaticByteMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jbyte (JNICALL *CallStaticByteMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jchar (JNICALL *CallStaticCharMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jchar (JNICALL *CallStaticCharMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jchar (JNICALL *CallStaticCharMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jshort (JNICALL *CallStaticShortMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jshort (JNICALL *CallStaticShortMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jshort (JNICALL *CallStaticShortMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jint (JNICALL *CallStaticIntMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jint (JNICALL *CallStaticIntMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jint (JNICALL *CallStaticIntMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jlong (JNICALL *CallStaticLongMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jlong (JNICALL *CallStaticLongMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jlong (JNICALL *CallStaticLongMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jfloat (JNICALL *CallStaticFloatMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jfloat (JNICALL *CallStaticFloatMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jfloat (JNICALL *CallStaticFloatMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + jdouble (JNICALL *CallStaticDoubleMethod) + (JNIEnv *env, jclass clazz, jmethodID methodID, ...); + jdouble (JNICALL *CallStaticDoubleMethodV) + (JNIEnv *env, jclass clazz, jmethodID methodID, va_list args); + jdouble (JNICALL *CallStaticDoubleMethodA) + (JNIEnv *env, jclass clazz, jmethodID methodID, const jvalue *args); + + void (JNICALL *CallStaticVoidMethod) + (JNIEnv *env, jclass cls, jmethodID methodID, ...); + void (JNICALL *CallStaticVoidMethodV) + (JNIEnv *env, jclass cls, jmethodID methodID, va_list args); + void (JNICALL *CallStaticVoidMethodA) + (JNIEnv *env, jclass cls, jmethodID methodID, const jvalue * args); + + jfieldID (JNICALL *GetStaticFieldID) + (JNIEnv *env, jclass clazz, const char *name, const char *sig); + jobject (JNICALL *GetStaticObjectField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jboolean (JNICALL *GetStaticBooleanField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jbyte (JNICALL *GetStaticByteField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jchar (JNICALL *GetStaticCharField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jshort (JNICALL *GetStaticShortField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jint (JNICALL *GetStaticIntField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jlong (JNICALL *GetStaticLongField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jfloat (JNICALL *GetStaticFloatField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + jdouble (JNICALL *GetStaticDoubleField) + (JNIEnv *env, jclass clazz, jfieldID fieldID); + + void (JNICALL *SetStaticObjectField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jobject value); + void (JNICALL *SetStaticBooleanField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jboolean value); + void (JNICALL *SetStaticByteField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jbyte value); + void (JNICALL *SetStaticCharField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jchar value); + void (JNICALL *SetStaticShortField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jshort value); + void (JNICALL *SetStaticIntField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jint value); + void (JNICALL *SetStaticLongField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jlong value); + void (JNICALL *SetStaticFloatField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jfloat value); + void (JNICALL *SetStaticDoubleField) + (JNIEnv *env, jclass clazz, jfieldID fieldID, jdouble value); + + jstring (JNICALL *NewString) + (JNIEnv *env, const jchar *unicode, jsize len); + jsize (JNICALL *GetStringLength) + (JNIEnv *env, jstring str); + const jchar *(JNICALL *GetStringChars) + (JNIEnv *env, jstring str, jboolean *isCopy); + void (JNICALL *ReleaseStringChars) + (JNIEnv *env, jstring str, const jchar *chars); + + jstring (JNICALL *NewStringUTF) + (JNIEnv *env, const char *utf); + jsize (JNICALL *GetStringUTFLength) + (JNIEnv *env, jstring str); + const char* (JNICALL *GetStringUTFChars) + (JNIEnv *env, jstring str, jboolean *isCopy); + void (JNICALL *ReleaseStringUTFChars) + (JNIEnv *env, jstring str, const char* chars); + + + jsize (JNICALL *GetArrayLength) + (JNIEnv *env, jarray array); + + jobjectArray (JNICALL *NewObjectArray) + (JNIEnv *env, jsize len, jclass clazz, jobject init); + jobject (JNICALL *GetObjectArrayElement) + (JNIEnv *env, jobjectArray array, jsize index); + void (JNICALL *SetObjectArrayElement) + (JNIEnv *env, jobjectArray array, jsize index, jobject val); + + jbooleanArray (JNICALL *NewBooleanArray) + (JNIEnv *env, jsize len); + jbyteArray (JNICALL *NewByteArray) + (JNIEnv *env, jsize len); + jcharArray (JNICALL *NewCharArray) + (JNIEnv *env, jsize len); + jshortArray (JNICALL *NewShortArray) + (JNIEnv *env, jsize len); + jintArray (JNICALL *NewIntArray) + (JNIEnv *env, jsize len); + jlongArray (JNICALL *NewLongArray) + (JNIEnv *env, jsize len); + jfloatArray (JNICALL *NewFloatArray) + (JNIEnv *env, jsize len); + jdoubleArray (JNICALL *NewDoubleArray) + (JNIEnv *env, jsize len); + + jboolean * (JNICALL *GetBooleanArrayElements) + (JNIEnv *env, jbooleanArray array, jboolean *isCopy); + jbyte * (JNICALL *GetByteArrayElements) + (JNIEnv *env, jbyteArray array, jboolean *isCopy); + jchar * (JNICALL *GetCharArrayElements) + (JNIEnv *env, jcharArray array, jboolean *isCopy); + jshort * (JNICALL *GetShortArrayElements) + (JNIEnv *env, jshortArray array, jboolean *isCopy); + jint * (JNICALL *GetIntArrayElements) + (JNIEnv *env, jintArray array, jboolean *isCopy); + jlong * (JNICALL *GetLongArrayElements) + (JNIEnv *env, jlongArray array, jboolean *isCopy); + jfloat * (JNICALL *GetFloatArrayElements) + (JNIEnv *env, jfloatArray array, jboolean *isCopy); + jdouble * (JNICALL *GetDoubleArrayElements) + (JNIEnv *env, jdoubleArray array, jboolean *isCopy); + + void (JNICALL *ReleaseBooleanArrayElements) + (JNIEnv *env, jbooleanArray array, jboolean *elems, jint mode); + void (JNICALL *ReleaseByteArrayElements) + (JNIEnv *env, jbyteArray array, jbyte *elems, jint mode); + void (JNICALL *ReleaseCharArrayElements) + (JNIEnv *env, jcharArray array, jchar *elems, jint mode); + void (JNICALL *ReleaseShortArrayElements) + (JNIEnv *env, jshortArray array, jshort *elems, jint mode); + void (JNICALL *ReleaseIntArrayElements) + (JNIEnv *env, jintArray array, jint *elems, jint mode); + void (JNICALL *ReleaseLongArrayElements) + (JNIEnv *env, jlongArray array, jlong *elems, jint mode); + void (JNICALL *ReleaseFloatArrayElements) + (JNIEnv *env, jfloatArray array, jfloat *elems, jint mode); + void (JNICALL *ReleaseDoubleArrayElements) + (JNIEnv *env, jdoubleArray array, jdouble *elems, jint mode); + + void (JNICALL *GetBooleanArrayRegion) + (JNIEnv *env, jbooleanArray array, jsize start, jsize l, jboolean *buf); + void (JNICALL *GetByteArrayRegion) + (JNIEnv *env, jbyteArray array, jsize start, jsize len, jbyte *buf); + void (JNICALL *GetCharArrayRegion) + (JNIEnv *env, jcharArray array, jsize start, jsize len, jchar *buf); + void (JNICALL *GetShortArrayRegion) + (JNIEnv *env, jshortArray array, jsize start, jsize len, jshort *buf); + void (JNICALL *GetIntArrayRegion) + (JNIEnv *env, jintArray array, jsize start, jsize len, jint *buf); + void (JNICALL *GetLongArrayRegion) + (JNIEnv *env, jlongArray array, jsize start, jsize len, jlong *buf); + void (JNICALL *GetFloatArrayRegion) + (JNIEnv *env, jfloatArray array, jsize start, jsize len, jfloat *buf); + void (JNICALL *GetDoubleArrayRegion) + (JNIEnv *env, jdoubleArray array, jsize start, jsize len, jdouble *buf); + + void (JNICALL *SetBooleanArrayRegion) + (JNIEnv *env, jbooleanArray array, jsize start, jsize l, const jboolean *buf); + void (JNICALL *SetByteArrayRegion) + (JNIEnv *env, jbyteArray array, jsize start, jsize len, const jbyte *buf); + void (JNICALL *SetCharArrayRegion) + (JNIEnv *env, jcharArray array, jsize start, jsize len, const jchar *buf); + void (JNICALL *SetShortArrayRegion) + (JNIEnv *env, jshortArray array, jsize start, jsize len, const jshort *buf); + void (JNICALL *SetIntArrayRegion) + (JNIEnv *env, jintArray array, jsize start, jsize len, const jint *buf); + void (JNICALL *SetLongArrayRegion) + (JNIEnv *env, jlongArray array, jsize start, jsize len, const jlong *buf); + void (JNICALL *SetFloatArrayRegion) + (JNIEnv *env, jfloatArray array, jsize start, jsize len, const jfloat *buf); + void (JNICALL *SetDoubleArrayRegion) + (JNIEnv *env, jdoubleArray array, jsize start, jsize len, const jdouble *buf); + + jint (JNICALL *RegisterNatives) + (JNIEnv *env, jclass clazz, const JNINativeMethod *methods, + jint nMethods); + jint (JNICALL *UnregisterNatives) + (JNIEnv *env, jclass clazz); + + jint (JNICALL *MonitorEnter) + (JNIEnv *env, jobject obj); + jint (JNICALL *MonitorExit) + (JNIEnv *env, jobject obj); + + jint (JNICALL *GetJavaVM) + (JNIEnv *env, JavaVM **vm); + + void (JNICALL *GetStringRegion) + (JNIEnv *env, jstring str, jsize start, jsize len, jchar *buf); + void (JNICALL *GetStringUTFRegion) + (JNIEnv *env, jstring str, jsize start, jsize len, char *buf); + + void * (JNICALL *GetPrimitiveArrayCritical) + (JNIEnv *env, jarray array, jboolean *isCopy); + void (JNICALL *ReleasePrimitiveArrayCritical) + (JNIEnv *env, jarray array, void *carray, jint mode); + + const jchar * (JNICALL *GetStringCritical) + (JNIEnv *env, jstring string, jboolean *isCopy); + void (JNICALL *ReleaseStringCritical) + (JNIEnv *env, jstring string, const jchar *cstring); + + jweak (JNICALL *NewWeakGlobalRef) + (JNIEnv *env, jobject obj); + void (JNICALL *DeleteWeakGlobalRef) + (JNIEnv *env, jweak ref); + + jboolean (JNICALL *ExceptionCheck) + (JNIEnv *env); + + jobject (JNICALL *NewDirectByteBuffer) + (JNIEnv* env, void* address, jlong capacity); + void* (JNICALL *GetDirectBufferAddress) + (JNIEnv* env, jobject buf); + jlong (JNICALL *GetDirectBufferCapacity) + (JNIEnv* env, jobject buf); + + /* New JNI 1.6 Features */ + + jobjectRefType (JNICALL *GetObjectRefType) + (JNIEnv* env, jobject obj); + + /* Module Features */ + + jobject (JNICALL *GetModule) + (JNIEnv* env, jclass clazz); + + /* Virtual threads */ + + jboolean (JNICALL *IsVirtualThread) + (JNIEnv* env, jobject obj); +}; + +/* + * We use inlined functions for C++ so that programmers can write: + * + * env->FindClass("java/lang/String") + * + * in C++ rather than: + * + * (*env)->FindClass(env, "java/lang/String") + * + * in C. + */ + +struct JNIEnv_ { + const struct JNINativeInterface_ *functions; +#ifdef __cplusplus + + jint GetVersion() { + return functions->GetVersion(this); + } + jclass DefineClass(const char *name, jobject loader, const jbyte *buf, + jsize len) { + return functions->DefineClass(this, name, loader, buf, len); + } + jclass FindClass(const char *name) { + return functions->FindClass(this, name); + } + jmethodID FromReflectedMethod(jobject method) { + return functions->FromReflectedMethod(this,method); + } + jfieldID FromReflectedField(jobject field) { + return functions->FromReflectedField(this,field); + } + + jobject ToReflectedMethod(jclass cls, jmethodID methodID, jboolean isStatic) { + return functions->ToReflectedMethod(this, cls, methodID, isStatic); + } + + jclass GetSuperclass(jclass sub) { + return functions->GetSuperclass(this, sub); + } + jboolean IsAssignableFrom(jclass sub, jclass sup) { + return functions->IsAssignableFrom(this, sub, sup); + } + + jobject ToReflectedField(jclass cls, jfieldID fieldID, jboolean isStatic) { + return functions->ToReflectedField(this,cls,fieldID,isStatic); + } + + jint Throw(jthrowable obj) { + return functions->Throw(this, obj); + } + jint ThrowNew(jclass clazz, const char *msg) { + return functions->ThrowNew(this, clazz, msg); + } + jthrowable ExceptionOccurred() { + return functions->ExceptionOccurred(this); + } + void ExceptionDescribe() { + functions->ExceptionDescribe(this); + } + void ExceptionClear() { + functions->ExceptionClear(this); + } + void FatalError(const char *msg) { + functions->FatalError(this, msg); + } + + jint PushLocalFrame(jint capacity) { + return functions->PushLocalFrame(this,capacity); + } + jobject PopLocalFrame(jobject result) { + return functions->PopLocalFrame(this,result); + } + + jobject NewGlobalRef(jobject lobj) { + return functions->NewGlobalRef(this,lobj); + } + void DeleteGlobalRef(jobject gref) { + functions->DeleteGlobalRef(this,gref); + } + void DeleteLocalRef(jobject obj) { + functions->DeleteLocalRef(this, obj); + } + + jboolean IsSameObject(jobject obj1, jobject obj2) { + return functions->IsSameObject(this,obj1,obj2); + } + + jobject NewLocalRef(jobject ref) { + return functions->NewLocalRef(this,ref); + } + jint EnsureLocalCapacity(jint capacity) { + return functions->EnsureLocalCapacity(this,capacity); + } + + jobject AllocObject(jclass clazz) { + return functions->AllocObject(this,clazz); + } + jobject NewObject(jclass clazz, jmethodID methodID, ...) { + va_list args; + jobject result; + va_start(args, methodID); + result = functions->NewObjectV(this,clazz,methodID,args); + va_end(args); + return result; + } + jobject NewObjectV(jclass clazz, jmethodID methodID, + va_list args) { + return functions->NewObjectV(this,clazz,methodID,args); + } + jobject NewObjectA(jclass clazz, jmethodID methodID, + const jvalue *args) { + return functions->NewObjectA(this,clazz,methodID,args); + } + + jclass GetObjectClass(jobject obj) { + return functions->GetObjectClass(this,obj); + } + jboolean IsInstanceOf(jobject obj, jclass clazz) { + return functions->IsInstanceOf(this,obj,clazz); + } + + jmethodID GetMethodID(jclass clazz, const char *name, + const char *sig) { + return functions->GetMethodID(this,clazz,name,sig); + } + + jobject CallObjectMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jobject result; + va_start(args,methodID); + result = functions->CallObjectMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jobject CallObjectMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallObjectMethodV(this,obj,methodID,args); + } + jobject CallObjectMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallObjectMethodA(this,obj,methodID,args); + } + + jboolean CallBooleanMethod(jobject obj, + jmethodID methodID, ...) { + va_list args; + jboolean result; + va_start(args,methodID); + result = functions->CallBooleanMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jboolean CallBooleanMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallBooleanMethodV(this,obj,methodID,args); + } + jboolean CallBooleanMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallBooleanMethodA(this,obj,methodID, args); + } + + jbyte CallByteMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jbyte result; + va_start(args,methodID); + result = functions->CallByteMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jbyte CallByteMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallByteMethodV(this,obj,methodID,args); + } + jbyte CallByteMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallByteMethodA(this,obj,methodID,args); + } + + jchar CallCharMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jchar result; + va_start(args,methodID); + result = functions->CallCharMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jchar CallCharMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallCharMethodV(this,obj,methodID,args); + } + jchar CallCharMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallCharMethodA(this,obj,methodID,args); + } + + jshort CallShortMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jshort result; + va_start(args,methodID); + result = functions->CallShortMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jshort CallShortMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallShortMethodV(this,obj,methodID,args); + } + jshort CallShortMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallShortMethodA(this,obj,methodID,args); + } + + jint CallIntMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jint result; + va_start(args,methodID); + result = functions->CallIntMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jint CallIntMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallIntMethodV(this,obj,methodID,args); + } + jint CallIntMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallIntMethodA(this,obj,methodID,args); + } + + jlong CallLongMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jlong result; + va_start(args,methodID); + result = functions->CallLongMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jlong CallLongMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallLongMethodV(this,obj,methodID,args); + } + jlong CallLongMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallLongMethodA(this,obj,methodID,args); + } + + jfloat CallFloatMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jfloat result; + va_start(args,methodID); + result = functions->CallFloatMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jfloat CallFloatMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallFloatMethodV(this,obj,methodID,args); + } + jfloat CallFloatMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallFloatMethodA(this,obj,methodID,args); + } + + jdouble CallDoubleMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + jdouble result; + va_start(args,methodID); + result = functions->CallDoubleMethodV(this,obj,methodID,args); + va_end(args); + return result; + } + jdouble CallDoubleMethodV(jobject obj, jmethodID methodID, + va_list args) { + return functions->CallDoubleMethodV(this,obj,methodID,args); + } + jdouble CallDoubleMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + return functions->CallDoubleMethodA(this,obj,methodID,args); + } + + void CallVoidMethod(jobject obj, jmethodID methodID, ...) { + va_list args; + va_start(args,methodID); + functions->CallVoidMethodV(this,obj,methodID,args); + va_end(args); + } + void CallVoidMethodV(jobject obj, jmethodID methodID, + va_list args) { + functions->CallVoidMethodV(this,obj,methodID,args); + } + void CallVoidMethodA(jobject obj, jmethodID methodID, + const jvalue * args) { + functions->CallVoidMethodA(this,obj,methodID,args); + } + + jobject CallNonvirtualObjectMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jobject result; + va_start(args,methodID); + result = functions->CallNonvirtualObjectMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jobject CallNonvirtualObjectMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualObjectMethodV(this,obj,clazz, + methodID,args); + } + jobject CallNonvirtualObjectMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualObjectMethodA(this,obj,clazz, + methodID,args); + } + + jboolean CallNonvirtualBooleanMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jboolean result; + va_start(args,methodID); + result = functions->CallNonvirtualBooleanMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jboolean CallNonvirtualBooleanMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualBooleanMethodV(this,obj,clazz, + methodID,args); + } + jboolean CallNonvirtualBooleanMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualBooleanMethodA(this,obj,clazz, + methodID, args); + } + + jbyte CallNonvirtualByteMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jbyte result; + va_start(args,methodID); + result = functions->CallNonvirtualByteMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jbyte CallNonvirtualByteMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualByteMethodV(this,obj,clazz, + methodID,args); + } + jbyte CallNonvirtualByteMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualByteMethodA(this,obj,clazz, + methodID,args); + } + + jchar CallNonvirtualCharMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jchar result; + va_start(args,methodID); + result = functions->CallNonvirtualCharMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jchar CallNonvirtualCharMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualCharMethodV(this,obj,clazz, + methodID,args); + } + jchar CallNonvirtualCharMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualCharMethodA(this,obj,clazz, + methodID,args); + } + + jshort CallNonvirtualShortMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jshort result; + va_start(args,methodID); + result = functions->CallNonvirtualShortMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jshort CallNonvirtualShortMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualShortMethodV(this,obj,clazz, + methodID,args); + } + jshort CallNonvirtualShortMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualShortMethodA(this,obj,clazz, + methodID,args); + } + + jint CallNonvirtualIntMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jint result; + va_start(args,methodID); + result = functions->CallNonvirtualIntMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jint CallNonvirtualIntMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualIntMethodV(this,obj,clazz, + methodID,args); + } + jint CallNonvirtualIntMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualIntMethodA(this,obj,clazz, + methodID,args); + } + + jlong CallNonvirtualLongMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jlong result; + va_start(args,methodID); + result = functions->CallNonvirtualLongMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jlong CallNonvirtualLongMethodV(jobject obj, jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallNonvirtualLongMethodV(this,obj,clazz, + methodID,args); + } + jlong CallNonvirtualLongMethodA(jobject obj, jclass clazz, + jmethodID methodID, const jvalue * args) { + return functions->CallNonvirtualLongMethodA(this,obj,clazz, + methodID,args); + } + + jfloat CallNonvirtualFloatMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jfloat result; + va_start(args,methodID); + result = functions->CallNonvirtualFloatMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jfloat CallNonvirtualFloatMethodV(jobject obj, jclass clazz, + jmethodID methodID, + va_list args) { + return functions->CallNonvirtualFloatMethodV(this,obj,clazz, + methodID,args); + } + jfloat CallNonvirtualFloatMethodA(jobject obj, jclass clazz, + jmethodID methodID, + const jvalue * args) { + return functions->CallNonvirtualFloatMethodA(this,obj,clazz, + methodID,args); + } + + jdouble CallNonvirtualDoubleMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + jdouble result; + va_start(args,methodID); + result = functions->CallNonvirtualDoubleMethodV(this,obj,clazz, + methodID,args); + va_end(args); + return result; + } + jdouble CallNonvirtualDoubleMethodV(jobject obj, jclass clazz, + jmethodID methodID, + va_list args) { + return functions->CallNonvirtualDoubleMethodV(this,obj,clazz, + methodID,args); + } + jdouble CallNonvirtualDoubleMethodA(jobject obj, jclass clazz, + jmethodID methodID, + const jvalue * args) { + return functions->CallNonvirtualDoubleMethodA(this,obj,clazz, + methodID,args); + } + + void CallNonvirtualVoidMethod(jobject obj, jclass clazz, + jmethodID methodID, ...) { + va_list args; + va_start(args,methodID); + functions->CallNonvirtualVoidMethodV(this,obj,clazz,methodID,args); + va_end(args); + } + void CallNonvirtualVoidMethodV(jobject obj, jclass clazz, + jmethodID methodID, + va_list args) { + functions->CallNonvirtualVoidMethodV(this,obj,clazz,methodID,args); + } + void CallNonvirtualVoidMethodA(jobject obj, jclass clazz, + jmethodID methodID, + const jvalue * args) { + functions->CallNonvirtualVoidMethodA(this,obj,clazz,methodID,args); + } + + jfieldID GetFieldID(jclass clazz, const char *name, + const char *sig) { + return functions->GetFieldID(this,clazz,name,sig); + } + + jobject GetObjectField(jobject obj, jfieldID fieldID) { + return functions->GetObjectField(this,obj,fieldID); + } + jboolean GetBooleanField(jobject obj, jfieldID fieldID) { + return functions->GetBooleanField(this,obj,fieldID); + } + jbyte GetByteField(jobject obj, jfieldID fieldID) { + return functions->GetByteField(this,obj,fieldID); + } + jchar GetCharField(jobject obj, jfieldID fieldID) { + return functions->GetCharField(this,obj,fieldID); + } + jshort GetShortField(jobject obj, jfieldID fieldID) { + return functions->GetShortField(this,obj,fieldID); + } + jint GetIntField(jobject obj, jfieldID fieldID) { + return functions->GetIntField(this,obj,fieldID); + } + jlong GetLongField(jobject obj, jfieldID fieldID) { + return functions->GetLongField(this,obj,fieldID); + } + jfloat GetFloatField(jobject obj, jfieldID fieldID) { + return functions->GetFloatField(this,obj,fieldID); + } + jdouble GetDoubleField(jobject obj, jfieldID fieldID) { + return functions->GetDoubleField(this,obj,fieldID); + } + + void SetObjectField(jobject obj, jfieldID fieldID, jobject val) { + functions->SetObjectField(this,obj,fieldID,val); + } + void SetBooleanField(jobject obj, jfieldID fieldID, + jboolean val) { + functions->SetBooleanField(this,obj,fieldID,val); + } + void SetByteField(jobject obj, jfieldID fieldID, + jbyte val) { + functions->SetByteField(this,obj,fieldID,val); + } + void SetCharField(jobject obj, jfieldID fieldID, + jchar val) { + functions->SetCharField(this,obj,fieldID,val); + } + void SetShortField(jobject obj, jfieldID fieldID, + jshort val) { + functions->SetShortField(this,obj,fieldID,val); + } + void SetIntField(jobject obj, jfieldID fieldID, + jint val) { + functions->SetIntField(this,obj,fieldID,val); + } + void SetLongField(jobject obj, jfieldID fieldID, + jlong val) { + functions->SetLongField(this,obj,fieldID,val); + } + void SetFloatField(jobject obj, jfieldID fieldID, + jfloat val) { + functions->SetFloatField(this,obj,fieldID,val); + } + void SetDoubleField(jobject obj, jfieldID fieldID, + jdouble val) { + functions->SetDoubleField(this,obj,fieldID,val); + } + + jmethodID GetStaticMethodID(jclass clazz, const char *name, + const char *sig) { + return functions->GetStaticMethodID(this,clazz,name,sig); + } + + jobject CallStaticObjectMethod(jclass clazz, jmethodID methodID, + ...) { + va_list args; + jobject result; + va_start(args,methodID); + result = functions->CallStaticObjectMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jobject CallStaticObjectMethodV(jclass clazz, jmethodID methodID, + va_list args) { + return functions->CallStaticObjectMethodV(this,clazz,methodID,args); + } + jobject CallStaticObjectMethodA(jclass clazz, jmethodID methodID, + const jvalue *args) { + return functions->CallStaticObjectMethodA(this,clazz,methodID,args); + } + + jboolean CallStaticBooleanMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jboolean result; + va_start(args,methodID); + result = functions->CallStaticBooleanMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jboolean CallStaticBooleanMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticBooleanMethodV(this,clazz,methodID,args); + } + jboolean CallStaticBooleanMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticBooleanMethodA(this,clazz,methodID,args); + } + + jbyte CallStaticByteMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jbyte result; + va_start(args,methodID); + result = functions->CallStaticByteMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jbyte CallStaticByteMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticByteMethodV(this,clazz,methodID,args); + } + jbyte CallStaticByteMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticByteMethodA(this,clazz,methodID,args); + } + + jchar CallStaticCharMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jchar result; + va_start(args,methodID); + result = functions->CallStaticCharMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jchar CallStaticCharMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticCharMethodV(this,clazz,methodID,args); + } + jchar CallStaticCharMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticCharMethodA(this,clazz,methodID,args); + } + + jshort CallStaticShortMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jshort result; + va_start(args,methodID); + result = functions->CallStaticShortMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jshort CallStaticShortMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticShortMethodV(this,clazz,methodID,args); + } + jshort CallStaticShortMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticShortMethodA(this,clazz,methodID,args); + } + + jint CallStaticIntMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jint result; + va_start(args,methodID); + result = functions->CallStaticIntMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jint CallStaticIntMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticIntMethodV(this,clazz,methodID,args); + } + jint CallStaticIntMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticIntMethodA(this,clazz,methodID,args); + } + + jlong CallStaticLongMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jlong result; + va_start(args,methodID); + result = functions->CallStaticLongMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jlong CallStaticLongMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticLongMethodV(this,clazz,methodID,args); + } + jlong CallStaticLongMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticLongMethodA(this,clazz,methodID,args); + } + + jfloat CallStaticFloatMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jfloat result; + va_start(args,methodID); + result = functions->CallStaticFloatMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jfloat CallStaticFloatMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticFloatMethodV(this,clazz,methodID,args); + } + jfloat CallStaticFloatMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticFloatMethodA(this,clazz,methodID,args); + } + + jdouble CallStaticDoubleMethod(jclass clazz, + jmethodID methodID, ...) { + va_list args; + jdouble result; + va_start(args,methodID); + result = functions->CallStaticDoubleMethodV(this,clazz,methodID,args); + va_end(args); + return result; + } + jdouble CallStaticDoubleMethodV(jclass clazz, + jmethodID methodID, va_list args) { + return functions->CallStaticDoubleMethodV(this,clazz,methodID,args); + } + jdouble CallStaticDoubleMethodA(jclass clazz, + jmethodID methodID, const jvalue *args) { + return functions->CallStaticDoubleMethodA(this,clazz,methodID,args); + } + + void CallStaticVoidMethod(jclass cls, jmethodID methodID, ...) { + va_list args; + va_start(args,methodID); + functions->CallStaticVoidMethodV(this,cls,methodID,args); + va_end(args); + } + void CallStaticVoidMethodV(jclass cls, jmethodID methodID, + va_list args) { + functions->CallStaticVoidMethodV(this,cls,methodID,args); + } + void CallStaticVoidMethodA(jclass cls, jmethodID methodID, + const jvalue * args) { + functions->CallStaticVoidMethodA(this,cls,methodID,args); + } + + jfieldID GetStaticFieldID(jclass clazz, const char *name, + const char *sig) { + return functions->GetStaticFieldID(this,clazz,name,sig); + } + jobject GetStaticObjectField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticObjectField(this,clazz,fieldID); + } + jboolean GetStaticBooleanField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticBooleanField(this,clazz,fieldID); + } + jbyte GetStaticByteField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticByteField(this,clazz,fieldID); + } + jchar GetStaticCharField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticCharField(this,clazz,fieldID); + } + jshort GetStaticShortField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticShortField(this,clazz,fieldID); + } + jint GetStaticIntField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticIntField(this,clazz,fieldID); + } + jlong GetStaticLongField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticLongField(this,clazz,fieldID); + } + jfloat GetStaticFloatField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticFloatField(this,clazz,fieldID); + } + jdouble GetStaticDoubleField(jclass clazz, jfieldID fieldID) { + return functions->GetStaticDoubleField(this,clazz,fieldID); + } + + void SetStaticObjectField(jclass clazz, jfieldID fieldID, + jobject value) { + functions->SetStaticObjectField(this,clazz,fieldID,value); + } + void SetStaticBooleanField(jclass clazz, jfieldID fieldID, + jboolean value) { + functions->SetStaticBooleanField(this,clazz,fieldID,value); + } + void SetStaticByteField(jclass clazz, jfieldID fieldID, + jbyte value) { + functions->SetStaticByteField(this,clazz,fieldID,value); + } + void SetStaticCharField(jclass clazz, jfieldID fieldID, + jchar value) { + functions->SetStaticCharField(this,clazz,fieldID,value); + } + void SetStaticShortField(jclass clazz, jfieldID fieldID, + jshort value) { + functions->SetStaticShortField(this,clazz,fieldID,value); + } + void SetStaticIntField(jclass clazz, jfieldID fieldID, + jint value) { + functions->SetStaticIntField(this,clazz,fieldID,value); + } + void SetStaticLongField(jclass clazz, jfieldID fieldID, + jlong value) { + functions->SetStaticLongField(this,clazz,fieldID,value); + } + void SetStaticFloatField(jclass clazz, jfieldID fieldID, + jfloat value) { + functions->SetStaticFloatField(this,clazz,fieldID,value); + } + void SetStaticDoubleField(jclass clazz, jfieldID fieldID, + jdouble value) { + functions->SetStaticDoubleField(this,clazz,fieldID,value); + } + + jstring NewString(const jchar *unicode, jsize len) { + return functions->NewString(this,unicode,len); + } + jsize GetStringLength(jstring str) { + return functions->GetStringLength(this,str); + } + const jchar *GetStringChars(jstring str, jboolean *isCopy) { + return functions->GetStringChars(this,str,isCopy); + } + void ReleaseStringChars(jstring str, const jchar *chars) { + functions->ReleaseStringChars(this,str,chars); + } + + jstring NewStringUTF(const char *utf) { + return functions->NewStringUTF(this,utf); + } + jsize GetStringUTFLength(jstring str) { + return functions->GetStringUTFLength(this,str); + } + const char* GetStringUTFChars(jstring str, jboolean *isCopy) { + return functions->GetStringUTFChars(this,str,isCopy); + } + void ReleaseStringUTFChars(jstring str, const char* chars) { + functions->ReleaseStringUTFChars(this,str,chars); + } + + jsize GetArrayLength(jarray array) { + return functions->GetArrayLength(this,array); + } + + jobjectArray NewObjectArray(jsize len, jclass clazz, + jobject init) { + return functions->NewObjectArray(this,len,clazz,init); + } + jobject GetObjectArrayElement(jobjectArray array, jsize index) { + return functions->GetObjectArrayElement(this,array,index); + } + void SetObjectArrayElement(jobjectArray array, jsize index, + jobject val) { + functions->SetObjectArrayElement(this,array,index,val); + } + + jbooleanArray NewBooleanArray(jsize len) { + return functions->NewBooleanArray(this,len); + } + jbyteArray NewByteArray(jsize len) { + return functions->NewByteArray(this,len); + } + jcharArray NewCharArray(jsize len) { + return functions->NewCharArray(this,len); + } + jshortArray NewShortArray(jsize len) { + return functions->NewShortArray(this,len); + } + jintArray NewIntArray(jsize len) { + return functions->NewIntArray(this,len); + } + jlongArray NewLongArray(jsize len) { + return functions->NewLongArray(this,len); + } + jfloatArray NewFloatArray(jsize len) { + return functions->NewFloatArray(this,len); + } + jdoubleArray NewDoubleArray(jsize len) { + return functions->NewDoubleArray(this,len); + } + + jboolean * GetBooleanArrayElements(jbooleanArray array, jboolean *isCopy) { + return functions->GetBooleanArrayElements(this,array,isCopy); + } + jbyte * GetByteArrayElements(jbyteArray array, jboolean *isCopy) { + return functions->GetByteArrayElements(this,array,isCopy); + } + jchar * GetCharArrayElements(jcharArray array, jboolean *isCopy) { + return functions->GetCharArrayElements(this,array,isCopy); + } + jshort * GetShortArrayElements(jshortArray array, jboolean *isCopy) { + return functions->GetShortArrayElements(this,array,isCopy); + } + jint * GetIntArrayElements(jintArray array, jboolean *isCopy) { + return functions->GetIntArrayElements(this,array,isCopy); + } + jlong * GetLongArrayElements(jlongArray array, jboolean *isCopy) { + return functions->GetLongArrayElements(this,array,isCopy); + } + jfloat * GetFloatArrayElements(jfloatArray array, jboolean *isCopy) { + return functions->GetFloatArrayElements(this,array,isCopy); + } + jdouble * GetDoubleArrayElements(jdoubleArray array, jboolean *isCopy) { + return functions->GetDoubleArrayElements(this,array,isCopy); + } + + void ReleaseBooleanArrayElements(jbooleanArray array, + jboolean *elems, + jint mode) { + functions->ReleaseBooleanArrayElements(this,array,elems,mode); + } + void ReleaseByteArrayElements(jbyteArray array, + jbyte *elems, + jint mode) { + functions->ReleaseByteArrayElements(this,array,elems,mode); + } + void ReleaseCharArrayElements(jcharArray array, + jchar *elems, + jint mode) { + functions->ReleaseCharArrayElements(this,array,elems,mode); + } + void ReleaseShortArrayElements(jshortArray array, + jshort *elems, + jint mode) { + functions->ReleaseShortArrayElements(this,array,elems,mode); + } + void ReleaseIntArrayElements(jintArray array, + jint *elems, + jint mode) { + functions->ReleaseIntArrayElements(this,array,elems,mode); + } + void ReleaseLongArrayElements(jlongArray array, + jlong *elems, + jint mode) { + functions->ReleaseLongArrayElements(this,array,elems,mode); + } + void ReleaseFloatArrayElements(jfloatArray array, + jfloat *elems, + jint mode) { + functions->ReleaseFloatArrayElements(this,array,elems,mode); + } + void ReleaseDoubleArrayElements(jdoubleArray array, + jdouble *elems, + jint mode) { + functions->ReleaseDoubleArrayElements(this,array,elems,mode); + } + + void GetBooleanArrayRegion(jbooleanArray array, + jsize start, jsize len, jboolean *buf) { + functions->GetBooleanArrayRegion(this,array,start,len,buf); + } + void GetByteArrayRegion(jbyteArray array, + jsize start, jsize len, jbyte *buf) { + functions->GetByteArrayRegion(this,array,start,len,buf); + } + void GetCharArrayRegion(jcharArray array, + jsize start, jsize len, jchar *buf) { + functions->GetCharArrayRegion(this,array,start,len,buf); + } + void GetShortArrayRegion(jshortArray array, + jsize start, jsize len, jshort *buf) { + functions->GetShortArrayRegion(this,array,start,len,buf); + } + void GetIntArrayRegion(jintArray array, + jsize start, jsize len, jint *buf) { + functions->GetIntArrayRegion(this,array,start,len,buf); + } + void GetLongArrayRegion(jlongArray array, + jsize start, jsize len, jlong *buf) { + functions->GetLongArrayRegion(this,array,start,len,buf); + } + void GetFloatArrayRegion(jfloatArray array, + jsize start, jsize len, jfloat *buf) { + functions->GetFloatArrayRegion(this,array,start,len,buf); + } + void GetDoubleArrayRegion(jdoubleArray array, + jsize start, jsize len, jdouble *buf) { + functions->GetDoubleArrayRegion(this,array,start,len,buf); + } + + void SetBooleanArrayRegion(jbooleanArray array, jsize start, jsize len, + const jboolean *buf) { + functions->SetBooleanArrayRegion(this,array,start,len,buf); + } + void SetByteArrayRegion(jbyteArray array, jsize start, jsize len, + const jbyte *buf) { + functions->SetByteArrayRegion(this,array,start,len,buf); + } + void SetCharArrayRegion(jcharArray array, jsize start, jsize len, + const jchar *buf) { + functions->SetCharArrayRegion(this,array,start,len,buf); + } + void SetShortArrayRegion(jshortArray array, jsize start, jsize len, + const jshort *buf) { + functions->SetShortArrayRegion(this,array,start,len,buf); + } + void SetIntArrayRegion(jintArray array, jsize start, jsize len, + const jint *buf) { + functions->SetIntArrayRegion(this,array,start,len,buf); + } + void SetLongArrayRegion(jlongArray array, jsize start, jsize len, + const jlong *buf) { + functions->SetLongArrayRegion(this,array,start,len,buf); + } + void SetFloatArrayRegion(jfloatArray array, jsize start, jsize len, + const jfloat *buf) { + functions->SetFloatArrayRegion(this,array,start,len,buf); + } + void SetDoubleArrayRegion(jdoubleArray array, jsize start, jsize len, + const jdouble *buf) { + functions->SetDoubleArrayRegion(this,array,start,len,buf); + } + + jint RegisterNatives(jclass clazz, const JNINativeMethod *methods, + jint nMethods) { + return functions->RegisterNatives(this,clazz,methods,nMethods); + } + jint UnregisterNatives(jclass clazz) { + return functions->UnregisterNatives(this,clazz); + } + + jint MonitorEnter(jobject obj) { + return functions->MonitorEnter(this,obj); + } + jint MonitorExit(jobject obj) { + return functions->MonitorExit(this,obj); + } + + jint GetJavaVM(JavaVM **vm) { + return functions->GetJavaVM(this,vm); + } + + void GetStringRegion(jstring str, jsize start, jsize len, jchar *buf) { + functions->GetStringRegion(this,str,start,len,buf); + } + void GetStringUTFRegion(jstring str, jsize start, jsize len, char *buf) { + functions->GetStringUTFRegion(this,str,start,len,buf); + } + + void * GetPrimitiveArrayCritical(jarray array, jboolean *isCopy) { + return functions->GetPrimitiveArrayCritical(this,array,isCopy); + } + void ReleasePrimitiveArrayCritical(jarray array, void *carray, jint mode) { + functions->ReleasePrimitiveArrayCritical(this,array,carray,mode); + } + + const jchar * GetStringCritical(jstring string, jboolean *isCopy) { + return functions->GetStringCritical(this,string,isCopy); + } + void ReleaseStringCritical(jstring string, const jchar *cstring) { + functions->ReleaseStringCritical(this,string,cstring); + } + + jweak NewWeakGlobalRef(jobject obj) { + return functions->NewWeakGlobalRef(this,obj); + } + void DeleteWeakGlobalRef(jweak ref) { + functions->DeleteWeakGlobalRef(this,ref); + } + + jboolean ExceptionCheck() { + return functions->ExceptionCheck(this); + } + + jobject NewDirectByteBuffer(void* address, jlong capacity) { + return functions->NewDirectByteBuffer(this, address, capacity); + } + void* GetDirectBufferAddress(jobject buf) { + return functions->GetDirectBufferAddress(this, buf); + } + jlong GetDirectBufferCapacity(jobject buf) { + return functions->GetDirectBufferCapacity(this, buf); + } + jobjectRefType GetObjectRefType(jobject obj) { + return functions->GetObjectRefType(this, obj); + } + + /* Module Features */ + + jobject GetModule(jclass clazz) { + return functions->GetModule(this, clazz); + } + + /* Virtual threads */ + + jboolean IsVirtualThread(jobject obj) { + return functions->IsVirtualThread(this, obj); + } + +#endif /* __cplusplus */ +}; + +/* + * optionString may be any option accepted by the JVM, or one of the + * following: + * + * -D= Set a system property. + * -verbose[:class|gc|jni] Enable verbose output, comma-separated. E.g. + * "-verbose:class" or "-verbose:gc,class" + * Standard names include: gc, class, and jni. + * All nonstandard (VM-specific) names must begin + * with "X". + * vfprintf extraInfo is a pointer to the vfprintf hook. + * exit extraInfo is a pointer to the exit hook. + * abort extraInfo is a pointer to the abort hook. + */ +typedef struct JavaVMOption { + char *optionString; + void *extraInfo; +} JavaVMOption; + +typedef struct JavaVMInitArgs { + jint version; + + jint nOptions; + JavaVMOption *options; + jboolean ignoreUnrecognized; +} JavaVMInitArgs; + +typedef struct JavaVMAttachArgs { + jint version; + + char *name; + jobject group; +} JavaVMAttachArgs; + +/* These will be VM-specific. */ + +#define JDK1_2 +#define JDK1_4 + +/* End VM-specific. */ + +struct JNIInvokeInterface_ { + void *reserved0; + void *reserved1; + void *reserved2; + + jint (JNICALL *DestroyJavaVM)(JavaVM *vm); + + jint (JNICALL *AttachCurrentThread)(JavaVM *vm, void **penv, void *args); + + jint (JNICALL *DetachCurrentThread)(JavaVM *vm); + + jint (JNICALL *GetEnv)(JavaVM *vm, void **penv, jint version); + + jint (JNICALL *AttachCurrentThreadAsDaemon)(JavaVM *vm, void **penv, void *args); +}; + +struct JavaVM_ { + const struct JNIInvokeInterface_ *functions; +#ifdef __cplusplus + + jint DestroyJavaVM() { + return functions->DestroyJavaVM(this); + } + jint AttachCurrentThread(void **penv, void *args) { + return functions->AttachCurrentThread(this, penv, args); + } + jint DetachCurrentThread() { + return functions->DetachCurrentThread(this); + } + + jint GetEnv(void **penv, jint version) { + return functions->GetEnv(this, penv, version); + } + jint AttachCurrentThreadAsDaemon(void **penv, void *args) { + return functions->AttachCurrentThreadAsDaemon(this, penv, args); + } +#endif +}; + +#ifdef _JNI_IMPLEMENTATION_ +#define _JNI_IMPORT_OR_EXPORT_ JNIEXPORT +#else +#define _JNI_IMPORT_OR_EXPORT_ JNIIMPORT +#endif +_JNI_IMPORT_OR_EXPORT_ jint JNICALL +JNI_GetDefaultJavaVMInitArgs(void *args); + +_JNI_IMPORT_OR_EXPORT_ jint JNICALL +JNI_CreateJavaVM(JavaVM **pvm, void **penv, void *args); + +_JNI_IMPORT_OR_EXPORT_ jint JNICALL +JNI_GetCreatedJavaVMs(JavaVM **, jsize, jsize *); + +/* Defined by native libraries. */ +JNIEXPORT jint JNICALL +JNI_OnLoad(JavaVM *vm, void *reserved); + +JNIEXPORT void JNICALL +JNI_OnUnload(JavaVM *vm, void *reserved); + +#define JNI_VERSION_1_1 0x00010001 +#define JNI_VERSION_1_2 0x00010002 +#define JNI_VERSION_1_4 0x00010004 +#define JNI_VERSION_1_6 0x00010006 +#define JNI_VERSION_1_8 0x00010008 +#define JNI_VERSION_9 0x00090000 +#define JNI_VERSION_10 0x000a0000 +#define JNI_VERSION_19 0x00130000 +#define JNI_VERSION_20 0x00140000 +#define JNI_VERSION_21 0x00150000 + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* !_JAVASOFT_JNI_H_ */ diff --git a/java21/include/jvmti.h b/java21/include/jvmti.h new file mode 100644 index 0000000000000000000000000000000000000000..b7e58e91fd5655506b0232c6ece69ee8b19e6632 --- /dev/null +++ b/java21/include/jvmti.h @@ -0,0 +1,2659 @@ +/* + * Copyright (c) 2002, 2023, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + + /* AUTOMATICALLY GENERATED FILE - DO NOT EDIT */ + + /* Include file for the Java(tm) Virtual Machine Tool Interface */ + +#ifndef _JAVA_JVMTI_H_ +#define _JAVA_JVMTI_H_ + +#include "jni.h" + +#ifdef __cplusplus +extern "C" { +#endif + +enum { + JVMTI_VERSION_1 = 0x30010000, + JVMTI_VERSION_1_0 = 0x30010000, + JVMTI_VERSION_1_1 = 0x30010100, + JVMTI_VERSION_1_2 = 0x30010200, + JVMTI_VERSION_9 = 0x30090000, + JVMTI_VERSION_11 = 0x300B0000, + JVMTI_VERSION_19 = 0x30130000, + JVMTI_VERSION_21 = 0x30150000, + + JVMTI_VERSION = 0x30000000 + (21 * 0x10000) + ( 0 * 0x100) + 0 /* version: 21.0.0 */ +}; + +JNIEXPORT jint JNICALL +Agent_OnLoad(JavaVM *vm, char *options, void *reserved); + +JNIEXPORT jint JNICALL +Agent_OnAttach(JavaVM* vm, char* options, void* reserved); + +JNIEXPORT void JNICALL +Agent_OnUnload(JavaVM *vm); + + /* Forward declaration of the environment */ + +struct _jvmtiEnv; + +struct jvmtiInterface_1_; + +#ifdef __cplusplus +typedef _jvmtiEnv jvmtiEnv; +#else +typedef const struct jvmtiInterface_1_ *jvmtiEnv; +#endif /* __cplusplus */ + +/* Derived Base Types */ + +typedef jobject jthread; +typedef jobject jthreadGroup; +typedef jlong jlocation; +struct _jrawMonitorID; +typedef struct _jrawMonitorID *jrawMonitorID; +typedef struct JNINativeInterface_ jniNativeInterface; + + /* Constants */ + + + /* Thread State Flags */ + +enum { + JVMTI_THREAD_STATE_ALIVE = 0x0001, + JVMTI_THREAD_STATE_TERMINATED = 0x0002, + JVMTI_THREAD_STATE_RUNNABLE = 0x0004, + JVMTI_THREAD_STATE_BLOCKED_ON_MONITOR_ENTER = 0x0400, + JVMTI_THREAD_STATE_WAITING = 0x0080, + JVMTI_THREAD_STATE_WAITING_INDEFINITELY = 0x0010, + JVMTI_THREAD_STATE_WAITING_WITH_TIMEOUT = 0x0020, + JVMTI_THREAD_STATE_SLEEPING = 0x0040, + JVMTI_THREAD_STATE_IN_OBJECT_WAIT = 0x0100, + JVMTI_THREAD_STATE_PARKED = 0x0200, + JVMTI_THREAD_STATE_SUSPENDED = 0x100000, + JVMTI_THREAD_STATE_INTERRUPTED = 0x200000, + JVMTI_THREAD_STATE_IN_NATIVE = 0x400000, + JVMTI_THREAD_STATE_VENDOR_1 = 0x10000000, + JVMTI_THREAD_STATE_VENDOR_2 = 0x20000000, + JVMTI_THREAD_STATE_VENDOR_3 = 0x40000000 +}; + + /* java.lang.Thread.State Conversion Masks */ + +enum { + JVMTI_JAVA_LANG_THREAD_STATE_MASK = JVMTI_THREAD_STATE_TERMINATED | JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_RUNNABLE | JVMTI_THREAD_STATE_BLOCKED_ON_MONITOR_ENTER | JVMTI_THREAD_STATE_WAITING | JVMTI_THREAD_STATE_WAITING_INDEFINITELY | JVMTI_THREAD_STATE_WAITING_WITH_TIMEOUT, + JVMTI_JAVA_LANG_THREAD_STATE_NEW = 0, + JVMTI_JAVA_LANG_THREAD_STATE_TERMINATED = JVMTI_THREAD_STATE_TERMINATED, + JVMTI_JAVA_LANG_THREAD_STATE_RUNNABLE = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_RUNNABLE, + JVMTI_JAVA_LANG_THREAD_STATE_BLOCKED = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_BLOCKED_ON_MONITOR_ENTER, + JVMTI_JAVA_LANG_THREAD_STATE_WAITING = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_WAITING | JVMTI_THREAD_STATE_WAITING_INDEFINITELY, + JVMTI_JAVA_LANG_THREAD_STATE_TIMED_WAITING = JVMTI_THREAD_STATE_ALIVE | JVMTI_THREAD_STATE_WAITING | JVMTI_THREAD_STATE_WAITING_WITH_TIMEOUT +}; + + /* Thread Priority Constants */ + +enum { + JVMTI_THREAD_MIN_PRIORITY = 1, + JVMTI_THREAD_NORM_PRIORITY = 5, + JVMTI_THREAD_MAX_PRIORITY = 10 +}; + + /* Heap Filter Flags */ + +enum { + JVMTI_HEAP_FILTER_TAGGED = 0x4, + JVMTI_HEAP_FILTER_UNTAGGED = 0x8, + JVMTI_HEAP_FILTER_CLASS_TAGGED = 0x10, + JVMTI_HEAP_FILTER_CLASS_UNTAGGED = 0x20 +}; + + /* Heap Visit Control Flags */ + +enum { + JVMTI_VISIT_OBJECTS = 0x100, + JVMTI_VISIT_ABORT = 0x8000 +}; + + /* Heap Reference Enumeration */ + +typedef enum { + JVMTI_HEAP_REFERENCE_CLASS = 1, + JVMTI_HEAP_REFERENCE_FIELD = 2, + JVMTI_HEAP_REFERENCE_ARRAY_ELEMENT = 3, + JVMTI_HEAP_REFERENCE_CLASS_LOADER = 4, + JVMTI_HEAP_REFERENCE_SIGNERS = 5, + JVMTI_HEAP_REFERENCE_PROTECTION_DOMAIN = 6, + JVMTI_HEAP_REFERENCE_INTERFACE = 7, + JVMTI_HEAP_REFERENCE_STATIC_FIELD = 8, + JVMTI_HEAP_REFERENCE_CONSTANT_POOL = 9, + JVMTI_HEAP_REFERENCE_SUPERCLASS = 10, + JVMTI_HEAP_REFERENCE_JNI_GLOBAL = 21, + JVMTI_HEAP_REFERENCE_SYSTEM_CLASS = 22, + JVMTI_HEAP_REFERENCE_MONITOR = 23, + JVMTI_HEAP_REFERENCE_STACK_LOCAL = 24, + JVMTI_HEAP_REFERENCE_JNI_LOCAL = 25, + JVMTI_HEAP_REFERENCE_THREAD = 26, + JVMTI_HEAP_REFERENCE_OTHER = 27 +} jvmtiHeapReferenceKind; + + /* Primitive Type Enumeration */ + +typedef enum { + JVMTI_PRIMITIVE_TYPE_BOOLEAN = 90, + JVMTI_PRIMITIVE_TYPE_BYTE = 66, + JVMTI_PRIMITIVE_TYPE_CHAR = 67, + JVMTI_PRIMITIVE_TYPE_SHORT = 83, + JVMTI_PRIMITIVE_TYPE_INT = 73, + JVMTI_PRIMITIVE_TYPE_LONG = 74, + JVMTI_PRIMITIVE_TYPE_FLOAT = 70, + JVMTI_PRIMITIVE_TYPE_DOUBLE = 68 +} jvmtiPrimitiveType; + + /* Heap Object Filter Enumeration */ + +typedef enum { + JVMTI_HEAP_OBJECT_TAGGED = 1, + JVMTI_HEAP_OBJECT_UNTAGGED = 2, + JVMTI_HEAP_OBJECT_EITHER = 3 +} jvmtiHeapObjectFilter; + + /* Heap Root Kind Enumeration */ + +typedef enum { + JVMTI_HEAP_ROOT_JNI_GLOBAL = 1, + JVMTI_HEAP_ROOT_SYSTEM_CLASS = 2, + JVMTI_HEAP_ROOT_MONITOR = 3, + JVMTI_HEAP_ROOT_STACK_LOCAL = 4, + JVMTI_HEAP_ROOT_JNI_LOCAL = 5, + JVMTI_HEAP_ROOT_THREAD = 6, + JVMTI_HEAP_ROOT_OTHER = 7 +} jvmtiHeapRootKind; + + /* Object Reference Enumeration */ + +typedef enum { + JVMTI_REFERENCE_CLASS = 1, + JVMTI_REFERENCE_FIELD = 2, + JVMTI_REFERENCE_ARRAY_ELEMENT = 3, + JVMTI_REFERENCE_CLASS_LOADER = 4, + JVMTI_REFERENCE_SIGNERS = 5, + JVMTI_REFERENCE_PROTECTION_DOMAIN = 6, + JVMTI_REFERENCE_INTERFACE = 7, + JVMTI_REFERENCE_STATIC_FIELD = 8, + JVMTI_REFERENCE_CONSTANT_POOL = 9 +} jvmtiObjectReferenceKind; + + /* Iteration Control Enumeration */ + +typedef enum { + JVMTI_ITERATION_CONTINUE = 1, + JVMTI_ITERATION_IGNORE = 2, + JVMTI_ITERATION_ABORT = 0 +} jvmtiIterationControl; + + /* Class Status Flags */ + +enum { + JVMTI_CLASS_STATUS_VERIFIED = 1, + JVMTI_CLASS_STATUS_PREPARED = 2, + JVMTI_CLASS_STATUS_INITIALIZED = 4, + JVMTI_CLASS_STATUS_ERROR = 8, + JVMTI_CLASS_STATUS_ARRAY = 16, + JVMTI_CLASS_STATUS_PRIMITIVE = 32 +}; + + /* Event Enable/Disable */ + +typedef enum { + JVMTI_ENABLE = 1, + JVMTI_DISABLE = 0 +} jvmtiEventMode; + + /* Extension Function/Event Parameter Types */ + +typedef enum { + JVMTI_TYPE_JBYTE = 101, + JVMTI_TYPE_JCHAR = 102, + JVMTI_TYPE_JSHORT = 103, + JVMTI_TYPE_JINT = 104, + JVMTI_TYPE_JLONG = 105, + JVMTI_TYPE_JFLOAT = 106, + JVMTI_TYPE_JDOUBLE = 107, + JVMTI_TYPE_JBOOLEAN = 108, + JVMTI_TYPE_JOBJECT = 109, + JVMTI_TYPE_JTHREAD = 110, + JVMTI_TYPE_JCLASS = 111, + JVMTI_TYPE_JVALUE = 112, + JVMTI_TYPE_JFIELDID = 113, + JVMTI_TYPE_JMETHODID = 114, + JVMTI_TYPE_CCHAR = 115, + JVMTI_TYPE_CVOID = 116, + JVMTI_TYPE_JNIENV = 117 +} jvmtiParamTypes; + + /* Extension Function/Event Parameter Kinds */ + +typedef enum { + JVMTI_KIND_IN = 91, + JVMTI_KIND_IN_PTR = 92, + JVMTI_KIND_IN_BUF = 93, + JVMTI_KIND_ALLOC_BUF = 94, + JVMTI_KIND_ALLOC_ALLOC_BUF = 95, + JVMTI_KIND_OUT = 96, + JVMTI_KIND_OUT_BUF = 97 +} jvmtiParamKind; + + /* Timer Kinds */ + +typedef enum { + JVMTI_TIMER_USER_CPU = 30, + JVMTI_TIMER_TOTAL_CPU = 31, + JVMTI_TIMER_ELAPSED = 32 +} jvmtiTimerKind; + + /* Phases of execution */ + +typedef enum { + JVMTI_PHASE_ONLOAD = 1, + JVMTI_PHASE_PRIMORDIAL = 2, + JVMTI_PHASE_START = 6, + JVMTI_PHASE_LIVE = 4, + JVMTI_PHASE_DEAD = 8 +} jvmtiPhase; + + /* Version Interface Types */ + +enum { + JVMTI_VERSION_INTERFACE_JNI = 0x00000000, + JVMTI_VERSION_INTERFACE_JVMTI = 0x30000000 +}; + + /* Version Masks */ + +enum { + JVMTI_VERSION_MASK_INTERFACE_TYPE = 0x70000000, + JVMTI_VERSION_MASK_MAJOR = 0x0FFF0000, + JVMTI_VERSION_MASK_MINOR = 0x0000FF00, + JVMTI_VERSION_MASK_MICRO = 0x000000FF +}; + + /* Version Shifts */ + +enum { + JVMTI_VERSION_SHIFT_MAJOR = 16, + JVMTI_VERSION_SHIFT_MINOR = 8, + JVMTI_VERSION_SHIFT_MICRO = 0 +}; + + /* Verbose Flag Enumeration */ + +typedef enum { + JVMTI_VERBOSE_OTHER = 0, + JVMTI_VERBOSE_GC = 1, + JVMTI_VERBOSE_CLASS = 2, + JVMTI_VERBOSE_JNI = 4 +} jvmtiVerboseFlag; + + /* JLocation Format Enumeration */ + +typedef enum { + JVMTI_JLOCATION_JVMBCI = 1, + JVMTI_JLOCATION_MACHINEPC = 2, + JVMTI_JLOCATION_OTHER = 0 +} jvmtiJlocationFormat; + + /* Resource Exhaustion Flags */ + +enum { + JVMTI_RESOURCE_EXHAUSTED_OOM_ERROR = 0x0001, + JVMTI_RESOURCE_EXHAUSTED_JAVA_HEAP = 0x0002, + JVMTI_RESOURCE_EXHAUSTED_THREADS = 0x0004 +}; + + /* Errors */ + +typedef enum { + JVMTI_ERROR_NONE = 0, + JVMTI_ERROR_INVALID_THREAD = 10, + JVMTI_ERROR_INVALID_THREAD_GROUP = 11, + JVMTI_ERROR_INVALID_PRIORITY = 12, + JVMTI_ERROR_THREAD_NOT_SUSPENDED = 13, + JVMTI_ERROR_THREAD_SUSPENDED = 14, + JVMTI_ERROR_THREAD_NOT_ALIVE = 15, + JVMTI_ERROR_INVALID_OBJECT = 20, + JVMTI_ERROR_INVALID_CLASS = 21, + JVMTI_ERROR_CLASS_NOT_PREPARED = 22, + JVMTI_ERROR_INVALID_METHODID = 23, + JVMTI_ERROR_INVALID_LOCATION = 24, + JVMTI_ERROR_INVALID_FIELDID = 25, + JVMTI_ERROR_INVALID_MODULE = 26, + JVMTI_ERROR_NO_MORE_FRAMES = 31, + JVMTI_ERROR_OPAQUE_FRAME = 32, + JVMTI_ERROR_TYPE_MISMATCH = 34, + JVMTI_ERROR_INVALID_SLOT = 35, + JVMTI_ERROR_DUPLICATE = 40, + JVMTI_ERROR_NOT_FOUND = 41, + JVMTI_ERROR_INVALID_MONITOR = 50, + JVMTI_ERROR_NOT_MONITOR_OWNER = 51, + JVMTI_ERROR_INTERRUPT = 52, + JVMTI_ERROR_INVALID_CLASS_FORMAT = 60, + JVMTI_ERROR_CIRCULAR_CLASS_DEFINITION = 61, + JVMTI_ERROR_FAILS_VERIFICATION = 62, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_METHOD_ADDED = 63, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_SCHEMA_CHANGED = 64, + JVMTI_ERROR_INVALID_TYPESTATE = 65, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_HIERARCHY_CHANGED = 66, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_METHOD_DELETED = 67, + JVMTI_ERROR_UNSUPPORTED_VERSION = 68, + JVMTI_ERROR_NAMES_DONT_MATCH = 69, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_CLASS_MODIFIERS_CHANGED = 70, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_METHOD_MODIFIERS_CHANGED = 71, + JVMTI_ERROR_UNSUPPORTED_REDEFINITION_CLASS_ATTRIBUTE_CHANGED = 72, + JVMTI_ERROR_UNSUPPORTED_OPERATION = 73, + JVMTI_ERROR_UNMODIFIABLE_CLASS = 79, + JVMTI_ERROR_UNMODIFIABLE_MODULE = 80, + JVMTI_ERROR_NOT_AVAILABLE = 98, + JVMTI_ERROR_MUST_POSSESS_CAPABILITY = 99, + JVMTI_ERROR_NULL_POINTER = 100, + JVMTI_ERROR_ABSENT_INFORMATION = 101, + JVMTI_ERROR_INVALID_EVENT_TYPE = 102, + JVMTI_ERROR_ILLEGAL_ARGUMENT = 103, + JVMTI_ERROR_NATIVE_METHOD = 104, + JVMTI_ERROR_CLASS_LOADER_UNSUPPORTED = 106, + JVMTI_ERROR_OUT_OF_MEMORY = 110, + JVMTI_ERROR_ACCESS_DENIED = 111, + JVMTI_ERROR_WRONG_PHASE = 112, + JVMTI_ERROR_INTERNAL = 113, + JVMTI_ERROR_UNATTACHED_THREAD = 115, + JVMTI_ERROR_INVALID_ENVIRONMENT = 116, + JVMTI_ERROR_MAX = 116 +} jvmtiError; + + /* Event IDs */ + +typedef enum { + JVMTI_MIN_EVENT_TYPE_VAL = 50, + JVMTI_EVENT_VM_INIT = 50, + JVMTI_EVENT_VM_DEATH = 51, + JVMTI_EVENT_THREAD_START = 52, + JVMTI_EVENT_THREAD_END = 53, + JVMTI_EVENT_CLASS_FILE_LOAD_HOOK = 54, + JVMTI_EVENT_CLASS_LOAD = 55, + JVMTI_EVENT_CLASS_PREPARE = 56, + JVMTI_EVENT_VM_START = 57, + JVMTI_EVENT_EXCEPTION = 58, + JVMTI_EVENT_EXCEPTION_CATCH = 59, + JVMTI_EVENT_SINGLE_STEP = 60, + JVMTI_EVENT_FRAME_POP = 61, + JVMTI_EVENT_BREAKPOINT = 62, + JVMTI_EVENT_FIELD_ACCESS = 63, + JVMTI_EVENT_FIELD_MODIFICATION = 64, + JVMTI_EVENT_METHOD_ENTRY = 65, + JVMTI_EVENT_METHOD_EXIT = 66, + JVMTI_EVENT_NATIVE_METHOD_BIND = 67, + JVMTI_EVENT_COMPILED_METHOD_LOAD = 68, + JVMTI_EVENT_COMPILED_METHOD_UNLOAD = 69, + JVMTI_EVENT_DYNAMIC_CODE_GENERATED = 70, + JVMTI_EVENT_DATA_DUMP_REQUEST = 71, + JVMTI_EVENT_MONITOR_WAIT = 73, + JVMTI_EVENT_MONITOR_WAITED = 74, + JVMTI_EVENT_MONITOR_CONTENDED_ENTER = 75, + JVMTI_EVENT_MONITOR_CONTENDED_ENTERED = 76, + JVMTI_EVENT_RESOURCE_EXHAUSTED = 80, + JVMTI_EVENT_GARBAGE_COLLECTION_START = 81, + JVMTI_EVENT_GARBAGE_COLLECTION_FINISH = 82, + JVMTI_EVENT_OBJECT_FREE = 83, + JVMTI_EVENT_VM_OBJECT_ALLOC = 84, + JVMTI_EVENT_SAMPLED_OBJECT_ALLOC = 86, + JVMTI_EVENT_VIRTUAL_THREAD_START = 87, + JVMTI_EVENT_VIRTUAL_THREAD_END = 88, + JVMTI_MAX_EVENT_TYPE_VAL = 88 +} jvmtiEvent; + + + /* Pre-Declarations */ +struct jvmtiThreadInfo; +typedef struct jvmtiThreadInfo jvmtiThreadInfo; +struct jvmtiMonitorStackDepthInfo; +typedef struct jvmtiMonitorStackDepthInfo jvmtiMonitorStackDepthInfo; +struct jvmtiThreadGroupInfo; +typedef struct jvmtiThreadGroupInfo jvmtiThreadGroupInfo; +struct jvmtiFrameInfo; +typedef struct jvmtiFrameInfo jvmtiFrameInfo; +struct jvmtiStackInfo; +typedef struct jvmtiStackInfo jvmtiStackInfo; +struct jvmtiHeapReferenceInfoField; +typedef struct jvmtiHeapReferenceInfoField jvmtiHeapReferenceInfoField; +struct jvmtiHeapReferenceInfoArray; +typedef struct jvmtiHeapReferenceInfoArray jvmtiHeapReferenceInfoArray; +struct jvmtiHeapReferenceInfoConstantPool; +typedef struct jvmtiHeapReferenceInfoConstantPool jvmtiHeapReferenceInfoConstantPool; +struct jvmtiHeapReferenceInfoStackLocal; +typedef struct jvmtiHeapReferenceInfoStackLocal jvmtiHeapReferenceInfoStackLocal; +struct jvmtiHeapReferenceInfoJniLocal; +typedef struct jvmtiHeapReferenceInfoJniLocal jvmtiHeapReferenceInfoJniLocal; +struct jvmtiHeapReferenceInfoReserved; +typedef struct jvmtiHeapReferenceInfoReserved jvmtiHeapReferenceInfoReserved; +union jvmtiHeapReferenceInfo; +typedef union jvmtiHeapReferenceInfo jvmtiHeapReferenceInfo; +struct jvmtiHeapCallbacks; +typedef struct jvmtiHeapCallbacks jvmtiHeapCallbacks; +struct jvmtiClassDefinition; +typedef struct jvmtiClassDefinition jvmtiClassDefinition; +struct jvmtiMonitorUsage; +typedef struct jvmtiMonitorUsage jvmtiMonitorUsage; +struct jvmtiLineNumberEntry; +typedef struct jvmtiLineNumberEntry jvmtiLineNumberEntry; +struct jvmtiLocalVariableEntry; +typedef struct jvmtiLocalVariableEntry jvmtiLocalVariableEntry; +struct jvmtiParamInfo; +typedef struct jvmtiParamInfo jvmtiParamInfo; +struct jvmtiExtensionFunctionInfo; +typedef struct jvmtiExtensionFunctionInfo jvmtiExtensionFunctionInfo; +struct jvmtiExtensionEventInfo; +typedef struct jvmtiExtensionEventInfo jvmtiExtensionEventInfo; +struct jvmtiTimerInfo; +typedef struct jvmtiTimerInfo jvmtiTimerInfo; +struct jvmtiAddrLocationMap; +typedef struct jvmtiAddrLocationMap jvmtiAddrLocationMap; + + /* Function Types */ + +typedef void (JNICALL *jvmtiStartFunction) + (jvmtiEnv* jvmti_env, JNIEnv* jni_env, void* arg); + +typedef jint (JNICALL *jvmtiHeapIterationCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, jint length, void* user_data); + +typedef jint (JNICALL *jvmtiHeapReferenceCallback) + (jvmtiHeapReferenceKind reference_kind, const jvmtiHeapReferenceInfo* reference_info, jlong class_tag, jlong referrer_class_tag, jlong size, jlong* tag_ptr, jlong* referrer_tag_ptr, jint length, void* user_data); + +typedef jint (JNICALL *jvmtiPrimitiveFieldCallback) + (jvmtiHeapReferenceKind kind, const jvmtiHeapReferenceInfo* info, jlong object_class_tag, jlong* object_tag_ptr, jvalue value, jvmtiPrimitiveType value_type, void* user_data); + +typedef jint (JNICALL *jvmtiArrayPrimitiveValueCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, jint element_count, jvmtiPrimitiveType element_type, const void* elements, void* user_data); + +typedef jint (JNICALL *jvmtiStringPrimitiveValueCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, const jchar* value, jint value_length, void* user_data); + +typedef jint (JNICALL *jvmtiReservedCallback) + (); + +typedef jvmtiIterationControl (JNICALL *jvmtiHeapObjectCallback) + (jlong class_tag, jlong size, jlong* tag_ptr, void* user_data); + +typedef jvmtiIterationControl (JNICALL *jvmtiHeapRootCallback) + (jvmtiHeapRootKind root_kind, jlong class_tag, jlong size, jlong* tag_ptr, void* user_data); + +typedef jvmtiIterationControl (JNICALL *jvmtiStackReferenceCallback) + (jvmtiHeapRootKind root_kind, jlong class_tag, jlong size, jlong* tag_ptr, jlong thread_tag, jint depth, jmethodID method, jint slot, void* user_data); + +typedef jvmtiIterationControl (JNICALL *jvmtiObjectReferenceCallback) + (jvmtiObjectReferenceKind reference_kind, jlong class_tag, jlong size, jlong* tag_ptr, jlong referrer_tag, jint referrer_index, void* user_data); + +typedef jvmtiError (JNICALL *jvmtiExtensionFunction) + (jvmtiEnv* jvmti_env, ...); + +typedef void (JNICALL *jvmtiExtensionEvent) + (jvmtiEnv* jvmti_env, ...); + + + /* Structure Types */ +struct jvmtiThreadInfo { + char* name; + jint priority; + jboolean is_daemon; + jthreadGroup thread_group; + jobject context_class_loader; +}; +struct jvmtiMonitorStackDepthInfo { + jobject monitor; + jint stack_depth; +}; +struct jvmtiThreadGroupInfo { + jthreadGroup parent; + char* name; + jint max_priority; + jboolean is_daemon; +}; +struct jvmtiFrameInfo { + jmethodID method; + jlocation location; +}; +struct jvmtiStackInfo { + jthread thread; + jint state; + jvmtiFrameInfo* frame_buffer; + jint frame_count; +}; +struct jvmtiHeapReferenceInfoField { + jint index; +}; +struct jvmtiHeapReferenceInfoArray { + jint index; +}; +struct jvmtiHeapReferenceInfoConstantPool { + jint index; +}; +struct jvmtiHeapReferenceInfoStackLocal { + jlong thread_tag; + jlong thread_id; + jint depth; + jmethodID method; + jlocation location; + jint slot; +}; +struct jvmtiHeapReferenceInfoJniLocal { + jlong thread_tag; + jlong thread_id; + jint depth; + jmethodID method; +}; +struct jvmtiHeapReferenceInfoReserved { + jlong reserved1; + jlong reserved2; + jlong reserved3; + jlong reserved4; + jlong reserved5; + jlong reserved6; + jlong reserved7; + jlong reserved8; +}; +union jvmtiHeapReferenceInfo { + jvmtiHeapReferenceInfoField field; + jvmtiHeapReferenceInfoArray array; + jvmtiHeapReferenceInfoConstantPool constant_pool; + jvmtiHeapReferenceInfoStackLocal stack_local; + jvmtiHeapReferenceInfoJniLocal jni_local; + jvmtiHeapReferenceInfoReserved other; +}; +struct jvmtiHeapCallbacks { + jvmtiHeapIterationCallback heap_iteration_callback; + jvmtiHeapReferenceCallback heap_reference_callback; + jvmtiPrimitiveFieldCallback primitive_field_callback; + jvmtiArrayPrimitiveValueCallback array_primitive_value_callback; + jvmtiStringPrimitiveValueCallback string_primitive_value_callback; + jvmtiReservedCallback reserved5; + jvmtiReservedCallback reserved6; + jvmtiReservedCallback reserved7; + jvmtiReservedCallback reserved8; + jvmtiReservedCallback reserved9; + jvmtiReservedCallback reserved10; + jvmtiReservedCallback reserved11; + jvmtiReservedCallback reserved12; + jvmtiReservedCallback reserved13; + jvmtiReservedCallback reserved14; + jvmtiReservedCallback reserved15; +}; +struct jvmtiClassDefinition { + jclass klass; + jint class_byte_count; + const unsigned char* class_bytes; +}; +struct jvmtiMonitorUsage { + jthread owner; + jint entry_count; + jint waiter_count; + jthread* waiters; + jint notify_waiter_count; + jthread* notify_waiters; +}; +struct jvmtiLineNumberEntry { + jlocation start_location; + jint line_number; +}; +struct jvmtiLocalVariableEntry { + jlocation start_location; + jint length; + char* name; + char* signature; + char* generic_signature; + jint slot; +}; +struct jvmtiParamInfo { + char* name; + jvmtiParamKind kind; + jvmtiParamTypes base_type; + jboolean null_ok; +}; +struct jvmtiExtensionFunctionInfo { + jvmtiExtensionFunction func; + char* id; + char* short_description; + jint param_count; + jvmtiParamInfo* params; + jint error_count; + jvmtiError* errors; +}; +struct jvmtiExtensionEventInfo { + jint extension_event_index; + char* id; + char* short_description; + jint param_count; + jvmtiParamInfo* params; +}; +struct jvmtiTimerInfo { + jlong max_value; + jboolean may_skip_forward; + jboolean may_skip_backward; + jvmtiTimerKind kind; + jlong reserved1; + jlong reserved2; +}; +struct jvmtiAddrLocationMap { + const void* start_address; + jlocation location; +}; + +typedef struct { + unsigned int can_tag_objects : 1; + unsigned int can_generate_field_modification_events : 1; + unsigned int can_generate_field_access_events : 1; + unsigned int can_get_bytecodes : 1; + unsigned int can_get_synthetic_attribute : 1; + unsigned int can_get_owned_monitor_info : 1; + unsigned int can_get_current_contended_monitor : 1; + unsigned int can_get_monitor_info : 1; + unsigned int can_pop_frame : 1; + unsigned int can_redefine_classes : 1; + unsigned int can_signal_thread : 1; + unsigned int can_get_source_file_name : 1; + unsigned int can_get_line_numbers : 1; + unsigned int can_get_source_debug_extension : 1; + unsigned int can_access_local_variables : 1; + unsigned int can_maintain_original_method_order : 1; + unsigned int can_generate_single_step_events : 1; + unsigned int can_generate_exception_events : 1; + unsigned int can_generate_frame_pop_events : 1; + unsigned int can_generate_breakpoint_events : 1; + unsigned int can_suspend : 1; + unsigned int can_redefine_any_class : 1; + unsigned int can_get_current_thread_cpu_time : 1; + unsigned int can_get_thread_cpu_time : 1; + unsigned int can_generate_method_entry_events : 1; + unsigned int can_generate_method_exit_events : 1; + unsigned int can_generate_all_class_hook_events : 1; + unsigned int can_generate_compiled_method_load_events : 1; + unsigned int can_generate_monitor_events : 1; + unsigned int can_generate_vm_object_alloc_events : 1; + unsigned int can_generate_native_method_bind_events : 1; + unsigned int can_generate_garbage_collection_events : 1; + unsigned int can_generate_object_free_events : 1; + unsigned int can_force_early_return : 1; + unsigned int can_get_owned_monitor_stack_depth_info : 1; + unsigned int can_get_constant_pool : 1; + unsigned int can_set_native_method_prefix : 1; + unsigned int can_retransform_classes : 1; + unsigned int can_retransform_any_class : 1; + unsigned int can_generate_resource_exhaustion_heap_events : 1; + unsigned int can_generate_resource_exhaustion_threads_events : 1; + unsigned int can_generate_early_vmstart : 1; + unsigned int can_generate_early_class_hook_events : 1; + unsigned int can_generate_sampled_object_alloc_events : 1; + unsigned int can_support_virtual_threads : 1; + unsigned int : 3; + unsigned int : 16; + unsigned int : 16; + unsigned int : 16; + unsigned int : 16; + unsigned int : 16; +} jvmtiCapabilities; + + + /* Event Definitions */ + +typedef void (JNICALL *jvmtiEventReserved)(void); + + +typedef void (JNICALL *jvmtiEventBreakpoint) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location); + +typedef void (JNICALL *jvmtiEventClassFileLoadHook) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jclass class_being_redefined, + jobject loader, + const char* name, + jobject protection_domain, + jint class_data_len, + const unsigned char* class_data, + jint* new_class_data_len, + unsigned char** new_class_data); + +typedef void (JNICALL *jvmtiEventClassLoad) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jclass klass); + +typedef void (JNICALL *jvmtiEventClassPrepare) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jclass klass); + +typedef void (JNICALL *jvmtiEventCompiledMethodLoad) + (jvmtiEnv *jvmti_env, + jmethodID method, + jint code_size, + const void* code_addr, + jint map_length, + const jvmtiAddrLocationMap* map, + const void* compile_info); + +typedef void (JNICALL *jvmtiEventCompiledMethodUnload) + (jvmtiEnv *jvmti_env, + jmethodID method, + const void* code_addr); + +typedef void (JNICALL *jvmtiEventDataDumpRequest) + (jvmtiEnv *jvmti_env); + +typedef void (JNICALL *jvmtiEventDynamicCodeGenerated) + (jvmtiEnv *jvmti_env, + const char* name, + const void* address, + jint length); + +typedef void (JNICALL *jvmtiEventException) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jobject exception, + jmethodID catch_method, + jlocation catch_location); + +typedef void (JNICALL *jvmtiEventExceptionCatch) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jobject exception); + +typedef void (JNICALL *jvmtiEventFieldAccess) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jclass field_klass, + jobject object, + jfieldID field); + +typedef void (JNICALL *jvmtiEventFieldModification) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location, + jclass field_klass, + jobject object, + jfieldID field, + char signature_type, + jvalue new_value); + +typedef void (JNICALL *jvmtiEventFramePop) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jboolean was_popped_by_exception); + +typedef void (JNICALL *jvmtiEventGarbageCollectionFinish) + (jvmtiEnv *jvmti_env); + +typedef void (JNICALL *jvmtiEventGarbageCollectionStart) + (jvmtiEnv *jvmti_env); + +typedef void (JNICALL *jvmtiEventMethodEntry) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method); + +typedef void (JNICALL *jvmtiEventMethodExit) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jboolean was_popped_by_exception, + jvalue return_value); + +typedef void (JNICALL *jvmtiEventMonitorContendedEnter) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object); + +typedef void (JNICALL *jvmtiEventMonitorContendedEntered) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object); + +typedef void (JNICALL *jvmtiEventMonitorWait) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jlong timeout); + +typedef void (JNICALL *jvmtiEventMonitorWaited) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jboolean timed_out); + +typedef void (JNICALL *jvmtiEventNativeMethodBind) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + void* address, + void** new_address_ptr); + +typedef void (JNICALL *jvmtiEventObjectFree) + (jvmtiEnv *jvmti_env, + jlong tag); + +typedef void (JNICALL *jvmtiEventResourceExhausted) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jint flags, + const void* reserved, + const char* description); + +typedef void (JNICALL *jvmtiEventSampledObjectAlloc) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jclass object_klass, + jlong size); + +typedef void (JNICALL *jvmtiEventSingleStep) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jmethodID method, + jlocation location); + +typedef void (JNICALL *jvmtiEventThreadEnd) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread); + +typedef void (JNICALL *jvmtiEventThreadStart) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread); + +typedef void (JNICALL *jvmtiEventVirtualThreadEnd) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread virtual_thread); + +typedef void (JNICALL *jvmtiEventVirtualThreadStart) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread virtual_thread); + +typedef void (JNICALL *jvmtiEventVMDeath) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env); + +typedef void (JNICALL *jvmtiEventVMInit) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread); + +typedef void (JNICALL *jvmtiEventVMObjectAlloc) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env, + jthread thread, + jobject object, + jclass object_klass, + jlong size); + +typedef void (JNICALL *jvmtiEventVMStart) + (jvmtiEnv *jvmti_env, + JNIEnv* jni_env); + + /* Event Callback Structure */ + +typedef struct { + /* 50 : VM Initialization Event */ + jvmtiEventVMInit VMInit; + /* 51 : VM Death Event */ + jvmtiEventVMDeath VMDeath; + /* 52 : Thread Start */ + jvmtiEventThreadStart ThreadStart; + /* 53 : Thread End */ + jvmtiEventThreadEnd ThreadEnd; + /* 54 : Class File Load Hook */ + jvmtiEventClassFileLoadHook ClassFileLoadHook; + /* 55 : Class Load */ + jvmtiEventClassLoad ClassLoad; + /* 56 : Class Prepare */ + jvmtiEventClassPrepare ClassPrepare; + /* 57 : VM Start Event */ + jvmtiEventVMStart VMStart; + /* 58 : Exception */ + jvmtiEventException Exception; + /* 59 : Exception Catch */ + jvmtiEventExceptionCatch ExceptionCatch; + /* 60 : Single Step */ + jvmtiEventSingleStep SingleStep; + /* 61 : Frame Pop */ + jvmtiEventFramePop FramePop; + /* 62 : Breakpoint */ + jvmtiEventBreakpoint Breakpoint; + /* 63 : Field Access */ + jvmtiEventFieldAccess FieldAccess; + /* 64 : Field Modification */ + jvmtiEventFieldModification FieldModification; + /* 65 : Method Entry */ + jvmtiEventMethodEntry MethodEntry; + /* 66 : Method Exit */ + jvmtiEventMethodExit MethodExit; + /* 67 : Native Method Bind */ + jvmtiEventNativeMethodBind NativeMethodBind; + /* 68 : Compiled Method Load */ + jvmtiEventCompiledMethodLoad CompiledMethodLoad; + /* 69 : Compiled Method Unload */ + jvmtiEventCompiledMethodUnload CompiledMethodUnload; + /* 70 : Dynamic Code Generated */ + jvmtiEventDynamicCodeGenerated DynamicCodeGenerated; + /* 71 : Data Dump Request */ + jvmtiEventDataDumpRequest DataDumpRequest; + /* 72 */ + jvmtiEventReserved reserved72; + /* 73 : Monitor Wait */ + jvmtiEventMonitorWait MonitorWait; + /* 74 : Monitor Waited */ + jvmtiEventMonitorWaited MonitorWaited; + /* 75 : Monitor Contended Enter */ + jvmtiEventMonitorContendedEnter MonitorContendedEnter; + /* 76 : Monitor Contended Entered */ + jvmtiEventMonitorContendedEntered MonitorContendedEntered; + /* 77 */ + jvmtiEventReserved reserved77; + /* 78 */ + jvmtiEventReserved reserved78; + /* 79 */ + jvmtiEventReserved reserved79; + /* 80 : Resource Exhausted */ + jvmtiEventResourceExhausted ResourceExhausted; + /* 81 : Garbage Collection Start */ + jvmtiEventGarbageCollectionStart GarbageCollectionStart; + /* 82 : Garbage Collection Finish */ + jvmtiEventGarbageCollectionFinish GarbageCollectionFinish; + /* 83 : Object Free */ + jvmtiEventObjectFree ObjectFree; + /* 84 : VM Object Allocation */ + jvmtiEventVMObjectAlloc VMObjectAlloc; + /* 85 */ + jvmtiEventReserved reserved85; + /* 86 : Sampled Object Allocation */ + jvmtiEventSampledObjectAlloc SampledObjectAlloc; + /* 87 : Virtual Thread Start */ + jvmtiEventVirtualThreadStart VirtualThreadStart; + /* 88 : Virtual Thread End */ + jvmtiEventVirtualThreadEnd VirtualThreadEnd; +} jvmtiEventCallbacks; + + + /* Function Interface */ + +typedef struct jvmtiInterface_1_ { + + /* 1 : RESERVED */ + void *reserved1; + + /* 2 : Set Event Notification Mode */ + jvmtiError (JNICALL *SetEventNotificationMode) (jvmtiEnv* env, + jvmtiEventMode mode, + jvmtiEvent event_type, + jthread event_thread, + ...); + + /* 3 : Get All Modules */ + jvmtiError (JNICALL *GetAllModules) (jvmtiEnv* env, + jint* module_count_ptr, + jobject** modules_ptr); + + /* 4 : Get All Threads */ + jvmtiError (JNICALL *GetAllThreads) (jvmtiEnv* env, + jint* threads_count_ptr, + jthread** threads_ptr); + + /* 5 : Suspend Thread */ + jvmtiError (JNICALL *SuspendThread) (jvmtiEnv* env, + jthread thread); + + /* 6 : Resume Thread */ + jvmtiError (JNICALL *ResumeThread) (jvmtiEnv* env, + jthread thread); + + /* 7 : Stop Thread */ + jvmtiError (JNICALL *StopThread) (jvmtiEnv* env, + jthread thread, + jobject exception); + + /* 8 : Interrupt Thread */ + jvmtiError (JNICALL *InterruptThread) (jvmtiEnv* env, + jthread thread); + + /* 9 : Get Thread Info */ + jvmtiError (JNICALL *GetThreadInfo) (jvmtiEnv* env, + jthread thread, + jvmtiThreadInfo* info_ptr); + + /* 10 : Get Owned Monitor Info */ + jvmtiError (JNICALL *GetOwnedMonitorInfo) (jvmtiEnv* env, + jthread thread, + jint* owned_monitor_count_ptr, + jobject** owned_monitors_ptr); + + /* 11 : Get Current Contended Monitor */ + jvmtiError (JNICALL *GetCurrentContendedMonitor) (jvmtiEnv* env, + jthread thread, + jobject* monitor_ptr); + + /* 12 : Run Agent Thread */ + jvmtiError (JNICALL *RunAgentThread) (jvmtiEnv* env, + jthread thread, + jvmtiStartFunction proc, + const void* arg, + jint priority); + + /* 13 : Get Top Thread Groups */ + jvmtiError (JNICALL *GetTopThreadGroups) (jvmtiEnv* env, + jint* group_count_ptr, + jthreadGroup** groups_ptr); + + /* 14 : Get Thread Group Info */ + jvmtiError (JNICALL *GetThreadGroupInfo) (jvmtiEnv* env, + jthreadGroup group, + jvmtiThreadGroupInfo* info_ptr); + + /* 15 : Get Thread Group Children */ + jvmtiError (JNICALL *GetThreadGroupChildren) (jvmtiEnv* env, + jthreadGroup group, + jint* thread_count_ptr, + jthread** threads_ptr, + jint* group_count_ptr, + jthreadGroup** groups_ptr); + + /* 16 : Get Frame Count */ + jvmtiError (JNICALL *GetFrameCount) (jvmtiEnv* env, + jthread thread, + jint* count_ptr); + + /* 17 : Get Thread State */ + jvmtiError (JNICALL *GetThreadState) (jvmtiEnv* env, + jthread thread, + jint* thread_state_ptr); + + /* 18 : Get Current Thread */ + jvmtiError (JNICALL *GetCurrentThread) (jvmtiEnv* env, + jthread* thread_ptr); + + /* 19 : Get Frame Location */ + jvmtiError (JNICALL *GetFrameLocation) (jvmtiEnv* env, + jthread thread, + jint depth, + jmethodID* method_ptr, + jlocation* location_ptr); + + /* 20 : Notify Frame Pop */ + jvmtiError (JNICALL *NotifyFramePop) (jvmtiEnv* env, + jthread thread, + jint depth); + + /* 21 : Get Local Variable - Object */ + jvmtiError (JNICALL *GetLocalObject) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jobject* value_ptr); + + /* 22 : Get Local Variable - Int */ + jvmtiError (JNICALL *GetLocalInt) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jint* value_ptr); + + /* 23 : Get Local Variable - Long */ + jvmtiError (JNICALL *GetLocalLong) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jlong* value_ptr); + + /* 24 : Get Local Variable - Float */ + jvmtiError (JNICALL *GetLocalFloat) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jfloat* value_ptr); + + /* 25 : Get Local Variable - Double */ + jvmtiError (JNICALL *GetLocalDouble) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jdouble* value_ptr); + + /* 26 : Set Local Variable - Object */ + jvmtiError (JNICALL *SetLocalObject) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jobject value); + + /* 27 : Set Local Variable - Int */ + jvmtiError (JNICALL *SetLocalInt) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jint value); + + /* 28 : Set Local Variable - Long */ + jvmtiError (JNICALL *SetLocalLong) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jlong value); + + /* 29 : Set Local Variable - Float */ + jvmtiError (JNICALL *SetLocalFloat) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jfloat value); + + /* 30 : Set Local Variable - Double */ + jvmtiError (JNICALL *SetLocalDouble) (jvmtiEnv* env, + jthread thread, + jint depth, + jint slot, + jdouble value); + + /* 31 : Create Raw Monitor */ + jvmtiError (JNICALL *CreateRawMonitor) (jvmtiEnv* env, + const char* name, + jrawMonitorID* monitor_ptr); + + /* 32 : Destroy Raw Monitor */ + jvmtiError (JNICALL *DestroyRawMonitor) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 33 : Raw Monitor Enter */ + jvmtiError (JNICALL *RawMonitorEnter) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 34 : Raw Monitor Exit */ + jvmtiError (JNICALL *RawMonitorExit) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 35 : Raw Monitor Wait */ + jvmtiError (JNICALL *RawMonitorWait) (jvmtiEnv* env, + jrawMonitorID monitor, + jlong millis); + + /* 36 : Raw Monitor Notify */ + jvmtiError (JNICALL *RawMonitorNotify) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 37 : Raw Monitor Notify All */ + jvmtiError (JNICALL *RawMonitorNotifyAll) (jvmtiEnv* env, + jrawMonitorID monitor); + + /* 38 : Set Breakpoint */ + jvmtiError (JNICALL *SetBreakpoint) (jvmtiEnv* env, + jmethodID method, + jlocation location); + + /* 39 : Clear Breakpoint */ + jvmtiError (JNICALL *ClearBreakpoint) (jvmtiEnv* env, + jmethodID method, + jlocation location); + + /* 40 : Get Named Module */ + jvmtiError (JNICALL *GetNamedModule) (jvmtiEnv* env, + jobject class_loader, + const char* package_name, + jobject* module_ptr); + + /* 41 : Set Field Access Watch */ + jvmtiError (JNICALL *SetFieldAccessWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 42 : Clear Field Access Watch */ + jvmtiError (JNICALL *ClearFieldAccessWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 43 : Set Field Modification Watch */ + jvmtiError (JNICALL *SetFieldModificationWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 44 : Clear Field Modification Watch */ + jvmtiError (JNICALL *ClearFieldModificationWatch) (jvmtiEnv* env, + jclass klass, + jfieldID field); + + /* 45 : Is Modifiable Class */ + jvmtiError (JNICALL *IsModifiableClass) (jvmtiEnv* env, + jclass klass, + jboolean* is_modifiable_class_ptr); + + /* 46 : Allocate */ + jvmtiError (JNICALL *Allocate) (jvmtiEnv* env, + jlong size, + unsigned char** mem_ptr); + + /* 47 : Deallocate */ + jvmtiError (JNICALL *Deallocate) (jvmtiEnv* env, + unsigned char* mem); + + /* 48 : Get Class Signature */ + jvmtiError (JNICALL *GetClassSignature) (jvmtiEnv* env, + jclass klass, + char** signature_ptr, + char** generic_ptr); + + /* 49 : Get Class Status */ + jvmtiError (JNICALL *GetClassStatus) (jvmtiEnv* env, + jclass klass, + jint* status_ptr); + + /* 50 : Get Source File Name */ + jvmtiError (JNICALL *GetSourceFileName) (jvmtiEnv* env, + jclass klass, + char** source_name_ptr); + + /* 51 : Get Class Modifiers */ + jvmtiError (JNICALL *GetClassModifiers) (jvmtiEnv* env, + jclass klass, + jint* modifiers_ptr); + + /* 52 : Get Class Methods */ + jvmtiError (JNICALL *GetClassMethods) (jvmtiEnv* env, + jclass klass, + jint* method_count_ptr, + jmethodID** methods_ptr); + + /* 53 : Get Class Fields */ + jvmtiError (JNICALL *GetClassFields) (jvmtiEnv* env, + jclass klass, + jint* field_count_ptr, + jfieldID** fields_ptr); + + /* 54 : Get Implemented Interfaces */ + jvmtiError (JNICALL *GetImplementedInterfaces) (jvmtiEnv* env, + jclass klass, + jint* interface_count_ptr, + jclass** interfaces_ptr); + + /* 55 : Is Interface */ + jvmtiError (JNICALL *IsInterface) (jvmtiEnv* env, + jclass klass, + jboolean* is_interface_ptr); + + /* 56 : Is Array Class */ + jvmtiError (JNICALL *IsArrayClass) (jvmtiEnv* env, + jclass klass, + jboolean* is_array_class_ptr); + + /* 57 : Get Class Loader */ + jvmtiError (JNICALL *GetClassLoader) (jvmtiEnv* env, + jclass klass, + jobject* classloader_ptr); + + /* 58 : Get Object Hash Code */ + jvmtiError (JNICALL *GetObjectHashCode) (jvmtiEnv* env, + jobject object, + jint* hash_code_ptr); + + /* 59 : Get Object Monitor Usage */ + jvmtiError (JNICALL *GetObjectMonitorUsage) (jvmtiEnv* env, + jobject object, + jvmtiMonitorUsage* info_ptr); + + /* 60 : Get Field Name (and Signature) */ + jvmtiError (JNICALL *GetFieldName) (jvmtiEnv* env, + jclass klass, + jfieldID field, + char** name_ptr, + char** signature_ptr, + char** generic_ptr); + + /* 61 : Get Field Declaring Class */ + jvmtiError (JNICALL *GetFieldDeclaringClass) (jvmtiEnv* env, + jclass klass, + jfieldID field, + jclass* declaring_class_ptr); + + /* 62 : Get Field Modifiers */ + jvmtiError (JNICALL *GetFieldModifiers) (jvmtiEnv* env, + jclass klass, + jfieldID field, + jint* modifiers_ptr); + + /* 63 : Is Field Synthetic */ + jvmtiError (JNICALL *IsFieldSynthetic) (jvmtiEnv* env, + jclass klass, + jfieldID field, + jboolean* is_synthetic_ptr); + + /* 64 : Get Method Name (and Signature) */ + jvmtiError (JNICALL *GetMethodName) (jvmtiEnv* env, + jmethodID method, + char** name_ptr, + char** signature_ptr, + char** generic_ptr); + + /* 65 : Get Method Declaring Class */ + jvmtiError (JNICALL *GetMethodDeclaringClass) (jvmtiEnv* env, + jmethodID method, + jclass* declaring_class_ptr); + + /* 66 : Get Method Modifiers */ + jvmtiError (JNICALL *GetMethodModifiers) (jvmtiEnv* env, + jmethodID method, + jint* modifiers_ptr); + + /* 67 : RESERVED */ + void *reserved67; + + /* 68 : Get Max Locals */ + jvmtiError (JNICALL *GetMaxLocals) (jvmtiEnv* env, + jmethodID method, + jint* max_ptr); + + /* 69 : Get Arguments Size */ + jvmtiError (JNICALL *GetArgumentsSize) (jvmtiEnv* env, + jmethodID method, + jint* size_ptr); + + /* 70 : Get Line Number Table */ + jvmtiError (JNICALL *GetLineNumberTable) (jvmtiEnv* env, + jmethodID method, + jint* entry_count_ptr, + jvmtiLineNumberEntry** table_ptr); + + /* 71 : Get Method Location */ + jvmtiError (JNICALL *GetMethodLocation) (jvmtiEnv* env, + jmethodID method, + jlocation* start_location_ptr, + jlocation* end_location_ptr); + + /* 72 : Get Local Variable Table */ + jvmtiError (JNICALL *GetLocalVariableTable) (jvmtiEnv* env, + jmethodID method, + jint* entry_count_ptr, + jvmtiLocalVariableEntry** table_ptr); + + /* 73 : Set Native Method Prefix */ + jvmtiError (JNICALL *SetNativeMethodPrefix) (jvmtiEnv* env, + const char* prefix); + + /* 74 : Set Native Method Prefixes */ + jvmtiError (JNICALL *SetNativeMethodPrefixes) (jvmtiEnv* env, + jint prefix_count, + char** prefixes); + + /* 75 : Get Bytecodes */ + jvmtiError (JNICALL *GetBytecodes) (jvmtiEnv* env, + jmethodID method, + jint* bytecode_count_ptr, + unsigned char** bytecodes_ptr); + + /* 76 : Is Method Native */ + jvmtiError (JNICALL *IsMethodNative) (jvmtiEnv* env, + jmethodID method, + jboolean* is_native_ptr); + + /* 77 : Is Method Synthetic */ + jvmtiError (JNICALL *IsMethodSynthetic) (jvmtiEnv* env, + jmethodID method, + jboolean* is_synthetic_ptr); + + /* 78 : Get Loaded Classes */ + jvmtiError (JNICALL *GetLoadedClasses) (jvmtiEnv* env, + jint* class_count_ptr, + jclass** classes_ptr); + + /* 79 : Get Classloader Classes */ + jvmtiError (JNICALL *GetClassLoaderClasses) (jvmtiEnv* env, + jobject initiating_loader, + jint* class_count_ptr, + jclass** classes_ptr); + + /* 80 : Pop Frame */ + jvmtiError (JNICALL *PopFrame) (jvmtiEnv* env, + jthread thread); + + /* 81 : Force Early Return - Object */ + jvmtiError (JNICALL *ForceEarlyReturnObject) (jvmtiEnv* env, + jthread thread, + jobject value); + + /* 82 : Force Early Return - Int */ + jvmtiError (JNICALL *ForceEarlyReturnInt) (jvmtiEnv* env, + jthread thread, + jint value); + + /* 83 : Force Early Return - Long */ + jvmtiError (JNICALL *ForceEarlyReturnLong) (jvmtiEnv* env, + jthread thread, + jlong value); + + /* 84 : Force Early Return - Float */ + jvmtiError (JNICALL *ForceEarlyReturnFloat) (jvmtiEnv* env, + jthread thread, + jfloat value); + + /* 85 : Force Early Return - Double */ + jvmtiError (JNICALL *ForceEarlyReturnDouble) (jvmtiEnv* env, + jthread thread, + jdouble value); + + /* 86 : Force Early Return - Void */ + jvmtiError (JNICALL *ForceEarlyReturnVoid) (jvmtiEnv* env, + jthread thread); + + /* 87 : Redefine Classes */ + jvmtiError (JNICALL *RedefineClasses) (jvmtiEnv* env, + jint class_count, + const jvmtiClassDefinition* class_definitions); + + /* 88 : Get Version Number */ + jvmtiError (JNICALL *GetVersionNumber) (jvmtiEnv* env, + jint* version_ptr); + + /* 89 : Get Capabilities */ + jvmtiError (JNICALL *GetCapabilities) (jvmtiEnv* env, + jvmtiCapabilities* capabilities_ptr); + + /* 90 : Get Source Debug Extension */ + jvmtiError (JNICALL *GetSourceDebugExtension) (jvmtiEnv* env, + jclass klass, + char** source_debug_extension_ptr); + + /* 91 : Is Method Obsolete */ + jvmtiError (JNICALL *IsMethodObsolete) (jvmtiEnv* env, + jmethodID method, + jboolean* is_obsolete_ptr); + + /* 92 : Suspend Thread List */ + jvmtiError (JNICALL *SuspendThreadList) (jvmtiEnv* env, + jint request_count, + const jthread* request_list, + jvmtiError* results); + + /* 93 : Resume Thread List */ + jvmtiError (JNICALL *ResumeThreadList) (jvmtiEnv* env, + jint request_count, + const jthread* request_list, + jvmtiError* results); + + /* 94 : Add Module Reads */ + jvmtiError (JNICALL *AddModuleReads) (jvmtiEnv* env, + jobject module, + jobject to_module); + + /* 95 : Add Module Exports */ + jvmtiError (JNICALL *AddModuleExports) (jvmtiEnv* env, + jobject module, + const char* pkg_name, + jobject to_module); + + /* 96 : Add Module Opens */ + jvmtiError (JNICALL *AddModuleOpens) (jvmtiEnv* env, + jobject module, + const char* pkg_name, + jobject to_module); + + /* 97 : Add Module Uses */ + jvmtiError (JNICALL *AddModuleUses) (jvmtiEnv* env, + jobject module, + jclass service); + + /* 98 : Add Module Provides */ + jvmtiError (JNICALL *AddModuleProvides) (jvmtiEnv* env, + jobject module, + jclass service, + jclass impl_class); + + /* 99 : Is Modifiable Module */ + jvmtiError (JNICALL *IsModifiableModule) (jvmtiEnv* env, + jobject module, + jboolean* is_modifiable_module_ptr); + + /* 100 : Get All Stack Traces */ + jvmtiError (JNICALL *GetAllStackTraces) (jvmtiEnv* env, + jint max_frame_count, + jvmtiStackInfo** stack_info_ptr, + jint* thread_count_ptr); + + /* 101 : Get Thread List Stack Traces */ + jvmtiError (JNICALL *GetThreadListStackTraces) (jvmtiEnv* env, + jint thread_count, + const jthread* thread_list, + jint max_frame_count, + jvmtiStackInfo** stack_info_ptr); + + /* 102 : Get Thread Local Storage */ + jvmtiError (JNICALL *GetThreadLocalStorage) (jvmtiEnv* env, + jthread thread, + void** data_ptr); + + /* 103 : Set Thread Local Storage */ + jvmtiError (JNICALL *SetThreadLocalStorage) (jvmtiEnv* env, + jthread thread, + const void* data); + + /* 104 : Get Stack Trace */ + jvmtiError (JNICALL *GetStackTrace) (jvmtiEnv* env, + jthread thread, + jint start_depth, + jint max_frame_count, + jvmtiFrameInfo* frame_buffer, + jint* count_ptr); + + /* 105 : RESERVED */ + void *reserved105; + + /* 106 : Get Tag */ + jvmtiError (JNICALL *GetTag) (jvmtiEnv* env, + jobject object, + jlong* tag_ptr); + + /* 107 : Set Tag */ + jvmtiError (JNICALL *SetTag) (jvmtiEnv* env, + jobject object, + jlong tag); + + /* 108 : Force Garbage Collection */ + jvmtiError (JNICALL *ForceGarbageCollection) (jvmtiEnv* env); + + /* 109 : Iterate Over Objects Reachable From Object */ + jvmtiError (JNICALL *IterateOverObjectsReachableFromObject) (jvmtiEnv* env, + jobject object, + jvmtiObjectReferenceCallback object_reference_callback, + const void* user_data); + + /* 110 : Iterate Over Reachable Objects */ + jvmtiError (JNICALL *IterateOverReachableObjects) (jvmtiEnv* env, + jvmtiHeapRootCallback heap_root_callback, + jvmtiStackReferenceCallback stack_ref_callback, + jvmtiObjectReferenceCallback object_ref_callback, + const void* user_data); + + /* 111 : Iterate Over Heap */ + jvmtiError (JNICALL *IterateOverHeap) (jvmtiEnv* env, + jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data); + + /* 112 : Iterate Over Instances Of Class */ + jvmtiError (JNICALL *IterateOverInstancesOfClass) (jvmtiEnv* env, + jclass klass, + jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data); + + /* 113 : RESERVED */ + void *reserved113; + + /* 114 : Get Objects With Tags */ + jvmtiError (JNICALL *GetObjectsWithTags) (jvmtiEnv* env, + jint tag_count, + const jlong* tags, + jint* count_ptr, + jobject** object_result_ptr, + jlong** tag_result_ptr); + + /* 115 : Follow References */ + jvmtiError (JNICALL *FollowReferences) (jvmtiEnv* env, + jint heap_filter, + jclass klass, + jobject initial_object, + const jvmtiHeapCallbacks* callbacks, + const void* user_data); + + /* 116 : Iterate Through Heap */ + jvmtiError (JNICALL *IterateThroughHeap) (jvmtiEnv* env, + jint heap_filter, + jclass klass, + const jvmtiHeapCallbacks* callbacks, + const void* user_data); + + /* 117 : RESERVED */ + void *reserved117; + + /* 118 : Suspend All Virtual Threads */ + jvmtiError (JNICALL *SuspendAllVirtualThreads) (jvmtiEnv* env, + jint except_count, + const jthread* except_list); + + /* 119 : Resume All Virtual Threads */ + jvmtiError (JNICALL *ResumeAllVirtualThreads) (jvmtiEnv* env, + jint except_count, + const jthread* except_list); + + /* 120 : Set JNI Function Table */ + jvmtiError (JNICALL *SetJNIFunctionTable) (jvmtiEnv* env, + const jniNativeInterface* function_table); + + /* 121 : Get JNI Function Table */ + jvmtiError (JNICALL *GetJNIFunctionTable) (jvmtiEnv* env, + jniNativeInterface** function_table); + + /* 122 : Set Event Callbacks */ + jvmtiError (JNICALL *SetEventCallbacks) (jvmtiEnv* env, + const jvmtiEventCallbacks* callbacks, + jint size_of_callbacks); + + /* 123 : Generate Events */ + jvmtiError (JNICALL *GenerateEvents) (jvmtiEnv* env, + jvmtiEvent event_type); + + /* 124 : Get Extension Functions */ + jvmtiError (JNICALL *GetExtensionFunctions) (jvmtiEnv* env, + jint* extension_count_ptr, + jvmtiExtensionFunctionInfo** extensions); + + /* 125 : Get Extension Events */ + jvmtiError (JNICALL *GetExtensionEvents) (jvmtiEnv* env, + jint* extension_count_ptr, + jvmtiExtensionEventInfo** extensions); + + /* 126 : Set Extension Event Callback */ + jvmtiError (JNICALL *SetExtensionEventCallback) (jvmtiEnv* env, + jint extension_event_index, + jvmtiExtensionEvent callback); + + /* 127 : Dispose Environment */ + jvmtiError (JNICALL *DisposeEnvironment) (jvmtiEnv* env); + + /* 128 : Get Error Name */ + jvmtiError (JNICALL *GetErrorName) (jvmtiEnv* env, + jvmtiError error, + char** name_ptr); + + /* 129 : Get JLocation Format */ + jvmtiError (JNICALL *GetJLocationFormat) (jvmtiEnv* env, + jvmtiJlocationFormat* format_ptr); + + /* 130 : Get System Properties */ + jvmtiError (JNICALL *GetSystemProperties) (jvmtiEnv* env, + jint* count_ptr, + char*** property_ptr); + + /* 131 : Get System Property */ + jvmtiError (JNICALL *GetSystemProperty) (jvmtiEnv* env, + const char* property, + char** value_ptr); + + /* 132 : Set System Property */ + jvmtiError (JNICALL *SetSystemProperty) (jvmtiEnv* env, + const char* property, + const char* value_ptr); + + /* 133 : Get Phase */ + jvmtiError (JNICALL *GetPhase) (jvmtiEnv* env, + jvmtiPhase* phase_ptr); + + /* 134 : Get Current Thread CPU Timer Information */ + jvmtiError (JNICALL *GetCurrentThreadCpuTimerInfo) (jvmtiEnv* env, + jvmtiTimerInfo* info_ptr); + + /* 135 : Get Current Thread CPU Time */ + jvmtiError (JNICALL *GetCurrentThreadCpuTime) (jvmtiEnv* env, + jlong* nanos_ptr); + + /* 136 : Get Thread CPU Timer Information */ + jvmtiError (JNICALL *GetThreadCpuTimerInfo) (jvmtiEnv* env, + jvmtiTimerInfo* info_ptr); + + /* 137 : Get Thread CPU Time */ + jvmtiError (JNICALL *GetThreadCpuTime) (jvmtiEnv* env, + jthread thread, + jlong* nanos_ptr); + + /* 138 : Get Timer Information */ + jvmtiError (JNICALL *GetTimerInfo) (jvmtiEnv* env, + jvmtiTimerInfo* info_ptr); + + /* 139 : Get Time */ + jvmtiError (JNICALL *GetTime) (jvmtiEnv* env, + jlong* nanos_ptr); + + /* 140 : Get Potential Capabilities */ + jvmtiError (JNICALL *GetPotentialCapabilities) (jvmtiEnv* env, + jvmtiCapabilities* capabilities_ptr); + + /* 141 : RESERVED */ + void *reserved141; + + /* 142 : Add Capabilities */ + jvmtiError (JNICALL *AddCapabilities) (jvmtiEnv* env, + const jvmtiCapabilities* capabilities_ptr); + + /* 143 : Relinquish Capabilities */ + jvmtiError (JNICALL *RelinquishCapabilities) (jvmtiEnv* env, + const jvmtiCapabilities* capabilities_ptr); + + /* 144 : Get Available Processors */ + jvmtiError (JNICALL *GetAvailableProcessors) (jvmtiEnv* env, + jint* processor_count_ptr); + + /* 145 : Get Class Version Numbers */ + jvmtiError (JNICALL *GetClassVersionNumbers) (jvmtiEnv* env, + jclass klass, + jint* minor_version_ptr, + jint* major_version_ptr); + + /* 146 : Get Constant Pool */ + jvmtiError (JNICALL *GetConstantPool) (jvmtiEnv* env, + jclass klass, + jint* constant_pool_count_ptr, + jint* constant_pool_byte_count_ptr, + unsigned char** constant_pool_bytes_ptr); + + /* 147 : Get Environment Local Storage */ + jvmtiError (JNICALL *GetEnvironmentLocalStorage) (jvmtiEnv* env, + void** data_ptr); + + /* 148 : Set Environment Local Storage */ + jvmtiError (JNICALL *SetEnvironmentLocalStorage) (jvmtiEnv* env, + const void* data); + + /* 149 : Add To Bootstrap Class Loader Search */ + jvmtiError (JNICALL *AddToBootstrapClassLoaderSearch) (jvmtiEnv* env, + const char* segment); + + /* 150 : Set Verbose Flag */ + jvmtiError (JNICALL *SetVerboseFlag) (jvmtiEnv* env, + jvmtiVerboseFlag flag, + jboolean value); + + /* 151 : Add To System Class Loader Search */ + jvmtiError (JNICALL *AddToSystemClassLoaderSearch) (jvmtiEnv* env, + const char* segment); + + /* 152 : Retransform Classes */ + jvmtiError (JNICALL *RetransformClasses) (jvmtiEnv* env, + jint class_count, + const jclass* classes); + + /* 153 : Get Owned Monitor Stack Depth Info */ + jvmtiError (JNICALL *GetOwnedMonitorStackDepthInfo) (jvmtiEnv* env, + jthread thread, + jint* monitor_info_count_ptr, + jvmtiMonitorStackDepthInfo** monitor_info_ptr); + + /* 154 : Get Object Size */ + jvmtiError (JNICALL *GetObjectSize) (jvmtiEnv* env, + jobject object, + jlong* size_ptr); + + /* 155 : Get Local Instance */ + jvmtiError (JNICALL *GetLocalInstance) (jvmtiEnv* env, + jthread thread, + jint depth, + jobject* value_ptr); + + /* 156 : Set Heap Sampling Interval */ + jvmtiError (JNICALL *SetHeapSamplingInterval) (jvmtiEnv* env, + jint sampling_interval); + +} jvmtiInterface_1; + +struct _jvmtiEnv { + const struct jvmtiInterface_1_ *functions; +#ifdef __cplusplus + + + jvmtiError Allocate(jlong size, + unsigned char** mem_ptr) { + return functions->Allocate(this, size, mem_ptr); + } + + jvmtiError Deallocate(unsigned char* mem) { + return functions->Deallocate(this, mem); + } + + jvmtiError GetThreadState(jthread thread, + jint* thread_state_ptr) { + return functions->GetThreadState(this, thread, thread_state_ptr); + } + + jvmtiError GetCurrentThread(jthread* thread_ptr) { + return functions->GetCurrentThread(this, thread_ptr); + } + + jvmtiError GetAllThreads(jint* threads_count_ptr, + jthread** threads_ptr) { + return functions->GetAllThreads(this, threads_count_ptr, threads_ptr); + } + + jvmtiError SuspendThread(jthread thread) { + return functions->SuspendThread(this, thread); + } + + jvmtiError SuspendThreadList(jint request_count, + const jthread* request_list, + jvmtiError* results) { + return functions->SuspendThreadList(this, request_count, request_list, results); + } + + jvmtiError SuspendAllVirtualThreads(jint except_count, + const jthread* except_list) { + return functions->SuspendAllVirtualThreads(this, except_count, except_list); + } + + jvmtiError ResumeThread(jthread thread) { + return functions->ResumeThread(this, thread); + } + + jvmtiError ResumeThreadList(jint request_count, + const jthread* request_list, + jvmtiError* results) { + return functions->ResumeThreadList(this, request_count, request_list, results); + } + + jvmtiError ResumeAllVirtualThreads(jint except_count, + const jthread* except_list) { + return functions->ResumeAllVirtualThreads(this, except_count, except_list); + } + + jvmtiError StopThread(jthread thread, + jobject exception) { + return functions->StopThread(this, thread, exception); + } + + jvmtiError InterruptThread(jthread thread) { + return functions->InterruptThread(this, thread); + } + + jvmtiError GetThreadInfo(jthread thread, + jvmtiThreadInfo* info_ptr) { + return functions->GetThreadInfo(this, thread, info_ptr); + } + + jvmtiError GetOwnedMonitorInfo(jthread thread, + jint* owned_monitor_count_ptr, + jobject** owned_monitors_ptr) { + return functions->GetOwnedMonitorInfo(this, thread, owned_monitor_count_ptr, owned_monitors_ptr); + } + + jvmtiError GetOwnedMonitorStackDepthInfo(jthread thread, + jint* monitor_info_count_ptr, + jvmtiMonitorStackDepthInfo** monitor_info_ptr) { + return functions->GetOwnedMonitorStackDepthInfo(this, thread, monitor_info_count_ptr, monitor_info_ptr); + } + + jvmtiError GetCurrentContendedMonitor(jthread thread, + jobject* monitor_ptr) { + return functions->GetCurrentContendedMonitor(this, thread, monitor_ptr); + } + + jvmtiError RunAgentThread(jthread thread, + jvmtiStartFunction proc, + const void* arg, + jint priority) { + return functions->RunAgentThread(this, thread, proc, arg, priority); + } + + jvmtiError SetThreadLocalStorage(jthread thread, + const void* data) { + return functions->SetThreadLocalStorage(this, thread, data); + } + + jvmtiError GetThreadLocalStorage(jthread thread, + void** data_ptr) { + return functions->GetThreadLocalStorage(this, thread, data_ptr); + } + + jvmtiError GetTopThreadGroups(jint* group_count_ptr, + jthreadGroup** groups_ptr) { + return functions->GetTopThreadGroups(this, group_count_ptr, groups_ptr); + } + + jvmtiError GetThreadGroupInfo(jthreadGroup group, + jvmtiThreadGroupInfo* info_ptr) { + return functions->GetThreadGroupInfo(this, group, info_ptr); + } + + jvmtiError GetThreadGroupChildren(jthreadGroup group, + jint* thread_count_ptr, + jthread** threads_ptr, + jint* group_count_ptr, + jthreadGroup** groups_ptr) { + return functions->GetThreadGroupChildren(this, group, thread_count_ptr, threads_ptr, group_count_ptr, groups_ptr); + } + + jvmtiError GetStackTrace(jthread thread, + jint start_depth, + jint max_frame_count, + jvmtiFrameInfo* frame_buffer, + jint* count_ptr) { + return functions->GetStackTrace(this, thread, start_depth, max_frame_count, frame_buffer, count_ptr); + } + + jvmtiError GetAllStackTraces(jint max_frame_count, + jvmtiStackInfo** stack_info_ptr, + jint* thread_count_ptr) { + return functions->GetAllStackTraces(this, max_frame_count, stack_info_ptr, thread_count_ptr); + } + + jvmtiError GetThreadListStackTraces(jint thread_count, + const jthread* thread_list, + jint max_frame_count, + jvmtiStackInfo** stack_info_ptr) { + return functions->GetThreadListStackTraces(this, thread_count, thread_list, max_frame_count, stack_info_ptr); + } + + jvmtiError GetFrameCount(jthread thread, + jint* count_ptr) { + return functions->GetFrameCount(this, thread, count_ptr); + } + + jvmtiError PopFrame(jthread thread) { + return functions->PopFrame(this, thread); + } + + jvmtiError GetFrameLocation(jthread thread, + jint depth, + jmethodID* method_ptr, + jlocation* location_ptr) { + return functions->GetFrameLocation(this, thread, depth, method_ptr, location_ptr); + } + + jvmtiError NotifyFramePop(jthread thread, + jint depth) { + return functions->NotifyFramePop(this, thread, depth); + } + + jvmtiError ForceEarlyReturnObject(jthread thread, + jobject value) { + return functions->ForceEarlyReturnObject(this, thread, value); + } + + jvmtiError ForceEarlyReturnInt(jthread thread, + jint value) { + return functions->ForceEarlyReturnInt(this, thread, value); + } + + jvmtiError ForceEarlyReturnLong(jthread thread, + jlong value) { + return functions->ForceEarlyReturnLong(this, thread, value); + } + + jvmtiError ForceEarlyReturnFloat(jthread thread, + jfloat value) { + return functions->ForceEarlyReturnFloat(this, thread, value); + } + + jvmtiError ForceEarlyReturnDouble(jthread thread, + jdouble value) { + return functions->ForceEarlyReturnDouble(this, thread, value); + } + + jvmtiError ForceEarlyReturnVoid(jthread thread) { + return functions->ForceEarlyReturnVoid(this, thread); + } + + jvmtiError FollowReferences(jint heap_filter, + jclass klass, + jobject initial_object, + const jvmtiHeapCallbacks* callbacks, + const void* user_data) { + return functions->FollowReferences(this, heap_filter, klass, initial_object, callbacks, user_data); + } + + jvmtiError IterateThroughHeap(jint heap_filter, + jclass klass, + const jvmtiHeapCallbacks* callbacks, + const void* user_data) { + return functions->IterateThroughHeap(this, heap_filter, klass, callbacks, user_data); + } + + jvmtiError GetTag(jobject object, + jlong* tag_ptr) { + return functions->GetTag(this, object, tag_ptr); + } + + jvmtiError SetTag(jobject object, + jlong tag) { + return functions->SetTag(this, object, tag); + } + + jvmtiError GetObjectsWithTags(jint tag_count, + const jlong* tags, + jint* count_ptr, + jobject** object_result_ptr, + jlong** tag_result_ptr) { + return functions->GetObjectsWithTags(this, tag_count, tags, count_ptr, object_result_ptr, tag_result_ptr); + } + + jvmtiError ForceGarbageCollection() { + return functions->ForceGarbageCollection(this); + } + + jvmtiError IterateOverObjectsReachableFromObject(jobject object, + jvmtiObjectReferenceCallback object_reference_callback, + const void* user_data) { + return functions->IterateOverObjectsReachableFromObject(this, object, object_reference_callback, user_data); + } + + jvmtiError IterateOverReachableObjects(jvmtiHeapRootCallback heap_root_callback, + jvmtiStackReferenceCallback stack_ref_callback, + jvmtiObjectReferenceCallback object_ref_callback, + const void* user_data) { + return functions->IterateOverReachableObjects(this, heap_root_callback, stack_ref_callback, object_ref_callback, user_data); + } + + jvmtiError IterateOverHeap(jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data) { + return functions->IterateOverHeap(this, object_filter, heap_object_callback, user_data); + } + + jvmtiError IterateOverInstancesOfClass(jclass klass, + jvmtiHeapObjectFilter object_filter, + jvmtiHeapObjectCallback heap_object_callback, + const void* user_data) { + return functions->IterateOverInstancesOfClass(this, klass, object_filter, heap_object_callback, user_data); + } + + jvmtiError GetLocalObject(jthread thread, + jint depth, + jint slot, + jobject* value_ptr) { + return functions->GetLocalObject(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalInstance(jthread thread, + jint depth, + jobject* value_ptr) { + return functions->GetLocalInstance(this, thread, depth, value_ptr); + } + + jvmtiError GetLocalInt(jthread thread, + jint depth, + jint slot, + jint* value_ptr) { + return functions->GetLocalInt(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalLong(jthread thread, + jint depth, + jint slot, + jlong* value_ptr) { + return functions->GetLocalLong(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalFloat(jthread thread, + jint depth, + jint slot, + jfloat* value_ptr) { + return functions->GetLocalFloat(this, thread, depth, slot, value_ptr); + } + + jvmtiError GetLocalDouble(jthread thread, + jint depth, + jint slot, + jdouble* value_ptr) { + return functions->GetLocalDouble(this, thread, depth, slot, value_ptr); + } + + jvmtiError SetLocalObject(jthread thread, + jint depth, + jint slot, + jobject value) { + return functions->SetLocalObject(this, thread, depth, slot, value); + } + + jvmtiError SetLocalInt(jthread thread, + jint depth, + jint slot, + jint value) { + return functions->SetLocalInt(this, thread, depth, slot, value); + } + + jvmtiError SetLocalLong(jthread thread, + jint depth, + jint slot, + jlong value) { + return functions->SetLocalLong(this, thread, depth, slot, value); + } + + jvmtiError SetLocalFloat(jthread thread, + jint depth, + jint slot, + jfloat value) { + return functions->SetLocalFloat(this, thread, depth, slot, value); + } + + jvmtiError SetLocalDouble(jthread thread, + jint depth, + jint slot, + jdouble value) { + return functions->SetLocalDouble(this, thread, depth, slot, value); + } + + jvmtiError SetBreakpoint(jmethodID method, + jlocation location) { + return functions->SetBreakpoint(this, method, location); + } + + jvmtiError ClearBreakpoint(jmethodID method, + jlocation location) { + return functions->ClearBreakpoint(this, method, location); + } + + jvmtiError SetFieldAccessWatch(jclass klass, + jfieldID field) { + return functions->SetFieldAccessWatch(this, klass, field); + } + + jvmtiError ClearFieldAccessWatch(jclass klass, + jfieldID field) { + return functions->ClearFieldAccessWatch(this, klass, field); + } + + jvmtiError SetFieldModificationWatch(jclass klass, + jfieldID field) { + return functions->SetFieldModificationWatch(this, klass, field); + } + + jvmtiError ClearFieldModificationWatch(jclass klass, + jfieldID field) { + return functions->ClearFieldModificationWatch(this, klass, field); + } + + jvmtiError GetAllModules(jint* module_count_ptr, + jobject** modules_ptr) { + return functions->GetAllModules(this, module_count_ptr, modules_ptr); + } + + jvmtiError GetNamedModule(jobject class_loader, + const char* package_name, + jobject* module_ptr) { + return functions->GetNamedModule(this, class_loader, package_name, module_ptr); + } + + jvmtiError AddModuleReads(jobject module, + jobject to_module) { + return functions->AddModuleReads(this, module, to_module); + } + + jvmtiError AddModuleExports(jobject module, + const char* pkg_name, + jobject to_module) { + return functions->AddModuleExports(this, module, pkg_name, to_module); + } + + jvmtiError AddModuleOpens(jobject module, + const char* pkg_name, + jobject to_module) { + return functions->AddModuleOpens(this, module, pkg_name, to_module); + } + + jvmtiError AddModuleUses(jobject module, + jclass service) { + return functions->AddModuleUses(this, module, service); + } + + jvmtiError AddModuleProvides(jobject module, + jclass service, + jclass impl_class) { + return functions->AddModuleProvides(this, module, service, impl_class); + } + + jvmtiError IsModifiableModule(jobject module, + jboolean* is_modifiable_module_ptr) { + return functions->IsModifiableModule(this, module, is_modifiable_module_ptr); + } + + jvmtiError GetLoadedClasses(jint* class_count_ptr, + jclass** classes_ptr) { + return functions->GetLoadedClasses(this, class_count_ptr, classes_ptr); + } + + jvmtiError GetClassLoaderClasses(jobject initiating_loader, + jint* class_count_ptr, + jclass** classes_ptr) { + return functions->GetClassLoaderClasses(this, initiating_loader, class_count_ptr, classes_ptr); + } + + jvmtiError GetClassSignature(jclass klass, + char** signature_ptr, + char** generic_ptr) { + return functions->GetClassSignature(this, klass, signature_ptr, generic_ptr); + } + + jvmtiError GetClassStatus(jclass klass, + jint* status_ptr) { + return functions->GetClassStatus(this, klass, status_ptr); + } + + jvmtiError GetSourceFileName(jclass klass, + char** source_name_ptr) { + return functions->GetSourceFileName(this, klass, source_name_ptr); + } + + jvmtiError GetClassModifiers(jclass klass, + jint* modifiers_ptr) { + return functions->GetClassModifiers(this, klass, modifiers_ptr); + } + + jvmtiError GetClassMethods(jclass klass, + jint* method_count_ptr, + jmethodID** methods_ptr) { + return functions->GetClassMethods(this, klass, method_count_ptr, methods_ptr); + } + + jvmtiError GetClassFields(jclass klass, + jint* field_count_ptr, + jfieldID** fields_ptr) { + return functions->GetClassFields(this, klass, field_count_ptr, fields_ptr); + } + + jvmtiError GetImplementedInterfaces(jclass klass, + jint* interface_count_ptr, + jclass** interfaces_ptr) { + return functions->GetImplementedInterfaces(this, klass, interface_count_ptr, interfaces_ptr); + } + + jvmtiError GetClassVersionNumbers(jclass klass, + jint* minor_version_ptr, + jint* major_version_ptr) { + return functions->GetClassVersionNumbers(this, klass, minor_version_ptr, major_version_ptr); + } + + jvmtiError GetConstantPool(jclass klass, + jint* constant_pool_count_ptr, + jint* constant_pool_byte_count_ptr, + unsigned char** constant_pool_bytes_ptr) { + return functions->GetConstantPool(this, klass, constant_pool_count_ptr, constant_pool_byte_count_ptr, constant_pool_bytes_ptr); + } + + jvmtiError IsInterface(jclass klass, + jboolean* is_interface_ptr) { + return functions->IsInterface(this, klass, is_interface_ptr); + } + + jvmtiError IsArrayClass(jclass klass, + jboolean* is_array_class_ptr) { + return functions->IsArrayClass(this, klass, is_array_class_ptr); + } + + jvmtiError IsModifiableClass(jclass klass, + jboolean* is_modifiable_class_ptr) { + return functions->IsModifiableClass(this, klass, is_modifiable_class_ptr); + } + + jvmtiError GetClassLoader(jclass klass, + jobject* classloader_ptr) { + return functions->GetClassLoader(this, klass, classloader_ptr); + } + + jvmtiError GetSourceDebugExtension(jclass klass, + char** source_debug_extension_ptr) { + return functions->GetSourceDebugExtension(this, klass, source_debug_extension_ptr); + } + + jvmtiError RetransformClasses(jint class_count, + const jclass* classes) { + return functions->RetransformClasses(this, class_count, classes); + } + + jvmtiError RedefineClasses(jint class_count, + const jvmtiClassDefinition* class_definitions) { + return functions->RedefineClasses(this, class_count, class_definitions); + } + + jvmtiError GetObjectSize(jobject object, + jlong* size_ptr) { + return functions->GetObjectSize(this, object, size_ptr); + } + + jvmtiError GetObjectHashCode(jobject object, + jint* hash_code_ptr) { + return functions->GetObjectHashCode(this, object, hash_code_ptr); + } + + jvmtiError GetObjectMonitorUsage(jobject object, + jvmtiMonitorUsage* info_ptr) { + return functions->GetObjectMonitorUsage(this, object, info_ptr); + } + + jvmtiError GetFieldName(jclass klass, + jfieldID field, + char** name_ptr, + char** signature_ptr, + char** generic_ptr) { + return functions->GetFieldName(this, klass, field, name_ptr, signature_ptr, generic_ptr); + } + + jvmtiError GetFieldDeclaringClass(jclass klass, + jfieldID field, + jclass* declaring_class_ptr) { + return functions->GetFieldDeclaringClass(this, klass, field, declaring_class_ptr); + } + + jvmtiError GetFieldModifiers(jclass klass, + jfieldID field, + jint* modifiers_ptr) { + return functions->GetFieldModifiers(this, klass, field, modifiers_ptr); + } + + jvmtiError IsFieldSynthetic(jclass klass, + jfieldID field, + jboolean* is_synthetic_ptr) { + return functions->IsFieldSynthetic(this, klass, field, is_synthetic_ptr); + } + + jvmtiError GetMethodName(jmethodID method, + char** name_ptr, + char** signature_ptr, + char** generic_ptr) { + return functions->GetMethodName(this, method, name_ptr, signature_ptr, generic_ptr); + } + + jvmtiError GetMethodDeclaringClass(jmethodID method, + jclass* declaring_class_ptr) { + return functions->GetMethodDeclaringClass(this, method, declaring_class_ptr); + } + + jvmtiError GetMethodModifiers(jmethodID method, + jint* modifiers_ptr) { + return functions->GetMethodModifiers(this, method, modifiers_ptr); + } + + jvmtiError GetMaxLocals(jmethodID method, + jint* max_ptr) { + return functions->GetMaxLocals(this, method, max_ptr); + } + + jvmtiError GetArgumentsSize(jmethodID method, + jint* size_ptr) { + return functions->GetArgumentsSize(this, method, size_ptr); + } + + jvmtiError GetLineNumberTable(jmethodID method, + jint* entry_count_ptr, + jvmtiLineNumberEntry** table_ptr) { + return functions->GetLineNumberTable(this, method, entry_count_ptr, table_ptr); + } + + jvmtiError GetMethodLocation(jmethodID method, + jlocation* start_location_ptr, + jlocation* end_location_ptr) { + return functions->GetMethodLocation(this, method, start_location_ptr, end_location_ptr); + } + + jvmtiError GetLocalVariableTable(jmethodID method, + jint* entry_count_ptr, + jvmtiLocalVariableEntry** table_ptr) { + return functions->GetLocalVariableTable(this, method, entry_count_ptr, table_ptr); + } + + jvmtiError GetBytecodes(jmethodID method, + jint* bytecode_count_ptr, + unsigned char** bytecodes_ptr) { + return functions->GetBytecodes(this, method, bytecode_count_ptr, bytecodes_ptr); + } + + jvmtiError IsMethodNative(jmethodID method, + jboolean* is_native_ptr) { + return functions->IsMethodNative(this, method, is_native_ptr); + } + + jvmtiError IsMethodSynthetic(jmethodID method, + jboolean* is_synthetic_ptr) { + return functions->IsMethodSynthetic(this, method, is_synthetic_ptr); + } + + jvmtiError IsMethodObsolete(jmethodID method, + jboolean* is_obsolete_ptr) { + return functions->IsMethodObsolete(this, method, is_obsolete_ptr); + } + + jvmtiError SetNativeMethodPrefix(const char* prefix) { + return functions->SetNativeMethodPrefix(this, prefix); + } + + jvmtiError SetNativeMethodPrefixes(jint prefix_count, + char** prefixes) { + return functions->SetNativeMethodPrefixes(this, prefix_count, prefixes); + } + + jvmtiError CreateRawMonitor(const char* name, + jrawMonitorID* monitor_ptr) { + return functions->CreateRawMonitor(this, name, monitor_ptr); + } + + jvmtiError DestroyRawMonitor(jrawMonitorID monitor) { + return functions->DestroyRawMonitor(this, monitor); + } + + jvmtiError RawMonitorEnter(jrawMonitorID monitor) { + return functions->RawMonitorEnter(this, monitor); + } + + jvmtiError RawMonitorExit(jrawMonitorID monitor) { + return functions->RawMonitorExit(this, monitor); + } + + jvmtiError RawMonitorWait(jrawMonitorID monitor, + jlong millis) { + return functions->RawMonitorWait(this, monitor, millis); + } + + jvmtiError RawMonitorNotify(jrawMonitorID monitor) { + return functions->RawMonitorNotify(this, monitor); + } + + jvmtiError RawMonitorNotifyAll(jrawMonitorID monitor) { + return functions->RawMonitorNotifyAll(this, monitor); + } + + jvmtiError SetJNIFunctionTable(const jniNativeInterface* function_table) { + return functions->SetJNIFunctionTable(this, function_table); + } + + jvmtiError GetJNIFunctionTable(jniNativeInterface** function_table) { + return functions->GetJNIFunctionTable(this, function_table); + } + + jvmtiError SetEventCallbacks(const jvmtiEventCallbacks* callbacks, + jint size_of_callbacks) { + return functions->SetEventCallbacks(this, callbacks, size_of_callbacks); + } + + jvmtiError SetEventNotificationMode(jvmtiEventMode mode, + jvmtiEvent event_type, + jthread event_thread, + ...) { + return functions->SetEventNotificationMode(this, mode, event_type, event_thread); + } + + jvmtiError GenerateEvents(jvmtiEvent event_type) { + return functions->GenerateEvents(this, event_type); + } + + jvmtiError GetExtensionFunctions(jint* extension_count_ptr, + jvmtiExtensionFunctionInfo** extensions) { + return functions->GetExtensionFunctions(this, extension_count_ptr, extensions); + } + + jvmtiError GetExtensionEvents(jint* extension_count_ptr, + jvmtiExtensionEventInfo** extensions) { + return functions->GetExtensionEvents(this, extension_count_ptr, extensions); + } + + jvmtiError SetExtensionEventCallback(jint extension_event_index, + jvmtiExtensionEvent callback) { + return functions->SetExtensionEventCallback(this, extension_event_index, callback); + } + + jvmtiError GetPotentialCapabilities(jvmtiCapabilities* capabilities_ptr) { + return functions->GetPotentialCapabilities(this, capabilities_ptr); + } + + jvmtiError AddCapabilities(const jvmtiCapabilities* capabilities_ptr) { + return functions->AddCapabilities(this, capabilities_ptr); + } + + jvmtiError RelinquishCapabilities(const jvmtiCapabilities* capabilities_ptr) { + return functions->RelinquishCapabilities(this, capabilities_ptr); + } + + jvmtiError GetCapabilities(jvmtiCapabilities* capabilities_ptr) { + return functions->GetCapabilities(this, capabilities_ptr); + } + + jvmtiError GetCurrentThreadCpuTimerInfo(jvmtiTimerInfo* info_ptr) { + return functions->GetCurrentThreadCpuTimerInfo(this, info_ptr); + } + + jvmtiError GetCurrentThreadCpuTime(jlong* nanos_ptr) { + return functions->GetCurrentThreadCpuTime(this, nanos_ptr); + } + + jvmtiError GetThreadCpuTimerInfo(jvmtiTimerInfo* info_ptr) { + return functions->GetThreadCpuTimerInfo(this, info_ptr); + } + + jvmtiError GetThreadCpuTime(jthread thread, + jlong* nanos_ptr) { + return functions->GetThreadCpuTime(this, thread, nanos_ptr); + } + + jvmtiError GetTimerInfo(jvmtiTimerInfo* info_ptr) { + return functions->GetTimerInfo(this, info_ptr); + } + + jvmtiError GetTime(jlong* nanos_ptr) { + return functions->GetTime(this, nanos_ptr); + } + + jvmtiError GetAvailableProcessors(jint* processor_count_ptr) { + return functions->GetAvailableProcessors(this, processor_count_ptr); + } + + jvmtiError AddToBootstrapClassLoaderSearch(const char* segment) { + return functions->AddToBootstrapClassLoaderSearch(this, segment); + } + + jvmtiError AddToSystemClassLoaderSearch(const char* segment) { + return functions->AddToSystemClassLoaderSearch(this, segment); + } + + jvmtiError GetSystemProperties(jint* count_ptr, + char*** property_ptr) { + return functions->GetSystemProperties(this, count_ptr, property_ptr); + } + + jvmtiError GetSystemProperty(const char* property, + char** value_ptr) { + return functions->GetSystemProperty(this, property, value_ptr); + } + + jvmtiError SetSystemProperty(const char* property, + const char* value_ptr) { + return functions->SetSystemProperty(this, property, value_ptr); + } + + jvmtiError GetPhase(jvmtiPhase* phase_ptr) { + return functions->GetPhase(this, phase_ptr); + } + + jvmtiError DisposeEnvironment() { + return functions->DisposeEnvironment(this); + } + + jvmtiError SetEnvironmentLocalStorage(const void* data) { + return functions->SetEnvironmentLocalStorage(this, data); + } + + jvmtiError GetEnvironmentLocalStorage(void** data_ptr) { + return functions->GetEnvironmentLocalStorage(this, data_ptr); + } + + jvmtiError GetVersionNumber(jint* version_ptr) { + return functions->GetVersionNumber(this, version_ptr); + } + + jvmtiError GetErrorName(jvmtiError error, + char** name_ptr) { + return functions->GetErrorName(this, error, name_ptr); + } + + jvmtiError SetVerboseFlag(jvmtiVerboseFlag flag, + jboolean value) { + return functions->SetVerboseFlag(this, flag, value); + } + + jvmtiError GetJLocationFormat(jvmtiJlocationFormat* format_ptr) { + return functions->GetJLocationFormat(this, format_ptr); + } + + jvmtiError SetHeapSamplingInterval(jint sampling_interval) { + return functions->SetHeapSamplingInterval(this, sampling_interval); + } + +#endif /* __cplusplus */ +}; + + +#ifdef __cplusplus +} /* extern "C" */ +#endif /* __cplusplus */ + +#endif /* !_JAVA_JVMTI_H_ */ diff --git a/java21/include/jvmticmlr.h b/java21/include/jvmticmlr.h new file mode 100644 index 0000000000000000000000000000000000000000..c2106d3a7dc27fc1e5de32c7d68edc8a4e0e9dbf --- /dev/null +++ b/java21/include/jvmticmlr.h @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * This header file defines the data structures sent by the VM + * through the JVMTI CompiledMethodLoad callback function via the + * "void * compile_info" parameter. The memory pointed to by the + * compile_info parameter may not be referenced after returning from + * the CompiledMethodLoad callback. These are VM implementation + * specific data structures that may evolve in future releases. A + * JVMTI agent should interpret a non-NULL compile_info as a pointer + * to a region of memory containing a list of records. In a typical + * usage scenario, a JVMTI agent would cast each record to a + * jvmtiCompiledMethodLoadRecordHeader, a struct that represents + * arbitrary information. This struct contains a kind field to indicate + * the kind of information being passed, and a pointer to the next + * record. If the kind field indicates inlining information, then the + * agent would cast the record to a jvmtiCompiledMethodLoadInlineRecord. + * This record contains an array of PCStackInfo structs, which indicate + * for every pc address what are the methods on the invocation stack. + * The "methods" and "bcis" fields in each PCStackInfo struct specify a + * 1-1 mapping between these inlined methods and their bytecode indices. + * This can be used to derive the proper source lines of the inlined + * methods. + */ + +#ifndef _JVMTI_CMLR_H_ +#define _JVMTI_CMLR_H_ + +enum { + JVMTI_CMLR_MAJOR_VERSION_1 = 0x00000001, + JVMTI_CMLR_MINOR_VERSION_0 = 0x00000000, + + JVMTI_CMLR_MAJOR_VERSION = 0x00000001, + JVMTI_CMLR_MINOR_VERSION = 0x00000000 + + /* + * This comment is for the "JDK import from HotSpot" sanity check: + * version: 1.0.0 + */ +}; + +typedef enum { + JVMTI_CMLR_DUMMY = 1, + JVMTI_CMLR_INLINE_INFO = 2 +} jvmtiCMLRKind; + +/* + * Record that represents arbitrary information passed through JVMTI + * CompiledMethodLoadEvent void pointer. + */ +typedef struct _jvmtiCompiledMethodLoadRecordHeader { + jvmtiCMLRKind kind; /* id for the kind of info passed in the record */ + jint majorinfoversion; /* major and minor info version values. Init'ed */ + jint minorinfoversion; /* to current version value in jvmtiExport.cpp. */ + + struct _jvmtiCompiledMethodLoadRecordHeader* next; +} jvmtiCompiledMethodLoadRecordHeader; + +/* + * Record that gives information about the methods on the compile-time + * stack at a specific pc address of a compiled method. Each element in + * the methods array maps to same element in the bcis array. + */ +typedef struct _PCStackInfo { + void* pc; /* the pc address for this compiled method */ + jint numstackframes; /* number of methods on the stack */ + jmethodID* methods; /* array of numstackframes method ids */ + jint* bcis; /* array of numstackframes bytecode indices */ +} PCStackInfo; + +/* + * Record that contains inlining information for each pc address of + * an nmethod. + */ +typedef struct _jvmtiCompiledMethodLoadInlineRecord { + jvmtiCompiledMethodLoadRecordHeader header; /* common header for casting */ + jint numpcs; /* number of pc descriptors in this nmethod */ + PCStackInfo* pcinfo; /* array of numpcs pc descriptors */ +} jvmtiCompiledMethodLoadInlineRecord; + +/* + * Dummy record used to test that we can pass records with different + * information through the void pointer provided that they can be cast + * to a jvmtiCompiledMethodLoadRecordHeader. + */ + +typedef struct _jvmtiCompiledMethodLoadDummyRecord { + jvmtiCompiledMethodLoadRecordHeader header; /* common header for casting */ + char message[50]; +} jvmtiCompiledMethodLoadDummyRecord; + +#endif diff --git a/java21/include/win32/bridge/AccessBridgeCallbacks.h b/java21/include/win32/bridge/AccessBridgeCallbacks.h new file mode 100644 index 0000000000000000000000000000000000000000..3f907d5f9cdd3d4699be498b44327c127d965149 --- /dev/null +++ b/java21/include/win32/bridge/AccessBridgeCallbacks.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * Header file defining callback typedefs for Windows routines + * which are called from Java (responding to events, etc.). + */ + +#ifndef __AccessBridgeCallbacks_H__ +#define __AccessBridgeCallbacks_H__ + +#include +#include "AccessBridgePackages.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef void (*AccessBridge_PropertyChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + wchar_t *property, wchar_t *oldValue, wchar_t *newValue); + +typedef void (*AccessBridge_JavaShutdownFP) (long vmID); +typedef void (*AccessBridge_JavaShutdownFP) (long vmID); + +typedef void (*AccessBridge_FocusGainedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_FocusLostFP) (long vmID, JOBJECT64 event, JOBJECT64 source); + +typedef void (*AccessBridge_CaretUpdateFP) (long vmID, JOBJECT64 event, JOBJECT64 source); + +typedef void (*AccessBridge_MouseClickedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_MouseEnteredFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_MouseExitedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_MousePressedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_MouseReleasedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); + +typedef void (*AccessBridge_MenuCanceledFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_MenuDeselectedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_MenuSelectedFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_PopupMenuCanceledFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_PopupMenuWillBecomeInvisibleFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_PopupMenuWillBecomeVisibleFP) (long vmID, JOBJECT64 event, JOBJECT64 source); + +typedef void (*AccessBridge_PropertyNameChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + wchar_t *oldName, wchar_t *newName); +typedef void (*AccessBridge_PropertyDescriptionChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + wchar_t *oldDescription, wchar_t *newDescription); +typedef void (*AccessBridge_PropertyStateChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + wchar_t *oldState, wchar_t *newState); +typedef void (*AccessBridge_PropertyValueChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + wchar_t *oldValue, wchar_t *newValue); +typedef void (*AccessBridge_PropertySelectionChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_PropertyTextChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_PropertyCaretChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + int oldPosition, int newPosition); +typedef void (*AccessBridge_PropertyVisibleDataChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source); +typedef void (*AccessBridge_PropertyChildChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 source, + JOBJECT64 oldChild, JOBJECT64 newChild); +typedef void (*AccessBridge_PropertyActiveDescendentChangeFP) (long vmID, JOBJECT64 event, + JOBJECT64 source, + JOBJECT64 oldActiveDescendent, + JOBJECT64 newActiveDescendent); + +typedef void (*AccessBridge_PropertyTableModelChangeFP) (long vmID, JOBJECT64 event, JOBJECT64 src, + wchar_t *oldValue, wchar_t *newValue); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/java21/include/win32/bridge/AccessBridgeCalls.h b/java21/include/win32/bridge/AccessBridgeCalls.h new file mode 100644 index 0000000000000000000000000000000000000000..b2d95f64366c0ac553550b17db916d04655fd964 --- /dev/null +++ b/java21/include/win32/bridge/AccessBridgeCalls.h @@ -0,0 +1,724 @@ +/* + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* Note: In addition to this header file AccessBridgeCalls.c must be compiled and + * linked to your application. AccessBridgeCalls.c implements the Java Access + * Bridge API and also hides the complexities associated with interfacing to the + * associated Java Access Bridge DLL which is installed when Java is installed. + * + * AccessBridgeCalls.c is available for download from the OpenJDK repository using + * the following link: + * + * https://git.openjdk.org/jdk17/blob/master/src/jdk.accessibility/windows/native/bridge/AccessBridgeCalls.c + * + * Also note that the API is used in the jaccessinspector and jaccesswalker tools. + * The source for those tools is available in the OpenJDK repository at these links: + * + * https://git.openjdk.org/jdk17/blob/master/src/jdk.accessibility/windows/native/jaccessinspector/jaccessinspector.cpp + * https://git.openjdk.org/jdk17/blob/master/src/jdk.accessibility/windows/native/jaccesswalker/jaccesswalker.cpp + * + * + */ + +/* + * Wrapper functions around calls to the AccessBridge DLL + */ + +#include +#include +#include "AccessBridgeCallbacks.h" +#include "AccessBridgePackages.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define null NULL + + typedef JOBJECT64 AccessibleContext; + typedef JOBJECT64 AccessibleText; + typedef JOBJECT64 AccessibleValue; + typedef JOBJECT64 AccessibleSelection; + typedef JOBJECT64 Java_Object; + typedef JOBJECT64 PropertyChangeEvent; + typedef JOBJECT64 FocusEvent; + typedef JOBJECT64 CaretEvent; + typedef JOBJECT64 MouseEvent; + typedef JOBJECT64 MenuEvent; + typedef JOBJECT64 AccessibleTable; + typedef JOBJECT64 AccessibleHyperlink; + typedef JOBJECT64 AccessibleHypertext; + + + typedef void (*Windows_runFP) (); + + typedef void (*SetPropertyChangeFP) (AccessBridge_PropertyChangeFP fp); + + typedef void (*SetJavaShutdownFP) (AccessBridge_JavaShutdownFP fp); + typedef void (*SetFocusGainedFP) (AccessBridge_FocusGainedFP fp); + typedef void (*SetFocusLostFP) (AccessBridge_FocusLostFP fp); + + typedef void (*SetCaretUpdateFP) (AccessBridge_CaretUpdateFP fp); + + typedef void (*SetMouseClickedFP) (AccessBridge_MouseClickedFP fp); + typedef void (*SetMouseEnteredFP) (AccessBridge_MouseEnteredFP fp); + typedef void (*SetMouseExitedFP) (AccessBridge_MouseExitedFP fp); + typedef void (*SetMousePressedFP) (AccessBridge_MousePressedFP fp); + typedef void (*SetMouseReleasedFP) (AccessBridge_MouseReleasedFP fp); + + typedef void (*SetMenuCanceledFP) (AccessBridge_MenuCanceledFP fp); + typedef void (*SetMenuDeselectedFP) (AccessBridge_MenuDeselectedFP fp); + typedef void (*SetMenuSelectedFP) (AccessBridge_MenuSelectedFP fp); + typedef void (*SetPopupMenuCanceledFP) (AccessBridge_PopupMenuCanceledFP fp); + typedef void (*SetPopupMenuWillBecomeInvisibleFP) (AccessBridge_PopupMenuWillBecomeInvisibleFP fp); + typedef void (*SetPopupMenuWillBecomeVisibleFP) (AccessBridge_PopupMenuWillBecomeVisibleFP fp); + + typedef void (*SetPropertyNameChangeFP) (AccessBridge_PropertyNameChangeFP fp); + typedef void (*SetPropertyDescriptionChangeFP) (AccessBridge_PropertyDescriptionChangeFP fp); + typedef void (*SetPropertyStateChangeFP) (AccessBridge_PropertyStateChangeFP fp); + typedef void (*SetPropertyValueChangeFP) (AccessBridge_PropertyValueChangeFP fp); + typedef void (*SetPropertySelectionChangeFP) (AccessBridge_PropertySelectionChangeFP fp); + typedef void (*SetPropertyTextChangeFP) (AccessBridge_PropertyTextChangeFP fp); + typedef void (*SetPropertyCaretChangeFP) (AccessBridge_PropertyCaretChangeFP fp); + typedef void (*SetPropertyVisibleDataChangeFP) (AccessBridge_PropertyVisibleDataChangeFP fp); + typedef void (*SetPropertyChildChangeFP) (AccessBridge_PropertyChildChangeFP fp); + typedef void (*SetPropertyActiveDescendentChangeFP) (AccessBridge_PropertyActiveDescendentChangeFP fp); + + typedef void (*SetPropertyTableModelChangeFP) (AccessBridge_PropertyTableModelChangeFP fp); + + typedef void (*ReleaseJavaObjectFP) (long vmID, Java_Object object); + + typedef BOOL (*GetVersionInfoFP) (long vmID, AccessBridgeVersionInfo *info); + + typedef BOOL (*IsJavaWindowFP) (HWND window); + typedef BOOL (*IsSameObjectFP) (long vmID, JOBJECT64 obj1, JOBJECT64 obj2); + typedef BOOL (*GetAccessibleContextFromHWNDFP) (HWND window, long *vmID, AccessibleContext *ac); + typedef HWND (*getHWNDFromAccessibleContextFP) (long vmID, AccessibleContext ac); + + typedef BOOL (*GetAccessibleContextAtFP) (long vmID, AccessibleContext acParent, + jint x, jint y, AccessibleContext *ac); + typedef BOOL (*GetAccessibleContextWithFocusFP) (HWND window, long *vmID, AccessibleContext *ac); + typedef BOOL (*GetAccessibleContextInfoFP) (long vmID, AccessibleContext ac, AccessibleContextInfo *info); + typedef AccessibleContext (*GetAccessibleChildFromContextFP) (long vmID, AccessibleContext ac, jint i); + typedef AccessibleContext (*GetAccessibleParentFromContextFP) (long vmID, AccessibleContext ac); + + /* begin AccessibleTable */ + typedef BOOL (*getAccessibleTableInfoFP) (long vmID, AccessibleContext ac, AccessibleTableInfo *tableInfo); + typedef BOOL (*getAccessibleTableCellInfoFP) (long vmID, AccessibleTable accessibleTable, + jint row, jint column, AccessibleTableCellInfo *tableCellInfo); + + typedef BOOL (*getAccessibleTableRowHeaderFP) (long vmID, AccessibleContext acParent, AccessibleTableInfo *tableInfo); + typedef BOOL (*getAccessibleTableColumnHeaderFP) (long vmID, AccessibleContext acParent, AccessibleTableInfo *tableInfo); + + typedef AccessibleContext (*getAccessibleTableRowDescriptionFP) (long vmID, AccessibleContext acParent, jint row); + typedef AccessibleContext (*getAccessibleTableColumnDescriptionFP) (long vmID, AccessibleContext acParent, jint column); + + typedef jint (*getAccessibleTableRowSelectionCountFP) (long vmID, AccessibleTable table); + typedef BOOL (*isAccessibleTableRowSelectedFP) (long vmID, AccessibleTable table, jint row); + typedef BOOL (*getAccessibleTableRowSelectionsFP) (long vmID, AccessibleTable table, jint count, + jint *selections); + + typedef jint (*getAccessibleTableColumnSelectionCountFP) (long vmID, AccessibleTable table); + typedef BOOL (*isAccessibleTableColumnSelectedFP) (long vmID, AccessibleTable table, jint column); + typedef BOOL (*getAccessibleTableColumnSelectionsFP) (long vmID, AccessibleTable table, jint count, + jint *selections); + + typedef jint (*getAccessibleTableRowFP) (long vmID, AccessibleTable table, jint index); + typedef jint (*getAccessibleTableColumnFP) (long vmID, AccessibleTable table, jint index); + typedef jint (*getAccessibleTableIndexFP) (long vmID, AccessibleTable table, jint row, jint column); + /* end AccessibleTable */ + + /* AccessibleRelationSet */ + typedef BOOL (*getAccessibleRelationSetFP) (long vmID, AccessibleContext accessibleContext, + AccessibleRelationSetInfo *relationSetInfo); + + /* AccessibleHypertext */ + typedef BOOL (*getAccessibleHypertextFP)(long vmID, AccessibleContext accessibleContext, + AccessibleHypertextInfo *hypertextInfo); + + typedef BOOL (*activateAccessibleHyperlinkFP)(long vmID, AccessibleContext accessibleContext, + AccessibleHyperlink accessibleHyperlink); + + typedef jint (*getAccessibleHyperlinkCountFP)(const long vmID, + const AccessibleContext accessibleContext); + + typedef BOOL (*getAccessibleHypertextExtFP) (const long vmID, + const AccessibleContext accessibleContext, + const jint nStartIndex, + AccessibleHypertextInfo *hypertextInfo); + + typedef jint (*getAccessibleHypertextLinkIndexFP)(const long vmID, + const AccessibleHypertext hypertext, + const jint nIndex); + + typedef BOOL (*getAccessibleHyperlinkFP)(const long vmID, + const AccessibleHypertext hypertext, + const jint nIndex, + AccessibleHyperlinkInfo *hyperlinkInfo); + + + /* Accessible KeyBindings, Icons and Actions */ + typedef BOOL (*getAccessibleKeyBindingsFP)(long vmID, AccessibleContext accessibleContext, + AccessibleKeyBindings *keyBindings); + + typedef BOOL (*getAccessibleIconsFP)(long vmID, AccessibleContext accessibleContext, + AccessibleIcons *icons); + + typedef BOOL (*getAccessibleActionsFP)(long vmID, AccessibleContext accessibleContext, + AccessibleActions *actions); + + typedef BOOL (*doAccessibleActionsFP)(long vmID, AccessibleContext accessibleContext, + AccessibleActionsToDo *actionsToDo, jint *failure); + + + /* AccessibleText */ + + typedef BOOL (*GetAccessibleTextInfoFP) (long vmID, AccessibleText at, AccessibleTextInfo *textInfo, jint x, jint y); + typedef BOOL (*GetAccessibleTextItemsFP) (long vmID, AccessibleText at, AccessibleTextItemsInfo *textItems, jint index); + typedef BOOL (*GetAccessibleTextSelectionInfoFP) (long vmID, AccessibleText at, AccessibleTextSelectionInfo *textSelection); + typedef BOOL (*GetAccessibleTextAttributesFP) (long vmID, AccessibleText at, jint index, AccessibleTextAttributesInfo *attributes); + typedef BOOL (*GetAccessibleTextRectFP) (long vmID, AccessibleText at, AccessibleTextRectInfo *rectInfo, jint index); + typedef BOOL (*GetAccessibleTextLineBoundsFP) (long vmID, AccessibleText at, jint index, jint *startIndex, jint *endIndex); + typedef BOOL (*GetAccessibleTextRangeFP) (long vmID, AccessibleText at, jint start, jint end, wchar_t *text, short len); + + typedef BOOL (*GetCurrentAccessibleValueFromContextFP) (long vmID, AccessibleValue av, wchar_t *value, short len); + typedef BOOL (*GetMaximumAccessibleValueFromContextFP) (long vmID, AccessibleValue av, wchar_t *value, short len); + typedef BOOL (*GetMinimumAccessibleValueFromContextFP) (long vmID, AccessibleValue av, wchar_t *value, short len); + + typedef void (*AddAccessibleSelectionFromContextFP) (long vmID, AccessibleSelection as, int i); + typedef void (*ClearAccessibleSelectionFromContextFP) (long vmID, AccessibleSelection as); + typedef JOBJECT64 (*GetAccessibleSelectionFromContextFP) (long vmID, AccessibleSelection as, int i); + typedef int (*GetAccessibleSelectionCountFromContextFP) (long vmID, AccessibleSelection as); + typedef BOOL (*IsAccessibleChildSelectedFromContextFP) (long vmID, AccessibleSelection as, int i); + typedef void (*RemoveAccessibleSelectionFromContextFP) (long vmID, AccessibleSelection as, int i); + typedef void (*SelectAllAccessibleSelectionFromContextFP) (long vmID, AccessibleSelection as); + + /* Utility methods */ + + typedef BOOL (*setTextContentsFP) (const long vmID, const AccessibleContext ac, const wchar_t *text); + typedef AccessibleContext (*getParentWithRoleFP) (const long vmID, const AccessibleContext ac, const wchar_t *role); + typedef AccessibleContext (*getParentWithRoleElseRootFP) (const long vmID, const AccessibleContext ac, const wchar_t *role); + typedef AccessibleContext (*getTopLevelObjectFP) (const long vmID, const AccessibleContext ac); + typedef int (*getObjectDepthFP) (const long vmID, const AccessibleContext ac); + typedef AccessibleContext (*getActiveDescendentFP) (const long vmID, const AccessibleContext ac); + + + typedef BOOL (*getVirtualAccessibleNameFP) (const long vmID, const AccessibleContext accessibleContext, + wchar_t *name, int len); + + typedef BOOL (*requestFocusFP) (const long vmID, const AccessibleContext accessibleContext); + + typedef BOOL (*selectTextRangeFP) (const long vmID, const AccessibleContext accessibleContext, + const int startIndex, const int endIndex); + + typedef BOOL (*getTextAttributesInRangeFP) (const long vmID, const AccessibleContext accessibleContext, + const int startIndex, const int endIndex, + AccessibleTextAttributesInfo *attributes, short *len); + + typedef int (*getVisibleChildrenCountFP) (const long vmID, const AccessibleContext accessibleContext); + + typedef BOOL (*getVisibleChildrenFP) (const long vmID, const AccessibleContext accessibleContext, + const int startIndex, VisibleChildrenInfo *children); + + typedef BOOL (*setCaretPositionFP) (const long vmID, const AccessibleContext accessibleContext, const int position); + + typedef BOOL (*getCaretLocationFP) (long vmID, AccessibleContext ac, AccessibleTextRectInfo *rectInfo, jint index); + + typedef int (*getEventsWaitingFP) (); + + typedef struct AccessBridgeFPsTag { + Windows_runFP Windows_run; + + SetPropertyChangeFP SetPropertyChange; + + SetJavaShutdownFP SetJavaShutdown; + SetFocusGainedFP SetFocusGained; + SetFocusLostFP SetFocusLost; + + SetCaretUpdateFP SetCaretUpdate; + + SetMouseClickedFP SetMouseClicked; + SetMouseEnteredFP SetMouseEntered; + SetMouseExitedFP SetMouseExited; + SetMousePressedFP SetMousePressed; + SetMouseReleasedFP SetMouseReleased; + + SetMenuCanceledFP SetMenuCanceled; + SetMenuDeselectedFP SetMenuDeselected; + SetMenuSelectedFP SetMenuSelected; + SetPopupMenuCanceledFP SetPopupMenuCanceled; + SetPopupMenuWillBecomeInvisibleFP SetPopupMenuWillBecomeInvisible; + SetPopupMenuWillBecomeVisibleFP SetPopupMenuWillBecomeVisible; + + SetPropertyNameChangeFP SetPropertyNameChange; + SetPropertyDescriptionChangeFP SetPropertyDescriptionChange; + SetPropertyStateChangeFP SetPropertyStateChange; + SetPropertyValueChangeFP SetPropertyValueChange; + SetPropertySelectionChangeFP SetPropertySelectionChange; + SetPropertyTextChangeFP SetPropertyTextChange; + SetPropertyCaretChangeFP SetPropertyCaretChange; + SetPropertyVisibleDataChangeFP SetPropertyVisibleDataChange; + SetPropertyChildChangeFP SetPropertyChildChange; + SetPropertyActiveDescendentChangeFP SetPropertyActiveDescendentChange; + + SetPropertyTableModelChangeFP SetPropertyTableModelChange; + + ReleaseJavaObjectFP ReleaseJavaObject; + GetVersionInfoFP GetVersionInfo; + + IsJavaWindowFP IsJavaWindow; + IsSameObjectFP IsSameObject; + GetAccessibleContextFromHWNDFP GetAccessibleContextFromHWND; + getHWNDFromAccessibleContextFP getHWNDFromAccessibleContext; + + GetAccessibleContextAtFP GetAccessibleContextAt; + GetAccessibleContextWithFocusFP GetAccessibleContextWithFocus; + GetAccessibleContextInfoFP GetAccessibleContextInfo; + GetAccessibleChildFromContextFP GetAccessibleChildFromContext; + GetAccessibleParentFromContextFP GetAccessibleParentFromContext; + + getAccessibleTableInfoFP getAccessibleTableInfo; + getAccessibleTableCellInfoFP getAccessibleTableCellInfo; + + getAccessibleTableRowHeaderFP getAccessibleTableRowHeader; + getAccessibleTableColumnHeaderFP getAccessibleTableColumnHeader; + + getAccessibleTableRowDescriptionFP getAccessibleTableRowDescription; + getAccessibleTableColumnDescriptionFP getAccessibleTableColumnDescription; + + getAccessibleTableRowSelectionCountFP getAccessibleTableRowSelectionCount; + isAccessibleTableRowSelectedFP isAccessibleTableRowSelected; + getAccessibleTableRowSelectionsFP getAccessibleTableRowSelections; + + getAccessibleTableColumnSelectionCountFP getAccessibleTableColumnSelectionCount; + isAccessibleTableColumnSelectedFP isAccessibleTableColumnSelected; + getAccessibleTableColumnSelectionsFP getAccessibleTableColumnSelections; + + getAccessibleTableRowFP getAccessibleTableRow; + getAccessibleTableColumnFP getAccessibleTableColumn; + getAccessibleTableIndexFP getAccessibleTableIndex; + + getAccessibleRelationSetFP getAccessibleRelationSet; + + getAccessibleHypertextFP getAccessibleHypertext; + activateAccessibleHyperlinkFP activateAccessibleHyperlink; + getAccessibleHyperlinkCountFP getAccessibleHyperlinkCount; + getAccessibleHypertextExtFP getAccessibleHypertextExt; + getAccessibleHypertextLinkIndexFP getAccessibleHypertextLinkIndex; + getAccessibleHyperlinkFP getAccessibleHyperlink; + + getAccessibleKeyBindingsFP getAccessibleKeyBindings; + getAccessibleIconsFP getAccessibleIcons; + getAccessibleActionsFP getAccessibleActions; + doAccessibleActionsFP doAccessibleActions; + + GetAccessibleTextInfoFP GetAccessibleTextInfo; + GetAccessibleTextItemsFP GetAccessibleTextItems; + GetAccessibleTextSelectionInfoFP GetAccessibleTextSelectionInfo; + GetAccessibleTextAttributesFP GetAccessibleTextAttributes; + GetAccessibleTextRectFP GetAccessibleTextRect; + GetAccessibleTextLineBoundsFP GetAccessibleTextLineBounds; + GetAccessibleTextRangeFP GetAccessibleTextRange; + + GetCurrentAccessibleValueFromContextFP GetCurrentAccessibleValueFromContext; + GetMaximumAccessibleValueFromContextFP GetMaximumAccessibleValueFromContext; + GetMinimumAccessibleValueFromContextFP GetMinimumAccessibleValueFromContext; + + AddAccessibleSelectionFromContextFP AddAccessibleSelectionFromContext; + ClearAccessibleSelectionFromContextFP ClearAccessibleSelectionFromContext; + GetAccessibleSelectionFromContextFP GetAccessibleSelectionFromContext; + GetAccessibleSelectionCountFromContextFP GetAccessibleSelectionCountFromContext; + IsAccessibleChildSelectedFromContextFP IsAccessibleChildSelectedFromContext; + RemoveAccessibleSelectionFromContextFP RemoveAccessibleSelectionFromContext; + SelectAllAccessibleSelectionFromContextFP SelectAllAccessibleSelectionFromContext; + + setTextContentsFP setTextContents; + getParentWithRoleFP getParentWithRole; + getTopLevelObjectFP getTopLevelObject; + getParentWithRoleElseRootFP getParentWithRoleElseRoot; + getObjectDepthFP getObjectDepth; + getActiveDescendentFP getActiveDescendent; + + getVirtualAccessibleNameFP getVirtualAccessibleName; + requestFocusFP requestFocus; + selectTextRangeFP selectTextRange; + getTextAttributesInRangeFP getTextAttributesInRange; + getVisibleChildrenCountFP getVisibleChildrenCount; + getVisibleChildrenFP getVisibleChildren; + setCaretPositionFP setCaretPosition; + getCaretLocationFP getCaretLocation; + + getEventsWaitingFP getEventsWaiting; + + } AccessBridgeFPs; + + + /** + * Initialize the world + */ + BOOL initializeAccessBridge(); + BOOL shutdownAccessBridge(); + + /** + * Window routines + */ + BOOL IsJavaWindow(HWND window); + + // Returns the virtual machine ID and AccessibleContext for a top-level window + BOOL GetAccessibleContextFromHWND(HWND target, long *vmID, AccessibleContext *ac); + + // Returns the HWND from the AccessibleContext of a top-level window + HWND getHWNDFromAccessibleContext(long vmID, AccessibleContext ac); + + + /** + * Event handling routines + */ + void SetJavaShutdown(AccessBridge_JavaShutdownFP fp); + void SetFocusGained(AccessBridge_FocusGainedFP fp); + void SetFocusLost(AccessBridge_FocusLostFP fp); + + void SetCaretUpdate(AccessBridge_CaretUpdateFP fp); + + void SetMouseClicked(AccessBridge_MouseClickedFP fp); + void SetMouseEntered(AccessBridge_MouseEnteredFP fp); + void SetMouseExited(AccessBridge_MouseExitedFP fp); + void SetMousePressed(AccessBridge_MousePressedFP fp); + void SetMouseReleased(AccessBridge_MouseReleasedFP fp); + + void SetMenuCanceled(AccessBridge_MenuCanceledFP fp); + void SetMenuDeselected(AccessBridge_MenuDeselectedFP fp); + void SetMenuSelected(AccessBridge_MenuSelectedFP fp); + void SetPopupMenuCanceled(AccessBridge_PopupMenuCanceledFP fp); + void SetPopupMenuWillBecomeInvisible(AccessBridge_PopupMenuWillBecomeInvisibleFP fp); + void SetPopupMenuWillBecomeVisible(AccessBridge_PopupMenuWillBecomeVisibleFP fp); + + void SetPropertyNameChange(AccessBridge_PropertyNameChangeFP fp); + void SetPropertyDescriptionChange(AccessBridge_PropertyDescriptionChangeFP fp); + void SetPropertyStateChange(AccessBridge_PropertyStateChangeFP fp); + void SetPropertyValueChange(AccessBridge_PropertyValueChangeFP fp); + void SetPropertySelectionChange(AccessBridge_PropertySelectionChangeFP fp); + void SetPropertyTextChange(AccessBridge_PropertyTextChangeFP fp); + void SetPropertyCaretChange(AccessBridge_PropertyCaretChangeFP fp); + void SetPropertyVisibleDataChange(AccessBridge_PropertyVisibleDataChangeFP fp); + void SetPropertyChildChange(AccessBridge_PropertyChildChangeFP fp); + void SetPropertyActiveDescendentChange(AccessBridge_PropertyActiveDescendentChangeFP fp); + + void SetPropertyTableModelChange(AccessBridge_PropertyTableModelChangeFP fp); + + + /** + * General routines + */ + void ReleaseJavaObject(long vmID, Java_Object object); + BOOL GetVersionInfo(long vmID, AccessBridgeVersionInfo *info); + HWND GetHWNDFromAccessibleContext(long vmID, JOBJECT64 accesibleContext); + + /** + * Accessible Context routines + */ + BOOL GetAccessibleContextAt(long vmID, AccessibleContext acParent, + jint x, jint y, AccessibleContext *ac); + BOOL GetAccessibleContextWithFocus(HWND window, long *vmID, AccessibleContext *ac); + BOOL GetAccessibleContextInfo(long vmID, AccessibleContext ac, AccessibleContextInfo *info); + AccessibleContext GetAccessibleChildFromContext(long vmID, AccessibleContext ac, jint index); + AccessibleContext GetAccessibleParentFromContext(long vmID, AccessibleContext ac); + + /** + * Accessible Text routines + */ + BOOL GetAccessibleTextInfo(long vmID, AccessibleText at, AccessibleTextInfo *textInfo, jint x, jint y); + BOOL GetAccessibleTextItems(long vmID, AccessibleText at, AccessibleTextItemsInfo *textItems, jint index); + BOOL GetAccessibleTextSelectionInfo(long vmID, AccessibleText at, AccessibleTextSelectionInfo *textSelection); + BOOL GetAccessibleTextAttributes(long vmID, AccessibleText at, jint index, AccessibleTextAttributesInfo *attributes); + BOOL GetAccessibleTextRect(long vmID, AccessibleText at, AccessibleTextRectInfo *rectInfo, jint index); + BOOL GetAccessibleTextLineBounds(long vmID, AccessibleText at, jint index, jint *startIndex, jint *endIndex); + BOOL GetAccessibleTextRange(long vmID, AccessibleText at, jint start, jint end, wchar_t *text, short len); + + /* begin AccessibleTable routines */ + BOOL getAccessibleTableInfo(long vmID, AccessibleContext acParent, AccessibleTableInfo *tableInfo); + + BOOL getAccessibleTableCellInfo(long vmID, AccessibleTable accessibleTable, jint row, jint column, + AccessibleTableCellInfo *tableCellInfo); + + BOOL getAccessibleTableRowHeader(long vmID, AccessibleContext acParent, AccessibleTableInfo *tableInfo); + BOOL getAccessibleTableColumnHeader(long vmID, AccessibleContext acParent, AccessibleTableInfo *tableInfo); + + AccessibleContext getAccessibleTableRowDescription(long vmID, AccessibleContext acParent, jint row); + AccessibleContext getAccessibleTableColumnDescription(long vmID, AccessibleContext acParent, jint column); + + jint getAccessibleTableRowSelectionCount(long vmID, AccessibleTable table); + BOOL isAccessibleTableRowSelected(long vmID, AccessibleTable table, jint row); + BOOL getAccessibleTableRowSelections(long vmID, AccessibleTable table, jint count, jint *selections); + + jint getAccessibleTableColumnSelectionCount(long vmID, AccessibleTable table); + BOOL isAccessibleTableColumnSelected(long vmID, AccessibleTable table, jint column); + BOOL getAccessibleTableColumnSelections(long vmID, AccessibleTable table, jint count, jint *selections); + + jint getAccessibleTableRow(long vmID, AccessibleTable table, jint index); + jint getAccessibleTableColumn(long vmID, AccessibleTable table, jint index); + jint getAccessibleTableIndex(long vmID, AccessibleTable table, jint row, jint column); + /* end AccessibleTable */ + + /* ----- AccessibleRelationSet routines */ + BOOL getAccessibleRelationSet(long vmID, AccessibleContext accessibleContext, + AccessibleRelationSetInfo *relationSetInfo); + + /* ----- AccessibleHypertext routines */ + + /* + * Returns hypertext information associated with a component. + */ + BOOL getAccessibleHypertext(long vmID, AccessibleContext accessibleContext, + AccessibleHypertextInfo *hypertextInfo); + + /* + * Requests that a hyperlink be activated. + */ + BOOL activateAccessibleHyperlink(long vmID, AccessibleContext accessibleContext, + AccessibleHyperlink accessibleHyperlink); + + /* + * Returns the number of hyperlinks in a component + * Maps to AccessibleHypertext.getLinkCount. + * Returns -1 on error. + */ + jint getAccessibleHyperlinkCount(const long vmID, + const AccessibleHypertext hypertext); + + /* + * This method is used to iterate through the hyperlinks in a component. It + * returns hypertext information for a component starting at hyperlink index + * nStartIndex. No more than MAX_HYPERLINKS AccessibleHypertextInfo objects will + * be returned for each call to this method. + * Returns FALSE on error. + */ + BOOL getAccessibleHypertextExt(const long vmID, + const AccessibleContext accessibleContext, + const jint nStartIndex, + /* OUT */ AccessibleHypertextInfo *hypertextInfo); + + /* + * Returns the index into an array of hyperlinks that is associated with + * a character index in document; maps to AccessibleHypertext.getLinkIndex + * Returns -1 on error. + */ + jint getAccessibleHypertextLinkIndex(const long vmID, + const AccessibleHypertext hypertext, + const jint nIndex); + + /* + * Returns the nth hyperlink in a document + * Maps to AccessibleHypertext.getLink. + * Returns FALSE on error + */ + BOOL getAccessibleHyperlink(const long vmID, + const AccessibleHypertext hypertext, + const jint nIndex, + /* OUT */ AccessibleHyperlinkInfo *hyperlinkInfo); + + /* Accessible KeyBindings, Icons and Actions */ + + /* + * Returns a list of key bindings associated with a component. + */ + BOOL getAccessibleKeyBindings(long vmID, AccessibleContext accessibleContext, + AccessibleKeyBindings *keyBindings); + + /* + * Returns a list of icons associate with a component. + */ + BOOL getAccessibleIcons(long vmID, AccessibleContext accessibleContext, + AccessibleIcons *icons); + + /* + * Returns a list of actions that a component can perform. + */ + BOOL getAccessibleActions(long vmID, AccessibleContext accessibleContext, + AccessibleActions *actions); + + /* + * Request that a list of AccessibleActions be performed by a component. + * Returns TRUE if all actions are performed. Returns FALSE + * when the first requested action fails in which case "failure" + * contains the index of the action that failed. + */ + BOOL doAccessibleActions(long vmID, AccessibleContext accessibleContext, + AccessibleActionsToDo *actionsToDo, jint *failure); + + + + /* Additional utility methods */ + + /* + * Returns whether two object references refer to the same object. + */ + BOOL IsSameObject(long vmID, JOBJECT64 obj1, JOBJECT64 obj2); + + /** + * Sets editable text contents. The AccessibleContext must implement AccessibleEditableText and + * be editable. The maximum text length that can be set is MAX_STRING_SIZE - 1. + * Returns whether successful + */ + BOOL setTextContents (const long vmID, const AccessibleContext accessibleContext, const wchar_t *text); + + /** + * Returns the Accessible Context with the specified role that is the + * ancestor of a given object. The role is one of the role strings + * defined in AccessBridgePackages.h + * If there is no ancestor object that has the specified role, + * returns (AccessibleContext)0. + */ + AccessibleContext getParentWithRole (const long vmID, const AccessibleContext accessibleContext, + const wchar_t *role); + + /** + * Returns the Accessible Context with the specified role that is the + * ancestor of a given object. The role is one of the role strings + * defined in AccessBridgePackages.h. If an object with the specified + * role does not exist, returns the top level object for the Java Window. + * Returns (AccessibleContext)0 on error. + */ + AccessibleContext getParentWithRoleElseRoot (const long vmID, const AccessibleContext accessibleContext, + const wchar_t *role); + + /** + * Returns the Accessible Context for the top level object in + * a Java Window. This is same Accessible Context that is obtained + * from GetAccessibleContextFromHWND for that window. Returns + * (AccessibleContext)0 on error. + */ + AccessibleContext getTopLevelObject (const long vmID, const AccessibleContext accessibleContext); + + /** + * Returns how deep in the object hierarchy a given object is. + * The top most object in the object hierarchy has an object depth of 0. + * Returns -1 on error. + */ + int getObjectDepth (const long vmID, const AccessibleContext accessibleContext); + + /** + * Returns the Accessible Context of the current ActiveDescendent of an object. + * This method assumes the ActiveDescendent is the component that is currently + * selected in a container object. + * Returns (AccessibleContext)0 on error or if there is no selection. + */ + AccessibleContext getActiveDescendent (const long vmID, const AccessibleContext accessibleContext); + + /** + * Accessible Value routines + */ + BOOL GetCurrentAccessibleValueFromContext(long vmID, AccessibleValue av, wchar_t *value, short len); + BOOL GetMaximumAccessibleValueFromContext(long vmID, AccessibleValue av, wchar_t *value, short len); + BOOL GetMinimumAccessibleValueFromContext(long vmID, AccessibleValue av, wchar_t *value, short len); + + /** + * Accessible Selection routines + */ + void AddAccessibleSelectionFromContext(long vmID, AccessibleSelection as, int i); + void ClearAccessibleSelectionFromContext(long vmID, AccessibleSelection as); + JOBJECT64 GetAccessibleSelectionFromContext(long vmID, AccessibleSelection as, int i); + int GetAccessibleSelectionCountFromContext(long vmID, AccessibleSelection as); + BOOL IsAccessibleChildSelectedFromContext(long vmID, AccessibleSelection as, int i); + void RemoveAccessibleSelectionFromContext(long vmID, AccessibleSelection as, int i); + void SelectAllAccessibleSelectionFromContext(long vmID, AccessibleSelection as); + + /** + * Additional methods for Teton + */ + + /** + * Gets the AccessibleName for a component based upon the JAWS algorithm. Returns + * whether successful. + * + * Bug ID 4916682 - Implement JAWS AccessibleName policy + */ + BOOL getVirtualAccessibleName(const long vmID, const AccessibleContext accessibleContext, + wchar_t *name, int len); + + /** + * Request focus for a component. Returns whether successful. + * + * Bug ID 4944757 - requestFocus method needed + */ + BOOL requestFocus(const long vmID, const AccessibleContext accessibleContext); + + /** + * Selects text between two indices. Selection includes the text at the start index + * and the text at the end index. Returns whether successful. + * + * Bug ID 4944758 - selectTextRange method needed + */ + BOOL selectTextRange(const long vmID, const AccessibleContext accessibleContext, const int startIndex, + const int endIndex); + + /** + * Get text attributes between two indices. The attribute list includes the text at the + * start index and the text at the end index. Returns whether successful; + * + * Bug ID 4944761 - getTextAttributes between two indices method needed + */ + BOOL getTextAttributesInRange(const long vmID, const AccessibleContext accessibleContext, + const int startIndex, const int endIndex, + AccessibleTextAttributesInfo *attributes, short *len); + + /** + * Returns the number of visible children of a component. Returns -1 on error. + * + * Bug ID 4944762- getVisibleChildren for list-like components needed + */ + int getVisibleChildrenCount(const long vmID, const AccessibleContext accessibleContext); + + /** + * Gets the visible children of an AccessibleContext. Returns whether successful. + * + * Bug ID 4944762- getVisibleChildren for list-like components needed + */ + BOOL getVisibleChildren(const long vmID, const AccessibleContext accessibleContext, + const int startIndex, + VisibleChildrenInfo *visibleChildrenInfo); + + /** + * Set the caret to a text position. Returns whether successful. + * + * Bug ID 4944770 - setCaretPosition method needed + */ + BOOL setCaretPosition(const long vmID, const AccessibleContext accessibleContext, + const int position); + + /** + * Gets the text caret location + */ + BOOL getCaretLocation(long vmID, AccessibleContext ac, + AccessibleTextRectInfo *rectInfo, jint index); + + /** + * Gets the number of events waiting to fire + */ + int getEventsWaiting(); + +#ifdef __cplusplus +} +#endif diff --git a/java21/include/win32/bridge/AccessBridgePackages.h b/java21/include/win32/bridge/AccessBridgePackages.h new file mode 100644 index 0000000000000000000000000000000000000000..232cab4b21bf3f601b9df010da5b992a18fdc624 --- /dev/null +++ b/java21/include/win32/bridge/AccessBridgePackages.h @@ -0,0 +1,2217 @@ +/* + * Copyright (c) 2005, 2025, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +/* + * Header file for packages of paramaters passed between Java Accessibility + * and native Assistive Technologies + */ + +#ifndef __AccessBridgePackages_H__ +#define __AccessBridgePackages_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef ACCESSBRIDGE_ARCH_LEGACY +typedef jobject JOBJECT64; +typedef HWND ABHWND64; +#define ABHandleToLong +#define ABLongToHandle +#else +typedef jlong JOBJECT64; +typedef long ABHWND64; +#define ABHandleToLong HandleToLong +#define ABLongToHandle LongToHandle +#endif + +#define MAX_BUFFER_SIZE 10240 +#define MAX_STRING_SIZE 1024 +#define SHORT_STRING_SIZE 256 + + // object types + typedef JOBJECT64 AccessibleContext; + typedef JOBJECT64 AccessibleText; + typedef JOBJECT64 AccessibleValue; + typedef JOBJECT64 AccessibleSelection; + typedef JOBJECT64 Java_Object; + typedef JOBJECT64 PropertyChangeEvent; + typedef JOBJECT64 FocusEvent; + typedef JOBJECT64 CaretEvent; + typedef JOBJECT64 MouseEvent; + typedef JOBJECT64 MenuEvent; + typedef JOBJECT64 AccessibleTable; + typedef JOBJECT64 AccessibleHyperlink; + typedef JOBJECT64 AccessibleHypertext; + + /** + ****************************************************** + * Java event types + ****************************************************** + */ + +#define cPropertyChangeEvent (jlong) 1 // 1 +#define cFocusGainedEvent (jlong) 2 // 2 +#define cFocusLostEvent (jlong) 4 // 4 +#define cCaretUpdateEvent (jlong) 8 // 8 +#define cMouseClickedEvent (jlong) 16 // 10 +#define cMouseEnteredEvent (jlong) 32 // 20 +#define cMouseExitedEvent (jlong) 64 // 40 +#define cMousePressedEvent (jlong) 128 // 80 +#define cMouseReleasedEvent (jlong) 256 // 100 +#define cMenuCanceledEvent (jlong) 512 // 200 +#define cMenuDeselectedEvent (jlong) 1024 // 400 +#define cMenuSelectedEvent (jlong) 2048 // 800 +#define cPopupMenuCanceledEvent (jlong) 4096 // 1000 +#define cPopupMenuWillBecomeInvisibleEvent (jlong) 8192 // 2000 +#define cPopupMenuWillBecomeVisibleEvent (jlong) 16384 // 4000 +#define cJavaShutdownEvent (jlong) 32768 // 8000 + + /** + ****************************************************** + * Accessible Roles + * Defines all AccessibleRoles in Local.US + ****************************************************** + */ + + /** + * Object is used to alert the user about something. + */ +#define ACCESSIBLE_ALERT L"alert" + + /** + * The header for a column of data. + */ +#define ACCESSIBLE_COLUMN_HEADER L"column header" + + /** + * Object that can be drawn into and is used to trap + * events. + * see ACCESSIBLE_FRAME + * see ACCESSIBLE_GLASS_PANE + * see ACCESSIBLE_LAYERED_PANE + */ +#define ACCESSIBLE_CANVAS L"canvas" + + /** + * A list of choices the user can select from. Also optionally + * allows the user to enter a choice of their own. + */ +#define ACCESSIBLE_COMBO_BOX L"combo box" + + /** + * An iconified internal frame in a DESKTOP_PANE. + * see ACCESSIBLE_DESKTOP_PANE + * see ACCESSIBLE_INTERNAL_FRAME + */ +#define ACCESSIBLE_DESKTOP_ICON L"desktop icon" + + /** + * A frame-like object that is clipped by a desktop pane. The + * desktop pane, internal frame, and desktop icon objects are + * often used to create multiple document interfaces within an + * application. + * see ACCESSIBLE_DESKTOP_ICON + * see ACCESSIBLE_DESKTOP_PANE + * see ACCESSIBLE_FRAME + */ +#define ACCESSIBLE_INTERNAL_FRAME L"internal frame" + + /** + * A pane that supports internal frames and + * iconified versions of those internal frames. + * see ACCESSIBLE_DESKTOP_ICON + * see ACCESSIBLE_INTERNAL_FRAME + */ +#define ACCESSIBLE_DESKTOP_PANE L"desktop pane" + + /** + * A specialized pane whose primary use is inside a DIALOG + * see ACCESSIBLE_DIALOG + */ +#define ACCESSIBLE_OPTION_PANE L"option pane" + + /** + * A top level window with no title or border. + * see ACCESSIBLE_FRAME + * see ACCESSIBLE_DIALOG + */ +#define ACCESSIBLE_WINDOW L"window" + + /** + * A top level window with a title bar, border, menu bar, etc. It is + * often used as the primary window for an application. + * see ACCESSIBLE_DIALOG + * see ACCESSIBLE_CANVAS + * see ACCESSIBLE_WINDOW + */ +#define ACCESSIBLE_FRAME L"frame" + + /** + * A top level window with title bar and a border. A dialog is similar + * to a frame, but it has fewer properties and is often used as a + * secondary window for an application. + * see ACCESSIBLE_FRAME + * see ACCESSIBLE_WINDOW + */ +#define ACCESSIBLE_DIALOG L"dialog" + + /** + * A specialized dialog that lets the user choose a color. + */ +#define ACCESSIBLE_COLOR_CHOOSER L"color chooser" + + + /** + * A pane that allows the user to navigate through + * and select the contents of a directory. May be used + * by a file chooser. + * see ACCESSIBLE_FILE_CHOOSER + */ +#define ACCESSIBLE_DIRECTORY_PANE L"directory pane" + + /** + * A specialized dialog that displays the files in the directory + * and lets the user select a file, browse a different directory, + * or specify a filename. May use the directory pane to show the + * contents of a directory. + * see ACCESSIBLE_DIRECTORY_PANE + */ +#define ACCESSIBLE_FILE_CHOOSER L"file chooser" + + /** + * An object that fills up space in a user interface. It is often + * used in interfaces to tweak the spacing between components, + * but serves no other purpose. + */ +#define ACCESSIBLE_FILLER L"filler" + + /** + * A hypertext anchor + */ +#define ACCESSIBLE_HYPERLINK L"hyperlink" + + /** + * A small fixed size picture, typically used to decorate components. + */ +#define ACCESSIBLE_ICON L"icon" + + /** + * An object used to present an icon or short string in an interface. + */ +#define ACCESSIBLE_LABEL L"label" + + /** + * A specialized pane that has a glass pane and a layered pane as its + * children. + * see ACCESSIBLE_GLASS_PANE + * see ACCESSIBLE_LAYERED_PANE + */ +#define ACCESSIBLE_ROOT_PANE L"root pane" + + /** + * A pane that is guaranteed to be painted on top + * of all panes beneath it. + * see ACCESSIBLE_ROOT_PANE + * see ACCESSIBLE_CANVAS + */ +#define ACCESSIBLE_GLASS_PANE L"glass pane" + + /** + * A specialized pane that allows its children to be drawn in layers, + * providing a form of stacking order. This is usually the pane that + * holds the menu bar as well as the pane that contains most of the + * visual components in a window. + * see ACCESSIBLE_GLASS_PANE + * see ACCESSIBLE_ROOT_PANE + */ +#define ACCESSIBLE_LAYERED_PANE L"layered pane" + + /** + * An object that presents a list of objects to the user and allows the + * user to select one or more of them. A list is usually contained + * within a scroll pane. + * see ACCESSIBLE_SCROLL_PANE + * see ACCESSIBLE_LIST_ITEM + */ +#define ACCESSIBLE_LIST L"list" + + /** + * An object that presents an element in a list. A list is usually + * contained within a scroll pane. + * see ACCESSIBLE_SCROLL_PANE + * see ACCESSIBLE_LIST + */ +#define ACCESSIBLE_LIST_ITEM L"list item" + + /** + * An object usually drawn at the top of the primary dialog box of + * an application that contains a list of menus the user can choose + * from. For example, a menu bar might contain menus for "File," + * "Edit," and "Help." + * see ACCESSIBLE_MENU + * see ACCESSIBLE_POPUP_MENU + * see ACCESSIBLE_LAYERED_PANE + */ +#define ACCESSIBLE_MENU_BAR L"menu bar" + + /** + * A temporary window that is usually used to offer the user a + * list of choices, and then hides when the user selects one of + * those choices. + * see ACCESSIBLE_MENU + * see ACCESSIBLE_MENU_ITEM + */ +#define ACCESSIBLE_POPUP_MENU L"popup menu" + + /** + * An object usually found inside a menu bar that contains a list + * of actions the user can choose from. A menu can have any object + * as its children, but most often they are menu items, other menus, + * or rudimentary objects such as radio buttons, check boxes, or + * separators. For example, an application may have an "Edit" menu + * that contains menu items for "Cut" and "Paste." + * see ACCESSIBLE_MENU_BAR + * see ACCESSIBLE_MENU_ITEM + * see ACCESSIBLE_SEPARATOR + * see ACCESSIBLE_RADIO_BUTTON + * see ACCESSIBLE_CHECK_BOX + * see ACCESSIBLE_POPUP_MENU + */ +#define ACCESSIBLE_MENU L"menu" + + /** + * An object usually contained in a menu that presents an action + * the user can choose. For example, the "Cut" menu item in an + * "Edit" menu would be an action the user can select to cut the + * selected area of text in a document. + * see ACCESSIBLE_MENU_BAR + * see ACCESSIBLE_SEPARATOR + * see ACCESSIBLE_POPUP_MENU + */ +#define ACCESSIBLE_MENU_ITEM L"menu item" + + /** + * An object usually contained in a menu to provide a visual + * and logical separation of the contents in a menu. For example, + * the "File" menu of an application might contain menu items for + * "Open," "Close," and "Exit," and will place a separator between + * "Close" and "Exit" menu items. + * see ACCESSIBLE_MENU + * see ACCESSIBLE_MENU_ITEM + */ +#define ACCESSIBLE_SEPARATOR L"separator" + + /** + * An object that presents a series of panels (or page tabs), one at a + * time, through some mechanism provided by the object. The most common + * mechanism is a list of tabs at the top of the panel. The children of + * a page tab list are all page tabs. + * see ACCESSIBLE_PAGE_TAB + */ +#define ACCESSIBLE_PAGE_TAB_LIST L"page tab list" + + /** + * An object that is a child of a page tab list. Its sole child is + * the panel that is to be presented to the user when the user + * selects the page tab from the list of tabs in the page tab list. + * see ACCESSIBLE_PAGE_TAB_LIST + */ +#define ACCESSIBLE_PAGE_TAB L"page tab" + + /** + * A generic container that is often used to group objects. + */ +#define ACCESSIBLE_PANEL L"panel" + + /** + * An object used to indicate how much of a task has been completed. + */ +#define ACCESSIBLE_PROGRESS_BAR L"progress bar" + + /** + * A text object used for passwords, or other places where the + * text contents is not shown visibly to the user + */ +#define ACCESSIBLE_PASSWORD_TEXT L"password text" + + /** + * An object the user can manipulate to tell the application to do + * something. + * see ACCESSIBLE_CHECK_BOX + * see ACCESSIBLE_TOGGLE_BUTTON + * see ACCESSIBLE_RADIO_BUTTON + */ +#define ACCESSIBLE_PUSH_BUTTON L"push button" + + /** + * A specialized push button that can be checked or unchecked, but + * does not provide a separate indicator for the current state. + * see ACCESSIBLE_PUSH_BUTTON + * see ACCESSIBLE_CHECK_BOX + * see ACCESSIBLE_RADIO_BUTTON + */ +#define ACCESSIBLE_TOGGLE_BUTTON L"toggle button" + + /** + * A choice that can be checked or unchecked and provides a + * separate indicator for the current state. + * see ACCESSIBLE_PUSH_BUTTON + * see ACCESSIBLE_TOGGLE_BUTTON + * see ACCESSIBLE_RADIO_BUTTON + */ +#define ACCESSIBLE_CHECK_BOX L"check box" + + /** + * A specialized check box that will cause other radio buttons in the + * same group to become unchecked when this one is checked. + * see ACCESSIBLE_PUSH_BUTTON + * see ACCESSIBLE_TOGGLE_BUTTON + * see ACCESSIBLE_CHECK_BOX + */ +#define ACCESSIBLE_RADIO_BUTTON L"radio button" + + /** + * The header for a row of data. + */ +#define ACCESSIBLE_ROW_HEADER L"row header" + + /** + * An object that allows a user to incrementally view a large amount + * of information. Its children can include scroll bars and a viewport. + * see ACCESSIBLE_SCROLL_BAR + * see ACCESSIBLE_VIEWPORT + */ +#define ACCESSIBLE_SCROLL_PANE L"scroll pane" + + /** + * An object usually used to allow a user to incrementally view a + * large amount of data. Usually used only by a scroll pane. + * see ACCESSIBLE_SCROLL_PANE + */ +#define ACCESSIBLE_SCROLL_BAR L"scroll bar" + + /** + * An object usually used in a scroll pane. It represents the portion + * of the entire data that the user can see. As the user manipulates + * the scroll bars, the contents of the viewport can change. + * see ACCESSIBLE_SCROLL_PANE + */ +#define ACCESSIBLE_VIEWPORT L"viewport" + + /** + * An object that allows the user to select from a bounded range. For + * example, a slider might be used to select a number between 0 and 100. + */ +#define ACCESSIBLE_SLIDER L"slider" + + /** + * A specialized panel that presents two other panels at the same time. + * Between the two panels is a divider the user can manipulate to make + * one panel larger and the other panel smaller. + */ +#define ACCESSIBLE_SPLIT_PANE L"split pane" + + /** + * An object used to present information in terms of rows and columns. + * An example might include a spreadsheet application. + */ +#define ACCESSIBLE_TABLE L"table" + + /** + * An object that presents text to the user. The text is usually + * editable by the user as opposed to a label. + * see ACCESSIBLE_LABEL + */ +#define ACCESSIBLE_TEXT L"text" + + /** + * An object used to present hierarchical information to the user. + * The individual nodes in the tree can be collapsed and expanded + * to provide selective disclosure of the tree's contents. + */ +#define ACCESSIBLE_TREE L"tree" + + /** + * A bar or palette usually composed of push buttons or toggle buttons. + * It is often used to provide the most frequently used functions for an + * application. + */ +#define ACCESSIBLE_TOOL_BAR L"tool bar" + + /** + * An object that provides information about another object. The + * accessibleDescription property of the tool tip is often displayed + * to the user in a small L"help bubble" when the user causes the + * mouse to hover over the object associated with the tool tip. + */ +#define ACCESSIBLE_TOOL_TIP L"tool tip" + + /** + * An AWT component, but nothing else is known about it. + * see ACCESSIBLE_SWING_COMPONENT + * see ACCESSIBLE_UNKNOWN + */ +#define ACCESSIBLE_AWT_COMPONENT L"awt component" + + /** + * A Swing component, but nothing else is known about it. + * see ACCESSIBLE_AWT_COMPONENT + * see ACCESSIBLE_UNKNOWN + */ +#define ACCESSIBLE_SWING_COMPONENT L"swing component" + + /** + * The object contains some Accessible information, but its role is + * not known. + * see ACCESSIBLE_AWT_COMPONENT + * see ACCESSIBLE_SWING_COMPONENT + */ +#define ACCESSIBLE_UNKNOWN L"unknown" + + /** + * A STATUS_BAR is an simple component that can contain + * multiple labels of status information to the user. + */ +#define ACCESSIBLE_STATUS_BAR L"status bar" + + /** + * A DATE_EDITOR is a component that allows users to edit + * java.util.Date and java.util.Time objects + */ +#define ACCESSIBLE_DATE_EDITOR L"date editor" + + /** + * A SPIN_BOX is a simple spinner component and its main use + * is for simple numbers. + */ +#define ACCESSIBLE_SPIN_BOX L"spin box" + + /** + * A FONT_CHOOSER is a component that lets the user pick various + * attributes for fonts. + */ +#define ACCESSIBLE_FONT_CHOOSER L"font chooser" + + /** + * A GROUP_BOX is a simple container that contains a border + * around it and contains components inside it. + */ +#define ACCESSIBLE_GROUP_BOX L"group box" + + /** + * A text header + */ +#define ACCESSIBLE_HEADER L"header" + + /** + * A text footer + */ +#define ACCESSIBLE_FOOTER L"footer" + + /** + * A text paragraph + */ +#define ACCESSIBLE_PARAGRAPH L"paragraph" + + /** + * A ruler is an object used to measure distance + */ +#define ACCESSIBLE_RULER L"ruler" + + /** + * A role indicating the object acts as a formula for + * calculating a value. An example is a formula in + * a spreadsheet cell. + */ +#define ACCESSIBLE_EDITBAR L"editbar" + + /** + * A role indicating the object monitors the progress + * of some operation. + */ +#define PROGRESS_MONITOR L"progress monitor" + + + /** + ****************************************************** + * Accessibility event types + ****************************************************** + */ + +#define cPropertyNameChangeEvent (jlong) 1 // 1 +#define cPropertyDescriptionChangeEvent (jlong) 2 // 2 +#define cPropertyStateChangeEvent (jlong) 4 // 4 +#define cPropertyValueChangeEvent (jlong) 8 // 8 +#define cPropertySelectionChangeEvent (jlong) 16 // 10 +#define cPropertyTextChangeEvent (jlong) 32 // 20 +#define cPropertyCaretChangeEvent (jlong) 64 // 40 +#define cPropertyVisibleDataChangeEvent (jlong) 128 // 80 +#define cPropertyChildChangeEvent (jlong) 256 // 100 +#define cPropertyActiveDescendentChangeEvent (jlong) 512 // 200 +#define cPropertyTableModelChangeEvent (jlong) 1024 // 400 + + /** + ****************************************************** + * optional AccessibleContext interfaces + * + * This version of the bridge reuses the accessibleValue + * field in the AccessibleContextInfo struct to represent + * additional optional interfaces that are supported by + * the Java AccessibleContext. This is backwardly compatable + * because the old accessibleValue was set to the BOOL + * value TRUE (i.e., 1) if the AccessibleValue interface is + * supported. + ****************************************************** + */ + +#define cAccessibleValueInterface (jlong) 1 // 1 << 1 (TRUE) +#define cAccessibleActionInterface (jlong) 2 // 1 << 2 +#define cAccessibleComponentInterface (jlong) 4 // 1 << 3 +#define cAccessibleSelectionInterface (jlong) 8 // 1 << 4 +#define cAccessibleTableInterface (jlong) 16 // 1 << 5 +#define cAccessibleTextInterface (jlong) 32 // 1 << 6 +#define cAccessibleHypertextInterface (jlong) 64 // 1 << 7 + + + /** + ****************************************************** + * Accessibility information bundles + ****************************************************** + */ + + typedef struct AccessBridgeVersionInfoTag { + wchar_t VMversion[SHORT_STRING_SIZE]; // output of "java -version" + wchar_t bridgeJavaClassVersion[SHORT_STRING_SIZE]; // version of the AccessBridge.class + wchar_t bridgeJavaDLLVersion[SHORT_STRING_SIZE]; // version of JavaAccessBridge.dll + wchar_t bridgeWinDLLVersion[SHORT_STRING_SIZE]; // version of WindowsAccessBridge.dll + } AccessBridgeVersionInfo; + + + typedef struct AccessibleContextInfoTag { + wchar_t name[MAX_STRING_SIZE]; // the AccessibleName of the object + wchar_t description[MAX_STRING_SIZE]; // the AccessibleDescription of the object + + wchar_t role[SHORT_STRING_SIZE]; // localized AccesibleRole string + wchar_t role_en_US[SHORT_STRING_SIZE]; // AccesibleRole string in the en_US locale + wchar_t states[SHORT_STRING_SIZE]; // localized AccesibleStateSet string (comma separated) + wchar_t states_en_US[SHORT_STRING_SIZE]; // AccesibleStateSet string in the en_US locale (comma separated) + + jint indexInParent; // index of object in parent + jint childrenCount; // # of children, if any + + jint x; // screen coords in pixels + jint y; // " + jint width; // pixel width of object + jint height; // pixel height of object + + BOOL accessibleComponent; // flags for various additional + BOOL accessibleAction; // Java Accessibility interfaces + BOOL accessibleSelection; // FALSE if this object doesn't + BOOL accessibleText; // implement the additional interface + // in question + + // BOOL accessibleValue; // old BOOL indicating whether AccessibleValue is supported + BOOL accessibleInterfaces; // new bitfield containing additional interface flags + + } AccessibleContextInfo; + + + + // AccessibleText packages + typedef struct AccessibleTextInfoTag { + jint charCount; // # of characters in this text object + jint caretIndex; // index of caret + jint indexAtPoint; // index at the passsed in point + } AccessibleTextInfo; + + typedef struct AccessibleTextItemsInfoTag { + wchar_t letter; + wchar_t word[SHORT_STRING_SIZE]; + wchar_t sentence[MAX_STRING_SIZE]; + } AccessibleTextItemsInfo; + + typedef struct AccessibleTextSelectionInfoTag { + jint selectionStartIndex; + jint selectionEndIndex; + wchar_t selectedText[MAX_STRING_SIZE]; + } AccessibleTextSelectionInfo; + + typedef struct AccessibleTextRectInfoTag { + jint x; // bounding rect of char at index + jint y; // " + jint width; // " + jint height; // " + } AccessibleTextRectInfo; + + // standard attributes for text; note: tabstops are not supported + typedef struct AccessibleTextAttributesInfoTag { + BOOL bold; + BOOL italic; + BOOL underline; + BOOL strikethrough; + BOOL superscript; + BOOL subscript; + + wchar_t backgroundColor[SHORT_STRING_SIZE]; + wchar_t foregroundColor[SHORT_STRING_SIZE]; + wchar_t fontFamily[SHORT_STRING_SIZE]; + jint fontSize; + + jint alignment; + jint bidiLevel; + + jfloat firstLineIndent; + jfloat leftIndent; + jfloat rightIndent; + jfloat lineSpacing; + jfloat spaceAbove; + jfloat spaceBelow; + + wchar_t fullAttributesString[MAX_STRING_SIZE]; + } AccessibleTextAttributesInfo; + + /** + ****************************************************** + * IPC management typedefs + ****************************************************** + */ + +#define cMemoryMappedNameSize 255 + + /** + * sent by the WindowsDLL -> the memory-mapped file is setup + * + */ + typedef struct MemoryMappedFileCreatedPackageTag { +// HWND bridgeWindow; // redundant, but easier to get to here... + ABHWND64 bridgeWindow; // redundant, but easier to get to here... + char filename[cMemoryMappedNameSize]; + } MemoryMappedFileCreatedPackage; + + + + + /** + * sent when a new JavaVM attaches to the Bridge + * + */ + typedef struct JavaVMCreatedPackageTag { + ABHWND64 bridgeWindow; + long vmID; + } JavaVMCreatedPackage; + + /** + * sent when a JavaVM detatches from the Bridge + * + */ + typedef struct JavaVMDestroyedPackageTag { + ABHWND64 bridgeWindow; + } JavaVMDestroyedPackage; + + /** + * sent when a new AT attaches to the Bridge + * + */ + typedef struct WindowsATCreatedPackageTag { + ABHWND64 bridgeWindow; + } WindowsATCreatedPackage; + + /** + * sent when an AT detatches from the Bridge + * + */ + typedef struct WindowsATDestroyedPackageTag { + ABHWND64 bridgeWindow; + } WindowsATDestroyedPackage; + + + /** + * sent by JVM Bridges in response to a WindowsATCreate + * message; saying "howdy, welcome to the neighborhood" + * + */ + typedef struct JavaVMPresentNotificationPackageTag { + ABHWND64 bridgeWindow; + long vmID; + } JavaVMPresentNotificationPackage; + + /** + * sent by AT Bridges in response to a JavaVMCreate + * message; saying "howdy, welcome to the neighborhood" + * + */ + typedef struct WindowsATPresentNotificationPackageTag { + ABHWND64 bridgeWindow; + } WindowsATPresentNotificationPackage; + + + /** + ****************************************************** + * Core packages + ****************************************************** + */ + + typedef struct ReleaseJavaObjectPackageTag { + long vmID; + JOBJECT64 object; + } ReleaseJavaObjectPackage; + + typedef struct GetAccessBridgeVersionPackageTag { + long vmID; // can't get VM info w/out a VM! + AccessBridgeVersionInfo rVersionInfo; + } GetAccessBridgeVersionPackage; + + typedef struct IsSameObjectPackageTag { + long vmID; + JOBJECT64 obj1; + JOBJECT64 obj2; + jboolean rResult; + } IsSameObjectPackage; + + /** + ****************************************************** + * Windows packages + ****************************************************** + */ + + typedef struct IsJavaWindowPackageTag { + jint window; + jboolean rResult; + } IsJavaWindowPackage; + + typedef struct GetAccessibleContextFromHWNDPackageTag { + jint window; + long rVMID; + JOBJECT64 rAccessibleContext; + } GetAccessibleContextFromHWNDPackage; + + typedef struct GetHWNDFromAccessibleContextPackageTag { + JOBJECT64 accessibleContext; + ABHWND64 rHWND; + } GetHWNDFromAccessibleContextPackage; + + /** +****************************************************** +* AccessibleContext packages +****************************************************** +*/ + + typedef struct GetAccessibleContextAtPackageTag { + jint x; + jint y; + long vmID; + JOBJECT64 AccessibleContext; // look within this AC + JOBJECT64 rAccessibleContext; + } GetAccessibleContextAtPackage; + + typedef struct GetAccessibleContextWithFocusPackageTag { + long rVMID; + JOBJECT64 rAccessibleContext; + } GetAccessibleContextWithFocusPackage; + + typedef struct GetAccessibleContextInfoPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + AccessibleContextInfo rAccessibleContextInfo; + } GetAccessibleContextInfoPackage; + + typedef struct GetAccessibleChildFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint childIndex; + JOBJECT64 rAccessibleContext; + } GetAccessibleChildFromContextPackage; + + typedef struct GetAccessibleParentFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + JOBJECT64 rAccessibleContext; + } GetAccessibleParentFromContextPackage; + + /** +****************************************************** +* AccessibleTable packages +****************************************************** +*/ + +#define MAX_TABLE_SELECTIONS 64 + + // table information + typedef struct AccessibleTableInfoTag { + JOBJECT64 caption; // AccesibleContext + JOBJECT64 summary; // AccessibleContext + jint rowCount; + jint columnCount; + JOBJECT64 accessibleContext; + JOBJECT64 accessibleTable; + } AccessibleTableInfo; + + typedef struct GetAccessibleTableInfoPackageTag { + long vmID; + JOBJECT64 accessibleContext; + AccessibleTableInfo rTableInfo; + } GetAccessibleTableInfoPackage; + + // table cell information + typedef struct AccessibleTableCellInfoTag { + JOBJECT64 accessibleContext; + jint index; + jint row; + jint column; + jint rowExtent; + jint columnExtent; + jboolean isSelected; + } AccessibleTableCellInfo; + + typedef struct GetAccessibleTableCellInfoPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint row; + jint column; + AccessibleTableCellInfo rTableCellInfo; + } GetAccessibleTableCellInfoPackage; + + typedef struct GetAccessibleTableRowHeaderPackageTag { + long vmID; + JOBJECT64 accessibleContext; + AccessibleTableInfo rTableInfo; + } GetAccessibleTableRowHeaderPackage; + + typedef struct GetAccessibleTableColumnHeaderPackageTag { + long vmID; + JOBJECT64 accessibleContext; + AccessibleTableInfo rTableInfo; + } GetAccessibleTableColumnHeaderPackage; + + typedef struct GetAccessibleTableRowDescriptionPackageTag { + long vmID; + JOBJECT64 accessibleContext; + jint row; + JOBJECT64 rAccessibleContext; + } GetAccessibleTableRowDescriptionPackage; + + typedef struct GetAccessibleTableColumnDescriptionPackageTag { + long vmID; + JOBJECT64 accessibleContext; + jint column; + JOBJECT64 rAccessibleContext; + } GetAccessibleTableColumnDescriptionPackage; + + typedef struct GetAccessibleTableRowSelectionCountPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint rCount; + } GetAccessibleTableRowSelectionCountPackage; + + typedef struct IsAccessibleTableRowSelectedPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint row; + jboolean rResult; + } IsAccessibleTableRowSelectedPackage; + + typedef struct GetAccessibleTableRowSelectionsPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint count; + jint rSelections[MAX_TABLE_SELECTIONS]; + } GetAccessibleTableRowSelectionsPackage; + + typedef struct GetAccessibleTableColumnSelectionCountPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint rCount; + } GetAccessibleTableColumnSelectionCountPackage; + + typedef struct IsAccessibleTableColumnSelectedPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint column; + jboolean rResult; + } IsAccessibleTableColumnSelectedPackage; + + typedef struct GetAccessibleTableColumnSelectionsPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint count; + jint rSelections[MAX_TABLE_SELECTIONS]; + } GetAccessibleTableColumnSelectionsPackage; + + + typedef struct GetAccessibleTableRowPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint index; + jint rRow; + } GetAccessibleTableRowPackage; + + typedef struct GetAccessibleTableColumnPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint index; + jint rColumn; + } GetAccessibleTableColumnPackage; + + typedef struct GetAccessibleTableIndexPackageTag { + long vmID; + JOBJECT64 accessibleTable; + jint row; + jint column; + jint rIndex; + } GetAccessibleTableIndexPackage; + + + /** + ****************************************************** + * AccessibleRelationSet packages + ****************************************************** + */ + +#define MAX_RELATION_TARGETS 25 +#define MAX_RELATIONS 5 + + typedef struct AccessibleRelationInfoTag { + wchar_t key[SHORT_STRING_SIZE]; + jint targetCount; + JOBJECT64 targets[MAX_RELATION_TARGETS]; // AccessibleContexts + } AccessibleRelationInfo; + + typedef struct AccessibleRelationSetInfoTag { + jint relationCount; + AccessibleRelationInfo relations[MAX_RELATIONS]; + } AccessibleRelationSetInfo; + + typedef struct GetAccessibleRelationSetPackageTag { + long vmID; + JOBJECT64 accessibleContext; + AccessibleRelationSetInfo rAccessibleRelationSetInfo; + } GetAccessibleRelationSetPackage; + + /** + ****************************************************** + * AccessibleHypertext packagess + ****************************************************** + */ + +#define MAX_HYPERLINKS 64 // maximum number of hyperlinks returned + + // hyperlink information + typedef struct AccessibleHyperlinkInfoTag { + wchar_t text[SHORT_STRING_SIZE]; // the hyperlink text + jint startIndex; //index in the hypertext document where the link begins + jint endIndex; //index in the hypertext document where the link ends + JOBJECT64 accessibleHyperlink; // AccessibleHyperlink object + } AccessibleHyperlinkInfo; + + // hypertext information + typedef struct AccessibleHypertextInfoTag { + jint linkCount; // number of hyperlinks + AccessibleHyperlinkInfo links[MAX_HYPERLINKS]; // the hyperlinks + JOBJECT64 accessibleHypertext; // AccessibleHypertext object + } AccessibleHypertextInfo; + + // struct for sending a message to get the hypertext for an AccessibleContext + typedef struct GetAccessibleHypertextPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // AccessibleContext with hypertext + AccessibleHypertextInfo rAccessibleHypertextInfo; // returned hypertext + } GetAccessibleHypertextPackage; + + // struct for sending an message to activate a hyperlink + typedef struct ActivateAccessibleHyperlinkPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // AccessibleContext containing the link + JOBJECT64 accessibleHyperlink; // the link to activate + BOOL rResult; // hyperlink activation return value + } ActivateAccessibleHyperlinkPackage; + + // struct for sending a message to get the number of hyperlinks in a component + typedef struct GetAccessibleHyperlinkCountPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // AccessibleContext containing AccessibleHypertext + jint rLinkCount; // link count return value + } GetAccessibleHyperlinkCountPackage; + + // struct for sending a message to get the hypertext for an AccessibleContext + // starting at a specified index in the document + typedef struct GetAccessibleHypertextExtPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // AccessibleContext with hypertext + jint startIndex; // start index in document + AccessibleHypertextInfo rAccessibleHypertextInfo; // returned hypertext + BOOL rSuccess; // whether call succeeded + } GetAccessibleHypertextExtPackage; + + // struct for sending a message to get the nth hyperlink in a document; + // maps to AccessibleHypertext.getLink + typedef struct GetAccessibleHyperlinkPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 hypertext; // AccessibleHypertext + jint linkIndex; // hyperlink index + AccessibleHyperlinkInfo rAccessibleHyperlinkInfo; // returned hyperlink + } GetAccessibleHyperlinkPackage; + + // struct for sending a message to get the index into an array + // of hyperlinks that is associated with a character index in a + // document; maps to AccessibleHypertext.getLinkIndex + typedef struct GetAccessibleHypertextLinkIndexPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 hypertext; // AccessibleHypertext + jint charIndex; // character index in document + jint rLinkIndex; // returned hyperlink index + } GetAccessibleHypertextLinkIndexPackage; + + /** + ****************************************************** + * Accessible Key Bindings packages + ****************************************************** + */ + +#define MAX_KEY_BINDINGS 10 + + // keyboard character modifiers +#define ACCESSIBLE_SHIFT_KEYSTROKE 1 +#define ACCESSIBLE_CONTROL_KEYSTROKE 2 +#define ACCESSIBLE_META_KEYSTROKE 4 +#define ACCESSIBLE_ALT_KEYSTROKE 8 +#define ACCESSIBLE_ALT_GRAPH_KEYSTROKE 16 +#define ACCESSIBLE_BUTTON1_KEYSTROKE 32 +#define ACCESSIBLE_BUTTON2_KEYSTROKE 64 +#define ACCESSIBLE_BUTTON3_KEYSTROKE 128 +#define ACCESSIBLE_FKEY_KEYSTROKE 256 // F key pressed, character contains 1-24 +#define ACCESSIBLE_CONTROLCODE_KEYSTROKE 512 // Control code key pressed, character contains control code. + +// The supported control code keys are: +#define ACCESSIBLE_VK_TAB 9 +#define ACCESSIBLE_VK_SPACE 32 +#define ACCESSIBLE_VK_BACK_SPACE 8 +#define ACCESSIBLE_VK_DELETE 127 +#define ACCESSIBLE_VK_DOWN 40 +#define ACCESSIBLE_VK_END 35 +#define ACCESSIBLE_VK_HOME 36 +#define ACCESSIBLE_VK_INSERT 155 +#define ACCESSIBLE_VK_KP_DOWN 225 +#define ACCESSIBLE_VK_KP_LEFT 226 +#define ACCESSIBLE_VK_KP_RIGHT 227 +#define ACCESSIBLE_VK_KP_UP 224 +#define ACCESSIBLE_VK_LEFT 37 +#define ACCESSIBLE_VK_PAGE_DOWN 34 +#define ACCESSIBLE_VK_PAGE_UP 33 +#define ACCESSIBLE_VK_RIGHT 39 +#define ACCESSIBLE_VK_UP 38 + + // a key binding associates with a component + typedef struct AccessibleKeyBindingInfoTag { + jchar character; // the key character + jint modifiers; // the key modifiers + } AccessibleKeyBindingInfo; + + // all of the key bindings associated with a component + typedef struct AccessibleKeyBindingsTag { + int keyBindingsCount; // number of key bindings + AccessibleKeyBindingInfo keyBindingInfo[MAX_KEY_BINDINGS]; + } AccessibleKeyBindings; + + // struct to get the key bindings associated with a component + typedef struct GetAccessibleKeyBindingsPackageTag { + long vmID; // the virtual machine id + JOBJECT64 accessibleContext; // the component + AccessibleKeyBindings rAccessibleKeyBindings; // the key bindings + } GetAccessibleKeyBindingsPackage; + + /** +****************************************************** +* AccessibleIcon packages +****************************************************** +*/ +#define MAX_ICON_INFO 8 + + // an icon assocated with a component + typedef struct AccessibleIconInfoTag { + wchar_t description[SHORT_STRING_SIZE]; // icon description + jint height; // icon height + jint width; // icon width + } AccessibleIconInfo; + + // all of the icons associated with a component + typedef struct AccessibleIconsTag { + jint iconsCount; // number of icons + AccessibleIconInfo iconInfo[MAX_ICON_INFO]; // the icons + } AccessibleIcons; + + // struct to get the icons associated with a component + typedef struct GetAccessibleIconsPackageTag { + long vmID; // the virtual machine id + JOBJECT64 accessibleContext; // the component + AccessibleIcons rAccessibleIcons; // the icons + } GetAccessibleIconsPackage; + + + /** +****************************************************** +* AccessibleAction packages +****************************************************** +*/ +#define MAX_ACTION_INFO 256 +#define MAX_ACTIONS_TO_DO 32 + + // an action assocated with a component + typedef struct AccessibleActionInfoTag { + wchar_t name[SHORT_STRING_SIZE]; // action name + } AccessibleActionInfo; + + // all of the actions associated with a component + typedef struct AccessibleActionsTag { + jint actionsCount; // number of actions + AccessibleActionInfo actionInfo[MAX_ACTION_INFO]; // the action information + } AccessibleActions; + + // struct for requesting the actions associated with a component + typedef struct GetAccessibleActionsPackageTag { + long vmID; + JOBJECT64 accessibleContext; // the component + AccessibleActions rAccessibleActions; // the actions + } GetAccessibleActionsPackage; + + // list of AccessibleActions to do + typedef struct AccessibleActionsToDoTag { + jint actionsCount; // number of actions to do + AccessibleActionInfo actions[MAX_ACTIONS_TO_DO];// the accessible actions to do + } AccessibleActionsToDo; + + // struct for sending an message to do one or more actions + typedef struct DoAccessibleActionsPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // component to do the action + AccessibleActionsToDo actionsToDo; // the accessible actions to do + BOOL rResult; // action return value + jint failure; // index of action that failed if rResult is FALSE + } DoAccessibleActionsPackage; + + /** +****************************************************** +* AccessibleText packages +****************************************************** +*/ + + typedef struct GetAccessibleTextInfoPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint x; + jint y; + AccessibleTextInfo rTextInfo; + } GetAccessibleTextInfoPackage; + + typedef struct GetAccessibleTextItemsPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + AccessibleTextItemsInfo rTextItemsInfo; + } GetAccessibleTextItemsPackage; + + typedef struct GetAccessibleTextSelectionInfoPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + AccessibleTextSelectionInfo rTextSelectionItemsInfo; + } GetAccessibleTextSelectionInfoPackage; + + typedef struct GetAccessibleTextAttributeInfoPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + AccessibleTextAttributesInfo rAttributeInfo; + } GetAccessibleTextAttributeInfoPackage; + + typedef struct GetAccessibleTextRectInfoPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + AccessibleTextRectInfo rTextRectInfo; + } GetAccessibleTextRectInfoPackage; + + typedef struct GetCaretLocationPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + AccessibleTextRectInfo rTextRectInfo; + } GetCaretLocationPackage; + + typedef struct GetAccessibleTextLineBoundsPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + jint rLineStart; + jint rLineEnd; + } GetAccessibleTextLineBoundsPackage; + + typedef struct GetAccessibleTextRangePackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint start; + jint end; + wchar_t rText[MAX_BUFFER_SIZE]; + } GetAccessibleTextRangePackage; + + /** +****************************************************** +* +* Utility method packages +****************************************************** +*/ + + typedef struct SetTextContentsPackageTag { + long vmID; + JOBJECT64 accessibleContext; // the text field + wchar_t text[MAX_STRING_SIZE]; // the text + BOOL rResult; + } SetTextContentsPackage; + + typedef struct GetParentWithRolePackageTag { + long vmID; + JOBJECT64 accessibleContext; + wchar_t role[SHORT_STRING_SIZE]; // one of Accessible Roles above + JOBJECT64 rAccessibleContext; + } GetParentWithRolePackage; + + typedef struct GetTopLevelObjectPackageTag { + long vmID; + JOBJECT64 accessibleContext; + JOBJECT64 rAccessibleContext; + } GetTopLevelObjectPackage; + + typedef struct GetParentWithRoleElseRootPackageTag { + long vmID; + JOBJECT64 accessibleContext; + wchar_t role[SHORT_STRING_SIZE]; // one of Accessible Roles above + JOBJECT64 rAccessibleContext; + } GetParentWithRoleElseRootPackage; + + typedef struct GetObjectDepthPackageTag { + long vmID; + JOBJECT64 accessibleContext; + jint rResult; + } GetObjectDepthPackage; + + typedef struct GetActiveDescendentPackageTag { + long vmID; + JOBJECT64 accessibleContext; + JOBJECT64 rAccessibleContext; + } GetActiveDescendentPackage; + + /** +****************************************************** +* AccessibleValue packages +****************************************************** +*/ + + typedef struct GetCurrentAccessibleValueFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + wchar_t rValue[SHORT_STRING_SIZE]; + } GetCurrentAccessibleValueFromContextPackage; + + typedef struct GetMaximumAccessibleValueFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + wchar_t rValue[SHORT_STRING_SIZE]; + } GetMaximumAccessibleValueFromContextPackage; + + typedef struct GetMinimumAccessibleValueFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + wchar_t rValue[SHORT_STRING_SIZE]; + } GetMinimumAccessibleValueFromContextPackage; + + + /** +****************************************************** +* AccessibleSelection packages +****************************************************** +*/ + + typedef struct AddAccessibleSelectionFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + } AddAccessibleSelectionFromContextPackage; + + typedef struct ClearAccessibleSelectionFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + } ClearAccessibleSelectionFromContextPackage; + + typedef struct GetAccessibleSelectionFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + JOBJECT64 rAccessibleContext; + } GetAccessibleSelectionFromContextPackage; + + typedef struct GetAccessibleSelectionCountFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint rCount; + } GetAccessibleSelectionCountFromContextPackage; + + typedef struct IsAccessibleChildSelectedFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + jboolean rResult; + } IsAccessibleChildSelectedFromContextPackage; + + typedef struct RemoveAccessibleSelectionFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + jint index; + } RemoveAccessibleSelectionFromContextPackage; + + typedef struct SelectAllAccessibleSelectionFromContextPackageTag { + long vmID; + JOBJECT64 AccessibleContext; + } SelectAllAccessibleSelectionFromContextPackage; + + + /** +****************************************************** +* Java Event Notification Registration packages +****************************************************** +*/ + + typedef struct AddJavaEventNotificationPackageTag { + jlong type; + //HWND DLLwindow; + ABHWND64 DLLwindow; + } AddJavaEventNotificationPackage; + + typedef struct RemoveJavaEventNotificationPackageTag { + jlong type; + //HWND DLLwindow; + ABHWND64 DLLwindow; + } RemoveJavaEventNotificationPackage; + + + /** +****************************************************** +* Accessibility Event Notification Registration packages +****************************************************** +*/ + + typedef struct AddAccessibilityEventNotificationPackageTag { + jlong type; + //HWND DLLwindow; + ABHWND64 DLLwindow; + } AddAccessibilityEventNotificationPackage; + + typedef struct RemoveAccessibilityEventNotificationPackageTag { + jlong type; + //HWND DLLwindow; + ABHWND64 DLLwindow; + } RemoveAccessibilityEventNotificationPackage; + + + /** +****************************************************** +* Accessibility Property Change Event packages +****************************************************** +*/ + + typedef struct PropertyCaretChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + jint oldPosition; + jint newPosition; + } PropertyCaretChangePackage; + + typedef struct PropertyDescriptionChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + wchar_t oldDescription[SHORT_STRING_SIZE]; + wchar_t newDescription[SHORT_STRING_SIZE]; + } PropertyDescriptionChangePackage; + + typedef struct PropertyNameChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + wchar_t oldName[SHORT_STRING_SIZE]; + wchar_t newName[SHORT_STRING_SIZE]; + } PropertyNameChangePackage; + + typedef struct PropertySelectionChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } PropertySelectionChangePackage; + + typedef struct PropertyStateChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + wchar_t oldState[SHORT_STRING_SIZE]; + wchar_t newState[SHORT_STRING_SIZE]; + } PropertyStateChangePackage; + + typedef struct PropertyTextChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } PropertyTextChangePackage; + + typedef struct PropertyValueChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + wchar_t oldValue[SHORT_STRING_SIZE]; + wchar_t newValue[SHORT_STRING_SIZE]; + } PropertyValueChangePackage; + + typedef struct PropertyVisibleDataChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } PropertyVisibleDataChangePackage; + + typedef struct PropertyChildChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + JOBJECT64 oldChildAccessibleContext; + JOBJECT64 newChildAccessibleContext; + } PropertyChildChangePackage; + + typedef struct PropertyActiveDescendentChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + JOBJECT64 oldActiveDescendentAccessibleContext; + JOBJECT64 newActiveDescendentAccessibleContext; + } PropertyActiveDescendentChangePackage; + + + // String format for newValue is: + // "type" one of "INSERT", "UPDATE" or "DELETE" + // "firstRow" + // "lastRow" + // "firstColumn" + // "lastColumn" + // + // oldValue is currently unused + // + typedef struct PropertyTableModelChangePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + wchar_t oldValue[SHORT_STRING_SIZE]; + wchar_t newValue[SHORT_STRING_SIZE]; + } PropertyTableModelChangePackage; + + + /** +****************************************************** +* Property Change Event packages +****************************************************** +*/ + + /* + typedef struct PropertyChangePackageTag { + long vmID; + jobject Event; + jobject AccessibleContextSource; + char propertyName[SHORT_STRING_SIZE]; + char oldValue[SHORT_STRING_SIZE]; // PropertyChangeEvent().getOldValue().toString() + char newValue[SHORT_STRING_SIZE]; // PropertyChangeEvent().getNewValue().toString() + } PropertyChangePackage; + */ + + /* + * Java shutdown event package + */ + typedef struct JavaShutdownPackageTag { + long vmID; + } JavaShutdownPackage; + + + /** +****************************************************** +* Focus Event packages +****************************************************** +*/ + + typedef struct FocusGainedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } FocusGainedPackage; + + typedef struct FocusLostPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } FocusLostPackage; + + + /** +****************************************************** +* Caret Event packages +****************************************************** +*/ + + typedef struct CaretUpdatePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } CaretUpdatePackage; + + + /** +****************************************************** +* Mouse Event packages +****************************************************** +*/ + + typedef struct MouseClickedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MouseClickedPackage; + + typedef struct MouseEnteredPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MouseEnteredPackage; + + typedef struct MouseExitedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MouseExitedPackage; + + typedef struct MousePressedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MousePressedPackage; + + typedef struct MouseReleasedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MouseReleasedPackage; + + + /** +****************************************************** +* Menu/PopupMenu Event packages +****************************************************** +*/ + + typedef struct MenuCanceledPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MenuCanceledPackage; + + typedef struct MenuDeselectedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MenuDeselectedPackage; + + typedef struct MenuSelectedPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } MenuSelectedPackage; + + + typedef struct PopupMenuCanceledPackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } PopupMenuCanceledPackage; + + typedef struct PopupMenuWillBecomeInvisiblePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } PopupMenuWillBecomeInvisiblePackage; + + typedef struct PopupMenuWillBecomeVisiblePackageTag { + long vmID; + JOBJECT64 Event; + JOBJECT64 AccessibleContextSource; + } PopupMenuWillBecomeVisiblePackage; + + /** +****************************************************** +* Additional methods for Teton +****************************************************** +*/ + + /** + * Gets the AccessibleName for a component based upon the JAWS algorithm. Returns + * whether successful. + * + * Bug ID 4916682 - Implement JAWS AccessibleName policy + */ + typedef struct GetVirtualAccessibleNamePackageTag { + long vmID; + AccessibleContext accessibleContext; + wchar_t rName[MAX_STRING_SIZE]; + int len; + } GetVirtualAccessibleNamePackage; + + /** + * Request focus for a component. Returns whether successful; + * + * Bug ID 4944757 - requestFocus method needed + */ + typedef struct RequestFocusPackageTag { + long vmID; + AccessibleContext accessibleContext; + } RequestFocusPackage; + + /** + * Selects text between two indices. Selection includes the text at the start index + * and the text at the end index. Returns whether successful; + * + * Bug ID 4944758 - selectTextRange method needed + */ + typedef struct SelectTextRangePackageTag { + long vmID; + AccessibleContext accessibleContext; + jint startIndex; + jint endIndex; + } SelectTextRangePackage; + + /** + * Gets the number of contiguous characters with the same attributes. + * + * Bug ID 4944761 - getTextAttributes between two indices method needed + */ + typedef struct GetTextAttributesInRangePackageTag { + long vmID; + AccessibleContext accessibleContext; + jint startIndex; // start index (inclusive) + jint endIndex; // end index (inclusive) + AccessibleTextAttributesInfo attributes; // character attributes to match + short rLength; // number of contiguous characters with matching attributes + } GetTextAttributesInRangePackage; + +#define MAX_VISIBLE_CHILDREN 256 + + // visible children information + typedef struct VisibleChildenInfoTag { + int returnedChildrenCount; // number of children returned + AccessibleContext children[MAX_VISIBLE_CHILDREN]; // the visible children + } VisibleChildrenInfo; + + // struct for sending a message to get the number of visible children + typedef struct GetVisibleChildrenCountPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // AccessibleContext of parent component + jint rChildrenCount; // visible children count return value + } GetVisibleChildrenCountPackage; + + // struct for sending a message to get the hypertext for an AccessibleContext + // starting at a specified index in the document + typedef struct GetVisibleChildrenPackageTag { + long vmID; // the virtual machine ID + JOBJECT64 accessibleContext; // AccessibleContext of parent component + jint startIndex; // start index for retrieving children + VisibleChildrenInfo rVisibleChildrenInfo; // returned info + BOOL rSuccess; // whether call succeeded + } GetVisibleChildrenPackage; + + /** + * Set the caret to a text position. Returns whether successful; + * + * Bug ID 4944770 - setCaretPosition method needed + */ + typedef struct SetCaretPositionPackageTag { + long vmID; + AccessibleContext accessibleContext; + jint position; + } SetCaretPositionPackage; + + + /** + ****************************************************** + * Wrapping up all of the packages + ****************************************************** + */ + + /** + * What is the type of this package + */ + typedef enum PackageType { + + cMemoryMappedFileCreatedPackage = 0x11000, + + // many of these will go away... + cJavaVMCreatedPackage = 0x10000, + cJavaVMDestroyedPackage, + cWindowsATCreatedPackage, + cWindowsATDestroyedPackage, + cJavaVMPresentNotificationPackage, + cWindowsATPresentNotificationPackage, + + cReleaseJavaObjectPackage = 1, + cGetAccessBridgeVersionPackage = 2, + + cGetAccessibleContextFromHWNDPackage = 0x10, + cIsJavaWindowPackage, + cGetHWNDFromAccessibleContextPackage, + + cGetAccessibleContextAtPackage = 0x100, + cGetAccessibleContextWithFocusPackage, + cGetAccessibleContextInfoPackage, + cGetAccessibleChildFromContextPackage, + cGetAccessibleParentFromContextPackage, + cIsSameObjectPackage, + + cGetAccessibleTextInfoPackage = 0x200, + cGetAccessibleTextItemsPackage, + cGetAccessibleTextSelectionInfoPackage, + cGetAccessibleTextAttributeInfoPackage, + cGetAccessibleTextRectInfoPackage, + cGetAccessibleTextLineBoundsPackage, + cGetAccessibleTextRangePackage, + + cGetCurrentAccessibleValueFromContextPackage = 0x300, + cGetMaximumAccessibleValueFromContextPackage, + cGetMinimumAccessibleValueFromContextPackage, + + cAddAccessibleSelectionFromContextPackage = 0x400, + cClearAccessibleSelectionFromContextPackage, + cGetAccessibleSelectionFromContextPackage, + cGetAccessibleSelectionCountFromContextPackage, + cIsAccessibleChildSelectedFromContextPackage, + cRemoveAccessibleSelectionFromContextPackage, + cSelectAllAccessibleSelectionFromContextPackage, + + cAddJavaEventNotificationPackage = 0x900, + cRemoveJavaEventNotificationPackage, + cAddAccessibilityEventNotificationPackage, + cRemoveAccessibilityEventNotificationPackage, + + cPropertyChangePackage = 0x1000, + + cJavaShutdownPackage = 0x1010, + cFocusGainedPackage, + cFocusLostPackage, + + cCaretUpdatePackage = 0x1020, + + cMouseClickedPackage = 0x1030, + cMouseEnteredPackage, + cMouseExitedPackage, + cMousePressedPackage, + cMouseReleasedPackage, + + cMenuCanceledPackage = 0x1040, + cMenuDeselectedPackage, + cMenuSelectedPackage, + cPopupMenuCanceledPackage, + cPopupMenuWillBecomeInvisiblePackage, + cPopupMenuWillBecomeVisiblePackage, + + cPropertyCaretChangePackage = 0x1100, + cPropertyDescriptionChangePackage, + cPropertyNameChangePackage, + cPropertySelectionChangePackage, + cPropertyStateChangePackage, + cPropertyTextChangePackage, + cPropertyValueChangePackage, + cPropertyVisibleDataChangePackage, + cPropertyChildChangePackage, + cPropertyActiveDescendentChangePackage, + + + // AccessibleTable + cGetAccessibleTableInfoPackage = 0x1200, + cGetAccessibleTableCellInfoPackage, + + cGetAccessibleTableRowHeaderPackage, + cGetAccessibleTableColumnHeaderPackage, + + cGetAccessibleTableRowDescriptionPackage, + cGetAccessibleTableColumnDescriptionPackage, + + cGetAccessibleTableRowSelectionCountPackage, + cIsAccessibleTableRowSelectedPackage, + cGetAccessibleTableRowSelectionsPackage, + + cGetAccessibleTableColumnSelectionCountPackage, + cIsAccessibleTableColumnSelectedPackage, + cGetAccessibleTableColumnSelectionsPackage, + + cGetAccessibleTableRowPackage, + cGetAccessibleTableColumnPackage, + cGetAccessibleTableIndexPackage, + + cPropertyTableModelChangePackage, + + + // AccessibleRelationSet + cGetAccessibleRelationSetPackage = 0x1300, + + // AccessibleHypertext + cGetAccessibleHypertextPackage = 0x1400, + cActivateAccessibleHyperlinkPackage, + cGetAccessibleHyperlinkCountPackage, + cGetAccessibleHypertextExtPackage, + cGetAccessibleHypertextLinkIndexPackage, + cGetAccessibleHyperlinkPackage, + + // Accessible KeyBinding, Icon and Action + cGetAccessibleKeyBindingsPackage = 0x1500, + cGetAccessibleIconsPackage, + cGetAccessibleActionsPackage, + cDoAccessibleActionsPackage, + + // Utility methods + cSetTextContentsPackage = 0x1600, + cGetParentWithRolePackage, + cGetTopLevelObjectPackage, + cGetParentWithRoleElseRootPackage, + cGetObjectDepthPackage, + cGetActiveDescendentPackage, + + // Additional methods for Teton + cGetVirtualAccessibleNamePackage = 0x1700, + cRequestFocusPackage, + cSelectTextRangePackage, + cGetTextAttributesInRangePackage, + cGetSameTextAttributesInRangePackage, + cGetVisibleChildrenCountPackage, + cGetVisibleChildrenPackage, + cSetCaretPositionPackage, + cGetCaretLocationPackage + + + } PackageType; + + + /** + * Union of all package contents + */ + typedef union AllPackagesTag { + + // Initial Rendezvous packages + MemoryMappedFileCreatedPackage memoryMappedFileCreatedPackage; + + JavaVMCreatedPackage javaVMCreatedPackage; + JavaVMDestroyedPackage javaVMDestroyedPackage; + WindowsATCreatedPackage windowsATCreatedPackage; + WindowsATDestroyedPackage windowsATDestroyedPackage; + JavaVMPresentNotificationPackage javaVMPresentNotificationPackage; + WindowsATPresentNotificationPackage windowsATPresentNotificationPackage; + + // Core packages + ReleaseJavaObjectPackage releaseJavaObject; + GetAccessBridgeVersionPackage getAccessBridgeVersion; + + // Window packages + GetAccessibleContextFromHWNDPackage getAccessibleContextFromHWND; + GetHWNDFromAccessibleContextPackage getHWNDFromAccessibleContext; + + // AccessibleContext packages + GetAccessibleContextAtPackage getAccessibleContextAt; + GetAccessibleContextWithFocusPackage getAccessibleContextWithFocus; + GetAccessibleContextInfoPackage getAccessibleContextInfo; + GetAccessibleChildFromContextPackage getAccessibleChildFromContext; + GetAccessibleParentFromContextPackage getAccessibleParentFromContext; + + // AccessibleText packages + GetAccessibleTextInfoPackage getAccessibleTextInfo; + GetAccessibleTextItemsPackage getAccessibleTextItems; + GetAccessibleTextSelectionInfoPackage getAccessibleTextSelectionInfo; + GetAccessibleTextAttributeInfoPackage getAccessibleTextAttributeInfo; + GetAccessibleTextRectInfoPackage getAccessibleTextRectInfo; + GetAccessibleTextLineBoundsPackage getAccessibleTextLineBounds; + GetAccessibleTextRangePackage getAccessibleTextRange; + + // AccessibleValue packages + GetCurrentAccessibleValueFromContextPackage getCurrentAccessibleValueFromContext; + GetMaximumAccessibleValueFromContextPackage getMaximumAccessibleValueFromContext; + GetMinimumAccessibleValueFromContextPackage getMinimumAccessibleValueFromContext; + + // AccessibleSelection packages + AddAccessibleSelectionFromContextPackage addAccessibleSelectionFromContext; + ClearAccessibleSelectionFromContextPackage clearAccessibleSelectionFromContext; + GetAccessibleSelectionFromContextPackage getAccessibleSelectionFromContext; + GetAccessibleSelectionCountFromContextPackage getAccessibleSelectionCountFromContext; + IsAccessibleChildSelectedFromContextPackage isAccessibleChildSelectedFromContext; + RemoveAccessibleSelectionFromContextPackage removeAccessibleSelectionFromContext; + SelectAllAccessibleSelectionFromContextPackage selectAllAccessibleSelectionFromContext; + + // Event Notification Registration packages + AddJavaEventNotificationPackage addJavaEventNotification; + RemoveJavaEventNotificationPackage removeJavaEventNotification; + AddAccessibilityEventNotificationPackage addAccessibilityEventNotification; + RemoveAccessibilityEventNotificationPackage removeAccessibilityEventNotification; + + // Event contents packages + // PropertyChangePackage propertyChange; + PropertyCaretChangePackage propertyCaretChangePackage; + PropertyDescriptionChangePackage propertyDescriptionChangePackage; + PropertyNameChangePackage propertyNameChangePackage; + PropertySelectionChangePackage propertySelectionChangePackage; + PropertyStateChangePackage propertyStateChangePackage; + PropertyTextChangePackage propertyTextChangePackage; + PropertyValueChangePackage propertyValueChangePackage; + PropertyVisibleDataChangePackage propertyVisibleDataChangePackage; + PropertyChildChangePackage propertyChildChangePackage; + PropertyActiveDescendentChangePackage propertyActiveDescendentChangePackage; + + PropertyTableModelChangePackage propertyTableModelChangePackage; + + JavaShutdownPackage JavaShutdown; + FocusGainedPackage focusGained; + FocusLostPackage focusLost; + + CaretUpdatePackage caretUpdate; + + MouseClickedPackage mouseClicked; + MouseEnteredPackage mouseEntered; + MouseExitedPackage mouseExited; + MousePressedPackage mousePressed; + MouseReleasedPackage mouseReleased; + + MenuCanceledPackage menuCanceled; + MenuDeselectedPackage menuDeselected; + MenuSelectedPackage menuSelected; + PopupMenuCanceledPackage popupMenuCanceled; + PopupMenuWillBecomeInvisiblePackage popupMenuWillBecomeInvisible; + PopupMenuWillBecomeVisiblePackage popupMenuWillBecomeVisible; + + // AccessibleRelationSet + GetAccessibleRelationSetPackage getAccessibleRelationSet; + + // AccessibleHypertext + GetAccessibleHypertextPackage _getAccessibleHypertext; + ActivateAccessibleHyperlinkPackage _activateAccessibleHyperlink; + GetAccessibleHyperlinkCountPackage _getAccessibleHyperlinkCount; + GetAccessibleHypertextExtPackage _getAccessibleHypertextExt; + GetAccessibleHypertextLinkIndexPackage _getAccessibleHypertextLinkIndex; + GetAccessibleHyperlinkPackage _getAccessibleHyperlink; + + // Accessible KeyBinding, Icon and Action + GetAccessibleKeyBindingsPackage getAccessibleKeyBindings; + GetAccessibleIconsPackage getAccessibleIcons; + GetAccessibleActionsPackage getAccessibleActions; + DoAccessibleActionsPackage doAccessibleActions; + + // utility methods + SetTextContentsPackage _setTextContents; + GetParentWithRolePackage _getParentWithRole; + GetTopLevelObjectPackage _getTopLevelObject; + GetParentWithRoleElseRootPackage _getParentWithRoleElseRoot; + GetObjectDepthPackage _getObjectDepth; + GetActiveDescendentPackage _getActiveDescendent; + + // Additional methods for Teton + GetVirtualAccessibleNamePackage _getVirtualAccessibleName; + RequestFocusPackage _requestFocus; + SelectTextRangePackage _selectTextRange; + GetTextAttributesInRangePackage _getTextAttributesInRange; + GetVisibleChildrenCountPackage _getVisibleChildrenCount; + GetVisibleChildrenPackage _getVisibleChildren; + SetCaretPositionPackage _setCaretPosition; + + } AllPackages; + + + /** + * Union of all Java-initiated package contents + */ + typedef union JavaInitiatedPackagesTag { + + // Initial Rendezvous packages + JavaVMCreatedPackage javaVMCreatedPackage; + JavaVMDestroyedPackage javaVMDestroyedPackage; + JavaVMPresentNotificationPackage javaVMPresentNotificationPackage; + + // Event contents packages + PropertyCaretChangePackage propertyCaretChangePackage; + PropertyDescriptionChangePackage propertyDescriptionChangePackage; + PropertyNameChangePackage propertyNameChangePackage; + PropertySelectionChangePackage propertySelectionChangePackage; + PropertyStateChangePackage propertyStateChangePackage; + PropertyTextChangePackage propertyTextChangePackage; + PropertyValueChangePackage propertyValueChangePackage; + PropertyVisibleDataChangePackage propertyVisibleDataChangePackage; + PropertyChildChangePackage propertyChildChangePackage; + PropertyActiveDescendentChangePackage propertyActiveDescendentChangePackage; + + PropertyTableModelChangePackage propertyTableModelChangePackage; + + JavaShutdownPackage JavaShutdown; + FocusGainedPackage focusGained; + FocusLostPackage focusLost; + + CaretUpdatePackage caretUpdate; + + MouseClickedPackage mouseClicked; + MouseEnteredPackage mouseEntered; + MouseExitedPackage mouseExited; + MousePressedPackage mousePressed; + MouseReleasedPackage mouseReleased; + + MenuCanceledPackage menuCanceled; + MenuDeselectedPackage menuDeselected; + MenuSelectedPackage menuSelected; + PopupMenuCanceledPackage popupMenuCanceled; + PopupMenuWillBecomeInvisiblePackage popupMenuWillBecomeInvisible; + PopupMenuWillBecomeVisiblePackage popupMenuWillBecomeVisible; + + } JavaInitiatedPackages; + + + /** + * Union of all Windows-initiated package contents + */ + typedef union WindowsInitiatedPackagesTag { + + // Initial Rendezvous packages + MemoryMappedFileCreatedPackage memoryMappedFileCreatedPackage; + + WindowsATCreatedPackage windowsATCreatedPackage; + WindowsATDestroyedPackage windowsATDestroyedPackage; + WindowsATPresentNotificationPackage windowsATPresentNotificationPackage; + + // Core packages + ReleaseJavaObjectPackage releaseJavaObject; + GetAccessBridgeVersionPackage getAccessBridgeVersion; + + // Window packages + GetAccessibleContextFromHWNDPackage getAccessibleContextFromHWND; + GetHWNDFromAccessibleContextPackage getHWNDFromAccessibleContext; + + // AccessibleContext packages + GetAccessibleContextAtPackage getAccessibleContextAt; + GetAccessibleContextWithFocusPackage getAccessibleContextWithFocus; + GetAccessibleContextInfoPackage getAccessibleContextInfo; + GetAccessibleChildFromContextPackage getAccessibleChildFromContext; + GetAccessibleParentFromContextPackage getAccessibleParentFromContext; + + // AccessibleText packages + GetAccessibleTextInfoPackage getAccessibleTextInfo; + GetAccessibleTextItemsPackage getAccessibleTextItems; + GetAccessibleTextSelectionInfoPackage getAccessibleTextSelectionInfo; + GetAccessibleTextAttributeInfoPackage getAccessibleTextAttributeInfo; + GetAccessibleTextRectInfoPackage getAccessibleTextRectInfo; + GetAccessibleTextLineBoundsPackage getAccessibleTextLineBounds; + GetAccessibleTextRangePackage getAccessibleTextRange; + + // AccessibleValue packages + GetCurrentAccessibleValueFromContextPackage getCurrentAccessibleValueFromContext; + GetMaximumAccessibleValueFromContextPackage getMaximumAccessibleValueFromContext; + GetMinimumAccessibleValueFromContextPackage getMinimumAccessibleValueFromContext; + + // AccessibleSelection packages + AddAccessibleSelectionFromContextPackage addAccessibleSelectionFromContext; + ClearAccessibleSelectionFromContextPackage clearAccessibleSelectionFromContext; + GetAccessibleSelectionFromContextPackage getAccessibleSelectionFromContext; + GetAccessibleSelectionCountFromContextPackage getAccessibleSelectionCountFromContext; + IsAccessibleChildSelectedFromContextPackage isAccessibleChildSelectedFromContext; + RemoveAccessibleSelectionFromContextPackage removeAccessibleSelectionFromContext; + SelectAllAccessibleSelectionFromContextPackage selectAllAccessibleSelectionFromContext; + + // Event Notification Registration packages + AddJavaEventNotificationPackage addJavaEventNotification; + RemoveJavaEventNotificationPackage removeJavaEventNotification; + AddAccessibilityEventNotificationPackage addAccessibilityEventNotification; + RemoveAccessibilityEventNotificationPackage removeAccessibilityEventNotification; + + // AccessibleTable + GetAccessibleTableInfoPackage _getAccessibleTableInfo; + GetAccessibleTableCellInfoPackage _getAccessibleTableCellInfo; + + GetAccessibleTableRowHeaderPackage _getAccessibleTableRowHeader; + GetAccessibleTableColumnHeaderPackage _getAccessibleTableColumnHeader; + + GetAccessibleTableRowDescriptionPackage _getAccessibleTableRowDescription; + GetAccessibleTableColumnDescriptionPackage _getAccessibleTableColumnDescription; + + GetAccessibleTableRowSelectionCountPackage _getAccessibleTableRowSelectionCount; + IsAccessibleTableRowSelectedPackage _isAccessibleTableRowSelected; + GetAccessibleTableRowSelectionsPackage _getAccessibleTableRowSelections; + + GetAccessibleTableColumnSelectionCountPackage _getAccessibleTableColumnSelectionCount; + IsAccessibleTableColumnSelectedPackage _isAccessibleTableColumnSelected; + GetAccessibleTableColumnSelectionsPackage _getAccessibleTableColumnSelections; + + GetAccessibleTableRowPackage _getAccessibleTableRow; + GetAccessibleTableColumnPackage _getAccessibleTableColumn; + GetAccessibleTableIndexPackage _getAccessibleTableIndex; + + // AccessibleRelationSet + GetAccessibleRelationSetPackage _getAccessibleRelationSet; + + // Accessible KeyBindings, Icons and Actions + GetAccessibleKeyBindingsPackage _getAccessibleKeyBindings; + GetAccessibleIconsPackage _getAccessibleIcons; + GetAccessibleActionsPackage _getAccessibleActions; + DoAccessibleActionsPackage _doAccessibleActions; + + + IsSameObjectPackage _isSameObject; + + // utility methods + SetTextContentsPackage _setTextContents; + GetParentWithRolePackage _getParentWithRole; + GetTopLevelObjectPackage _getTopLevelObject; + GetParentWithRoleElseRootPackage _getParentWithRoleElseRoot; + GetObjectDepthPackage _getObjectDepth; + GetActiveDescendentPackage _getActiveDescendent; + + // Additional methods for Teton + GetVirtualAccessibleNamePackage _getVirtualAccessibleName; + RequestFocusPackage _requestFocus; + SelectTextRangePackage _selectTextRange; + GetTextAttributesInRangePackage _getTextAttributesInRange; + GetVisibleChildrenCountPackage _getVisibleChildrenCount; + GetVisibleChildrenPackage _getVisibleChildren; + SetCaretPositionPackage _setCaretPosition; + + + } WindowsInitiatedPackages; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/java21/include/win32/jawt_md.h b/java21/include/win32/jawt_md.h new file mode 100644 index 0000000000000000000000000000000000000000..7d43ff82737a80aab2fdd4e1128c996020a38bc3 --- /dev/null +++ b/java21/include/win32/jawt_md.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 1999, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +#ifndef _JAVASOFT_JAWT_MD_H_ +#define _JAVASOFT_JAWT_MD_H_ + +#include +#include "jawt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Win32-specific declarations for AWT native interface. + * See notes in jawt.h for an example of use. + */ +typedef struct jawt_Win32DrawingSurfaceInfo { + /* Native window, DDB, or DIB handle */ + union { + HWND hwnd; + HBITMAP hbitmap; + void* pbits; + }; + /* + * This HDC should always be used instead of the HDC returned from + * BeginPaint() or any calls to GetDC(). + */ + HDC hdc; + HPALETTE hpalette; +} JAWT_Win32DrawingSurfaceInfo; + +#ifdef __cplusplus +} +#endif + +#endif /* !_JAVASOFT_JAWT_MD_H_ */ diff --git a/java21/include/win32/jni_md.h b/java21/include/win32/jni_md.h new file mode 100644 index 0000000000000000000000000000000000000000..f795421937e97d401e599849782f6ac46f8ff70f --- /dev/null +++ b/java21/include/win32/jni_md.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 1996, 2023, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. Oracle designates this + * particular file as subject to the "Classpath" exception as provided + * by Oracle in the LICENSE file that accompanied this code. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + +#ifndef _JAVASOFT_JNI_MD_H_ +#define _JAVASOFT_JNI_MD_H_ + +#ifndef JNIEXPORT + #define JNIEXPORT __declspec(dllexport) +#endif +#define JNIIMPORT __declspec(dllimport) +#define JNICALL __stdcall + +typedef int jint; +typedef long long jlong; +typedef signed char jbyte; + +#endif /* !_JAVASOFT_JNI_MD_H_ */ diff --git a/java21/jmods/java.datatransfer.jmod b/java21/jmods/java.datatransfer.jmod new file mode 100644 index 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b/java21/legal/java.base/ADDITIONAL_LICENSE_INFO @@ -0,0 +1,37 @@ + ADDITIONAL INFORMATION ABOUT LICENSING + +Certain files distributed by Oracle America, Inc. and/or its affiliates are +subject to the following clarification and special exception to the GPLv2, +based on the GNU Project exception for its Classpath libraries, known as the +GNU Classpath Exception. + +Note that Oracle includes multiple, independent programs in this software +package. Some of those programs are provided under licenses deemed +incompatible with the GPLv2 by the Free Software Foundation and others. +For example, the package includes programs licensed under the Apache +License, Version 2.0 and may include FreeType. Such programs are licensed +to you under their original licenses. + +Oracle facilitates your further distribution of this package by adding the +Classpath Exception to the necessary parts of its GPLv2 code, which permits +you to use that code in combination with other independent modules not +licensed under the GPLv2. However, note that this would not permit you to +commingle code under an incompatible license with Oracle's GPLv2 licensed +code by, for example, cutting and pasting such code into a file also +containing Oracle's GPLv2 licensed code and then distributing the result. + +Additionally, if you were to remove the Classpath Exception from any of the +files to which it applies and distribute the result, you would likely be +required to license some or all of the other code in that distribution under +the GPLv2 as well, and since the GPLv2 is incompatible with the license terms +of some items included in the distribution by Oracle, removing the Classpath +Exception could therefore effectively compromise your ability to further +distribute the package. + +Failing to distribute notices associated with some files may also create +unexpected legal consequences. + +Proceed with caution and we recommend that you obtain the advice of a lawyer +skilled in open source matters before removing the Classpath Exception or +making modifications to this package which may subsequently be redistributed +and/or involve the use of third party software. diff --git a/java21/legal/java.base/ASSEMBLY_EXCEPTION b/java21/legal/java.base/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..429666664e9ff5029d51dc7f807e1ec9eff2dd9f --- /dev/null +++ b/java21/legal/java.base/ASSEMBLY_EXCEPTION @@ -0,0 +1,27 @@ + +OPENJDK ASSEMBLY EXCEPTION + +The OpenJDK source code made available by Oracle America, Inc. (Oracle) at +openjdk.org ("OpenJDK Code") is distributed under the terms of the GNU +General Public License version 2 +only ("GPL2"), with the following clarification and special exception. + + Linking this OpenJDK Code statically or dynamically with other code + is making a combined work based on this library. Thus, the terms + and conditions of GPL2 cover the whole combination. + + As a special exception, Oracle gives you permission to link this + OpenJDK Code with certain code licensed by Oracle as indicated at + https://openjdk.org/legal/exception-modules-2007-05-08.html + ("Designated Exception Modules") to produce an executable, + regardless of the license terms of the Designated Exception Modules, + and to copy and distribute the resulting executable under GPL2, + provided that the Designated Exception Modules continue to be + governed by the licenses under which they were offered by Oracle. + +As such, it allows licensees and sublicensees of Oracle's GPL2 OpenJDK Code +to build an executable that includes those portions of necessary code that +Oracle could not provide under GPL2 (or that Oracle has provided under GPL2 +with the Classpath exception). If you modify or add to the OpenJDK code, +that new GPL2 code may still be combined with Designated Exception Modules +if the new code is made subject to this exception by its copyright holder. diff --git a/java21/legal/java.base/LICENSE b/java21/legal/java.base/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..8b400c7ab81b7b18baff3f81d597f5e511883134 --- /dev/null +++ b/java21/legal/java.base/LICENSE @@ -0,0 +1,347 @@ +The GNU General Public License (GPL) + +Version 2, June 1991 + +Copyright (C) 1989, 1991 Free Software Foundation, Inc. +51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +Everyone is permitted to copy and distribute verbatim copies of this license +document, but changing it is not allowed. + +Preamble + +The licenses for most software are designed to take away your freedom to share +and change it. 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You may copy and distribute verbatim copies of the Program's source code as +you receive it, in any medium, provided that you conspicuously and +appropriately publish on each copy an appropriate copyright notice and +disclaimer of warranty; keep intact all the notices that refer to this License +and to the absence of any warranty; and give any other recipients of the +Program a copy of this License along with the Program. + +You may charge a fee for the physical act of transferring a copy, and you may +at your option offer warranty protection in exchange for a fee. + +2. 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Each time you redistribute the Program (or any work based on the Program), +the recipient automatically receives a license from the original licensor to +copy, distribute or modify the Program subject to these terms and conditions. +You may not impose any further restrictions on the recipients' exercise of the +rights granted herein. You are not responsible for enforcing compliance by +third parties to this License. + +7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), conditions +are imposed on you (whether by court order, agreement or otherwise) that +contradict the conditions of this License, they do not excuse you from the +conditions of this License. If you cannot distribute so as to satisfy +simultaneously your obligations under this License and any other pertinent +obligations, then as a consequence you may not distribute the Program at all. +For example, if a patent license would not permit royalty-free redistribution +of the Program by all those who receive copies directly or indirectly through +you, then the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under any +particular circumstance, the balance of the section is intended to apply and +the section as a whole is intended to apply in other circumstances. + +It is not the purpose of this section to induce you to infringe any patents or +other property right claims or to contest validity of any such claims; this +section has the sole purpose of protecting the integrity of the free software +distribution system, which is implemented by public license practices. Many +people have made generous contributions to the wide range of software +distributed through that system in reliance on consistent application of that +system; it is up to the author/donor to decide if he or she is willing to +distribute software through any other system and a licensee cannot impose that +choice. + +This section is intended to make thoroughly clear what is believed to be a +consequence of the rest of this License. + +8. If the distribution and/or use of the Program is restricted in certain +countries either by patents or by copyrighted interfaces, the original +copyright holder who places the Program under this License may add an explicit +geographical distribution limitation excluding those countries, so that +distribution is permitted only in or among countries not thus excluded. In +such case, this License incorporates the limitation as if written in the body +of this License. + +9. The Free Software Foundation may publish revised and/or new versions of the +General Public License from time to time. Such new versions will be similar in +spirit to the present version, but may differ in detail to address new problems +or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any later +version", you have the option of following the terms and conditions either of +that version or of any later version published by the Free Software Foundation. +If the Program does not specify a version number of this License, you may +choose any version ever published by the Free Software Foundation. + +10. If you wish to incorporate parts of the Program into other free programs +whose distribution conditions are different, write to the author to ask for +permission. For software which is copyrighted by the Free Software Foundation, +write to the Free Software Foundation; we sometimes make exceptions for this. +Our decision will be guided by the two goals of preserving the free status of +all derivatives of our free software and of promoting the sharing and reuse of +software generally. + +NO WARRANTY + +11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR +THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE +STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE +PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, +INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND +PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, +YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. + +12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL +ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE +PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY +GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR +INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA +BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A +FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER +OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +END OF TERMS AND CONDITIONS + +How to Apply These Terms to Your New Programs + +If you develop a new program, and you want it to be of the greatest possible +use to the public, the best way to achieve this is to make it free software +which everyone can redistribute and change under these terms. + +To do so, attach the following notices to the program. It is safest to attach +them to the start of each source file to most effectively convey the exclusion +of warranty; and each file should have at least the "copyright" line and a +pointer to where the full notice is found. + + One line to give the program's name and a brief idea of what it does. + + Copyright (C) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this when it +starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author Gnomovision comes + with ABSOLUTELY NO WARRANTY; for details type 'show w'. This is free + software, and you are welcome to redistribute it under certain conditions; + type 'show c' for details. + +The hypothetical commands 'show w' and 'show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may be +called something other than 'show w' and 'show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your school, +if any, to sign a "copyright disclaimer" for the program, if necessary. Here +is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + 'Gnomovision' (which makes passes at compilers) written by James Hacker. + + signature of Ty Coon, 1 April 1989 + + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General Public +License instead of this License. + + +"CLASSPATH" EXCEPTION TO THE GPL + +Certain source files distributed by Oracle America and/or its affiliates are +subject to the following clarification and special exception to the GPL, but +only where Oracle has expressly included in the particular source file's header +the words "Oracle designates this particular file as subject to the "Classpath" +exception as provided by Oracle in the LICENSE file that accompanied this code." + + Linking this library statically or dynamically with other modules is making + a combined work based on this library. Thus, the terms and conditions of + the GNU General Public License cover the whole combination. + + As a special exception, the copyright holders of this library give you + permission to link this library with independent modules to produce an + executable, regardless of the license terms of these independent modules, + and to copy and distribute the resulting executable under terms of your + choice, provided that you also meet, for each linked independent module, + the terms and conditions of the license of that module. An independent + module is a module which is not derived from or based on this library. If + you modify this library, you may extend this exception to your version of + the library, but you are not obligated to do so. If you do not wish to do + so, delete this exception statement from your version. diff --git a/java21/legal/java.base/aes.md b/java21/legal/java.base/aes.md new file mode 100644 index 0000000000000000000000000000000000000000..6d0ee2e2bb4a501ec2f8174f6b13b8883f54175c --- /dev/null +++ b/java21/legal/java.base/aes.md @@ -0,0 +1,36 @@ +## Cryptix AES v3.2.0 + +### Cryptix General License +
+
+Cryptix General License
+
+Copyright (c) 1995-2005 The Cryptix Foundation Limited.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+  1. Redistributions of source code must retain the copyright notice,
+     this list of conditions and the following disclaimer.
+
+  2. Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE CRYPTIX FOUNDATION LIMITED AND
+CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE CRYPTIX FOUNDATION LIMITED OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java21/legal/java.base/asm.md b/java21/legal/java.base/asm.md new file mode 100644 index 0000000000000000000000000000000000000000..0a5d1c9b151a3e416ed4c5de589a6507dac81b15 --- /dev/null +++ b/java21/legal/java.base/asm.md @@ -0,0 +1,36 @@ +## ASM Bytecode Manipulation Framework v9.3 + +### ASM License +
+
+Copyright (c) 2000-2011 France Télécom
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+
+3. Neither the name of the copyright holders nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java21/legal/java.base/c-libutl.md b/java21/legal/java.base/c-libutl.md new file mode 100644 index 0000000000000000000000000000000000000000..8bc98806825f58b159b6d8b369fff17ebb420f0a --- /dev/null +++ b/java21/legal/java.base/c-libutl.md @@ -0,0 +1,35 @@ +## c-libutl 20160225 + +### c-libutl License +``` + +This software is distributed under the terms of the BSD license. + +== BSD LICENSE =============================================================== + + (C) 2009 by Remo Dentato (rdentato@gmail.com) + + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +http://opensource.org/licenses/bsd-license.php + +``` diff --git a/java21/legal/java.base/cldr.md b/java21/legal/java.base/cldr.md new file mode 100644 index 0000000000000000000000000000000000000000..1c43d1af35f8d962c21fe1c9df2a0032150a2aa4 --- /dev/null +++ b/java21/legal/java.base/cldr.md @@ -0,0 +1,109 @@ +## Unicode Common Local Data Repository (CLDR) v43 + +### CLDR License + +``` + +UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE + +See Terms of Use +for definitions of Unicode Inc.’s Data Files and Software. + +NOTICE TO USER: Carefully read the following legal agreement. +BY DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S +DATA FILES ("DATA FILES"), AND/OR SOFTWARE ("SOFTWARE"), +YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, ALL OF THE +TERMS AND CONDITIONS OF THIS AGREEMENT. +IF YOU DO NOT AGREE, DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE +THE DATA FILES OR SOFTWARE. + +COPYRIGHT AND PERMISSION NOTICE + +Copyright © 1991-2022 Unicode, Inc. All rights reserved. +Distributed under the Terms of Use in https://www.unicode.org/copyright.html. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of the Unicode data files and any associated documentation +(the "Data Files") or Unicode software and any associated documentation +(the "Software") to deal in the Data Files or Software +without restriction, including without limitation the rights to use, +copy, modify, merge, publish, distribute, and/or sell copies of +the Data Files or Software, and to permit persons to whom the Data Files +or Software are furnished to do so, provided that either +(a) this copyright and permission notice appear with all copies +of the Data Files or Software, or +(b) this copyright and permission notice appear in associated +Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF +ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NONINFRINGEMENT OF THIRD PARTY RIGHTS. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS +NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL +DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, +DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER +TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +PERFORMANCE OF THE DATA FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder +shall not be used in advertising or otherwise to promote the sale, +use or other dealings in these Data Files or Software without prior +written authorization of the copyright holder. + + + +------------------------------------------------------------ Terms of Use --------------------------------------------------------------- + + + Unicode® Copyright and Terms of Use + + For the general privacy policy governing access to this site, see the Unicode Privacy Policy. + + Unicode Copyright + Copyright © 1991-2023 Unicode, Inc. All rights reserved. + Definitions + + Unicode Data Files ("DATA FILES") include all data files under the directories: + https://www.unicode.org/Public/ + https://www.unicode.org/reports/ + https://www.unicode.org/ivd/data/ + + Unicode Data Files do not include PDF online code charts under the directory: + https://www.unicode.org/Public/ + + Unicode Software ("SOFTWARE") includes any source code published in the Unicode Standard + or any source code or compiled code under the directories: + https://www.unicode.org/Public/PROGRAMS/ + https://www.unicode.org/Public/cldr/ + http://site.icu-project.org/download/ + + Terms of Use + Certain documents and files on this website contain a legend indicating that "Modification is permitted." Any person is hereby authorized, without fee, to modify such documents and files to create derivative works conforming to the Unicode® Standard, subject to Terms and Conditions herein. + Any person is hereby authorized, without fee, to view, use, reproduce, and distribute all documents and files, subject to the Terms and Conditions herein. + Further specifications of rights and restrictions pertaining to the use of the Unicode DATA FILES and SOFTWARE can be found in the Unicode Data Files and Software License. + Each version of the Unicode Standard has further specifications of rights and restrictions of use. For the book editions (Unicode 5.0 and earlier), these are found on the back of the title page. + The Unicode PDF online code charts carry specific restrictions. Those restrictions are incorporated as the first page of each PDF code chart. + All other files, including online documentation of the core specification for Unicode 6.0 and later, are covered under these general Terms of Use. + No license is granted to "mirror" the Unicode website where a fee is charged for access to the "mirror" site. + Modification is not permitted with respect to this document. All copies of this document must be verbatim. + Restricted Rights Legend + Any technical data or software which is licensed to the United States of America, its agencies and/or instrumentalities under this Agreement is commercial technical data or commercial computer software developed exclusively at private expense as defined in FAR 2.101, or DFARS 252.227-7014 (June 1995), as applicable. For technical data, use, duplication, or disclosure by the Government is subject to restrictions as set forth in DFARS 202.227-7015 Technical Data, Commercial and Items (Nov 1995) and this Agreement. For Software, in accordance with FAR 12-212 or DFARS 227-7202, as applicable, use, duplication or disclosure by the Government is subject to the restrictions set forth in this Agreement. + Warranties and Disclaimers + This publication and/or website may include technical or typographical errors or other inaccuracies. Changes are periodically added to the information herein; these changes will be incorporated in new editions of the publication and/or website. Unicode, Inc. may make improvements and/or changes in the product(s) and/or program(s) described in this publication and/or website at any time. + If this file has been purchased on magnetic or optical media from Unicode, Inc. the sole and exclusive remedy for any claim will be exchange of the defective media within ninety (90) days of original purchase. + EXCEPT AS PROVIDED IN SECTION E.2, THIS PUBLICATION AND/OR SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EITHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. UNICODE, INC. AND ITS LICENSORS ASSUME NO RESPONSIBILITY FOR ERRORS OR OMISSIONS IN THIS PUBLICATION AND/OR SOFTWARE OR OTHER DOCUMENTS WHICH ARE REFERENCED BY OR LINKED TO THIS PUBLICATION OR THE UNICODE WEBSITE. + Waiver of Damages + In no event shall Unicode, Inc. or its licensors be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, whether or not Unicode, Inc. was advised of the possibility of the damage, including, without limitation, those resulting from the following: loss of use, data or profits, in connection with the use, modification or distribution of this information or its derivatives. + Trademarks & Logos + The Unicode Word Mark and the Unicode Logo are trademarks of Unicode, Inc. “The Unicode Consortium” and “Unicode, Inc.” are trade names of Unicode, Inc. Use of the information and materials found on this website indicates your acknowledgement of Unicode, Inc.’s exclusive worldwide rights in the Unicode Word Mark, the Unicode Logo, and the Unicode trade names. + The Unicode Consortium Name and Trademark Usage Policy (“Trademark Policy”) are incorporated herein by reference and you agree to abide by the provisions of the Trademark Policy, which may be changed from time to time in the sole discretion of Unicode, Inc. + All third party trademarks referenced herein are the property of their respective owners. + Miscellaneous + Jurisdiction and Venue. This website is operated from a location in the State of California, United States of America. Unicode, Inc. makes no representation that the materials are appropriate for use in other locations. If you access this website from other locations, you are responsible for compliance with local laws. This Agreement, all use of this website and any claims and damages resulting from use of this website are governed solely by the laws of the State of California without regard to any principles which would apply the laws of a different jurisdiction. The user agrees that any disputes regarding this website shall be resolved solely in the courts located in Santa Clara County, California. The user agrees said courts have personal jurisdiction and agree to waive any right to transfer the dispute to any other forum. + Modification by Unicode, Inc. Unicode, Inc. shall have the right to modify this Agreement at any time by posting it to this website. The user may not assign any part of this Agreement without Unicode, Inc.’s prior written consent. + Taxes. The user agrees to pay any taxes arising from access to this website or use of the information herein, except for those based on Unicode’s net income. + Severability. If any provision of this Agreement is declared invalid or unenforceable, the remaining provisions of this Agreement shall remain in effect. + Entire Agreement. This Agreement constitutes the entire agreement between the parties. + +``` diff --git a/java21/legal/java.base/icu.md b/java21/legal/java.base/icu.md new file mode 100644 index 0000000000000000000000000000000000000000..95040f49cb6b18a71c71c6869f51d825c6019e93 --- /dev/null +++ b/java21/legal/java.base/icu.md @@ -0,0 +1,518 @@ +## International Components for Unicode (ICU4J) v72.1 + +### ICU4J License +``` + +COPYRIGHT AND PERMISSION NOTICE (ICU 58 and later) + +Copyright © 1991-2022 Unicode, Inc. All rights reserved. +Distributed under the Terms of Use in https://www.unicode.org/copyright.html. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of the Unicode data files and any associated documentation +(the "Data Files") or Unicode software and any associated documentation +(the "Software") to deal in the Data Files or Software +without restriction, including without limitation the rights to use, +copy, modify, merge, publish, distribute, and/or sell copies of +the Data Files or Software, and to permit persons to whom the Data Files +or Software are furnished to do so, provided that either +(a) this copyright and permission notice appear with all copies +of the Data Files or Software, or +(b) this copyright and permission notice appear in associated +Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF +ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NONINFRINGEMENT OF THIRD PARTY RIGHTS. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS +NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL +DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, +DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER +TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +PERFORMANCE OF THE DATA FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder +shall not be used in advertising or otherwise to promote the sale, +use or other dealings in these Data Files or Software without prior +written authorization of the copyright holder. + +--------------------- + +Third-Party Software Licenses + +This section contains third-party software notices and/or additional +terms for licensed third-party software components included within ICU +libraries. + +1. ICU License - ICU 1.8.1 to ICU 57.1 + +COPYRIGHT AND PERMISSION NOTICE + +Copyright (c) 1995-2016 International Business Machines Corporation and others +All rights reserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, and/or sell copies of the Software, and to permit persons +to whom the Software is furnished to do so, provided that the above +copyright notice(s) and this permission notice appear in all copies of +the Software and that both the above copyright notice(s) and this +permission notice appear in supporting documentation. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT +OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR +HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY +SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER +RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN +CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +Except as contained in this notice, the name of a copyright holder +shall not be used in advertising or otherwise to promote the sale, use +or other dealings in this Software without prior written authorization +of the copyright holder. + +All trademarks and registered trademarks mentioned herein are the +property of their respective owners. + +2. Chinese/Japanese Word Break Dictionary Data (cjdict.txt) + + # The Google Chrome software developed by Google is licensed under + # the BSD license. Other software included in this distribution is + # provided under other licenses, as set forth below. + # + # The BSD License + # http://opensource.org/licenses/bsd-license.php + # Copyright (C) 2006-2008, Google Inc. + # + # All rights reserved. + # + # Redistribution and use in source and binary forms, with or without + # modification, are permitted provided that the following conditions are met: + # + # Redistributions of source code must retain the above copyright notice, + # this list of conditions and the following disclaimer. + # Redistributions in binary form must reproduce the above + # copyright notice, this list of conditions and the following + # disclaimer in the documentation and/or other materials provided with + # the distribution. + # Neither the name of Google Inc. nor the names of its + # contributors may be used to endorse or promote products derived from + # this software without specific prior written permission. + # + # + # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + # CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + # INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + # BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + # LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + # + # + # The word list in cjdict.txt are generated by combining three word lists + # listed below with further processing for compound word breaking. The + # frequency is generated with an iterative training against Google web + # corpora. + # + # * Libtabe (Chinese) + # - https://sourceforge.net/project/?group_id=1519 + # - Its license terms and conditions are shown below. + # + # * IPADIC (Japanese) + # - http://chasen.aist-nara.ac.jp/chasen/distribution.html + # - Its license terms and conditions are shown below. + # + # ---------COPYING.libtabe ---- BEGIN-------------------- + # + # /* + # * Copyright (c) 1999 TaBE Project. + # * Copyright (c) 1999 Pai-Hsiang Hsiao. + # * All rights reserved. + # * + # * Redistribution and use in source and binary forms, with or without + # * modification, are permitted provided that the following conditions + # * are met: + # * + # * . Redistributions of source code must retain the above copyright + # * notice, this list of conditions and the following disclaimer. + # * . Redistributions in binary form must reproduce the above copyright + # * notice, this list of conditions and the following disclaimer in + # * the documentation and/or other materials provided with the + # * distribution. + # * . Neither the name of the TaBE Project nor the names of its + # * contributors may be used to endorse or promote products derived + # * from this software without specific prior written permission. + # * + # * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + # * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + # * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + # * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + # * REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + # * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + # * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + # * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + # * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + # * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + # * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + # * OF THE POSSIBILITY OF SUCH DAMAGE. + # */ + # + # /* + # * Copyright (c) 1999 Computer Systems and Communication Lab, + # * Institute of Information Science, Academia + # * Sinica. All rights reserved. + # * + # * Redistribution and use in source and binary forms, with or without + # * modification, are permitted provided that the following conditions + # * are met: + # * + # * . Redistributions of source code must retain the above copyright + # * notice, this list of conditions and the following disclaimer. + # * . Redistributions in binary form must reproduce the above copyright + # * notice, this list of conditions and the following disclaimer in + # * the documentation and/or other materials provided with the + # * distribution. + # * . Neither the name of the Computer Systems and Communication Lab + # * nor the names of its contributors may be used to endorse or + # * promote products derived from this software without specific + # * prior written permission. + # * + # * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + # * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + # * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + # * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + # * REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + # * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + # * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + # * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + # * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + # * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + # * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + # * OF THE POSSIBILITY OF SUCH DAMAGE. + # */ + # + # Copyright 1996 Chih-Hao Tsai @ Beckman Institute, + # University of Illinois + # c-tsai4@uiuc.edu http://casper.beckman.uiuc.edu/~c-tsai4 + # + # ---------------COPYING.libtabe-----END-------------------------------- + # + # + # ---------------COPYING.ipadic-----BEGIN------------------------------- + # + # Copyright 2000, 2001, 2002, 2003 Nara Institute of Science + # and Technology. All Rights Reserved. + # + # Use, reproduction, and distribution of this software is permitted. + # Any copy of this software, whether in its original form or modified, + # must include both the above copyright notice and the following + # paragraphs. + # + # Nara Institute of Science and Technology (NAIST), + # the copyright holders, disclaims all warranties with regard to this + # software, including all implied warranties of merchantability and + # fitness, in no event shall NAIST be liable for + # any special, indirect or consequential damages or any damages + # whatsoever resulting from loss of use, data or profits, whether in an + # action of contract, negligence or other tortuous action, arising out + # of or in connection with the use or performance of this software. + # + # A large portion of the dictionary entries + # originate from ICOT Free Software. The following conditions for ICOT + # Free Software applies to the current dictionary as well. + # + # Each User may also freely distribute the Program, whether in its + # original form or modified, to any third party or parties, PROVIDED + # that the provisions of Section 3 ("NO WARRANTY") will ALWAYS appear + # on, or be attached to, the Program, which is distributed substantially + # in the same form as set out herein and that such intended + # distribution, if actually made, will neither violate or otherwise + # contravene any of the laws and regulations of the countries having + # jurisdiction over the User or the intended distribution itself. + # + # NO WARRANTY + # + # The program was produced on an experimental basis in the course of the + # research and development conducted during the project and is provided + # to users as so produced on an experimental basis. Accordingly, the + # program is provided without any warranty whatsoever, whether express, + # implied, statutory or otherwise. The term "warranty" used herein + # includes, but is not limited to, any warranty of the quality, + # performance, merchantability and fitness for a particular purpose of + # the program and the nonexistence of any infringement or violation of + # any right of any third party. + # + # Each user of the program will agree and understand, and be deemed to + # have agreed and understood, that there is no warranty whatsoever for + # the program and, accordingly, the entire risk arising from or + # otherwise connected with the program is assumed by the user. + # + # Therefore, neither ICOT, the copyright holder, or any other + # organization that participated in or was otherwise related to the + # development of the program and their respective officials, directors, + # officers and other employees shall be held liable for any and all + # damages, including, without limitation, general, special, incidental + # and consequential damages, arising out of or otherwise in connection + # with the use or inability to use the program or any product, material + # or result produced or otherwise obtained by using the program, + # regardless of whether they have been advised of, or otherwise had + # knowledge of, the possibility of such damages at any time during the + # project or thereafter. Each user will be deemed to have agreed to the + # foregoing by his or her commencement of use of the program. The term + # "use" as used herein includes, but is not limited to, the use, + # modification, copying and distribution of the program and the + # production of secondary products from the program. + # + # In the case where the program, whether in its original form or + # modified, was distributed or delivered to or received by a user from + # any person, organization or entity other than ICOT, unless it makes or + # grants independently of ICOT any specific warranty to the user in + # writing, such person, organization or entity, will also be exempted + # from and not be held liable to the user for any such damages as noted + # above as far as the program is concerned. + # + # ---------------COPYING.ipadic-----END---------------------------------- + +3. Lao Word Break Dictionary Data (laodict.txt) + + # Copyright (C) 2016 and later: Unicode, Inc. and others. + # License & terms of use: http://www.unicode.org/copyright.html + # Copyright (c) 2015 International Business Machines Corporation + # and others. All Rights Reserved. + # + # Project: https://github.com/rober42539/lao-dictionary + # Dictionary: https://github.com/rober42539/lao-dictionary/laodict.txt + # License: https://github.com/rober42539/lao-dictionary/LICENSE.txt + # (copied below) + # + # This file is derived from the above dictionary version of Nov 22, 2020 + # ---------------------------------------------------------------------- + # Copyright (C) 2013 Brian Eugene Wilson, Robert Martin Campbell. + # All rights reserved. + # + # Redistribution and use in source and binary forms, with or without + # modification, are permitted provided that the following conditions are met: + # + # Redistributions of source code must retain the above copyright notice, this + # list of conditions and the following disclaimer. Redistributions in binary + # form must reproduce the above copyright notice, this list of conditions and + # the following disclaimer in the documentation and/or ther materials + # provided with the distribution. + # + # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + # OF THE POSSIBILITY OF SUCH DAMAGE. + # -------------------------------------------------------------------------- + +4. Burmese Word Break Dictionary Data (burmesedict.txt) + + # Copyright (c) 2014 International Business Machines Corporation + # and others. All Rights Reserved. + # + # This list is part of a project hosted at: + # github.com/kanyawtech/myanmar-karen-word-lists + # + # -------------------------------------------------------------------------- + # Copyright (c) 2013, LeRoy Benjamin Sharon + # All rights reserved. + # + # Redistribution and use in source and binary forms, with or without + # modification, are permitted provided that the following conditions + # are met: Redistributions of source code must retain the above + # copyright notice, this list of conditions and the following + # disclaimer. Redistributions in binary form must reproduce the + # above copyright notice, this list of conditions and the following + # disclaimer in the documentation and/or other materials provided + # with the distribution. + # + # Neither the name Myanmar Karen Word Lists, nor the names of its + # contributors may be used to endorse or promote products derived + # from this software without specific prior written permission. + # + # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + # CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + # INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS + # BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + # TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + # ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + # TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + # THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + # SUCH DAMAGE. + # -------------------------------------------------------------------------- + +5. Time Zone Database + + ICU uses the public domain data and code derived from Time Zone +Database for its time zone support. The ownership of the TZ database +is explained in BCP 175: Procedure for Maintaining the Time Zone +Database section 7. + + # 7. Database Ownership + # + # The TZ database itself is not an IETF Contribution or an IETF + # document. Rather it is a pre-existing and regularly updated work + # that is in the public domain, and is intended to remain in the + # public domain. Therefore, BCPs 78 [RFC5378] and 79 [RFC3979] do + # not apply to the TZ Database or contributions that individuals make + # to it. Should any claims be made and substantiated against the TZ + # Database, the organization that is providing the IANA + # Considerations defined in this RFC, under the memorandum of + # understanding with the IETF, currently ICANN, may act in accordance + # with all competent court orders. No ownership claims will be made + # by ICANN or the IETF Trust on the database or the code. Any person + # making a contribution to the database or code waives all rights to + # future claims in that contribution or in the TZ Database. + +6. Google double-conversion + +Copyright 2006-2011, the V8 project authors. All rights reserved. +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above + copyright notice, this list of conditions and the following + disclaimer in the documentation and/or other materials provided + with the distribution. + * Neither the name of Google Inc. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. 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Use of the information and materials found on this website indicates your acknowledgement of Unicode, Inc.’s exclusive worldwide rights in the Unicode Word Mark, the Unicode Logo, and the Unicode trade names. +The Unicode Consortium Name and Trademark Usage Policy (“Trademark Policy”) are incorporated herein by reference and you agree to abide by the provisions of the Trademark Policy, which may be changed from time to time in the sole discretion of Unicode, Inc. +All third party trademarks referenced herein are the property of their respective owners. +Miscellaneous +Jurisdiction and Venue. This website is operated from a location in the State of California, United States of America. Unicode, Inc. makes no representation that the materials are appropriate for use in other locations. If you access this website from other locations, you are responsible for compliance with local laws. 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If any provision of this Agreement is declared invalid or unenforceable, the remaining provisions of this Agreement shall remain in effect. +Entire Agreement. This Agreement constitutes the entire agreement between the parties. + +======================================================= + +UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE + +See Terms of Use +for definitions of Unicode Inc.’s Data Files and Software. + +NOTICE TO USER: Carefully read the following legal agreement. +BY DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S +DATA FILES ("DATA FILES"), AND/OR SOFTWARE ("SOFTWARE"), +YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, ALL OF THE +TERMS AND CONDITIONS OF THIS AGREEMENT. +IF YOU DO NOT AGREE, DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE +THE DATA FILES OR SOFTWARE. + +COPYRIGHT AND PERMISSION NOTICE + +Copyright © 1991-2022 Unicode, Inc. All rights reserved. +Distributed under the Terms of Use in https://www.unicode.org/copyright.html. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of the Unicode data files and any associated documentation +(the "Data Files") or Unicode software and any associated documentation +(the "Software") to deal in the Data Files or Software +without restriction, including without limitation the rights to use, +copy, modify, merge, publish, distribute, and/or sell copies of +the Data Files or Software, and to permit persons to whom the Data Files +or Software are furnished to do so, provided that either +(a) this copyright and permission notice appear with all copies +of the Data Files or Software, or +(b) this copyright and permission notice appear in associated +Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF +ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NONINFRINGEMENT OF THIRD PARTY RIGHTS. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS +NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL +DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, +DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER +TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +PERFORMANCE OF THE DATA FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder +shall not be used in advertising or otherwise to promote the sale, +use or other dealings in these Data Files or Software without prior +written authorization of the copyright holder. + +``` + diff --git a/java21/legal/java.base/public_suffix.md b/java21/legal/java.base/public_suffix.md new file mode 100644 index 0000000000000000000000000000000000000000..02481558af6542579f97323aa3cc960e08f75f6f --- /dev/null +++ b/java21/legal/java.base/public_suffix.md @@ -0,0 +1,399 @@ +## Mozilla Public Suffix List + +### Public Suffix Notice +``` +You are receiving a copy of the Mozilla Public Suffix List in the following +file: /lib/security/public_suffix_list.dat. The terms of the +Oracle license do NOT apply to this file; it is licensed under the +Mozilla Public License 2.0, separately from the Oracle programs you receive. +If you do not wish to use the Public Suffix List, you may remove the +/lib/security/public_suffix_list.dat file. + +The Source Code of this file is available under the +Mozilla Public License, v. 2.0 and is located at +https://raw.githubusercontent.com/publicsuffix/list/1cbd6e71a9b83620b1d0b11e49d3d9ff48c27e22/public_suffix_list.dat. +If a copy of the MPL was not distributed with this file, you can obtain one +at https://mozilla.org/MPL/2.0/. + +Software distributed under the License is distributed on an "AS IS" basis, +WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License +for the specific language governing rights and limitations under the License. +``` + +### MPL v2.0 +``` +Mozilla Public License Version 2.0 +================================== + +1. Definitions +-------------- + +1.1. "Contributor" + means each individual or legal entity that creates, contributes to + the creation of, or owns Covered Software. + +1.2. "Contributor Version" + means the combination of the Contributions of others (if any) used + by a Contributor and that particular Contributor's Contribution. + +1.3. "Contribution" + means Covered Software of a particular Contributor. + +1.4. "Covered Software" + means Source Code Form to which the initial Contributor has attached + the notice in Exhibit A, the Executable Form of such Source Code + Form, and Modifications of such Source Code Form, in each case + including portions thereof. + +1.5. "Incompatible With Secondary Licenses" + means + + (a) that the initial Contributor has attached the notice described + in Exhibit B to the Covered Software; or + + (b) that the Covered Software was made available under the terms of + version 1.1 or earlier of the License, but not also under the + terms of a Secondary License. + +1.6. "Executable Form" + means any form of the work other than Source Code Form. + +1.7. "Larger Work" + means a work that combines Covered Software with other material, in + a separate file or files, that is not Covered Software. + +1.8. "License" + means this document. + +1.9. "Licensable" + means having the right to grant, to the maximum extent possible, + whether at the time of the initial grant or subsequently, any and + all of the rights conveyed by this License. + +1.10. "Modifications" + means any of the following: + + (a) any file in Source Code Form that results from an addition to, + deletion from, or modification of the contents of Covered + Software; or + + (b) any new file in Source Code Form that contains any Covered + Software. + +1.11. "Patent Claims" of a Contributor + means any patent claim(s), including without limitation, method, + process, and apparatus claims, in any patent Licensable by such + Contributor that would be infringed, but for the grant of the + License, by the making, using, selling, offering for sale, having + made, import, or transfer of either its Contributions or its + Contributor Version. + +1.12. "Secondary License" + means either the GNU General Public License, Version 2.0, the GNU + Lesser General Public License, Version 2.1, the GNU Affero General + Public License, Version 3.0, or any later versions of those + licenses. + +1.13. "Source Code Form" + means the form of the work preferred for making modifications. + +1.14. "You" (or "Your") + means an individual or a legal entity exercising rights under this + License. For legal entities, "You" includes any entity that + controls, is controlled by, or is under common control with You. For + purposes of this definition, "control" means (a) the power, direct + or indirect, to cause the direction or management of such entity, + whether by contract or otherwise, or (b) ownership of more than + fifty percent (50%) of the outstanding shares or beneficial + ownership of such entity. + +2. License Grants and Conditions +-------------------------------- + +2.1. Grants + +Each Contributor hereby grants You a world-wide, royalty-free, +non-exclusive license: + +(a) under intellectual property rights (other than patent or trademark) + Licensable by such Contributor to use, reproduce, make available, + modify, display, perform, distribute, and otherwise exploit its + Contributions, either on an unmodified basis, with Modifications, or + as part of a Larger Work; and + +(b) under Patent Claims of such Contributor to make, use, sell, offer + for sale, have made, import, and otherwise transfer either its + Contributions or its Contributor Version. + +2.2. Effective Date + +The licenses granted in Section 2.1 with respect to any Contribution +become effective for each Contribution on the date the Contributor first +distributes such Contribution. + +2.3. Limitations on Grant Scope + +The licenses granted in this Section 2 are the only rights granted under +this License. No additional rights or licenses will be implied from the +distribution or licensing of Covered Software under this License. +Notwithstanding Section 2.1(b) above, no patent license is granted by a +Contributor: + +(a) for any code that a Contributor has removed from Covered Software; + or + +(b) for infringements caused by: (i) Your and any other third party's + modifications of Covered Software, or (ii) the combination of its + Contributions with other software (except as part of its Contributor + Version); or + +(c) under Patent Claims infringed by Covered Software in the absence of + its Contributions. + +This License does not grant any rights in the trademarks, service marks, +or logos of any Contributor (except as may be necessary to comply with +the notice requirements in Section 3.4). + +2.4. Subsequent Licenses + +No Contributor makes additional grants as a result of Your choice to +distribute the Covered Software under a subsequent version of this +License (see Section 10.2) or under the terms of a Secondary License (if +permitted under the terms of Section 3.3). + +2.5. Representation + +Each Contributor represents that the Contributor believes its +Contributions are its original creation(s) or it has sufficient rights +to grant the rights to its Contributions conveyed by this License. + +2.6. Fair Use + +This License is not intended to limit any rights You have under +applicable copyright doctrines of fair use, fair dealing, or other +equivalents. + +2.7. Conditions + +Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted +in Section 2.1. + +3. Responsibilities +------------------- + +3.1. Distribution of Source Form + +All distribution of Covered Software in Source Code Form, including any +Modifications that You create or to which You contribute, must be under +the terms of this License. You must inform recipients that the Source +Code Form of the Covered Software is governed by the terms of this +License, and how they can obtain a copy of this License. You may not +attempt to alter or restrict the recipients' rights in the Source Code +Form. + +3.2. Distribution of Executable Form + +If You distribute Covered Software in Executable Form then: + +(a) such Covered Software must also be made available in Source Code + Form, as described in Section 3.1, and You must inform recipients of + the Executable Form how they can obtain a copy of such Source Code + Form by reasonable means in a timely manner, at a charge no more + than the cost of distribution to the recipient; and + +(b) You may distribute such Executable Form under the terms of this + License, or sublicense it under different terms, provided that the + license for the Executable Form does not attempt to limit or alter + the recipients' rights in the Source Code Form under this License. + +3.3. Distribution of a Larger Work + +You may create and distribute a Larger Work under terms of Your choice, +provided that You also comply with the requirements of this License for +the Covered Software. If the Larger Work is a combination of Covered +Software with a work governed by one or more Secondary Licenses, and the +Covered Software is not Incompatible With Secondary Licenses, this +License permits You to additionally distribute such Covered Software +under the terms of such Secondary License(s), so that the recipient of +the Larger Work may, at their option, further distribute the Covered +Software under the terms of either this License or such Secondary +License(s). + +3.4. Notices + +You may not remove or alter the substance of any license notices +(including copyright notices, patent notices, disclaimers of warranty, +or limitations of liability) contained within the Source Code Form of +the Covered Software, except that You may alter any license notices to +the extent required to remedy known factual inaccuracies. + +3.5. Application of Additional Terms + +You may choose to offer, and to charge a fee for, warranty, support, +indemnity or liability obligations to one or more recipients of Covered +Software. However, You may do so only on Your own behalf, and not on +behalf of any Contributor. You must make it absolutely clear that any +such warranty, support, indemnity, or liability obligation is offered by +You alone, and You hereby agree to indemnify every Contributor for any +liability incurred by such Contributor as a result of warranty, support, +indemnity or liability terms You offer. You may include additional +disclaimers of warranty and limitations of liability specific to any +jurisdiction. + +4. Inability to Comply Due to Statute or Regulation +--------------------------------------------------- + +If it is impossible for You to comply with any of the terms of this +License with respect to some or all of the Covered Software due to +statute, judicial order, or regulation then You must: (a) comply with +the terms of this License to the maximum extent possible; and (b) +describe the limitations and the code they affect. Such description must +be placed in a text file included with all distributions of the Covered +Software under this License. Except to the extent prohibited by statute +or regulation, such description must be sufficiently detailed for a +recipient of ordinary skill to be able to understand it. + +5. Termination +-------------- + +5.1. The rights granted under this License will terminate automatically +if You fail to comply with any of its terms. However, if You become +compliant, then the rights granted under this License from a particular +Contributor are reinstated (a) provisionally, unless and until such +Contributor explicitly and finally terminates Your grants, and (b) on an +ongoing basis, if such Contributor fails to notify You of the +non-compliance by some reasonable means prior to 60 days after You have +come back into compliance. Moreover, Your grants from a particular +Contributor are reinstated on an ongoing basis if such Contributor +notifies You of the non-compliance by some reasonable means, this is the +first time You have received notice of non-compliance with this License +from such Contributor, and You become compliant prior to 30 days after +Your receipt of the notice. + +5.2. If You initiate litigation against any entity by asserting a patent +infringement claim (excluding declaratory judgment actions, +counter-claims, and cross-claims) alleging that a Contributor Version +directly or indirectly infringes any patent, then the rights granted to +You by any and all Contributors for the Covered Software under Section +2.1 of this License shall terminate. + +5.3. In the event of termination under Sections 5.1 or 5.2 above, all +end user license agreements (excluding distributors and resellers) which +have been validly granted by You or Your distributors under this License +prior to termination shall survive termination. + +************************************************************************ +* * +* 6. Disclaimer of Warranty * +* ------------------------- * +* * +* Covered Software is provided under this License on an "as is" * +* basis, without warranty of any kind, either expressed, implied, or * +* statutory, including, without limitation, warranties that the * +* Covered Software is free of defects, merchantable, fit for a * +* particular purpose or non-infringing. The entire risk as to the * +* quality and performance of the Covered Software is with You. * +* Should any Covered Software prove defective in any respect, You * +* (not any Contributor) assume the cost of any necessary servicing, * +* repair, or correction. This disclaimer of warranty constitutes an * +* essential part of this License. No use of any Covered Software is * +* authorized under this License except under this disclaimer. * +* * +************************************************************************ + +************************************************************************ +* * +* 7. Limitation of Liability * +* -------------------------- * +* * +* Under no circumstances and under no legal theory, whether tort * +* (including negligence), contract, or otherwise, shall any * +* Contributor, or anyone who distributes Covered Software as * +* permitted above, be liable to You for any direct, indirect, * +* special, incidental, or consequential damages of any character * +* including, without limitation, damages for lost profits, loss of * +* goodwill, work stoppage, computer failure or malfunction, or any * +* and all other commercial damages or losses, even if such party * +* shall have been informed of the possibility of such damages. This * +* limitation of liability shall not apply to liability for death or * +* personal injury resulting from such party's negligence to the * +* extent applicable law prohibits such limitation. Some * +* jurisdictions do not allow the exclusion or limitation of * +* incidental or consequential damages, so this exclusion and * +* limitation may not apply to You. * +* * +************************************************************************ + +8. Litigation +------------- + +Any litigation relating to this License may be brought only in the +courts of a jurisdiction where the defendant maintains its principal +place of business and such litigation shall be governed by laws of that +jurisdiction, without reference to its conflict-of-law provisions. +Nothing in this Section shall prevent a party's ability to bring +cross-claims or counter-claims. + +9. Miscellaneous +---------------- + +This License represents the complete agreement concerning the subject +matter hereof. If any provision of this License is held to be +unenforceable, such provision shall be reformed only to the extent +necessary to make it enforceable. Any law or regulation which provides +that the language of a contract shall be construed against the drafter +shall not be used to construe this License against a Contributor. + +10. Versions of the License +--------------------------- + +10.1. New Versions + +Mozilla Foundation is the license steward. Except as provided in Section +10.3, no one other than the license steward has the right to modify or +publish new versions of this License. Each version will be given a +distinguishing version number. + +10.2. Effect of New Versions + +You may distribute the Covered Software under the terms of the version +of the License under which You originally received the Covered Software, +or under the terms of any subsequent version published by the license +steward. + +10.3. Modified Versions + +If you create software not governed by this License, and you want to +create a new license for such software, you may create and use a +modified version of this License if you rename the license and remove +any references to the name of the license steward (except to note that +such modified license differs from this License). + +10.4. Distributing Source Code Form that is Incompatible With Secondary +Licenses + +If You choose to distribute Source Code Form that is Incompatible With +Secondary Licenses under the terms of this version of the License, the +notice described in Exhibit B of this License must be attached. + +Exhibit A - Source Code Form License Notice +------------------------------------------- + + This Source Code Form is subject to the terms of the Mozilla Public + License, v. 2.0. If a copy of the MPL was not distributed with this + file, You can obtain one at https://mozilla.org/MPL/2.0/. + +If it is not possible or desirable to put the notice in a particular +file, then You may include the notice in a location (such as a LICENSE +file in a relevant directory) where a recipient would be likely to look +for such a notice. + +You may add additional accurate notices of copyright ownership. + +Exhibit B - "Incompatible With Secondary Licenses" Notice +--------------------------------------------------------- + + This Source Code Form is "Incompatible With Secondary Licenses", as + defined by the Mozilla Public License, v. 2.0. + +``` diff --git a/java21/legal/java.base/siphash.md b/java21/legal/java.base/siphash.md new file mode 100644 index 0000000000000000000000000000000000000000..a1183acf2b0d6dbcde6fcb381c46e64269a03864 --- /dev/null +++ b/java21/legal/java.base/siphash.md @@ -0,0 +1,150 @@ +## SipHash v1.0-68c8a7c + +### Notice +SipHash reference C implementation + +``` + Copyright (c) 2016 Jean-Philippe Aumasson + + To the extent possible under law, the author(s) have dedicated all copyright + and related and neighboring rights to this software to the public domain + worldwide. This software is distributed without any warranty. + + You should have received a copy of the CC0 Public Domain Dedication along + with + this software. If not, see + . +``` + +### Licenses +The code is dual-licensed CCO and MIT + +#### MIT License +``` +Copyright 2012-2024 JP Aumasson + +Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +``` + +#### CC0 1.0 Universal +``` +Statement of Purpose + +The laws of most jurisdictions throughout the world automatically confer +exclusive Copyright and Related Rights (defined below) upon the creator and +subsequent owner(s) (each and all, an "owner") of an original work of +authorship and/or a database (each, a "Work"). + +Certain owners wish to permanently relinquish those rights to a Work for the +purpose of contributing to a commons of creative, cultural and scientific +works ("Commons") that the public can reliably and without fear of later +claims of infringement build upon, modify, incorporate in other works, reuse +and redistribute as freely as possible in any form whatsoever and for any +purposes, including without limitation commercial purposes. These owners may +contribute to the Commons to promote the ideal of a free culture and the +further production of creative, cultural and scientific works, or to gain +reputation or greater distribution for their Work in part through the use and +efforts of others. + +For these and/or other purposes and motivations, and without any expectation +of additional consideration or compensation, the person associating CC0 with a +Work (the "Affirmer"), to the extent that he or she is an owner of Copyright +and Related Rights in the Work, voluntarily elects to apply CC0 to the Work +and publicly distribute the Work under its terms, with knowledge of his or her +Copyright and Related Rights in the Work and the meaning and intended legal +effect of CC0 on those rights. + +1. Copyright and Related Rights. A Work made available under CC0 may be +protected by copyright and related or neighboring rights ("Copyright and +Related Rights"). Copyright and Related Rights include, but are not limited +to, the following: + + i. the right to reproduce, adapt, distribute, perform, display, communicate, + and translate a Work; + + ii. moral rights retained by the original author(s) and/or performer(s); + + iii. publicity and privacy rights pertaining to a person's image or likeness + depicted in a Work; + + iv. rights protecting against unfair competition in regards to a Work, + subject to the limitations in paragraph 4(a), below; + + v. rights protecting the extraction, dissemination, use and reuse of data in + a Work; + + vi. database rights (such as those arising under Directive 96/9/EC of the + European Parliament and of the Council of 11 March 1996 on the legal + protection of databases, and under any national implementation thereof, + including any amended or successor version of such directive); and + + vii. other similar, equivalent or corresponding rights throughout the world + based on applicable law or treaty, and any national implementations thereof. + +2. Waiver. To the greatest extent permitted by, but not in contravention of, +applicable law, Affirmer hereby overtly, fully, permanently, irrevocably and +unconditionally waives, abandons, and surrenders all of Affirmer's Copyright +and Related Rights and associated claims and causes of action, whether now +known or unknown (including existing as well as future claims and causes of +action), in the Work (i) in all territories worldwide, (ii) for the maximum +duration provided by applicable law or treaty (including future time +extensions), (iii) in any current or future medium and for any number of +copies, and (iv) for any purpose whatsoever, including without limitation +commercial, advertising or promotional purposes (the "Waiver"). Affirmer makes +the Waiver for the benefit of each member of the public at large and to the +detriment of Affirmer's heirs and successors, fully intending that such Waiver +shall not be subject to revocation, rescission, cancellation, termination, or +any other legal or equitable action to disrupt the quiet enjoyment of the Work +by the public as contemplated by Affirmer's express Statement of Purpose. + +3. Public License Fallback. Should any part of the Waiver for any reason be +judged legally invalid or ineffective under applicable law, then the Waiver +shall be preserved to the maximum extent permitted taking into account +Affirmer's express Statement of Purpose. In addition, to the extent the Waiver +is so judged Affirmer hereby grants to each affected person a royalty-free, +non transferable, non sublicensable, non exclusive, irrevocable and +unconditional license to exercise Affirmer's Copyright and Related Rights in +the Work (i) in all territories worldwide, (ii) for the maximum duration +provided by applicable law or treaty (including future time extensions), (iii) +in any current or future medium and for any number of copies, and (iv) for any +purpose whatsoever, including without limitation commercial, advertising or +promotional purposes (the "License"). The License shall be deemed effective as +of the date CC0 was applied by Affirmer to the Work. Should any part of the +License for any reason be judged legally invalid or ineffective under +applicable law, such partial invalidity or ineffectiveness shall not +invalidate the remainder of the License, and in such case Affirmer hereby +affirms that he or she will not (i) exercise any of his or her remaining +Copyright and Related Rights in the Work or (ii) assert any associated claims +and causes of action with respect to the Work, in either case contrary to +Affirmer's express Statement of Purpose. + +4. Limitations and Disclaimers. + + a. No trademark or patent rights held by Affirmer are waived, abandoned, + surrendered, licensed or otherwise affected by this document. + + b. Affirmer offers the Work as-is and makes no representations or warranties + of any kind concerning the Work, express, implied, statutory or otherwise, + including without limitation warranties of title, merchantability, fitness + for a particular purpose, non infringement, or the absence of latent or + other defects, accuracy, or the present or absence of errors, whether or not + discoverable, all to the greatest extent permissible under applicable law. + + c. Affirmer disclaims responsibility for clearing rights of other persons + that may apply to the Work or any use thereof, including without limitation + any person's Copyright and Related Rights in the Work. Further, Affirmer + disclaims responsibility for obtaining any necessary consents, permissions + or other rights required for any use of the Work. + + d. Affirmer understands and acknowledges that Creative Commons is not a + party to this document and has no duty or obligation with respect to this + CC0 or use of the Work. + +For more information, please see + + +``` diff --git a/java21/legal/java.base/unicode.md b/java21/legal/java.base/unicode.md new file mode 100644 index 0000000000000000000000000000000000000000..ced947a914ef2fd884733cce7cc1ae25e7320128 --- /dev/null +++ b/java21/legal/java.base/unicode.md @@ -0,0 +1,103 @@ +## The Unicode Standard, Unicode Character Database, Version 15.0.0 + +### Unicode Character Database +``` + +UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE + +See Terms of Use for definitions of Unicode Inc.'s +Data Files and Software. + +NOTICE TO USER: Carefully read the following legal agreement. +BY DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S +DATA FILES ("DATA FILES"), AND/OR SOFTWARE ("SOFTWARE"), +YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, ALL OF THE +TERMS AND CONDITIONS OF THIS AGREEMENT. +IF YOU DO NOT AGREE, DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE +THE DATA FILES OR SOFTWARE. + +COPYRIGHT AND PERMISSION NOTICE + +Copyright © 1991-2022 Unicode, Inc. All rights reserved. +Distributed under the Terms of Use in https://www.unicode.org/copyright.html. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of the Unicode data files and any associated documentation +(the "Data Files") or Unicode software and any associated documentation +(the "Software") to deal in the Data Files or Software +without restriction, including without limitation the rights to use, +copy, modify, merge, publish, distribute, and/or sell copies of +the Data Files or Software, and to permit persons to whom the Data Files +or Software are furnished to do so, provided that either +(a) this copyright and permission notice appear with all copies +of the Data Files or Software, or +(b) this copyright and permission notice appear in associated +Documentation. + +THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF +ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NONINFRINGEMENT OF THIRD PARTY RIGHTS. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS +NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL +DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, +DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER +TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +PERFORMANCE OF THE DATA FILES OR SOFTWARE. + +Except as contained in this notice, the name of a copyright holder +shall not be used in advertising or otherwise to promote the sale, +use or other dealings in these Data Files or Software without prior +written authorization of the copyright holder. + +=== http://www.unicode.org/copyright.html content === +Unicode (R) Copyright and Terms of Use +For the general privacy policy governing access to this site, see the Unicode Privacy Policy. + +Unicode Copyright +Copyright (C) 1991-2022 Unicode, Inc. All rights reserved. +Definitions +Unicode Data Files ("DATA FILES") include all data files under the directories: +https://www.unicode.org/Public/ +https://www.unicode.org/reports/ +https://www.unicode.org/ivd/data/ + +Unicode Data Files do not include PDF online code charts under the directory: +https://www.unicode.org/Public/ + +Unicode Software ("SOFTWARE") includes any source code published in the Unicode Standard +or any source code or compiled code under the directories: +https://www.unicode.org/Public/PROGRAMS/ +https://www.unicode.org/Public/cldr/ +http://site.icu-project.org/download/ +Terms of Use +Certain documents and files on this website contain a legend indicating that "Modification is permitted." Any person is hereby authorized, without fee, to modify such documents and files to create derivative works conforming to the Unicode® Standard, subject to Terms and Conditions herein. +Any person is hereby authorized, without fee, to view, use, reproduce, and distribute all documents and files, subject to the Terms and Conditions herein. +Further specifications of rights and restrictions pertaining to the use of the Unicode DATA FILES and SOFTWARE can be found in the Unicode Data Files and Software License. +Each version of the Unicode Standard has further specifications of rights and restrictions of use. For the book editions (Unicode 5.0 and earlier), these are found on the back of the title page. +The Unicode PDF online code charts carry specific restrictions. Those restrictions are incorporated as the first page of each PDF code chart. +All other files, including online documentation of the core specification for Unicode 6.0 and later, are covered under these general Terms of Use. +No license is granted to "mirror" the Unicode website where a fee is charged for access to the "mirror" site. +Modification is not permitted with respect to this document. All copies of this document must be verbatim. +Restricted Rights Legend +Any technical data or software which is licensed to the United States of America, its agencies and/or instrumentalities under this Agreement is commercial technical data or commercial computer software developed exclusively at private expense as defined in FAR 2.101, or DFARS 252.227-7014 (June 1995), as applicable. For technical data, use, duplication, or disclosure by the Government is subject to restrictions as set forth in DFARS 202.227-7015 Technical Data, Commercial and Items (Nov 1995) and this Agreement. For Software, in accordance with FAR 12-212 or DFARS 227-7202, as applicable, use, duplication or disclosure by the Government is subject to the restrictions set forth in this Agreement. +Warranties and Disclaimers +This publication and/or website may include technical or typographical errors or other inaccuracies. Changes are periodically added to the information herein; these changes will be incorporated in new editions of the publication and/or website. Unicode, Inc. may make improvements and/or changes in the product(s) and/or program(s) described in this publication and/or website at any time. +If this file has been purchased on magnetic or optical media from Unicode, Inc. the sole and exclusive remedy for any claim will be exchange of the defective media within ninety (90) days of original purchase. +EXCEPT AS PROVIDED IN SECTION E.2, THIS PUBLICATION AND/OR SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EITHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. UNICODE, INC. AND ITS LICENSORS ASSUME NO RESPONSIBILITY FOR ERRORS OR OMISSIONS IN THIS PUBLICATION AND/OR SOFTWARE OR OTHER DOCUMENTS WHICH ARE REFERENCED BY OR LINKED TO THIS PUBLICATION OR THE UNICODE WEBSITE. +Waiver of Damages +In no event shall Unicode, Inc. or its licensors be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, whether or not Unicode, Inc. was advised of the possibility of the damage, including, without limitation, those resulting from the following: loss of use, data or profits, in connection with the use, modification or distribution of this information or its derivatives. +Trademarks & Logos +The Unicode Word Mark and the Unicode Logo are trademarks of Unicode, Inc. “The Unicode Consortium” and “Unicode, Inc.” are trade names of Unicode, Inc. Use of the information and materials found on this website indicates your acknowledgement of Unicode, Inc.’s exclusive worldwide rights in the Unicode Word Mark, the Unicode Logo, and the Unicode trade names. +The Unicode Consortium Name and Trademark Usage Policy (“Trademark Policy”) are incorporated herein by reference and you agree to abide by the provisions of the Trademark Policy, which may be changed from time to time in the sole discretion of Unicode, Inc. +All third party trademarks referenced herein are the property of their respective owners. +Miscellaneous +Jurisdiction and Venue. This website is operated from a location in the State of California, United States of America. Unicode, Inc. makes no representation that the materials are appropriate for use in other locations. If you access this website from other locations, you are responsible for compliance with local laws. This Agreement, all use of this website and any claims and damages resulting from use of this website are governed solely by the laws of the State of California without regard to any principles which would apply the laws of a different jurisdiction. The user agrees that any disputes regarding this website shall be resolved solely in the courts located in Santa Clara County, California. The user agrees said courts have personal jurisdiction and agree to waive any right to transfer the dispute to any other forum. +Modification by Unicode, Inc. Unicode, Inc. shall have the right to modify this Agreement at any time by posting it to this website. The user may not assign any part of this Agreement without Unicode, Inc.’s prior written consent. +Taxes. The user agrees to pay any taxes arising from access to this website or use of the information herein, except for those based on Unicode’s net income. +Severability. If any provision of this Agreement is declared invalid or unenforceable, the remaining provisions of this Agreement shall remain in effect. +Entire Agreement. This Agreement constitutes the entire agreement between the parties. + + +``` + diff --git a/java21/legal/java.base/wepoll.md b/java21/legal/java.base/wepoll.md new file mode 100644 index 0000000000000000000000000000000000000000..f2d954486eabe590cd0aa5b2c1c828a61bd57844 --- /dev/null +++ b/java21/legal/java.base/wepoll.md @@ -0,0 +1,34 @@ +## Bert Belder: wepoll v 1.5.8 + +### wepoll License +``` +wepoll - epoll for Windows +https://github.com/piscisaureus/wepoll + +Copyright 2012-2020, Bert Belder +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +``` diff --git a/java21/legal/java.base/zlib.md b/java21/legal/java.base/zlib.md new file mode 100644 index 0000000000000000000000000000000000000000..c729c4248d481f1150c28ddcd166816d6fe61ec9 --- /dev/null +++ b/java21/legal/java.base/zlib.md @@ -0,0 +1,27 @@ +## zlib v1.3.2 + +### zlib License +
+
+Copyright (C) 1995-2026 Jean-loup Gailly and Mark Adler
+
+This software is provided 'as-is', without any express or implied
+warranty.  In no event will the authors be held liable for any damages
+arising from the use of this software.
+
+Permission is granted to anyone to use this software for any purpose,
+including commercial applications, and to alter it and redistribute it
+freely, subject to the following restrictions:
+
+1. The origin of this software must not be misrepresented; you must not
+   claim that you wrote the original software. If you use this software
+   in a product, an acknowledgment in the product documentation would be
+   appreciated but is not required.
+2. Altered source versions must be plainly marked as such, and must not be
+   misrepresented as being the original software.
+3. This notice may not be removed or altered from any source distribution.
+
+Jean-loup Gailly        Mark Adler
+jloup@gzip.org          madler@alumni.caltech.edu
+
+
diff --git a/java21/legal/java.compiler/ADDITIONAL_LICENSE_INFO b/java21/legal/java.compiler/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.compiler/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.compiler/ASSEMBLY_EXCEPTION b/java21/legal/java.compiler/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.compiler/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.compiler/LICENSE b/java21/legal/java.compiler/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.compiler/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.datatransfer/ADDITIONAL_LICENSE_INFO b/java21/legal/java.datatransfer/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.datatransfer/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.datatransfer/ASSEMBLY_EXCEPTION b/java21/legal/java.datatransfer/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.datatransfer/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.datatransfer/LICENSE b/java21/legal/java.datatransfer/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.datatransfer/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.desktop/ADDITIONAL_LICENSE_INFO b/java21/legal/java.desktop/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.desktop/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.desktop/ASSEMBLY_EXCEPTION b/java21/legal/java.desktop/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.desktop/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.desktop/LICENSE b/java21/legal/java.desktop/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.desktop/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.desktop/colorimaging.md b/java21/legal/java.desktop/colorimaging.md new file mode 100644 index 0000000000000000000000000000000000000000..eeb9932e1377f7c063279e0f1d341177f689660e --- /dev/null +++ b/java21/legal/java.desktop/colorimaging.md @@ -0,0 +1,7 @@ +## Eastman Kodak Company: Portions of color management and imaging software + +### Eastman Kodak Notice +
+Portions Copyright Eastman Kodak Company 1991-2003
+
+ diff --git a/java21/legal/java.desktop/freetype.md b/java21/legal/java.desktop/freetype.md new file mode 100644 index 0000000000000000000000000000000000000000..0c99e79209d73bdd88b9185f2edec6c0e20eabf7 --- /dev/null +++ b/java21/legal/java.desktop/freetype.md @@ -0,0 +1,649 @@ +## The FreeType Project: Freetype v2.14.2 + + +### FreeType Notice + +``` +FreeType comes with two licenses from which you can choose the one +which fits your needs best. + + The FreeType License (FTL) is the most commonly used one. It is + a BSD-style license with a credit clause and thus compatible with + the GNU Public License (GPL) version 3, but not with the + GPL version 2. + + The GNU General Public License (GPL), version 2. Use it for all + projects which use the GPLv2 also, or which need a license + compatible to the GPLv2. + +``` + +### FreeType License +``` + +Copyright (C) 1996-2025 by David Turner, Robert Wilhelm, and Werner Lemberg. +Copyright (C) 2007-2025 by Dereg Clegg and Michael Toftdal. +Copyright (C) 1996-2025 by Just van Rossum, David Turner, Robert Wilhelm, and Werner Lemberg. +Copyright (C) 2022-2025 by David Turner, Robert Wilhelm, Werner Lemberg, George Williams, and +Copyright (C) 2004-2025 by Masatake YAMATO and Redhat K.K. +Copyright (C) 2007-2025 by Derek Clegg and Michael Toftdal. +Copyright (C) 2003-2025 by Masatake YAMATO, Red Hat K.K., +Copyright (C) 1996-2025 by David Turner, Robert Wilhelm, Werner Lemberg, and Dominik Röttsches. +Copyright (C) 2007-2025 by David Turner. +Copyright (C) 2022-2025 by David Turner, Robert Wilhelm, Werner Lemberg, and Moazin Khatti. +Copyright (C) 2007-2025 by Rahul Bhalerao , . +Copyright (C) 2025 by Behdad Esfahbod. +Copyright (C) 2008-2025 by David Turner, Robert Wilhelm, Werner Lemberg, and suzuki toshiya. +Copyright (C) 2013-2025 by Google, Inc. +Copyright (C) 2019-2025 by Nikhil Ramakrishnan, David Turner, Robert Wilhelm, and Werner Lemberg. +Copyright (C) 2009-2025 by Oran Agra and Mickey Gabel. +Copyright (C) 2018-2025 by David Turner, Robert Wilhelm, Dominik Röttsches, and Werner Lemberg. +Copyright (C) 2004-2025 by David Turner, Robert Wilhelm, Werner Lemberg, and George Williams. + The FreeType Project LICENSE + ---------------------------- + + 2006-Jan-27 + + Copyright 1996-2002, 2006 by + David Turner, Robert Wilhelm, and Werner Lemberg + + + +Introduction +============ + + The FreeType Project is distributed in several archive packages; + some of them may contain, in addition to the FreeType font engine, + various tools and contributions which rely on, or relate to, the + FreeType Project. + + This license applies to all files found in such packages, and + which do not fall under their own explicit license. The license + affects thus the FreeType font engine, the test programs, + documentation and makefiles, at the very least. + + This license was inspired by the BSD, Artistic, and IJG + (Independent JPEG Group) licenses, which all encourage inclusion + and use of free software in commercial and freeware products + alike. As a consequence, its main points are that: + + o We don't promise that this software works. However, we will be + interested in any kind of bug reports. (`as is' distribution) + + o You can use this software for whatever you want, in parts or + full form, without having to pay us. (`royalty-free' usage) + + o You may not pretend that you wrote this software. If you use + it, or only parts of it, in a program, you must acknowledge + somewhere in your documentation that you have used the + FreeType code. (`credits') + + We specifically permit and encourage the inclusion of this + software, with or without modifications, in commercial products. + We disclaim all warranties covering The FreeType Project and + assume no liability related to The FreeType Project. + + + Finally, many people asked us for a preferred form for a + credit/disclaimer to use in compliance with this license. We thus + encourage you to use the following text: + + """ + Portions of this software are copyright © The FreeType + Project (www.freetype.org). All rights reserved. + """ + + Please replace with the value from the FreeType version you + actually use. + + +Legal Terms +=========== + +0. Definitions +-------------- + + Throughout this license, the terms `package', `FreeType Project', + and `FreeType archive' refer to the set of files originally + distributed by the authors (David Turner, Robert Wilhelm, and + Werner Lemberg) as the `FreeType Project', be they named as alpha, + beta or final release. + + `You' refers to the licensee, or person using the project, where + `using' is a generic term including compiling the project's source + code as well as linking it to form a `program' or `executable'. + This program is referred to as `a program using the FreeType + engine'. + + This license applies to all files distributed in the original + FreeType Project, including all source code, binaries and + documentation, unless otherwise stated in the file in its + original, unmodified form as distributed in the original archive. + If you are unsure whether or not a particular file is covered by + this license, you must contact us to verify this. + + The FreeType Project is copyright (C) 1996-2000 by David Turner, + Robert Wilhelm, and Werner Lemberg. All rights reserved except as + specified below. + +1. No Warranty +-------------- + + THE FREETYPE PROJECT IS PROVIDED `AS IS' WITHOUT WARRANTY OF ANY + KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + PURPOSE. IN NO EVENT WILL ANY OF THE AUTHORS OR COPYRIGHT HOLDERS + BE LIABLE FOR ANY DAMAGES CAUSED BY THE USE OR THE INABILITY TO + USE, OF THE FREETYPE PROJECT. + +2. Redistribution +----------------- + + This license grants a worldwide, royalty-free, perpetual and + irrevocable right and license to use, execute, perform, compile, + display, copy, create derivative works of, distribute and + sublicense the FreeType Project (in both source and object code + forms) and derivative works thereof for any purpose; and to + authorize others to exercise some or all of the rights granted + herein, subject to the following conditions: + + o Redistribution of source code must retain this license file + (`FTL.TXT') unaltered; any additions, deletions or changes to + the original files must be clearly indicated in accompanying + documentation. The copyright notices of the unaltered, + original files must be preserved in all copies of source + files. + + o Redistribution in binary form must provide a disclaimer that + states that the software is based in part of the work of the + FreeType Team, in the distribution documentation. We also + encourage you to put an URL to the FreeType web page in your + documentation, though this isn't mandatory. + + These conditions apply to any software derived from or based on + the FreeType Project, not just the unmodified files. If you use + our work, you must acknowledge us. However, no fee need be paid + to us. + +3. Advertising +-------------- + + Neither the FreeType authors and contributors nor you shall use + the name of the other for commercial, advertising, or promotional + purposes without specific prior written permission. + + We suggest, but do not require, that you use one or more of the + following phrases to refer to this software in your documentation + or advertising materials: `FreeType Project', `FreeType Engine', + `FreeType library', or `FreeType Distribution'. + + As you have not signed this license, you are not required to + accept it. However, as the FreeType Project is copyrighted + material, only this license, or another one contracted with the + authors, grants you the right to use, distribute, and modify it. + Therefore, by using, distributing, or modifying the FreeType + Project, you indicate that you understand and accept all the terms + of this license. + +4. Contacts +----------- + + There are two mailing lists related to FreeType: + + o freetype@nongnu.org + + Discusses general use and applications of FreeType, as well as + future and wanted additions to the library and distribution. + If you are looking for support, start in this list if you + haven't found anything to help you in the documentation. + + o freetype-devel@nongnu.org + + Discusses bugs, as well as engine internals, design issues, + specific licenses, porting, etc. + + Our home page can be found at + + https://www.freetype.org + + +``` + +### GPL v2 + +``` + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Library General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. To prevent this, we have made it clear that any +patent must be licensed for everyone's free use or not licensed at all. + + The precise terms and conditions for copying, distribution and +modification follow. + + GNU GENERAL PUBLIC LICENSE + TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION + + 0. This License applies to any program or other work which contains +a notice placed by the copyright holder saying it may be distributed +under the terms of this General Public License. The "Program", below, +refers to any such program or work, and a "work based on the Program" +means either the Program or any derivative work under copyright law: +that is to say, a work containing the Program or a portion of it, +either verbatim or with modifications and/or translated into another +language. (Hereinafter, translation is included without limitation in +the term "modification".) Each licensee is addressed as "you". + +Activities other than copying, distribution and modification are not +covered by this License; they are outside its scope. The act of +running the Program is not restricted, and the output from the Program +is covered only if its contents constitute a work based on the +Program (independent of having been made by running the Program). +Whether that is true depends on what the Program does. + + 1. You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. You may modify your copy or copies of the Program or any portion +of it, thus forming a work based on the Program, and copy and +distribute such modifications or work under the terms of Section 1 +above, provided that you also meet all of these conditions: + + a) You must cause the modified files to carry prominent notices + stating that you changed the files and the date of any change. + + b) You must cause any work that you distribute or publish, that in + whole or in part contains or is derived from the Program or any + part thereof, to be licensed as a whole at no charge to all third + parties under the terms of this License. + + c) If the modified program normally reads commands interactively + when run, you must cause it, when started running for such + interactive use in the most ordinary way, to print or display an + announcement including an appropriate copyright notice and a + notice that there is no warranty (or else, saying that you provide + a warranty) and that users may redistribute the program under + these conditions, and telling the user how to view a copy of this + License. (Exception: if the Program itself is interactive but + does not normally print such an announcement, your work based on + the Program is not required to print an announcement.) + +These requirements apply to the modified work as a whole. If +identifiable sections of that work are not derived from the Program, +and can be reasonably considered independent and separate works in +themselves, then this License, and its terms, do not apply to those +sections when you distribute them as separate works. But when you +distribute the same sections as part of a whole which is a work based +on the Program, the distribution of the whole must be on the terms of +this License, whose permissions for other licensees extend to the +entire whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest +your rights to work written entirely by you; rather, the intent is to +exercise the right to control the distribution of derivative or +collective works based on the Program. + +In addition, mere aggregation of another work not based on the Program +with the Program (or with a work based on the Program) on a volume of +a storage or distribution medium does not bring the other work under +the scope of this License. + + 3. You may copy and distribute the Program (or a work based on it, +under Section 2) in object code or executable form under the terms of +Sections 1 and 2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable + source code, which must be distributed under the terms of Sections + 1 and 2 above on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three + years, to give any third party, for a charge no more than your + cost of physically performing source distribution, a complete + machine-readable copy of the corresponding source code, to be + distributed under the terms of Sections 1 and 2 above on a medium + customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer + to distribute corresponding source code. (This alternative is + allowed only for noncommercial distribution and only if you + received the program in object code or executable form with such + an offer, in accord with Subsection b above.) + +The source code for a work means the preferred form of the work for +making modifications to it. For an executable work, complete source +code means all the source code for all modules it contains, plus any +associated interface definition files, plus the scripts used to +control compilation and installation of the executable. However, as a +special exception, the source code distributed need not include +anything that is normally distributed (in either source or binary +form) with the major components (compiler, kernel, and so on) of the +operating system on which the executable runs, unless that component +itself accompanies the executable. + +If distribution of executable or object code is made by offering +access to copy from a designated place, then offering equivalent +access to copy the source code from the same place counts as +distribution of the source code, even though third parties are not +compelled to copy the source along with the object code. + + 4. You may not copy, modify, sublicense, or distribute the Program +except as expressly provided under this License. Any attempt +otherwise to copy, modify, sublicense or distribute the Program is +void, and will automatically terminate your rights under this License. +However, parties who have received copies, or rights, from you under +this License will not have their licenses terminated so long as such +parties remain in full compliance. + + 5. You are not required to accept this License, since you have not +signed it. However, nothing else grants you permission to modify or +distribute the Program or its derivative works. These actions are +prohibited by law if you do not accept this License. Therefore, by +modifying or distributing the Program (or any work based on the +Program), you indicate your acceptance of this License to do so, and +all its terms and conditions for copying, distributing or modifying +the Program or works based on it. + + 6. Each time you redistribute the Program (or any work based on the +Program), the recipient automatically receives a license from the +original licensor to copy, distribute or modify the Program subject to +these terms and conditions. You may not impose any further +restrictions on the recipients' exercise of the rights granted herein. +You are not responsible for enforcing compliance by third parties to +this License. + + 7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), +conditions are imposed on you (whether by court order, agreement or +otherwise) that contradict the conditions of this License, they do not +excuse you from the conditions of this License. If you cannot +distribute so as to satisfy simultaneously your obligations under this +License and any other pertinent obligations, then as a consequence you +may not distribute the Program at all. For example, if a patent +license would not permit royalty-free redistribution of the Program by +all those who receive copies directly or indirectly through you, then +the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under +any particular circumstance, the balance of the section is intended to +apply and the section as a whole is intended to apply in other +circumstances. + +It is not the purpose of this section to induce you to infringe any +patents or other property right claims or to contest validity of any +such claims; this section has the sole purpose of protecting the +integrity of the free software distribution system, which is +implemented by public license practices. Many people have made +generous contributions to the wide range of software distributed +through that system in reliance on consistent application of that +system; it is up to the author/donor to decide if he or she is willing +to distribute software through any other system and a licensee cannot +impose that choice. + +This section is intended to make thoroughly clear what is believed to +be a consequence of the rest of this License. + + 8. If the distribution and/or use of the Program is restricted in +certain countries either by patents or by copyrighted interfaces, the +original copyright holder who places the Program under this License +may add an explicit geographical distribution limitation excluding +those countries, so that distribution is permitted only in or among +countries not thus excluded. In such case, this License incorporates +the limitation as if written in the body of this License. + + 9. The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Library General +Public License instead of this License. + +``` + +### Additional Freetype Attributions +``` + +--------------------------------- +The below applies to the following file(s): +libfreetype/src/psaux/psarrst.c +libfreetype/src/psaux/psarrst.h +libfreetype/src/psaux/psblues.c +libfreetype/src/psaux/psblues.h +libfreetype/src/psaux/pserror.c +libfreetype/src/psaux/pserror.h +libfreetype/src/psaux/psfixed.h +libfreetype/src/psaux/psfont.c +libfreetype/src/psaux/psfont.h +libfreetype/src/psaux/psft.c +libfreetype/src/psaux/psft.h +libfreetype/src/psaux/psglue.h +libfreetype/src/psaux/pshints.c +libfreetype/src/psaux/pshints.h +libfreetype/src/psaux/psintrp.c +libfreetype/src/psaux/psintrp.h +libfreetype/src/psaux/psread.c +libfreetype/src/psaux/psread.h +libfreetype/src/psaux/psstack.c +libfreetype/src/psaux/psstack.h +libfreetype/src/psaux/pstypes.h + +Copyright (C) 2006-2014 Adobe Systems Incorporated. + +This software, and all works of authorship, whether in source or +object code form as indicated by the copyright notice(s) included +herein (collectively, the "Work") is made available, and may only be +used, modified, and distributed under the FreeType Project License, +LICENSE.TXT. Additionally, subject to the terms and conditions of the +FreeType Project License, each contributor to the Work hereby grants +to any individual or legal entity exercising permissions granted by +the FreeType Project License and this section (hereafter, "You" or +"Your") a perpetual, worldwide, non-exclusive, no-charge, +royalty-free, irrevocable (except as stated in this section) patent +license to make, have made, use, offer to sell, sell, import, and +otherwise transfer the Work, where such license applies only to those +patent claims licensable by such contributor that are necessarily +infringed by their contribution(s) alone or by combination of their +contribution(s) with the Work to which such contribution(s) was +submitted. If You institute patent litigation against any entity +(including a cross-claim or counterclaim in a lawsuit) alleging that +the Work or a contribution incorporated within the Work constitutes +direct or contributory patent infringement, then any patent licenses +granted to You under this License for that Work shall terminate as of +the date such litigation is filed. + +By using, modifying, or distributing the Work you indicate that you +have read and understood the terms and conditions of the +FreeType Project License as well as those provided in this section, +and you accept them fully. + + +``` + +### MIT License +``` + +--------------------------------- +The below applies to the following file(s): +libfreetype/include/freetype/internal/fthash.h +libfreetype/src/base/fthash.c + +Copyright (C) 2000 Computing Research Labs, New Mexico State University +Copyright (C) 2001-2015 + + Francesco Zappa Nardelli + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sublicense, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +THE COMPUTING RESEARCH LAB OR NEW MEXICO STATE UNIVERSITY BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT +OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR +THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + +``` diff --git a/java21/legal/java.desktop/giflib.md b/java21/legal/java.desktop/giflib.md new file mode 100644 index 0000000000000000000000000000000000000000..781023dd3347a7dae8896e8978648fa90632cb26 --- /dev/null +++ b/java21/legal/java.desktop/giflib.md @@ -0,0 +1,52 @@ +## GIFLIB v6.1.2 + +### GIFLIB License +``` + += MIT LICENSE + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +--------------------------------- +The below applies to the following file(s): +giflib/dgif_lib.c +giflib/gifalloc.c +giflib/gif_err.c +giflib/openbsd-reallocarray.c + +Copyright (C) 1989 Gershon Elber +Copyright (C) 2008 Otto Moerbeek +Copyright (C) Eric S. Raymond + +SPDX-License-Identifier: MIT + + +== Authors == + +Gershon Elber +original giflib code + +Toshio Kuratomi +uncompressed gif writing code +former maintainer + +Eric Raymond +current as well as long time former maintainer of giflib code + +``` diff --git a/java21/legal/java.desktop/harfbuzz.md b/java21/legal/java.desktop/harfbuzz.md new file mode 100644 index 0000000000000000000000000000000000000000..3aa5ca841d64b476699da0d5f4a988b71dfea6c1 --- /dev/null +++ b/java21/legal/java.desktop/harfbuzz.md @@ -0,0 +1,104 @@ +## Harfbuzz 12.3.2 + +### Harfbuzz License + +
+
+HarfBuzz is licensed under the so-called "Old MIT" license.  Details follow.
+For parts of HarfBuzz that are licensed under different licenses see individual
+files names COPYING in subdirectories where applicable.
+
+Copyright © 2010-2024  Google, Inc.
+Copyright © 2018-2020  Ebrahim Byagowi
+Copyright © 2004-2013  Red Hat, Inc.
+Copyright © 2019  Facebook, Inc.
+Copyright (C) 2012 Zilong Tan (eric.zltan@gmail.com)
+Copyright © 2007  Chris Wilson
+Copyright © 2018-2019 Adobe Inc.
+Copyright © 2006-2025 Behdad Esfahbod
+Copyright © 1998-2004  David Turner and Werner Lemberg
+Copyright © 2009  Keith Stribley
+Copyright © 2018  Khaled Hosny
+Copyright © 2016  Elie Roux 
+Copyright © 2016  Igalia S.L.
+Copyright © 2015  Mozilla Foundation.
+Copyright © 1999  David Turner
+Copyright © 2005  Werner Lemberg
+Copyright © 2013-2015  Alexei Podtelezhnikov
+Copyright © 2022 Matthias Clasen
+Copyright © 2011  Codethink Limited
+
+For full copyright notices consult the individual files in the package.
+
+
+Permission is hereby granted, without written agreement and without
+license or royalty fees, to use, copy, modify, and distribute this
+software and its documentation for any purpose, provided that the
+above copyright notice and the following two paragraphs appear in
+all copies of this software.
+
+IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE TO ANY PARTY FOR
+DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+IF THE COPYRIGHT HOLDER HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+DAMAGE.
+
+THE COPYRIGHT HOLDER SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING,
+BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ON AN "AS IS" BASIS, AND THE COPYRIGHT HOLDER HAS NO OBLIGATION TO
+PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+
+All source code, except for one section, is licensed as above. The one
+exception is licensed with a slightly different MIT variant:
+The contents of this directory are licensed under the following terms:
+
+---------------------------------
+The below applies to the following file(s):
+libharfbuzz/hb-ucd.cc
+
+Copyright (C) 2012 Grigori Goronzy 
+
+Permission to use, copy, modify, and/or distribute this software for any
+purpose with or without fee is hereby granted, provided that the above
+copyright notice and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+
+---------------------------------
+The below applies to the following file(s):
+libharfbuzz/hb-unicode-emoji-table.hh
+
+© 2024 Unicode®, Inc.
+
+Unicode and the Unicode Logo are registered trademarks of Unicode, Inc.
+in the U.S. and other countries.
+For terms of use and license, see https://www.unicode.org/terms_of_use.html
+
+
+ +### AUTHORS File Information +``` + +Behdad Esfahbod +David Corbett +David Turner +Ebrahim Byagowi +Garret Rieger +Jonathan Kew +Khaled Hosny +Lars Knoll +Martin Hosken +Owen Taylor +Roderick Sheeter +Roozbeh Pournader +Simon Hausmann +Werner Lemberg + +``` diff --git a/java21/legal/java.desktop/jpeg.md b/java21/legal/java.desktop/jpeg.md new file mode 100644 index 0000000000000000000000000000000000000000..479d7a3ba90418927f6db7c19c401cd377dc6f78 --- /dev/null +++ b/java21/legal/java.desktop/jpeg.md @@ -0,0 +1,77 @@ +## Independent JPEG Group: JPEG release 6b + +### JPEG License + +``` +**************************************************************************** + +Copyright (C) 1991-1998, Thomas G. Lane. + +This software is the work of Tom Lane, Philip Gladstone, Jim Boucher, +Lee Crocker, Julian Minguillon, Luis Ortiz, George Phillips, Davide Rossi, +Guido Vollbeding, Ge' Weijers, and other members of the Independent JPEG +Group. + +IJG is not affiliated with the official ISO JPEG standards committee. + +The authors make NO WARRANTY or representation, either express or implied, +with respect to this software, its quality, accuracy, merchantability, or +fitness for a particular purpose. This software is provided "AS IS", +and you, its user, assume the entire risk as to its quality and accuracy. + +This software is copyright (C) 1991-1998, Thomas G. Lane. +All Rights Reserved except as specified below. + +Permission is hereby granted to use, copy, modify, and distribute +this software (or portions thereof) for any purpose, without fee, +subject to these conditions: + +(1) If any part of the source code for this software is distributed, +then this README file must be included, with this copyright and no-warranty +notice unaltered; and any additions, deletions, or changes to the original +files must be clearly indicated in accompanying documentation. + +(2) If only executable code is distributed, then the accompanying documentation +must state that "this software is based in part on the work of the +Independent JPEG Group". + +(3) Permission for use of this software is granted only if the user accepts +full responsibility for any undesirable consequences; the authors accept +NO LIABILITY for damages of any kind. + +These conditions apply to any software derived from or based on the IJG code, +not just to the unmodified library. If you use our work, you ought to +acknowledge us. + +Permission is NOT granted for the use of any IJG author's name or company name +in advertising or publicity relating to this software or products derived +from it. This software may be referred to only as "the Independent JPEG +Group's software". + +We specifically permit and encourage the use of this software as the basis +of commercial products, provided that all warranty or liability claims are +assumed by the product vendor. + +It appears that the arithmetic coding option of the JPEG spec is covered +by patents owned by IBM, AT&T, and Mitsubishi. Hence arithmetic coding +cannot legally be used without obtaining one or more licenses. For this +reason, support for arithmetic coding has been removed from the free +JPEG software. (Since arithmetic coding provides only a marginal gain +over the unpatented Huffman mode, it is unlikely that very many +implementations will support it.) So far as we are aware, there are +no patent restrictions on the remaining code. + +The IJG distribution formerly included code to read and write GIF files. +To avoid entanglement with the Unisys LZW patent, GIF reading support +has been removed altogether, and the GIF writer has been simplified to +produce "uncompressed GIFs". This technique does not use the LZW algorithm; +the resulting GIF files are larger than usual, but are readable by all +standard GIF decoders. + +We are required to state that "The Graphics Interchange Format(c) is +the Copyright property of CompuServe Incorporated. GIF(sm) is a +Service Mark property of CompuServe Incorporated." + +**************************************************************************** +``` + diff --git a/java21/legal/java.desktop/lcms.md b/java21/legal/java.desktop/lcms.md new file mode 100644 index 0000000000000000000000000000000000000000..83c47d3acdb4745734ca5f0b4a6192e0f6a069f7 --- /dev/null +++ b/java21/legal/java.desktop/lcms.md @@ -0,0 +1,103 @@ +## Little Color Management System (LCMS) v2.17 + +### LCMS License +
+
+MIT License
+
+Copyright (C) 1998-2025 Marti Maria Saguer
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the Software
+is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
+THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+---------------------------------
+The below applies to the following file(s):
+liblcms/cmssm.c
+
+Copyright (C) 2001, softSurfer (www.softsurfer.com)
+
+This code may be freely used and modified for any purpose
+providing that this copyright notice is included with it.
+SoftSurfer makes no warranty for this code, and cannot be held
+liable for any real or imagined damage resulting from its use.
+Users of this code must verify correctness for their application.
+
+
+ +### AUTHORS File Information +``` + +Main Author +------------ +Marti Maria + + +Contributors +------------ +Bob Friesenhahn +Kai-Uwe Behrmann +Stuart Nixon +Jordi Vilar +Richard Hughes +Auke Nauta +Chris Evans (Google) +Lorenzo Ridolfi +Robin Watts (Artifex) +Shawn Pedersen +Andrew Brygin +Samuli Suominen +Florian Hˆch +Aurelien Jarno +Claudiu Cebuc +Michael Vhrel (Artifex) +Michal Cihar +Daniel Kaneider +Mateusz Jurczyk (Google) +Paul Miller +SÈbastien LÈon +Christian Schmitz +XhmikosR +Stanislav Brabec (SuSe) +Leonhard Gruenschloss (Google) +Patrick Noffke +Christopher James Halse Rogers +John Hein +Thomas Weber (Debian) +Mark Allen +Noel Carboni +Sergei Trofimovic +Philipp Knechtges +Amyspark +Lovell Fuller +Eli Schwartz +Diogo Teles Sant'Anna + +Special Thanks +-------------- +Artifex software +AlienSkin software +libVIPS +Jan Morovic +Jos Vernon (WebSupergoo) +Harald Schneider (Maxon) +Christian Albrecht +Dimitrios Anastassakis +Lemke Software +Tim Zaman +Amir Montazery and Open Source Technology Improvement Fund (ostif.org), Google, for fuzzer fundings. +``` \ No newline at end of file diff --git a/java21/legal/java.desktop/libpng.md b/java21/legal/java.desktop/libpng.md new file mode 100644 index 0000000000000000000000000000000000000000..7783fc7ff032bb259e21aec5b37de798d5097006 --- /dev/null +++ b/java21/legal/java.desktop/libpng.md @@ -0,0 +1,231 @@ +## libpng v1.6.57 + +### libpng License +
+
+COPYRIGHT NOTICE, DISCLAIMER, and LICENSE
+=========================================
+
+PNG Reference Library License version 2
+---------------------------------------
+
+Copyright (C) 1995-2026 The PNG Reference Library Authors.
+Copyright (C) 2018-2026 Cosmin Truta
+Copyright (C) 1998-2018 Glenn Randers-Pehrson
+Copyright (C) 1996-1997 Andreas Dilger
+Copyright (C) 1995-1996 Guy Eric Schalnat, Group 42, Inc.
+
+The software is supplied "as is", without warranty of any kind,
+express or implied, including, without limitation, the warranties
+of merchantability, fitness for a particular purpose, title, and
+non-infringement.  In no event shall the Copyright owners, or
+anyone distributing the software, be liable for any damages or
+other liability, whether in contract, tort or otherwise, arising
+from, out of, or in connection with the software, or the use or
+other dealings in the software, even if advised of the possibility
+of such damage.
+
+Permission is hereby granted to use, copy, modify, and distribute
+this software, or portions hereof, for any purpose, without fee,
+subject to the following restrictions:
+
+ 1. The origin of this software must not be misrepresented; you
+    must not claim that you wrote the original software.  If you
+    use this software in a product, an acknowledgment in the product
+    documentation would be appreciated, but is not required.
+
+ 2. Altered source versions must be plainly marked as such, and must
+    not be misrepresented as being the original software.
+
+ 3. This Copyright notice may not be removed or altered from any
+    source or altered source distribution.
+
+
+PNG Reference Library License version 1 (for libpng 0.5 through 1.6.35)
+-----------------------------------------------------------------------
+
+libpng versions 1.0.7, July 1, 2000, through 1.6.35, July 15, 2018 are
+Copyright (c) 2000-2002, 2004, 2006-2018 Glenn Randers-Pehrson, are
+derived from libpng-1.0.6, and are distributed according to the same
+disclaimer and license as libpng-1.0.6 with the following individuals
+added to the list of Contributing Authors:
+
+    Simon-Pierre Cadieux
+    Eric S. Raymond
+    Mans Rullgard
+    Cosmin Truta
+    Gilles Vollant
+    James Yu
+    Mandar Sahastrabuddhe
+    Google Inc.
+    Vadim Barkov
+
+and with the following additions to the disclaimer:
+
+    There is no warranty against interference with your enjoyment of
+    the library or against infringement.  There is no warranty that our
+    efforts or the library will fulfill any of your particular purposes
+    or needs.  This library is provided with all faults, and the entire
+    risk of satisfactory quality, performance, accuracy, and effort is
+    with the user.
+
+Some files in the "contrib" directory and some configure-generated
+files that are distributed with libpng have other copyright owners, and
+are released under other open source licenses.
+
+libpng versions 0.97, January 1998, through 1.0.6, March 20, 2000, are
+Copyright (c) 1998-2000 Glenn Randers-Pehrson, are derived from
+libpng-0.96, and are distributed according to the same disclaimer and
+license as libpng-0.96, with the following individuals added to the
+list of Contributing Authors:
+
+    Tom Lane
+    Glenn Randers-Pehrson
+    Willem van Schaik
+
+libpng versions 0.89, June 1996, through 0.96, May 1997, are
+Copyright (c) 1996-1997 Andreas Dilger, are derived from libpng-0.88,
+and are distributed according to the same disclaimer and license as
+libpng-0.88, with the following individuals added to the list of
+Contributing Authors:
+
+    John Bowler
+    Kevin Bracey
+    Sam Bushell
+    Magnus Holmgren
+    Greg Roelofs
+    Tom Tanner
+
+Some files in the "scripts" directory have other copyright owners,
+but are released under this license.
+
+libpng versions 0.5, May 1995, through 0.88, January 1996, are
+Copyright (c) 1995-1996 Guy Eric Schalnat, Group 42, Inc.
+
+For the purposes of this copyright and license, "Contributing Authors"
+is defined as the following set of individuals:
+
+    Andreas Dilger
+    Dave Martindale
+    Guy Eric Schalnat
+    Paul Schmidt
+    Tim Wegner
+
+The PNG Reference Library is supplied "AS IS".  The Contributing
+Authors and Group 42, Inc. disclaim all warranties, expressed or
+implied, including, without limitation, the warranties of
+merchantability and of fitness for any purpose.  The Contributing
+Authors and Group 42, Inc. assume no liability for direct, indirect,
+incidental, special, exemplary, or consequential damages, which may
+result from the use of the PNG Reference Library, even if advised of
+the possibility of such damage.
+
+Permission is hereby granted to use, copy, modify, and distribute this
+source code, or portions hereof, for any purpose, without fee, subject
+to the following restrictions:
+
+ 1. The origin of this source code must not be misrepresented.
+
+ 2. Altered versions must be plainly marked as such and must not
+    be misrepresented as being the original source.
+
+ 3. This Copyright notice may not be removed or altered from any
+    source or altered source distribution.
+
+The Contributing Authors and Group 42, Inc. specifically permit,
+without fee, and encourage the use of this source code as a component
+to supporting the PNG file format in commercial products.  If you use
+this source code in a product, acknowledgment is not required but would
+be appreciated.
+
+TRADEMARK
+=========
+
+The name "libpng" has not been registered by the Copyright owners
+as a trademark in any jurisdiction.  However, because libpng has
+been distributed and maintained world-wide, continually since 1995,
+the Copyright owners claim "common-law trademark protection" in any
+jurisdiction where common-law trademark is recognized.
+
+
+ +### AUTHORS File Information +``` +PNG REFERENCE LIBRARY AUTHORS +============================= + +This is the list of PNG Reference Library ("libpng") Contributing +Authors, for copyright and licensing purposes. + + * Adam Richter + * Alexander Smorkalov + * Andreas Dilger + * Chris Blume + * Cosmin Truta + * Dave Martindale + * Eric S. Raymond + * Gilles Vollant + * Glenn Randers-Pehrson + * Greg Roelofs + * Guy Eric Schalnat + * Halil Oktay + * James Yu + * John Bowler + * Joshua Inscoe + * Kevin Bracey + * Lucas Chollet + * Magnus Holmgren + * Mandar Sahastrabuddhe + * Manfred Schlaegl + * Mans Rullgard + * Matt Sarett + * Mike Klein + * Mohammad Seet + * Pascal Massimino + * Paul Schmidt + * Petr Simecek + * Philippe Antoine + * Qiang Zhou + * Sam Bushell + * Samuel Williams + * Simon-Pierre Cadieux + * Taegu Ha (하태구) + * Tim Wegner + * Tobias Stoeckmann + * Tom Lane + * Tom Tanner + * Vadim Barkov + * Willem van Schaik + * Yuelin Wang (王跃林) + * Zhijie Liang + * Apple Inc. + - Zixu Wang (王子旭) + * Arm Holdings + - Richard Townsend + * Google LLC + - Dan Field + - Dragoș Tiselice + - Leon Scroggins III + - Matt Sarett + - Mike Klein + - Sami Boukortt + - Wan-Teh Chang + * Loongson Technology Corporation Ltd. + - GuXiWei (顾希伟) + - JinBo (金波) + - ZhangLixia (张利霞) + * Samsung Group + - Filip Wasil + * SpacemiT Hangzhou Technology, Co. + - Liang Junzhao (梁俊钊) + +The build projects, the build scripts, the test scripts, and other +files in the "projects", "scripts" and "tests" directories, have +other copyright owners, but are released under the libpng license. + +Some files in the "ci" and "contrib" directories, as well as some +of the tools-generated files that are distributed with libpng, have +other copyright owners, and are released under other open source +licenses. +``` + diff --git a/java21/legal/java.desktop/mesa3d.md b/java21/legal/java.desktop/mesa3d.md new file mode 100644 index 0000000000000000000000000000000000000000..cdaa1acb2930bff36dce3622b207ed8d9dc40290 --- /dev/null +++ b/java21/legal/java.desktop/mesa3d.md @@ -0,0 +1,134 @@ +## Mesa 3-D Graphics Library v21.0.3 + +### Mesa License + +``` +Copyright (C) 1999-2007 Brian Paul All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sublicense, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included +in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + +Attention, Contributors + +When contributing to the Mesa project you must agree to the licensing terms +of the component to which you're contributing. +The following section lists the primary components of the Mesa distribution +and their respective licenses. +Mesa Component Licenses + + + +Component Location License +------------------------------------------------------------------ +Main Mesa code src/mesa/ MIT +Device drivers src/mesa/drivers/* MIT, generally + +Gallium code src/gallium/ MIT + +Ext headers GL/glext.h Khronos + GL/glxext.h Khronos + GL/wglext.h Khronos + KHR/khrplatform.h Khronos + +***************************************************************************** + +---- +include/GL/gl.h : + + + Mesa 3-D graphics library + + Copyright (C) 1999-2006 Brian Paul All Rights Reserved. + Copyright (C) 2009 VMware, Inc. All Rights Reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + OTHER DEALINGS IN THE SOFTWARE. + + ***************************************************************************** + +---- +include/GL/glext.h +include/GL/glxext.h +include/GL/wglxext.h : + + + Copyright (c) 2013 - 2018 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the + "Materials"), to deal in the Materials without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Materials, and to + permit persons to whom the Materials are furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Materials. + + THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + + ***************************************************************************** + +---- +include/KHR/khrplatform.h : + + Copyright (c) 2008 - 2018 The Khronos Group Inc. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and/or associated documentation files (the + "Materials"), to deal in the Materials without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Materials, and to + permit persons to whom the Materials are furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice shall be included + in all copies or substantial portions of the Materials. + + THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + + ***************************************************************************** + +``` diff --git a/java21/legal/java.instrument/ADDITIONAL_LICENSE_INFO b/java21/legal/java.instrument/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.instrument/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.instrument/ASSEMBLY_EXCEPTION b/java21/legal/java.instrument/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.instrument/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.instrument/LICENSE b/java21/legal/java.instrument/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.instrument/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.logging/ADDITIONAL_LICENSE_INFO b/java21/legal/java.logging/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.logging/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.logging/ASSEMBLY_EXCEPTION b/java21/legal/java.logging/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.logging/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.logging/LICENSE b/java21/legal/java.logging/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.logging/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.management.rmi/ADDITIONAL_LICENSE_INFO b/java21/legal/java.management.rmi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.management.rmi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.management.rmi/ASSEMBLY_EXCEPTION b/java21/legal/java.management.rmi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.management.rmi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.management.rmi/LICENSE b/java21/legal/java.management.rmi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.management.rmi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.management/ADDITIONAL_LICENSE_INFO b/java21/legal/java.management/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.management/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.management/ASSEMBLY_EXCEPTION b/java21/legal/java.management/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.management/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.management/LICENSE b/java21/legal/java.management/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.management/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.naming/ADDITIONAL_LICENSE_INFO b/java21/legal/java.naming/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.naming/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.naming/ASSEMBLY_EXCEPTION b/java21/legal/java.naming/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.naming/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.naming/LICENSE b/java21/legal/java.naming/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.naming/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.net.http/ADDITIONAL_LICENSE_INFO b/java21/legal/java.net.http/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.net.http/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.net.http/ASSEMBLY_EXCEPTION b/java21/legal/java.net.http/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.net.http/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.net.http/LICENSE b/java21/legal/java.net.http/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.net.http/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.prefs/ADDITIONAL_LICENSE_INFO b/java21/legal/java.prefs/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.prefs/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.prefs/ASSEMBLY_EXCEPTION b/java21/legal/java.prefs/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.prefs/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.prefs/LICENSE b/java21/legal/java.prefs/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.prefs/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.rmi/ADDITIONAL_LICENSE_INFO b/java21/legal/java.rmi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.rmi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.rmi/ASSEMBLY_EXCEPTION b/java21/legal/java.rmi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.rmi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.rmi/LICENSE b/java21/legal/java.rmi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.rmi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.scripting/ADDITIONAL_LICENSE_INFO b/java21/legal/java.scripting/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.scripting/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.scripting/ASSEMBLY_EXCEPTION b/java21/legal/java.scripting/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.scripting/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.scripting/LICENSE b/java21/legal/java.scripting/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.scripting/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.se/ADDITIONAL_LICENSE_INFO b/java21/legal/java.se/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.se/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.se/ASSEMBLY_EXCEPTION b/java21/legal/java.se/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.se/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.se/LICENSE b/java21/legal/java.se/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.se/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.security.jgss/ADDITIONAL_LICENSE_INFO b/java21/legal/java.security.jgss/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.security.jgss/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.security.jgss/ASSEMBLY_EXCEPTION b/java21/legal/java.security.jgss/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.security.jgss/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.security.jgss/LICENSE b/java21/legal/java.security.jgss/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.security.jgss/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.security.sasl/ADDITIONAL_LICENSE_INFO b/java21/legal/java.security.sasl/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.security.sasl/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.security.sasl/ASSEMBLY_EXCEPTION b/java21/legal/java.security.sasl/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.security.sasl/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.security.sasl/LICENSE b/java21/legal/java.security.sasl/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.security.sasl/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.smartcardio/ADDITIONAL_LICENSE_INFO b/java21/legal/java.smartcardio/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.smartcardio/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.smartcardio/ASSEMBLY_EXCEPTION b/java21/legal/java.smartcardio/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.smartcardio/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.smartcardio/LICENSE b/java21/legal/java.smartcardio/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.smartcardio/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.sql.rowset/ADDITIONAL_LICENSE_INFO b/java21/legal/java.sql.rowset/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.sql.rowset/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.sql.rowset/ASSEMBLY_EXCEPTION b/java21/legal/java.sql.rowset/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.sql.rowset/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.sql.rowset/LICENSE b/java21/legal/java.sql.rowset/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.sql.rowset/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.sql/ADDITIONAL_LICENSE_INFO b/java21/legal/java.sql/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.sql/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.sql/ASSEMBLY_EXCEPTION b/java21/legal/java.sql/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.sql/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.sql/LICENSE b/java21/legal/java.sql/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.sql/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.transaction.xa/ADDITIONAL_LICENSE_INFO b/java21/legal/java.transaction.xa/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.transaction.xa/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.transaction.xa/ASSEMBLY_EXCEPTION b/java21/legal/java.transaction.xa/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.transaction.xa/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.transaction.xa/LICENSE b/java21/legal/java.transaction.xa/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.transaction.xa/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.xml.crypto/ADDITIONAL_LICENSE_INFO b/java21/legal/java.xml.crypto/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.xml.crypto/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.xml.crypto/ASSEMBLY_EXCEPTION b/java21/legal/java.xml.crypto/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.xml.crypto/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.xml.crypto/LICENSE b/java21/legal/java.xml.crypto/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.xml.crypto/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.xml.crypto/santuario.md b/java21/legal/java.xml.crypto/santuario.md new file mode 100644 index 0000000000000000000000000000000000000000..4421e16df25a1b580b974bfbf9896afb18a4ba77 --- /dev/null +++ b/java21/legal/java.xml.crypto/santuario.md @@ -0,0 +1,227 @@ +## Apache Santuario v3.0.5 + +### Apache 2.0 License +``` + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + +TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + +1. Definitions. + + "License" shall mean the terms and conditions for use, reproduction, + and distribution as defined by Sections 1 through 9 of this document. + + "Licensor" shall mean the copyright owner or entity authorized by + the copyright owner that is granting the License. + + "Legal Entity" shall mean the union of the acting entity and all + other entities that control, are controlled by, or are under common + control with that entity. For the purposes of this definition, + "control" means (i) the power, direct or indirect, to cause the + direction or management of such entity, whether by contract or + otherwise, or (ii) ownership of fifty percent (50%) or more of the + outstanding shares, or (iii) beneficial ownership of such entity. + + "You" (or "Your") shall mean an individual or Legal Entity + exercising permissions granted by this License. + + "Source" form shall mean the preferred form for making modifications, + including but not limited to software source code, documentation + source, and configuration files. + + "Object" form shall mean any form resulting from mechanical + transformation or translation of a Source form, including but + not limited to compiled object code, generated documentation, + and conversions to other media types. + + "Work" shall mean the work of authorship, whether in Source or + Object form, made available under the License, as indicated by a + copyright notice that is included in or attached to the work + (an example is provided in the Appendix below). + + "Derivative Works" shall mean any work, whether in Source or Object + form, that is based on (or derived from) the Work and for which the + editorial revisions, annotations, elaborations, or other modifications + represent, as a whole, an original work of authorship. For the purposes + of this License, Derivative Works shall not include works that remain + separable from, or merely link (or bind by name) to the interfaces of, + the Work and Derivative Works thereof. + + "Contribution" shall mean any work of authorship, including + the original version of the Work and any modifications or additions + to that Work or Derivative Works thereof, that is intentionally + submitted to Licensor for inclusion in the Work by the copyright owner + or by an individual or Legal Entity authorized to submit on behalf of + the copyright owner. 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If You + institute patent litigation against any entity (including a + cross-claim or counterclaim in a lawsuit) alleging that the Work + or a Contribution incorporated within the Work constitutes direct + or contributory patent infringement, then any patent licenses + granted to You under this License for that Work shall terminate + as of the date such litigation is filed. + +4. Redistribution. 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The contents + of the NOTICE file are for informational purposes only and + do not modify the License. You may add Your own attribution + notices within Derivative Works that You distribute, alongside + or as an addendum to the NOTICE text from the Work, provided + that such additional attribution notices cannot be construed + as modifying the License. + + You may add Your own copyright statement to Your modifications and + may provide additional or different license terms and conditions + for use, reproduction, or distribution of Your modifications, or + for any such Derivative Works as a whole, provided Your use, + reproduction, and distribution of the Work otherwise complies with + the conditions stated in this License. + +5. Submission of Contributions. Unless You explicitly state otherwise, + any Contribution intentionally submitted for inclusion in the Work + by You to the Licensor shall be under the terms and conditions of + this License, without any additional terms or conditions. + Notwithstanding the above, nothing herein shall supersede or modify + the terms of any separate license agreement you may have executed + with Licensor regarding such Contributions. + +6. Trademarks. This License does not grant permission to use the trade + names, trademarks, service marks, or product names of the Licensor, + except as required for reasonable and customary use in describing the + origin of the Work and reproducing the content of the NOTICE file. + +7. Disclaimer of Warranty. Unless required by applicable law or + agreed to in writing, Licensor provides the Work (and each + Contributor provides its Contributions) on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied, including, without limitation, any warranties or conditions + of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A + PARTICULAR PURPOSE. You are solely responsible for determining the + appropriateness of using or redistributing the Work and assume any + risks associated with Your exercise of permissions under this License. + +8. Limitation of Liability. In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + +9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + +END OF TERMS AND CONDITIONS + +APPENDIX: How to apply the Apache License to your work. + + To apply the Apache License to your work, attach the following + boilerplate notice, with the fields enclosed by brackets "[]" + replaced with your own identifying information. (Don't include + the brackets!) The text should be enclosed in the appropriate + comment syntax for the file format. We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + +Copyright [yyyy] [name of copyright owner] + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +``` + +### Apache Santuario Notice +``` + +Apache Santuario - XML Security for Java +Copyright 1999-2024 The Apache Software Foundation + +This product includes software developed at +The Apache Software Foundation (http://www.apache.org/). + +It was originally based on software copyright (c) 2001, Institute for +Data Communications Systems, . + +The development of this software was partly funded by the European +Commission in the project in the ISIS Programme. + +This product contains software that is +copyright (c) 2021, 2023, Oracle and/or its affiliates. +``` diff --git a/java21/legal/java.xml/ADDITIONAL_LICENSE_INFO b/java21/legal/java.xml/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/java.xml/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/java.xml/ASSEMBLY_EXCEPTION b/java21/legal/java.xml/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/java.xml/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/java.xml/LICENSE b/java21/legal/java.xml/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/java.xml/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/java.xml/bcel.md b/java21/legal/java.xml/bcel.md new file mode 100644 index 0000000000000000000000000000000000000000..b64fc3640d4a215c34acdcc73c0d26ee431e602f --- /dev/null +++ b/java21/legal/java.xml/bcel.md @@ -0,0 +1,219 @@ +## Apache Commons Byte Code Engineering Library (BCEL) Version 6.10.0 + +### Apache Commons BCEL Notice +
+
+    Apache Commons BCEL
+    Copyright 2004-2022 The Apache Software Foundation
+
+    This product includes software developed at
+    The Apache Software Foundation (https://www.apache.org/).
+
+
+ +### Apache 2.0 License +
+
+                              Apache License
+                        Version 2.0, January 2004
+                     http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+   "License" shall mean the terms and conditions for use, reproduction,
+   and distribution as defined by Sections 1 through 9 of this document.
+
+   "Licensor" shall mean the copyright owner or entity authorized by
+   the copyright owner that is granting the License.
+
+   "Legal Entity" shall mean the union of the acting entity and all
+   other entities that control, are controlled by, or are under common
+   control with that entity. For the purposes of this definition,
+   "control" means (i) the power, direct or indirect, to cause the
+   direction or management of such entity, whether by contract or
+   otherwise, or (ii) ownership of fifty percent (50%) or more of the
+   outstanding shares, or (iii) beneficial ownership of such entity.
+
+   "You" (or "Your") shall mean an individual or Legal Entity
+   exercising permissions granted by this License.
+
+   "Source" form shall mean the preferred form for making modifications,
+   including but not limited to software source code, documentation
+   source, and configuration files.
+
+   "Object" form shall mean any form resulting from mechanical
+   transformation or translation of a Source form, including but
+   not limited to compiled object code, generated documentation,
+   and conversions to other media types.
+
+   "Work" shall mean the work of authorship, whether in Source or
+   Object form, made available under the License, as indicated by a
+   copyright notice that is included in or attached to the work
+   (an example is provided in the Appendix below).
+
+   "Derivative Works" shall mean any work, whether in Source or Object
+   form, that is based on (or derived from) the Work and for which the
+   editorial revisions, annotations, elaborations, or other modifications
+   represent, as a whole, an original work of authorship. For the purposes
+   of this License, Derivative Works shall not include works that remain
+   separable from, or merely link (or bind by name) to the interfaces of,
+   the Work and Derivative Works thereof.
+
+   "Contribution" shall mean any work of authorship, including
+   the original version of the Work and any modifications or additions
+   to that Work or Derivative Works thereof, that is intentionally
+   submitted to Licensor for inclusion in the Work by the copyright owner
+   or by an individual or Legal Entity authorized to submit on behalf of
+   the copyright owner. For the purposes of this definition, "submitted"
+   means any form of electronic, verbal, or written communication sent
+   to the Licensor or its representatives, including but not limited to
+   communication on electronic mailing lists, source code control systems,
+   and issue tracking systems that are managed by, or on behalf of, the
+   Licensor for the purpose of discussing and improving the Work, but
+   excluding communication that is conspicuously marked or otherwise
+   designated in writing by the copyright owner as "Not a Contribution."
+
+   "Contributor" shall mean Licensor and any individual or Legal Entity
+   on behalf of whom a Contribution has been received by Licensor and
+   subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   copyright license to reproduce, prepare Derivative Works of,
+   publicly display, publicly perform, sublicense, and distribute the
+   Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   (except as stated in this section) patent license to make, have made,
+   use, offer to sell, sell, import, and otherwise transfer the Work,
+   where such license applies only to those patent claims licensable
+   by such Contributor that are necessarily infringed by their
+   Contribution(s) alone or by combination of their Contribution(s)
+   with the Work to which such Contribution(s) was submitted. If You
+   institute patent litigation against any entity (including a
+   cross-claim or counterclaim in a lawsuit) alleging that the Work
+   or a Contribution incorporated within the Work constitutes direct
+   or contributory patent infringement, then any patent licenses
+   granted to You under this License for that Work shall terminate
+   as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the
+   Work or Derivative Works thereof in any medium, with or without
+   modifications, and in Source or Object form, provided that You
+   meet the following conditions:
+
+   (a) You must give any other recipients of the Work or
+       Derivative Works a copy of this License; and
+
+   (b) You must cause any modified files to carry prominent notices
+       stating that You changed the files; and
+
+   (c) You must retain, in the Source form of any Derivative Works
+       that You distribute, all copyright, patent, trademark, and
+       attribution notices from the Source form of the Work,
+       excluding those notices that do not pertain to any part of
+       the Derivative Works; and
+
+   (d) If the Work includes a "NOTICE" text file as part of its
+       distribution, then any Derivative Works that You distribute must
+       include a readable copy of the attribution notices contained
+       within such NOTICE file, excluding those notices that do not
+       pertain to any part of the Derivative Works, in at least one
+       of the following places: within a NOTICE text file distributed
+       as part of the Derivative Works; within the Source form or
+       documentation, if provided along with the Derivative Works; or,
+       within a display generated by the Derivative Works, if and
+       wherever such third-party notices normally appear. The contents
+       of the NOTICE file are for informational purposes only and
+       do not modify the License. You may add Your own attribution
+       notices within Derivative Works that You distribute, alongside
+       or as an addendum to the NOTICE text from the Work, provided
+       that such additional attribution notices cannot be construed
+       as modifying the License.
+
+   You may add Your own copyright statement to Your modifications and
+   may provide additional or different license terms and conditions
+   for use, reproduction, or distribution of Your modifications, or
+   for any such Derivative Works as a whole, provided Your use,
+   reproduction, and distribution of the Work otherwise complies with
+   the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise,
+   any Contribution intentionally submitted for inclusion in the Work
+   by You to the Licensor shall be under the terms and conditions of
+   this License, without any additional terms or conditions.
+   Notwithstanding the above, nothing herein shall supersede or modify
+   the terms of any separate license agreement you may have executed
+   with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+   names, trademarks, service marks, or product names of the Licensor,
+   except as required for reasonable and customary use in describing the
+   origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or
+   agreed to in writing, Licensor provides the Work (and each
+   Contributor provides its Contributions) on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+   implied, including, without limitation, any warranties or conditions
+   of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+   PARTICULAR PURPOSE. You are solely responsible for determining the
+   appropriateness of using or redistributing the Work and assume any
+   risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory,
+   whether in tort (including negligence), contract, or otherwise,
+   unless required by applicable law (such as deliberate and grossly
+   negligent acts) or agreed to in writing, shall any Contributor be
+   liable to You for damages, including any direct, indirect, special,
+   incidental, or consequential damages of any character arising as a
+   result of this License or out of the use or inability to use the
+   Work (including but not limited to damages for loss of goodwill,
+   work stoppage, computer failure or malfunction, or any and all
+   other commercial damages or losses), even if such Contributor
+   has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing
+   the Work or Derivative Works thereof, You may choose to offer,
+   and charge a fee for, acceptance of support, warranty, indemnity,
+   or other liability obligations and/or rights consistent with this
+   License. However, in accepting such obligations, You may act only
+   on Your own behalf and on Your sole responsibility, not on behalf
+   of any other Contributor, and only if You agree to indemnify,
+   defend, and hold each Contributor harmless for any liability
+   incurred by, or claims asserted against, such Contributor by reason
+   of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
+
+APPENDIX: How to apply the Apache License to your work.
+
+   To apply the Apache License to your work, attach the following
+   boilerplate notice, with the fields enclosed by brackets "[]"
+   replaced with your own identifying information. (Don't include
+   the brackets!)  The text should be enclosed in the appropriate
+   comment syntax for the file format. We also recommend that a
+   file or class name and description of purpose be included on the
+   same "printed page" as the copyright notice for easier
+   identification within third-party archives.
+
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+
diff --git a/java21/legal/java.xml/dom.md b/java21/legal/java.xml/dom.md new file mode 100644 index 0000000000000000000000000000000000000000..4fe80935ed184e2fbced1752ac14cc8d2057a3cf --- /dev/null +++ b/java21/legal/java.xml/dom.md @@ -0,0 +1,77 @@ +## DOM Level 3 Core Specification v1.0 + +### W3C Software Notice +
+Copyright © 2004 World Wide Web Consortium, (Massachusetts Institute of Technology,
+European Research Consortium for Informatics and Mathematics, Keio University).
+All Rights Reserved.
+
+The DOM bindings are published under the W3C Software Copyright Notice and License.
+The software license requires "Notice of any changes or modifications to the W3C
+files, including the date changes were made." Consequently, modified versions of
+the DOM bindings must document that they do not conform to the W3C standard; in the
+case of the IDL definitions, the pragma prefix can no longer be 'w3c.org'; in the
+case of the Java language binding, the package names can no longer be in the
+'org.w3c' package.
+
+ +### W3C License +
+
+W3C SOFTWARE NOTICE AND LICENSE
+
+http://www.w3.org/Consortium/Legal/2002/copyright-software-20021231
+
+This work (and included software, documentation such as READMEs, or other
+related items) is being provided by the copyright holders under the following
+license. By obtaining, using and/or copying this work, you (the licensee)
+agree that you have read, understood, and will comply with the following terms
+and conditions.
+
+Permission to copy, modify, and distribute this software and its
+documentation, with or without modification, for any purpose and without fee
+or royalty is hereby granted, provided that you include the following on ALL
+copies of the software and documentation or portions thereof, including
+modifications:
+
+   1.The full text of this NOTICE in a location viewable to users of the
+   redistributed or derivative work.
+
+   2.Any pre-existing intellectual property disclaimers, notices, or terms and
+   conditions. If none exist, the W3C Software Short Notice should be included
+   (hypertext is preferred, text is permitted) within the body of any
+   redistributed or derivative code.
+
+   3.Notice of any changes or modifications to the files, including the date
+   changes were made. (We recommend you provide URIs to the location from
+   which the code is derived.)
+
+THIS SOFTWARE AND DOCUMENTATION IS PROVIDED "AS IS," AND COPYRIGHT HOLDERS
+MAKE NO REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
+LIMITED TO, WARRANTIES OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR
+PURPOSE OR THAT THE USE OF THE SOFTWARE OR DOCUMENTATION WILL NOT INFRINGE ANY
+THIRD PARTY PATENTS,COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS.
+
+COPYRIGHT HOLDERS WILL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL
+OR CONSEQUENTIAL DAMAGES ARISING OUT OF ANY USE OF THE SOFTWARE OR
+DOCUMENTATION.  The name and trademarks of copyright holders may NOT be used
+in advertising or publicity pertaining to the software without specific,
+written prior permission. Title to copyright in this software and any
+associated documentation will at all times remain with copyright holders.
+
+____________________________________
+
+This formulation of W3C's notice and license became active on December 31
+2002. This version removes the copyright ownership notice such that this
+license can be used with materials other than those owned by the W3C, reflects
+that ERCIM is now a host of the W3C, includes references to this specific
+dated version of the license, and removes the ambiguous grant of "use".
+Otherwise, this version is the same as the previous version and is written so
+as to preserve the Free Software Foundation's assessment of GPL compatibility
+and OSI's certification under the Open Source Definition. Please see our
+Copyright FAQ for common questions about using materials from our site,
+including specific terms and conditions for packages like libwww, Amaya, and
+Jigsaw. Other questions about this notice can be directed to
+site-policy@w3.org.
+
+
diff --git a/java21/legal/java.xml/jcup.md b/java21/legal/java.xml/jcup.md new file mode 100644 index 0000000000000000000000000000000000000000..bc566b7d2dbd9746f1085f1d19c70e57cb9654ca --- /dev/null +++ b/java21/legal/java.xml/jcup.md @@ -0,0 +1,31 @@ +## CUP Parser Generator for Java v 0.11b + +### CUP Parser Generator License + +``` +Copyright 1996-2015 by Scott Hudson, Frank Flannery, C. Scott Ananian, Michael Petter + +Permission to use, copy, modify, and distribute this software and its +documentation for any purpose and without fee is hereby granted, provided +that the above copyright notice appear in all copies and that both +the copyright notice and this permission notice and warranty disclaimer +appear in supporting documentation, and that the names of the authors or +their employers not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior permission. + +The authors and their employers disclaim all warranties with regard to +this software, including all implied warranties of merchantability and +fitness. In no event shall the authors or their employers be liable for +any special, indirect or consequential damages or any damages whatsoever +resulting from loss of use, data or profits, whether in an action of +contract, negligence or other tortious action, arising out of or in +connection with the use or performance of this software. +``` +--- +``` +This is an open source license. It is also GPL-Compatible (see entry for +"Standard ML of New Jersey"). The portions of CUP output which are hard-coded +into the CUP source code are (naturally) covered by this same license, as is +the CUP runtime code linked with the generated parser. +``` + diff --git a/java21/legal/java.xml/xalan.md b/java21/legal/java.xml/xalan.md new file mode 100644 index 0000000000000000000000000000000000000000..8a3dd15e4e8940adc824063522e6792a2c3861bc --- /dev/null +++ b/java21/legal/java.xml/xalan.md @@ -0,0 +1,255 @@ +## Apache Xalan v2.7.2 + +### Apache Xalan Notice +
+
+    ======================================================================================
+    ==  NOTICE file corresponding to the section 4d of the Apache License, Version 2.0, ==
+    ==  in this case for the Apache Xalan distribution.                                 ==
+    ======================================================================================
+
+   This product includes software developed by
+   The Apache Software Foundation (http://www.apache.org/).
+
+   Specifically, we only include the XSLTC portion of the source from the Xalan distribution.
+   The Xalan project has two processors: an interpretive one (Xalan Interpretive) and a
+   compiled one (The XSLT Compiler (XSLTC)). We *only* use the XSLTC part of Xalan; We use
+   the source from the packages that are part of the XSLTC sources.
+
+   Portions of this software was originally based on the following:
+
+     - software copyright (c) 1999-2002, Lotus Development Corporation., http://www.lotus.com.
+     - software copyright (c) 2001-2002, Sun Microsystems., http://www.sun.com.
+     - software copyright (c) 2003, IBM Corporation., http://www.ibm.com.
+     - voluntary contributions made by Ovidiu Predescu (ovidiu@cup.hp.com) on behalf of the
+       Apache Software Foundation and was originally developed at Hewlett Packard Company.
+
+
+ +### Apache 2.0 License +
+
+                              Apache License
+                        Version 2.0, January 2004
+                     http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+   "License" shall mean the terms and conditions for use, reproduction,
+   and distribution as defined by Sections 1 through 9 of this document.
+
+   "Licensor" shall mean the copyright owner or entity authorized by
+   the copyright owner that is granting the License.
+
+   "Legal Entity" shall mean the union of the acting entity and all
+   other entities that control, are controlled by, or are under common
+   control with that entity. For the purposes of this definition,
+   "control" means (i) the power, direct or indirect, to cause the
+   direction or management of such entity, whether by contract or
+   otherwise, or (ii) ownership of fifty percent (50%) or more of the
+   outstanding shares, or (iii) beneficial ownership of such entity.
+
+   "You" (or "Your") shall mean an individual or Legal Entity
+   exercising permissions granted by this License.
+
+   "Source" form shall mean the preferred form for making modifications,
+   including but not limited to software source code, documentation
+   source, and configuration files.
+
+   "Object" form shall mean any form resulting from mechanical
+   transformation or translation of a Source form, including but
+   not limited to compiled object code, generated documentation,
+   and conversions to other media types.
+
+   "Work" shall mean the work of authorship, whether in Source or
+   Object form, made available under the License, as indicated by a
+   copyright notice that is included in or attached to the work
+   (an example is provided in the Appendix below).
+
+   "Derivative Works" shall mean any work, whether in Source or Object
+   form, that is based on (or derived from) the Work and for which the
+   editorial revisions, annotations, elaborations, or other modifications
+   represent, as a whole, an original work of authorship. For the purposes
+   of this License, Derivative Works shall not include works that remain
+   separable from, or merely link (or bind by name) to the interfaces of,
+   the Work and Derivative Works thereof.
+
+   "Contribution" shall mean any work of authorship, including
+   the original version of the Work and any modifications or additions
+   to that Work or Derivative Works thereof, that is intentionally
+   submitted to Licensor for inclusion in the Work by the copyright owner
+   or by an individual or Legal Entity authorized to submit on behalf of
+   the copyright owner. For the purposes of this definition, "submitted"
+   means any form of electronic, verbal, or written communication sent
+   to the Licensor or its representatives, including but not limited to
+   communication on electronic mailing lists, source code control systems,
+   and issue tracking systems that are managed by, or on behalf of, the
+   Licensor for the purpose of discussing and improving the Work, but
+   excluding communication that is conspicuously marked or otherwise
+   designated in writing by the copyright owner as "Not a Contribution."
+
+   "Contributor" shall mean Licensor and any individual or Legal Entity
+   on behalf of whom a Contribution has been received by Licensor and
+   subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   copyright license to reproduce, prepare Derivative Works of,
+   publicly display, publicly perform, sublicense, and distribute the
+   Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of
+   this License, each Contributor hereby grants to You a perpetual,
+   worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+   (except as stated in this section) patent license to make, have made,
+   use, offer to sell, sell, import, and otherwise transfer the Work,
+   where such license applies only to those patent claims licensable
+   by such Contributor that are necessarily infringed by their
+   Contribution(s) alone or by combination of their Contribution(s)
+   with the Work to which such Contribution(s) was submitted. If You
+   institute patent litigation against any entity (including a
+   cross-claim or counterclaim in a lawsuit) alleging that the Work
+   or a Contribution incorporated within the Work constitutes direct
+   or contributory patent infringement, then any patent licenses
+   granted to You under this License for that Work shall terminate
+   as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the
+   Work or Derivative Works thereof in any medium, with or without
+   modifications, and in Source or Object form, provided that You
+   meet the following conditions:
+
+   (a) You must give any other recipients of the Work or
+       Derivative Works a copy of this License; and
+
+   (b) You must cause any modified files to carry prominent notices
+       stating that You changed the files; and
+
+   (c) You must retain, in the Source form of any Derivative Works
+       that You distribute, all copyright, patent, trademark, and
+       attribution notices from the Source form of the Work,
+       excluding those notices that do not pertain to any part of
+       the Derivative Works; and
+
+   (d) If the Work includes a "NOTICE" text file as part of its
+       distribution, then any Derivative Works that You distribute must
+       include a readable copy of the attribution notices contained
+       within such NOTICE file, excluding those notices that do not
+       pertain to any part of the Derivative Works, in at least one
+       of the following places: within a NOTICE text file distributed
+       as part of the Derivative Works; within the Source form or
+       documentation, if provided along with the Derivative Works; or,
+       within a display generated by the Derivative Works, if and
+       wherever such third-party notices normally appear. The contents
+       of the NOTICE file are for informational purposes only and
+       do not modify the License. You may add Your own attribution
+       notices within Derivative Works that You distribute, alongside
+       or as an addendum to the NOTICE text from the Work, provided
+       that such additional attribution notices cannot be construed
+       as modifying the License.
+
+   You may add Your own copyright statement to Your modifications and
+   may provide additional or different license terms and conditions
+   for use, reproduction, or distribution of Your modifications, or
+   for any such Derivative Works as a whole, provided Your use,
+   reproduction, and distribution of the Work otherwise complies with
+   the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise,
+   any Contribution intentionally submitted for inclusion in the Work
+   by You to the Licensor shall be under the terms and conditions of
+   this License, without any additional terms or conditions.
+   Notwithstanding the above, nothing herein shall supersede or modify
+   the terms of any separate license agreement you may have executed
+   with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+   names, trademarks, service marks, or product names of the Licensor,
+   except as required for reasonable and customary use in describing the
+   origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or
+   agreed to in writing, Licensor provides the Work (and each
+   Contributor provides its Contributions) on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+   implied, including, without limitation, any warranties or conditions
+   of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+   PARTICULAR PURPOSE. You are solely responsible for determining the
+   appropriateness of using or redistributing the Work and assume any
+   risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory,
+   whether in tort (including negligence), contract, or otherwise,
+   unless required by applicable law (such as deliberate and grossly
+   negligent acts) or agreed to in writing, shall any Contributor be
+   liable to You for damages, including any direct, indirect, special,
+   incidental, or consequential damages of any character arising as a
+   result of this License or out of the use or inability to use the
+   Work (including but not limited to damages for loss of goodwill,
+   work stoppage, computer failure or malfunction, or any and all
+   other commercial damages or losses), even if such Contributor
+   has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing
+   the Work or Derivative Works thereof, You may choose to offer,
+   and charge a fee for, acceptance of support, warranty, indemnity,
+   or other liability obligations and/or rights consistent with this
+   License. However, in accepting such obligations, You may act only
+   on Your own behalf and on Your sole responsibility, not on behalf
+   of any other Contributor, and only if You agree to indemnify,
+   defend, and hold each Contributor harmless for any liability
+   incurred by, or claims asserted against, such Contributor by reason
+   of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
+
+APPENDIX: How to apply the Apache License to your work.
+
+   To apply the Apache License to your work, attach the following
+   boilerplate notice, with the fields enclosed by brackets "[]"
+   replaced with your own identifying information. (Don't include
+   the brackets!)  The text should be enclosed in the appropriate
+   comment syntax for the file format. We also recommend that a
+   file or class name and description of purpose be included on the
+   same "printed page" as the copyright notice for easier
+   identification within third-party archives.
+
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+
+JLEX COPYRIGHT NOTICE, LICENSE AND DISCLAIMER.
+Copyright 1996-2003 by Elliot Joel Berk and C. Scott Ananian
+Permission to use, copy, modify, and distribute this software and
+its documentation for any purpose and without fee is hereby granted,
+provided that the above copyright notice appear in all copies and that
+both the copyright notice and this permission notice and warranty
+disclaimer appear in supporting documentation, and that the name of
+the authors or their employers not be used in advertising or publicity
+pertaining to distribution of the software without specific, written
+prior permission.
+The authors and their employers disclaim all warranties with regard to
+this software, including all implied warranties of merchantability and
+fitness. In no event shall the authors or their employers be liable for
+any special, indirect or consequential damages or any damages whatsoever
+resulting from loss of use, data or profits, whether in an action of
+contract, negligence or other tortious action, arising out of or in
+connection with the use or performance of this software.The portions of
+JLex output which are hard-coded into the JLex source code are (naturally)
+covered by this same license.
+
+
diff --git a/java21/legal/java.xml/xerces.md b/java21/legal/java.xml/xerces.md new file mode 100644 index 0000000000000000000000000000000000000000..ad01181b8b4335c5b0be9e386070d9ea9d8f780c --- /dev/null +++ b/java21/legal/java.xml/xerces.md @@ -0,0 +1,229 @@ +## Apache Xerces v2.12.2 + +### Apache Xerces Notice +
+    =========================================================================
+    == NOTICE file corresponding to section 4(d) of the Apache License,    ==
+    == Version 2.0, in this case for the Apache Xerces Java distribution.  ==
+    =========================================================================
+
+    Apache Xerces Java
+    Copyright 1999-2022 The Apache Software Foundation
+
+    This product includes software developed at
+    The Apache Software Foundation (http://www.apache.org/).
+
+    Portions of this software were originally based on the following:
+    - software copyright (c) 1999, IBM Corporation., http://www.ibm.com.
+    - software copyright (c) 1999, Sun Microsystems., http://www.sun.com.
+    - voluntary contributions made by Paul Eng on behalf of the
+    Apache Software Foundation that were originally developed at iClick, Inc.,
+    software copyright (c) 1999.
+
+ +### Apache 2.0 License +
+
+                              Apache License
+                        Version 2.0, January 2004
+                     http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+   "License" shall mean the terms and conditions for use, reproduction,
+   and distribution as defined by Sections 1 through 9 of this document.
+
+   "Licensor" shall mean the copyright owner or entity authorized by
+   the copyright owner that is granting the License.
+
+   "Legal Entity" shall mean the union of the acting entity and all
+   other entities that control, are controlled by, or are under common
+   control with that entity. For the purposes of this definition,
+   "control" means (i) the power, direct or indirect, to cause the
+   direction or management of such entity, whether by contract or
+   otherwise, or (ii) ownership of fifty percent (50%) or more of the
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diff --git a/java21/legal/jdk.accessibility/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.accessibility/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.accessibility/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.accessibility/ASSEMBLY_EXCEPTION b/java21/legal/jdk.accessibility/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.accessibility/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.accessibility/LICENSE b/java21/legal/jdk.accessibility/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.accessibility/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.attach/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.attach/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.attach/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.attach/ASSEMBLY_EXCEPTION b/java21/legal/jdk.attach/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.attach/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.attach/LICENSE b/java21/legal/jdk.attach/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.attach/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.charsets/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.charsets/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.charsets/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.charsets/ASSEMBLY_EXCEPTION b/java21/legal/jdk.charsets/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.charsets/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.charsets/LICENSE b/java21/legal/jdk.charsets/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.charsets/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.compiler/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.compiler/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.compiler/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.compiler/ASSEMBLY_EXCEPTION b/java21/legal/jdk.compiler/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.compiler/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.compiler/LICENSE b/java21/legal/jdk.compiler/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.compiler/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.crypto.cryptoki/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.crypto.cryptoki/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.crypto.cryptoki/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.crypto.cryptoki/ASSEMBLY_EXCEPTION b/java21/legal/jdk.crypto.cryptoki/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.crypto.cryptoki/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.crypto.cryptoki/LICENSE b/java21/legal/jdk.crypto.cryptoki/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.crypto.cryptoki/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.crypto.cryptoki/pkcs11cryptotoken.md b/java21/legal/jdk.crypto.cryptoki/pkcs11cryptotoken.md new file mode 100644 index 0000000000000000000000000000000000000000..7877f54fe6e39367b6b8c9673447b91573efc489 --- /dev/null +++ b/java21/legal/jdk.crypto.cryptoki/pkcs11cryptotoken.md @@ -0,0 +1,76 @@ +## OASIS PKCS #11 Cryptographic Token Interface v3.1 + +### OASIS PKCS #11 Cryptographic Token Interface License +
+
+Copyright © OASIS Open 2023. All Rights Reserved.
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diff --git a/java21/legal/jdk.crypto.cryptoki/pkcs11wrapper.md b/java21/legal/jdk.crypto.cryptoki/pkcs11wrapper.md new file mode 100644 index 0000000000000000000000000000000000000000..9eb453bca8dcbe38a0da162f215c29c0ca21dff1 --- /dev/null +++ b/java21/legal/jdk.crypto.cryptoki/pkcs11wrapper.md @@ -0,0 +1,46 @@ +## IAIK (Institute for Applied Information Processing and Communication) PKCS#11 wrapper files v1 + +### IAIK License +
+
+Copyright (c) 2002 Graz University of Technology. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
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+   and/or other materials provided with the distribution.
+
+3. The end-user documentation included with the redistribution, if any, must
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+
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+
+   Alternately, this acknowledgment may appear in the software itself, if and
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+
+4. The names "Graz University of Technology" and "IAIK of Graz University of
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+   software without prior written permission.
+
+5. Products derived from this software may not be called "IAIK PKCS Wrapper",
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+   Graz University of Technology.
+
+THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESSED OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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+LICENSOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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+POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java21/legal/jdk.crypto.ec/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.crypto.ec/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.crypto.ec/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.crypto.ec/ASSEMBLY_EXCEPTION b/java21/legal/jdk.crypto.ec/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.crypto.ec/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.crypto.ec/LICENSE b/java21/legal/jdk.crypto.ec/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.crypto.ec/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.crypto.mscapi/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.crypto.mscapi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.crypto.mscapi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.crypto.mscapi/ASSEMBLY_EXCEPTION b/java21/legal/jdk.crypto.mscapi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.crypto.mscapi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.crypto.mscapi/LICENSE b/java21/legal/jdk.crypto.mscapi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.crypto.mscapi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.dynalink/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.dynalink/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.dynalink/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.dynalink/ASSEMBLY_EXCEPTION b/java21/legal/jdk.dynalink/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.dynalink/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.dynalink/LICENSE b/java21/legal/jdk.dynalink/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.dynalink/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.dynalink/dynalink.md b/java21/legal/jdk.dynalink/dynalink.md new file mode 100644 index 0000000000000000000000000000000000000000..309efc7cbd864a29ce63e846c6411c090f5a63a7 --- /dev/null +++ b/java21/legal/jdk.dynalink/dynalink.md @@ -0,0 +1,32 @@ +## Dynalink v.5 + +### Dynalink License +
+
+Copyright (c) 2009-2013, Attila Szegedi
+
+Redistribution and use in source and binary forms, with or without
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+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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+
+
diff --git a/java21/legal/jdk.editpad/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.editpad/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.editpad/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.editpad/ASSEMBLY_EXCEPTION b/java21/legal/jdk.editpad/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.editpad/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.editpad/LICENSE b/java21/legal/jdk.editpad/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.editpad/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.hotspot.agent/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.hotspot.agent/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.hotspot.agent/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.hotspot.agent/ASSEMBLY_EXCEPTION b/java21/legal/jdk.hotspot.agent/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.hotspot.agent/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.hotspot.agent/LICENSE b/java21/legal/jdk.hotspot.agent/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.hotspot.agent/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.httpserver/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.httpserver/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.httpserver/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.httpserver/ASSEMBLY_EXCEPTION b/java21/legal/jdk.httpserver/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.httpserver/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.httpserver/LICENSE b/java21/legal/jdk.httpserver/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.httpserver/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.incubator.vector/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.incubator.vector/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.incubator.vector/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.incubator.vector/ASSEMBLY_EXCEPTION b/java21/legal/jdk.incubator.vector/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.incubator.vector/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.incubator.vector/LICENSE b/java21/legal/jdk.incubator.vector/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.incubator.vector/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.ed/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.ed/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.ed/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.ed/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.ed/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.ed/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.ed/LICENSE b/java21/legal/jdk.internal.ed/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.ed/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.jvmstat/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.jvmstat/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.jvmstat/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.jvmstat/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.jvmstat/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.jvmstat/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.jvmstat/LICENSE b/java21/legal/jdk.internal.jvmstat/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.jvmstat/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.le/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.le/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.le/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.le/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.le/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.le/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.le/LICENSE b/java21/legal/jdk.internal.le/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.le/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.le/jline.md b/java21/legal/jdk.internal.le/jline.md new file mode 100644 index 0000000000000000000000000000000000000000..5b813c0af2fafc172462cebd492a8e77c32f6bd6 --- /dev/null +++ b/java21/legal/jdk.internal.le/jline.md @@ -0,0 +1,41 @@ +## JLine v3.26.1 + +### JLine License +
+
+Copyright (c) 2002-2023, the original author or authors.
+All rights reserved.
+
+https://opensource.org/licenses/BSD-3-Clause
+
+Redistribution and use in source and binary forms, with or
+without modification, are permitted provided that the following
+conditions are met:
+
+Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer
+in the documentation and/or other materials provided with
+the distribution.
+
+Neither the name of JLine nor the names of its contributors
+may be used to endorse or promote products derived from this
+software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
+BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
diff --git a/java21/legal/jdk.internal.opt/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.opt/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.opt/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.opt/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.opt/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.opt/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.opt/LICENSE b/java21/legal/jdk.internal.opt/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.opt/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.opt/jopt-simple.md b/java21/legal/jdk.internal.opt/jopt-simple.md new file mode 100644 index 0000000000000000000000000000000000000000..c08b3b4b94c59d8dc4fb8a31e574f08e62419d04 --- /dev/null +++ b/java21/legal/jdk.internal.opt/jopt-simple.md @@ -0,0 +1,27 @@ +## jopt-simple v5.0.4 + +### MIT License +
+
+Copyright (c) 2004-2015 Paul R. Holser, Jr.
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+OTHER DEALINGS IN THE SOFTWARE.
+
+
diff --git a/java21/legal/jdk.internal.vm.ci/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.vm.ci/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.vm.ci/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.vm.ci/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.vm.ci/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.vm.ci/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.vm.ci/LICENSE b/java21/legal/jdk.internal.vm.ci/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.vm.ci/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.vm.compiler.management/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.vm.compiler.management/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.vm.compiler.management/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.vm.compiler.management/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.vm.compiler.management/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.vm.compiler.management/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.vm.compiler.management/LICENSE b/java21/legal/jdk.internal.vm.compiler.management/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.vm.compiler.management/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.internal.vm.compiler/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.internal.vm.compiler/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.internal.vm.compiler/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.internal.vm.compiler/ASSEMBLY_EXCEPTION b/java21/legal/jdk.internal.vm.compiler/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.internal.vm.compiler/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.internal.vm.compiler/LICENSE b/java21/legal/jdk.internal.vm.compiler/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.internal.vm.compiler/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jartool/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jartool/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jartool/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jartool/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jartool/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jartool/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jartool/LICENSE b/java21/legal/jdk.jartool/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jartool/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.javadoc/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.javadoc/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.javadoc/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.javadoc/ASSEMBLY_EXCEPTION b/java21/legal/jdk.javadoc/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.javadoc/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.javadoc/LICENSE b/java21/legal/jdk.javadoc/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.javadoc/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.javadoc/jquery.md b/java21/legal/jdk.javadoc/jquery.md new file mode 100644 index 0000000000000000000000000000000000000000..a763ec6f187407cc62d9e72441be5a2de664c577 --- /dev/null +++ b/java21/legal/jdk.javadoc/jquery.md @@ -0,0 +1,26 @@ +## jQuery v3.7.1 + +### jQuery License +``` +jQuery v 3.7.1 +Copyright OpenJS Foundation and other contributors, https://openjsf.org/ + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +``` diff --git a/java21/legal/jdk.javadoc/jqueryUI.md b/java21/legal/jdk.javadoc/jqueryUI.md new file mode 100644 index 0000000000000000000000000000000000000000..46bfbaa5c548a2e66714781a7b179557b3ea2acf --- /dev/null +++ b/java21/legal/jdk.javadoc/jqueryUI.md @@ -0,0 +1,49 @@ +## jQuery UI v1.14.1 + +### jQuery UI License +``` +Copyright OpenJS Foundation and other contributors, https://openjsf.org/ + +This software consists of voluntary contributions made by many +individuals. For exact contribution history, see the revision history +available at https://github.com/jquery/jquery-ui + +The following license applies to all parts of this software except as +documented below: + +==== + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +==== + +Copyright and related rights for sample code are waived via CC0. Sample +code is defined as all source code contained within the demos directory. + +CC0: http://creativecommons.org/publicdomain/zero/1.0/ + +==== + +All files located in the node_modules and external directories are +externally maintained libraries used by this software which have their +own licenses; we recommend you read them, as their terms may differ from +the terms above. + +``` diff --git a/java21/legal/jdk.jcmd/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jcmd/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jcmd/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jcmd/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jcmd/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jcmd/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jcmd/LICENSE b/java21/legal/jdk.jcmd/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jcmd/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jconsole/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jconsole/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jconsole/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jconsole/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jconsole/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jconsole/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jconsole/LICENSE b/java21/legal/jdk.jconsole/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jconsole/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jdeps/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jdeps/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jdeps/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jdeps/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jdeps/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jdeps/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jdeps/LICENSE b/java21/legal/jdk.jdeps/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jdeps/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jdi/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jdi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jdi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jdi/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jdi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jdi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jdi/LICENSE b/java21/legal/jdk.jdi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jdi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jdwp.agent/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jdwp.agent/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jdwp.agent/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jdwp.agent/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jdwp.agent/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jdwp.agent/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jdwp.agent/LICENSE b/java21/legal/jdk.jdwp.agent/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jdwp.agent/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jfr/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jfr/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jfr/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jfr/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jfr/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jfr/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jfr/LICENSE b/java21/legal/jdk.jfr/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jfr/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jlink/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jlink/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jlink/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jlink/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jlink/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jlink/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jlink/LICENSE b/java21/legal/jdk.jlink/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jlink/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jpackage/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jpackage/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jpackage/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jpackage/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jpackage/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jpackage/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jpackage/LICENSE b/java21/legal/jdk.jpackage/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jpackage/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jshell/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jshell/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jshell/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jshell/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jshell/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jshell/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jshell/LICENSE b/java21/legal/jdk.jshell/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jshell/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jsobject/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jsobject/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jsobject/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jsobject/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jsobject/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jsobject/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jsobject/LICENSE b/java21/legal/jdk.jsobject/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jsobject/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.jstatd/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.jstatd/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.jstatd/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.jstatd/ASSEMBLY_EXCEPTION b/java21/legal/jdk.jstatd/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.jstatd/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.jstatd/LICENSE b/java21/legal/jdk.jstatd/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.jstatd/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.localedata/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.localedata/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.localedata/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.localedata/ASSEMBLY_EXCEPTION b/java21/legal/jdk.localedata/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.localedata/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.localedata/LICENSE b/java21/legal/jdk.localedata/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.localedata/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.localedata/cldr.md b/java21/legal/jdk.localedata/cldr.md new file mode 100644 index 0000000000000000000000000000000000000000..9f8dd76cd1a19312c5d582f4b462de2c6cadccb0 --- /dev/null +++ b/java21/legal/jdk.localedata/cldr.md @@ -0,0 +1 @@ +Please see ..\java.base\cldr.md diff --git a/java21/legal/jdk.localedata/thaidict.md b/java21/legal/jdk.localedata/thaidict.md new file mode 100644 index 0000000000000000000000000000000000000000..f8b1133ca51d22ad995e6dd34c674f84f804461a --- /dev/null +++ b/java21/legal/jdk.localedata/thaidict.md @@ -0,0 +1,31 @@ +## Thai Dictionary + +### Thai Dictionary License +
+
+Copyright (C) 1982 The Royal Institute, Thai Royal Government.
+
+Copyright (C) 1998 National Electronics and Computer Technology Center,
+National Science and Technology Development Agency,
+Ministry of Science Technology and Environment,
+Thai Royal Government.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+
+
diff --git a/java21/legal/jdk.management.agent/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.management.agent/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.management.agent/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.management.agent/ASSEMBLY_EXCEPTION b/java21/legal/jdk.management.agent/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.management.agent/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.management.agent/LICENSE b/java21/legal/jdk.management.agent/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.management.agent/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.management.jfr/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.management.jfr/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.management.jfr/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.management.jfr/ASSEMBLY_EXCEPTION b/java21/legal/jdk.management.jfr/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.management.jfr/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.management.jfr/LICENSE b/java21/legal/jdk.management.jfr/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.management.jfr/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.management/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.management/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.management/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.management/ASSEMBLY_EXCEPTION b/java21/legal/jdk.management/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.management/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.management/LICENSE b/java21/legal/jdk.management/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.management/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.naming.dns/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.naming.dns/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.naming.dns/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.naming.dns/ASSEMBLY_EXCEPTION b/java21/legal/jdk.naming.dns/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.naming.dns/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.naming.dns/LICENSE b/java21/legal/jdk.naming.dns/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.naming.dns/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.naming.rmi/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.naming.rmi/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.naming.rmi/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.naming.rmi/ASSEMBLY_EXCEPTION b/java21/legal/jdk.naming.rmi/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.naming.rmi/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.naming.rmi/LICENSE b/java21/legal/jdk.naming.rmi/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.naming.rmi/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.net/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.net/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.net/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.net/ASSEMBLY_EXCEPTION b/java21/legal/jdk.net/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.net/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.net/LICENSE b/java21/legal/jdk.net/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.net/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.nio.mapmode/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.nio.mapmode/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.nio.mapmode/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.nio.mapmode/ASSEMBLY_EXCEPTION b/java21/legal/jdk.nio.mapmode/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.nio.mapmode/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.nio.mapmode/LICENSE b/java21/legal/jdk.nio.mapmode/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.nio.mapmode/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.random/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.random/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.random/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.random/ASSEMBLY_EXCEPTION b/java21/legal/jdk.random/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.random/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.random/LICENSE b/java21/legal/jdk.random/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.random/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.sctp/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.sctp/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.sctp/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.sctp/ASSEMBLY_EXCEPTION b/java21/legal/jdk.sctp/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.sctp/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.sctp/LICENSE b/java21/legal/jdk.sctp/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.sctp/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.security.auth/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.security.auth/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.security.auth/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.security.auth/ASSEMBLY_EXCEPTION b/java21/legal/jdk.security.auth/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.security.auth/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.security.auth/LICENSE b/java21/legal/jdk.security.auth/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.security.auth/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.security.jgss/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.security.jgss/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.security.jgss/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.security.jgss/ASSEMBLY_EXCEPTION b/java21/legal/jdk.security.jgss/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.security.jgss/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.security.jgss/LICENSE b/java21/legal/jdk.security.jgss/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.security.jgss/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.unsupported.desktop/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.unsupported.desktop/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.unsupported.desktop/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.unsupported.desktop/ASSEMBLY_EXCEPTION b/java21/legal/jdk.unsupported.desktop/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.unsupported.desktop/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.unsupported.desktop/LICENSE b/java21/legal/jdk.unsupported.desktop/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.unsupported.desktop/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.unsupported/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.unsupported/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.unsupported/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.unsupported/ASSEMBLY_EXCEPTION b/java21/legal/jdk.unsupported/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.unsupported/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.unsupported/LICENSE b/java21/legal/jdk.unsupported/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.unsupported/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.xml.dom/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.xml.dom/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.xml.dom/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.xml.dom/ASSEMBLY_EXCEPTION b/java21/legal/jdk.xml.dom/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.xml.dom/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.xml.dom/LICENSE b/java21/legal/jdk.xml.dom/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.xml.dom/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/legal/jdk.zipfs/ADDITIONAL_LICENSE_INFO b/java21/legal/jdk.zipfs/ADDITIONAL_LICENSE_INFO new file mode 100644 index 0000000000000000000000000000000000000000..3f7e921e056c3a077d3918e124080339632900dd --- /dev/null +++ b/java21/legal/jdk.zipfs/ADDITIONAL_LICENSE_INFO @@ -0,0 +1 @@ +Please see ..\java.base\ADDITIONAL_LICENSE_INFO diff --git a/java21/legal/jdk.zipfs/ASSEMBLY_EXCEPTION b/java21/legal/jdk.zipfs/ASSEMBLY_EXCEPTION new file mode 100644 index 0000000000000000000000000000000000000000..e09f918433611bb1332916d4447ed98414cfc254 --- /dev/null +++ b/java21/legal/jdk.zipfs/ASSEMBLY_EXCEPTION @@ -0,0 +1 @@ +Please see ..\java.base\ASSEMBLY_EXCEPTION diff --git a/java21/legal/jdk.zipfs/LICENSE b/java21/legal/jdk.zipfs/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..940481e93ab03af65c55b6d0bc4b115b96d5f74a --- /dev/null +++ b/java21/legal/jdk.zipfs/LICENSE @@ -0,0 +1 @@ +Please see ..\java.base\LICENSE diff --git a/java21/lib/classlist b/java21/lib/classlist new file mode 100644 index 0000000000000000000000000000000000000000..69b128e2ee960544c00fc612642443d0826cac11 --- /dev/null +++ b/java21/lib/classlist @@ -0,0 +1,1503 @@ +# NOTE: Do not modify this file. +# +# This file is generated via the -XX:DumpLoadedClassList= option +# and is used at CDS archive dump time (see -Xshare:dump). +# +java/io/BufferedInputStream +java/io/BufferedOutputStream +java/io/BufferedWriter +java/io/ByteArrayInputStream +java/io/ByteArrayOutputStream +java/io/Closeable +java/io/DataInput +java/io/DataInputStream +java/io/DataOutput +java/io/DefaultFileSystem +java/io/File +java/io/File$PathStatus +java/io/FileCleanable +java/io/FileDescriptor +java/io/FileDescriptor$1 +java/io/FileInputStream +java/io/FileInputStream$1 +java/io/FileOutputStream +java/io/FilePermission +java/io/FileSystem +java/io/FilterInputStream +java/io/FilterOutputStream +java/io/Flushable +java/io/InputStream +java/io/ObjectStreamField +java/io/OutputStream +java/io/OutputStreamWriter +java/io/PrintStream +java/io/PrintStream$1 +java/io/RandomAccessFile +java/io/RandomAccessFile$1 +java/io/RandomAccessFile$2 +java/io/Serializable +java/io/WinNTFileSystem +java/io/Writer +java/lang/AbstractStringBuilder +java/lang/Appendable +java/lang/ApplicationShutdownHooks +java/lang/ApplicationShutdownHooks$1 +java/lang/ArithmeticException +java/lang/ArrayStoreException +java/lang/AssertionStatusDirectives +java/lang/AutoCloseable +java/lang/BaseVirtualThread +java/lang/Boolean +java/lang/BootstrapMethodError +java/lang/Byte +java/lang/CharSequence +java/lang/Character +java/lang/Character$CharacterCache +java/lang/CharacterData +java/lang/CharacterData00 +java/lang/CharacterDataLatin1 +java/lang/Class +java/lang/Class$1 +java/lang/Class$3 +java/lang/Class$Atomic +java/lang/Class$ReflectionData +java/lang/ClassCastException +java/lang/ClassLoader +java/lang/ClassLoader$ParallelLoaders +java/lang/ClassNotFoundException +java/lang/Cloneable +java/lang/Comparable +java/lang/CompoundEnumeration +java/lang/Double +java/lang/Enum +java/lang/Error +java/lang/Exception +java/lang/Float +java/lang/IllegalArgumentException +java/lang/IllegalMonitorStateException +java/lang/IncompatibleClassChangeError +java/lang/Integer +java/lang/Integer$IntegerCache +java/lang/InternalError +java/lang/Iterable +java/lang/LinkageError +java/lang/LiveStackFrame +java/lang/LiveStackFrameInfo +java/lang/Long +java/lang/Long$LongCache +java/lang/Math +java/lang/Module +java/lang/Module$ArchivedData +java/lang/Module$EnableNativeAccess +java/lang/Module$ReflectionData +java/lang/ModuleLayer +java/lang/ModuleLayer$Controller +java/lang/NamedPackage +java/lang/NoClassDefFoundError +java/lang/NoSuchFieldException +java/lang/NoSuchMethodError +java/lang/NoSuchMethodException +java/lang/NullPointerException +java/lang/Number +java/lang/Object +java/lang/OutOfMemoryError +java/lang/Package +java/lang/Package$VersionInfo +java/lang/PublicMethods$Key +java/lang/PublicMethods$MethodList +java/lang/Readable +java/lang/Record +java/lang/ReflectiveOperationException +java/lang/Runnable +java/lang/Runtime +java/lang/Runtime$Version +java/lang/RuntimeException +java/lang/RuntimePermission +java/lang/SecurityManager +java/lang/Short +java/lang/Shutdown +java/lang/Shutdown$Lock +java/lang/StackFrameInfo +java/lang/StackOverflowError +java/lang/StackStreamFactory$AbstractStackWalker +java/lang/StackTraceElement +java/lang/StackWalker +java/lang/StackWalker$StackFrame +java/lang/StrictMath +java/lang/String +java/lang/String$CaseInsensitiveComparator +java/lang/StringBuffer +java/lang/StringBuilder +java/lang/StringCoding +java/lang/StringConcatHelper +java/lang/StringLatin1 +java/lang/StringUTF16 +java/lang/System +java/lang/System$2 +java/lang/System$Logger +java/lang/System$LoggerFinder +java/lang/Terminator +java/lang/Terminator$1 +java/lang/Thread +java/lang/Thread$Constants +java/lang/Thread$FieldHolder +java/lang/Thread$State +java/lang/Thread$ThreadIdentifiers +java/lang/Thread$UncaughtExceptionHandler +java/lang/ThreadBuilders$BoundVirtualThread +java/lang/ThreadGroup +java/lang/ThreadLocal +java/lang/ThreadLocal$ThreadLocalMap +java/lang/ThreadLocal$ThreadLocalMap$Entry +java/lang/Throwable +java/lang/VersionProps +java/lang/VirtualMachineError +java/lang/VirtualThread +java/lang/Void +java/lang/WeakPairMap +java/lang/WeakPairMap$Pair +java/lang/WeakPairMap$Pair$Lookup +java/lang/annotation/Annotation +java/lang/constant/Constable +java/lang/constant/ConstantDesc +java/lang/invoke/AbstractValidatingLambdaMetafactory +java/lang/invoke/BootstrapMethodInvoker +java/lang/invoke/BoundMethodHandle +java/lang/invoke/BoundMethodHandle$Specializer +java/lang/invoke/BoundMethodHandle$Specializer$Factory +java/lang/invoke/BoundMethodHandle$SpeciesData +java/lang/invoke/BoundMethodHandle$Species_D +java/lang/invoke/BoundMethodHandle$Species_DL +java/lang/invoke/BoundMethodHandle$Species_I +java/lang/invoke/BoundMethodHandle$Species_IL +java/lang/invoke/BoundMethodHandle$Species_L +java/lang/invoke/BoundMethodHandle$Species_LJ +java/lang/invoke/BoundMethodHandle$Species_LL +java/lang/invoke/BoundMethodHandle$Species_LLJ +java/lang/invoke/BoundMethodHandle$Species_LLL +java/lang/invoke/BoundMethodHandle$Species_LLLJ +java/lang/invoke/BoundMethodHandle$Species_LLLL +java/lang/invoke/BoundMethodHandle$Species_LLLLL +java/lang/invoke/BoundMethodHandle$Species_LLLLLL +java/lang/invoke/BoundMethodHandle$Species_LLLLLLL +java/lang/invoke/BoundMethodHandle$Species_LLLLLLLL +java/lang/invoke/BoundMethodHandle$Species_LLLLLLLLL +java/lang/invoke/CallSite +java/lang/invoke/ClassSpecializer +java/lang/invoke/ClassSpecializer$1 +java/lang/invoke/ClassSpecializer$Factory +java/lang/invoke/ClassSpecializer$SpeciesData +java/lang/invoke/ConstantCallSite +java/lang/invoke/DelegatingMethodHandle +java/lang/invoke/DelegatingMethodHandle$Holder +java/lang/invoke/DirectMethodHandle +java/lang/invoke/DirectMethodHandle$2 +java/lang/invoke/DirectMethodHandle$Accessor +java/lang/invoke/DirectMethodHandle$Constructor +java/lang/invoke/DirectMethodHandle$Holder +java/lang/invoke/DirectMethodHandle$Interface +java/lang/invoke/InfoFromMemberName +java/lang/invoke/InnerClassLambdaMetafactory +java/lang/invoke/InnerClassLambdaMetafactory$ForwardingMethodGenerator +java/lang/invoke/InvokerBytecodeGenerator +java/lang/invoke/InvokerBytecodeGenerator$1 +java/lang/invoke/InvokerBytecodeGenerator$ClassData +java/lang/invoke/Invokers +java/lang/invoke/Invokers$Holder +java/lang/invoke/LambdaForm +java/lang/invoke/LambdaForm$BasicType +java/lang/invoke/LambdaForm$Holder +java/lang/invoke/LambdaForm$Kind +java/lang/invoke/LambdaForm$Name +java/lang/invoke/LambdaForm$NamedFunction +java/lang/invoke/LambdaFormBuffer +java/lang/invoke/LambdaFormEditor +java/lang/invoke/LambdaFormEditor$1 +java/lang/invoke/LambdaFormEditor$Transform +java/lang/invoke/LambdaFormEditor$TransformKey +java/lang/invoke/LambdaMetafactory +java/lang/invoke/LambdaProxyClassArchive +java/lang/invoke/MemberName +java/lang/invoke/MemberName$Factory +java/lang/invoke/MethodHandle +java/lang/invoke/MethodHandleImpl +java/lang/invoke/MethodHandleImpl$1 +java/lang/invoke/MethodHandleImpl$AsVarargsCollector +java/lang/invoke/MethodHandleImpl$Intrinsic +java/lang/invoke/MethodHandleImpl$IntrinsicMethodHandle +java/lang/invoke/MethodHandleInfo +java/lang/invoke/MethodHandleNatives +java/lang/invoke/MethodHandleStatics +java/lang/invoke/MethodHandles +java/lang/invoke/MethodHandles$1 +java/lang/invoke/MethodHandles$Lookup +java/lang/invoke/MethodHandles$Lookup$ClassDefiner +java/lang/invoke/MethodHandles$Lookup$ClassFile +java/lang/invoke/MethodHandles$Lookup$ClassOption +java/lang/invoke/MethodType +java/lang/invoke/MethodType$1 +java/lang/invoke/MethodTypeForm +java/lang/invoke/MutableCallSite +java/lang/invoke/ResolvedMethodName +java/lang/invoke/SimpleMethodHandle +java/lang/invoke/StringConcatFactory +java/lang/invoke/TypeConvertingMethodAdapter +java/lang/invoke/TypeDescriptor +java/lang/invoke/TypeDescriptor$OfField +java/lang/invoke/TypeDescriptor$OfMethod +java/lang/invoke/VarForm +java/lang/invoke/VarHandle +java/lang/invoke/VarHandle$AccessDescriptor +java/lang/invoke/VarHandle$AccessMode +java/lang/invoke/VarHandle$AccessType +java/lang/invoke/VarHandleBooleans$FieldInstanceReadOnly +java/lang/invoke/VarHandleBooleans$FieldInstanceReadWrite +java/lang/invoke/VarHandleByteArrayAsChars$ArrayHandle +java/lang/invoke/VarHandleByteArrayAsChars$ByteArrayViewVarHandle +java/lang/invoke/VarHandleByteArrayAsDoubles$ArrayHandle +java/lang/invoke/VarHandleByteArrayAsDoubles$ByteArrayViewVarHandle +java/lang/invoke/VarHandleByteArrayAsFloats$ArrayHandle +java/lang/invoke/VarHandleByteArrayAsFloats$ByteArrayViewVarHandle +java/lang/invoke/VarHandleByteArrayAsInts$ArrayHandle +java/lang/invoke/VarHandleByteArrayAsInts$ByteArrayViewVarHandle +java/lang/invoke/VarHandleByteArrayAsLongs$ArrayHandle +java/lang/invoke/VarHandleByteArrayAsLongs$ByteArrayViewVarHandle +java/lang/invoke/VarHandleByteArrayAsShorts$ArrayHandle +java/lang/invoke/VarHandleByteArrayAsShorts$ByteArrayViewVarHandle +java/lang/invoke/VarHandleGuards +java/lang/invoke/VarHandleLongs$FieldInstanceReadOnly +java/lang/invoke/VarHandleLongs$FieldInstanceReadWrite +java/lang/invoke/VarHandleReferences$FieldInstanceReadOnly +java/lang/invoke/VarHandleReferences$FieldInstanceReadWrite +java/lang/invoke/VarHandles +java/lang/invoke/VolatileCallSite +java/lang/module/Configuration +java/lang/module/ModuleDescriptor +java/lang/module/ModuleDescriptor$1 +java/lang/module/ModuleDescriptor$Builder +java/lang/module/ModuleDescriptor$Exports +java/lang/module/ModuleDescriptor$Modifier +java/lang/module/ModuleDescriptor$Opens +java/lang/module/ModuleDescriptor$Provides +java/lang/module/ModuleDescriptor$Requires +java/lang/module/ModuleDescriptor$Requires$Modifier +java/lang/module/ModuleDescriptor$Version +java/lang/module/ModuleFinder +java/lang/module/ModuleFinder$1 +java/lang/module/ModuleFinder$2 +java/lang/module/ModuleReader +java/lang/module/ModuleReference +java/lang/module/ResolvedModule +java/lang/module/Resolver +java/lang/ref/Cleaner +java/lang/ref/Cleaner$1 +java/lang/ref/Cleaner$Cleanable +java/lang/ref/FinalReference +java/lang/ref/Finalizer +java/lang/ref/Finalizer$FinalizerThread +java/lang/ref/NativeReferenceQueue +java/lang/ref/NativeReferenceQueue$Lock +java/lang/ref/PhantomReference +java/lang/ref/Reference +java/lang/ref/Reference$1 +java/lang/ref/Reference$ReferenceHandler +java/lang/ref/ReferenceQueue +java/lang/ref/ReferenceQueue$Null +java/lang/ref/SoftReference +java/lang/ref/WeakReference +java/lang/reflect/AccessFlag +java/lang/reflect/AccessFlag$1 +java/lang/reflect/AccessFlag$10 +java/lang/reflect/AccessFlag$11 +java/lang/reflect/AccessFlag$12 +java/lang/reflect/AccessFlag$13 +java/lang/reflect/AccessFlag$14 +java/lang/reflect/AccessFlag$15 +java/lang/reflect/AccessFlag$16 +java/lang/reflect/AccessFlag$17 +java/lang/reflect/AccessFlag$18 +java/lang/reflect/AccessFlag$2 +java/lang/reflect/AccessFlag$3 +java/lang/reflect/AccessFlag$4 +java/lang/reflect/AccessFlag$5 +java/lang/reflect/AccessFlag$6 +java/lang/reflect/AccessFlag$7 +java/lang/reflect/AccessFlag$8 +java/lang/reflect/AccessFlag$9 +java/lang/reflect/AccessFlag$Location +java/lang/reflect/AccessibleObject +java/lang/reflect/AnnotatedElement +java/lang/reflect/Array +java/lang/reflect/ClassFileFormatVersion +java/lang/reflect/Constructor +java/lang/reflect/Executable +java/lang/reflect/Field +java/lang/reflect/GenericDeclaration +java/lang/reflect/Member +java/lang/reflect/Method +java/lang/reflect/Modifier +java/lang/reflect/Parameter +java/lang/reflect/RecordComponent +java/lang/reflect/ReflectAccess +java/lang/reflect/Type +java/math/BigInteger +java/math/RoundingMode +java/net/DefaultInterface +java/net/Inet4Address +java/net/Inet4AddressImpl +java/net/Inet6Address +java/net/Inet6Address$Inet6AddressHolder +java/net/Inet6AddressImpl +java/net/InetAddress +java/net/InetAddress$1 +java/net/InetAddress$InetAddressHolder +java/net/InetAddress$PlatformResolver +java/net/InetAddressImpl +java/net/InterfaceAddress +java/net/NetworkInterface +java/net/URI +java/net/URI$1 +java/net/URI$Parser +java/net/URL +java/net/URL$3 +java/net/URL$DefaultFactory +java/net/URLStreamHandler +java/net/URLStreamHandlerFactory +java/net/spi/InetAddressResolver +java/net/spi/InetAddressResolver$LookupPolicy +java/nio/Bits +java/nio/Bits$1 +java/nio/Buffer +java/nio/Buffer$1 +java/nio/Buffer$2 +java/nio/ByteBuffer +java/nio/ByteOrder +java/nio/CharBuffer +java/nio/DirectByteBuffer +java/nio/DirectByteBufferR +java/nio/DirectIntBufferRU +java/nio/DirectIntBufferU +java/nio/DirectLongBufferU +java/nio/HeapByteBuffer +java/nio/HeapCharBuffer +java/nio/IntBuffer +java/nio/LongBuffer +java/nio/MappedByteBuffer +java/nio/charset/Charset +java/nio/charset/CharsetDecoder +java/nio/charset/CharsetEncoder +java/nio/charset/CoderResult +java/nio/charset/CodingErrorAction +java/nio/charset/StandardCharsets +java/nio/charset/spi/CharsetProvider +java/nio/file/CopyOption +java/nio/file/FileSystem +java/nio/file/FileSystems +java/nio/file/FileSystems$DefaultFileSystemHolder +java/nio/file/FileSystems$DefaultFileSystemHolder$1 +java/nio/file/Files +java/nio/file/LinkOption +java/nio/file/OpenOption +java/nio/file/Path +java/nio/file/Paths +java/nio/file/StandardOpenOption +java/nio/file/Watchable +java/nio/file/attribute/AttributeView +java/nio/file/attribute/BasicFileAttributeView +java/nio/file/attribute/BasicFileAttributes +java/nio/file/attribute/DosFileAttributes +java/nio/file/attribute/FileAttributeView +java/nio/file/attribute/FileTime +java/nio/file/spi/FileSystemProvider +java/security/AccessControlContext +java/security/AccessController +java/security/AllPermission +java/security/BasicPermission +java/security/BasicPermissionCollection +java/security/CodeSource +java/security/Guard +java/security/Permission +java/security/PermissionCollection +java/security/Permissions +java/security/Principal +java/security/PrivilegedAction +java/security/PrivilegedExceptionAction +java/security/ProtectionDomain +java/security/ProtectionDomain$JavaSecurityAccessImpl +java/security/ProtectionDomain$Key +java/security/SecureClassLoader +java/security/SecureClassLoader$1 +java/security/SecureClassLoader$CodeSourceKey +java/security/SecureClassLoader$DebugHolder +java/security/Security +java/security/Security$1 +java/security/UnresolvedPermission +java/security/cert/Certificate +java/text/AttributedCharacterIterator$Attribute +java/text/DateFormat +java/text/DateFormat$Field +java/text/DateFormatSymbols +java/text/DecimalFormat +java/text/DecimalFormatSymbols +java/text/DigitList +java/text/DontCareFieldPosition +java/text/DontCareFieldPosition$1 +java/text/FieldPosition +java/text/Format +java/text/Format$Field +java/text/Format$FieldDelegate +java/text/NumberFormat +java/text/NumberFormat$Field +java/text/SimpleDateFormat +java/text/spi/BreakIteratorProvider +java/text/spi/CollatorProvider +java/text/spi/DateFormatProvider +java/text/spi/DateFormatSymbolsProvider +java/text/spi/DecimalFormatSymbolsProvider +java/text/spi/NumberFormatProvider +java/time/Clock +java/time/Clock$SystemClock +java/time/Duration +java/time/Instant +java/time/InstantSource +java/time/LocalDate +java/time/LocalDate$1 +java/time/LocalDateTime +java/time/LocalTime +java/time/LocalTime$1 +java/time/Period +java/time/ZoneId +java/time/ZoneOffset +java/time/ZoneRegion +java/time/chrono/AbstractChronology +java/time/chrono/ChronoLocalDate +java/time/chrono/ChronoLocalDateTime +java/time/chrono/ChronoPeriod +java/time/chrono/Chronology +java/time/chrono/IsoChronology +java/time/format/DateTimeFormatter +java/time/format/DateTimeFormatterBuilder +java/time/format/DateTimeFormatterBuilder$1 +java/time/format/DateTimeFormatterBuilder$2 +java/time/format/DateTimeFormatterBuilder$CharLiteralPrinterParser +java/time/format/DateTimeFormatterBuilder$CompositePrinterParser +java/time/format/DateTimeFormatterBuilder$DateTimePrinterParser +java/time/format/DateTimeFormatterBuilder$InstantPrinterParser +java/time/format/DateTimeFormatterBuilder$NanosPrinterParser +java/time/format/DateTimeFormatterBuilder$NumberPrinterParser +java/time/format/DateTimeFormatterBuilder$OffsetIdPrinterParser +java/time/format/DateTimeFormatterBuilder$SettingsParser +java/time/format/DateTimeFormatterBuilder$StringLiteralPrinterParser +java/time/format/DateTimeFormatterBuilder$TextPrinterParser +java/time/format/DateTimeFormatterBuilder$ZoneIdPrinterParser +java/time/format/DateTimePrintContext +java/time/format/DateTimeTextProvider +java/time/format/DateTimeTextProvider$1 +java/time/format/DateTimeTextProvider$LocaleStore +java/time/format/DecimalStyle +java/time/format/ResolverStyle +java/time/format/SignStyle +java/time/format/TextStyle +java/time/temporal/ChronoField +java/time/temporal/ChronoUnit +java/time/temporal/IsoFields +java/time/temporal/IsoFields$Field +java/time/temporal/IsoFields$Field$1 +java/time/temporal/IsoFields$Field$2 +java/time/temporal/IsoFields$Field$3 +java/time/temporal/IsoFields$Field$4 +java/time/temporal/IsoFields$Unit +java/time/temporal/JulianFields +java/time/temporal/JulianFields$Field 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+jdk/internal/reflect/NativeConstructorAccessorImpl +jdk/internal/reflect/Reflection +jdk/internal/reflect/ReflectionFactory +jdk/internal/reflect/ReflectionFactory$Config +jdk/internal/reflect/ReflectionFactory$GetReflectionFactoryAction +jdk/internal/reflect/UnsafeFieldAccessorImpl +jdk/internal/reflect/UnsafeStaticFieldAccessorImpl +jdk/internal/util/ArraysSupport +jdk/internal/util/ByteArray +jdk/internal/util/ClassFileDumper +jdk/internal/util/Preconditions +jdk/internal/util/Preconditions$1 +jdk/internal/util/Preconditions$2 +jdk/internal/util/Preconditions$3 +jdk/internal/util/Preconditions$4 +jdk/internal/util/ReferenceKey +jdk/internal/util/ReferencedKeyMap +jdk/internal/util/ReferencedKeySet +jdk/internal/util/StaticProperty +jdk/internal/util/StrongReferenceKey +jdk/internal/util/SystemProps +jdk/internal/util/SystemProps$Raw +jdk/internal/util/WeakReferenceKey +jdk/internal/util/random/RandomSupport +jdk/internal/vm/Continuation +jdk/internal/vm/ContinuationScope +jdk/internal/vm/FillerObject +jdk/internal/vm/SharedThreadContainer +jdk/internal/vm/StackChunk +jdk/internal/vm/StackableScope +jdk/internal/vm/ThreadContainer +jdk/internal/vm/ThreadContainers +jdk/internal/vm/ThreadContainers$RootContainer +jdk/internal/vm/ThreadContainers$RootContainer$TrackingRootContainer +jdk/internal/vm/vector/VectorSupport +jdk/internal/vm/vector/VectorSupport$Vector +jdk/internal/vm/vector/VectorSupport$VectorMask +jdk/internal/vm/vector/VectorSupport$VectorPayload +jdk/internal/vm/vector/VectorSupport$VectorShuffle +sun/invoke/empty/Empty +sun/invoke/util/BytecodeDescriptor +sun/invoke/util/ValueConversions +sun/invoke/util/ValueConversions$WrapperCache +sun/invoke/util/VerifyAccess +sun/invoke/util/VerifyType +sun/invoke/util/Wrapper +sun/invoke/util/Wrapper$Format +sun/io/Win32ErrorMode +sun/launcher/LauncherHelper +sun/net/util/IPAddressUtil +sun/net/util/IPAddressUtil$MASKS +sun/net/util/URLUtil +sun/net/www/ParseUtil +sun/net/www/protocol/file/Handler +sun/net/www/protocol/jar/Handler +sun/nio/ByteBuffered +sun/nio/ch/DirectBuffer +sun/nio/cs/ArrayDecoder +sun/nio/cs/ArrayEncoder +sun/nio/cs/HistoricallyNamedCharset +sun/nio/cs/ISO_8859_1 +sun/nio/cs/MS1252 +sun/nio/cs/MS1252$Holder +sun/nio/cs/SingleByte +sun/nio/cs/SingleByte$Decoder +sun/nio/cs/SingleByte$Encoder +sun/nio/cs/StandardCharsets +sun/nio/cs/StandardCharsets$Aliases +sun/nio/cs/StandardCharsets$Cache +sun/nio/cs/StandardCharsets$Classes +sun/nio/cs/StreamEncoder +sun/nio/cs/US_ASCII +sun/nio/cs/UTF_16 +sun/nio/cs/UTF_16BE +sun/nio/cs/UTF_16LE +sun/nio/cs/UTF_8 +sun/nio/cs/Unicode +sun/nio/fs/AbstractBasicFileAttributeView +sun/nio/fs/AbstractFileSystemProvider +sun/nio/fs/DefaultFileSystemProvider +sun/nio/fs/DynamicFileAttributeView +sun/nio/fs/NativeBuffer +sun/nio/fs/NativeBuffer$Deallocator +sun/nio/fs/NativeBuffers +sun/nio/fs/NativeBuffers$1 +sun/nio/fs/Util +sun/nio/fs/WindowsFileAttributeViews +sun/nio/fs/WindowsFileAttributeViews$Basic +sun/nio/fs/WindowsFileAttributes +sun/nio/fs/WindowsFileSystem +sun/nio/fs/WindowsFileSystemProvider +sun/nio/fs/WindowsNativeDispatcher +sun/nio/fs/WindowsNativeDispatcher$Account +sun/nio/fs/WindowsNativeDispatcher$AclInformation +sun/nio/fs/WindowsNativeDispatcher$CompletionStatus +sun/nio/fs/WindowsNativeDispatcher$DiskFreeSpace +sun/nio/fs/WindowsNativeDispatcher$FirstFile +sun/nio/fs/WindowsNativeDispatcher$FirstStream +sun/nio/fs/WindowsNativeDispatcher$VolumeInformation +sun/nio/fs/WindowsPath +sun/nio/fs/WindowsPathParser +sun/nio/fs/WindowsPathParser$Result +sun/nio/fs/WindowsPathType +sun/nio/fs/WindowsUriSupport +sun/reflect/annotation/AnnotationParser +sun/security/action/GetBooleanAction +sun/security/action/GetIntegerAction +sun/security/action/GetPropertyAction +sun/security/util/Debug +sun/security/util/FilePermCompat +sun/security/util/LazyCodeSourcePermissionCollection +sun/security/util/SecurityProperties +sun/security/util/SignatureFileVerifier +sun/text/resources/cldr/FormatData +sun/util/PreHashedMap +sun/util/calendar/AbstractCalendar +sun/util/calendar/BaseCalendar +sun/util/calendar/BaseCalendar$Date +sun/util/calendar/CalendarDate +sun/util/calendar/CalendarSystem +sun/util/calendar/CalendarSystem$GregorianHolder +sun/util/calendar/CalendarUtils +sun/util/calendar/Gregorian +sun/util/calendar/Gregorian$Date +sun/util/calendar/ZoneInfo +sun/util/calendar/ZoneInfoFile +sun/util/calendar/ZoneInfoFile$1 +sun/util/calendar/ZoneInfoFile$ZoneOffsetTransitionRule +sun/util/cldr/CLDRBaseLocaleDataMetaInfo +sun/util/cldr/CLDRCalendarDataProviderImpl +sun/util/cldr/CLDRLocaleProviderAdapter +sun/util/locale/BaseLocale +sun/util/locale/BaseLocale$Cache +sun/util/locale/BaseLocale$Key +sun/util/locale/InternalLocaleBuilder +sun/util/locale/InternalLocaleBuilder$CaseInsensitiveChar +sun/util/locale/LanguageTag +sun/util/locale/LocaleObjectCache +sun/util/locale/LocaleObjectCache$CacheEntry +sun/util/locale/LocaleUtils +sun/util/locale/ParseStatus +sun/util/locale/StringTokenIterator +sun/util/locale/provider/AvailableLanguageTags +sun/util/locale/provider/CalendarDataProviderImpl +sun/util/locale/provider/CalendarDataUtility +sun/util/locale/provider/CalendarDataUtility$CalendarWeekParameterGetter +sun/util/locale/provider/CalendarProviderImpl +sun/util/locale/provider/DateFormatProviderImpl +sun/util/locale/provider/DateFormatSymbolsProviderImpl +sun/util/locale/provider/DecimalFormatSymbolsProviderImpl +sun/util/locale/provider/JRELocaleProviderAdapter +sun/util/locale/provider/LocaleDataMetaInfo +sun/util/locale/provider/LocaleProviderAdapter +sun/util/locale/provider/LocaleProviderAdapter$Type +sun/util/locale/provider/LocaleResources +sun/util/locale/provider/LocaleResources$ResourceReference +sun/util/locale/provider/LocaleServiceProviderPool +sun/util/locale/provider/LocaleServiceProviderPool$LocalizedObjectGetter +sun/util/locale/provider/NumberFormatProviderImpl +sun/util/locale/provider/ResourceBundleBasedAdapter +sun/util/logging/PlatformLogger$Bridge +sun/util/logging/PlatformLogger$ConfigurableBridge +sun/util/logging/internal/LoggingProviderImpl +sun/util/logging/internal/LoggingProviderImpl$LogManagerAccess +sun/util/resources/Bundles +sun/util/resources/Bundles$1 +sun/util/resources/Bundles$BundleReference +sun/util/resources/Bundles$CacheKey +sun/util/resources/Bundles$CacheKeyReference +sun/util/resources/Bundles$Strategy +sun/util/resources/LocaleData +sun/util/resources/LocaleData$1 +sun/util/resources/LocaleData$LocaleDataStrategy +sun/util/resources/cldr/CalendarData +sun/util/spi/CalendarProvider +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder delegate L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L3_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJL3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LLJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DelegatingMethodHandle$Holder reinvoke_L L_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getDouble LL_D +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getInt LL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getLong LL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder getReference LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeInterface L3_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L10_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L11_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L12_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3D_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3F_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3I_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3I_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L4_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L4_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L5_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L6_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial L9_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLDL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLD_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLFL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLF_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLII_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLII_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL4_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL5_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLII_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLLI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJLL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LLJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeSpecial LL_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L10_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L11_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L12_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3DL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3D_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3IL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3I_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3I_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L4J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L5J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L5_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L6J_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L9_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LD_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LF_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LI3_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LII_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LI_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJI_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJL3_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLIL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJLJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJL_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LLI_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LLJ_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LL_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStatic L_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStaticInit LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeStaticInit L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeVirtual L3_V +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder invokeVirtual LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LII_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LI_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.DirectMethodHandle$Holder newInvokeSpecial L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invokeExact_MT LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder invoke_MT LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod DLL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod DL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod FLL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod FL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod IIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod ILL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod IL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod JJL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod JL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L10_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L11_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L3_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L4_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L5_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L6_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L7_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L8_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L9_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LDL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LFL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LIL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.Invokers$Holder linkToTargetMethod L_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_D LD_D +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_I LI_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_J LJ_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder identity_L LL_L +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_D L_D +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_I L_I +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_J L_J +@lambda-form-invoker [LF_RESOLVE] java.lang.invoke.LambdaForm$Holder zero_L L_L +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_D +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_DL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_I +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_IL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_L +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LJ +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLJ +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLJ +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.BoundMethodHandle$Species_LLLLLLLLL +@lambda-form-invoker [SPECIES_RESOLVE] java.lang.invoke.SimpleMethodHandle +@lambda-proxy java/lang/module/ModuleDescriptor$Builder accept ()Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeStatic jdk/internal/module/Checks requirePackageName (Ljava/lang/String;)Ljava/lang/String; (Ljava/lang/String;)V +@lambda-proxy java/lang/module/ModuleFinder$2 accept (Ljava/lang/module/ModuleFinder$2;Ljava/lang/String;)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeVirtual java/lang/module/ModuleFinder$2 lambda$find$1 (Ljava/lang/String;Ljava/lang/module/ModuleReference;)V (Ljava/lang/module/ModuleReference;)V +@lambda-proxy java/lang/module/ModuleFinder$2 accept (Ljava/lang/module/ModuleFinder$2;Ljava/util/Set;)Ljava/util/function/Consumer; (Ljava/lang/Object;)V REF_invokeVirtual java/lang/module/ModuleFinder$2 lambda$findAll$3 (Ljava/util/Set;Ljava/lang/module/ModuleReference;)V (Ljava/lang/module/ModuleReference;)V +@lambda-proxy java/lang/module/ModuleFinder$2 apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/lang/module/ModuleFinder$2 lambda$findAll$2 (Ljava/lang/module/ModuleFinder;)Ljava/util/stream/Stream; (Ljava/lang/module/ModuleFinder;)Ljava/util/stream/Stream; +@lambda-proxy java/lang/module/ModuleFinder$2 apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy java/lang/module/ModuleFinder$2 apply (Ljava/lang/String;)Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/lang/module/ModuleFinder$2 lambda$find$0 (Ljava/lang/String;Ljava/lang/module/ModuleFinder;)Ljava/util/Optional; (Ljava/lang/module/ModuleFinder;)Ljava/util/Optional; +@lambda-proxy java/security/Security run ()Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeStatic java/security/Security lambda$static$0 ()Ljava/lang/Object; ()Ljava/lang/Object; +@lambda-proxy java/time/format/DateTimeFormatter queryFrom ()Ljava/time/temporal/TemporalQuery; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Object; REF_invokeStatic java/time/format/DateTimeFormatter lambda$static$0 (Ljava/time/temporal/TemporalAccessor;)Ljava/time/Period; (Ljava/time/temporal/TemporalAccessor;)Ljava/time/Period; +@lambda-proxy java/time/format/DateTimeFormatter queryFrom ()Ljava/time/temporal/TemporalQuery; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Object; REF_invokeStatic java/time/format/DateTimeFormatter lambda$static$1 (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Boolean; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Boolean; +@lambda-proxy java/time/format/DateTimeFormatterBuilder queryFrom ()Ljava/time/temporal/TemporalQuery; (Ljava/time/temporal/TemporalAccessor;)Ljava/lang/Object; REF_invokeStatic java/time/format/DateTimeFormatterBuilder lambda$static$0 (Ljava/time/temporal/TemporalAccessor;)Ljava/time/ZoneId; (Ljava/time/temporal/TemporalAccessor;)Ljava/time/ZoneId; +@lambda-proxy java/util/ResourceBundle$ResourceBundleProviderHelper run (Ljava/lang/reflect/Constructor;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeStatic java/util/ResourceBundle$ResourceBundleProviderHelper lambda$newResourceBundle$0 (Ljava/lang/reflect/Constructor;)Ljava/lang/Void; ()Ljava/lang/Void; +@lambda-proxy java/util/logging/Level apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/logging/Level$KnownLevel mirrored ()Ljava/util/Optional; (Ljava/util/logging/Level$KnownLevel;)Ljava/util/Optional; +@lambda-proxy java/util/logging/Level$KnownLevel apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/logging/Level$KnownLevel lambda$add$3 (Ljava/lang/String;)Ljava/util/List; (Ljava/lang/String;)Ljava/util/List; +@lambda-proxy java/util/logging/Level$KnownLevel apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/logging/Level$KnownLevel lambda$add$4 (Ljava/lang/Integer;)Ljava/util/List; (Ljava/lang/Integer;)Ljava/util/List; +@lambda-proxy java/util/logging/Level$KnownLevel apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy java/util/regex/CharPredicates is ()Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/CharPredicates lambda$ASCII_DIGIT$18 (I)Z (I)Z +@lambda-proxy java/util/regex/CharPredicates is ()Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/CharPredicates lambda$ASCII_SPACE$20 (I)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (I)Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$Single$14 (II)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (II)Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$Range$17 (III)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (Ljava/util/regex/Pattern$CharPredicate;)Ljava/util/regex/Pattern$CharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$negate$7 (Ljava/util/regex/Pattern$CharPredicate;I)Z (I)Z +@lambda-proxy java/util/regex/Pattern is (Ljava/util/regex/Pattern$CharPredicate;Ljava/util/regex/Pattern$CharPredicate;)Ljava/util/regex/Pattern$BmpCharPredicate; (I)Z REF_invokeStatic java/util/regex/Pattern lambda$union$3 (Ljava/util/regex/Pattern$CharPredicate;Ljava/util/regex/Pattern$CharPredicate;I)Z (I)Z +@lambda-proxy java/util/stream/Collectors accept ()Ljava/util/function/BiConsumer; (Ljava/lang/Object;Ljava/lang/Object;)V REF_invokeInterface java/util/Set add (Ljava/lang/Object;)Z (Ljava/util/HashSet;Ljava/lang/Object;)V +@lambda-proxy java/util/stream/Collectors accept ()Ljava/util/function/BiConsumer; (Ljava/lang/Object;Ljava/lang/Object;)V REF_invokeVirtual java/util/StringJoiner add (Ljava/lang/CharSequence;)Ljava/util/StringJoiner; (Ljava/util/StringJoiner;Ljava/lang/CharSequence;)V +@lambda-proxy java/util/stream/Collectors accept (Ljava/util/function/BiConsumer;Ljava/util/function/Predicate;)Ljava/util/function/BiConsumer; (Ljava/lang/Object;Ljava/lang/Object;)V REF_invokeStatic java/util/stream/Collectors lambda$partitioningBy$62 (Ljava/util/function/BiConsumer;Ljava/util/function/Predicate;Ljava/util/stream/Collectors$Partition;Ljava/lang/Object;)V (Ljava/util/stream/Collectors$Partition;Ljava/lang/Object;)V +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/BinaryOperator; (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$toSet$7 (Ljava/util/HashSet;Ljava/util/HashSet;)Ljava/util/HashSet; (Ljava/util/HashSet;Ljava/util/HashSet;)Ljava/util/HashSet; +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/BinaryOperator; (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/StringJoiner merge (Ljava/util/StringJoiner;)Ljava/util/StringJoiner; (Ljava/util/StringJoiner;Ljava/util/StringJoiner;)Ljava/util/StringJoiner; +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$castingIdentity$2 (Ljava/lang/Object;)Ljava/lang/Object; (Ljava/lang/Object;)Ljava/lang/Object; +@lambda-proxy java/util/stream/Collectors apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/StringJoiner toString ()Ljava/lang/String; (Ljava/util/StringJoiner;)Ljava/lang/String; +@lambda-proxy java/util/stream/Collectors apply (Ljava/util/function/BinaryOperator;)Ljava/util/function/BinaryOperator; (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$partitioningBy$63 (Ljava/util/function/BinaryOperator;Ljava/util/stream/Collectors$Partition;Ljava/util/stream/Collectors$Partition;)Ljava/util/stream/Collectors$Partition; (Ljava/util/stream/Collectors$Partition;Ljava/util/stream/Collectors$Partition;)Ljava/util/stream/Collectors$Partition; +@lambda-proxy java/util/stream/Collectors get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/HashSet ()V ()Ljava/util/HashSet; +@lambda-proxy java/util/stream/Collectors get (Ljava/lang/CharSequence;Ljava/lang/CharSequence;Ljava/lang/CharSequence;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$joining$11 (Ljava/lang/CharSequence;Ljava/lang/CharSequence;Ljava/lang/CharSequence;)Ljava/util/StringJoiner; ()Ljava/util/StringJoiner; +@lambda-proxy java/util/stream/Collectors get (Ljava/util/stream/Collector;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic java/util/stream/Collectors lambda$partitioningBy$64 (Ljava/util/stream/Collector;)Ljava/util/stream/Collectors$Partition; ()Ljava/util/stream/Collectors$Partition; +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/stream/FindOps$FindSink$OfRef ()V ()Ljava/util/stream/TerminalSink; +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef get ()Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_newInvokeSpecial java/util/stream/FindOps$FindSink$OfRef ()V ()Ljava/util/stream/TerminalSink; +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeVirtual java/util/Optional isPresent ()Z (Ljava/util/Optional;)Z +@lambda-proxy java/util/stream/FindOps$FindSink$OfRef test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeVirtual java/util/Optional isPresent ()Z (Ljava/util/Optional;)Z +@lambda-proxy java/util/zip/ZipFile apply (Ljava/util/zip/ZipFile;)Ljava/util/function/IntFunction; (I)Ljava/lang/Object; REF_invokeVirtual java/util/zip/ZipFile lambda$jarStream$1 (I)Ljava/util/jar/JarEntry; (I)Ljava/util/jar/JarEntry; +@lambda-proxy jdk/internal/module/DefaultRoots apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/lang/module/ModuleDescriptor name ()Ljava/lang/String; (Ljava/lang/module/ModuleDescriptor;)Ljava/lang/String; +@lambda-proxy jdk/internal/module/DefaultRoots apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/lang/module/ModuleReference descriptor ()Ljava/lang/module/ModuleDescriptor; (Ljava/lang/module/ModuleReference;)Ljava/lang/module/ModuleDescriptor; +@lambda-proxy jdk/internal/module/DefaultRoots test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/DefaultRoots lambda$compute$0 (Ljava/lang/module/ModuleReference;)Z (Ljava/lang/module/ModuleReference;)Z +@lambda-proxy jdk/internal/module/DefaultRoots test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/DefaultRoots lambda$exportsAPI$2 (Ljava/lang/module/ModuleDescriptor$Exports;)Z (Ljava/lang/module/ModuleDescriptor$Exports;)Z +@lambda-proxy jdk/internal/module/DefaultRoots test (Ljava/lang/module/ModuleFinder;)Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/DefaultRoots lambda$compute$1 (Ljava/lang/module/ModuleFinder;Ljava/lang/module/ModuleDescriptor;)Z (Ljava/lang/module/ModuleDescriptor;)Z +@lambda-proxy jdk/internal/module/ModulePath apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy jdk/internal/module/ModulePath apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/Optional stream ()Ljava/util/stream/Stream; (Ljava/util/Optional;)Ljava/util/stream/Stream; +@lambda-proxy jdk/internal/module/ModulePath apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual java/util/zip/ZipEntry getName ()Ljava/lang/String; (Ljava/util/jar/JarEntry;)Ljava/lang/String; +@lambda-proxy jdk/internal/module/ModulePath apply (Ljdk/internal/module/ModulePath;)Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual jdk/internal/module/ModulePath toPackageName (Ljava/lang/String;)Ljava/util/Optional; (Ljava/lang/String;)Ljava/util/Optional; +@lambda-proxy jdk/internal/module/ModulePath apply (Ljdk/internal/module/ModulePath;)Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeVirtual jdk/internal/module/ModulePath toServiceName (Ljava/lang/String;)Ljava/util/Optional; (Ljava/lang/String;)Ljava/util/Optional; +@lambda-proxy jdk/internal/module/ModulePath test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/ModulePath lambda$deriveModuleDescriptor$2 (Ljava/util/jar/JarEntry;)Z (Ljava/util/jar/JarEntry;)Z +@lambda-proxy jdk/internal/module/ModulePath test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/ModulePath lambda$deriveModuleDescriptor$3 (Ljava/lang/String;)Z (Ljava/lang/String;)Z +@lambda-proxy jdk/internal/module/ModulePath test ()Ljava/util/function/Predicate; (Ljava/lang/Object;)Z REF_invokeStatic jdk/internal/module/ModulePath lambda$deriveModuleDescriptor$4 (Ljava/lang/String;)Z (Ljava/lang/String;)Z +@lambda-proxy jdk/internal/module/ModuleReferences generate (Ljava/util/function/Supplier;)Ljdk/internal/module/ModuleHashes$HashSupplier; (Ljava/lang/String;)[B REF_invokeStatic jdk/internal/module/ModuleReferences lambda$newJarModule$1 (Ljava/util/function/Supplier;Ljava/lang/String;)[B (Ljava/lang/String;)[B +@lambda-proxy jdk/internal/module/ModuleReferences get (Ljava/nio/file/Path;Ljava/net/URI;)Ljava/util/function/Supplier; ()Ljava/lang/Object; REF_invokeStatic jdk/internal/module/ModuleReferences lambda$newJarModule$0 (Ljava/nio/file/Path;Ljava/net/URI;)Ljava/lang/module/ModuleReader; ()Ljava/lang/module/ModuleReader; +@lambda-proxy sun/util/cldr/CLDRLocaleProviderAdapter apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic sun/util/cldr/CLDRLocaleProviderAdapter lambda$applyAliases$5 (Ljava/util/Locale;)Ljava/util/Locale; (Ljava/util/Locale;)Ljava/util/Locale; +@lambda-proxy sun/util/cldr/CLDRLocaleProviderAdapter run ()Ljava/security/PrivilegedExceptionAction; ()Ljava/lang/Object; REF_invokeStatic sun/util/cldr/CLDRLocaleProviderAdapter lambda$new$0 ()Lsun/util/locale/provider/LocaleDataMetaInfo; ()Lsun/util/locale/provider/LocaleDataMetaInfo; +@lambda-proxy sun/util/cldr/CLDRLocaleProviderAdapter run (Lsun/util/cldr/CLDRLocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/cldr/CLDRLocaleProviderAdapter lambda$getCalendarDataProvider$1 ()Ljava/util/spi/CalendarDataProvider; ()Ljava/util/spi/CalendarDataProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getCalendarProvider$11 ()Lsun/util/spi/CalendarProvider; ()Lsun/util/spi/CalendarProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getDateFormatProvider$2 ()Ljava/text/spi/DateFormatProvider; ()Ljava/text/spi/DateFormatProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getDateFormatSymbolsProvider$3 ()Ljava/text/spi/DateFormatSymbolsProvider; ()Ljava/text/spi/DateFormatSymbolsProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getDecimalFormatSymbolsProvider$4 ()Ljava/text/spi/DecimalFormatSymbolsProvider; ()Ljava/text/spi/DecimalFormatSymbolsProvider; +@lambda-proxy sun/util/locale/provider/JRELocaleProviderAdapter run (Lsun/util/locale/provider/JRELocaleProviderAdapter;)Ljava/security/PrivilegedAction; ()Ljava/lang/Object; REF_invokeVirtual sun/util/locale/provider/JRELocaleProviderAdapter lambda$getNumberFormatProvider$5 ()Ljava/text/spi/NumberFormatProvider; ()Ljava/text/spi/NumberFormatProvider; +@lambda-proxy sun/util/locale/provider/LocaleProviderAdapter apply ()Ljava/util/function/Function; (Ljava/lang/Object;)Ljava/lang/Object; REF_invokeStatic sun/util/locale/provider/LocaleProviderAdapter lambda$toLocaleArray$0 (Ljava/lang/String;)Ljava/util/Locale; (Ljava/lang/String;)Ljava/util/Locale; +@lambda-proxy sun/util/locale/provider/LocaleProviderAdapter apply ()Ljava/util/function/IntFunction; (I)Ljava/lang/Object; REF_invokeStatic sun/util/locale/provider/LocaleProviderAdapter lambda$toLocaleArray$1 (I)[Ljava/util/Locale; (I)[Ljava/util/Locale; diff --git a/java21/lib/fontconfig.bfc b/java21/lib/fontconfig.bfc new file mode 100644 index 0000000000000000000000000000000000000000..24d81b7b1ee936a711d74264442eb00fc87550ca Binary files /dev/null and b/java21/lib/fontconfig.bfc differ diff --git a/java21/lib/fontconfig.properties.src b/java21/lib/fontconfig.properties.src new file mode 100644 index 0000000000000000000000000000000000000000..40e40ca55af9f2a09483444bfd8c6e79d6a6ab1c --- /dev/null +++ b/java21/lib/fontconfig.properties.src @@ -0,0 +1,332 @@ +# +# +# Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. Oracle designates this +# particular file as subject to the "Classpath" exception as provided +# by Oracle in the LICENSE file that accompanied this code. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. +# + +# Version + +version=1 + +# Component Font Mappings + +allfonts.chinese-ms936=SimSun +allfonts.chinese-ms936-extb=SimSun-ExtB +allfonts.chinese-gb18030=SimSun-18030 +allfonts.chinese-gb18030-extb=SimSun-ExtB +allfonts.chinese-hkscs=MingLiU_HKSCS +allfonts.chinese-ms950-extb=MingLiU-ExtB +allfonts.devanagari=Mangal +allfonts.bengali=Vrinda +allfonts.gujarati=Shruti +allfonts.gurmukhi=Raavi +allfonts.kannada=Tunga +allfonts.malayalam=Kartika +allfonts.oriya=Kalinga +allfonts.sinhala=Iskoola Pota +allfonts.tamil=Latha +allfonts.telugu=Gautami +allfonts.khmer=Khmer UI +allfonts.mongolian=Mongolian Baiti +allfonts.myanmar=Myanmar Text +allfonts.dingbats=Wingdings +allfonts.symbol=Symbol +allfonts.symbols=Segoe UI Symbol +allfonts.thai=DokChampa +allfonts.georgian=Sylfaen +allfonts.korean-fallback=Malgun Gothic + +serif.plain.alphabetic=Times New Roman +serif.plain.chinese-ms950=MingLiU +serif.plain.chinese-ms950-extb=MingLiU-ExtB +serif.plain.hebrew=David +serif.plain.japanese=MS Mincho +serif.plain.korean=Batang + +serif.bold.alphabetic=Times New Roman Bold +serif.bold.chinese-ms950=PMingLiU +serif.bold.chinese-ms950-extb=PMingLiU-ExtB +serif.bold.hebrew=David Bold +serif.bold.japanese=MS Mincho +serif.bold.korean=Batang + +serif.italic.alphabetic=Times New Roman Italic +serif.italic.chinese-ms950=PMingLiU +serif.italic.chinese-ms950-extb=PMingLiU-ExtB +serif.italic.hebrew=David +serif.italic.japanese=MS Mincho +serif.italic.korean=Batang + +serif.bolditalic.alphabetic=Times New Roman Bold Italic +serif.bolditalic.chinese-ms950=PMingLiU +serif.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +serif.bolditalic.hebrew=David Bold +serif.bolditalic.japanese=MS Mincho +serif.bolditalic.korean=Batang + +sansserif.plain.alphabetic=Arial +sansserif.plain.chinese-ms950=MingLiU +sansserif.plain.chinese-ms950-extb=MingLiU-ExtB +sansserif.plain.hebrew=David +sansserif.plain.japanese=MS Gothic +sansserif.plain.korean=Malgun Gothic + +sansserif.bold.alphabetic=Arial Bold +sansserif.bold.chinese-ms950=PMingLiU +sansserif.bold.chinese-ms950-extb=PMingLiU-ExtB +sansserif.bold.hebrew=David Bold +sansserif.bold.japanese=MS Gothic +sansserif.bold.korean=Malgun Gothic Bold + +sansserif.italic.alphabetic=Arial Italic +sansserif.italic.chinese-ms950=PMingLiU +sansserif.italic.chinese-ms950-extb=PMingLiU-ExtB +sansserif.italic.hebrew=David +sansserif.italic.japanese=MS Gothic +sansserif.italic.korean=Malgun Gothic + +sansserif.bolditalic.alphabetic=Arial Bold Italic +sansserif.bolditalic.chinese-ms950=PMingLiU +sansserif.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +sansserif.bolditalic.hebrew=David Bold +sansserif.bolditalic.japanese=MS Gothic +sansserif.bolditalic.korean=Malgun Gothic Bold + +monospaced.plain.alphabetic=Courier New +monospaced.plain.chinese-ms950=MingLiU +monospaced.plain.chinese-ms950-extb=MingLiU-ExtB +monospaced.plain.hebrew=Courier New +monospaced.plain.japanese=MS Gothic +monospaced.plain.korean=GulimChe + +monospaced.bold.alphabetic=Courier New Bold +monospaced.bold.chinese-ms950=PMingLiU +monospaced.bold.chinese-ms950-extb=PMingLiU-ExtB +monospaced.bold.hebrew=Courier New Bold +monospaced.bold.japanese=MS Gothic +monospaced.bold.korean=GulimChe + +monospaced.italic.alphabetic=Courier New Italic +monospaced.italic.chinese-ms950=PMingLiU +monospaced.italic.chinese-ms950-extb=PMingLiU-ExtB +monospaced.italic.hebrew=Courier New +monospaced.italic.japanese=MS Gothic +monospaced.italic.korean=GulimChe + +monospaced.bolditalic.alphabetic=Courier New Bold Italic +monospaced.bolditalic.chinese-ms950=PMingLiU +monospaced.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +monospaced.bolditalic.hebrew=Courier New Bold +monospaced.bolditalic.japanese=MS Gothic +monospaced.bolditalic.korean=GulimChe + +dialog.plain.alphabetic=Arial +dialog.plain.chinese-ms950=MingLiU +dialog.plain.chinese-ms950-extb=MingLiU-ExtB +dialog.plain.hebrew=David +dialog.plain.japanese=MS Gothic +dialog.plain.korean=Malgun Gothic + +dialog.bold.alphabetic=Arial Bold +dialog.bold.chinese-ms950=PMingLiU +dialog.bold.chinese-ms950-extb=PMingLiU-ExtB +dialog.bold.hebrew=David Bold +dialog.bold.japanese=MS Gothic +dialog.bold.korean=Malgun Gothic Bold + +dialog.italic.alphabetic=Arial Italic +dialog.italic.chinese-ms950=PMingLiU +dialog.italic.chinese-ms950-extb=PMingLiU-ExtB +dialog.italic.hebrew=David +dialog.italic.japanese=MS Gothic +dialog.italic.korean=Malgun Gothic + +dialog.bolditalic.alphabetic=Arial Bold Italic +dialog.bolditalic.chinese-ms950=PMingLiU +dialog.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +dialog.bolditalic.hebrew=David Bold +dialog.bolditalic.japanese=MS Gothic +dialog.bolditalic.korean=Malgun Gothic Bold + +dialoginput.plain.alphabetic=Courier New +dialoginput.plain.chinese-ms950=MingLiU +dialoginput.plain.chinese-ms950-extb=MingLiU-ExtB +dialoginput.plain.hebrew=David +dialoginput.plain.japanese=MS Gothic +dialoginput.plain.korean=Gulim + +dialoginput.bold.alphabetic=Courier New Bold +dialoginput.bold.chinese-ms950=PMingLiU +dialoginput.bold.chinese-ms950-extb=PMingLiU-ExtB +dialoginput.bold.hebrew=David Bold +dialoginput.bold.japanese=MS Gothic +dialoginput.bold.korean=Gulim + +dialoginput.italic.alphabetic=Courier New Italic +dialoginput.italic.chinese-ms950=PMingLiU +dialoginput.italic.chinese-ms950-extb=PMingLiU-ExtB +dialoginput.italic.hebrew=David +dialoginput.italic.japanese=MS Gothic +dialoginput.italic.korean=Gulim + +dialoginput.bolditalic.alphabetic=Courier New Bold Italic +dialoginput.bolditalic.chinese-ms950=PMingLiU +dialoginput.bolditalic.chinese-ms950-extb=PMingLiU-ExtB +dialoginput.bolditalic.hebrew=David Bold +dialoginput.bolditalic.japanese=MS Gothic +dialoginput.bolditalic.korean=Gulim + +# Search Sequences + +sequence.allfonts=alphabetic/default,dingbats,symbol + +sequence.serif.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb +sequence.sansserif.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb +sequence.monospaced.GBK=chinese-ms936,alphabetic,dingbats,symbol,chinese-ms936-extb +sequence.dialog.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb +sequence.dialoginput.GBK=alphabetic,chinese-ms936,dingbats,symbol,chinese-ms936-extb + +sequence.serif.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb +sequence.sansserif.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb +sequence.monospaced.GB18030=chinese-gb18030,alphabetic,dingbats,symbol,chinese-gb18030-extb +sequence.dialog.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb +sequence.dialoginput.GB18030=alphabetic,chinese-gb18030,dingbats,symbol,chinese-gb18030-extb + +sequence.serif.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb +sequence.sansserif.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb +sequence.monospaced.x-windows-950=chinese-ms950,alphabetic,dingbats,symbol,chinese-ms950-extb +sequence.dialog.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb +sequence.dialoginput.x-windows-950=alphabetic,chinese-ms950,dingbats,symbol,chinese-ms950-extb + +sequence.serif.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.sansserif.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.monospaced.x-MS950-HKSCS=chinese-ms950,alphabetic,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialog.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialoginput.x-MS950-HKSCS=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb + +sequence.serif.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.sansserif.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.monospaced.x-MS950-HKSCS-XP=chinese-ms950,alphabetic,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialog.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb +sequence.dialoginput.x-MS950-HKSCS-XP=alphabetic,chinese-ms950,chinese-hkscs,dingbats,symbol,chinese-ms950-extb + +sequence.allfonts.UTF-8.hi=alphabetic/1252,devanagari,dingbats,symbol +sequence.allfonts.UTF-8.ja=alphabetic,japanese,dingbats,symbol +sequence.allfonts.UTF-8.ko=alphabetic,korean,dingbats,symbol + +sequence.allfonts.windows-1255=hebrew,alphabetic/1252,dingbats,symbol + +sequence.serif.windows-31j=alphabetic,japanese,dingbats,symbol +sequence.sansserif.windows-31j=alphabetic,japanese,dingbats,symbol +sequence.monospaced.windows-31j=japanese,alphabetic,dingbats,symbol +sequence.dialog.windows-31j=alphabetic,japanese,dingbats,symbol +sequence.dialoginput.windows-31j=alphabetic,japanese,dingbats,symbol + +sequence.serif.x-windows-949=alphabetic,korean,dingbats,symbol +sequence.sansserif.x-windows-949=alphabetic,korean,dingbats,symbol +sequence.monospaced.x-windows-949=korean,alphabetic,dingbats,symbol +sequence.dialog.x-windows-949=alphabetic,korean,dingbats,symbol +sequence.dialoginput.x-windows-949=alphabetic,korean,dingbats,symbol + +sequence.allfonts.x-windows-874=alphabetic,thai,dingbats,symbol + +sequence.fallback=symbols,\ + chinese-ms950,chinese-hkscs,chinese-ms936,chinese-gb18030,\ + japanese,korean-fallback,chinese-ms950-extb,chinese-ms936-extb,\ + georgian,devanagari,bengali,gujarati,gurmukhi,kannada,\ + malayalam,oriya,sinhala,tamil,telugu,thai,khmer,mongolian,\ + myanmar + +# Exclusion Ranges + +exclusion.alphabetic=0700-1cff,1d80-1e9f,1f00-2017,2020-20ab,20ad-20b8,20bb-20bc,20be-f8ff +exclusion.chinese-gb18030=0390-03d6,2200-22ef,2701-27be +exclusion.hebrew=0041-005a,0060-007a,007f-00ff,20ac-20ac + +# Monospaced to Proportional width variant mapping +# (Experimental private syntax) +proportional.MS_Gothic=MS PGothic +proportional.MS_Mincho=MS PMincho +proportional.MingLiU=PMingLiU +proportional.MingLiU-ExtB=PMingLiU-ExtB + +# Font File Names + +filename.Arial=ARIAL.TTF +filename.Arial_Bold=ARIALBD.TTF +filename.Arial_Italic=ARIALI.TTF +filename.Arial_Bold_Italic=ARIALBI.TTF + +filename.Courier_New=COUR.TTF +filename.Courier_New_Bold=COURBD.TTF +filename.Courier_New_Italic=COURI.TTF +filename.Courier_New_Bold_Italic=COURBI.TTF + +filename.Times_New_Roman=TIMES.TTF +filename.Times_New_Roman_Bold=TIMESBD.TTF +filename.Times_New_Roman_Italic=TIMESI.TTF +filename.Times_New_Roman_Bold_Italic=TIMESBI.TTF + +filename.SimSun=SIMSUN.TTC +filename.SimSun-18030=SIMSUN18030.TTC +filename.SimSun-ExtB=SIMSUNB.TTF + +filename.MingLiU=MINGLIU.TTC +filename.MingLiU-ExtB=MINGLIUB.TTC +filename.PMingLiU=MINGLIU.TTC +filename.PMingLiU-ExtB=MINGLIUB.TTC +filename.MingLiU_HKSCS=hkscsm3u.ttf + +filename.David=DAVID.TTF +filename.David_Bold=DAVIDBD.TTF + +filename.MS_Mincho=MSMINCHO.TTC +filename.MS_PMincho=MSMINCHO.TTC +filename.MS_Gothic=MSGOTHIC.TTC +filename.MS_PGothic=MSGOTHIC.TTC + +filename.Gulim=gulim.TTC +filename.Batang=batang.TTC +filename.GulimChe=gulim.TTC + +filename.Gautami=gautami.ttf +filename.Iskoola_Pota=iskpota.ttf +filename.Kalinga=kalinga.ttf +filename.Kartika=kartika.ttf +filename.Latha=latha.ttf +filename.Mangal=MANGAL.TTF +filename.Raavi=raavi.ttf +filename.Shruti=shruti.ttf +filename.Tunga=TUNGA.TTF +filename.Vrinda=vrinda.ttf +filename.DokChampa=dokchamp.ttf +filename.Khmer_UI=KhmerUI.ttf +filename.Mongolian_Baiti=monbaiti.ttf +filename.Myanmar_Text=mmrtext.ttf +filename.Symbol=SYMBOL.TTF +filename.Wingdings=WINGDING.TTF + +filename.Sylfaen=sylfaen.ttf +filename.Segoe_UI_Symbol=SEGUISYM.TTF +filename.Malgun_Gothic=malgun.ttf +filename.Malgun_Gothic_Bold=malgunbd.TTF diff --git a/java21/lib/jawt.lib b/java21/lib/jawt.lib new file mode 100644 index 0000000000000000000000000000000000000000..312a57a371e173ecbd1977743c5ac941213bd5a1 Binary files /dev/null and b/java21/lib/jawt.lib differ diff --git a/java21/lib/jfr/default.jfc b/java21/lib/jfr/default.jfc new file mode 100644 index 0000000000000000000000000000000000000000..ee03f66162e5b6c1bf2bada0e56c7c31cd5a0cb1 --- /dev/null +++ b/java21/lib/jfr/default.jfc @@ -0,0 +1,1126 @@ + + + + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + false + 10 s + + + + false + 10 s + + + + true + true + + + + true + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + false + true + + + + false + + + + true + true + 20 ms + + + + true + true + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + false + true + 20 ms + + + + true + true + + + + false + false + 0 ms + + + + false + false + 0 ms + + + + false + + + + false + + + + false + + + + false + + + + true + true + + + + false + true + 0 ms + + + + false + true + + + + true + true + 0 ms + + + + true + true + 0 ms + + + + true + + + + false + + + + true + beginChunk + + + + true + beginChunk + + + + true + 20 ms + + + + true + 20 ms + + + + true + 10 ms + + + + false + 10 ms + + + + false + 10 ms + + + + false + 10 ms + + + + false + 10 ms + + + + true + 10 ms + + + + true + true + + + + true + everyChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + false + everyChunk + + + + true + everyChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + false + + + + true + everyChunk + + + + true + everyChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + true + + + + true + true + + + + true + + + + true + 0 ms + + + + true + 0 ms + true + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + 0 ms + + + + true + + + + true + + + + false + + + + false + + + + true + + + + false + true + + + + true + + + + false + everyChunk + + + + false + + + + false + everyChunk + + + + false + + + + true + false + 0 ns + + + + true + 1000 ms + + + + true + 1000 ms + + + + true + beginChunk + + + + true + 1000 ms + + + + true + 1000 ms + + + + true + 60 s + + + + false + + + + false + + + + true + + + + true + beginChunk + + + + true + everyChunk + + + + true + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + beginChunk + + + + true + 10 s + + + + true + 1000 ms + + + + true + 10 s + + + + true + beginChunk + + + + true + endChunk + + + + true + true + + + + true + 5 s + + + + true + beginChunk + + + + true + everyChunk + + + + false + true + + + + false + true + + + + true + 150/s + true + + + + true + everyChunk + + + + true + endChunk + + + + false + endChunk + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + true + true + 20 ms + + + + false + true + + + + true + beginChunk + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + true + true + + + + true + 1000 ms + + + + true + + + + true + + + + false + 0 ns + + + + true + + + + true + + + + true + true + 0 ms + + + + true + true + 1 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + false + + + + true + 0 ns + true + + + + true + 5 s + + + + true + 1 s + true + + + + true + endChunk + + + + true + endChunk + + + + true + endChunk + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 20 ms + + 20 ms + + 20 ms + + false + + + diff --git a/java21/lib/jfr/profile.jfc b/java21/lib/jfr/profile.jfc new file mode 100644 index 0000000000000000000000000000000000000000..bdd148121c14d1dcf6c6fbcce09ea682631a0f86 --- /dev/null +++ b/java21/lib/jfr/profile.jfc @@ -0,0 +1,1126 @@ + + + + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + everyChunk + + + + true + 1000 ms + + + + true + 10 s + + + + true + 10 s + + + + true + true + + + + true + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + false + true + + + + false + + + + true + true + 20 ms + + + + true + true + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + + + + false + false + 0 ms + + + + false + false + 0 ms + + + + false + + + + false + + + + false + + + + false + + + + true + true + + + + false + true + 0 ms + + + + false + true + + + + true + true + 0 ms + + + + true + true + 0 ms + + + + true + + + + false + + + + true + beginChunk + + + + true + beginChunk + + + + true + 10 ms + + + + true + 20 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + true + + + + true + 60 s + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + false + everyChunk + + + + true + everyChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + false + + + + true + everyChunk + + + + true + everyChunk + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + true + + + + true + true + + + + true + + + + true + 0 ms + + + + true + 0 ms + true + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + + + + true + 0 ms + + + + true + + + + true + + + + true + + + + true + + + + true + + + + false + true + + + + true + + + + false + everyChunk + + + + false + + + + false + everyChunk + + + + false + + + + true + true + 0 ns + + + + true + 1000 ms + + + + true + 1000 ms + + + + true + beginChunk + + + + true + 1000 ms + + + + true + 100 ms + + + + true + 10 s + + + + true + + + + false + + + + true + + + + true + beginChunk + + + + true + everyChunk + + + + true + + + + true + beginChunk + + + + true + beginChunk + + + + true + beginChunk + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + 30 s + + + + true + beginChunk + + + + true + 10 s + + + + true + 1000 ms + + + + true + 10 s + + + + true + beginChunk + + + + true + endChunk + + + + true + true + + + + true + 5 s + + + + true + beginChunk + + + + true + everyChunk + + + + false + true + + + + false + true + + + + true + 300/s + true + + + + true + everyChunk + + + + true + endChunk + + + + true + endChunk + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + true + true + 10 ms + + + + false + true + + + + true + beginChunk + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + false + true + + + + true + true + + + + true + 1000 ms + + + + true + + + + true + + + + false + 0 ns + + + + true + + + + true + + + + true + true + 0 ms + + + + true + true + 1 ms + + + + true + 0 ms + + + + true + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + false + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + 0 ms + + + + true + true + + + + true + 0 ns + true + + + + true + 5 s + + + + true + 100 ms + true + + + + true + endChunk + + + + true + endChunk + + + + true + endChunk + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 10 ms + + 10 ms + + 10 ms + + false + + + diff --git a/java21/lib/jvm.cfg b/java21/lib/jvm.cfg new file mode 100644 index 0000000000000000000000000000000000000000..97225c8fead9610efc47615e847cc20c2b3b8c19 --- /dev/null +++ b/java21/lib/jvm.cfg @@ -0,0 +1,2 @@ +-server KNOWN +-client IGNORE diff --git a/java21/lib/psfont.properties.ja b/java21/lib/psfont.properties.ja new file mode 100644 index 0000000000000000000000000000000000000000..d17cf40d19618db82fec55e4c80fc9713d9fd7a1 --- /dev/null +++ b/java21/lib/psfont.properties.ja @@ -0,0 +1,119 @@ +# +# +# Copyright (c) 1996, 2000, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. Oracle designates this +# particular file as subject to the "Classpath" exception as provided +# by Oracle in the LICENSE file that accompanied this code. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. +# + +# +# Japanese PostScript printer property file +# +font.num=16 +# +serif=serif +timesroman=serif +sansserif=sansserif +helvetica=sansserif +monospaced=monospaced +courier=monospaced +dialog=sansserif +dialoginput=monospaced +# +serif.latin1.plain=Times-Roman +serif.latin1.italic=Times-Italic +serif.latin1.bolditalic=Times-BoldItalic +serif.latin1.bold=Times-Bold +# +sansserif.latin1.plain=Helvetica +sansserif.latin1.italic=Helvetica-Oblique +sansserif.latin1.bolditalic=Helvetica-BoldOblique +sansserif.latin1.bold=Helvetica-Bold +# +monospaced.latin1.plain=Courier +monospaced.latin1.italic=Courier-Oblique +monospaced.latin1.bolditalic=Courier-BoldOblique +monospaced.latin1.bold=Courier-Bold +# +serif.x11jis0208.plain=Ryumin-Light-H +serif.x11jis0208.italic=Ryumin-Light-H +serif.x11jis0208.bolditalic=Ryumin-Light-H +serif.x11jis0208.bold=Ryumin-Light-H +# +sansserif.x11jis0208.plain=GothicBBB-Medium-H +sansserif.x11jis0208.italic=GothicBBB-Medium-H +sansserif.x11jis0208.bolditalic=GothicBBB-Medium-H +sansserif.x11jis0208.bold=GothicBBB-Medium-H +# +monospaced.x11jis0208.plain=GothicBBB-Medium-H +monospaced.x11jis0208.italic=GothicBBB-Medium-H +monospaced.x11jis0208.bolditalic=GothicBBB-Medium-H +monospaced.x11jis0208.bold=GothicBBB-Medium-H +# +serif.x11jis0201.plain=Ryumin-Light.Hankaku +serif.x11jis0201.italic=Ryumin-Light.Hankaku +serif.x11jis0201.bolditalic=Ryumin-Light.Hankaku +serif.x11jis0201.bold=Ryumin-Light.Hankaku +# +sansserif.x11jis0201.plain=GothicBBB-Medium.Hankaku +sansserif.x11jis0201.italic=GothicBBB-Medium.Hankaku +sansserif.x11jis0201.bolditalic=GothicBBB-Medium.Hankaku +sansserif.x11jis0201.bold=GothicBBB-Medium.Hankaku +# +monospaced.x11jis0201.plain=GothicBBB-Medium.Hankaku +monospaced.x11jis0201.italic=GothicBBB-Medium.Hankaku +monospaced.x11jis0201.bolditalic=GothicBBB-Medium.Hankaku +monospaced.x11jis0201.bold=GothicBBB-Medium.Hankaku +# +Helvetica=0 +Helvetica-Bold=1 +Helvetica-Oblique=2 +Helvetica-BoldOblique=3 +Times-Roman=4 +Times-Bold=5 +Times-Italic=6 +Times-BoldItalic=7 +Courier=8 +Courier-Bold=9 +Courier-Oblique=10 +Courier-BoldOblique=11 +GothicBBB-Medium-H=12 +Ryumin-Light-H=13 +GothicBBB-Medium.Hankaku=14 +Ryumin-Light.Hankaku=15 +# +font.0=Helvetica ISOF +font.1=Helvetica-Bold ISOF +font.2=Helvetica-Oblique ISOF +font.3=Helvetica-BoldOblique ISOF +font.4=Times-Roman ISOF +font.5=Times-Bold ISOF +font.6=Times-Italic ISOF +font.7=Times-BoldItalic ISOF +font.8=Courier ISOF +font.9=Courier-Bold ISOF +font.10=Courier-Oblique ISOF +font.11=Courier-BoldOblique ISOF +font.12=GothicBBB-Medium-H findfont +font.13=Ryumin-Light-H findfont +font.14=GothicBBB-Medium.Hankaku findfont +font.15=Ryumin-Light.Hankaku findfont +# diff --git a/java21/lib/psfontj2d.properties b/java21/lib/psfontj2d.properties new file mode 100644 index 0000000000000000000000000000000000000000..5eb2c4b8ba2c55a0dcdc54cc53ce5b3ff7eb17d7 --- /dev/null +++ b/java21/lib/psfontj2d.properties @@ -0,0 +1,323 @@ +# +# +# Copyright (c) 1999, Oracle and/or its affiliates. All rights reserved. +# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. +# +# This code is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 only, as +# published by the Free Software Foundation. Oracle designates this +# particular file as subject to the "Classpath" exception as provided +# by Oracle in the LICENSE file that accompanied this code. +# +# This code is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# version 2 for more details (a copy is included in the LICENSE file that +# accompanied this code). +# +# You should have received a copy of the GNU General Public License version +# 2 along with this work; if not, write to the Free Software Foundation, +# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +# +# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA +# or visit www.oracle.com if you need additional information or have any +# questions. + +# +# PostScript printer property file for Java 2D printing. +# +# WARNING: This is an internal implementation file, not a public file. +# Any customisation or reliance on the existence of this file and its +# contents or syntax is discouraged and unsupported. +# It may be incompatibly changed or removed without any notice. +# +# +font.num=35 +# +# Legacy logical font family names and logical font aliases should all +# map to the primary logical font names. +# +serif=serif +times=serif +timesroman=serif +sansserif=sansserif +helvetica=sansserif +dialog=sansserif +dialoginput=monospaced +monospaced=monospaced +courier=monospaced +# +# Next, physical fonts which can be safely mapped to standard postscript fonts +# These keys generally map to a value which is the same as the key, so +# the key/value is just a way to say the font has a mapping. +# Sometimes however we map more than one screen font to the same PS font. +# +avantgarde=avantgarde_book +avantgarde_book=avantgarde_book +avantgarde_demi=avantgarde_demi +avantgarde_book_oblique=avantgarde_book_oblique +avantgarde_demi_oblique=avantgarde_demi_oblique +# +itcavantgarde=avantgarde_book +itcavantgarde=avantgarde_book +itcavantgarde_demi=avantgarde_demi +itcavantgarde_oblique=avantgarde_book_oblique +itcavantgarde_demi_oblique=avantgarde_demi_oblique +# +bookman=bookman_light +bookman_light=bookman_light +bookman_demi=bookman_demi +bookman_light_italic=bookman_light_italic +bookman_demi_italic=bookman_demi_italic +# +# Exclude "helvetica" on its own as that's a legacy name for a logical font +helvetica_bold=helvetica_bold +helvetica_oblique=helvetica_oblique +helvetica_bold_oblique=helvetica_bold_oblique +# +itcbookman_light=bookman_light +itcbookman_demi=bookman_demi +itcbookman_light_italic=bookman_light_italic +itcbookman_demi_italic=bookman_demi_italic +# +# Exclude "courier" on its own as that's a legacy name for a logical font +courier_bold=courier_bold +courier_oblique=courier_oblique +courier_bold_oblique=courier_bold_oblique +# +courier_new=courier +courier_new_bold=courier_bold +# +monotype_century_schoolbook=newcenturyschoolbook +monotype_century_schoolbook_bold=newcenturyschoolbook_bold +monotype_century_schoolbook_italic=newcenturyschoolbook_italic +monotype_century_schoolbook_bold_italic=newcenturyschoolbook_bold_italic +# +newcenturyschoolbook=newcenturyschoolbook +newcenturyschoolbook_bold=newcenturyschoolbook_bold +newcenturyschoolbook_italic=newcenturyschoolbook_italic +newcenturyschoolbook_bold_italic=newcenturyschoolbook_bold_italic +# +palatino=palatino +palatino_bold=palatino_bold +palatino_italic=palatino_italic +palatino_bold_italic=palatino_bold_italic +# +# Exclude "times" on its own as that's a legacy name for a logical font +times_bold=times_roman_bold +times_italic=times_roman_italic +times_bold_italic=times_roman_bold_italic +# +times_roman=times_roman +times_roman_bold=times_roman_bold +times_roman_italic=times_roman_italic +times_roman_bold_italic=times_roman_bold_italic +# +times_new_roman=times_roman +times_new_roman_bold=times_roman_bold +times_new_roman_italic=times_roman_italic +times_new_roman_bold_italic=times_roman_bold_italic +# +zapfchancery_italic=zapfchancery_italic +itczapfchancery_italic=zapfchancery_italic +# +# Next the mapping of the font name + charset + style to Postscript font name +# for the logical fonts. +# +serif.latin1.plain=Times-Roman +serif.latin1.bold=Times-Bold +serif.latin1.italic=Times-Italic +serif.latin1.bolditalic=Times-BoldItalic +serif.symbol.plain=Symbol +serif.dingbats.plain=ZapfDingbats +serif.symbol.bold=Symbol +serif.dingbats.bold=ZapfDingbats +serif.symbol.italic=Symbol +serif.dingbats.italic=ZapfDingbats +serif.symbol.bolditalic=Symbol +serif.dingbats.bolditalic=ZapfDingbats +# +sansserif.latin1.plain=Helvetica +sansserif.latin1.bold=Helvetica-Bold +sansserif.latin1.italic=Helvetica-Oblique +sansserif.latin1.bolditalic=Helvetica-BoldOblique +sansserif.symbol.plain=Symbol +sansserif.dingbats.plain=ZapfDingbats +sansserif.symbol.bold=Symbol +sansserif.dingbats.bold=ZapfDingbats +sansserif.symbol.italic=Symbol +sansserif.dingbats.italic=ZapfDingbats +sansserif.symbol.bolditalic=Symbol +sansserif.dingbats.bolditalic=ZapfDingbats +# +monospaced.latin1.plain=Courier +monospaced.latin1.bold=Courier-Bold +monospaced.latin1.italic=Courier-Oblique +monospaced.latin1.bolditalic=Courier-BoldOblique +monospaced.symbol.plain=Symbol +monospaced.dingbats.plain=ZapfDingbats +monospaced.symbol.bold=Symbol +monospaced.dingbats.bold=ZapfDingbats +monospaced.symbol.italic=Symbol +monospaced.dingbats.italic=ZapfDingbats +monospaced.symbol.bolditalic=Symbol +monospaced.dingbats.bolditalic=ZapfDingbats +# +# Next the mapping of the font name + charset + style to Postscript font name +# for the physical fonts. Since these always report style as plain, the +# style key is always plain. So we map using the face name to the correct +# style for the postscript font. This is possible since the face names can +# be replied upon to be different for each style. +# However an application may try to create a Font applying a style to an +# physical name. We want to map to the correct Postscript font there too +# if possible but we do not map cases where the application tries to +# augment a style (eg ask for a bold version of a bold font) +# Defer to the 2D package to attempt create an artificially styled version +# +avantgarde_book.latin1.plain=AvantGarde-Book +avantgarde_demi.latin1.plain=AvantGarde-Demi +avantgarde_book_oblique.latin1.plain=AvantGarde-BookOblique +avantgarde_demi_oblique.latin1.plain=AvantGarde-DemiOblique +# +avantgarde_book.latin1.bold=AvantGarde-Demi +avantgarde_book.latin1.italic=AvantGarde-BookOblique +avantgarde_book.latin1.bolditalic=AvantGarde-DemiOblique +avantgarde_demi.latin1.italic=AvantGarde-DemiOblique +avantgarde_book_oblique.latin1.bold=AvantGarde-DemiOblique +# +bookman_light.latin1.plain=Bookman-Light +bookman_demi.latin1.plain=Bookman-Demi +bookman_light_italic.latin1.plain=Bookman-LightItalic +bookman_demi_italic.latin1.plain=Bookman-DemiItalic +# +bookman_light.latin1.bold=Bookman-Demi +bookman_light.latin1.italic=Bookman-LightItalic +bookman_light.latin1.bolditalic=Bookman-DemiItalic +bookman_light_bold.latin1.italic=Bookman-DemiItalic +bookman_light_italic.latin1.bold=Bookman-DemiItalic +# +courier.latin1.plain=Courier +courier_bold.latin1.plain=Courier-Bold +courier_oblique.latin1.plain=Courier-Oblique +courier_bold_oblique.latin1.plain=Courier-BoldOblique +courier.latin1.bold=Courier-Bold +courier.latin1.italic=Courier-Oblique +courier.latin1.bolditalic=Courier-BoldOblique +courier_bold.latin1.italic=Courier-BoldOblique +courier_italic.latin1.bold=Courier-BoldOblique +# +helvetica_bold.latin1.plain=Helvetica-Bold +helvetica_oblique.latin1.plain=Helvetica-Oblique +helvetica_bold_oblique.latin1.plain=Helvetica-BoldOblique +helvetica.latin1.bold=Helvetica-Bold +helvetica.latin1.italic=Helvetica-Oblique +helvetica.latin1.bolditalic=Helvetica-BoldOblique +helvetica_bold.latin1.italic=Helvetica-BoldOblique +helvetica_italic.latin1.bold=Helvetica-BoldOblique +# +newcenturyschoolbook.latin1.plain=NewCenturySchlbk-Roman +newcenturyschoolbook_bold.latin1.plain=NewCenturySchlbk-Bold +newcenturyschoolbook_italic.latin1.plain=NewCenturySchlbk-Italic +newcenturyschoolbook_bold_italic.latin1.plain=NewCenturySchlbk-BoldItalic +newcenturyschoolbook.latin1.bold=NewCenturySchlbk-Bold +newcenturyschoolbook.latin1.italic=NewCenturySchlbk-Italic +newcenturyschoolbook.latin1.bolditalic=NewCenturySchlbk-BoldItalic +newcenturyschoolbook_bold.latin1.italic=NewCenturySchlbk-BoldItalic +newcenturyschoolbook_italic.latin1.bold=NewCenturySchlbk-BoldItalic +# +palatino.latin1.plain=Palatino-Roman +palatino_bold.latin1.plain=Palatino-Bold +palatino_italic.latin1.plain=Palatino-Italic +palatino_bold_italic.latin1.plain=Palatino-BoldItalic +palatino.latin1.bold=Palatino-Bold +palatino.latin1.italic=Palatino-Italic +palatino.latin1.bolditalic=Palatino-BoldItalic +palatino_bold.latin1.italic=Palatino-BoldItalic +palatino_italic.latin1.bold=Palatino-BoldItalic +# +times_roman.latin1.plain=Times-Roman +times_roman_bold.latin1.plain=Times-Bold +times_roman_italic.latin1.plain=Times-Italic +times_roman_bold_italic.latin1.plain=Times-BoldItalic +times_roman.latin1.bold=Times-Bold +times_roman.latin1.italic=Times-Italic +times_roman.latin1.bolditalic=Times-BoldItalic +times_roman_bold.latin1.italic=Times-BoldItalic +times_roman_italic.latin1.bold=Times-BoldItalic +# +zapfchancery_italic.latin1.plain=ZapfChancery-MediumItalic +# +# Finally the mappings of PS font names to indexes. +# +AvantGarde-Book=0 +AvantGarde-BookOblique=1 +AvantGarde-Demi=2 +AvantGarde-DemiOblique=3 +Bookman-Demi=4 +Bookman-DemiItalic=5 +Bookman-Light=6 +Bookman-LightItalic=7 +Courier=8 +Courier-Bold=9 +Courier-BoldOblique=10 +Courier-Oblique=11 +Helvetica=12 +Helvetica-Bold=13 +Helvetica-BoldOblique=14 +Helvetica-Narrow=15 +Helvetica-Narrow-Bold=16 +Helvetica-Narrow-BoldOblique=17 +Helvetica-Narrow-Oblique=18 +Helvetica-Oblique=19 +NewCenturySchlbk-Bold=20 +NewCenturySchlbk-BoldItalic=21 +NewCenturySchlbk-Italic=22 +NewCenturySchlbk-Roman=23 +Palatino-Bold=24 +Palatino-BoldItalic=25 +Palatino-Italic=26 +Palatino-Roman=27 +Symbol=28 +Times-Bold=29 +Times-BoldItalic=30 +Times-Italic=31 +Times-Roman=32 +ZapfDingbats=33 +ZapfChancery-MediumItalic=34 +# +font.0=AvantGarde-Book ISOF +font.1=AvantGarde-BookOblique ISOF +font.2=AvantGarde-Demi ISOF +font.3=AvantGarde-DemiOblique ISOF +font.4=Bookman-Demi ISOF +font.5=Bookman-DemiItalic ISOF +font.6=Bookman-Light ISOF +font.7=Bookman-LightItalic ISOF +font.8=Courier ISOF +font.9=Courier-Bold ISOF +font.10=Courier-BoldOblique ISOF +font.11=Courier-Oblique ISOF +font.12=Helvetica ISOF +font.13=Helvetica-Bold ISOF +font.14=Helvetica-BoldOblique ISOF +font.15=Helvetica-Narrow ISOF +font.16=Helvetica-Narrow-Bold ISOF +font.17=Helvetica-Narrow-BoldOblique ISOF +font.18=Helvetica-Narrow-Oblique ISOF +font.19=Helvetica-Oblique ISOF +font.20=NewCenturySchlbk-Bold ISOF +font.21=NewCenturySchlbk-BoldItalic ISOF +font.22=NewCenturySchlbk-Italic ISOF +font.23=NewCenturySchlbk-Roman ISOF +font.24=Palatino-Bold ISOF +font.25=Palatino-BoldItalic ISOF +font.26=Palatino-Italic ISOF +font.27=Palatino-Roman ISOF +font.28=Symbol findfont +font.29=Times-Bold ISOF +font.30=Times-BoldItalic ISOF +font.31=Times-Italic ISOF +font.32=Times-Roman ISOF +font.33=ZapfDingbats findfont +font.34=ZapfChancery-MediumItalic ISOF +# diff --git a/java21/lib/security/blocked.certs b/java21/lib/security/blocked.certs new file mode 100644 index 0000000000000000000000000000000000000000..4fd291b74fa5c9ee35ff87f78ab3593fed10d6e5 --- /dev/null +++ b/java21/lib/security/blocked.certs @@ -0,0 +1,39 @@ +Algorithm=SHA-256 +03DB9E5E79FE6117177F81C11595AF598CB176AF766290DBCEB2C318B32E39A2 +08C396C006A21055D00826A5781A5CCFCE2C8D053AB3C197637A4A7A5BB9A650 +14E6D2764A4B06701C6CBC376A253775F79C782FBCB6C0EE6F99DE4BA1024ADD +1C5E6985ACC09221DBD1A4B7BBC6D3A8C3F8540D19F20763A9537FDD42B4FFE7 +1F6BF8A3F2399AF7FD04516C2719C566CBAD51F412738F66D0457E1E6BDE6F2D +2A464E4113141352C7962FBD1706ED4B88533EF24D7BBA6CCC5D797FD202F1C4 +31C8FD37DB9B56E708B03D1F01848B068C6DA66F36FB5D82C008C6040FA3E133 +3946901F46B0071E90D78279E82FABABCA177231A704BE72C5B0E8918566EA66 +3E11CF90719F6FB44D94EAC9A156B89BEBE7B8598F28EC58913F2BFCAF91D0C0 +423279423B9FC8CB06F1BB7C3B247522B948D5F18939F378ECC901126DE40BFB +450F1B421BB05C8609854884559C323319619E8B06B001EA2DCBB74A23AA3BE2 +4CBBF8256BC9888A8007B2F386940A2E394378B0D903CBB3863C5A6394B889CE +4FEE0163686ECBD65DB968E7494F55D84B25486D438E9DE558D629D28CD4D176 +535D04DFCE027C70BD5F8A9E0AD4F218E9AFDCF5BBCF9B6DE0D81E148E2E3172 +568FAF38D9F155F624838E2181B1CEB4D8459305EE652B0F810C97C3611BFE19 +585CFE6B7436CBD4E732763A2137D7F49599BA9B1790E688FCEC799C58EB84A6 +5E83124D68D24E8E177E306DF643D5EA99C5A94D6FC34B072F7544A1CABB7C7B +71CB00749B9130FB2707A2664BFF958D0FCC8E161D9674C7450BA0FC2BEAF9D3 +76A45A496031E4DD2D7ED23E8F6FF97DBDEA980BAAC8B0BA94D7EDB551348645 +8A1BD21661C60015065212CC98B1ABB50DFD14C872A208E66BAE890F25C448AF +9ED8F9B0E8E42A1656B8E1DD18F42BA42DC06FE52686173BA2FC70E756F207DC +9FADCE80D62A959F9930D748488C1E22E821F4E1E4A43584B848C2FC11E04D77 +A686FEE577C88AB664D0787ECDFFF035F4806F3DE418DC9E4D516324FFF02083 +A90132CEA1D4F7185E4F688EFFD16F6AC14DFD78356A807599A5DABBEEF3333E +B8686723E415534BC0DBD16326F9486F85B0B0799BF6639334E61DAAE67F36CD +C0D1F42B9F4BF7ACC045B7BB5D4805E10737F67B6310CE505248D543D0D5FE07 +D0156949F1381943442C6974E9B5B49EF441BB799EF20477B90A89C3F33620CE +D151962D954970501C60079258EBCFA38502E0A9F03CD640322B08C0A3117FE5 +D24566BF315F4E597D6E381C87119FB4198F5E9E2607F5F4AB362EF7E2E7672F +D3A936E1A7775A45217C8296A1F22AC5631DCDEC45594099E78EEEBBEDCBA967 +D6CEAE5D9E047FAF7D797858D229AC991AD44316D1E2A37A21926D763153593A +DF21016B00FC54F9FE3BC8B039911BB216E9162FAD2FD14D990AB96E951B49BE +E0E740E4B0F8B3548181FF75B5372FAF4C70B99EC995D694ED0FB91B03FF8D21 +EC30C9C3065A06BB07DC5B1C6B497F370C1CA65C0F30C08E042BA6BCECC78F2C +F5B6F88F75D391A4B1EB336F9E201239FB6B1377DB8CFA7B84736216E5AFFFD7 +FBB12938ABD86C125796EDF4162D291028890A7D6C0C1CCA75FD4B95EBFA7A1A +FC02FD48DB92D4DCE6F11679D38354CF750CFC7F584A520EB90BDE80E241F2BD +FDEDB5BDFCB67411513A61AEE5CB5B5D7C52AF06028EFC996CC1B05B1D6CEA2B diff --git a/java21/lib/security/default.policy b/java21/lib/security/default.policy new file mode 100644 index 0000000000000000000000000000000000000000..2b26d0909ad541b2afae1867decbb5dd908f5ac3 --- /dev/null +++ b/java21/lib/security/default.policy @@ -0,0 +1,251 @@ +// +// Permissions required by modules stored in a run-time image and loaded +// by the platform class loader. +// +// NOTE that this file is not intended to be modified. If additional +// permissions need to be granted to the modules in this file, it is +// recommended that they be configured in a separate policy file or +// ${java.home}/conf/security/java.policy. +// + + +grant codeBase "jrt:/java.compiler" { + permission java.security.AllPermission; +}; + + +grant codeBase "jrt:/java.net.http" { + permission java.lang.RuntimePermission "accessClassInPackage.sun.net"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.net.util"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.net.www"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.misc"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.ref"; + permission java.lang.RuntimePermission "modifyThread"; + permission java.net.SocketPermission "*","connect,resolve"; + // required if the HTTPClient is configured to use a local bind address + permission java.net.SocketPermission "localhost:*","listen,resolve"; + permission java.net.URLPermission "http:*","*:*"; + permission java.net.URLPermission "https:*","*:*"; + permission java.net.URLPermission "ws:*","*:*"; + permission java.net.URLPermission "wss:*","*:*"; + permission java.net.URLPermission "socket:*","CONNECT"; // proxy + // For request/response body processors, fromFile, asFile + permission java.io.FilePermission "<>","read,write,delete"; + permission java.util.PropertyPermission "*","read"; + permission java.net.NetPermission "getProxySelector"; +}; + +grant codeBase "jrt:/java.scripting" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/java.security.jgss" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/java.smartcardio" { + permission javax.smartcardio.CardPermission "*", "*"; + permission java.lang.RuntimePermission "loadLibrary.j2pcsc"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.jca"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.util"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.util"; + permission java.util.PropertyPermission + "javax.smartcardio.TerminalFactory.DefaultType", "read"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "os.arch", "read"; + permission java.util.PropertyPermission "sun.arch.data.model", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.library", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.t0GetResponse", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.t1GetResponse", "read"; + permission java.util.PropertyPermission + "sun.security.smartcardio.t1StripLe", "read"; + // needed for looking up native PC/SC library + permission java.io.FilePermission "<>","read"; + permission java.security.SecurityPermission "putProviderProperty.SunPCSC"; + permission java.security.SecurityPermission + "clearProviderProperties.SunPCSC"; + permission java.security.SecurityPermission + "removeProviderProperty.SunPCSC"; +}; + +grant codeBase "jrt:/java.sql" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/java.sql.rowset" { + permission java.security.AllPermission; +}; + + +grant codeBase "jrt:/java.xml.crypto" { + permission java.lang.RuntimePermission + "getStackWalkerWithClassReference"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.util"; + permission java.util.PropertyPermission "*", "read"; + permission java.security.SecurityPermission "putProviderProperty.XMLDSig"; + permission java.security.SecurityPermission + "clearProviderProperties.XMLDSig"; + permission java.security.SecurityPermission + "removeProviderProperty.XMLDSig"; + permission java.security.SecurityPermission + "com.sun.org.apache.xml.internal.security.register"; + permission java.security.SecurityPermission + "getProperty.jdk.xml.dsig.hereFunctionSupported"; + permission java.security.SecurityPermission + "getProperty.jdk.xml.dsig.secureValidationPolicy"; + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.org.apache.xml.internal.*"; + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.org.apache.xpath.internal"; + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.org.apache.xpath.internal.*"; + permission java.io.FilePermission "<>","read"; + permission java.net.SocketPermission "*", "connect,resolve"; +}; + + +grant codeBase "jrt:/jdk.accessibility" { + permission java.lang.RuntimePermission "accessClassInPackage.sun.awt"; +}; + +grant codeBase "jrt:/jdk.charsets" { + permission java.util.PropertyPermission "os.name", "read"; + permission java.lang.RuntimePermission "charsetProvider"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.access"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.misc"; + permission java.lang.RuntimePermission + "accessClassInPackage.jdk.internal.util"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.nio.cs"; +}; + +grant codeBase "jrt:/jdk.crypto.ec" { + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.*"; + permission java.lang.RuntimePermission "loadLibrary.sunec"; + permission java.security.SecurityPermission "putProviderProperty.SunEC"; + permission java.security.SecurityPermission "clearProviderProperties.SunEC"; + permission java.security.SecurityPermission "removeProviderProperty.SunEC"; +}; + +grant codeBase "jrt:/jdk.crypto.cryptoki" { + permission java.lang.RuntimePermission + "accessClassInPackage.com.sun.crypto.provider"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.misc"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.access"; + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.*"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.nio.ch"; + permission java.lang.RuntimePermission "loadLibrary.j2pkcs11"; + permission java.util.PropertyPermission "sun.security.pkcs11.allowSingleThreadedModules", "read"; + permission java.util.PropertyPermission "sun.security.pkcs11.disableKeyExtraction", "read"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "os.arch", "read"; + permission java.util.PropertyPermission "jdk.crypto.KeyAgreement.legacyKDF", "read"; + permission java.security.SecurityPermission "putProviderProperty.*"; + permission java.security.SecurityPermission "clearProviderProperties.*"; + permission java.security.SecurityPermission "removeProviderProperty.*"; + permission java.security.SecurityPermission + "getProperty.auth.login.defaultCallbackHandler"; + permission java.security.SecurityPermission "authProvider.*"; + // Needed for reading PKCS11 config file and NSS library check + permission java.io.FilePermission "<>", "read"; +}; + +grant codeBase "jrt:/jdk.dynalink" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.httpserver" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.internal.le" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.internal.vm.compiler" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.internal.vm.compiler.management" { + permission java.lang.RuntimePermission "accessClassInPackage.jdk.internal.vm.compiler.collections"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.vm.ci.runtime"; + permission java.lang.RuntimePermission "accessClassInPackage.jdk.vm.ci.services"; + permission java.lang.RuntimePermission "accessClassInPackage.org.graalvm.compiler.core.common"; + permission java.lang.RuntimePermission "accessClassInPackage.org.graalvm.compiler.debug"; + permission java.lang.RuntimePermission "accessClassInPackage.org.graalvm.compiler.hotspot"; + permission java.lang.RuntimePermission "accessClassInPackage.org.graalvm.compiler.options"; + permission java.lang.RuntimePermission "accessClassInPackage.org.graalvm.compiler.phases.common.jmx"; + permission java.lang.RuntimePermission "accessClassInPackage.org.graalvm.compiler.serviceprovider"; +}; + +grant codeBase "jrt:/jdk.jsobject" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.localedata" { + permission java.lang.RuntimePermission "accessClassInPackage.sun.text.*"; + permission java.lang.RuntimePermission "accessClassInPackage.sun.util.*"; +}; + +grant codeBase "jrt:/jdk.naming.dns" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.scripting.nashorn" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.scripting.nashorn.shell" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.security.auth" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.security.jgss" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.zipfs" { + permission java.io.FilePermission "<>", "read,write,delete"; + permission java.lang.RuntimePermission "fileSystemProvider"; + permission java.lang.RuntimePermission "accessUserInformation"; + permission java.util.PropertyPermission "os.name", "read"; + permission java.util.PropertyPermission "user.dir", "read"; + permission java.util.PropertyPermission "user.name", "read"; +}; + +// permissions needed by applications using java.desktop module +grant { + permission java.lang.RuntimePermission "accessClassInPackage.com.sun.beans"; + permission java.lang.RuntimePermission "accessClassInPackage.com.sun.beans.*"; + permission java.lang.RuntimePermission "accessClassInPackage.com.sun.java.swing.plaf.*"; + permission java.lang.RuntimePermission "accessClassInPackage.com.apple.*"; +}; +grant codeBase "jrt:/jdk.accessibility" { + permission java.security.AllPermission; +}; + +grant codeBase "jrt:/jdk.crypto.mscapi" { + permission java.lang.RuntimePermission + "accessClassInPackage.sun.security.*"; + permission java.lang.RuntimePermission "loadLibrary.sunmscapi"; + permission java.security.SecurityPermission "putProviderProperty.SunMSCAPI"; + permission java.security.SecurityPermission + "clearProviderProperties.SunMSCAPI"; + permission java.security.SecurityPermission + "removeProviderProperty.SunMSCAPI"; + permission java.security.SecurityPermission "authProvider.SunMSCAPI"; + permission java.util.PropertyPermission "*", "read"; +}; diff --git a/java21/lib/tzmappings b/java21/lib/tzmappings new file mode 100644 index 0000000000000000000000000000000000000000..9f6b1553813992f497795c2a9f14e315149e6381 --- /dev/null +++ b/java21/lib/tzmappings @@ -0,0 +1,506 @@ +AUS Central Standard Time:AU:Australia/Darwin: +AUS Central Standard Time:001:Australia/Darwin: +AUS Eastern Standard Time:AU:Australia/Sydney: +AUS Eastern Standard Time:001:Australia/Sydney: +Afghanistan Standard Time:AF:Asia/Kabul: +Afghanistan Standard Time:001:Asia/Kabul: +Alaskan Standard Time:US:America/Anchorage: +Alaskan Standard Time:001:America/Anchorage: +Aleutian Standard Time:US:America/Adak: +Aleutian Standard Time:001:America/Adak: +Altai Standard Time:RU:Asia/Barnaul: +Altai Standard Time:001:Asia/Barnaul: +Arab Standard Time:BH:Asia/Bahrain: +Arab Standard Time:KW:Asia/Kuwait: +Arab Standard Time:QA:Asia/Qatar: +Arab Standard Time:SA:Asia/Riyadh: +Arab Standard Time:YE:Asia/Aden: +Arab Standard Time:001:Asia/Riyadh: +Arabian Standard Time:AE:Asia/Dubai: +Arabian Standard Time:OM:Asia/Muscat: +Arabian Standard Time:ZZ:Etc/GMT-4: +Arabian Standard Time:001:Asia/Dubai: +Arabic Standard Time:IQ:Asia/Baghdad: +Arabic Standard Time:001:Asia/Baghdad: +Argentina Standard Time:AR:America/Buenos_Aires: +Argentina Standard Time:001:America/Buenos_Aires: +Astrakhan Standard Time:RU:Europe/Astrakhan: +Astrakhan Standard Time:001:Europe/Astrakhan: +Atlantic Standard Time:BM:Atlantic/Bermuda: +Atlantic Standard Time:CA:America/Halifax: +Atlantic Standard Time:GL:America/Thule: +Atlantic Standard Time:001:America/Halifax: +Aus Central W. Standard Time:AU:Australia/Eucla: +Aus Central W. Standard Time:001:Australia/Eucla: +Azerbaijan Standard Time:AZ:Asia/Baku: +Azerbaijan Standard Time:001:Asia/Baku: +Azores Standard Time:GL:America/Scoresbysund: +Azores Standard Time:PT:Atlantic/Azores: +Azores Standard Time:001:Atlantic/Azores: +Bahia Standard Time:BR:America/Bahia: +Bahia Standard Time:001:America/Bahia: +Bangladesh Standard Time:BD:Asia/Dhaka: +Bangladesh Standard Time:BT:Asia/Thimphu: +Bangladesh Standard Time:001:Asia/Dhaka: +Belarus Standard Time:BY:Europe/Minsk: +Belarus Standard Time:001:Europe/Minsk: +Bougainville Standard Time:PG:Pacific/Bougainville: +Bougainville Standard Time:001:Pacific/Bougainville: +Canada Central Standard Time:CA:America/Regina: +Canada Central Standard Time:001:America/Regina: +Cape Verde Standard Time:CV:Atlantic/Cape_Verde: +Cape Verde Standard Time:ZZ:Etc/GMT+1: +Cape Verde Standard Time:001:Atlantic/Cape_Verde: +Caucasus Standard Time:AM:Asia/Yerevan: +Caucasus Standard Time:001:Asia/Yerevan: +Cen. Australia Standard Time:AU:Australia/Adelaide: +Cen. Australia Standard Time:001:Australia/Adelaide: +Central America Standard Time:BZ:America/Belize: +Central America Standard Time:CR:America/Costa_Rica: +Central America Standard Time:EC:Pacific/Galapagos: +Central America Standard Time:GT:America/Guatemala: +Central America Standard Time:HN:America/Tegucigalpa: +Central America Standard Time:NI:America/Managua: +Central America Standard Time:SV:America/El_Salvador: +Central America Standard Time:ZZ:Etc/GMT+6: +Central America Standard Time:001:America/Guatemala: +Central Asia Standard Time:AQ:Antarctica/Vostok: +Central Asia Standard Time:CN:Asia/Urumqi: +Central Asia Standard Time:IO:Indian/Chagos: +Central Asia Standard Time:KG:Asia/Bishkek: +Central Asia Standard Time:KZ:Asia/Almaty: +Central Asia Standard Time:ZZ:Etc/GMT-6: +Central Asia Standard Time:001:Asia/Almaty: +Central Brazilian Standard Time:BR:America/Cuiaba: +Central Brazilian Standard Time:001:America/Cuiaba: +Central Europe Standard Time:AL:Europe/Tirane: +Central Europe Standard Time:CZ:Europe/Prague: +Central Europe Standard Time:HU:Europe/Budapest: +Central Europe Standard Time:ME:Europe/Podgorica: +Central Europe Standard Time:RS:Europe/Belgrade: +Central Europe Standard Time:SI:Europe/Ljubljana: +Central Europe Standard Time:SK:Europe/Bratislava: +Central Europe Standard Time:001:Europe/Budapest: +Central European Standard Time:BA:Europe/Sarajevo: +Central European Standard Time:HR:Europe/Zagreb: +Central European Standard Time:MK:Europe/Skopje: +Central European Standard Time:PL:Europe/Warsaw: +Central European Standard Time:001:Europe/Warsaw: +Central Pacific Standard Time:AQ:Antarctica/Casey: +Central Pacific Standard Time:FM:Pacific/Ponape: +Central Pacific Standard Time:NC:Pacific/Noumea: +Central Pacific Standard Time:SB:Pacific/Guadalcanal: +Central Pacific Standard Time:VU:Pacific/Efate: +Central Pacific Standard Time:ZZ:Etc/GMT-11: +Central Pacific Standard Time:001:Pacific/Guadalcanal: +Central Standard Time:CA:America/Winnipeg: +Central Standard Time:MX:America/Matamoros: +Central Standard Time:US:America/Chicago: +Central Standard Time:ZZ:CST6CDT: +Central Standard Time:001:America/Chicago: +Central Standard Time (Mexico):MX:America/Mexico_City: +Central Standard Time (Mexico):001:America/Mexico_City: +Chatham Islands Standard Time:NZ:Pacific/Chatham: +Chatham Islands Standard Time:001:Pacific/Chatham: +China Standard Time:CN:Asia/Shanghai: +China Standard Time:HK:Asia/Hong_Kong: +China Standard Time:MO:Asia/Macau: +China Standard Time:001:Asia/Shanghai: +Cuba Standard Time:CU:America/Havana: +Cuba Standard Time:001:America/Havana: +Dateline Standard Time:ZZ:Etc/GMT+12: +Dateline Standard Time:001:Etc/GMT+12: +E. Africa Standard Time:AQ:Antarctica/Syowa: +E. Africa Standard Time:DJ:Africa/Djibouti: +E. Africa Standard Time:ER:Africa/Asmera: +E. Africa Standard Time:ET:Africa/Addis_Ababa: +E. Africa Standard Time:KE:Africa/Nairobi: +E. Africa Standard Time:KM:Indian/Comoro: +E. Africa Standard Time:MG:Indian/Antananarivo: +E. Africa Standard Time:SO:Africa/Mogadishu: +E. Africa Standard Time:TZ:Africa/Dar_es_Salaam: +E. Africa Standard Time:UG:Africa/Kampala: +E. Africa Standard Time:YT:Indian/Mayotte: +E. Africa Standard Time:ZZ:Etc/GMT-3: +E. Africa Standard Time:001:Africa/Nairobi: +E. Australia Standard Time:AU:Australia/Brisbane: +E. Australia Standard Time:001:Australia/Brisbane: +E. Europe Standard Time:MD:Europe/Chisinau: +E. Europe Standard Time:001:Europe/Chisinau: +E. South America Standard Time:BR:America/Sao_Paulo: +E. South America Standard Time:001:America/Sao_Paulo: +Easter Island Standard Time:CL:Pacific/Easter: +Easter Island Standard Time:001:Pacific/Easter: +Eastern Standard Time:BS:America/Nassau: +Eastern Standard Time:CA:America/Toronto: +Eastern Standard Time:US:America/New_York: +Eastern Standard Time:ZZ:EST5EDT: +Eastern Standard Time:001:America/New_York: +Eastern Standard Time (Mexico):MX:America/Cancun: +Eastern Standard Time (Mexico):001:America/Cancun: +Egypt Standard Time:EG:Africa/Cairo: +Egypt Standard Time:001:Africa/Cairo: +Ekaterinburg Standard Time:RU:Asia/Yekaterinburg: +Ekaterinburg Standard Time:001:Asia/Yekaterinburg: +FLE Standard Time:AX:Europe/Mariehamn: +FLE Standard Time:BG:Europe/Sofia: +FLE Standard Time:EE:Europe/Tallinn: +FLE Standard Time:FI:Europe/Helsinki: +FLE Standard Time:LT:Europe/Vilnius: +FLE Standard Time:LV:Europe/Riga: +FLE Standard Time:UA:Europe/Kiev: +FLE Standard Time:001:Europe/Kiev: +Fiji Standard Time:FJ:Pacific/Fiji: +Fiji Standard Time:001:Pacific/Fiji: +GMT Standard Time:ES:Atlantic/Canary: +GMT Standard Time:FO:Atlantic/Faeroe: +GMT Standard Time:GB:Europe/London: +GMT Standard Time:GG:Europe/Guernsey: +GMT Standard Time:IE:Europe/Dublin: +GMT Standard Time:IM:Europe/Isle_of_Man: +GMT Standard Time:JE:Europe/Jersey: +GMT Standard Time:PT:Europe/Lisbon: +GMT Standard Time:001:Europe/London: +GTB Standard Time:CY:Asia/Nicosia: +GTB Standard Time:GR:Europe/Athens: +GTB Standard Time:RO:Europe/Bucharest: +GTB Standard Time:001:Europe/Bucharest: +Georgian Standard Time:GE:Asia/Tbilisi: +Georgian Standard Time:001:Asia/Tbilisi: +Greenland Standard Time:GL:America/Godthab: +Greenland Standard Time:001:America/Godthab: +Greenwich Standard Time:BF:Africa/Ouagadougou: +Greenwich Standard Time:CI:Africa/Abidjan: +Greenwich Standard Time:GH:Africa/Accra: +Greenwich Standard Time:GL:America/Danmarkshavn: +Greenwich Standard Time:GM:Africa/Banjul: +Greenwich Standard Time:GN:Africa/Conakry: +Greenwich Standard Time:GW:Africa/Bissau: +Greenwich Standard Time:IS:Atlantic/Reykjavik: +Greenwich Standard Time:LR:Africa/Monrovia: +Greenwich Standard Time:ML:Africa/Bamako: +Greenwich Standard Time:MR:Africa/Nouakchott: +Greenwich Standard Time:SH:Atlantic/St_Helena: +Greenwich Standard Time:SL:Africa/Freetown: +Greenwich Standard Time:SN:Africa/Dakar: +Greenwich Standard Time:TG:Africa/Lome: +Greenwich Standard Time:001:Atlantic/Reykjavik: +Haiti Standard Time:HT:America/Port-au-Prince: +Haiti Standard Time:001:America/Port-au-Prince: +Hawaiian Standard Time:CK:Pacific/Rarotonga: +Hawaiian Standard Time:PF:Pacific/Tahiti: +Hawaiian Standard Time:UM:Pacific/Johnston: +Hawaiian Standard Time:US:Pacific/Honolulu: +Hawaiian Standard Time:ZZ:Etc/GMT+10: +Hawaiian Standard Time:001:Pacific/Honolulu: +India Standard Time:IN:Asia/Calcutta: +India Standard Time:001:Asia/Calcutta: +Iran Standard Time:IR:Asia/Tehran: +Iran Standard Time:001:Asia/Tehran: +Israel Standard Time:IL:Asia/Jerusalem: +Israel Standard Time:001:Asia/Jerusalem: +Jordan Standard Time:JO:Asia/Amman: +Jordan Standard Time:001:Asia/Amman: +Kaliningrad Standard Time:RU:Europe/Kaliningrad: +Kaliningrad Standard Time:001:Europe/Kaliningrad: +Korea Standard Time:KR:Asia/Seoul: +Korea Standard Time:001:Asia/Seoul: +Libya Standard Time:LY:Africa/Tripoli: +Libya Standard Time:001:Africa/Tripoli: +Line Islands Standard Time:KI:Pacific/Kiritimati: +Line Islands Standard Time:ZZ:Etc/GMT-14: +Line Islands Standard Time:001:Pacific/Kiritimati: +Lord Howe Standard Time:AU:Australia/Lord_Howe: +Lord Howe Standard Time:001:Australia/Lord_Howe: +Magadan Standard Time:RU:Asia/Magadan: +Magadan Standard Time:001:Asia/Magadan: +Magallanes Standard Time:CL:America/Punta_Arenas: +Magallanes Standard Time:001:America/Punta_Arenas: +Marquesas Standard Time:PF:Pacific/Marquesas: +Marquesas Standard Time:001:Pacific/Marquesas: +Mauritius Standard Time:MU:Indian/Mauritius: +Mauritius Standard Time:RE:Indian/Reunion: +Mauritius Standard Time:SC:Indian/Mahe: +Mauritius Standard Time:001:Indian/Mauritius: +Middle East Standard Time:LB:Asia/Beirut: +Middle East Standard Time:001:Asia/Beirut: +Montevideo Standard Time:UY:America/Montevideo: +Montevideo Standard Time:001:America/Montevideo: +Morocco Standard Time:EH:Africa/El_Aaiun: +Morocco Standard Time:MA:Africa/Casablanca: +Morocco Standard Time:001:Africa/Casablanca: +Mountain Standard Time:CA:America/Edmonton: +Mountain Standard Time:MX:America/Ciudad_Juarez: +Mountain Standard Time:US:America/Denver: +Mountain Standard Time:ZZ:MST7MDT: +Mountain Standard Time:001:America/Denver: +Mountain Standard Time (Mexico):MX:America/Mazatlan: +Mountain Standard Time (Mexico):001:America/Mazatlan: +Myanmar Standard Time:CC:Indian/Cocos: +Myanmar Standard Time:MM:Asia/Rangoon: +Myanmar Standard Time:001:Asia/Rangoon: +N. Central Asia Standard Time:RU:Asia/Novosibirsk: +N. Central Asia Standard Time:001:Asia/Novosibirsk: +Namibia Standard Time:NA:Africa/Windhoek: +Namibia Standard Time:001:Africa/Windhoek: +Nepal Standard Time:NP:Asia/Katmandu: +Nepal Standard Time:001:Asia/Katmandu: +New Zealand Standard Time:AQ:Antarctica/McMurdo: +New Zealand Standard Time:NZ:Pacific/Auckland: +New Zealand Standard Time:001:Pacific/Auckland: +Newfoundland Standard Time:CA:America/St_Johns: +Newfoundland Standard Time:001:America/St_Johns: +Norfolk Standard Time:NF:Pacific/Norfolk: +Norfolk Standard Time:001:Pacific/Norfolk: +North Asia East Standard Time:RU:Asia/Irkutsk: +North Asia East Standard Time:001:Asia/Irkutsk: +North Asia Standard Time:RU:Asia/Krasnoyarsk: +North Asia Standard Time:001:Asia/Krasnoyarsk: +North Korea Standard Time:KP:Asia/Pyongyang: +North Korea Standard Time:001:Asia/Pyongyang: +Omsk Standard Time:RU:Asia/Omsk: +Omsk Standard Time:001:Asia/Omsk: +Pacific SA Standard Time:CL:America/Santiago: +Pacific SA Standard Time:001:America/Santiago: +Pacific Standard Time:CA:America/Vancouver: +Pacific Standard Time:US:America/Los_Angeles: +Pacific Standard Time:ZZ:PST8PDT: +Pacific Standard Time:001:America/Los_Angeles: +Pacific Standard Time (Mexico):MX:America/Tijuana: +Pacific Standard Time (Mexico):001:America/Tijuana: +Pakistan Standard Time:PK:Asia/Karachi: +Pakistan Standard Time:001:Asia/Karachi: +Paraguay Standard Time:PY:America/Asuncion: +Paraguay Standard Time:001:America/Asuncion: +Qyzylorda Standard Time:KZ:Asia/Qyzylorda: +Qyzylorda Standard Time:001:Asia/Qyzylorda: +Romance Standard Time:BE:Europe/Brussels: +Romance Standard Time:DK:Europe/Copenhagen: +Romance Standard Time:ES:Europe/Madrid: +Romance Standard Time:FR:Europe/Paris: +Romance Standard Time:001:Europe/Paris: +Russia Time Zone 10:RU:Asia/Srednekolymsk: +Russia Time Zone 10:001:Asia/Srednekolymsk: +Russia Time Zone 11:RU:Asia/Kamchatka: +Russia Time Zone 11:001:Asia/Kamchatka: +Russia Time Zone 3:RU:Europe/Samara: +Russia Time Zone 3:001:Europe/Samara: +Russian Standard Time:RU:Europe/Moscow: +Russian Standard Time:UA:Europe/Simferopol: +Russian Standard Time:001:Europe/Moscow: +SA Eastern Standard Time:AQ:Antarctica/Rothera: +SA Eastern Standard Time:BR:America/Fortaleza: +SA Eastern Standard Time:FK:Atlantic/Stanley: +SA Eastern Standard Time:GF:America/Cayenne: +SA Eastern Standard Time:SR:America/Paramaribo: +SA Eastern Standard Time:ZZ:Etc/GMT+3: +SA Eastern Standard Time:001:America/Cayenne: +SA Pacific Standard Time:BR:America/Rio_Branco: +SA Pacific Standard Time:CA:America/Coral_Harbour: +SA Pacific Standard Time:CO:America/Bogota: +SA Pacific Standard Time:EC:America/Guayaquil: +SA Pacific Standard Time:JM:America/Jamaica: +SA Pacific Standard Time:KY:America/Cayman: +SA Pacific Standard Time:PA:America/Panama: +SA Pacific Standard Time:PE:America/Lima: +SA Pacific Standard Time:ZZ:Etc/GMT+5: +SA Pacific Standard Time:001:America/Bogota: +SA Western Standard Time:AG:America/Antigua: +SA Western Standard Time:AI:America/Anguilla: +SA Western Standard Time:AW:America/Aruba: +SA Western Standard Time:BB:America/Barbados: +SA Western Standard Time:BL:America/St_Barthelemy: +SA Western Standard Time:BO:America/La_Paz: +SA Western Standard Time:BQ:America/Kralendijk: +SA Western Standard Time:BR:America/Manaus: +SA Western Standard Time:CA:America/Blanc-Sablon: +SA Western Standard Time:CW:America/Curacao: +SA Western Standard Time:DM:America/Dominica: +SA Western Standard Time:DO:America/Santo_Domingo: +SA Western Standard Time:GD:America/Grenada: +SA Western Standard Time:GP:America/Guadeloupe: +SA Western Standard Time:GY:America/Guyana: +SA Western Standard Time:KN:America/St_Kitts: +SA Western Standard Time:LC:America/St_Lucia: +SA Western Standard Time:MF:America/Marigot: +SA Western Standard Time:MQ:America/Martinique: +SA Western Standard Time:MS:America/Montserrat: +SA Western Standard Time:PR:America/Puerto_Rico: +SA Western Standard Time:SX:America/Lower_Princes: +SA Western Standard Time:TT:America/Port_of_Spain: +SA Western Standard Time:VC:America/St_Vincent: +SA Western Standard Time:VG:America/Tortola: +SA Western Standard Time:VI:America/St_Thomas: +SA Western Standard Time:ZZ:Etc/GMT+4: +SA Western Standard Time:001:America/La_Paz: +SE Asia Standard Time:AQ:Antarctica/Davis: +SE Asia Standard Time:CX:Indian/Christmas: +SE Asia Standard Time:ID:Asia/Jakarta: +SE Asia Standard Time:KH:Asia/Phnom_Penh: +SE Asia Standard Time:LA:Asia/Vientiane: +SE Asia Standard Time:TH:Asia/Bangkok: +SE Asia Standard Time:VN:Asia/Saigon: +SE Asia Standard Time:ZZ:Etc/GMT-7: +SE Asia Standard Time:001:Asia/Bangkok: +Saint Pierre Standard Time:PM:America/Miquelon: +Saint Pierre Standard Time:001:America/Miquelon: +Sakhalin Standard Time:RU:Asia/Sakhalin: +Sakhalin Standard Time:001:Asia/Sakhalin: +Samoa Standard Time:WS:Pacific/Apia: +Samoa Standard Time:001:Pacific/Apia: +Sao Tome Standard Time:ST:Africa/Sao_Tome: +Sao Tome Standard Time:001:Africa/Sao_Tome: +Saratov Standard Time:RU:Europe/Saratov: +Saratov Standard Time:001:Europe/Saratov: +Singapore Standard Time:BN:Asia/Brunei: +Singapore Standard Time:ID:Asia/Makassar: +Singapore Standard Time:MY:Asia/Kuala_Lumpur: +Singapore Standard Time:PH:Asia/Manila: +Singapore Standard Time:SG:Asia/Singapore: +Singapore Standard Time:ZZ:Etc/GMT-8: +Singapore Standard Time:001:Asia/Singapore: +South Africa Standard Time:BI:Africa/Bujumbura: +South Africa Standard Time:BW:Africa/Gaborone: +South Africa Standard Time:CD:Africa/Lubumbashi: +South Africa Standard Time:LS:Africa/Maseru: +South Africa Standard Time:MW:Africa/Blantyre: +South Africa Standard Time:MZ:Africa/Maputo: +South Africa Standard Time:RW:Africa/Kigali: +South Africa Standard Time:SZ:Africa/Mbabane: +South Africa Standard Time:ZA:Africa/Johannesburg: +South Africa Standard Time:ZM:Africa/Lusaka: +South Africa Standard Time:ZW:Africa/Harare: +South Africa Standard Time:ZZ:Etc/GMT-2: +South Africa Standard Time:001:Africa/Johannesburg: +South Sudan Standard Time:SS:Africa/Juba: +South Sudan Standard Time:001:Africa/Juba: +Sri Lanka Standard Time:LK:Asia/Colombo: +Sri Lanka Standard Time:001:Asia/Colombo: +Sudan Standard Time:SD:Africa/Khartoum: +Sudan Standard Time:001:Africa/Khartoum: +Syria Standard Time:SY:Asia/Damascus: +Syria Standard Time:001:Asia/Damascus: +Taipei Standard Time:TW:Asia/Taipei: +Taipei Standard Time:001:Asia/Taipei: +Tasmania Standard Time:AU:Australia/Hobart: +Tasmania Standard Time:001:Australia/Hobart: +Tocantins Standard Time:BR:America/Araguaina: +Tocantins Standard Time:001:America/Araguaina: +Tokyo Standard Time:ID:Asia/Jayapura: +Tokyo Standard Time:JP:Asia/Tokyo: +Tokyo Standard Time:PW:Pacific/Palau: +Tokyo Standard Time:TL:Asia/Dili: +Tokyo Standard Time:ZZ:Etc/GMT-9: +Tokyo Standard Time:001:Asia/Tokyo: +Tomsk Standard Time:RU:Asia/Tomsk: +Tomsk Standard Time:001:Asia/Tomsk: +Tonga Standard Time:TO:Pacific/Tongatapu: +Tonga Standard Time:001:Pacific/Tongatapu: +Transbaikal Standard Time:RU:Asia/Chita: +Transbaikal Standard Time:001:Asia/Chita: +Turkey Standard Time:TR:Europe/Istanbul: +Turkey Standard Time:001:Europe/Istanbul: +Turks And Caicos Standard Time:TC:America/Grand_Turk: +Turks And Caicos Standard Time:001:America/Grand_Turk: +US Eastern Standard Time:US:America/Indianapolis: +US Eastern Standard Time:001:America/Indianapolis: +US Mountain Standard Time:CA:America/Creston: +US Mountain Standard Time:MX:America/Hermosillo: +US Mountain Standard Time:US:America/Phoenix: +US Mountain Standard Time:ZZ:Etc/GMT+7: +US Mountain Standard Time:001:America/Phoenix: +UTC:ZZ:Etc/UTC: +UTC:001:Etc/UTC: +UTC+12:KI:Pacific/Tarawa: +UTC+12:MH:Pacific/Majuro: +UTC+12:NR:Pacific/Nauru: +UTC+12:TV:Pacific/Funafuti: +UTC+12:UM:Pacific/Wake: +UTC+12:WF:Pacific/Wallis: +UTC+12:ZZ:Etc/GMT-12: +UTC+12:001:Etc/GMT-12: +UTC+13:KI:Pacific/Enderbury: +UTC+13:TK:Pacific/Fakaofo: +UTC+13:ZZ:Etc/GMT-13: +UTC+13:001:Etc/GMT-13: +UTC-02:BR:America/Noronha: +UTC-02:GS:Atlantic/South_Georgia: +UTC-02:ZZ:Etc/GMT+2: +UTC-02:001:Etc/GMT+2: +UTC-08:PN:Pacific/Pitcairn: +UTC-08:ZZ:Etc/GMT+8: +UTC-08:001:Etc/GMT+8: +UTC-09:PF:Pacific/Gambier: +UTC-09:ZZ:Etc/GMT+9: +UTC-09:001:Etc/GMT+9: +UTC-11:AS:Pacific/Pago_Pago: +UTC-11:NU:Pacific/Niue: +UTC-11:UM:Pacific/Midway: +UTC-11:ZZ:Etc/GMT+11: +UTC-11:001:Etc/GMT+11: +Ulaanbaatar Standard Time:MN:Asia/Ulaanbaatar: +Ulaanbaatar Standard Time:001:Asia/Ulaanbaatar: +Venezuela Standard Time:VE:America/Caracas: +Venezuela Standard Time:001:America/Caracas: +Vladivostok Standard Time:RU:Asia/Vladivostok: +Vladivostok Standard Time:001:Asia/Vladivostok: +Volgograd Standard Time:RU:Europe/Volgograd: +Volgograd Standard Time:001:Europe/Volgograd: +W. Australia Standard Time:AU:Australia/Perth: +W. Australia Standard Time:001:Australia/Perth: +W. Central Africa Standard Time:AO:Africa/Luanda: +W. Central Africa Standard Time:BJ:Africa/Porto-Novo: +W. Central Africa Standard Time:CD:Africa/Kinshasa: +W. Central Africa Standard Time:CF:Africa/Bangui: +W. Central Africa Standard Time:CG:Africa/Brazzaville: +W. Central Africa Standard Time:CM:Africa/Douala: +W. Central Africa Standard Time:DZ:Africa/Algiers: +W. Central Africa Standard Time:GA:Africa/Libreville: +W. Central Africa Standard Time:GQ:Africa/Malabo: +W. Central Africa Standard Time:NE:Africa/Niamey: +W. Central Africa Standard Time:NG:Africa/Lagos: +W. Central Africa Standard Time:TD:Africa/Ndjamena: +W. Central Africa Standard Time:TN:Africa/Tunis: +W. Central Africa Standard Time:ZZ:Etc/GMT-1: +W. Central Africa Standard Time:001:Africa/Lagos: +W. Europe Standard Time:AD:Europe/Andorra: +W. Europe Standard Time:AT:Europe/Vienna: +W. Europe Standard Time:CH:Europe/Zurich: +W. Europe Standard Time:DE:Europe/Berlin: +W. Europe Standard Time:GI:Europe/Gibraltar: +W. Europe Standard Time:IT:Europe/Rome: +W. Europe Standard Time:LI:Europe/Vaduz: +W. Europe Standard Time:LU:Europe/Luxembourg: +W. Europe Standard Time:MC:Europe/Monaco: +W. Europe Standard Time:MT:Europe/Malta: +W. Europe Standard Time:NL:Europe/Amsterdam: +W. Europe Standard Time:NO:Europe/Oslo: +W. Europe Standard Time:SE:Europe/Stockholm: +W. Europe Standard Time:SJ:Arctic/Longyearbyen: +W. Europe Standard Time:SM:Europe/San_Marino: +W. Europe Standard Time:VA:Europe/Vatican: +W. Europe Standard Time:001:Europe/Berlin: +W. Mongolia Standard Time:MN:Asia/Hovd: +W. Mongolia Standard Time:001:Asia/Hovd: +West Asia Standard Time:AQ:Antarctica/Mawson: +West Asia Standard Time:KZ:Asia/Oral: +West Asia Standard Time:MV:Indian/Maldives: +West Asia Standard Time:TF:Indian/Kerguelen: +West Asia Standard Time:TJ:Asia/Dushanbe: +West Asia Standard Time:TM:Asia/Ashgabat: +West Asia Standard Time:UZ:Asia/Tashkent: +West Asia Standard Time:ZZ:Etc/GMT-5: +West Asia Standard Time:001:Asia/Tashkent: +West Bank Standard Time:PS:Asia/Hebron: +West Bank Standard Time:001:Asia/Hebron: +West Pacific Standard Time:AQ:Antarctica/DumontDUrville: +West Pacific Standard Time:FM:Pacific/Truk: +West Pacific Standard Time:GU:Pacific/Guam: +West Pacific Standard Time:MP:Pacific/Saipan: +West Pacific Standard Time:PG:Pacific/Port_Moresby: +West Pacific Standard Time:ZZ:Etc/GMT-10: +West Pacific Standard Time:001:Pacific/Port_Moresby: +Yakutsk Standard Time:RU:Asia/Yakutsk: +Yakutsk Standard Time:001:Asia/Yakutsk: +Yukon Standard Time:CA:America/Whitehorse: +Yukon Standard Time:001:America/Whitehorse: diff --git a/llvm/include/clang-c/BuildSystem.h b/llvm/include/clang-c/BuildSystem.h new file mode 100644 index 0000000000000000000000000000000000000000..57e16af20a70065013b2f29bca7aaa21ed585a57 --- /dev/null +++ b/llvm/include/clang-c/BuildSystem.h @@ -0,0 +1,153 @@ +/*==-- clang-c/BuildSystem.h - Utilities for use by build systems -*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides various utilities for use by build systems. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_BUILDSYSTEM_H +#define LLVM_CLANG_C_BUILDSYSTEM_H + +#include "clang-c/CXErrorCode.h" +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * \defgroup BUILD_SYSTEM Build system utilities + * @{ + */ + +/** + * Return the timestamp for use with Clang's + * \c -fbuild-session-timestamp= option. + */ +CINDEX_LINKAGE unsigned long long clang_getBuildSessionTimestamp(void); + +/** + * Object encapsulating information about overlaying virtual + * file/directories over the real file system. + */ +typedef struct CXVirtualFileOverlayImpl *CXVirtualFileOverlay; + +/** + * Create a \c CXVirtualFileOverlay object. + * Must be disposed with \c clang_VirtualFileOverlay_dispose(). + * + * \param options is reserved, always pass 0. + */ +CINDEX_LINKAGE CXVirtualFileOverlay +clang_VirtualFileOverlay_create(unsigned options); + +/** + * Map an absolute virtual file path to an absolute real one. + * The virtual path must be canonicalized (not contain "."/".."). + * \returns 0 for success, non-zero to indicate an error. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_VirtualFileOverlay_addFileMapping(CXVirtualFileOverlay, + const char *virtualPath, + const char *realPath); + +/** + * Set the case sensitivity for the \c CXVirtualFileOverlay object. + * The \c CXVirtualFileOverlay object is case-sensitive by default, this + * option can be used to override the default. + * \returns 0 for success, non-zero to indicate an error. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_VirtualFileOverlay_setCaseSensitivity(CXVirtualFileOverlay, + int caseSensitive); + +/** + * Write out the \c CXVirtualFileOverlay object to a char buffer. + * + * \param options is reserved, always pass 0. + * \param out_buffer_ptr pointer to receive the buffer pointer, which should be + * disposed using \c clang_free(). + * \param out_buffer_size pointer to receive the buffer size. + * \returns 0 for success, non-zero to indicate an error. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_VirtualFileOverlay_writeToBuffer(CXVirtualFileOverlay, unsigned options, + char **out_buffer_ptr, + unsigned *out_buffer_size); + +/** + * free memory allocated by libclang, such as the buffer returned by + * \c CXVirtualFileOverlay() or \c clang_ModuleMapDescriptor_writeToBuffer(). + * + * \param buffer memory pointer to free. + */ +CINDEX_LINKAGE void clang_free(void *buffer); + +/** + * Dispose a \c CXVirtualFileOverlay object. + */ +CINDEX_LINKAGE void clang_VirtualFileOverlay_dispose(CXVirtualFileOverlay); + +/** + * Object encapsulating information about a module.modulemap file. + */ +typedef struct CXModuleMapDescriptorImpl *CXModuleMapDescriptor; + +/** + * Create a \c CXModuleMapDescriptor object. + * Must be disposed with \c clang_ModuleMapDescriptor_dispose(). + * + * \param options is reserved, always pass 0. + */ +CINDEX_LINKAGE CXModuleMapDescriptor +clang_ModuleMapDescriptor_create(unsigned options); + +/** + * Sets the framework module name that the module.modulemap describes. + * \returns 0 for success, non-zero to indicate an error. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_ModuleMapDescriptor_setFrameworkModuleName(CXModuleMapDescriptor, + const char *name); + +/** + * Sets the umbrella header name that the module.modulemap describes. + * \returns 0 for success, non-zero to indicate an error. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_ModuleMapDescriptor_setUmbrellaHeader(CXModuleMapDescriptor, + const char *name); + +/** + * Write out the \c CXModuleMapDescriptor object to a char buffer. + * + * \param options is reserved, always pass 0. + * \param out_buffer_ptr pointer to receive the buffer pointer, which should be + * disposed using \c clang_free(). + * \param out_buffer_size pointer to receive the buffer size. + * \returns 0 for success, non-zero to indicate an error. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_ModuleMapDescriptor_writeToBuffer(CXModuleMapDescriptor, unsigned options, + char **out_buffer_ptr, + unsigned *out_buffer_size); + +/** + * Dispose a \c CXModuleMapDescriptor object. + */ +CINDEX_LINKAGE void clang_ModuleMapDescriptor_dispose(CXModuleMapDescriptor); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif /* CLANG_C_BUILD_SYSTEM_H */ + diff --git a/llvm/include/clang-c/CXCompilationDatabase.h b/llvm/include/clang-c/CXCompilationDatabase.h new file mode 100644 index 0000000000000000000000000000000000000000..2b336e5464a2fcb0877595f42984efbb03243dbb --- /dev/null +++ b/llvm/include/clang-c/CXCompilationDatabase.h @@ -0,0 +1,174 @@ +/*===-- clang-c/CXCompilationDatabase.h - Compilation database ---*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides a public interface to use CompilationDatabase without *| +|* the full Clang C++ API. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_CXCOMPILATIONDATABASE_H +#define LLVM_CLANG_C_CXCOMPILATIONDATABASE_H + +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** \defgroup COMPILATIONDB CompilationDatabase functions + * \ingroup CINDEX + * + * @{ + */ + +/** + * A compilation database holds all information used to compile files in a + * project. For each file in the database, it can be queried for the working + * directory or the command line used for the compiler invocation. + * + * Must be freed by \c clang_CompilationDatabase_dispose + */ +typedef void * CXCompilationDatabase; + +/** + * Contains the results of a search in the compilation database + * + * When searching for the compile command for a file, the compilation db can + * return several commands, as the file may have been compiled with + * different options in different places of the project. This choice of compile + * commands is wrapped in this opaque data structure. It must be freed by + * \c clang_CompileCommands_dispose. + */ +typedef void * CXCompileCommands; + +/** + * Represents the command line invocation to compile a specific file. + */ +typedef void * CXCompileCommand; + +/** + * Error codes for Compilation Database + */ +typedef enum { + /* + * No error occurred + */ + CXCompilationDatabase_NoError = 0, + + /* + * Database can not be loaded + */ + CXCompilationDatabase_CanNotLoadDatabase = 1 + +} CXCompilationDatabase_Error; + +/** + * Creates a compilation database from the database found in directory + * buildDir. For example, CMake can output a compile_commands.json which can + * be used to build the database. + * + * It must be freed by \c clang_CompilationDatabase_dispose. + */ +CINDEX_LINKAGE CXCompilationDatabase +clang_CompilationDatabase_fromDirectory(const char *BuildDir, + CXCompilationDatabase_Error *ErrorCode); + +/** + * Free the given compilation database + */ +CINDEX_LINKAGE void +clang_CompilationDatabase_dispose(CXCompilationDatabase); + +/** + * Find the compile commands used for a file. The compile commands + * must be freed by \c clang_CompileCommands_dispose. + */ +CINDEX_LINKAGE CXCompileCommands +clang_CompilationDatabase_getCompileCommands(CXCompilationDatabase, + const char *CompleteFileName); + +/** + * Get all the compile commands in the given compilation database. + */ +CINDEX_LINKAGE CXCompileCommands +clang_CompilationDatabase_getAllCompileCommands(CXCompilationDatabase); + +/** + * Free the given CompileCommands + */ +CINDEX_LINKAGE void clang_CompileCommands_dispose(CXCompileCommands); + +/** + * Get the number of CompileCommand we have for a file + */ +CINDEX_LINKAGE unsigned +clang_CompileCommands_getSize(CXCompileCommands); + +/** + * Get the I'th CompileCommand for a file + * + * Note : 0 <= i < clang_CompileCommands_getSize(CXCompileCommands) + */ +CINDEX_LINKAGE CXCompileCommand +clang_CompileCommands_getCommand(CXCompileCommands, unsigned I); + +/** + * Get the working directory where the CompileCommand was executed from + */ +CINDEX_LINKAGE CXString +clang_CompileCommand_getDirectory(CXCompileCommand); + +/** + * Get the filename associated with the CompileCommand. + */ +CINDEX_LINKAGE CXString +clang_CompileCommand_getFilename(CXCompileCommand); + +/** + * Get the number of arguments in the compiler invocation. + * + */ +CINDEX_LINKAGE unsigned +clang_CompileCommand_getNumArgs(CXCompileCommand); + +/** + * Get the I'th argument value in the compiler invocations + * + * Invariant : + * - argument 0 is the compiler executable + */ +CINDEX_LINKAGE CXString +clang_CompileCommand_getArg(CXCompileCommand, unsigned I); + +/** + * Get the number of source mappings for the compiler invocation. + */ +CINDEX_LINKAGE unsigned +clang_CompileCommand_getNumMappedSources(CXCompileCommand); + +/** + * Get the I'th mapped source path for the compiler invocation. + */ +CINDEX_LINKAGE CXString +clang_CompileCommand_getMappedSourcePath(CXCompileCommand, unsigned I); + +/** + * Get the I'th mapped source content for the compiler invocation. + */ +CINDEX_LINKAGE CXString +clang_CompileCommand_getMappedSourceContent(CXCompileCommand, unsigned I); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif + diff --git a/llvm/include/clang-c/CXDiagnostic.h b/llvm/include/clang-c/CXDiagnostic.h new file mode 100644 index 0000000000000000000000000000000000000000..911d001f06697a6bdb2467474de954fb82087588 --- /dev/null +++ b/llvm/include/clang-c/CXDiagnostic.h @@ -0,0 +1,379 @@ +/*===-- clang-c/CXDiagnostic.h - C Index Diagnostics --------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides the interface to C Index diagnostics. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_CXDIAGNOSTIC_H +#define LLVM_CLANG_C_CXDIAGNOSTIC_H + +#include "clang-c/CXSourceLocation.h" +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * \defgroup CINDEX_DIAG Diagnostic reporting + * + * @{ + */ + +/** + * Describes the severity of a particular diagnostic. + */ +enum CXDiagnosticSeverity { + /** + * A diagnostic that has been suppressed, e.g., by a command-line + * option. + */ + CXDiagnostic_Ignored = 0, + + /** + * This diagnostic is a note that should be attached to the + * previous (non-note) diagnostic. + */ + CXDiagnostic_Note = 1, + + /** + * This diagnostic indicates suspicious code that may not be + * wrong. + */ + CXDiagnostic_Warning = 2, + + /** + * This diagnostic indicates that the code is ill-formed. + */ + CXDiagnostic_Error = 3, + + /** + * This diagnostic indicates that the code is ill-formed such + * that future parser recovery is unlikely to produce useful + * results. + */ + CXDiagnostic_Fatal = 4 +}; + +/** + * A single diagnostic, containing the diagnostic's severity, + * location, text, source ranges, and fix-it hints. + */ +typedef void *CXDiagnostic; + +/** + * A group of CXDiagnostics. + */ +typedef void *CXDiagnosticSet; + +/** + * Determine the number of diagnostics in a CXDiagnosticSet. + */ +CINDEX_LINKAGE unsigned clang_getNumDiagnosticsInSet(CXDiagnosticSet Diags); + +/** + * Retrieve a diagnostic associated with the given CXDiagnosticSet. + * + * \param Diags the CXDiagnosticSet to query. + * \param Index the zero-based diagnostic number to retrieve. + * + * \returns the requested diagnostic. This diagnostic must be freed + * via a call to \c clang_disposeDiagnostic(). + */ +CINDEX_LINKAGE CXDiagnostic clang_getDiagnosticInSet(CXDiagnosticSet Diags, + unsigned Index); + +/** + * Describes the kind of error that occurred (if any) in a call to + * \c clang_loadDiagnostics. + */ +enum CXLoadDiag_Error { + /** + * Indicates that no error occurred. + */ + CXLoadDiag_None = 0, + + /** + * Indicates that an unknown error occurred while attempting to + * deserialize diagnostics. + */ + CXLoadDiag_Unknown = 1, + + /** + * Indicates that the file containing the serialized diagnostics + * could not be opened. + */ + CXLoadDiag_CannotLoad = 2, + + /** + * Indicates that the serialized diagnostics file is invalid or + * corrupt. + */ + CXLoadDiag_InvalidFile = 3 +}; + +/** + * Deserialize a set of diagnostics from a Clang diagnostics bitcode + * file. + * + * \param file The name of the file to deserialize. + * \param error A pointer to a enum value recording if there was a problem + * deserializing the diagnostics. + * \param errorString A pointer to a CXString for recording the error string + * if the file was not successfully loaded. + * + * \returns A loaded CXDiagnosticSet if successful, and NULL otherwise. These + * diagnostics should be released using clang_disposeDiagnosticSet(). + */ +CINDEX_LINKAGE CXDiagnosticSet clang_loadDiagnostics( + const char *file, enum CXLoadDiag_Error *error, CXString *errorString); + +/** + * Release a CXDiagnosticSet and all of its contained diagnostics. + */ +CINDEX_LINKAGE void clang_disposeDiagnosticSet(CXDiagnosticSet Diags); + +/** + * Retrieve the child diagnostics of a CXDiagnostic. + * + * This CXDiagnosticSet does not need to be released by + * clang_disposeDiagnosticSet. + */ +CINDEX_LINKAGE CXDiagnosticSet clang_getChildDiagnostics(CXDiagnostic D); + +/** + * Destroy a diagnostic. + */ +CINDEX_LINKAGE void clang_disposeDiagnostic(CXDiagnostic Diagnostic); + +/** + * Options to control the display of diagnostics. + * + * The values in this enum are meant to be combined to customize the + * behavior of \c clang_formatDiagnostic(). + */ +enum CXDiagnosticDisplayOptions { + /** + * Display the source-location information where the + * diagnostic was located. + * + * When set, diagnostics will be prefixed by the file, line, and + * (optionally) column to which the diagnostic refers. For example, + * + * \code + * test.c:28: warning: extra tokens at end of #endif directive + * \endcode + * + * This option corresponds to the clang flag \c -fshow-source-location. + */ + CXDiagnostic_DisplaySourceLocation = 0x01, + + /** + * If displaying the source-location information of the + * diagnostic, also include the column number. + * + * This option corresponds to the clang flag \c -fshow-column. + */ + CXDiagnostic_DisplayColumn = 0x02, + + /** + * If displaying the source-location information of the + * diagnostic, also include information about source ranges in a + * machine-parsable format. + * + * This option corresponds to the clang flag + * \c -fdiagnostics-print-source-range-info. + */ + CXDiagnostic_DisplaySourceRanges = 0x04, + + /** + * Display the option name associated with this diagnostic, if any. + * + * The option name displayed (e.g., -Wconversion) will be placed in brackets + * after the diagnostic text. This option corresponds to the clang flag + * \c -fdiagnostics-show-option. + */ + CXDiagnostic_DisplayOption = 0x08, + + /** + * Display the category number associated with this diagnostic, if any. + * + * The category number is displayed within brackets after the diagnostic text. + * This option corresponds to the clang flag + * \c -fdiagnostics-show-category=id. + */ + CXDiagnostic_DisplayCategoryId = 0x10, + + /** + * Display the category name associated with this diagnostic, if any. + * + * The category name is displayed within brackets after the diagnostic text. + * This option corresponds to the clang flag + * \c -fdiagnostics-show-category=name. + */ + CXDiagnostic_DisplayCategoryName = 0x20 +}; + +/** + * Format the given diagnostic in a manner that is suitable for display. + * + * This routine will format the given diagnostic to a string, rendering + * the diagnostic according to the various options given. The + * \c clang_defaultDiagnosticDisplayOptions() function returns the set of + * options that most closely mimics the behavior of the clang compiler. + * + * \param Diagnostic The diagnostic to print. + * + * \param Options A set of options that control the diagnostic display, + * created by combining \c CXDiagnosticDisplayOptions values. + * + * \returns A new string containing for formatted diagnostic. + */ +CINDEX_LINKAGE CXString clang_formatDiagnostic(CXDiagnostic Diagnostic, + unsigned Options); + +/** + * Retrieve the set of display options most similar to the + * default behavior of the clang compiler. + * + * \returns A set of display options suitable for use with \c + * clang_formatDiagnostic(). + */ +CINDEX_LINKAGE unsigned clang_defaultDiagnosticDisplayOptions(void); + +/** + * Determine the severity of the given diagnostic. + */ +CINDEX_LINKAGE enum CXDiagnosticSeverity + clang_getDiagnosticSeverity(CXDiagnostic); + +/** + * Retrieve the source location of the given diagnostic. + * + * This location is where Clang would print the caret ('^') when + * displaying the diagnostic on the command line. + */ +CINDEX_LINKAGE CXSourceLocation clang_getDiagnosticLocation(CXDiagnostic); + +/** + * Retrieve the text of the given diagnostic. + */ +CINDEX_LINKAGE CXString clang_getDiagnosticSpelling(CXDiagnostic); + +/** + * Retrieve the name of the command-line option that enabled this + * diagnostic. + * + * \param Diag The diagnostic to be queried. + * + * \param Disable If non-NULL, will be set to the option that disables this + * diagnostic (if any). + * + * \returns A string that contains the command-line option used to enable this + * warning, such as "-Wconversion" or "-pedantic". + */ +CINDEX_LINKAGE CXString clang_getDiagnosticOption(CXDiagnostic Diag, + CXString *Disable); + +/** + * Retrieve the category number for this diagnostic. + * + * Diagnostics can be categorized into groups along with other, related + * diagnostics (e.g., diagnostics under the same warning flag). This routine + * retrieves the category number for the given diagnostic. + * + * \returns The number of the category that contains this diagnostic, or zero + * if this diagnostic is uncategorized. + */ +CINDEX_LINKAGE unsigned clang_getDiagnosticCategory(CXDiagnostic); + +/** + * Retrieve the name of a particular diagnostic category. This + * is now deprecated. Use clang_getDiagnosticCategoryText() + * instead. + * + * \param Category A diagnostic category number, as returned by + * \c clang_getDiagnosticCategory(). + * + * \returns The name of the given diagnostic category. + */ +CINDEX_DEPRECATED CINDEX_LINKAGE CXString +clang_getDiagnosticCategoryName(unsigned Category); + +/** + * Retrieve the diagnostic category text for a given diagnostic. + * + * \returns The text of the given diagnostic category. + */ +CINDEX_LINKAGE CXString clang_getDiagnosticCategoryText(CXDiagnostic); + +/** + * Determine the number of source ranges associated with the given + * diagnostic. + */ +CINDEX_LINKAGE unsigned clang_getDiagnosticNumRanges(CXDiagnostic); + +/** + * Retrieve a source range associated with the diagnostic. + * + * A diagnostic's source ranges highlight important elements in the source + * code. On the command line, Clang displays source ranges by + * underlining them with '~' characters. + * + * \param Diagnostic the diagnostic whose range is being extracted. + * + * \param Range the zero-based index specifying which range to + * + * \returns the requested source range. + */ +CINDEX_LINKAGE CXSourceRange clang_getDiagnosticRange(CXDiagnostic Diagnostic, + unsigned Range); + +/** + * Determine the number of fix-it hints associated with the + * given diagnostic. + */ +CINDEX_LINKAGE unsigned clang_getDiagnosticNumFixIts(CXDiagnostic Diagnostic); + +/** + * Retrieve the replacement information for a given fix-it. + * + * Fix-its are described in terms of a source range whose contents + * should be replaced by a string. This approach generalizes over + * three kinds of operations: removal of source code (the range covers + * the code to be removed and the replacement string is empty), + * replacement of source code (the range covers the code to be + * replaced and the replacement string provides the new code), and + * insertion (both the start and end of the range point at the + * insertion location, and the replacement string provides the text to + * insert). + * + * \param Diagnostic The diagnostic whose fix-its are being queried. + * + * \param FixIt The zero-based index of the fix-it. + * + * \param ReplacementRange The source range whose contents will be + * replaced with the returned replacement string. Note that source + * ranges are half-open ranges [a, b), so the source code should be + * replaced from a and up to (but not including) b. + * + * \returns A string containing text that should be replace the source + * code indicated by the \c ReplacementRange. + */ +CINDEX_LINKAGE CXString clang_getDiagnosticFixIt( + CXDiagnostic Diagnostic, unsigned FixIt, CXSourceRange *ReplacementRange); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/clang-c/CXErrorCode.h b/llvm/include/clang-c/CXErrorCode.h new file mode 100644 index 0000000000000000000000000000000000000000..b3a0b9d66d5f8bbf808e57675b077128f5426ecd --- /dev/null +++ b/llvm/include/clang-c/CXErrorCode.h @@ -0,0 +1,62 @@ +/*===-- clang-c/CXErrorCode.h - C Index Error Codes --------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides the CXErrorCode enumerators. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_CXERRORCODE_H +#define LLVM_CLANG_C_CXERRORCODE_H + +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * Error codes returned by libclang routines. + * + * Zero (\c CXError_Success) is the only error code indicating success. Other + * error codes, including not yet assigned non-zero values, indicate errors. + */ +enum CXErrorCode { + /** + * No error. + */ + CXError_Success = 0, + + /** + * A generic error code, no further details are available. + * + * Errors of this kind can get their own specific error codes in future + * libclang versions. + */ + CXError_Failure = 1, + + /** + * libclang crashed while performing the requested operation. + */ + CXError_Crashed = 2, + + /** + * The function detected that the arguments violate the function + * contract. + */ + CXError_InvalidArguments = 3, + + /** + * An AST deserialization error has occurred. + */ + CXError_ASTReadError = 4 +}; + +LLVM_CLANG_C_EXTERN_C_END + +#endif + diff --git a/llvm/include/clang-c/CXFile.h b/llvm/include/clang-c/CXFile.h new file mode 100644 index 0000000000000000000000000000000000000000..c48f58c940431fd8203cf9ab761f3b1220425ccd --- /dev/null +++ b/llvm/include/clang-c/CXFile.h @@ -0,0 +1,83 @@ +/*===-- clang-c/CXFile.h - C Index File ---------------------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides the interface to C Index files. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_CXFILE_H +#define LLVM_CLANG_C_CXFILE_H + +#include + +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * \defgroup CINDEX_FILES File manipulation routines + * + * @{ + */ + +/** + * A particular source file that is part of a translation unit. + */ +typedef void *CXFile; + +/** + * Retrieve the complete file and path name of the given file. + */ +CINDEX_LINKAGE CXString clang_getFileName(CXFile SFile); + +/** + * Retrieve the last modification time of the given file. + */ +CINDEX_LINKAGE time_t clang_getFileTime(CXFile SFile); + +/** + * Uniquely identifies a CXFile, that refers to the same underlying file, + * across an indexing session. + */ +typedef struct { + unsigned long long data[3]; +} CXFileUniqueID; + +/** + * Retrieve the unique ID for the given \c file. + * + * \param file the file to get the ID for. + * \param outID stores the returned CXFileUniqueID. + * \returns If there was a failure getting the unique ID, returns non-zero, + * otherwise returns 0. + */ +CINDEX_LINKAGE int clang_getFileUniqueID(CXFile file, CXFileUniqueID *outID); + +/** + * Returns non-zero if the \c file1 and \c file2 point to the same file, + * or they are both NULL. + */ +CINDEX_LINKAGE int clang_File_isEqual(CXFile file1, CXFile file2); + +/** + * Returns the real path name of \c file. + * + * An empty string may be returned. Use \c clang_getFileName() in that case. + */ +CINDEX_LINKAGE CXString clang_File_tryGetRealPathName(CXFile file); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/clang-c/CXSourceLocation.h b/llvm/include/clang-c/CXSourceLocation.h new file mode 100644 index 0000000000000000000000000000000000000000..dcb13ba273173fdb9c141e34f932ff575b312738 --- /dev/null +++ b/llvm/include/clang-c/CXSourceLocation.h @@ -0,0 +1,286 @@ +/*===-- clang-c/CXSourceLocation.h - C Index Source Location ------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides the interface to C Index source locations. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_CXSOURCE_LOCATION_H +#define LLVM_CLANG_C_CXSOURCE_LOCATION_H + +#include "clang-c/CXFile.h" +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * \defgroup CINDEX_LOCATIONS Physical source locations + * + * Clang represents physical source locations in its abstract syntax tree in + * great detail, with file, line, and column information for the majority of + * the tokens parsed in the source code. These data types and functions are + * used to represent source location information, either for a particular + * point in the program or for a range of points in the program, and extract + * specific location information from those data types. + * + * @{ + */ + +/** + * Identifies a specific source location within a translation + * unit. + * + * Use clang_getExpansionLocation() or clang_getSpellingLocation() + * to map a source location to a particular file, line, and column. + */ +typedef struct { + const void *ptr_data[2]; + unsigned int_data; +} CXSourceLocation; + +/** + * Identifies a half-open character range in the source code. + * + * Use clang_getRangeStart() and clang_getRangeEnd() to retrieve the + * starting and end locations from a source range, respectively. + */ +typedef struct { + const void *ptr_data[2]; + unsigned begin_int_data; + unsigned end_int_data; +} CXSourceRange; + +/** + * Retrieve a NULL (invalid) source location. + */ +CINDEX_LINKAGE CXSourceLocation clang_getNullLocation(void); + +/** + * Determine whether two source locations, which must refer into + * the same translation unit, refer to exactly the same point in the source + * code. + * + * \returns non-zero if the source locations refer to the same location, zero + * if they refer to different locations. + */ +CINDEX_LINKAGE unsigned clang_equalLocations(CXSourceLocation loc1, + CXSourceLocation loc2); + +/** + * Returns non-zero if the given source location is in a system header. + */ +CINDEX_LINKAGE int clang_Location_isInSystemHeader(CXSourceLocation location); + +/** + * Returns non-zero if the given source location is in the main file of + * the corresponding translation unit. + */ +CINDEX_LINKAGE int clang_Location_isFromMainFile(CXSourceLocation location); + +/** + * Retrieve a NULL (invalid) source range. + */ +CINDEX_LINKAGE CXSourceRange clang_getNullRange(void); + +/** + * Retrieve a source range given the beginning and ending source + * locations. + */ +CINDEX_LINKAGE CXSourceRange clang_getRange(CXSourceLocation begin, + CXSourceLocation end); + +/** + * Determine whether two ranges are equivalent. + * + * \returns non-zero if the ranges are the same, zero if they differ. + */ +CINDEX_LINKAGE unsigned clang_equalRanges(CXSourceRange range1, + CXSourceRange range2); + +/** + * Returns non-zero if \p range is null. + */ +CINDEX_LINKAGE int clang_Range_isNull(CXSourceRange range); + +/** + * Retrieve the file, line, column, and offset represented by + * the given source location. + * + * If the location refers into a macro expansion, retrieves the + * location of the macro expansion. + * + * \param location the location within a source file that will be decomposed + * into its parts. + * + * \param file [out] if non-NULL, will be set to the file to which the given + * source location points. + * + * \param line [out] if non-NULL, will be set to the line to which the given + * source location points. + * + * \param column [out] if non-NULL, will be set to the column to which the given + * source location points. + * + * \param offset [out] if non-NULL, will be set to the offset into the + * buffer to which the given source location points. + */ +CINDEX_LINKAGE void clang_getExpansionLocation(CXSourceLocation location, + CXFile *file, unsigned *line, + unsigned *column, + unsigned *offset); + +/** + * Retrieve the file, line and column represented by the given source + * location, as specified in a # line directive. + * + * Example: given the following source code in a file somefile.c + * + * \code + * #123 "dummy.c" 1 + * + * static int func(void) + * { + * return 0; + * } + * \endcode + * + * the location information returned by this function would be + * + * File: dummy.c Line: 124 Column: 12 + * + * whereas clang_getExpansionLocation would have returned + * + * File: somefile.c Line: 3 Column: 12 + * + * \param location the location within a source file that will be decomposed + * into its parts. + * + * \param filename [out] if non-NULL, will be set to the filename of the + * source location. Note that filenames returned will be for "virtual" files, + * which don't necessarily exist on the machine running clang - e.g. when + * parsing preprocessed output obtained from a different environment. If + * a non-NULL value is passed in, remember to dispose of the returned value + * using \c clang_disposeString() once you've finished with it. For an invalid + * source location, an empty string is returned. + * + * \param line [out] if non-NULL, will be set to the line number of the + * source location. For an invalid source location, zero is returned. + * + * \param column [out] if non-NULL, will be set to the column number of the + * source location. For an invalid source location, zero is returned. + */ +CINDEX_LINKAGE void clang_getPresumedLocation(CXSourceLocation location, + CXString *filename, + unsigned *line, unsigned *column); + +/** + * Legacy API to retrieve the file, line, column, and offset represented + * by the given source location. + * + * This interface has been replaced by the newer interface + * #clang_getExpansionLocation(). See that interface's documentation for + * details. + */ +CINDEX_LINKAGE void clang_getInstantiationLocation(CXSourceLocation location, + CXFile *file, unsigned *line, + unsigned *column, + unsigned *offset); + +/** + * Retrieve the file, line, column, and offset represented by + * the given source location. + * + * If the location refers into a macro instantiation, return where the + * location was originally spelled in the source file. + * + * \param location the location within a source file that will be decomposed + * into its parts. + * + * \param file [out] if non-NULL, will be set to the file to which the given + * source location points. + * + * \param line [out] if non-NULL, will be set to the line to which the given + * source location points. + * + * \param column [out] if non-NULL, will be set to the column to which the given + * source location points. + * + * \param offset [out] if non-NULL, will be set to the offset into the + * buffer to which the given source location points. + */ +CINDEX_LINKAGE void clang_getSpellingLocation(CXSourceLocation location, + CXFile *file, unsigned *line, + unsigned *column, + unsigned *offset); + +/** + * Retrieve the file, line, column, and offset represented by + * the given source location. + * + * If the location refers into a macro expansion, return where the macro was + * expanded or where the macro argument was written, if the location points at + * a macro argument. + * + * \param location the location within a source file that will be decomposed + * into its parts. + * + * \param file [out] if non-NULL, will be set to the file to which the given + * source location points. + * + * \param line [out] if non-NULL, will be set to the line to which the given + * source location points. + * + * \param column [out] if non-NULL, will be set to the column to which the given + * source location points. + * + * \param offset [out] if non-NULL, will be set to the offset into the + * buffer to which the given source location points. + */ +CINDEX_LINKAGE void clang_getFileLocation(CXSourceLocation location, + CXFile *file, unsigned *line, + unsigned *column, unsigned *offset); + +/** + * Retrieve a source location representing the first character within a + * source range. + */ +CINDEX_LINKAGE CXSourceLocation clang_getRangeStart(CXSourceRange range); + +/** + * Retrieve a source location representing the last character within a + * source range. + */ +CINDEX_LINKAGE CXSourceLocation clang_getRangeEnd(CXSourceRange range); + +/** + * Identifies an array of ranges. + */ +typedef struct { + /** The number of ranges in the \c ranges array. */ + unsigned count; + /** + * An array of \c CXSourceRanges. + */ + CXSourceRange *ranges; +} CXSourceRangeList; + +/** + * Destroy the given \c CXSourceRangeList. + */ +CINDEX_LINKAGE void clang_disposeSourceRangeList(CXSourceRangeList *ranges); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/clang-c/CXString.h b/llvm/include/clang-c/CXString.h new file mode 100644 index 0000000000000000000000000000000000000000..f117010c71a462b3bfc5cf7837fcb2c928e2f13b --- /dev/null +++ b/llvm/include/clang-c/CXString.h @@ -0,0 +1,69 @@ +/*===-- clang-c/CXString.h - C Index strings --------------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides the interface to C Index strings. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_CXSTRING_H +#define LLVM_CLANG_C_CXSTRING_H + +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * \defgroup CINDEX_STRING String manipulation routines + * \ingroup CINDEX + * + * @{ + */ + +/** + * A character string. + * + * The \c CXString type is used to return strings from the interface when + * the ownership of that string might differ from one call to the next. + * Use \c clang_getCString() to retrieve the string data and, once finished + * with the string data, call \c clang_disposeString() to free the string. + */ +typedef struct { + const void *data; + unsigned private_flags; +} CXString; + +typedef struct { + CXString *Strings; + unsigned Count; +} CXStringSet; + +/** + * Retrieve the character data associated with the given string. + */ +CINDEX_LINKAGE const char *clang_getCString(CXString string); + +/** + * Free the given string. + */ +CINDEX_LINKAGE void clang_disposeString(CXString string); + +/** + * Free the given string set. + */ +CINDEX_LINKAGE void clang_disposeStringSet(CXStringSet *set); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif + diff --git a/llvm/include/clang-c/Documentation.h b/llvm/include/clang-c/Documentation.h new file mode 100644 index 0000000000000000000000000000000000000000..e04c50a0e68b6eaa97df249a2c536797d75c8594 --- /dev/null +++ b/llvm/include/clang-c/Documentation.h @@ -0,0 +1,619 @@ +/*==-- clang-c/Documentation.h - Utilities for comment processing -*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides a supplementary interface for inspecting *| +|* documentation comments. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_DOCUMENTATION_H +#define LLVM_CLANG_C_DOCUMENTATION_H + +#include "clang-c/CXErrorCode.h" +#include "clang-c/ExternC.h" +#include "clang-c/Index.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * \defgroup CINDEX_COMMENT Comment introspection + * + * The routines in this group provide access to information in documentation + * comments. These facilities are distinct from the core and may be subject to + * their own schedule of stability and deprecation. + * + * @{ + */ + +/** + * A parsed comment. + */ +typedef struct { + const void *ASTNode; + CXTranslationUnit TranslationUnit; +} CXComment; + +/** + * Given a cursor that represents a documentable entity (e.g., + * declaration), return the associated parsed comment as a + * \c CXComment_FullComment AST node. + */ +CINDEX_LINKAGE CXComment clang_Cursor_getParsedComment(CXCursor C); + +/** + * Describes the type of the comment AST node (\c CXComment). A comment + * node can be considered block content (e. g., paragraph), inline content + * (plain text) or neither (the root AST node). + */ +enum CXCommentKind { + /** + * Null comment. No AST node is constructed at the requested location + * because there is no text or a syntax error. + */ + CXComment_Null = 0, + + /** + * Plain text. Inline content. + */ + CXComment_Text = 1, + + /** + * A command with word-like arguments that is considered inline content. + * + * For example: \\c command. + */ + CXComment_InlineCommand = 2, + + /** + * HTML start tag with attributes (name-value pairs). Considered + * inline content. + * + * For example: + * \verbatim + *

+ * \endverbatim + */ + CXComment_HTMLStartTag = 3, + + /** + * HTML end tag. Considered inline content. + * + * For example: + * \verbatim + * + * \endverbatim + */ + CXComment_HTMLEndTag = 4, + + /** + * A paragraph, contains inline comment. The paragraph itself is + * block content. + */ + CXComment_Paragraph = 5, + + /** + * A command that has zero or more word-like arguments (number of + * word-like arguments depends on command name) and a paragraph as an + * argument. Block command is block content. + * + * Paragraph argument is also a child of the block command. + * + * For example: \has 0 word-like arguments and a paragraph argument. + * + * AST nodes of special kinds that parser knows about (e. g., \\param + * command) have their own node kinds. + */ + CXComment_BlockCommand = 6, + + /** + * A \\param or \\arg command that describes the function parameter + * (name, passing direction, description). + * + * For example: \\param [in] ParamName description. + */ + CXComment_ParamCommand = 7, + + /** + * A \\tparam command that describes a template parameter (name and + * description). + * + * For example: \\tparam T description. + */ + CXComment_TParamCommand = 8, + + /** + * A verbatim block command (e. g., preformatted code). Verbatim + * block has an opening and a closing command and contains multiple lines of + * text (\c CXComment_VerbatimBlockLine child nodes). + * + * For example: + * \\verbatim + * aaa + * \\endverbatim + */ + CXComment_VerbatimBlockCommand = 9, + + /** + * A line of text that is contained within a + * CXComment_VerbatimBlockCommand node. + */ + CXComment_VerbatimBlockLine = 10, + + /** + * A verbatim line command. Verbatim line has an opening command, + * a single line of text (up to the newline after the opening command) and + * has no closing command. + */ + CXComment_VerbatimLine = 11, + + /** + * A full comment attached to a declaration, contains block content. + */ + CXComment_FullComment = 12 +}; + +/** + * The most appropriate rendering mode for an inline command, chosen on + * command semantics in Doxygen. + */ +enum CXCommentInlineCommandRenderKind { + /** + * Command argument should be rendered in a normal font. + */ + CXCommentInlineCommandRenderKind_Normal, + + /** + * Command argument should be rendered in a bold font. + */ + CXCommentInlineCommandRenderKind_Bold, + + /** + * Command argument should be rendered in a monospaced font. + */ + CXCommentInlineCommandRenderKind_Monospaced, + + /** + * Command argument should be rendered emphasized (typically italic + * font). + */ + CXCommentInlineCommandRenderKind_Emphasized, + + /** + * Command argument should not be rendered (since it only defines an anchor). + */ + CXCommentInlineCommandRenderKind_Anchor +}; + +/** + * Describes parameter passing direction for \\param or \\arg command. + */ +enum CXCommentParamPassDirection { + /** + * The parameter is an input parameter. + */ + CXCommentParamPassDirection_In, + + /** + * The parameter is an output parameter. + */ + CXCommentParamPassDirection_Out, + + /** + * The parameter is an input and output parameter. + */ + CXCommentParamPassDirection_InOut +}; + +/** + * \param Comment AST node of any kind. + * + * \returns the type of the AST node. + */ +CINDEX_LINKAGE enum CXCommentKind clang_Comment_getKind(CXComment Comment); + +/** + * \param Comment AST node of any kind. + * + * \returns number of children of the AST node. + */ +CINDEX_LINKAGE unsigned clang_Comment_getNumChildren(CXComment Comment); + +/** + * \param Comment AST node of any kind. + * + * \param ChildIdx child index (zero-based). + * + * \returns the specified child of the AST node. + */ +CINDEX_LINKAGE +CXComment clang_Comment_getChild(CXComment Comment, unsigned ChildIdx); + +/** + * A \c CXComment_Paragraph node is considered whitespace if it contains + * only \c CXComment_Text nodes that are empty or whitespace. + * + * Other AST nodes (except \c CXComment_Paragraph and \c CXComment_Text) are + * never considered whitespace. + * + * \returns non-zero if \c Comment is whitespace. + */ +CINDEX_LINKAGE unsigned clang_Comment_isWhitespace(CXComment Comment); + +/** + * \returns non-zero if \c Comment is inline content and has a newline + * immediately following it in the comment text. Newlines between paragraphs + * do not count. + */ +CINDEX_LINKAGE +unsigned clang_InlineContentComment_hasTrailingNewline(CXComment Comment); + +/** + * \param Comment a \c CXComment_Text AST node. + * + * \returns text contained in the AST node. + */ +CINDEX_LINKAGE CXString clang_TextComment_getText(CXComment Comment); + +/** + * \param Comment a \c CXComment_InlineCommand AST node. + * + * \returns name of the inline command. + */ +CINDEX_LINKAGE +CXString clang_InlineCommandComment_getCommandName(CXComment Comment); + +/** + * \param Comment a \c CXComment_InlineCommand AST node. + * + * \returns the most appropriate rendering mode, chosen on command + * semantics in Doxygen. + */ +CINDEX_LINKAGE enum CXCommentInlineCommandRenderKind +clang_InlineCommandComment_getRenderKind(CXComment Comment); + +/** + * \param Comment a \c CXComment_InlineCommand AST node. + * + * \returns number of command arguments. + */ +CINDEX_LINKAGE +unsigned clang_InlineCommandComment_getNumArgs(CXComment Comment); + +/** + * \param Comment a \c CXComment_InlineCommand AST node. + * + * \param ArgIdx argument index (zero-based). + * + * \returns text of the specified argument. + */ +CINDEX_LINKAGE +CXString clang_InlineCommandComment_getArgText(CXComment Comment, + unsigned ArgIdx); + +/** + * \param Comment a \c CXComment_HTMLStartTag or \c CXComment_HTMLEndTag AST + * node. + * + * \returns HTML tag name. + */ +CINDEX_LINKAGE CXString clang_HTMLTagComment_getTagName(CXComment Comment); + +/** + * \param Comment a \c CXComment_HTMLStartTag AST node. + * + * \returns non-zero if tag is self-closing (for example, <br />). + */ +CINDEX_LINKAGE +unsigned clang_HTMLStartTagComment_isSelfClosing(CXComment Comment); + +/** + * \param Comment a \c CXComment_HTMLStartTag AST node. + * + * \returns number of attributes (name-value pairs) attached to the start tag. + */ +CINDEX_LINKAGE unsigned clang_HTMLStartTag_getNumAttrs(CXComment Comment); + +/** + * \param Comment a \c CXComment_HTMLStartTag AST node. + * + * \param AttrIdx attribute index (zero-based). + * + * \returns name of the specified attribute. + */ +CINDEX_LINKAGE +CXString clang_HTMLStartTag_getAttrName(CXComment Comment, unsigned AttrIdx); + +/** + * \param Comment a \c CXComment_HTMLStartTag AST node. + * + * \param AttrIdx attribute index (zero-based). + * + * \returns value of the specified attribute. + */ +CINDEX_LINKAGE +CXString clang_HTMLStartTag_getAttrValue(CXComment Comment, unsigned AttrIdx); + +/** + * \param Comment a \c CXComment_BlockCommand AST node. + * + * \returns name of the block command. + */ +CINDEX_LINKAGE +CXString clang_BlockCommandComment_getCommandName(CXComment Comment); + +/** + * \param Comment a \c CXComment_BlockCommand AST node. + * + * \returns number of word-like arguments. + */ +CINDEX_LINKAGE +unsigned clang_BlockCommandComment_getNumArgs(CXComment Comment); + +/** + * \param Comment a \c CXComment_BlockCommand AST node. + * + * \param ArgIdx argument index (zero-based). + * + * \returns text of the specified word-like argument. + */ +CINDEX_LINKAGE +CXString clang_BlockCommandComment_getArgText(CXComment Comment, + unsigned ArgIdx); + +/** + * \param Comment a \c CXComment_BlockCommand or + * \c CXComment_VerbatimBlockCommand AST node. + * + * \returns paragraph argument of the block command. + */ +CINDEX_LINKAGE +CXComment clang_BlockCommandComment_getParagraph(CXComment Comment); + +/** + * \param Comment a \c CXComment_ParamCommand AST node. + * + * \returns parameter name. + */ +CINDEX_LINKAGE +CXString clang_ParamCommandComment_getParamName(CXComment Comment); + +/** + * \param Comment a \c CXComment_ParamCommand AST node. + * + * \returns non-zero if the parameter that this AST node represents was found + * in the function prototype and \c clang_ParamCommandComment_getParamIndex + * function will return a meaningful value. + */ +CINDEX_LINKAGE +unsigned clang_ParamCommandComment_isParamIndexValid(CXComment Comment); + +/** + * \param Comment a \c CXComment_ParamCommand AST node. + * + * \returns zero-based parameter index in function prototype. + */ +CINDEX_LINKAGE +unsigned clang_ParamCommandComment_getParamIndex(CXComment Comment); + +/** + * \param Comment a \c CXComment_ParamCommand AST node. + * + * \returns non-zero if parameter passing direction was specified explicitly in + * the comment. + */ +CINDEX_LINKAGE +unsigned clang_ParamCommandComment_isDirectionExplicit(CXComment Comment); + +/** + * \param Comment a \c CXComment_ParamCommand AST node. + * + * \returns parameter passing direction. + */ +CINDEX_LINKAGE +enum CXCommentParamPassDirection clang_ParamCommandComment_getDirection( + CXComment Comment); + +/** + * \param Comment a \c CXComment_TParamCommand AST node. + * + * \returns template parameter name. + */ +CINDEX_LINKAGE +CXString clang_TParamCommandComment_getParamName(CXComment Comment); + +/** + * \param Comment a \c CXComment_TParamCommand AST node. + * + * \returns non-zero if the parameter that this AST node represents was found + * in the template parameter list and + * \c clang_TParamCommandComment_getDepth and + * \c clang_TParamCommandComment_getIndex functions will return a meaningful + * value. + */ +CINDEX_LINKAGE +unsigned clang_TParamCommandComment_isParamPositionValid(CXComment Comment); + +/** + * \param Comment a \c CXComment_TParamCommand AST node. + * + * \returns zero-based nesting depth of this parameter in the template parameter list. + * + * For example, + * \verbatim + * template class TT> + * void test(TT aaa); + * \endverbatim + * for C and TT nesting depth is 0, + * for T nesting depth is 1. + */ +CINDEX_LINKAGE +unsigned clang_TParamCommandComment_getDepth(CXComment Comment); + +/** + * \param Comment a \c CXComment_TParamCommand AST node. + * + * \returns zero-based parameter index in the template parameter list at a + * given nesting depth. + * + * For example, + * \verbatim + * template class TT> + * void test(TT aaa); + * \endverbatim + * for C and TT nesting depth is 0, so we can ask for index at depth 0: + * at depth 0 C's index is 0, TT's index is 1. + * + * For T nesting depth is 1, so we can ask for index at depth 0 and 1: + * at depth 0 T's index is 1 (same as TT's), + * at depth 1 T's index is 0. + */ +CINDEX_LINKAGE +unsigned clang_TParamCommandComment_getIndex(CXComment Comment, unsigned Depth); + +/** + * \param Comment a \c CXComment_VerbatimBlockLine AST node. + * + * \returns text contained in the AST node. + */ +CINDEX_LINKAGE +CXString clang_VerbatimBlockLineComment_getText(CXComment Comment); + +/** + * \param Comment a \c CXComment_VerbatimLine AST node. + * + * \returns text contained in the AST node. + */ +CINDEX_LINKAGE CXString clang_VerbatimLineComment_getText(CXComment Comment); + +/** + * Convert an HTML tag AST node to string. + * + * \param Comment a \c CXComment_HTMLStartTag or \c CXComment_HTMLEndTag AST + * node. + * + * \returns string containing an HTML tag. + */ +CINDEX_LINKAGE CXString clang_HTMLTagComment_getAsString(CXComment Comment); + +/** + * Convert a given full parsed comment to an HTML fragment. + * + * Specific details of HTML layout are subject to change. Don't try to parse + * this HTML back into an AST, use other APIs instead. + * + * Currently the following CSS classes are used: + * \li "para-brief" for \paragraph and equivalent commands; + * \li "para-returns" for \\returns paragraph and equivalent commands; + * \li "word-returns" for the "Returns" word in \\returns paragraph. + * + * Function argument documentation is rendered as a \ list with arguments + * sorted in function prototype order. CSS classes used: + * \li "param-name-index-NUMBER" for parameter name (\); + * \li "param-descr-index-NUMBER" for parameter description (\); + * \li "param-name-index-invalid" and "param-descr-index-invalid" are used if + * parameter index is invalid. + * + * Template parameter documentation is rendered as a \ list with + * parameters sorted in template parameter list order. CSS classes used: + * \li "tparam-name-index-NUMBER" for parameter name (\); + * \li "tparam-descr-index-NUMBER" for parameter description (\); + * \li "tparam-name-index-other" and "tparam-descr-index-other" are used for + * names inside template template parameters; + * \li "tparam-name-index-invalid" and "tparam-descr-index-invalid" are used if + * parameter position is invalid. + * + * \param Comment a \c CXComment_FullComment AST node. + * + * \returns string containing an HTML fragment. + */ +CINDEX_LINKAGE CXString clang_FullComment_getAsHTML(CXComment Comment); + +/** + * Convert a given full parsed comment to an XML document. + * + * A Relax NG schema for the XML can be found in comment-xml-schema.rng file + * inside clang source tree. + * + * \param Comment a \c CXComment_FullComment AST node. + * + * \returns string containing an XML document. + */ +CINDEX_LINKAGE CXString clang_FullComment_getAsXML(CXComment Comment); + +/** + * CXAPISet is an opaque type that represents a data structure containing all + * the API information for a given translation unit. This can be used for a + * single symbol symbol graph for a given symbol. + */ +typedef struct CXAPISetImpl *CXAPISet; + +/** + * Traverses the translation unit to create a \c CXAPISet. + * + * \param tu is the \c CXTranslationUnit to build the \c CXAPISet for. + * + * \param out_api is a pointer to the output of this function. It is needs to be + * disposed of by calling clang_disposeAPISet. + * + * \returns Error code indicating success or failure of the APISet creation. + */ +CINDEX_LINKAGE enum CXErrorCode clang_createAPISet(CXTranslationUnit tu, + CXAPISet *out_api); + +/** + * Dispose of an APISet. + * + * The provided \c CXAPISet can not be used after this function is called. + */ +CINDEX_LINKAGE void clang_disposeAPISet(CXAPISet api); + +/** + * Generate a single symbol symbol graph for the given USR. Returns a null + * string if the associated symbol can not be found in the provided \c CXAPISet. + * + * The output contains the symbol graph as well as some additional information + * about related symbols. + * + * \param usr is a string containing the USR of the symbol to generate the + * symbol graph for. + * + * \param api the \c CXAPISet to look for the symbol in. + * + * \returns a string containing the serialized symbol graph representation for + * the symbol being queried or a null string if it can not be found in the + * APISet. + */ +CINDEX_LINKAGE CXString clang_getSymbolGraphForUSR(const char *usr, + CXAPISet api); + +/** + * Generate a single symbol symbol graph for the declaration at the given + * cursor. Returns a null string if the AST node for the cursor isn't a + * declaration. + * + * The output contains the symbol graph as well as some additional information + * about related symbols. + * + * \param cursor the declaration for which to generate the single symbol symbol + * graph. + * + * \returns a string containing the serialized symbol graph representation for + * the symbol being queried or a null string if it can not be found in the + * APISet. + */ +CINDEX_LINKAGE CXString clang_getSymbolGraphForCursor(CXCursor cursor); + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif /* CLANG_C_DOCUMENTATION_H */ + diff --git a/llvm/include/clang-c/ExternC.h b/llvm/include/clang-c/ExternC.h new file mode 100644 index 0000000000000000000000000000000000000000..384f24d47b0b61e91d4efd5cf78f3ebb4ee8787e --- /dev/null +++ b/llvm/include/clang-c/ExternC.h @@ -0,0 +1,39 @@ +/*===- clang-c/ExternC.h - Wrapper for 'extern "C"' ---------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This file defines an 'extern "C"' wrapper. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_EXTERN_C_H +#define LLVM_CLANG_C_EXTERN_C_H + +#ifdef __clang__ +#define LLVM_CLANG_C_STRICT_PROTOTYPES_BEGIN \ + _Pragma("clang diagnostic push") \ + _Pragma("clang diagnostic error \"-Wstrict-prototypes\"") +#define LLVM_CLANG_C_STRICT_PROTOTYPES_END _Pragma("clang diagnostic pop") +#else +#define LLVM_CLANG_C_STRICT_PROTOTYPES_BEGIN +#define LLVM_CLANG_C_STRICT_PROTOTYPES_END +#endif + +#ifdef __cplusplus +#define LLVM_CLANG_C_EXTERN_C_BEGIN \ + extern "C" { \ + LLVM_CLANG_C_STRICT_PROTOTYPES_BEGIN +#define LLVM_CLANG_C_EXTERN_C_END \ + LLVM_CLANG_C_STRICT_PROTOTYPES_END \ + } +#else +#define LLVM_CLANG_C_EXTERN_C_BEGIN LLVM_CLANG_C_STRICT_PROTOTYPES_BEGIN +#define LLVM_CLANG_C_EXTERN_C_END LLVM_CLANG_C_STRICT_PROTOTYPES_END +#endif + +#endif diff --git a/llvm/include/clang-c/FatalErrorHandler.h b/llvm/include/clang-c/FatalErrorHandler.h new file mode 100644 index 0000000000000000000000000000000000000000..22f34fa815ccf8ca83e6067405e7f6e5cb204e00 --- /dev/null +++ b/llvm/include/clang-c/FatalErrorHandler.h @@ -0,0 +1,32 @@ +/*===-- clang-c/FatalErrorHandler.h - Fatal Error Handling --------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_FATAL_ERROR_HANDLER_H +#define LLVM_CLANG_C_FATAL_ERROR_HANDLER_H + +#include "clang-c/ExternC.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** + * Installs error handler that prints error message to stderr and calls abort(). + * Replaces currently installed error handler (if any). + */ +void clang_install_aborting_llvm_fatal_error_handler(void); + +/** + * Removes currently installed error handler (if any). + * If no error handler is intalled, the default strategy is to print error + * message to stderr and call exit(1). + */ +void clang_uninstall_llvm_fatal_error_handler(void); + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/clang-c/Index.h b/llvm/include/clang-c/Index.h new file mode 100644 index 0000000000000000000000000000000000000000..115f5ab090f96e5e844a167ee2a1be92054cdb3f --- /dev/null +++ b/llvm/include/clang-c/Index.h @@ -0,0 +1,6743 @@ +/*===-- clang-c/Index.h - Indexing Public C Interface -------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides a public interface to a Clang library for extracting *| +|* high-level symbol information from source files without exposing the full *| +|* Clang C++ API. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_INDEX_H +#define LLVM_CLANG_C_INDEX_H + +#include "clang-c/BuildSystem.h" +#include "clang-c/CXDiagnostic.h" +#include "clang-c/CXErrorCode.h" +#include "clang-c/CXFile.h" +#include "clang-c/CXSourceLocation.h" +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Platform.h" + +/** + * The version constants for the libclang API. + * CINDEX_VERSION_MINOR should increase when there are API additions. + * CINDEX_VERSION_MAJOR is intended for "major" source/ABI breaking changes. + * + * The policy about the libclang API was always to keep it source and ABI + * compatible, thus CINDEX_VERSION_MAJOR is expected to remain stable. + */ +#define CINDEX_VERSION_MAJOR 0 +#define CINDEX_VERSION_MINOR 64 + +#define CINDEX_VERSION_ENCODE(major, minor) (((major)*10000) + ((minor)*1)) + +#define CINDEX_VERSION \ + CINDEX_VERSION_ENCODE(CINDEX_VERSION_MAJOR, CINDEX_VERSION_MINOR) + +#define CINDEX_VERSION_STRINGIZE_(major, minor) #major "." #minor +#define CINDEX_VERSION_STRINGIZE(major, minor) \ + CINDEX_VERSION_STRINGIZE_(major, minor) + +#define CINDEX_VERSION_STRING \ + CINDEX_VERSION_STRINGIZE(CINDEX_VERSION_MAJOR, CINDEX_VERSION_MINOR) + +#ifndef __has_feature +#define __has_feature(feature) 0 +#endif + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/** \defgroup CINDEX libclang: C Interface to Clang + * + * The C Interface to Clang provides a relatively small API that exposes + * facilities for parsing source code into an abstract syntax tree (AST), + * loading already-parsed ASTs, traversing the AST, associating + * physical source locations with elements within the AST, and other + * facilities that support Clang-based development tools. + * + * This C interface to Clang will never provide all of the information + * representation stored in Clang's C++ AST, nor should it: the intent is to + * maintain an API that is relatively stable from one release to the next, + * providing only the basic functionality needed to support development tools. + * + * To avoid namespace pollution, data types are prefixed with "CX" and + * functions are prefixed with "clang_". + * + * @{ + */ + +/** + * An "index" that consists of a set of translation units that would + * typically be linked together into an executable or library. + */ +typedef void *CXIndex; + +/** + * An opaque type representing target information for a given translation + * unit. + */ +typedef struct CXTargetInfoImpl *CXTargetInfo; + +/** + * A single translation unit, which resides in an index. + */ +typedef struct CXTranslationUnitImpl *CXTranslationUnit; + +/** + * Opaque pointer representing client data that will be passed through + * to various callbacks and visitors. + */ +typedef void *CXClientData; + +/** + * Provides the contents of a file that has not yet been saved to disk. + * + * Each CXUnsavedFile instance provides the name of a file on the + * system along with the current contents of that file that have not + * yet been saved to disk. + */ +struct CXUnsavedFile { + /** + * The file whose contents have not yet been saved. + * + * This file must already exist in the file system. + */ + const char *Filename; + + /** + * A buffer containing the unsaved contents of this file. + */ + const char *Contents; + + /** + * The length of the unsaved contents of this buffer. + */ + unsigned long Length; +}; + +/** + * Describes the availability of a particular entity, which indicates + * whether the use of this entity will result in a warning or error due to + * it being deprecated or unavailable. + */ +enum CXAvailabilityKind { + /** + * The entity is available. + */ + CXAvailability_Available, + /** + * The entity is available, but has been deprecated (and its use is + * not recommended). + */ + CXAvailability_Deprecated, + /** + * The entity is not available; any use of it will be an error. + */ + CXAvailability_NotAvailable, + /** + * The entity is available, but not accessible; any use of it will be + * an error. + */ + CXAvailability_NotAccessible +}; + +/** + * Describes a version number of the form major.minor.subminor. + */ +typedef struct CXVersion { + /** + * The major version number, e.g., the '10' in '10.7.3'. A negative + * value indicates that there is no version number at all. + */ + int Major; + /** + * The minor version number, e.g., the '7' in '10.7.3'. This value + * will be negative if no minor version number was provided, e.g., for + * version '10'. + */ + int Minor; + /** + * The subminor version number, e.g., the '3' in '10.7.3'. This value + * will be negative if no minor or subminor version number was provided, + * e.g., in version '10' or '10.7'. + */ + int Subminor; +} CXVersion; + +/** + * Describes the exception specification of a cursor. + * + * A negative value indicates that the cursor is not a function declaration. + */ +enum CXCursor_ExceptionSpecificationKind { + /** + * The cursor has no exception specification. + */ + CXCursor_ExceptionSpecificationKind_None, + + /** + * The cursor has exception specification throw() + */ + CXCursor_ExceptionSpecificationKind_DynamicNone, + + /** + * The cursor has exception specification throw(T1, T2) + */ + CXCursor_ExceptionSpecificationKind_Dynamic, + + /** + * The cursor has exception specification throw(...). + */ + CXCursor_ExceptionSpecificationKind_MSAny, + + /** + * The cursor has exception specification basic noexcept. + */ + CXCursor_ExceptionSpecificationKind_BasicNoexcept, + + /** + * The cursor has exception specification computed noexcept. + */ + CXCursor_ExceptionSpecificationKind_ComputedNoexcept, + + /** + * The exception specification has not yet been evaluated. + */ + CXCursor_ExceptionSpecificationKind_Unevaluated, + + /** + * The exception specification has not yet been instantiated. + */ + CXCursor_ExceptionSpecificationKind_Uninstantiated, + + /** + * The exception specification has not been parsed yet. + */ + CXCursor_ExceptionSpecificationKind_Unparsed, + + /** + * The cursor has a __declspec(nothrow) exception specification. + */ + CXCursor_ExceptionSpecificationKind_NoThrow +}; + +/** + * Provides a shared context for creating translation units. + * + * It provides two options: + * + * - excludeDeclarationsFromPCH: When non-zero, allows enumeration of "local" + * declarations (when loading any new translation units). A "local" declaration + * is one that belongs in the translation unit itself and not in a precompiled + * header that was used by the translation unit. If zero, all declarations + * will be enumerated. + * + * Here is an example: + * + * \code + * // excludeDeclsFromPCH = 1, displayDiagnostics=1 + * Idx = clang_createIndex(1, 1); + * + * // IndexTest.pch was produced with the following command: + * // "clang -x c IndexTest.h -emit-ast -o IndexTest.pch" + * TU = clang_createTranslationUnit(Idx, "IndexTest.pch"); + * + * // This will load all the symbols from 'IndexTest.pch' + * clang_visitChildren(clang_getTranslationUnitCursor(TU), + * TranslationUnitVisitor, 0); + * clang_disposeTranslationUnit(TU); + * + * // This will load all the symbols from 'IndexTest.c', excluding symbols + * // from 'IndexTest.pch'. + * char *args[] = { "-Xclang", "-include-pch=IndexTest.pch" }; + * TU = clang_createTranslationUnitFromSourceFile(Idx, "IndexTest.c", 2, args, + * 0, 0); + * clang_visitChildren(clang_getTranslationUnitCursor(TU), + * TranslationUnitVisitor, 0); + * clang_disposeTranslationUnit(TU); + * \endcode + * + * This process of creating the 'pch', loading it separately, and using it (via + * -include-pch) allows 'excludeDeclsFromPCH' to remove redundant callbacks + * (which gives the indexer the same performance benefit as the compiler). + */ +CINDEX_LINKAGE CXIndex clang_createIndex(int excludeDeclarationsFromPCH, + int displayDiagnostics); + +/** + * Destroy the given index. + * + * The index must not be destroyed until all of the translation units created + * within that index have been destroyed. + */ +CINDEX_LINKAGE void clang_disposeIndex(CXIndex index); + +typedef enum { + /** + * Use the default value of an option that may depend on the process + * environment. + */ + CXChoice_Default = 0, + /** + * Enable the option. + */ + CXChoice_Enabled = 1, + /** + * Disable the option. + */ + CXChoice_Disabled = 2 +} CXChoice; + +typedef enum { + /** + * Used to indicate that no special CXIndex options are needed. + */ + CXGlobalOpt_None = 0x0, + + /** + * Used to indicate that threads that libclang creates for indexing + * purposes should use background priority. + * + * Affects #clang_indexSourceFile, #clang_indexTranslationUnit, + * #clang_parseTranslationUnit, #clang_saveTranslationUnit. + */ + CXGlobalOpt_ThreadBackgroundPriorityForIndexing = 0x1, + + /** + * Used to indicate that threads that libclang creates for editing + * purposes should use background priority. + * + * Affects #clang_reparseTranslationUnit, #clang_codeCompleteAt, + * #clang_annotateTokens + */ + CXGlobalOpt_ThreadBackgroundPriorityForEditing = 0x2, + + /** + * Used to indicate that all threads that libclang creates should use + * background priority. + */ + CXGlobalOpt_ThreadBackgroundPriorityForAll = + CXGlobalOpt_ThreadBackgroundPriorityForIndexing | + CXGlobalOpt_ThreadBackgroundPriorityForEditing + +} CXGlobalOptFlags; + +/** + * Index initialization options. + * + * 0 is the default value of each member of this struct except for Size. + * Initialize the struct in one of the following three ways to avoid adapting + * code each time a new member is added to it: + * \code + * CXIndexOptions Opts; + * memset(&Opts, 0, sizeof(Opts)); + * Opts.Size = sizeof(CXIndexOptions); + * \endcode + * or explicitly initialize the first data member and zero-initialize the rest: + * \code + * CXIndexOptions Opts = { sizeof(CXIndexOptions) }; + * \endcode + * or to prevent the -Wmissing-field-initializers warning for the above version: + * \code + * CXIndexOptions Opts{}; + * Opts.Size = sizeof(CXIndexOptions); + * \endcode + */ +typedef struct CXIndexOptions { + /** + * The size of struct CXIndexOptions used for option versioning. + * + * Always initialize this member to sizeof(CXIndexOptions), or assign + * sizeof(CXIndexOptions) to it right after creating a CXIndexOptions object. + */ + unsigned Size; + /** + * A CXChoice enumerator that specifies the indexing priority policy. + * \sa CXGlobalOpt_ThreadBackgroundPriorityForIndexing + */ + unsigned char ThreadBackgroundPriorityForIndexing; + /** + * A CXChoice enumerator that specifies the editing priority policy. + * \sa CXGlobalOpt_ThreadBackgroundPriorityForEditing + */ + unsigned char ThreadBackgroundPriorityForEditing; + /** + * \see clang_createIndex() + */ + unsigned ExcludeDeclarationsFromPCH : 1; + /** + * \see clang_createIndex() + */ + unsigned DisplayDiagnostics : 1; + /** + * Store PCH in memory. If zero, PCH are stored in temporary files. + */ + unsigned StorePreamblesInMemory : 1; + unsigned /*Reserved*/ : 13; + + /** + * The path to a directory, in which to store temporary PCH files. If null or + * empty, the default system temporary directory is used. These PCH files are + * deleted on clean exit but stay on disk if the program crashes or is killed. + * + * This option is ignored if \a StorePreamblesInMemory is non-zero. + * + * Libclang does not create the directory at the specified path in the file + * system. Therefore it must exist, or storing PCH files will fail. + */ + const char *PreambleStoragePath; + /** + * Specifies a path which will contain log files for certain libclang + * invocations. A null value implies that libclang invocations are not logged. + */ + const char *InvocationEmissionPath; +} CXIndexOptions; + +/** + * Provides a shared context for creating translation units. + * + * Call this function instead of clang_createIndex() if you need to configure + * the additional options in CXIndexOptions. + * + * \returns The created index or null in case of error, such as an unsupported + * value of options->Size. + * + * For example: + * \code + * CXIndex createIndex(const char *ApplicationTemporaryPath) { + * const int ExcludeDeclarationsFromPCH = 1; + * const int DisplayDiagnostics = 1; + * CXIndex Idx; + * #if CINDEX_VERSION_MINOR >= 64 + * CXIndexOptions Opts; + * memset(&Opts, 0, sizeof(Opts)); + * Opts.Size = sizeof(CXIndexOptions); + * Opts.ThreadBackgroundPriorityForIndexing = 1; + * Opts.ExcludeDeclarationsFromPCH = ExcludeDeclarationsFromPCH; + * Opts.DisplayDiagnostics = DisplayDiagnostics; + * Opts.PreambleStoragePath = ApplicationTemporaryPath; + * Idx = clang_createIndexWithOptions(&Opts); + * if (Idx) + * return Idx; + * fprintf(stderr, + * "clang_createIndexWithOptions() failed. " + * "CINDEX_VERSION_MINOR = %d, sizeof(CXIndexOptions) = %u\n", + * CINDEX_VERSION_MINOR, Opts.Size); + * #else + * (void)ApplicationTemporaryPath; + * #endif + * Idx = clang_createIndex(ExcludeDeclarationsFromPCH, DisplayDiagnostics); + * clang_CXIndex_setGlobalOptions( + * Idx, clang_CXIndex_getGlobalOptions(Idx) | + * CXGlobalOpt_ThreadBackgroundPriorityForIndexing); + * return Idx; + * } + * \endcode + * + * \sa clang_createIndex() + */ +CINDEX_LINKAGE CXIndex +clang_createIndexWithOptions(const CXIndexOptions *options); + +/** + * Sets general options associated with a CXIndex. + * + * This function is DEPRECATED. Set + * CXIndexOptions::ThreadBackgroundPriorityForIndexing and/or + * CXIndexOptions::ThreadBackgroundPriorityForEditing and call + * clang_createIndexWithOptions() instead. + * + * For example: + * \code + * CXIndex idx = ...; + * clang_CXIndex_setGlobalOptions(idx, + * clang_CXIndex_getGlobalOptions(idx) | + * CXGlobalOpt_ThreadBackgroundPriorityForIndexing); + * \endcode + * + * \param options A bitmask of options, a bitwise OR of CXGlobalOpt_XXX flags. + */ +CINDEX_LINKAGE void clang_CXIndex_setGlobalOptions(CXIndex, unsigned options); + +/** + * Gets the general options associated with a CXIndex. + * + * This function allows to obtain the final option values used by libclang after + * specifying the option policies via CXChoice enumerators. + * + * \returns A bitmask of options, a bitwise OR of CXGlobalOpt_XXX flags that + * are associated with the given CXIndex object. + */ +CINDEX_LINKAGE unsigned clang_CXIndex_getGlobalOptions(CXIndex); + +/** + * Sets the invocation emission path option in a CXIndex. + * + * This function is DEPRECATED. Set CXIndexOptions::InvocationEmissionPath and + * call clang_createIndexWithOptions() instead. + * + * The invocation emission path specifies a path which will contain log + * files for certain libclang invocations. A null value (default) implies that + * libclang invocations are not logged.. + */ +CINDEX_LINKAGE void +clang_CXIndex_setInvocationEmissionPathOption(CXIndex, const char *Path); + +/** + * Determine whether the given header is guarded against + * multiple inclusions, either with the conventional + * \#ifndef/\#define/\#endif macro guards or with \#pragma once. + */ +CINDEX_LINKAGE unsigned clang_isFileMultipleIncludeGuarded(CXTranslationUnit tu, + CXFile file); + +/** + * Retrieve a file handle within the given translation unit. + * + * \param tu the translation unit + * + * \param file_name the name of the file. + * + * \returns the file handle for the named file in the translation unit \p tu, + * or a NULL file handle if the file was not a part of this translation unit. + */ +CINDEX_LINKAGE CXFile clang_getFile(CXTranslationUnit tu, + const char *file_name); + +/** + * Retrieve the buffer associated with the given file. + * + * \param tu the translation unit + * + * \param file the file for which to retrieve the buffer. + * + * \param size [out] if non-NULL, will be set to the size of the buffer. + * + * \returns a pointer to the buffer in memory that holds the contents of + * \p file, or a NULL pointer when the file is not loaded. + */ +CINDEX_LINKAGE const char *clang_getFileContents(CXTranslationUnit tu, + CXFile file, size_t *size); + +/** + * Retrieves the source location associated with a given file/line/column + * in a particular translation unit. + */ +CINDEX_LINKAGE CXSourceLocation clang_getLocation(CXTranslationUnit tu, + CXFile file, unsigned line, + unsigned column); +/** + * Retrieves the source location associated with a given character offset + * in a particular translation unit. + */ +CINDEX_LINKAGE CXSourceLocation clang_getLocationForOffset(CXTranslationUnit tu, + CXFile file, + unsigned offset); + +/** + * Retrieve all ranges that were skipped by the preprocessor. + * + * The preprocessor will skip lines when they are surrounded by an + * if/ifdef/ifndef directive whose condition does not evaluate to true. + */ +CINDEX_LINKAGE CXSourceRangeList *clang_getSkippedRanges(CXTranslationUnit tu, + CXFile file); + +/** + * Retrieve all ranges from all files that were skipped by the + * preprocessor. + * + * The preprocessor will skip lines when they are surrounded by an + * if/ifdef/ifndef directive whose condition does not evaluate to true. + */ +CINDEX_LINKAGE CXSourceRangeList * +clang_getAllSkippedRanges(CXTranslationUnit tu); + +/** + * Determine the number of diagnostics produced for the given + * translation unit. + */ +CINDEX_LINKAGE unsigned clang_getNumDiagnostics(CXTranslationUnit Unit); + +/** + * Retrieve a diagnostic associated with the given translation unit. + * + * \param Unit the translation unit to query. + * \param Index the zero-based diagnostic number to retrieve. + * + * \returns the requested diagnostic. This diagnostic must be freed + * via a call to \c clang_disposeDiagnostic(). + */ +CINDEX_LINKAGE CXDiagnostic clang_getDiagnostic(CXTranslationUnit Unit, + unsigned Index); + +/** + * Retrieve the complete set of diagnostics associated with a + * translation unit. + * + * \param Unit the translation unit to query. + */ +CINDEX_LINKAGE CXDiagnosticSet +clang_getDiagnosticSetFromTU(CXTranslationUnit Unit); + +/** + * \defgroup CINDEX_TRANSLATION_UNIT Translation unit manipulation + * + * The routines in this group provide the ability to create and destroy + * translation units from files, either by parsing the contents of the files or + * by reading in a serialized representation of a translation unit. + * + * @{ + */ + +/** + * Get the original translation unit source file name. + */ +CINDEX_LINKAGE CXString +clang_getTranslationUnitSpelling(CXTranslationUnit CTUnit); + +/** + * Return the CXTranslationUnit for a given source file and the provided + * command line arguments one would pass to the compiler. + * + * Note: The 'source_filename' argument is optional. If the caller provides a + * NULL pointer, the name of the source file is expected to reside in the + * specified command line arguments. + * + * Note: When encountered in 'clang_command_line_args', the following options + * are ignored: + * + * '-c' + * '-emit-ast' + * '-fsyntax-only' + * '-o \' (both '-o' and '\' are ignored) + * + * \param CIdx The index object with which the translation unit will be + * associated. + * + * \param source_filename The name of the source file to load, or NULL if the + * source file is included in \p clang_command_line_args. + * + * \param num_clang_command_line_args The number of command-line arguments in + * \p clang_command_line_args. + * + * \param clang_command_line_args The command-line arguments that would be + * passed to the \c clang executable if it were being invoked out-of-process. + * These command-line options will be parsed and will affect how the translation + * unit is parsed. Note that the following options are ignored: '-c', + * '-emit-ast', '-fsyntax-only' (which is the default), and '-o \'. + * + * \param num_unsaved_files the number of unsaved file entries in \p + * unsaved_files. + * + * \param unsaved_files the files that have not yet been saved to disk + * but may be required for code completion, including the contents of + * those files. The contents and name of these files (as specified by + * CXUnsavedFile) are copied when necessary, so the client only needs to + * guarantee their validity until the call to this function returns. + */ +CINDEX_LINKAGE CXTranslationUnit clang_createTranslationUnitFromSourceFile( + CXIndex CIdx, const char *source_filename, int num_clang_command_line_args, + const char *const *clang_command_line_args, unsigned num_unsaved_files, + struct CXUnsavedFile *unsaved_files); + +/** + * Same as \c clang_createTranslationUnit2, but returns + * the \c CXTranslationUnit instead of an error code. In case of an error this + * routine returns a \c NULL \c CXTranslationUnit, without further detailed + * error codes. + */ +CINDEX_LINKAGE CXTranslationUnit +clang_createTranslationUnit(CXIndex CIdx, const char *ast_filename); + +/** + * Create a translation unit from an AST file (\c -emit-ast). + * + * \param[out] out_TU A non-NULL pointer to store the created + * \c CXTranslationUnit. + * + * \returns Zero on success, otherwise returns an error code. + */ +CINDEX_LINKAGE enum CXErrorCode +clang_createTranslationUnit2(CXIndex CIdx, const char *ast_filename, + CXTranslationUnit *out_TU); + +/** + * Flags that control the creation of translation units. + * + * The enumerators in this enumeration type are meant to be bitwise + * ORed together to specify which options should be used when + * constructing the translation unit. + */ +enum CXTranslationUnit_Flags { + /** + * Used to indicate that no special translation-unit options are + * needed. + */ + CXTranslationUnit_None = 0x0, + + /** + * Used to indicate that the parser should construct a "detailed" + * preprocessing record, including all macro definitions and instantiations. + * + * Constructing a detailed preprocessing record requires more memory + * and time to parse, since the information contained in the record + * is usually not retained. However, it can be useful for + * applications that require more detailed information about the + * behavior of the preprocessor. + */ + CXTranslationUnit_DetailedPreprocessingRecord = 0x01, + + /** + * Used to indicate that the translation unit is incomplete. + * + * When a translation unit is considered "incomplete", semantic + * analysis that is typically performed at the end of the + * translation unit will be suppressed. For example, this suppresses + * the completion of tentative declarations in C and of + * instantiation of implicitly-instantiation function templates in + * C++. This option is typically used when parsing a header with the + * intent of producing a precompiled header. + */ + CXTranslationUnit_Incomplete = 0x02, + + /** + * Used to indicate that the translation unit should be built with an + * implicit precompiled header for the preamble. + * + * An implicit precompiled header is used as an optimization when a + * particular translation unit is likely to be reparsed many times + * when the sources aren't changing that often. In this case, an + * implicit precompiled header will be built containing all of the + * initial includes at the top of the main file (what we refer to as + * the "preamble" of the file). In subsequent parses, if the + * preamble or the files in it have not changed, \c + * clang_reparseTranslationUnit() will re-use the implicit + * precompiled header to improve parsing performance. + */ + CXTranslationUnit_PrecompiledPreamble = 0x04, + + /** + * Used to indicate that the translation unit should cache some + * code-completion results with each reparse of the source file. + * + * Caching of code-completion results is a performance optimization that + * introduces some overhead to reparsing but improves the performance of + * code-completion operations. + */ + CXTranslationUnit_CacheCompletionResults = 0x08, + + /** + * Used to indicate that the translation unit will be serialized with + * \c clang_saveTranslationUnit. + * + * This option is typically used when parsing a header with the intent of + * producing a precompiled header. + */ + CXTranslationUnit_ForSerialization = 0x10, + + /** + * DEPRECATED: Enabled chained precompiled preambles in C++. + * + * Note: this is a *temporary* option that is available only while + * we are testing C++ precompiled preamble support. It is deprecated. + */ + CXTranslationUnit_CXXChainedPCH = 0x20, + + /** + * Used to indicate that function/method bodies should be skipped while + * parsing. + * + * This option can be used to search for declarations/definitions while + * ignoring the usages. + */ + CXTranslationUnit_SkipFunctionBodies = 0x40, + + /** + * Used to indicate that brief documentation comments should be + * included into the set of code completions returned from this translation + * unit. + */ + CXTranslationUnit_IncludeBriefCommentsInCodeCompletion = 0x80, + + /** + * Used to indicate that the precompiled preamble should be created on + * the first parse. Otherwise it will be created on the first reparse. This + * trades runtime on the first parse (serializing the preamble takes time) for + * reduced runtime on the second parse (can now reuse the preamble). + */ + CXTranslationUnit_CreatePreambleOnFirstParse = 0x100, + + /** + * Do not stop processing when fatal errors are encountered. + * + * When fatal errors are encountered while parsing a translation unit, + * semantic analysis is typically stopped early when compiling code. A common + * source for fatal errors are unresolvable include files. For the + * purposes of an IDE, this is undesirable behavior and as much information + * as possible should be reported. Use this flag to enable this behavior. + */ + CXTranslationUnit_KeepGoing = 0x200, + + /** + * Sets the preprocessor in a mode for parsing a single file only. + */ + CXTranslationUnit_SingleFileParse = 0x400, + + /** + * Used in combination with CXTranslationUnit_SkipFunctionBodies to + * constrain the skipping of function bodies to the preamble. + * + * The function bodies of the main file are not skipped. + */ + CXTranslationUnit_LimitSkipFunctionBodiesToPreamble = 0x800, + + /** + * Used to indicate that attributed types should be included in CXType. + */ + CXTranslationUnit_IncludeAttributedTypes = 0x1000, + + /** + * Used to indicate that implicit attributes should be visited. + */ + CXTranslationUnit_VisitImplicitAttributes = 0x2000, + + /** + * Used to indicate that non-errors from included files should be ignored. + * + * If set, clang_getDiagnosticSetFromTU() will not report e.g. warnings from + * included files anymore. This speeds up clang_getDiagnosticSetFromTU() for + * the case where these warnings are not of interest, as for an IDE for + * example, which typically shows only the diagnostics in the main file. + */ + CXTranslationUnit_IgnoreNonErrorsFromIncludedFiles = 0x4000, + + /** + * Tells the preprocessor not to skip excluded conditional blocks. + */ + CXTranslationUnit_RetainExcludedConditionalBlocks = 0x8000 +}; + +/** + * Returns the set of flags that is suitable for parsing a translation + * unit that is being edited. + * + * The set of flags returned provide options for \c clang_parseTranslationUnit() + * to indicate that the translation unit is likely to be reparsed many times, + * either explicitly (via \c clang_reparseTranslationUnit()) or implicitly + * (e.g., by code completion (\c clang_codeCompletionAt())). The returned flag + * set contains an unspecified set of optimizations (e.g., the precompiled + * preamble) geared toward improving the performance of these routines. The + * set of optimizations enabled may change from one version to the next. + */ +CINDEX_LINKAGE unsigned clang_defaultEditingTranslationUnitOptions(void); + +/** + * Same as \c clang_parseTranslationUnit2, but returns + * the \c CXTranslationUnit instead of an error code. In case of an error this + * routine returns a \c NULL \c CXTranslationUnit, without further detailed + * error codes. + */ +CINDEX_LINKAGE CXTranslationUnit clang_parseTranslationUnit( + CXIndex CIdx, const char *source_filename, + const char *const *command_line_args, int num_command_line_args, + struct CXUnsavedFile *unsaved_files, unsigned num_unsaved_files, + unsigned options); + +/** + * Parse the given source file and the translation unit corresponding + * to that file. + * + * This routine is the main entry point for the Clang C API, providing the + * ability to parse a source file into a translation unit that can then be + * queried by other functions in the API. This routine accepts a set of + * command-line arguments so that the compilation can be configured in the same + * way that the compiler is configured on the command line. + * + * \param CIdx The index object with which the translation unit will be + * associated. + * + * \param source_filename The name of the source file to load, or NULL if the + * source file is included in \c command_line_args. + * + * \param command_line_args The command-line arguments that would be + * passed to the \c clang executable if it were being invoked out-of-process. + * These command-line options will be parsed and will affect how the translation + * unit is parsed. Note that the following options are ignored: '-c', + * '-emit-ast', '-fsyntax-only' (which is the default), and '-o \'. + * + * \param num_command_line_args The number of command-line arguments in + * \c command_line_args. + * + * \param unsaved_files the files that have not yet been saved to disk + * but may be required for parsing, including the contents of + * those files. The contents and name of these files (as specified by + * CXUnsavedFile) are copied when necessary, so the client only needs to + * guarantee their validity until the call to this function returns. + * + * \param num_unsaved_files the number of unsaved file entries in \p + * unsaved_files. + * + * \param options A bitmask of options that affects how the translation unit + * is managed but not its compilation. This should be a bitwise OR of the + * CXTranslationUnit_XXX flags. + * + * \param[out] out_TU A non-NULL pointer to store the created + * \c CXTranslationUnit, describing the parsed code and containing any + * diagnostics produced by the compiler. + * + * \returns Zero on success, otherwise returns an error code. + */ +CINDEX_LINKAGE enum CXErrorCode clang_parseTranslationUnit2( + CXIndex CIdx, const char *source_filename, + const char *const *command_line_args, int num_command_line_args, + struct CXUnsavedFile *unsaved_files, unsigned num_unsaved_files, + unsigned options, CXTranslationUnit *out_TU); + +/** + * Same as clang_parseTranslationUnit2 but requires a full command line + * for \c command_line_args including argv[0]. This is useful if the standard + * library paths are relative to the binary. + */ +CINDEX_LINKAGE enum CXErrorCode clang_parseTranslationUnit2FullArgv( + CXIndex CIdx, const char *source_filename, + const char *const *command_line_args, int num_command_line_args, + struct CXUnsavedFile *unsaved_files, unsigned num_unsaved_files, + unsigned options, CXTranslationUnit *out_TU); + +/** + * Flags that control how translation units are saved. + * + * The enumerators in this enumeration type are meant to be bitwise + * ORed together to specify which options should be used when + * saving the translation unit. + */ +enum CXSaveTranslationUnit_Flags { + /** + * Used to indicate that no special saving options are needed. + */ + CXSaveTranslationUnit_None = 0x0 +}; + +/** + * Returns the set of flags that is suitable for saving a translation + * unit. + * + * The set of flags returned provide options for + * \c clang_saveTranslationUnit() by default. The returned flag + * set contains an unspecified set of options that save translation units with + * the most commonly-requested data. + */ +CINDEX_LINKAGE unsigned clang_defaultSaveOptions(CXTranslationUnit TU); + +/** + * Describes the kind of error that occurred (if any) in a call to + * \c clang_saveTranslationUnit(). + */ +enum CXSaveError { + /** + * Indicates that no error occurred while saving a translation unit. + */ + CXSaveError_None = 0, + + /** + * Indicates that an unknown error occurred while attempting to save + * the file. + * + * This error typically indicates that file I/O failed when attempting to + * write the file. + */ + CXSaveError_Unknown = 1, + + /** + * Indicates that errors during translation prevented this attempt + * to save the translation unit. + * + * Errors that prevent the translation unit from being saved can be + * extracted using \c clang_getNumDiagnostics() and \c clang_getDiagnostic(). + */ + CXSaveError_TranslationErrors = 2, + + /** + * Indicates that the translation unit to be saved was somehow + * invalid (e.g., NULL). + */ + CXSaveError_InvalidTU = 3 +}; + +/** + * Saves a translation unit into a serialized representation of + * that translation unit on disk. + * + * Any translation unit that was parsed without error can be saved + * into a file. The translation unit can then be deserialized into a + * new \c CXTranslationUnit with \c clang_createTranslationUnit() or, + * if it is an incomplete translation unit that corresponds to a + * header, used as a precompiled header when parsing other translation + * units. + * + * \param TU The translation unit to save. + * + * \param FileName The file to which the translation unit will be saved. + * + * \param options A bitmask of options that affects how the translation unit + * is saved. This should be a bitwise OR of the + * CXSaveTranslationUnit_XXX flags. + * + * \returns A value that will match one of the enumerators of the CXSaveError + * enumeration. Zero (CXSaveError_None) indicates that the translation unit was + * saved successfully, while a non-zero value indicates that a problem occurred. + */ +CINDEX_LINKAGE int clang_saveTranslationUnit(CXTranslationUnit TU, + const char *FileName, + unsigned options); + +/** + * Suspend a translation unit in order to free memory associated with it. + * + * A suspended translation unit uses significantly less memory but on the other + * side does not support any other calls than \c clang_reparseTranslationUnit + * to resume it or \c clang_disposeTranslationUnit to dispose it completely. + */ +CINDEX_LINKAGE unsigned clang_suspendTranslationUnit(CXTranslationUnit); + +/** + * Destroy the specified CXTranslationUnit object. + */ +CINDEX_LINKAGE void clang_disposeTranslationUnit(CXTranslationUnit); + +/** + * Flags that control the reparsing of translation units. + * + * The enumerators in this enumeration type are meant to be bitwise + * ORed together to specify which options should be used when + * reparsing the translation unit. + */ +enum CXReparse_Flags { + /** + * Used to indicate that no special reparsing options are needed. + */ + CXReparse_None = 0x0 +}; + +/** + * Returns the set of flags that is suitable for reparsing a translation + * unit. + * + * The set of flags returned provide options for + * \c clang_reparseTranslationUnit() by default. The returned flag + * set contains an unspecified set of optimizations geared toward common uses + * of reparsing. The set of optimizations enabled may change from one version + * to the next. + */ +CINDEX_LINKAGE unsigned clang_defaultReparseOptions(CXTranslationUnit TU); + +/** + * Reparse the source files that produced this translation unit. + * + * This routine can be used to re-parse the source files that originally + * created the given translation unit, for example because those source files + * have changed (either on disk or as passed via \p unsaved_files). The + * source code will be reparsed with the same command-line options as it + * was originally parsed. + * + * Reparsing a translation unit invalidates all cursors and source locations + * that refer into that translation unit. This makes reparsing a translation + * unit semantically equivalent to destroying the translation unit and then + * creating a new translation unit with the same command-line arguments. + * However, it may be more efficient to reparse a translation + * unit using this routine. + * + * \param TU The translation unit whose contents will be re-parsed. The + * translation unit must originally have been built with + * \c clang_createTranslationUnitFromSourceFile(). + * + * \param num_unsaved_files The number of unsaved file entries in \p + * unsaved_files. + * + * \param unsaved_files The files that have not yet been saved to disk + * but may be required for parsing, including the contents of + * those files. The contents and name of these files (as specified by + * CXUnsavedFile) are copied when necessary, so the client only needs to + * guarantee their validity until the call to this function returns. + * + * \param options A bitset of options composed of the flags in CXReparse_Flags. + * The function \c clang_defaultReparseOptions() produces a default set of + * options recommended for most uses, based on the translation unit. + * + * \returns 0 if the sources could be reparsed. A non-zero error code will be + * returned if reparsing was impossible, such that the translation unit is + * invalid. In such cases, the only valid call for \c TU is + * \c clang_disposeTranslationUnit(TU). The error codes returned by this + * routine are described by the \c CXErrorCode enum. + */ +CINDEX_LINKAGE int +clang_reparseTranslationUnit(CXTranslationUnit TU, unsigned num_unsaved_files, + struct CXUnsavedFile *unsaved_files, + unsigned options); + +/** + * Categorizes how memory is being used by a translation unit. + */ +enum CXTUResourceUsageKind { + CXTUResourceUsage_AST = 1, + CXTUResourceUsage_Identifiers = 2, + CXTUResourceUsage_Selectors = 3, + CXTUResourceUsage_GlobalCompletionResults = 4, + CXTUResourceUsage_SourceManagerContentCache = 5, + CXTUResourceUsage_AST_SideTables = 6, + CXTUResourceUsage_SourceManager_Membuffer_Malloc = 7, + CXTUResourceUsage_SourceManager_Membuffer_MMap = 8, + CXTUResourceUsage_ExternalASTSource_Membuffer_Malloc = 9, + CXTUResourceUsage_ExternalASTSource_Membuffer_MMap = 10, + CXTUResourceUsage_Preprocessor = 11, + CXTUResourceUsage_PreprocessingRecord = 12, + CXTUResourceUsage_SourceManager_DataStructures = 13, + CXTUResourceUsage_Preprocessor_HeaderSearch = 14, + CXTUResourceUsage_MEMORY_IN_BYTES_BEGIN = CXTUResourceUsage_AST, + CXTUResourceUsage_MEMORY_IN_BYTES_END = + CXTUResourceUsage_Preprocessor_HeaderSearch, + + CXTUResourceUsage_First = CXTUResourceUsage_AST, + CXTUResourceUsage_Last = CXTUResourceUsage_Preprocessor_HeaderSearch +}; + +/** + * Returns the human-readable null-terminated C string that represents + * the name of the memory category. This string should never be freed. + */ +CINDEX_LINKAGE +const char *clang_getTUResourceUsageName(enum CXTUResourceUsageKind kind); + +typedef struct CXTUResourceUsageEntry { + /* The memory usage category. */ + enum CXTUResourceUsageKind kind; + /* Amount of resources used. + The units will depend on the resource kind. */ + unsigned long amount; +} CXTUResourceUsageEntry; + +/** + * The memory usage of a CXTranslationUnit, broken into categories. + */ +typedef struct CXTUResourceUsage { + /* Private data member, used for queries. */ + void *data; + + /* The number of entries in the 'entries' array. */ + unsigned numEntries; + + /* An array of key-value pairs, representing the breakdown of memory + usage. */ + CXTUResourceUsageEntry *entries; + +} CXTUResourceUsage; + +/** + * Return the memory usage of a translation unit. This object + * should be released with clang_disposeCXTUResourceUsage(). + */ +CINDEX_LINKAGE CXTUResourceUsage +clang_getCXTUResourceUsage(CXTranslationUnit TU); + +CINDEX_LINKAGE void clang_disposeCXTUResourceUsage(CXTUResourceUsage usage); + +/** + * Get target information for this translation unit. + * + * The CXTargetInfo object cannot outlive the CXTranslationUnit object. + */ +CINDEX_LINKAGE CXTargetInfo +clang_getTranslationUnitTargetInfo(CXTranslationUnit CTUnit); + +/** + * Destroy the CXTargetInfo object. + */ +CINDEX_LINKAGE void clang_TargetInfo_dispose(CXTargetInfo Info); + +/** + * Get the normalized target triple as a string. + * + * Returns the empty string in case of any error. + */ +CINDEX_LINKAGE CXString clang_TargetInfo_getTriple(CXTargetInfo Info); + +/** + * Get the pointer width of the target in bits. + * + * Returns -1 in case of error. + */ +CINDEX_LINKAGE int clang_TargetInfo_getPointerWidth(CXTargetInfo Info); + +/** + * @} + */ + +/** + * Describes the kind of entity that a cursor refers to. + */ +enum CXCursorKind { + /* Declarations */ + /** + * A declaration whose specific kind is not exposed via this + * interface. + * + * Unexposed declarations have the same operations as any other kind + * of declaration; one can extract their location information, + * spelling, find their definitions, etc. However, the specific kind + * of the declaration is not reported. + */ + CXCursor_UnexposedDecl = 1, + /** A C or C++ struct. */ + CXCursor_StructDecl = 2, + /** A C or C++ union. */ + CXCursor_UnionDecl = 3, + /** A C++ class. */ + CXCursor_ClassDecl = 4, + /** An enumeration. */ + CXCursor_EnumDecl = 5, + /** + * A field (in C) or non-static data member (in C++) in a + * struct, union, or C++ class. + */ + CXCursor_FieldDecl = 6, + /** An enumerator constant. */ + CXCursor_EnumConstantDecl = 7, + /** A function. */ + CXCursor_FunctionDecl = 8, + /** A variable. */ + CXCursor_VarDecl = 9, + /** A function or method parameter. */ + CXCursor_ParmDecl = 10, + /** An Objective-C \@interface. */ + CXCursor_ObjCInterfaceDecl = 11, + /** An Objective-C \@interface for a category. */ + CXCursor_ObjCCategoryDecl = 12, + /** An Objective-C \@protocol declaration. */ + CXCursor_ObjCProtocolDecl = 13, + /** An Objective-C \@property declaration. */ + CXCursor_ObjCPropertyDecl = 14, + /** An Objective-C instance variable. */ + CXCursor_ObjCIvarDecl = 15, + /** An Objective-C instance method. */ + CXCursor_ObjCInstanceMethodDecl = 16, + /** An Objective-C class method. */ + CXCursor_ObjCClassMethodDecl = 17, + /** An Objective-C \@implementation. */ + CXCursor_ObjCImplementationDecl = 18, + /** An Objective-C \@implementation for a category. */ + CXCursor_ObjCCategoryImplDecl = 19, + /** A typedef. */ + CXCursor_TypedefDecl = 20, + /** A C++ class method. */ + CXCursor_CXXMethod = 21, + /** A C++ namespace. */ + CXCursor_Namespace = 22, + /** A linkage specification, e.g. 'extern "C"'. */ + CXCursor_LinkageSpec = 23, + /** A C++ constructor. */ + CXCursor_Constructor = 24, + /** A C++ destructor. */ + CXCursor_Destructor = 25, + /** A C++ conversion function. */ + CXCursor_ConversionFunction = 26, + /** A C++ template type parameter. */ + CXCursor_TemplateTypeParameter = 27, + /** A C++ non-type template parameter. */ + CXCursor_NonTypeTemplateParameter = 28, + /** A C++ template template parameter. */ + CXCursor_TemplateTemplateParameter = 29, + /** A C++ function template. */ + CXCursor_FunctionTemplate = 30, + /** A C++ class template. */ + CXCursor_ClassTemplate = 31, + /** A C++ class template partial specialization. */ + CXCursor_ClassTemplatePartialSpecialization = 32, + /** A C++ namespace alias declaration. */ + CXCursor_NamespaceAlias = 33, + /** A C++ using directive. */ + CXCursor_UsingDirective = 34, + /** A C++ using declaration. */ + CXCursor_UsingDeclaration = 35, + /** A C++ alias declaration */ + CXCursor_TypeAliasDecl = 36, + /** An Objective-C \@synthesize definition. */ + CXCursor_ObjCSynthesizeDecl = 37, + /** An Objective-C \@dynamic definition. */ + CXCursor_ObjCDynamicDecl = 38, + /** An access specifier. */ + CXCursor_CXXAccessSpecifier = 39, + + CXCursor_FirstDecl = CXCursor_UnexposedDecl, + CXCursor_LastDecl = CXCursor_CXXAccessSpecifier, + + /* References */ + CXCursor_FirstRef = 40, /* Decl references */ + CXCursor_ObjCSuperClassRef = 40, + CXCursor_ObjCProtocolRef = 41, + CXCursor_ObjCClassRef = 42, + /** + * A reference to a type declaration. + * + * A type reference occurs anywhere where a type is named but not + * declared. For example, given: + * + * \code + * typedef unsigned size_type; + * size_type size; + * \endcode + * + * The typedef is a declaration of size_type (CXCursor_TypedefDecl), + * while the type of the variable "size" is referenced. The cursor + * referenced by the type of size is the typedef for size_type. + */ + CXCursor_TypeRef = 43, + CXCursor_CXXBaseSpecifier = 44, + /** + * A reference to a class template, function template, template + * template parameter, or class template partial specialization. + */ + CXCursor_TemplateRef = 45, + /** + * A reference to a namespace or namespace alias. + */ + CXCursor_NamespaceRef = 46, + /** + * A reference to a member of a struct, union, or class that occurs in + * some non-expression context, e.g., a designated initializer. + */ + CXCursor_MemberRef = 47, + /** + * A reference to a labeled statement. + * + * This cursor kind is used to describe the jump to "start_over" in the + * goto statement in the following example: + * + * \code + * start_over: + * ++counter; + * + * goto start_over; + * \endcode + * + * A label reference cursor refers to a label statement. + */ + CXCursor_LabelRef = 48, + + /** + * A reference to a set of overloaded functions or function templates + * that has not yet been resolved to a specific function or function template. + * + * An overloaded declaration reference cursor occurs in C++ templates where + * a dependent name refers to a function. For example: + * + * \code + * template void swap(T&, T&); + * + * struct X { ... }; + * void swap(X&, X&); + * + * template + * void reverse(T* first, T* last) { + * while (first < last - 1) { + * swap(*first, *--last); + * ++first; + * } + * } + * + * struct Y { }; + * void swap(Y&, Y&); + * \endcode + * + * Here, the identifier "swap" is associated with an overloaded declaration + * reference. In the template definition, "swap" refers to either of the two + * "swap" functions declared above, so both results will be available. At + * instantiation time, "swap" may also refer to other functions found via + * argument-dependent lookup (e.g., the "swap" function at the end of the + * example). + * + * The functions \c clang_getNumOverloadedDecls() and + * \c clang_getOverloadedDecl() can be used to retrieve the definitions + * referenced by this cursor. + */ + CXCursor_OverloadedDeclRef = 49, + + /** + * A reference to a variable that occurs in some non-expression + * context, e.g., a C++ lambda capture list. + */ + CXCursor_VariableRef = 50, + + CXCursor_LastRef = CXCursor_VariableRef, + + /* Error conditions */ + CXCursor_FirstInvalid = 70, + CXCursor_InvalidFile = 70, + CXCursor_NoDeclFound = 71, + CXCursor_NotImplemented = 72, + CXCursor_InvalidCode = 73, + CXCursor_LastInvalid = CXCursor_InvalidCode, + + /* Expressions */ + CXCursor_FirstExpr = 100, + + /** + * An expression whose specific kind is not exposed via this + * interface. + * + * Unexposed expressions have the same operations as any other kind + * of expression; one can extract their location information, + * spelling, children, etc. However, the specific kind of the + * expression is not reported. + */ + CXCursor_UnexposedExpr = 100, + + /** + * An expression that refers to some value declaration, such + * as a function, variable, or enumerator. + */ + CXCursor_DeclRefExpr = 101, + + /** + * An expression that refers to a member of a struct, union, + * class, Objective-C class, etc. + */ + CXCursor_MemberRefExpr = 102, + + /** An expression that calls a function. */ + CXCursor_CallExpr = 103, + + /** An expression that sends a message to an Objective-C + object or class. */ + CXCursor_ObjCMessageExpr = 104, + + /** An expression that represents a block literal. */ + CXCursor_BlockExpr = 105, + + /** An integer literal. + */ + CXCursor_IntegerLiteral = 106, + + /** A floating point number literal. + */ + CXCursor_FloatingLiteral = 107, + + /** An imaginary number literal. + */ + CXCursor_ImaginaryLiteral = 108, + + /** A string literal. + */ + CXCursor_StringLiteral = 109, + + /** A character literal. + */ + CXCursor_CharacterLiteral = 110, + + /** A parenthesized expression, e.g. "(1)". + * + * This AST node is only formed if full location information is requested. + */ + CXCursor_ParenExpr = 111, + + /** This represents the unary-expression's (except sizeof and + * alignof). + */ + CXCursor_UnaryOperator = 112, + + /** [C99 6.5.2.1] Array Subscripting. + */ + CXCursor_ArraySubscriptExpr = 113, + + /** A builtin binary operation expression such as "x + y" or + * "x <= y". + */ + CXCursor_BinaryOperator = 114, + + /** Compound assignment such as "+=". + */ + CXCursor_CompoundAssignOperator = 115, + + /** The ?: ternary operator. + */ + CXCursor_ConditionalOperator = 116, + + /** An explicit cast in C (C99 6.5.4) or a C-style cast in C++ + * (C++ [expr.cast]), which uses the syntax (Type)expr. + * + * For example: (int)f. + */ + CXCursor_CStyleCastExpr = 117, + + /** [C99 6.5.2.5] + */ + CXCursor_CompoundLiteralExpr = 118, + + /** Describes an C or C++ initializer list. + */ + CXCursor_InitListExpr = 119, + + /** The GNU address of label extension, representing &&label. + */ + CXCursor_AddrLabelExpr = 120, + + /** This is the GNU Statement Expression extension: ({int X=4; X;}) + */ + CXCursor_StmtExpr = 121, + + /** Represents a C11 generic selection. + */ + CXCursor_GenericSelectionExpr = 122, + + /** Implements the GNU __null extension, which is a name for a null + * pointer constant that has integral type (e.g., int or long) and is the same + * size and alignment as a pointer. + * + * The __null extension is typically only used by system headers, which define + * NULL as __null in C++ rather than using 0 (which is an integer that may not + * match the size of a pointer). + */ + CXCursor_GNUNullExpr = 123, + + /** C++'s static_cast<> expression. + */ + CXCursor_CXXStaticCastExpr = 124, + + /** C++'s dynamic_cast<> expression. + */ + CXCursor_CXXDynamicCastExpr = 125, + + /** C++'s reinterpret_cast<> expression. + */ + CXCursor_CXXReinterpretCastExpr = 126, + + /** C++'s const_cast<> expression. + */ + CXCursor_CXXConstCastExpr = 127, + + /** Represents an explicit C++ type conversion that uses "functional" + * notion (C++ [expr.type.conv]). + * + * Example: + * \code + * x = int(0.5); + * \endcode + */ + CXCursor_CXXFunctionalCastExpr = 128, + + /** A C++ typeid expression (C++ [expr.typeid]). + */ + CXCursor_CXXTypeidExpr = 129, + + /** [C++ 2.13.5] C++ Boolean Literal. + */ + CXCursor_CXXBoolLiteralExpr = 130, + + /** [C++0x 2.14.7] C++ Pointer Literal. + */ + CXCursor_CXXNullPtrLiteralExpr = 131, + + /** Represents the "this" expression in C++ + */ + CXCursor_CXXThisExpr = 132, + + /** [C++ 15] C++ Throw Expression. + * + * This handles 'throw' and 'throw' assignment-expression. When + * assignment-expression isn't present, Op will be null. + */ + CXCursor_CXXThrowExpr = 133, + + /** A new expression for memory allocation and constructor calls, e.g: + * "new CXXNewExpr(foo)". + */ + CXCursor_CXXNewExpr = 134, + + /** A delete expression for memory deallocation and destructor calls, + * e.g. "delete[] pArray". + */ + CXCursor_CXXDeleteExpr = 135, + + /** A unary expression. (noexcept, sizeof, or other traits) + */ + CXCursor_UnaryExpr = 136, + + /** An Objective-C string literal i.e. @"foo". + */ + CXCursor_ObjCStringLiteral = 137, + + /** An Objective-C \@encode expression. + */ + CXCursor_ObjCEncodeExpr = 138, + + /** An Objective-C \@selector expression. + */ + CXCursor_ObjCSelectorExpr = 139, + + /** An Objective-C \@protocol expression. + */ + CXCursor_ObjCProtocolExpr = 140, + + /** An Objective-C "bridged" cast expression, which casts between + * Objective-C pointers and C pointers, transferring ownership in the process. + * + * \code + * NSString *str = (__bridge_transfer NSString *)CFCreateString(); + * \endcode + */ + CXCursor_ObjCBridgedCastExpr = 141, + + /** Represents a C++0x pack expansion that produces a sequence of + * expressions. + * + * A pack expansion expression contains a pattern (which itself is an + * expression) followed by an ellipsis. For example: + * + * \code + * template + * void forward(F f, Types &&...args) { + * f(static_cast(args)...); + * } + * \endcode + */ + CXCursor_PackExpansionExpr = 142, + + /** Represents an expression that computes the length of a parameter + * pack. + * + * \code + * template + * struct count { + * static const unsigned value = sizeof...(Types); + * }; + * \endcode + */ + CXCursor_SizeOfPackExpr = 143, + + /* Represents a C++ lambda expression that produces a local function + * object. + * + * \code + * void abssort(float *x, unsigned N) { + * std::sort(x, x + N, + * [](float a, float b) { + * return std::abs(a) < std::abs(b); + * }); + * } + * \endcode + */ + CXCursor_LambdaExpr = 144, + + /** Objective-c Boolean Literal. + */ + CXCursor_ObjCBoolLiteralExpr = 145, + + /** Represents the "self" expression in an Objective-C method. + */ + CXCursor_ObjCSelfExpr = 146, + + /** OpenMP 5.0 [2.1.5, Array Section]. + * OpenACC 3.3 [2.7.1, Data Specification for Data Clauses (Sub Arrays)] + */ + CXCursor_ArraySectionExpr = 147, + + /** Represents an @available(...) check. + */ + CXCursor_ObjCAvailabilityCheckExpr = 148, + + /** + * Fixed point literal + */ + CXCursor_FixedPointLiteral = 149, + + /** OpenMP 5.0 [2.1.4, Array Shaping]. + */ + CXCursor_OMPArrayShapingExpr = 150, + + /** + * OpenMP 5.0 [2.1.6 Iterators] + */ + CXCursor_OMPIteratorExpr = 151, + + /** OpenCL's addrspace_cast<> expression. + */ + CXCursor_CXXAddrspaceCastExpr = 152, + + /** + * Expression that references a C++20 concept. + */ + CXCursor_ConceptSpecializationExpr = 153, + + /** + * Expression that references a C++20 requires expression. + */ + CXCursor_RequiresExpr = 154, + + /** + * Expression that references a C++20 parenthesized list aggregate + * initializer. + */ + CXCursor_CXXParenListInitExpr = 155, + + /** + * Represents a C++26 pack indexing expression. + */ + CXCursor_PackIndexingExpr = 156, + + CXCursor_LastExpr = CXCursor_PackIndexingExpr, + + /* Statements */ + CXCursor_FirstStmt = 200, + /** + * A statement whose specific kind is not exposed via this + * interface. + * + * Unexposed statements have the same operations as any other kind of + * statement; one can extract their location information, spelling, + * children, etc. However, the specific kind of the statement is not + * reported. + */ + CXCursor_UnexposedStmt = 200, + + /** A labelled statement in a function. + * + * This cursor kind is used to describe the "start_over:" label statement in + * the following example: + * + * \code + * start_over: + * ++counter; + * \endcode + * + */ + CXCursor_LabelStmt = 201, + + /** A group of statements like { stmt stmt }. + * + * This cursor kind is used to describe compound statements, e.g. function + * bodies. + */ + CXCursor_CompoundStmt = 202, + + /** A case statement. + */ + CXCursor_CaseStmt = 203, + + /** A default statement. + */ + CXCursor_DefaultStmt = 204, + + /** An if statement + */ + CXCursor_IfStmt = 205, + + /** A switch statement. + */ + CXCursor_SwitchStmt = 206, + + /** A while statement. + */ + CXCursor_WhileStmt = 207, + + /** A do statement. + */ + CXCursor_DoStmt = 208, + + /** A for statement. + */ + CXCursor_ForStmt = 209, + + /** A goto statement. + */ + CXCursor_GotoStmt = 210, + + /** An indirect goto statement. + */ + CXCursor_IndirectGotoStmt = 211, + + /** A continue statement. + */ + CXCursor_ContinueStmt = 212, + + /** A break statement. + */ + CXCursor_BreakStmt = 213, + + /** A return statement. + */ + CXCursor_ReturnStmt = 214, + + /** A GCC inline assembly statement extension. + */ + CXCursor_GCCAsmStmt = 215, + CXCursor_AsmStmt = CXCursor_GCCAsmStmt, + + /** Objective-C's overall \@try-\@catch-\@finally statement. + */ + CXCursor_ObjCAtTryStmt = 216, + + /** Objective-C's \@catch statement. + */ + CXCursor_ObjCAtCatchStmt = 217, + + /** Objective-C's \@finally statement. + */ + CXCursor_ObjCAtFinallyStmt = 218, + + /** Objective-C's \@throw statement. + */ + CXCursor_ObjCAtThrowStmt = 219, + + /** Objective-C's \@synchronized statement. + */ + CXCursor_ObjCAtSynchronizedStmt = 220, + + /** Objective-C's autorelease pool statement. + */ + CXCursor_ObjCAutoreleasePoolStmt = 221, + + /** Objective-C's collection statement. + */ + CXCursor_ObjCForCollectionStmt = 222, + + /** C++'s catch statement. + */ + CXCursor_CXXCatchStmt = 223, + + /** C++'s try statement. + */ + CXCursor_CXXTryStmt = 224, + + /** C++'s for (* : *) statement. + */ + CXCursor_CXXForRangeStmt = 225, + + /** Windows Structured Exception Handling's try statement. + */ + CXCursor_SEHTryStmt = 226, + + /** Windows Structured Exception Handling's except statement. + */ + CXCursor_SEHExceptStmt = 227, + + /** Windows Structured Exception Handling's finally statement. + */ + CXCursor_SEHFinallyStmt = 228, + + /** A MS inline assembly statement extension. + */ + CXCursor_MSAsmStmt = 229, + + /** The null statement ";": C99 6.8.3p3. + * + * This cursor kind is used to describe the null statement. + */ + CXCursor_NullStmt = 230, + + /** Adaptor class for mixing declarations with statements and + * expressions. + */ + CXCursor_DeclStmt = 231, + + /** OpenMP parallel directive. + */ + CXCursor_OMPParallelDirective = 232, + + /** OpenMP SIMD directive. + */ + CXCursor_OMPSimdDirective = 233, + + /** OpenMP for directive. + */ + CXCursor_OMPForDirective = 234, + + /** OpenMP sections directive. + */ + CXCursor_OMPSectionsDirective = 235, + + /** OpenMP section directive. + */ + CXCursor_OMPSectionDirective = 236, + + /** OpenMP single directive. + */ + CXCursor_OMPSingleDirective = 237, + + /** OpenMP parallel for directive. + */ + CXCursor_OMPParallelForDirective = 238, + + /** OpenMP parallel sections directive. + */ + CXCursor_OMPParallelSectionsDirective = 239, + + /** OpenMP task directive. + */ + CXCursor_OMPTaskDirective = 240, + + /** OpenMP master directive. + */ + CXCursor_OMPMasterDirective = 241, + + /** OpenMP critical directive. + */ + CXCursor_OMPCriticalDirective = 242, + + /** OpenMP taskyield directive. + */ + CXCursor_OMPTaskyieldDirective = 243, + + /** OpenMP barrier directive. + */ + CXCursor_OMPBarrierDirective = 244, + + /** OpenMP taskwait directive. + */ + CXCursor_OMPTaskwaitDirective = 245, + + /** OpenMP flush directive. + */ + CXCursor_OMPFlushDirective = 246, + + /** Windows Structured Exception Handling's leave statement. + */ + CXCursor_SEHLeaveStmt = 247, + + /** OpenMP ordered directive. + */ + CXCursor_OMPOrderedDirective = 248, + + /** OpenMP atomic directive. + */ + CXCursor_OMPAtomicDirective = 249, + + /** OpenMP for SIMD directive. + */ + CXCursor_OMPForSimdDirective = 250, + + /** OpenMP parallel for SIMD directive. + */ + CXCursor_OMPParallelForSimdDirective = 251, + + /** OpenMP target directive. + */ + CXCursor_OMPTargetDirective = 252, + + /** OpenMP teams directive. + */ + CXCursor_OMPTeamsDirective = 253, + + /** OpenMP taskgroup directive. + */ + CXCursor_OMPTaskgroupDirective = 254, + + /** OpenMP cancellation point directive. + */ + CXCursor_OMPCancellationPointDirective = 255, + + /** OpenMP cancel directive. + */ + CXCursor_OMPCancelDirective = 256, + + /** OpenMP target data directive. + */ + CXCursor_OMPTargetDataDirective = 257, + + /** OpenMP taskloop directive. + */ + CXCursor_OMPTaskLoopDirective = 258, + + /** OpenMP taskloop simd directive. + */ + CXCursor_OMPTaskLoopSimdDirective = 259, + + /** OpenMP distribute directive. + */ + CXCursor_OMPDistributeDirective = 260, + + /** OpenMP target enter data directive. + */ + CXCursor_OMPTargetEnterDataDirective = 261, + + /** OpenMP target exit data directive. + */ + CXCursor_OMPTargetExitDataDirective = 262, + + /** OpenMP target parallel directive. + */ + CXCursor_OMPTargetParallelDirective = 263, + + /** OpenMP target parallel for directive. + */ + CXCursor_OMPTargetParallelForDirective = 264, + + /** OpenMP target update directive. + */ + CXCursor_OMPTargetUpdateDirective = 265, + + /** OpenMP distribute parallel for directive. + */ + CXCursor_OMPDistributeParallelForDirective = 266, + + /** OpenMP distribute parallel for simd directive. + */ + CXCursor_OMPDistributeParallelForSimdDirective = 267, + + /** OpenMP distribute simd directive. + */ + CXCursor_OMPDistributeSimdDirective = 268, + + /** OpenMP target parallel for simd directive. + */ + CXCursor_OMPTargetParallelForSimdDirective = 269, + + /** OpenMP target simd directive. + */ + CXCursor_OMPTargetSimdDirective = 270, + + /** OpenMP teams distribute directive. + */ + CXCursor_OMPTeamsDistributeDirective = 271, + + /** OpenMP teams distribute simd directive. + */ + CXCursor_OMPTeamsDistributeSimdDirective = 272, + + /** OpenMP teams distribute parallel for simd directive. + */ + CXCursor_OMPTeamsDistributeParallelForSimdDirective = 273, + + /** OpenMP teams distribute parallel for directive. + */ + CXCursor_OMPTeamsDistributeParallelForDirective = 274, + + /** OpenMP target teams directive. + */ + CXCursor_OMPTargetTeamsDirective = 275, + + /** OpenMP target teams distribute directive. + */ + CXCursor_OMPTargetTeamsDistributeDirective = 276, + + /** OpenMP target teams distribute parallel for directive. + */ + CXCursor_OMPTargetTeamsDistributeParallelForDirective = 277, + + /** OpenMP target teams distribute parallel for simd directive. + */ + CXCursor_OMPTargetTeamsDistributeParallelForSimdDirective = 278, + + /** OpenMP target teams distribute simd directive. + */ + CXCursor_OMPTargetTeamsDistributeSimdDirective = 279, + + /** C++2a std::bit_cast expression. + */ + CXCursor_BuiltinBitCastExpr = 280, + + /** OpenMP master taskloop directive. + */ + CXCursor_OMPMasterTaskLoopDirective = 281, + + /** OpenMP parallel master taskloop directive. + */ + CXCursor_OMPParallelMasterTaskLoopDirective = 282, + + /** OpenMP master taskloop simd directive. + */ + CXCursor_OMPMasterTaskLoopSimdDirective = 283, + + /** OpenMP parallel master taskloop simd directive. + */ + CXCursor_OMPParallelMasterTaskLoopSimdDirective = 284, + + /** OpenMP parallel master directive. + */ + CXCursor_OMPParallelMasterDirective = 285, + + /** OpenMP depobj directive. + */ + CXCursor_OMPDepobjDirective = 286, + + /** OpenMP scan directive. + */ + CXCursor_OMPScanDirective = 287, + + /** OpenMP tile directive. + */ + CXCursor_OMPTileDirective = 288, + + /** OpenMP canonical loop. + */ + CXCursor_OMPCanonicalLoop = 289, + + /** OpenMP interop directive. + */ + CXCursor_OMPInteropDirective = 290, + + /** OpenMP dispatch directive. + */ + CXCursor_OMPDispatchDirective = 291, + + /** OpenMP masked directive. + */ + CXCursor_OMPMaskedDirective = 292, + + /** OpenMP unroll directive. + */ + CXCursor_OMPUnrollDirective = 293, + + /** OpenMP metadirective directive. + */ + CXCursor_OMPMetaDirective = 294, + + /** OpenMP loop directive. + */ + CXCursor_OMPGenericLoopDirective = 295, + + /** OpenMP teams loop directive. + */ + CXCursor_OMPTeamsGenericLoopDirective = 296, + + /** OpenMP target teams loop directive. + */ + CXCursor_OMPTargetTeamsGenericLoopDirective = 297, + + /** OpenMP parallel loop directive. + */ + CXCursor_OMPParallelGenericLoopDirective = 298, + + /** OpenMP target parallel loop directive. + */ + CXCursor_OMPTargetParallelGenericLoopDirective = 299, + + /** OpenMP parallel masked directive. + */ + CXCursor_OMPParallelMaskedDirective = 300, + + /** OpenMP masked taskloop directive. + */ + CXCursor_OMPMaskedTaskLoopDirective = 301, + + /** OpenMP masked taskloop simd directive. + */ + CXCursor_OMPMaskedTaskLoopSimdDirective = 302, + + /** OpenMP parallel masked taskloop directive. + */ + CXCursor_OMPParallelMaskedTaskLoopDirective = 303, + + /** OpenMP parallel masked taskloop simd directive. + */ + CXCursor_OMPParallelMaskedTaskLoopSimdDirective = 304, + + /** OpenMP error directive. + */ + CXCursor_OMPErrorDirective = 305, + + /** OpenMP scope directive. + */ + CXCursor_OMPScopeDirective = 306, + + /** OpenMP reverse directive. + */ + CXCursor_OMPReverseDirective = 307, + + /** OpenMP interchange directive. + */ + CXCursor_OMPInterchangeDirective = 308, + + /** OpenACC Compute Construct. + */ + CXCursor_OpenACCComputeConstruct = 320, + + /** OpenACC Loop Construct. + */ + CXCursor_OpenACCLoopConstruct = 321, + + CXCursor_LastStmt = CXCursor_OpenACCLoopConstruct, + + /** + * Cursor that represents the translation unit itself. + * + * The translation unit cursor exists primarily to act as the root + * cursor for traversing the contents of a translation unit. + */ + CXCursor_TranslationUnit = 350, + + /* Attributes */ + CXCursor_FirstAttr = 400, + /** + * An attribute whose specific kind is not exposed via this + * interface. + */ + CXCursor_UnexposedAttr = 400, + + CXCursor_IBActionAttr = 401, + CXCursor_IBOutletAttr = 402, + CXCursor_IBOutletCollectionAttr = 403, + CXCursor_CXXFinalAttr = 404, + CXCursor_CXXOverrideAttr = 405, + CXCursor_AnnotateAttr = 406, + CXCursor_AsmLabelAttr = 407, + CXCursor_PackedAttr = 408, + CXCursor_PureAttr = 409, + CXCursor_ConstAttr = 410, + CXCursor_NoDuplicateAttr = 411, + CXCursor_CUDAConstantAttr = 412, + CXCursor_CUDADeviceAttr = 413, + CXCursor_CUDAGlobalAttr = 414, + CXCursor_CUDAHostAttr = 415, + CXCursor_CUDASharedAttr = 416, + CXCursor_VisibilityAttr = 417, + CXCursor_DLLExport = 418, + CXCursor_DLLImport = 419, + CXCursor_NSReturnsRetained = 420, + CXCursor_NSReturnsNotRetained = 421, + CXCursor_NSReturnsAutoreleased = 422, + CXCursor_NSConsumesSelf = 423, + CXCursor_NSConsumed = 424, + CXCursor_ObjCException = 425, + CXCursor_ObjCNSObject = 426, + CXCursor_ObjCIndependentClass = 427, + CXCursor_ObjCPreciseLifetime = 428, + CXCursor_ObjCReturnsInnerPointer = 429, + CXCursor_ObjCRequiresSuper = 430, + CXCursor_ObjCRootClass = 431, + CXCursor_ObjCSubclassingRestricted = 432, + CXCursor_ObjCExplicitProtocolImpl = 433, + CXCursor_ObjCDesignatedInitializer = 434, + CXCursor_ObjCRuntimeVisible = 435, + CXCursor_ObjCBoxable = 436, + CXCursor_FlagEnum = 437, + CXCursor_ConvergentAttr = 438, + CXCursor_WarnUnusedAttr = 439, + CXCursor_WarnUnusedResultAttr = 440, + CXCursor_AlignedAttr = 441, + CXCursor_LastAttr = CXCursor_AlignedAttr, + + /* Preprocessing */ + CXCursor_PreprocessingDirective = 500, + CXCursor_MacroDefinition = 501, + CXCursor_MacroExpansion = 502, + CXCursor_MacroInstantiation = CXCursor_MacroExpansion, + CXCursor_InclusionDirective = 503, + CXCursor_FirstPreprocessing = CXCursor_PreprocessingDirective, + CXCursor_LastPreprocessing = CXCursor_InclusionDirective, + + /* Extra Declarations */ + /** + * A module import declaration. + */ + CXCursor_ModuleImportDecl = 600, + CXCursor_TypeAliasTemplateDecl = 601, + /** + * A static_assert or _Static_assert node + */ + CXCursor_StaticAssert = 602, + /** + * a friend declaration. + */ + CXCursor_FriendDecl = 603, + /** + * a concept declaration. + */ + CXCursor_ConceptDecl = 604, + + CXCursor_FirstExtraDecl = CXCursor_ModuleImportDecl, + CXCursor_LastExtraDecl = CXCursor_ConceptDecl, + + /** + * A code completion overload candidate. + */ + CXCursor_OverloadCandidate = 700 +}; + +/** + * A cursor representing some element in the abstract syntax tree for + * a translation unit. + * + * The cursor abstraction unifies the different kinds of entities in a + * program--declaration, statements, expressions, references to declarations, + * etc.--under a single "cursor" abstraction with a common set of operations. + * Common operation for a cursor include: getting the physical location in + * a source file where the cursor points, getting the name associated with a + * cursor, and retrieving cursors for any child nodes of a particular cursor. + * + * Cursors can be produced in two specific ways. + * clang_getTranslationUnitCursor() produces a cursor for a translation unit, + * from which one can use clang_visitChildren() to explore the rest of the + * translation unit. clang_getCursor() maps from a physical source location + * to the entity that resides at that location, allowing one to map from the + * source code into the AST. + */ +typedef struct { + enum CXCursorKind kind; + int xdata; + const void *data[3]; +} CXCursor; + +/** + * \defgroup CINDEX_CURSOR_MANIP Cursor manipulations + * + * @{ + */ + +/** + * Retrieve the NULL cursor, which represents no entity. + */ +CINDEX_LINKAGE CXCursor clang_getNullCursor(void); + +/** + * Retrieve the cursor that represents the given translation unit. + * + * The translation unit cursor can be used to start traversing the + * various declarations within the given translation unit. + */ +CINDEX_LINKAGE CXCursor clang_getTranslationUnitCursor(CXTranslationUnit); + +/** + * Determine whether two cursors are equivalent. + */ +CINDEX_LINKAGE unsigned clang_equalCursors(CXCursor, CXCursor); + +/** + * Returns non-zero if \p cursor is null. + */ +CINDEX_LINKAGE int clang_Cursor_isNull(CXCursor cursor); + +/** + * Compute a hash value for the given cursor. + */ +CINDEX_LINKAGE unsigned clang_hashCursor(CXCursor); + +/** + * Retrieve the kind of the given cursor. + */ +CINDEX_LINKAGE enum CXCursorKind clang_getCursorKind(CXCursor); + +/** + * Determine whether the given cursor kind represents a declaration. + */ +CINDEX_LINKAGE unsigned clang_isDeclaration(enum CXCursorKind); + +/** + * Determine whether the given declaration is invalid. + * + * A declaration is invalid if it could not be parsed successfully. + * + * \returns non-zero if the cursor represents a declaration and it is + * invalid, otherwise NULL. + */ +CINDEX_LINKAGE unsigned clang_isInvalidDeclaration(CXCursor); + +/** + * Determine whether the given cursor kind represents a simple + * reference. + * + * Note that other kinds of cursors (such as expressions) can also refer to + * other cursors. Use clang_getCursorReferenced() to determine whether a + * particular cursor refers to another entity. + */ +CINDEX_LINKAGE unsigned clang_isReference(enum CXCursorKind); + +/** + * Determine whether the given cursor kind represents an expression. + */ +CINDEX_LINKAGE unsigned clang_isExpression(enum CXCursorKind); + +/** + * Determine whether the given cursor kind represents a statement. + */ +CINDEX_LINKAGE unsigned clang_isStatement(enum CXCursorKind); + +/** + * Determine whether the given cursor kind represents an attribute. + */ +CINDEX_LINKAGE unsigned clang_isAttribute(enum CXCursorKind); + +/** + * Determine whether the given cursor has any attributes. + */ +CINDEX_LINKAGE unsigned clang_Cursor_hasAttrs(CXCursor C); + +/** + * Determine whether the given cursor kind represents an invalid + * cursor. + */ +CINDEX_LINKAGE unsigned clang_isInvalid(enum CXCursorKind); + +/** + * Determine whether the given cursor kind represents a translation + * unit. + */ +CINDEX_LINKAGE unsigned clang_isTranslationUnit(enum CXCursorKind); + +/*** + * Determine whether the given cursor represents a preprocessing + * element, such as a preprocessor directive or macro instantiation. + */ +CINDEX_LINKAGE unsigned clang_isPreprocessing(enum CXCursorKind); + +/*** + * Determine whether the given cursor represents a currently + * unexposed piece of the AST (e.g., CXCursor_UnexposedStmt). + */ +CINDEX_LINKAGE unsigned clang_isUnexposed(enum CXCursorKind); + +/** + * Describe the linkage of the entity referred to by a cursor. + */ +enum CXLinkageKind { + /** This value indicates that no linkage information is available + * for a provided CXCursor. */ + CXLinkage_Invalid, + /** + * This is the linkage for variables, parameters, and so on that + * have automatic storage. This covers normal (non-extern) local variables. + */ + CXLinkage_NoLinkage, + /** This is the linkage for static variables and static functions. */ + CXLinkage_Internal, + /** This is the linkage for entities with external linkage that live + * in C++ anonymous namespaces.*/ + CXLinkage_UniqueExternal, + /** This is the linkage for entities with true, external linkage. */ + CXLinkage_External +}; + +/** + * Determine the linkage of the entity referred to by a given cursor. + */ +CINDEX_LINKAGE enum CXLinkageKind clang_getCursorLinkage(CXCursor cursor); + +enum CXVisibilityKind { + /** This value indicates that no visibility information is available + * for a provided CXCursor. */ + CXVisibility_Invalid, + + /** Symbol not seen by the linker. */ + CXVisibility_Hidden, + /** Symbol seen by the linker but resolves to a symbol inside this object. */ + CXVisibility_Protected, + /** Symbol seen by the linker and acts like a normal symbol. */ + CXVisibility_Default +}; + +/** + * Describe the visibility of the entity referred to by a cursor. + * + * This returns the default visibility if not explicitly specified by + * a visibility attribute. The default visibility may be changed by + * commandline arguments. + * + * \param cursor The cursor to query. + * + * \returns The visibility of the cursor. + */ +CINDEX_LINKAGE enum CXVisibilityKind clang_getCursorVisibility(CXCursor cursor); + +/** + * Determine the availability of the entity that this cursor refers to, + * taking the current target platform into account. + * + * \param cursor The cursor to query. + * + * \returns The availability of the cursor. + */ +CINDEX_LINKAGE enum CXAvailabilityKind +clang_getCursorAvailability(CXCursor cursor); + +/** + * Describes the availability of a given entity on a particular platform, e.g., + * a particular class might only be available on Mac OS 10.7 or newer. + */ +typedef struct CXPlatformAvailability { + /** + * A string that describes the platform for which this structure + * provides availability information. + * + * Possible values are "ios" or "macos". + */ + CXString Platform; + /** + * The version number in which this entity was introduced. + */ + CXVersion Introduced; + /** + * The version number in which this entity was deprecated (but is + * still available). + */ + CXVersion Deprecated; + /** + * The version number in which this entity was obsoleted, and therefore + * is no longer available. + */ + CXVersion Obsoleted; + /** + * Whether the entity is unconditionally unavailable on this platform. + */ + int Unavailable; + /** + * An optional message to provide to a user of this API, e.g., to + * suggest replacement APIs. + */ + CXString Message; +} CXPlatformAvailability; + +/** + * Determine the availability of the entity that this cursor refers to + * on any platforms for which availability information is known. + * + * \param cursor The cursor to query. + * + * \param always_deprecated If non-NULL, will be set to indicate whether the + * entity is deprecated on all platforms. + * + * \param deprecated_message If non-NULL, will be set to the message text + * provided along with the unconditional deprecation of this entity. The client + * is responsible for deallocating this string. + * + * \param always_unavailable If non-NULL, will be set to indicate whether the + * entity is unavailable on all platforms. + * + * \param unavailable_message If non-NULL, will be set to the message text + * provided along with the unconditional unavailability of this entity. The + * client is responsible for deallocating this string. + * + * \param availability If non-NULL, an array of CXPlatformAvailability instances + * that will be populated with platform availability information, up to either + * the number of platforms for which availability information is available (as + * returned by this function) or \c availability_size, whichever is smaller. + * + * \param availability_size The number of elements available in the + * \c availability array. + * + * \returns The number of platforms (N) for which availability information is + * available (which is unrelated to \c availability_size). + * + * Note that the client is responsible for calling + * \c clang_disposeCXPlatformAvailability to free each of the + * platform-availability structures returned. There are + * \c min(N, availability_size) such structures. + */ +CINDEX_LINKAGE int clang_getCursorPlatformAvailability( + CXCursor cursor, int *always_deprecated, CXString *deprecated_message, + int *always_unavailable, CXString *unavailable_message, + CXPlatformAvailability *availability, int availability_size); + +/** + * Free the memory associated with a \c CXPlatformAvailability structure. + */ +CINDEX_LINKAGE void +clang_disposeCXPlatformAvailability(CXPlatformAvailability *availability); + +/** + * If cursor refers to a variable declaration and it has initializer returns + * cursor referring to the initializer otherwise return null cursor. + */ +CINDEX_LINKAGE CXCursor clang_Cursor_getVarDeclInitializer(CXCursor cursor); + +/** + * If cursor refers to a variable declaration that has global storage returns 1. + * If cursor refers to a variable declaration that doesn't have global storage + * returns 0. Otherwise returns -1. + */ +CINDEX_LINKAGE int clang_Cursor_hasVarDeclGlobalStorage(CXCursor cursor); + +/** + * If cursor refers to a variable declaration that has external storage + * returns 1. If cursor refers to a variable declaration that doesn't have + * external storage returns 0. Otherwise returns -1. + */ +CINDEX_LINKAGE int clang_Cursor_hasVarDeclExternalStorage(CXCursor cursor); + +/** + * Describe the "language" of the entity referred to by a cursor. + */ +enum CXLanguageKind { + CXLanguage_Invalid = 0, + CXLanguage_C, + CXLanguage_ObjC, + CXLanguage_CPlusPlus +}; + +/** + * Determine the "language" of the entity referred to by a given cursor. + */ +CINDEX_LINKAGE enum CXLanguageKind clang_getCursorLanguage(CXCursor cursor); + +/** + * Describe the "thread-local storage (TLS) kind" of the declaration + * referred to by a cursor. + */ +enum CXTLSKind { CXTLS_None = 0, CXTLS_Dynamic, CXTLS_Static }; + +/** + * Determine the "thread-local storage (TLS) kind" of the declaration + * referred to by a cursor. + */ +CINDEX_LINKAGE enum CXTLSKind clang_getCursorTLSKind(CXCursor cursor); + +/** + * Returns the translation unit that a cursor originated from. + */ +CINDEX_LINKAGE CXTranslationUnit clang_Cursor_getTranslationUnit(CXCursor); + +/** + * A fast container representing a set of CXCursors. + */ +typedef struct CXCursorSetImpl *CXCursorSet; + +/** + * Creates an empty CXCursorSet. + */ +CINDEX_LINKAGE CXCursorSet clang_createCXCursorSet(void); + +/** + * Disposes a CXCursorSet and releases its associated memory. + */ +CINDEX_LINKAGE void clang_disposeCXCursorSet(CXCursorSet cset); + +/** + * Queries a CXCursorSet to see if it contains a specific CXCursor. + * + * \returns non-zero if the set contains the specified cursor. + */ +CINDEX_LINKAGE unsigned clang_CXCursorSet_contains(CXCursorSet cset, + CXCursor cursor); + +/** + * Inserts a CXCursor into a CXCursorSet. + * + * \returns zero if the CXCursor was already in the set, and non-zero otherwise. + */ +CINDEX_LINKAGE unsigned clang_CXCursorSet_insert(CXCursorSet cset, + CXCursor cursor); + +/** + * Determine the semantic parent of the given cursor. + * + * The semantic parent of a cursor is the cursor that semantically contains + * the given \p cursor. For many declarations, the lexical and semantic parents + * are equivalent (the lexical parent is returned by + * \c clang_getCursorLexicalParent()). They diverge when declarations or + * definitions are provided out-of-line. For example: + * + * \code + * class C { + * void f(); + * }; + * + * void C::f() { } + * \endcode + * + * In the out-of-line definition of \c C::f, the semantic parent is + * the class \c C, of which this function is a member. The lexical parent is + * the place where the declaration actually occurs in the source code; in this + * case, the definition occurs in the translation unit. In general, the + * lexical parent for a given entity can change without affecting the semantics + * of the program, and the lexical parent of different declarations of the + * same entity may be different. Changing the semantic parent of a declaration, + * on the other hand, can have a major impact on semantics, and redeclarations + * of a particular entity should all have the same semantic context. + * + * In the example above, both declarations of \c C::f have \c C as their + * semantic context, while the lexical context of the first \c C::f is \c C + * and the lexical context of the second \c C::f is the translation unit. + * + * For global declarations, the semantic parent is the translation unit. + */ +CINDEX_LINKAGE CXCursor clang_getCursorSemanticParent(CXCursor cursor); + +/** + * Determine the lexical parent of the given cursor. + * + * The lexical parent of a cursor is the cursor in which the given \p cursor + * was actually written. For many declarations, the lexical and semantic parents + * are equivalent (the semantic parent is returned by + * \c clang_getCursorSemanticParent()). They diverge when declarations or + * definitions are provided out-of-line. For example: + * + * \code + * class C { + * void f(); + * }; + * + * void C::f() { } + * \endcode + * + * In the out-of-line definition of \c C::f, the semantic parent is + * the class \c C, of which this function is a member. The lexical parent is + * the place where the declaration actually occurs in the source code; in this + * case, the definition occurs in the translation unit. In general, the + * lexical parent for a given entity can change without affecting the semantics + * of the program, and the lexical parent of different declarations of the + * same entity may be different. Changing the semantic parent of a declaration, + * on the other hand, can have a major impact on semantics, and redeclarations + * of a particular entity should all have the same semantic context. + * + * In the example above, both declarations of \c C::f have \c C as their + * semantic context, while the lexical context of the first \c C::f is \c C + * and the lexical context of the second \c C::f is the translation unit. + * + * For declarations written in the global scope, the lexical parent is + * the translation unit. + */ +CINDEX_LINKAGE CXCursor clang_getCursorLexicalParent(CXCursor cursor); + +/** + * Determine the set of methods that are overridden by the given + * method. + * + * In both Objective-C and C++, a method (aka virtual member function, + * in C++) can override a virtual method in a base class. For + * Objective-C, a method is said to override any method in the class's + * base class, its protocols, or its categories' protocols, that has the same + * selector and is of the same kind (class or instance). + * If no such method exists, the search continues to the class's superclass, + * its protocols, and its categories, and so on. A method from an Objective-C + * implementation is considered to override the same methods as its + * corresponding method in the interface. + * + * For C++, a virtual member function overrides any virtual member + * function with the same signature that occurs in its base + * classes. With multiple inheritance, a virtual member function can + * override several virtual member functions coming from different + * base classes. + * + * In all cases, this function determines the immediate overridden + * method, rather than all of the overridden methods. For example, if + * a method is originally declared in a class A, then overridden in B + * (which in inherits from A) and also in C (which inherited from B), + * then the only overridden method returned from this function when + * invoked on C's method will be B's method. The client may then + * invoke this function again, given the previously-found overridden + * methods, to map out the complete method-override set. + * + * \param cursor A cursor representing an Objective-C or C++ + * method. This routine will compute the set of methods that this + * method overrides. + * + * \param overridden A pointer whose pointee will be replaced with a + * pointer to an array of cursors, representing the set of overridden + * methods. If there are no overridden methods, the pointee will be + * set to NULL. The pointee must be freed via a call to + * \c clang_disposeOverriddenCursors(). + * + * \param num_overridden A pointer to the number of overridden + * functions, will be set to the number of overridden functions in the + * array pointed to by \p overridden. + */ +CINDEX_LINKAGE void clang_getOverriddenCursors(CXCursor cursor, + CXCursor **overridden, + unsigned *num_overridden); + +/** + * Free the set of overridden cursors returned by \c + * clang_getOverriddenCursors(). + */ +CINDEX_LINKAGE void clang_disposeOverriddenCursors(CXCursor *overridden); + +/** + * Retrieve the file that is included by the given inclusion directive + * cursor. + */ +CINDEX_LINKAGE CXFile clang_getIncludedFile(CXCursor cursor); + +/** + * @} + */ + +/** + * \defgroup CINDEX_CURSOR_SOURCE Mapping between cursors and source code + * + * Cursors represent a location within the Abstract Syntax Tree (AST). These + * routines help map between cursors and the physical locations where the + * described entities occur in the source code. The mapping is provided in + * both directions, so one can map from source code to the AST and back. + * + * @{ + */ + +/** + * Map a source location to the cursor that describes the entity at that + * location in the source code. + * + * clang_getCursor() maps an arbitrary source location within a translation + * unit down to the most specific cursor that describes the entity at that + * location. For example, given an expression \c x + y, invoking + * clang_getCursor() with a source location pointing to "x" will return the + * cursor for "x"; similarly for "y". If the cursor points anywhere between + * "x" or "y" (e.g., on the + or the whitespace around it), clang_getCursor() + * will return a cursor referring to the "+" expression. + * + * \returns a cursor representing the entity at the given source location, or + * a NULL cursor if no such entity can be found. + */ +CINDEX_LINKAGE CXCursor clang_getCursor(CXTranslationUnit, CXSourceLocation); + +/** + * Retrieve the physical location of the source constructor referenced + * by the given cursor. + * + * The location of a declaration is typically the location of the name of that + * declaration, where the name of that declaration would occur if it is + * unnamed, or some keyword that introduces that particular declaration. + * The location of a reference is where that reference occurs within the + * source code. + */ +CINDEX_LINKAGE CXSourceLocation clang_getCursorLocation(CXCursor); + +/** + * Retrieve the physical extent of the source construct referenced by + * the given cursor. + * + * The extent of a cursor starts with the file/line/column pointing at the + * first character within the source construct that the cursor refers to and + * ends with the last character within that source construct. For a + * declaration, the extent covers the declaration itself. For a reference, + * the extent covers the location of the reference (e.g., where the referenced + * entity was actually used). + */ +CINDEX_LINKAGE CXSourceRange clang_getCursorExtent(CXCursor); + +/** + * @} + */ + +/** + * \defgroup CINDEX_TYPES Type information for CXCursors + * + * @{ + */ + +/** + * Describes the kind of type + */ +enum CXTypeKind { + /** + * Represents an invalid type (e.g., where no type is available). + */ + CXType_Invalid = 0, + + /** + * A type whose specific kind is not exposed via this + * interface. + */ + CXType_Unexposed = 1, + + /* Builtin types */ + CXType_Void = 2, + CXType_Bool = 3, + CXType_Char_U = 4, + CXType_UChar = 5, + CXType_Char16 = 6, + CXType_Char32 = 7, + CXType_UShort = 8, + CXType_UInt = 9, + CXType_ULong = 10, + CXType_ULongLong = 11, + CXType_UInt128 = 12, + CXType_Char_S = 13, + CXType_SChar = 14, + CXType_WChar = 15, + CXType_Short = 16, + CXType_Int = 17, + CXType_Long = 18, + CXType_LongLong = 19, + CXType_Int128 = 20, + CXType_Float = 21, + CXType_Double = 22, + CXType_LongDouble = 23, + CXType_NullPtr = 24, + CXType_Overload = 25, + CXType_Dependent = 26, + CXType_ObjCId = 27, + CXType_ObjCClass = 28, + CXType_ObjCSel = 29, + CXType_Float128 = 30, + CXType_Half = 31, + CXType_Float16 = 32, + CXType_ShortAccum = 33, + CXType_Accum = 34, + CXType_LongAccum = 35, + CXType_UShortAccum = 36, + CXType_UAccum = 37, + CXType_ULongAccum = 38, + CXType_BFloat16 = 39, + CXType_Ibm128 = 40, + CXType_FirstBuiltin = CXType_Void, + CXType_LastBuiltin = CXType_Ibm128, + + CXType_Complex = 100, + CXType_Pointer = 101, + CXType_BlockPointer = 102, + CXType_LValueReference = 103, + CXType_RValueReference = 104, + CXType_Record = 105, + CXType_Enum = 106, + CXType_Typedef = 107, + CXType_ObjCInterface = 108, + CXType_ObjCObjectPointer = 109, + CXType_FunctionNoProto = 110, + CXType_FunctionProto = 111, + CXType_ConstantArray = 112, + CXType_Vector = 113, + CXType_IncompleteArray = 114, + CXType_VariableArray = 115, + CXType_DependentSizedArray = 116, + CXType_MemberPointer = 117, + CXType_Auto = 118, + + /** + * Represents a type that was referred to using an elaborated type keyword. + * + * E.g., struct S, or via a qualified name, e.g., N::M::type, or both. + */ + CXType_Elaborated = 119, + + /* OpenCL PipeType. */ + CXType_Pipe = 120, + + /* OpenCL builtin types. */ + CXType_OCLImage1dRO = 121, + CXType_OCLImage1dArrayRO = 122, + CXType_OCLImage1dBufferRO = 123, + CXType_OCLImage2dRO = 124, + CXType_OCLImage2dArrayRO = 125, + CXType_OCLImage2dDepthRO = 126, + CXType_OCLImage2dArrayDepthRO = 127, + CXType_OCLImage2dMSAARO = 128, + CXType_OCLImage2dArrayMSAARO = 129, + CXType_OCLImage2dMSAADepthRO = 130, + CXType_OCLImage2dArrayMSAADepthRO = 131, + CXType_OCLImage3dRO = 132, + CXType_OCLImage1dWO = 133, + CXType_OCLImage1dArrayWO = 134, + CXType_OCLImage1dBufferWO = 135, + CXType_OCLImage2dWO = 136, + CXType_OCLImage2dArrayWO = 137, + CXType_OCLImage2dDepthWO = 138, + CXType_OCLImage2dArrayDepthWO = 139, + CXType_OCLImage2dMSAAWO = 140, + CXType_OCLImage2dArrayMSAAWO = 141, + CXType_OCLImage2dMSAADepthWO = 142, + CXType_OCLImage2dArrayMSAADepthWO = 143, + CXType_OCLImage3dWO = 144, + CXType_OCLImage1dRW = 145, + CXType_OCLImage1dArrayRW = 146, + CXType_OCLImage1dBufferRW = 147, + CXType_OCLImage2dRW = 148, + CXType_OCLImage2dArrayRW = 149, + CXType_OCLImage2dDepthRW = 150, + CXType_OCLImage2dArrayDepthRW = 151, + CXType_OCLImage2dMSAARW = 152, + CXType_OCLImage2dArrayMSAARW = 153, + CXType_OCLImage2dMSAADepthRW = 154, + CXType_OCLImage2dArrayMSAADepthRW = 155, + CXType_OCLImage3dRW = 156, + CXType_OCLSampler = 157, + CXType_OCLEvent = 158, + CXType_OCLQueue = 159, + CXType_OCLReserveID = 160, + + CXType_ObjCObject = 161, + CXType_ObjCTypeParam = 162, + CXType_Attributed = 163, + + CXType_OCLIntelSubgroupAVCMcePayload = 164, + CXType_OCLIntelSubgroupAVCImePayload = 165, + CXType_OCLIntelSubgroupAVCRefPayload = 166, + CXType_OCLIntelSubgroupAVCSicPayload = 167, + CXType_OCLIntelSubgroupAVCMceResult = 168, + CXType_OCLIntelSubgroupAVCImeResult = 169, + CXType_OCLIntelSubgroupAVCRefResult = 170, + CXType_OCLIntelSubgroupAVCSicResult = 171, + CXType_OCLIntelSubgroupAVCImeResultSingleReferenceStreamout = 172, + CXType_OCLIntelSubgroupAVCImeResultDualReferenceStreamout = 173, + CXType_OCLIntelSubgroupAVCImeSingleReferenceStreamin = 174, + CXType_OCLIntelSubgroupAVCImeDualReferenceStreamin = 175, + + /* Old aliases for AVC OpenCL extension types. */ + CXType_OCLIntelSubgroupAVCImeResultSingleRefStreamout = 172, + CXType_OCLIntelSubgroupAVCImeResultDualRefStreamout = 173, + CXType_OCLIntelSubgroupAVCImeSingleRefStreamin = 174, + CXType_OCLIntelSubgroupAVCImeDualRefStreamin = 175, + + CXType_ExtVector = 176, + CXType_Atomic = 177, + CXType_BTFTagAttributed = 178 +}; + +/** + * Describes the calling convention of a function type + */ +enum CXCallingConv { + CXCallingConv_Default = 0, + CXCallingConv_C = 1, + CXCallingConv_X86StdCall = 2, + CXCallingConv_X86FastCall = 3, + CXCallingConv_X86ThisCall = 4, + CXCallingConv_X86Pascal = 5, + CXCallingConv_AAPCS = 6, + CXCallingConv_AAPCS_VFP = 7, + CXCallingConv_X86RegCall = 8, + CXCallingConv_IntelOclBicc = 9, + CXCallingConv_Win64 = 10, + /* Alias for compatibility with older versions of API. */ + CXCallingConv_X86_64Win64 = CXCallingConv_Win64, + CXCallingConv_X86_64SysV = 11, + CXCallingConv_X86VectorCall = 12, + CXCallingConv_Swift = 13, + CXCallingConv_PreserveMost = 14, + CXCallingConv_PreserveAll = 15, + CXCallingConv_AArch64VectorCall = 16, + CXCallingConv_SwiftAsync = 17, + CXCallingConv_AArch64SVEPCS = 18, + CXCallingConv_M68kRTD = 19, + CXCallingConv_PreserveNone = 20, + CXCallingConv_RISCVVectorCall = 21, + + CXCallingConv_Invalid = 100, + CXCallingConv_Unexposed = 200 +}; + +/** + * The type of an element in the abstract syntax tree. + * + */ +typedef struct { + enum CXTypeKind kind; + void *data[2]; +} CXType; + +/** + * Retrieve the type of a CXCursor (if any). + */ +CINDEX_LINKAGE CXType clang_getCursorType(CXCursor C); + +/** + * Pretty-print the underlying type using the rules of the + * language of the translation unit from which it came. + * + * If the type is invalid, an empty string is returned. + */ +CINDEX_LINKAGE CXString clang_getTypeSpelling(CXType CT); + +/** + * Retrieve the underlying type of a typedef declaration. + * + * If the cursor does not reference a typedef declaration, an invalid type is + * returned. + */ +CINDEX_LINKAGE CXType clang_getTypedefDeclUnderlyingType(CXCursor C); + +/** + * Retrieve the integer type of an enum declaration. + * + * If the cursor does not reference an enum declaration, an invalid type is + * returned. + */ +CINDEX_LINKAGE CXType clang_getEnumDeclIntegerType(CXCursor C); + +/** + * Retrieve the integer value of an enum constant declaration as a signed + * long long. + * + * If the cursor does not reference an enum constant declaration, LLONG_MIN is + * returned. Since this is also potentially a valid constant value, the kind of + * the cursor must be verified before calling this function. + */ +CINDEX_LINKAGE long long clang_getEnumConstantDeclValue(CXCursor C); + +/** + * Retrieve the integer value of an enum constant declaration as an unsigned + * long long. + * + * If the cursor does not reference an enum constant declaration, ULLONG_MAX is + * returned. Since this is also potentially a valid constant value, the kind of + * the cursor must be verified before calling this function. + */ +CINDEX_LINKAGE unsigned long long +clang_getEnumConstantDeclUnsignedValue(CXCursor C); + +/** + * Returns non-zero if the cursor specifies a Record member that is a bit-field. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isBitField(CXCursor C); + +/** + * Retrieve the bit width of a bit-field declaration as an integer. + * + * If the cursor does not reference a bit-field, or if the bit-field's width + * expression cannot be evaluated, -1 is returned. + * + * For example: + * \code + * if (clang_Cursor_isBitField(Cursor)) { + * int Width = clang_getFieldDeclBitWidth(Cursor); + * if (Width != -1) { + * // The bit-field width is not value-dependent. + * } + * } + * \endcode + */ +CINDEX_LINKAGE int clang_getFieldDeclBitWidth(CXCursor C); + +/** + * Retrieve the number of non-variadic arguments associated with a given + * cursor. + * + * The number of arguments can be determined for calls as well as for + * declarations of functions or methods. For other cursors -1 is returned. + */ +CINDEX_LINKAGE int clang_Cursor_getNumArguments(CXCursor C); + +/** + * Retrieve the argument cursor of a function or method. + * + * The argument cursor can be determined for calls as well as for declarations + * of functions or methods. For other cursors and for invalid indices, an + * invalid cursor is returned. + */ +CINDEX_LINKAGE CXCursor clang_Cursor_getArgument(CXCursor C, unsigned i); + +/** + * Describes the kind of a template argument. + * + * See the definition of llvm::clang::TemplateArgument::ArgKind for full + * element descriptions. + */ +enum CXTemplateArgumentKind { + CXTemplateArgumentKind_Null, + CXTemplateArgumentKind_Type, + CXTemplateArgumentKind_Declaration, + CXTemplateArgumentKind_NullPtr, + CXTemplateArgumentKind_Integral, + CXTemplateArgumentKind_Template, + CXTemplateArgumentKind_TemplateExpansion, + CXTemplateArgumentKind_Expression, + CXTemplateArgumentKind_Pack, + /* Indicates an error case, preventing the kind from being deduced. */ + CXTemplateArgumentKind_Invalid +}; + +/** + * Returns the number of template args of a function, struct, or class decl + * representing a template specialization. + * + * If the argument cursor cannot be converted into a template function + * declaration, -1 is returned. + * + * For example, for the following declaration and specialization: + * template + * void foo() { ... } + * + * template <> + * void foo(); + * + * The value 3 would be returned from this call. + */ +CINDEX_LINKAGE int clang_Cursor_getNumTemplateArguments(CXCursor C); + +/** + * Retrieve the kind of the I'th template argument of the CXCursor C. + * + * If the argument CXCursor does not represent a FunctionDecl, StructDecl, or + * ClassTemplatePartialSpecialization, an invalid template argument kind is + * returned. + * + * For example, for the following declaration and specialization: + * template + * void foo() { ... } + * + * template <> + * void foo(); + * + * For I = 0, 1, and 2, Type, Integral, and Integral will be returned, + * respectively. + */ +CINDEX_LINKAGE enum CXTemplateArgumentKind +clang_Cursor_getTemplateArgumentKind(CXCursor C, unsigned I); + +/** + * Retrieve a CXType representing the type of a TemplateArgument of a + * function decl representing a template specialization. + * + * If the argument CXCursor does not represent a FunctionDecl, StructDecl, + * ClassDecl or ClassTemplatePartialSpecialization whose I'th template argument + * has a kind of CXTemplateArgKind_Integral, an invalid type is returned. + * + * For example, for the following declaration and specialization: + * template + * void foo() { ... } + * + * template <> + * void foo(); + * + * If called with I = 0, "float", will be returned. + * Invalid types will be returned for I == 1 or 2. + */ +CINDEX_LINKAGE CXType clang_Cursor_getTemplateArgumentType(CXCursor C, + unsigned I); + +/** + * Retrieve the value of an Integral TemplateArgument (of a function + * decl representing a template specialization) as a signed long long. + * + * It is undefined to call this function on a CXCursor that does not represent a + * FunctionDecl, StructDecl, ClassDecl or ClassTemplatePartialSpecialization + * whose I'th template argument is not an integral value. + * + * For example, for the following declaration and specialization: + * template + * void foo() { ... } + * + * template <> + * void foo(); + * + * If called with I = 1 or 2, -7 or true will be returned, respectively. + * For I == 0, this function's behavior is undefined. + */ +CINDEX_LINKAGE long long clang_Cursor_getTemplateArgumentValue(CXCursor C, + unsigned I); + +/** + * Retrieve the value of an Integral TemplateArgument (of a function + * decl representing a template specialization) as an unsigned long long. + * + * It is undefined to call this function on a CXCursor that does not represent a + * FunctionDecl, StructDecl, ClassDecl or ClassTemplatePartialSpecialization or + * whose I'th template argument is not an integral value. + * + * For example, for the following declaration and specialization: + * template + * void foo() { ... } + * + * template <> + * void foo(); + * + * If called with I = 1 or 2, 2147483649 or true will be returned, respectively. + * For I == 0, this function's behavior is undefined. + */ +CINDEX_LINKAGE unsigned long long +clang_Cursor_getTemplateArgumentUnsignedValue(CXCursor C, unsigned I); + +/** + * Determine whether two CXTypes represent the same type. + * + * \returns non-zero if the CXTypes represent the same type and + * zero otherwise. + */ +CINDEX_LINKAGE unsigned clang_equalTypes(CXType A, CXType B); + +/** + * Return the canonical type for a CXType. + * + * Clang's type system explicitly models typedefs and all the ways + * a specific type can be represented. The canonical type is the underlying + * type with all the "sugar" removed. For example, if 'T' is a typedef + * for 'int', the canonical type for 'T' would be 'int'. + */ +CINDEX_LINKAGE CXType clang_getCanonicalType(CXType T); + +/** + * Determine whether a CXType has the "const" qualifier set, + * without looking through typedefs that may have added "const" at a + * different level. + */ +CINDEX_LINKAGE unsigned clang_isConstQualifiedType(CXType T); + +/** + * Determine whether a CXCursor that is a macro, is + * function like. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isMacroFunctionLike(CXCursor C); + +/** + * Determine whether a CXCursor that is a macro, is a + * builtin one. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isMacroBuiltin(CXCursor C); + +/** + * Determine whether a CXCursor that is a function declaration, is an + * inline declaration. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isFunctionInlined(CXCursor C); + +/** + * Determine whether a CXType has the "volatile" qualifier set, + * without looking through typedefs that may have added "volatile" at + * a different level. + */ +CINDEX_LINKAGE unsigned clang_isVolatileQualifiedType(CXType T); + +/** + * Determine whether a CXType has the "restrict" qualifier set, + * without looking through typedefs that may have added "restrict" at a + * different level. + */ +CINDEX_LINKAGE unsigned clang_isRestrictQualifiedType(CXType T); + +/** + * Returns the address space of the given type. + */ +CINDEX_LINKAGE unsigned clang_getAddressSpace(CXType T); + +/** + * Returns the typedef name of the given type. + */ +CINDEX_LINKAGE CXString clang_getTypedefName(CXType CT); + +/** + * For pointer types, returns the type of the pointee. + */ +CINDEX_LINKAGE CXType clang_getPointeeType(CXType T); + +/** + * Retrieve the unqualified variant of the given type, removing as + * little sugar as possible. + * + * For example, given the following series of typedefs: + * + * \code + * typedef int Integer; + * typedef const Integer CInteger; + * typedef CInteger DifferenceType; + * \endcode + * + * Executing \c clang_getUnqualifiedType() on a \c CXType that + * represents \c DifferenceType, will desugar to a type representing + * \c Integer, that has no qualifiers. + * + * And, executing \c clang_getUnqualifiedType() on the type of the + * first argument of the following function declaration: + * + * \code + * void foo(const int); + * \endcode + * + * Will return a type representing \c int, removing the \c const + * qualifier. + * + * Sugar over array types is not desugared. + * + * A type can be checked for qualifiers with \c + * clang_isConstQualifiedType(), \c clang_isVolatileQualifiedType() + * and \c clang_isRestrictQualifiedType(). + * + * A type that resulted from a call to \c clang_getUnqualifiedType + * will return \c false for all of the above calls. + */ +CINDEX_LINKAGE CXType clang_getUnqualifiedType(CXType CT); + +/** + * For reference types (e.g., "const int&"), returns the type that the + * reference refers to (e.g "const int"). + * + * Otherwise, returns the type itself. + * + * A type that has kind \c CXType_LValueReference or + * \c CXType_RValueReference is a reference type. + */ +CINDEX_LINKAGE CXType clang_getNonReferenceType(CXType CT); + +/** + * Return the cursor for the declaration of the given type. + */ +CINDEX_LINKAGE CXCursor clang_getTypeDeclaration(CXType T); + +/** + * Returns the Objective-C type encoding for the specified declaration. + */ +CINDEX_LINKAGE CXString clang_getDeclObjCTypeEncoding(CXCursor C); + +/** + * Returns the Objective-C type encoding for the specified CXType. + */ +CINDEX_LINKAGE CXString clang_Type_getObjCEncoding(CXType type); + +/** + * Retrieve the spelling of a given CXTypeKind. + */ +CINDEX_LINKAGE CXString clang_getTypeKindSpelling(enum CXTypeKind K); + +/** + * Retrieve the calling convention associated with a function type. + * + * If a non-function type is passed in, CXCallingConv_Invalid is returned. + */ +CINDEX_LINKAGE enum CXCallingConv clang_getFunctionTypeCallingConv(CXType T); + +/** + * Retrieve the return type associated with a function type. + * + * If a non-function type is passed in, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_getResultType(CXType T); + +/** + * Retrieve the exception specification type associated with a function type. + * This is a value of type CXCursor_ExceptionSpecificationKind. + * + * If a non-function type is passed in, an error code of -1 is returned. + */ +CINDEX_LINKAGE int clang_getExceptionSpecificationType(CXType T); + +/** + * Retrieve the number of non-variadic parameters associated with a + * function type. + * + * If a non-function type is passed in, -1 is returned. + */ +CINDEX_LINKAGE int clang_getNumArgTypes(CXType T); + +/** + * Retrieve the type of a parameter of a function type. + * + * If a non-function type is passed in or the function does not have enough + * parameters, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_getArgType(CXType T, unsigned i); + +/** + * Retrieves the base type of the ObjCObjectType. + * + * If the type is not an ObjC object, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_Type_getObjCObjectBaseType(CXType T); + +/** + * Retrieve the number of protocol references associated with an ObjC object/id. + * + * If the type is not an ObjC object, 0 is returned. + */ +CINDEX_LINKAGE unsigned clang_Type_getNumObjCProtocolRefs(CXType T); + +/** + * Retrieve the decl for a protocol reference for an ObjC object/id. + * + * If the type is not an ObjC object or there are not enough protocol + * references, an invalid cursor is returned. + */ +CINDEX_LINKAGE CXCursor clang_Type_getObjCProtocolDecl(CXType T, unsigned i); + +/** + * Retrieve the number of type arguments associated with an ObjC object. + * + * If the type is not an ObjC object, 0 is returned. + */ +CINDEX_LINKAGE unsigned clang_Type_getNumObjCTypeArgs(CXType T); + +/** + * Retrieve a type argument associated with an ObjC object. + * + * If the type is not an ObjC or the index is not valid, + * an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_Type_getObjCTypeArg(CXType T, unsigned i); + +/** + * Return 1 if the CXType is a variadic function type, and 0 otherwise. + */ +CINDEX_LINKAGE unsigned clang_isFunctionTypeVariadic(CXType T); + +/** + * Retrieve the return type associated with a given cursor. + * + * This only returns a valid type if the cursor refers to a function or method. + */ +CINDEX_LINKAGE CXType clang_getCursorResultType(CXCursor C); + +/** + * Retrieve the exception specification type associated with a given cursor. + * This is a value of type CXCursor_ExceptionSpecificationKind. + * + * This only returns a valid result if the cursor refers to a function or + * method. + */ +CINDEX_LINKAGE int clang_getCursorExceptionSpecificationType(CXCursor C); + +/** + * Return 1 if the CXType is a POD (plain old data) type, and 0 + * otherwise. + */ +CINDEX_LINKAGE unsigned clang_isPODType(CXType T); + +/** + * Return the element type of an array, complex, or vector type. + * + * If a type is passed in that is not an array, complex, or vector type, + * an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_getElementType(CXType T); + +/** + * Return the number of elements of an array or vector type. + * + * If a type is passed in that is not an array or vector type, + * -1 is returned. + */ +CINDEX_LINKAGE long long clang_getNumElements(CXType T); + +/** + * Return the element type of an array type. + * + * If a non-array type is passed in, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_getArrayElementType(CXType T); + +/** + * Return the array size of a constant array. + * + * If a non-array type is passed in, -1 is returned. + */ +CINDEX_LINKAGE long long clang_getArraySize(CXType T); + +/** + * Retrieve the type named by the qualified-id. + * + * If a non-elaborated type is passed in, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_Type_getNamedType(CXType T); + +/** + * Determine if a typedef is 'transparent' tag. + * + * A typedef is considered 'transparent' if it shares a name and spelling + * location with its underlying tag type, as is the case with the NS_ENUM macro. + * + * \returns non-zero if transparent and zero otherwise. + */ +CINDEX_LINKAGE unsigned clang_Type_isTransparentTagTypedef(CXType T); + +enum CXTypeNullabilityKind { + /** + * Values of this type can never be null. + */ + CXTypeNullability_NonNull = 0, + /** + * Values of this type can be null. + */ + CXTypeNullability_Nullable = 1, + /** + * Whether values of this type can be null is (explicitly) + * unspecified. This captures a (fairly rare) case where we + * can't conclude anything about the nullability of the type even + * though it has been considered. + */ + CXTypeNullability_Unspecified = 2, + /** + * Nullability is not applicable to this type. + */ + CXTypeNullability_Invalid = 3, + + /** + * Generally behaves like Nullable, except when used in a block parameter that + * was imported into a swift async method. There, swift will assume that the + * parameter can get null even if no error occurred. _Nullable parameters are + * assumed to only get null on error. + */ + CXTypeNullability_NullableResult = 4 +}; + +/** + * Retrieve the nullability kind of a pointer type. + */ +CINDEX_LINKAGE enum CXTypeNullabilityKind clang_Type_getNullability(CXType T); + +/** + * List the possible error codes for \c clang_Type_getSizeOf, + * \c clang_Type_getAlignOf, \c clang_Type_getOffsetOf and + * \c clang_Cursor_getOffsetOf. + * + * A value of this enumeration type can be returned if the target type is not + * a valid argument to sizeof, alignof or offsetof. + */ +enum CXTypeLayoutError { + /** + * Type is of kind CXType_Invalid. + */ + CXTypeLayoutError_Invalid = -1, + /** + * The type is an incomplete Type. + */ + CXTypeLayoutError_Incomplete = -2, + /** + * The type is a dependent Type. + */ + CXTypeLayoutError_Dependent = -3, + /** + * The type is not a constant size type. + */ + CXTypeLayoutError_NotConstantSize = -4, + /** + * The Field name is not valid for this record. + */ + CXTypeLayoutError_InvalidFieldName = -5, + /** + * The type is undeduced. + */ + CXTypeLayoutError_Undeduced = -6 +}; + +/** + * Return the alignment of a type in bytes as per C++[expr.alignof] + * standard. + * + * If the type declaration is invalid, CXTypeLayoutError_Invalid is returned. + * If the type declaration is an incomplete type, CXTypeLayoutError_Incomplete + * is returned. + * If the type declaration is a dependent type, CXTypeLayoutError_Dependent is + * returned. + * If the type declaration is not a constant size type, + * CXTypeLayoutError_NotConstantSize is returned. + */ +CINDEX_LINKAGE long long clang_Type_getAlignOf(CXType T); + +/** + * Return the class type of an member pointer type. + * + * If a non-member-pointer type is passed in, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_Type_getClassType(CXType T); + +/** + * Return the size of a type in bytes as per C++[expr.sizeof] standard. + * + * If the type declaration is invalid, CXTypeLayoutError_Invalid is returned. + * If the type declaration is an incomplete type, CXTypeLayoutError_Incomplete + * is returned. + * If the type declaration is a dependent type, CXTypeLayoutError_Dependent is + * returned. + */ +CINDEX_LINKAGE long long clang_Type_getSizeOf(CXType T); + +/** + * Return the offset of a field named S in a record of type T in bits + * as it would be returned by __offsetof__ as per C++11[18.2p4] + * + * If the cursor is not a record field declaration, CXTypeLayoutError_Invalid + * is returned. + * If the field's type declaration is an incomplete type, + * CXTypeLayoutError_Incomplete is returned. + * If the field's type declaration is a dependent type, + * CXTypeLayoutError_Dependent is returned. + * If the field's name S is not found, + * CXTypeLayoutError_InvalidFieldName is returned. + */ +CINDEX_LINKAGE long long clang_Type_getOffsetOf(CXType T, const char *S); + +/** + * Return the type that was modified by this attributed type. + * + * If the type is not an attributed type, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_Type_getModifiedType(CXType T); + +/** + * Gets the type contained by this atomic type. + * + * If a non-atomic type is passed in, an invalid type is returned. + */ +CINDEX_LINKAGE CXType clang_Type_getValueType(CXType CT); + +/** + * Return the offset of the field represented by the Cursor. + * + * If the cursor is not a field declaration, -1 is returned. + * If the cursor semantic parent is not a record field declaration, + * CXTypeLayoutError_Invalid is returned. + * If the field's type declaration is an incomplete type, + * CXTypeLayoutError_Incomplete is returned. + * If the field's type declaration is a dependent type, + * CXTypeLayoutError_Dependent is returned. + * If the field's name S is not found, + * CXTypeLayoutError_InvalidFieldName is returned. + */ +CINDEX_LINKAGE long long clang_Cursor_getOffsetOfField(CXCursor C); + +/** + * Determine whether the given cursor represents an anonymous + * tag or namespace + */ +CINDEX_LINKAGE unsigned clang_Cursor_isAnonymous(CXCursor C); + +/** + * Determine whether the given cursor represents an anonymous record + * declaration. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isAnonymousRecordDecl(CXCursor C); + +/** + * Determine whether the given cursor represents an inline namespace + * declaration. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isInlineNamespace(CXCursor C); + +enum CXRefQualifierKind { + /** No ref-qualifier was provided. */ + CXRefQualifier_None = 0, + /** An lvalue ref-qualifier was provided (\c &). */ + CXRefQualifier_LValue, + /** An rvalue ref-qualifier was provided (\c &&). */ + CXRefQualifier_RValue +}; + +/** + * Returns the number of template arguments for given template + * specialization, or -1 if type \c T is not a template specialization. + */ +CINDEX_LINKAGE int clang_Type_getNumTemplateArguments(CXType T); + +/** + * Returns the type template argument of a template class specialization + * at given index. + * + * This function only returns template type arguments and does not handle + * template template arguments or variadic packs. + */ +CINDEX_LINKAGE CXType clang_Type_getTemplateArgumentAsType(CXType T, + unsigned i); + +/** + * Retrieve the ref-qualifier kind of a function or method. + * + * The ref-qualifier is returned for C++ functions or methods. For other types + * or non-C++ declarations, CXRefQualifier_None is returned. + */ +CINDEX_LINKAGE enum CXRefQualifierKind clang_Type_getCXXRefQualifier(CXType T); + +/** + * Returns 1 if the base class specified by the cursor with kind + * CX_CXXBaseSpecifier is virtual. + */ +CINDEX_LINKAGE unsigned clang_isVirtualBase(CXCursor); + +/** + * Represents the C++ access control level to a base class for a + * cursor with kind CX_CXXBaseSpecifier. + */ +enum CX_CXXAccessSpecifier { + CX_CXXInvalidAccessSpecifier, + CX_CXXPublic, + CX_CXXProtected, + CX_CXXPrivate +}; + +/** + * Returns the access control level for the referenced object. + * + * If the cursor refers to a C++ declaration, its access control level within + * its parent scope is returned. Otherwise, if the cursor refers to a base + * specifier or access specifier, the specifier itself is returned. + */ +CINDEX_LINKAGE enum CX_CXXAccessSpecifier clang_getCXXAccessSpecifier(CXCursor); + +/** + * Represents the storage classes as declared in the source. CX_SC_Invalid + * was added for the case that the passed cursor in not a declaration. + */ +enum CX_StorageClass { + CX_SC_Invalid, + CX_SC_None, + CX_SC_Extern, + CX_SC_Static, + CX_SC_PrivateExtern, + CX_SC_OpenCLWorkGroupLocal, + CX_SC_Auto, + CX_SC_Register +}; + +/** + * Represents a specific kind of binary operator which can appear at a cursor. + */ +enum CX_BinaryOperatorKind { + CX_BO_Invalid = 0, + CX_BO_PtrMemD = 1, + CX_BO_PtrMemI = 2, + CX_BO_Mul = 3, + CX_BO_Div = 4, + CX_BO_Rem = 5, + CX_BO_Add = 6, + CX_BO_Sub = 7, + CX_BO_Shl = 8, + CX_BO_Shr = 9, + CX_BO_Cmp = 10, + CX_BO_LT = 11, + CX_BO_GT = 12, + CX_BO_LE = 13, + CX_BO_GE = 14, + CX_BO_EQ = 15, + CX_BO_NE = 16, + CX_BO_And = 17, + CX_BO_Xor = 18, + CX_BO_Or = 19, + CX_BO_LAnd = 20, + CX_BO_LOr = 21, + CX_BO_Assign = 22, + CX_BO_MulAssign = 23, + CX_BO_DivAssign = 24, + CX_BO_RemAssign = 25, + CX_BO_AddAssign = 26, + CX_BO_SubAssign = 27, + CX_BO_ShlAssign = 28, + CX_BO_ShrAssign = 29, + CX_BO_AndAssign = 30, + CX_BO_XorAssign = 31, + CX_BO_OrAssign = 32, + CX_BO_Comma = 33, + CX_BO_LAST = CX_BO_Comma +}; + +/** + * \brief Returns the operator code for the binary operator. + */ +CINDEX_LINKAGE enum CX_BinaryOperatorKind +clang_Cursor_getBinaryOpcode(CXCursor C); + +/** + * \brief Returns a string containing the spelling of the binary operator. + */ +CINDEX_LINKAGE CXString +clang_Cursor_getBinaryOpcodeStr(enum CX_BinaryOperatorKind Op); + +/** + * Returns the storage class for a function or variable declaration. + * + * If the passed in Cursor is not a function or variable declaration, + * CX_SC_Invalid is returned else the storage class. + */ +CINDEX_LINKAGE enum CX_StorageClass clang_Cursor_getStorageClass(CXCursor); + +/** + * Determine the number of overloaded declarations referenced by a + * \c CXCursor_OverloadedDeclRef cursor. + * + * \param cursor The cursor whose overloaded declarations are being queried. + * + * \returns The number of overloaded declarations referenced by \c cursor. If it + * is not a \c CXCursor_OverloadedDeclRef cursor, returns 0. + */ +CINDEX_LINKAGE unsigned clang_getNumOverloadedDecls(CXCursor cursor); + +/** + * Retrieve a cursor for one of the overloaded declarations referenced + * by a \c CXCursor_OverloadedDeclRef cursor. + * + * \param cursor The cursor whose overloaded declarations are being queried. + * + * \param index The zero-based index into the set of overloaded declarations in + * the cursor. + * + * \returns A cursor representing the declaration referenced by the given + * \c cursor at the specified \c index. If the cursor does not have an + * associated set of overloaded declarations, or if the index is out of bounds, + * returns \c clang_getNullCursor(); + */ +CINDEX_LINKAGE CXCursor clang_getOverloadedDecl(CXCursor cursor, + unsigned index); + +/** + * @} + */ + +/** + * \defgroup CINDEX_ATTRIBUTES Information for attributes + * + * @{ + */ + +/** + * For cursors representing an iboutletcollection attribute, + * this function returns the collection element type. + * + */ +CINDEX_LINKAGE CXType clang_getIBOutletCollectionType(CXCursor); + +/** + * @} + */ + +/** + * \defgroup CINDEX_CURSOR_TRAVERSAL Traversing the AST with cursors + * + * These routines provide the ability to traverse the abstract syntax tree + * using cursors. + * + * @{ + */ + +/** + * Describes how the traversal of the children of a particular + * cursor should proceed after visiting a particular child cursor. + * + * A value of this enumeration type should be returned by each + * \c CXCursorVisitor to indicate how clang_visitChildren() proceed. + */ +enum CXChildVisitResult { + /** + * Terminates the cursor traversal. + */ + CXChildVisit_Break, + /** + * Continues the cursor traversal with the next sibling of + * the cursor just visited, without visiting its children. + */ + CXChildVisit_Continue, + /** + * Recursively traverse the children of this cursor, using + * the same visitor and client data. + */ + CXChildVisit_Recurse +}; + +/** + * Visitor invoked for each cursor found by a traversal. + * + * This visitor function will be invoked for each cursor found by + * clang_visitCursorChildren(). Its first argument is the cursor being + * visited, its second argument is the parent visitor for that cursor, + * and its third argument is the client data provided to + * clang_visitCursorChildren(). + * + * The visitor should return one of the \c CXChildVisitResult values + * to direct clang_visitCursorChildren(). + */ +typedef enum CXChildVisitResult (*CXCursorVisitor)(CXCursor cursor, + CXCursor parent, + CXClientData client_data); + +/** + * Visit the children of a particular cursor. + * + * This function visits all the direct children of the given cursor, + * invoking the given \p visitor function with the cursors of each + * visited child. The traversal may be recursive, if the visitor returns + * \c CXChildVisit_Recurse. The traversal may also be ended prematurely, if + * the visitor returns \c CXChildVisit_Break. + * + * \param parent the cursor whose child may be visited. All kinds of + * cursors can be visited, including invalid cursors (which, by + * definition, have no children). + * + * \param visitor the visitor function that will be invoked for each + * child of \p parent. + * + * \param client_data pointer data supplied by the client, which will + * be passed to the visitor each time it is invoked. + * + * \returns a non-zero value if the traversal was terminated + * prematurely by the visitor returning \c CXChildVisit_Break. + */ +CINDEX_LINKAGE unsigned clang_visitChildren(CXCursor parent, + CXCursorVisitor visitor, + CXClientData client_data); +/** + * Visitor invoked for each cursor found by a traversal. + * + * This visitor block will be invoked for each cursor found by + * clang_visitChildrenWithBlock(). Its first argument is the cursor being + * visited, its second argument is the parent visitor for that cursor. + * + * The visitor should return one of the \c CXChildVisitResult values + * to direct clang_visitChildrenWithBlock(). + */ +#if __has_feature(blocks) +typedef enum CXChildVisitResult (^CXCursorVisitorBlock)(CXCursor cursor, + CXCursor parent); +#else +typedef struct _CXChildVisitResult *CXCursorVisitorBlock; +#endif + +/** + * Visits the children of a cursor using the specified block. Behaves + * identically to clang_visitChildren() in all other respects. + */ +CINDEX_LINKAGE unsigned +clang_visitChildrenWithBlock(CXCursor parent, CXCursorVisitorBlock block); + +/** + * @} + */ + +/** + * \defgroup CINDEX_CURSOR_XREF Cross-referencing in the AST + * + * These routines provide the ability to determine references within and + * across translation units, by providing the names of the entities referenced + * by cursors, follow reference cursors to the declarations they reference, + * and associate declarations with their definitions. + * + * @{ + */ + +/** + * Retrieve a Unified Symbol Resolution (USR) for the entity referenced + * by the given cursor. + * + * A Unified Symbol Resolution (USR) is a string that identifies a particular + * entity (function, class, variable, etc.) within a program. USRs can be + * compared across translation units to determine, e.g., when references in + * one translation refer to an entity defined in another translation unit. + */ +CINDEX_LINKAGE CXString clang_getCursorUSR(CXCursor); + +/** + * Construct a USR for a specified Objective-C class. + */ +CINDEX_LINKAGE CXString clang_constructUSR_ObjCClass(const char *class_name); + +/** + * Construct a USR for a specified Objective-C category. + */ +CINDEX_LINKAGE CXString clang_constructUSR_ObjCCategory( + const char *class_name, const char *category_name); + +/** + * Construct a USR for a specified Objective-C protocol. + */ +CINDEX_LINKAGE CXString +clang_constructUSR_ObjCProtocol(const char *protocol_name); + +/** + * Construct a USR for a specified Objective-C instance variable and + * the USR for its containing class. + */ +CINDEX_LINKAGE CXString clang_constructUSR_ObjCIvar(const char *name, + CXString classUSR); + +/** + * Construct a USR for a specified Objective-C method and + * the USR for its containing class. + */ +CINDEX_LINKAGE CXString clang_constructUSR_ObjCMethod(const char *name, + unsigned isInstanceMethod, + CXString classUSR); + +/** + * Construct a USR for a specified Objective-C property and the USR + * for its containing class. + */ +CINDEX_LINKAGE CXString clang_constructUSR_ObjCProperty(const char *property, + CXString classUSR); + +/** + * Retrieve a name for the entity referenced by this cursor. + */ +CINDEX_LINKAGE CXString clang_getCursorSpelling(CXCursor); + +/** + * Retrieve a range for a piece that forms the cursors spelling name. + * Most of the times there is only one range for the complete spelling but for + * Objective-C methods and Objective-C message expressions, there are multiple + * pieces for each selector identifier. + * + * \param pieceIndex the index of the spelling name piece. If this is greater + * than the actual number of pieces, it will return a NULL (invalid) range. + * + * \param options Reserved. + */ +CINDEX_LINKAGE CXSourceRange clang_Cursor_getSpellingNameRange( + CXCursor, unsigned pieceIndex, unsigned options); + +/** + * Opaque pointer representing a policy that controls pretty printing + * for \c clang_getCursorPrettyPrinted. + */ +typedef void *CXPrintingPolicy; + +/** + * Properties for the printing policy. + * + * See \c clang::PrintingPolicy for more information. + */ +enum CXPrintingPolicyProperty { + CXPrintingPolicy_Indentation, + CXPrintingPolicy_SuppressSpecifiers, + CXPrintingPolicy_SuppressTagKeyword, + CXPrintingPolicy_IncludeTagDefinition, + CXPrintingPolicy_SuppressScope, + CXPrintingPolicy_SuppressUnwrittenScope, + CXPrintingPolicy_SuppressInitializers, + CXPrintingPolicy_ConstantArraySizeAsWritten, + CXPrintingPolicy_AnonymousTagLocations, + CXPrintingPolicy_SuppressStrongLifetime, + CXPrintingPolicy_SuppressLifetimeQualifiers, + CXPrintingPolicy_SuppressTemplateArgsInCXXConstructors, + CXPrintingPolicy_Bool, + CXPrintingPolicy_Restrict, + CXPrintingPolicy_Alignof, + CXPrintingPolicy_UnderscoreAlignof, + CXPrintingPolicy_UseVoidForZeroParams, + CXPrintingPolicy_TerseOutput, + CXPrintingPolicy_PolishForDeclaration, + CXPrintingPolicy_Half, + CXPrintingPolicy_MSWChar, + CXPrintingPolicy_IncludeNewlines, + CXPrintingPolicy_MSVCFormatting, + CXPrintingPolicy_ConstantsAsWritten, + CXPrintingPolicy_SuppressImplicitBase, + CXPrintingPolicy_FullyQualifiedName, + + CXPrintingPolicy_LastProperty = CXPrintingPolicy_FullyQualifiedName +}; + +/** + * Get a property value for the given printing policy. + */ +CINDEX_LINKAGE unsigned +clang_PrintingPolicy_getProperty(CXPrintingPolicy Policy, + enum CXPrintingPolicyProperty Property); + +/** + * Set a property value for the given printing policy. + */ +CINDEX_LINKAGE void +clang_PrintingPolicy_setProperty(CXPrintingPolicy Policy, + enum CXPrintingPolicyProperty Property, + unsigned Value); + +/** + * Retrieve the default policy for the cursor. + * + * The policy should be released after use with \c + * clang_PrintingPolicy_dispose. + */ +CINDEX_LINKAGE CXPrintingPolicy clang_getCursorPrintingPolicy(CXCursor); + +/** + * Release a printing policy. + */ +CINDEX_LINKAGE void clang_PrintingPolicy_dispose(CXPrintingPolicy Policy); + +/** + * Pretty print declarations. + * + * \param Cursor The cursor representing a declaration. + * + * \param Policy The policy to control the entities being printed. If + * NULL, a default policy is used. + * + * \returns The pretty printed declaration or the empty string for + * other cursors. + */ +CINDEX_LINKAGE CXString clang_getCursorPrettyPrinted(CXCursor Cursor, + CXPrintingPolicy Policy); + +/** + * Retrieve the display name for the entity referenced by this cursor. + * + * The display name contains extra information that helps identify the cursor, + * such as the parameters of a function or template or the arguments of a + * class template specialization. + */ +CINDEX_LINKAGE CXString clang_getCursorDisplayName(CXCursor); + +/** For a cursor that is a reference, retrieve a cursor representing the + * entity that it references. + * + * Reference cursors refer to other entities in the AST. For example, an + * Objective-C superclass reference cursor refers to an Objective-C class. + * This function produces the cursor for the Objective-C class from the + * cursor for the superclass reference. If the input cursor is a declaration or + * definition, it returns that declaration or definition unchanged. + * Otherwise, returns the NULL cursor. + */ +CINDEX_LINKAGE CXCursor clang_getCursorReferenced(CXCursor); + +/** + * For a cursor that is either a reference to or a declaration + * of some entity, retrieve a cursor that describes the definition of + * that entity. + * + * Some entities can be declared multiple times within a translation + * unit, but only one of those declarations can also be a + * definition. For example, given: + * + * \code + * int f(int, int); + * int g(int x, int y) { return f(x, y); } + * int f(int a, int b) { return a + b; } + * int f(int, int); + * \endcode + * + * there are three declarations of the function "f", but only the + * second one is a definition. The clang_getCursorDefinition() + * function will take any cursor pointing to a declaration of "f" + * (the first or fourth lines of the example) or a cursor referenced + * that uses "f" (the call to "f' inside "g") and will return a + * declaration cursor pointing to the definition (the second "f" + * declaration). + * + * If given a cursor for which there is no corresponding definition, + * e.g., because there is no definition of that entity within this + * translation unit, returns a NULL cursor. + */ +CINDEX_LINKAGE CXCursor clang_getCursorDefinition(CXCursor); + +/** + * Determine whether the declaration pointed to by this cursor + * is also a definition of that entity. + */ +CINDEX_LINKAGE unsigned clang_isCursorDefinition(CXCursor); + +/** + * Retrieve the canonical cursor corresponding to the given cursor. + * + * In the C family of languages, many kinds of entities can be declared several + * times within a single translation unit. For example, a structure type can + * be forward-declared (possibly multiple times) and later defined: + * + * \code + * struct X; + * struct X; + * struct X { + * int member; + * }; + * \endcode + * + * The declarations and the definition of \c X are represented by three + * different cursors, all of which are declarations of the same underlying + * entity. One of these cursor is considered the "canonical" cursor, which + * is effectively the representative for the underlying entity. One can + * determine if two cursors are declarations of the same underlying entity by + * comparing their canonical cursors. + * + * \returns The canonical cursor for the entity referred to by the given cursor. + */ +CINDEX_LINKAGE CXCursor clang_getCanonicalCursor(CXCursor); + +/** + * If the cursor points to a selector identifier in an Objective-C + * method or message expression, this returns the selector index. + * + * After getting a cursor with #clang_getCursor, this can be called to + * determine if the location points to a selector identifier. + * + * \returns The selector index if the cursor is an Objective-C method or message + * expression and the cursor is pointing to a selector identifier, or -1 + * otherwise. + */ +CINDEX_LINKAGE int clang_Cursor_getObjCSelectorIndex(CXCursor); + +/** + * Given a cursor pointing to a C++ method call or an Objective-C + * message, returns non-zero if the method/message is "dynamic", meaning: + * + * For a C++ method: the call is virtual. + * For an Objective-C message: the receiver is an object instance, not 'super' + * or a specific class. + * + * If the method/message is "static" or the cursor does not point to a + * method/message, it will return zero. + */ +CINDEX_LINKAGE int clang_Cursor_isDynamicCall(CXCursor C); + +/** + * Given a cursor pointing to an Objective-C message or property + * reference, or C++ method call, returns the CXType of the receiver. + */ +CINDEX_LINKAGE CXType clang_Cursor_getReceiverType(CXCursor C); + +/** + * Property attributes for a \c CXCursor_ObjCPropertyDecl. + */ +typedef enum { + CXObjCPropertyAttr_noattr = 0x00, + CXObjCPropertyAttr_readonly = 0x01, + CXObjCPropertyAttr_getter = 0x02, + CXObjCPropertyAttr_assign = 0x04, + CXObjCPropertyAttr_readwrite = 0x08, + CXObjCPropertyAttr_retain = 0x10, + CXObjCPropertyAttr_copy = 0x20, + CXObjCPropertyAttr_nonatomic = 0x40, + CXObjCPropertyAttr_setter = 0x80, + CXObjCPropertyAttr_atomic = 0x100, + CXObjCPropertyAttr_weak = 0x200, + CXObjCPropertyAttr_strong = 0x400, + CXObjCPropertyAttr_unsafe_unretained = 0x800, + CXObjCPropertyAttr_class = 0x1000 +} CXObjCPropertyAttrKind; + +/** + * Given a cursor that represents a property declaration, return the + * associated property attributes. The bits are formed from + * \c CXObjCPropertyAttrKind. + * + * \param reserved Reserved for future use, pass 0. + */ +CINDEX_LINKAGE unsigned +clang_Cursor_getObjCPropertyAttributes(CXCursor C, unsigned reserved); + +/** + * Given a cursor that represents a property declaration, return the + * name of the method that implements the getter. + */ +CINDEX_LINKAGE CXString clang_Cursor_getObjCPropertyGetterName(CXCursor C); + +/** + * Given a cursor that represents a property declaration, return the + * name of the method that implements the setter, if any. + */ +CINDEX_LINKAGE CXString clang_Cursor_getObjCPropertySetterName(CXCursor C); + +/** + * 'Qualifiers' written next to the return and parameter types in + * Objective-C method declarations. + */ +typedef enum { + CXObjCDeclQualifier_None = 0x0, + CXObjCDeclQualifier_In = 0x1, + CXObjCDeclQualifier_Inout = 0x2, + CXObjCDeclQualifier_Out = 0x4, + CXObjCDeclQualifier_Bycopy = 0x8, + CXObjCDeclQualifier_Byref = 0x10, + CXObjCDeclQualifier_Oneway = 0x20 +} CXObjCDeclQualifierKind; + +/** + * Given a cursor that represents an Objective-C method or parameter + * declaration, return the associated Objective-C qualifiers for the return + * type or the parameter respectively. The bits are formed from + * CXObjCDeclQualifierKind. + */ +CINDEX_LINKAGE unsigned clang_Cursor_getObjCDeclQualifiers(CXCursor C); + +/** + * Given a cursor that represents an Objective-C method or property + * declaration, return non-zero if the declaration was affected by "\@optional". + * Returns zero if the cursor is not such a declaration or it is "\@required". + */ +CINDEX_LINKAGE unsigned clang_Cursor_isObjCOptional(CXCursor C); + +/** + * Returns non-zero if the given cursor is a variadic function or method. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isVariadic(CXCursor C); + +/** + * Returns non-zero if the given cursor points to a symbol marked with + * external_source_symbol attribute. + * + * \param language If non-NULL, and the attribute is present, will be set to + * the 'language' string from the attribute. + * + * \param definedIn If non-NULL, and the attribute is present, will be set to + * the 'definedIn' string from the attribute. + * + * \param isGenerated If non-NULL, and the attribute is present, will be set to + * non-zero if the 'generated_declaration' is set in the attribute. + */ +CINDEX_LINKAGE unsigned clang_Cursor_isExternalSymbol(CXCursor C, + CXString *language, + CXString *definedIn, + unsigned *isGenerated); + +/** + * Given a cursor that represents a declaration, return the associated + * comment's source range. The range may include multiple consecutive comments + * with whitespace in between. + */ +CINDEX_LINKAGE CXSourceRange clang_Cursor_getCommentRange(CXCursor C); + +/** + * Given a cursor that represents a declaration, return the associated + * comment text, including comment markers. + */ +CINDEX_LINKAGE CXString clang_Cursor_getRawCommentText(CXCursor C); + +/** + * Given a cursor that represents a documentable entity (e.g., + * declaration), return the associated \paragraph; otherwise return the + * first paragraph. + */ +CINDEX_LINKAGE CXString clang_Cursor_getBriefCommentText(CXCursor C); + +/** + * @} + */ + +/** \defgroup CINDEX_MANGLE Name Mangling API Functions + * + * @{ + */ + +/** + * Retrieve the CXString representing the mangled name of the cursor. + */ +CINDEX_LINKAGE CXString clang_Cursor_getMangling(CXCursor); + +/** + * Retrieve the CXStrings representing the mangled symbols of the C++ + * constructor or destructor at the cursor. + */ +CINDEX_LINKAGE CXStringSet *clang_Cursor_getCXXManglings(CXCursor); + +/** + * Retrieve the CXStrings representing the mangled symbols of the ObjC + * class interface or implementation at the cursor. + */ +CINDEX_LINKAGE CXStringSet *clang_Cursor_getObjCManglings(CXCursor); + +/** + * @} + */ + +/** + * \defgroup CINDEX_MODULE Module introspection + * + * The functions in this group provide access to information about modules. + * + * @{ + */ + +typedef void *CXModule; + +/** + * Given a CXCursor_ModuleImportDecl cursor, return the associated module. + */ +CINDEX_LINKAGE CXModule clang_Cursor_getModule(CXCursor C); + +/** + * Given a CXFile header file, return the module that contains it, if one + * exists. + */ +CINDEX_LINKAGE CXModule clang_getModuleForFile(CXTranslationUnit, CXFile); + +/** + * \param Module a module object. + * + * \returns the module file where the provided module object came from. + */ +CINDEX_LINKAGE CXFile clang_Module_getASTFile(CXModule Module); + +/** + * \param Module a module object. + * + * \returns the parent of a sub-module or NULL if the given module is top-level, + * e.g. for 'std.vector' it will return the 'std' module. + */ +CINDEX_LINKAGE CXModule clang_Module_getParent(CXModule Module); + +/** + * \param Module a module object. + * + * \returns the name of the module, e.g. for the 'std.vector' sub-module it + * will return "vector". + */ +CINDEX_LINKAGE CXString clang_Module_getName(CXModule Module); + +/** + * \param Module a module object. + * + * \returns the full name of the module, e.g. "std.vector". + */ +CINDEX_LINKAGE CXString clang_Module_getFullName(CXModule Module); + +/** + * \param Module a module object. + * + * \returns non-zero if the module is a system one. + */ +CINDEX_LINKAGE int clang_Module_isSystem(CXModule Module); + +/** + * \param Module a module object. + * + * \returns the number of top level headers associated with this module. + */ +CINDEX_LINKAGE unsigned clang_Module_getNumTopLevelHeaders(CXTranslationUnit, + CXModule Module); + +/** + * \param Module a module object. + * + * \param Index top level header index (zero-based). + * + * \returns the specified top level header associated with the module. + */ +CINDEX_LINKAGE +CXFile clang_Module_getTopLevelHeader(CXTranslationUnit, CXModule Module, + unsigned Index); + +/** + * @} + */ + +/** + * \defgroup CINDEX_CPP C++ AST introspection + * + * The routines in this group provide access information in the ASTs specific + * to C++ language features. + * + * @{ + */ + +/** + * Determine if a C++ constructor is a converting constructor. + */ +CINDEX_LINKAGE unsigned +clang_CXXConstructor_isConvertingConstructor(CXCursor C); + +/** + * Determine if a C++ constructor is a copy constructor. + */ +CINDEX_LINKAGE unsigned clang_CXXConstructor_isCopyConstructor(CXCursor C); + +/** + * Determine if a C++ constructor is the default constructor. + */ +CINDEX_LINKAGE unsigned clang_CXXConstructor_isDefaultConstructor(CXCursor C); + +/** + * Determine if a C++ constructor is a move constructor. + */ +CINDEX_LINKAGE unsigned clang_CXXConstructor_isMoveConstructor(CXCursor C); + +/** + * Determine if a C++ field is declared 'mutable'. + */ +CINDEX_LINKAGE unsigned clang_CXXField_isMutable(CXCursor C); + +/** + * Determine if a C++ method is declared '= default'. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isDefaulted(CXCursor C); + +/** + * Determine if a C++ method is declared '= delete'. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isDeleted(CXCursor C); + +/** + * Determine if a C++ member function or member function template is + * pure virtual. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isPureVirtual(CXCursor C); + +/** + * Determine if a C++ member function or member function template is + * declared 'static'. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isStatic(CXCursor C); + +/** + * Determine if a C++ member function or member function template is + * explicitly declared 'virtual' or if it overrides a virtual method from + * one of the base classes. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isVirtual(CXCursor C); + +/** + * Determine if a C++ member function is a copy-assignment operator, + * returning 1 if such is the case and 0 otherwise. + * + * > A copy-assignment operator `X::operator=` is a non-static, + * > non-template member function of _class_ `X` with exactly one + * > parameter of type `X`, `X&`, `const X&`, `volatile X&` or `const + * > volatile X&`. + * + * That is, for example, the `operator=` in: + * + * class Foo { + * bool operator=(const volatile Foo&); + * }; + * + * Is a copy-assignment operator, while the `operator=` in: + * + * class Bar { + * bool operator=(const int&); + * }; + * + * Is not. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isCopyAssignmentOperator(CXCursor C); + +/** + * Determine if a C++ member function is a move-assignment operator, + * returning 1 if such is the case and 0 otherwise. + * + * > A move-assignment operator `X::operator=` is a non-static, + * > non-template member function of _class_ `X` with exactly one + * > parameter of type `X&&`, `const X&&`, `volatile X&&` or `const + * > volatile X&&`. + * + * That is, for example, the `operator=` in: + * + * class Foo { + * bool operator=(const volatile Foo&&); + * }; + * + * Is a move-assignment operator, while the `operator=` in: + * + * class Bar { + * bool operator=(const int&&); + * }; + * + * Is not. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isMoveAssignmentOperator(CXCursor C); + +/** + * Determines if a C++ constructor or conversion function was declared + * explicit, returning 1 if such is the case and 0 otherwise. + * + * Constructors or conversion functions are declared explicit through + * the use of the explicit specifier. + * + * For example, the following constructor and conversion function are + * not explicit as they lack the explicit specifier: + * + * class Foo { + * Foo(); + * operator int(); + * }; + * + * While the following constructor and conversion function are + * explicit as they are declared with the explicit specifier. + * + * class Foo { + * explicit Foo(); + * explicit operator int(); + * }; + * + * This function will return 0 when given a cursor pointing to one of + * the former declarations and it will return 1 for a cursor pointing + * to the latter declarations. + * + * The explicit specifier allows the user to specify a + * conditional compile-time expression whose value decides + * whether the marked element is explicit or not. + * + * For example: + * + * constexpr bool foo(int i) { return i % 2 == 0; } + * + * class Foo { + * explicit(foo(1)) Foo(); + * explicit(foo(2)) operator int(); + * } + * + * This function will return 0 for the constructor and 1 for + * the conversion function. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isExplicit(CXCursor C); + +/** + * Determine if a C++ record is abstract, i.e. whether a class or struct + * has a pure virtual member function. + */ +CINDEX_LINKAGE unsigned clang_CXXRecord_isAbstract(CXCursor C); + +/** + * Determine if an enum declaration refers to a scoped enum. + */ +CINDEX_LINKAGE unsigned clang_EnumDecl_isScoped(CXCursor C); + +/** + * Determine if a C++ member function or member function template is + * declared 'const'. + */ +CINDEX_LINKAGE unsigned clang_CXXMethod_isConst(CXCursor C); + +/** + * Given a cursor that represents a template, determine + * the cursor kind of the specializations would be generated by instantiating + * the template. + * + * This routine can be used to determine what flavor of function template, + * class template, or class template partial specialization is stored in the + * cursor. For example, it can describe whether a class template cursor is + * declared with "struct", "class" or "union". + * + * \param C The cursor to query. This cursor should represent a template + * declaration. + * + * \returns The cursor kind of the specializations that would be generated + * by instantiating the template \p C. If \p C is not a template, returns + * \c CXCursor_NoDeclFound. + */ +CINDEX_LINKAGE enum CXCursorKind clang_getTemplateCursorKind(CXCursor C); + +/** + * Given a cursor that may represent a specialization or instantiation + * of a template, retrieve the cursor that represents the template that it + * specializes or from which it was instantiated. + * + * This routine determines the template involved both for explicit + * specializations of templates and for implicit instantiations of the template, + * both of which are referred to as "specializations". For a class template + * specialization (e.g., \c std::vector), this routine will return + * either the primary template (\c std::vector) or, if the specialization was + * instantiated from a class template partial specialization, the class template + * partial specialization. For a class template partial specialization and a + * function template specialization (including instantiations), this + * this routine will return the specialized template. + * + * For members of a class template (e.g., member functions, member classes, or + * static data members), returns the specialized or instantiated member. + * Although not strictly "templates" in the C++ language, members of class + * templates have the same notions of specializations and instantiations that + * templates do, so this routine treats them similarly. + * + * \param C A cursor that may be a specialization of a template or a member + * of a template. + * + * \returns If the given cursor is a specialization or instantiation of a + * template or a member thereof, the template or member that it specializes or + * from which it was instantiated. Otherwise, returns a NULL cursor. + */ +CINDEX_LINKAGE CXCursor clang_getSpecializedCursorTemplate(CXCursor C); + +/** + * Given a cursor that references something else, return the source range + * covering that reference. + * + * \param C A cursor pointing to a member reference, a declaration reference, or + * an operator call. + * \param NameFlags A bitset with three independent flags: + * CXNameRange_WantQualifier, CXNameRange_WantTemplateArgs, and + * CXNameRange_WantSinglePiece. + * \param PieceIndex For contiguous names or when passing the flag + * CXNameRange_WantSinglePiece, only one piece with index 0 is + * available. When the CXNameRange_WantSinglePiece flag is not passed for a + * non-contiguous names, this index can be used to retrieve the individual + * pieces of the name. See also CXNameRange_WantSinglePiece. + * + * \returns The piece of the name pointed to by the given cursor. If there is no + * name, or if the PieceIndex is out-of-range, a null-cursor will be returned. + */ +CINDEX_LINKAGE CXSourceRange clang_getCursorReferenceNameRange( + CXCursor C, unsigned NameFlags, unsigned PieceIndex); + +enum CXNameRefFlags { + /** + * Include the nested-name-specifier, e.g. Foo:: in x.Foo::y, in the + * range. + */ + CXNameRange_WantQualifier = 0x1, + + /** + * Include the explicit template arguments, e.g. \ in x.f, + * in the range. + */ + CXNameRange_WantTemplateArgs = 0x2, + + /** + * If the name is non-contiguous, return the full spanning range. + * + * Non-contiguous names occur in Objective-C when a selector with two or more + * parameters is used, or in C++ when using an operator: + * \code + * [object doSomething:here withValue:there]; // Objective-C + * return some_vector[1]; // C++ + * \endcode + */ + CXNameRange_WantSinglePiece = 0x4 +}; + +/** + * @} + */ + +/** + * \defgroup CINDEX_LEX Token extraction and manipulation + * + * The routines in this group provide access to the tokens within a + * translation unit, along with a semantic mapping of those tokens to + * their corresponding cursors. + * + * @{ + */ + +/** + * Describes a kind of token. + */ +typedef enum CXTokenKind { + /** + * A token that contains some kind of punctuation. + */ + CXToken_Punctuation, + + /** + * A language keyword. + */ + CXToken_Keyword, + + /** + * An identifier (that is not a keyword). + */ + CXToken_Identifier, + + /** + * A numeric, string, or character literal. + */ + CXToken_Literal, + + /** + * A comment. + */ + CXToken_Comment +} CXTokenKind; + +/** + * Describes a single preprocessing token. + */ +typedef struct { + unsigned int_data[4]; + void *ptr_data; +} CXToken; + +/** + * Get the raw lexical token starting with the given location. + * + * \param TU the translation unit whose text is being tokenized. + * + * \param Location the source location with which the token starts. + * + * \returns The token starting with the given location or NULL if no such token + * exist. The returned pointer must be freed with clang_disposeTokens before the + * translation unit is destroyed. + */ +CINDEX_LINKAGE CXToken *clang_getToken(CXTranslationUnit TU, + CXSourceLocation Location); + +/** + * Determine the kind of the given token. + */ +CINDEX_LINKAGE CXTokenKind clang_getTokenKind(CXToken); + +/** + * Determine the spelling of the given token. + * + * The spelling of a token is the textual representation of that token, e.g., + * the text of an identifier or keyword. + */ +CINDEX_LINKAGE CXString clang_getTokenSpelling(CXTranslationUnit, CXToken); + +/** + * Retrieve the source location of the given token. + */ +CINDEX_LINKAGE CXSourceLocation clang_getTokenLocation(CXTranslationUnit, + CXToken); + +/** + * Retrieve a source range that covers the given token. + */ +CINDEX_LINKAGE CXSourceRange clang_getTokenExtent(CXTranslationUnit, CXToken); + +/** + * Tokenize the source code described by the given range into raw + * lexical tokens. + * + * \param TU the translation unit whose text is being tokenized. + * + * \param Range the source range in which text should be tokenized. All of the + * tokens produced by tokenization will fall within this source range, + * + * \param Tokens this pointer will be set to point to the array of tokens + * that occur within the given source range. The returned pointer must be + * freed with clang_disposeTokens() before the translation unit is destroyed. + * + * \param NumTokens will be set to the number of tokens in the \c *Tokens + * array. + * + */ +CINDEX_LINKAGE void clang_tokenize(CXTranslationUnit TU, CXSourceRange Range, + CXToken **Tokens, unsigned *NumTokens); + +/** + * Annotate the given set of tokens by providing cursors for each token + * that can be mapped to a specific entity within the abstract syntax tree. + * + * This token-annotation routine is equivalent to invoking + * clang_getCursor() for the source locations of each of the + * tokens. The cursors provided are filtered, so that only those + * cursors that have a direct correspondence to the token are + * accepted. For example, given a function call \c f(x), + * clang_getCursor() would provide the following cursors: + * + * * when the cursor is over the 'f', a DeclRefExpr cursor referring to 'f'. + * * when the cursor is over the '(' or the ')', a CallExpr referring to 'f'. + * * when the cursor is over the 'x', a DeclRefExpr cursor referring to 'x'. + * + * Only the first and last of these cursors will occur within the + * annotate, since the tokens "f" and "x' directly refer to a function + * and a variable, respectively, but the parentheses are just a small + * part of the full syntax of the function call expression, which is + * not provided as an annotation. + * + * \param TU the translation unit that owns the given tokens. + * + * \param Tokens the set of tokens to annotate. + * + * \param NumTokens the number of tokens in \p Tokens. + * + * \param Cursors an array of \p NumTokens cursors, whose contents will be + * replaced with the cursors corresponding to each token. + */ +CINDEX_LINKAGE void clang_annotateTokens(CXTranslationUnit TU, CXToken *Tokens, + unsigned NumTokens, CXCursor *Cursors); + +/** + * Free the given set of tokens. + */ +CINDEX_LINKAGE void clang_disposeTokens(CXTranslationUnit TU, CXToken *Tokens, + unsigned NumTokens); + +/** + * @} + */ + +/** + * \defgroup CINDEX_DEBUG Debugging facilities + * + * These routines are used for testing and debugging, only, and should not + * be relied upon. + * + * @{ + */ + +/* for debug/testing */ +CINDEX_LINKAGE CXString clang_getCursorKindSpelling(enum CXCursorKind Kind); +CINDEX_LINKAGE void clang_getDefinitionSpellingAndExtent( + CXCursor, const char **startBuf, const char **endBuf, unsigned *startLine, + unsigned *startColumn, unsigned *endLine, unsigned *endColumn); +CINDEX_LINKAGE void clang_enableStackTraces(void); +CINDEX_LINKAGE void clang_executeOnThread(void (*fn)(void *), void *user_data, + unsigned stack_size); + +/** + * @} + */ + +/** + * \defgroup CINDEX_CODE_COMPLET Code completion + * + * Code completion involves taking an (incomplete) source file, along with + * knowledge of where the user is actively editing that file, and suggesting + * syntactically- and semantically-valid constructs that the user might want to + * use at that particular point in the source code. These data structures and + * routines provide support for code completion. + * + * @{ + */ + +/** + * A semantic string that describes a code-completion result. + * + * A semantic string that describes the formatting of a code-completion + * result as a single "template" of text that should be inserted into the + * source buffer when a particular code-completion result is selected. + * Each semantic string is made up of some number of "chunks", each of which + * contains some text along with a description of what that text means, e.g., + * the name of the entity being referenced, whether the text chunk is part of + * the template, or whether it is a "placeholder" that the user should replace + * with actual code,of a specific kind. See \c CXCompletionChunkKind for a + * description of the different kinds of chunks. + */ +typedef void *CXCompletionString; + +/** + * A single result of code completion. + */ +typedef struct { + /** + * The kind of entity that this completion refers to. + * + * The cursor kind will be a macro, keyword, or a declaration (one of the + * *Decl cursor kinds), describing the entity that the completion is + * referring to. + * + * \todo In the future, we would like to provide a full cursor, to allow + * the client to extract additional information from declaration. + */ + enum CXCursorKind CursorKind; + + /** + * The code-completion string that describes how to insert this + * code-completion result into the editing buffer. + */ + CXCompletionString CompletionString; +} CXCompletionResult; + +/** + * Describes a single piece of text within a code-completion string. + * + * Each "chunk" within a code-completion string (\c CXCompletionString) is + * either a piece of text with a specific "kind" that describes how that text + * should be interpreted by the client or is another completion string. + */ +enum CXCompletionChunkKind { + /** + * A code-completion string that describes "optional" text that + * could be a part of the template (but is not required). + * + * The Optional chunk is the only kind of chunk that has a code-completion + * string for its representation, which is accessible via + * \c clang_getCompletionChunkCompletionString(). The code-completion string + * describes an additional part of the template that is completely optional. + * For example, optional chunks can be used to describe the placeholders for + * arguments that match up with defaulted function parameters, e.g. given: + * + * \code + * void f(int x, float y = 3.14, double z = 2.71828); + * \endcode + * + * The code-completion string for this function would contain: + * - a TypedText chunk for "f". + * - a LeftParen chunk for "(". + * - a Placeholder chunk for "int x" + * - an Optional chunk containing the remaining defaulted arguments, e.g., + * - a Comma chunk for "," + * - a Placeholder chunk for "float y" + * - an Optional chunk containing the last defaulted argument: + * - a Comma chunk for "," + * - a Placeholder chunk for "double z" + * - a RightParen chunk for ")" + * + * There are many ways to handle Optional chunks. Two simple approaches are: + * - Completely ignore optional chunks, in which case the template for the + * function "f" would only include the first parameter ("int x"). + * - Fully expand all optional chunks, in which case the template for the + * function "f" would have all of the parameters. + */ + CXCompletionChunk_Optional, + /** + * Text that a user would be expected to type to get this + * code-completion result. + * + * There will be exactly one "typed text" chunk in a semantic string, which + * will typically provide the spelling of a keyword or the name of a + * declaration that could be used at the current code point. Clients are + * expected to filter the code-completion results based on the text in this + * chunk. + */ + CXCompletionChunk_TypedText, + /** + * Text that should be inserted as part of a code-completion result. + * + * A "text" chunk represents text that is part of the template to be + * inserted into user code should this particular code-completion result + * be selected. + */ + CXCompletionChunk_Text, + /** + * Placeholder text that should be replaced by the user. + * + * A "placeholder" chunk marks a place where the user should insert text + * into the code-completion template. For example, placeholders might mark + * the function parameters for a function declaration, to indicate that the + * user should provide arguments for each of those parameters. The actual + * text in a placeholder is a suggestion for the text to display before + * the user replaces the placeholder with real code. + */ + CXCompletionChunk_Placeholder, + /** + * Informative text that should be displayed but never inserted as + * part of the template. + * + * An "informative" chunk contains annotations that can be displayed to + * help the user decide whether a particular code-completion result is the + * right option, but which is not part of the actual template to be inserted + * by code completion. + */ + CXCompletionChunk_Informative, + /** + * Text that describes the current parameter when code-completion is + * referring to function call, message send, or template specialization. + * + * A "current parameter" chunk occurs when code-completion is providing + * information about a parameter corresponding to the argument at the + * code-completion point. For example, given a function + * + * \code + * int add(int x, int y); + * \endcode + * + * and the source code \c add(, where the code-completion point is after the + * "(", the code-completion string will contain a "current parameter" chunk + * for "int x", indicating that the current argument will initialize that + * parameter. After typing further, to \c add(17, (where the code-completion + * point is after the ","), the code-completion string will contain a + * "current parameter" chunk to "int y". + */ + CXCompletionChunk_CurrentParameter, + /** + * A left parenthesis ('('), used to initiate a function call or + * signal the beginning of a function parameter list. + */ + CXCompletionChunk_LeftParen, + /** + * A right parenthesis (')'), used to finish a function call or + * signal the end of a function parameter list. + */ + CXCompletionChunk_RightParen, + /** + * A left bracket ('['). + */ + CXCompletionChunk_LeftBracket, + /** + * A right bracket (']'). + */ + CXCompletionChunk_RightBracket, + /** + * A left brace ('{'). + */ + CXCompletionChunk_LeftBrace, + /** + * A right brace ('}'). + */ + CXCompletionChunk_RightBrace, + /** + * A left angle bracket ('<'). + */ + CXCompletionChunk_LeftAngle, + /** + * A right angle bracket ('>'). + */ + CXCompletionChunk_RightAngle, + /** + * A comma separator (','). + */ + CXCompletionChunk_Comma, + /** + * Text that specifies the result type of a given result. + * + * This special kind of informative chunk is not meant to be inserted into + * the text buffer. Rather, it is meant to illustrate the type that an + * expression using the given completion string would have. + */ + CXCompletionChunk_ResultType, + /** + * A colon (':'). + */ + CXCompletionChunk_Colon, + /** + * A semicolon (';'). + */ + CXCompletionChunk_SemiColon, + /** + * An '=' sign. + */ + CXCompletionChunk_Equal, + /** + * Horizontal space (' '). + */ + CXCompletionChunk_HorizontalSpace, + /** + * Vertical space ('\\n'), after which it is generally a good idea to + * perform indentation. + */ + CXCompletionChunk_VerticalSpace +}; + +/** + * Determine the kind of a particular chunk within a completion string. + * + * \param completion_string the completion string to query. + * + * \param chunk_number the 0-based index of the chunk in the completion string. + * + * \returns the kind of the chunk at the index \c chunk_number. + */ +CINDEX_LINKAGE enum CXCompletionChunkKind +clang_getCompletionChunkKind(CXCompletionString completion_string, + unsigned chunk_number); + +/** + * Retrieve the text associated with a particular chunk within a + * completion string. + * + * \param completion_string the completion string to query. + * + * \param chunk_number the 0-based index of the chunk in the completion string. + * + * \returns the text associated with the chunk at index \c chunk_number. + */ +CINDEX_LINKAGE CXString clang_getCompletionChunkText( + CXCompletionString completion_string, unsigned chunk_number); + +/** + * Retrieve the completion string associated with a particular chunk + * within a completion string. + * + * \param completion_string the completion string to query. + * + * \param chunk_number the 0-based index of the chunk in the completion string. + * + * \returns the completion string associated with the chunk at index + * \c chunk_number. + */ +CINDEX_LINKAGE CXCompletionString clang_getCompletionChunkCompletionString( + CXCompletionString completion_string, unsigned chunk_number); + +/** + * Retrieve the number of chunks in the given code-completion string. + */ +CINDEX_LINKAGE unsigned +clang_getNumCompletionChunks(CXCompletionString completion_string); + +/** + * Determine the priority of this code completion. + * + * The priority of a code completion indicates how likely it is that this + * particular completion is the completion that the user will select. The + * priority is selected by various internal heuristics. + * + * \param completion_string The completion string to query. + * + * \returns The priority of this completion string. Smaller values indicate + * higher-priority (more likely) completions. + */ +CINDEX_LINKAGE unsigned +clang_getCompletionPriority(CXCompletionString completion_string); + +/** + * Determine the availability of the entity that this code-completion + * string refers to. + * + * \param completion_string The completion string to query. + * + * \returns The availability of the completion string. + */ +CINDEX_LINKAGE enum CXAvailabilityKind +clang_getCompletionAvailability(CXCompletionString completion_string); + +/** + * Retrieve the number of annotations associated with the given + * completion string. + * + * \param completion_string the completion string to query. + * + * \returns the number of annotations associated with the given completion + * string. + */ +CINDEX_LINKAGE unsigned +clang_getCompletionNumAnnotations(CXCompletionString completion_string); + +/** + * Retrieve the annotation associated with the given completion string. + * + * \param completion_string the completion string to query. + * + * \param annotation_number the 0-based index of the annotation of the + * completion string. + * + * \returns annotation string associated with the completion at index + * \c annotation_number, or a NULL string if that annotation is not available. + */ +CINDEX_LINKAGE CXString clang_getCompletionAnnotation( + CXCompletionString completion_string, unsigned annotation_number); + +/** + * Retrieve the parent context of the given completion string. + * + * The parent context of a completion string is the semantic parent of + * the declaration (if any) that the code completion represents. For example, + * a code completion for an Objective-C method would have the method's class + * or protocol as its context. + * + * \param completion_string The code completion string whose parent is + * being queried. + * + * \param kind DEPRECATED: always set to CXCursor_NotImplemented if non-NULL. + * + * \returns The name of the completion parent, e.g., "NSObject" if + * the completion string represents a method in the NSObject class. + */ +CINDEX_LINKAGE CXString clang_getCompletionParent( + CXCompletionString completion_string, enum CXCursorKind *kind); + +/** + * Retrieve the brief documentation comment attached to the declaration + * that corresponds to the given completion string. + */ +CINDEX_LINKAGE CXString +clang_getCompletionBriefComment(CXCompletionString completion_string); + +/** + * Retrieve a completion string for an arbitrary declaration or macro + * definition cursor. + * + * \param cursor The cursor to query. + * + * \returns A non-context-sensitive completion string for declaration and macro + * definition cursors, or NULL for other kinds of cursors. + */ +CINDEX_LINKAGE CXCompletionString +clang_getCursorCompletionString(CXCursor cursor); + +/** + * Contains the results of code-completion. + * + * This data structure contains the results of code completion, as + * produced by \c clang_codeCompleteAt(). Its contents must be freed by + * \c clang_disposeCodeCompleteResults. + */ +typedef struct { + /** + * The code-completion results. + */ + CXCompletionResult *Results; + + /** + * The number of code-completion results stored in the + * \c Results array. + */ + unsigned NumResults; +} CXCodeCompleteResults; + +/** + * Retrieve the number of fix-its for the given completion index. + * + * Calling this makes sense only if CXCodeComplete_IncludeCompletionsWithFixIts + * option was set. + * + * \param results The structure keeping all completion results + * + * \param completion_index The index of the completion + * + * \return The number of fix-its which must be applied before the completion at + * completion_index can be applied + */ +CINDEX_LINKAGE unsigned +clang_getCompletionNumFixIts(CXCodeCompleteResults *results, + unsigned completion_index); + +/** + * Fix-its that *must* be applied before inserting the text for the + * corresponding completion. + * + * By default, clang_codeCompleteAt() only returns completions with empty + * fix-its. Extra completions with non-empty fix-its should be explicitly + * requested by setting CXCodeComplete_IncludeCompletionsWithFixIts. + * + * For the clients to be able to compute position of the cursor after applying + * fix-its, the following conditions are guaranteed to hold for + * replacement_range of the stored fix-its: + * - Ranges in the fix-its are guaranteed to never contain the completion + * point (or identifier under completion point, if any) inside them, except + * at the start or at the end of the range. + * - If a fix-it range starts or ends with completion point (or starts or + * ends after the identifier under completion point), it will contain at + * least one character. It allows to unambiguously recompute completion + * point after applying the fix-it. + * + * The intuition is that provided fix-its change code around the identifier we + * complete, but are not allowed to touch the identifier itself or the + * completion point. One example of completions with corrections are the ones + * replacing '.' with '->' and vice versa: + * + * std::unique_ptr> vec_ptr; + * In 'vec_ptr.^', one of the completions is 'push_back', it requires + * replacing '.' with '->'. + * In 'vec_ptr->^', one of the completions is 'release', it requires + * replacing '->' with '.'. + * + * \param results The structure keeping all completion results + * + * \param completion_index The index of the completion + * + * \param fixit_index The index of the fix-it for the completion at + * completion_index + * + * \param replacement_range The fix-it range that must be replaced before the + * completion at completion_index can be applied + * + * \returns The fix-it string that must replace the code at replacement_range + * before the completion at completion_index can be applied + */ +CINDEX_LINKAGE CXString clang_getCompletionFixIt( + CXCodeCompleteResults *results, unsigned completion_index, + unsigned fixit_index, CXSourceRange *replacement_range); + +/** + * Flags that can be passed to \c clang_codeCompleteAt() to + * modify its behavior. + * + * The enumerators in this enumeration can be bitwise-OR'd together to + * provide multiple options to \c clang_codeCompleteAt(). + */ +enum CXCodeComplete_Flags { + /** + * Whether to include macros within the set of code + * completions returned. + */ + CXCodeComplete_IncludeMacros = 0x01, + + /** + * Whether to include code patterns for language constructs + * within the set of code completions, e.g., for loops. + */ + CXCodeComplete_IncludeCodePatterns = 0x02, + + /** + * Whether to include brief documentation within the set of code + * completions returned. + */ + CXCodeComplete_IncludeBriefComments = 0x04, + + /** + * Whether to speed up completion by omitting top- or namespace-level entities + * defined in the preamble. There's no guarantee any particular entity is + * omitted. This may be useful if the headers are indexed externally. + */ + CXCodeComplete_SkipPreamble = 0x08, + + /** + * Whether to include completions with small + * fix-its, e.g. change '.' to '->' on member access, etc. + */ + CXCodeComplete_IncludeCompletionsWithFixIts = 0x10 +}; + +/** + * Bits that represent the context under which completion is occurring. + * + * The enumerators in this enumeration may be bitwise-OR'd together if multiple + * contexts are occurring simultaneously. + */ +enum CXCompletionContext { + /** + * The context for completions is unexposed, as only Clang results + * should be included. (This is equivalent to having no context bits set.) + */ + CXCompletionContext_Unexposed = 0, + + /** + * Completions for any possible type should be included in the results. + */ + CXCompletionContext_AnyType = 1 << 0, + + /** + * Completions for any possible value (variables, function calls, etc.) + * should be included in the results. + */ + CXCompletionContext_AnyValue = 1 << 1, + /** + * Completions for values that resolve to an Objective-C object should + * be included in the results. + */ + CXCompletionContext_ObjCObjectValue = 1 << 2, + /** + * Completions for values that resolve to an Objective-C selector + * should be included in the results. + */ + CXCompletionContext_ObjCSelectorValue = 1 << 3, + /** + * Completions for values that resolve to a C++ class type should be + * included in the results. + */ + CXCompletionContext_CXXClassTypeValue = 1 << 4, + + /** + * Completions for fields of the member being accessed using the dot + * operator should be included in the results. + */ + CXCompletionContext_DotMemberAccess = 1 << 5, + /** + * Completions for fields of the member being accessed using the arrow + * operator should be included in the results. + */ + CXCompletionContext_ArrowMemberAccess = 1 << 6, + /** + * Completions for properties of the Objective-C object being accessed + * using the dot operator should be included in the results. + */ + CXCompletionContext_ObjCPropertyAccess = 1 << 7, + + /** + * Completions for enum tags should be included in the results. + */ + CXCompletionContext_EnumTag = 1 << 8, + /** + * Completions for union tags should be included in the results. + */ + CXCompletionContext_UnionTag = 1 << 9, + /** + * Completions for struct tags should be included in the results. + */ + CXCompletionContext_StructTag = 1 << 10, + + /** + * Completions for C++ class names should be included in the results. + */ + CXCompletionContext_ClassTag = 1 << 11, + /** + * Completions for C++ namespaces and namespace aliases should be + * included in the results. + */ + CXCompletionContext_Namespace = 1 << 12, + /** + * Completions for C++ nested name specifiers should be included in + * the results. + */ + CXCompletionContext_NestedNameSpecifier = 1 << 13, + + /** + * Completions for Objective-C interfaces (classes) should be included + * in the results. + */ + CXCompletionContext_ObjCInterface = 1 << 14, + /** + * Completions for Objective-C protocols should be included in + * the results. + */ + CXCompletionContext_ObjCProtocol = 1 << 15, + /** + * Completions for Objective-C categories should be included in + * the results. + */ + CXCompletionContext_ObjCCategory = 1 << 16, + /** + * Completions for Objective-C instance messages should be included + * in the results. + */ + CXCompletionContext_ObjCInstanceMessage = 1 << 17, + /** + * Completions for Objective-C class messages should be included in + * the results. + */ + CXCompletionContext_ObjCClassMessage = 1 << 18, + /** + * Completions for Objective-C selector names should be included in + * the results. + */ + CXCompletionContext_ObjCSelectorName = 1 << 19, + + /** + * Completions for preprocessor macro names should be included in + * the results. + */ + CXCompletionContext_MacroName = 1 << 20, + + /** + * Natural language completions should be included in the results. + */ + CXCompletionContext_NaturalLanguage = 1 << 21, + + /** + * #include file completions should be included in the results. + */ + CXCompletionContext_IncludedFile = 1 << 22, + + /** + * The current context is unknown, so set all contexts. + */ + CXCompletionContext_Unknown = ((1 << 23) - 1) +}; + +/** + * Returns a default set of code-completion options that can be + * passed to\c clang_codeCompleteAt(). + */ +CINDEX_LINKAGE unsigned clang_defaultCodeCompleteOptions(void); + +/** + * Perform code completion at a given location in a translation unit. + * + * This function performs code completion at a particular file, line, and + * column within source code, providing results that suggest potential + * code snippets based on the context of the completion. The basic model + * for code completion is that Clang will parse a complete source file, + * performing syntax checking up to the location where code-completion has + * been requested. At that point, a special code-completion token is passed + * to the parser, which recognizes this token and determines, based on the + * current location in the C/Objective-C/C++ grammar and the state of + * semantic analysis, what completions to provide. These completions are + * returned via a new \c CXCodeCompleteResults structure. + * + * Code completion itself is meant to be triggered by the client when the + * user types punctuation characters or whitespace, at which point the + * code-completion location will coincide with the cursor. For example, if \c p + * is a pointer, code-completion might be triggered after the "-" and then + * after the ">" in \c p->. When the code-completion location is after the ">", + * the completion results will provide, e.g., the members of the struct that + * "p" points to. The client is responsible for placing the cursor at the + * beginning of the token currently being typed, then filtering the results + * based on the contents of the token. For example, when code-completing for + * the expression \c p->get, the client should provide the location just after + * the ">" (e.g., pointing at the "g") to this code-completion hook. Then, the + * client can filter the results based on the current token text ("get"), only + * showing those results that start with "get". The intent of this interface + * is to separate the relatively high-latency acquisition of code-completion + * results from the filtering of results on a per-character basis, which must + * have a lower latency. + * + * \param TU The translation unit in which code-completion should + * occur. The source files for this translation unit need not be + * completely up-to-date (and the contents of those source files may + * be overridden via \p unsaved_files). Cursors referring into the + * translation unit may be invalidated by this invocation. + * + * \param complete_filename The name of the source file where code + * completion should be performed. This filename may be any file + * included in the translation unit. + * + * \param complete_line The line at which code-completion should occur. + * + * \param complete_column The column at which code-completion should occur. + * Note that the column should point just after the syntactic construct that + * initiated code completion, and not in the middle of a lexical token. + * + * \param unsaved_files the Files that have not yet been saved to disk + * but may be required for parsing or code completion, including the + * contents of those files. The contents and name of these files (as + * specified by CXUnsavedFile) are copied when necessary, so the + * client only needs to guarantee their validity until the call to + * this function returns. + * + * \param num_unsaved_files The number of unsaved file entries in \p + * unsaved_files. + * + * \param options Extra options that control the behavior of code + * completion, expressed as a bitwise OR of the enumerators of the + * CXCodeComplete_Flags enumeration. The + * \c clang_defaultCodeCompleteOptions() function returns a default set + * of code-completion options. + * + * \returns If successful, a new \c CXCodeCompleteResults structure + * containing code-completion results, which should eventually be + * freed with \c clang_disposeCodeCompleteResults(). If code + * completion fails, returns NULL. + */ +CINDEX_LINKAGE +CXCodeCompleteResults * +clang_codeCompleteAt(CXTranslationUnit TU, const char *complete_filename, + unsigned complete_line, unsigned complete_column, + struct CXUnsavedFile *unsaved_files, + unsigned num_unsaved_files, unsigned options); + +/** + * Sort the code-completion results in case-insensitive alphabetical + * order. + * + * \param Results The set of results to sort. + * \param NumResults The number of results in \p Results. + */ +CINDEX_LINKAGE +void clang_sortCodeCompletionResults(CXCompletionResult *Results, + unsigned NumResults); + +/** + * Free the given set of code-completion results. + */ +CINDEX_LINKAGE +void clang_disposeCodeCompleteResults(CXCodeCompleteResults *Results); + +/** + * Determine the number of diagnostics produced prior to the + * location where code completion was performed. + */ +CINDEX_LINKAGE +unsigned clang_codeCompleteGetNumDiagnostics(CXCodeCompleteResults *Results); + +/** + * Retrieve a diagnostic associated with the given code completion. + * + * \param Results the code completion results to query. + * \param Index the zero-based diagnostic number to retrieve. + * + * \returns the requested diagnostic. This diagnostic must be freed + * via a call to \c clang_disposeDiagnostic(). + */ +CINDEX_LINKAGE +CXDiagnostic clang_codeCompleteGetDiagnostic(CXCodeCompleteResults *Results, + unsigned Index); + +/** + * Determines what completions are appropriate for the context + * the given code completion. + * + * \param Results the code completion results to query + * + * \returns the kinds of completions that are appropriate for use + * along with the given code completion results. + */ +CINDEX_LINKAGE +unsigned long long +clang_codeCompleteGetContexts(CXCodeCompleteResults *Results); + +/** + * Returns the cursor kind for the container for the current code + * completion context. The container is only guaranteed to be set for + * contexts where a container exists (i.e. member accesses or Objective-C + * message sends); if there is not a container, this function will return + * CXCursor_InvalidCode. + * + * \param Results the code completion results to query + * + * \param IsIncomplete on return, this value will be false if Clang has complete + * information about the container. If Clang does not have complete + * information, this value will be true. + * + * \returns the container kind, or CXCursor_InvalidCode if there is not a + * container + */ +CINDEX_LINKAGE +enum CXCursorKind +clang_codeCompleteGetContainerKind(CXCodeCompleteResults *Results, + unsigned *IsIncomplete); + +/** + * Returns the USR for the container for the current code completion + * context. If there is not a container for the current context, this + * function will return the empty string. + * + * \param Results the code completion results to query + * + * \returns the USR for the container + */ +CINDEX_LINKAGE +CXString clang_codeCompleteGetContainerUSR(CXCodeCompleteResults *Results); + +/** + * Returns the currently-entered selector for an Objective-C message + * send, formatted like "initWithFoo:bar:". Only guaranteed to return a + * non-empty string for CXCompletionContext_ObjCInstanceMessage and + * CXCompletionContext_ObjCClassMessage. + * + * \param Results the code completion results to query + * + * \returns the selector (or partial selector) that has been entered thus far + * for an Objective-C message send. + */ +CINDEX_LINKAGE +CXString clang_codeCompleteGetObjCSelector(CXCodeCompleteResults *Results); + +/** + * @} + */ + +/** + * \defgroup CINDEX_MISC Miscellaneous utility functions + * + * @{ + */ + +/** + * Return a version string, suitable for showing to a user, but not + * intended to be parsed (the format is not guaranteed to be stable). + */ +CINDEX_LINKAGE CXString clang_getClangVersion(void); + +/** + * Enable/disable crash recovery. + * + * \param isEnabled Flag to indicate if crash recovery is enabled. A non-zero + * value enables crash recovery, while 0 disables it. + */ +CINDEX_LINKAGE void clang_toggleCrashRecovery(unsigned isEnabled); + +/** + * Visitor invoked for each file in a translation unit + * (used with clang_getInclusions()). + * + * This visitor function will be invoked by clang_getInclusions() for each + * file included (either at the top-level or by \#include directives) within + * a translation unit. The first argument is the file being included, and + * the second and third arguments provide the inclusion stack. The + * array is sorted in order of immediate inclusion. For example, + * the first element refers to the location that included 'included_file'. + */ +typedef void (*CXInclusionVisitor)(CXFile included_file, + CXSourceLocation *inclusion_stack, + unsigned include_len, + CXClientData client_data); + +/** + * Visit the set of preprocessor inclusions in a translation unit. + * The visitor function is called with the provided data for every included + * file. This does not include headers included by the PCH file (unless one + * is inspecting the inclusions in the PCH file itself). + */ +CINDEX_LINKAGE void clang_getInclusions(CXTranslationUnit tu, + CXInclusionVisitor visitor, + CXClientData client_data); + +typedef enum { + CXEval_Int = 1, + CXEval_Float = 2, + CXEval_ObjCStrLiteral = 3, + CXEval_StrLiteral = 4, + CXEval_CFStr = 5, + CXEval_Other = 6, + + CXEval_UnExposed = 0 + +} CXEvalResultKind; + +/** + * Evaluation result of a cursor + */ +typedef void *CXEvalResult; + +/** + * If cursor is a statement declaration tries to evaluate the + * statement and if its variable, tries to evaluate its initializer, + * into its corresponding type. + * If it's an expression, tries to evaluate the expression. + */ +CINDEX_LINKAGE CXEvalResult clang_Cursor_Evaluate(CXCursor C); + +/** + * Returns the kind of the evaluated result. + */ +CINDEX_LINKAGE CXEvalResultKind clang_EvalResult_getKind(CXEvalResult E); + +/** + * Returns the evaluation result as integer if the + * kind is Int. + */ +CINDEX_LINKAGE int clang_EvalResult_getAsInt(CXEvalResult E); + +/** + * Returns the evaluation result as a long long integer if the + * kind is Int. This prevents overflows that may happen if the result is + * returned with clang_EvalResult_getAsInt. + */ +CINDEX_LINKAGE long long clang_EvalResult_getAsLongLong(CXEvalResult E); + +/** + * Returns a non-zero value if the kind is Int and the evaluation + * result resulted in an unsigned integer. + */ +CINDEX_LINKAGE unsigned clang_EvalResult_isUnsignedInt(CXEvalResult E); + +/** + * Returns the evaluation result as an unsigned integer if + * the kind is Int and clang_EvalResult_isUnsignedInt is non-zero. + */ +CINDEX_LINKAGE unsigned long long +clang_EvalResult_getAsUnsigned(CXEvalResult E); + +/** + * Returns the evaluation result as double if the + * kind is double. + */ +CINDEX_LINKAGE double clang_EvalResult_getAsDouble(CXEvalResult E); + +/** + * Returns the evaluation result as a constant string if the + * kind is other than Int or float. User must not free this pointer, + * instead call clang_EvalResult_dispose on the CXEvalResult returned + * by clang_Cursor_Evaluate. + */ +CINDEX_LINKAGE const char *clang_EvalResult_getAsStr(CXEvalResult E); + +/** + * Disposes the created Eval memory. + */ +CINDEX_LINKAGE void clang_EvalResult_dispose(CXEvalResult E); +/** + * @} + */ + +/** \defgroup CINDEX_REMAPPING Remapping functions + * + * @{ + */ + +/** + * A remapping of original source files and their translated files. + */ +typedef void *CXRemapping; + +/** + * Retrieve a remapping. + * + * \param path the path that contains metadata about remappings. + * + * \returns the requested remapping. This remapping must be freed + * via a call to \c clang_remap_dispose(). Can return NULL if an error occurred. + */ +CINDEX_LINKAGE CXRemapping clang_getRemappings(const char *path); + +/** + * Retrieve a remapping. + * + * \param filePaths pointer to an array of file paths containing remapping info. + * + * \param numFiles number of file paths. + * + * \returns the requested remapping. This remapping must be freed + * via a call to \c clang_remap_dispose(). Can return NULL if an error occurred. + */ +CINDEX_LINKAGE +CXRemapping clang_getRemappingsFromFileList(const char **filePaths, + unsigned numFiles); + +/** + * Determine the number of remappings. + */ +CINDEX_LINKAGE unsigned clang_remap_getNumFiles(CXRemapping); + +/** + * Get the original and the associated filename from the remapping. + * + * \param original If non-NULL, will be set to the original filename. + * + * \param transformed If non-NULL, will be set to the filename that the original + * is associated with. + */ +CINDEX_LINKAGE void clang_remap_getFilenames(CXRemapping, unsigned index, + CXString *original, + CXString *transformed); + +/** + * Dispose the remapping. + */ +CINDEX_LINKAGE void clang_remap_dispose(CXRemapping); + +/** + * @} + */ + +/** \defgroup CINDEX_HIGH Higher level API functions + * + * @{ + */ + +enum CXVisitorResult { CXVisit_Break, CXVisit_Continue }; + +typedef struct CXCursorAndRangeVisitor { + void *context; + enum CXVisitorResult (*visit)(void *context, CXCursor, CXSourceRange); +} CXCursorAndRangeVisitor; + +typedef enum { + /** + * Function returned successfully. + */ + CXResult_Success = 0, + /** + * One of the parameters was invalid for the function. + */ + CXResult_Invalid = 1, + /** + * The function was terminated by a callback (e.g. it returned + * CXVisit_Break) + */ + CXResult_VisitBreak = 2 + +} CXResult; + +/** + * Find references of a declaration in a specific file. + * + * \param cursor pointing to a declaration or a reference of one. + * + * \param file to search for references. + * + * \param visitor callback that will receive pairs of CXCursor/CXSourceRange for + * each reference found. + * The CXSourceRange will point inside the file; if the reference is inside + * a macro (and not a macro argument) the CXSourceRange will be invalid. + * + * \returns one of the CXResult enumerators. + */ +CINDEX_LINKAGE CXResult clang_findReferencesInFile( + CXCursor cursor, CXFile file, CXCursorAndRangeVisitor visitor); + +/** + * Find #import/#include directives in a specific file. + * + * \param TU translation unit containing the file to query. + * + * \param file to search for #import/#include directives. + * + * \param visitor callback that will receive pairs of CXCursor/CXSourceRange for + * each directive found. + * + * \returns one of the CXResult enumerators. + */ +CINDEX_LINKAGE CXResult clang_findIncludesInFile( + CXTranslationUnit TU, CXFile file, CXCursorAndRangeVisitor visitor); + +#if __has_feature(blocks) +typedef enum CXVisitorResult (^CXCursorAndRangeVisitorBlock)(CXCursor, + CXSourceRange); +#else +typedef struct _CXCursorAndRangeVisitorBlock *CXCursorAndRangeVisitorBlock; +#endif + +CINDEX_LINKAGE +CXResult clang_findReferencesInFileWithBlock(CXCursor, CXFile, + CXCursorAndRangeVisitorBlock); + +CINDEX_LINKAGE +CXResult clang_findIncludesInFileWithBlock(CXTranslationUnit, CXFile, + CXCursorAndRangeVisitorBlock); + +/** + * The client's data object that is associated with a CXFile. + */ +typedef void *CXIdxClientFile; + +/** + * The client's data object that is associated with a semantic entity. + */ +typedef void *CXIdxClientEntity; + +/** + * The client's data object that is associated with a semantic container + * of entities. + */ +typedef void *CXIdxClientContainer; + +/** + * The client's data object that is associated with an AST file (PCH + * or module). + */ +typedef void *CXIdxClientASTFile; + +/** + * Source location passed to index callbacks. + */ +typedef struct { + void *ptr_data[2]; + unsigned int_data; +} CXIdxLoc; + +/** + * Data for ppIncludedFile callback. + */ +typedef struct { + /** + * Location of '#' in the \#include/\#import directive. + */ + CXIdxLoc hashLoc; + /** + * Filename as written in the \#include/\#import directive. + */ + const char *filename; + /** + * The actual file that the \#include/\#import directive resolved to. + */ + CXFile file; + int isImport; + int isAngled; + /** + * Non-zero if the directive was automatically turned into a module + * import. + */ + int isModuleImport; +} CXIdxIncludedFileInfo; + +/** + * Data for IndexerCallbacks#importedASTFile. + */ +typedef struct { + /** + * Top level AST file containing the imported PCH, module or submodule. + */ + CXFile file; + /** + * The imported module or NULL if the AST file is a PCH. + */ + CXModule module; + /** + * Location where the file is imported. Applicable only for modules. + */ + CXIdxLoc loc; + /** + * Non-zero if an inclusion directive was automatically turned into + * a module import. Applicable only for modules. + */ + int isImplicit; + +} CXIdxImportedASTFileInfo; + +typedef enum { + CXIdxEntity_Unexposed = 0, + CXIdxEntity_Typedef = 1, + CXIdxEntity_Function = 2, + CXIdxEntity_Variable = 3, + CXIdxEntity_Field = 4, + CXIdxEntity_EnumConstant = 5, + + CXIdxEntity_ObjCClass = 6, + CXIdxEntity_ObjCProtocol = 7, + CXIdxEntity_ObjCCategory = 8, + + CXIdxEntity_ObjCInstanceMethod = 9, + CXIdxEntity_ObjCClassMethod = 10, + CXIdxEntity_ObjCProperty = 11, + CXIdxEntity_ObjCIvar = 12, + + CXIdxEntity_Enum = 13, + CXIdxEntity_Struct = 14, + CXIdxEntity_Union = 15, + + CXIdxEntity_CXXClass = 16, + CXIdxEntity_CXXNamespace = 17, + CXIdxEntity_CXXNamespaceAlias = 18, + CXIdxEntity_CXXStaticVariable = 19, + CXIdxEntity_CXXStaticMethod = 20, + CXIdxEntity_CXXInstanceMethod = 21, + CXIdxEntity_CXXConstructor = 22, + CXIdxEntity_CXXDestructor = 23, + CXIdxEntity_CXXConversionFunction = 24, + CXIdxEntity_CXXTypeAlias = 25, + CXIdxEntity_CXXInterface = 26, + CXIdxEntity_CXXConcept = 27 + +} CXIdxEntityKind; + +typedef enum { + CXIdxEntityLang_None = 0, + CXIdxEntityLang_C = 1, + CXIdxEntityLang_ObjC = 2, + CXIdxEntityLang_CXX = 3, + CXIdxEntityLang_Swift = 4 +} CXIdxEntityLanguage; + +/** + * Extra C++ template information for an entity. This can apply to: + * CXIdxEntity_Function + * CXIdxEntity_CXXClass + * CXIdxEntity_CXXStaticMethod + * CXIdxEntity_CXXInstanceMethod + * CXIdxEntity_CXXConstructor + * CXIdxEntity_CXXConversionFunction + * CXIdxEntity_CXXTypeAlias + */ +typedef enum { + CXIdxEntity_NonTemplate = 0, + CXIdxEntity_Template = 1, + CXIdxEntity_TemplatePartialSpecialization = 2, + CXIdxEntity_TemplateSpecialization = 3 +} CXIdxEntityCXXTemplateKind; + +typedef enum { + CXIdxAttr_Unexposed = 0, + CXIdxAttr_IBAction = 1, + CXIdxAttr_IBOutlet = 2, + CXIdxAttr_IBOutletCollection = 3 +} CXIdxAttrKind; + +typedef struct { + CXIdxAttrKind kind; + CXCursor cursor; + CXIdxLoc loc; +} CXIdxAttrInfo; + +typedef struct { + CXIdxEntityKind kind; + CXIdxEntityCXXTemplateKind templateKind; + CXIdxEntityLanguage lang; + const char *name; + const char *USR; + CXCursor cursor; + const CXIdxAttrInfo *const *attributes; + unsigned numAttributes; +} CXIdxEntityInfo; + +typedef struct { + CXCursor cursor; +} CXIdxContainerInfo; + +typedef struct { + const CXIdxAttrInfo *attrInfo; + const CXIdxEntityInfo *objcClass; + CXCursor classCursor; + CXIdxLoc classLoc; +} CXIdxIBOutletCollectionAttrInfo; + +typedef enum { CXIdxDeclFlag_Skipped = 0x1 } CXIdxDeclInfoFlags; + +typedef struct { + const CXIdxEntityInfo *entityInfo; + CXCursor cursor; + CXIdxLoc loc; + const CXIdxContainerInfo *semanticContainer; + /** + * Generally same as #semanticContainer but can be different in + * cases like out-of-line C++ member functions. + */ + const CXIdxContainerInfo *lexicalContainer; + int isRedeclaration; + int isDefinition; + int isContainer; + const CXIdxContainerInfo *declAsContainer; + /** + * Whether the declaration exists in code or was created implicitly + * by the compiler, e.g. implicit Objective-C methods for properties. + */ + int isImplicit; + const CXIdxAttrInfo *const *attributes; + unsigned numAttributes; + + unsigned flags; + +} CXIdxDeclInfo; + +typedef enum { + CXIdxObjCContainer_ForwardRef = 0, + CXIdxObjCContainer_Interface = 1, + CXIdxObjCContainer_Implementation = 2 +} CXIdxObjCContainerKind; + +typedef struct { + const CXIdxDeclInfo *declInfo; + CXIdxObjCContainerKind kind; +} CXIdxObjCContainerDeclInfo; + +typedef struct { + const CXIdxEntityInfo *base; + CXCursor cursor; + CXIdxLoc loc; +} CXIdxBaseClassInfo; + +typedef struct { + const CXIdxEntityInfo *protocol; + CXCursor cursor; + CXIdxLoc loc; +} CXIdxObjCProtocolRefInfo; + +typedef struct { + const CXIdxObjCProtocolRefInfo *const *protocols; + unsigned numProtocols; +} CXIdxObjCProtocolRefListInfo; + +typedef struct { + const CXIdxObjCContainerDeclInfo *containerInfo; + const CXIdxBaseClassInfo *superInfo; + const CXIdxObjCProtocolRefListInfo *protocols; +} CXIdxObjCInterfaceDeclInfo; + +typedef struct { + const CXIdxObjCContainerDeclInfo *containerInfo; + const CXIdxEntityInfo *objcClass; + CXCursor classCursor; + CXIdxLoc classLoc; + const CXIdxObjCProtocolRefListInfo *protocols; +} CXIdxObjCCategoryDeclInfo; + +typedef struct { + const CXIdxDeclInfo *declInfo; + const CXIdxEntityInfo *getter; + const CXIdxEntityInfo *setter; +} CXIdxObjCPropertyDeclInfo; + +typedef struct { + const CXIdxDeclInfo *declInfo; + const CXIdxBaseClassInfo *const *bases; + unsigned numBases; +} CXIdxCXXClassDeclInfo; + +/** + * Data for IndexerCallbacks#indexEntityReference. + * + * This may be deprecated in a future version as this duplicates + * the \c CXSymbolRole_Implicit bit in \c CXSymbolRole. + */ +typedef enum { + /** + * The entity is referenced directly in user's code. + */ + CXIdxEntityRef_Direct = 1, + /** + * An implicit reference, e.g. a reference of an Objective-C method + * via the dot syntax. + */ + CXIdxEntityRef_Implicit = 2 +} CXIdxEntityRefKind; + +/** + * Roles that are attributed to symbol occurrences. + * + * Internal: this currently mirrors low 9 bits of clang::index::SymbolRole with + * higher bits zeroed. These high bits may be exposed in the future. + */ +typedef enum { + CXSymbolRole_None = 0, + CXSymbolRole_Declaration = 1 << 0, + CXSymbolRole_Definition = 1 << 1, + CXSymbolRole_Reference = 1 << 2, + CXSymbolRole_Read = 1 << 3, + CXSymbolRole_Write = 1 << 4, + CXSymbolRole_Call = 1 << 5, + CXSymbolRole_Dynamic = 1 << 6, + CXSymbolRole_AddressOf = 1 << 7, + CXSymbolRole_Implicit = 1 << 8 +} CXSymbolRole; + +/** + * Data for IndexerCallbacks#indexEntityReference. + */ +typedef struct { + CXIdxEntityRefKind kind; + /** + * Reference cursor. + */ + CXCursor cursor; + CXIdxLoc loc; + /** + * The entity that gets referenced. + */ + const CXIdxEntityInfo *referencedEntity; + /** + * Immediate "parent" of the reference. For example: + * + * \code + * Foo *var; + * \endcode + * + * The parent of reference of type 'Foo' is the variable 'var'. + * For references inside statement bodies of functions/methods, + * the parentEntity will be the function/method. + */ + const CXIdxEntityInfo *parentEntity; + /** + * Lexical container context of the reference. + */ + const CXIdxContainerInfo *container; + /** + * Sets of symbol roles of the reference. + */ + CXSymbolRole role; +} CXIdxEntityRefInfo; + +/** + * A group of callbacks used by #clang_indexSourceFile and + * #clang_indexTranslationUnit. + */ +typedef struct { + /** + * Called periodically to check whether indexing should be aborted. + * Should return 0 to continue, and non-zero to abort. + */ + int (*abortQuery)(CXClientData client_data, void *reserved); + + /** + * Called at the end of indexing; passes the complete diagnostic set. + */ + void (*diagnostic)(CXClientData client_data, CXDiagnosticSet, void *reserved); + + CXIdxClientFile (*enteredMainFile)(CXClientData client_data, CXFile mainFile, + void *reserved); + + /** + * Called when a file gets \#included/\#imported. + */ + CXIdxClientFile (*ppIncludedFile)(CXClientData client_data, + const CXIdxIncludedFileInfo *); + + /** + * Called when a AST file (PCH or module) gets imported. + * + * AST files will not get indexed (there will not be callbacks to index all + * the entities in an AST file). The recommended action is that, if the AST + * file is not already indexed, to initiate a new indexing job specific to + * the AST file. + */ + CXIdxClientASTFile (*importedASTFile)(CXClientData client_data, + const CXIdxImportedASTFileInfo *); + + /** + * Called at the beginning of indexing a translation unit. + */ + CXIdxClientContainer (*startedTranslationUnit)(CXClientData client_data, + void *reserved); + + void (*indexDeclaration)(CXClientData client_data, const CXIdxDeclInfo *); + + /** + * Called to index a reference of an entity. + */ + void (*indexEntityReference)(CXClientData client_data, + const CXIdxEntityRefInfo *); + +} IndexerCallbacks; + +CINDEX_LINKAGE int clang_index_isEntityObjCContainerKind(CXIdxEntityKind); +CINDEX_LINKAGE const CXIdxObjCContainerDeclInfo * +clang_index_getObjCContainerDeclInfo(const CXIdxDeclInfo *); + +CINDEX_LINKAGE const CXIdxObjCInterfaceDeclInfo * +clang_index_getObjCInterfaceDeclInfo(const CXIdxDeclInfo *); + +CINDEX_LINKAGE +const CXIdxObjCCategoryDeclInfo * +clang_index_getObjCCategoryDeclInfo(const CXIdxDeclInfo *); + +CINDEX_LINKAGE const CXIdxObjCProtocolRefListInfo * +clang_index_getObjCProtocolRefListInfo(const CXIdxDeclInfo *); + +CINDEX_LINKAGE const CXIdxObjCPropertyDeclInfo * +clang_index_getObjCPropertyDeclInfo(const CXIdxDeclInfo *); + +CINDEX_LINKAGE const CXIdxIBOutletCollectionAttrInfo * +clang_index_getIBOutletCollectionAttrInfo(const CXIdxAttrInfo *); + +CINDEX_LINKAGE const CXIdxCXXClassDeclInfo * +clang_index_getCXXClassDeclInfo(const CXIdxDeclInfo *); + +/** + * For retrieving a custom CXIdxClientContainer attached to a + * container. + */ +CINDEX_LINKAGE CXIdxClientContainer +clang_index_getClientContainer(const CXIdxContainerInfo *); + +/** + * For setting a custom CXIdxClientContainer attached to a + * container. + */ +CINDEX_LINKAGE void clang_index_setClientContainer(const CXIdxContainerInfo *, + CXIdxClientContainer); + +/** + * For retrieving a custom CXIdxClientEntity attached to an entity. + */ +CINDEX_LINKAGE CXIdxClientEntity +clang_index_getClientEntity(const CXIdxEntityInfo *); + +/** + * For setting a custom CXIdxClientEntity attached to an entity. + */ +CINDEX_LINKAGE void clang_index_setClientEntity(const CXIdxEntityInfo *, + CXIdxClientEntity); + +/** + * An indexing action/session, to be applied to one or multiple + * translation units. + */ +typedef void *CXIndexAction; + +/** + * An indexing action/session, to be applied to one or multiple + * translation units. + * + * \param CIdx The index object with which the index action will be associated. + */ +CINDEX_LINKAGE CXIndexAction clang_IndexAction_create(CXIndex CIdx); + +/** + * Destroy the given index action. + * + * The index action must not be destroyed until all of the translation units + * created within that index action have been destroyed. + */ +CINDEX_LINKAGE void clang_IndexAction_dispose(CXIndexAction); + +typedef enum { + /** + * Used to indicate that no special indexing options are needed. + */ + CXIndexOpt_None = 0x0, + + /** + * Used to indicate that IndexerCallbacks#indexEntityReference should + * be invoked for only one reference of an entity per source file that does + * not also include a declaration/definition of the entity. + */ + CXIndexOpt_SuppressRedundantRefs = 0x1, + + /** + * Function-local symbols should be indexed. If this is not set + * function-local symbols will be ignored. + */ + CXIndexOpt_IndexFunctionLocalSymbols = 0x2, + + /** + * Implicit function/class template instantiations should be indexed. + * If this is not set, implicit instantiations will be ignored. + */ + CXIndexOpt_IndexImplicitTemplateInstantiations = 0x4, + + /** + * Suppress all compiler warnings when parsing for indexing. + */ + CXIndexOpt_SuppressWarnings = 0x8, + + /** + * Skip a function/method body that was already parsed during an + * indexing session associated with a \c CXIndexAction object. + * Bodies in system headers are always skipped. + */ + CXIndexOpt_SkipParsedBodiesInSession = 0x10 + +} CXIndexOptFlags; + +/** + * Index the given source file and the translation unit corresponding + * to that file via callbacks implemented through #IndexerCallbacks. + * + * \param client_data pointer data supplied by the client, which will + * be passed to the invoked callbacks. + * + * \param index_callbacks Pointer to indexing callbacks that the client + * implements. + * + * \param index_callbacks_size Size of #IndexerCallbacks structure that gets + * passed in index_callbacks. + * + * \param index_options A bitmask of options that affects how indexing is + * performed. This should be a bitwise OR of the CXIndexOpt_XXX flags. + * + * \param[out] out_TU pointer to store a \c CXTranslationUnit that can be + * reused after indexing is finished. Set to \c NULL if you do not require it. + * + * \returns 0 on success or if there were errors from which the compiler could + * recover. If there is a failure from which there is no recovery, returns + * a non-zero \c CXErrorCode. + * + * The rest of the parameters are the same as #clang_parseTranslationUnit. + */ +CINDEX_LINKAGE int clang_indexSourceFile( + CXIndexAction, CXClientData client_data, IndexerCallbacks *index_callbacks, + unsigned index_callbacks_size, unsigned index_options, + const char *source_filename, const char *const *command_line_args, + int num_command_line_args, struct CXUnsavedFile *unsaved_files, + unsigned num_unsaved_files, CXTranslationUnit *out_TU, unsigned TU_options); + +/** + * Same as clang_indexSourceFile but requires a full command line + * for \c command_line_args including argv[0]. This is useful if the standard + * library paths are relative to the binary. + */ +CINDEX_LINKAGE int clang_indexSourceFileFullArgv( + CXIndexAction, CXClientData client_data, IndexerCallbacks *index_callbacks, + unsigned index_callbacks_size, unsigned index_options, + const char *source_filename, const char *const *command_line_args, + int num_command_line_args, struct CXUnsavedFile *unsaved_files, + unsigned num_unsaved_files, CXTranslationUnit *out_TU, unsigned TU_options); + +/** + * Index the given translation unit via callbacks implemented through + * #IndexerCallbacks. + * + * The order of callback invocations is not guaranteed to be the same as + * when indexing a source file. The high level order will be: + * + * -Preprocessor callbacks invocations + * -Declaration/reference callbacks invocations + * -Diagnostic callback invocations + * + * The parameters are the same as #clang_indexSourceFile. + * + * \returns If there is a failure from which there is no recovery, returns + * non-zero, otherwise returns 0. + */ +CINDEX_LINKAGE int clang_indexTranslationUnit( + CXIndexAction, CXClientData client_data, IndexerCallbacks *index_callbacks, + unsigned index_callbacks_size, unsigned index_options, CXTranslationUnit); + +/** + * Retrieve the CXIdxFile, file, line, column, and offset represented by + * the given CXIdxLoc. + * + * If the location refers into a macro expansion, retrieves the + * location of the macro expansion and if it refers into a macro argument + * retrieves the location of the argument. + */ +CINDEX_LINKAGE void clang_indexLoc_getFileLocation(CXIdxLoc loc, + CXIdxClientFile *indexFile, + CXFile *file, unsigned *line, + unsigned *column, + unsigned *offset); + +/** + * Retrieve the CXSourceLocation represented by the given CXIdxLoc. + */ +CINDEX_LINKAGE +CXSourceLocation clang_indexLoc_getCXSourceLocation(CXIdxLoc loc); + +/** + * Visitor invoked for each field found by a traversal. + * + * This visitor function will be invoked for each field found by + * \c clang_Type_visitFields. Its first argument is the cursor being + * visited, its second argument is the client data provided to + * \c clang_Type_visitFields. + * + * The visitor should return one of the \c CXVisitorResult values + * to direct \c clang_Type_visitFields. + */ +typedef enum CXVisitorResult (*CXFieldVisitor)(CXCursor C, + CXClientData client_data); + +/** + * Visit the fields of a particular type. + * + * This function visits all the direct fields of the given cursor, + * invoking the given \p visitor function with the cursors of each + * visited field. The traversal may be ended prematurely, if + * the visitor returns \c CXFieldVisit_Break. + * + * \param T the record type whose field may be visited. + * + * \param visitor the visitor function that will be invoked for each + * field of \p T. + * + * \param client_data pointer data supplied by the client, which will + * be passed to the visitor each time it is invoked. + * + * \returns a non-zero value if the traversal was terminated + * prematurely by the visitor returning \c CXFieldVisit_Break. + */ +CINDEX_LINKAGE unsigned clang_Type_visitFields(CXType T, CXFieldVisitor visitor, + CXClientData client_data); + +/** + * Describes the kind of binary operators. + */ +enum CXBinaryOperatorKind { + /** This value describes cursors which are not binary operators. */ + CXBinaryOperator_Invalid, + /** C++ Pointer - to - member operator. */ + CXBinaryOperator_PtrMemD, + /** C++ Pointer - to - member operator. */ + CXBinaryOperator_PtrMemI, + /** Multiplication operator. */ + CXBinaryOperator_Mul, + /** Division operator. */ + CXBinaryOperator_Div, + /** Remainder operator. */ + CXBinaryOperator_Rem, + /** Addition operator. */ + CXBinaryOperator_Add, + /** Subtraction operator. */ + CXBinaryOperator_Sub, + /** Bitwise shift left operator. */ + CXBinaryOperator_Shl, + /** Bitwise shift right operator. */ + CXBinaryOperator_Shr, + /** C++ three-way comparison (spaceship) operator. */ + CXBinaryOperator_Cmp, + /** Less than operator. */ + CXBinaryOperator_LT, + /** Greater than operator. */ + CXBinaryOperator_GT, + /** Less or equal operator. */ + CXBinaryOperator_LE, + /** Greater or equal operator. */ + CXBinaryOperator_GE, + /** Equal operator. */ + CXBinaryOperator_EQ, + /** Not equal operator. */ + CXBinaryOperator_NE, + /** Bitwise AND operator. */ + CXBinaryOperator_And, + /** Bitwise XOR operator. */ + CXBinaryOperator_Xor, + /** Bitwise OR operator. */ + CXBinaryOperator_Or, + /** Logical AND operator. */ + CXBinaryOperator_LAnd, + /** Logical OR operator. */ + CXBinaryOperator_LOr, + /** Assignment operator. */ + CXBinaryOperator_Assign, + /** Multiplication assignment operator. */ + CXBinaryOperator_MulAssign, + /** Division assignment operator. */ + CXBinaryOperator_DivAssign, + /** Remainder assignment operator. */ + CXBinaryOperator_RemAssign, + /** Addition assignment operator. */ + CXBinaryOperator_AddAssign, + /** Subtraction assignment operator. */ + CXBinaryOperator_SubAssign, + /** Bitwise shift left assignment operator. */ + CXBinaryOperator_ShlAssign, + /** Bitwise shift right assignment operator. */ + CXBinaryOperator_ShrAssign, + /** Bitwise AND assignment operator. */ + CXBinaryOperator_AndAssign, + /** Bitwise XOR assignment operator. */ + CXBinaryOperator_XorAssign, + /** Bitwise OR assignment operator. */ + CXBinaryOperator_OrAssign, + /** Comma operator. */ + CXBinaryOperator_Comma +}; + +/** + * Retrieve the spelling of a given CXBinaryOperatorKind. + */ +CINDEX_LINKAGE CXString +clang_getBinaryOperatorKindSpelling(enum CXBinaryOperatorKind kind); + +/** + * Retrieve the binary operator kind of this cursor. + * + * If this cursor is not a binary operator then returns Invalid. + */ +CINDEX_LINKAGE enum CXBinaryOperatorKind +clang_getCursorBinaryOperatorKind(CXCursor cursor); + +/** + * Describes the kind of unary operators. + */ +enum CXUnaryOperatorKind { + /** This value describes cursors which are not unary operators. */ + CXUnaryOperator_Invalid, + /** Postfix increment operator. */ + CXUnaryOperator_PostInc, + /** Postfix decrement operator. */ + CXUnaryOperator_PostDec, + /** Prefix increment operator. */ + CXUnaryOperator_PreInc, + /** Prefix decrement operator. */ + CXUnaryOperator_PreDec, + /** Address of operator. */ + CXUnaryOperator_AddrOf, + /** Dereference operator. */ + CXUnaryOperator_Deref, + /** Plus operator. */ + CXUnaryOperator_Plus, + /** Minus operator. */ + CXUnaryOperator_Minus, + /** Not operator. */ + CXUnaryOperator_Not, + /** LNot operator. */ + CXUnaryOperator_LNot, + /** "__real expr" operator. */ + CXUnaryOperator_Real, + /** "__imag expr" operator. */ + CXUnaryOperator_Imag, + /** __extension__ marker operator. */ + CXUnaryOperator_Extension, + /** C++ co_await operator. */ + CXUnaryOperator_Coawait +}; + +/** + * Retrieve the spelling of a given CXUnaryOperatorKind. + */ +CINDEX_LINKAGE CXString +clang_getUnaryOperatorKindSpelling(enum CXUnaryOperatorKind kind); + +/** + * Retrieve the unary operator kind of this cursor. + * + * If this cursor is not a unary operator then returns Invalid. + */ +CINDEX_LINKAGE enum CXUnaryOperatorKind +clang_getCursorUnaryOperatorKind(CXCursor cursor); + +/** + * @} + */ + +/** + * @} + */ + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/clang-c/Platform.h b/llvm/include/clang-c/Platform.h new file mode 100644 index 0000000000000000000000000000000000000000..67c1fff8ff7831e1a27c2e550c3b601c193040fd --- /dev/null +++ b/llvm/include/clang-c/Platform.h @@ -0,0 +1,53 @@ +/*===-- clang-c/Platform.h - C Index platform decls -------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides platform specific macros (dllimport, deprecated, ...) *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_PLATFORM_H +#define LLVM_CLANG_C_PLATFORM_H + +#include "clang-c/ExternC.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +/* Windows DLL import/export. */ +#ifndef CINDEX_NO_EXPORTS + #define CINDEX_EXPORTS +#endif +#ifdef _WIN32 + #ifdef CINDEX_EXPORTS + #ifdef _CINDEX_LIB_ + #define CINDEX_LINKAGE __declspec(dllexport) + #else + #define CINDEX_LINKAGE __declspec(dllimport) + #endif + #endif +#elif defined(CINDEX_EXPORTS) && defined(__GNUC__) + #define CINDEX_LINKAGE __attribute__((visibility("default"))) +#endif + +#ifndef CINDEX_LINKAGE + #define CINDEX_LINKAGE +#endif + +#ifdef __GNUC__ + #define CINDEX_DEPRECATED __attribute__((deprecated)) +#else + #ifdef _MSC_VER + #define CINDEX_DEPRECATED __declspec(deprecated) + #else + #define CINDEX_DEPRECATED + #endif +#endif + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/clang-c/Rewrite.h b/llvm/include/clang-c/Rewrite.h new file mode 100644 index 0000000000000000000000000000000000000000..ce1b05594b3843dc7cfdd9b1226115d49ddaa441 --- /dev/null +++ b/llvm/include/clang-c/Rewrite.h @@ -0,0 +1,63 @@ +/*===-- clang-c/Rewrite.h - C CXRewriter --------------------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_CLANG_C_REWRITE_H +#define LLVM_CLANG_C_REWRITE_H + +#include "clang-c/CXString.h" +#include "clang-c/ExternC.h" +#include "clang-c/Index.h" +#include "clang-c/Platform.h" + +LLVM_CLANG_C_EXTERN_C_BEGIN + +typedef void *CXRewriter; + +/** + * Create CXRewriter. + */ +CINDEX_LINKAGE CXRewriter clang_CXRewriter_create(CXTranslationUnit TU); + +/** + * Insert the specified string at the specified location in the original buffer. + */ +CINDEX_LINKAGE void clang_CXRewriter_insertTextBefore(CXRewriter Rew, CXSourceLocation Loc, + const char *Insert); + +/** + * Replace the specified range of characters in the input with the specified + * replacement. + */ +CINDEX_LINKAGE void clang_CXRewriter_replaceText(CXRewriter Rew, CXSourceRange ToBeReplaced, + const char *Replacement); + +/** + * Remove the specified range. + */ +CINDEX_LINKAGE void clang_CXRewriter_removeText(CXRewriter Rew, CXSourceRange ToBeRemoved); + +/** + * Save all changed files to disk. + * Returns 1 if any files were not saved successfully, returns 0 otherwise. + */ +CINDEX_LINKAGE int clang_CXRewriter_overwriteChangedFiles(CXRewriter Rew); + +/** + * Write out rewritten version of the main file to stdout. + */ +CINDEX_LINKAGE void clang_CXRewriter_writeMainFileToStdOut(CXRewriter Rew); + +/** + * Free the given CXRewriter. + */ +CINDEX_LINKAGE void clang_CXRewriter_dispose(CXRewriter Rew); + +LLVM_CLANG_C_EXTERN_C_END + +#endif diff --git a/llvm/include/llvm-c/Remarks.h b/llvm/include/llvm-c/Remarks.h new file mode 100644 index 0000000000000000000000000000000000000000..ffe647a6554aabb2132cf272b7bd8930c8ec2344 --- /dev/null +++ b/llvm/include/llvm-c/Remarks.h @@ -0,0 +1,344 @@ +/*===-- llvm-c/Remarks.h - Remarks Public C Interface -------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides a public interface to a remark diagnostics library. *| +|* LLVM provides an implementation of this interface. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_C_REMARKS_H +#define LLVM_C_REMARKS_H + +#include "llvm-c/ExternC.h" +#include "llvm-c/Types.h" +#ifdef __cplusplus +#include +#else +#include +#endif /* !defined(__cplusplus) */ + +LLVM_C_EXTERN_C_BEGIN + +/** + * @defgroup LLVMCREMARKS Remarks + * @ingroup LLVMC + * + * @{ + */ + +// 0 -> 1: Bitstream remarks support. +#define REMARKS_API_VERSION 1 + +/** + * The type of the emitted remark. + */ +enum LLVMRemarkType { + LLVMRemarkTypeUnknown, + LLVMRemarkTypePassed, + LLVMRemarkTypeMissed, + LLVMRemarkTypeAnalysis, + LLVMRemarkTypeAnalysisFPCommute, + LLVMRemarkTypeAnalysisAliasing, + LLVMRemarkTypeFailure +}; + +/** + * String containing a buffer and a length. The buffer is not guaranteed to be + * zero-terminated. + * + * \since REMARKS_API_VERSION=0 + */ +typedef struct LLVMRemarkOpaqueString *LLVMRemarkStringRef; + +/** + * Returns the buffer holding the string. + * + * \since REMARKS_API_VERSION=0 + */ +extern const char *LLVMRemarkStringGetData(LLVMRemarkStringRef String); + +/** + * Returns the size of the string. + * + * \since REMARKS_API_VERSION=0 + */ +extern uint32_t LLVMRemarkStringGetLen(LLVMRemarkStringRef String); + +/** + * DebugLoc containing File, Line and Column. + * + * \since REMARKS_API_VERSION=0 + */ +typedef struct LLVMRemarkOpaqueDebugLoc *LLVMRemarkDebugLocRef; + +/** + * Return the path to the source file for a debug location. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkStringRef +LLVMRemarkDebugLocGetSourceFilePath(LLVMRemarkDebugLocRef DL); + +/** + * Return the line in the source file for a debug location. + * + * \since REMARKS_API_VERSION=0 + */ +extern uint32_t LLVMRemarkDebugLocGetSourceLine(LLVMRemarkDebugLocRef DL); + +/** + * Return the column in the source file for a debug location. + * + * \since REMARKS_API_VERSION=0 + */ +extern uint32_t LLVMRemarkDebugLocGetSourceColumn(LLVMRemarkDebugLocRef DL); + +/** + * Element of the "Args" list. The key might give more information about what + * the semantics of the value are, e.g. "Callee" will tell you that the value + * is a symbol that names a function. + * + * \since REMARKS_API_VERSION=0 + */ +typedef struct LLVMRemarkOpaqueArg *LLVMRemarkArgRef; + +/** + * Returns the key of an argument. The key defines what the value is, and the + * same key can appear multiple times in the list of arguments. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkStringRef LLVMRemarkArgGetKey(LLVMRemarkArgRef Arg); + +/** + * Returns the value of an argument. This is a string that can contain newlines. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkStringRef LLVMRemarkArgGetValue(LLVMRemarkArgRef Arg); + +/** + * Returns the debug location that is attached to the value of this argument. + * + * If there is no debug location, the return value will be `NULL`. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkDebugLocRef LLVMRemarkArgGetDebugLoc(LLVMRemarkArgRef Arg); + +/** + * A remark emitted by the compiler. + * + * \since REMARKS_API_VERSION=0 + */ +typedef struct LLVMRemarkOpaqueEntry *LLVMRemarkEntryRef; + +/** + * Free the resources used by the remark entry. + * + * \since REMARKS_API_VERSION=0 + */ +extern void LLVMRemarkEntryDispose(LLVMRemarkEntryRef Remark); + +/** + * The type of the remark. For example, it can allow users to only keep the + * missed optimizations from the compiler. + * + * \since REMARKS_API_VERSION=0 + */ +extern enum LLVMRemarkType LLVMRemarkEntryGetType(LLVMRemarkEntryRef Remark); + +/** + * Get the name of the pass that emitted this remark. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkStringRef +LLVMRemarkEntryGetPassName(LLVMRemarkEntryRef Remark); + +/** + * Get an identifier of the remark. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkStringRef +LLVMRemarkEntryGetRemarkName(LLVMRemarkEntryRef Remark); + +/** + * Get the name of the function being processed when the remark was emitted. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkStringRef +LLVMRemarkEntryGetFunctionName(LLVMRemarkEntryRef Remark); + +/** + * Returns the debug location that is attached to this remark. + * + * If there is no debug location, the return value will be `NULL`. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkDebugLocRef +LLVMRemarkEntryGetDebugLoc(LLVMRemarkEntryRef Remark); + +/** + * Return the hotness of the remark. + * + * A hotness of `0` means this value is not set. + * + * \since REMARKS_API_VERSION=0 + */ +extern uint64_t LLVMRemarkEntryGetHotness(LLVMRemarkEntryRef Remark); + +/** + * The number of arguments the remark holds. + * + * \since REMARKS_API_VERSION=0 + */ +extern uint32_t LLVMRemarkEntryGetNumArgs(LLVMRemarkEntryRef Remark); + +/** + * Get a new iterator to iterate over a remark's argument. + * + * If there are no arguments in \p Remark, the return value will be `NULL`. + * + * The lifetime of the returned value is bound to the lifetime of \p Remark. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkArgRef LLVMRemarkEntryGetFirstArg(LLVMRemarkEntryRef Remark); + +/** + * Get the next argument in \p Remark from the position of \p It. + * + * Returns `NULL` if there are no more arguments available. + * + * The lifetime of the returned value is bound to the lifetime of \p Remark. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkArgRef LLVMRemarkEntryGetNextArg(LLVMRemarkArgRef It, + LLVMRemarkEntryRef Remark); + +typedef struct LLVMRemarkOpaqueParser *LLVMRemarkParserRef; + +/** + * Creates a remark parser that can be used to parse the buffer located in \p + * Buf of size \p Size bytes. + * + * \p Buf cannot be `NULL`. + * + * This function should be paired with LLVMRemarkParserDispose() to avoid + * leaking resources. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkParserRef LLVMRemarkParserCreateYAML(const void *Buf, + uint64_t Size); + +/** + * Creates a remark parser that can be used to parse the buffer located in \p + * Buf of size \p Size bytes. + * + * \p Buf cannot be `NULL`. + * + * This function should be paired with LLVMRemarkParserDispose() to avoid + * leaking resources. + * + * \since REMARKS_API_VERSION=1 + */ +extern LLVMRemarkParserRef LLVMRemarkParserCreateBitstream(const void *Buf, + uint64_t Size); + +/** + * Returns the next remark in the file. + * + * The value pointed to by the return value needs to be disposed using a call to + * LLVMRemarkEntryDispose(). + * + * All the entries in the returned value that are of LLVMRemarkStringRef type + * will become invalidated once a call to LLVMRemarkParserDispose is made. + * + * If the parser reaches the end of the buffer, the return value will be `NULL`. + * + * In the case of an error, the return value will be `NULL`, and: + * + * 1) LLVMRemarkParserHasError() will return `1`. + * + * 2) LLVMRemarkParserGetErrorMessage() will return a descriptive error + * message. + * + * An error may occur if: + * + * 1) An argument is invalid. + * + * 2) There is a parsing error. This can occur on things like malformed YAML. + * + * 3) There is a Remark semantic error. This can occur on well-formed files with + * missing or extra fields. + * + * Here is a quick example of the usage: + * + * ``` + * LLVMRemarkParserRef Parser = LLVMRemarkParserCreateYAML(Buf, Size); + * LLVMRemarkEntryRef Remark = NULL; + * while ((Remark = LLVMRemarkParserGetNext(Parser))) { + * // use Remark + * LLVMRemarkEntryDispose(Remark); // Release memory. + * } + * bool HasError = LLVMRemarkParserHasError(Parser); + * LLVMRemarkParserDispose(Parser); + * ``` + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMRemarkEntryRef LLVMRemarkParserGetNext(LLVMRemarkParserRef Parser); + +/** + * Returns `1` if the parser encountered an error while parsing the buffer. + * + * \since REMARKS_API_VERSION=0 + */ +extern LLVMBool LLVMRemarkParserHasError(LLVMRemarkParserRef Parser); + +/** + * Returns a null-terminated string containing an error message. + * + * In case of no error, the result is `NULL`. + * + * The memory of the string is bound to the lifetime of \p Parser. If + * LLVMRemarkParserDispose() is called, the memory of the string will be + * released. + * + * \since REMARKS_API_VERSION=0 + */ +extern const char *LLVMRemarkParserGetErrorMessage(LLVMRemarkParserRef Parser); + +/** + * Releases all the resources used by \p Parser. + * + * \since REMARKS_API_VERSION=0 + */ +extern void LLVMRemarkParserDispose(LLVMRemarkParserRef Parser); + +/** + * Returns the version of the remarks library. + * + * \since REMARKS_API_VERSION=0 + */ +extern uint32_t LLVMRemarkVersion(void); + +/** + * @} // endgoup LLVMCREMARKS + */ + +LLVM_C_EXTERN_C_END + +#endif /* LLVM_C_REMARKS_H */ diff --git a/llvm/include/llvm-c/lto.h b/llvm/include/llvm-c/lto.h new file mode 100644 index 0000000000000000000000000000000000000000..5ceb02224d2bba5788b35d13abac5b53b1fcb0bc --- /dev/null +++ b/llvm/include/llvm-c/lto.h @@ -0,0 +1,959 @@ +/*===-- llvm-c/lto.h - LTO Public C Interface ---------------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides public interface to an abstract link time optimization*| +|* library. LLVM provides an implementation of this interface for use with *| +|* llvm bitcode files. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_C_LTO_H +#define LLVM_C_LTO_H + +#include "llvm-c/ExternC.h" + +#ifdef __cplusplus +#include +#else +#include +#endif +#include + +#ifndef __cplusplus +#if !defined(_MSC_VER) +#include +typedef bool lto_bool_t; +#else +/* MSVC in particular does not have anything like _Bool or bool in C, but we can + at least make sure the type is the same size. The implementation side will + use C++ bool. */ +typedef unsigned char lto_bool_t; +#endif +#else +typedef bool lto_bool_t; +#endif + +/** + * @defgroup LLVMCLTO LTO + * @ingroup LLVMC + * + * @{ + */ + +#define LTO_API_VERSION 29 + +/** + * \since prior to LTO_API_VERSION=3 + */ +typedef enum { + LTO_SYMBOL_ALIGNMENT_MASK = 0x0000001F, /* log2 of alignment */ + LTO_SYMBOL_PERMISSIONS_MASK = 0x000000E0, + LTO_SYMBOL_PERMISSIONS_CODE = 0x000000A0, + LTO_SYMBOL_PERMISSIONS_DATA = 0x000000C0, + LTO_SYMBOL_PERMISSIONS_RODATA = 0x00000080, + LTO_SYMBOL_DEFINITION_MASK = 0x00000700, + LTO_SYMBOL_DEFINITION_REGULAR = 0x00000100, + LTO_SYMBOL_DEFINITION_TENTATIVE = 0x00000200, + LTO_SYMBOL_DEFINITION_WEAK = 0x00000300, + LTO_SYMBOL_DEFINITION_UNDEFINED = 0x00000400, + LTO_SYMBOL_DEFINITION_WEAKUNDEF = 0x00000500, + LTO_SYMBOL_SCOPE_MASK = 0x00003800, + LTO_SYMBOL_SCOPE_INTERNAL = 0x00000800, + LTO_SYMBOL_SCOPE_HIDDEN = 0x00001000, + LTO_SYMBOL_SCOPE_PROTECTED = 0x00002000, + LTO_SYMBOL_SCOPE_DEFAULT = 0x00001800, + LTO_SYMBOL_SCOPE_DEFAULT_CAN_BE_HIDDEN = 0x00002800, + LTO_SYMBOL_COMDAT = 0x00004000, + LTO_SYMBOL_ALIAS = 0x00008000 +} lto_symbol_attributes; + +/** + * \since prior to LTO_API_VERSION=3 + */ +typedef enum { + LTO_DEBUG_MODEL_NONE = 0, + LTO_DEBUG_MODEL_DWARF = 1 +} lto_debug_model; + +/** + * \since prior to LTO_API_VERSION=3 + */ +typedef enum { + LTO_CODEGEN_PIC_MODEL_STATIC = 0, + LTO_CODEGEN_PIC_MODEL_DYNAMIC = 1, + LTO_CODEGEN_PIC_MODEL_DYNAMIC_NO_PIC = 2, + LTO_CODEGEN_PIC_MODEL_DEFAULT = 3 +} lto_codegen_model; + +/** opaque reference to a loaded object module */ +typedef struct LLVMOpaqueLTOModule *lto_module_t; + +/** opaque reference to a code generator */ +typedef struct LLVMOpaqueLTOCodeGenerator *lto_code_gen_t; + +/** opaque reference to a thin code generator */ +typedef struct LLVMOpaqueThinLTOCodeGenerator *thinlto_code_gen_t; + +LLVM_C_EXTERN_C_BEGIN + +/** + * Returns a printable string. + * + * \since prior to LTO_API_VERSION=3 + */ +extern const char* +lto_get_version(void); + +/** + * Returns the last error string or NULL if last operation was successful. + * + * \since prior to LTO_API_VERSION=3 + */ +extern const char* +lto_get_error_message(void); + +/** + * Checks if a file is a loadable object file. + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t +lto_module_is_object_file(const char* path); + +/** + * Checks if a file is a loadable object compiled for requested target. + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t +lto_module_is_object_file_for_target(const char* path, + const char* target_triple_prefix); + +/** + * Return true if \p Buffer contains a bitcode file with ObjC code (category + * or class) in it. + * + * \since LTO_API_VERSION=20 + */ +extern lto_bool_t +lto_module_has_objc_category(const void *mem, size_t length); + +/** + * Checks if a buffer is a loadable object file. + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t lto_module_is_object_file_in_memory(const void *mem, + size_t length); + +/** + * Checks if a buffer is a loadable object compiled for requested target. + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t +lto_module_is_object_file_in_memory_for_target(const void* mem, size_t length, + const char* target_triple_prefix); + +/** + * Loads an object file from disk. + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_module_t +lto_module_create(const char* path); + +/** + * Loads an object file from memory. + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_module_t +lto_module_create_from_memory(const void* mem, size_t length); + +/** + * Loads an object file from memory with an extra path argument. + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=9 + */ +extern lto_module_t +lto_module_create_from_memory_with_path(const void* mem, size_t length, + const char *path); + +/** + * Loads an object file in its own context. + * + * Loads an object file in its own LLVMContext. This function call is + * thread-safe. However, modules created this way should not be merged into an + * lto_code_gen_t using \a lto_codegen_add_module(). + * + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=11 + */ +extern lto_module_t +lto_module_create_in_local_context(const void *mem, size_t length, + const char *path); + +/** + * Loads an object file in the codegen context. + * + * Loads an object file into the same context as \c cg. The module is safe to + * add using \a lto_codegen_add_module(). + * + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=11 + */ +extern lto_module_t +lto_module_create_in_codegen_context(const void *mem, size_t length, + const char *path, lto_code_gen_t cg); + +/** + * Loads an object file from disk. The seek point of fd is not preserved. + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=5 + */ +extern lto_module_t +lto_module_create_from_fd(int fd, const char *path, size_t file_size); + +/** + * Loads an object file from disk. The seek point of fd is not preserved. + * Returns NULL on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=5 + */ +extern lto_module_t +lto_module_create_from_fd_at_offset(int fd, const char *path, size_t file_size, + size_t map_size, off_t offset); + +/** + * Frees all memory internally allocated by the module. + * Upon return the lto_module_t is no longer valid. + * + * \since prior to LTO_API_VERSION=3 + */ +extern void +lto_module_dispose(lto_module_t mod); + +/** + * Returns triple string which the object module was compiled under. + * + * \since prior to LTO_API_VERSION=3 + */ +extern const char* +lto_module_get_target_triple(lto_module_t mod); + +/** + * Sets triple string with which the object will be codegened. + * + * \since LTO_API_VERSION=4 + */ +extern void +lto_module_set_target_triple(lto_module_t mod, const char *triple); + +/** + * Returns the number of symbols in the object module. + * + * \since prior to LTO_API_VERSION=3 + */ +extern unsigned int +lto_module_get_num_symbols(lto_module_t mod); + +/** + * Returns the name of the ith symbol in the object module. + * + * \since prior to LTO_API_VERSION=3 + */ +extern const char* +lto_module_get_symbol_name(lto_module_t mod, unsigned int index); + +/** + * Returns the attributes of the ith symbol in the object module. + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_symbol_attributes +lto_module_get_symbol_attribute(lto_module_t mod, unsigned int index); + +/** + * Returns the module's linker options. + * + * The linker options may consist of multiple flags. It is the linker's + * responsibility to split the flags using a platform-specific mechanism. + * + * \since LTO_API_VERSION=16 + */ +extern const char* +lto_module_get_linkeropts(lto_module_t mod); + +/** + * If targeting mach-o on darwin, this function gets the CPU type and subtype + * that will end up being encoded in the mach-o header. These are the values + * that can be found in mach/machine.h. + * + * \p out_cputype and \p out_cpusubtype must be non-NULL. + * + * Returns true on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=27 + */ +extern lto_bool_t lto_module_get_macho_cputype(lto_module_t mod, + unsigned int *out_cputype, + unsigned int *out_cpusubtype); + +/** + * This function can be used by the linker to check if a given module has + * any constructor or destructor functions. + * + * Returns true if the module has either the @llvm.global_ctors or the + * @llvm.global_dtors symbol. Otherwise returns false. + * + * \since LTO_API_VERSION=29 + */ +extern lto_bool_t lto_module_has_ctor_dtor(lto_module_t mod); +/** + * Diagnostic severity. + * + * \since LTO_API_VERSION=7 + */ +typedef enum { + LTO_DS_ERROR = 0, + LTO_DS_WARNING = 1, + LTO_DS_REMARK = 3, // Added in LTO_API_VERSION=10. + LTO_DS_NOTE = 2 +} lto_codegen_diagnostic_severity_t; + +/** + * Diagnostic handler type. + * \p severity defines the severity. + * \p diag is the actual diagnostic. + * The diagnostic is not prefixed by any of severity keyword, e.g., 'error: '. + * \p ctxt is used to pass the context set with the diagnostic handler. + * + * \since LTO_API_VERSION=7 + */ +typedef void (*lto_diagnostic_handler_t)( + lto_codegen_diagnostic_severity_t severity, const char *diag, void *ctxt); + +/** + * Set a diagnostic handler and the related context (void *). + * This is more general than lto_get_error_message, as the diagnostic handler + * can be called at anytime within lto. + * + * \since LTO_API_VERSION=7 + */ +extern void lto_codegen_set_diagnostic_handler(lto_code_gen_t, + lto_diagnostic_handler_t, + void *); + +/** + * Instantiates a code generator. + * Returns NULL on error (check lto_get_error_message() for details). + * + * All modules added using \a lto_codegen_add_module() must have been created + * in the same context as the codegen. + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_code_gen_t +lto_codegen_create(void); + +/** + * Instantiate a code generator in its own context. + * + * Instantiates a code generator in its own context. Modules added via \a + * lto_codegen_add_module() must have all been created in the same context, + * using \a lto_module_create_in_codegen_context(). + * + * \since LTO_API_VERSION=11 + */ +extern lto_code_gen_t +lto_codegen_create_in_local_context(void); + +/** + * Frees all code generator and all memory it internally allocated. + * Upon return the lto_code_gen_t is no longer valid. + * + * \since prior to LTO_API_VERSION=3 + */ +extern void +lto_codegen_dispose(lto_code_gen_t); + +/** + * Add an object module to the set of modules for which code will be generated. + * Returns true on error (check lto_get_error_message() for details). + * + * \c cg and \c mod must both be in the same context. See \a + * lto_codegen_create_in_local_context() and \a + * lto_module_create_in_codegen_context(). + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t +lto_codegen_add_module(lto_code_gen_t cg, lto_module_t mod); + +/** + * Sets the object module for code generation. This will transfer the ownership + * of the module to the code generator. + * + * \c cg and \c mod must both be in the same context. + * + * \since LTO_API_VERSION=13 + */ +extern void +lto_codegen_set_module(lto_code_gen_t cg, lto_module_t mod); + +/** + * Sets if debug info should be generated. + * Returns true on error (check lto_get_error_message() for details). + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t +lto_codegen_set_debug_model(lto_code_gen_t cg, lto_debug_model); + +/** + * Sets which PIC code model to generated. + * Returns true on error (check lto_get_error_message() for details). + * + * \since prior to LTO_API_VERSION=3 + */ +extern lto_bool_t +lto_codegen_set_pic_model(lto_code_gen_t cg, lto_codegen_model); + +/** + * Sets the cpu to generate code for. + * + * \since LTO_API_VERSION=4 + */ +extern void +lto_codegen_set_cpu(lto_code_gen_t cg, const char *cpu); + +/** + * Sets the location of the assembler tool to run. If not set, libLTO + * will use gcc to invoke the assembler. + * + * \since LTO_API_VERSION=3 + */ +extern void +lto_codegen_set_assembler_path(lto_code_gen_t cg, const char* path); + +/** + * Sets extra arguments that libLTO should pass to the assembler. + * + * \since LTO_API_VERSION=4 + */ +extern void +lto_codegen_set_assembler_args(lto_code_gen_t cg, const char **args, + int nargs); + +/** + * Adds to a list of all global symbols that must exist in the final generated + * code. If a function is not listed there, it might be inlined into every usage + * and optimized away. + * + * \since prior to LTO_API_VERSION=3 + */ +extern void +lto_codegen_add_must_preserve_symbol(lto_code_gen_t cg, const char* symbol); + +/** + * Writes a new object file at the specified path that contains the + * merged contents of all modules added so far. + * Returns true on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=5 + */ +extern lto_bool_t +lto_codegen_write_merged_modules(lto_code_gen_t cg, const char* path); + +/** + * Generates code for all added modules into one native object file. + * This calls lto_codegen_optimize then lto_codegen_compile_optimized. + * + * On success returns a pointer to a generated mach-o/ELF buffer and + * length set to the buffer size. The buffer is owned by the + * lto_code_gen_t and will be freed when lto_codegen_dispose() + * is called, or lto_codegen_compile() is called again. + * On failure, returns NULL (check lto_get_error_message() for details). + * + * \since prior to LTO_API_VERSION=3 + */ +extern const void* +lto_codegen_compile(lto_code_gen_t cg, size_t* length); + +/** + * Generates code for all added modules into one native object file. + * This calls lto_codegen_optimize then lto_codegen_compile_optimized (instead + * of returning a generated mach-o/ELF buffer, it writes to a file). + * + * The name of the file is written to name. Returns true on error. + * + * \since LTO_API_VERSION=5 + */ +extern lto_bool_t +lto_codegen_compile_to_file(lto_code_gen_t cg, const char** name); + +/** + * Runs optimization for the merged module. Returns true on error. + * + * \since LTO_API_VERSION=12 + */ +extern lto_bool_t +lto_codegen_optimize(lto_code_gen_t cg); + +/** + * Generates code for the optimized merged module into one native object file. + * It will not run any IR optimizations on the merged module. + * + * On success returns a pointer to a generated mach-o/ELF buffer and length set + * to the buffer size. The buffer is owned by the lto_code_gen_t and will be + * freed when lto_codegen_dispose() is called, or + * lto_codegen_compile_optimized() is called again. On failure, returns NULL + * (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=12 + */ +extern const void* +lto_codegen_compile_optimized(lto_code_gen_t cg, size_t* length); + +/** + * Returns the runtime API version. + * + * \since LTO_API_VERSION=12 + */ +extern unsigned int +lto_api_version(void); + +/** + * Parses options immediately, making them available as early as possible. For + * example during executing codegen::InitTargetOptionsFromCodeGenFlags. Since + * parsing shud only happen once, only one of lto_codegen_debug_options or + * lto_set_debug_options should be called. + * + * This function takes one or more options separated by spaces. + * Warning: passing file paths through this function may confuse the argument + * parser if the paths contain spaces. + * + * \since LTO_API_VERSION=28 + */ +extern void lto_set_debug_options(const char *const *options, int number); + +/** + * Sets options to help debug codegen bugs. Since parsing shud only happen once, + * only one of lto_codegen_debug_options or lto_set_debug_options + * should be called. + * + * This function takes one or more options separated by spaces. + * Warning: passing file paths through this function may confuse the argument + * parser if the paths contain spaces. + * + * \since prior to LTO_API_VERSION=3 + */ +extern void +lto_codegen_debug_options(lto_code_gen_t cg, const char *); + +/** + * Same as the previous function, but takes every option separately through an + * array. + * + * \since prior to LTO_API_VERSION=26 + */ +extern void lto_codegen_debug_options_array(lto_code_gen_t cg, + const char *const *, int number); + +/** + * Initializes LLVM disassemblers. + * FIXME: This doesn't really belong here. + * + * \since LTO_API_VERSION=5 + */ +extern void +lto_initialize_disassembler(void); + +/** + * Sets if we should run internalize pass during optimization and code + * generation. + * + * \since LTO_API_VERSION=14 + */ +extern void +lto_codegen_set_should_internalize(lto_code_gen_t cg, + lto_bool_t ShouldInternalize); + +/** + * Set whether to embed uselists in bitcode. + * + * Sets whether \a lto_codegen_write_merged_modules() should embed uselists in + * output bitcode. This should be turned on for all -save-temps output. + * + * \since LTO_API_VERSION=15 + */ +extern void +lto_codegen_set_should_embed_uselists(lto_code_gen_t cg, + lto_bool_t ShouldEmbedUselists); + +/** Opaque reference to an LTO input file */ +typedef struct LLVMOpaqueLTOInput *lto_input_t; + +/** + * Creates an LTO input file from a buffer. The path + * argument is used for diagnotics as this function + * otherwise does not know which file the given buffer + * is associated with. + * + * \since LTO_API_VERSION=24 + */ +extern lto_input_t lto_input_create(const void *buffer, + size_t buffer_size, + const char *path); + +/** + * Frees all memory internally allocated by the LTO input file. + * Upon return the lto_module_t is no longer valid. + * + * \since LTO_API_VERSION=24 + */ +extern void lto_input_dispose(lto_input_t input); + +/** + * Returns the number of dependent library specifiers + * for the given LTO input file. + * + * \since LTO_API_VERSION=24 + */ +extern unsigned lto_input_get_num_dependent_libraries(lto_input_t input); + +/** + * Returns the ith dependent library specifier + * for the given LTO input file. The returned + * string is not null-terminated. + * + * \since LTO_API_VERSION=24 + */ +extern const char * lto_input_get_dependent_library(lto_input_t input, + size_t index, + size_t *size); + +/** + * Returns the list of libcall symbols that can be generated by LTO + * that might not be visible from the symbol table of bitcode files. + * + * \since prior to LTO_API_VERSION=25 + */ +extern const char *const *lto_runtime_lib_symbols_list(size_t *size); + +/** + * @} // endgoup LLVMCLTO + * @defgroup LLVMCTLTO ThinLTO + * @ingroup LLVMC + * + * @{ + */ + +/** + * Type to wrap a single object returned by ThinLTO. + * + * \since LTO_API_VERSION=18 + */ +typedef struct { + const char *Buffer; + size_t Size; +} LTOObjectBuffer; + +/** + * Instantiates a ThinLTO code generator. + * Returns NULL on error (check lto_get_error_message() for details). + * + * + * The ThinLTOCodeGenerator is not intended to be reuse for multiple + * compilation: the model is that the client adds modules to the generator and + * ask to perform the ThinLTO optimizations / codegen, and finally destroys the + * codegenerator. + * + * \since LTO_API_VERSION=18 + */ +extern thinlto_code_gen_t thinlto_create_codegen(void); + +/** + * Frees the generator and all memory it internally allocated. + * Upon return the thinlto_code_gen_t is no longer valid. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_dispose(thinlto_code_gen_t cg); + +/** + * Add a module to a ThinLTO code generator. Identifier has to be unique among + * all the modules in a code generator. The data buffer stays owned by the + * client, and is expected to be available for the entire lifetime of the + * thinlto_code_gen_t it is added to. + * + * On failure, returns NULL (check lto_get_error_message() for details). + * + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_add_module(thinlto_code_gen_t cg, + const char *identifier, const char *data, + int length); + +/** + * Optimize and codegen all the modules added to the codegenerator using + * ThinLTO. Resulting objects are accessible using thinlto_module_get_object(). + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_process(thinlto_code_gen_t cg); + +/** + * Returns the number of object files produced by the ThinLTO CodeGenerator. + * + * It usually matches the number of input files, but this is not a guarantee of + * the API and may change in future implementation, so the client should not + * assume it. + * + * \since LTO_API_VERSION=18 + */ +extern unsigned int thinlto_module_get_num_objects(thinlto_code_gen_t cg); + +/** + * Returns a reference to the ith object file produced by the ThinLTO + * CodeGenerator. + * + * Client should use \p thinlto_module_get_num_objects() to get the number of + * available objects. + * + * \since LTO_API_VERSION=18 + */ +extern LTOObjectBuffer thinlto_module_get_object(thinlto_code_gen_t cg, + unsigned int index); + +/** + * Returns the number of object files produced by the ThinLTO CodeGenerator. + * + * It usually matches the number of input files, but this is not a guarantee of + * the API and may change in future implementation, so the client should not + * assume it. + * + * \since LTO_API_VERSION=21 + */ +unsigned int thinlto_module_get_num_object_files(thinlto_code_gen_t cg); + +/** + * Returns the path to the ith object file produced by the ThinLTO + * CodeGenerator. + * + * Client should use \p thinlto_module_get_num_object_files() to get the number + * of available objects. + * + * \since LTO_API_VERSION=21 + */ +const char *thinlto_module_get_object_file(thinlto_code_gen_t cg, + unsigned int index); + +/** + * Sets which PIC code model to generate. + * Returns true on error (check lto_get_error_message() for details). + * + * \since LTO_API_VERSION=18 + */ +extern lto_bool_t thinlto_codegen_set_pic_model(thinlto_code_gen_t cg, + lto_codegen_model); + +/** + * Sets the path to a directory to use as a storage for temporary bitcode files. + * The intention is to make the bitcode files available for debugging at various + * stage of the pipeline. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_set_savetemps_dir(thinlto_code_gen_t cg, + const char *save_temps_dir); + +/** + * Set the path to a directory where to save generated object files. This + * path can be used by a linker to request on-disk files instead of in-memory + * buffers. When set, results are available through + * thinlto_module_get_object_file() instead of thinlto_module_get_object(). + * + * \since LTO_API_VERSION=21 + */ +void thinlto_set_generated_objects_dir(thinlto_code_gen_t cg, + const char *save_temps_dir); + +/** + * Sets the cpu to generate code for. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_set_cpu(thinlto_code_gen_t cg, const char *cpu); + +/** + * Disable CodeGen, only run the stages till codegen and stop. The output will + * be bitcode. + * + * \since LTO_API_VERSION=19 + */ +extern void thinlto_codegen_disable_codegen(thinlto_code_gen_t cg, + lto_bool_t disable); + +/** + * Perform CodeGen only: disable all other stages. + * + * \since LTO_API_VERSION=19 + */ +extern void thinlto_codegen_set_codegen_only(thinlto_code_gen_t cg, + lto_bool_t codegen_only); + +/** + * Parse -mllvm style debug options. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_debug_options(const char *const *options, int number); + +/** + * Test if a module has support for ThinLTO linking. + * + * \since LTO_API_VERSION=18 + */ +extern lto_bool_t lto_module_is_thinlto(lto_module_t mod); + +/** + * Adds a symbol to the list of global symbols that must exist in the final + * generated code. If a function is not listed there, it might be inlined into + * every usage and optimized away. For every single module, the functions + * referenced from code outside of the ThinLTO modules need to be added here. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_add_must_preserve_symbol(thinlto_code_gen_t cg, + const char *name, + int length); + +/** + * Adds a symbol to the list of global symbols that are cross-referenced between + * ThinLTO files. If the ThinLTO CodeGenerator can ensure that every + * references from a ThinLTO module to this symbol is optimized away, then + * the symbol can be discarded. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_add_cross_referenced_symbol(thinlto_code_gen_t cg, + const char *name, + int length); + +/** + * @} // endgoup LLVMCTLTO + * @defgroup LLVMCTLTO_CACHING ThinLTO Cache Control + * @ingroup LLVMCTLTO + * + * These entry points control the ThinLTO cache. The cache is intended to + * support incremental builds, and thus needs to be persistent across builds. + * The client enables the cache by supplying a path to an existing directory. + * The code generator will use this to store objects files that may be reused + * during a subsequent build. + * To avoid filling the disk space, a few knobs are provided: + * - The pruning interval limits the frequency at which the garbage collector + * will try to scan the cache directory to prune expired entries. + * Setting to a negative number disables the pruning. + * - The pruning expiration time indicates to the garbage collector how old an + * entry needs to be to be removed. + * - Finally, the garbage collector can be instructed to prune the cache until + * the occupied space goes below a threshold. + * @{ + */ + +/** + * Sets the path to a directory to use as a cache storage for incremental build. + * Setting this activates caching. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_set_cache_dir(thinlto_code_gen_t cg, + const char *cache_dir); + +/** + * Sets the cache pruning interval (in seconds). A negative value disables the + * pruning. An unspecified default value will be applied, and a value of 0 will + * force prunning to occur. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_set_cache_pruning_interval(thinlto_code_gen_t cg, + int interval); + +/** + * Sets the maximum cache size that can be persistent across build, in terms of + * percentage of the available space on the disk. Set to 100 to indicate + * no limit, 50 to indicate that the cache size will not be left over half the + * available space. A value over 100 will be reduced to 100, a value of 0 will + * be ignored. An unspecified default value will be applied. + * + * The formula looks like: + * AvailableSpace = FreeSpace + ExistingCacheSize + * NewCacheSize = AvailableSpace * P/100 + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_set_final_cache_size_relative_to_available_space( + thinlto_code_gen_t cg, unsigned percentage); + +/** + * Sets the expiration (in seconds) for an entry in the cache. An unspecified + * default value will be applied. A value of 0 will be ignored. + * + * \since LTO_API_VERSION=18 + */ +extern void thinlto_codegen_set_cache_entry_expiration(thinlto_code_gen_t cg, + unsigned expiration); + +/** + * Sets the maximum size of the cache directory (in bytes). A value over the + * amount of available space on the disk will be reduced to the amount of + * available space. An unspecified default value will be applied. A value of 0 + * will be ignored. + * + * \since LTO_API_VERSION=22 + */ +extern void thinlto_codegen_set_cache_size_bytes(thinlto_code_gen_t cg, + unsigned max_size_bytes); + +/** + * Same as thinlto_codegen_set_cache_size_bytes, except the maximum size is in + * megabytes (2^20 bytes). + * + * \since LTO_API_VERSION=23 + */ +extern void +thinlto_codegen_set_cache_size_megabytes(thinlto_code_gen_t cg, + unsigned max_size_megabytes); + +/** + * Sets the maximum number of files in the cache directory. An unspecified + * default value will be applied. A value of 0 will be ignored. + * + * \since LTO_API_VERSION=22 + */ +extern void thinlto_codegen_set_cache_size_files(thinlto_code_gen_t cg, + unsigned max_size_files); + +/** + * @} // endgroup LLVMCTLTO_CACHING + */ + +LLVM_C_EXTERN_C_END + +#endif /* LLVM_C_LTO_H */ diff --git a/llvm/lib/clang/19/include/__clang_cuda_builtin_vars.h b/llvm/lib/clang/19/include/__clang_cuda_builtin_vars.h new file mode 100644 index 0000000000000000000000000000000000000000..412e823a827f01f7b61ab0f4f964096b323719b1 --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_builtin_vars.h @@ -0,0 +1,121 @@ +/*===---- cuda_builtin_vars.h - CUDA built-in variables ---------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CUDA_BUILTIN_VARS_H +#define __CUDA_BUILTIN_VARS_H + +// Forward declares from vector_types.h. +struct uint3; +struct dim3; + +// The file implements built-in CUDA variables using __declspec(property). +// https://msdn.microsoft.com/en-us/library/yhfk0thd.aspx +// All read accesses of built-in variable fields get converted into calls to a +// getter function which in turn calls the appropriate builtin to fetch the +// value. +// +// Example: +// int x = threadIdx.x; +// IR output: +// %0 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #3 +// PTX output: +// mov.u32 %r2, %tid.x; + +#define __CUDA_DEVICE_BUILTIN(FIELD, INTRINSIC) \ + __declspec(property(get = __fetch_builtin_##FIELD)) unsigned int FIELD; \ + static inline __attribute__((always_inline)) \ + __attribute__((device)) unsigned int __fetch_builtin_##FIELD(void) { \ + return INTRINSIC; \ + } + +#if __cplusplus >= 201103L +#define __DELETE =delete +#else +#define __DELETE +#endif + +// Make sure nobody can create instances of the special variable types. nvcc +// also disallows taking address of special variables, so we disable address-of +// operator as well. +#define __CUDA_DISALLOW_BUILTINVAR_ACCESS(TypeName) \ + __attribute__((device)) TypeName() __DELETE; \ + __attribute__((device)) TypeName(const TypeName &) __DELETE; \ + __attribute__((device)) void operator=(const TypeName &) const __DELETE; \ + __attribute__((device)) TypeName *operator&() const __DELETE + +struct __cuda_builtin_threadIdx_t { + __CUDA_DEVICE_BUILTIN(x,__nvvm_read_ptx_sreg_tid_x()); + __CUDA_DEVICE_BUILTIN(y,__nvvm_read_ptx_sreg_tid_y()); + __CUDA_DEVICE_BUILTIN(z,__nvvm_read_ptx_sreg_tid_z()); + // threadIdx should be convertible to uint3 (in fact in nvcc, it *is* a + // uint3). This function is defined after we pull in vector_types.h. + __attribute__((device)) operator dim3() const; + __attribute__((device)) operator uint3() const; + +private: + __CUDA_DISALLOW_BUILTINVAR_ACCESS(__cuda_builtin_threadIdx_t); +}; + +struct __cuda_builtin_blockIdx_t { + __CUDA_DEVICE_BUILTIN(x,__nvvm_read_ptx_sreg_ctaid_x()); + __CUDA_DEVICE_BUILTIN(y,__nvvm_read_ptx_sreg_ctaid_y()); + __CUDA_DEVICE_BUILTIN(z,__nvvm_read_ptx_sreg_ctaid_z()); + // blockIdx should be convertible to uint3 (in fact in nvcc, it *is* a + // uint3). This function is defined after we pull in vector_types.h. + __attribute__((device)) operator dim3() const; + __attribute__((device)) operator uint3() const; + +private: + __CUDA_DISALLOW_BUILTINVAR_ACCESS(__cuda_builtin_blockIdx_t); +}; + +struct __cuda_builtin_blockDim_t { + __CUDA_DEVICE_BUILTIN(x,__nvvm_read_ptx_sreg_ntid_x()); + __CUDA_DEVICE_BUILTIN(y,__nvvm_read_ptx_sreg_ntid_y()); + __CUDA_DEVICE_BUILTIN(z,__nvvm_read_ptx_sreg_ntid_z()); + // blockDim should be convertible to dim3 (in fact in nvcc, it *is* a + // dim3). This function is defined after we pull in vector_types.h. + __attribute__((device)) operator dim3() const; + __attribute__((device)) operator uint3() const; + +private: + __CUDA_DISALLOW_BUILTINVAR_ACCESS(__cuda_builtin_blockDim_t); +}; + +struct __cuda_builtin_gridDim_t { + __CUDA_DEVICE_BUILTIN(x,__nvvm_read_ptx_sreg_nctaid_x()); + __CUDA_DEVICE_BUILTIN(y,__nvvm_read_ptx_sreg_nctaid_y()); + __CUDA_DEVICE_BUILTIN(z,__nvvm_read_ptx_sreg_nctaid_z()); + // gridDim should be convertible to dim3 (in fact in nvcc, it *is* a + // dim3). This function is defined after we pull in vector_types.h. + __attribute__((device)) operator dim3() const; + __attribute__((device)) operator uint3() const; + +private: + __CUDA_DISALLOW_BUILTINVAR_ACCESS(__cuda_builtin_gridDim_t); +}; + +#define __CUDA_BUILTIN_VAR \ + extern const __attribute__((device)) __attribute__((weak)) +__CUDA_BUILTIN_VAR __cuda_builtin_threadIdx_t threadIdx; +__CUDA_BUILTIN_VAR __cuda_builtin_blockIdx_t blockIdx; +__CUDA_BUILTIN_VAR __cuda_builtin_blockDim_t blockDim; +__CUDA_BUILTIN_VAR __cuda_builtin_gridDim_t gridDim; + +// warpSize should translate to read of %WARP_SZ but there's currently no +// builtin to do so. According to PTX v4.2 docs 'to date, all target +// architectures have a WARP_SZ value of 32'. +__attribute__((device)) const int warpSize = 32; + +#undef __CUDA_DEVICE_BUILTIN +#undef __CUDA_BUILTIN_VAR +#undef __CUDA_DISALLOW_BUILTINVAR_ACCESS +#undef __DELETE + +#endif /* __CUDA_BUILTIN_VARS_H */ diff --git a/llvm/lib/clang/19/include/__clang_cuda_cmath.h b/llvm/lib/clang/19/include/__clang_cuda_cmath.h new file mode 100644 index 0000000000000000000000000000000000000000..5bbb59a93b9e5a8d6960b10e9b77cef172c7d5fd --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_cmath.h @@ -0,0 +1,512 @@ +/*===---- __clang_cuda_cmath.h - Device-side CUDA cmath support ------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CLANG_CUDA_CMATH_H__ +#define __CLANG_CUDA_CMATH_H__ +#ifndef __CUDA__ +#error "This file is for CUDA compilation only." +#endif + +#ifndef __OPENMP_NVPTX__ +#include +#endif + +// CUDA lets us use various std math functions on the device side. This file +// works in concert with __clang_cuda_math_forward_declares.h to make this work. +// +// Specifically, the forward-declares header declares __device__ overloads for +// these functions in the global namespace, then pulls them into namespace std +// with 'using' statements. Then this file implements those functions, after +// their implementations have been pulled in. +// +// It's important that we declare the functions in the global namespace and pull +// them into namespace std with using statements, as opposed to simply declaring +// these functions in namespace std, because our device functions need to +// overload the standard library functions, which may be declared in the global +// namespace or in std, depending on the degree of conformance of the stdlib +// implementation. Declaring in the global namespace and pulling into namespace +// std covers all of the known knowns. + +#ifdef __OPENMP_NVPTX__ +#define __DEVICE__ static constexpr __attribute__((always_inline, nothrow)) +#else +#define __DEVICE__ static __device__ __inline__ __attribute__((always_inline)) +#endif + +__DEVICE__ long long abs(long long __n) { return ::llabs(__n); } +__DEVICE__ long abs(long __n) { return ::labs(__n); } +__DEVICE__ float abs(float __x) { return ::fabsf(__x); } +__DEVICE__ double abs(double __x) { return ::fabs(__x); } +__DEVICE__ float acos(float __x) { return ::acosf(__x); } +__DEVICE__ float asin(float __x) { return ::asinf(__x); } +__DEVICE__ float atan(float __x) { return ::atanf(__x); } +__DEVICE__ float atan2(float __x, float __y) { return ::atan2f(__x, __y); } +__DEVICE__ float ceil(float __x) { return ::ceilf(__x); } +__DEVICE__ float cos(float __x) { return ::cosf(__x); } +__DEVICE__ float cosh(float __x) { return ::coshf(__x); } +__DEVICE__ float exp(float __x) { return ::expf(__x); } +__DEVICE__ float fabs(float __x) { return ::fabsf(__x); } +__DEVICE__ float floor(float __x) { return ::floorf(__x); } +__DEVICE__ float fmod(float __x, float __y) { return ::fmodf(__x, __y); } +__DEVICE__ int fpclassify(float __x) { + return __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, + FP_ZERO, __x); +} +__DEVICE__ int fpclassify(double __x) { + return __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, + FP_ZERO, __x); +} +__DEVICE__ float frexp(float __arg, int *__exp) { + return ::frexpf(__arg, __exp); +} + +// For inscrutable reasons, the CUDA headers define these functions for us on +// Windows. +#if !defined(_MSC_VER) || defined(__OPENMP_NVPTX__) + +// For OpenMP we work around some old system headers that have non-conforming +// `isinf(float)` and `isnan(float)` implementations that return an `int`. We do +// this by providing two versions of these functions, differing only in the +// return type. To avoid conflicting definitions we disable implicit base +// function generation. That means we will end up with two specializations, one +// per type, but only one has a base function defined by the system header. +#if defined(__OPENMP_NVPTX__) +#pragma omp begin declare variant match( \ + implementation = {extension(disable_implicit_base)}) + +// FIXME: We lack an extension to customize the mangling of the variants, e.g., +// add a suffix. This means we would clash with the names of the variants +// (note that we do not create implicit base functions here). To avoid +// this clash we add a new trait to some of them that is always true +// (this is LLVM after all ;)). It will only influence the mangled name +// of the variants inside the inner region and avoid the clash. +#pragma omp begin declare variant match(implementation = {vendor(llvm)}) + +__DEVICE__ int isinf(float __x) { return ::__isinff(__x); } +__DEVICE__ int isinf(double __x) { return ::__isinf(__x); } +__DEVICE__ int isfinite(float __x) { return ::__finitef(__x); } +__DEVICE__ int isfinite(double __x) { return ::__isfinited(__x); } +__DEVICE__ int isnan(float __x) { return ::__isnanf(__x); } +__DEVICE__ int isnan(double __x) { return ::__isnan(__x); } + +#pragma omp end declare variant + +#endif + +__DEVICE__ bool isinf(float __x) { return ::__isinff(__x); } +__DEVICE__ bool isinf(double __x) { return ::__isinf(__x); } +__DEVICE__ bool isfinite(float __x) { return ::__finitef(__x); } +// For inscrutable reasons, __finite(), the double-precision version of +// __finitef, does not exist when compiling for MacOS. __isfinited is available +// everywhere and is just as good. +__DEVICE__ bool isfinite(double __x) { return ::__isfinited(__x); } +__DEVICE__ bool isnan(float __x) { return ::__isnanf(__x); } +__DEVICE__ bool isnan(double __x) { return ::__isnan(__x); } + +#if defined(__OPENMP_NVPTX__) +#pragma omp end declare variant +#endif + +#endif + +__DEVICE__ bool isgreater(float __x, float __y) { + return __builtin_isgreater(__x, __y); +} +__DEVICE__ bool isgreater(double __x, double __y) { + return __builtin_isgreater(__x, __y); +} +__DEVICE__ bool isgreaterequal(float __x, float __y) { + return __builtin_isgreaterequal(__x, __y); +} +__DEVICE__ bool isgreaterequal(double __x, double __y) { + return __builtin_isgreaterequal(__x, __y); +} +__DEVICE__ bool isless(float __x, float __y) { + return __builtin_isless(__x, __y); +} +__DEVICE__ bool isless(double __x, double __y) { + return __builtin_isless(__x, __y); +} +__DEVICE__ bool islessequal(float __x, float __y) { + return __builtin_islessequal(__x, __y); +} +__DEVICE__ bool islessequal(double __x, double __y) { + return __builtin_islessequal(__x, __y); +} +__DEVICE__ bool islessgreater(float __x, float __y) { + return __builtin_islessgreater(__x, __y); +} +__DEVICE__ bool islessgreater(double __x, double __y) { + return __builtin_islessgreater(__x, __y); +} +__DEVICE__ bool isnormal(float __x) { return __builtin_isnormal(__x); } +__DEVICE__ bool isnormal(double __x) { return __builtin_isnormal(__x); } +__DEVICE__ bool isunordered(float __x, float __y) { + return __builtin_isunordered(__x, __y); +} +__DEVICE__ bool isunordered(double __x, double __y) { + return __builtin_isunordered(__x, __y); +} +__DEVICE__ float ldexp(float __arg, int __exp) { + return ::ldexpf(__arg, __exp); +} +__DEVICE__ float log(float __x) { return ::logf(__x); } +__DEVICE__ float log10(float __x) { return ::log10f(__x); } +__DEVICE__ float modf(float __x, float *__iptr) { return ::modff(__x, __iptr); } +__DEVICE__ float pow(float __base, float __exp) { + return ::powf(__base, __exp); +} +__DEVICE__ float pow(float __base, int __iexp) { + return ::powif(__base, __iexp); +} +__DEVICE__ double pow(double __base, int __iexp) { + return ::powi(__base, __iexp); +} +__DEVICE__ bool signbit(float __x) { return ::__signbitf(__x); } +__DEVICE__ bool signbit(double __x) { return ::__signbitd(__x); } +__DEVICE__ float sin(float __x) { return ::sinf(__x); } +__DEVICE__ float sinh(float __x) { return ::sinhf(__x); } +__DEVICE__ float sqrt(float __x) { return ::sqrtf(__x); } +__DEVICE__ float tan(float __x) { return ::tanf(__x); } +__DEVICE__ float tanh(float __x) { return ::tanhf(__x); } + +// There was a redefinition error for this this overload in CUDA mode. +// We restrict it to OpenMP mode for now, that is where it is actually needed +// anyway. +#ifdef __OPENMP_NVPTX__ +__DEVICE__ float remquo(float __n, float __d, int *__q) { + return ::remquof(__n, __d, __q); +} +#endif + +// Notably missing above is nexttoward. We omit it because +// libdevice doesn't provide an implementation, and we don't want to be in the +// business of implementing tricky libm functions in this header. + +#ifndef __OPENMP_NVPTX__ + +// Now we've defined everything we promised we'd define in +// __clang_cuda_math_forward_declares.h. We need to do two additional things to +// fix up our math functions. +// +// 1) Define __device__ overloads for e.g. sin(int). The CUDA headers define +// only sin(float) and sin(double), which means that e.g. sin(0) is +// ambiguous. +// +// 2) Pull the __device__ overloads of "foobarf" math functions into namespace +// std. These are defined in the CUDA headers in the global namespace, +// independent of everything else we've done here. + +// We can't use std::enable_if, because we want to be pre-C++11 compatible. But +// we go ahead and unconditionally define functions that are only available when +// compiling for C++11 to match the behavior of the CUDA headers. +template +struct __clang_cuda_enable_if {}; + +template struct __clang_cuda_enable_if { + typedef __T type; +}; + +// Defines an overload of __fn that accepts one integral argument, calls +// __fn((double)x), and returns __retty. +#define __CUDA_CLANG_FN_INTEGER_OVERLOAD_1(__retty, __fn) \ + template \ + __DEVICE__ \ + typename __clang_cuda_enable_if::is_integer, \ + __retty>::type \ + __fn(__T __x) { \ + return ::__fn((double)__x); \ + } + +// Defines an overload of __fn that accepts one two arithmetic arguments, calls +// __fn((double)x, (double)y), and returns a double. +// +// Note this is different from OVERLOAD_1, which generates an overload that +// accepts only *integral* arguments. +#define __CUDA_CLANG_FN_INTEGER_OVERLOAD_2(__retty, __fn) \ + template \ + __DEVICE__ typename __clang_cuda_enable_if< \ + std::numeric_limits<__T1>::is_specialized && \ + std::numeric_limits<__T2>::is_specialized, \ + __retty>::type \ + __fn(__T1 __x, __T2 __y) { \ + return __fn((double)__x, (double)__y); \ + } + +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, acos) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, acosh) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, asin) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, asinh) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, atan) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, atan2); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, atanh) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, cbrt) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, ceil) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, copysign); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, cos) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, cosh) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, erf) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, erfc) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, exp) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, exp2) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, expm1) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, fabs) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, fdim); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, floor) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, fmax); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, fmin); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, fmod); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(int, fpclassify) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, hypot); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(int, ilogb) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(bool, isfinite) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(bool, isgreater); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(bool, isgreaterequal); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(bool, isinf); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(bool, isless); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(bool, islessequal); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(bool, islessgreater); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(bool, isnan); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(bool, isnormal) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(bool, isunordered); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, lgamma) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, log) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, log10) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, log1p) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, log2) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, logb) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(long long, llrint) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(long long, llround) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(long, lrint) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(long, lround) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, nearbyint); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, nextafter); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, pow); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_2(double, remainder); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, rint); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, round); +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(bool, signbit) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, sin) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, sinh) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, sqrt) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, tan) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, tanh) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, tgamma) +__CUDA_CLANG_FN_INTEGER_OVERLOAD_1(double, trunc); + +#undef __CUDA_CLANG_FN_INTEGER_OVERLOAD_1 +#undef __CUDA_CLANG_FN_INTEGER_OVERLOAD_2 + +// Overloads for functions that don't match the patterns expected by +// __CUDA_CLANG_FN_INTEGER_OVERLOAD_{1,2}. +template +__DEVICE__ typename __clang_cuda_enable_if< + std::numeric_limits<__T1>::is_specialized && + std::numeric_limits<__T2>::is_specialized && + std::numeric_limits<__T3>::is_specialized, + double>::type +fma(__T1 __x, __T2 __y, __T3 __z) { + return std::fma((double)__x, (double)__y, (double)__z); +} + +template +__DEVICE__ typename __clang_cuda_enable_if::is_integer, + double>::type +frexp(__T __x, int *__exp) { + return std::frexp((double)__x, __exp); +} + +template +__DEVICE__ typename __clang_cuda_enable_if::is_integer, + double>::type +ldexp(__T __x, int __exp) { + return std::ldexp((double)__x, __exp); +} + +template +__DEVICE__ typename __clang_cuda_enable_if< + std::numeric_limits<__T1>::is_specialized && + std::numeric_limits<__T2>::is_specialized, + double>::type +remquo(__T1 __x, __T2 __y, int *__quo) { + return std::remquo((double)__x, (double)__y, __quo); +} + +template +__DEVICE__ typename __clang_cuda_enable_if::is_integer, + double>::type +scalbln(__T __x, long __exp) { + return std::scalbln((double)__x, __exp); +} + +template +__DEVICE__ typename __clang_cuda_enable_if::is_integer, + double>::type +scalbn(__T __x, int __exp) { + return std::scalbn((double)__x, __exp); +} + +// We need to define these overloads in exactly the namespace our standard +// library uses (including the right inline namespace), otherwise they won't be +// picked up by other functions in the standard library (e.g. functions in +// ). Thus the ugliness below. +#ifdef _LIBCPP_BEGIN_NAMESPACE_STD +_LIBCPP_BEGIN_NAMESPACE_STD +#else +namespace std { +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_BEGIN_NAMESPACE_VERSION +#endif +#endif + +// Pull the new overloads we defined above into namespace std. +using ::acos; +using ::acosh; +using ::asin; +using ::asinh; +using ::atan; +using ::atan2; +using ::atanh; +using ::cbrt; +using ::ceil; +using ::copysign; +using ::cos; +using ::cosh; +using ::erf; +using ::erfc; +using ::exp; +using ::exp2; +using ::expm1; +using ::fabs; +using ::fdim; +using ::floor; +using ::fma; +using ::fmax; +using ::fmin; +using ::fmod; +using ::fpclassify; +using ::frexp; +using ::hypot; +using ::ilogb; +using ::isfinite; +using ::isgreater; +using ::isgreaterequal; +using ::isless; +using ::islessequal; +using ::islessgreater; +using ::isnormal; +using ::isunordered; +using ::ldexp; +using ::lgamma; +using ::llrint; +using ::llround; +using ::log; +using ::log10; +using ::log1p; +using ::log2; +using ::logb; +using ::lrint; +using ::lround; +using ::nearbyint; +using ::nextafter; +using ::pow; +using ::remainder; +using ::remquo; +using ::rint; +using ::round; +using ::scalbln; +using ::scalbn; +using ::signbit; +using ::sin; +using ::sinh; +using ::sqrt; +using ::tan; +using ::tanh; +using ::tgamma; +using ::trunc; + +// Well this is fun: We need to pull these symbols in for libc++, but we can't +// pull them in with libstdc++, because its ::isinf and ::isnan are different +// than its std::isinf and std::isnan. +#ifndef __GLIBCXX__ +using ::isinf; +using ::isnan; +#endif + +// Finally, pull the "foobarf" functions that CUDA defines in its headers into +// namespace std. +using ::acosf; +using ::acoshf; +using ::asinf; +using ::asinhf; +using ::atan2f; +using ::atanf; +using ::atanhf; +using ::cbrtf; +using ::ceilf; +using ::copysignf; +using ::cosf; +using ::coshf; +using ::erfcf; +using ::erff; +using ::exp2f; +using ::expf; +using ::expm1f; +using ::fabsf; +using ::fdimf; +using ::floorf; +using ::fmaf; +using ::fmaxf; +using ::fminf; +using ::fmodf; +using ::frexpf; +using ::hypotf; +using ::ilogbf; +using ::ldexpf; +using ::lgammaf; +using ::llrintf; +using ::llroundf; +using ::log10f; +using ::log1pf; +using ::log2f; +using ::logbf; +using ::logf; +using ::lrintf; +using ::lroundf; +using ::modff; +using ::nearbyintf; +using ::nextafterf; +using ::powf; +using ::remainderf; +using ::remquof; +using ::rintf; +using ::roundf; +using ::scalblnf; +using ::scalbnf; +using ::sinf; +using ::sinhf; +using ::sqrtf; +using ::tanf; +using ::tanhf; +using ::tgammaf; +using ::truncf; + +#ifdef _LIBCPP_END_NAMESPACE_STD +_LIBCPP_END_NAMESPACE_STD +#else +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_END_NAMESPACE_VERSION +#endif +} // namespace std +#endif + +#endif // __OPENMP_NVPTX__ + +#undef __DEVICE__ + +#endif diff --git a/llvm/lib/clang/19/include/__clang_cuda_complex_builtins.h b/llvm/lib/clang/19/include/__clang_cuda_complex_builtins.h new file mode 100644 index 0000000000000000000000000000000000000000..7bc7bc2ce63e18983cf8a77c369809a045c8fd1e --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_complex_builtins.h @@ -0,0 +1,285 @@ +/*===-- __clang_cuda_complex_builtins - CUDA impls of runtime complex fns ---=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_COMPLEX_BUILTINS +#define __CLANG_CUDA_COMPLEX_BUILTINS + +// This header defines __muldc3, __mulsc3, __divdc3, and __divsc3. These are +// libgcc functions that clang assumes are available when compiling c99 complex +// operations. (These implementations come from libc++, and have been modified +// to work with CUDA and OpenMP target offloading [in C and C++ mode].) + +#pragma push_macro("__DEVICE__") +#if defined(__OPENMP_NVPTX__) || defined(__OPENMP_AMDGCN__) +#pragma omp declare target +#define __DEVICE__ __attribute__((noinline, nothrow, cold, weak)) +#else +#define __DEVICE__ __device__ inline +#endif + +// To make the algorithms available for C and C++ in CUDA and OpenMP we select +// different but equivalent function versions. TODO: For OpenMP we currently +// select the native builtins as the overload support for templates is lacking. +#if !defined(__OPENMP_NVPTX__) && !defined(__OPENMP_AMDGCN__) +#define _ISNANd std::isnan +#define _ISNANf std::isnan +#define _ISINFd std::isinf +#define _ISINFf std::isinf +#define _ISFINITEd std::isfinite +#define _ISFINITEf std::isfinite +#define _COPYSIGNd std::copysign +#define _COPYSIGNf std::copysign +#define _SCALBNd std::scalbn +#define _SCALBNf std::scalbn +#define _ABSd std::abs +#define _ABSf std::abs +#define _LOGBd std::logb +#define _LOGBf std::logb +// Rather than pulling in std::max from algorithm everytime, use available ::max. +#define _fmaxd max +#define _fmaxf max +#else +#ifdef __AMDGCN__ +#define _ISNANd __ocml_isnan_f64 +#define _ISNANf __ocml_isnan_f32 +#define _ISINFd __ocml_isinf_f64 +#define _ISINFf __ocml_isinf_f32 +#define _ISFINITEd __ocml_isfinite_f64 +#define _ISFINITEf __ocml_isfinite_f32 +#define _COPYSIGNd __ocml_copysign_f64 +#define _COPYSIGNf __ocml_copysign_f32 +#define _SCALBNd __ocml_scalbn_f64 +#define _SCALBNf __ocml_scalbn_f32 +#define _ABSd __ocml_fabs_f64 +#define _ABSf __ocml_fabs_f32 +#define _LOGBd __ocml_logb_f64 +#define _LOGBf __ocml_logb_f32 +#define _fmaxd __ocml_fmax_f64 +#define _fmaxf __ocml_fmax_f32 +#else +#define _ISNANd __nv_isnand +#define _ISNANf __nv_isnanf +#define _ISINFd __nv_isinfd +#define _ISINFf __nv_isinff +#define _ISFINITEd __nv_isfinited +#define _ISFINITEf __nv_finitef +#define _COPYSIGNd __nv_copysign +#define _COPYSIGNf __nv_copysignf +#define _SCALBNd __nv_scalbn +#define _SCALBNf __nv_scalbnf +#define _ABSd __nv_fabs +#define _ABSf __nv_fabsf +#define _LOGBd __nv_logb +#define _LOGBf __nv_logbf +#define _fmaxd __nv_fmax +#define _fmaxf __nv_fmaxf +#endif +#endif + +#if defined(__cplusplus) +extern "C" { +#endif + +__DEVICE__ double _Complex __muldc3(double __a, double __b, double __c, + double __d) { + double __ac = __a * __c; + double __bd = __b * __d; + double __ad = __a * __d; + double __bc = __b * __c; + double _Complex z; + __real__(z) = __ac - __bd; + __imag__(z) = __ad + __bc; + if (_ISNANd(__real__(z)) && _ISNANd(__imag__(z))) { + int __recalc = 0; + if (_ISINFd(__a) || _ISINFd(__b)) { + __a = _COPYSIGNd(_ISINFd(__a) ? 1 : 0, __a); + __b = _COPYSIGNd(_ISINFd(__b) ? 1 : 0, __b); + if (_ISNANd(__c)) + __c = _COPYSIGNd(0, __c); + if (_ISNANd(__d)) + __d = _COPYSIGNd(0, __d); + __recalc = 1; + } + if (_ISINFd(__c) || _ISINFd(__d)) { + __c = _COPYSIGNd(_ISINFd(__c) ? 1 : 0, __c); + __d = _COPYSIGNd(_ISINFd(__d) ? 1 : 0, __d); + if (_ISNANd(__a)) + __a = _COPYSIGNd(0, __a); + if (_ISNANd(__b)) + __b = _COPYSIGNd(0, __b); + __recalc = 1; + } + if (!__recalc && + (_ISINFd(__ac) || _ISINFd(__bd) || _ISINFd(__ad) || _ISINFd(__bc))) { + if (_ISNANd(__a)) + __a = _COPYSIGNd(0, __a); + if (_ISNANd(__b)) + __b = _COPYSIGNd(0, __b); + if (_ISNANd(__c)) + __c = _COPYSIGNd(0, __c); + if (_ISNANd(__d)) + __d = _COPYSIGNd(0, __d); + __recalc = 1; + } + if (__recalc) { + // Can't use std::numeric_limits::infinity() -- that doesn't have + // a device overload (and isn't constexpr before C++11, naturally). + __real__(z) = __builtin_huge_val() * (__a * __c - __b * __d); + __imag__(z) = __builtin_huge_val() * (__a * __d + __b * __c); + } + } + return z; +} + +__DEVICE__ float _Complex __mulsc3(float __a, float __b, float __c, float __d) { + float __ac = __a * __c; + float __bd = __b * __d; + float __ad = __a * __d; + float __bc = __b * __c; + float _Complex z; + __real__(z) = __ac - __bd; + __imag__(z) = __ad + __bc; + if (_ISNANf(__real__(z)) && _ISNANf(__imag__(z))) { + int __recalc = 0; + if (_ISINFf(__a) || _ISINFf(__b)) { + __a = _COPYSIGNf(_ISINFf(__a) ? 1 : 0, __a); + __b = _COPYSIGNf(_ISINFf(__b) ? 1 : 0, __b); + if (_ISNANf(__c)) + __c = _COPYSIGNf(0, __c); + if (_ISNANf(__d)) + __d = _COPYSIGNf(0, __d); + __recalc = 1; + } + if (_ISINFf(__c) || _ISINFf(__d)) { + __c = _COPYSIGNf(_ISINFf(__c) ? 1 : 0, __c); + __d = _COPYSIGNf(_ISINFf(__d) ? 1 : 0, __d); + if (_ISNANf(__a)) + __a = _COPYSIGNf(0, __a); + if (_ISNANf(__b)) + __b = _COPYSIGNf(0, __b); + __recalc = 1; + } + if (!__recalc && + (_ISINFf(__ac) || _ISINFf(__bd) || _ISINFf(__ad) || _ISINFf(__bc))) { + if (_ISNANf(__a)) + __a = _COPYSIGNf(0, __a); + if (_ISNANf(__b)) + __b = _COPYSIGNf(0, __b); + if (_ISNANf(__c)) + __c = _COPYSIGNf(0, __c); + if (_ISNANf(__d)) + __d = _COPYSIGNf(0, __d); + __recalc = 1; + } + if (__recalc) { + __real__(z) = __builtin_huge_valf() * (__a * __c - __b * __d); + __imag__(z) = __builtin_huge_valf() * (__a * __d + __b * __c); + } + } + return z; +} + +__DEVICE__ double _Complex __divdc3(double __a, double __b, double __c, + double __d) { + int __ilogbw = 0; + // Can't use std::max, because that's defined in , and we don't + // want to pull that in for every compile. The CUDA headers define + // ::max(float, float) and ::max(double, double), which is sufficient for us. + double __logbw = _LOGBd(_fmaxd(_ABSd(__c), _ABSd(__d))); + if (_ISFINITEd(__logbw)) { + __ilogbw = (int)__logbw; + __c = _SCALBNd(__c, -__ilogbw); + __d = _SCALBNd(__d, -__ilogbw); + } + double __denom = __c * __c + __d * __d; + double _Complex z; + __real__(z) = _SCALBNd((__a * __c + __b * __d) / __denom, -__ilogbw); + __imag__(z) = _SCALBNd((__b * __c - __a * __d) / __denom, -__ilogbw); + if (_ISNANd(__real__(z)) && _ISNANd(__imag__(z))) { + if ((__denom == 0.0) && (!_ISNANd(__a) || !_ISNANd(__b))) { + __real__(z) = _COPYSIGNd(__builtin_huge_val(), __c) * __a; + __imag__(z) = _COPYSIGNd(__builtin_huge_val(), __c) * __b; + } else if ((_ISINFd(__a) || _ISINFd(__b)) && _ISFINITEd(__c) && + _ISFINITEd(__d)) { + __a = _COPYSIGNd(_ISINFd(__a) ? 1.0 : 0.0, __a); + __b = _COPYSIGNd(_ISINFd(__b) ? 1.0 : 0.0, __b); + __real__(z) = __builtin_huge_val() * (__a * __c + __b * __d); + __imag__(z) = __builtin_huge_val() * (__b * __c - __a * __d); + } else if (_ISINFd(__logbw) && __logbw > 0.0 && _ISFINITEd(__a) && + _ISFINITEd(__b)) { + __c = _COPYSIGNd(_ISINFd(__c) ? 1.0 : 0.0, __c); + __d = _COPYSIGNd(_ISINFd(__d) ? 1.0 : 0.0, __d); + __real__(z) = 0.0 * (__a * __c + __b * __d); + __imag__(z) = 0.0 * (__b * __c - __a * __d); + } + } + return z; +} + +__DEVICE__ float _Complex __divsc3(float __a, float __b, float __c, float __d) { + int __ilogbw = 0; + float __logbw = _LOGBf(_fmaxf(_ABSf(__c), _ABSf(__d))); + if (_ISFINITEf(__logbw)) { + __ilogbw = (int)__logbw; + __c = _SCALBNf(__c, -__ilogbw); + __d = _SCALBNf(__d, -__ilogbw); + } + float __denom = __c * __c + __d * __d; + float _Complex z; + __real__(z) = _SCALBNf((__a * __c + __b * __d) / __denom, -__ilogbw); + __imag__(z) = _SCALBNf((__b * __c - __a * __d) / __denom, -__ilogbw); + if (_ISNANf(__real__(z)) && _ISNANf(__imag__(z))) { + if ((__denom == 0) && (!_ISNANf(__a) || !_ISNANf(__b))) { + __real__(z) = _COPYSIGNf(__builtin_huge_valf(), __c) * __a; + __imag__(z) = _COPYSIGNf(__builtin_huge_valf(), __c) * __b; + } else if ((_ISINFf(__a) || _ISINFf(__b)) && _ISFINITEf(__c) && + _ISFINITEf(__d)) { + __a = _COPYSIGNf(_ISINFf(__a) ? 1 : 0, __a); + __b = _COPYSIGNf(_ISINFf(__b) ? 1 : 0, __b); + __real__(z) = __builtin_huge_valf() * (__a * __c + __b * __d); + __imag__(z) = __builtin_huge_valf() * (__b * __c - __a * __d); + } else if (_ISINFf(__logbw) && __logbw > 0 && _ISFINITEf(__a) && + _ISFINITEf(__b)) { + __c = _COPYSIGNf(_ISINFf(__c) ? 1 : 0, __c); + __d = _COPYSIGNf(_ISINFf(__d) ? 1 : 0, __d); + __real__(z) = 0 * (__a * __c + __b * __d); + __imag__(z) = 0 * (__b * __c - __a * __d); + } + } + return z; +} + +#if defined(__cplusplus) +} // extern "C" +#endif + +#undef _ISNANd +#undef _ISNANf +#undef _ISINFd +#undef _ISINFf +#undef _COPYSIGNd +#undef _COPYSIGNf +#undef _ISFINITEd +#undef _ISFINITEf +#undef _SCALBNd +#undef _SCALBNf +#undef _ABSd +#undef _ABSf +#undef _LOGBd +#undef _LOGBf +#undef _fmaxd +#undef _fmaxf + +#if defined(__OPENMP_NVPTX__) || defined(__OPENMP_AMDGCN__) +#pragma omp end declare target +#endif + +#pragma pop_macro("__DEVICE__") + +#endif // __CLANG_CUDA_COMPLEX_BUILTINS diff --git a/llvm/lib/clang/19/include/__clang_cuda_device_functions.h b/llvm/lib/clang/19/include/__clang_cuda_device_functions.h new file mode 100644 index 0000000000000000000000000000000000000000..f8a12cefdb81b481b33a8958c0914af26eeb959b --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_device_functions.h @@ -0,0 +1,1558 @@ +/*===---- __clang_cuda_device_functions.h - CUDA runtime support -----------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_DEVICE_FUNCTIONS_H__ +#define __CLANG_CUDA_DEVICE_FUNCTIONS_H__ + +#ifndef __OPENMP_NVPTX__ +#if CUDA_VERSION < 9000 +#error This file is intended to be used with CUDA-9+ only. +#endif +#endif + +// __DEVICE__ is a helper macro with common set of attributes for the wrappers +// we implement in this file. We need static in order to avoid emitting unused +// functions and __forceinline__ helps inlining these wrappers at -O1. +#pragma push_macro("__DEVICE__") +#ifdef __OPENMP_NVPTX__ +#define __DEVICE__ static __attribute__((always_inline, nothrow)) +#else +#define __DEVICE__ static __device__ __forceinline__ +#endif + +__DEVICE__ int __all(int __a) { return __nvvm_vote_all(__a); } +__DEVICE__ int __any(int __a) { return __nvvm_vote_any(__a); } +__DEVICE__ unsigned int __ballot(int __a) { return __nvvm_vote_ballot(__a); } +__DEVICE__ unsigned int __brev(unsigned int __a) { return __nv_brev(__a); } +__DEVICE__ unsigned long long __brevll(unsigned long long __a) { + return __nv_brevll(__a); +} +#if defined(__cplusplus) +__DEVICE__ void __brkpt() { __asm__ __volatile__("brkpt;"); } +__DEVICE__ void __brkpt(int __a) { __brkpt(); } +#else +__DEVICE__ void __attribute__((overloadable)) __brkpt(void) { + __asm__ __volatile__("brkpt;"); +} +__DEVICE__ void __attribute__((overloadable)) __brkpt(int __a) { __brkpt(); } +#endif +__DEVICE__ unsigned int __byte_perm(unsigned int __a, unsigned int __b, + unsigned int __c) { + return __nv_byte_perm(__a, __b, __c); +} +__DEVICE__ int __clz(int __a) { return __nv_clz(__a); } +__DEVICE__ int __clzll(long long __a) { return __nv_clzll(__a); } +__DEVICE__ float __cosf(float __a) { return __nv_fast_cosf(__a); } +__DEVICE__ double __dAtomicAdd(double *__p, double __v) { + return __nvvm_atom_add_gen_d(__p, __v); +} +__DEVICE__ double __dAtomicAdd_block(double *__p, double __v) { + return __nvvm_atom_cta_add_gen_d(__p, __v); +} +__DEVICE__ double __dAtomicAdd_system(double *__p, double __v) { + return __nvvm_atom_sys_add_gen_d(__p, __v); +} +__DEVICE__ double __dadd_rd(double __a, double __b) { + return __nv_dadd_rd(__a, __b); +} +__DEVICE__ double __dadd_rn(double __a, double __b) { + return __nv_dadd_rn(__a, __b); +} +__DEVICE__ double __dadd_ru(double __a, double __b) { + return __nv_dadd_ru(__a, __b); +} +__DEVICE__ double __dadd_rz(double __a, double __b) { + return __nv_dadd_rz(__a, __b); +} +__DEVICE__ double __ddiv_rd(double __a, double __b) { + return __nv_ddiv_rd(__a, __b); +} +__DEVICE__ double __ddiv_rn(double __a, double __b) { + return __nv_ddiv_rn(__a, __b); +} +__DEVICE__ double __ddiv_ru(double __a, double __b) { + return __nv_ddiv_ru(__a, __b); +} +__DEVICE__ double __ddiv_rz(double __a, double __b) { + return __nv_ddiv_rz(__a, __b); +} +__DEVICE__ double __dmul_rd(double __a, double __b) { + return __nv_dmul_rd(__a, __b); +} +__DEVICE__ double __dmul_rn(double __a, double __b) { + return __nv_dmul_rn(__a, __b); +} +__DEVICE__ double __dmul_ru(double __a, double __b) { + return __nv_dmul_ru(__a, __b); +} +__DEVICE__ double __dmul_rz(double __a, double __b) { + return __nv_dmul_rz(__a, __b); +} +__DEVICE__ float __double2float_rd(double __a) { + return __nv_double2float_rd(__a); +} +__DEVICE__ float __double2float_rn(double __a) { + return __nv_double2float_rn(__a); +} +__DEVICE__ float __double2float_ru(double __a) { + return __nv_double2float_ru(__a); +} +__DEVICE__ float __double2float_rz(double __a) { + return __nv_double2float_rz(__a); +} +__DEVICE__ int __double2hiint(double __a) { return __nv_double2hiint(__a); } +__DEVICE__ int __double2int_rd(double __a) { return __nv_double2int_rd(__a); } +__DEVICE__ int __double2int_rn(double __a) { return __nv_double2int_rn(__a); } +__DEVICE__ int __double2int_ru(double __a) { return __nv_double2int_ru(__a); } +__DEVICE__ int __double2int_rz(double __a) { return __nv_double2int_rz(__a); } +__DEVICE__ long long __double2ll_rd(double __a) { + return __nv_double2ll_rd(__a); +} +__DEVICE__ long long __double2ll_rn(double __a) { + return __nv_double2ll_rn(__a); +} +__DEVICE__ long long __double2ll_ru(double __a) { + return __nv_double2ll_ru(__a); +} +__DEVICE__ long long __double2ll_rz(double __a) { + return __nv_double2ll_rz(__a); +} +__DEVICE__ int __double2loint(double __a) { return __nv_double2loint(__a); } +__DEVICE__ unsigned int __double2uint_rd(double __a) { + return __nv_double2uint_rd(__a); +} +__DEVICE__ unsigned int __double2uint_rn(double __a) { + return __nv_double2uint_rn(__a); +} +__DEVICE__ unsigned int __double2uint_ru(double __a) { + return __nv_double2uint_ru(__a); +} +__DEVICE__ unsigned int __double2uint_rz(double __a) { + return __nv_double2uint_rz(__a); +} +__DEVICE__ unsigned long long __double2ull_rd(double __a) { + return __nv_double2ull_rd(__a); +} +__DEVICE__ unsigned long long __double2ull_rn(double __a) { + return __nv_double2ull_rn(__a); +} +__DEVICE__ unsigned long long __double2ull_ru(double __a) { + return __nv_double2ull_ru(__a); +} +__DEVICE__ unsigned long long __double2ull_rz(double __a) { + return __nv_double2ull_rz(__a); +} +__DEVICE__ long long __double_as_longlong(double __a) { + return __nv_double_as_longlong(__a); +} +__DEVICE__ double __drcp_rd(double __a) { return __nv_drcp_rd(__a); } +__DEVICE__ double __drcp_rn(double __a) { return __nv_drcp_rn(__a); } +__DEVICE__ double __drcp_ru(double __a) { return __nv_drcp_ru(__a); } +__DEVICE__ double __drcp_rz(double __a) { return __nv_drcp_rz(__a); } +__DEVICE__ double __dsqrt_rd(double __a) { return __nv_dsqrt_rd(__a); } +__DEVICE__ double __dsqrt_rn(double __a) { return __nv_dsqrt_rn(__a); } +__DEVICE__ double __dsqrt_ru(double __a) { return __nv_dsqrt_ru(__a); } +__DEVICE__ double __dsqrt_rz(double __a) { return __nv_dsqrt_rz(__a); } +__DEVICE__ double __dsub_rd(double __a, double __b) { + return __nv_dsub_rd(__a, __b); +} +__DEVICE__ double __dsub_rn(double __a, double __b) { + return __nv_dsub_rn(__a, __b); +} +__DEVICE__ double __dsub_ru(double __a, double __b) { + return __nv_dsub_ru(__a, __b); +} +__DEVICE__ double __dsub_rz(double __a, double __b) { + return __nv_dsub_rz(__a, __b); +} +__DEVICE__ float __exp10f(float __a) { return __nv_fast_exp10f(__a); } +__DEVICE__ float __expf(float __a) { return __nv_fast_expf(__a); } +__DEVICE__ float __fAtomicAdd(float *__p, float __v) { + return __nvvm_atom_add_gen_f(__p, __v); +} +__DEVICE__ float __fAtomicAdd_block(float *__p, float __v) { + return __nvvm_atom_cta_add_gen_f(__p, __v); +} +__DEVICE__ float __fAtomicAdd_system(float *__p, float __v) { + return __nvvm_atom_sys_add_gen_f(__p, __v); +} +__DEVICE__ float __fAtomicExch(float *__p, float __v) { + return __nv_int_as_float( + __nvvm_atom_xchg_gen_i((int *)__p, __nv_float_as_int(__v))); +} +__DEVICE__ float __fAtomicExch_block(float *__p, float __v) { + return __nv_int_as_float( + __nvvm_atom_cta_xchg_gen_i((int *)__p, __nv_float_as_int(__v))); +} +__DEVICE__ float __fAtomicExch_system(float *__p, float __v) { + return __nv_int_as_float( + __nvvm_atom_sys_xchg_gen_i((int *)__p, __nv_float_as_int(__v))); +} +__DEVICE__ float __fadd_rd(float __a, float __b) { + return __nv_fadd_rd(__a, __b); +} +__DEVICE__ float __fadd_rn(float __a, float __b) { + return __nv_fadd_rn(__a, __b); +} +__DEVICE__ float __fadd_ru(float __a, float __b) { + return __nv_fadd_ru(__a, __b); +} +__DEVICE__ float __fadd_rz(float __a, float __b) { + return __nv_fadd_rz(__a, __b); +} +__DEVICE__ float __fdiv_rd(float __a, float __b) { + return __nv_fdiv_rd(__a, __b); +} +__DEVICE__ float __fdiv_rn(float __a, float __b) { + return __nv_fdiv_rn(__a, __b); +} +__DEVICE__ float __fdiv_ru(float __a, float __b) { + return __nv_fdiv_ru(__a, __b); +} +__DEVICE__ float __fdiv_rz(float __a, float __b) { + return __nv_fdiv_rz(__a, __b); +} +__DEVICE__ float __fdividef(float __a, float __b) { + return __nv_fast_fdividef(__a, __b); +} +__DEVICE__ int __ffs(int __a) { return __nv_ffs(__a); } +__DEVICE__ int __ffsll(long long __a) { return __nv_ffsll(__a); } +__DEVICE__ int __finite(double __a) { return __nv_isfinited(__a); } +__DEVICE__ int __finitef(float __a) { return __nv_finitef(__a); } +#ifdef _MSC_VER +__DEVICE__ int __finitel(long double __a); +#endif +__DEVICE__ int __float2int_rd(float __a) { return __nv_float2int_rd(__a); } +__DEVICE__ int __float2int_rn(float __a) { return __nv_float2int_rn(__a); } +__DEVICE__ int __float2int_ru(float __a) { return __nv_float2int_ru(__a); } +__DEVICE__ int __float2int_rz(float __a) { return __nv_float2int_rz(__a); } +__DEVICE__ long long __float2ll_rd(float __a) { return __nv_float2ll_rd(__a); } +__DEVICE__ long long __float2ll_rn(float __a) { return __nv_float2ll_rn(__a); } +__DEVICE__ long long __float2ll_ru(float __a) { return __nv_float2ll_ru(__a); } +__DEVICE__ long long __float2ll_rz(float __a) { return __nv_float2ll_rz(__a); } +__DEVICE__ unsigned int __float2uint_rd(float __a) { + return __nv_float2uint_rd(__a); +} +__DEVICE__ unsigned int __float2uint_rn(float __a) { + return __nv_float2uint_rn(__a); +} +__DEVICE__ unsigned int __float2uint_ru(float __a) { + return __nv_float2uint_ru(__a); +} +__DEVICE__ unsigned int __float2uint_rz(float __a) { + return __nv_float2uint_rz(__a); +} +__DEVICE__ unsigned long long __float2ull_rd(float __a) { + return __nv_float2ull_rd(__a); +} +__DEVICE__ unsigned long long __float2ull_rn(float __a) { + return __nv_float2ull_rn(__a); +} +__DEVICE__ unsigned long long __float2ull_ru(float __a) { + return __nv_float2ull_ru(__a); +} +__DEVICE__ unsigned long long __float2ull_rz(float __a) { + return __nv_float2ull_rz(__a); +} +__DEVICE__ int __float_as_int(float __a) { return __nv_float_as_int(__a); } +__DEVICE__ unsigned int __float_as_uint(float __a) { + return __nv_float_as_uint(__a); +} +__DEVICE__ double __fma_rd(double __a, double __b, double __c) { + return __nv_fma_rd(__a, __b, __c); +} +__DEVICE__ double __fma_rn(double __a, double __b, double __c) { + return __nv_fma_rn(__a, __b, __c); +} +__DEVICE__ double __fma_ru(double __a, double __b, double __c) { + return __nv_fma_ru(__a, __b, __c); +} +__DEVICE__ double __fma_rz(double __a, double __b, double __c) { + return __nv_fma_rz(__a, __b, __c); +} +__DEVICE__ float __fmaf_ieee_rd(float __a, float __b, float __c) { + return __nv_fmaf_ieee_rd(__a, __b, __c); +} +__DEVICE__ float __fmaf_ieee_rn(float __a, float __b, float __c) { + return __nv_fmaf_ieee_rn(__a, __b, __c); +} +__DEVICE__ float __fmaf_ieee_ru(float __a, float __b, float __c) { + return __nv_fmaf_ieee_ru(__a, __b, __c); +} +__DEVICE__ float __fmaf_ieee_rz(float __a, float __b, float __c) { + return __nv_fmaf_ieee_rz(__a, __b, __c); +} +__DEVICE__ float __fmaf_rd(float __a, float __b, float __c) { + return __nv_fmaf_rd(__a, __b, __c); +} +__DEVICE__ float __fmaf_rn(float __a, float __b, float __c) { + return __nv_fmaf_rn(__a, __b, __c); +} +__DEVICE__ float __fmaf_ru(float __a, float __b, float __c) { + return __nv_fmaf_ru(__a, __b, __c); +} +__DEVICE__ float __fmaf_rz(float __a, float __b, float __c) { + return __nv_fmaf_rz(__a, __b, __c); +} +__DEVICE__ float __fmul_rd(float __a, float __b) { + return __nv_fmul_rd(__a, __b); +} +__DEVICE__ float __fmul_rn(float __a, float __b) { + return __nv_fmul_rn(__a, __b); +} +__DEVICE__ float __fmul_ru(float __a, float __b) { + return __nv_fmul_ru(__a, __b); +} +__DEVICE__ float __fmul_rz(float __a, float __b) { + return __nv_fmul_rz(__a, __b); +} +__DEVICE__ float __frcp_rd(float __a) { return __nv_frcp_rd(__a); } +__DEVICE__ float __frcp_rn(float __a) { return __nv_frcp_rn(__a); } +__DEVICE__ float __frcp_ru(float __a) { return __nv_frcp_ru(__a); } +__DEVICE__ float __frcp_rz(float __a) { return __nv_frcp_rz(__a); } +__DEVICE__ float __frsqrt_rn(float __a) { return __nv_frsqrt_rn(__a); } +__DEVICE__ float __fsqrt_rd(float __a) { return __nv_fsqrt_rd(__a); } +__DEVICE__ float __fsqrt_rn(float __a) { return __nv_fsqrt_rn(__a); } +__DEVICE__ float __fsqrt_ru(float __a) { return __nv_fsqrt_ru(__a); } +__DEVICE__ float __fsqrt_rz(float __a) { return __nv_fsqrt_rz(__a); } +__DEVICE__ float __fsub_rd(float __a, float __b) { + return __nv_fsub_rd(__a, __b); +} +__DEVICE__ float __fsub_rn(float __a, float __b) { + return __nv_fsub_rn(__a, __b); +} +__DEVICE__ float __fsub_ru(float __a, float __b) { + return __nv_fsub_ru(__a, __b); +} +__DEVICE__ float __fsub_rz(float __a, float __b) { + return __nv_fsub_rz(__a, __b); +} +__DEVICE__ int __hadd(int __a, int __b) { return __nv_hadd(__a, __b); } +__DEVICE__ double __hiloint2double(int __a, int __b) { + return __nv_hiloint2double(__a, __b); +} +__DEVICE__ int __iAtomicAdd(int *__p, int __v) { + return __nvvm_atom_add_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicAdd_block(int *__p, int __v) { + return __nvvm_atom_cta_add_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicAdd_system(int *__p, int __v) { + return __nvvm_atom_sys_add_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicAnd(int *__p, int __v) { + return __nvvm_atom_and_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicAnd_block(int *__p, int __v) { + return __nvvm_atom_cta_and_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicAnd_system(int *__p, int __v) { + return __nvvm_atom_sys_and_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicCAS(int *__p, int __cmp, int __v) { + return __nvvm_atom_cas_gen_i(__p, __cmp, __v); +} +__DEVICE__ int __iAtomicCAS_block(int *__p, int __cmp, int __v) { + return __nvvm_atom_cta_cas_gen_i(__p, __cmp, __v); +} +__DEVICE__ int __iAtomicCAS_system(int *__p, int __cmp, int __v) { + return __nvvm_atom_sys_cas_gen_i(__p, __cmp, __v); +} +__DEVICE__ int __iAtomicExch(int *__p, int __v) { + return __nvvm_atom_xchg_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicExch_block(int *__p, int __v) { + return __nvvm_atom_cta_xchg_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicExch_system(int *__p, int __v) { + return __nvvm_atom_sys_xchg_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicMax(int *__p, int __v) { + return __nvvm_atom_max_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicMax_block(int *__p, int __v) { + return __nvvm_atom_cta_max_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicMax_system(int *__p, int __v) { + return __nvvm_atom_sys_max_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicMin(int *__p, int __v) { + return __nvvm_atom_min_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicMin_block(int *__p, int __v) { + return __nvvm_atom_cta_min_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicMin_system(int *__p, int __v) { + return __nvvm_atom_sys_min_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicOr(int *__p, int __v) { + return __nvvm_atom_or_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicOr_block(int *__p, int __v) { + return __nvvm_atom_cta_or_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicOr_system(int *__p, int __v) { + return __nvvm_atom_sys_or_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicXor(int *__p, int __v) { + return __nvvm_atom_xor_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicXor_block(int *__p, int __v) { + return __nvvm_atom_cta_xor_gen_i(__p, __v); +} +__DEVICE__ int __iAtomicXor_system(int *__p, int __v) { + return __nvvm_atom_sys_xor_gen_i(__p, __v); +} +__DEVICE__ long long __illAtomicMax(long long *__p, long long __v) { + return __nvvm_atom_max_gen_ll(__p, __v); +} +__DEVICE__ long long __illAtomicMax_block(long long *__p, long long __v) { + return __nvvm_atom_cta_max_gen_ll(__p, __v); +} +__DEVICE__ long long __illAtomicMax_system(long long *__p, long long __v) { + return __nvvm_atom_sys_max_gen_ll(__p, __v); +} +__DEVICE__ long long __illAtomicMin(long long *__p, long long __v) { + return __nvvm_atom_min_gen_ll(__p, __v); +} +__DEVICE__ long long __illAtomicMin_block(long long *__p, long long __v) { + return __nvvm_atom_cta_min_gen_ll(__p, __v); +} +__DEVICE__ long long __illAtomicMin_system(long long *__p, long long __v) { + return __nvvm_atom_sys_min_gen_ll(__p, __v); +} +__DEVICE__ double __int2double_rn(int __a) { return __nv_int2double_rn(__a); } +__DEVICE__ float __int2float_rd(int __a) { return __nv_int2float_rd(__a); } +__DEVICE__ float __int2float_rn(int __a) { return __nv_int2float_rn(__a); } +__DEVICE__ float __int2float_ru(int __a) { return __nv_int2float_ru(__a); } +__DEVICE__ float __int2float_rz(int __a) { return __nv_int2float_rz(__a); } +__DEVICE__ float __int_as_float(int __a) { return __nv_int_as_float(__a); } +__DEVICE__ int __isfinited(double __a) { return __nv_isfinited(__a); } +__DEVICE__ int __isinf(double __a) { return __nv_isinfd(__a); } +__DEVICE__ int __isinff(float __a) { return __nv_isinff(__a); } +#ifdef _MSC_VER +__DEVICE__ int __isinfl(long double __a); +#endif +__DEVICE__ int __isnan(double __a) { return __nv_isnand(__a); } +__DEVICE__ int __isnanf(float __a) { return __nv_isnanf(__a); } +#ifdef _MSC_VER +__DEVICE__ int __isnanl(long double __a); +#endif +__DEVICE__ double __ll2double_rd(long long __a) { + return __nv_ll2double_rd(__a); +} +__DEVICE__ double __ll2double_rn(long long __a) { + return __nv_ll2double_rn(__a); +} +__DEVICE__ double __ll2double_ru(long long __a) { + return __nv_ll2double_ru(__a); +} +__DEVICE__ double __ll2double_rz(long long __a) { + return __nv_ll2double_rz(__a); +} +__DEVICE__ float __ll2float_rd(long long __a) { return __nv_ll2float_rd(__a); } +__DEVICE__ float __ll2float_rn(long long __a) { return __nv_ll2float_rn(__a); } +__DEVICE__ float __ll2float_ru(long long __a) { return __nv_ll2float_ru(__a); } +__DEVICE__ float __ll2float_rz(long long __a) { return __nv_ll2float_rz(__a); } +__DEVICE__ long long __llAtomicAnd(long long *__p, long long __v) { + return __nvvm_atom_and_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicAnd_block(long long *__p, long long __v) { + return __nvvm_atom_cta_and_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicAnd_system(long long *__p, long long __v) { + return __nvvm_atom_sys_and_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicOr(long long *__p, long long __v) { + return __nvvm_atom_or_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicOr_block(long long *__p, long long __v) { + return __nvvm_atom_cta_or_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicOr_system(long long *__p, long long __v) { + return __nvvm_atom_sys_or_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicXor(long long *__p, long long __v) { + return __nvvm_atom_xor_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicXor_block(long long *__p, long long __v) { + return __nvvm_atom_cta_xor_gen_ll(__p, __v); +} +__DEVICE__ long long __llAtomicXor_system(long long *__p, long long __v) { + return __nvvm_atom_sys_xor_gen_ll(__p, __v); +} +__DEVICE__ float __log10f(float __a) { return __nv_fast_log10f(__a); } +__DEVICE__ float __log2f(float __a) { return __nv_fast_log2f(__a); } +__DEVICE__ float __logf(float __a) { return __nv_fast_logf(__a); } +__DEVICE__ double __longlong_as_double(long long __a) { + return __nv_longlong_as_double(__a); +} +__DEVICE__ int __mul24(int __a, int __b) { return __nv_mul24(__a, __b); } +__DEVICE__ long long __mul64hi(long long __a, long long __b) { + return __nv_mul64hi(__a, __b); +} +__DEVICE__ int __mulhi(int __a, int __b) { return __nv_mulhi(__a, __b); } +__DEVICE__ unsigned int __pm0(void) { return __nvvm_read_ptx_sreg_pm0(); } +__DEVICE__ unsigned int __pm1(void) { return __nvvm_read_ptx_sreg_pm1(); } +__DEVICE__ unsigned int __pm2(void) { return __nvvm_read_ptx_sreg_pm2(); } +__DEVICE__ unsigned int __pm3(void) { return __nvvm_read_ptx_sreg_pm3(); } +__DEVICE__ int __popc(unsigned int __a) { return __nv_popc(__a); } +__DEVICE__ int __popcll(unsigned long long __a) { return __nv_popcll(__a); } +__DEVICE__ float __powf(float __a, float __b) { + return __nv_fast_powf(__a, __b); +} + +// Parameter must have a known integer value. +#define __prof_trigger(__a) __asm__ __volatile__("pmevent \t%0;" ::"i"(__a)) +__DEVICE__ int __rhadd(int __a, int __b) { return __nv_rhadd(__a, __b); } +__DEVICE__ unsigned int __sad(int __a, int __b, unsigned int __c) { + return __nv_sad(__a, __b, __c); +} +__DEVICE__ float __saturatef(float __a) { return __nv_saturatef(__a); } +__DEVICE__ int __signbitd(double __a) { return __nv_signbitd(__a); } +__DEVICE__ int __signbitf(float __a) { return __nv_signbitf(__a); } +__DEVICE__ void __sincosf(float __a, float *__s, float *__c) { + return __nv_fast_sincosf(__a, __s, __c); +} +__DEVICE__ float __sinf(float __a) { return __nv_fast_sinf(__a); } +__DEVICE__ int __syncthreads_and(int __a) { return __nvvm_bar0_and(__a); } +__DEVICE__ int __syncthreads_count(int __a) { return __nvvm_bar0_popc(__a); } +__DEVICE__ int __syncthreads_or(int __a) { return __nvvm_bar0_or(__a); } +__DEVICE__ float __tanf(float __a) { return __nv_fast_tanf(__a); } +__DEVICE__ void __threadfence(void) { __nvvm_membar_gl(); } +__DEVICE__ void __threadfence_block(void) { __nvvm_membar_cta(); }; +__DEVICE__ void __threadfence_system(void) { __nvvm_membar_sys(); }; +__DEVICE__ void __trap(void) { __asm__ __volatile__("trap;"); } +__DEVICE__ unsigned int __uAtomicAdd(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_add_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicAdd_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_add_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicAdd_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_add_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicAnd(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_and_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicAnd_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_and_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicAnd_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_and_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicCAS(unsigned int *__p, unsigned int __cmp, + unsigned int __v) { + return __nvvm_atom_cas_gen_i((int *)__p, __cmp, __v); +} +__DEVICE__ unsigned int +__uAtomicCAS_block(unsigned int *__p, unsigned int __cmp, unsigned int __v) { + return __nvvm_atom_cta_cas_gen_i((int *)__p, __cmp, __v); +} +__DEVICE__ unsigned int +__uAtomicCAS_system(unsigned int *__p, unsigned int __cmp, unsigned int __v) { + return __nvvm_atom_sys_cas_gen_i((int *)__p, __cmp, __v); +} +__DEVICE__ unsigned int __uAtomicDec(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_dec_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicDec_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_dec_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicDec_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_dec_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicExch(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_xchg_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicExch_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_xchg_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicExch_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_xchg_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicInc(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_inc_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicInc_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_inc_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicInc_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_inc_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicMax(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_max_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicMax_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_max_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicMax_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_max_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicMin(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_min_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicMin_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_min_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicMin_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_min_gen_ui(__p, __v); +} +__DEVICE__ unsigned int __uAtomicOr(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_or_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicOr_block(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_cta_or_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicOr_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_or_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicXor(unsigned int *__p, unsigned int __v) { + return __nvvm_atom_xor_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicXor_block(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_cta_xor_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uAtomicXor_system(unsigned int *__p, + unsigned int __v) { + return __nvvm_atom_sys_xor_gen_i((int *)__p, __v); +} +__DEVICE__ unsigned int __uhadd(unsigned int __a, unsigned int __b) { + return __nv_uhadd(__a, __b); +} +__DEVICE__ double __uint2double_rn(unsigned int __a) { + return __nv_uint2double_rn(__a); +} +__DEVICE__ float __uint2float_rd(unsigned int __a) { + return __nv_uint2float_rd(__a); +} +__DEVICE__ float __uint2float_rn(unsigned int __a) { + return __nv_uint2float_rn(__a); +} +__DEVICE__ float __uint2float_ru(unsigned int __a) { + return __nv_uint2float_ru(__a); +} +__DEVICE__ float __uint2float_rz(unsigned int __a) { + return __nv_uint2float_rz(__a); +} +__DEVICE__ float __uint_as_float(unsigned int __a) { + return __nv_uint_as_float(__a); +} // +__DEVICE__ double __ull2double_rd(unsigned long long __a) { + return __nv_ull2double_rd(__a); +} +__DEVICE__ double __ull2double_rn(unsigned long long __a) { + return __nv_ull2double_rn(__a); +} +__DEVICE__ double __ull2double_ru(unsigned long long __a) { + return __nv_ull2double_ru(__a); +} +__DEVICE__ double __ull2double_rz(unsigned long long __a) { + return __nv_ull2double_rz(__a); +} +__DEVICE__ float __ull2float_rd(unsigned long long __a) { + return __nv_ull2float_rd(__a); +} +__DEVICE__ float __ull2float_rn(unsigned long long __a) { + return __nv_ull2float_rn(__a); +} +__DEVICE__ float __ull2float_ru(unsigned long long __a) { + return __nv_ull2float_ru(__a); +} +__DEVICE__ float __ull2float_rz(unsigned long long __a) { + return __nv_ull2float_rz(__a); +} +__DEVICE__ unsigned long long __ullAtomicAdd(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_add_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicAdd_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_add_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicAdd_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_add_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicAnd(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_and_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicAnd_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_and_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicAnd_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_and_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicCAS(unsigned long long *__p, + unsigned long long __cmp, + unsigned long long __v) { + return __nvvm_atom_cas_gen_ll((long long *)__p, __cmp, __v); +} +__DEVICE__ unsigned long long __ullAtomicCAS_block(unsigned long long *__p, + unsigned long long __cmp, + unsigned long long __v) { + return __nvvm_atom_cta_cas_gen_ll((long long *)__p, __cmp, __v); +} +__DEVICE__ unsigned long long __ullAtomicCAS_system(unsigned long long *__p, + unsigned long long __cmp, + unsigned long long __v) { + return __nvvm_atom_sys_cas_gen_ll((long long *)__p, __cmp, __v); +} +__DEVICE__ unsigned long long __ullAtomicExch(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_xchg_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicExch_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_xchg_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicExch_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_xchg_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicMax(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_max_gen_ull(__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicMax_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_max_gen_ull(__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicMax_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_max_gen_ull(__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicMin(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_min_gen_ull(__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicMin_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_min_gen_ull(__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicMin_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_min_gen_ull(__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicOr(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_or_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicOr_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_or_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicOr_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_or_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicXor(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_xor_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicXor_block(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_cta_xor_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned long long __ullAtomicXor_system(unsigned long long *__p, + unsigned long long __v) { + return __nvvm_atom_sys_xor_gen_ll((long long *)__p, __v); +} +__DEVICE__ unsigned int __umul24(unsigned int __a, unsigned int __b) { + return __nv_umul24(__a, __b); +} +__DEVICE__ unsigned long long __umul64hi(unsigned long long __a, + unsigned long long __b) { + return __nv_umul64hi(__a, __b); +} +__DEVICE__ unsigned int __umulhi(unsigned int __a, unsigned int __b) { + return __nv_umulhi(__a, __b); +} +__DEVICE__ unsigned int __urhadd(unsigned int __a, unsigned int __b) { + return __nv_urhadd(__a, __b); +} +__DEVICE__ unsigned int __usad(unsigned int __a, unsigned int __b, + unsigned int __c) { + return __nv_usad(__a, __b, __c); +} + +#if CUDA_VERSION >= 9000 && CUDA_VERSION < 9020 +__DEVICE__ unsigned int __vabs2(unsigned int __a) { return __nv_vabs2(__a); } +__DEVICE__ unsigned int __vabs4(unsigned int __a) { return __nv_vabs4(__a); } +__DEVICE__ unsigned int __vabsdiffs2(unsigned int __a, unsigned int __b) { + return __nv_vabsdiffs2(__a, __b); +} +__DEVICE__ unsigned int __vabsdiffs4(unsigned int __a, unsigned int __b) { + return __nv_vabsdiffs4(__a, __b); +} +__DEVICE__ unsigned int __vabsdiffu2(unsigned int __a, unsigned int __b) { + return __nv_vabsdiffu2(__a, __b); +} +__DEVICE__ unsigned int __vabsdiffu4(unsigned int __a, unsigned int __b) { + return __nv_vabsdiffu4(__a, __b); +} +__DEVICE__ unsigned int __vabsss2(unsigned int __a) { + return __nv_vabsss2(__a); +} +__DEVICE__ unsigned int __vabsss4(unsigned int __a) { + return __nv_vabsss4(__a); +} +__DEVICE__ unsigned int __vadd2(unsigned int __a, unsigned int __b) { + return __nv_vadd2(__a, __b); +} +__DEVICE__ unsigned int __vadd4(unsigned int __a, unsigned int __b) { + return __nv_vadd4(__a, __b); +} +__DEVICE__ unsigned int __vaddss2(unsigned int __a, unsigned int __b) { + return __nv_vaddss2(__a, __b); +} +__DEVICE__ unsigned int __vaddss4(unsigned int __a, unsigned int __b) { + return __nv_vaddss4(__a, __b); +} +__DEVICE__ unsigned int __vaddus2(unsigned int __a, unsigned int __b) { + return __nv_vaddus2(__a, __b); +} +__DEVICE__ unsigned int __vaddus4(unsigned int __a, unsigned int __b) { + return __nv_vaddus4(__a, __b); +} +__DEVICE__ unsigned int __vavgs2(unsigned int __a, unsigned int __b) { + return __nv_vavgs2(__a, __b); +} +__DEVICE__ unsigned int __vavgs4(unsigned int __a, unsigned int __b) { + return __nv_vavgs4(__a, __b); +} +__DEVICE__ unsigned int __vavgu2(unsigned int __a, unsigned int __b) { + return __nv_vavgu2(__a, __b); +} +__DEVICE__ unsigned int __vavgu4(unsigned int __a, unsigned int __b) { + return __nv_vavgu4(__a, __b); +} +__DEVICE__ unsigned int __vcmpeq2(unsigned int __a, unsigned int __b) { + return __nv_vcmpeq2(__a, __b); +} +__DEVICE__ unsigned int __vcmpeq4(unsigned int __a, unsigned int __b) { + return __nv_vcmpeq4(__a, __b); +} +__DEVICE__ unsigned int __vcmpges2(unsigned int __a, unsigned int __b) { + return __nv_vcmpges2(__a, __b); +} +__DEVICE__ unsigned int __vcmpges4(unsigned int __a, unsigned int __b) { + return __nv_vcmpges4(__a, __b); +} +__DEVICE__ unsigned int __vcmpgeu2(unsigned int __a, unsigned int __b) { + return __nv_vcmpgeu2(__a, __b); +} +__DEVICE__ unsigned int __vcmpgeu4(unsigned int __a, unsigned int __b) { + return __nv_vcmpgeu4(__a, __b); +} +__DEVICE__ unsigned int __vcmpgts2(unsigned int __a, unsigned int __b) { + return __nv_vcmpgts2(__a, __b); +} +__DEVICE__ unsigned int __vcmpgts4(unsigned int __a, unsigned int __b) { + return __nv_vcmpgts4(__a, __b); +} +__DEVICE__ unsigned int __vcmpgtu2(unsigned int __a, unsigned int __b) { + return __nv_vcmpgtu2(__a, __b); +} +__DEVICE__ unsigned int __vcmpgtu4(unsigned int __a, unsigned int __b) { + return __nv_vcmpgtu4(__a, __b); +} +__DEVICE__ unsigned int __vcmples2(unsigned int __a, unsigned int __b) { + return __nv_vcmples2(__a, __b); +} +__DEVICE__ unsigned int __vcmples4(unsigned int __a, unsigned int __b) { + return __nv_vcmples4(__a, __b); +} +__DEVICE__ unsigned int __vcmpleu2(unsigned int __a, unsigned int __b) { + return __nv_vcmpleu2(__a, __b); +} +__DEVICE__ unsigned int __vcmpleu4(unsigned int __a, unsigned int __b) { + return __nv_vcmpleu4(__a, __b); +} +__DEVICE__ unsigned int __vcmplts2(unsigned int __a, unsigned int __b) { + return __nv_vcmplts2(__a, __b); +} +__DEVICE__ unsigned int __vcmplts4(unsigned int __a, unsigned int __b) { + return __nv_vcmplts4(__a, __b); +} +__DEVICE__ unsigned int __vcmpltu2(unsigned int __a, unsigned int __b) { + return __nv_vcmpltu2(__a, __b); +} +__DEVICE__ unsigned int __vcmpltu4(unsigned int __a, unsigned int __b) { + return __nv_vcmpltu4(__a, __b); +} +__DEVICE__ unsigned int __vcmpne2(unsigned int __a, unsigned int __b) { + return __nv_vcmpne2(__a, __b); +} +__DEVICE__ unsigned int __vcmpne4(unsigned int __a, unsigned int __b) { + return __nv_vcmpne4(__a, __b); +} +__DEVICE__ unsigned int __vhaddu2(unsigned int __a, unsigned int __b) { + return __nv_vhaddu2(__a, __b); +} +__DEVICE__ unsigned int __vhaddu4(unsigned int __a, unsigned int __b) { + return __nv_vhaddu4(__a, __b); +} +__DEVICE__ unsigned int __vmaxs2(unsigned int __a, unsigned int __b) { + return __nv_vmaxs2(__a, __b); +} +__DEVICE__ unsigned int __vmaxs4(unsigned int __a, unsigned int __b) { + return __nv_vmaxs4(__a, __b); +} +__DEVICE__ unsigned int __vmaxu2(unsigned int __a, unsigned int __b) { + return __nv_vmaxu2(__a, __b); +} +__DEVICE__ unsigned int __vmaxu4(unsigned int __a, unsigned int __b) { + return __nv_vmaxu4(__a, __b); +} +__DEVICE__ unsigned int __vmins2(unsigned int __a, unsigned int __b) { + return __nv_vmins2(__a, __b); +} +__DEVICE__ unsigned int __vmins4(unsigned int __a, unsigned int __b) { + return __nv_vmins4(__a, __b); +} +__DEVICE__ unsigned int __vminu2(unsigned int __a, unsigned int __b) { + return __nv_vminu2(__a, __b); +} +__DEVICE__ unsigned int __vminu4(unsigned int __a, unsigned int __b) { + return __nv_vminu4(__a, __b); +} +__DEVICE__ unsigned int __vneg2(unsigned int __a) { return __nv_vneg2(__a); } +__DEVICE__ unsigned int __vneg4(unsigned int __a) { return __nv_vneg4(__a); } +__DEVICE__ unsigned int __vnegss2(unsigned int __a) { + return __nv_vnegss2(__a); +} +__DEVICE__ unsigned int __vnegss4(unsigned int __a) { + return __nv_vnegss4(__a); +} +__DEVICE__ unsigned int __vsads2(unsigned int __a, unsigned int __b) { + return __nv_vsads2(__a, __b); +} +__DEVICE__ unsigned int __vsads4(unsigned int __a, unsigned int __b) { + return __nv_vsads4(__a, __b); +} +__DEVICE__ unsigned int __vsadu2(unsigned int __a, unsigned int __b) { + return __nv_vsadu2(__a, __b); +} +__DEVICE__ unsigned int __vsadu4(unsigned int __a, unsigned int __b) { + return __nv_vsadu4(__a, __b); +} +__DEVICE__ unsigned int __vseteq2(unsigned int __a, unsigned int __b) { + return __nv_vseteq2(__a, __b); +} +__DEVICE__ unsigned int __vseteq4(unsigned int __a, unsigned int __b) { + return __nv_vseteq4(__a, __b); +} +__DEVICE__ unsigned int __vsetges2(unsigned int __a, unsigned int __b) { + return __nv_vsetges2(__a, __b); +} +__DEVICE__ unsigned int __vsetges4(unsigned int __a, unsigned int __b) { + return __nv_vsetges4(__a, __b); +} +__DEVICE__ unsigned int __vsetgeu2(unsigned int __a, unsigned int __b) { + return __nv_vsetgeu2(__a, __b); +} +__DEVICE__ unsigned int __vsetgeu4(unsigned int __a, unsigned int __b) { + return __nv_vsetgeu4(__a, __b); +} +__DEVICE__ unsigned int __vsetgts2(unsigned int __a, unsigned int __b) { + return __nv_vsetgts2(__a, __b); +} +__DEVICE__ unsigned int __vsetgts4(unsigned int __a, unsigned int __b) { + return __nv_vsetgts4(__a, __b); +} +__DEVICE__ unsigned int __vsetgtu2(unsigned int __a, unsigned int __b) { + return __nv_vsetgtu2(__a, __b); +} +__DEVICE__ unsigned int __vsetgtu4(unsigned int __a, unsigned int __b) { + return __nv_vsetgtu4(__a, __b); +} +__DEVICE__ unsigned int __vsetles2(unsigned int __a, unsigned int __b) { + return __nv_vsetles2(__a, __b); +} +__DEVICE__ unsigned int __vsetles4(unsigned int __a, unsigned int __b) { + return __nv_vsetles4(__a, __b); +} +__DEVICE__ unsigned int __vsetleu2(unsigned int __a, unsigned int __b) { + return __nv_vsetleu2(__a, __b); +} +__DEVICE__ unsigned int __vsetleu4(unsigned int __a, unsigned int __b) { + return __nv_vsetleu4(__a, __b); +} +__DEVICE__ unsigned int __vsetlts2(unsigned int __a, unsigned int __b) { + return __nv_vsetlts2(__a, __b); +} +__DEVICE__ unsigned int __vsetlts4(unsigned int __a, unsigned int __b) { + return __nv_vsetlts4(__a, __b); +} +__DEVICE__ unsigned int __vsetltu2(unsigned int __a, unsigned int __b) { + return __nv_vsetltu2(__a, __b); +} +__DEVICE__ unsigned int __vsetltu4(unsigned int __a, unsigned int __b) { + return __nv_vsetltu4(__a, __b); +} +__DEVICE__ unsigned int __vsetne2(unsigned int __a, unsigned int __b) { + return __nv_vsetne2(__a, __b); +} +__DEVICE__ unsigned int __vsetne4(unsigned int __a, unsigned int __b) { + return __nv_vsetne4(__a, __b); +} +__DEVICE__ unsigned int __vsub2(unsigned int __a, unsigned int __b) { + return __nv_vsub2(__a, __b); +} +__DEVICE__ unsigned int __vsub4(unsigned int __a, unsigned int __b) { + return __nv_vsub4(__a, __b); +} +__DEVICE__ unsigned int __vsubss2(unsigned int __a, unsigned int __b) { + return __nv_vsubss2(__a, __b); +} +__DEVICE__ unsigned int __vsubss4(unsigned int __a, unsigned int __b) { + return __nv_vsubss4(__a, __b); +} +__DEVICE__ unsigned int __vsubus2(unsigned int __a, unsigned int __b) { + return __nv_vsubus2(__a, __b); +} +__DEVICE__ unsigned int __vsubus4(unsigned int __a, unsigned int __b) { + return __nv_vsubus4(__a, __b); +} +#else // CUDA_VERSION >= 9020 +// CUDA no longer provides inline assembly (or bitcode) implementation of these +// functions, so we have to reimplment them. The implementation is naive and is +// not optimized for performance. + +// Helper function to convert N-bit boolean subfields into all-0 or all-1. +// E.g. __bool2mask(0x01000100,8) -> 0xff00ff00 +// __bool2mask(0x00010000,16) -> 0xffff0000 +__DEVICE__ unsigned int __bool2mask(unsigned int __a, int shift) { + return (__a << shift) - __a; +} +__DEVICE__ unsigned int __vabs2(unsigned int __a) { + unsigned int r; + __asm__("vabsdiff2.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(0), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vabs4(unsigned int __a) { + unsigned int r; + __asm__("vabsdiff4.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(0), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vabsdiffs2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff2.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} + +__DEVICE__ unsigned int __vabsdiffs4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff4.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vabsdiffu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff2.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vabsdiffu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff4.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vabsss2(unsigned int __a) { + unsigned int r; + __asm__("vabsdiff2.s32.s32.s32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(0), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vabsss4(unsigned int __a) { + unsigned int r; + __asm__("vabsdiff4.s32.s32.s32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(0), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vadd2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vadd2.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vadd4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vadd4.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vaddss2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vadd2.s32.s32.s32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vaddss4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vadd4.s32.s32.s32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vaddus2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vadd2.u32.u32.u32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vaddus4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vadd4.u32.u32.u32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vavgs2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vavrg2.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vavgs4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vavrg4.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vavgu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vavrg2.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vavgu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vavrg4.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vseteq2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.u32.u32.eq %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpeq2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vseteq2(__a, __b), 16); +} +__DEVICE__ unsigned int __vseteq4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.u32.u32.eq %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpeq4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vseteq4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetges2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.s32.s32.ge %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpges2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetges2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetges4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.s32.s32.ge %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpges4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetges4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetgeu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.u32.u32.ge %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpgeu2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetgeu2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetgeu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.u32.u32.ge %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpgeu4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetgeu4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetgts2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.s32.s32.gt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpgts2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetgts2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetgts4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.s32.s32.gt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpgts4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetgts4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetgtu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.u32.u32.gt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpgtu2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetgtu2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetgtu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.u32.u32.gt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpgtu4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetgtu4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetles2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.s32.s32.le %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmples2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetles2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetles4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.s32.s32.le %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmples4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetles4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetleu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.u32.u32.le %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpleu2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetleu2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetleu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.u32.u32.le %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpleu4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetleu4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetlts2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.s32.s32.lt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmplts2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetlts2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetlts4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.s32.s32.lt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmplts4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetlts4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetltu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.u32.u32.lt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpltu2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetltu2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetltu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.u32.u32.lt %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpltu4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetltu4(__a, __b), 8); +} +__DEVICE__ unsigned int __vsetne2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset2.u32.u32.ne %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpne2(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetne2(__a, __b), 16); +} +__DEVICE__ unsigned int __vsetne4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vset4.u32.u32.ne %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vcmpne4(unsigned int __a, unsigned int __b) { + return __bool2mask(__vsetne4(__a, __b), 8); +} + +// Based on ITEM 23 in AIM-239: http://dspace.mit.edu/handle/1721.1/6086 +// (a & b) + (a | b) = a + b = (a ^ b) + 2 * (a & b) => +// (a + b) / 2 = ((a ^ b) >> 1) + (a & b) +// To operate on multiple sub-elements we need to make sure to mask out bits +// that crossed over into adjacent elements during the shift. +__DEVICE__ unsigned int __vhaddu2(unsigned int __a, unsigned int __b) { + return (((__a ^ __b) >> 1) & ~0x80008000u) + (__a & __b); +} +__DEVICE__ unsigned int __vhaddu4(unsigned int __a, unsigned int __b) { + return (((__a ^ __b) >> 1) & ~0x80808080u) + (__a & __b); +} + +__DEVICE__ unsigned int __vmaxs2(unsigned int __a, unsigned int __b) { + unsigned int r; + if ((__a & 0x8000) && (__b & 0x8000)) { + // Work around a bug in ptxas which produces invalid result if low element + // is negative. + unsigned mask = __vcmpgts2(__a, __b); + r = (__a & mask) | (__b & ~mask); + } else { + __asm__("vmax2.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + } + return r; +} +__DEVICE__ unsigned int __vmaxs4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmax4.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vmaxu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmax2.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vmaxu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmax4.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vmins2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmin2.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vmins4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmin4.s32.s32.s32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vminu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmin2.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vminu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vmin4.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vsads2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff2.s32.s32.s32.add %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vsads4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff4.s32.s32.s32.add %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vsadu2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff2.u32.u32.u32.add %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vsadu4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vabsdiff4.u32.u32.u32.add %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} + +__DEVICE__ unsigned int __vsub2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vsub2.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vneg2(unsigned int __a) { return __vsub2(0, __a); } + +__DEVICE__ unsigned int __vsub4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vsub4.u32.u32.u32 %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vneg4(unsigned int __a) { return __vsub4(0, __a); } +__DEVICE__ unsigned int __vsubss2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vsub2.s32.s32.s32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vnegss2(unsigned int __a) { + return __vsubss2(0, __a); +} +__DEVICE__ unsigned int __vsubss4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vsub4.s32.s32.s32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vnegss4(unsigned int __a) { + return __vsubss4(0, __a); +} +__DEVICE__ unsigned int __vsubus2(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vsub2.u32.u32.u32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +__DEVICE__ unsigned int __vsubus4(unsigned int __a, unsigned int __b) { + unsigned int r; + __asm__("vsub4.u32.u32.u32.sat %0,%1,%2,%3;" + : "=r"(r) + : "r"(__a), "r"(__b), "r"(0)); + return r; +} +#endif // CUDA_VERSION >= 9020 + +// For OpenMP we require the user to include as we need to know what +// clock_t is on the system. +#ifndef __OPENMP_NVPTX__ +__DEVICE__ /* clock_t= */ int clock() { return __nvvm_read_ptx_sreg_clock(); } +#endif +__DEVICE__ long long clock64() { return __nvvm_read_ptx_sreg_clock64(); } + +// These functions shouldn't be declared when including this header +// for math function resolution purposes. +#ifndef __OPENMP_NVPTX__ +__DEVICE__ void *memcpy(void *__a, const void *__b, size_t __c) { + return __builtin_memcpy(__a, __b, __c); +} +__DEVICE__ void *memset(void *__a, int __b, size_t __c) { + return __builtin_memset(__a, __b, __c); +} +#endif + +#pragma pop_macro("__DEVICE__") +#endif // __CLANG_CUDA_DEVICE_FUNCTIONS_H__ diff --git a/llvm/lib/clang/19/include/__clang_cuda_intrinsics.h b/llvm/lib/clang/19/include/__clang_cuda_intrinsics.h new file mode 100644 index 0000000000000000000000000000000000000000..a04e8b6de44d053ae3f14dc0e79fe7e3a744ae9b --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_intrinsics.h @@ -0,0 +1,707 @@ +/*===--- __clang_cuda_intrinsics.h - Device-side CUDA intrinsic wrappers ---=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CLANG_CUDA_INTRINSICS_H__ +#define __CLANG_CUDA_INTRINSICS_H__ +#ifndef __CUDA__ +#error "This file is for CUDA compilation only." +#endif + +// sm_30 intrinsics: __shfl_{up,down,xor}. + +#define __SM_30_INTRINSICS_H__ +#define __SM_30_INTRINSICS_HPP__ + +#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300 + +#pragma push_macro("__MAKE_SHUFFLES") +#define __MAKE_SHUFFLES(__FnName, __IntIntrinsic, __FloatIntrinsic, __Mask, \ + __Type) \ + inline __device__ int __FnName(int __val, __Type __offset, \ + int __width = warpSize) { \ + return __IntIntrinsic(__val, __offset, \ + ((warpSize - __width) << 8) | (__Mask)); \ + } \ + inline __device__ float __FnName(float __val, __Type __offset, \ + int __width = warpSize) { \ + return __FloatIntrinsic(__val, __offset, \ + ((warpSize - __width) << 8) | (__Mask)); \ + } \ + inline __device__ unsigned int __FnName(unsigned int __val, __Type __offset, \ + int __width = warpSize) { \ + return static_cast( \ + ::__FnName(static_cast(__val), __offset, __width)); \ + } \ + inline __device__ long long __FnName(long long __val, __Type __offset, \ + int __width = warpSize) { \ + struct __Bits { \ + int __a, __b; \ + }; \ + _Static_assert(sizeof(__val) == sizeof(__Bits)); \ + _Static_assert(sizeof(__Bits) == 2 * sizeof(int)); \ + __Bits __tmp; \ + memcpy(&__tmp, &__val, sizeof(__val)); \ + __tmp.__a = ::__FnName(__tmp.__a, __offset, __width); \ + __tmp.__b = ::__FnName(__tmp.__b, __offset, __width); \ + long long __ret; \ + memcpy(&__ret, &__tmp, sizeof(__tmp)); \ + return __ret; \ + } \ + inline __device__ long __FnName(long __val, __Type __offset, \ + int __width = warpSize) { \ + _Static_assert(sizeof(long) == sizeof(long long) || \ + sizeof(long) == sizeof(int)); \ + if (sizeof(long) == sizeof(long long)) { \ + return static_cast( \ + ::__FnName(static_cast(__val), __offset, __width)); \ + } else if (sizeof(long) == sizeof(int)) { \ + return static_cast( \ + ::__FnName(static_cast(__val), __offset, __width)); \ + } \ + } \ + inline __device__ unsigned long __FnName( \ + unsigned long __val, __Type __offset, int __width = warpSize) { \ + return static_cast( \ + ::__FnName(static_cast(__val), __offset, __width)); \ + } \ + inline __device__ unsigned long long __FnName( \ + unsigned long long __val, __Type __offset, int __width = warpSize) { \ + return static_cast( \ + ::__FnName(static_cast(__val), __offset, __width)); \ + } \ + inline __device__ double __FnName(double __val, __Type __offset, \ + int __width = warpSize) { \ + long long __tmp; \ + _Static_assert(sizeof(__tmp) == sizeof(__val)); \ + memcpy(&__tmp, &__val, sizeof(__val)); \ + __tmp = ::__FnName(__tmp, __offset, __width); \ + double __ret; \ + memcpy(&__ret, &__tmp, sizeof(__ret)); \ + return __ret; \ + } + +__MAKE_SHUFFLES(__shfl, __nvvm_shfl_idx_i32, __nvvm_shfl_idx_f32, 0x1f, int); +// We use 0 rather than 31 as our mask, because shfl.up applies to lanes >= +// maxLane. +__MAKE_SHUFFLES(__shfl_up, __nvvm_shfl_up_i32, __nvvm_shfl_up_f32, 0, + unsigned int); +__MAKE_SHUFFLES(__shfl_down, __nvvm_shfl_down_i32, __nvvm_shfl_down_f32, 0x1f, + unsigned int); +__MAKE_SHUFFLES(__shfl_xor, __nvvm_shfl_bfly_i32, __nvvm_shfl_bfly_f32, 0x1f, + int); +#pragma pop_macro("__MAKE_SHUFFLES") + +#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300 + +#if CUDA_VERSION >= 9000 +#if (!defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300) +// __shfl_sync_* variants available in CUDA-9 +#pragma push_macro("__MAKE_SYNC_SHUFFLES") +#define __MAKE_SYNC_SHUFFLES(__FnName, __IntIntrinsic, __FloatIntrinsic, \ + __Mask, __Type) \ + inline __device__ int __FnName(unsigned int __mask, int __val, \ + __Type __offset, int __width = warpSize) { \ + return __IntIntrinsic(__mask, __val, __offset, \ + ((warpSize - __width) << 8) | (__Mask)); \ + } \ + inline __device__ float __FnName(unsigned int __mask, float __val, \ + __Type __offset, int __width = warpSize) { \ + return __FloatIntrinsic(__mask, __val, __offset, \ + ((warpSize - __width) << 8) | (__Mask)); \ + } \ + inline __device__ unsigned int __FnName(unsigned int __mask, \ + unsigned int __val, __Type __offset, \ + int __width = warpSize) { \ + return static_cast( \ + ::__FnName(__mask, static_cast(__val), __offset, __width)); \ + } \ + inline __device__ long long __FnName(unsigned int __mask, long long __val, \ + __Type __offset, \ + int __width = warpSize) { \ + struct __Bits { \ + int __a, __b; \ + }; \ + _Static_assert(sizeof(__val) == sizeof(__Bits)); \ + _Static_assert(sizeof(__Bits) == 2 * sizeof(int)); \ + __Bits __tmp; \ + memcpy(&__tmp, &__val, sizeof(__val)); \ + __tmp.__a = ::__FnName(__mask, __tmp.__a, __offset, __width); \ + __tmp.__b = ::__FnName(__mask, __tmp.__b, __offset, __width); \ + long long __ret; \ + memcpy(&__ret, &__tmp, sizeof(__tmp)); \ + return __ret; \ + } \ + inline __device__ unsigned long long __FnName( \ + unsigned int __mask, unsigned long long __val, __Type __offset, \ + int __width = warpSize) { \ + return static_cast( \ + ::__FnName(__mask, static_cast(__val), __offset, __width)); \ + } \ + inline __device__ long __FnName(unsigned int __mask, long __val, \ + __Type __offset, int __width = warpSize) { \ + _Static_assert(sizeof(long) == sizeof(long long) || \ + sizeof(long) == sizeof(int)); \ + if (sizeof(long) == sizeof(long long)) { \ + return static_cast(::__FnName( \ + __mask, static_cast(__val), __offset, __width)); \ + } else if (sizeof(long) == sizeof(int)) { \ + return static_cast( \ + ::__FnName(__mask, static_cast(__val), __offset, __width)); \ + } \ + } \ + inline __device__ unsigned long __FnName( \ + unsigned int __mask, unsigned long __val, __Type __offset, \ + int __width = warpSize) { \ + return static_cast( \ + ::__FnName(__mask, static_cast(__val), __offset, __width)); \ + } \ + inline __device__ double __FnName(unsigned int __mask, double __val, \ + __Type __offset, int __width = warpSize) { \ + long long __tmp; \ + _Static_assert(sizeof(__tmp) == sizeof(__val)); \ + memcpy(&__tmp, &__val, sizeof(__val)); \ + __tmp = ::__FnName(__mask, __tmp, __offset, __width); \ + double __ret; \ + memcpy(&__ret, &__tmp, sizeof(__ret)); \ + return __ret; \ + } +__MAKE_SYNC_SHUFFLES(__shfl_sync, __nvvm_shfl_sync_idx_i32, + __nvvm_shfl_sync_idx_f32, 0x1f, int); +// We use 0 rather than 31 as our mask, because shfl.up applies to lanes >= +// maxLane. +__MAKE_SYNC_SHUFFLES(__shfl_up_sync, __nvvm_shfl_sync_up_i32, + __nvvm_shfl_sync_up_f32, 0, unsigned int); +__MAKE_SYNC_SHUFFLES(__shfl_down_sync, __nvvm_shfl_sync_down_i32, + __nvvm_shfl_sync_down_f32, 0x1f, unsigned int); +__MAKE_SYNC_SHUFFLES(__shfl_xor_sync, __nvvm_shfl_sync_bfly_i32, + __nvvm_shfl_sync_bfly_f32, 0x1f, int); +#pragma pop_macro("__MAKE_SYNC_SHUFFLES") + +inline __device__ void __syncwarp(unsigned int mask = 0xffffffff) { + return __nvvm_bar_warp_sync(mask); +} + +inline __device__ void __barrier_sync(unsigned int id) { + __nvvm_barrier_sync(id); +} + +inline __device__ void __barrier_sync_count(unsigned int id, + unsigned int count) { + __nvvm_barrier_sync_cnt(id, count); +} + +inline __device__ int __all_sync(unsigned int mask, int pred) { + return __nvvm_vote_all_sync(mask, pred); +} + +inline __device__ int __any_sync(unsigned int mask, int pred) { + return __nvvm_vote_any_sync(mask, pred); +} + +inline __device__ int __uni_sync(unsigned int mask, int pred) { + return __nvvm_vote_uni_sync(mask, pred); +} + +inline __device__ unsigned int __ballot_sync(unsigned int mask, int pred) { + return __nvvm_vote_ballot_sync(mask, pred); +} + +inline __device__ unsigned int __activemask() { +#if CUDA_VERSION < 9020 + return __nvvm_vote_ballot(1); +#else + return __nvvm_activemask(); +#endif +} + +inline __device__ unsigned int __fns(unsigned mask, unsigned base, int offset) { + return __nvvm_fns(mask, base, offset); +} + +#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 300 + +// Define __match* builtins CUDA-9 headers expect to see. +#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 700 +inline __device__ unsigned int __match32_any_sync(unsigned int mask, + unsigned int value) { + return __nvvm_match_any_sync_i32(mask, value); +} + +inline __device__ unsigned int +__match64_any_sync(unsigned int mask, unsigned long long value) { + return __nvvm_match_any_sync_i64(mask, value); +} + +inline __device__ unsigned int +__match32_all_sync(unsigned int mask, unsigned int value, int *pred) { + return __nvvm_match_all_sync_i32p(mask, value, pred); +} + +inline __device__ unsigned int +__match64_all_sync(unsigned int mask, unsigned long long value, int *pred) { + return __nvvm_match_all_sync_i64p(mask, value, pred); +} +#include "crt/sm_70_rt.hpp" + +#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 700 +#endif // __CUDA_VERSION >= 9000 + +// sm_32 intrinsics: __ldg and __funnelshift_{l,lc,r,rc}. + +// Prevent the vanilla sm_32 intrinsics header from being included. +#define __SM_32_INTRINSICS_H__ +#define __SM_32_INTRINSICS_HPP__ + +#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 320 + +inline __device__ char __ldg(const char *ptr) { return __nvvm_ldg_c(ptr); } +inline __device__ short __ldg(const short *ptr) { return __nvvm_ldg_s(ptr); } +inline __device__ int __ldg(const int *ptr) { return __nvvm_ldg_i(ptr); } +inline __device__ long __ldg(const long *ptr) { return __nvvm_ldg_l(ptr); } +inline __device__ long long __ldg(const long long *ptr) { + return __nvvm_ldg_ll(ptr); +} +inline __device__ unsigned char __ldg(const unsigned char *ptr) { + return __nvvm_ldg_uc(ptr); +} +inline __device__ signed char __ldg(const signed char *ptr) { + return __nvvm_ldg_uc((const unsigned char *)ptr); +} +inline __device__ unsigned short __ldg(const unsigned short *ptr) { + return __nvvm_ldg_us(ptr); +} +inline __device__ unsigned int __ldg(const unsigned int *ptr) { + return __nvvm_ldg_ui(ptr); +} +inline __device__ unsigned long __ldg(const unsigned long *ptr) { + return __nvvm_ldg_ul(ptr); +} +inline __device__ unsigned long long __ldg(const unsigned long long *ptr) { + return __nvvm_ldg_ull(ptr); +} +inline __device__ float __ldg(const float *ptr) { return __nvvm_ldg_f(ptr); } +inline __device__ double __ldg(const double *ptr) { return __nvvm_ldg_d(ptr); } + +inline __device__ char2 __ldg(const char2 *ptr) { + typedef char c2 __attribute__((ext_vector_type(2))); + // We can assume that ptr is aligned at least to char2's alignment, but the + // load will assume that ptr is aligned to char2's alignment. This is only + // safe if alignof(c2) <= alignof(char2). + c2 rv = __nvvm_ldg_c2(reinterpret_cast(ptr)); + char2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ char4 __ldg(const char4 *ptr) { + typedef char c4 __attribute__((ext_vector_type(4))); + c4 rv = __nvvm_ldg_c4(reinterpret_cast(ptr)); + char4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ short2 __ldg(const short2 *ptr) { + typedef short s2 __attribute__((ext_vector_type(2))); + s2 rv = __nvvm_ldg_s2(reinterpret_cast(ptr)); + short2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ short4 __ldg(const short4 *ptr) { + typedef short s4 __attribute__((ext_vector_type(4))); + s4 rv = __nvvm_ldg_s4(reinterpret_cast(ptr)); + short4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ int2 __ldg(const int2 *ptr) { + typedef int i2 __attribute__((ext_vector_type(2))); + i2 rv = __nvvm_ldg_i2(reinterpret_cast(ptr)); + int2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ int4 __ldg(const int4 *ptr) { + typedef int i4 __attribute__((ext_vector_type(4))); + i4 rv = __nvvm_ldg_i4(reinterpret_cast(ptr)); + int4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ longlong2 __ldg(const longlong2 *ptr) { + typedef long long ll2 __attribute__((ext_vector_type(2))); + ll2 rv = __nvvm_ldg_ll2(reinterpret_cast(ptr)); + longlong2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} + +inline __device__ uchar2 __ldg(const uchar2 *ptr) { + typedef unsigned char uc2 __attribute__((ext_vector_type(2))); + uc2 rv = __nvvm_ldg_uc2(reinterpret_cast(ptr)); + uchar2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ uchar4 __ldg(const uchar4 *ptr) { + typedef unsigned char uc4 __attribute__((ext_vector_type(4))); + uc4 rv = __nvvm_ldg_uc4(reinterpret_cast(ptr)); + uchar4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ ushort2 __ldg(const ushort2 *ptr) { + typedef unsigned short us2 __attribute__((ext_vector_type(2))); + us2 rv = __nvvm_ldg_us2(reinterpret_cast(ptr)); + ushort2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ ushort4 __ldg(const ushort4 *ptr) { + typedef unsigned short us4 __attribute__((ext_vector_type(4))); + us4 rv = __nvvm_ldg_us4(reinterpret_cast(ptr)); + ushort4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ uint2 __ldg(const uint2 *ptr) { + typedef unsigned int ui2 __attribute__((ext_vector_type(2))); + ui2 rv = __nvvm_ldg_ui2(reinterpret_cast(ptr)); + uint2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ uint4 __ldg(const uint4 *ptr) { + typedef unsigned int ui4 __attribute__((ext_vector_type(4))); + ui4 rv = __nvvm_ldg_ui4(reinterpret_cast(ptr)); + uint4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ ulonglong2 __ldg(const ulonglong2 *ptr) { + typedef unsigned long long ull2 __attribute__((ext_vector_type(2))); + ull2 rv = __nvvm_ldg_ull2(reinterpret_cast(ptr)); + ulonglong2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} + +inline __device__ float2 __ldg(const float2 *ptr) { + typedef float f2 __attribute__((ext_vector_type(2))); + f2 rv = __nvvm_ldg_f2(reinterpret_cast(ptr)); + float2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} +inline __device__ float4 __ldg(const float4 *ptr) { + typedef float f4 __attribute__((ext_vector_type(4))); + f4 rv = __nvvm_ldg_f4(reinterpret_cast(ptr)); + float4 ret; + ret.x = rv[0]; + ret.y = rv[1]; + ret.z = rv[2]; + ret.w = rv[3]; + return ret; +} +inline __device__ double2 __ldg(const double2 *ptr) { + typedef double d2 __attribute__((ext_vector_type(2))); + d2 rv = __nvvm_ldg_d2(reinterpret_cast(ptr)); + double2 ret; + ret.x = rv[0]; + ret.y = rv[1]; + return ret; +} + +// TODO: Implement these as intrinsics, so the backend can work its magic on +// these. Alternatively, we could implement these as plain C and try to get +// llvm to recognize the relevant patterns. +inline __device__ unsigned __funnelshift_l(unsigned low32, unsigned high32, + unsigned shiftWidth) { + unsigned result; + asm("shf.l.wrap.b32 %0, %1, %2, %3;" + : "=r"(result) + : "r"(low32), "r"(high32), "r"(shiftWidth)); + return result; +} +inline __device__ unsigned __funnelshift_lc(unsigned low32, unsigned high32, + unsigned shiftWidth) { + unsigned result; + asm("shf.l.clamp.b32 %0, %1, %2, %3;" + : "=r"(result) + : "r"(low32), "r"(high32), "r"(shiftWidth)); + return result; +} +inline __device__ unsigned __funnelshift_r(unsigned low32, unsigned high32, + unsigned shiftWidth) { + unsigned result; + asm("shf.r.wrap.b32 %0, %1, %2, %3;" + : "=r"(result) + : "r"(low32), "r"(high32), "r"(shiftWidth)); + return result; +} +inline __device__ unsigned __funnelshift_rc(unsigned low32, unsigned high32, + unsigned shiftWidth) { + unsigned ret; + asm("shf.r.clamp.b32 %0, %1, %2, %3;" + : "=r"(ret) + : "r"(low32), "r"(high32), "r"(shiftWidth)); + return ret; +} + +#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 320 + +#if CUDA_VERSION >= 11000 +extern "C" { +__device__ inline size_t __nv_cvta_generic_to_global_impl(const void *__ptr) { + return (size_t)(void __attribute__((address_space(1))) *)__ptr; +} +__device__ inline size_t __nv_cvta_generic_to_shared_impl(const void *__ptr) { + return (size_t)(void __attribute__((address_space(3))) *)__ptr; +} +__device__ inline size_t __nv_cvta_generic_to_constant_impl(const void *__ptr) { + return (size_t)(void __attribute__((address_space(4))) *)__ptr; +} +__device__ inline size_t __nv_cvta_generic_to_local_impl(const void *__ptr) { + return (size_t)(void __attribute__((address_space(5))) *)__ptr; +} +__device__ inline void *__nv_cvta_global_to_generic_impl(size_t __ptr) { + return (void *)(void __attribute__((address_space(1))) *)__ptr; +} +__device__ inline void *__nv_cvta_shared_to_generic_impl(size_t __ptr) { + return (void *)(void __attribute__((address_space(3))) *)__ptr; +} +__device__ inline void *__nv_cvta_constant_to_generic_impl(size_t __ptr) { + return (void *)(void __attribute__((address_space(4))) *)__ptr; +} +__device__ inline void *__nv_cvta_local_to_generic_impl(size_t __ptr) { + return (void *)(void __attribute__((address_space(5))) *)__ptr; +} +__device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) { + return __nv_cvta_generic_to_shared_impl(__ptr); +} +} // extern "C" + +#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800 +__device__ inline unsigned __reduce_add_sync(unsigned __mask, + unsigned __value) { + return __nvvm_redux_sync_add(__mask, __value); +} +__device__ inline unsigned __reduce_min_sync(unsigned __mask, + unsigned __value) { + return __nvvm_redux_sync_umin(__mask, __value); +} +__device__ inline unsigned __reduce_max_sync(unsigned __mask, + unsigned __value) { + return __nvvm_redux_sync_umax(__mask, __value); +} +__device__ inline int __reduce_min_sync(unsigned __mask, int __value) { + return __nvvm_redux_sync_min(__mask, __value); +} +__device__ inline int __reduce_max_sync(unsigned __mask, int __value) { + return __nvvm_redux_sync_max(__mask, __value); +} +__device__ inline unsigned __reduce_or_sync(unsigned __mask, unsigned __value) { + return __nvvm_redux_sync_or(__mask, __value); +} +__device__ inline unsigned __reduce_and_sync(unsigned __mask, + unsigned __value) { + return __nvvm_redux_sync_and(__mask, __value); +} +__device__ inline unsigned __reduce_xor_sync(unsigned __mask, + unsigned __value) { + return __nvvm_redux_sync_xor(__mask, __value); +} + +__device__ inline void __nv_memcpy_async_shared_global_4(void *__dst, + const void *__src, + unsigned __src_size) { + __nvvm_cp_async_ca_shared_global_4( + (void __attribute__((address_space(3))) *)__dst, + (const void __attribute__((address_space(1))) *)__src, __src_size); +} +__device__ inline void __nv_memcpy_async_shared_global_8(void *__dst, + const void *__src, + unsigned __src_size) { + __nvvm_cp_async_ca_shared_global_8( + (void __attribute__((address_space(3))) *)__dst, + (const void __attribute__((address_space(1))) *)__src, __src_size); +} +__device__ inline void __nv_memcpy_async_shared_global_16(void *__dst, + const void *__src, + unsigned __src_size) { + __nvvm_cp_async_ca_shared_global_16( + (void __attribute__((address_space(3))) *)__dst, + (const void __attribute__((address_space(1))) *)__src, __src_size); +} + +__device__ inline void * +__nv_associate_access_property(const void *__ptr, unsigned long long __prop) { + // TODO: it appears to provide compiler with some sort of a hint. We do not + // know what exactly it is supposed to do. However, CUDA headers suggest that + // just passing through __ptr should not affect correctness. They do so on + // pre-sm80 GPUs where this builtin is not available. + return (void*)__ptr; +} +#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800 + +#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 900 +__device__ inline unsigned __isCtaShared(const void *ptr) { + return __isShared(ptr); +} + +__device__ inline unsigned __isClusterShared(const void *__ptr) { + return __nvvm_isspacep_shared_cluster(__ptr); +} + +__device__ inline void *__cluster_map_shared_rank(const void *__ptr, + unsigned __rank) { + return __nvvm_mapa((void *)__ptr, __rank); +} + +__device__ inline unsigned __cluster_query_shared_rank(const void *__ptr) { + return __nvvm_getctarank((void *)__ptr); +} + +__device__ inline uint2 +__cluster_map_shared_multicast(const void *__ptr, + unsigned int __cluster_cta_mask) { + return make_uint2((unsigned)__cvta_generic_to_shared(__ptr), + __cluster_cta_mask); +} + +__device__ inline unsigned __clusterDimIsSpecified() { + return __nvvm_is_explicit_cluster(); +} + +__device__ inline dim3 __clusterDim() { + return dim3(__nvvm_read_ptx_sreg_cluster_nctaid_x(), + __nvvm_read_ptx_sreg_cluster_nctaid_y(), + __nvvm_read_ptx_sreg_cluster_nctaid_z()); +} + +__device__ inline dim3 __clusterRelativeBlockIdx() { + return dim3(__nvvm_read_ptx_sreg_cluster_ctaid_x(), + __nvvm_read_ptx_sreg_cluster_ctaid_y(), + __nvvm_read_ptx_sreg_cluster_ctaid_z()); +} + +__device__ inline dim3 __clusterGridDimInClusters() { + return dim3(__nvvm_read_ptx_sreg_nclusterid_x(), + __nvvm_read_ptx_sreg_nclusterid_y(), + __nvvm_read_ptx_sreg_nclusterid_z()); +} + +__device__ inline dim3 __clusterIdx() { + return dim3(__nvvm_read_ptx_sreg_clusterid_x(), + __nvvm_read_ptx_sreg_clusterid_y(), + __nvvm_read_ptx_sreg_clusterid_z()); +} + +__device__ inline unsigned __clusterRelativeBlockRank() { + return __nvvm_read_ptx_sreg_cluster_ctarank(); +} + +__device__ inline unsigned __clusterSizeInBlocks() { + return __nvvm_read_ptx_sreg_cluster_nctarank(); +} + +__device__ inline void __cluster_barrier_arrive() { + __nvvm_barrier_cluster_arrive(); +} + +__device__ inline void __cluster_barrier_arrive_relaxed() { + __nvvm_barrier_cluster_arrive_relaxed(); +} + +__device__ inline void __cluster_barrier_wait() { + __nvvm_barrier_cluster_wait(); +} + +__device__ inline void __threadfence_cluster() { __nvvm_fence_sc_cluster(); } + +__device__ inline float2 atomicAdd(float2 *__ptr, float2 __val) { + float2 __ret; + __asm__("atom.add.v2.f32 {%0, %1}, [%2], {%3, %4};" + : "=f"(__ret.x), "=f"(__ret.y) + : "l"(__ptr), "f"(__val.x), "f"(__val.y)); + return __ret; +} + +__device__ inline float2 atomicAdd_block(float2 *__ptr, float2 __val) { + float2 __ret; + __asm__("atom.cta.add.v2.f32 {%0, %1}, [%2], {%3, %4};" + : "=f"(__ret.x), "=f"(__ret.y) + : "l"(__ptr), "f"(__val.x), "f"(__val.y)); + return __ret; +} + +__device__ inline float2 atomicAdd_system(float2 *__ptr, float2 __val) { + float2 __ret; + __asm__("atom.sys.add.v2.f32 {%0, %1}, [%2], {%3, %4};" + : "=f"(__ret.x), "=f"(__ret.y) + : "l"(__ptr), "f"(__val.x), "f"(__val.y)); + return __ret; +} + +__device__ inline float4 atomicAdd(float4 *__ptr, float4 __val) { + float4 __ret; + __asm__("atom.add.v4.f32 {%0, %1, %2, %3}, [%4], {%5, %6, %7, %8};" + : "=f"(__ret.x), "=f"(__ret.y), "=f"(__ret.z), "=f"(__ret.w) + : "l"(__ptr), "f"(__val.x), "f"(__val.y), "f"(__val.z), "f"(__val.w)); + return __ret; +} + +__device__ inline float4 atomicAdd_block(float4 *__ptr, float4 __val) { + float4 __ret; + __asm__( + "atom.cta.add.v4.f32 {%0, %1, %2, %3}, [%4], {%5, %6, %7, %8};" + : "=f"(__ret.x), "=f"(__ret.y), "=f"(__ret.z), "=f"(__ret.w) + : "l"(__ptr), "f"(__val.x), "f"(__val.y), "f"(__val.z), "f"(__val.w)); + return __ret; +} + +__device__ inline float4 atomicAdd_system(float4 *__ptr, float4 __val) { + float4 __ret; + __asm__( + "atom.sys.add.v4.f32 {%0, %1, %2, %3}, [%4], {%5, %6, %7, %8};" + : "=f"(__ret.x), "=f"(__ret.y), "=f"(__ret.z), "=f"(__ret.w) + : "l"(__ptr), "f"(__val.x), "f"(__val.y), "f"(__val.z), "f"(__val.w) + :); + return __ret; +} + +#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 900 +#endif // CUDA_VERSION >= 11000 + +#endif // defined(__CLANG_CUDA_INTRINSICS_H__) diff --git a/llvm/lib/clang/19/include/__clang_cuda_libdevice_declares.h b/llvm/lib/clang/19/include/__clang_cuda_libdevice_declares.h new file mode 100644 index 0000000000000000000000000000000000000000..ded0382a7ddceb9310b405ff705074dadd28b0ce --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_libdevice_declares.h @@ -0,0 +1,468 @@ +/*===-- __clang_cuda_libdevice_declares.h - decls for libdevice functions --=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_LIBDEVICE_DECLARES_H__ +#define __CLANG_CUDA_LIBDEVICE_DECLARES_H__ + +#if defined(__cplusplus) +extern "C" { +#endif + +#if defined(__OPENMP_NVPTX__) +#define __DEVICE__ +#pragma omp begin assumes ext_spmd_amenable no_openmp +#elif defined(__CUDA__) +#define __DEVICE__ __device__ +#endif + +__DEVICE__ int __nv_abs(int __a); +__DEVICE__ double __nv_acos(double __a); +__DEVICE__ float __nv_acosf(float __a); +__DEVICE__ double __nv_acosh(double __a); +__DEVICE__ float __nv_acoshf(float __a); +__DEVICE__ double __nv_asin(double __a); +__DEVICE__ float __nv_asinf(float __a); +__DEVICE__ double __nv_asinh(double __a); +__DEVICE__ float __nv_asinhf(float __a); +__DEVICE__ double __nv_atan2(double __a, double __b); +__DEVICE__ float __nv_atan2f(float __a, float __b); +__DEVICE__ double __nv_atan(double __a); +__DEVICE__ float __nv_atanf(float __a); +__DEVICE__ double __nv_atanh(double __a); +__DEVICE__ float __nv_atanhf(float __a); +__DEVICE__ int __nv_brev(int __a); +__DEVICE__ long long __nv_brevll(long long __a); +__DEVICE__ int __nv_byte_perm(int __a, int __b, int __c); +__DEVICE__ double __nv_cbrt(double __a); +__DEVICE__ float __nv_cbrtf(float __a); +__DEVICE__ double __nv_ceil(double __a); +__DEVICE__ float __nv_ceilf(float __a); +__DEVICE__ int __nv_clz(int __a); +__DEVICE__ int __nv_clzll(long long __a); +__DEVICE__ double __nv_copysign(double __a, double __b); +__DEVICE__ float __nv_copysignf(float __a, float __b); +__DEVICE__ double __nv_cos(double __a); +__DEVICE__ float __nv_cosf(float __a); +__DEVICE__ double __nv_cosh(double __a); +__DEVICE__ float __nv_coshf(float __a); +__DEVICE__ double __nv_cospi(double __a); +__DEVICE__ float __nv_cospif(float __a); +__DEVICE__ double __nv_cyl_bessel_i0(double __a); +__DEVICE__ float __nv_cyl_bessel_i0f(float __a); +__DEVICE__ double __nv_cyl_bessel_i1(double __a); +__DEVICE__ float __nv_cyl_bessel_i1f(float __a); +__DEVICE__ double __nv_dadd_rd(double __a, double __b); +__DEVICE__ double __nv_dadd_rn(double __a, double __b); +__DEVICE__ double __nv_dadd_ru(double __a, double __b); +__DEVICE__ double __nv_dadd_rz(double __a, double __b); +__DEVICE__ double __nv_ddiv_rd(double __a, double __b); +__DEVICE__ double __nv_ddiv_rn(double __a, double __b); +__DEVICE__ double __nv_ddiv_ru(double __a, double __b); +__DEVICE__ double __nv_ddiv_rz(double __a, double __b); +__DEVICE__ double __nv_dmul_rd(double __a, double __b); +__DEVICE__ double __nv_dmul_rn(double __a, double __b); +__DEVICE__ double __nv_dmul_ru(double __a, double __b); +__DEVICE__ double __nv_dmul_rz(double __a, double __b); +__DEVICE__ float __nv_double2float_rd(double __a); +__DEVICE__ float __nv_double2float_rn(double __a); +__DEVICE__ float __nv_double2float_ru(double __a); +__DEVICE__ float __nv_double2float_rz(double __a); +__DEVICE__ int __nv_double2hiint(double __a); +__DEVICE__ int __nv_double2int_rd(double __a); +__DEVICE__ int __nv_double2int_rn(double __a); +__DEVICE__ int __nv_double2int_ru(double __a); +__DEVICE__ int __nv_double2int_rz(double __a); +__DEVICE__ long long __nv_double2ll_rd(double __a); +__DEVICE__ long long __nv_double2ll_rn(double __a); +__DEVICE__ long long __nv_double2ll_ru(double __a); +__DEVICE__ long long __nv_double2ll_rz(double __a); +__DEVICE__ int __nv_double2loint(double __a); +__DEVICE__ unsigned int __nv_double2uint_rd(double __a); +__DEVICE__ unsigned int __nv_double2uint_rn(double __a); +__DEVICE__ unsigned int __nv_double2uint_ru(double __a); +__DEVICE__ unsigned int __nv_double2uint_rz(double __a); +__DEVICE__ unsigned long long __nv_double2ull_rd(double __a); +__DEVICE__ unsigned long long __nv_double2ull_rn(double __a); +__DEVICE__ unsigned long long __nv_double2ull_ru(double __a); +__DEVICE__ unsigned long long __nv_double2ull_rz(double __a); +__DEVICE__ unsigned long long __nv_double_as_longlong(double __a); +__DEVICE__ double __nv_drcp_rd(double __a); +__DEVICE__ double __nv_drcp_rn(double __a); +__DEVICE__ double __nv_drcp_ru(double __a); +__DEVICE__ double __nv_drcp_rz(double __a); +__DEVICE__ double __nv_dsqrt_rd(double __a); +__DEVICE__ double __nv_dsqrt_rn(double __a); +__DEVICE__ double __nv_dsqrt_ru(double __a); +__DEVICE__ double __nv_dsqrt_rz(double __a); +__DEVICE__ double __nv_dsub_rd(double __a, double __b); +__DEVICE__ double __nv_dsub_rn(double __a, double __b); +__DEVICE__ double __nv_dsub_ru(double __a, double __b); +__DEVICE__ double __nv_dsub_rz(double __a, double __b); +__DEVICE__ double __nv_erfc(double __a); +__DEVICE__ float __nv_erfcf(float __a); +__DEVICE__ double __nv_erfcinv(double __a); +__DEVICE__ float __nv_erfcinvf(float __a); +__DEVICE__ double __nv_erfcx(double __a); +__DEVICE__ float __nv_erfcxf(float __a); +__DEVICE__ double __nv_erf(double __a); +__DEVICE__ float __nv_erff(float __a); +__DEVICE__ double __nv_erfinv(double __a); +__DEVICE__ float __nv_erfinvf(float __a); +__DEVICE__ double __nv_exp10(double __a); +__DEVICE__ float __nv_exp10f(float __a); +__DEVICE__ double __nv_exp2(double __a); +__DEVICE__ float __nv_exp2f(float __a); +__DEVICE__ double __nv_exp(double __a); +__DEVICE__ float __nv_expf(float __a); +__DEVICE__ double __nv_expm1(double __a); +__DEVICE__ float __nv_expm1f(float __a); +__DEVICE__ double __nv_fabs(double __a); +__DEVICE__ float __nv_fabsf(float __a); +__DEVICE__ float __nv_fadd_rd(float __a, float __b); +__DEVICE__ float __nv_fadd_rn(float __a, float __b); +__DEVICE__ float __nv_fadd_ru(float __a, float __b); +__DEVICE__ float __nv_fadd_rz(float __a, float __b); +__DEVICE__ float __nv_fast_cosf(float __a); +__DEVICE__ float __nv_fast_exp10f(float __a); +__DEVICE__ float __nv_fast_expf(float __a); +__DEVICE__ float __nv_fast_fdividef(float __a, float __b); +__DEVICE__ float __nv_fast_log10f(float __a); +__DEVICE__ float __nv_fast_log2f(float __a); +__DEVICE__ float __nv_fast_logf(float __a); +__DEVICE__ float __nv_fast_powf(float __a, float __b); +__DEVICE__ void __nv_fast_sincosf(float __a, float *__s, float *__c); +__DEVICE__ float __nv_fast_sinf(float __a); +__DEVICE__ float __nv_fast_tanf(float __a); +__DEVICE__ double __nv_fdim(double __a, double __b); +__DEVICE__ float __nv_fdimf(float __a, float __b); +__DEVICE__ float __nv_fdiv_rd(float __a, float __b); +__DEVICE__ float __nv_fdiv_rn(float __a, float __b); +__DEVICE__ float __nv_fdiv_ru(float __a, float __b); +__DEVICE__ float __nv_fdiv_rz(float __a, float __b); +__DEVICE__ int __nv_ffs(int __a); +__DEVICE__ int __nv_ffsll(long long __a); +__DEVICE__ int __nv_finitef(float __a); +__DEVICE__ unsigned short __nv_float2half_rn(float __a); +__DEVICE__ int __nv_float2int_rd(float __a); +__DEVICE__ int __nv_float2int_rn(float __a); +__DEVICE__ int __nv_float2int_ru(float __a); +__DEVICE__ int __nv_float2int_rz(float __a); +__DEVICE__ long long __nv_float2ll_rd(float __a); +__DEVICE__ long long __nv_float2ll_rn(float __a); +__DEVICE__ long long __nv_float2ll_ru(float __a); +__DEVICE__ long long __nv_float2ll_rz(float __a); +__DEVICE__ unsigned int __nv_float2uint_rd(float __a); +__DEVICE__ unsigned int __nv_float2uint_rn(float __a); +__DEVICE__ unsigned int __nv_float2uint_ru(float __a); +__DEVICE__ unsigned int __nv_float2uint_rz(float __a); +__DEVICE__ unsigned long long __nv_float2ull_rd(float __a); +__DEVICE__ unsigned long long __nv_float2ull_rn(float __a); +__DEVICE__ unsigned long long __nv_float2ull_ru(float __a); +__DEVICE__ unsigned long long __nv_float2ull_rz(float __a); +__DEVICE__ int __nv_float_as_int(float __a); +__DEVICE__ unsigned int __nv_float_as_uint(float __a); +__DEVICE__ double __nv_floor(double __a); +__DEVICE__ float __nv_floorf(float __a); +__DEVICE__ double __nv_fma(double __a, double __b, double __c); +__DEVICE__ float __nv_fmaf(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_ieee_rd(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_ieee_rn(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_ieee_ru(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_ieee_rz(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_rd(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_rn(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_ru(float __a, float __b, float __c); +__DEVICE__ float __nv_fmaf_rz(float __a, float __b, float __c); +__DEVICE__ double __nv_fma_rd(double __a, double __b, double __c); +__DEVICE__ double __nv_fma_rn(double __a, double __b, double __c); +__DEVICE__ double __nv_fma_ru(double __a, double __b, double __c); +__DEVICE__ double __nv_fma_rz(double __a, double __b, double __c); +__DEVICE__ double __nv_fmax(double __a, double __b); +__DEVICE__ float __nv_fmaxf(float __a, float __b); +__DEVICE__ double __nv_fmin(double __a, double __b); +__DEVICE__ float __nv_fminf(float __a, float __b); +__DEVICE__ double __nv_fmod(double __a, double __b); +__DEVICE__ float __nv_fmodf(float __a, float __b); +__DEVICE__ float __nv_fmul_rd(float __a, float __b); +__DEVICE__ float __nv_fmul_rn(float __a, float __b); +__DEVICE__ float __nv_fmul_ru(float __a, float __b); +__DEVICE__ float __nv_fmul_rz(float __a, float __b); +__DEVICE__ float __nv_frcp_rd(float __a); +__DEVICE__ float __nv_frcp_rn(float __a); +__DEVICE__ float __nv_frcp_ru(float __a); +__DEVICE__ float __nv_frcp_rz(float __a); +__DEVICE__ double __nv_frexp(double __a, int *__b); +__DEVICE__ float __nv_frexpf(float __a, int *__b); +__DEVICE__ float __nv_frsqrt_rn(float __a); +__DEVICE__ float __nv_fsqrt_rd(float __a); +__DEVICE__ float __nv_fsqrt_rn(float __a); +__DEVICE__ float __nv_fsqrt_ru(float __a); +__DEVICE__ float __nv_fsqrt_rz(float __a); +__DEVICE__ float __nv_fsub_rd(float __a, float __b); +__DEVICE__ float __nv_fsub_rn(float __a, float __b); +__DEVICE__ float __nv_fsub_ru(float __a, float __b); +__DEVICE__ float __nv_fsub_rz(float __a, float __b); +__DEVICE__ int __nv_hadd(int __a, int __b); +__DEVICE__ float __nv_half2float(unsigned short __h); +__DEVICE__ double __nv_hiloint2double(int __a, int __b); +__DEVICE__ double __nv_hypot(double __a, double __b); +__DEVICE__ float __nv_hypotf(float __a, float __b); +__DEVICE__ int __nv_ilogb(double __a); +__DEVICE__ int __nv_ilogbf(float __a); +__DEVICE__ double __nv_int2double_rn(int __a); +__DEVICE__ float __nv_int2float_rd(int __a); +__DEVICE__ float __nv_int2float_rn(int __a); +__DEVICE__ float __nv_int2float_ru(int __a); +__DEVICE__ float __nv_int2float_rz(int __a); +__DEVICE__ float __nv_int_as_float(int __a); +__DEVICE__ int __nv_isfinited(double __a); +__DEVICE__ int __nv_isinfd(double __a); +__DEVICE__ int __nv_isinff(float __a); +__DEVICE__ int __nv_isnand(double __a); +__DEVICE__ int __nv_isnanf(float __a); +__DEVICE__ double __nv_j0(double __a); +__DEVICE__ float __nv_j0f(float __a); +__DEVICE__ double __nv_j1(double __a); +__DEVICE__ float __nv_j1f(float __a); +__DEVICE__ float __nv_jnf(int __a, float __b); +__DEVICE__ double __nv_jn(int __a, double __b); +__DEVICE__ double __nv_ldexp(double __a, int __b); +__DEVICE__ float __nv_ldexpf(float __a, int __b); +__DEVICE__ double __nv_lgamma(double __a); +__DEVICE__ float __nv_lgammaf(float __a); +__DEVICE__ double __nv_ll2double_rd(long long __a); +__DEVICE__ double __nv_ll2double_rn(long long __a); +__DEVICE__ double __nv_ll2double_ru(long long __a); +__DEVICE__ double __nv_ll2double_rz(long long __a); +__DEVICE__ float __nv_ll2float_rd(long long __a); +__DEVICE__ float __nv_ll2float_rn(long long __a); +__DEVICE__ float __nv_ll2float_ru(long long __a); +__DEVICE__ float __nv_ll2float_rz(long long __a); +__DEVICE__ long long __nv_llabs(long long __a); +__DEVICE__ long long __nv_llmax(long long __a, long long __b); +__DEVICE__ long long __nv_llmin(long long __a, long long __b); +__DEVICE__ long long __nv_llrint(double __a); +__DEVICE__ long long __nv_llrintf(float __a); +__DEVICE__ long long __nv_llround(double __a); +__DEVICE__ long long __nv_llroundf(float __a); +__DEVICE__ double __nv_log10(double __a); +__DEVICE__ float __nv_log10f(float __a); +__DEVICE__ double __nv_log1p(double __a); +__DEVICE__ float __nv_log1pf(float __a); +__DEVICE__ double __nv_log2(double __a); +__DEVICE__ float __nv_log2f(float __a); +__DEVICE__ double __nv_logb(double __a); +__DEVICE__ float __nv_logbf(float __a); +__DEVICE__ double __nv_log(double __a); +__DEVICE__ float __nv_logf(float __a); +__DEVICE__ double __nv_longlong_as_double(long long __a); +__DEVICE__ int __nv_max(int __a, int __b); +__DEVICE__ int __nv_min(int __a, int __b); +__DEVICE__ double __nv_modf(double __a, double *__b); +__DEVICE__ float __nv_modff(float __a, float *__b); +__DEVICE__ int __nv_mul24(int __a, int __b); +__DEVICE__ long long __nv_mul64hi(long long __a, long long __b); +__DEVICE__ int __nv_mulhi(int __a, int __b); +__DEVICE__ double __nv_nan(const signed char *__a); +__DEVICE__ float __nv_nanf(const signed char *__a); +__DEVICE__ double __nv_nearbyint(double __a); +__DEVICE__ float __nv_nearbyintf(float __a); +__DEVICE__ double __nv_nextafter(double __a, double __b); +__DEVICE__ float __nv_nextafterf(float __a, float __b); +__DEVICE__ double __nv_norm3d(double __a, double __b, double __c); +__DEVICE__ float __nv_norm3df(float __a, float __b, float __c); +__DEVICE__ double __nv_norm4d(double __a, double __b, double __c, double __d); +__DEVICE__ float __nv_norm4df(float __a, float __b, float __c, float __d); +__DEVICE__ double __nv_normcdf(double __a); +__DEVICE__ float __nv_normcdff(float __a); +__DEVICE__ double __nv_normcdfinv(double __a); +__DEVICE__ float __nv_normcdfinvf(float __a); +__DEVICE__ float __nv_normf(int __a, const float *__b); +__DEVICE__ double __nv_norm(int __a, const double *__b); +__DEVICE__ int __nv_popc(unsigned int __a); +__DEVICE__ int __nv_popcll(unsigned long long __a); +__DEVICE__ double __nv_pow(double __a, double __b); +__DEVICE__ float __nv_powf(float __a, float __b); +__DEVICE__ double __nv_powi(double __a, int __b); +__DEVICE__ float __nv_powif(float __a, int __b); +__DEVICE__ double __nv_rcbrt(double __a); +__DEVICE__ float __nv_rcbrtf(float __a); +__DEVICE__ double __nv_rcp64h(double __a); +__DEVICE__ double __nv_remainder(double __a, double __b); +__DEVICE__ float __nv_remainderf(float __a, float __b); +__DEVICE__ double __nv_remquo(double __a, double __b, int *__c); +__DEVICE__ float __nv_remquof(float __a, float __b, int *__c); +__DEVICE__ int __nv_rhadd(int __a, int __b); +__DEVICE__ double __nv_rhypot(double __a, double __b); +__DEVICE__ float __nv_rhypotf(float __a, float __b); +__DEVICE__ double __nv_rint(double __a); +__DEVICE__ float __nv_rintf(float __a); +__DEVICE__ double __nv_rnorm3d(double __a, double __b, double __c); +__DEVICE__ float __nv_rnorm3df(float __a, float __b, float __c); +__DEVICE__ double __nv_rnorm4d(double __a, double __b, double __c, double __d); +__DEVICE__ float __nv_rnorm4df(float __a, float __b, float __c, float __d); +__DEVICE__ float __nv_rnormf(int __a, const float *__b); +__DEVICE__ double __nv_rnorm(int __a, const double *__b); +__DEVICE__ double __nv_round(double __a); +__DEVICE__ float __nv_roundf(float __a); +__DEVICE__ double __nv_rsqrt(double __a); +__DEVICE__ float __nv_rsqrtf(float __a); +__DEVICE__ int __nv_sad(int __a, int __b, int __c); +__DEVICE__ float __nv_saturatef(float __a); +__DEVICE__ double __nv_scalbn(double __a, int __b); +__DEVICE__ float __nv_scalbnf(float __a, int __b); +__DEVICE__ int __nv_signbitd(double __a); +__DEVICE__ int __nv_signbitf(float __a); +__DEVICE__ void __nv_sincos(double __a, double *__b, double *__c); +__DEVICE__ void __nv_sincosf(float __a, float *__b, float *__c); +__DEVICE__ void __nv_sincospi(double __a, double *__b, double *__c); +__DEVICE__ void __nv_sincospif(float __a, float *__b, float *__c); +__DEVICE__ double __nv_sin(double __a); +__DEVICE__ float __nv_sinf(float __a); +__DEVICE__ double __nv_sinh(double __a); +__DEVICE__ float __nv_sinhf(float __a); +__DEVICE__ double __nv_sinpi(double __a); +__DEVICE__ float __nv_sinpif(float __a); +__DEVICE__ double __nv_sqrt(double __a); +__DEVICE__ float __nv_sqrtf(float __a); +__DEVICE__ double __nv_tan(double __a); +__DEVICE__ float __nv_tanf(float __a); +__DEVICE__ double __nv_tanh(double __a); +__DEVICE__ float __nv_tanhf(float __a); +__DEVICE__ double __nv_tgamma(double __a); +__DEVICE__ float __nv_tgammaf(float __a); +__DEVICE__ double __nv_trunc(double __a); +__DEVICE__ float __nv_truncf(float __a); +__DEVICE__ int __nv_uhadd(unsigned int __a, unsigned int __b); +__DEVICE__ double __nv_uint2double_rn(unsigned int __i); +__DEVICE__ float __nv_uint2float_rd(unsigned int __a); +__DEVICE__ float __nv_uint2float_rn(unsigned int __a); +__DEVICE__ float __nv_uint2float_ru(unsigned int __a); +__DEVICE__ float __nv_uint2float_rz(unsigned int __a); +__DEVICE__ float __nv_uint_as_float(unsigned int __a); +__DEVICE__ double __nv_ull2double_rd(unsigned long long __a); +__DEVICE__ double __nv_ull2double_rn(unsigned long long __a); +__DEVICE__ double __nv_ull2double_ru(unsigned long long __a); +__DEVICE__ double __nv_ull2double_rz(unsigned long long __a); +__DEVICE__ float __nv_ull2float_rd(unsigned long long __a); +__DEVICE__ float __nv_ull2float_rn(unsigned long long __a); +__DEVICE__ float __nv_ull2float_ru(unsigned long long __a); +__DEVICE__ float __nv_ull2float_rz(unsigned long long __a); +__DEVICE__ unsigned long long __nv_ullmax(unsigned long long __a, + unsigned long long __b); +__DEVICE__ unsigned long long __nv_ullmin(unsigned long long __a, + unsigned long long __b); +__DEVICE__ unsigned int __nv_umax(unsigned int __a, unsigned int __b); +__DEVICE__ unsigned int __nv_umin(unsigned int __a, unsigned int __b); +__DEVICE__ unsigned int __nv_umul24(unsigned int __a, unsigned int __b); +__DEVICE__ unsigned long long __nv_umul64hi(unsigned long long __a, + unsigned long long __b); +__DEVICE__ unsigned int __nv_umulhi(unsigned int __a, unsigned int __b); +__DEVICE__ unsigned int __nv_urhadd(unsigned int __a, unsigned int __b); +__DEVICE__ unsigned int __nv_usad(unsigned int __a, unsigned int __b, + unsigned int __c); +#if CUDA_VERSION >= 9000 && CUDA_VERSION < 9020 +__DEVICE__ int __nv_vabs2(int __a); +__DEVICE__ int __nv_vabs4(int __a); +__DEVICE__ int __nv_vabsdiffs2(int __a, int __b); +__DEVICE__ int __nv_vabsdiffs4(int __a, int __b); +__DEVICE__ int __nv_vabsdiffu2(int __a, int __b); +__DEVICE__ int __nv_vabsdiffu4(int __a, int __b); +__DEVICE__ int __nv_vabsss2(int __a); +__DEVICE__ int __nv_vabsss4(int __a); +__DEVICE__ int __nv_vadd2(int __a, int __b); +__DEVICE__ int __nv_vadd4(int __a, int __b); +__DEVICE__ int __nv_vaddss2(int __a, int __b); +__DEVICE__ int __nv_vaddss4(int __a, int __b); +__DEVICE__ int __nv_vaddus2(int __a, int __b); +__DEVICE__ int __nv_vaddus4(int __a, int __b); +__DEVICE__ int __nv_vavgs2(int __a, int __b); +__DEVICE__ int __nv_vavgs4(int __a, int __b); +__DEVICE__ int __nv_vavgu2(int __a, int __b); +__DEVICE__ int __nv_vavgu4(int __a, int __b); +__DEVICE__ int __nv_vcmpeq2(int __a, int __b); +__DEVICE__ int __nv_vcmpeq4(int __a, int __b); +__DEVICE__ int __nv_vcmpges2(int __a, int __b); +__DEVICE__ int __nv_vcmpges4(int __a, int __b); +__DEVICE__ int __nv_vcmpgeu2(int __a, int __b); +__DEVICE__ int __nv_vcmpgeu4(int __a, int __b); +__DEVICE__ int __nv_vcmpgts2(int __a, int __b); +__DEVICE__ int __nv_vcmpgts4(int __a, int __b); +__DEVICE__ int __nv_vcmpgtu2(int __a, int __b); +__DEVICE__ int __nv_vcmpgtu4(int __a, int __b); +__DEVICE__ int __nv_vcmples2(int __a, int __b); +__DEVICE__ int __nv_vcmples4(int __a, int __b); +__DEVICE__ int __nv_vcmpleu2(int __a, int __b); +__DEVICE__ int __nv_vcmpleu4(int __a, int __b); +__DEVICE__ int __nv_vcmplts2(int __a, int __b); +__DEVICE__ int __nv_vcmplts4(int __a, int __b); +__DEVICE__ int __nv_vcmpltu2(int __a, int __b); +__DEVICE__ int __nv_vcmpltu4(int __a, int __b); +__DEVICE__ int __nv_vcmpne2(int __a, int __b); +__DEVICE__ int __nv_vcmpne4(int __a, int __b); +__DEVICE__ int __nv_vhaddu2(int __a, int __b); +__DEVICE__ int __nv_vhaddu4(int __a, int __b); +__DEVICE__ int __nv_vmaxs2(int __a, int __b); +__DEVICE__ int __nv_vmaxs4(int __a, int __b); +__DEVICE__ int __nv_vmaxu2(int __a, int __b); +__DEVICE__ int __nv_vmaxu4(int __a, int __b); +__DEVICE__ int __nv_vmins2(int __a, int __b); +__DEVICE__ int __nv_vmins4(int __a, int __b); +__DEVICE__ int __nv_vminu2(int __a, int __b); +__DEVICE__ int __nv_vminu4(int __a, int __b); +__DEVICE__ int __nv_vneg2(int __a); +__DEVICE__ int __nv_vneg4(int __a); +__DEVICE__ int __nv_vnegss2(int __a); +__DEVICE__ int __nv_vnegss4(int __a); +__DEVICE__ int __nv_vsads2(int __a, int __b); +__DEVICE__ int __nv_vsads4(int __a, int __b); +__DEVICE__ int __nv_vsadu2(int __a, int __b); +__DEVICE__ int __nv_vsadu4(int __a, int __b); +__DEVICE__ int __nv_vseteq2(int __a, int __b); +__DEVICE__ int __nv_vseteq4(int __a, int __b); +__DEVICE__ int __nv_vsetges2(int __a, int __b); +__DEVICE__ int __nv_vsetges4(int __a, int __b); +__DEVICE__ int __nv_vsetgeu2(int __a, int __b); +__DEVICE__ int __nv_vsetgeu4(int __a, int __b); +__DEVICE__ int __nv_vsetgts2(int __a, int __b); +__DEVICE__ int __nv_vsetgts4(int __a, int __b); +__DEVICE__ int __nv_vsetgtu2(int __a, int __b); +__DEVICE__ int __nv_vsetgtu4(int __a, int __b); +__DEVICE__ int __nv_vsetles2(int __a, int __b); +__DEVICE__ int __nv_vsetles4(int __a, int __b); +__DEVICE__ int __nv_vsetleu2(int __a, int __b); +__DEVICE__ int __nv_vsetleu4(int __a, int __b); +__DEVICE__ int __nv_vsetlts2(int __a, int __b); +__DEVICE__ int __nv_vsetlts4(int __a, int __b); +__DEVICE__ int __nv_vsetltu2(int __a, int __b); +__DEVICE__ int __nv_vsetltu4(int __a, int __b); +__DEVICE__ int __nv_vsetne2(int __a, int __b); +__DEVICE__ int __nv_vsetne4(int __a, int __b); +__DEVICE__ int __nv_vsub2(int __a, int __b); +__DEVICE__ int __nv_vsub4(int __a, int __b); +__DEVICE__ int __nv_vsubss2(int __a, int __b); +__DEVICE__ int __nv_vsubss4(int __a, int __b); +__DEVICE__ int __nv_vsubus2(int __a, int __b); +__DEVICE__ int __nv_vsubus4(int __a, int __b); +#endif // CUDA_VERSION +__DEVICE__ double __nv_y0(double __a); +__DEVICE__ float __nv_y0f(float __a); +__DEVICE__ double __nv_y1(double __a); +__DEVICE__ float __nv_y1f(float __a); +__DEVICE__ float __nv_ynf(int __a, float __b); +__DEVICE__ double __nv_yn(int __a, double __b); + +#if defined(__OPENMP_NVPTX__) +#pragma omp end assumes ext_spmd_amenable no_openmp +#endif + +#if defined(__cplusplus) +} // extern "C" +#endif +#endif // __CLANG_CUDA_LIBDEVICE_DECLARES_H__ diff --git a/llvm/lib/clang/19/include/__clang_cuda_math.h b/llvm/lib/clang/19/include/__clang_cuda_math.h new file mode 100644 index 0000000000000000000000000000000000000000..04019165068668025fcaf0642cbf05c9061a8561 --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_math.h @@ -0,0 +1,348 @@ +/*===---- __clang_cuda_math.h - Device-side CUDA math support --------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CLANG_CUDA_MATH_H__ +#define __CLANG_CUDA_MATH_H__ +#ifndef __CUDA__ +#error "This file is for CUDA compilation only." +#endif + +#ifndef __OPENMP_NVPTX__ +#if CUDA_VERSION < 9000 +#error This file is intended to be used with CUDA-9+ only. +#endif +#endif + +// __DEVICE__ is a helper macro with common set of attributes for the wrappers +// we implement in this file. We need static in order to avoid emitting unused +// functions and __forceinline__ helps inlining these wrappers at -O1. +#pragma push_macro("__DEVICE__") +#ifdef __OPENMP_NVPTX__ +#if defined(__cplusplus) +#define __DEVICE__ static constexpr __attribute__((always_inline, nothrow)) +#else +#define __DEVICE__ static __attribute__((always_inline, nothrow)) +#endif +#else +#define __DEVICE__ static __device__ __forceinline__ +#endif + +// Specialized version of __DEVICE__ for functions with void return type. Needed +// because the OpenMP overlay requires constexpr functions here but prior to +// c++14 void return functions could not be constexpr. +#pragma push_macro("__DEVICE_VOID__") +#if defined(__OPENMP_NVPTX__) && defined(__cplusplus) && __cplusplus < 201402L +#define __DEVICE_VOID__ static __attribute__((always_inline, nothrow)) +#else +#define __DEVICE_VOID__ __DEVICE__ +#endif + +// libdevice provides fast low precision and slow full-recision implementations +// for some functions. Which one gets selected depends on +// __CLANG_CUDA_APPROX_TRANSCENDENTALS__ which gets defined by clang if +// -ffast-math or -fgpu-approx-transcendentals are in effect. +#pragma push_macro("__FAST_OR_SLOW") +#if defined(__CLANG_GPU_APPROX_TRANSCENDENTALS__) +#define __FAST_OR_SLOW(fast, slow) fast +#else +#define __FAST_OR_SLOW(fast, slow) slow +#endif + +__DEVICE__ int abs(int __a) { return __nv_abs(__a); } +__DEVICE__ double fabs(double __a) { return __nv_fabs(__a); } +__DEVICE__ double acos(double __a) { return __nv_acos(__a); } +__DEVICE__ float acosf(float __a) { return __nv_acosf(__a); } +__DEVICE__ double acosh(double __a) { return __nv_acosh(__a); } +__DEVICE__ float acoshf(float __a) { return __nv_acoshf(__a); } +__DEVICE__ double asin(double __a) { return __nv_asin(__a); } +__DEVICE__ float asinf(float __a) { return __nv_asinf(__a); } +__DEVICE__ double asinh(double __a) { return __nv_asinh(__a); } +__DEVICE__ float asinhf(float __a) { return __nv_asinhf(__a); } +__DEVICE__ double atan(double __a) { return __nv_atan(__a); } +__DEVICE__ double atan2(double __a, double __b) { return __nv_atan2(__a, __b); } +__DEVICE__ float atan2f(float __a, float __b) { return __nv_atan2f(__a, __b); } +__DEVICE__ float atanf(float __a) { return __nv_atanf(__a); } +__DEVICE__ double atanh(double __a) { return __nv_atanh(__a); } +__DEVICE__ float atanhf(float __a) { return __nv_atanhf(__a); } +__DEVICE__ double cbrt(double __a) { return __nv_cbrt(__a); } +__DEVICE__ float cbrtf(float __a) { return __nv_cbrtf(__a); } +__DEVICE__ double ceil(double __a) { return __nv_ceil(__a); } +__DEVICE__ float ceilf(float __a) { return __nv_ceilf(__a); } +__DEVICE__ double copysign(double __a, double __b) { + return __nv_copysign(__a, __b); +} +__DEVICE__ float copysignf(float __a, float __b) { + return __nv_copysignf(__a, __b); +} +__DEVICE__ double cos(double __a) { return __nv_cos(__a); } +__DEVICE__ float cosf(float __a) { + return __FAST_OR_SLOW(__nv_fast_cosf, __nv_cosf)(__a); +} +__DEVICE__ double cosh(double __a) { return __nv_cosh(__a); } +__DEVICE__ float coshf(float __a) { return __nv_coshf(__a); } +__DEVICE__ double cospi(double __a) { return __nv_cospi(__a); } +__DEVICE__ float cospif(float __a) { return __nv_cospif(__a); } +__DEVICE__ double cyl_bessel_i0(double __a) { return __nv_cyl_bessel_i0(__a); } +__DEVICE__ float cyl_bessel_i0f(float __a) { return __nv_cyl_bessel_i0f(__a); } +__DEVICE__ double cyl_bessel_i1(double __a) { return __nv_cyl_bessel_i1(__a); } +__DEVICE__ float cyl_bessel_i1f(float __a) { return __nv_cyl_bessel_i1f(__a); } +__DEVICE__ double erf(double __a) { return __nv_erf(__a); } +__DEVICE__ double erfc(double __a) { return __nv_erfc(__a); } +__DEVICE__ float erfcf(float __a) { return __nv_erfcf(__a); } +__DEVICE__ double erfcinv(double __a) { return __nv_erfcinv(__a); } +__DEVICE__ float erfcinvf(float __a) { return __nv_erfcinvf(__a); } +__DEVICE__ double erfcx(double __a) { return __nv_erfcx(__a); } +__DEVICE__ float erfcxf(float __a) { return __nv_erfcxf(__a); } +__DEVICE__ float erff(float __a) { return __nv_erff(__a); } +__DEVICE__ double erfinv(double __a) { return __nv_erfinv(__a); } +__DEVICE__ float erfinvf(float __a) { return __nv_erfinvf(__a); } +__DEVICE__ double exp(double __a) { return __nv_exp(__a); } +__DEVICE__ double exp10(double __a) { return __nv_exp10(__a); } +__DEVICE__ float exp10f(float __a) { return __nv_exp10f(__a); } +__DEVICE__ double exp2(double __a) { return __nv_exp2(__a); } +__DEVICE__ float exp2f(float __a) { return __nv_exp2f(__a); } +__DEVICE__ float expf(float __a) { return __nv_expf(__a); } +__DEVICE__ double expm1(double __a) { return __nv_expm1(__a); } +__DEVICE__ float expm1f(float __a) { return __nv_expm1f(__a); } +__DEVICE__ float fabsf(float __a) { return __nv_fabsf(__a); } +__DEVICE__ double fdim(double __a, double __b) { return __nv_fdim(__a, __b); } +__DEVICE__ float fdimf(float __a, float __b) { return __nv_fdimf(__a, __b); } +__DEVICE__ double fdivide(double __a, double __b) { return __a / __b; } +__DEVICE__ float fdividef(float __a, float __b) { +#if __FAST_MATH__ && !__CUDA_PREC_DIV + return __nv_fast_fdividef(__a, __b); +#else + return __a / __b; +#endif +} +__DEVICE__ double floor(double __f) { return __nv_floor(__f); } +__DEVICE__ float floorf(float __f) { return __nv_floorf(__f); } +__DEVICE__ double fma(double __a, double __b, double __c) { + return __nv_fma(__a, __b, __c); +} +__DEVICE__ float fmaf(float __a, float __b, float __c) { + return __nv_fmaf(__a, __b, __c); +} +__DEVICE__ double fmax(double __a, double __b) { return __nv_fmax(__a, __b); } +__DEVICE__ float fmaxf(float __a, float __b) { return __nv_fmaxf(__a, __b); } +__DEVICE__ double fmin(double __a, double __b) { return __nv_fmin(__a, __b); } +__DEVICE__ float fminf(float __a, float __b) { return __nv_fminf(__a, __b); } +__DEVICE__ double fmod(double __a, double __b) { return __nv_fmod(__a, __b); } +__DEVICE__ float fmodf(float __a, float __b) { return __nv_fmodf(__a, __b); } +__DEVICE__ double frexp(double __a, int *__b) { return __nv_frexp(__a, __b); } +__DEVICE__ float frexpf(float __a, int *__b) { return __nv_frexpf(__a, __b); } +__DEVICE__ double hypot(double __a, double __b) { return __nv_hypot(__a, __b); } +__DEVICE__ float hypotf(float __a, float __b) { return __nv_hypotf(__a, __b); } +__DEVICE__ int ilogb(double __a) { return __nv_ilogb(__a); } +__DEVICE__ int ilogbf(float __a) { return __nv_ilogbf(__a); } +__DEVICE__ double j0(double __a) { return __nv_j0(__a); } +__DEVICE__ float j0f(float __a) { return __nv_j0f(__a); } +__DEVICE__ double j1(double __a) { return __nv_j1(__a); } +__DEVICE__ float j1f(float __a) { return __nv_j1f(__a); } +__DEVICE__ double jn(int __n, double __a) { return __nv_jn(__n, __a); } +__DEVICE__ float jnf(int __n, float __a) { return __nv_jnf(__n, __a); } +#if defined(__LP64__) || defined(_WIN64) +__DEVICE__ long labs(long __a) { return __nv_llabs(__a); }; +#else +__DEVICE__ long labs(long __a) { return __nv_abs(__a); }; +#endif +__DEVICE__ double ldexp(double __a, int __b) { return __nv_ldexp(__a, __b); } +__DEVICE__ float ldexpf(float __a, int __b) { return __nv_ldexpf(__a, __b); } +__DEVICE__ double lgamma(double __a) { return __nv_lgamma(__a); } +__DEVICE__ float lgammaf(float __a) { return __nv_lgammaf(__a); } +__DEVICE__ long long llabs(long long __a) { return __nv_llabs(__a); } +__DEVICE__ long long llmax(long long __a, long long __b) { + return __nv_llmax(__a, __b); +} +__DEVICE__ long long llmin(long long __a, long long __b) { + return __nv_llmin(__a, __b); +} +__DEVICE__ long long llrint(double __a) { return __nv_llrint(__a); } +__DEVICE__ long long llrintf(float __a) { return __nv_llrintf(__a); } +__DEVICE__ long long llround(double __a) { return __nv_llround(__a); } +__DEVICE__ long long llroundf(float __a) { return __nv_llroundf(__a); } +__DEVICE__ double round(double __a) { return __nv_round(__a); } +__DEVICE__ float roundf(float __a) { return __nv_roundf(__a); } +__DEVICE__ double log(double __a) { return __nv_log(__a); } +__DEVICE__ double log10(double __a) { return __nv_log10(__a); } +__DEVICE__ float log10f(float __a) { return __nv_log10f(__a); } +__DEVICE__ double log1p(double __a) { return __nv_log1p(__a); } +__DEVICE__ float log1pf(float __a) { return __nv_log1pf(__a); } +__DEVICE__ double log2(double __a) { return __nv_log2(__a); } +__DEVICE__ float log2f(float __a) { + return __FAST_OR_SLOW(__nv_fast_log2f, __nv_log2f)(__a); +} +__DEVICE__ double logb(double __a) { return __nv_logb(__a); } +__DEVICE__ float logbf(float __a) { return __nv_logbf(__a); } +__DEVICE__ float logf(float __a) { + return __FAST_OR_SLOW(__nv_fast_logf, __nv_logf)(__a); +} +#if defined(__LP64__) || defined(_WIN64) +__DEVICE__ long lrint(double __a) { return llrint(__a); } +__DEVICE__ long lrintf(float __a) { return __float2ll_rn(__a); } +__DEVICE__ long lround(double __a) { return llround(__a); } +__DEVICE__ long lroundf(float __a) { return llroundf(__a); } +#else +__DEVICE__ long lrint(double __a) { return (long)rint(__a); } +__DEVICE__ long lrintf(float __a) { return __float2int_rn(__a); } +__DEVICE__ long lround(double __a) { return round(__a); } +__DEVICE__ long lroundf(float __a) { return roundf(__a); } +#endif +__DEVICE__ int max(int __a, int __b) { return __nv_max(__a, __b); } +__DEVICE__ int min(int __a, int __b) { return __nv_min(__a, __b); } +__DEVICE__ double modf(double __a, double *__b) { return __nv_modf(__a, __b); } +__DEVICE__ float modff(float __a, float *__b) { return __nv_modff(__a, __b); } +__DEVICE__ double nearbyint(double __a) { return __builtin_nearbyint(__a); } +__DEVICE__ float nearbyintf(float __a) { return __builtin_nearbyintf(__a); } +__DEVICE__ double nextafter(double __a, double __b) { + return __nv_nextafter(__a, __b); +} +__DEVICE__ float nextafterf(float __a, float __b) { + return __nv_nextafterf(__a, __b); +} +__DEVICE__ double norm(int __dim, const double *__t) { + return __nv_norm(__dim, __t); +} +__DEVICE__ double norm3d(double __a, double __b, double __c) { + return __nv_norm3d(__a, __b, __c); +} +__DEVICE__ float norm3df(float __a, float __b, float __c) { + return __nv_norm3df(__a, __b, __c); +} +__DEVICE__ double norm4d(double __a, double __b, double __c, double __d) { + return __nv_norm4d(__a, __b, __c, __d); +} +__DEVICE__ float norm4df(float __a, float __b, float __c, float __d) { + return __nv_norm4df(__a, __b, __c, __d); +} +__DEVICE__ double normcdf(double __a) { return __nv_normcdf(__a); } +__DEVICE__ float normcdff(float __a) { return __nv_normcdff(__a); } +__DEVICE__ double normcdfinv(double __a) { return __nv_normcdfinv(__a); } +__DEVICE__ float normcdfinvf(float __a) { return __nv_normcdfinvf(__a); } +__DEVICE__ float normf(int __dim, const float *__t) { + return __nv_normf(__dim, __t); +} +__DEVICE__ double pow(double __a, double __b) { return __nv_pow(__a, __b); } +__DEVICE__ float powf(float __a, float __b) { return __nv_powf(__a, __b); } +__DEVICE__ double powi(double __a, int __b) { return __nv_powi(__a, __b); } +__DEVICE__ float powif(float __a, int __b) { return __nv_powif(__a, __b); } +__DEVICE__ double rcbrt(double __a) { return __nv_rcbrt(__a); } +__DEVICE__ float rcbrtf(float __a) { return __nv_rcbrtf(__a); } +__DEVICE__ double remainder(double __a, double __b) { + return __nv_remainder(__a, __b); +} +__DEVICE__ float remainderf(float __a, float __b) { + return __nv_remainderf(__a, __b); +} +__DEVICE__ double remquo(double __a, double __b, int *__c) { + return __nv_remquo(__a, __b, __c); +} +__DEVICE__ float remquof(float __a, float __b, int *__c) { + return __nv_remquof(__a, __b, __c); +} +__DEVICE__ double rhypot(double __a, double __b) { + return __nv_rhypot(__a, __b); +} +__DEVICE__ float rhypotf(float __a, float __b) { + return __nv_rhypotf(__a, __b); +} +// __nv_rint* in libdevice is buggy and produces incorrect results. +__DEVICE__ double rint(double __a) { return __builtin_rint(__a); } +__DEVICE__ float rintf(float __a) { return __builtin_rintf(__a); } +__DEVICE__ double rnorm(int __a, const double *__b) { + return __nv_rnorm(__a, __b); +} +__DEVICE__ double rnorm3d(double __a, double __b, double __c) { + return __nv_rnorm3d(__a, __b, __c); +} +__DEVICE__ float rnorm3df(float __a, float __b, float __c) { + return __nv_rnorm3df(__a, __b, __c); +} +__DEVICE__ double rnorm4d(double __a, double __b, double __c, double __d) { + return __nv_rnorm4d(__a, __b, __c, __d); +} +__DEVICE__ float rnorm4df(float __a, float __b, float __c, float __d) { + return __nv_rnorm4df(__a, __b, __c, __d); +} +__DEVICE__ float rnormf(int __dim, const float *__t) { + return __nv_rnormf(__dim, __t); +} +__DEVICE__ double rsqrt(double __a) { return __nv_rsqrt(__a); } +__DEVICE__ float rsqrtf(float __a) { return __nv_rsqrtf(__a); } +__DEVICE__ double scalbn(double __a, int __b) { return __nv_scalbn(__a, __b); } +__DEVICE__ float scalbnf(float __a, int __b) { return __nv_scalbnf(__a, __b); } +__DEVICE__ double scalbln(double __a, long __b) { + if (__b > INT_MAX) + return __a > 0 ? HUGE_VAL : -HUGE_VAL; + if (__b < INT_MIN) + return __a > 0 ? 0.0 : -0.0; + return scalbn(__a, (int)__b); +} +__DEVICE__ float scalblnf(float __a, long __b) { + if (__b > INT_MAX) + return __a > 0 ? HUGE_VALF : -HUGE_VALF; + if (__b < INT_MIN) + return __a > 0 ? 0.f : -0.f; + return scalbnf(__a, (int)__b); +} +__DEVICE__ double sin(double __a) { return __nv_sin(__a); } +__DEVICE_VOID__ void sincos(double __a, double *__s, double *__c) { + return __nv_sincos(__a, __s, __c); +} +__DEVICE_VOID__ void sincosf(float __a, float *__s, float *__c) { + return __FAST_OR_SLOW(__nv_fast_sincosf, __nv_sincosf)(__a, __s, __c); +} +__DEVICE_VOID__ void sincospi(double __a, double *__s, double *__c) { + return __nv_sincospi(__a, __s, __c); +} +__DEVICE_VOID__ void sincospif(float __a, float *__s, float *__c) { + return __nv_sincospif(__a, __s, __c); +} +__DEVICE__ float sinf(float __a) { + return __FAST_OR_SLOW(__nv_fast_sinf, __nv_sinf)(__a); +} +__DEVICE__ double sinh(double __a) { return __nv_sinh(__a); } +__DEVICE__ float sinhf(float __a) { return __nv_sinhf(__a); } +__DEVICE__ double sinpi(double __a) { return __nv_sinpi(__a); } +__DEVICE__ float sinpif(float __a) { return __nv_sinpif(__a); } +__DEVICE__ double sqrt(double __a) { return __nv_sqrt(__a); } +__DEVICE__ float sqrtf(float __a) { return __nv_sqrtf(__a); } +__DEVICE__ double tan(double __a) { return __nv_tan(__a); } +__DEVICE__ float tanf(float __a) { return __nv_tanf(__a); } +__DEVICE__ double tanh(double __a) { return __nv_tanh(__a); } +__DEVICE__ float tanhf(float __a) { return __nv_tanhf(__a); } +__DEVICE__ double tgamma(double __a) { return __nv_tgamma(__a); } +__DEVICE__ float tgammaf(float __a) { return __nv_tgammaf(__a); } +__DEVICE__ double trunc(double __a) { return __nv_trunc(__a); } +__DEVICE__ float truncf(float __a) { return __nv_truncf(__a); } +__DEVICE__ unsigned long long ullmax(unsigned long long __a, + unsigned long long __b) { + return __nv_ullmax(__a, __b); +} +__DEVICE__ unsigned long long ullmin(unsigned long long __a, + unsigned long long __b) { + return __nv_ullmin(__a, __b); +} +__DEVICE__ unsigned int umax(unsigned int __a, unsigned int __b) { + return __nv_umax(__a, __b); +} +__DEVICE__ unsigned int umin(unsigned int __a, unsigned int __b) { + return __nv_umin(__a, __b); +} +__DEVICE__ double y0(double __a) { return __nv_y0(__a); } +__DEVICE__ float y0f(float __a) { return __nv_y0f(__a); } +__DEVICE__ double y1(double __a) { return __nv_y1(__a); } +__DEVICE__ float y1f(float __a) { return __nv_y1f(__a); } +__DEVICE__ double yn(int __a, double __b) { return __nv_yn(__a, __b); } +__DEVICE__ float ynf(int __a, float __b) { return __nv_ynf(__a, __b); } + +#pragma pop_macro("__DEVICE__") +#pragma pop_macro("__DEVICE_VOID__") +#pragma pop_macro("__FAST_OR_SLOW") + +#endif // __CLANG_CUDA_MATH_H__ diff --git a/llvm/lib/clang/19/include/__clang_cuda_math_forward_declares.h b/llvm/lib/clang/19/include/__clang_cuda_math_forward_declares.h new file mode 100644 index 0000000000000000000000000000000000000000..c0f1f47cc99302a254b2287e3e9fd52f7f4dc653 --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_math_forward_declares.h @@ -0,0 +1,284 @@ +/*===- __clang_math_forward_declares.h - Prototypes of __device__ math fns --=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CLANG__CUDA_MATH_FORWARD_DECLARES_H__ +#define __CLANG__CUDA_MATH_FORWARD_DECLARES_H__ +#if !defined(__CUDA__) && !__HIP__ +#error "This file is for CUDA/HIP compilation only." +#endif + +// This file forward-declares of some math functions we (or the CUDA headers) +// will define later. We need to do this, and do it before cmath is included, +// because the standard library may have constexpr math functions. In the +// absence of a prior __device__ decl, those constexpr functions may become +// implicitly host+device. host+device functions can't be overloaded, so that +// would preclude the use of our own __device__ overloads for these functions. + +#pragma push_macro("__DEVICE__") +#define __DEVICE__ \ + static __inline__ __attribute__((always_inline)) __attribute__((device)) + +__DEVICE__ long abs(long); +__DEVICE__ long long abs(long long); +__DEVICE__ double abs(double); +__DEVICE__ float abs(float); +__DEVICE__ int abs(int); +__DEVICE__ double acos(double); +__DEVICE__ float acos(float); +__DEVICE__ double acosh(double); +__DEVICE__ float acosh(float); +__DEVICE__ double asin(double); +__DEVICE__ float asin(float); +__DEVICE__ double asinh(double); +__DEVICE__ float asinh(float); +__DEVICE__ double atan2(double, double); +__DEVICE__ float atan2(float, float); +__DEVICE__ double atan(double); +__DEVICE__ float atan(float); +__DEVICE__ double atanh(double); +__DEVICE__ float atanh(float); +__DEVICE__ double cbrt(double); +__DEVICE__ float cbrt(float); +__DEVICE__ double ceil(double); +__DEVICE__ float ceil(float); +__DEVICE__ double copysign(double, double); +__DEVICE__ float copysign(float, float); +__DEVICE__ double cos(double); +__DEVICE__ float cos(float); +__DEVICE__ double cosh(double); +__DEVICE__ float cosh(float); +__DEVICE__ double erfc(double); +__DEVICE__ float erfc(float); +__DEVICE__ double erf(double); +__DEVICE__ float erf(float); +__DEVICE__ double exp2(double); +__DEVICE__ float exp2(float); +__DEVICE__ double exp(double); +__DEVICE__ float exp(float); +__DEVICE__ double expm1(double); +__DEVICE__ float expm1(float); +__DEVICE__ double fabs(double); +__DEVICE__ float fabs(float); +__DEVICE__ double fdim(double, double); +__DEVICE__ float fdim(float, float); +__DEVICE__ double floor(double); +__DEVICE__ float floor(float); +__DEVICE__ double fma(double, double, double); +__DEVICE__ float fma(float, float, float); +__DEVICE__ double fmax(double, double); +__DEVICE__ float fmax(float, float); +__DEVICE__ double fmin(double, double); +__DEVICE__ float fmin(float, float); +__DEVICE__ double fmod(double, double); +__DEVICE__ float fmod(float, float); +__DEVICE__ int fpclassify(double); +__DEVICE__ int fpclassify(float); +__DEVICE__ double frexp(double, int *); +__DEVICE__ float frexp(float, int *); +__DEVICE__ double hypot(double, double); +__DEVICE__ float hypot(float, float); +__DEVICE__ int ilogb(double); +__DEVICE__ int ilogb(float); +#ifdef _MSC_VER +__DEVICE__ bool isfinite(long double); +#endif +__DEVICE__ bool isfinite(double); +__DEVICE__ bool isfinite(float); +__DEVICE__ bool isgreater(double, double); +__DEVICE__ bool isgreaterequal(double, double); +__DEVICE__ bool isgreaterequal(float, float); +__DEVICE__ bool isgreater(float, float); +#ifdef _MSC_VER +__DEVICE__ bool isinf(long double); +#endif +__DEVICE__ bool isinf(double); +__DEVICE__ bool isinf(float); +__DEVICE__ bool isless(double, double); +__DEVICE__ bool islessequal(double, double); +__DEVICE__ bool islessequal(float, float); +__DEVICE__ bool isless(float, float); +__DEVICE__ bool islessgreater(double, double); +__DEVICE__ bool islessgreater(float, float); +#ifdef _MSC_VER +__DEVICE__ bool isnan(long double); +#endif +__DEVICE__ bool isnan(double); +__DEVICE__ bool isnan(float); +__DEVICE__ bool isnormal(double); +__DEVICE__ bool isnormal(float); +__DEVICE__ bool isunordered(double, double); +__DEVICE__ bool isunordered(float, float); +__DEVICE__ long labs(long); +__DEVICE__ double ldexp(double, int); +__DEVICE__ float ldexp(float, int); +__DEVICE__ double lgamma(double); +__DEVICE__ float lgamma(float); +__DEVICE__ long long llabs(long long); +__DEVICE__ long long llrint(double); +__DEVICE__ long long llrint(float); +__DEVICE__ double log10(double); +__DEVICE__ float log10(float); +__DEVICE__ double log1p(double); +__DEVICE__ float log1p(float); +__DEVICE__ double log2(double); +__DEVICE__ float log2(float); +__DEVICE__ double logb(double); +__DEVICE__ float logb(float); +__DEVICE__ double log(double); +__DEVICE__ float log(float); +__DEVICE__ long lrint(double); +__DEVICE__ long lrint(float); +__DEVICE__ long lround(double); +__DEVICE__ long lround(float); +__DEVICE__ long long llround(float); // No llround(double). +__DEVICE__ double modf(double, double *); +__DEVICE__ float modf(float, float *); +__DEVICE__ double nan(const char *); +__DEVICE__ float nanf(const char *); +__DEVICE__ double nearbyint(double); +__DEVICE__ float nearbyint(float); +__DEVICE__ double nextafter(double, double); +__DEVICE__ float nextafter(float, float); +__DEVICE__ double pow(double, double); +__DEVICE__ double pow(double, int); +__DEVICE__ float pow(float, float); +__DEVICE__ float pow(float, int); +__DEVICE__ double remainder(double, double); +__DEVICE__ float remainder(float, float); +__DEVICE__ double remquo(double, double, int *); +__DEVICE__ float remquo(float, float, int *); +__DEVICE__ double rint(double); +__DEVICE__ float rint(float); +__DEVICE__ double round(double); +__DEVICE__ float round(float); +__DEVICE__ double scalbln(double, long); +__DEVICE__ float scalbln(float, long); +__DEVICE__ double scalbn(double, int); +__DEVICE__ float scalbn(float, int); +#ifdef _MSC_VER +__DEVICE__ bool signbit(long double); +#endif +__DEVICE__ bool signbit(double); +__DEVICE__ bool signbit(float); +__DEVICE__ double sin(double); +__DEVICE__ float sin(float); +__DEVICE__ double sinh(double); +__DEVICE__ float sinh(float); +__DEVICE__ double sqrt(double); +__DEVICE__ float sqrt(float); +__DEVICE__ double tan(double); +__DEVICE__ float tan(float); +__DEVICE__ double tanh(double); +__DEVICE__ float tanh(float); +__DEVICE__ double tgamma(double); +__DEVICE__ float tgamma(float); +__DEVICE__ double trunc(double); +__DEVICE__ float trunc(float); + +// Notably missing above is nexttoward, which we don't define on +// the device side because libdevice doesn't give us an implementation, and we +// don't want to be in the business of writing one ourselves. + +// We need to define these overloads in exactly the namespace our standard +// library uses (including the right inline namespace), otherwise they won't be +// picked up by other functions in the standard library (e.g. functions in +// ). Thus the ugliness below. +#ifdef _LIBCPP_BEGIN_NAMESPACE_STD +_LIBCPP_BEGIN_NAMESPACE_STD +#else +namespace std { +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_BEGIN_NAMESPACE_VERSION +#endif +#endif + +using ::abs; +using ::acos; +using ::acosh; +using ::asin; +using ::asinh; +using ::atan; +using ::atan2; +using ::atanh; +using ::cbrt; +using ::ceil; +using ::copysign; +using ::cos; +using ::cosh; +using ::erf; +using ::erfc; +using ::exp; +using ::exp2; +using ::expm1; +using ::fabs; +using ::fdim; +using ::floor; +using ::fma; +using ::fmax; +using ::fmin; +using ::fmod; +using ::fpclassify; +using ::frexp; +using ::hypot; +using ::ilogb; +using ::isfinite; +using ::isgreater; +using ::isgreaterequal; +using ::isinf; +using ::isless; +using ::islessequal; +using ::islessgreater; +using ::isnan; +using ::isnormal; +using ::isunordered; +using ::labs; +using ::ldexp; +using ::lgamma; +using ::llabs; +using ::llrint; +using ::log; +using ::log10; +using ::log1p; +using ::log2; +using ::logb; +using ::lrint; +using ::lround; +using ::llround; +using ::modf; +using ::nan; +using ::nanf; +using ::nearbyint; +using ::nextafter; +using ::pow; +using ::remainder; +using ::remquo; +using ::rint; +using ::round; +using ::scalbln; +using ::scalbn; +using ::signbit; +using ::sin; +using ::sinh; +using ::sqrt; +using ::tan; +using ::tanh; +using ::tgamma; +using ::trunc; + +#ifdef _LIBCPP_END_NAMESPACE_STD +_LIBCPP_END_NAMESPACE_STD +#else +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_END_NAMESPACE_VERSION +#endif +} // namespace std +#endif + +#pragma pop_macro("__DEVICE__") + +#endif diff --git a/llvm/lib/clang/19/include/__clang_cuda_runtime_wrapper.h b/llvm/lib/clang/19/include/__clang_cuda_runtime_wrapper.h new file mode 100644 index 0000000000000000000000000000000000000000..d369c86fe10645426782a7846a1298d9b8e5961a --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_runtime_wrapper.h @@ -0,0 +1,503 @@ +/*===---- __clang_cuda_runtime_wrapper.h - CUDA runtime support -------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * WARNING: This header is intended to be directly -include'd by + * the compiler and is not supposed to be included by users. + * + * CUDA headers are implemented in a way that currently makes it + * impossible for user code to #include directly when compiling with + * Clang. They present different view of CUDA-supplied functions + * depending on where in NVCC's compilation pipeline the headers are + * included. Neither of these modes provides function definitions with + * correct attributes, so we use preprocessor to force the headers + * into a form that Clang can use. + * + * Similarly to NVCC which -include's cuda_runtime.h, Clang -include's + * this file during every CUDA compilation. + */ + +#ifndef __CLANG_CUDA_RUNTIME_WRAPPER_H__ +#define __CLANG_CUDA_RUNTIME_WRAPPER_H__ + +#if defined(__CUDA__) && defined(__clang__) + +// Include some forward declares that must come before cmath. +#include <__clang_cuda_math_forward_declares.h> + +// Define __CUDACC__ early as libstdc++ standard headers with GNU extensions +// enabled depend on it to avoid using __float128, which is unsupported in +// CUDA. +#define __CUDACC__ + +// Include some standard headers to avoid CUDA headers including them +// while some required macros (like __THROW) are in a weird state. +#include +#include +#include +#include +#undef __CUDACC__ + +// Preserve common macros that will be changed below by us or by CUDA +// headers. +#pragma push_macro("__THROW") +#pragma push_macro("__CUDA_ARCH__") + +// WARNING: Preprocessor hacks below are based on specific details of +// CUDA-7.x headers and are not expected to work with any other +// version of CUDA headers. +#include "cuda.h" +#if !defined(CUDA_VERSION) +#error "cuda.h did not define CUDA_VERSION" +#elif CUDA_VERSION < 7000 +#error "Unsupported CUDA version!" +#endif + +#pragma push_macro("__CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__") +#if CUDA_VERSION >= 10000 +#define __CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__ +#endif + +// Make largest subset of device functions available during host +// compilation. +#ifndef __CUDA_ARCH__ +#define __CUDA_ARCH__ 9999 +#endif + +#include "__clang_cuda_builtin_vars.h" + +// No need for device_launch_parameters.h as __clang_cuda_builtin_vars.h above +// has taken care of builtin variables declared in the file. +#define __DEVICE_LAUNCH_PARAMETERS_H__ + +// {math,device}_functions.h only have declarations of the +// functions. We don't need them as we're going to pull in their +// definitions from .hpp files. +#define __DEVICE_FUNCTIONS_H__ +#define __MATH_FUNCTIONS_H__ +#define __COMMON_FUNCTIONS_H__ +// device_functions_decls is replaced by __clang_cuda_device_functions.h +// included below. +#define __DEVICE_FUNCTIONS_DECLS_H__ + +#undef __CUDACC__ +#if CUDA_VERSION < 9000 +#define __CUDABE__ +#else +#define __CUDACC__ +#define __CUDA_LIBDEVICE__ +#endif +// Disables definitions of device-side runtime support stubs in +// cuda_device_runtime_api.h +#include "host_defines.h" +#undef __CUDACC__ +#include "driver_types.h" +#include "host_config.h" + +// Temporarily replace "nv_weak" with weak, so __attribute__((nv_weak)) in +// cuda_device_runtime_api.h ends up being __attribute__((weak)) which is the +// functional equivalent of what we need. +#pragma push_macro("nv_weak") +#define nv_weak weak +#undef __CUDABE__ +#undef __CUDA_LIBDEVICE__ +#define __CUDACC__ +#include "cuda_runtime.h" + +#pragma pop_macro("nv_weak") +#undef __CUDACC__ +#define __CUDABE__ + +// CUDA headers use __nvvm_memcpy and __nvvm_memset which Clang does +// not have at the moment. Emulate them with a builtin memcpy/memset. +#define __nvvm_memcpy(s, d, n, a) __builtin_memcpy(s, d, n) +#define __nvvm_memset(d, c, n, a) __builtin_memset(d, c, n) + +#if CUDA_VERSION < 9000 +#include "crt/device_runtime.h" +#endif +#include "crt/host_runtime.h" +// device_runtime.h defines __cxa_* macros that will conflict with +// cxxabi.h. +// FIXME: redefine these as __device__ functions. +#undef __cxa_vec_ctor +#undef __cxa_vec_cctor +#undef __cxa_vec_dtor +#undef __cxa_vec_new +#undef __cxa_vec_new2 +#undef __cxa_vec_new3 +#undef __cxa_vec_delete2 +#undef __cxa_vec_delete +#undef __cxa_vec_delete3 +#undef __cxa_pure_virtual + +// math_functions.hpp expects this host function be defined on MacOS, but it +// ends up not being there because of the games we play here. Just define it +// ourselves; it's simple enough. +#ifdef __APPLE__ +inline __host__ double __signbitd(double x) { + return std::signbit(x); +} +#endif + +// CUDA 9.1 no longer provides declarations for libdevice functions, so we need +// to provide our own. +#include <__clang_cuda_libdevice_declares.h> + +// Wrappers for many device-side standard library functions, incl. math +// functions, became compiler builtins in CUDA-9 and have been removed from the +// CUDA headers. Clang now provides its own implementation of the wrappers. +#if CUDA_VERSION >= 9000 +#include <__clang_cuda_device_functions.h> +#include <__clang_cuda_math.h> +#endif + +// __THROW is redefined to be empty by device_functions_decls.h in CUDA. Clang's +// counterpart does not do it, so we need to make it empty here to keep +// following CUDA includes happy. +#undef __THROW +#define __THROW + +// CUDA 8.0.41 relies on __USE_FAST_MATH__ and __CUDA_PREC_DIV's values. +// Previous versions used to check whether they are defined or not. +// CU_DEVICE_INVALID macro is only defined in 8.0.41, so we use it +// here to detect the switch. + +#if defined(CU_DEVICE_INVALID) +#if !defined(__USE_FAST_MATH__) +#define __USE_FAST_MATH__ 0 +#endif + +#if !defined(__CUDA_PREC_DIV) +#define __CUDA_PREC_DIV 0 +#endif +#endif + +// Temporarily poison __host__ macro to ensure it's not used by any of +// the headers we're about to include. +#pragma push_macro("__host__") +#define __host__ UNEXPECTED_HOST_ATTRIBUTE + +// device_functions.hpp and math_functions*.hpp use 'static +// __forceinline__' (with no __device__) for definitions of device +// functions. Temporarily redefine __forceinline__ to include +// __device__. +#pragma push_macro("__forceinline__") +#define __forceinline__ __device__ __inline__ __attribute__((always_inline)) +#if CUDA_VERSION < 9000 +#include "device_functions.hpp" +#endif + +// math_function.hpp uses the __USE_FAST_MATH__ macro to determine whether we +// get the slow-but-accurate or fast-but-inaccurate versions of functions like +// sin and exp. This is controlled in clang by -fgpu-approx-transcendentals. +// +// device_functions.hpp uses __USE_FAST_MATH__ for a different purpose (fast vs. +// slow divides), so we need to scope our define carefully here. +#pragma push_macro("__USE_FAST_MATH__") +#if defined(__CLANG_GPU_APPROX_TRANSCENDENTALS__) +#define __USE_FAST_MATH__ 1 +#endif + +#if CUDA_VERSION >= 9000 +#include "crt/math_functions.hpp" +#else +#include "math_functions.hpp" +#endif + +#pragma pop_macro("__USE_FAST_MATH__") + +#if CUDA_VERSION < 9000 +#include "math_functions_dbl_ptx3.hpp" +#endif +#pragma pop_macro("__forceinline__") + +// Pull in host-only functions that are only available when neither +// __CUDACC__ nor __CUDABE__ are defined. +#undef __MATH_FUNCTIONS_HPP__ +#undef __CUDABE__ +#if CUDA_VERSION < 9000 +#include "math_functions.hpp" +#endif +// Alas, additional overloads for these functions are hard to get to. +// Considering that we only need these overloads for a few functions, +// we can provide them here. +static inline float rsqrt(float __a) { return rsqrtf(__a); } +static inline float rcbrt(float __a) { return rcbrtf(__a); } +static inline float sinpi(float __a) { return sinpif(__a); } +static inline float cospi(float __a) { return cospif(__a); } +static inline void sincospi(float __a, float *__b, float *__c) { + return sincospif(__a, __b, __c); +} +static inline float erfcinv(float __a) { return erfcinvf(__a); } +static inline float normcdfinv(float __a) { return normcdfinvf(__a); } +static inline float normcdf(float __a) { return normcdff(__a); } +static inline float erfcx(float __a) { return erfcxf(__a); } + +#if CUDA_VERSION < 9000 +// For some reason single-argument variant is not always declared by +// CUDA headers. Alas, device_functions.hpp included below needs it. +static inline __device__ void __brkpt(int __c) { __brkpt(); } +#endif + +// Now include *.hpp with definitions of various GPU functions. Alas, +// a lot of thins get declared/defined with __host__ attribute which +// we don't want and we have to define it out. We also have to include +// {device,math}_functions.hpp again in order to extract the other +// branch of #if/else inside. +#define __host__ +#undef __CUDABE__ +#define __CUDACC__ +#if CUDA_VERSION >= 9000 +// Some atomic functions became compiler builtins in CUDA-9 , so we need their +// declarations. +#include "device_atomic_functions.h" +#endif +#undef __DEVICE_FUNCTIONS_HPP__ +#include "device_atomic_functions.hpp" +#if CUDA_VERSION >= 9000 +#include "crt/device_functions.hpp" +#include "crt/device_double_functions.hpp" +#else +#include "device_functions.hpp" +#define __CUDABE__ +#include "device_double_functions.h" +#undef __CUDABE__ +#endif +#include "sm_20_atomic_functions.hpp" +// Predicate functions used in `__builtin_assume` need to have no side effect. +// However, sm_20_intrinsics.hpp doesn't define them with neither pure nor +// const attribute. Rename definitions from sm_20_intrinsics.hpp and re-define +// them as pure ones. +#pragma push_macro("__isGlobal") +#pragma push_macro("__isShared") +#pragma push_macro("__isConstant") +#pragma push_macro("__isLocal") +#define __isGlobal __ignored_cuda___isGlobal +#define __isShared __ignored_cuda___isShared +#define __isConstant __ignored_cuda___isConstant +#define __isLocal __ignored_cuda___isLocal +#include "sm_20_intrinsics.hpp" +#pragma pop_macro("__isGlobal") +#pragma pop_macro("__isShared") +#pragma pop_macro("__isConstant") +#pragma pop_macro("__isLocal") +#pragma push_macro("__DEVICE__") +#define __DEVICE__ static __device__ __forceinline__ __attribute__((const)) +__DEVICE__ unsigned int __isGlobal(const void *p) { + return __nvvm_isspacep_global(p); +} +__DEVICE__ unsigned int __isShared(const void *p) { + return __nvvm_isspacep_shared(p); +} +__DEVICE__ unsigned int __isConstant(const void *p) { + return __nvvm_isspacep_const(p); +} +__DEVICE__ unsigned int __isLocal(const void *p) { + return __nvvm_isspacep_local(p); +} +#pragma pop_macro("__DEVICE__") +#include "sm_32_atomic_functions.hpp" + +// Don't include sm_30_intrinsics.h and sm_32_intrinsics.h. These define the +// __shfl and __ldg intrinsics using inline (volatile) asm, but we want to +// define them using builtins so that the optimizer can reason about and across +// these instructions. In particular, using intrinsics for ldg gets us the +// [addr+imm] addressing mode, which, although it doesn't actually exist in the +// hardware, seems to generate faster machine code because ptxas can more easily +// reason about our code. + +#if CUDA_VERSION >= 8000 +#pragma push_macro("__CUDA_ARCH__") +#undef __CUDA_ARCH__ +#include "sm_60_atomic_functions.hpp" +#include "sm_61_intrinsics.hpp" +#pragma pop_macro("__CUDA_ARCH__") +#endif + +#undef __MATH_FUNCTIONS_HPP__ + +// math_functions.hpp defines ::signbit as a __host__ __device__ function. This +// conflicts with libstdc++'s constexpr ::signbit, so we have to rename +// math_function.hpp's ::signbit. It's guarded by #undef signbit, but that's +// conditional on __GNUC__. :) +#pragma push_macro("signbit") +#pragma push_macro("__GNUC__") +#undef __GNUC__ +#define signbit __ignored_cuda_signbit + +// CUDA-9 omits device-side definitions of some math functions if it sees +// include guard from math.h wrapper from libstdc++. We have to undo the header +// guard temporarily to get the definitions we need. +#pragma push_macro("_GLIBCXX_MATH_H") +#pragma push_macro("_LIBCPP_VERSION") +#if CUDA_VERSION >= 9000 +#undef _GLIBCXX_MATH_H +// We also need to undo another guard that checks for libc++ 3.8+ +#ifdef _LIBCPP_VERSION +#define _LIBCPP_VERSION 3700 +#endif +#endif + +#if CUDA_VERSION >= 9000 +#include "crt/math_functions.hpp" +#else +#include "math_functions.hpp" +#endif +#pragma pop_macro("_GLIBCXX_MATH_H") +#pragma pop_macro("_LIBCPP_VERSION") +#pragma pop_macro("__GNUC__") +#pragma pop_macro("signbit") + +#pragma pop_macro("__host__") + +// __clang_cuda_texture_intrinsics.h must be included first in order to provide +// implementation for __nv_tex_surf_handler that CUDA's headers depend on. +// The implementation requires c++11 and only works with CUDA-9 or newer. +#if __cplusplus >= 201103L && CUDA_VERSION >= 9000 +// clang-format off +#include <__clang_cuda_texture_intrinsics.h> +// clang-format on +#else +#if CUDA_VERSION >= 9000 +// Provide a hint that texture support needs C++11. +template struct __nv_tex_needs_cxx11 { + const static bool value = false; +}; +template +__host__ __device__ void __nv_tex_surf_handler(const char *name, T *ptr, + cudaTextureObject_t obj, + float x) { + _Static_assert(__nv_tex_needs_cxx11::value, + "Texture support requires C++11"); +} +#else +// Textures in CUDA-8 and older are not supported by clang.There's no +// convenient way to intercept texture use in these versions, so we can't +// produce a meaningful error. The source code that attempts to use textures +// will continue to fail as it does now. +#endif // CUDA_VERSION +#endif // __cplusplus >= 201103L && CUDA_VERSION >= 9000 +#include "texture_fetch_functions.h" +#include "texture_indirect_functions.h" + +// Restore state of __CUDA_ARCH__ and __THROW we had on entry. +#pragma pop_macro("__CUDA_ARCH__") +#pragma pop_macro("__THROW") + +// Set up compiler macros expected to be seen during compilation. +#undef __CUDABE__ +#define __CUDACC__ + +extern "C" { +// Device-side CUDA system calls. +// http://docs.nvidia.com/cuda/ptx-writers-guide-to-interoperability/index.html#system-calls +// We need these declarations and wrappers for device-side +// malloc/free/printf calls to work without relying on +// -fcuda-disable-target-call-checks option. +__device__ int vprintf(const char *, const char *); +__device__ void free(void *) __attribute((nothrow)); +__device__ void *malloc(size_t) __attribute((nothrow)) __attribute__((malloc)); + +// __assertfail() used to have a `noreturn` attribute. Unfortunately that +// contributed to triggering the longstanding bug in ptxas when assert was used +// in sufficiently convoluted code. See +// https://bugs.llvm.org/show_bug.cgi?id=27738 for the details. +__device__ void __assertfail(const char *__message, const char *__file, + unsigned __line, const char *__function, + size_t __charSize); + +// In order for standard assert() macro on linux to work we need to +// provide device-side __assert_fail() +__device__ static inline void __assert_fail(const char *__message, + const char *__file, unsigned __line, + const char *__function) { + __assertfail(__message, __file, __line, __function, sizeof(char)); +} + +// Clang will convert printf into vprintf, but we still need +// device-side declaration for it. +__device__ int printf(const char *, ...); +} // extern "C" + +// We also need device-side std::malloc and std::free. +namespace std { +__device__ static inline void free(void *__ptr) { ::free(__ptr); } +__device__ static inline void *malloc(size_t __size) { + return ::malloc(__size); +} +} // namespace std + +// Out-of-line implementations from __clang_cuda_builtin_vars.h. These need to +// come after we've pulled in the definition of uint3 and dim3. + +__device__ inline __cuda_builtin_threadIdx_t::operator dim3() const { + return dim3(x, y, z); +} + +__device__ inline __cuda_builtin_threadIdx_t::operator uint3() const { + return {x, y, z}; +} + +__device__ inline __cuda_builtin_blockIdx_t::operator dim3() const { + return dim3(x, y, z); +} + +__device__ inline __cuda_builtin_blockIdx_t::operator uint3() const { + return {x, y, z}; +} + +__device__ inline __cuda_builtin_blockDim_t::operator dim3() const { + return dim3(x, y, z); +} + +__device__ inline __cuda_builtin_blockDim_t::operator uint3() const { + return {x, y, z}; +} + +__device__ inline __cuda_builtin_gridDim_t::operator dim3() const { + return dim3(x, y, z); +} + +__device__ inline __cuda_builtin_gridDim_t::operator uint3() const { + return {x, y, z}; +} + +#include <__clang_cuda_cmath.h> +#include <__clang_cuda_intrinsics.h> +#include <__clang_cuda_complex_builtins.h> + +// curand_mtgp32_kernel helpfully redeclares blockDim and threadIdx in host +// mode, giving them their "proper" types of dim3 and uint3. This is +// incompatible with the types we give in __clang_cuda_builtin_vars.h. As as +// hack, force-include the header (nvcc doesn't include it by default) but +// redefine dim3 and uint3 to our builtin types. (Thankfully dim3 and uint3 are +// only used here for the redeclarations of blockDim and threadIdx.) +#pragma push_macro("dim3") +#pragma push_macro("uint3") +#define dim3 __cuda_builtin_blockDim_t +#define uint3 __cuda_builtin_threadIdx_t +#include "curand_mtgp32_kernel.h" +#pragma pop_macro("dim3") +#pragma pop_macro("uint3") +#pragma pop_macro("__USE_FAST_MATH__") +#pragma pop_macro("__CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__") + +// CUDA runtime uses this undocumented function to access kernel launch +// configuration. The declaration is in crt/device_functions.h but that file +// includes a lot of other stuff we don't want. Instead, we'll provide our own +// declaration for it here. +#if CUDA_VERSION >= 9020 +extern "C" unsigned __cudaPushCallConfiguration(dim3 gridDim, dim3 blockDim, + size_t sharedMem = 0, + void *stream = 0); +#endif + +#endif // __CUDA__ +#endif // __CLANG_CUDA_RUNTIME_WRAPPER_H__ diff --git a/llvm/lib/clang/19/include/__clang_cuda_texture_intrinsics.h b/llvm/lib/clang/19/include/__clang_cuda_texture_intrinsics.h new file mode 100644 index 0000000000000000000000000000000000000000..a71952211237ba51d7f0aeb6cb022b818b52e7c9 --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_cuda_texture_intrinsics.h @@ -0,0 +1,742 @@ +/*===--- __clang_cuda_texture_intrinsics.h - Device-side texture support ---=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + * + * This header provides in-header implmentations for NVCC's built-in + * __nv_tex_surf_handler() which is used by CUDA's texture-related headers. The + * built-in is unusual as it's actually a set of function overloads that use the + * first string literal argument as one of the overload parameters. + */ +#ifndef __CLANG_CUDA_TEXTURE_INTRINSICS_H__ +#define __CLANG_CUDA_TEXTURE_INTRINSICS_H__ +#ifndef __CUDA__ +#error "This file is for CUDA compilation only." +#endif + +// __nv_tex_surf_handler() provided by this header as a macro. +#define __nv_tex_surf_handler(__op, __ptr, ...) \ + ::__cuda_tex::__tex_fetch< \ + ::__cuda_tex::__Tag<::__cuda_tex::__tex_op_hash(__op)>>(__ptr, \ + __VA_ARGS__) + +#pragma push_macro("__ASM_OUT") +#pragma push_macro("__ASM_OUTP") +#pragma push_macro("__Args") +#pragma push_macro("__ID") +#pragma push_macro("__IDV") +#pragma push_macro("__IMPL_2DGATHER") +#pragma push_macro("__IMPL_ALIAS") +#pragma push_macro("__IMPL_ALIASI") +#pragma push_macro("__IMPL_F1") +#pragma push_macro("__IMPL_F3") +#pragma push_macro("__IMPL_F3N") +#pragma push_macro("__IMPL_F3S") +#pragma push_macro("__IMPL_S") +#pragma push_macro("__IMPL_S3") +#pragma push_macro("__IMPL_S3I") +#pragma push_macro("__IMPL_S3N") +#pragma push_macro("__IMPL_S3NI") +#pragma push_macro("__IMPL_S3S") +#pragma push_macro("__IMPL_S3SI") +#pragma push_macro("__IMPL_SI") +#pragma push_macro("__L") +#pragma push_macro("__STRIP_PARENS") + +// Put all functions into anonymous namespace so they have internal linkage. +// The device-only function here must be internal in order to avoid ODR +// violations in case they are used from the files compiled with +// -fgpu-rdc. E.g. a library and an app using it may be built with a different +// version of this header file. +namespace { + +// Put the implmentation into its own namespace so we don't pollute the TU. +namespace __cuda_tex { + +// First, we need a perfect hash function and a few constexpr helper functions +// for converting a string literal into a numeric value which can be used to +// parametrize a template. We can not use string literals for that as that would +// require C++20. +// +// The hash function was generated with 'gperf' and then manually converted into +// its constexpr equivalent. +// +// NOTE: the perfect hashing scheme comes with inherent self-test. If the hash +// function has a collision for any of the texture operations, the compilation +// will fail due to an attempt to redefine a tag with the same value. If the +// header compiles, then the hash function is good enough for the job. + +constexpr int __tex_len(const char *s) { + return (s[0] == 0) ? 0 + : (s[1] == 0) ? 1 + : (s[2] == 0) ? 2 + : (s[3] == 0) ? 3 + : (s[4] == 0) ? 4 + : (s[5] == 0) ? 5 + : (s[6] == 0) ? 6 + : (s[7] == 0) ? 7 + : (s[8] == 0) ? 8 + : (s[9] == 0) ? 9 + : (s[10] == 0) ? 10 + : (s[11] == 0) ? 11 + : (s[12] == 0) ? 12 + : (s[13] == 0) ? 13 + : (s[14] == 0) ? 14 + : (s[15] == 0) ? 15 + : (s[16] == 0) ? 16 + : (s[17] == 0) ? 17 + : (s[18] == 0) ? 18 + : (s[19] == 0) ? 19 + : (s[20] == 0) ? 20 + : (s[21] == 0) ? 21 + : (s[22] == 0) ? 22 + : (s[23] == 0) ? 23 + : (s[24] == 0) ? 24 + : (s[25] == 0) ? 25 + : (s[26] == 0) ? 26 + : (s[27] == 0) ? 27 + : (s[28] == 0) ? 28 + : (s[29] == 0) ? 29 + : (s[30] == 0) ? 30 + : (s[31] == 0) ? 31 + : 32; +} + +constexpr int __tex_hash_map(int c) { + return (c == 49) ? 10 + : (c == 50) ? 0 + : (c == 51) ? 100 + : (c == 52) ? 30 + : (c == 67) ? 10 + : (c == 68) ? 0 + : (c == 69) ? 25 + : (c == 72) ? 70 + : (c == 77) ? 0 + : (c == 96) ? 44 + : (c == 99) ? 10 + : (c == 100) ? 5 + : (c == 101) ? 60 + : (c == 102) ? 40 + : (c == 103) ? 70 + : (c == 104) ? 25 + : (c == 112) ? 0 + : (c == 114) ? 45 + : (c == 117) ? 5 + : (c == 118) ? 85 + : (c == 120) ? 20 + : 225; +} + +constexpr int __tex_op_hash(const char *str) { + return __tex_len(str) + __tex_hash_map(str[7] + 1) + __tex_hash_map(str[6]) + + __tex_hash_map(str[5]) + __tex_hash_map(str[__tex_len(str) - 1]); +} + +// Tag type to identify particular texture operation. +template struct __Tag; +#define __ID(__op) __Tag<__tex_op_hash(__op)> +// Tags for variants of particular operation. E.g. tex2Dgather can translate +// into 4 different instructions. +#define __IDV(__op, __variant) \ + __Tag<10000 + __tex_op_hash(__op) * 100 + __variant> + +// Helper classes for figuring out key data types for derived types. +// E.g. char2 has __base_t = char, __fetch_t = char4 +template struct __TypeInfoT; +// Type info for the fundamental types. +template <> struct __TypeInfoT { + using __base_t = float; + using __fetch_t = float4; +}; +template <> struct __TypeInfoT { + using __base_t = char; + using __fetch_t = int4; +}; +template <> struct __TypeInfoT { + using __base_t = signed char; + using __fetch_t = int4; +}; +template <> struct __TypeInfoT { + using __base_t = unsigned char; + using __fetch_t = uint4; +}; +template <> struct __TypeInfoT { + using __base_t = short; + using __fetch_t = int4; +}; +template <> struct __TypeInfoT { + using __base_t = unsigned short; + using __fetch_t = uint4; +}; +template <> struct __TypeInfoT { + using __base_t = int; + using __fetch_t = int4; +}; +template <> struct __TypeInfoT { + using __base_t = unsigned int; + using __fetch_t = uint4; +}; + +// Derived base/fetch types for N-element vectors. +template struct __TypeInfoT { + using __base_t = decltype(__T::x); + using __fetch_t = typename __TypeInfoT<__base_t>::__fetch_t; +}; + +// Classes that implement specific texture ops. +template struct __tex_fetch_v4; + +// Helper macros to strip parens from a macro argument. +#define __Args(...) __VA_ARGS__ +#define __STRIP_PARENS(__X) __X +#define __L(__X) __STRIP_PARENS(__Args __X) + +// Construct inline assembly output args. +// Results are stored in a temp var __r. +// isResident bool is pointed to by __ir +// Asm args for return values. It's a 4-element vector +#define __ASM_OUT(__t) \ + ("=" __t(__r.x), "=" __t(__r.y), "=" __t(__r.z), "=" __t(__r.w)) +// .. possibly combined with a predicate. +#define __ASM_OUTP(__t) (__L(__ASM_OUT(__t)), "=h"(*__ir)) + +// Implements a single variant of texture fetch instruction. +#define __IMPL_F1(__rt, __dt, __args, __asm_op, __asm_outs, __asm_args) \ + template <> \ + __device__ __rt __run<__dt>(cudaTextureObject_t __obj, __L(__args)) { \ + __rt __r; \ + asm(__asm_op : __L(__asm_outs) : "l"(__obj), __L(__asm_args)); \ + return __r; \ + } + +// Implements texture fetch instructions for int4/uint4/float4 data types. +#define __IMPL_F3(__args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + __IMPL_F1(int4, int4, __args, __asm_op ".s32." __ctype "\t" __asm_op_args, \ + __ASM_OUT("r"), __asm_args) \ + __IMPL_F1(uint4, uint4, __args, __asm_op ".u32." __ctype "\t" __asm_op_args, \ + __ASM_OUT("r"), __asm_args) \ + __IMPL_F1(float4, float4, __args, \ + __asm_op ".f32." __ctype "\t" __asm_op_args, __ASM_OUT("f"), \ + __asm_args) +// Implements 'sparse' texture fetch instructions for int4/uint4/float4 data +// types. Similar to above, but returns a boolean 'isPresent' value in addition +// to texture data, +#define __IMPL_F3S(__args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + __IMPL_F1(int4, int4, __args, __asm_op ".s32." __ctype "\t" __asm_op_args, \ + __ASM_OUTP("r"), __asm_args) \ + __IMPL_F1(uint4, uint4, __args, __asm_op ".u32." __ctype "\t" __asm_op_args, \ + __ASM_OUTP("r"), __asm_args) \ + __IMPL_F1(float4, float4, __args, \ + __asm_op ".f32." __ctype "\t" __asm_op_args, __ASM_OUTP("f"), \ + __asm_args) + +// Similar to F3, but for integer data which is returned as normalized floats. +// Only instantiates fetch functions for int4/uint4. +#define __IMPL_F3N(__args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + __IMPL_F1(float4, int4, __args, __asm_op ".s32." __ctype "\t" __asm_op_args, \ + __ASM_OUT("r"), __asm_args) \ + __IMPL_F1(float4, uint4, __args, \ + __asm_op ".u32." __ctype "\t" __asm_op_args, __ASM_OUT("r"), \ + __asm_args) + +// Instantiates __tex_fetch_v4 with regular fetch functions. +#define __IMPL_S3I(__op, __args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + template <> struct __tex_fetch_v4<__op> { \ + template \ + __device__ static T __run(cudaTextureObject_t __obj, __L(__args)); \ + __IMPL_F3(__args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + } + +// Same, but for sparse ops. Only available on sm_60+ +#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 600) +#define __IMPL_S3SI(__op, __args, __asm_op, __ctype, __asm_op_args, \ + __asm_args) \ + template <> struct __tex_fetch_v4<__op> { \ + template \ + __device__ static T __run(cudaTextureObject_t __obj, __L(__args)); \ + __IMPL_F3S(__args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + } +#else +#define __IMPL_S3SI(__op, __args, __asm_op, __ctype, __asm_op_args, __asm_args) +#endif + +// Same, but for normalized float ops. +#define __IMPL_S3NI(__op, __args, __asm_op, __ctype, __asm_op_args, \ + __asm_args) \ + template <> struct __tex_fetch_v4<__op> { \ + template \ + __device__ static float4 __run(cudaTextureObject_t __obj, __L(__args)); \ + __IMPL_F3N(__args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + } + +// Regular and normalized float ops share a lot of similarities. This macro +// instantiates both variants -- normal for __op and normalized for __opn. +#define __IMPL_SI(__op, __opn, __args, __asm_op, __ctype, __asm_op_args, \ + __asm_args) \ + __IMPL_S3I(__op, __args, __asm_op, __ctype, __asm_op_args, __asm_args); \ + __IMPL_S3NI(__opn, __args, __asm_op, __ctype, __asm_op_args, __asm_args) + +// Convenience macros which converts string literal __op into a __Tag, +#define __IMPL_S3(__op, __args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + __IMPL_S3I(__ID(__op), __args, __asm_op, __ctype, __asm_op_args, __asm_args) +#define __IMPL_S3S(__op, __args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + __IMPL_S3SI(__ID(__op), __args, __asm_op, __ctype, __asm_op_args, __asm_args) +#define __IMPL_S3N(__op, __args, __asm_op, __ctype, __asm_op_args, __asm_args) \ + __IMPL_S3NI(__ID(__op), __args, __asm_op, __ctype, __asm_op_args, __asm_args) +#define __IMPL_S(__op, __opn, __args, __asm_op, __ctype, __asm_op_args, \ + __asm_args) \ + __IMPL_SI(__ID(__op), __ID(__opn), __args, __asm_op, __ctype, __asm_op_args, \ + __asm_args) + +// CUDA headers have some 'legacy' texture oprerations that duplicate +// functionality. So, we just inherit it, instead of refining a copy. +#define __IMPL_ALIASI(__op, __opn) \ + template <> struct __tex_fetch_v4<__op> : __tex_fetch_v4<__opn> {} +#define __IMPL_ALIAS(__op, __opn) __IMPL_ALIASI(__ID(__op), __ID(__opn)) + +// Now we can instantiate everything we need for each specific texture fetch +// variant. +__IMPL_S("__tex1D_v2", "__tex1D_rmnf_v2", (float __x), "tex.1d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5}];", ("f"(__x))); +__IMPL_S("__tex1Dfetch_v2", "__tex1Dfetch_rmnf_v2", (int __x), "tex.1d.v4", + "s32", "{%0, %1, %2, %3}, [%4, {%5}];", ("r"(__x))); +__IMPL_ALIAS("__itex1D", "__tex1D_v2"); +__IMPL_ALIAS("__itex1Dfetch", "__tex1Dfetch_v2"); + +__IMPL_S("__tex1DGrad_v2", "__tex1DGrad_rmnf_v2", + (float __x, float __dPdx, float __dPdy), "tex.grad.1d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5}], {%6}, {%7};", + ("f"(__x), "f"(__dPdx), "f"(__dPdy))); +__IMPL_ALIAS("__itex1DGrad", "__tex1DGrad_v2"); + +__IMPL_S("__tex1DLayered_v2", "__tex1DLayered_rmnf_v2", + (float __x, int __layer), "tex.a1d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6}];", ("r"(__layer), "f"(__x))); +__IMPL_ALIAS("__itex1DLayered", "__tex1DLayered_v2"); + +__IMPL_S("__tex1DLayeredGrad_v2", "__tex1DLayeredGrad_rmnf_v2", + (float __x, int __layer, float __dPdx, float __dPdy), + "tex.grad.a1d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6}], {%7}, {%8};", + ("r"(__layer), "f"(__x), "f"(__dPdx), "f"(__dPdy))); +__IMPL_ALIAS("__itex1DLayeredGrad", "__tex1DLayeredGrad_v2"); + +__IMPL_S("__tex1DLayeredLod_v2", "__tex1DLayeredLod_rmnf_v2", + (float __x, int __layer, float __level), "tex.level.a1d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6}], %7;", + ("r"(__layer), "f"(__x), "f"(__level))); +__IMPL_ALIAS("__itex1DLayeredLod", "__tex1DLayeredLod_v2"); + +__IMPL_S("__tex1DLod_v2", "__tex1DLod_rmnf_v2", (float __x, float __level), + "tex.level.1d.v4", "f32", "{%0, %1, %2, %3}, [%4, {%5}], %6;", + ("f"(__x), "f"(__level))); +__IMPL_ALIAS("__itex1DLod", "__tex1DLod_v2"); + +// 2D +__IMPL_S("__tex2D_v2", "__tex2D_rmnf_v2", (float __x, float __y), "tex.2d.v4", + "f32", "{%0, %1, %2, %3}, [%4, {%5, %6}];", ("f"(__x), "f"(__y))); +__IMPL_ALIAS("__itex2D", "__tex2D_v2"); + +__IMPL_S3S("__itex2D_sparse", (float __x, float __y, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.2d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7}];\n\t" + " selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y))); + +__IMPL_S("__tex2DGrad_v2", "__tex2DGrad_rmnf_v2", + (float __x, float __y, const float2 *__dPdx, const float2 *__dPdy), + "tex.grad.2d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6}], {%7, %8}, {%9, %10};", + ("f"(__x), "f"(__y), "f"(__dPdx->x), "f"(__dPdx->y), "f"(__dPdy->x), + "f"(__dPdy->y))); +__IMPL_ALIAS("__itex2DGrad_v2", "__tex2DGrad_v2"); + +__IMPL_S3S("__itex2DGrad_sparse", + (float __x, float __y, const float2 *__dPdx, const float2 *__dPdy, + unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.grad.2d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7}], {%8, %9}, {%10, %11};\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y), "f"(__dPdx->x), "f"(__dPdx->y), "f"(__dPdy->x), + "f"(__dPdy->y))); + +__IMPL_S("__tex2DLayered_v2", "__tex2DLayered_rmnf_v2", + (float __x, float __y, int __layer), "tex.a2d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}];", + ("r"(__layer), "f"(__x), "f"(__y))); +__IMPL_ALIAS("__itex2DLayered", "__tex2DLayered_v2"); + +__IMPL_S3S("__itex2DLayered_sparse", + (float __x, float __y, int __layer, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.a2d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}];\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("r"(__layer), "f"(__x), "f"(__y))); + +__IMPL_S("__tex2DLayeredGrad_v2", "__tex2DLayeredGrad_rmnf_v2", + (float __x, float __y, int __layer, const float2 *__dPdx, + const float2 *__dPdy), + "tex.grad.a2d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}], {%8, %9}, {%10, %11};", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__dPdx->x), "f"(__dPdx->y), + "f"(__dPdy->x), "f"(__dPdy->y))); +__IMPL_ALIAS("__itex2DLayeredGrad_v2", "__tex2DLayeredGrad_v2"); + +__IMPL_S3S( + "__itex2DLayeredGrad_sparse", + (float __x, float __y, int __layer, const float2 *__dPdx, + const float2 *__dPdy, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.grad.a2d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}], {%9, %10}, {%11, %12};\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__dPdx->x), "f"(__dPdx->y), + "f"(__dPdy->x), "f"(__dPdy->y))); + +__IMPL_S("__tex2DLayeredLod_v2", "__tex2DLayeredLod_rmnf_v2", + (float __x, float __y, int __layer, float __level), "tex.level.a2d.v4", + "f32", "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}], %8;", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__level))); +__IMPL_ALIAS("__itex2DLayeredLod", "__tex2DLayeredLod_v2"); + +__IMPL_S3S("__itex2DLayeredLod_sparse", + (float __x, float __y, int __layer, float __level, + unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.level.a2d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}], %9;\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__level))); + +__IMPL_S("__tex2DLod_v2", "__tex2DLod_rmnf_v2", + (float __x, float __y, float __level), "tex.level.2d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6}], %7;", + ("f"(__x), "f"(__y), "f"(__level))); +__IMPL_ALIAS("__itex2DLod", "__tex2DLod_v2"); + +__IMPL_S3S("__itex2DLod_sparse", + (float __x, float __y, float __level, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.level.2d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7}], %8;\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y), "f"(__level))); + +// 2D gather is special. Unlike other variants that translate into exactly one +// asm instruction, it uses one of the four different instructions selected by +// __comp. We implement each instruction variant separately, and dispatch the +// right one from the manually implemented 'umbrella' fetch. +#define __IMPL_2DGATHER(variant, instr) \ + __IMPL_SI(__IDV("__tex2Dgather_v2", variant), \ + __IDV("__tex2Dgather_rmnf_v2", variant), \ + (float __x, float __y, int __comp), instr, "f32", \ + "{%0, %1, %2, %3}, [%4, {%5, %6}];", ("f"(__x), "f"(__y))); \ + __IMPL_ALIASI(__IDV("__itex2Dgather", variant), \ + __IDV("__tex2Dgather_v2", variant)); \ + __IMPL_S3SI(__IDV("__itex2Dgather_sparse", variant), \ + (float __x, float __y, unsigned char *__ir, int __comp), \ + "{.reg .pred %%p0;\n\t" instr, "f32", \ + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7}];\n\t" \ + "selp.u16 %4, 1, 0, %%p0; }", \ + ("f"(__x), "f"(__y))); +__IMPL_2DGATHER(0, "tld4.r.2d.v4"); +__IMPL_2DGATHER(1, "tld4.g.2d.v4"); +__IMPL_2DGATHER(2, "tld4.b.2d.v4"); +__IMPL_2DGATHER(3, "tld4.a.2d.v4"); + +// Umbrella dispatcher -- calls into specific 2Dgather variant. +template <> struct __tex_fetch_v4<__ID("__tex2Dgather_v2")> { + template + __device__ static __T __run(cudaTextureObject_t __obj, float __x, float __y, + int __comp) { + switch (__comp) { + case 0: + return __tex_fetch_v4<__IDV("__tex2Dgather_v2", 0)>::__run<__T>( + __obj, __x, __y, __comp); + case 1: + return __tex_fetch_v4<__IDV("__tex2Dgather_v2", 1)>::__run<__T>( + __obj, __x, __y, __comp); + case 2: + return __tex_fetch_v4<__IDV("__tex2Dgather_v2", 2)>::__run<__T>( + __obj, __x, __y, __comp); + case 3: + return __tex_fetch_v4<__IDV("__tex2Dgather_v2", 3)>::__run<__T>( + __obj, __x, __y, __comp); + } + } +}; +__IMPL_ALIAS("__itex2Dgather", "__tex2Dgather_v2"); + +template <> struct __tex_fetch_v4<__ID("__tex2Dgather_rmnf_v2")> { + template + __device__ static float4 __run(cudaTextureObject_t __obj, float __x, + float __y, int __comp) { + switch (__comp) { + case 0: + return __tex_fetch_v4<__IDV("__tex2Dgather_rmnf_v2", 0)>::__run<__T>( + __obj, __x, __y, __comp); + case 1: + return __tex_fetch_v4<__IDV("__tex2Dgather_rmnf_v2", 1)>::__run<__T>( + __obj, __x, __y, __comp); + case 2: + return __tex_fetch_v4<__IDV("__tex2Dgather_rmnf_v2", 2)>::__run<__T>( + __obj, __x, __y, __comp); + case 3: + return __tex_fetch_v4<__IDV("__tex2Dgather_rmnf_v2", 3)>::__run<__T>( + __obj, __x, __y, __comp); + } + } +}; + +#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 600) +template <> struct __tex_fetch_v4<__ID("__itex2Dgather_sparse")> { + template + __device__ static __T __run(cudaTextureObject_t __obj, float __x, float __y, + unsigned char *__ir, int __comp) { + switch (__comp) { + case 0: + return __tex_fetch_v4<__IDV("__itex2Dgather_sparse", 0)>::__run<__T>( + __obj, __x, __y, __ir, __comp); + case 1: + return __tex_fetch_v4<__IDV("__itex2Dgather_sparse", 1)>::__run<__T>( + __obj, __x, __y, __ir, __comp); + case 2: + return __tex_fetch_v4<__IDV("__itex2Dgather_sparse", 2)>::__run<__T>( + __obj, __x, __y, __ir, __comp); + case 3: + return __tex_fetch_v4<__IDV("__itex2Dgather_sparse", 3)>::__run<__T>( + __obj, __x, __y, __ir, __comp); + } + } +}; +#endif + +// 3D +__IMPL_S("__tex3D_v2", "__tex3D_rmnf_v2", (float __x, float __y, float __z), + "tex.3d.v4", "f32", "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}];", + ("f"(__x), "f"(__y), "f"(__z))); +__IMPL_ALIAS("__itex3D", "__tex3D_v2"); + +__IMPL_S3S("__itex3D_sparse", + (float __x, float __y, float __z, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.3d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}];\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y), "f"(__z))); + +__IMPL_S("__tex3DGrad_v2", "__tex3DGrad_rmnf_v2", + (float __x, float __y, float __z, const float4 *__dPdx, + const float4 *__dPdy), + "tex.grad.3d.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}], " + "{%8, %9, %10, %10}, {%11, %12, %13, %13};", + ("f"(__x), "f"(__y), "f"(__z), "f"(__dPdx->x), "f"(__dPdx->y), + "f"(__dPdx->z), "f"(__dPdy->x), "f"(__dPdy->y), "f"(__dPdy->z))); +__IMPL_ALIAS("__itex3DGrad_v2", "__tex3DGrad_v2"); + +__IMPL_S3S("__itex3DGrad_sparse", + (float __x, float __y, float __z, const float4 *__dPdx, + const float4 *__dPdy, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.grad.3d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}], " + "{%9, %10, %11, %11}, {%12, %13, %14, %14};\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y), "f"(__z), "f"(__dPdx->x), "f"(__dPdx->y), + "f"(__dPdx->z), "f"(__dPdy->x), "f"(__dPdy->y), "f"(__dPdy->z))); + +__IMPL_S("__tex3DLod_v2", "__tex3DLod_rmnf_v2", + (float __x, float __y, float __z, float __level), "tex.level.3d.v4", + "f32", "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}], %8;", + ("f"(__x), "f"(__y), "f"(__z), "f"(__level))); +__IMPL_ALIAS("__itex3DLod", "__tex3DLod_v2"); + +__IMPL_S3S("__itex3DLod_sparse", + (float __x, float __y, float __z, float __level, + unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.level.3d.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}], %9;\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y), "f"(__z), "f"(__level))); + +// Cubemap +__IMPL_S("__texCubemap_v2", "__texCubemap_rmnf_v2", + (float __x, float __y, float __z), "tex.cube.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}];", + ("f"(__x), "f"(__y), "f"(__z))); +__IMPL_ALIAS("__itexCubemap", "__texCubemap_v2"); + +__IMPL_S3S("__itexCubemap_sparse", + (float __x, float __y, float __z, unsigned char *__ir), + "{.reg .pred %%p0;\n\t" + "tex.cube.v4", + "f32", + "{%0, %1, %2, %3}|%%p0, [%5, {%6, %7, %8, %8}];\n\t" + "selp.u16 %4, 1, 0, %%p0; }", + ("f"(__x), "f"(__y), "f"(__z))); + +__IMPL_S("__texCubemapGrad_v2", "__texCubemapGrad_rmnf_v2", + (float __x, float __y, float __z, const float4 *__dPdx, + const float4 *__dPdy), + "tex.grad.cube.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}], " + "{%8, %9, %10, %10}, {%11, %12, %13, %13};", + ("f"(__x), "f"(__y), "f"(__z), "f"(__dPdx->x), "f"(__dPdx->y), + "f"(__dPdx->z), "f"(__dPdy->x), "f"(__dPdy->y), "f"(__dPdy->z))); +__IMPL_ALIAS("__itexCubemapGrad_v2", "__texCubemapGrad_v2"); + +__IMPL_S("__texCubemapLayered_v2", "__texCubemapLayered_rmnf_v2", + (float __x, float __y, float __z, int __layer), "tex.acube.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %8}];", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__z))); +__IMPL_ALIAS("__itexCubemapLayered", "__texCubemapLayered_v2"); + +__IMPL_S("__texCubemapLayeredGrad_v2", "__texCubemapLayeredGrad_rmnf_v2", + (float __x, float __y, float __z, int __layer, const float4 *__dPdx, + const float4 *__dPdy), + "tex.grad.acube.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %8}], " + "{%9, %10, %11, %11}, {%12, %13, %14, %14};", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__z), "f"(__dPdx->x), + "f"(__dPdx->y), "f"(__dPdx->z), "f"(__dPdy->x), "f"(__dPdy->y), + "f"(__dPdy->z))); +__IMPL_ALIAS("__itexCubemapLayeredGrad_v2", "__texCubemapLayeredGrad_v2"); + +__IMPL_S("__texCubemapLayeredLod_v2", "__texCubemapLayeredLod_rmnf_v2", + (float __x, float __y, float __z, int __layer, float __level), + "tex.level.acube.v4", "f32", + "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %8}], %9;", + ("r"(__layer), "f"(__x), "f"(__y), "f"(__z), "f"(__level))); +__IMPL_ALIAS("__itexCubemapLayeredLod", "__texCubemapLayeredLod_v2"); + +__IMPL_S("__texCubemapLod_v2", "__texCubemapLod_rmnf_v2", + (float __x, float __y, float __z, float __level), "tex.level.cube.v4", + "f32", "{%0, %1, %2, %3}, [%4, {%5, %6, %7, %7}], %8;", + ("f"(__x), "f"(__y), "f"(__z), "f"(__level))); +__IMPL_ALIAS("__itexCubemapLod", "__texCubemapLod_v2"); + +// Helper class for extracting slice of data from V4 fetch results. +template struct __convert { + template ::__base_t)> + __device__ static __DestT __run(__SrcT __v); + template <> __device__ static __DestT __run<1>(__SrcT __v) { return {__v.x}; } + template <> __device__ static __DestT __run<2>(__SrcT __v) { + return {__v.x, __v.y}; + } + template <> __device__ static __DestT __run<3>(__SrcT __v) { + return {__v.x, __v.y, __v.z}; + } + template <> __device__ static __DestT __run<4>(__SrcT __v) { + return {__v.x, __v.y, __v.z, __v.w}; + } +}; + +// These are the top-level function overloads the __nv_tex_surf_handler expands +// to. Each overload deals with one of the several ways __nv_tex_surf_handler +// is called by CUDA headers. In the end, each of the overloads does the same +// job -- it figures out which `__tex_fetch_v4::run` variant should be used to +// fetch texture data and which `__convert::run` is needed to convert it into +// appropriate return type. + +// __nv_tex_surf_handler("__tex...", &ret, cudaTextureObject_t handle, args...); +// Data type and return type are based on ret. +template +__device__ static void __tex_fetch(__T *__ptr, cudaTextureObject_t __handle, + __Args... __args) { + using __FetchT = typename __TypeInfoT<__T>::__fetch_t; + *__ptr = __convert<__T, __FetchT>::__run( + __tex_fetch_v4<__op>::template __run<__FetchT>(__handle, __args...)); +} + +#if CUDA_VERSION < 12000 +// texture<> objects get magically converted into a texture reference. However, +// there's no way to convert them to cudaTextureObject_t on C++ level. So, we +// cheat a bit and use inline assembly to do it. It costs us an extra register +// and a move, but that is easy for ptxas to optimize away. +template +__device__ cudaTextureObject_t __tex_handle_to_obj(__T __handle) { + cudaTextureObject_t __obj; + asm("mov.b64 %0, %1; " : "=l"(__obj) : "l"(__handle)); + return __obj; +} + +// __nv_tex_surf_handler ("__tex...", &ret, textureReference, args...); +// Data type and return type is based on ret. +template +__device__ static void __tex_fetch(__T *__ptr, __HandleT __handle, + __Args... __args) { + using __FetchT = typename __TypeInfoT<__T>::__fetch_t; + *__ptr = __convert<__T, __FetchT>::__run( + __tex_fetch_v4<__op>::template __run<__FetchT>( + __tex_handle_to_obj(__handle), __args...)); +} + +// __nv_tex_surf_handler ("__tex...", &type_dummy, &ret, texture<...>, args...); +// cudaReadModeNormalizedFloat fetches always return float4. +template +__device__ static void +__tex_fetch(__DataT *, __RetT *__ptr, + texture<__DataT, __TexT, cudaReadModeNormalizedFloat> __handle, + __Args... __args) { + using __FetchT = typename __TypeInfoT<__DataT>::__fetch_t; + *__ptr = __convert<__RetT, float4>::__run( + __tex_fetch_v4<__op>::template __run<__FetchT>( + __tex_handle_to_obj(__handle), __args...)); +} + +// __nv_tex_surf_handler ("__tex...", &type_dummy, &ret, texture<...>, args...); +// For cudaReadModeElementType fetch return type is based on type_dummy. +template +__device__ static void +__tex_fetch(__DataT *, __RetT *__ptr, + texture<__DataT, __TexT, cudaReadModeElementType> __handle, + __Args... __args) { + using __FetchT = typename __TypeInfoT<__DataT>::__fetch_t; + *__ptr = __convert<__RetT, __FetchT>::__run( + __tex_fetch_v4<__op>::template __run<__FetchT>( + __tex_handle_to_obj(__handle), __args...)); +} +#endif // CUDA_VERSION +} // namespace __cuda_tex +} // namespace +#pragma pop_macro("__ASM_OUT") +#pragma pop_macro("__ASM_OUTP") +#pragma pop_macro("__Args") +#pragma pop_macro("__ID") +#pragma pop_macro("__IDV") +#pragma pop_macro("__IMPL_2DGATHER") +#pragma pop_macro("__IMPL_ALIAS") +#pragma pop_macro("__IMPL_ALIASI") +#pragma pop_macro("__IMPL_F1") +#pragma pop_macro("__IMPL_F3") +#pragma pop_macro("__IMPL_F3N") +#pragma pop_macro("__IMPL_F3S") +#pragma pop_macro("__IMPL_S") +#pragma pop_macro("__IMPL_S3") +#pragma pop_macro("__IMPL_S3I") +#pragma pop_macro("__IMPL_S3N") +#pragma pop_macro("__IMPL_S3NI") +#pragma pop_macro("__IMPL_S3S") +#pragma pop_macro("__IMPL_S3SI") +#pragma pop_macro("__IMPL_SI") +#pragma pop_macro("__L") +#pragma pop_macro("__STRIP_PARENS") +#endif // __CLANG_CUDA_TEXTURE_INTRINSICS_H__ diff --git a/llvm/lib/clang/19/include/__clang_hip_cmath.h b/llvm/lib/clang/19/include/__clang_hip_cmath.h new file mode 100644 index 0000000000000000000000000000000000000000..b52d6b78166113d48061e15e61b7864d64c32752 --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_hip_cmath.h @@ -0,0 +1,842 @@ +/*===---- __clang_hip_cmath.h - HIP cmath decls -----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_HIP_CMATH_H__ +#define __CLANG_HIP_CMATH_H__ + +#if !defined(__HIP__) && !defined(__OPENMP_AMDGCN__) +#error "This file is for HIP and OpenMP AMDGCN device compilation only." +#endif + +#if !defined(__HIPCC_RTC__) +#if defined(__cplusplus) +#include +#include +#include +#endif +#include +#include +#endif // !defined(__HIPCC_RTC__) + +#pragma push_macro("__DEVICE__") +#pragma push_macro("__CONSTEXPR__") +#ifdef __OPENMP_AMDGCN__ +#define __DEVICE__ static __attribute__((always_inline, nothrow)) +#define __CONSTEXPR__ constexpr +#else +#define __DEVICE__ static __device__ inline __attribute__((always_inline)) +#define __CONSTEXPR__ +#endif // __OPENMP_AMDGCN__ + +// Start with functions that cannot be defined by DEF macros below. +#if defined(__cplusplus) +#if defined __OPENMP_AMDGCN__ +__DEVICE__ __CONSTEXPR__ float fabs(float __x) { return ::fabsf(__x); } +__DEVICE__ __CONSTEXPR__ float sin(float __x) { return ::sinf(__x); } +__DEVICE__ __CONSTEXPR__ float cos(float __x) { return ::cosf(__x); } +#endif +__DEVICE__ __CONSTEXPR__ double abs(double __x) { return ::fabs(__x); } +__DEVICE__ __CONSTEXPR__ float abs(float __x) { return ::fabsf(__x); } +__DEVICE__ __CONSTEXPR__ long long abs(long long __n) { return ::llabs(__n); } +__DEVICE__ __CONSTEXPR__ long abs(long __n) { return ::labs(__n); } +__DEVICE__ __CONSTEXPR__ float fma(float __x, float __y, float __z) { + return ::fmaf(__x, __y, __z); +} +#if !defined(__HIPCC_RTC__) +// The value returned by fpclassify is platform dependent, therefore it is not +// supported by hipRTC. +__DEVICE__ __CONSTEXPR__ int fpclassify(float __x) { + return __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, + FP_ZERO, __x); +} +__DEVICE__ __CONSTEXPR__ int fpclassify(double __x) { + return __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, + FP_ZERO, __x); +} +#endif // !defined(__HIPCC_RTC__) + +__DEVICE__ __CONSTEXPR__ float frexp(float __arg, int *__exp) { + return ::frexpf(__arg, __exp); +} + +#if defined(__OPENMP_AMDGCN__) +// For OpenMP we work around some old system headers that have non-conforming +// `isinf(float)` and `isnan(float)` implementations that return an `int`. We do +// this by providing two versions of these functions, differing only in the +// return type. To avoid conflicting definitions we disable implicit base +// function generation. That means we will end up with two specializations, one +// per type, but only one has a base function defined by the system header. +#pragma omp begin declare variant match( \ + implementation = {extension(disable_implicit_base)}) + +// FIXME: We lack an extension to customize the mangling of the variants, e.g., +// add a suffix. This means we would clash with the names of the variants +// (note that we do not create implicit base functions here). To avoid +// this clash we add a new trait to some of them that is always true +// (this is LLVM after all ;)). It will only influence the mangled name +// of the variants inside the inner region and avoid the clash. +#pragma omp begin declare variant match(implementation = {vendor(llvm)}) + +__DEVICE__ __CONSTEXPR__ int isinf(float __x) { return ::__isinff(__x); } +__DEVICE__ __CONSTEXPR__ int isinf(double __x) { return ::__isinf(__x); } +__DEVICE__ __CONSTEXPR__ int isfinite(float __x) { return ::__finitef(__x); } +__DEVICE__ __CONSTEXPR__ int isfinite(double __x) { return ::__finite(__x); } +__DEVICE__ __CONSTEXPR__ int isnan(float __x) { return ::__isnanf(__x); } +__DEVICE__ __CONSTEXPR__ int isnan(double __x) { return ::__isnan(__x); } + +#pragma omp end declare variant +#endif // defined(__OPENMP_AMDGCN__) + +__DEVICE__ __CONSTEXPR__ bool isinf(float __x) { return ::__isinff(__x); } +__DEVICE__ __CONSTEXPR__ bool isinf(double __x) { return ::__isinf(__x); } +__DEVICE__ __CONSTEXPR__ bool isfinite(float __x) { return ::__finitef(__x); } +__DEVICE__ __CONSTEXPR__ bool isfinite(double __x) { return ::__finite(__x); } +__DEVICE__ __CONSTEXPR__ bool isnan(float __x) { return ::__isnanf(__x); } +__DEVICE__ __CONSTEXPR__ bool isnan(double __x) { return ::__isnan(__x); } + +#if defined(__OPENMP_AMDGCN__) +#pragma omp end declare variant +#endif // defined(__OPENMP_AMDGCN__) + +__DEVICE__ __CONSTEXPR__ bool isgreater(float __x, float __y) { + return __builtin_isgreater(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isgreater(double __x, double __y) { + return __builtin_isgreater(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isgreaterequal(float __x, float __y) { + return __builtin_isgreaterequal(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isgreaterequal(double __x, double __y) { + return __builtin_isgreaterequal(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isless(float __x, float __y) { + return __builtin_isless(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isless(double __x, double __y) { + return __builtin_isless(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool islessequal(float __x, float __y) { + return __builtin_islessequal(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool islessequal(double __x, double __y) { + return __builtin_islessequal(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool islessgreater(float __x, float __y) { + return __builtin_islessgreater(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool islessgreater(double __x, double __y) { + return __builtin_islessgreater(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isnormal(float __x) { + return __builtin_isnormal(__x); +} +__DEVICE__ __CONSTEXPR__ bool isnormal(double __x) { + return __builtin_isnormal(__x); +} +__DEVICE__ __CONSTEXPR__ bool isunordered(float __x, float __y) { + return __builtin_isunordered(__x, __y); +} +__DEVICE__ __CONSTEXPR__ bool isunordered(double __x, double __y) { + return __builtin_isunordered(__x, __y); +} +__DEVICE__ __CONSTEXPR__ float modf(float __x, float *__iptr) { + return ::modff(__x, __iptr); +} +__DEVICE__ __CONSTEXPR__ float pow(float __base, int __iexp) { + return ::powif(__base, __iexp); +} +__DEVICE__ __CONSTEXPR__ double pow(double __base, int __iexp) { + return ::powi(__base, __iexp); +} +__DEVICE__ __CONSTEXPR__ float remquo(float __x, float __y, int *__quo) { + return ::remquof(__x, __y, __quo); +} +__DEVICE__ __CONSTEXPR__ float scalbln(float __x, long int __n) { + return ::scalblnf(__x, __n); +} +__DEVICE__ __CONSTEXPR__ bool signbit(float __x) { return ::__signbitf(__x); } +__DEVICE__ __CONSTEXPR__ bool signbit(double __x) { return ::__signbit(__x); } + +// Notably missing above is nexttoward. We omit it because +// ocml doesn't provide an implementation, and we don't want to be in the +// business of implementing tricky libm functions in this header. + +// Other functions. +__DEVICE__ __CONSTEXPR__ _Float16 fma(_Float16 __x, _Float16 __y, + _Float16 __z) { + return __builtin_fmaf16(__x, __y, __z); +} +__DEVICE__ __CONSTEXPR__ _Float16 pow(_Float16 __base, int __iexp) { + return __ocml_pown_f16(__base, __iexp); +} + +#ifndef __OPENMP_AMDGCN__ +// BEGIN DEF_FUN and HIP_OVERLOAD + +// BEGIN DEF_FUN + +#pragma push_macro("__DEF_FUN1") +#pragma push_macro("__DEF_FUN2") +#pragma push_macro("__DEF_FUN2_FI") + +// Define cmath functions with float argument and returns __retty. +#define __DEF_FUN1(__retty, __func) \ + __DEVICE__ __CONSTEXPR__ __retty __func(float __x) { return __func##f(__x); } + +// Define cmath functions with two float arguments and returns __retty. +#define __DEF_FUN2(__retty, __func) \ + __DEVICE__ __CONSTEXPR__ __retty __func(float __x, float __y) { \ + return __func##f(__x, __y); \ + } + +// Define cmath functions with a float and an int argument and returns __retty. +#define __DEF_FUN2_FI(__retty, __func) \ + __DEVICE__ __CONSTEXPR__ __retty __func(float __x, int __y) { \ + return __func##f(__x, __y); \ + } + +__DEF_FUN1(float, acos) +__DEF_FUN1(float, acosh) +__DEF_FUN1(float, asin) +__DEF_FUN1(float, asinh) +__DEF_FUN1(float, atan) +__DEF_FUN2(float, atan2) +__DEF_FUN1(float, atanh) +__DEF_FUN1(float, cbrt) +__DEF_FUN1(float, ceil) +__DEF_FUN2(float, copysign) +__DEF_FUN1(float, cos) +__DEF_FUN1(float, cosh) +__DEF_FUN1(float, erf) +__DEF_FUN1(float, erfc) +__DEF_FUN1(float, exp) +__DEF_FUN1(float, exp2) +__DEF_FUN1(float, expm1) +__DEF_FUN1(float, fabs) +__DEF_FUN2(float, fdim) +__DEF_FUN1(float, floor) +__DEF_FUN2(float, fmax) +__DEF_FUN2(float, fmin) +__DEF_FUN2(float, fmod) +__DEF_FUN2(float, hypot) +__DEF_FUN1(int, ilogb) +__DEF_FUN2_FI(float, ldexp) +__DEF_FUN1(float, lgamma) +__DEF_FUN1(float, log) +__DEF_FUN1(float, log10) +__DEF_FUN1(float, log1p) +__DEF_FUN1(float, log2) +__DEF_FUN1(float, logb) +__DEF_FUN1(long long, llrint) +__DEF_FUN1(long long, llround) +__DEF_FUN1(long, lrint) +__DEF_FUN1(long, lround) +__DEF_FUN1(float, nearbyint) +__DEF_FUN2(float, nextafter) +__DEF_FUN2(float, pow) +__DEF_FUN2(float, remainder) +__DEF_FUN1(float, rint) +__DEF_FUN1(float, round) +__DEF_FUN2_FI(float, scalbn) +__DEF_FUN1(float, sin) +__DEF_FUN1(float, sinh) +__DEF_FUN1(float, sqrt) +__DEF_FUN1(float, tan) +__DEF_FUN1(float, tanh) +__DEF_FUN1(float, tgamma) +__DEF_FUN1(float, trunc) + +#pragma pop_macro("__DEF_FUN1") +#pragma pop_macro("__DEF_FUN2") +#pragma pop_macro("__DEF_FUN2_FI") + +// END DEF_FUN + +// BEGIN HIP_OVERLOAD + +#pragma push_macro("__HIP_OVERLOAD1") +#pragma push_macro("__HIP_OVERLOAD2") + +// __hip_enable_if::type is a type function which returns __T if __B is true. +template struct __hip_enable_if {}; + +template struct __hip_enable_if { typedef __T type; }; + +namespace __hip { +template struct is_integral { + enum { value = 0 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; +template <> struct is_integral { + enum { value = 1 }; +}; + +// ToDo: specializes is_arithmetic<_Float16> +template struct is_arithmetic { + enum { value = 0 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; +template <> struct is_arithmetic { + enum { value = 1 }; +}; + +struct true_type { + static const __constant__ bool value = true; +}; +struct false_type { + static const __constant__ bool value = false; +}; + +template struct is_same : public false_type {}; +template struct is_same<__T, __T> : public true_type {}; + +template struct add_rvalue_reference { typedef __T &&type; }; + +template typename add_rvalue_reference<__T>::type declval(); + +// decltype is only available in C++11 and above. +#if __cplusplus >= 201103L +// __hip_promote +template struct __numeric_type { + static void __test(...); + static _Float16 __test(_Float16); + static float __test(float); + static double __test(char); + static double __test(int); + static double __test(unsigned); + static double __test(long); + static double __test(unsigned long); + static double __test(long long); + static double __test(unsigned long long); + static double __test(double); + // No support for long double, use double instead. + static double __test(long double); + + typedef decltype(__test(declval<_Tp>())) type; + static const bool value = !is_same::value; +}; + +template <> struct __numeric_type { static const bool value = true; }; + +template ::value &&__numeric_type<_A2>::value + &&__numeric_type<_A3>::value> +class __promote_imp { +public: + static const bool value = false; +}; + +template +class __promote_imp<_A1, _A2, _A3, true> { +private: + typedef typename __promote_imp<_A1>::type __type1; + typedef typename __promote_imp<_A2>::type __type2; + typedef typename __promote_imp<_A3>::type __type3; + +public: + typedef decltype(__type1() + __type2() + __type3()) type; + static const bool value = true; +}; + +template class __promote_imp<_A1, _A2, void, true> { +private: + typedef typename __promote_imp<_A1>::type __type1; + typedef typename __promote_imp<_A2>::type __type2; + +public: + typedef decltype(__type1() + __type2()) type; + static const bool value = true; +}; + +template class __promote_imp<_A1, void, void, true> { +public: + typedef typename __numeric_type<_A1>::type type; + static const bool value = true; +}; + +template +class __promote : public __promote_imp<_A1, _A2, _A3> {}; +#endif //__cplusplus >= 201103L +} // namespace __hip + +// __HIP_OVERLOAD1 is used to resolve function calls with integer argument to +// avoid compilation error due to ambibuity. e.g. floor(5) is resolved with +// floor(double). +#define __HIP_OVERLOAD1(__retty, __fn) \ + template \ + __DEVICE__ __CONSTEXPR__ \ + typename __hip_enable_if<__hip::is_integral<__T>::value, __retty>::type \ + __fn(__T __x) { \ + return ::__fn((double)__x); \ + } + +// __HIP_OVERLOAD2 is used to resolve function calls with mixed float/double +// or integer argument to avoid compilation error due to ambibuity. e.g. +// max(5.0f, 6.0) is resolved with max(double, double). +#if __cplusplus >= 201103L +#define __HIP_OVERLOAD2(__retty, __fn) \ + template \ + __DEVICE__ __CONSTEXPR__ typename __hip_enable_if< \ + __hip::is_arithmetic<__T1>::value && __hip::is_arithmetic<__T2>::value, \ + typename __hip::__promote<__T1, __T2>::type>::type \ + __fn(__T1 __x, __T2 __y) { \ + typedef typename __hip::__promote<__T1, __T2>::type __result_type; \ + return __fn((__result_type)__x, (__result_type)__y); \ + } +#else +#define __HIP_OVERLOAD2(__retty, __fn) \ + template \ + __DEVICE__ __CONSTEXPR__ \ + typename __hip_enable_if<__hip::is_arithmetic<__T1>::value && \ + __hip::is_arithmetic<__T2>::value, \ + __retty>::type \ + __fn(__T1 __x, __T2 __y) { \ + return __fn((double)__x, (double)__y); \ + } +#endif + +__HIP_OVERLOAD1(double, acos) +__HIP_OVERLOAD1(double, acosh) +__HIP_OVERLOAD1(double, asin) +__HIP_OVERLOAD1(double, asinh) +__HIP_OVERLOAD1(double, atan) +__HIP_OVERLOAD2(double, atan2) +__HIP_OVERLOAD1(double, atanh) +__HIP_OVERLOAD1(double, cbrt) +__HIP_OVERLOAD1(double, ceil) +__HIP_OVERLOAD2(double, copysign) +__HIP_OVERLOAD1(double, cos) +__HIP_OVERLOAD1(double, cosh) +__HIP_OVERLOAD1(double, erf) +__HIP_OVERLOAD1(double, erfc) +__HIP_OVERLOAD1(double, exp) +__HIP_OVERLOAD1(double, exp2) +__HIP_OVERLOAD1(double, expm1) +__HIP_OVERLOAD1(double, fabs) +__HIP_OVERLOAD2(double, fdim) +__HIP_OVERLOAD1(double, floor) +__HIP_OVERLOAD2(double, fmax) +__HIP_OVERLOAD2(double, fmin) +__HIP_OVERLOAD2(double, fmod) +#if !defined(__HIPCC_RTC__) +__HIP_OVERLOAD1(int, fpclassify) +#endif // !defined(__HIPCC_RTC__) +__HIP_OVERLOAD2(double, hypot) +__HIP_OVERLOAD1(int, ilogb) +__HIP_OVERLOAD1(bool, isfinite) +__HIP_OVERLOAD2(bool, isgreater) +__HIP_OVERLOAD2(bool, isgreaterequal) +__HIP_OVERLOAD1(bool, isinf) +__HIP_OVERLOAD2(bool, isless) +__HIP_OVERLOAD2(bool, islessequal) +__HIP_OVERLOAD2(bool, islessgreater) +__HIP_OVERLOAD1(bool, isnan) +__HIP_OVERLOAD1(bool, isnormal) +__HIP_OVERLOAD2(bool, isunordered) +__HIP_OVERLOAD1(double, lgamma) +__HIP_OVERLOAD1(double, log) +__HIP_OVERLOAD1(double, log10) +__HIP_OVERLOAD1(double, log1p) +__HIP_OVERLOAD1(double, log2) +__HIP_OVERLOAD1(double, logb) +__HIP_OVERLOAD1(long long, llrint) +__HIP_OVERLOAD1(long long, llround) +__HIP_OVERLOAD1(long, lrint) +__HIP_OVERLOAD1(long, lround) +__HIP_OVERLOAD1(double, nearbyint) +__HIP_OVERLOAD2(double, nextafter) +__HIP_OVERLOAD2(double, pow) +__HIP_OVERLOAD2(double, remainder) +__HIP_OVERLOAD1(double, rint) +__HIP_OVERLOAD1(double, round) +__HIP_OVERLOAD1(bool, signbit) +__HIP_OVERLOAD1(double, sin) +__HIP_OVERLOAD1(double, sinh) +__HIP_OVERLOAD1(double, sqrt) +__HIP_OVERLOAD1(double, tan) +__HIP_OVERLOAD1(double, tanh) +__HIP_OVERLOAD1(double, tgamma) +__HIP_OVERLOAD1(double, trunc) + +// Overload these but don't add them to std, they are not part of cmath. +__HIP_OVERLOAD2(double, max) +__HIP_OVERLOAD2(double, min) + +// Additional Overloads that don't quite match HIP_OVERLOAD. +#if __cplusplus >= 201103L +template +__DEVICE__ __CONSTEXPR__ typename __hip_enable_if< + __hip::is_arithmetic<__T1>::value && __hip::is_arithmetic<__T2>::value && + __hip::is_arithmetic<__T3>::value, + typename __hip::__promote<__T1, __T2, __T3>::type>::type +fma(__T1 __x, __T2 __y, __T3 __z) { + typedef typename __hip::__promote<__T1, __T2, __T3>::type __result_type; + return ::fma((__result_type)__x, (__result_type)__y, (__result_type)__z); +} +#else +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_arithmetic<__T1>::value && + __hip::is_arithmetic<__T2>::value && + __hip::is_arithmetic<__T3>::value, + double>::type + fma(__T1 __x, __T2 __y, __T3 __z) { + return ::fma((double)__x, (double)__y, (double)__z); +} +#endif + +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_integral<__T>::value, double>::type + frexp(__T __x, int *__exp) { + return ::frexp((double)__x, __exp); +} + +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_integral<__T>::value, double>::type + ldexp(__T __x, int __exp) { + return ::ldexp((double)__x, __exp); +} + +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_integral<__T>::value, double>::type + modf(__T __x, double *__exp) { + return ::modf((double)__x, __exp); +} + +#if __cplusplus >= 201103L +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_arithmetic<__T1>::value && + __hip::is_arithmetic<__T2>::value, + typename __hip::__promote<__T1, __T2>::type>::type + remquo(__T1 __x, __T2 __y, int *__quo) { + typedef typename __hip::__promote<__T1, __T2>::type __result_type; + return ::remquo((__result_type)__x, (__result_type)__y, __quo); +} +#else +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_arithmetic<__T1>::value && + __hip::is_arithmetic<__T2>::value, + double>::type + remquo(__T1 __x, __T2 __y, int *__quo) { + return ::remquo((double)__x, (double)__y, __quo); +} +#endif + +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_integral<__T>::value, double>::type + scalbln(__T __x, long int __exp) { + return ::scalbln((double)__x, __exp); +} + +template +__DEVICE__ __CONSTEXPR__ + typename __hip_enable_if<__hip::is_integral<__T>::value, double>::type + scalbn(__T __x, int __exp) { + return ::scalbn((double)__x, __exp); +} + +#pragma pop_macro("__HIP_OVERLOAD1") +#pragma pop_macro("__HIP_OVERLOAD2") + +// END HIP_OVERLOAD + +// END DEF_FUN and HIP_OVERLOAD + +#endif // ifndef __OPENMP_AMDGCN__ +#endif // defined(__cplusplus) + +#ifndef __OPENMP_AMDGCN__ +// Define these overloads inside the namespace our standard library uses. +#if !defined(__HIPCC_RTC__) +#ifdef _LIBCPP_BEGIN_NAMESPACE_STD +_LIBCPP_BEGIN_NAMESPACE_STD +#else +namespace std { +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_BEGIN_NAMESPACE_VERSION +#endif // _GLIBCXX_BEGIN_NAMESPACE_VERSION +#endif // _LIBCPP_BEGIN_NAMESPACE_STD + +// Pull the new overloads we defined above into namespace std. +// using ::abs; - This may be considered for C++. +using ::acos; +using ::acosh; +using ::asin; +using ::asinh; +using ::atan; +using ::atan2; +using ::atanh; +using ::cbrt; +using ::ceil; +using ::copysign; +using ::cos; +using ::cosh; +using ::erf; +using ::erfc; +using ::exp; +using ::exp2; +using ::expm1; +using ::fabs; +using ::fdim; +using ::floor; +using ::fma; +using ::fmax; +using ::fmin; +using ::fmod; +using ::fpclassify; +using ::frexp; +using ::hypot; +using ::ilogb; +using ::isfinite; +using ::isgreater; +using ::isgreaterequal; +using ::isless; +using ::islessequal; +using ::islessgreater; +using ::isnormal; +using ::isunordered; +using ::ldexp; +using ::lgamma; +using ::llrint; +using ::llround; +using ::log; +using ::log10; +using ::log1p; +using ::log2; +using ::logb; +using ::lrint; +using ::lround; +using ::modf; +// using ::nan; - This may be considered for C++. +// using ::nanf; - This may be considered for C++. +// using ::nanl; - This is not yet defined. +using ::nearbyint; +using ::nextafter; +// using ::nexttoward; - Omit this since we do not have a definition. +using ::pow; +using ::remainder; +using ::remquo; +using ::rint; +using ::round; +using ::scalbln; +using ::scalbn; +using ::signbit; +using ::sin; +using ::sinh; +using ::sqrt; +using ::tan; +using ::tanh; +using ::tgamma; +using ::trunc; + +// Well this is fun: We need to pull these symbols in for libc++, but we can't +// pull them in with libstdc++, because its ::isinf and ::isnan are different +// than its std::isinf and std::isnan. +#ifndef __GLIBCXX__ +using ::isinf; +using ::isnan; +#endif + +// Finally, pull the "foobarf" functions that HIP defines into std. +using ::acosf; +using ::acoshf; +using ::asinf; +using ::asinhf; +using ::atan2f; +using ::atanf; +using ::atanhf; +using ::cbrtf; +using ::ceilf; +using ::copysignf; +using ::cosf; +using ::coshf; +using ::erfcf; +using ::erff; +using ::exp2f; +using ::expf; +using ::expm1f; +using ::fabsf; +using ::fdimf; +using ::floorf; +using ::fmaf; +using ::fmaxf; +using ::fminf; +using ::fmodf; +using ::frexpf; +using ::hypotf; +using ::ilogbf; +using ::ldexpf; +using ::lgammaf; +using ::llrintf; +using ::llroundf; +using ::log10f; +using ::log1pf; +using ::log2f; +using ::logbf; +using ::logf; +using ::lrintf; +using ::lroundf; +using ::modff; +using ::nearbyintf; +using ::nextafterf; +// using ::nexttowardf; - Omit this since we do not have a definition. +using ::powf; +using ::remainderf; +using ::remquof; +using ::rintf; +using ::roundf; +using ::scalblnf; +using ::scalbnf; +using ::sinf; +using ::sinhf; +using ::sqrtf; +using ::tanf; +using ::tanhf; +using ::tgammaf; +using ::truncf; + +#ifdef _LIBCPP_END_NAMESPACE_STD +_LIBCPP_END_NAMESPACE_STD +#else +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_END_NAMESPACE_VERSION +#endif // _GLIBCXX_BEGIN_NAMESPACE_VERSION +} // namespace std +#endif // _LIBCPP_END_NAMESPACE_STD +#endif // !defined(__HIPCC_RTC__) + +// Define device-side math functions from on MSVC. +#if !defined(__HIPCC_RTC__) +#if defined(_MSC_VER) + +// Before VS2019, `` is also included in `` and other headers. +// But, from VS2019, it's only included in ``. Need to include +// `` here to ensure C functions declared there won't be markded as +// `__host__` and `__device__` through `` wrapper. +#include + +#if defined(__cplusplus) +extern "C" { +#endif // defined(__cplusplus) +__DEVICE__ __CONSTEXPR__ __attribute__((overloadable)) double _Cosh(double x, + double y) { + return cosh(x) * y; +} +__DEVICE__ __CONSTEXPR__ __attribute__((overloadable)) float _FCosh(float x, + float y) { + return coshf(x) * y; +} +__DEVICE__ __CONSTEXPR__ __attribute__((overloadable)) short _Dtest(double *p) { + return fpclassify(*p); +} +__DEVICE__ __CONSTEXPR__ __attribute__((overloadable)) short _FDtest(float *p) { + return fpclassify(*p); +} +__DEVICE__ __CONSTEXPR__ __attribute__((overloadable)) double _Sinh(double x, + double y) { + return sinh(x) * y; +} +__DEVICE__ __CONSTEXPR__ __attribute__((overloadable)) float _FSinh(float x, + float y) { + return sinhf(x) * y; +} +#if defined(__cplusplus) +} +#endif // defined(__cplusplus) +#endif // defined(_MSC_VER) +#endif // !defined(__HIPCC_RTC__) +#endif // ifndef __OPENMP_AMDGCN__ + +#pragma pop_macro("__DEVICE__") +#pragma pop_macro("__CONSTEXPR__") + +#endif // __CLANG_HIP_CMATH_H__ diff --git a/llvm/lib/clang/19/include/__clang_hip_libdevice_declares.h b/llvm/lib/clang/19/include/__clang_hip_libdevice_declares.h new file mode 100644 index 0000000000000000000000000000000000000000..f15198b3d9f93e9fb13e8d68a918a5f1c193299c --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_hip_libdevice_declares.h @@ -0,0 +1,353 @@ +/*===---- __clang_hip_libdevice_declares.h - HIP device library decls -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_HIP_LIBDEVICE_DECLARES_H__ +#define __CLANG_HIP_LIBDEVICE_DECLARES_H__ + +#if !defined(__HIPCC_RTC__) && __has_include("hip/hip_version.h") +#include "hip/hip_version.h" +#endif // __has_include("hip/hip_version.h") + +#ifdef __cplusplus +extern "C" { +#endif + +// BEGIN FLOAT +__device__ __attribute__((const)) float __ocml_acos_f32(float); +__device__ __attribute__((pure)) float __ocml_acosh_f32(float); +__device__ __attribute__((const)) float __ocml_asin_f32(float); +__device__ __attribute__((pure)) float __ocml_asinh_f32(float); +__device__ __attribute__((const)) float __ocml_atan2_f32(float, float); +__device__ __attribute__((const)) float __ocml_atan_f32(float); +__device__ __attribute__((pure)) float __ocml_atanh_f32(float); +__device__ __attribute__((pure)) float __ocml_cbrt_f32(float); +__device__ __attribute__((const)) float __ocml_ceil_f32(float); +__device__ __attribute__((const)) __device__ float __ocml_copysign_f32(float, + float); +__device__ float __ocml_cos_f32(float); +__device__ float __ocml_native_cos_f32(float); +__device__ __attribute__((pure)) __device__ float __ocml_cosh_f32(float); +__device__ float __ocml_cospi_f32(float); +__device__ float __ocml_i0_f32(float); +__device__ float __ocml_i1_f32(float); +__device__ __attribute__((pure)) float __ocml_erfc_f32(float); +__device__ __attribute__((pure)) float __ocml_erfcinv_f32(float); +__device__ __attribute__((pure)) float __ocml_erfcx_f32(float); +__device__ __attribute__((pure)) float __ocml_erf_f32(float); +__device__ __attribute__((pure)) float __ocml_erfinv_f32(float); +__device__ __attribute__((pure)) float __ocml_exp10_f32(float); +__device__ __attribute__((pure)) float __ocml_native_exp10_f32(float); +__device__ __attribute__((pure)) float __ocml_exp2_f32(float); +__device__ __attribute__((pure)) float __ocml_exp_f32(float); +__device__ __attribute__((pure)) float __ocml_native_exp_f32(float); +__device__ __attribute__((pure)) float __ocml_expm1_f32(float); +__device__ __attribute__((const)) float __ocml_fabs_f32(float); +__device__ __attribute__((const)) float __ocml_fdim_f32(float, float); +__device__ __attribute__((const)) float __ocml_floor_f32(float); +__device__ __attribute__((const)) float __ocml_fma_f32(float, float, float); +__device__ __attribute__((const)) float __ocml_fmax_f32(float, float); +__device__ __attribute__((const)) float __ocml_fmin_f32(float, float); +__device__ __attribute__((const)) __device__ float __ocml_fmod_f32(float, + float); +__device__ float __ocml_frexp_f32(float, + __attribute__((address_space(5))) int *); +__device__ __attribute__((const)) float __ocml_hypot_f32(float, float); +__device__ __attribute__((const)) int __ocml_ilogb_f32(float); +__device__ __attribute__((const)) int __ocml_isfinite_f32(float); +__device__ __attribute__((const)) int __ocml_isinf_f32(float); +__device__ __attribute__((const)) int __ocml_isnan_f32(float); +__device__ float __ocml_j0_f32(float); +__device__ float __ocml_j1_f32(float); +__device__ __attribute__((const)) float __ocml_ldexp_f32(float, int); +__device__ float __ocml_lgamma_f32(float); +__device__ __attribute__((pure)) float __ocml_log10_f32(float); +__device__ __attribute__((pure)) float __ocml_native_log10_f32(float); +__device__ __attribute__((pure)) float __ocml_log1p_f32(float); +__device__ __attribute__((pure)) float __ocml_log2_f32(float); +__device__ __attribute__((pure)) float __ocml_native_log2_f32(float); +__device__ __attribute__((const)) float __ocml_logb_f32(float); +__device__ __attribute__((pure)) float __ocml_log_f32(float); +__device__ __attribute__((pure)) float __ocml_native_log_f32(float); +__device__ float __ocml_modf_f32(float, + __attribute__((address_space(5))) float *); +__device__ __attribute__((const)) float __ocml_nearbyint_f32(float); +__device__ __attribute__((const)) float __ocml_nextafter_f32(float, float); +__device__ __attribute__((const)) float __ocml_len3_f32(float, float, float); +__device__ __attribute__((const)) float __ocml_len4_f32(float, float, float, + float); +__device__ __attribute__((pure)) float __ocml_ncdf_f32(float); +__device__ __attribute__((pure)) float __ocml_ncdfinv_f32(float); +__device__ __attribute__((pure)) float __ocml_pow_f32(float, float); +__device__ __attribute__((pure)) float __ocml_pown_f32(float, int); +__device__ __attribute__((pure)) float __ocml_rcbrt_f32(float); +__device__ __attribute__((const)) float __ocml_remainder_f32(float, float); +__device__ float __ocml_remquo_f32(float, float, + __attribute__((address_space(5))) int *); +__device__ __attribute__((const)) float __ocml_rhypot_f32(float, float); +__device__ __attribute__((const)) float __ocml_rint_f32(float); +__device__ __attribute__((const)) float __ocml_rlen3_f32(float, float, float); +__device__ __attribute__((const)) float __ocml_rlen4_f32(float, float, float, + float); +__device__ __attribute__((const)) float __ocml_round_f32(float); +__device__ __attribute__((pure)) float __ocml_rsqrt_f32(float); +__device__ __attribute__((const)) float __ocml_scalb_f32(float, float); +__device__ __attribute__((const)) float __ocml_scalbn_f32(float, int); +__device__ __attribute__((const)) int __ocml_signbit_f32(float); +__device__ float __ocml_sincos_f32(float, + __attribute__((address_space(5))) float *); +__device__ float __ocml_sincospi_f32(float, + __attribute__((address_space(5))) float *); +__device__ float __ocml_sin_f32(float); +__device__ float __ocml_native_sin_f32(float); +__device__ __attribute__((pure)) float __ocml_sinh_f32(float); +__device__ float __ocml_sinpi_f32(float); +__device__ __attribute__((const)) float __ocml_sqrt_f32(float); +__device__ __attribute__((const)) float __ocml_native_sqrt_f32(float); +__device__ float __ocml_tan_f32(float); +__device__ __attribute__((pure)) float __ocml_tanh_f32(float); +__device__ float __ocml_tgamma_f32(float); +__device__ __attribute__((const)) float __ocml_trunc_f32(float); +__device__ float __ocml_y0_f32(float); +__device__ float __ocml_y1_f32(float); + +// BEGIN INTRINSICS +__device__ __attribute__((const)) float __ocml_add_rte_f32(float, float); +__device__ __attribute__((const)) float __ocml_add_rtn_f32(float, float); +__device__ __attribute__((const)) float __ocml_add_rtp_f32(float, float); +__device__ __attribute__((const)) float __ocml_add_rtz_f32(float, float); +__device__ __attribute__((const)) float __ocml_sub_rte_f32(float, float); +__device__ __attribute__((const)) float __ocml_sub_rtn_f32(float, float); +__device__ __attribute__((const)) float __ocml_sub_rtp_f32(float, float); +__device__ __attribute__((const)) float __ocml_sub_rtz_f32(float, float); +__device__ __attribute__((const)) float __ocml_mul_rte_f32(float, float); +__device__ __attribute__((const)) float __ocml_mul_rtn_f32(float, float); +__device__ __attribute__((const)) float __ocml_mul_rtp_f32(float, float); +__device__ __attribute__((const)) float __ocml_mul_rtz_f32(float, float); +__device__ __attribute__((const)) float __ocml_div_rte_f32(float, float); +__device__ __attribute__((const)) float __ocml_div_rtn_f32(float, float); +__device__ __attribute__((const)) float __ocml_div_rtp_f32(float, float); +__device__ __attribute__((const)) float __ocml_div_rtz_f32(float, float); +__device__ __attribute__((const)) float __ocml_sqrt_rte_f32(float); +__device__ __attribute__((const)) float __ocml_sqrt_rtn_f32(float); +__device__ __attribute__((const)) float __ocml_sqrt_rtp_f32(float); +__device__ __attribute__((const)) float __ocml_sqrt_rtz_f32(float); +__device__ __attribute__((const)) float __ocml_fma_rte_f32(float, float, float); +__device__ __attribute__((const)) float __ocml_fma_rtn_f32(float, float, float); +__device__ __attribute__((const)) float __ocml_fma_rtp_f32(float, float, float); +__device__ __attribute__((const)) float __ocml_fma_rtz_f32(float, float, float); +// END INTRINSICS +// END FLOAT + +// BEGIN DOUBLE +__device__ __attribute__((const)) double __ocml_acos_f64(double); +__device__ __attribute__((pure)) double __ocml_acosh_f64(double); +__device__ __attribute__((const)) double __ocml_asin_f64(double); +__device__ __attribute__((pure)) double __ocml_asinh_f64(double); +__device__ __attribute__((const)) double __ocml_atan2_f64(double, double); +__device__ __attribute__((const)) double __ocml_atan_f64(double); +__device__ __attribute__((pure)) double __ocml_atanh_f64(double); +__device__ __attribute__((pure)) double __ocml_cbrt_f64(double); +__device__ __attribute__((const)) double __ocml_ceil_f64(double); +__device__ __attribute__((const)) double __ocml_copysign_f64(double, double); +__device__ double __ocml_cos_f64(double); +__device__ __attribute__((pure)) double __ocml_cosh_f64(double); +__device__ double __ocml_cospi_f64(double); +__device__ double __ocml_i0_f64(double); +__device__ double __ocml_i1_f64(double); +__device__ __attribute__((pure)) double __ocml_erfc_f64(double); +__device__ __attribute__((pure)) double __ocml_erfcinv_f64(double); +__device__ __attribute__((pure)) double __ocml_erfcx_f64(double); +__device__ __attribute__((pure)) double __ocml_erf_f64(double); +__device__ __attribute__((pure)) double __ocml_erfinv_f64(double); +__device__ __attribute__((pure)) double __ocml_exp10_f64(double); +__device__ __attribute__((pure)) double __ocml_exp2_f64(double); +__device__ __attribute__((pure)) double __ocml_exp_f64(double); +__device__ __attribute__((pure)) double __ocml_expm1_f64(double); +__device__ __attribute__((const)) double __ocml_fabs_f64(double); +__device__ __attribute__((const)) double __ocml_fdim_f64(double, double); +__device__ __attribute__((const)) double __ocml_floor_f64(double); +__device__ __attribute__((const)) double __ocml_fma_f64(double, double, double); +__device__ __attribute__((const)) double __ocml_fmax_f64(double, double); +__device__ __attribute__((const)) double __ocml_fmin_f64(double, double); +__device__ __attribute__((const)) double __ocml_fmod_f64(double, double); +__device__ double __ocml_frexp_f64(double, + __attribute__((address_space(5))) int *); +__device__ __attribute__((const)) double __ocml_hypot_f64(double, double); +__device__ __attribute__((const)) int __ocml_ilogb_f64(double); +__device__ __attribute__((const)) int __ocml_isfinite_f64(double); +__device__ __attribute__((const)) int __ocml_isinf_f64(double); +__device__ __attribute__((const)) int __ocml_isnan_f64(double); +__device__ double __ocml_j0_f64(double); +__device__ double __ocml_j1_f64(double); +__device__ __attribute__((const)) double __ocml_ldexp_f64(double, int); +__device__ double __ocml_lgamma_f64(double); +__device__ __attribute__((pure)) double __ocml_log10_f64(double); +__device__ __attribute__((pure)) double __ocml_log1p_f64(double); +__device__ __attribute__((pure)) double __ocml_log2_f64(double); +__device__ __attribute__((const)) double __ocml_logb_f64(double); +__device__ __attribute__((pure)) double __ocml_log_f64(double); +__device__ double __ocml_modf_f64(double, + __attribute__((address_space(5))) double *); +__device__ __attribute__((const)) double __ocml_nearbyint_f64(double); +__device__ __attribute__((const)) double __ocml_nextafter_f64(double, double); +__device__ __attribute__((const)) double __ocml_len3_f64(double, double, + double); +__device__ __attribute__((const)) double __ocml_len4_f64(double, double, double, + double); +__device__ __attribute__((pure)) double __ocml_ncdf_f64(double); +__device__ __attribute__((pure)) double __ocml_ncdfinv_f64(double); +__device__ __attribute__((pure)) double __ocml_pow_f64(double, double); +__device__ __attribute__((pure)) double __ocml_pown_f64(double, int); +__device__ __attribute__((pure)) double __ocml_rcbrt_f64(double); +__device__ __attribute__((const)) double __ocml_remainder_f64(double, double); +__device__ double __ocml_remquo_f64(double, double, + __attribute__((address_space(5))) int *); +__device__ __attribute__((const)) double __ocml_rhypot_f64(double, double); +__device__ __attribute__((const)) double __ocml_rint_f64(double); +__device__ __attribute__((const)) double __ocml_rlen3_f64(double, double, + double); +__device__ __attribute__((const)) double __ocml_rlen4_f64(double, double, + double, double); +__device__ __attribute__((const)) double __ocml_round_f64(double); +__device__ __attribute__((pure)) double __ocml_rsqrt_f64(double); +__device__ __attribute__((const)) double __ocml_scalb_f64(double, double); +__device__ __attribute__((const)) double __ocml_scalbn_f64(double, int); +__device__ __attribute__((const)) int __ocml_signbit_f64(double); +__device__ double __ocml_sincos_f64(double, + __attribute__((address_space(5))) double *); +__device__ double +__ocml_sincospi_f64(double, __attribute__((address_space(5))) double *); +__device__ double __ocml_sin_f64(double); +__device__ __attribute__((pure)) double __ocml_sinh_f64(double); +__device__ double __ocml_sinpi_f64(double); +__device__ __attribute__((const)) double __ocml_sqrt_f64(double); +__device__ double __ocml_tan_f64(double); +__device__ __attribute__((pure)) double __ocml_tanh_f64(double); +__device__ double __ocml_tgamma_f64(double); +__device__ __attribute__((const)) double __ocml_trunc_f64(double); +__device__ double __ocml_y0_f64(double); +__device__ double __ocml_y1_f64(double); + +// BEGIN INTRINSICS +__device__ __attribute__((const)) double __ocml_add_rte_f64(double, double); +__device__ __attribute__((const)) double __ocml_add_rtn_f64(double, double); +__device__ __attribute__((const)) double __ocml_add_rtp_f64(double, double); +__device__ __attribute__((const)) double __ocml_add_rtz_f64(double, double); +__device__ __attribute__((const)) double __ocml_sub_rte_f64(double, double); +__device__ __attribute__((const)) double __ocml_sub_rtn_f64(double, double); +__device__ __attribute__((const)) double __ocml_sub_rtp_f64(double, double); +__device__ __attribute__((const)) double __ocml_sub_rtz_f64(double, double); +__device__ __attribute__((const)) double __ocml_mul_rte_f64(double, double); +__device__ __attribute__((const)) double __ocml_mul_rtn_f64(double, double); +__device__ __attribute__((const)) double __ocml_mul_rtp_f64(double, double); +__device__ __attribute__((const)) double __ocml_mul_rtz_f64(double, double); +__device__ __attribute__((const)) double __ocml_div_rte_f64(double, double); +__device__ __attribute__((const)) double __ocml_div_rtn_f64(double, double); +__device__ __attribute__((const)) double __ocml_div_rtp_f64(double, double); +__device__ __attribute__((const)) double __ocml_div_rtz_f64(double, double); +__device__ __attribute__((const)) double __ocml_sqrt_rte_f64(double); +__device__ __attribute__((const)) double __ocml_sqrt_rtn_f64(double); +__device__ __attribute__((const)) double __ocml_sqrt_rtp_f64(double); +__device__ __attribute__((const)) double __ocml_sqrt_rtz_f64(double); +__device__ __attribute__((const)) double __ocml_fma_rte_f64(double, double, + double); +__device__ __attribute__((const)) double __ocml_fma_rtn_f64(double, double, + double); +__device__ __attribute__((const)) double __ocml_fma_rtp_f64(double, double, + double); +__device__ __attribute__((const)) double __ocml_fma_rtz_f64(double, double, + double); + +__device__ __attribute__((const)) _Float16 __ocml_ceil_f16(_Float16); +__device__ _Float16 __ocml_cos_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_cvtrtn_f16_f32(float); +__device__ __attribute__((const)) _Float16 __ocml_cvtrtp_f16_f32(float); +__device__ __attribute__((const)) _Float16 __ocml_cvtrtz_f16_f32(float); +__device__ __attribute__((pure)) _Float16 __ocml_exp_f16(_Float16); +__device__ __attribute__((pure)) _Float16 __ocml_exp10_f16(_Float16); +__device__ __attribute__((pure)) _Float16 __ocml_exp2_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_floor_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_fma_f16(_Float16, _Float16, + _Float16); +__device__ __attribute__((const)) _Float16 __ocml_fmax_f16(_Float16, _Float16); +__device__ __attribute__((const)) _Float16 __ocml_fmin_f16(_Float16, _Float16); +__device__ __attribute__((const)) _Float16 __ocml_fabs_f16(_Float16); +__device__ __attribute__((const)) int __ocml_isinf_f16(_Float16); +__device__ __attribute__((const)) int __ocml_isnan_f16(_Float16); +__device__ __attribute__((pure)) _Float16 __ocml_log_f16(_Float16); +__device__ __attribute__((pure)) _Float16 __ocml_log10_f16(_Float16); +__device__ __attribute__((pure)) _Float16 __ocml_log2_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_rint_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_rsqrt_f16(_Float16); +__device__ _Float16 __ocml_sin_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_sqrt_f16(_Float16); +__device__ __attribute__((const)) _Float16 __ocml_trunc_f16(_Float16); +__device__ __attribute__((pure)) _Float16 __ocml_pown_f16(_Float16, int); + +typedef _Float16 __2f16 __attribute__((ext_vector_type(2))); +typedef short __2i16 __attribute__((ext_vector_type(2))); + +// We need to match C99's bool and get an i1 in the IR. +#ifdef __cplusplus +typedef bool __ockl_bool; +#else +typedef _Bool __ockl_bool; +#endif + +__device__ __attribute__((const)) float __ockl_fdot2(__2f16 a, __2f16 b, + float c, __ockl_bool s); +__device__ __attribute__((const)) __2f16 __ocml_ceil_2f16(__2f16); +__device__ __attribute__((const)) __2f16 __ocml_fabs_2f16(__2f16); +__device__ __2f16 __ocml_cos_2f16(__2f16); +__device__ __attribute__((pure)) __2f16 __ocml_exp_2f16(__2f16); +__device__ __attribute__((pure)) __2f16 __ocml_exp10_2f16(__2f16); +__device__ __attribute__((pure)) __2f16 __ocml_exp2_2f16(__2f16); +__device__ __attribute__((const)) __2f16 __ocml_floor_2f16(__2f16); +__device__ __attribute__((const)) +__2f16 __ocml_fma_2f16(__2f16, __2f16, __2f16); +__device__ __attribute__((const)) __2i16 __ocml_isinf_2f16(__2f16); +__device__ __attribute__((const)) __2i16 __ocml_isnan_2f16(__2f16); +__device__ __attribute__((pure)) __2f16 __ocml_log_2f16(__2f16); +__device__ __attribute__((pure)) __2f16 __ocml_log10_2f16(__2f16); +__device__ __attribute__((pure)) __2f16 __ocml_log2_2f16(__2f16); + +#if HIP_VERSION_MAJOR * 100 + HIP_VERSION_MINOR >= 560 +#define __DEPRECATED_SINCE_HIP_560(X) __attribute__((deprecated(X))) +#else +#define __DEPRECATED_SINCE_HIP_560(X) +#endif + +// Deprecated, should be removed when rocm releases using it are no longer +// relevant. +__DEPRECATED_SINCE_HIP_560("use ((_Float16)1.0) / ") +__device__ inline _Float16 __llvm_amdgcn_rcp_f16(_Float16 x) { + return ((_Float16)1.0f) / x; +} + +__DEPRECATED_SINCE_HIP_560("use ((__2f16)1.0) / ") +__device__ inline __2f16 +__llvm_amdgcn_rcp_2f16(__2f16 __x) +{ + return ((__2f16)1.0f) / __x; +} + +#undef __DEPRECATED_SINCE_HIP_560 + +__device__ __attribute__((const)) __2f16 __ocml_rint_2f16(__2f16); +__device__ __attribute__((const)) __2f16 __ocml_rsqrt_2f16(__2f16); +__device__ __2f16 __ocml_sin_2f16(__2f16); +__device__ __attribute__((const)) __2f16 __ocml_sqrt_2f16(__2f16); +__device__ __attribute__((const)) __2f16 __ocml_trunc_2f16(__2f16); +__device__ __attribute__((const)) __2f16 __ocml_pown_2f16(__2f16, __2i16); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // __CLANG_HIP_LIBDEVICE_DECLARES_H__ diff --git a/llvm/lib/clang/19/include/__clang_hip_math.h b/llvm/lib/clang/19/include/__clang_hip_math.h new file mode 100644 index 0000000000000000000000000000000000000000..11e1e7d032586f8c930df5928c18ea68b24e34bd --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_hip_math.h @@ -0,0 +1,1324 @@ +/*===---- __clang_hip_math.h - Device-side HIP math support ----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CLANG_HIP_MATH_H__ +#define __CLANG_HIP_MATH_H__ + +#if !defined(__HIP__) && !defined(__OPENMP_AMDGCN__) +#error "This file is for HIP and OpenMP AMDGCN device compilation only." +#endif + +#if !defined(__HIPCC_RTC__) +#include +#include +#ifdef __OPENMP_AMDGCN__ +#include +#endif +#endif // !defined(__HIPCC_RTC__) + +#pragma push_macro("__DEVICE__") + +#ifdef __OPENMP_AMDGCN__ +#define __DEVICE__ static inline __attribute__((always_inline, nothrow)) +#else +#define __DEVICE__ static __device__ inline __attribute__((always_inline)) +#endif + +// Device library provides fast low precision and slow full-recision +// implementations for some functions. Which one gets selected depends on +// __CLANG_GPU_APPROX_TRANSCENDENTALS__ which gets defined by clang if +// -ffast-math or -fgpu-approx-transcendentals are in effect. +#pragma push_macro("__FAST_OR_SLOW") +#if defined(__CLANG_GPU_APPROX_TRANSCENDENTALS__) +#define __FAST_OR_SLOW(fast, slow) fast +#else +#define __FAST_OR_SLOW(fast, slow) slow +#endif + +// A few functions return bool type starting only in C++11. +#pragma push_macro("__RETURN_TYPE") +#ifdef __OPENMP_AMDGCN__ +#define __RETURN_TYPE int +#else +#if defined(__cplusplus) +#define __RETURN_TYPE bool +#else +#define __RETURN_TYPE int +#endif +#endif // __OPENMP_AMDGCN__ + +#if defined (__cplusplus) && __cplusplus < 201103L +// emulate static_assert on type sizes +template +struct __compare_result{}; +template<> +struct __compare_result { + static const __device__ bool valid; +}; + +__DEVICE__ +void __suppress_unused_warning(bool b){}; +template +__DEVICE__ void __static_assert_equal_size() { + __suppress_unused_warning(__compare_result::valid); +} + +#define __static_assert_type_size_equal(A, B) \ + __static_assert_equal_size() + +#else +#define __static_assert_type_size_equal(A,B) \ + static_assert((A) == (B), "") + +#endif + +__DEVICE__ +uint64_t __make_mantissa_base8(const char *__tagp __attribute__((nonnull))) { + uint64_t __r = 0; + while (*__tagp != '\0') { + char __tmp = *__tagp; + + if (__tmp >= '0' && __tmp <= '7') + __r = (__r * 8u) + __tmp - '0'; + else + return 0; + + ++__tagp; + } + + return __r; +} + +__DEVICE__ +uint64_t __make_mantissa_base10(const char *__tagp __attribute__((nonnull))) { + uint64_t __r = 0; + while (*__tagp != '\0') { + char __tmp = *__tagp; + + if (__tmp >= '0' && __tmp <= '9') + __r = (__r * 10u) + __tmp - '0'; + else + return 0; + + ++__tagp; + } + + return __r; +} + +__DEVICE__ +uint64_t __make_mantissa_base16(const char *__tagp __attribute__((nonnull))) { + uint64_t __r = 0; + while (*__tagp != '\0') { + char __tmp = *__tagp; + + if (__tmp >= '0' && __tmp <= '9') + __r = (__r * 16u) + __tmp - '0'; + else if (__tmp >= 'a' && __tmp <= 'f') + __r = (__r * 16u) + __tmp - 'a' + 10; + else if (__tmp >= 'A' && __tmp <= 'F') + __r = (__r * 16u) + __tmp - 'A' + 10; + else + return 0; + + ++__tagp; + } + + return __r; +} + +__DEVICE__ +uint64_t __make_mantissa(const char *__tagp __attribute__((nonnull))) { + if (*__tagp == '0') { + ++__tagp; + + if (*__tagp == 'x' || *__tagp == 'X') + return __make_mantissa_base16(__tagp); + else + return __make_mantissa_base8(__tagp); + } + + return __make_mantissa_base10(__tagp); +} + +// BEGIN FLOAT + +// BEGIN INTRINSICS + +__DEVICE__ +float __cosf(float __x) { return __ocml_native_cos_f32(__x); } + +__DEVICE__ +float __exp10f(float __x) { + const float __log2_10 = 0x1.a934f0p+1f; + return __builtin_amdgcn_exp2f(__log2_10 * __x); +} + +__DEVICE__ +float __expf(float __x) { + const float __log2_e = 0x1.715476p+0; + return __builtin_amdgcn_exp2f(__log2_e * __x); +} + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __fadd_rd(float __x, float __y) { return __ocml_add_rtn_f32(__x, __y); } +__DEVICE__ +float __fadd_rn(float __x, float __y) { return __ocml_add_rte_f32(__x, __y); } +__DEVICE__ +float __fadd_ru(float __x, float __y) { return __ocml_add_rtp_f32(__x, __y); } +__DEVICE__ +float __fadd_rz(float __x, float __y) { return __ocml_add_rtz_f32(__x, __y); } +#else +__DEVICE__ +float __fadd_rn(float __x, float __y) { return __x + __y; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __fdiv_rd(float __x, float __y) { return __ocml_div_rtn_f32(__x, __y); } +__DEVICE__ +float __fdiv_rn(float __x, float __y) { return __ocml_div_rte_f32(__x, __y); } +__DEVICE__ +float __fdiv_ru(float __x, float __y) { return __ocml_div_rtp_f32(__x, __y); } +__DEVICE__ +float __fdiv_rz(float __x, float __y) { return __ocml_div_rtz_f32(__x, __y); } +#else +__DEVICE__ +float __fdiv_rn(float __x, float __y) { return __x / __y; } +#endif + +__DEVICE__ +float __fdividef(float __x, float __y) { return __x / __y; } + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __fmaf_rd(float __x, float __y, float __z) { + return __ocml_fma_rtn_f32(__x, __y, __z); +} +__DEVICE__ +float __fmaf_rn(float __x, float __y, float __z) { + return __ocml_fma_rte_f32(__x, __y, __z); +} +__DEVICE__ +float __fmaf_ru(float __x, float __y, float __z) { + return __ocml_fma_rtp_f32(__x, __y, __z); +} +__DEVICE__ +float __fmaf_rz(float __x, float __y, float __z) { + return __ocml_fma_rtz_f32(__x, __y, __z); +} +#else +__DEVICE__ +float __fmaf_rn(float __x, float __y, float __z) { + return __builtin_fmaf(__x, __y, __z); +} +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __fmul_rd(float __x, float __y) { return __ocml_mul_rtn_f32(__x, __y); } +__DEVICE__ +float __fmul_rn(float __x, float __y) { return __ocml_mul_rte_f32(__x, __y); } +__DEVICE__ +float __fmul_ru(float __x, float __y) { return __ocml_mul_rtp_f32(__x, __y); } +__DEVICE__ +float __fmul_rz(float __x, float __y) { return __ocml_mul_rtz_f32(__x, __y); } +#else +__DEVICE__ +float __fmul_rn(float __x, float __y) { return __x * __y; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __frcp_rd(float __x) { return __ocml_div_rtn_f32(1.0f, __x); } +__DEVICE__ +float __frcp_rn(float __x) { return __ocml_div_rte_f32(1.0f, __x); } +__DEVICE__ +float __frcp_ru(float __x) { return __ocml_div_rtp_f32(1.0f, __x); } +__DEVICE__ +float __frcp_rz(float __x) { return __ocml_div_rtz_f32(1.0f, __x); } +#else +__DEVICE__ +float __frcp_rn(float __x) { return 1.0f / __x; } +#endif + +__DEVICE__ +float __frsqrt_rn(float __x) { return __builtin_amdgcn_rsqf(__x); } + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __fsqrt_rd(float __x) { return __ocml_sqrt_rtn_f32(__x); } +__DEVICE__ +float __fsqrt_rn(float __x) { return __ocml_sqrt_rte_f32(__x); } +__DEVICE__ +float __fsqrt_ru(float __x) { return __ocml_sqrt_rtp_f32(__x); } +__DEVICE__ +float __fsqrt_rz(float __x) { return __ocml_sqrt_rtz_f32(__x); } +#else +__DEVICE__ +float __fsqrt_rn(float __x) { return __ocml_native_sqrt_f32(__x); } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +float __fsub_rd(float __x, float __y) { return __ocml_sub_rtn_f32(__x, __y); } +__DEVICE__ +float __fsub_rn(float __x, float __y) { return __ocml_sub_rte_f32(__x, __y); } +__DEVICE__ +float __fsub_ru(float __x, float __y) { return __ocml_sub_rtp_f32(__x, __y); } +__DEVICE__ +float __fsub_rz(float __x, float __y) { return __ocml_sub_rtz_f32(__x, __y); } +#else +__DEVICE__ +float __fsub_rn(float __x, float __y) { return __x - __y; } +#endif + +__DEVICE__ +float __log10f(float __x) { return __builtin_log10f(__x); } + +__DEVICE__ +float __log2f(float __x) { return __builtin_amdgcn_logf(__x); } + +__DEVICE__ +float __logf(float __x) { return __builtin_logf(__x); } + +__DEVICE__ +float __powf(float __x, float __y) { return __ocml_pow_f32(__x, __y); } + +__DEVICE__ +float __saturatef(float __x) { return (__x < 0) ? 0 : ((__x > 1) ? 1 : __x); } + +__DEVICE__ +void __sincosf(float __x, float *__sinptr, float *__cosptr) { + *__sinptr = __ocml_native_sin_f32(__x); + *__cosptr = __ocml_native_cos_f32(__x); +} + +__DEVICE__ +float __sinf(float __x) { return __ocml_native_sin_f32(__x); } + +__DEVICE__ +float __tanf(float __x) { + return __sinf(__x) * __builtin_amdgcn_rcpf(__cosf(__x)); +} +// END INTRINSICS + +#if defined(__cplusplus) +__DEVICE__ +int abs(int __x) { + return __builtin_abs(__x); +} +__DEVICE__ +long labs(long __x) { + return __builtin_labs(__x); +} +__DEVICE__ +long long llabs(long long __x) { + return __builtin_llabs(__x); +} +#endif + +__DEVICE__ +float acosf(float __x) { return __ocml_acos_f32(__x); } + +__DEVICE__ +float acoshf(float __x) { return __ocml_acosh_f32(__x); } + +__DEVICE__ +float asinf(float __x) { return __ocml_asin_f32(__x); } + +__DEVICE__ +float asinhf(float __x) { return __ocml_asinh_f32(__x); } + +__DEVICE__ +float atan2f(float __x, float __y) { return __ocml_atan2_f32(__x, __y); } + +__DEVICE__ +float atanf(float __x) { return __ocml_atan_f32(__x); } + +__DEVICE__ +float atanhf(float __x) { return __ocml_atanh_f32(__x); } + +__DEVICE__ +float cbrtf(float __x) { return __ocml_cbrt_f32(__x); } + +__DEVICE__ +float ceilf(float __x) { return __builtin_ceilf(__x); } + +__DEVICE__ +float copysignf(float __x, float __y) { return __builtin_copysignf(__x, __y); } + +__DEVICE__ +float cosf(float __x) { return __FAST_OR_SLOW(__cosf, __ocml_cos_f32)(__x); } + +__DEVICE__ +float coshf(float __x) { return __ocml_cosh_f32(__x); } + +__DEVICE__ +float cospif(float __x) { return __ocml_cospi_f32(__x); } + +__DEVICE__ +float cyl_bessel_i0f(float __x) { return __ocml_i0_f32(__x); } + +__DEVICE__ +float cyl_bessel_i1f(float __x) { return __ocml_i1_f32(__x); } + +__DEVICE__ +float erfcf(float __x) { return __ocml_erfc_f32(__x); } + +__DEVICE__ +float erfcinvf(float __x) { return __ocml_erfcinv_f32(__x); } + +__DEVICE__ +float erfcxf(float __x) { return __ocml_erfcx_f32(__x); } + +__DEVICE__ +float erff(float __x) { return __ocml_erf_f32(__x); } + +__DEVICE__ +float erfinvf(float __x) { return __ocml_erfinv_f32(__x); } + +__DEVICE__ +float exp10f(float __x) { return __ocml_exp10_f32(__x); } + +__DEVICE__ +float exp2f(float __x) { return __builtin_exp2f(__x); } + +__DEVICE__ +float expf(float __x) { return __builtin_expf(__x); } + +__DEVICE__ +float expm1f(float __x) { return __ocml_expm1_f32(__x); } + +__DEVICE__ +float fabsf(float __x) { return __builtin_fabsf(__x); } + +__DEVICE__ +float fdimf(float __x, float __y) { return __ocml_fdim_f32(__x, __y); } + +__DEVICE__ +float fdividef(float __x, float __y) { return __x / __y; } + +__DEVICE__ +float floorf(float __x) { return __builtin_floorf(__x); } + +__DEVICE__ +float fmaf(float __x, float __y, float __z) { + return __builtin_fmaf(__x, __y, __z); +} + +__DEVICE__ +float fmaxf(float __x, float __y) { return __builtin_fmaxf(__x, __y); } + +__DEVICE__ +float fminf(float __x, float __y) { return __builtin_fminf(__x, __y); } + +__DEVICE__ +float fmodf(float __x, float __y) { return __ocml_fmod_f32(__x, __y); } + +__DEVICE__ +float frexpf(float __x, int *__nptr) { + return __builtin_frexpf(__x, __nptr); +} + +__DEVICE__ +float hypotf(float __x, float __y) { return __ocml_hypot_f32(__x, __y); } + +__DEVICE__ +int ilogbf(float __x) { return __ocml_ilogb_f32(__x); } + +__DEVICE__ +__RETURN_TYPE __finitef(float __x) { return __builtin_isfinite(__x); } + +__DEVICE__ +__RETURN_TYPE __isinff(float __x) { return __builtin_isinf(__x); } + +__DEVICE__ +__RETURN_TYPE __isnanf(float __x) { return __builtin_isnan(__x); } + +__DEVICE__ +float j0f(float __x) { return __ocml_j0_f32(__x); } + +__DEVICE__ +float j1f(float __x) { return __ocml_j1_f32(__x); } + +__DEVICE__ +float jnf(int __n, float __x) { // TODO: we could use Ahmes multiplication + // and the Miller & Brown algorithm + // for linear recurrences to get O(log n) steps, but it's unclear if + // it'd be beneficial in this case. + if (__n == 0) + return j0f(__x); + if (__n == 1) + return j1f(__x); + + float __x0 = j0f(__x); + float __x1 = j1f(__x); + for (int __i = 1; __i < __n; ++__i) { + float __x2 = (2 * __i) / __x * __x1 - __x0; + __x0 = __x1; + __x1 = __x2; + } + + return __x1; +} + +__DEVICE__ +float ldexpf(float __x, int __e) { return __builtin_amdgcn_ldexpf(__x, __e); } + +__DEVICE__ +float lgammaf(float __x) { return __ocml_lgamma_f32(__x); } + +__DEVICE__ +long long int llrintf(float __x) { return __builtin_rintf(__x); } + +__DEVICE__ +long long int llroundf(float __x) { return __builtin_roundf(__x); } + +__DEVICE__ +float log10f(float __x) { return __builtin_log10f(__x); } + +__DEVICE__ +float log1pf(float __x) { return __ocml_log1p_f32(__x); } + +__DEVICE__ +float log2f(float __x) { return __FAST_OR_SLOW(__log2f, __ocml_log2_f32)(__x); } + +__DEVICE__ +float logbf(float __x) { return __ocml_logb_f32(__x); } + +__DEVICE__ +float logf(float __x) { return __FAST_OR_SLOW(__logf, __ocml_log_f32)(__x); } + +__DEVICE__ +long int lrintf(float __x) { return __builtin_rintf(__x); } + +__DEVICE__ +long int lroundf(float __x) { return __builtin_roundf(__x); } + +__DEVICE__ +float modff(float __x, float *__iptr) { + float __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + float __r = + __ocml_modf_f32(__x, (__attribute__((address_space(5))) float *)&__tmp); + *__iptr = __tmp; + return __r; +} + +__DEVICE__ +float nanf(const char *__tagp __attribute__((nonnull))) { + union { + float val; + struct ieee_float { + unsigned int mantissa : 22; + unsigned int quiet : 1; + unsigned int exponent : 8; + unsigned int sign : 1; + } bits; + } __tmp; + __static_assert_type_size_equal(sizeof(__tmp.val), sizeof(__tmp.bits)); + + __tmp.bits.sign = 0u; + __tmp.bits.exponent = ~0u; + __tmp.bits.quiet = 1u; + __tmp.bits.mantissa = __make_mantissa(__tagp); + + return __tmp.val; +} + +__DEVICE__ +float nearbyintf(float __x) { return __builtin_nearbyintf(__x); } + +__DEVICE__ +float nextafterf(float __x, float __y) { + return __ocml_nextafter_f32(__x, __y); +} + +__DEVICE__ +float norm3df(float __x, float __y, float __z) { + return __ocml_len3_f32(__x, __y, __z); +} + +__DEVICE__ +float norm4df(float __x, float __y, float __z, float __w) { + return __ocml_len4_f32(__x, __y, __z, __w); +} + +__DEVICE__ +float normcdff(float __x) { return __ocml_ncdf_f32(__x); } + +__DEVICE__ +float normcdfinvf(float __x) { return __ocml_ncdfinv_f32(__x); } + +__DEVICE__ +float normf(int __dim, + const float *__a) { // TODO: placeholder until OCML adds support. + float __r = 0; + while (__dim--) { + __r += __a[0] * __a[0]; + ++__a; + } + + return __builtin_sqrtf(__r); +} + +__DEVICE__ +float powf(float __x, float __y) { return __ocml_pow_f32(__x, __y); } + +__DEVICE__ +float powif(float __x, int __y) { return __ocml_pown_f32(__x, __y); } + +__DEVICE__ +float rcbrtf(float __x) { return __ocml_rcbrt_f32(__x); } + +__DEVICE__ +float remainderf(float __x, float __y) { + return __ocml_remainder_f32(__x, __y); +} + +__DEVICE__ +float remquof(float __x, float __y, int *__quo) { + int __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + float __r = __ocml_remquo_f32( + __x, __y, (__attribute__((address_space(5))) int *)&__tmp); + *__quo = __tmp; + + return __r; +} + +__DEVICE__ +float rhypotf(float __x, float __y) { return __ocml_rhypot_f32(__x, __y); } + +__DEVICE__ +float rintf(float __x) { return __builtin_rintf(__x); } + +__DEVICE__ +float rnorm3df(float __x, float __y, float __z) { + return __ocml_rlen3_f32(__x, __y, __z); +} + +__DEVICE__ +float rnorm4df(float __x, float __y, float __z, float __w) { + return __ocml_rlen4_f32(__x, __y, __z, __w); +} + +__DEVICE__ +float rnormf(int __dim, + const float *__a) { // TODO: placeholder until OCML adds support. + float __r = 0; + while (__dim--) { + __r += __a[0] * __a[0]; + ++__a; + } + + return __ocml_rsqrt_f32(__r); +} + +__DEVICE__ +float roundf(float __x) { return __builtin_roundf(__x); } + +__DEVICE__ +float rsqrtf(float __x) { return __ocml_rsqrt_f32(__x); } + +__DEVICE__ +float scalblnf(float __x, long int __n) { + return (__n < INT_MAX) ? __builtin_amdgcn_ldexpf(__x, __n) + : __ocml_scalb_f32(__x, __n); +} + +__DEVICE__ +float scalbnf(float __x, int __n) { return __builtin_amdgcn_ldexpf(__x, __n); } + +__DEVICE__ +__RETURN_TYPE __signbitf(float __x) { return __builtin_signbitf(__x); } + +__DEVICE__ +void sincosf(float __x, float *__sinptr, float *__cosptr) { + float __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif +#ifdef __CLANG_CUDA_APPROX_TRANSCENDENTALS__ + __sincosf(__x, __sinptr, __cosptr); +#else + *__sinptr = + __ocml_sincos_f32(__x, (__attribute__((address_space(5))) float *)&__tmp); + *__cosptr = __tmp; +#endif +} + +__DEVICE__ +void sincospif(float __x, float *__sinptr, float *__cosptr) { + float __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + *__sinptr = __ocml_sincospi_f32( + __x, (__attribute__((address_space(5))) float *)&__tmp); + *__cosptr = __tmp; +} + +__DEVICE__ +float sinf(float __x) { return __FAST_OR_SLOW(__sinf, __ocml_sin_f32)(__x); } + +__DEVICE__ +float sinhf(float __x) { return __ocml_sinh_f32(__x); } + +__DEVICE__ +float sinpif(float __x) { return __ocml_sinpi_f32(__x); } + +__DEVICE__ +float sqrtf(float __x) { return __builtin_sqrtf(__x); } + +__DEVICE__ +float tanf(float __x) { return __ocml_tan_f32(__x); } + +__DEVICE__ +float tanhf(float __x) { return __ocml_tanh_f32(__x); } + +__DEVICE__ +float tgammaf(float __x) { return __ocml_tgamma_f32(__x); } + +__DEVICE__ +float truncf(float __x) { return __builtin_truncf(__x); } + +__DEVICE__ +float y0f(float __x) { return __ocml_y0_f32(__x); } + +__DEVICE__ +float y1f(float __x) { return __ocml_y1_f32(__x); } + +__DEVICE__ +float ynf(int __n, float __x) { // TODO: we could use Ahmes multiplication + // and the Miller & Brown algorithm + // for linear recurrences to get O(log n) steps, but it's unclear if + // it'd be beneficial in this case. Placeholder until OCML adds + // support. + if (__n == 0) + return y0f(__x); + if (__n == 1) + return y1f(__x); + + float __x0 = y0f(__x); + float __x1 = y1f(__x); + for (int __i = 1; __i < __n; ++__i) { + float __x2 = (2 * __i) / __x * __x1 - __x0; + __x0 = __x1; + __x1 = __x2; + } + + return __x1; +} + + +// END FLOAT + +// BEGIN DOUBLE +__DEVICE__ +double acos(double __x) { return __ocml_acos_f64(__x); } + +__DEVICE__ +double acosh(double __x) { return __ocml_acosh_f64(__x); } + +__DEVICE__ +double asin(double __x) { return __ocml_asin_f64(__x); } + +__DEVICE__ +double asinh(double __x) { return __ocml_asinh_f64(__x); } + +__DEVICE__ +double atan(double __x) { return __ocml_atan_f64(__x); } + +__DEVICE__ +double atan2(double __x, double __y) { return __ocml_atan2_f64(__x, __y); } + +__DEVICE__ +double atanh(double __x) { return __ocml_atanh_f64(__x); } + +__DEVICE__ +double cbrt(double __x) { return __ocml_cbrt_f64(__x); } + +__DEVICE__ +double ceil(double __x) { return __builtin_ceil(__x); } + +__DEVICE__ +double copysign(double __x, double __y) { + return __builtin_copysign(__x, __y); +} + +__DEVICE__ +double cos(double __x) { return __ocml_cos_f64(__x); } + +__DEVICE__ +double cosh(double __x) { return __ocml_cosh_f64(__x); } + +__DEVICE__ +double cospi(double __x) { return __ocml_cospi_f64(__x); } + +__DEVICE__ +double cyl_bessel_i0(double __x) { return __ocml_i0_f64(__x); } + +__DEVICE__ +double cyl_bessel_i1(double __x) { return __ocml_i1_f64(__x); } + +__DEVICE__ +double erf(double __x) { return __ocml_erf_f64(__x); } + +__DEVICE__ +double erfc(double __x) { return __ocml_erfc_f64(__x); } + +__DEVICE__ +double erfcinv(double __x) { return __ocml_erfcinv_f64(__x); } + +__DEVICE__ +double erfcx(double __x) { return __ocml_erfcx_f64(__x); } + +__DEVICE__ +double erfinv(double __x) { return __ocml_erfinv_f64(__x); } + +__DEVICE__ +double exp(double __x) { return __ocml_exp_f64(__x); } + +__DEVICE__ +double exp10(double __x) { return __ocml_exp10_f64(__x); } + +__DEVICE__ +double exp2(double __x) { return __ocml_exp2_f64(__x); } + +__DEVICE__ +double expm1(double __x) { return __ocml_expm1_f64(__x); } + +__DEVICE__ +double fabs(double __x) { return __builtin_fabs(__x); } + +__DEVICE__ +double fdim(double __x, double __y) { return __ocml_fdim_f64(__x, __y); } + +__DEVICE__ +double floor(double __x) { return __builtin_floor(__x); } + +__DEVICE__ +double fma(double __x, double __y, double __z) { + return __builtin_fma(__x, __y, __z); +} + +__DEVICE__ +double fmax(double __x, double __y) { return __builtin_fmax(__x, __y); } + +__DEVICE__ +double fmin(double __x, double __y) { return __builtin_fmin(__x, __y); } + +__DEVICE__ +double fmod(double __x, double __y) { return __ocml_fmod_f64(__x, __y); } + +__DEVICE__ +double frexp(double __x, int *__nptr) { + return __builtin_frexp(__x, __nptr); +} + +__DEVICE__ +double hypot(double __x, double __y) { return __ocml_hypot_f64(__x, __y); } + +__DEVICE__ +int ilogb(double __x) { return __ocml_ilogb_f64(__x); } + +__DEVICE__ +__RETURN_TYPE __finite(double __x) { return __builtin_isfinite(__x); } + +__DEVICE__ +__RETURN_TYPE __isinf(double __x) { return __builtin_isinf(__x); } + +__DEVICE__ +__RETURN_TYPE __isnan(double __x) { return __builtin_isnan(__x); } + +__DEVICE__ +double j0(double __x) { return __ocml_j0_f64(__x); } + +__DEVICE__ +double j1(double __x) { return __ocml_j1_f64(__x); } + +__DEVICE__ +double jn(int __n, double __x) { // TODO: we could use Ahmes multiplication + // and the Miller & Brown algorithm + // for linear recurrences to get O(log n) steps, but it's unclear if + // it'd be beneficial in this case. Placeholder until OCML adds + // support. + if (__n == 0) + return j0(__x); + if (__n == 1) + return j1(__x); + + double __x0 = j0(__x); + double __x1 = j1(__x); + for (int __i = 1; __i < __n; ++__i) { + double __x2 = (2 * __i) / __x * __x1 - __x0; + __x0 = __x1; + __x1 = __x2; + } + return __x1; +} + +__DEVICE__ +double ldexp(double __x, int __e) { return __builtin_amdgcn_ldexp(__x, __e); } + +__DEVICE__ +double lgamma(double __x) { return __ocml_lgamma_f64(__x); } + +__DEVICE__ +long long int llrint(double __x) { return __builtin_rint(__x); } + +__DEVICE__ +long long int llround(double __x) { return __builtin_round(__x); } + +__DEVICE__ +double log(double __x) { return __ocml_log_f64(__x); } + +__DEVICE__ +double log10(double __x) { return __ocml_log10_f64(__x); } + +__DEVICE__ +double log1p(double __x) { return __ocml_log1p_f64(__x); } + +__DEVICE__ +double log2(double __x) { return __ocml_log2_f64(__x); } + +__DEVICE__ +double logb(double __x) { return __ocml_logb_f64(__x); } + +__DEVICE__ +long int lrint(double __x) { return __builtin_rint(__x); } + +__DEVICE__ +long int lround(double __x) { return __builtin_round(__x); } + +__DEVICE__ +double modf(double __x, double *__iptr) { + double __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + double __r = + __ocml_modf_f64(__x, (__attribute__((address_space(5))) double *)&__tmp); + *__iptr = __tmp; + + return __r; +} + +__DEVICE__ +double nan(const char *__tagp) { +#if !_WIN32 + union { + double val; + struct ieee_double { + uint64_t mantissa : 51; + uint32_t quiet : 1; + uint32_t exponent : 11; + uint32_t sign : 1; + } bits; + } __tmp; + __static_assert_type_size_equal(sizeof(__tmp.val), sizeof(__tmp.bits)); + + __tmp.bits.sign = 0u; + __tmp.bits.exponent = ~0u; + __tmp.bits.quiet = 1u; + __tmp.bits.mantissa = __make_mantissa(__tagp); + + return __tmp.val; +#else + __static_assert_type_size_equal(sizeof(uint64_t), sizeof(double)); + uint64_t __val = __make_mantissa(__tagp); + __val |= 0xFFF << 51; + return *reinterpret_cast(&__val); +#endif +} + +__DEVICE__ +double nearbyint(double __x) { return __builtin_nearbyint(__x); } + +__DEVICE__ +double nextafter(double __x, double __y) { + return __ocml_nextafter_f64(__x, __y); +} + +__DEVICE__ +double norm(int __dim, + const double *__a) { // TODO: placeholder until OCML adds support. + double __r = 0; + while (__dim--) { + __r += __a[0] * __a[0]; + ++__a; + } + + return __builtin_sqrt(__r); +} + +__DEVICE__ +double norm3d(double __x, double __y, double __z) { + return __ocml_len3_f64(__x, __y, __z); +} + +__DEVICE__ +double norm4d(double __x, double __y, double __z, double __w) { + return __ocml_len4_f64(__x, __y, __z, __w); +} + +__DEVICE__ +double normcdf(double __x) { return __ocml_ncdf_f64(__x); } + +__DEVICE__ +double normcdfinv(double __x) { return __ocml_ncdfinv_f64(__x); } + +__DEVICE__ +double pow(double __x, double __y) { return __ocml_pow_f64(__x, __y); } + +__DEVICE__ +double powi(double __x, int __y) { return __ocml_pown_f64(__x, __y); } + +__DEVICE__ +double rcbrt(double __x) { return __ocml_rcbrt_f64(__x); } + +__DEVICE__ +double remainder(double __x, double __y) { + return __ocml_remainder_f64(__x, __y); +} + +__DEVICE__ +double remquo(double __x, double __y, int *__quo) { + int __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + double __r = __ocml_remquo_f64( + __x, __y, (__attribute__((address_space(5))) int *)&__tmp); + *__quo = __tmp; + + return __r; +} + +__DEVICE__ +double rhypot(double __x, double __y) { return __ocml_rhypot_f64(__x, __y); } + +__DEVICE__ +double rint(double __x) { return __builtin_rint(__x); } + +__DEVICE__ +double rnorm(int __dim, + const double *__a) { // TODO: placeholder until OCML adds support. + double __r = 0; + while (__dim--) { + __r += __a[0] * __a[0]; + ++__a; + } + + return __ocml_rsqrt_f64(__r); +} + +__DEVICE__ +double rnorm3d(double __x, double __y, double __z) { + return __ocml_rlen3_f64(__x, __y, __z); +} + +__DEVICE__ +double rnorm4d(double __x, double __y, double __z, double __w) { + return __ocml_rlen4_f64(__x, __y, __z, __w); +} + +__DEVICE__ +double round(double __x) { return __builtin_round(__x); } + +__DEVICE__ +double rsqrt(double __x) { return __ocml_rsqrt_f64(__x); } + +__DEVICE__ +double scalbln(double __x, long int __n) { + return (__n < INT_MAX) ? __builtin_amdgcn_ldexp(__x, __n) + : __ocml_scalb_f64(__x, __n); +} +__DEVICE__ +double scalbn(double __x, int __n) { return __builtin_amdgcn_ldexp(__x, __n); } + +__DEVICE__ +__RETURN_TYPE __signbit(double __x) { return __builtin_signbit(__x); } + +__DEVICE__ +double sin(double __x) { return __ocml_sin_f64(__x); } + +__DEVICE__ +void sincos(double __x, double *__sinptr, double *__cosptr) { + double __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + *__sinptr = __ocml_sincos_f64( + __x, (__attribute__((address_space(5))) double *)&__tmp); + *__cosptr = __tmp; +} + +__DEVICE__ +void sincospi(double __x, double *__sinptr, double *__cosptr) { + double __tmp; +#ifdef __OPENMP_AMDGCN__ +#pragma omp allocate(__tmp) allocator(omp_thread_mem_alloc) +#endif + *__sinptr = __ocml_sincospi_f64( + __x, (__attribute__((address_space(5))) double *)&__tmp); + *__cosptr = __tmp; +} + +__DEVICE__ +double sinh(double __x) { return __ocml_sinh_f64(__x); } + +__DEVICE__ +double sinpi(double __x) { return __ocml_sinpi_f64(__x); } + +__DEVICE__ +double sqrt(double __x) { return __builtin_sqrt(__x); } + +__DEVICE__ +double tan(double __x) { return __ocml_tan_f64(__x); } + +__DEVICE__ +double tanh(double __x) { return __ocml_tanh_f64(__x); } + +__DEVICE__ +double tgamma(double __x) { return __ocml_tgamma_f64(__x); } + +__DEVICE__ +double trunc(double __x) { return __builtin_trunc(__x); } + +__DEVICE__ +double y0(double __x) { return __ocml_y0_f64(__x); } + +__DEVICE__ +double y1(double __x) { return __ocml_y1_f64(__x); } + +__DEVICE__ +double yn(int __n, double __x) { // TODO: we could use Ahmes multiplication + // and the Miller & Brown algorithm + // for linear recurrences to get O(log n) steps, but it's unclear if + // it'd be beneficial in this case. Placeholder until OCML adds + // support. + if (__n == 0) + return y0(__x); + if (__n == 1) + return y1(__x); + + double __x0 = y0(__x); + double __x1 = y1(__x); + for (int __i = 1; __i < __n; ++__i) { + double __x2 = (2 * __i) / __x * __x1 - __x0; + __x0 = __x1; + __x1 = __x2; + } + + return __x1; +} + +// BEGIN INTRINSICS +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __dadd_rd(double __x, double __y) { + return __ocml_add_rtn_f64(__x, __y); +} +__DEVICE__ +double __dadd_rn(double __x, double __y) { + return __ocml_add_rte_f64(__x, __y); +} +__DEVICE__ +double __dadd_ru(double __x, double __y) { + return __ocml_add_rtp_f64(__x, __y); +} +__DEVICE__ +double __dadd_rz(double __x, double __y) { + return __ocml_add_rtz_f64(__x, __y); +} +#else +__DEVICE__ +double __dadd_rn(double __x, double __y) { return __x + __y; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __ddiv_rd(double __x, double __y) { + return __ocml_div_rtn_f64(__x, __y); +} +__DEVICE__ +double __ddiv_rn(double __x, double __y) { + return __ocml_div_rte_f64(__x, __y); +} +__DEVICE__ +double __ddiv_ru(double __x, double __y) { + return __ocml_div_rtp_f64(__x, __y); +} +__DEVICE__ +double __ddiv_rz(double __x, double __y) { + return __ocml_div_rtz_f64(__x, __y); +} +#else +__DEVICE__ +double __ddiv_rn(double __x, double __y) { return __x / __y; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __dmul_rd(double __x, double __y) { + return __ocml_mul_rtn_f64(__x, __y); +} +__DEVICE__ +double __dmul_rn(double __x, double __y) { + return __ocml_mul_rte_f64(__x, __y); +} +__DEVICE__ +double __dmul_ru(double __x, double __y) { + return __ocml_mul_rtp_f64(__x, __y); +} +__DEVICE__ +double __dmul_rz(double __x, double __y) { + return __ocml_mul_rtz_f64(__x, __y); +} +#else +__DEVICE__ +double __dmul_rn(double __x, double __y) { return __x * __y; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __drcp_rd(double __x) { return __ocml_div_rtn_f64(1.0, __x); } +__DEVICE__ +double __drcp_rn(double __x) { return __ocml_div_rte_f64(1.0, __x); } +__DEVICE__ +double __drcp_ru(double __x) { return __ocml_div_rtp_f64(1.0, __x); } +__DEVICE__ +double __drcp_rz(double __x) { return __ocml_div_rtz_f64(1.0, __x); } +#else +__DEVICE__ +double __drcp_rn(double __x) { return 1.0 / __x; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __dsqrt_rd(double __x) { return __ocml_sqrt_rtn_f64(__x); } +__DEVICE__ +double __dsqrt_rn(double __x) { return __ocml_sqrt_rte_f64(__x); } +__DEVICE__ +double __dsqrt_ru(double __x) { return __ocml_sqrt_rtp_f64(__x); } +__DEVICE__ +double __dsqrt_rz(double __x) { return __ocml_sqrt_rtz_f64(__x); } +#else +__DEVICE__ +double __dsqrt_rn(double __x) { return __builtin_sqrt(__x); } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __dsub_rd(double __x, double __y) { + return __ocml_sub_rtn_f64(__x, __y); +} +__DEVICE__ +double __dsub_rn(double __x, double __y) { + return __ocml_sub_rte_f64(__x, __y); +} +__DEVICE__ +double __dsub_ru(double __x, double __y) { + return __ocml_sub_rtp_f64(__x, __y); +} +__DEVICE__ +double __dsub_rz(double __x, double __y) { + return __ocml_sub_rtz_f64(__x, __y); +} +#else +__DEVICE__ +double __dsub_rn(double __x, double __y) { return __x - __y; } +#endif + +#if defined OCML_BASIC_ROUNDED_OPERATIONS +__DEVICE__ +double __fma_rd(double __x, double __y, double __z) { + return __ocml_fma_rtn_f64(__x, __y, __z); +} +__DEVICE__ +double __fma_rn(double __x, double __y, double __z) { + return __ocml_fma_rte_f64(__x, __y, __z); +} +__DEVICE__ +double __fma_ru(double __x, double __y, double __z) { + return __ocml_fma_rtp_f64(__x, __y, __z); +} +__DEVICE__ +double __fma_rz(double __x, double __y, double __z) { + return __ocml_fma_rtz_f64(__x, __y, __z); +} +#else +__DEVICE__ +double __fma_rn(double __x, double __y, double __z) { + return __builtin_fma(__x, __y, __z); +} +#endif +// END INTRINSICS +// END DOUBLE + +// C only macros +#if !defined(__cplusplus) && __STDC_VERSION__ >= 201112L +#define isfinite(__x) _Generic((__x), float : __finitef, double : __finite)(__x) +#define isinf(__x) _Generic((__x), float : __isinff, double : __isinf)(__x) +#define isnan(__x) _Generic((__x), float : __isnanf, double : __isnan)(__x) +#define signbit(__x) \ + _Generic((__x), float : __signbitf, double : __signbit)(__x) +#endif // !defined(__cplusplus) && __STDC_VERSION__ >= 201112L + +#if defined(__cplusplus) +template __DEVICE__ T min(T __arg1, T __arg2) { + return (__arg1 < __arg2) ? __arg1 : __arg2; +} + +template __DEVICE__ T max(T __arg1, T __arg2) { + return (__arg1 > __arg2) ? __arg1 : __arg2; +} + +__DEVICE__ int min(int __arg1, int __arg2) { + return (__arg1 < __arg2) ? __arg1 : __arg2; +} +__DEVICE__ int max(int __arg1, int __arg2) { + return (__arg1 > __arg2) ? __arg1 : __arg2; +} + +__DEVICE__ +float max(float __x, float __y) { return __builtin_fmaxf(__x, __y); } + +__DEVICE__ +double max(double __x, double __y) { return __builtin_fmax(__x, __y); } + +__DEVICE__ +float min(float __x, float __y) { return __builtin_fminf(__x, __y); } + +__DEVICE__ +double min(double __x, double __y) { return __builtin_fmin(__x, __y); } + +#if !defined(__HIPCC_RTC__) && !defined(__OPENMP_AMDGCN__) +__host__ inline static int min(int __arg1, int __arg2) { + return __arg1 < __arg2 ? __arg1 : __arg2; +} + +__host__ inline static int max(int __arg1, int __arg2) { + return __arg1 > __arg2 ? __arg1 : __arg2; +} +#endif // !defined(__HIPCC_RTC__) && !defined(__OPENMP_AMDGCN__) +#endif + +#pragma pop_macro("__DEVICE__") +#pragma pop_macro("__RETURN_TYPE") +#pragma pop_macro("__FAST_OR_SLOW") + +#endif // __CLANG_HIP_MATH_H__ diff --git a/llvm/lib/clang/19/include/__clang_hip_runtime_wrapper.h b/llvm/lib/clang/19/include/__clang_hip_runtime_wrapper.h new file mode 100644 index 0000000000000000000000000000000000000000..ed1550038e63e0c3047fd411b86e6286bce64a9b --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_hip_runtime_wrapper.h @@ -0,0 +1,159 @@ +/*===---- __clang_hip_runtime_wrapper.h - HIP runtime support ---------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * WARNING: This header is intended to be directly -include'd by + * the compiler and is not supposed to be included by users. + * + */ + +#ifndef __CLANG_HIP_RUNTIME_WRAPPER_H__ +#define __CLANG_HIP_RUNTIME_WRAPPER_H__ + +#if __HIP__ + +#define __host__ __attribute__((host)) +#define __device__ __attribute__((device)) +#define __global__ __attribute__((global)) +#define __shared__ __attribute__((shared)) +#define __constant__ __attribute__((constant)) +#define __managed__ __attribute__((managed)) + +#if !defined(__cplusplus) || __cplusplus < 201103L + #define nullptr NULL; +#endif + +#ifdef __cplusplus +extern "C" { + __attribute__((__visibility__("default"))) + __attribute__((weak)) + __attribute__((noreturn)) + __device__ void __cxa_pure_virtual(void) { + __builtin_trap(); + } + __attribute__((__visibility__("default"))) + __attribute__((weak)) + __attribute__((noreturn)) + __device__ void __cxa_deleted_virtual(void) { + __builtin_trap(); + } +} +#endif //__cplusplus + +#if !defined(__HIPCC_RTC__) +#if __has_include("hip/hip_version.h") +#include "hip/hip_version.h" +#endif // __has_include("hip/hip_version.h") +#endif // __HIPCC_RTC__ + +typedef __SIZE_TYPE__ __hip_size_t; + +#ifdef __cplusplus +extern "C" { +#endif //__cplusplus + +#if HIP_VERSION_MAJOR * 100 + HIP_VERSION_MINOR >= 405 +__device__ unsigned long long __ockl_dm_alloc(unsigned long long __size); +__device__ void __ockl_dm_dealloc(unsigned long long __addr); +#if __has_feature(address_sanitizer) +__device__ unsigned long long __asan_malloc_impl(unsigned long long __size, + unsigned long long __pc); +__device__ void __asan_free_impl(unsigned long long __addr, + unsigned long long __pc); +__attribute__((noinline, weak)) __device__ void *malloc(__hip_size_t __size) { + unsigned long long __pc = (unsigned long long)__builtin_return_address(0); + return (void *)__asan_malloc_impl(__size, __pc); +} +__attribute__((noinline, weak)) __device__ void free(void *__ptr) { + unsigned long long __pc = (unsigned long long)__builtin_return_address(0); + __asan_free_impl((unsigned long long)__ptr, __pc); +} +#else // __has_feature(address_sanitizer) +__attribute__((weak)) inline __device__ void *malloc(__hip_size_t __size) { + return (void *) __ockl_dm_alloc(__size); +} +__attribute__((weak)) inline __device__ void free(void *__ptr) { + __ockl_dm_dealloc((unsigned long long)__ptr); +} +#endif // __has_feature(address_sanitizer) +#else // HIP version check +#if __HIP_ENABLE_DEVICE_MALLOC__ +__device__ void *__hip_malloc(__hip_size_t __size); +__device__ void *__hip_free(void *__ptr); +__attribute__((weak)) inline __device__ void *malloc(__hip_size_t __size) { + return __hip_malloc(__size); +} +__attribute__((weak)) inline __device__ void free(void *__ptr) { + __hip_free(__ptr); +} +#else // __HIP_ENABLE_DEVICE_MALLOC__ +__attribute__((weak)) inline __device__ void *malloc(__hip_size_t __size) { + __builtin_trap(); + return (void *)0; +} +__attribute__((weak)) inline __device__ void free(void *__ptr) { + __builtin_trap(); +} +#endif // __HIP_ENABLE_DEVICE_MALLOC__ +#endif // HIP version check + +#ifdef __cplusplus +} // extern "C" +#endif //__cplusplus + +#if !defined(__HIPCC_RTC__) +#include +#include +#include +#if __has_include("hip/hip_version.h") +#include "hip/hip_version.h" +#endif // __has_include("hip/hip_version.h") +#else +typedef __SIZE_TYPE__ size_t; +// Define macros which are needed to declare HIP device API's without standard +// C/C++ headers. This is for readability so that these API's can be written +// the same way as non-hipRTC use case. These macros need to be popped so that +// they do not pollute users' name space. +#pragma push_macro("NULL") +#pragma push_macro("uint32_t") +#pragma push_macro("uint64_t") +#pragma push_macro("CHAR_BIT") +#pragma push_macro("INT_MAX") +#define NULL (void *)0 +#define uint32_t __UINT32_TYPE__ +#define uint64_t __UINT64_TYPE__ +#define CHAR_BIT __CHAR_BIT__ +#define INT_MAX __INTMAX_MAX__ +#endif // __HIPCC_RTC__ + +#include <__clang_hip_libdevice_declares.h> +#include <__clang_hip_math.h> +#include <__clang_hip_stdlib.h> + +#if defined(__HIPCC_RTC__) +#include <__clang_hip_cmath.h> +#else +#include <__clang_cuda_math_forward_declares.h> +#include <__clang_hip_cmath.h> +#include <__clang_cuda_complex_builtins.h> +#include +#include +#include +#endif // __HIPCC_RTC__ + +#define __CLANG_HIP_RUNTIME_WRAPPER_INCLUDED__ 1 +#if defined(__HIPCC_RTC__) +#pragma pop_macro("NULL") +#pragma pop_macro("uint32_t") +#pragma pop_macro("uint64_t") +#pragma pop_macro("CHAR_BIT") +#pragma pop_macro("INT_MAX") +#endif // __HIPCC_RTC__ +#endif // __HIP__ +#endif // __CLANG_HIP_RUNTIME_WRAPPER_H__ diff --git a/llvm/lib/clang/19/include/__clang_hip_stdlib.h b/llvm/lib/clang/19/include/__clang_hip_stdlib.h new file mode 100644 index 0000000000000000000000000000000000000000..bd770e2415f95613773692afce16400e10576cd7 --- /dev/null +++ b/llvm/lib/clang/19/include/__clang_hip_stdlib.h @@ -0,0 +1,43 @@ +/*===---- __clang_hip_stdlib.h - Device-side HIP math support --------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CLANG_HIP_STDLIB_H__ + +#if !defined(__HIP__) && !defined(__OPENMP_AMDGCN__) +#error "This file is for HIP and OpenMP AMDGCN device compilation only." +#endif + +#if !defined(__cplusplus) + +#include + +#ifdef __OPENMP_AMDGCN__ +#define __DEVICE__ static inline __attribute__((always_inline, nothrow)) +#else +#define __DEVICE__ static __device__ inline __attribute__((always_inline)) +#endif + +__DEVICE__ +int abs(int __x) { + int __sgn = __x >> (sizeof(int) * CHAR_BIT - 1); + return (__x ^ __sgn) - __sgn; +} +__DEVICE__ +long labs(long __x) { + long __sgn = __x >> (sizeof(long) * CHAR_BIT - 1); + return (__x ^ __sgn) - __sgn; +} +__DEVICE__ +long long llabs(long long __x) { + long long __sgn = __x >> (sizeof(long long) * CHAR_BIT - 1); + return (__x ^ __sgn) - __sgn; +} + +#endif // !defined(__cplusplus) + +#endif // #define __CLANG_HIP_STDLIB_H__ diff --git a/llvm/lib/clang/19/include/__stdarg___gnuc_va_list.h b/llvm/lib/clang/19/include/__stdarg___gnuc_va_list.h new file mode 100644 index 0000000000000000000000000000000000000000..2a0a7e8cc6c054d9f40b43ad085df06954de2ab5 --- /dev/null +++ b/llvm/lib/clang/19/include/__stdarg___gnuc_va_list.h @@ -0,0 +1,13 @@ +/*===---- __stdarg___gnuc_va_list.h - Definition of __gnuc_va_list ---------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __GNUC_VA_LIST +#define __GNUC_VA_LIST +typedef __builtin_va_list __gnuc_va_list; +#endif diff --git a/llvm/lib/clang/19/include/__stdarg___va_copy.h b/llvm/lib/clang/19/include/__stdarg___va_copy.h new file mode 100644 index 0000000000000000000000000000000000000000..e433e18a7082662d18181e6ee7ae2868d315cc7c --- /dev/null +++ b/llvm/lib/clang/19/include/__stdarg___va_copy.h @@ -0,0 +1,12 @@ +/*===---- __stdarg___va_copy.h - Definition of __va_copy -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __va_copy +#define __va_copy(d, s) __builtin_va_copy(d, s) +#endif diff --git a/llvm/lib/clang/19/include/__stdarg_header_macro.h b/llvm/lib/clang/19/include/__stdarg_header_macro.h new file mode 100644 index 0000000000000000000000000000000000000000..beb92ee02526799984ffd8ea31cf5138289841ec --- /dev/null +++ b/llvm/lib/clang/19/include/__stdarg_header_macro.h @@ -0,0 +1,12 @@ +/*===---- __stdarg_header_macro.h ------------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __STDARG_H +#define __STDARG_H +#endif diff --git a/llvm/lib/clang/19/include/__stdarg_va_arg.h b/llvm/lib/clang/19/include/__stdarg_va_arg.h new file mode 100644 index 0000000000000000000000000000000000000000..89bd2f65d3bea2c8bd3142254171e3353a587368 --- /dev/null +++ b/llvm/lib/clang/19/include/__stdarg_va_arg.h @@ -0,0 +1,22 @@ +/*===---- __stdarg_va_arg.h - Definitions of va_start, va_arg, va_end-------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef va_arg + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +/* C23 does not require the second parameter for va_start. */ +#define va_start(ap, ...) __builtin_va_start(ap, 0) +#else +/* Versions before C23 do require the second parameter. */ +#define va_start(ap, param) __builtin_va_start(ap, param) +#endif +#define va_end(ap) __builtin_va_end(ap) +#define va_arg(ap, type) __builtin_va_arg(ap, type) + +#endif diff --git a/llvm/lib/clang/19/include/__stdarg_va_copy.h b/llvm/lib/clang/19/include/__stdarg_va_copy.h new file mode 100644 index 0000000000000000000000000000000000000000..8645328c2c68fba66ad964cd172173c754425918 --- /dev/null +++ b/llvm/lib/clang/19/include/__stdarg_va_copy.h @@ -0,0 +1,12 @@ +/*===---- __stdarg_va_copy.h - Definition of va_copy------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef va_copy +#define va_copy(dest, src) __builtin_va_copy(dest, src) +#endif diff --git a/llvm/lib/clang/19/include/__stdarg_va_list.h b/llvm/lib/clang/19/include/__stdarg_va_list.h new file mode 100644 index 0000000000000000000000000000000000000000..20c2e2cad94049d9271b98902dcb34ac08e61bbf --- /dev/null +++ b/llvm/lib/clang/19/include/__stdarg_va_list.h @@ -0,0 +1,13 @@ +/*===---- __stdarg_va_list.h - Definition of va_list -----------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _VA_LIST +#define _VA_LIST +typedef __builtin_va_list va_list; +#endif diff --git a/llvm/lib/clang/19/include/__stddef_header_macro.h b/llvm/lib/clang/19/include/__stddef_header_macro.h new file mode 100644 index 0000000000000000000000000000000000000000..db5fb3c0abc1bf849d604edcac9332f919ec20eb --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_header_macro.h @@ -0,0 +1,12 @@ +/*===---- __stddef_header_macro.h ------------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __STDDEF_H +#define __STDDEF_H +#endif diff --git a/llvm/lib/clang/19/include/__stddef_max_align_t.h b/llvm/lib/clang/19/include/__stddef_max_align_t.h new file mode 100644 index 0000000000000000000000000000000000000000..512606a877288bfece0fa2efd134dafa77a1f27f --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_max_align_t.h @@ -0,0 +1,27 @@ +/*===---- __stddef_max_align_t.h - Definition of max_align_t ---------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_MAX_ALIGN_T_DEFINED +#define __CLANG_MAX_ALIGN_T_DEFINED + +#if defined(_MSC_VER) +typedef double max_align_t; +#elif defined(__APPLE__) +typedef long double max_align_t; +#else +// Define 'max_align_t' to match the GCC definition. +typedef struct { + long long __clang_max_align_nonce1 + __attribute__((__aligned__(__alignof__(long long)))); + long double __clang_max_align_nonce2 + __attribute__((__aligned__(__alignof__(long double)))); +} max_align_t; +#endif + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_null.h b/llvm/lib/clang/19/include/__stddef_null.h new file mode 100644 index 0000000000000000000000000000000000000000..c10bd2d7d9887c65c3c67c7b10ba485be9dd605f --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_null.h @@ -0,0 +1,29 @@ +/*===---- __stddef_null.h - Definition of NULL -----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined(NULL) || !__building_module(_Builtin_stddef) + +/* linux/stddef.h will define NULL to 0. glibc (and other) headers then define + * __need_NULL and rely on stddef.h to redefine NULL to the correct value again. + * Modules don't support redefining macros like that, but support that pattern + * in the non-modules case. + */ +#undef NULL + +#ifdef __cplusplus +#if !defined(__MINGW32__) && !defined(_MSC_VER) +#define NULL __null +#else +#define NULL 0 +#endif +#else +#define NULL ((void*)0) +#endif + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_nullptr_t.h b/llvm/lib/clang/19/include/__stddef_nullptr_t.h new file mode 100644 index 0000000000000000000000000000000000000000..7f3fbe6fe0d3a8ebc353d89833a43800fd61d478 --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_nullptr_t.h @@ -0,0 +1,29 @@ +/*===---- __stddef_nullptr_t.h - Definition of nullptr_t -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(_NULLPTR_T) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define _NULLPTR_T + +#ifdef __cplusplus +#if defined(_MSC_EXTENSIONS) && defined(_NATIVE_NULLPTR_SUPPORTED) +namespace std { +typedef decltype(nullptr) nullptr_t; +} +using ::std::nullptr_t; +#endif +#elif defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +typedef typeof(nullptr) nullptr_t; +#endif + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_offsetof.h b/llvm/lib/clang/19/include/__stddef_offsetof.h new file mode 100644 index 0000000000000000000000000000000000000000..84172c6cd27352222e7cb89af8933a2e6000c24e --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_offsetof.h @@ -0,0 +1,17 @@ +/*===---- __stddef_offsetof.h - Definition of offsetof ---------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(offsetof) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define offsetof(t, d) __builtin_offsetof(t, d) +#endif diff --git a/llvm/lib/clang/19/include/__stddef_ptrdiff_t.h b/llvm/lib/clang/19/include/__stddef_ptrdiff_t.h new file mode 100644 index 0000000000000000000000000000000000000000..fd3c893c66c97940c7197d05286b34aaaac1ecd7 --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_ptrdiff_t.h @@ -0,0 +1,20 @@ +/*===---- __stddef_ptrdiff_t.h - Definition of ptrdiff_t -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(_PTRDIFF_T) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define _PTRDIFF_T + +typedef __PTRDIFF_TYPE__ ptrdiff_t; + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_rsize_t.h b/llvm/lib/clang/19/include/__stddef_rsize_t.h new file mode 100644 index 0000000000000000000000000000000000000000..dd433d40d9733a7257fe7632771276b082dac469 --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_rsize_t.h @@ -0,0 +1,20 @@ +/*===---- __stddef_rsize_t.h - Definition of rsize_t -----------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(_RSIZE_T) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define _RSIZE_T + +typedef __SIZE_TYPE__ rsize_t; + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_size_t.h b/llvm/lib/clang/19/include/__stddef_size_t.h new file mode 100644 index 0000000000000000000000000000000000000000..3dd7b1f37929498cf574b72d62966c448a47c7c4 --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_size_t.h @@ -0,0 +1,20 @@ +/*===---- __stddef_size_t.h - Definition of size_t -------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(_SIZE_T) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define _SIZE_T + +typedef __SIZE_TYPE__ size_t; + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_unreachable.h b/llvm/lib/clang/19/include/__stddef_unreachable.h new file mode 100644 index 0000000000000000000000000000000000000000..61df43e9732f8acfb02cacd2ed7f27d475ca183c --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_unreachable.h @@ -0,0 +1,21 @@ +/*===---- __stddef_unreachable.h - Definition of unreachable ---------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __cplusplus + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(unreachable) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define unreachable() __builtin_unreachable() +#endif + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_wchar_t.h b/llvm/lib/clang/19/include/__stddef_wchar_t.h new file mode 100644 index 0000000000000000000000000000000000000000..bd69f6322541637ab3cfbfbb9d09dca5393c5c5c --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_wchar_t.h @@ -0,0 +1,28 @@ +/*===---- __stddef_wchar.h - Definition of wchar_t -------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined(__cplusplus) || (defined(_MSC_VER) && !_NATIVE_WCHAR_T_DEFINED) + +/* + * When -fbuiltin-headers-in-system-modules is set this is a non-modular header + * and needs to behave as if it was textual. + */ +#if !defined(_WCHAR_T) || \ + (__has_feature(modules) && !__building_module(_Builtin_stddef)) +#define _WCHAR_T + +#ifdef _MSC_EXTENSIONS +#define _WCHAR_T_DEFINED +#endif + +typedef __WCHAR_TYPE__ wchar_t; + +#endif + +#endif diff --git a/llvm/lib/clang/19/include/__stddef_wint_t.h b/llvm/lib/clang/19/include/__stddef_wint_t.h new file mode 100644 index 0000000000000000000000000000000000000000..0aa2915079571ac5e01195b72b3c49e69fdcf480 --- /dev/null +++ b/llvm/lib/clang/19/include/__stddef_wint_t.h @@ -0,0 +1,15 @@ +/*===---- __stddef_wint.h - Definition of wint_t ---------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _WINT_T +#define _WINT_T + +typedef __WINT_TYPE__ wint_t; + +#endif diff --git a/llvm/lib/clang/19/include/__wmmintrin_aes.h b/llvm/lib/clang/19/include/__wmmintrin_aes.h new file mode 100644 index 0000000000000000000000000000000000000000..3010b38711e676e08e0aaba6289a5ac0b2e6fe5b --- /dev/null +++ b/llvm/lib/clang/19/include/__wmmintrin_aes.h @@ -0,0 +1,140 @@ +/*===---- __wmmintrin_aes.h - AES intrinsics -------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __WMMINTRIN_H +#error "Never use <__wmmintrin_aes.h> directly; include instead." +#endif + +#ifndef __WMMINTRIN_AES_H +#define __WMMINTRIN_AES_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("aes"), __min_vector_width__(128))) + +/// Performs a single round of AES encryption using the Equivalent +/// Inverse Cipher, transforming the state value from the first source +/// operand using a 128-bit round key value contained in the second source +/// operand, and writes the result to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VAESENC instruction. +/// +/// \param __V +/// A 128-bit integer vector containing the state value. +/// \param __R +/// A 128-bit integer vector containing the round key value. +/// \returns A 128-bit integer vector containing the encrypted value. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_aesenc_si128(__m128i __V, __m128i __R) +{ + return (__m128i)__builtin_ia32_aesenc128((__v2di)__V, (__v2di)__R); +} + +/// Performs the final round of AES encryption using the Equivalent +/// Inverse Cipher, transforming the state value from the first source +/// operand using a 128-bit round key value contained in the second source +/// operand, and writes the result to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VAESENCLAST instruction. +/// +/// \param __V +/// A 128-bit integer vector containing the state value. +/// \param __R +/// A 128-bit integer vector containing the round key value. +/// \returns A 128-bit integer vector containing the encrypted value. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_aesenclast_si128(__m128i __V, __m128i __R) +{ + return (__m128i)__builtin_ia32_aesenclast128((__v2di)__V, (__v2di)__R); +} + +/// Performs a single round of AES decryption using the Equivalent +/// Inverse Cipher, transforming the state value from the first source +/// operand using a 128-bit round key value contained in the second source +/// operand, and writes the result to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VAESDEC instruction. +/// +/// \param __V +/// A 128-bit integer vector containing the state value. +/// \param __R +/// A 128-bit integer vector containing the round key value. +/// \returns A 128-bit integer vector containing the decrypted value. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_aesdec_si128(__m128i __V, __m128i __R) +{ + return (__m128i)__builtin_ia32_aesdec128((__v2di)__V, (__v2di)__R); +} + +/// Performs the final round of AES decryption using the Equivalent +/// Inverse Cipher, transforming the state value from the first source +/// operand using a 128-bit round key value contained in the second source +/// operand, and writes the result to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VAESDECLAST instruction. +/// +/// \param __V +/// A 128-bit integer vector containing the state value. +/// \param __R +/// A 128-bit integer vector containing the round key value. +/// \returns A 128-bit integer vector containing the decrypted value. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_aesdeclast_si128(__m128i __V, __m128i __R) +{ + return (__m128i)__builtin_ia32_aesdeclast128((__v2di)__V, (__v2di)__R); +} + +/// Applies the AES InvMixColumns() transformation to an expanded key +/// contained in the source operand, and writes the result to the +/// destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VAESIMC instruction. +/// +/// \param __V +/// A 128-bit integer vector containing the expanded key. +/// \returns A 128-bit integer vector containing the transformed value. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_aesimc_si128(__m128i __V) +{ + return (__m128i)__builtin_ia32_aesimc128((__v2di)__V); +} + +/// Generates a round key for AES encryption, operating on 128-bit data +/// specified in the first source operand and using an 8-bit round constant +/// specified by the second source operand, and writes the result to the +/// destination. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_aeskeygenassist_si128(__m128i C, const int R); +/// \endcode +/// +/// This intrinsic corresponds to the AESKEYGENASSIST instruction. +/// +/// \param C +/// A 128-bit integer vector that is used to generate the AES encryption key. +/// \param R +/// An 8-bit round constant used to generate the AES encryption key. +/// \returns A 128-bit round key for AES encryption. +#define _mm_aeskeygenassist_si128(C, R) \ + ((__m128i)__builtin_ia32_aeskeygenassist128((__v2di)(__m128i)(C), (int)(R))) + +#undef __DEFAULT_FN_ATTRS + +#endif /* __WMMINTRIN_AES_H */ diff --git a/llvm/lib/clang/19/include/__wmmintrin_pclmul.h b/llvm/lib/clang/19/include/__wmmintrin_pclmul.h new file mode 100644 index 0000000000000000000000000000000000000000..c9a6d50bdc89dc37a39b6838a62b23dabc13b233 --- /dev/null +++ b/llvm/lib/clang/19/include/__wmmintrin_pclmul.h @@ -0,0 +1,48 @@ +/*===---- __wmmintrin_pclmul.h - PCMUL intrinsics ---------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __WMMINTRIN_H +#error "Never use <__wmmintrin_pclmul.h> directly; include instead." +#endif + +#ifndef __WMMINTRIN_PCLMUL_H +#define __WMMINTRIN_PCLMUL_H + +/// Multiplies two 64-bit integer values, which are selected from source +/// operands using the immediate-value operand. The multiplication is a +/// carry-less multiplication, and the 128-bit integer product is stored in +/// the destination. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_clmulepi64_si128(__m128i X, __m128i Y, const int I); +/// \endcode +/// +/// This intrinsic corresponds to the VPCLMULQDQ instruction. +/// +/// \param X +/// A 128-bit vector of [2 x i64] containing one of the source operands. +/// \param Y +/// A 128-bit vector of [2 x i64] containing one of the source operands. +/// \param I +/// An immediate value specifying which 64-bit values to select from the +/// operands. Bit 0 is used to select a value from operand \a X, and bit +/// 4 is used to select a value from operand \a Y: \n +/// Bit[0]=0 indicates that bits[63:0] of operand \a X are used. \n +/// Bit[0]=1 indicates that bits[127:64] of operand \a X are used. \n +/// Bit[4]=0 indicates that bits[63:0] of operand \a Y are used. \n +/// Bit[4]=1 indicates that bits[127:64] of operand \a Y are used. +/// \returns The 128-bit integer vector containing the result of the carry-less +/// multiplication of the selected 64-bit values. +#define _mm_clmulepi64_si128(X, Y, I) \ + ((__m128i)__builtin_ia32_pclmulqdq128((__v2di)(__m128i)(X), \ + (__v2di)(__m128i)(Y), (char)(I))) + +#endif /* __WMMINTRIN_PCLMUL_H */ diff --git a/llvm/lib/clang/19/include/avx512vbmivlintrin.h b/llvm/lib/clang/19/include/avx512vbmivlintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..848ca2d18c3cea51c177307abf2fbbb7fbfe1be6 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vbmivlintrin.h @@ -0,0 +1,193 @@ +/*===------------- avx512vbmivlintrin.h - VBMI intrinsics ------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __VBMIVLINTRIN_H +#define __VBMIVLINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vbmi,avx512vl,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vbmi,avx512vl,no-evex512"), \ + __min_vector_width__(256))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_permutex2var_epi8(__m128i __A, __m128i __I, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpermi2varqi128((__v16qi)__A, + (__v16qi)__I, + (__v16qi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_permutex2var_epi8(__m128i __A, __mmask16 __U, __m128i __I, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128(__U, + (__v16qi)_mm_permutex2var_epi8(__A, __I, __B), + (__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask2_permutex2var_epi8(__m128i __A, __m128i __I, __mmask16 __U, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128(__U, + (__v16qi)_mm_permutex2var_epi8(__A, __I, __B), + (__v16qi)__I); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_permutex2var_epi8(__mmask16 __U, __m128i __A, __m128i __I, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128(__U, + (__v16qi)_mm_permutex2var_epi8(__A, __I, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_permutex2var_epi8(__m256i __A, __m256i __I, __m256i __B) +{ + return (__m256i)__builtin_ia32_vpermi2varqi256((__v32qi)__A, (__v32qi)__I, + (__v32qi)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_permutex2var_epi8(__m256i __A, __mmask32 __U, __m256i __I, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256(__U, + (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B), + (__v32qi)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask2_permutex2var_epi8(__m256i __A, __m256i __I, __mmask32 __U, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256(__U, + (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B), + (__v32qi)__I); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutex2var_epi8(__mmask32 __U, __m256i __A, __m256i __I, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256(__U, + (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_permutexvar_epi8 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_permvarqi128((__v16qi)__B, (__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_permutexvar_epi8 (__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_permutexvar_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_permutexvar_epi8 (__m128i __W, __mmask16 __M, __m128i __A, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_permutexvar_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_permutexvar_epi8 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_permvarqi256((__v32qi) __B, (__v32qi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutexvar_epi8 (__mmask32 __M, __m256i __A, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_permutexvar_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_permutexvar_epi8 (__m256i __W, __mmask32 __M, __m256i __A, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_permutexvar_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_multishift_epi64_epi8(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_vpmultishiftqb128((__v16qi)__X, (__v16qi)__Y); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_multishift_epi64_epi8(__m128i __W, __mmask16 __M, __m128i __X, + __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_multishift_epi64_epi8(__X, __Y), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_multishift_epi64_epi8(__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_multishift_epi64_epi8(__X, __Y), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_multishift_epi64_epi8(__m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_vpmultishiftqb256((__v32qi)__X, (__v32qi)__Y); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_multishift_epi64_epi8(__m256i __W, __mmask32 __M, __m256i __X, + __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_multishift_epi64_epi8(__X, __Y), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_multishift_epi64_epi8(__mmask32 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_multishift_epi64_epi8(__X, __Y), + (__v32qi)_mm256_setzero_si256()); +} + + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avx512vlbf16intrin.h b/llvm/lib/clang/19/include/avx512vlbf16intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..89c9f49c7aed0fd86b6d886da6763bac2d02489f --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlbf16intrin.h @@ -0,0 +1,517 @@ +/*===--------- avx512vlbf16intrin.h - AVX512_BF16 intrinsics ---------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifdef __SSE2__ + +#ifndef __AVX512VLBF16INTRIN_H +#define __AVX512VLBF16INTRIN_H + +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512bf16,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512bf16,no-evex512"), \ + __min_vector_width__(256))) + +/// Convert Two Packed Single Data to One Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNE2PS2BF16 instructions. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \param __B +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from +/// conversion of __B, and higher 64 bits come from conversion of __A. +static __inline__ __m128bh __DEFAULT_FN_ATTRS128 +_mm_cvtne2ps_pbh(__m128 __A, __m128 __B) { + return (__m128bh)__builtin_ia32_cvtne2ps2bf16_128((__v4sf) __A, + (__v4sf) __B); +} + +/// Convert Two Packed Single Data to One Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNE2PS2BF16 instructions. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \param __B +/// A 128-bit vector of [4 x float]. +/// \param __W +/// A 128-bit vector of [8 x bfloat]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A or __B. A 0 means element from __W. +/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from +/// conversion of __B, and higher 64 bits come from conversion of __A. +static __inline__ __m128bh __DEFAULT_FN_ATTRS128 +_mm_mask_cvtne2ps_pbh(__m128bh __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128bh)__builtin_ia32_selectpbf_128((__mmask8)__U, + (__v8bf)_mm_cvtne2ps_pbh(__A, __B), + (__v8bf)__W); +} + +/// Convert Two Packed Single Data to One Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNE2PS2BF16 instructions. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \param __B +/// A 128-bit vector of [4 x float]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A or __B. A 0 means element is zero. +/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from +/// conversion of __B, and higher 64 bits come from conversion of __A. +static __inline__ __m128bh __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtne2ps_pbh(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128bh)__builtin_ia32_selectpbf_128((__mmask8)__U, + (__v8bf)_mm_cvtne2ps_pbh(__A, __B), + (__v8bf)_mm_setzero_si128()); +} + +/// Convert Two Packed Single Data to One Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNE2PS2BF16 instructions. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \param __B +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from +/// conversion of __B, and higher 128 bits come from conversion of __A. +static __inline__ __m256bh __DEFAULT_FN_ATTRS256 +_mm256_cvtne2ps_pbh(__m256 __A, __m256 __B) { + return (__m256bh)__builtin_ia32_cvtne2ps2bf16_256((__v8sf) __A, + (__v8sf) __B); +} + +/// Convert Two Packed Single Data to One Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNE2PS2BF16 instructions. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \param __B +/// A 256-bit vector of [8 x float]. +/// \param __W +/// A 256-bit vector of [16 x bfloat]. +/// \param __U +/// A 16-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A or __B. A 0 means element from __W. +/// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from +/// conversion of __B, and higher 128 bits come from conversion of __A. +static __inline__ __m256bh __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtne2ps_pbh(__m256bh __W, __mmask16 __U, __m256 __A, __m256 __B) { + return (__m256bh)__builtin_ia32_selectpbf_256((__mmask16)__U, + (__v16bf)_mm256_cvtne2ps_pbh(__A, __B), + (__v16bf)__W); +} + +/// Convert Two Packed Single Data to One Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNE2PS2BF16 instructions. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \param __B +/// A 256-bit vector of [8 x float]. +/// \param __U +/// A 16-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A or __B. A 0 means element is zero. +/// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from +/// conversion of __B, and higher 128 bits come from conversion of __A. +static __inline__ __m256bh __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtne2ps_pbh(__mmask16 __U, __m256 __A, __m256 __B) { + return (__m256bh)__builtin_ia32_selectpbf_256((__mmask16)__U, + (__v16bf)_mm256_cvtne2ps_pbh(__A, __B), + (__v16bf)_mm256_setzero_si256()); +} + +/// Convert Packed Single Data to Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from +/// conversion of __A, and higher 64 bits are 0. +#define _mm_cvtneps_pbh(A) \ + ((__m128bh)__builtin_ia32_vcvtneps2bf16128((__v4sf)(A))) + +/// Convert Packed Single Data to Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \param __W +/// A 128-bit vector of [8 x bfloat]. +/// \param __U +/// A 4-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A. A 0 means element from __W. +/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from +/// conversion of __A, and higher 64 bits are 0. +static __inline__ __m128bh __DEFAULT_FN_ATTRS128 +_mm_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m128 __A) { + return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A, + (__v8bf)__W, + (__mmask8)__U); +} + +/// Convert Packed Single Data to Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \param __U +/// A 4-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A. A 0 means element is zero. +/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from +/// conversion of __A, and higher 64 bits are 0. +static __inline__ __m128bh __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtneps_pbh(__mmask8 __U, __m128 __A) { + return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A, + (__v8bf)_mm_setzero_si128(), + (__mmask8)__U); +} + +/// Convert Packed Single Data to Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A. +#define _mm256_cvtneps_pbh(A) \ + ((__m128bh)__builtin_ia32_vcvtneps2bf16256((__v8sf)(A))) + +/// Convert Packed Single Data to Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \param __W +/// A 256-bit vector of [8 x bfloat]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A. A 0 means element from __W. +/// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A. +static __inline__ __m128bh __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m256 __A) { + return (__m128bh)__builtin_ia32_cvtneps2bf16_256_mask((__v8sf)__A, + (__v8bf)__W, + (__mmask8)__U); +} + +/// Convert Packed Single Data to Packed BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means conversion of __A. A 0 means element is zero. +/// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A. +static __inline__ __m128bh __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtneps_pbh(__mmask8 __U, __m256 __A) { + return (__m128bh)__builtin_ia32_cvtneps2bf16_256_mask((__v8sf)__A, + (__v8bf)_mm_setzero_si128(), + (__mmask8)__U); +} + +/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDPBF16PS instructions. +/// +/// \param __A +/// A 128-bit vector of [8 x bfloat]. +/// \param __B +/// A 128-bit vector of [8 x bfloat]. +/// \param __D +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] comes from Dot Product of +/// __A, __B and __D +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_dpbf16_ps(__m128 __D, __m128bh __A, __m128bh __B) { + return (__m128)__builtin_ia32_dpbf16ps_128((__v4sf)__D, + (__v8bf)__A, + (__v8bf)__B); +} + +/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDPBF16PS instructions. +/// +/// \param __A +/// A 128-bit vector of [8 x bfloat]. +/// \param __B +/// A 128-bit vector of [8 x bfloat]. +/// \param __D +/// A 128-bit vector of [4 x float]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D. +/// \returns A 128-bit vector of [4 x float] comes from Dot Product of +/// __A, __B and __D +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_dpbf16_ps(__m128 __D, __mmask8 __U, __m128bh __A, __m128bh __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_dpbf16_ps(__D, __A, __B), + (__v4sf)__D); +} + +/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDPBF16PS instructions. +/// +/// \param __A +/// A 128-bit vector of [8 x bfloat]. +/// \param __B +/// A 128-bit vector of [8 x bfloat]. +/// \param __D +/// A 128-bit vector of [4 x float]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0. +/// \returns A 128-bit vector of [4 x float] comes from Dot Product of +/// __A, __B and __D +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_dpbf16_ps(__mmask8 __U, __m128 __D, __m128bh __A, __m128bh __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_dpbf16_ps(__D, __A, __B), + (__v4sf)_mm_setzero_si128()); +} + +/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDPBF16PS instructions. +/// +/// \param __A +/// A 256-bit vector of [16 x bfloat]. +/// \param __B +/// A 256-bit vector of [16 x bfloat]. +/// \param __D +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] comes from Dot Product of +/// __A, __B and __D +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_dpbf16_ps(__m256 __D, __m256bh __A, __m256bh __B) { + return (__m256)__builtin_ia32_dpbf16ps_256((__v8sf)__D, + (__v16bf)__A, + (__v16bf)__B); +} + +/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDPBF16PS instructions. +/// +/// \param __A +/// A 256-bit vector of [16 x bfloat]. +/// \param __B +/// A 256-bit vector of [16 x bfloat]. +/// \param __D +/// A 256-bit vector of [8 x float]. +/// \param __U +/// A 16-bit mask value specifying what is chosen for each element. +/// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D. +/// \returns A 256-bit vector of [8 x float] comes from Dot Product of +/// __A, __B and __D +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_dpbf16_ps(__m256 __D, __mmask8 __U, __m256bh __A, __m256bh __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_dpbf16_ps(__D, __A, __B), + (__v8sf)__D); +} + +/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDPBF16PS instructions. +/// +/// \param __A +/// A 256-bit vector of [16 x bfloat]. +/// \param __B +/// A 256-bit vector of [16 x bfloat]. +/// \param __D +/// A 256-bit vector of [8 x float]. +/// \param __U +/// A 8-bit mask value specifying what is chosen for each element. +/// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0. +/// \returns A 256-bit vector of [8 x float] comes from Dot Product of +/// __A, __B and __D +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_dpbf16_ps(__mmask8 __U, __m256 __D, __m256bh __A, __m256bh __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_dpbf16_ps(__D, __A, __B), + (__v8sf)_mm256_setzero_si256()); +} + +/// Convert One Single float Data to One BF16 Data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTNEPS2BF16 instructions. +/// +/// \param __A +/// A float data. +/// \returns A bf16 data whose sign field and exponent field keep unchanged, +/// and fraction field is truncated to 7 bits. +static __inline__ __bf16 __DEFAULT_FN_ATTRS128 _mm_cvtness_sbh(float __A) { + __v4sf __V = {__A, 0, 0, 0}; + __v8bf __R = __builtin_ia32_cvtneps2bf16_128_mask( + (__v4sf)__V, (__v8bf)_mm_undefined_si128(), (__mmask8)-1); + return (__bf16)__R[0]; +} + +/// Convert Packed BF16 Data to Packed float Data. +/// +/// \headerfile +/// +/// \param __A +/// A 128-bit vector of [4 x bfloat]. +/// \returns A 128-bit vector of [4 x float] come from conversion of __A +static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) { + return _mm_castsi128_ps( + (__m128i)_mm_slli_epi32((__m128i)_mm_cvtepi16_epi32((__m128i)__A), 16)); +} + +/// Convert Packed BF16 Data to Packed float Data. +/// +/// \headerfile +/// +/// \param __A +/// A 128-bit vector of [8 x bfloat]. +/// \returns A 256-bit vector of [8 x float] come from conversion of __A +static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) { + return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32( + (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), 16)); +} + +/// Convert Packed BF16 Data to Packed float Data using zeroing mask. +/// +/// \headerfile +/// +/// \param __U +/// A 4-bit mask. Elements are zeroed out when the corresponding mask +/// bit is not set. +/// \param __A +/// A 128-bit vector of [4 x bfloat]. +/// \returns A 128-bit vector of [4 x float] come from conversion of __A +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { + return _mm_castsi128_ps((__m128i)_mm_slli_epi32( + (__m128i)_mm_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16)); +} + +/// Convert Packed BF16 Data to Packed float Data using zeroing mask. +/// +/// \headerfile +/// +/// \param __U +/// A 8-bit mask. Elements are zeroed out when the corresponding mask +/// bit is not set. +/// \param __A +/// A 128-bit vector of [8 x bfloat]. +/// \returns A 256-bit vector of [8 x float] come from conversion of __A +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { + return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32( + (__m256i)_mm256_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16)); +} + +/// Convert Packed BF16 Data to Packed float Data using merging mask. +/// +/// \headerfile +/// +/// \param __S +/// A 128-bit vector of [4 x float]. Elements are copied from __S when +/// the corresponding mask bit is not set. +/// \param __U +/// A 4-bit mask. Elements are zeroed out when the corresponding mask +/// bit is not set. +/// \param __A +/// A 128-bit vector of [4 x bfloat]. +/// \returns A 128-bit vector of [4 x float] come from conversion of __A +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) { + return _mm_castsi128_ps((__m128i)_mm_mask_slli_epi32( + (__m128i)__S, (__mmask8)__U, (__m128i)_mm_cvtepi16_epi32((__m128i)__A), + 16)); +} + +/// Convert Packed BF16 Data to Packed float Data using merging mask. +/// +/// \headerfile +/// +/// \param __S +/// A 256-bit vector of [8 x float]. Elements are copied from __S when +/// the corresponding mask bit is not set. +/// \param __U +/// A 8-bit mask. Elements are zeroed out when the corresponding mask +/// bit is not set. +/// \param __A +/// A 128-bit vector of [8 x bfloat]. +/// \returns A 256-bit vector of [8 x float] come from conversion of __A +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpbh_ps(__m256 __S, __mmask8 __U, __m128bh __A) { + return _mm256_castsi256_ps((__m256i)_mm256_mask_slli_epi32( + (__m256i)__S, (__mmask8)__U, (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), + 16)); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif +#endif diff --git a/llvm/lib/clang/19/include/avx512vlbitalgintrin.h b/llvm/lib/clang/19/include/avx512vlbitalgintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..377e3a5ea571327f2f477c933e79c9b5858e948b --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlbitalgintrin.h @@ -0,0 +1,151 @@ +/*===---- avx512vlbitalgintrin.h - BITALG intrinsics -----------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLBITALGINTRIN_H +#define __AVX512VLBITALGINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512bitalg,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512bitalg,no-evex512"), \ + __min_vector_width__(256))) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_popcnt_epi16(__m256i __A) +{ + return (__m256i) __builtin_ia32_vpopcntw_256((__v16hi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B) +{ + return (__m256i) __builtin_ia32_selectw_256((__mmask16) __U, + (__v16hi) _mm256_popcnt_epi16(__B), + (__v16hi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) +{ + return _mm256_mask_popcnt_epi16((__m256i) _mm256_setzero_si256(), + __U, + __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_popcnt_epi16(__m128i __A) +{ + return (__m128i) __builtin_ia32_vpopcntw_128((__v8hi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) +{ + return (__m128i) __builtin_ia32_selectw_128((__mmask8) __U, + (__v8hi) _mm_popcnt_epi16(__B), + (__v8hi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) +{ + return _mm_mask_popcnt_epi16((__m128i) _mm_setzero_si128(), + __U, + __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_popcnt_epi8(__m256i __A) +{ + return (__m256i) __builtin_ia32_vpopcntb_256((__v32qi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B) +{ + return (__m256i) __builtin_ia32_selectb_256((__mmask32) __U, + (__v32qi) _mm256_popcnt_epi8(__B), + (__v32qi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) +{ + return _mm256_mask_popcnt_epi8((__m256i) _mm256_setzero_si256(), + __U, + __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_popcnt_epi8(__m128i __A) +{ + return (__m128i) __builtin_ia32_vpopcntb_128((__v16qi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) +{ + return (__m128i) __builtin_ia32_selectb_128((__mmask16) __U, + (__v16qi) _mm_popcnt_epi8(__B), + (__v16qi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) +{ + return _mm_mask_popcnt_epi8((__m128i) _mm_setzero_si128(), + __U, + __B); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_mask_bitshuffle_epi64_mask(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask((__v32qi) __A, + (__v32qi) __B, + __U); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_bitshuffle_epi64_mask(__m256i __A, __m256i __B) +{ + return _mm256_mask_bitshuffle_epi64_mask((__mmask32) -1, + __A, + __B); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_mask_bitshuffle_epi64_mask(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask((__v16qi) __A, + (__v16qi) __B, + __U); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B) +{ + return _mm_mask_bitshuffle_epi64_mask((__mmask16) -1, + __A, + __B); +} + + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avx512vlbwintrin.h b/llvm/lib/clang/19/include/avx512vlbwintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..9aedba0669991a2aba7729557f95c69d0a20680f --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlbwintrin.h @@ -0,0 +1,3167 @@ +/*===---- avx512vlbwintrin.h - AVX512VL and AVX512BW intrinsics ------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLBWINTRIN_H +#define __AVX512VLBWINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512bw,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512bw,no-evex512"), \ + __min_vector_width__(256))) + +/* Integer compare */ + +#define _mm_cmp_epi8_mask(a, b, p) \ + ((__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \ + (__v16qi)(__m128i)(b), (int)(p), \ + (__mmask16)-1)) + +#define _mm_mask_cmp_epi8_mask(m, a, b, p) \ + ((__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \ + (__v16qi)(__m128i)(b), (int)(p), \ + (__mmask16)(m))) + +#define _mm_cmp_epu8_mask(a, b, p) \ + ((__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \ + (__v16qi)(__m128i)(b), (int)(p), \ + (__mmask16)-1)) + +#define _mm_mask_cmp_epu8_mask(m, a, b, p) \ + ((__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \ + (__v16qi)(__m128i)(b), (int)(p), \ + (__mmask16)(m))) + +#define _mm256_cmp_epi8_mask(a, b, p) \ + ((__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \ + (__v32qi)(__m256i)(b), (int)(p), \ + (__mmask32)-1)) + +#define _mm256_mask_cmp_epi8_mask(m, a, b, p) \ + ((__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \ + (__v32qi)(__m256i)(b), (int)(p), \ + (__mmask32)(m))) + +#define _mm256_cmp_epu8_mask(a, b, p) \ + ((__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \ + (__v32qi)(__m256i)(b), (int)(p), \ + (__mmask32)-1)) + +#define _mm256_mask_cmp_epu8_mask(m, a, b, p) \ + ((__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \ + (__v32qi)(__m256i)(b), (int)(p), \ + (__mmask32)(m))) + +#define _mm_cmp_epi16_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \ + (__v8hi)(__m128i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_epi16_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \ + (__v8hi)(__m128i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm_cmp_epu16_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \ + (__v8hi)(__m128i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_epu16_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \ + (__v8hi)(__m128i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_epi16_mask(a, b, p) \ + ((__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \ + (__v16hi)(__m256i)(b), (int)(p), \ + (__mmask16)-1)) + +#define _mm256_mask_cmp_epi16_mask(m, a, b, p) \ + ((__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \ + (__v16hi)(__m256i)(b), (int)(p), \ + (__mmask16)(m))) + +#define _mm256_cmp_epu16_mask(a, b, p) \ + ((__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \ + (__v16hi)(__m256i)(b), (int)(p), \ + (__mmask16)-1)) + +#define _mm256_mask_cmp_epu16_mask(m, a, b, p) \ + ((__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \ + (__v16hi)(__m256i)(b), (int)(p), \ + (__mmask16)(m))) + +#define _mm_cmpeq_epi8_mask(A, B) \ + _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epi8_mask(k, A, B) \ + _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epi8_mask(A, B) \ + _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epi8_mask(k, A, B) \ + _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epi8_mask(A, B) \ + _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epi8_mask(k, A, B) \ + _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epi8_mask(A, B) \ + _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epi8_mask(k, A, B) \ + _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epi8_mask(A, B) \ + _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epi8_mask(k, A, B) \ + _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epi8_mask(A, B) \ + _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epi8_mask(k, A, B) \ + _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epi8_mask(A, B) \ + _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epi8_mask(k, A, B) \ + _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epi8_mask(A, B) \ + _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epi8_mask(k, A, B) \ + _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epi8_mask(A, B) \ + _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epi8_mask(k, A, B) \ + _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epi8_mask(A, B) \ + _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epi8_mask(k, A, B) \ + _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epi8_mask(A, B) \ + _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epi8_mask(k, A, B) \ + _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epi8_mask(A, B) \ + _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epi8_mask(k, A, B) \ + _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm_cmpeq_epu8_mask(A, B) \ + _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epu8_mask(k, A, B) \ + _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epu8_mask(A, B) \ + _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epu8_mask(k, A, B) \ + _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epu8_mask(A, B) \ + _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epu8_mask(k, A, B) \ + _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epu8_mask(A, B) \ + _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epu8_mask(k, A, B) \ + _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epu8_mask(A, B) \ + _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epu8_mask(k, A, B) \ + _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epu8_mask(A, B) \ + _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epu8_mask(k, A, B) \ + _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epu8_mask(A, B) \ + _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epu8_mask(k, A, B) \ + _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epu8_mask(A, B) \ + _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epu8_mask(k, A, B) \ + _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epu8_mask(A, B) \ + _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epu8_mask(k, A, B) \ + _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epu8_mask(A, B) \ + _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epu8_mask(k, A, B) \ + _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epu8_mask(A, B) \ + _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epu8_mask(k, A, B) \ + _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epu8_mask(A, B) \ + _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epu8_mask(k, A, B) \ + _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm_cmpeq_epi16_mask(A, B) \ + _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epi16_mask(k, A, B) \ + _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epi16_mask(A, B) \ + _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epi16_mask(k, A, B) \ + _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epi16_mask(A, B) \ + _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epi16_mask(k, A, B) \ + _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epi16_mask(A, B) \ + _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epi16_mask(k, A, B) \ + _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epi16_mask(A, B) \ + _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epi16_mask(k, A, B) \ + _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epi16_mask(A, B) \ + _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epi16_mask(k, A, B) \ + _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epi16_mask(A, B) \ + _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epi16_mask(k, A, B) \ + _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epi16_mask(A, B) \ + _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epi16_mask(k, A, B) \ + _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epi16_mask(A, B) \ + _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epi16_mask(k, A, B) \ + _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epi16_mask(A, B) \ + _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epi16_mask(k, A, B) \ + _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epi16_mask(A, B) \ + _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epi16_mask(k, A, B) \ + _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epi16_mask(A, B) \ + _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epi16_mask(k, A, B) \ + _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm_cmpeq_epu16_mask(A, B) \ + _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epu16_mask(k, A, B) \ + _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epu16_mask(A, B) \ + _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epu16_mask(k, A, B) \ + _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epu16_mask(A, B) \ + _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epu16_mask(k, A, B) \ + _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epu16_mask(A, B) \ + _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epu16_mask(k, A, B) \ + _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epu16_mask(A, B) \ + _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epu16_mask(k, A, B) \ + _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epu16_mask(A, B) \ + _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epu16_mask(k, A, B) \ + _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epu16_mask(A, B) \ + _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epu16_mask(k, A, B) \ + _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epu16_mask(A, B) \ + _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epu16_mask(k, A, B) \ + _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epu16_mask(A, B) \ + _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epu16_mask(k, A, B) \ + _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epu16_mask(A, B) \ + _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epu16_mask(k, A, B) \ + _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epu16_mask(A, B) \ + _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epu16_mask(k, A, B) \ + _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epu16_mask(A, B) \ + _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epu16_mask(k, A, B) \ + _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B){ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_add_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_epi8(__mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_add_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_add_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_add_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_epi16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_add_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sub_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_sub_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sub_epi8(__mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_sub_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sub_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sub_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sub_epi16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sub_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_add_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_add_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_add_epi8(__mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_add_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_add_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_add_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_add_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_add_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sub_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_sub_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sub_epi8(__mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_sub_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sub_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sub_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sub_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sub_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mullo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mullo_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mullo_epi16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mullo_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mullo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mullo_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mullo_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mullo_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_blend_epi8 (__mmask16 __U, __m128i __A, __m128i __W) +{ + return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U, + (__v16qi) __W, + (__v16qi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_epi8 (__mmask32 __U, __m256i __A, __m256i __W) +{ + return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U, + (__v32qi) __W, + (__v32qi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_blend_epi16 (__mmask8 __U, __m128i __A, __m128i __W) +{ + return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U, + (__v8hi) __W, + (__v8hi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_epi16 (__mmask16 __U, __m256i __A, __m256i __W) +{ + return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U, + (__v16hi) __W, + (__v16hi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_abs_epi8(__A), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_abs_epi8(__mmask16 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_abs_epi8(__A), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_abs_epi8(__A), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_abs_epi8 (__mmask32 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_abs_epi8(__A), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_abs_epi16(__A), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_abs_epi16(__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_abs_epi16(__A), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_abs_epi16(__A), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_abs_epi16(__A), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_packs_epi32(__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_packs_epi32(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_packs_epi32(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_packs_epi32(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_packs_epi32(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_packs_epi16(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_packs_epi16(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_packs_epi16(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_packs_epi16(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_packus_epi32(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_packus_epi32(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_packus_epi32(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_packus_epi32(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_packus_epi16(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_packus_epi16(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_packus_epi16(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_packus_epi16(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_adds_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_adds_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_adds_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_adds_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_adds_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_adds_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_adds_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_adds_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_adds_epu8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_adds_epu8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_adds_epu8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_adds_epu8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_adds_epu16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_adds_epu16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_adds_epu16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_adds_epu16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_avg_epu8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_avg_epu8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_avg_epu8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_avg_epu8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_avg_epu16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_avg_epu16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_avg_epu16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_avg_epu16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_max_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_max_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_max_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_max_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_max_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_max_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_max_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_max_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_max_epu8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_max_epu8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epu8 (__mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_max_epu8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_max_epu8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_max_epu16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_max_epu16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_max_epu16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_max_epu16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_min_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_min_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_min_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_min_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_min_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_min_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_min_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_min_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_min_epu8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm_min_epu8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epu8 (__mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_min_epu8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, + (__v32qi)_mm256_min_epu8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_min_epu16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_min_epu16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_min_epu16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_min_epu16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_shuffle_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_shuffle_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_shuffle_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_shuffle_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_subs_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_subs_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_subs_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_subs_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_subs_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_subs_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_subs_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_subs_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_subs_epu8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_subs_epu8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_subs_epu8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_subs_epu8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_subs_epu16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_subs_epu16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A, + __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_subs_epu16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_subs_epu16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I, + (__v8hi) __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_permutex2var_epi16(__m128i __A, __mmask8 __U, __m128i __I, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_permutex2var_epi16(__A, __I, __B), + (__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask2_permutex2var_epi16(__m128i __A, __m128i __I, __mmask8 __U, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_permutex2var_epi16(__A, __I, __B), + (__v8hi)__I); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_permutex2var_epi16 (__mmask8 __U, __m128i __A, __m128i __I, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_permutex2var_epi16(__A, __I, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B) +{ + return (__m256i)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I, + (__v16hi)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_permutex2var_epi16(__m256i __A, __mmask16 __U, __m256i __I, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B), + (__v16hi)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask2_permutex2var_epi16(__m256i __A, __m256i __I, __mmask16 __U, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B), + (__v16hi)__I); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutex2var_epi16 (__mmask16 __U, __m256i __A, __m256i __I, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_maddubs_epi16(__X, __Y), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_maddubs_epi16(__X, __Y), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X, + __m256i __Y) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_maddubs_epi16(__X, __Y), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_maddubs_epi16(__X, __Y), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_madd_epi16(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_madd_epi16(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_madd_epi16(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_madd_epi16(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtsepi16_epi8 (__m128i __A) { + return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A, + (__v16qi) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) { + return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtsepi16_epi8 (__mmask8 __M, __m128i __A) { + return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A, + (__v16qi) _mm_setzero_si128(), + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtsepi16_epi8 (__m256i __A) { + return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A, + (__v16qi) _mm_setzero_si128(), + (__mmask16) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) { + return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtsepi16_epi8 (__mmask16 __M, __m256i __A) { + return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A, + (__v16qi) _mm_setzero_si128(), + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtusepi16_epi8 (__m128i __A) { + return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A, + (__v16qi) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) { + return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtusepi16_epi8 (__mmask8 __M, __m128i __A) { + return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A, + (__v16qi) _mm_setzero_si128(), + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtusepi16_epi8 (__m256i __A) { + return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A, + (__v16qi) _mm_setzero_si128(), + (__mmask16) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) { + return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtusepi16_epi8 (__mmask16 __M, __m256i __A) { + return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A, + (__v16qi) _mm_setzero_si128(), + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtepi16_epi8 (__m128i __A) { + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v8hi)__A, __v8qi), + (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) { + return (__m128i) __builtin_ia32_pmovwb128_mask ((__v8hi) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi16_epi8 (__mmask8 __M, __m128i __A) { + return (__m128i) __builtin_ia32_pmovwb128_mask ((__v8hi) __A, + (__v16qi) _mm_setzero_si128(), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovwb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M); +} + + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovuswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtepi16_epi8 (__m256i __A) { + return (__m128i)__builtin_convertvector((__v16hi) __A, __v16qi); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm256_cvtepi16_epi8(__A), + (__v16qi)__O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi16_epi8 (__mmask16 __M, __m256i __A) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, + (__v16qi)_mm256_cvtepi16_epi8(__A), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A) +{ + __builtin_ia32_pmovwb256mem_mask ((__v16qi *) __P, (__v16hi) __A, __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A) +{ + __builtin_ia32_pmovswb256mem_mask ((__v16qi *) __P, (__v16hi) __A, __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A) +{ + __builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mulhrs_epi16(__X, __Y), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mulhrs_epi16(__X, __Y), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mulhrs_epi16(__X, __Y), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mulhrs_epi16(__X, __Y), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mulhi_epu16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mulhi_epu16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mulhi_epu16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mulhi_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mulhi_epu16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mulhi_epu16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mulhi_epu16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mulhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mulhi_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mulhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_mulhi_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mulhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mulhi_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mulhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_mulhi_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpackhi_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_unpackhi_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpackhi_epi8(__mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_unpackhi_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpackhi_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_unpackhi_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpackhi_epi8(__mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_unpackhi_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpackhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_unpackhi_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpackhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_unpackhi_epi16(__A, __B), + (__v8hi) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpackhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_unpackhi_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpackhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_unpackhi_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpacklo_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_unpacklo_epi8(__A, __B), + (__v16qi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpacklo_epi8(__mmask16 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, + (__v16qi)_mm_unpacklo_epi8(__A, __B), + (__v16qi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpacklo_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_unpacklo_epi8(__A, __B), + (__v32qi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpacklo_epi8(__mmask32 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, + (__v32qi)_mm256_unpacklo_epi8(__A, __B), + (__v32qi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpacklo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_unpacklo_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpacklo_epi16(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_unpacklo_epi16(__A, __B), + (__v8hi) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpacklo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_unpacklo_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_unpacklo_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepi8_epi16(__A), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepi8_epi16(__A), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepi8_epi16(__A), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepi8_epi16(__A), + (__v16hi)_mm256_setzero_si256()); +} + + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepu8_epi16(__A), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepu8_epi16(__A), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepu8_epi16(__A), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepu8_epi16(__A), + (__v16hi)_mm256_setzero_si256()); +} + + +#define _mm_mask_shufflehi_epi16(W, U, A, imm) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shufflehi_epi16((A), (imm)), \ + (__v8hi)(__m128i)(W))) + +#define _mm_maskz_shufflehi_epi16(U, A, imm) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shufflehi_epi16((A), (imm)), \ + (__v8hi)_mm_setzero_si128())) + +#define _mm256_mask_shufflehi_epi16(W, U, A, imm) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shufflehi_epi16((A), (imm)), \ + (__v16hi)(__m256i)(W))) + +#define _mm256_maskz_shufflehi_epi16(U, A, imm) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shufflehi_epi16((A), (imm)), \ + (__v16hi)_mm256_setzero_si256())) + +#define _mm_mask_shufflelo_epi16(W, U, A, imm) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shufflelo_epi16((A), (imm)), \ + (__v8hi)(__m128i)(W))) + +#define _mm_maskz_shufflelo_epi16(U, A, imm) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shufflelo_epi16((A), (imm)), \ + (__v8hi)_mm_setzero_si128())) + +#define _mm256_mask_shufflelo_epi16(W, U, A, imm) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shufflelo_epi16((A), \ + (imm)), \ + (__v16hi)(__m256i)(W))) + +#define _mm256_maskz_shufflelo_epi16(U, A, imm) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shufflelo_epi16((A), \ + (imm)), \ + (__v16hi)_mm256_setzero_si256())) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_sllv_epi16(__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_psllv16hi((__v16hi)__A, (__v16hi)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sllv_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sllv_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_sllv_epi16(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_psllv8hi((__v8hi)__A, (__v8hi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sllv_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sllv_epi16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sllv_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sll_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sll_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sll_epi16 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sll_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sll_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sll_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sll_epi16(__mmask16 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sll_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_slli_epi16(__A, (int)__B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_slli_epi16(__A, (int)__B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_slli_epi16(__m256i __W, __mmask16 __U, __m256i __A, + unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_slli_epi16(__A, (int)__B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_slli_epi16(__A, (int)__B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_srlv_epi16(__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_psrlv16hi((__v16hi)__A, (__v16hi)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srlv_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srlv_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_srlv_epi16(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_psrlv8hi((__v8hi)__A, (__v8hi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srlv_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srlv_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_srav_epi16(__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_psrav16hi((__v16hi)__A, (__v16hi)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srav_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srav_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_srav_epi16(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_psrav8hi((__v8hi)__A, (__v8hi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srav_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srav_epi16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srav_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sra_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sra_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sra_epi16(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_sra_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sra_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sra_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sra_epi16(__mmask16 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_sra_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srai_epi16(__A, (int)__B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srai_epi16(__A, (int)__B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srai_epi16(__m256i __W, __mmask16 __U, __m256i __A, + unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srai_epi16(__A, (int)__B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srai_epi16(__A, (int)__B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srl_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srl_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srl_epi16 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srl_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srl_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srl_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srl_epi16(__mmask16 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srl_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srli_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srli_epi16 (__mmask8 __U, __m128i __A, int __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_srli_epi16(__A, __B), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srli_epi16(__A, __B), + (__v16hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_srli_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mov_epi16 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U, + (__v8hi) __A, + (__v8hi) __W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mov_epi16 (__mmask8 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U, + (__v8hi) __A, + (__v8hi) _mm_setzero_si128 ()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mov_epi16 (__m256i __W, __mmask16 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U, + (__v16hi) __A, + (__v16hi) __W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mov_epi16 (__mmask16 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U, + (__v16hi) __A, + (__v16hi) _mm256_setzero_si256 ()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mov_epi8 (__m128i __W, __mmask16 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U, + (__v16qi) __A, + (__v16qi) __W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mov_epi8 (__mmask16 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U, + (__v16qi) __A, + (__v16qi) _mm_setzero_si128 ()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mov_epi8 (__m256i __W, __mmask32 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U, + (__v32qi) __A, + (__v32qi) __W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mov_epi8 (__mmask32 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U, + (__v32qi) __A, + (__v32qi) _mm256_setzero_si256 ()); +} + + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A) +{ + return (__m128i) __builtin_ia32_selectb_128(__M, + (__v16qi) _mm_set1_epi8(__A), + (__v16qi) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_set1_epi8 (__mmask16 __M, char __A) +{ + return (__m128i) __builtin_ia32_selectb_128(__M, + (__v16qi) _mm_set1_epi8(__A), + (__v16qi) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A) +{ + return (__m256i) __builtin_ia32_selectb_256(__M, + (__v32qi) _mm256_set1_epi8(__A), + (__v32qi) __O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_set1_epi8 (__mmask32 __M, char __A) +{ + return (__m256i) __builtin_ia32_selectb_256(__M, + (__v32qi) _mm256_set1_epi8(__A), + (__v32qi) _mm256_setzero_si256()); +} + +static __inline __m128i __DEFAULT_FN_ATTRS128 +_mm_loadu_epi16 (void const *__P) +{ + struct __loadu_epi16 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi16*)__P)->__v; +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_loadu_epi16 (__m128i __W, __mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddquhi128_mask ((const __v8hi *) __P, + (__v8hi) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_loadu_epi16 (__mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddquhi128_mask ((const __v8hi *) __P, + (__v8hi) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline __m256i __DEFAULT_FN_ATTRS256 +_mm256_loadu_epi16 (void const *__P) +{ + struct __loadu_epi16 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi16*)__P)->__v; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_loadu_epi16 (__m256i __W, __mmask16 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddquhi256_mask ((const __v16hi *) __P, + (__v16hi) __W, + (__mmask16) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_loadu_epi16 (__mmask16 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddquhi256_mask ((const __v16hi *) __P, + (__v16hi) + _mm256_setzero_si256 (), + (__mmask16) __U); +} + +static __inline __m128i __DEFAULT_FN_ATTRS128 +_mm_loadu_epi8 (void const *__P) +{ + struct __loadu_epi8 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi8*)__P)->__v; +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_loadu_epi8 (__m128i __W, __mmask16 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddquqi128_mask ((const __v16qi *) __P, + (__v16qi) __W, + (__mmask16) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_loadu_epi8 (__mmask16 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddquqi128_mask ((const __v16qi *) __P, + (__v16qi) + _mm_setzero_si128 (), + (__mmask16) __U); +} + +static __inline __m256i __DEFAULT_FN_ATTRS256 +_mm256_loadu_epi8 (void const *__P) +{ + struct __loadu_epi8 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi8*)__P)->__v; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_loadu_epi8 (__m256i __W, __mmask32 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddquqi256_mask ((const __v32qi *) __P, + (__v32qi) __W, + (__mmask32) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_loadu_epi8 (__mmask32 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddquqi256_mask ((const __v32qi *) __P, + (__v32qi) + _mm256_setzero_si256 (), + (__mmask32) __U); +} + +static __inline void __DEFAULT_FN_ATTRS128 +_mm_storeu_epi16 (void *__P, __m128i __A) +{ + struct __storeu_epi16 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi16*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_storeu_epi16 (void *__P, __mmask8 __U, __m128i __A) +{ + __builtin_ia32_storedquhi128_mask ((__v8hi *) __P, + (__v8hi) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS256 +_mm256_storeu_epi16 (void *__P, __m256i __A) +{ + struct __storeu_epi16 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi16*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_storeu_epi16 (void *__P, __mmask16 __U, __m256i __A) +{ + __builtin_ia32_storedquhi256_mask ((__v16hi *) __P, + (__v16hi) __A, + (__mmask16) __U); +} + +static __inline void __DEFAULT_FN_ATTRS128 +_mm_storeu_epi8 (void *__P, __m128i __A) +{ + struct __storeu_epi8 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi8*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_storeu_epi8 (void *__P, __mmask16 __U, __m128i __A) +{ + __builtin_ia32_storedquqi128_mask ((__v16qi *) __P, + (__v16qi) __A, + (__mmask16) __U); +} + +static __inline void __DEFAULT_FN_ATTRS256 +_mm256_storeu_epi8 (void *__P, __m256i __A) +{ + struct __storeu_epi8 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi8*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A) +{ + __builtin_ia32_storedquqi256_mask ((__v32qi *) __P, + (__v32qi) __A, + (__mmask32) __U); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_test_epi8_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_mask_test_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_test_epi8_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_mask_test_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpneq_epi8_mask (__U, _mm256_and_si256(__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_test_epi16_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpneq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_mask_test_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpneq_epi16_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS256 +_mm256_test_epi16_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpneq_epi16_mask (_mm256_and_si256 (__A, __B), + _mm256_setzero_si256 ()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS256 +_mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpneq_epi16_mask (__U, _mm256_and_si256(__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_testn_epi8_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_mask_testn_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpeq_epi8_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_testn_epi8_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpeq_epi8_mask (_mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_mask_testn_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpeq_epi8_mask (__U, _mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_testn_epi16_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpeq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_mask_testn_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpeq_epi16_mask (__U, _mm_and_si128(__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS256 +_mm256_testn_epi16_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpeq_epi16_mask (_mm256_and_si256(__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS256 +_mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpeq_epi16_mask (__U, _mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 +_mm_movepi8_mask (__m128i __A) +{ + return (__mmask16) __builtin_ia32_cvtb2mask128 ((__v16qi) __A); +} + +static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 +_mm256_movepi8_mask (__m256i __A) +{ + return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_movepi16_mask (__m128i __A) +{ + return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A); +} + +static __inline__ __mmask16 __DEFAULT_FN_ATTRS256 +_mm256_movepi16_mask (__m256i __A) +{ + return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_movm_epi8 (__mmask16 __A) +{ + return (__m128i) __builtin_ia32_cvtmask2b128 (__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_movm_epi8 (__mmask32 __A) +{ + return (__m256i) __builtin_ia32_cvtmask2b256 (__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_movm_epi16 (__mmask8 __A) +{ + return (__m128i) __builtin_ia32_cvtmask2w128 (__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_movm_epi16 (__mmask16 __A) +{ + return (__m256i) __builtin_ia32_cvtmask2w256 (__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectb_128(__M, + (__v16qi) _mm_broadcastb_epi8(__A), + (__v16qi) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectb_128(__M, + (__v16qi) _mm_broadcastb_epi8(__A), + (__v16qi) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectb_256(__M, + (__v32qi) _mm256_broadcastb_epi8(__A), + (__v32qi) __O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectb_256(__M, + (__v32qi) _mm256_broadcastb_epi8(__A), + (__v32qi) _mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128(__M, + (__v8hi) _mm_broadcastw_epi16(__A), + (__v8hi) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectw_128(__M, + (__v8hi) _mm_broadcastw_epi16(__A), + (__v8hi) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectw_256(__M, + (__v16hi) _mm256_broadcastw_epi16(__A), + (__v16hi) __O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectw_256(__M, + (__v16hi) _mm256_broadcastw_epi16(__A), + (__v16hi) _mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A) +{ + return (__m256i) __builtin_ia32_selectw_256 (__M, + (__v16hi) _mm256_set1_epi16(__A), + (__v16hi) __O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_set1_epi16 (__mmask16 __M, short __A) +{ + return (__m256i) __builtin_ia32_selectw_256(__M, + (__v16hi)_mm256_set1_epi16(__A), + (__v16hi) _mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A) +{ + return (__m128i) __builtin_ia32_selectw_128(__M, + (__v8hi) _mm_set1_epi16(__A), + (__v8hi) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_set1_epi16 (__mmask8 __M, short __A) +{ + return (__m128i) __builtin_ia32_selectw_128(__M, + (__v8hi) _mm_set1_epi16(__A), + (__v8hi) _mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_permutexvar_epi16 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_permvarhi128((__v8hi) __B, (__v8hi) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_permutexvar_epi16 (__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_permutexvar_epi16(__A, __B), + (__v8hi) _mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_permutexvar_epi16 (__m128i __W, __mmask8 __M, __m128i __A, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, + (__v8hi)_mm_permutexvar_epi16(__A, __B), + (__v8hi)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_permutexvar_epi16 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_permvarhi256((__v16hi) __B, (__v16hi) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutexvar_epi16 (__mmask16 __M, __m256i __A, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_permutexvar_epi16(__A, __B), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_permutexvar_epi16 (__m256i __W, __mmask16 __M, __m256i __A, + __m256i __B) +{ + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, + (__v16hi)_mm256_permutexvar_epi16(__A, __B), + (__v16hi)__W); +} + +#define _mm_mask_alignr_epi8(W, U, A, B, N) \ + ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \ + (__v16qi)_mm_alignr_epi8((A), (B), (int)(N)), \ + (__v16qi)(__m128i)(W))) + +#define _mm_maskz_alignr_epi8(U, A, B, N) \ + ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \ + (__v16qi)_mm_alignr_epi8((A), (B), (int)(N)), \ + (__v16qi)_mm_setzero_si128())) + +#define _mm256_mask_alignr_epi8(W, U, A, B, N) \ + ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \ + (__v32qi)_mm256_alignr_epi8((A), (B), (int)(N)), \ + (__v32qi)(__m256i)(W))) + +#define _mm256_maskz_alignr_epi8(U, A, B, N) \ + ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \ + (__v32qi)_mm256_alignr_epi8((A), (B), (int)(N)), \ + (__v32qi)_mm256_setzero_si256())) + +#define _mm_dbsad_epu8(A, B, imm) \ + ((__m128i)__builtin_ia32_dbpsadbw128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(imm))) + +#define _mm_mask_dbsad_epu8(W, U, A, B, imm) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_dbsad_epu8((A), (B), (imm)), \ + (__v8hi)(__m128i)(W))) + +#define _mm_maskz_dbsad_epu8(U, A, B, imm) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_dbsad_epu8((A), (B), (imm)), \ + (__v8hi)_mm_setzero_si128())) + +#define _mm256_dbsad_epu8(A, B, imm) \ + ((__m256i)__builtin_ia32_dbpsadbw256((__v32qi)(__m256i)(A), \ + (__v32qi)(__m256i)(B), (int)(imm))) + +#define _mm256_mask_dbsad_epu8(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \ + (__v16hi)(__m256i)(W))) + +#define _mm256_maskz_dbsad_epu8(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \ + (__v16hi)_mm256_setzero_si256())) + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_reduce_add_epi16(__m128i __W) { + return __builtin_reduce_add((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_reduce_mul_epi16(__m128i __W) { + return __builtin_reduce_mul((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_reduce_and_epi16(__m128i __W) { + return __builtin_reduce_and((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_reduce_or_epi16(__m128i __W) { + return __builtin_reduce_or((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_add_epi16( __mmask8 __M, __m128i __W) { + __W = _mm_maskz_mov_epi16(__M, __W); + return __builtin_reduce_add((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_mul_epi16( __mmask8 __M, __m128i __W) { + __W = _mm_mask_mov_epi16(_mm_set1_epi16(1), __M, __W); + return __builtin_reduce_mul((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_and_epi16( __mmask8 __M, __m128i __W) { + __W = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __W); + return __builtin_reduce_and((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_or_epi16(__mmask8 __M, __m128i __W) { + __W = _mm_maskz_mov_epi16(__M, __W); + return __builtin_reduce_or((__v8hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_reduce_max_epi16(__m128i __V) { + return __builtin_reduce_max((__v8hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS128 +_mm_reduce_max_epu16(__m128i __V) { + return __builtin_reduce_max((__v8hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_reduce_min_epi16(__m128i __V) { + return __builtin_reduce_min((__v8hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS128 +_mm_reduce_min_epu16(__m128i __V) { + return __builtin_reduce_min((__v8hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_max_epi16(__mmask16 __M, __m128i __V) { + __V = _mm_mask_mov_epi16(_mm_set1_epi16(-32767-1), __M, __V); + return __builtin_reduce_max((__v8hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_max_epu16(__mmask16 __M, __m128i __V) { + __V = _mm_maskz_mov_epi16(__M, __V); + return __builtin_reduce_max((__v8hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_min_epi16(__mmask16 __M, __m128i __V) { + __V = _mm_mask_mov_epi16(_mm_set1_epi16(32767), __M, __V); + return __builtin_reduce_min((__v8hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_min_epu16(__mmask16 __M, __m128i __V) { + __V = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __V); + return __builtin_reduce_min((__v8hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_reduce_add_epi16(__m256i __W) { + return __builtin_reduce_add((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_reduce_mul_epi16(__m256i __W) { + return __builtin_reduce_mul((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_reduce_and_epi16(__m256i __W) { + return __builtin_reduce_and((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_reduce_or_epi16(__m256i __W) { + return __builtin_reduce_or((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_add_epi16( __mmask16 __M, __m256i __W) { + __W = _mm256_maskz_mov_epi16(__M, __W); + return __builtin_reduce_add((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_mul_epi16( __mmask16 __M, __m256i __W) { + __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(1), __M, __W); + return __builtin_reduce_mul((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_and_epi16( __mmask16 __M, __m256i __W) { + __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __W); + return __builtin_reduce_and((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_or_epi16(__mmask16 __M, __m256i __W) { + __W = _mm256_maskz_mov_epi16(__M, __W); + return __builtin_reduce_or((__v16hi)__W); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_reduce_max_epi16(__m256i __V) { + return __builtin_reduce_max((__v16hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS256 +_mm256_reduce_max_epu16(__m256i __V) { + return __builtin_reduce_max((__v16hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_reduce_min_epi16(__m256i __V) { + return __builtin_reduce_min((__v16hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS256 +_mm256_reduce_min_epu16(__m256i __V) { + return __builtin_reduce_min((__v16hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_max_epi16(__mmask16 __M, __m256i __V) { + __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-32767-1), __M, __V); + return __builtin_reduce_max((__v16hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_max_epu16(__mmask16 __M, __m256i __V) { + __V = _mm256_maskz_mov_epi16(__M, __V); + return __builtin_reduce_max((__v16hu)__V); +} + +static __inline__ short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_min_epi16(__mmask16 __M, __m256i __V) { + __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(32767), __M, __V); + return __builtin_reduce_min((__v16hi)__V); +} + +static __inline__ unsigned short __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_min_epu16(__mmask16 __M, __m256i __V) { + __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __V); + return __builtin_reduce_min((__v16hu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_reduce_add_epi8(__m128i __W) { + return __builtin_reduce_add((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_reduce_mul_epi8(__m128i __W) { + return __builtin_reduce_mul((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_reduce_and_epi8(__m128i __W) { + return __builtin_reduce_and((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_reduce_or_epi8(__m128i __W) { + return __builtin_reduce_or((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_add_epi8(__mmask16 __M, __m128i __W) { + __W = _mm_maskz_mov_epi8(__M, __W); + return __builtin_reduce_add((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_mul_epi8(__mmask16 __M, __m128i __W) { + __W = _mm_mask_mov_epi8(_mm_set1_epi8(1), __M, __W); + return __builtin_reduce_mul((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_and_epi8(__mmask16 __M, __m128i __W) { + __W = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __W); + return __builtin_reduce_and((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_or_epi8(__mmask16 __M, __m128i __W) { + __W = _mm_maskz_mov_epi8(__M, __W); + return __builtin_reduce_or((__v16qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_reduce_max_epi8(__m128i __V) { + return __builtin_reduce_max((__v16qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS128 +_mm_reduce_max_epu8(__m128i __V) { + return __builtin_reduce_max((__v16qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_reduce_min_epi8(__m128i __V) { + return __builtin_reduce_min((__v16qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS128 +_mm_reduce_min_epu8(__m128i __V) { + return __builtin_reduce_min((__v16qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_max_epi8(__mmask16 __M, __m128i __V) { + __V = _mm_mask_mov_epi8(_mm_set1_epi8(-127-1), __M, __V); + return __builtin_reduce_max((__v16qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_max_epu8(__mmask16 __M, __m128i __V) { + __V = _mm_maskz_mov_epi8(__M, __V); + return __builtin_reduce_max((__v16qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_min_epi8(__mmask16 __M, __m128i __V) { + __V = _mm_mask_mov_epi8(_mm_set1_epi8(127), __M, __V); + return __builtin_reduce_min((__v16qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS128 +_mm_mask_reduce_min_epu8(__mmask16 __M, __m128i __V) { + __V = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __V); + return __builtin_reduce_min((__v16qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_reduce_add_epi8(__m256i __W) { + return __builtin_reduce_add((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_reduce_mul_epi8(__m256i __W) { + return __builtin_reduce_mul((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_reduce_and_epi8(__m256i __W) { + return __builtin_reduce_and((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_reduce_or_epi8(__m256i __W) { + return __builtin_reduce_or((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_add_epi8(__mmask32 __M, __m256i __W) { + __W = _mm256_maskz_mov_epi8(__M, __W); + return __builtin_reduce_add((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_mul_epi8(__mmask32 __M, __m256i __W) { + __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(1), __M, __W); + return __builtin_reduce_mul((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_and_epi8(__mmask32 __M, __m256i __W) { + __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __W); + return __builtin_reduce_and((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_or_epi8(__mmask32 __M, __m256i __W) { + __W = _mm256_maskz_mov_epi8(__M, __W); + return __builtin_reduce_or((__v32qs)__W); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_reduce_max_epi8(__m256i __V) { + return __builtin_reduce_max((__v32qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS256 +_mm256_reduce_max_epu8(__m256i __V) { + return __builtin_reduce_max((__v32qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_reduce_min_epi8(__m256i __V) { + return __builtin_reduce_min((__v32qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS256 +_mm256_reduce_min_epu8(__m256i __V) { + return __builtin_reduce_min((__v32qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_max_epi8(__mmask32 __M, __m256i __V) { + __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-127-1), __M, __V); + return __builtin_reduce_max((__v32qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_max_epu8(__mmask32 __M, __m256i __V) { + __V = _mm256_maskz_mov_epi8(__M, __V); + return __builtin_reduce_max((__v32qu)__V); +} + +static __inline__ signed char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_min_epi8(__mmask32 __M, __m256i __V) { + __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(127), __M, __V); + return __builtin_reduce_min((__v32qs)__V); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS256 +_mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) { + __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __V); + return __builtin_reduce_min((__v32qu)__V); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __AVX512VLBWINTRIN_H */ diff --git a/llvm/lib/clang/19/include/avx512vlcdintrin.h b/llvm/lib/clang/19/include/avx512vlcdintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..923e2c551a97a8695d3309ae1db14f442c9985f3 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlcdintrin.h @@ -0,0 +1,230 @@ +/*===---- avx512vlcdintrin.h - AVX512VL and AVX512CD intrinsics ------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLCDINTRIN_H +#define __AVX512VLCDINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512cd,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512cd,no-evex512"), \ + __min_vector_width__(256))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_broadcastmb_epi64 (__mmask8 __A) +{ + return (__m128i) _mm_set1_epi64x((long long) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_broadcastmb_epi64 (__mmask8 __A) +{ + return (__m256i) _mm256_set1_epi64x((long long)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_broadcastmw_epi32 (__mmask16 __A) +{ + return (__m128i) _mm_set1_epi32((int)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_broadcastmw_epi32 (__mmask16 __A) +{ + return (__m256i) _mm256_set1_epi32((int)__A); +} + + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_conflict_epi64 (__m128i __A) +{ + return (__m128i) __builtin_ia32_vpconflictdi_128 ((__v2di) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_conflict_epi64 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_conflict_epi64(__A), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_conflict_epi64 (__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_conflict_epi64(__A), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_conflict_epi64 (__m256i __A) +{ + return (__m256i) __builtin_ia32_vpconflictdi_256 ((__v4di) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_conflict_epi64 (__m256i __W, __mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_conflict_epi64(__A), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_conflict_epi64 (__mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_conflict_epi64(__A), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_conflict_epi32 (__m128i __A) +{ + return (__m128i) __builtin_ia32_vpconflictsi_128 ((__v4si) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_conflict_epi32 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_conflict_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_conflict_epi32 (__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_conflict_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_conflict_epi32 (__m256i __A) +{ + return (__m256i) __builtin_ia32_vpconflictsi_256 ((__v8si) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_conflict_epi32 (__m256i __W, __mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_conflict_epi32(__A), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_conflict_epi32 (__mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_conflict_epi32(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_lzcnt_epi32 (__m128i __A) +{ + return (__m128i) __builtin_ia32_vplzcntd_128 ((__v4si) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_lzcnt_epi32 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_lzcnt_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_lzcnt_epi32 (__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_lzcnt_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_lzcnt_epi32 (__m256i __A) +{ + return (__m256i) __builtin_ia32_vplzcntd_256 ((__v8si) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_lzcnt_epi32 (__m256i __W, __mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_lzcnt_epi32(__A), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_lzcnt_epi32 (__mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_lzcnt_epi32(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_lzcnt_epi64 (__m128i __A) +{ + return (__m128i) __builtin_ia32_vplzcntq_128 ((__v2di) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_lzcnt_epi64 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_lzcnt_epi64(__A), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_lzcnt_epi64 (__mmask8 __U, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_lzcnt_epi64(__A), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_lzcnt_epi64 (__m256i __A) +{ + return (__m256i) __builtin_ia32_vplzcntq_256 ((__v4di) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_lzcnt_epi64 (__m256i __W, __mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_lzcnt_epi64(__A), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_lzcnt_epi64 (__mmask8 __U, __m256i __A) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_lzcnt_epi64(__A), + (__v4di)_mm256_setzero_si256()); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __AVX512VLCDINTRIN_H */ diff --git a/llvm/lib/clang/19/include/avx512vldqintrin.h b/llvm/lib/clang/19/include/avx512vldqintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..272cdd89e2d24fa47b51d09bcf53e5aa35d60ab7 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vldqintrin.h @@ -0,0 +1,1173 @@ +/*===---- avx512vldqintrin.h - AVX512VL and AVX512DQ intrinsics ------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLDQINTRIN_H +#define __AVX512VLDQINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512dq,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512dq,no-evex512"), \ + __min_vector_width__(256))) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mullo_epi64 (__m256i __A, __m256i __B) { + return (__m256i) ((__v4du) __A * (__v4du) __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mullo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_mullo_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mullo_epi64(__mmask8 __U, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_mullo_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mullo_epi64 (__m128i __A, __m128i __B) { + return (__m128i) ((__v2du) __A * (__v2du) __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mullo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_mullo_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mullo_epi64(__mmask8 __U, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_mullo_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_andnot_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_andnot_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_andnot_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_andnot_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_andnot_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_andnot_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_andnot_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_andnot_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_andnot_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_andnot_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_andnot_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_andnot_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_andnot_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_andnot_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_andnot_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_andnot_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_and_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_and_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_and_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_and_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_and_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_and_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_and_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_and_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_and_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_and_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_and_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_and_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_and_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_and_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_and_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_and_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_xor_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_xor_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_xor_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_xor_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_xor_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_xor_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_xor_pd (__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_xor_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_xor_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_xor_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_xor_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_xor_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_xor_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_xor_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_xor_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_xor_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_or_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_or_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_or_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_or_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_or_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_or_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_or_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_or_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_or_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_or_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_or_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_or_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_or_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_or_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_or_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_or_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtpd_epi64 (__m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtpd_epi64 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpd_epi64 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtpd_epi64 (__m256d __A) { + return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpd_epi64 (__mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtpd_epu64 (__m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtpd_epu64 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpd_epu64 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtpd_epu64 (__m256d __A) { + return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpd_epu64 (__m256i __W, __mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpd_epu64 (__mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtps_epi64 (__m128 __A) { + return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtps_epi64 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtps_epi64 (__m128 __A) { + return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtps_epi64 (__m256i __W, __mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtps_epu64 (__m128 __A) { + return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtps_epu64 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtps_epu64 (__m128 __A) { + return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtps_epu64 (__m256i __W, __mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_cvtepi64_pd (__m128i __A) { + return (__m128d)__builtin_convertvector((__v2di)__A, __v2df); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_pd (__m128d __W, __mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_cvtepi64_pd(__A), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi64_pd (__mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_cvtepi64_pd(__A), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_cvtepi64_pd (__m256i __A) { + return (__m256d)__builtin_convertvector((__v4di)__A, __v4df); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_pd (__m256d __W, __mmask8 __U, __m256i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_cvtepi64_pd(__A), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi64_pd (__mmask8 __U, __m256i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_cvtepi64_pd(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtepi64_ps (__m128i __A) { + return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A, + (__v4sf) _mm_setzero_ps(), + (__mmask8) -1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m128i __A) { + return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi64_ps (__mmask8 __U, __m128i __A) { + return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A, + (__v4sf) _mm_setzero_ps(), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_cvtepi64_ps (__m256i __A) { + return (__m128)__builtin_convertvector((__v4di)__A, __v4sf); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m256i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm256_cvtepi64_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi64_ps (__mmask8 __U, __m256i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm256_cvtepi64_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvttpd_epi64 (__m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttpd_epi64 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttpd_epi64 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttpd_epi64 (__m256d __A) { + return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttpd_epi64 (__mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvttpd_epu64 (__m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttpd_epu64 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttpd_epu64 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttpd_epu64 (__m256d __A) { + return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttpd_epu64 (__m256i __W, __mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttpd_epu64 (__mmask8 __U, __m256d __A) { + return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvttps_epi64 (__m128 __A) { + return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttps_epi64 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttps_epi64 (__m128 __A) { + return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttps_epi64 (__m256i __W, __mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvttps_epu64 (__m128 __A) { + return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttps_epu64 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A, + (__v2di) _mm_setzero_si128(), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttps_epu64 (__m128 __A) { + return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttps_epu64 (__m256i __W, __mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) { + return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A, + (__v4di) _mm256_setzero_si256(), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_cvtepu64_pd (__m128i __A) { + return (__m128d)__builtin_convertvector((__v2du)__A, __v2df); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu64_pd (__m128d __W, __mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_cvtepu64_pd(__A), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu64_pd (__mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_cvtepu64_pd(__A), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_cvtepu64_pd (__m256i __A) { + return (__m256d)__builtin_convertvector((__v4du)__A, __v4df); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu64_pd (__m256d __W, __mmask8 __U, __m256i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_cvtepu64_pd(__A), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu64_pd (__mmask8 __U, __m256i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_cvtepu64_pd(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtepu64_ps (__m128i __A) { + return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A, + (__v4sf) _mm_setzero_ps(), + (__mmask8) -1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m128i __A) { + return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu64_ps (__mmask8 __U, __m128i __A) { + return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A, + (__v4sf) _mm_setzero_ps(), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_cvtepu64_ps (__m256i __A) { + return (__m128)__builtin_convertvector((__v4du)__A, __v4sf); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m256i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm256_cvtepu64_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm256_cvtepu64_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +#define _mm_range_pd(A, B, C) \ + ((__m128d)__builtin_ia32_rangepd128_mask((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), (int)(C), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)-1)) + +#define _mm_mask_range_pd(W, U, A, B, C) \ + ((__m128d)__builtin_ia32_rangepd128_mask((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), (int)(C), \ + (__v2df)(__m128d)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_range_pd(U, A, B, C) \ + ((__m128d)__builtin_ia32_rangepd128_mask((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), (int)(C), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm256_range_pd(A, B, C) \ + ((__m256d)__builtin_ia32_rangepd256_mask((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), (int)(C), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)-1)) + +#define _mm256_mask_range_pd(W, U, A, B, C) \ + ((__m256d)__builtin_ia32_rangepd256_mask((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), (int)(C), \ + (__v4df)(__m256d)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_range_pd(U, A, B, C) \ + ((__m256d)__builtin_ia32_rangepd256_mask((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), (int)(C), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm_range_ps(A, B, C) \ + ((__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), (int)(C), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm_mask_range_ps(W, U, A, B, C) \ + ((__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), (int)(C), \ + (__v4sf)(__m128)(W), (__mmask8)(U))) + +#define _mm_maskz_range_ps(U, A, B, C) \ + ((__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), (int)(C), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm256_range_ps(A, B, C) \ + ((__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), (int)(C), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm256_mask_range_ps(W, U, A, B, C) \ + ((__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), (int)(C), \ + (__v8sf)(__m256)(W), (__mmask8)(U))) + +#define _mm256_maskz_range_ps(U, A, B, C) \ + ((__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), (int)(C), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm_reduce_pd(A, B) \ + ((__m128d)__builtin_ia32_reducepd128_mask((__v2df)(__m128d)(A), (int)(B), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)-1)) + +#define _mm_mask_reduce_pd(W, U, A, B) \ + ((__m128d)__builtin_ia32_reducepd128_mask((__v2df)(__m128d)(A), (int)(B), \ + (__v2df)(__m128d)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_reduce_pd(U, A, B) \ + ((__m128d)__builtin_ia32_reducepd128_mask((__v2df)(__m128d)(A), (int)(B), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm256_reduce_pd(A, B) \ + ((__m256d)__builtin_ia32_reducepd256_mask((__v4df)(__m256d)(A), (int)(B), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)-1)) + +#define _mm256_mask_reduce_pd(W, U, A, B) \ + ((__m256d)__builtin_ia32_reducepd256_mask((__v4df)(__m256d)(A), (int)(B), \ + (__v4df)(__m256d)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_reduce_pd(U, A, B) \ + ((__m256d)__builtin_ia32_reducepd256_mask((__v4df)(__m256d)(A), (int)(B), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm_reduce_ps(A, B) \ + ((__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm_mask_reduce_ps(W, U, A, B) \ + ((__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \ + (__v4sf)(__m128)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_reduce_ps(U, A, B) \ + ((__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm256_reduce_ps(A, B) \ + ((__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm256_mask_reduce_ps(W, U, A, B) \ + ((__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \ + (__v8sf)(__m256)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_reduce_ps(U, A, B) \ + ((__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)(U))) + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_movepi32_mask (__m128i __A) +{ + return (__mmask8) __builtin_ia32_cvtd2mask128 ((__v4si) __A); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_movepi32_mask (__m256i __A) +{ + return (__mmask8) __builtin_ia32_cvtd2mask256 ((__v8si) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_movm_epi32 (__mmask8 __A) +{ + return (__m128i) __builtin_ia32_cvtmask2d128 (__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_movm_epi32 (__mmask8 __A) +{ + return (__m256i) __builtin_ia32_cvtmask2d256 (__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_movm_epi64 (__mmask8 __A) +{ + return (__m128i) __builtin_ia32_cvtmask2q128 (__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_movm_epi64 (__mmask8 __A) +{ + return (__m256i) __builtin_ia32_cvtmask2q256 (__A); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_movepi64_mask (__m128i __A) +{ + return (__mmask8) __builtin_ia32_cvtq2mask128 ((__v2di) __A); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_movepi64_mask (__m256i __A) +{ + return (__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_broadcast_f32x2 (__m128 __A) +{ + return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, + 0, 1, 0, 1, 0, 1, 0, 1); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcast_f32x2 (__m256 __O, __mmask8 __M, __m128 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, + (__v8sf)_mm256_broadcast_f32x2(__A), + (__v8sf)__O); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcast_f32x2 (__mmask8 __M, __m128 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, + (__v8sf)_mm256_broadcast_f32x2(__A), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_broadcast_f64x2(__m128d __A) +{ + return (__m256d)__builtin_shufflevector((__v2df)__A, (__v2df)__A, + 0, 1, 0, 1); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, __m128d __A) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M, + (__v4df)_mm256_broadcast_f64x2(__A), + (__v4df)__O); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcast_f64x2 (__mmask8 __M, __m128d __A) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M, + (__v4df)_mm256_broadcast_f64x2(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_broadcast_i32x2 (__m128i __A) +{ + return (__m128i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, + 0, 1, 0, 1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_broadcast_i32x2 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_broadcast_i32x2(__A), + (__v4si)__O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_broadcast_i32x2(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_broadcast_i32x2 (__m128i __A) +{ + return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, + 0, 1, 0, 1, 0, 1, 0, 1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcast_i32x2 (__m256i __O, __mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_broadcast_i32x2(__A), + (__v8si)__O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_broadcast_i32x2(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_broadcast_i64x2(__m128i __A) +{ + return (__m256i)__builtin_shufflevector((__v2di)__A, (__v2di)__A, + 0, 1, 0, 1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_broadcast_i64x2(__A), + (__v4di)__O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_broadcast_i64x2(__A), + (__v4di)_mm256_setzero_si256()); +} + +#define _mm256_extractf64x2_pd(A, imm) \ + ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \ + (int)(imm), \ + (__v2df)_mm_undefined_pd(), \ + (__mmask8)-1)) + +#define _mm256_mask_extractf64x2_pd(W, U, A, imm) \ + ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \ + (int)(imm), \ + (__v2df)(__m128d)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_extractf64x2_pd(U, A, imm) \ + ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \ + (int)(imm), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm256_extracti64x2_epi64(A, imm) \ + ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \ + (int)(imm), \ + (__v2di)_mm_undefined_si128(), \ + (__mmask8)-1)) + +#define _mm256_mask_extracti64x2_epi64(W, U, A, imm) \ + ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \ + (int)(imm), \ + (__v2di)(__m128i)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_extracti64x2_epi64(U, A, imm) \ + ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \ + (int)(imm), \ + (__v2di)_mm_setzero_si128(), \ + (__mmask8)(U))) + +#define _mm256_insertf64x2(A, B, imm) \ + ((__m256d)__builtin_ia32_insertf64x2_256((__v4df)(__m256d)(A), \ + (__v2df)(__m128d)(B), (int)(imm))) + +#define _mm256_mask_insertf64x2(W, U, A, B, imm) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_insertf64x2((A), (B), (imm)), \ + (__v4df)(__m256d)(W))) + +#define _mm256_maskz_insertf64x2(U, A, B, imm) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_insertf64x2((A), (B), (imm)), \ + (__v4df)_mm256_setzero_pd())) + +#define _mm256_inserti64x2(A, B, imm) \ + ((__m256i)__builtin_ia32_inserti64x2_256((__v4di)(__m256i)(A), \ + (__v2di)(__m128i)(B), (int)(imm))) + +#define _mm256_mask_inserti64x2(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_inserti64x2((A), (B), (imm)), \ + (__v4di)(__m256i)(W))) + +#define _mm256_maskz_inserti64x2(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_inserti64x2((A), (B), (imm)), \ + (__v4di)_mm256_setzero_si256())) + +#define _mm_mask_fpclass_pd_mask(U, A, imm) \ + ((__mmask8)__builtin_ia32_fpclasspd128_mask((__v2df)(__m128d)(A), (int)(imm), \ + (__mmask8)(U))) + +#define _mm_fpclass_pd_mask(A, imm) \ + ((__mmask8)__builtin_ia32_fpclasspd128_mask((__v2df)(__m128d)(A), (int)(imm), \ + (__mmask8)-1)) + +#define _mm256_mask_fpclass_pd_mask(U, A, imm) \ + ((__mmask8)__builtin_ia32_fpclasspd256_mask((__v4df)(__m256d)(A), (int)(imm), \ + (__mmask8)(U))) + +#define _mm256_fpclass_pd_mask(A, imm) \ + ((__mmask8)__builtin_ia32_fpclasspd256_mask((__v4df)(__m256d)(A), (int)(imm), \ + (__mmask8)-1)) + +#define _mm_mask_fpclass_ps_mask(U, A, imm) \ + ((__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \ + (__mmask8)(U))) + +#define _mm_fpclass_ps_mask(A, imm) \ + ((__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \ + (__mmask8)-1)) + +#define _mm256_mask_fpclass_ps_mask(U, A, imm) \ + ((__mmask8)__builtin_ia32_fpclassps256_mask((__v8sf)(__m256)(A), (int)(imm), \ + (__mmask8)(U))) + +#define _mm256_fpclass_ps_mask(A, imm) \ + ((__mmask8)__builtin_ia32_fpclassps256_mask((__v8sf)(__m256)(A), (int)(imm), \ + (__mmask8)-1)) + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avx512vlfp16intrin.h b/llvm/lib/clang/19/include/avx512vlfp16intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..a12acb7d9a24a07c9c32f4d9a811fc5b47a69483 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlfp16intrin.h @@ -0,0 +1,2071 @@ +/*===---------- avx512vlfp16intrin.h - AVX512-FP16 intrinsics --------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error \ + "Never use directly; include instead." +#endif + +#ifdef __SSE2__ + +#ifndef __AVX512VLFP16INTRIN_H +#define __AVX512VLFP16INTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512fp16,avx512vl,no-evex512"), \ + __min_vector_width__(256))) +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512fp16,avx512vl,no-evex512"), \ + __min_vector_width__(128))) + +static __inline__ _Float16 __DEFAULT_FN_ATTRS128 _mm_cvtsh_h(__m128h __a) { + return __a[0]; +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS256 _mm256_cvtsh_h(__m256h __a) { + return __a[0]; +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_set_sh(_Float16 __h) { + return __extension__(__m128h){__h, 0, 0, 0, 0, 0, 0, 0}; +} + +static __inline __m128h __DEFAULT_FN_ATTRS128 _mm_set1_ph(_Float16 __h) { + return (__m128h)(__v8hf){__h, __h, __h, __h, __h, __h, __h, __h}; +} + +static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_set1_ph(_Float16 __h) { + return (__m256h)(__v16hf){__h, __h, __h, __h, __h, __h, __h, __h, + __h, __h, __h, __h, __h, __h, __h, __h}; +} + +static __inline __m128h __DEFAULT_FN_ATTRS128 +_mm_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, + _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8) { + return (__m128h)(__v8hf){__h8, __h7, __h6, __h5, __h4, __h3, __h2, __h1}; +} + +static __inline __m256h __DEFAULT_FN_ATTRS256 +_mm256_set1_pch(_Float16 _Complex h) { + return (__m256h)_mm256_set1_ps(__builtin_bit_cast(float, h)); +} + +static __inline __m128h __DEFAULT_FN_ATTRS128 +_mm_set1_pch(_Float16 _Complex h) { + return (__m128h)_mm_set1_ps(__builtin_bit_cast(float, h)); +} + +static __inline __m256h __DEFAULT_FN_ATTRS256 +_mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, + _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8, + _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12, + _Float16 __h13, _Float16 __h14, _Float16 __h15, _Float16 __h16) { + return (__m256h)(__v16hf){__h16, __h15, __h14, __h13, __h12, __h11, + __h10, __h9, __h8, __h7, __h6, __h5, + __h4, __h3, __h2, __h1}; +} + +#define _mm_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8) \ + _mm_set_ph((h8), (h7), (h6), (h5), (h4), (h3), (h2), (h1)) + +#define _mm256_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, \ + h14, h15, h16) \ + _mm256_set_ph((h16), (h15), (h14), (h13), (h12), (h11), (h10), (h9), (h8), \ + (h7), (h6), (h5), (h4), (h3), (h2), (h1)) + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_add_ph(__m256h __A, + __m256h __B) { + return (__m256h)((__v16hf)__A + (__v16hf)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_add_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_add_ph(__A, __B), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_add_ph(__A, __B), (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_add_ph(__m128h __A, + __m128h __B) { + return (__m128h)((__v8hf)__A + (__v8hf)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_add_ph(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_add_ph(__A, __B), + (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_add_ph(__mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_add_ph(__A, __B), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_sub_ph(__m256h __A, + __m256h __B) { + return (__m256h)((__v16hf)__A - (__v16hf)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_sub_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_sub_ph(__A, __B), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_sub_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_sub_ph(__A, __B), (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sub_ph(__m128h __A, + __m128h __B) { + return (__m128h)((__v8hf)__A - (__v8hf)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sub_ph(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_sub_ph(__A, __B), + (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sub_ph(__mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_sub_ph(__A, __B), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mul_ph(__m256h __A, + __m256h __B) { + return (__m256h)((__v16hf)__A * (__v16hf)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_mul_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_mul_ph(__A, __B), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_mul_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_mul_ph(__A, __B), (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mul_ph(__m128h __A, + __m128h __B) { + return (__m128h)((__v8hf)__A * (__v8hf)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_mul_ph(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_mul_ph(__A, __B), + (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_mul_ph(__mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_mul_ph(__A, __B), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_div_ph(__m256h __A, + __m256h __B) { + return (__m256h)((__v16hf)__A / (__v16hf)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_div_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_div_ph(__A, __B), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_div_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + __U, (__v16hf)_mm256_div_ph(__A, __B), (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_div_ph(__m128h __A, + __m128h __B) { + return (__m128h)((__v8hf)__A / (__v8hf)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_div_ph(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_div_ph(__A, __B), + (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_ph(__mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128(__U, (__v8hf)_mm_div_ph(__A, __B), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_min_ph(__m256h __A, + __m256h __B) { + return (__m256h)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + (__v16hf)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B), + (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + (__v16hf)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_min_ph(__m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_min_ph(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B), + (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_min_ph(__mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_max_ph(__m256h __A, + __m256h __B) { + return (__m256h)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + (__v16hf)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B), + (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + (__v16hf)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_max_ph(__m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_max_ph(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B), + (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_max_ph(__mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_abs_ph(__m256h __A) { + return (__m256h)_mm256_and_epi32(_mm256_set1_epi32(0x7FFF7FFF), (__m256i)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_abs_ph(__m128h __A) { + return (__m128h)_mm_and_epi32(_mm_set1_epi32(0x7FFF7FFF), (__m128i)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_conj_pch(__m256h __A) { + return (__m256h)_mm256_xor_ps((__m256)__A, _mm256_set1_ps(-0.0f)); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_conj_pch(__m256h __W, __mmask8 __U, __m256h __A) { + return (__m256h)__builtin_ia32_selectps_256( + (__mmask8)__U, (__v8sf)_mm256_conj_pch(__A), (__v8sf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_conj_pch(__mmask8 __U, __m256h __A) { + return (__m256h)__builtin_ia32_selectps_256( + (__mmask8)__U, (__v8sf)_mm256_conj_pch(__A), (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_conj_pch(__m128h __A) { + return (__m128h)_mm_xor_ps((__m128)__A, _mm_set1_ps(-0.0f)); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_conj_pch(__m128h __W, + __mmask8 __U, + __m128h __A) { + return (__m128h)__builtin_ia32_selectps_128( + (__mmask8)__U, (__v4sf)_mm_conj_pch(__A), (__v4sf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_conj_pch(__mmask8 __U, __m128h __A) { + return (__m128h)__builtin_ia32_selectps_128( + (__mmask8)__U, (__v4sf)_mm_conj_pch(__A), (__v4sf)_mm_setzero_ps()); +} + +#define _mm256_cmp_ph_mask(a, b, p) \ + ((__mmask16)__builtin_ia32_cmpph256_mask( \ + (__v16hf)(__m256h)(a), (__v16hf)(__m256h)(b), (int)(p), (__mmask16)-1)) + +#define _mm256_mask_cmp_ph_mask(m, a, b, p) \ + ((__mmask16)__builtin_ia32_cmpph256_mask( \ + (__v16hf)(__m256h)(a), (__v16hf)(__m256h)(b), (int)(p), (__mmask16)(m))) + +#define _mm_cmp_ph_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpph128_mask( \ + (__v8hf)(__m128h)(a), (__v8hf)(__m128h)(b), (int)(p), (__mmask8)-1)) + +#define _mm_mask_cmp_ph_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpph128_mask( \ + (__v8hf)(__m128h)(a), (__v8hf)(__m128h)(b), (int)(p), (__mmask8)(m))) + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_rcp_ph(__m256h __A) { + return (__m256h)__builtin_ia32_rcpph256_mask( + (__v16hf)__A, (__v16hf)_mm256_undefined_ph(), (__mmask16)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_rcp_ph(__m256h __W, __mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_rcpph256_mask((__v16hf)__A, (__v16hf)__W, + (__mmask16)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_rcp_ph(__mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_rcpph256_mask( + (__v16hf)__A, (__v16hf)_mm256_setzero_ph(), (__mmask16)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_rcp_ph(__m128h __A) { + return (__m128h)__builtin_ia32_rcpph128_mask( + (__v8hf)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_rcp_ph(__m128h __W, + __mmask8 __U, + __m128h __A) { + return (__m128h)__builtin_ia32_rcpph128_mask((__v8hf)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_rcp_ph(__mmask8 __U, + __m128h __A) { + return (__m128h)__builtin_ia32_rcpph128_mask( + (__v8hf)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_rsqrt_ph(__m256h __A) { + return (__m256h)__builtin_ia32_rsqrtph256_mask( + (__v16hf)__A, (__v16hf)_mm256_undefined_ph(), (__mmask16)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_rsqrt_ph(__m256h __W, __mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_rsqrtph256_mask((__v16hf)__A, (__v16hf)__W, + (__mmask16)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_rsqrt_ph(__mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_rsqrtph256_mask( + (__v16hf)__A, (__v16hf)_mm256_setzero_ph(), (__mmask16)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_rsqrt_ph(__m128h __A) { + return (__m128h)__builtin_ia32_rsqrtph128_mask( + (__v8hf)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_rsqrt_ph(__m128h __W, + __mmask8 __U, + __m128h __A) { + return (__m128h)__builtin_ia32_rsqrtph128_mask((__v8hf)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_rsqrt_ph(__mmask8 __U, __m128h __A) { + return (__m128h)__builtin_ia32_rsqrtph128_mask( + (__v8hf)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_getexp_ph(__m128h __A) { + return (__m128h)__builtin_ia32_getexpph128_mask( + (__v8hf)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_getexp_ph(__m128h __W, __mmask8 __U, __m128h __A) { + return (__m128h)__builtin_ia32_getexpph128_mask((__v8hf)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_getexp_ph(__mmask8 __U, __m128h __A) { + return (__m128h)__builtin_ia32_getexpph128_mask( + (__v8hf)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_getexp_ph(__m256h __A) { + return (__m256h)__builtin_ia32_getexpph256_mask( + (__v16hf)__A, (__v16hf)_mm256_setzero_ph(), (__mmask16)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_getexp_ph(__m256h __W, __mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_getexpph256_mask((__v16hf)__A, (__v16hf)__W, + (__mmask16)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_getexp_ph(__mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_getexpph256_mask( + (__v16hf)__A, (__v16hf)_mm256_setzero_ph(), (__mmask16)__U); +} + +#define _mm_getmant_ph(A, B, C) \ + ((__m128h)__builtin_ia32_getmantph128_mask( \ + (__v8hf)(__m128h)(A), (int)(((C) << 2) | (B)), (__v8hf)_mm_setzero_ph(), \ + (__mmask8)-1)) + +#define _mm_mask_getmant_ph(W, U, A, B, C) \ + ((__m128h)__builtin_ia32_getmantph128_mask( \ + (__v8hf)(__m128h)(A), (int)(((C) << 2) | (B)), (__v8hf)(__m128h)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_getmant_ph(U, A, B, C) \ + ((__m128h)__builtin_ia32_getmantph128_mask( \ + (__v8hf)(__m128h)(A), (int)(((C) << 2) | (B)), (__v8hf)_mm_setzero_ph(), \ + (__mmask8)(U))) + +#define _mm256_getmant_ph(A, B, C) \ + ((__m256h)__builtin_ia32_getmantph256_mask( \ + (__v16hf)(__m256h)(A), (int)(((C) << 2) | (B)), \ + (__v16hf)_mm256_setzero_ph(), (__mmask16)-1)) + +#define _mm256_mask_getmant_ph(W, U, A, B, C) \ + ((__m256h)__builtin_ia32_getmantph256_mask( \ + (__v16hf)(__m256h)(A), (int)(((C) << 2) | (B)), (__v16hf)(__m256h)(W), \ + (__mmask16)(U))) + +#define _mm256_maskz_getmant_ph(U, A, B, C) \ + ((__m256h)__builtin_ia32_getmantph256_mask( \ + (__v16hf)(__m256h)(A), (int)(((C) << 2) | (B)), \ + (__v16hf)_mm256_setzero_ph(), (__mmask16)(U))) + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_scalef_ph(__m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_scalefph128_mask( + (__v8hf)__A, (__v8hf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_scalef_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { + return (__m128h)__builtin_ia32_scalefph128_mask((__v8hf)__A, (__v8hf)__B, + (__v8hf)__W, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_scalef_ph(__mmask8 __U, __m128h __A, __m128h __B) { + return (__m128h)__builtin_ia32_scalefph128_mask( + (__v8hf)__A, (__v8hf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_scalef_ph(__m256h __A, + __m256h __B) { + return (__m256h)__builtin_ia32_scalefph256_mask( + (__v16hf)__A, (__v16hf)__B, (__v16hf)_mm256_setzero_ph(), (__mmask16)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_scalef_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_scalefph256_mask((__v16hf)__A, (__v16hf)__B, + (__v16hf)__W, (__mmask16)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_scalef_ph(__mmask16 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_scalefph256_mask( + (__v16hf)__A, (__v16hf)__B, (__v16hf)_mm256_setzero_ph(), (__mmask16)__U); +} + +#define _mm_roundscale_ph(A, imm) \ + ((__m128h)__builtin_ia32_rndscaleph_128_mask( \ + (__v8hf)(__m128h)(A), (int)(imm), (__v8hf)_mm_setzero_ph(), \ + (__mmask8)-1)) + +#define _mm_mask_roundscale_ph(W, U, A, imm) \ + ((__m128h)__builtin_ia32_rndscaleph_128_mask( \ + (__v8hf)(__m128h)(A), (int)(imm), (__v8hf)(__m128h)(W), (__mmask8)(U))) + +#define _mm_maskz_roundscale_ph(U, A, imm) \ + ((__m128h)__builtin_ia32_rndscaleph_128_mask( \ + (__v8hf)(__m128h)(A), (int)(imm), (__v8hf)_mm_setzero_ph(), \ + (__mmask8)(U))) + +#define _mm256_roundscale_ph(A, imm) \ + ((__m256h)__builtin_ia32_rndscaleph_256_mask( \ + (__v16hf)(__m256h)(A), (int)(imm), (__v16hf)_mm256_setzero_ph(), \ + (__mmask16)-1)) + +#define _mm256_mask_roundscale_ph(W, U, A, imm) \ + ((__m256h)__builtin_ia32_rndscaleph_256_mask( \ + (__v16hf)(__m256h)(A), (int)(imm), (__v16hf)(__m256h)(W), \ + (__mmask16)(U))) + +#define _mm256_maskz_roundscale_ph(U, A, imm) \ + ((__m256h)__builtin_ia32_rndscaleph_256_mask( \ + (__v16hf)(__m256h)(A), (int)(imm), (__v16hf)_mm256_setzero_ph(), \ + (__mmask16)(U))) + +#define _mm_reduce_ph(A, imm) \ + ((__m128h)__builtin_ia32_reduceph128_mask((__v8hf)(__m128h)(A), (int)(imm), \ + (__v8hf)_mm_setzero_ph(), \ + (__mmask8)-1)) + +#define _mm_mask_reduce_ph(W, U, A, imm) \ + ((__m128h)__builtin_ia32_reduceph128_mask( \ + (__v8hf)(__m128h)(A), (int)(imm), (__v8hf)(__m128h)(W), (__mmask8)(U))) + +#define _mm_maskz_reduce_ph(U, A, imm) \ + ((__m128h)__builtin_ia32_reduceph128_mask((__v8hf)(__m128h)(A), (int)(imm), \ + (__v8hf)_mm_setzero_ph(), \ + (__mmask8)(U))) + +#define _mm256_reduce_ph(A, imm) \ + ((__m256h)__builtin_ia32_reduceph256_mask((__v16hf)(__m256h)(A), (int)(imm), \ + (__v16hf)_mm256_setzero_ph(), \ + (__mmask16)-1)) + +#define _mm256_mask_reduce_ph(W, U, A, imm) \ + ((__m256h)__builtin_ia32_reduceph256_mask((__v16hf)(__m256h)(A), (int)(imm), \ + (__v16hf)(__m256h)(W), \ + (__mmask16)(U))) + +#define _mm256_maskz_reduce_ph(U, A, imm) \ + ((__m256h)__builtin_ia32_reduceph256_mask((__v16hf)(__m256h)(A), (int)(imm), \ + (__v16hf)_mm256_setzero_ph(), \ + (__mmask16)(U))) + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sqrt_ph(__m128h __a) { + return __builtin_ia32_sqrtph((__v8hf)__a); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sqrt_ph(__m128h __W, + __mmask8 __U, + __m128h __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm_sqrt_ph(__A), (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_ph(__mmask8 __U, + __m128h __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm_sqrt_ph(__A), (__v8hf)_mm_setzero_ph()); +} + +static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_sqrt_ph(__m256h __a) { + return (__m256h)__builtin_ia32_sqrtph256((__v16hf)__a); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_sqrt_ph(__m256h __W, __mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, (__v16hf)_mm256_sqrt_ph(__A), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_sqrt_ph(__mmask16 __U, __m256h __A) { + return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, + (__v16hf)_mm256_sqrt_ph(__A), + (__v16hf)_mm256_setzero_ph()); +} + +#define _mm_mask_fpclass_ph_mask(U, A, imm) \ + ((__mmask8)__builtin_ia32_fpclassph128_mask((__v8hf)(__m128h)(A), \ + (int)(imm), (__mmask8)(U))) + +#define _mm_fpclass_ph_mask(A, imm) \ + ((__mmask8)__builtin_ia32_fpclassph128_mask((__v8hf)(__m128h)(A), \ + (int)(imm), (__mmask8)-1)) + +#define _mm256_mask_fpclass_ph_mask(U, A, imm) \ + ((__mmask16)__builtin_ia32_fpclassph256_mask((__v16hf)(__m256h)(A), \ + (int)(imm), (__mmask16)(U))) + +#define _mm256_fpclass_ph_mask(A, imm) \ + ((__mmask16)__builtin_ia32_fpclassph256_mask((__v16hf)(__m256h)(A), \ + (int)(imm), (__mmask16)-1)) + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtpd_ph(__m128d __A) { + return (__m128h)__builtin_ia32_vcvtpd2ph128_mask( + (__v2df)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_cvtpd_ph(__m128h __W, + __mmask8 __U, + __m128d __A) { + return (__m128h)__builtin_ia32_vcvtpd2ph128_mask((__v2df)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpd_ph(__mmask8 __U, __m128d __A) { + return (__m128h)__builtin_ia32_vcvtpd2ph128_mask( + (__v2df)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 _mm256_cvtpd_ph(__m256d __A) { + return (__m128h)__builtin_ia32_vcvtpd2ph256_mask( + (__v4df)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpd_ph(__m128h __W, __mmask8 __U, __m256d __A) { + return (__m128h)__builtin_ia32_vcvtpd2ph256_mask((__v4df)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpd_ph(__mmask8 __U, __m256d __A) { + return (__m128h)__builtin_ia32_vcvtpd2ph256_mask( + (__v4df)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_cvtph_pd(__m128h __A) { + return (__m128d)__builtin_ia32_vcvtph2pd128_mask( + (__v8hf)__A, (__v2df)_mm_undefined_pd(), (__mmask8)-1); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_cvtph_pd(__m128d __W, + __mmask8 __U, + __m128h __A) { + return (__m128d)__builtin_ia32_vcvtph2pd128_mask((__v8hf)__A, (__v2df)__W, + (__mmask8)__U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_pd(__mmask8 __U, __m128h __A) { + return (__m128d)__builtin_ia32_vcvtph2pd128_mask( + (__v8hf)__A, (__v2df)_mm_setzero_pd(), (__mmask8)__U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_cvtph_pd(__m128h __A) { + return (__m256d)__builtin_ia32_vcvtph2pd256_mask( + (__v8hf)__A, (__v4df)_mm256_undefined_pd(), (__mmask8)-1); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_pd(__m256d __W, __mmask8 __U, __m128h __A) { + return (__m256d)__builtin_ia32_vcvtph2pd256_mask((__v8hf)__A, (__v4df)__W, + (__mmask8)__U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_pd(__mmask8 __U, __m128h __A) { + return (__m256d)__builtin_ia32_vcvtph2pd256_mask( + (__v8hf)__A, (__v4df)_mm256_setzero_pd(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtph_epi16(__m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2w128_mask( + (__v8hf)__A, (__v8hi)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_epi16(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2w128_mask((__v8hf)__A, (__v8hi)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_epi16(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2w128_mask( + (__v8hf)__A, (__v8hi)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtph_epi16(__m256h __A) { + return (__m256i)__builtin_ia32_vcvtph2w256_mask( + (__v16hf)__A, (__v16hi)_mm256_undefined_si256(), (__mmask16)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_epi16(__m256i __W, __mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvtph2w256_mask((__v16hf)__A, (__v16hi)__W, + (__mmask16)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_epi16(__mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvtph2w256_mask( + (__v16hf)__A, (__v16hi)_mm256_setzero_si256(), (__mmask16)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttph_epi16(__m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2w128_mask( + (__v8hf)__A, (__v8hi)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttph_epi16(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2w128_mask((__v8hf)__A, (__v8hi)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttph_epi16(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2w128_mask( + (__v8hf)__A, (__v8hi)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttph_epi16(__m256h __A) { + return (__m256i)__builtin_ia32_vcvttph2w256_mask( + (__v16hf)__A, (__v16hi)_mm256_undefined_si256(), (__mmask16)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttph_epi16(__m256i __W, __mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvttph2w256_mask((__v16hf)__A, (__v16hi)__W, + (__mmask16)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttph_epi16(__mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvttph2w256_mask( + (__v16hf)__A, (__v16hi)_mm256_setzero_si256(), (__mmask16)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepi16_ph(__m128i __A) { + return (__m128h) __builtin_convertvector((__v8hi)__A, __v8hf); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi16_ph(__m128h __W, __mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi16_ph(__mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_cvtepi16_ph(__m256i __A) { + return (__m256h) __builtin_convertvector((__v16hi)__A, __v16hf); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi16_ph(__m256h __W, __mmask16 __U, __m256i __A) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, (__v16hf)_mm256_cvtepi16_ph(__A), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi16_ph(__mmask16 __U, __m256i __A) { + return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, + (__v16hf)_mm256_cvtepi16_ph(__A), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtph_epu16(__m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2uw128_mask( + (__v8hf)__A, (__v8hu)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_epu16(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2uw128_mask((__v8hf)__A, (__v8hu)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_epu16(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2uw128_mask( + (__v8hf)__A, (__v8hu)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtph_epu16(__m256h __A) { + return (__m256i)__builtin_ia32_vcvtph2uw256_mask( + (__v16hf)__A, (__v16hu)_mm256_undefined_si256(), (__mmask16)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_epu16(__m256i __W, __mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvtph2uw256_mask((__v16hf)__A, (__v16hu)__W, + (__mmask16)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_epu16(__mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvtph2uw256_mask( + (__v16hf)__A, (__v16hu)_mm256_setzero_si256(), (__mmask16)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttph_epu16(__m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2uw128_mask( + (__v8hf)__A, (__v8hu)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttph_epu16(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2uw128_mask((__v8hf)__A, (__v8hu)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttph_epu16(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2uw128_mask( + (__v8hf)__A, (__v8hu)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttph_epu16(__m256h __A) { + return (__m256i)__builtin_ia32_vcvttph2uw256_mask( + (__v16hf)__A, (__v16hu)_mm256_undefined_si256(), (__mmask16)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttph_epu16(__m256i __W, __mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvttph2uw256_mask((__v16hf)__A, (__v16hu)__W, + (__mmask16)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttph_epu16(__mmask16 __U, __m256h __A) { + return (__m256i)__builtin_ia32_vcvttph2uw256_mask( + (__v16hf)__A, (__v16hu)_mm256_setzero_si256(), (__mmask16)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepu16_ph(__m128i __A) { + return (__m128h) __builtin_convertvector((__v8hu)__A, __v8hf); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu16_ph(__m128h __W, __mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu16_ph(__mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_cvtepu16_ph(__m256i __A) { + return (__m256h) __builtin_convertvector((__v16hu)__A, __v16hf); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu16_ph(__m256h __W, __mmask16 __U, __m256i __A) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, (__v16hf)_mm256_cvtepu16_ph(__A), (__v16hf)__W); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu16_ph(__mmask16 __U, __m256i __A) { + return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, + (__v16hf)_mm256_cvtepu16_ph(__A), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtph_epi32(__m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2dq128_mask( + (__v8hf)__A, (__v4si)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_epi32(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2dq128_mask((__v8hf)__A, (__v4si)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_epi32(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2dq128_mask( + (__v8hf)__A, (__v4si)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtph_epi32(__m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2dq256_mask( + (__v8hf)__A, (__v8si)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_epi32(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2dq256_mask((__v8hf)__A, (__v8si)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_epi32(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2dq256_mask( + (__v8hf)__A, (__v8si)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtph_epu32(__m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2udq128_mask( + (__v8hf)__A, (__v4su)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_epu32(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2udq128_mask((__v8hf)__A, (__v4su)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_epu32(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2udq128_mask( + (__v8hf)__A, (__v4su)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtph_epu32(__m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2udq256_mask( + (__v8hf)__A, (__v8su)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_epu32(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2udq256_mask((__v8hf)__A, (__v8su)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_epu32(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2udq256_mask( + (__v8hf)__A, (__v8su)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepi32_ph(__m128i __A) { + return (__m128h)__builtin_ia32_vcvtdq2ph128_mask( + (__v4si)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_ph(__m128h __W, __mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtdq2ph128_mask((__v4si)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi32_ph(__mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtdq2ph128_mask( + (__v4si)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_cvtepi32_ph(__m256i __A) { + return (__m128h) __builtin_convertvector((__v8si)__A, __v8hf); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_ph(__m128h __W, __mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi32_ph(__mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepu32_ph(__m128i __A) { + return (__m128h)__builtin_ia32_vcvtudq2ph128_mask( + (__v4su)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu32_ph(__m128h __W, __mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtudq2ph128_mask((__v4su)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu32_ph(__mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtudq2ph128_mask( + (__v4su)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_cvtepu32_ph(__m256i __A) { + return (__m128h) __builtin_convertvector((__v8su)__A, __v8hf); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu32_ph(__m128h __W, __mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)__W); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu32_ph(__mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttph_epi32(__m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2dq128_mask( + (__v8hf)__A, (__v4si)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttph_epi32(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2dq128_mask((__v8hf)__A, (__v4si)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttph_epi32(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2dq128_mask( + (__v8hf)__A, (__v4si)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttph_epi32(__m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2dq256_mask( + (__v8hf)__A, (__v8si)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttph_epi32(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2dq256_mask((__v8hf)__A, (__v8si)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttph_epi32(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2dq256_mask( + (__v8hf)__A, (__v8si)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttph_epu32(__m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2udq128_mask( + (__v8hf)__A, (__v4su)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttph_epu32(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2udq128_mask((__v8hf)__A, (__v4su)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttph_epu32(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2udq128_mask( + (__v8hf)__A, (__v4su)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttph_epu32(__m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2udq256_mask( + (__v8hf)__A, (__v8su)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttph_epu32(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2udq256_mask((__v8hf)__A, (__v8su)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttph_epu32(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2udq256_mask( + (__v8hf)__A, (__v8su)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepi64_ph(__m128i __A) { + return (__m128h)__builtin_ia32_vcvtqq2ph128_mask( + (__v2di)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_ph(__m128h __W, __mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtqq2ph128_mask((__v2di)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi64_ph(__mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtqq2ph128_mask( + (__v2di)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_cvtepi64_ph(__m256i __A) { + return (__m128h)__builtin_ia32_vcvtqq2ph256_mask( + (__v4di)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_ph(__m128h __W, __mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_vcvtqq2ph256_mask((__v4di)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi64_ph(__mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_vcvtqq2ph256_mask( + (__v4di)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtph_epi64(__m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2qq128_mask( + (__v8hf)__A, (__v2di)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_epi64(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2qq128_mask((__v8hf)__A, (__v2di)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_epi64(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2qq128_mask( + (__v8hf)__A, (__v2di)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtph_epi64(__m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2qq256_mask( + (__v8hf)__A, (__v4di)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_epi64(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2qq256_mask((__v8hf)__A, (__v4di)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_epi64(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2qq256_mask( + (__v8hf)__A, (__v4di)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepu64_ph(__m128i __A) { + return (__m128h)__builtin_ia32_vcvtuqq2ph128_mask( + (__v2du)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu64_ph(__m128h __W, __mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtuqq2ph128_mask((__v2du)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu64_ph(__mmask8 __U, __m128i __A) { + return (__m128h)__builtin_ia32_vcvtuqq2ph128_mask( + (__v2du)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_cvtepu64_ph(__m256i __A) { + return (__m128h)__builtin_ia32_vcvtuqq2ph256_mask( + (__v4du)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu64_ph(__m128h __W, __mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_vcvtuqq2ph256_mask((__v4du)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu64_ph(__mmask8 __U, __m256i __A) { + return (__m128h)__builtin_ia32_vcvtuqq2ph256_mask( + (__v4du)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtph_epu64(__m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2uqq128_mask( + (__v8hf)__A, (__v2du)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_epu64(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2uqq128_mask((__v8hf)__A, (__v2du)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_epu64(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvtph2uqq128_mask( + (__v8hf)__A, (__v2du)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtph_epu64(__m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2uqq256_mask( + (__v8hf)__A, (__v4du)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_epu64(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2uqq256_mask((__v8hf)__A, (__v4du)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_epu64(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvtph2uqq256_mask( + (__v8hf)__A, (__v4du)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttph_epi64(__m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2qq128_mask( + (__v8hf)__A, (__v2di)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttph_epi64(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2qq128_mask((__v8hf)__A, (__v2di)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttph_epi64(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2qq128_mask( + (__v8hf)__A, (__v2di)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttph_epi64(__m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2qq256_mask( + (__v8hf)__A, (__v4di)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttph_epi64(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2qq256_mask((__v8hf)__A, (__v4di)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttph_epi64(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2qq256_mask( + (__v8hf)__A, (__v4di)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvttph_epu64(__m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2uqq128_mask( + (__v8hf)__A, (__v2du)_mm_undefined_si128(), (__mmask8)-1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttph_epu64(__m128i __W, __mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2uqq128_mask((__v8hf)__A, (__v2du)__W, + (__mmask8)__U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttph_epu64(__mmask8 __U, __m128h __A) { + return (__m128i)__builtin_ia32_vcvttph2uqq128_mask( + (__v8hf)__A, (__v2du)_mm_setzero_si128(), (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttph_epu64(__m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2uqq256_mask( + (__v8hf)__A, (__v4du)_mm256_undefined_si256(), (__mmask8)-1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttph_epu64(__m256i __W, __mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2uqq256_mask((__v8hf)__A, (__v4du)__W, + (__mmask8)__U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttph_epu64(__mmask8 __U, __m128h __A) { + return (__m256i)__builtin_ia32_vcvttph2uqq256_mask( + (__v8hf)__A, (__v4du)_mm256_setzero_si256(), (__mmask8)__U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtxph_ps(__m128h __A) { + return (__m128)__builtin_ia32_vcvtph2psx128_mask( + (__v8hf)__A, (__v4sf)_mm_undefined_ps(), (__mmask8)-1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_cvtxph_ps(__m128 __W, + __mmask8 __U, + __m128h __A) { + return (__m128)__builtin_ia32_vcvtph2psx128_mask((__v8hf)__A, (__v4sf)__W, + (__mmask8)__U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtxph_ps(__mmask8 __U, __m128h __A) { + return (__m128)__builtin_ia32_vcvtph2psx128_mask( + (__v8hf)__A, (__v4sf)_mm_setzero_ps(), (__mmask8)__U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtxph_ps(__m128h __A) { + return (__m256)__builtin_ia32_vcvtph2psx256_mask( + (__v8hf)__A, (__v8sf)_mm256_undefined_ps(), (__mmask8)-1); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtxph_ps(__m256 __W, __mmask8 __U, __m128h __A) { + return (__m256)__builtin_ia32_vcvtph2psx256_mask((__v8hf)__A, (__v8sf)__W, + (__mmask8)__U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtxph_ps(__mmask8 __U, __m128h __A) { + return (__m256)__builtin_ia32_vcvtph2psx256_mask( + (__v8hf)__A, (__v8sf)_mm256_setzero_ps(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtxps_ph(__m128 __A) { + return (__m128h)__builtin_ia32_vcvtps2phx128_mask( + (__v4sf)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_cvtxps_ph(__m128h __W, + __mmask8 __U, + __m128 __A) { + return (__m128h)__builtin_ia32_vcvtps2phx128_mask((__v4sf)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtxps_ph(__mmask8 __U, __m128 __A) { + return (__m128h)__builtin_ia32_vcvtps2phx128_mask( + (__v4sf)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 _mm256_cvtxps_ph(__m256 __A) { + return (__m128h)__builtin_ia32_vcvtps2phx256_mask( + (__v8sf)__A, (__v8hf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtxps_ph(__m128h __W, __mmask8 __U, __m256 __A) { + return (__m128h)__builtin_ia32_vcvtps2phx256_mask((__v8sf)__A, (__v8hf)__W, + (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtxps_ph(__mmask8 __U, __m256 __A) { + return (__m128h)__builtin_ia32_vcvtps2phx256_mask( + (__v8sf)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmadd_ph(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, + (__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A, + __mmask8 __U, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmsub_ph(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, + -(__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_ph(__m128h __A, + __mmask8 __U, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, _mm_fmsub_ph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fmsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, _mm_fmsub_ph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fnmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fnmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fnmsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmadd_ph(__m256h __A, + __m256h __B, + __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, + (__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmsub_ph(__m256h __A, + __m256h __B, + __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, + -(__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fnmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fnmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fnmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmaddsub_ph(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, + (__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fmaddsub_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fmaddsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fmaddsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmsubadd_ph(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, + -(__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fmsubadd_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + (__v8hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fmsubadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + (__v8hf)_mm_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_fmaddsub_ph(__m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, + (__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fmaddsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmaddsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmaddsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_fmsubadd_ph(__m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, + -(__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fmsubadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmsubadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)_mm256_setzero_ph()); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + (__v8hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fmsubadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddsubph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + (__v8hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmsubadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddsubph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + (__v16hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmadd_ph(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, + (__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fnmadd_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C), + (__v8hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmadd_ph(__m256h __A, + __m256h __B, + __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, + (__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fnmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C), + (__v16hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmsub_ph(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, + -(__v8hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fnmsub_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), + (__v8hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fnmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_selectph_128( + (__mmask8)__U, + __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), + (__v8hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmsub_ph(__m256h __A, + __m256h __B, + __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, + -(__v16hf)__C); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fnmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), + (__v16hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fnmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { + return (__m256h)__builtin_ia32_selectph_256( + (__mmask16)__U, + __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), + (__v16hf)__C); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fcmul_pch(__m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_vfcmulcph128_mask( + (__v4sf)__A, (__v4sf)__B, (__v4sf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fcmul_pch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { + return (__m128h)__builtin_ia32_vfcmulcph128_mask((__v4sf)__A, (__v4sf)__B, + (__v4sf)__W, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fcmul_pch(__mmask8 __U, __m128h __A, __m128h __B) { + return (__m128h)__builtin_ia32_vfcmulcph128_mask( + (__v4sf)__A, (__v4sf)__B, (__v4sf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS128 _mm256_fcmul_pch(__m256h __A, + __m256h __B) { + return (__m256h)__builtin_ia32_vfcmulcph256_mask( + (__v8sf)__A, (__v8sf)__B, (__v8sf)_mm256_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fcmul_pch(__m256h __W, __mmask8 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_vfcmulcph256_mask((__v8sf)__A, (__v8sf)__B, + (__v8sf)__W, (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fcmul_pch(__mmask8 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_vfcmulcph256_mask( + (__v8sf)__A, (__v8sf)__B, (__v8sf)_mm256_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fcmadd_pch(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfcmaddcph128_mask((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C, (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fcmadd_pch(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectps_128( + __U, + __builtin_ia32_vfcmaddcph128_mask((__v4sf)__A, (__v4sf)(__m128h)__B, + (__v4sf)__C, (__mmask8)__U), + (__v4sf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fcmadd_pch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_vfcmaddcph128_mask((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fcmadd_pch(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_vfcmaddcph128_maskz( + (__v4sf)__A, (__v4sf)__B, (__v4sf)__C, (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fcmadd_pch(__m256h __A, + __m256h __B, + __m256h __C) { + return (__m256h)__builtin_ia32_vfcmaddcph256_mask((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C, (__mmask8)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fcmadd_pch(__m256h __A, __mmask8 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectps_256( + __U, + __builtin_ia32_vfcmaddcph256_mask((__v8sf)__A, (__v8sf)__B, (__v8sf)__C, + (__mmask8)__U), + (__v8sf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fcmadd_pch(__m256h __A, __m256h __B, __m256h __C, __mmask8 __U) { + return (__m256h)__builtin_ia32_vfcmaddcph256_mask((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C, (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fcmadd_pch(__mmask8 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_vfcmaddcph256_maskz( + (__v8sf)__A, (__v8sf)__B, (__v8sf)__C, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmul_pch(__m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_vfmulcph128_mask( + (__v4sf)__A, (__v4sf)__B, (__v4sf)_mm_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmul_pch(__m128h __W, + __mmask8 __U, + __m128h __A, + __m128h __B) { + return (__m128h)__builtin_ia32_vfmulcph128_mask((__v4sf)__A, (__v4sf)__B, + (__v4sf)__W, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fmul_pch(__mmask8 __U, __m128h __A, __m128h __B) { + return (__m128h)__builtin_ia32_vfmulcph128_mask( + (__v4sf)__A, (__v4sf)__B, (__v4sf)_mm_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmul_pch(__m256h __A, + __m256h __B) { + return (__m256h)__builtin_ia32_vfmulcph256_mask( + (__v8sf)__A, (__v8sf)__B, (__v8sf)_mm256_undefined_ph(), (__mmask8)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fmul_pch(__m256h __W, __mmask8 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_vfmulcph256_mask((__v8sf)__A, (__v8sf)__B, + (__v8sf)__W, (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmul_pch(__mmask8 __U, __m256h __A, __m256h __B) { + return (__m256h)__builtin_ia32_vfmulcph256_mask( + (__v8sf)__A, (__v8sf)__B, (__v8sf)_mm256_setzero_ph(), (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmadd_pch(__m128h __A, + __m128h __B, + __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddcph128_mask((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C, (__mmask8)-1); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask_fmadd_pch(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_selectps_128( + __U, + __builtin_ia32_vfmaddcph128_mask((__v4sf)__A, (__v4sf)__B, (__v4sf)__C, + (__mmask8)__U), + (__v4sf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_mask3_fmadd_pch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { + return (__m128h)__builtin_ia32_vfmaddcph128_mask((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_maskz_fmadd_pch(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { + return (__m128h)__builtin_ia32_vfmaddcph128_maskz((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C, (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmadd_pch(__m256h __A, + __m256h __B, + __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddcph256_mask((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C, (__mmask8)-1); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_fmadd_pch(__m256h __A, __mmask8 __U, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_selectps_256( + __U, + __builtin_ia32_vfmaddcph256_mask((__v8sf)__A, (__v8sf)__B, (__v8sf)__C, + (__mmask8)__U), + (__v8sf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmadd_pch(__m256h __A, __m256h __B, __m256h __C, __mmask8 __U) { + return (__m256h)__builtin_ia32_vfmaddcph256_mask((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C, (__mmask8)__U); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmadd_pch(__mmask8 __U, __m256h __A, __m256h __B, __m256h __C) { + return (__m256h)__builtin_ia32_vfmaddcph256_maskz((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C, (__mmask8)__U); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_blend_ph(__mmask8 __U, + __m128h __A, + __m128h __W) { + return (__m128h)__builtin_ia32_selectph_128((__mmask8)__U, (__v8hf)__W, + (__v8hf)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_ph(__mmask16 __U, __m256h __A, __m256h __W) { + return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, (__v16hf)__W, + (__v16hf)__A); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_permutex2var_ph(__m128h __A, __m128i __I, __m128h __B) { + return (__m128h)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I, + (__v8hi)__B); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_permutex2var_ph(__m256h __A, __m256i __I, __m256h __B) { + return (__m256h)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I, + (__v16hi)__B); +} + +static __inline__ __m128h __DEFAULT_FN_ATTRS128 +_mm_permutexvar_ph(__m128i __A, __m128h __B) { + return (__m128h)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A); +} + +static __inline__ __m256h __DEFAULT_FN_ATTRS256 +_mm256_permutexvar_ph(__m256i __A, __m256h __B) { + return (__m256h)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS256 +_mm256_reduce_add_ph(__m256h __W) { + return __builtin_ia32_reduce_fadd_ph256(-0.0f16, __W); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS256 +_mm256_reduce_mul_ph(__m256h __W) { + return __builtin_ia32_reduce_fmul_ph256(1.0f16, __W); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS256 +_mm256_reduce_max_ph(__m256h __V) { + return __builtin_ia32_reduce_fmax_ph256(__V); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS256 +_mm256_reduce_min_ph(__m256h __V) { + return __builtin_ia32_reduce_fmin_ph256(__V); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS128 +_mm_reduce_add_ph(__m128h __W) { + return __builtin_ia32_reduce_fadd_ph128(-0.0f16, __W); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS128 +_mm_reduce_mul_ph(__m128h __W) { + return __builtin_ia32_reduce_fmul_ph128(1.0f16, __W); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS128 +_mm_reduce_max_ph(__m128h __V) { + return __builtin_ia32_reduce_fmax_ph128(__V); +} + +static __inline__ _Float16 __DEFAULT_FN_ATTRS128 +_mm_reduce_min_ph(__m128h __V) { + return __builtin_ia32_reduce_fmin_ph128(__V); +} + +// intrinsics below are alias for f*mul_*ch +#define _mm_mul_pch(A, B) _mm_fmul_pch(A, B) +#define _mm_mask_mul_pch(W, U, A, B) _mm_mask_fmul_pch(W, U, A, B) +#define _mm_maskz_mul_pch(U, A, B) _mm_maskz_fmul_pch(U, A, B) +#define _mm256_mul_pch(A, B) _mm256_fmul_pch(A, B) +#define _mm256_mask_mul_pch(W, U, A, B) _mm256_mask_fmul_pch(W, U, A, B) +#define _mm256_maskz_mul_pch(U, A, B) _mm256_maskz_fmul_pch(U, A, B) + +#define _mm_cmul_pch(A, B) _mm_fcmul_pch(A, B) +#define _mm_mask_cmul_pch(W, U, A, B) _mm_mask_fcmul_pch(W, U, A, B) +#define _mm_maskz_cmul_pch(U, A, B) _mm_maskz_fcmul_pch(U, A, B) +#define _mm256_cmul_pch(A, B) _mm256_fcmul_pch(A, B) +#define _mm256_mask_cmul_pch(W, U, A, B) _mm256_mask_fcmul_pch(W, U, A, B) +#define _mm256_maskz_cmul_pch(U, A, B) _mm256_maskz_fcmul_pch(U, A, B) + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif +#endif diff --git a/llvm/lib/clang/19/include/avx512vlintrin.h b/llvm/lib/clang/19/include/avx512vlintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..2a5f7b43f63fcb5638a5585935eac9389ef8496e --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlintrin.h @@ -0,0 +1,8437 @@ +/*===---- avx512vlintrin.h - AVX512VL intrinsics ---------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLINTRIN_H +#define __AVX512VLINTRIN_H + +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,no-evex512"), \ + __min_vector_width__(256))) + +typedef short __v2hi __attribute__((__vector_size__(4))); +typedef char __v4qi __attribute__((__vector_size__(4))); +typedef char __v2qi __attribute__((__vector_size__(2))); + +/* Integer compare */ + +#define _mm_cmpeq_epi32_mask(A, B) \ + _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epi32_mask(k, A, B) \ + _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epi32_mask(A, B) \ + _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epi32_mask(k, A, B) \ + _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epi32_mask(A, B) \ + _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epi32_mask(k, A, B) \ + _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epi32_mask(A, B) \ + _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epi32_mask(k, A, B) \ + _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epi32_mask(A, B) \ + _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epi32_mask(k, A, B) \ + _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epi32_mask(A, B) \ + _mm_cmp_epi32_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epi32_mask(k, A, B) \ + _mm_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epi32_mask(A, B) \ + _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epi32_mask(k, A, B) \ + _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epi32_mask(A, B) \ + _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epi32_mask(k, A, B) \ + _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epi32_mask(A, B) \ + _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epi32_mask(k, A, B) \ + _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epi32_mask(A, B) \ + _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epi32_mask(k, A, B) \ + _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epi32_mask(A, B) \ + _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epi32_mask(k, A, B) \ + _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epi32_mask(A, B) \ + _mm256_cmp_epi32_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epi32_mask(k, A, B) \ + _mm256_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm_cmpeq_epu32_mask(A, B) \ + _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epu32_mask(k, A, B) \ + _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epu32_mask(A, B) \ + _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epu32_mask(k, A, B) \ + _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epu32_mask(A, B) \ + _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epu32_mask(k, A, B) \ + _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epu32_mask(A, B) \ + _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epu32_mask(k, A, B) \ + _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epu32_mask(A, B) \ + _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epu32_mask(k, A, B) \ + _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epu32_mask(A, B) \ + _mm_cmp_epu32_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epu32_mask(k, A, B) \ + _mm_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epu32_mask(A, B) \ + _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epu32_mask(k, A, B) \ + _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epu32_mask(A, B) \ + _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epu32_mask(k, A, B) \ + _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epu32_mask(A, B) \ + _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epu32_mask(k, A, B) \ + _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epu32_mask(A, B) \ + _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epu32_mask(k, A, B) \ + _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epu32_mask(A, B) \ + _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epu32_mask(k, A, B) \ + _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epu32_mask(A, B) \ + _mm256_cmp_epu32_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epu32_mask(k, A, B) \ + _mm256_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm_cmpeq_epi64_mask(A, B) \ + _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epi64_mask(k, A, B) \ + _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epi64_mask(A, B) \ + _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epi64_mask(k, A, B) \ + _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epi64_mask(A, B) \ + _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epi64_mask(k, A, B) \ + _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epi64_mask(A, B) \ + _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epi64_mask(k, A, B) \ + _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epi64_mask(A, B) \ + _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epi64_mask(k, A, B) \ + _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epi64_mask(A, B) \ + _mm_cmp_epi64_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epi64_mask(k, A, B) \ + _mm_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epi64_mask(A, B) \ + _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epi64_mask(k, A, B) \ + _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epi64_mask(A, B) \ + _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epi64_mask(k, A, B) \ + _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epi64_mask(A, B) \ + _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epi64_mask(k, A, B) \ + _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epi64_mask(A, B) \ + _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epi64_mask(k, A, B) \ + _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epi64_mask(A, B) \ + _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epi64_mask(k, A, B) \ + _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epi64_mask(A, B) \ + _mm256_cmp_epi64_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epi64_mask(k, A, B) \ + _mm256_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm_cmpeq_epu64_mask(A, B) \ + _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_EQ) +#define _mm_mask_cmpeq_epu64_mask(k, A, B) \ + _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm_cmpge_epu64_mask(A, B) \ + _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_GE) +#define _mm_mask_cmpge_epu64_mask(k, A, B) \ + _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm_cmpgt_epu64_mask(A, B) \ + _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_GT) +#define _mm_mask_cmpgt_epu64_mask(k, A, B) \ + _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm_cmple_epu64_mask(A, B) \ + _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_LE) +#define _mm_mask_cmple_epu64_mask(k, A, B) \ + _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm_cmplt_epu64_mask(A, B) \ + _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_LT) +#define _mm_mask_cmplt_epu64_mask(k, A, B) \ + _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm_cmpneq_epu64_mask(A, B) \ + _mm_cmp_epu64_mask((A), (B), _MM_CMPINT_NE) +#define _mm_mask_cmpneq_epu64_mask(k, A, B) \ + _mm_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE) + +#define _mm256_cmpeq_epu64_mask(A, B) \ + _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_EQ) +#define _mm256_mask_cmpeq_epu64_mask(k, A, B) \ + _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_EQ) +#define _mm256_cmpge_epu64_mask(A, B) \ + _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_GE) +#define _mm256_mask_cmpge_epu64_mask(k, A, B) \ + _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GE) +#define _mm256_cmpgt_epu64_mask(A, B) \ + _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_GT) +#define _mm256_mask_cmpgt_epu64_mask(k, A, B) \ + _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GT) +#define _mm256_cmple_epu64_mask(A, B) \ + _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_LE) +#define _mm256_mask_cmple_epu64_mask(k, A, B) \ + _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LE) +#define _mm256_cmplt_epu64_mask(A, B) \ + _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_LT) +#define _mm256_mask_cmplt_epu64_mask(k, A, B) \ + _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LT) +#define _mm256_cmpneq_epu64_mask(A, B) \ + _mm256_cmp_epu64_mask((A), (B), _MM_CMPINT_NE) +#define _mm256_mask_cmpneq_epu64_mask(k, A, B) \ + _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_add_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_add_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_add_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_add_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sub_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sub_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_sub_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_sub_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_add_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_add_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_add_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_add_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sub_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sub_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_sub_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_sub_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_mul_epi32(__X, __Y), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_mul_epi32(__X, __Y), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_mul_epi32(__X, __Y), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_mul_epi32(__X, __Y), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_mul_epu32(__X, __Y), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_mul_epu32(__X, __Y), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_mul_epu32(__X, __Y), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_mul_epu32(__X, __Y), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_mullo_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_mullo_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mullo_epi32(__mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_mullo_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mullo_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_mullo_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_and_epi32(__m256i __a, __m256i __b) +{ + return (__m256i)((__v8su)__a & (__v8su)__b); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_and_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_and_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_and_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_and_epi32(_mm256_setzero_si256(), __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_and_epi32(__m128i __a, __m128i __b) +{ + return (__m128i)((__v4su)__a & (__v4su)__b); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_and_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_and_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_and_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_and_epi32(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_andnot_epi32(__m256i __A, __m256i __B) +{ + return (__m256i)(~(__v8su)__A & (__v8su)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_andnot_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_andnot_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_andnot_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_andnot_epi32(_mm256_setzero_si256(), + __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_andnot_epi32(__m128i __A, __m128i __B) +{ + return (__m128i)(~(__v4su)__A & (__v4su)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_andnot_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_andnot_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_andnot_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_andnot_epi32(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_or_epi32(__m256i __a, __m256i __b) +{ + return (__m256i)((__v8su)__a | (__v8su)__b); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_or_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_or_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_or_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_or_epi32(_mm256_setzero_si256(), __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_or_epi32(__m128i __a, __m128i __b) +{ + return (__m128i)((__v4su)__a | (__v4su)__b); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_or_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_or_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_or_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_or_epi32(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_xor_epi32(__m256i __a, __m256i __b) +{ + return (__m256i)((__v8su)__a ^ (__v8su)__b); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_xor_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_xor_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_xor_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_xor_epi32(_mm256_setzero_si256(), __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_xor_epi32(__m128i __a, __m128i __b) +{ + return (__m128i)((__v4su)__a ^ (__v4su)__b); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_xor_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_xor_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_xor_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_xor_epi32(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_and_epi64(__m256i __a, __m256i __b) +{ + return (__m256i)((__v4du)__a & (__v4du)__b); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_and_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_and_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_and_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_and_epi64(_mm256_setzero_si256(), __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_and_epi64(__m128i __a, __m128i __b) +{ + return (__m128i)((__v2du)__a & (__v2du)__b); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_and_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_and_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_and_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_and_epi64(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_andnot_epi64(__m256i __A, __m256i __B) +{ + return (__m256i)(~(__v4du)__A & (__v4du)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_andnot_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_andnot_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_andnot_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_andnot_epi64(_mm256_setzero_si256(), + __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_andnot_epi64(__m128i __A, __m128i __B) +{ + return (__m128i)(~(__v2du)__A & (__v2du)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_andnot_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_andnot_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_andnot_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_andnot_epi64(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_or_epi64(__m256i __a, __m256i __b) +{ + return (__m256i)((__v4du)__a | (__v4du)__b); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_or_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_or_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_or_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_or_epi64(_mm256_setzero_si256(), __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_or_epi64(__m128i __a, __m128i __b) +{ + return (__m128i)((__v2du)__a | (__v2du)__b); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_or_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_or_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_or_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_or_epi64(_mm_setzero_si128(), __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_xor_epi64(__m256i __a, __m256i __b) +{ + return (__m256i)((__v4du)__a ^ (__v4du)__b); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_xor_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_xor_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_xor_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)_mm256_mask_xor_epi64(_mm256_setzero_si256(), __U, __A, __B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_xor_epi64(__m128i __a, __m128i __b) +{ + return (__m128i)((__v2du)__a ^ (__v2du)__b); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_xor_epi64(__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_xor_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)_mm_mask_xor_epi64(_mm_setzero_si128(), __U, __A, __B); +} + +#define _mm_cmp_epi32_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \ + (__v4si)(__m128i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_epi32_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \ + (__v4si)(__m128i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm_cmp_epu32_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \ + (__v4si)(__m128i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_epu32_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \ + (__v4si)(__m128i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_epi32_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \ + (__v8si)(__m256i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm256_mask_cmp_epi32_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpd256_mask((__v8si)(__m256i)(a), \ + (__v8si)(__m256i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_epu32_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \ + (__v8si)(__m256i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm256_mask_cmp_epu32_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpd256_mask((__v8si)(__m256i)(a), \ + (__v8si)(__m256i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm_cmp_epi64_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \ + (__v2di)(__m128i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_epi64_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpq128_mask((__v2di)(__m128i)(a), \ + (__v2di)(__m128i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm_cmp_epu64_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \ + (__v2di)(__m128i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_epu64_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpq128_mask((__v2di)(__m128i)(a), \ + (__v2di)(__m128i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_epi64_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \ + (__v4di)(__m256i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm256_mask_cmp_epi64_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpq256_mask((__v4di)(__m256i)(a), \ + (__v4di)(__m256i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_epu64_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \ + (__v4di)(__m256i)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm256_mask_cmp_epu64_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_ucmpq256_mask((__v4di)(__m256i)(a), \ + (__v4di)(__m256i)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_ps_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \ + (__v8sf)(__m256)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm256_mask_cmp_ps_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpps256_mask((__v8sf)(__m256)(a), \ + (__v8sf)(__m256)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm256_cmp_pd_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256d)(a), \ + (__v4df)(__m256d)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm256_mask_cmp_pd_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmppd256_mask((__v4df)(__m256d)(a), \ + (__v4df)(__m256d)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm_cmp_ps_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \ + (__v4sf)(__m128)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_ps_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \ + (__v4sf)(__m128)(b), (int)(p), \ + (__mmask8)(m))) + +#define _mm_cmp_pd_mask(a, b, p) \ + ((__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128d)(a), \ + (__v2df)(__m128d)(b), (int)(p), \ + (__mmask8)-1)) + +#define _mm_mask_cmp_pd_mask(m, a, b, p) \ + ((__mmask8)__builtin_ia32_cmppd128_mask((__v2df)(__m128d)(a), \ + (__v2df)(__m128d)(b), (int)(p), \ + (__mmask8)(m))) + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df) __C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd (-(__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df) __C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd (-(__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd (-(__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df) __C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 (-(__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df) __C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 (-(__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 (-(__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf) __C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps (-(__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf) __C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps (-(__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps (-(__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf) __C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 (-(__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf) __C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 (-(__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 (-(__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddsubpd ((__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddsubpd ((__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df) __C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddsubpd ((__v2df) __A, + (__v2df) __B, + (__v2df) __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddsubpd ((__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddsubpd ((__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddsubpd256 ((__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddsubpd256 ((__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df) __C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddsubpd256 ((__v4df) __A, + (__v4df) __B, + (__v4df) __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddsubpd256 ((__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddsubpd256 ((__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddsubps ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddsubps ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf) __C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddsubps ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddsubps ((__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddsubps ((__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, + __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddsubps256 ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddsubps256 ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf) __C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddsubps256 ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddsubps256 ((__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddsubps256 ((__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df) __C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df) __C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf) __C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf) __C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddsubpd ((__v2df) __A, + (__v2df) __B, + -(__v2df) __C), + (__v2df) __C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddsubpd256 ((__v4df) __A, + (__v4df) __B, + -(__v4df) __C), + (__v4df) __C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddsubps ((__v4sf) __A, + (__v4sf) __B, + -(__v4sf) __C), + (__v4sf) __C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddsubps256 ((__v8sf) __A, + (__v8sf) __B, + -(__v8sf) __C), + (__v8sf) __C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + -(__v2df) __B, + (__v2df) __C), + (__v2df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + -(__v4df) __B, + (__v4df) __C), + (__v4df) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + -(__v4sf) __B, + (__v4sf) __C), + (__v4sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + -(__v8sf) __B, + (__v8sf) __C), + (__v8sf) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + -(__v2df) __B, + -(__v2df) __C), + (__v2df) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) +{ + return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, + __builtin_ia32_vfmaddpd ((__v2df) __A, + -(__v2df) __B, + -(__v2df) __C), + (__v2df) __C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + -(__v4df) __B, + -(__v4df) __C), + (__v4df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) +{ + return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, + __builtin_ia32_vfmaddpd256 ((__v4df) __A, + -(__v4df) __B, + -(__v4df) __C), + (__v4df) __C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + -(__v4sf) __B, + -(__v4sf) __C), + (__v4sf) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) +{ + return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, + __builtin_ia32_vfmaddps ((__v4sf) __A, + -(__v4sf) __B, + -(__v4sf) __C), + (__v4sf) __C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + -(__v8sf) __B, + -(__v8sf) __C), + (__v8sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) +{ + return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, + __builtin_ia32_vfmaddps256 ((__v8sf) __A, + -(__v8sf) __B, + -(__v8sf) __C), + (__v8sf) __C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_add_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_add_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_add_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_add_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_add_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_add_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_add_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_add_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_blend_epi32 (__mmask8 __U, __m128i __A, __m128i __W) { + return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U, + (__v4si) __W, + (__v4si) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_epi32 (__mmask8 __U, __m256i __A, __m256i __W) { + return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U, + (__v8si) __W, + (__v8si) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_blend_pd (__mmask8 __U, __m128d __A, __m128d __W) { + return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U, + (__v2df) __W, + (__v2df) __A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_pd (__mmask8 __U, __m256d __A, __m256d __W) { + return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U, + (__v4df) __W, + (__v4df) __A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_blend_ps (__mmask8 __U, __m128 __A, __m128 __W) { + return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U, + (__v4sf) __W, + (__v4sf) __A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_ps (__mmask8 __U, __m256 __A, __m256 __W) { + return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U, + (__v8sf) __W, + (__v8sf) __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_blend_epi64 (__mmask8 __U, __m128i __A, __m128i __W) { + return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U, + (__v2di) __W, + (__v2di) __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_blend_epi64 (__mmask8 __U, __m256i __A, __m256i __W) { + return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U, + (__v4di) __W, + (__v4di) __A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_compress_pd (__m128d __W, __mmask8 __U, __m128d __A) { + return (__m128d) __builtin_ia32_compressdf128_mask ((__v2df) __A, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_compress_pd (__mmask8 __U, __m128d __A) { + return (__m128d) __builtin_ia32_compressdf128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_compress_pd (__m256d __W, __mmask8 __U, __m256d __A) { + return (__m256d) __builtin_ia32_compressdf256_mask ((__v4df) __A, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_compress_pd (__mmask8 __U, __m256d __A) { + return (__m256d) __builtin_ia32_compressdf256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_compress_epi64 (__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_compressdi128_mask ((__v2di) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_compress_epi64 (__mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_compressdi128_mask ((__v2di) __A, + (__v2di) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_compress_epi64 (__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_compressdi256_mask ((__v4di) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_compress_epi64 (__mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_compressdi256_mask ((__v4di) __A, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_compress_ps (__m128 __W, __mmask8 __U, __m128 __A) { + return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_compress_ps (__mmask8 __U, __m128 __A) { + return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_compress_ps (__m256 __W, __mmask8 __U, __m256 __A) { + return (__m256) __builtin_ia32_compresssf256_mask ((__v8sf) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_compress_ps (__mmask8 __U, __m256 __A) { + return (__m256) __builtin_ia32_compresssf256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_compress_epi32 (__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_compress_epi32 (__mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_compress_epi32 (__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_compresssi256_mask ((__v8si) __A, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_compress_epi32 (__mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_compresssi256_mask ((__v8si) __A, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m128d __A) { + __builtin_ia32_compressstoredf128_mask ((__v2df *) __P, + (__v2df) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m256d __A) { + __builtin_ia32_compressstoredf256_mask ((__v4df *) __P, + (__v4df) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_compressstoreu_epi64 (void *__P, __mmask8 __U, __m128i __A) { + __builtin_ia32_compressstoredi128_mask ((__v2di *) __P, + (__v2di) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_compressstoreu_epi64 (void *__P, __mmask8 __U, __m256i __A) { + __builtin_ia32_compressstoredi256_mask ((__v4di *) __P, + (__v4di) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_compressstoreu_ps (void *__P, __mmask8 __U, __m128 __A) { + __builtin_ia32_compressstoresf128_mask ((__v4sf *) __P, + (__v4sf) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_compressstoreu_ps (void *__P, __mmask8 __U, __m256 __A) { + __builtin_ia32_compressstoresf256_mask ((__v8sf *) __P, + (__v8sf) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m128i __A) { + __builtin_ia32_compressstoresi128_mask ((__v4si *) __P, + (__v4si) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m256i __A) { + __builtin_ia32_compressstoresi256_mask ((__v8si *) __P, + (__v8si) __A, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_pd (__m128d __W, __mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, + (__v2df)_mm_cvtepi32_pd(__A), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, + (__v2df)_mm_cvtepi32_pd(__A), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_pd (__m256d __W, __mmask8 __U, __m128i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, + (__v4df)_mm256_cvtepi32_pd(__A), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, + (__v4df)_mm256_cvtepi32_pd(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_cvtepi32_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi32_ps (__mmask8 __U, __m128i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_cvtepi32_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_cvtepi32_ps(__A), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi32_ps (__mmask8 __U, __m256i __A) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_cvtepi32_ps(__A), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtpd_epi32 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2dq128_mask ((__v2df) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpd_epi32 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2dq128_mask ((__v2df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm256_cvtpd_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpd_epi32 (__mmask8 __U, __m256d __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm256_cvtpd_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m128d __A) { + return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpd_ps (__mmask8 __U, __m128d __A) { + return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m256d __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm256_cvtpd_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpd_ps (__mmask8 __U, __m256d __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm256_cvtpd_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtpd_epu32 (__m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtpd_epu32 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtpd_epu32 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvtpd2udq128_mask ((__v2df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtpd_epu32 (__m256d __A) { + return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A) { + return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtpd_epu32 (__mmask8 __U, __m256d __A) { + return (__m128i) __builtin_ia32_cvtpd2udq256_mask ((__v4df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtps_epi32 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtps_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtps_epi32 (__mmask8 __U, __m128 __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtps_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtps_epi32 (__m256i __W, __mmask8 __U, __m256 __A) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtps_epi32(__A), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtps_epi32 (__mmask8 __U, __m256 __A) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtps_epi32(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_cvtps_pd (__m128d __W, __mmask8 __U, __m128 __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_cvtps_pd(__A), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtps_pd (__mmask8 __U, __m128 __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_cvtps_pd(__A), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtps_pd (__m256d __W, __mmask8 __U, __m128 __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_cvtps_pd(__A), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtps_pd (__mmask8 __U, __m128 __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_cvtps_pd(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtps_epu32 (__m128 __A) { + return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtps_epu32 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtps_epu32 (__mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvtps_epu32 (__m256 __A) { + return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtps_epu32 (__m256i __W, __mmask8 __U, __m256 __A) { + return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtps_epu32 (__mmask8 __U, __m256 __A) { + return (__m256i) __builtin_ia32_cvtps2udq256_mask ((__v8sf) __A, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttpd_epi32 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2dq128_mask ((__v2df) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttpd_epi32 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2dq128_mask ((__v2df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm256_cvttpd_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttpd_epi32 (__mmask8 __U, __m256d __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm256_cvttpd_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvttpd_epu32 (__m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttpd_epu32 (__m128i __W, __mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttpd_epu32 (__mmask8 __U, __m128d __A) { + return (__m128i) __builtin_ia32_cvttpd2udq128_mask ((__v2df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvttpd_epu32 (__m256d __A) { + return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A) { + return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttpd_epu32 (__mmask8 __U, __m256d __A) { + return (__m128i) __builtin_ia32_cvttpd2udq256_mask ((__v4df) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttps_epi32 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvttps_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttps_epi32 (__mmask8 __U, __m128 __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvttps_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttps_epi32 (__m256i __W, __mmask8 __U, __m256 __A) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvttps_epi32(__A), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttps_epi32 (__mmask8 __U, __m256 __A) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvttps_epi32(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvttps_epu32 (__m128 __A) { + return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvttps_epu32 (__m128i __W, __mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvttps_epu32 (__mmask8 __U, __m128 __A) { + return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cvttps_epu32 (__m256 __A) { + return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvttps_epu32 (__m256i __W, __mmask8 __U, __m256 __A) { + return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvttps_epu32 (__mmask8 __U, __m256 __A) { + return (__m256i) __builtin_ia32_cvttps2udq256_mask ((__v8sf) __A, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_cvtepu32_pd (__m128i __A) { + return (__m128d) __builtin_convertvector( + __builtin_shufflevector((__v4su)__A, (__v4su)__A, 0, 1), __v2df); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu32_pd (__m128d __W, __mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, + (__v2df)_mm_cvtepu32_pd(__A), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, + (__v2df)_mm_cvtepu32_pd(__A), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_cvtepu32_pd (__m128i __A) { + return (__m256d)__builtin_convertvector((__v4su)__A, __v4df); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu32_pd (__m256d __W, __mmask8 __U, __m128i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, + (__v4df)_mm256_cvtepu32_pd(__A), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, + (__v4df)_mm256_cvtepu32_pd(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtepu32_ps (__m128i __A) { + return (__m128)__builtin_convertvector((__v4su)__A, __v4sf); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_cvtepu32_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_cvtepu32_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_cvtepu32_ps (__m256i __A) { + return (__m256)__builtin_convertvector((__v8su)__A, __v8sf); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_cvtepu32_ps(__A), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_cvtepu32_ps(__A), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_div_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_div_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_div_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_div_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_div_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_div_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_div_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_div_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_expand_pd (__m128d __W, __mmask8 __U, __m128d __A) { + return (__m128d) __builtin_ia32_expanddf128_mask ((__v2df) __A, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_expand_pd (__mmask8 __U, __m128d __A) { + return (__m128d) __builtin_ia32_expanddf128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_expand_pd (__m256d __W, __mmask8 __U, __m256d __A) { + return (__m256d) __builtin_ia32_expanddf256_mask ((__v4df) __A, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_expand_pd (__mmask8 __U, __m256d __A) { + return (__m256d) __builtin_ia32_expanddf256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expand_epi64 (__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_expanddi128_mask ((__v2di) __A, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expand_epi64 (__mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_expanddi128_mask ((__v2di) __A, + (__v2di) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expand_epi64 (__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_expanddi256_mask ((__v4di) __A, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expand_epi64 (__mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_expanddi256_mask ((__v4di) __A, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_expandloadu_pd (__m128d __W, __mmask8 __U, void const *__P) { + return (__m128d) __builtin_ia32_expandloaddf128_mask ((const __v2df *) __P, + (__v2df) __W, + (__mmask8) + __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_expandloadu_pd (__mmask8 __U, void const *__P) { + return (__m128d) __builtin_ia32_expandloaddf128_mask ((const __v2df *) __P, + (__v2df) + _mm_setzero_pd (), + (__mmask8) + __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_expandloadu_pd (__m256d __W, __mmask8 __U, void const *__P) { + return (__m256d) __builtin_ia32_expandloaddf256_mask ((const __v4df *) __P, + (__v4df) __W, + (__mmask8) + __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_expandloadu_pd (__mmask8 __U, void const *__P) { + return (__m256d) __builtin_ia32_expandloaddf256_mask ((const __v4df *) __P, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expandloadu_epi64 (__m128i __W, __mmask8 __U, void const *__P) { + return (__m128i) __builtin_ia32_expandloaddi128_mask ((const __v2di *) __P, + (__v2di) __W, + (__mmask8) + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expandloadu_epi64 (__mmask8 __U, void const *__P) { + return (__m128i) __builtin_ia32_expandloaddi128_mask ((const __v2di *) __P, + (__v2di) + _mm_setzero_si128 (), + (__mmask8) + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expandloadu_epi64 (__m256i __W, __mmask8 __U, + void const *__P) { + return (__m256i) __builtin_ia32_expandloaddi256_mask ((const __v4di *) __P, + (__v4di) __W, + (__mmask8) + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expandloadu_epi64 (__mmask8 __U, void const *__P) { + return (__m256i) __builtin_ia32_expandloaddi256_mask ((const __v4di *) __P, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) + __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_expandloadu_ps (__m128 __W, __mmask8 __U, void const *__P) { + return (__m128) __builtin_ia32_expandloadsf128_mask ((const __v4sf *) __P, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_expandloadu_ps (__mmask8 __U, void const *__P) { + return (__m128) __builtin_ia32_expandloadsf128_mask ((const __v4sf *) __P, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) + __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_expandloadu_ps (__m256 __W, __mmask8 __U, void const *__P) { + return (__m256) __builtin_ia32_expandloadsf256_mask ((const __v8sf *) __P, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_expandloadu_ps (__mmask8 __U, void const *__P) { + return (__m256) __builtin_ia32_expandloadsf256_mask ((const __v8sf *) __P, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expandloadu_epi32 (__m128i __W, __mmask8 __U, void const *__P) { + return (__m128i) __builtin_ia32_expandloadsi128_mask ((const __v4si *) __P, + (__v4si) __W, + (__mmask8) + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expandloadu_epi32 (__mmask8 __U, void const *__P) { + return (__m128i) __builtin_ia32_expandloadsi128_mask ((const __v4si *) __P, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expandloadu_epi32 (__m256i __W, __mmask8 __U, + void const *__P) { + return (__m256i) __builtin_ia32_expandloadsi256_mask ((const __v8si *) __P, + (__v8si) __W, + (__mmask8) + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expandloadu_epi32 (__mmask8 __U, void const *__P) { + return (__m256i) __builtin_ia32_expandloadsi256_mask ((const __v8si *) __P, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) + __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_expand_ps (__m128 __W, __mmask8 __U, __m128 __A) { + return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_expand_ps (__mmask8 __U, __m128 __A) { + return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_expand_ps (__m256 __W, __mmask8 __U, __m256 __A) { + return (__m256) __builtin_ia32_expandsf256_mask ((__v8sf) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_expand_ps (__mmask8 __U, __m256 __A) { + return (__m256) __builtin_ia32_expandsf256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expand_epi32 (__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expand_epi32 (__mmask8 __U, __m128i __A) { + return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expand_epi32 (__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_expandsi256_mask ((__v8si) __A, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expand_epi32 (__mmask8 __U, __m256i __A) { + return (__m256i) __builtin_ia32_expandsi256_mask ((__v8si) __A, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_getexp_pd (__m128d __A) { + return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_getexp_pd (__m128d __W, __mmask8 __U, __m128d __A) { + return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_getexp_pd (__mmask8 __U, __m128d __A) { + return (__m128d) __builtin_ia32_getexppd128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_getexp_pd (__m256d __A) { + return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_getexp_pd (__m256d __W, __mmask8 __U, __m256d __A) { + return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_getexp_pd (__mmask8 __U, __m256d __A) { + return (__m256d) __builtin_ia32_getexppd256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_getexp_ps (__m128 __A) { + return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_getexp_ps (__m128 __W, __mmask8 __U, __m128 __A) { + return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_getexp_ps (__mmask8 __U, __m128 __A) { + return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_getexp_ps (__m256 __A) { + return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_getexp_ps (__m256 __W, __mmask8 __U, __m256 __A) { + return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_getexp_ps (__mmask8 __U, __m256 __A) { + return (__m256) __builtin_ia32_getexpps256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_max_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_max_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_max_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_max_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_max_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_max_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_max_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_max_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_min_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_min_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_min_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_min_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_min_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_min_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_min_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_min_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_mul_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_mul_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_mul_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_mul_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_mul_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_mul_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_mul_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_mul_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_abs_epi32(__A), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_abs_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_abs_epi32(__A), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_abs_epi32(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_abs_epi64 (__m128i __A) { + return (__m128i)__builtin_elementwise_abs((__v2di)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_abs_epi64 (__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_abs_epi64(__A), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_abs_epi64 (__mmask8 __U, __m128i __A) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_abs_epi64(__A), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_abs_epi64 (__m256i __A) { + return (__m256i)__builtin_elementwise_abs((__v4di)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_abs_epi64 (__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_abs_epi64(__A), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_abs_epi64 (__mmask8 __U, __m256i __A) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_abs_epi64(__A), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_max_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_max_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_max_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_max_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_max_epi64 (__m128i __A, __m128i __B) { + return (__m128i)__builtin_elementwise_max((__v2di)__A, (__v2di)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epi64 (__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_max_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_max_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_max_epi64 (__m256i __A, __m256i __B) { + return (__m256i)__builtin_elementwise_max((__v4di)__A, (__v4di)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epi64 (__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_max_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_max_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_max_epu32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_max_epu32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_max_epu32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_max_epu32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_max_epu64 (__m128i __A, __m128i __B) { + return (__m128i)__builtin_elementwise_max((__v2du)__A, (__v2du)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_max_epu64 (__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_max_epu64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_max_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_max_epu64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_max_epu64 (__m256i __A, __m256i __B) { + return (__m256i)__builtin_elementwise_max((__v4du)__A, (__v4du)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_max_epu64 (__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_max_epu64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_max_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_max_epu64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_min_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_min_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_min_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_min_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_min_epi64 (__m128i __A, __m128i __B) { + return (__m128i)__builtin_elementwise_min((__v2di)__A, (__v2di)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_min_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epi64 (__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_min_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_min_epi64 (__m256i __A, __m256i __B) { + return (__m256i)__builtin_elementwise_min((__v4di)__A, (__v4di)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_min_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epi64 (__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_min_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_min_epu32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm_min_epu32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_min_epu32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_min_epu32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_min_epu64 (__m128i __A, __m128i __B) { + return (__m128i)__builtin_elementwise_min((__v2du)__A, (__v2du)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_min_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_min_epu64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_min_epu64 (__mmask8 __M, __m128i __A, __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, + (__v2di)_mm_min_epu64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_min_epu64 (__m256i __A, __m256i __B) { + return (__m256i)__builtin_elementwise_min((__v4du)__A, (__v4du)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_min_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_min_epu64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_min_epu64 (__mmask8 __M, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_min_epu64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +#define _mm_roundscale_pd(A, imm) \ + ((__m128d)__builtin_ia32_rndscalepd_128_mask((__v2df)(__m128d)(A), \ + (int)(imm), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)-1)) + + +#define _mm_mask_roundscale_pd(W, U, A, imm) \ + ((__m128d)__builtin_ia32_rndscalepd_128_mask((__v2df)(__m128d)(A), \ + (int)(imm), \ + (__v2df)(__m128d)(W), \ + (__mmask8)(U))) + + +#define _mm_maskz_roundscale_pd(U, A, imm) \ + ((__m128d)__builtin_ia32_rndscalepd_128_mask((__v2df)(__m128d)(A), \ + (int)(imm), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)(U))) + + +#define _mm256_roundscale_pd(A, imm) \ + ((__m256d)__builtin_ia32_rndscalepd_256_mask((__v4df)(__m256d)(A), \ + (int)(imm), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)-1)) + + +#define _mm256_mask_roundscale_pd(W, U, A, imm) \ + ((__m256d)__builtin_ia32_rndscalepd_256_mask((__v4df)(__m256d)(A), \ + (int)(imm), \ + (__v4df)(__m256d)(W), \ + (__mmask8)(U))) + + +#define _mm256_maskz_roundscale_pd(U, A, imm) \ + ((__m256d)__builtin_ia32_rndscalepd_256_mask((__v4df)(__m256d)(A), \ + (int)(imm), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm_roundscale_ps(A, imm) \ + ((__m128)__builtin_ia32_rndscaleps_128_mask((__v4sf)(__m128)(A), (int)(imm), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)-1)) + + +#define _mm_mask_roundscale_ps(W, U, A, imm) \ + ((__m128)__builtin_ia32_rndscaleps_128_mask((__v4sf)(__m128)(A), (int)(imm), \ + (__v4sf)(__m128)(W), \ + (__mmask8)(U))) + + +#define _mm_maskz_roundscale_ps(U, A, imm) \ + ((__m128)__builtin_ia32_rndscaleps_128_mask((__v4sf)(__m128)(A), (int)(imm), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm256_roundscale_ps(A, imm) \ + ((__m256)__builtin_ia32_rndscaleps_256_mask((__v8sf)(__m256)(A), (int)(imm), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm256_mask_roundscale_ps(W, U, A, imm) \ + ((__m256)__builtin_ia32_rndscaleps_256_mask((__v8sf)(__m256)(A), (int)(imm), \ + (__v8sf)(__m256)(W), \ + (__mmask8)(U))) + + +#define _mm256_maskz_roundscale_ps(U, A, imm) \ + ((__m256)__builtin_ia32_rndscaleps_256_mask((__v8sf)(__m256)(A), (int)(imm), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)(U))) + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_scalef_pd (__m128d __A, __m128d __B) { + return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A, + (__v2df) __B, + (__v2df) + _mm_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_scalef_pd (__m128d __W, __mmask8 __U, __m128d __A, + __m128d __B) { + return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A, + (__v2df) __B, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_scalef_pd (__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d) __builtin_ia32_scalefpd128_mask ((__v2df) __A, + (__v2df) __B, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_scalef_pd (__m256d __A, __m256d __B) { + return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A, + (__v4df) __B, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_scalef_pd (__m256d __W, __mmask8 __U, __m256d __A, + __m256d __B) { + return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A, + (__v4df) __B, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_scalef_pd (__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d) __builtin_ia32_scalefpd256_mask ((__v4df) __A, + (__v4df) __B, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_scalef_ps (__m128 __A, __m128 __B) { + return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_scalef_ps (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_scalef_ps (__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A, + (__v4sf) __B, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_scalef_ps (__m256 __A, __m256 __B) { + return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_scalef_ps (__m256 __W, __mmask8 __U, __m256 __A, + __m256 __B) { + return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256) __builtin_ia32_scalefps256_mask ((__v8sf) __A, + (__v8sf) __B, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +#define _mm_i64scatter_pd(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv2df((void *)(addr), (__mmask8)-1, \ + (__v2di)(__m128i)(index), \ + (__v2df)(__m128d)(v1), (int)(scale)) + +#define _mm_mask_i64scatter_pd(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv2df((void *)(addr), (__mmask8)(mask), \ + (__v2di)(__m128i)(index), \ + (__v2df)(__m128d)(v1), (int)(scale)) + +#define _mm_i64scatter_epi64(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv2di((void *)(addr), (__mmask8)-1, \ + (__v2di)(__m128i)(index), \ + (__v2di)(__m128i)(v1), (int)(scale)) + +#define _mm_mask_i64scatter_epi64(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv2di((void *)(addr), (__mmask8)(mask), \ + (__v2di)(__m128i)(index), \ + (__v2di)(__m128i)(v1), (int)(scale)) + +#define _mm256_i64scatter_pd(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv4df((void *)(addr), (__mmask8)-1, \ + (__v4di)(__m256i)(index), \ + (__v4df)(__m256d)(v1), (int)(scale)) + +#define _mm256_mask_i64scatter_pd(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv4df((void *)(addr), (__mmask8)(mask), \ + (__v4di)(__m256i)(index), \ + (__v4df)(__m256d)(v1), (int)(scale)) + +#define _mm256_i64scatter_epi64(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv4di((void *)(addr), (__mmask8)-1, \ + (__v4di)(__m256i)(index), \ + (__v4di)(__m256i)(v1), (int)(scale)) + +#define _mm256_mask_i64scatter_epi64(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv4di((void *)(addr), (__mmask8)(mask), \ + (__v4di)(__m256i)(index), \ + (__v4di)(__m256i)(v1), (int)(scale)) + +#define _mm_i64scatter_ps(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv4sf((void *)(addr), (__mmask8)-1, \ + (__v2di)(__m128i)(index), (__v4sf)(__m128)(v1), \ + (int)(scale)) + +#define _mm_mask_i64scatter_ps(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv4sf((void *)(addr), (__mmask8)(mask), \ + (__v2di)(__m128i)(index), (__v4sf)(__m128)(v1), \ + (int)(scale)) + +#define _mm_i64scatter_epi32(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv4si((void *)(addr), (__mmask8)-1, \ + (__v2di)(__m128i)(index), \ + (__v4si)(__m128i)(v1), (int)(scale)) + +#define _mm_mask_i64scatter_epi32(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv4si((void *)(addr), (__mmask8)(mask), \ + (__v2di)(__m128i)(index), \ + (__v4si)(__m128i)(v1), (int)(scale)) + +#define _mm256_i64scatter_ps(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv8sf((void *)(addr), (__mmask8)-1, \ + (__v4di)(__m256i)(index), (__v4sf)(__m128)(v1), \ + (int)(scale)) + +#define _mm256_mask_i64scatter_ps(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv8sf((void *)(addr), (__mmask8)(mask), \ + (__v4di)(__m256i)(index), (__v4sf)(__m128)(v1), \ + (int)(scale)) + +#define _mm256_i64scatter_epi32(addr, index, v1, scale) \ + __builtin_ia32_scatterdiv8si((void *)(addr), (__mmask8)-1, \ + (__v4di)(__m256i)(index), \ + (__v4si)(__m128i)(v1), (int)(scale)) + +#define _mm256_mask_i64scatter_epi32(addr, mask, index, v1, scale) \ + __builtin_ia32_scatterdiv8si((void *)(addr), (__mmask8)(mask), \ + (__v4di)(__m256i)(index), \ + (__v4si)(__m128i)(v1), (int)(scale)) + +#define _mm_i32scatter_pd(addr, index, v1, scale) \ + __builtin_ia32_scattersiv2df((void *)(addr), (__mmask8)-1, \ + (__v4si)(__m128i)(index), \ + (__v2df)(__m128d)(v1), (int)(scale)) + +#define _mm_mask_i32scatter_pd(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv2df((void *)(addr), (__mmask8)(mask), \ + (__v4si)(__m128i)(index), \ + (__v2df)(__m128d)(v1), (int)(scale)) + +#define _mm_i32scatter_epi64(addr, index, v1, scale) \ + __builtin_ia32_scattersiv2di((void *)(addr), (__mmask8)-1, \ + (__v4si)(__m128i)(index), \ + (__v2di)(__m128i)(v1), (int)(scale)) + +#define _mm_mask_i32scatter_epi64(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv2di((void *)(addr), (__mmask8)(mask), \ + (__v4si)(__m128i)(index), \ + (__v2di)(__m128i)(v1), (int)(scale)) + +#define _mm256_i32scatter_pd(addr, index, v1, scale) \ + __builtin_ia32_scattersiv4df((void *)(addr), (__mmask8)-1, \ + (__v4si)(__m128i)(index), \ + (__v4df)(__m256d)(v1), (int)(scale)) + +#define _mm256_mask_i32scatter_pd(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv4df((void *)(addr), (__mmask8)(mask), \ + (__v4si)(__m128i)(index), \ + (__v4df)(__m256d)(v1), (int)(scale)) + +#define _mm256_i32scatter_epi64(addr, index, v1, scale) \ + __builtin_ia32_scattersiv4di((void *)(addr), (__mmask8)-1, \ + (__v4si)(__m128i)(index), \ + (__v4di)(__m256i)(v1), (int)(scale)) + +#define _mm256_mask_i32scatter_epi64(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv4di((void *)(addr), (__mmask8)(mask), \ + (__v4si)(__m128i)(index), \ + (__v4di)(__m256i)(v1), (int)(scale)) + +#define _mm_i32scatter_ps(addr, index, v1, scale) \ + __builtin_ia32_scattersiv4sf((void *)(addr), (__mmask8)-1, \ + (__v4si)(__m128i)(index), (__v4sf)(__m128)(v1), \ + (int)(scale)) + +#define _mm_mask_i32scatter_ps(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv4sf((void *)(addr), (__mmask8)(mask), \ + (__v4si)(__m128i)(index), (__v4sf)(__m128)(v1), \ + (int)(scale)) + +#define _mm_i32scatter_epi32(addr, index, v1, scale) \ + __builtin_ia32_scattersiv4si((void *)(addr), (__mmask8)-1, \ + (__v4si)(__m128i)(index), \ + (__v4si)(__m128i)(v1), (int)(scale)) + +#define _mm_mask_i32scatter_epi32(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv4si((void *)(addr), (__mmask8)(mask), \ + (__v4si)(__m128i)(index), \ + (__v4si)(__m128i)(v1), (int)(scale)) + +#define _mm256_i32scatter_ps(addr, index, v1, scale) \ + __builtin_ia32_scattersiv8sf((void *)(addr), (__mmask8)-1, \ + (__v8si)(__m256i)(index), (__v8sf)(__m256)(v1), \ + (int)(scale)) + +#define _mm256_mask_i32scatter_ps(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv8sf((void *)(addr), (__mmask8)(mask), \ + (__v8si)(__m256i)(index), (__v8sf)(__m256)(v1), \ + (int)(scale)) + +#define _mm256_i32scatter_epi32(addr, index, v1, scale) \ + __builtin_ia32_scattersiv8si((void *)(addr), (__mmask8)-1, \ + (__v8si)(__m256i)(index), \ + (__v8si)(__m256i)(v1), (int)(scale)) + +#define _mm256_mask_i32scatter_epi32(addr, mask, index, v1, scale) \ + __builtin_ia32_scattersiv8si((void *)(addr), (__mmask8)(mask), \ + (__v8si)(__m256i)(index), \ + (__v8si)(__m256i)(v1), (int)(scale)) + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_sqrt_pd(__A), + (__v2df)__W); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_sqrt_pd(__A), + (__v2df)_mm_setzero_pd()); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_sqrt_pd(__A), + (__v4df)__W); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_sqrt_pd(__A), + (__v4df)_mm256_setzero_pd()); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_sqrt_ps(__A), + (__v4sf)__W); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_sqrt_ps(__A), + (__v4sf)_mm_setzero_ps()); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_sqrt_ps(__A), + (__v8sf)__W); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_sqrt_ps(__A), + (__v8sf)_mm256_setzero_ps()); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_sub_pd(__A, __B), + (__v2df)__W); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_sub_pd(__A, __B), + (__v2df)_mm_setzero_pd()); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_sub_pd(__A, __B), + (__v4df)__W); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_sub_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_sub_ps(__A, __B), + (__v4sf)__W); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_sub_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_sub_ps(__A, __B), + (__v8sf)__W); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_sub_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) { + return (__m128i)__builtin_ia32_vpermi2vard128((__v4si) __A, (__v4si)__I, + (__v4si)__B); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I, + __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_permutex2var_epi32(__A, __I, __B), + (__v4si)__A); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U, + __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_permutex2var_epi32(__A, __I, __B), + (__v4si)__I); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I, + __m128i __B) { + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_permutex2var_epi32(__A, __I, __B), + (__v4si)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) { + return (__m256i)__builtin_ia32_vpermi2vard256((__v8si)__A, (__v8si) __I, + (__v8si) __B); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I, + __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_permutex2var_epi32(__A, __I, __B), + (__v8si)__A); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U, + __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_permutex2var_epi32(__A, __I, __B), + (__v8si)__I); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I, + __m256i __B) { + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_permutex2var_epi32(__A, __I, __B), + (__v8si)_mm256_setzero_si256()); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) { + return (__m128d)__builtin_ia32_vpermi2varpd128((__v2df)__A, (__v2di)__I, + (__v2df)__B); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128(__U, + (__v2df)_mm_permutex2var_pd(__A, __I, __B), + (__v2df)__A); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128(__U, + (__v2df)_mm_permutex2var_pd(__A, __I, __B), + (__v2df)(__m128d)__I); + } + + static __inline__ __m128d __DEFAULT_FN_ATTRS128 + _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, __m128d __B) { + return (__m128d)__builtin_ia32_selectpd_128(__U, + (__v2df)_mm_permutex2var_pd(__A, __I, __B), + (__v2df)_mm_setzero_pd()); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) { + return (__m256d)__builtin_ia32_vpermi2varpd256((__v4df)__A, (__v4di)__I, + (__v4df)__B); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I, + __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256(__U, + (__v4df)_mm256_permutex2var_pd(__A, __I, __B), + (__v4df)__A); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U, + __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256(__U, + (__v4df)_mm256_permutex2var_pd(__A, __I, __B), + (__v4df)(__m256d)__I); + } + + static __inline__ __m256d __DEFAULT_FN_ATTRS256 + _mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I, + __m256d __B) { + return (__m256d)__builtin_ia32_selectpd_256(__U, + (__v4df)_mm256_permutex2var_pd(__A, __I, __B), + (__v4df)_mm256_setzero_pd()); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) { + return (__m128)__builtin_ia32_vpermi2varps128((__v4sf)__A, (__v4si)__I, + (__v4sf)__B); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128(__U, + (__v4sf)_mm_permutex2var_ps(__A, __I, __B), + (__v4sf)__A); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128(__U, + (__v4sf)_mm_permutex2var_ps(__A, __I, __B), + (__v4sf)(__m128)__I); + } + + static __inline__ __m128 __DEFAULT_FN_ATTRS128 + _mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) { + return (__m128)__builtin_ia32_selectps_128(__U, + (__v4sf)_mm_permutex2var_ps(__A, __I, __B), + (__v4sf)_mm_setzero_ps()); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) { + return (__m256)__builtin_ia32_vpermi2varps256((__v8sf)__A, (__v8si)__I, + (__v8sf) __B); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, __m256 __B) { + return (__m256)__builtin_ia32_selectps_256(__U, + (__v8sf)_mm256_permutex2var_ps(__A, __I, __B), + (__v8sf)__A); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U, + __m256 __B) { + return (__m256)__builtin_ia32_selectps_256(__U, + (__v8sf)_mm256_permutex2var_ps(__A, __I, __B), + (__v8sf)(__m256)__I); + } + + static __inline__ __m256 __DEFAULT_FN_ATTRS256 + _mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I, + __m256 __B) { + return (__m256)__builtin_ia32_selectps_256(__U, + (__v8sf)_mm256_permutex2var_ps(__A, __I, __B), + (__v8sf)_mm256_setzero_ps()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) { + return (__m128i)__builtin_ia32_vpermi2varq128((__v2di)__A, (__v2di)__I, + (__v2di)__B); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I, + __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_permutex2var_epi64(__A, __I, __B), + (__v2di)__A); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U, + __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_permutex2var_epi64(__A, __I, __B), + (__v2di)__I); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I, + __m128i __B) { + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_permutex2var_epi64(__A, __I, __B), + (__v2di)_mm_setzero_si128()); + } + + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) { + return (__m256i)__builtin_ia32_vpermi2varq256((__v4di)__A, (__v4di) __I, + (__v4di) __B); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I, + __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_permutex2var_epi64(__A, __I, __B), + (__v4di)__A); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U, + __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_permutex2var_epi64(__A, __I, __B), + (__v4di)__I); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I, + __m256i __B) { + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_permutex2var_epi64(__A, __I, __B), + (__v4di)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepi8_epi32(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepi8_epi32(__A), + (__v4si)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepi8_epi32(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepi8_epi32(__A), + (__v4si)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepi8_epi32 (__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepi8_epi32(__A), + (__v8si)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepi8_epi32 (__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepi8_epi32(__A), + (__v8si)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepi8_epi64(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepi8_epi64(__A), + (__v2di)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepi8_epi64(__A), + (__v2di)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepi8_epi64(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepi8_epi64(__A), + (__v4di)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepi8_epi64(__A), + (__v4di)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepi32_epi64(__m128i __W, __mmask8 __U, __m128i __X) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepi32_epi64(__X), + (__v2di)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepi32_epi64(__mmask8 __U, __m128i __X) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepi32_epi64(__X), + (__v2di)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepi32_epi64(__m256i __W, __mmask8 __U, __m128i __X) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepi32_epi64(__X), + (__v4di)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepi32_epi64(__mmask8 __U, __m128i __X) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepi32_epi64(__X), + (__v4di)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepi16_epi32(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepi16_epi32(__A), + (__v4si)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepi16_epi32(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepi16_epi32(__A), + (__v4si)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepi16_epi32(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepi16_epi32(__A), + (__v8si)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepi16_epi32 (__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepi16_epi32(__A), + (__v8si)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepi16_epi64(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepi16_epi64(__A), + (__v2di)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepi16_epi64(__A), + (__v2di)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepi16_epi64(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepi16_epi64(__A), + (__v4di)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepi16_epi64(__A), + (__v4di)_mm256_setzero_si256()); + } + + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepu8_epi32(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepu8_epi32(__A), + (__v4si)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepu8_epi32(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepu8_epi32(__A), + (__v4si)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepu8_epi32(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepu8_epi32(__A), + (__v8si)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepu8_epi32(__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepu8_epi32(__A), + (__v8si)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepu8_epi64(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepu8_epi64(__A), + (__v2di)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepu8_epi64(__A), + (__v2di)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepu8_epi64(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepu8_epi64(__A), + (__v4di)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepu8_epi64 (__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepu8_epi64(__A), + (__v4di)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepu32_epi64(__m128i __W, __mmask8 __U, __m128i __X) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepu32_epi64(__X), + (__v2di)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepu32_epi64(__mmask8 __U, __m128i __X) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepu32_epi64(__X), + (__v2di)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepu32_epi64(__m256i __W, __mmask8 __U, __m128i __X) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepu32_epi64(__X), + (__v4di)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepu32_epi64(__mmask8 __U, __m128i __X) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepu32_epi64(__X), + (__v4di)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepu16_epi32(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepu16_epi32(__A), + (__v4si)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepu16_epi32(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_cvtepu16_epi32(__A), + (__v4si)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepu16_epi32(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepu16_epi32(__A), + (__v8si)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepu16_epi32(__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_cvtepu16_epi32(__A), + (__v8si)_mm256_setzero_si256()); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_mask_cvtepu16_epi64(__m128i __W, __mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepu16_epi64(__A), + (__v2di)__W); + } + + static __inline__ __m128i __DEFAULT_FN_ATTRS128 + _mm_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) + { + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_cvtepu16_epi64(__A), + (__v2di)_mm_setzero_si128()); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_mask_cvtepu16_epi64(__m256i __W, __mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepu16_epi64(__A), + (__v4di)__W); + } + + static __inline__ __m256i __DEFAULT_FN_ATTRS256 + _mm256_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) + { + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_cvtepu16_epi64(__A), + (__v4di)_mm256_setzero_si256()); + } + + +#define _mm_rol_epi32(a, b) \ + ((__m128i)__builtin_ia32_prold128((__v4si)(__m128i)(a), (int)(b))) + +#define _mm_mask_rol_epi32(w, u, a, b) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \ + (__v4si)_mm_rol_epi32((a), (b)), \ + (__v4si)(__m128i)(w))) + +#define _mm_maskz_rol_epi32(u, a, b) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \ + (__v4si)_mm_rol_epi32((a), (b)), \ + (__v4si)_mm_setzero_si128())) + +#define _mm256_rol_epi32(a, b) \ + ((__m256i)__builtin_ia32_prold256((__v8si)(__m256i)(a), (int)(b))) + +#define _mm256_mask_rol_epi32(w, u, a, b) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \ + (__v8si)_mm256_rol_epi32((a), (b)), \ + (__v8si)(__m256i)(w))) + +#define _mm256_maskz_rol_epi32(u, a, b) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \ + (__v8si)_mm256_rol_epi32((a), (b)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_rol_epi64(a, b) \ + ((__m128i)__builtin_ia32_prolq128((__v2di)(__m128i)(a), (int)(b))) + +#define _mm_mask_rol_epi64(w, u, a, b) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \ + (__v2di)_mm_rol_epi64((a), (b)), \ + (__v2di)(__m128i)(w))) + +#define _mm_maskz_rol_epi64(u, a, b) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \ + (__v2di)_mm_rol_epi64((a), (b)), \ + (__v2di)_mm_setzero_si128())) + +#define _mm256_rol_epi64(a, b) \ + ((__m256i)__builtin_ia32_prolq256((__v4di)(__m256i)(a), (int)(b))) + +#define _mm256_mask_rol_epi64(w, u, a, b) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \ + (__v4di)_mm256_rol_epi64((a), (b)), \ + (__v4di)(__m256i)(w))) + +#define _mm256_maskz_rol_epi64(u, a, b) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \ + (__v4di)_mm256_rol_epi64((a), (b)), \ + (__v4di)_mm256_setzero_si256())) + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_rolv_epi32 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_prolvd128((__v4si)__A, (__v4si)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_rolv_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_rolv_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_rolv_epi32 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_prolvd256((__v8si)__A, (__v8si)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_rolv_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_rolv_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_rolv_epi64 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_prolvq128((__v2di)__A, (__v2di)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_rolv_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_rolv_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_rolv_epi64 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_prolvq256((__v4di)__A, (__v4di)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_rolv_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_rolv_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +#define _mm_ror_epi32(a, b) \ + ((__m128i)__builtin_ia32_prord128((__v4si)(__m128i)(a), (int)(b))) + +#define _mm_mask_ror_epi32(w, u, a, b) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \ + (__v4si)_mm_ror_epi32((a), (b)), \ + (__v4si)(__m128i)(w))) + +#define _mm_maskz_ror_epi32(u, a, b) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(u), \ + (__v4si)_mm_ror_epi32((a), (b)), \ + (__v4si)_mm_setzero_si128())) + +#define _mm256_ror_epi32(a, b) \ + ((__m256i)__builtin_ia32_prord256((__v8si)(__m256i)(a), (int)(b))) + +#define _mm256_mask_ror_epi32(w, u, a, b) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \ + (__v8si)_mm256_ror_epi32((a), (b)), \ + (__v8si)(__m256i)(w))) + +#define _mm256_maskz_ror_epi32(u, a, b) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(u), \ + (__v8si)_mm256_ror_epi32((a), (b)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_ror_epi64(a, b) \ + ((__m128i)__builtin_ia32_prorq128((__v2di)(__m128i)(a), (int)(b))) + +#define _mm_mask_ror_epi64(w, u, a, b) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \ + (__v2di)_mm_ror_epi64((a), (b)), \ + (__v2di)(__m128i)(w))) + +#define _mm_maskz_ror_epi64(u, a, b) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(u), \ + (__v2di)_mm_ror_epi64((a), (b)), \ + (__v2di)_mm_setzero_si128())) + +#define _mm256_ror_epi64(a, b) \ + ((__m256i)__builtin_ia32_prorq256((__v4di)(__m256i)(a), (int)(b))) + +#define _mm256_mask_ror_epi64(w, u, a, b) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \ + (__v4di)_mm256_ror_epi64((a), (b)), \ + (__v4di)(__m256i)(w))) + +#define _mm256_maskz_ror_epi64(u, a, b) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(u), \ + (__v4di)_mm256_ror_epi64((a), (b)), \ + (__v4di)_mm256_setzero_si256())) + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sll_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sll_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sll_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sll_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_slli_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_slli_epi32(__A, (int)__B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_slli_epi32(__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_slli_epi32(__A, (int)__B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_slli_epi32(__A, (int)__B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_slli_epi32(__A, (int)__B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_sll_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_sll_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_sll_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_sll_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_slli_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_slli_epi64(__A, (int)__B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_slli_epi64(__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_slli_epi64(__A, (int)__B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_slli_epi64(__A, (int)__B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_slli_epi64(__A, (int)__B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_rorv_epi32 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_prorvd128((__v4si)__A, (__v4si)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_rorv_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_rorv_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_rorv_epi32 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_prorvd256((__v8si)__A, (__v8si)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_rorv_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_rorv_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_rorv_epi64 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_prorvq128((__v2di)__A, (__v2di)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_rorv_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_rorv_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_rorv_epi64 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_prorvq256((__v4di)__A, (__v4di)__B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_rorv_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_rorv_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_sllv_epi64(__X, __Y), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_sllv_epi64(__X, __Y), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_sllv_epi64(__X, __Y), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_sllv_epi64(__X, __Y), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sllv_epi32(__X, __Y), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sllv_epi32(__X, __Y), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sllv_epi32(__X, __Y), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sllv_epi32(__X, __Y), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srlv_epi64(__X, __Y), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srlv_epi64(__X, __Y), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srlv_epi64(__X, __Y), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srlv_epi64(__X, __Y), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srlv_epi32(__X, __Y), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srlv_epi32(__X, __Y), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srlv_epi32(__X, __Y), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srlv_epi32(__X, __Y), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srl_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srl_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srl_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srl_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srli_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srli_epi32(__A, (int)__B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srli_epi32(__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srli_epi32(__A, (int)__B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srli_epi32(__A, (int)__B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srli_epi32(__A, (int)__B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srl_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srl_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srl_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srl_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srli_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srli_epi64(__A, (int)__B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srli_epi64(__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srli_epi64(__A, (int)__B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srli_epi64(__A, (int)__B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srli_epi64(__A, (int)__B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srav_epi32(__X, __Y), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srav_epi32(__X, __Y), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srav_epi32(__X, __Y), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srav_epi32(__X, __Y), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_srav_epi64(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_psravq128((__v2di)__X, (__v2di)__Y); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srav_epi64(__X, __Y), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_srav_epi64(__X, __Y), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_srav_epi64(__m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_psravq256((__v4di)__X, (__v4di) __Y); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srav_epi64(__X, __Y), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srav_epi64 (__mmask8 __U, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_srav_epi64(__X, __Y), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mov_epi32 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U, + (__v4si) __A, + (__v4si) __W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mov_epi32 (__mmask8 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U, + (__v4si) __A, + (__v4si) _mm_setzero_si128 ()); +} + + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mov_epi32 (__m256i __W, __mmask8 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U, + (__v8si) __A, + (__v8si) __W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mov_epi32 (__mmask8 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U, + (__v8si) __A, + (__v8si) _mm256_setzero_si256 ()); +} + +static __inline __m128i __DEFAULT_FN_ATTRS128 +_mm_load_epi32 (void const *__P) +{ + return *(const __m128i *) __P; +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_load_epi32 (__m128i __W, __mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_movdqa32load128_mask ((const __v4si *) __P, + (__v4si) __W, + (__mmask8) + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_load_epi32 (__mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_movdqa32load128_mask ((const __v4si *) __P, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) + __U); +} + +static __inline __m256i __DEFAULT_FN_ATTRS256 +_mm256_load_epi32 (void const *__P) +{ + return *(const __m256i *) __P; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_load_epi32 (__m256i __W, __mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_movdqa32load256_mask ((const __v8si *) __P, + (__v8si) __W, + (__mmask8) + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_load_epi32 (__mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_movdqa32load256_mask ((const __v8si *) __P, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) + __U); +} + +static __inline void __DEFAULT_FN_ATTRS128 +_mm_store_epi32 (void *__P, __m128i __A) +{ + *(__m128i *) __P = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_store_epi32 (void *__P, __mmask8 __U, __m128i __A) +{ + __builtin_ia32_movdqa32store128_mask ((__v4si *) __P, + (__v4si) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS256 +_mm256_store_epi32 (void *__P, __m256i __A) +{ + *(__m256i *) __P = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_store_epi32 (void *__P, __mmask8 __U, __m256i __A) +{ + __builtin_ia32_movdqa32store256_mask ((__v8si *) __P, + (__v8si) __A, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_mov_epi64 (__m128i __W, __mmask8 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U, + (__v2di) __A, + (__v2di) __W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_mov_epi64 (__mmask8 __U, __m128i __A) +{ + return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U, + (__v2di) __A, + (__v2di) _mm_setzero_si128 ()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_mov_epi64 (__m256i __W, __mmask8 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U, + (__v4di) __A, + (__v4di) __W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_mov_epi64 (__mmask8 __U, __m256i __A) +{ + return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U, + (__v4di) __A, + (__v4di) _mm256_setzero_si256 ()); +} + +static __inline __m128i __DEFAULT_FN_ATTRS128 +_mm_load_epi64 (void const *__P) +{ + return *(const __m128i *) __P; +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_load_epi64 (__m128i __W, __mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_movdqa64load128_mask ((const __v2di *) __P, + (__v2di) __W, + (__mmask8) + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_load_epi64 (__mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_movdqa64load128_mask ((const __v2di *) __P, + (__v2di) + _mm_setzero_si128 (), + (__mmask8) + __U); +} + +static __inline __m256i __DEFAULT_FN_ATTRS256 +_mm256_load_epi64 (void const *__P) +{ + return *(const __m256i *) __P; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_load_epi64 (__m256i __W, __mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_movdqa64load256_mask ((const __v4di *) __P, + (__v4di) __W, + (__mmask8) + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_load_epi64 (__mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_movdqa64load256_mask ((const __v4di *) __P, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) + __U); +} + +static __inline void __DEFAULT_FN_ATTRS128 +_mm_store_epi64 (void *__P, __m128i __A) +{ + *(__m128i *) __P = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_store_epi64 (void *__P, __mmask8 __U, __m128i __A) +{ + __builtin_ia32_movdqa64store128_mask ((__v2di *) __P, + (__v2di) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS256 +_mm256_store_epi64 (void *__P, __m256i __A) +{ + *(__m256i *) __P = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_store_epi64 (void *__P, __mmask8 __U, __m256i __A) +{ + __builtin_ia32_movdqa64store256_mask ((__v4di *) __P, + (__v4di) __A, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_movedup_pd (__m128d __W, __mmask8 __U, __m128d __A) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_movedup_pd(__A), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_movedup_pd (__mmask8 __U, __m128d __A) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_movedup_pd(__A), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_movedup_pd (__m256d __W, __mmask8 __U, __m256d __A) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_movedup_pd(__A), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_movedup_pd (__mmask8 __U, __m256d __A) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_movedup_pd(__A), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A) +{ + return (__m128i)__builtin_ia32_selectd_128(__M, + (__v4si) _mm_set1_epi32(__A), + (__v4si)__O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_set1_epi32( __mmask8 __M, int __A) +{ + return (__m128i)__builtin_ia32_selectd_128(__M, + (__v4si) _mm_set1_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A) +{ + return (__m256i)__builtin_ia32_selectd_256(__M, + (__v8si) _mm256_set1_epi32(__A), + (__v8si)__O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_set1_epi32( __mmask8 __M, int __A) +{ + return (__m256i)__builtin_ia32_selectd_256(__M, + (__v8si) _mm256_set1_epi32(__A), + (__v8si)_mm256_setzero_si256()); +} + + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_set1_epi64 (__m128i __O, __mmask8 __M, long long __A) +{ + return (__m128i) __builtin_ia32_selectq_128(__M, + (__v2di) _mm_set1_epi64x(__A), + (__v2di) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_set1_epi64 (__mmask8 __M, long long __A) +{ + return (__m128i) __builtin_ia32_selectq_128(__M, + (__v2di) _mm_set1_epi64x(__A), + (__v2di) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_set1_epi64 (__m256i __O, __mmask8 __M, long long __A) +{ + return (__m256i) __builtin_ia32_selectq_256(__M, + (__v4di) _mm256_set1_epi64x(__A), + (__v4di) __O) ; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_set1_epi64 (__mmask8 __M, long long __A) +{ + return (__m256i) __builtin_ia32_selectq_256(__M, + (__v4di) _mm256_set1_epi64x(__A), + (__v4di) _mm256_setzero_si256()); +} + +#define _mm_fixupimm_pd(A, B, C, imm) \ + ((__m128d)__builtin_ia32_fixupimmpd128_mask((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), \ + (__v2di)(__m128i)(C), (int)(imm), \ + (__mmask8)-1)) + +#define _mm_mask_fixupimm_pd(A, U, B, C, imm) \ + ((__m128d)__builtin_ia32_fixupimmpd128_mask((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), \ + (__v2di)(__m128i)(C), (int)(imm), \ + (__mmask8)(U))) + +#define _mm_maskz_fixupimm_pd(U, A, B, C, imm) \ + ((__m128d)__builtin_ia32_fixupimmpd128_maskz((__v2df)(__m128d)(A), \ + (__v2df)(__m128d)(B), \ + (__v2di)(__m128i)(C), \ + (int)(imm), (__mmask8)(U))) + +#define _mm256_fixupimm_pd(A, B, C, imm) \ + ((__m256d)__builtin_ia32_fixupimmpd256_mask((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), \ + (__v4di)(__m256i)(C), (int)(imm), \ + (__mmask8)-1)) + +#define _mm256_mask_fixupimm_pd(A, U, B, C, imm) \ + ((__m256d)__builtin_ia32_fixupimmpd256_mask((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), \ + (__v4di)(__m256i)(C), (int)(imm), \ + (__mmask8)(U))) + +#define _mm256_maskz_fixupimm_pd(U, A, B, C, imm) \ + ((__m256d)__builtin_ia32_fixupimmpd256_maskz((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), \ + (__v4di)(__m256i)(C), \ + (int)(imm), (__mmask8)(U))) + +#define _mm_fixupimm_ps(A, B, C, imm) \ + ((__m128)__builtin_ia32_fixupimmps128_mask((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), \ + (__v4si)(__m128i)(C), (int)(imm), \ + (__mmask8)-1)) + +#define _mm_mask_fixupimm_ps(A, U, B, C, imm) \ + ((__m128)__builtin_ia32_fixupimmps128_mask((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), \ + (__v4si)(__m128i)(C), (int)(imm), \ + (__mmask8)(U))) + +#define _mm_maskz_fixupimm_ps(U, A, B, C, imm) \ + ((__m128)__builtin_ia32_fixupimmps128_maskz((__v4sf)(__m128)(A), \ + (__v4sf)(__m128)(B), \ + (__v4si)(__m128i)(C), (int)(imm), \ + (__mmask8)(U))) + +#define _mm256_fixupimm_ps(A, B, C, imm) \ + ((__m256)__builtin_ia32_fixupimmps256_mask((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), \ + (__v8si)(__m256i)(C), (int)(imm), \ + (__mmask8)-1)) + +#define _mm256_mask_fixupimm_ps(A, U, B, C, imm) \ + ((__m256)__builtin_ia32_fixupimmps256_mask((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), \ + (__v8si)(__m256i)(C), (int)(imm), \ + (__mmask8)(U))) + +#define _mm256_maskz_fixupimm_ps(U, A, B, C, imm) \ + ((__m256)__builtin_ia32_fixupimmps256_maskz((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), \ + (__v8si)(__m256i)(C), (int)(imm), \ + (__mmask8)(U))) + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_load_pd (__m128d __W, __mmask8 __U, void const *__P) +{ + return (__m128d) __builtin_ia32_loadapd128_mask ((const __v2df *) __P, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_load_pd (__mmask8 __U, void const *__P) +{ + return (__m128d) __builtin_ia32_loadapd128_mask ((const __v2df *) __P, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_load_pd (__m256d __W, __mmask8 __U, void const *__P) +{ + return (__m256d) __builtin_ia32_loadapd256_mask ((const __v4df *) __P, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_load_pd (__mmask8 __U, void const *__P) +{ + return (__m256d) __builtin_ia32_loadapd256_mask ((const __v4df *) __P, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_load_ps (__m128 __W, __mmask8 __U, void const *__P) +{ + return (__m128) __builtin_ia32_loadaps128_mask ((const __v4sf *) __P, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_load_ps (__mmask8 __U, void const *__P) +{ + return (__m128) __builtin_ia32_loadaps128_mask ((const __v4sf *) __P, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_load_ps (__m256 __W, __mmask8 __U, void const *__P) +{ + return (__m256) __builtin_ia32_loadaps256_mask ((const __v8sf *) __P, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_load_ps (__mmask8 __U, void const *__P) +{ + return (__m256) __builtin_ia32_loadaps256_mask ((const __v8sf *) __P, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +static __inline __m128i __DEFAULT_FN_ATTRS128 +_mm_loadu_epi64 (void const *__P) +{ + struct __loadu_epi64 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi64*)__P)->__v; +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_loadu_epi64 (__m128i __W, __mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddqudi128_mask ((const __v2di *) __P, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_loadu_epi64 (__mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddqudi128_mask ((const __v2di *) __P, + (__v2di) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline __m256i __DEFAULT_FN_ATTRS256 +_mm256_loadu_epi64 (void const *__P) +{ + struct __loadu_epi64 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi64*)__P)->__v; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_loadu_epi64 (__m256i __W, __mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddqudi256_mask ((const __v4di *) __P, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_loadu_epi64 (__mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddqudi256_mask ((const __v4di *) __P, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline __m128i __DEFAULT_FN_ATTRS128 +_mm_loadu_epi32 (void const *__P) +{ + struct __loadu_epi32 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi32*)__P)->__v; +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_loadu_epi32 (__m128i __W, __mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddqusi128_mask ((const __v4si *) __P, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_loadu_epi32 (__mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_loaddqusi128_mask ((const __v4si *) __P, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline __m256i __DEFAULT_FN_ATTRS256 +_mm256_loadu_epi32 (void const *__P) +{ + struct __loadu_epi32 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_epi32*)__P)->__v; +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_loadu_epi32 (__m256i __W, __mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddqusi256_mask ((const __v8si *) __P, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_loadu_epi32 (__mmask8 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_loaddqusi256_mask ((const __v8si *) __P, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_loadu_pd (__m128d __W, __mmask8 __U, void const *__P) +{ + return (__m128d) __builtin_ia32_loadupd128_mask ((const __v2df *) __P, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_loadu_pd (__mmask8 __U, void const *__P) +{ + return (__m128d) __builtin_ia32_loadupd128_mask ((const __v2df *) __P, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_loadu_pd (__m256d __W, __mmask8 __U, void const *__P) +{ + return (__m256d) __builtin_ia32_loadupd256_mask ((const __v4df *) __P, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_loadu_pd (__mmask8 __U, void const *__P) +{ + return (__m256d) __builtin_ia32_loadupd256_mask ((const __v4df *) __P, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_loadu_ps (__m128 __W, __mmask8 __U, void const *__P) +{ + return (__m128) __builtin_ia32_loadups128_mask ((const __v4sf *) __P, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_loadu_ps (__mmask8 __U, void const *__P) +{ + return (__m128) __builtin_ia32_loadups128_mask ((const __v4sf *) __P, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_loadu_ps (__m256 __W, __mmask8 __U, void const *__P) +{ + return (__m256) __builtin_ia32_loadups256_mask ((const __v8sf *) __P, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_loadu_ps (__mmask8 __U, void const *__P) +{ + return (__m256) __builtin_ia32_loadups256_mask ((const __v8sf *) __P, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_store_pd (void *__P, __mmask8 __U, __m128d __A) +{ + __builtin_ia32_storeapd128_mask ((__v2df *) __P, + (__v2df) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_store_pd (void *__P, __mmask8 __U, __m256d __A) +{ + __builtin_ia32_storeapd256_mask ((__v4df *) __P, + (__v4df) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_store_ps (void *__P, __mmask8 __U, __m128 __A) +{ + __builtin_ia32_storeaps128_mask ((__v4sf *) __P, + (__v4sf) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_store_ps (void *__P, __mmask8 __U, __m256 __A) +{ + __builtin_ia32_storeaps256_mask ((__v8sf *) __P, + (__v8sf) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS128 +_mm_storeu_epi64 (void *__P, __m128i __A) +{ + struct __storeu_epi64 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi64*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_storeu_epi64 (void *__P, __mmask8 __U, __m128i __A) +{ + __builtin_ia32_storedqudi128_mask ((__v2di *) __P, + (__v2di) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS256 +_mm256_storeu_epi64 (void *__P, __m256i __A) +{ + struct __storeu_epi64 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi64*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_storeu_epi64 (void *__P, __mmask8 __U, __m256i __A) +{ + __builtin_ia32_storedqudi256_mask ((__v4di *) __P, + (__v4di) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS128 +_mm_storeu_epi32 (void *__P, __m128i __A) +{ + struct __storeu_epi32 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi32*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_storeu_epi32 (void *__P, __mmask8 __U, __m128i __A) +{ + __builtin_ia32_storedqusi128_mask ((__v4si *) __P, + (__v4si) __A, + (__mmask8) __U); +} + +static __inline void __DEFAULT_FN_ATTRS256 +_mm256_storeu_epi32 (void *__P, __m256i __A) +{ + struct __storeu_epi32 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_epi32*)__P)->__v = __A; +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_storeu_epi32 (void *__P, __mmask8 __U, __m256i __A) +{ + __builtin_ia32_storedqusi256_mask ((__v8si *) __P, + (__v8si) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_storeu_pd (void *__P, __mmask8 __U, __m128d __A) +{ + __builtin_ia32_storeupd128_mask ((__v2df *) __P, + (__v2df) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_storeu_pd (void *__P, __mmask8 __U, __m256d __A) +{ + __builtin_ia32_storeupd256_mask ((__v4df *) __P, + (__v4df) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_storeu_ps (void *__P, __mmask8 __U, __m128 __A) +{ + __builtin_ia32_storeups128_mask ((__v4sf *) __P, + (__v4sf) __A, + (__mmask8) __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_storeu_ps (void *__P, __mmask8 __U, __m256 __A) +{ + __builtin_ia32_storeups256_mask ((__v8sf *) __P, + (__v8sf) __A, + (__mmask8) __U); +} + + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_unpackhi_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_unpackhi_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_unpackhi_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_unpackhi_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_unpackhi_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_unpackhi_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_unpackhi_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_unpackhi_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_unpacklo_pd(__A, __B), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_unpacklo_pd(__A, __B), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_unpacklo_pd(__A, __B), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_unpacklo_pd(__A, __B), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_unpacklo_ps(__A, __B), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_unpacklo_ps(__A, __B), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_unpacklo_ps(__A, __B), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_unpacklo_ps(__A, __B), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_rcp14_pd (__m128d __A) +{ + return (__m128d) __builtin_ia32_rcp14pd128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_rcp14_pd (__m128d __W, __mmask8 __U, __m128d __A) +{ + return (__m128d) __builtin_ia32_rcp14pd128_mask ((__v2df) __A, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_rcp14_pd (__mmask8 __U, __m128d __A) +{ + return (__m128d) __builtin_ia32_rcp14pd128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_rcp14_pd (__m256d __A) +{ + return (__m256d) __builtin_ia32_rcp14pd256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_rcp14_pd (__m256d __W, __mmask8 __U, __m256d __A) +{ + return (__m256d) __builtin_ia32_rcp14pd256_mask ((__v4df) __A, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_rcp14_pd (__mmask8 __U, __m256d __A) +{ + return (__m256d) __builtin_ia32_rcp14pd256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_rcp14_ps (__m128 __A) +{ + return (__m128) __builtin_ia32_rcp14ps128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_rcp14_ps (__m128 __W, __mmask8 __U, __m128 __A) +{ + return (__m128) __builtin_ia32_rcp14ps128_mask ((__v4sf) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_rcp14_ps (__mmask8 __U, __m128 __A) +{ + return (__m128) __builtin_ia32_rcp14ps128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_rcp14_ps (__m256 __A) +{ + return (__m256) __builtin_ia32_rcp14ps256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_rcp14_ps (__m256 __W, __mmask8 __U, __m256 __A) +{ + return (__m256) __builtin_ia32_rcp14ps256_mask ((__v8sf) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_rcp14_ps (__mmask8 __U, __m256 __A) +{ + return (__m256) __builtin_ia32_rcp14ps256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +#define _mm_mask_permute_pd(W, U, X, C) \ + ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \ + (__v2df)_mm_permute_pd((X), (C)), \ + (__v2df)(__m128d)(W))) + +#define _mm_maskz_permute_pd(U, X, C) \ + ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \ + (__v2df)_mm_permute_pd((X), (C)), \ + (__v2df)_mm_setzero_pd())) + +#define _mm256_mask_permute_pd(W, U, X, C) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_permute_pd((X), (C)), \ + (__v4df)(__m256d)(W))) + +#define _mm256_maskz_permute_pd(U, X, C) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_permute_pd((X), (C)), \ + (__v4df)_mm256_setzero_pd())) + +#define _mm_mask_permute_ps(W, U, X, C) \ + ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \ + (__v4sf)_mm_permute_ps((X), (C)), \ + (__v4sf)(__m128)(W))) + +#define _mm_maskz_permute_ps(U, X, C) \ + ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \ + (__v4sf)_mm_permute_ps((X), (C)), \ + (__v4sf)_mm_setzero_ps())) + +#define _mm256_mask_permute_ps(W, U, X, C) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_permute_ps((X), (C)), \ + (__v8sf)(__m256)(W))) + +#define _mm256_maskz_permute_ps(U, X, C) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_permute_ps((X), (C)), \ + (__v8sf)_mm256_setzero_ps())) + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_permutevar_pd(__A, __C), + (__v2df)__W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C) +{ + return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, + (__v2df)_mm_permutevar_pd(__A, __C), + (__v2df)_mm_setzero_pd()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_permutevar_pd(__A, __C), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_permutevar_pd(__A, __C), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_permutevar_ps(__A, __C), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_permutevar_ps(__A, __C), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_permutevar_ps(__A, __C), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_permutevar_ps(__A, __C), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_test_epi32_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpneq_epi32_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_mask_test_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpneq_epi32_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_test_epi32_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpneq_epi32_mask (_mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_mask_test_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpneq_epi32_mask (__U, _mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_test_epi64_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpneq_epi64_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_mask_test_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpneq_epi64_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_test_epi64_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpneq_epi64_mask (_mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_mask_test_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpneq_epi64_mask (__U, _mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_testn_epi32_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpeq_epi32_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_mask_testn_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpeq_epi32_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_testn_epi32_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpeq_epi32_mask (_mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_mask_testn_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpeq_epi32_mask (__U, _mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_testn_epi64_mask (__m128i __A, __m128i __B) +{ + return _mm_cmpeq_epi64_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 +_mm_mask_testn_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_cmpeq_epi64_mask (__U, _mm_and_si128 (__A, __B), + _mm_setzero_si128()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_testn_epi64_mask (__m256i __A, __m256i __B) +{ + return _mm256_cmpeq_epi64_mask (_mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 +_mm256_mask_testn_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_cmpeq_epi64_mask (__U, _mm256_and_si256 (__A, __B), + _mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_unpackhi_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_unpackhi_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_unpackhi_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_unpackhi_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_unpackhi_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_unpackhi_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_unpackhi_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_unpackhi_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_unpacklo_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_unpacklo_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_unpacklo_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_unpacklo_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_unpacklo_epi64(__A, __B), + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, + (__v2di)_mm_unpacklo_epi64(__A, __B), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_unpacklo_epi64(__A, __B), + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, + (__v4di)_mm256_unpacklo_epi64(__A, __B), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sra_epi32(__A, __B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_sra_epi32(__A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sra_epi32(__A, __B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_sra_epi32(__A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srai_epi32(__A, (int)__B), + (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, + (__v4si)_mm_srai_epi32(__A, (int)__B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srai_epi32(__A, (int)__B), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, + (__v8si)_mm256_srai_epi32(__A, (int)__B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_sra_epi64(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_psraq128((__v2di)__A, (__v2di)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ + (__v2di)_mm_sra_epi64(__A, __B), \ + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ + (__v2di)_mm_sra_epi64(__A, __B), \ + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_sra_epi64(__m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_psraq256((__v4di) __A, (__v2di) __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ + (__v4di)_mm256_sra_epi64(__A, __B), \ + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ + (__v4di)_mm256_sra_epi64(__A, __B), \ + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_srai_epi64(__m128i __A, unsigned int __imm) +{ + return (__m128i)__builtin_ia32_psraqi128((__v2di)__A, (int)__imm); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_srai_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ + (__v2di)_mm_srai_epi64(__A, __imm), \ + (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm) +{ + return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ + (__v2di)_mm_srai_epi64(__A, __imm), \ + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_srai_epi64(__m256i __A, unsigned int __imm) +{ + return (__m256i)__builtin_ia32_psraqi256((__v4di)__A, (int)__imm); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A, + unsigned int __imm) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ + (__v4di)_mm256_srai_epi64(__A, __imm), \ + (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ + (__v4di)_mm256_srai_epi64(__A, __imm), \ + (__v4di)_mm256_setzero_si256()); +} + +#define _mm_ternarylogic_epi32(A, B, C, imm) \ + ((__m128i)__builtin_ia32_pternlogd128_mask( \ + (__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), \ + (unsigned char)(imm), (__mmask8)-1)) + +#define _mm_mask_ternarylogic_epi32(A, U, B, C, imm) \ + ((__m128i)__builtin_ia32_pternlogd128_mask( \ + (__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm_maskz_ternarylogic_epi32(U, A, B, C, imm) \ + ((__m128i)__builtin_ia32_pternlogd128_maskz( \ + (__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm256_ternarylogic_epi32(A, B, C, imm) \ + ((__m256i)__builtin_ia32_pternlogd256_mask( \ + (__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), \ + (unsigned char)(imm), (__mmask8)-1)) + +#define _mm256_mask_ternarylogic_epi32(A, U, B, C, imm) \ + ((__m256i)__builtin_ia32_pternlogd256_mask( \ + (__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm256_maskz_ternarylogic_epi32(U, A, B, C, imm) \ + ((__m256i)__builtin_ia32_pternlogd256_maskz( \ + (__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm_ternarylogic_epi64(A, B, C, imm) \ + ((__m128i)__builtin_ia32_pternlogq128_mask( \ + (__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), \ + (unsigned char)(imm), (__mmask8)-1)) + +#define _mm_mask_ternarylogic_epi64(A, U, B, C, imm) \ + ((__m128i)__builtin_ia32_pternlogq128_mask( \ + (__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm_maskz_ternarylogic_epi64(U, A, B, C, imm) \ + ((__m128i)__builtin_ia32_pternlogq128_maskz( \ + (__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm256_ternarylogic_epi64(A, B, C, imm) \ + ((__m256i)__builtin_ia32_pternlogq256_mask( \ + (__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), \ + (unsigned char)(imm), (__mmask8)-1)) + +#define _mm256_mask_ternarylogic_epi64(A, U, B, C, imm) \ + ((__m256i)__builtin_ia32_pternlogq256_mask( \ + (__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm256_maskz_ternarylogic_epi64(U, A, B, C, imm) \ + ((__m256i)__builtin_ia32_pternlogq256_maskz( \ + (__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), \ + (unsigned char)(imm), (__mmask8)(U))) + +#define _mm256_shuffle_f32x4(A, B, imm) \ + ((__m256)__builtin_ia32_shuf_f32x4_256((__v8sf)(__m256)(A), \ + (__v8sf)(__m256)(B), (int)(imm))) + +#define _mm256_mask_shuffle_f32x4(W, U, A, B, imm) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_shuffle_f32x4((A), (B), (imm)), \ + (__v8sf)(__m256)(W))) + +#define _mm256_maskz_shuffle_f32x4(U, A, B, imm) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_shuffle_f32x4((A), (B), (imm)), \ + (__v8sf)_mm256_setzero_ps())) + +#define _mm256_shuffle_f64x2(A, B, imm) \ + ((__m256d)__builtin_ia32_shuf_f64x2_256((__v4df)(__m256d)(A), \ + (__v4df)(__m256d)(B), (int)(imm))) + +#define _mm256_mask_shuffle_f64x2(W, U, A, B, imm) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_shuffle_f64x2((A), (B), (imm)), \ + (__v4df)(__m256d)(W))) + +#define _mm256_maskz_shuffle_f64x2(U, A, B, imm) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_shuffle_f64x2((A), (B), (imm)), \ + (__v4df)_mm256_setzero_pd())) + +#define _mm256_shuffle_i32x4(A, B, imm) \ + ((__m256i)__builtin_ia32_shuf_i32x4_256((__v8si)(__m256i)(A), \ + (__v8si)(__m256i)(B), (int)(imm))) + +#define _mm256_mask_shuffle_i32x4(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shuffle_i32x4((A), (B), (imm)), \ + (__v8si)(__m256i)(W))) + +#define _mm256_maskz_shuffle_i32x4(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shuffle_i32x4((A), (B), (imm)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm256_shuffle_i64x2(A, B, imm) \ + ((__m256i)__builtin_ia32_shuf_i64x2_256((__v4di)(__m256i)(A), \ + (__v4di)(__m256i)(B), (int)(imm))) + +#define _mm256_mask_shuffle_i64x2(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_shuffle_i64x2((A), (B), (imm)), \ + (__v4di)(__m256i)(W))) + + +#define _mm256_maskz_shuffle_i64x2(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_shuffle_i64x2((A), (B), (imm)), \ + (__v4di)_mm256_setzero_si256())) + +#define _mm_mask_shuffle_pd(W, U, A, B, M) \ + ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \ + (__v2df)_mm_shuffle_pd((A), (B), (M)), \ + (__v2df)(__m128d)(W))) + +#define _mm_maskz_shuffle_pd(U, A, B, M) \ + ((__m128d)__builtin_ia32_selectpd_128((__mmask8)(U), \ + (__v2df)_mm_shuffle_pd((A), (B), (M)), \ + (__v2df)_mm_setzero_pd())) + +#define _mm256_mask_shuffle_pd(W, U, A, B, M) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_shuffle_pd((A), (B), (M)), \ + (__v4df)(__m256d)(W))) + +#define _mm256_maskz_shuffle_pd(U, A, B, M) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_shuffle_pd((A), (B), (M)), \ + (__v4df)_mm256_setzero_pd())) + +#define _mm_mask_shuffle_ps(W, U, A, B, M) \ + ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \ + (__v4sf)_mm_shuffle_ps((A), (B), (M)), \ + (__v4sf)(__m128)(W))) + +#define _mm_maskz_shuffle_ps(U, A, B, M) \ + ((__m128)__builtin_ia32_selectps_128((__mmask8)(U), \ + (__v4sf)_mm_shuffle_ps((A), (B), (M)), \ + (__v4sf)_mm_setzero_ps())) + +#define _mm256_mask_shuffle_ps(W, U, A, B, M) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_shuffle_ps((A), (B), (M)), \ + (__v8sf)(__m256)(W))) + +#define _mm256_maskz_shuffle_ps(U, A, B, M) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_shuffle_ps((A), (B), (M)), \ + (__v8sf)_mm256_setzero_ps())) + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_rsqrt14_pd (__m128d __A) +{ + return (__m128d) __builtin_ia32_rsqrt14pd128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_rsqrt14_pd (__m128d __W, __mmask8 __U, __m128d __A) +{ + return (__m128d) __builtin_ia32_rsqrt14pd128_mask ((__v2df) __A, + (__v2df) __W, + (__mmask8) __U); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_rsqrt14_pd (__mmask8 __U, __m128d __A) +{ + return (__m128d) __builtin_ia32_rsqrt14pd128_mask ((__v2df) __A, + (__v2df) + _mm_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_rsqrt14_pd (__m256d __A) +{ + return (__m256d) __builtin_ia32_rsqrt14pd256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) -1); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_rsqrt14_pd (__m256d __W, __mmask8 __U, __m256d __A) +{ + return (__m256d) __builtin_ia32_rsqrt14pd256_mask ((__v4df) __A, + (__v4df) __W, + (__mmask8) __U); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_rsqrt14_pd (__mmask8 __U, __m256d __A) +{ + return (__m256d) __builtin_ia32_rsqrt14pd256_mask ((__v4df) __A, + (__v4df) + _mm256_setzero_pd (), + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_rsqrt14_ps (__m128 __A) +{ + return (__m128) __builtin_ia32_rsqrt14ps128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_rsqrt14_ps (__m128 __W, __mmask8 __U, __m128 __A) +{ + return (__m128) __builtin_ia32_rsqrt14ps128_mask ((__v4sf) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_rsqrt14_ps (__mmask8 __U, __m128 __A) +{ + return (__m128) __builtin_ia32_rsqrt14ps128_mask ((__v4sf) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_rsqrt14_ps (__m256 __A) +{ + return (__m256) __builtin_ia32_rsqrt14ps256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) -1); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_rsqrt14_ps (__m256 __W, __mmask8 __U, __m256 __A) +{ + return (__m256) __builtin_ia32_rsqrt14ps256_mask ((__v8sf) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_rsqrt14_ps (__mmask8 __U, __m256 __A) +{ + return (__m256) __builtin_ia32_rsqrt14ps256_mask ((__v8sf) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_broadcast_f32x4(__m128 __A) +{ + return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, + 0, 1, 2, 3, 0, 1, 2, 3); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, + (__v8sf)_mm256_broadcast_f32x4(__A), + (__v8sf)__O); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcast_f32x4 (__mmask8 __M, __m128 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, + (__v8sf)_mm256_broadcast_f32x4(__A), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_broadcast_i32x4(__m128i __A) +{ + return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, + 0, 1, 2, 3, 0, 1, 2, 3); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_broadcast_i32x4(__A), + (__v8si)__O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_broadcast_i32x4(__A), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcastsd_pd (__m256d __O, __mmask8 __M, __m128d __A) +{ + return (__m256d)__builtin_ia32_selectpd_256(__M, + (__v4df) _mm256_broadcastsd_pd(__A), + (__v4df) __O); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcastsd_pd (__mmask8 __M, __m128d __A) +{ + return (__m256d)__builtin_ia32_selectpd_256(__M, + (__v4df) _mm256_broadcastsd_pd(__A), + (__v4df) _mm256_setzero_pd()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_broadcastss_ps (__m128 __O, __mmask8 __M, __m128 __A) +{ + return (__m128)__builtin_ia32_selectps_128(__M, + (__v4sf) _mm_broadcastss_ps(__A), + (__v4sf) __O); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_broadcastss_ps (__mmask8 __M, __m128 __A) +{ + return (__m128)__builtin_ia32_selectps_128(__M, + (__v4sf) _mm_broadcastss_ps(__A), + (__v4sf) _mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcastss_ps (__m256 __O, __mmask8 __M, __m128 __A) +{ + return (__m256)__builtin_ia32_selectps_256(__M, + (__v8sf) _mm256_broadcastss_ps(__A), + (__v8sf) __O); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcastss_ps (__mmask8 __M, __m128 __A) +{ + return (__m256)__builtin_ia32_selectps_256(__M, + (__v8sf) _mm256_broadcastss_ps(__A), + (__v8sf) _mm256_setzero_ps()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_broadcastd_epi32 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128(__M, + (__v4si) _mm_broadcastd_epi32(__A), + (__v4si) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_broadcastd_epi32 (__mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectd_128(__M, + (__v4si) _mm_broadcastd_epi32(__A), + (__v4si) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcastd_epi32 (__m256i __O, __mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectd_256(__M, + (__v8si) _mm256_broadcastd_epi32(__A), + (__v8si) __O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcastd_epi32 (__mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectd_256(__M, + (__v8si) _mm256_broadcastd_epi32(__A), + (__v8si) _mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_broadcastq_epi64 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectq_128(__M, + (__v2di) _mm_broadcastq_epi64(__A), + (__v2di) __O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A) +{ + return (__m128i)__builtin_ia32_selectq_128(__M, + (__v2di) _mm_broadcastq_epi64(__A), + (__v2di) _mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_broadcastq_epi64 (__m256i __O, __mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectq_256(__M, + (__v4di) _mm256_broadcastq_epi64(__A), + (__v4di) __O); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A) +{ + return (__m256i)__builtin_ia32_selectq_256(__M, + (__v4di) _mm256_broadcastq_epi64(__A), + (__v4di) _mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtsepi32_epi8 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi32_epi8 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtsepi32_epi8 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsdb128_mask ((__v4si) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi32_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovsdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtsepi32_epi8 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsdb256_mask ((__v8si) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsdb256_mask ((__v8si) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtsepi32_epi8 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsdb256_mask ((__v8si) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi32_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovsdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtsepi32_epi16 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A, + (__v8hi)_mm_setzero_si128 (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi32_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A, + (__v8hi)__O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtsepi32_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsdw128_mask ((__v4si) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi32_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovsdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtsepi32_epi16 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsdw256_mask ((__v8si) __A, + (__v8hi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi32_epi16 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsdw256_mask ((__v8si) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtsepi32_epi16 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsdw256_mask ((__v8si) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi32_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovsdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtsepi64_epi8 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqb128_mask ((__v2di) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi64_epi8 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqb128_mask ((__v2di) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtsepi64_epi8 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqb128_mask ((__v2di) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi64_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovsqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtsepi64_epi8 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqb256_mask ((__v4di) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi64_epi8 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqb256_mask ((__v4di) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtsepi64_epi8 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqb256_mask ((__v4di) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi64_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovsqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtsepi64_epi32 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqd128_mask ((__v2di) __A, + (__v4si)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi64_epi32 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqd128_mask ((__v2di) __A, + (__v4si) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtsepi64_epi32 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqd128_mask ((__v2di) __A, + (__v4si) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi64_storeu_epi32 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovsqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtsepi64_epi32 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqd256_mask ((__v4di) __A, + (__v4si)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqd256_mask ((__v4di) __A, + (__v4si)__O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtsepi64_epi32 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqd256_mask ((__v4di) __A, + (__v4si) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi64_storeu_epi32 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovsqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtsepi64_epi16 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqw128_mask ((__v2di) __A, + (__v8hi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi64_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqw128_mask ((__v2di) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtsepi64_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovsqw128_mask ((__v2di) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtsepi64_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovsqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtsepi64_epi16 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqw256_mask ((__v4di) __A, + (__v8hi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi64_epi16 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqw256_mask ((__v4di) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtsepi64_epi16 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovsqw256_mask ((__v4di) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtsepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovsqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtusepi32_epi8 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi32_epi8 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtusepi32_epi8 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusdb128_mask ((__v4si) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi32_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovusdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtusepi32_epi8 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusdb256_mask ((__v8si) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusdb256_mask ((__v8si) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtusepi32_epi8 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusdb256_mask ((__v8si) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi32_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovusdb256mem_mask ((__v16qi*) __P, (__v8si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtusepi32_epi16 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A, + (__v8hi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi32_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtusepi32_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusdw128_mask ((__v4si) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi32_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovusdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtusepi32_epi16 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusdw256_mask ((__v8si) __A, + (__v8hi) _mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi32_epi16 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusdw256_mask ((__v8si) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtusepi32_epi16 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusdw256_mask ((__v8si) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi32_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovusdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtusepi64_epi8 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqb128_mask ((__v2di) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi64_epi8 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqb128_mask ((__v2di) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtusepi64_epi8 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqb128_mask ((__v2di) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi64_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovusqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtusepi64_epi8 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqb256_mask ((__v4di) __A, + (__v16qi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi64_epi8 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqb256_mask ((__v4di) __A, + (__v16qi) __O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtusepi64_epi8 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqb256_mask ((__v4di) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi64_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovusqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtusepi64_epi32 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqd128_mask ((__v2di) __A, + (__v4si)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi64_epi32 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqd128_mask ((__v2di) __A, + (__v4si) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtusepi64_epi32 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqd128_mask ((__v2di) __A, + (__v4si) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi64_storeu_epi32 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovusqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtusepi64_epi32 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqd256_mask ((__v4di) __A, + (__v4si)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqd256_mask ((__v4di) __A, + (__v4si) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtusepi64_epi32 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqd256_mask ((__v4di) __A, + (__v4si) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi64_storeu_epi32 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovusqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtusepi64_epi16 (__m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqw128_mask ((__v2di) __A, + (__v8hi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi64_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqw128_mask ((__v2di) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtusepi64_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovusqw128_mask ((__v2di) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtusepi64_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovusqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtusepi64_epi16 (__m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqw256_mask ((__v4di) __A, + (__v8hi)_mm_undefined_si128(), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi64_epi16 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqw256_mask ((__v4di) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtusepi64_epi16 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovusqw256_mask ((__v4di) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtusepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovusqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtepi32_epi8 (__m128i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v4si)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1, + 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_epi8 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi32_epi8 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovdb128_mask ((__v4si) __A, + (__v16qi) + _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtepi32_epi8 (__m256i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v8si)__A, __v8qi), + (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi32_epi8 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtepi32_epi16 (__m128i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v4si)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1, + 2, 3, 4, 5, 6, 7); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi32_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovdw128_mask ((__v4si) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtepi32_epi16 (__m256i __A) +{ + return (__m128i)__builtin_convertvector((__v8si)__A, __v8hi); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_epi16 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovdw256_mask ((__v8si) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi32_epi16 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovdw256_mask ((__v8si) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtepi64_epi8 (__m128i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v2di)__A, __v2qi), (__v2qi){0, 0}, 0, 1, 2, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_epi8 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovqb128_mask ((__v2di) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi64_epi8 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovqb128_mask ((__v2di) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtepi64_epi8 (__m256i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v4di)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1, + 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_epi8 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovqb256_mask ((__v4di) __A, + (__v16qi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi64_epi8 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovqb256_mask ((__v4di) __A, + (__v16qi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtepi64_epi32 (__m128i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v2di)__A, __v2si), (__v2si){0, 0}, 0, 1, 2, 3); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_epi32 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovqd128_mask ((__v2di) __A, + (__v4si) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi64_epi32 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovqd128_mask ((__v2di) __A, + (__v4si) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtepi64_epi32 (__m256i __A) +{ + return (__m128i)__builtin_convertvector((__v4di)__A, __v4si); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm256_cvtepi64_epi32(__A), + (__v4si)__O); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi64_epi32 (__mmask8 __M, __m256i __A) +{ + return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, + (__v4si)_mm256_cvtepi64_epi32(__A), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_cvtepi64_epi16 (__m128i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v2di)__A, __v2hi), (__v2hi){0, 0}, 0, 1, 2, 3, + 3, 3, 3, 3); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_epi16 (__m128i __O, __mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovqw128_mask ((__v2di) __A, + (__v8hi)__O, + __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtepi64_epi16 (__mmask8 __M, __m128i __A) +{ + return (__m128i) __builtin_ia32_pmovqw128_mask ((__v2di) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) +{ + __builtin_ia32_pmovqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_cvtepi64_epi16 (__m256i __A) +{ + return (__m128i)__builtin_shufflevector( + __builtin_convertvector((__v4di)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1, + 2, 3, 4, 5, 6, 7); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_epi16 (__m128i __O, __mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovqw256_mask ((__v4di) __A, + (__v8hi) __O, __M); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtepi64_epi16 (__mmask8 __M, __m256i __A) +{ + return (__m128i) __builtin_ia32_pmovqw256_mask ((__v4di) __A, + (__v8hi) _mm_setzero_si128 (), + __M); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) +{ + __builtin_ia32_pmovqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M); +} + +#define _mm256_extractf32x4_ps(A, imm) \ + ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \ + (int)(imm), \ + (__v4sf)_mm_undefined_ps(), \ + (__mmask8)-1)) + +#define _mm256_mask_extractf32x4_ps(W, U, A, imm) \ + ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \ + (int)(imm), \ + (__v4sf)(__m128)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_extractf32x4_ps(U, A, imm) \ + ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \ + (int)(imm), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm256_extracti32x4_epi32(A, imm) \ + ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \ + (int)(imm), \ + (__v4si)_mm_undefined_si128(), \ + (__mmask8)-1)) + +#define _mm256_mask_extracti32x4_epi32(W, U, A, imm) \ + ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \ + (int)(imm), \ + (__v4si)(__m128i)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_extracti32x4_epi32(U, A, imm) \ + ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \ + (int)(imm), \ + (__v4si)_mm_setzero_si128(), \ + (__mmask8)(U))) + +#define _mm256_insertf32x4(A, B, imm) \ + ((__m256)__builtin_ia32_insertf32x4_256((__v8sf)(__m256)(A), \ + (__v4sf)(__m128)(B), (int)(imm))) + +#define _mm256_mask_insertf32x4(W, U, A, B, imm) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_insertf32x4((A), (B), (imm)), \ + (__v8sf)(__m256)(W))) + +#define _mm256_maskz_insertf32x4(U, A, B, imm) \ + ((__m256)__builtin_ia32_selectps_256((__mmask8)(U), \ + (__v8sf)_mm256_insertf32x4((A), (B), (imm)), \ + (__v8sf)_mm256_setzero_ps())) + +#define _mm256_inserti32x4(A, B, imm) \ + ((__m256i)__builtin_ia32_inserti32x4_256((__v8si)(__m256i)(A), \ + (__v4si)(__m128i)(B), (int)(imm))) + +#define _mm256_mask_inserti32x4(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_inserti32x4((A), (B), (imm)), \ + (__v8si)(__m256i)(W))) + +#define _mm256_maskz_inserti32x4(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_inserti32x4((A), (B), (imm)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_getmant_pd(A, B, C) \ + ((__m128d)__builtin_ia32_getmantpd128_mask((__v2df)(__m128d)(A), \ + (int)(((C)<<2) | (B)), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)-1)) + +#define _mm_mask_getmant_pd(W, U, A, B, C) \ + ((__m128d)__builtin_ia32_getmantpd128_mask((__v2df)(__m128d)(A), \ + (int)(((C)<<2) | (B)), \ + (__v2df)(__m128d)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_getmant_pd(U, A, B, C) \ + ((__m128d)__builtin_ia32_getmantpd128_mask((__v2df)(__m128d)(A), \ + (int)(((C)<<2) | (B)), \ + (__v2df)_mm_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm256_getmant_pd(A, B, C) \ + ((__m256d)__builtin_ia32_getmantpd256_mask((__v4df)(__m256d)(A), \ + (int)(((C)<<2) | (B)), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)-1)) + +#define _mm256_mask_getmant_pd(W, U, A, B, C) \ + ((__m256d)__builtin_ia32_getmantpd256_mask((__v4df)(__m256d)(A), \ + (int)(((C)<<2) | (B)), \ + (__v4df)(__m256d)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_getmant_pd(U, A, B, C) \ + ((__m256d)__builtin_ia32_getmantpd256_mask((__v4df)(__m256d)(A), \ + (int)(((C)<<2) | (B)), \ + (__v4df)_mm256_setzero_pd(), \ + (__mmask8)(U))) + +#define _mm_getmant_ps(A, B, C) \ + ((__m128)__builtin_ia32_getmantps128_mask((__v4sf)(__m128)(A), \ + (int)(((C)<<2) | (B)), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm_mask_getmant_ps(W, U, A, B, C) \ + ((__m128)__builtin_ia32_getmantps128_mask((__v4sf)(__m128)(A), \ + (int)(((C)<<2) | (B)), \ + (__v4sf)(__m128)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_getmant_ps(U, A, B, C) \ + ((__m128)__builtin_ia32_getmantps128_mask((__v4sf)(__m128)(A), \ + (int)(((C)<<2) | (B)), \ + (__v4sf)_mm_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm256_getmant_ps(A, B, C) \ + ((__m256)__builtin_ia32_getmantps256_mask((__v8sf)(__m256)(A), \ + (int)(((C)<<2) | (B)), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)-1)) + +#define _mm256_mask_getmant_ps(W, U, A, B, C) \ + ((__m256)__builtin_ia32_getmantps256_mask((__v8sf)(__m256)(A), \ + (int)(((C)<<2) | (B)), \ + (__v8sf)(__m256)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_getmant_ps(U, A, B, C) \ + ((__m256)__builtin_ia32_getmantps256_mask((__v8sf)(__m256)(A), \ + (int)(((C)<<2) | (B)), \ + (__v8sf)_mm256_setzero_ps(), \ + (__mmask8)(U))) + +#define _mm_mmask_i64gather_pd(v1_old, mask, index, addr, scale) \ + ((__m128d)__builtin_ia32_gather3div2df((__v2df)(__m128d)(v1_old), \ + (void const *)(addr), \ + (__v2di)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i64gather_epi64(v1_old, mask, index, addr, scale) \ + ((__m128i)__builtin_ia32_gather3div2di((__v2di)(__m128i)(v1_old), \ + (void const *)(addr), \ + (__v2di)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i64gather_pd(v1_old, mask, index, addr, scale) \ + ((__m256d)__builtin_ia32_gather3div4df((__v4df)(__m256d)(v1_old), \ + (void const *)(addr), \ + (__v4di)(__m256i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i64gather_epi64(v1_old, mask, index, addr, scale) \ + ((__m256i)__builtin_ia32_gather3div4di((__v4di)(__m256i)(v1_old), \ + (void const *)(addr), \ + (__v4di)(__m256i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i64gather_ps(v1_old, mask, index, addr, scale) \ + ((__m128)__builtin_ia32_gather3div4sf((__v4sf)(__m128)(v1_old), \ + (void const *)(addr), \ + (__v2di)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i64gather_epi32(v1_old, mask, index, addr, scale) \ + ((__m128i)__builtin_ia32_gather3div4si((__v4si)(__m128i)(v1_old), \ + (void const *)(addr), \ + (__v2di)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i64gather_ps(v1_old, mask, index, addr, scale) \ + ((__m128)__builtin_ia32_gather3div8sf((__v4sf)(__m128)(v1_old), \ + (void const *)(addr), \ + (__v4di)(__m256i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i64gather_epi32(v1_old, mask, index, addr, scale) \ + ((__m128i)__builtin_ia32_gather3div8si((__v4si)(__m128i)(v1_old), \ + (void const *)(addr), \ + (__v4di)(__m256i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i32gather_pd(v1_old, mask, index, addr, scale) \ + ((__m128d)__builtin_ia32_gather3siv2df((__v2df)(__m128d)(v1_old), \ + (void const *)(addr), \ + (__v4si)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i32gather_epi64(v1_old, mask, index, addr, scale) \ + ((__m128i)__builtin_ia32_gather3siv2di((__v2di)(__m128i)(v1_old), \ + (void const *)(addr), \ + (__v4si)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i32gather_pd(v1_old, mask, index, addr, scale) \ + ((__m256d)__builtin_ia32_gather3siv4df((__v4df)(__m256d)(v1_old), \ + (void const *)(addr), \ + (__v4si)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i32gather_epi64(v1_old, mask, index, addr, scale) \ + ((__m256i)__builtin_ia32_gather3siv4di((__v4di)(__m256i)(v1_old), \ + (void const *)(addr), \ + (__v4si)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i32gather_ps(v1_old, mask, index, addr, scale) \ + ((__m128)__builtin_ia32_gather3siv4sf((__v4sf)(__m128)(v1_old), \ + (void const *)(addr), \ + (__v4si)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm_mmask_i32gather_epi32(v1_old, mask, index, addr, scale) \ + ((__m128i)__builtin_ia32_gather3siv4si((__v4si)(__m128i)(v1_old), \ + (void const *)(addr), \ + (__v4si)(__m128i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i32gather_ps(v1_old, mask, index, addr, scale) \ + ((__m256)__builtin_ia32_gather3siv8sf((__v8sf)(__m256)(v1_old), \ + (void const *)(addr), \ + (__v8si)(__m256i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_mmask_i32gather_epi32(v1_old, mask, index, addr, scale) \ + ((__m256i)__builtin_ia32_gather3siv8si((__v8si)(__m256i)(v1_old), \ + (void const *)(addr), \ + (__v8si)(__m256i)(index), \ + (__mmask8)(mask), (int)(scale))) + +#define _mm256_permutex_pd(X, C) \ + ((__m256d)__builtin_ia32_permdf256((__v4df)(__m256d)(X), (int)(C))) + +#define _mm256_mask_permutex_pd(W, U, X, C) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_permutex_pd((X), (C)), \ + (__v4df)(__m256d)(W))) + +#define _mm256_maskz_permutex_pd(U, X, C) \ + ((__m256d)__builtin_ia32_selectpd_256((__mmask8)(U), \ + (__v4df)_mm256_permutex_pd((X), (C)), \ + (__v4df)_mm256_setzero_pd())) + +#define _mm256_permutex_epi64(X, C) \ + ((__m256i)__builtin_ia32_permdi256((__v4di)(__m256i)(X), (int)(C))) + +#define _mm256_mask_permutex_epi64(W, U, X, C) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_permutex_epi64((X), (C)), \ + (__v4di)(__m256i)(W))) + +#define _mm256_maskz_permutex_epi64(U, X, C) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_permutex_epi64((X), (C)), \ + (__v4di)_mm256_setzero_si256())) + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_permutexvar_pd (__m256i __X, __m256d __Y) +{ + return (__m256d)__builtin_ia32_permvardf256((__v4df)__Y, (__v4di)__X); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_permutexvar_pd (__m256d __W, __mmask8 __U, __m256i __X, + __m256d __Y) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_permutexvar_pd(__X, __Y), + (__v4df)__W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutexvar_pd (__mmask8 __U, __m256i __X, __m256d __Y) +{ + return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, + (__v4df)_mm256_permutexvar_pd(__X, __Y), + (__v4df)_mm256_setzero_pd()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_permutexvar_epi64 ( __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_permvardi256((__v4di) __Y, (__v4di) __X); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutexvar_epi64 (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_permutexvar_epi64(__X, __Y), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X, + __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, + (__v4di)_mm256_permutexvar_epi64(__X, __Y), + (__v4di)__W); +} + +#define _mm256_permutexvar_ps(A, B) _mm256_permutevar8x32_ps((B), (A)) + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_permutexvar_ps(__X, __Y), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_permutexvar_ps(__X, __Y), + (__v8sf)_mm256_setzero_ps()); +} + +#define _mm256_permutexvar_epi32(A, B) _mm256_permutevar8x32_epi32((B), (A)) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X, + __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_permutexvar_epi32(__X, __Y), + (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, + (__v8si)_mm256_permutexvar_epi32(__X, __Y), + (__v8si)_mm256_setzero_si256()); +} + +#define _mm_alignr_epi32(A, B, imm) \ + ((__m128i)__builtin_ia32_alignd128((__v4si)(__m128i)(A), \ + (__v4si)(__m128i)(B), (int)(imm))) + +#define _mm_mask_alignr_epi32(W, U, A, B, imm) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_alignr_epi32((A), (B), (imm)), \ + (__v4si)(__m128i)(W))) + +#define _mm_maskz_alignr_epi32(U, A, B, imm) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_alignr_epi32((A), (B), (imm)), \ + (__v4si)_mm_setzero_si128())) + +#define _mm256_alignr_epi32(A, B, imm) \ + ((__m256i)__builtin_ia32_alignd256((__v8si)(__m256i)(A), \ + (__v8si)(__m256i)(B), (int)(imm))) + +#define _mm256_mask_alignr_epi32(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_alignr_epi32((A), (B), (imm)), \ + (__v8si)(__m256i)(W))) + +#define _mm256_maskz_alignr_epi32(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_alignr_epi32((A), (B), (imm)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_alignr_epi64(A, B, imm) \ + ((__m128i)__builtin_ia32_alignq128((__v2di)(__m128i)(A), \ + (__v2di)(__m128i)(B), (int)(imm))) + +#define _mm_mask_alignr_epi64(W, U, A, B, imm) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \ + (__v2di)_mm_alignr_epi64((A), (B), (imm)), \ + (__v2di)(__m128i)(W))) + +#define _mm_maskz_alignr_epi64(U, A, B, imm) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \ + (__v2di)_mm_alignr_epi64((A), (B), (imm)), \ + (__v2di)_mm_setzero_si128())) + +#define _mm256_alignr_epi64(A, B, imm) \ + ((__m256i)__builtin_ia32_alignq256((__v4di)(__m256i)(A), \ + (__v4di)(__m256i)(B), (int)(imm))) + +#define _mm256_mask_alignr_epi64(W, U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \ + (__v4di)(__m256i)(W))) + +#define _mm256_maskz_alignr_epi64(U, A, B, imm) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \ + (__v4di)_mm256_setzero_si256())) + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_movehdup_ps (__m128 __W, __mmask8 __U, __m128 __A) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_movehdup_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_movehdup_ps (__mmask8 __U, __m128 __A) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_movehdup_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_movehdup_ps (__m256 __W, __mmask8 __U, __m256 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_movehdup_ps(__A), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_movehdup_ps (__mmask8 __U, __m256 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_movehdup_ps(__A), + (__v8sf)_mm256_setzero_ps()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_moveldup_ps (__m128 __W, __mmask8 __U, __m128 __A) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_moveldup_ps(__A), + (__v4sf)__W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_moveldup_ps (__mmask8 __U, __m128 __A) +{ + return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, + (__v4sf)_mm_moveldup_ps(__A), + (__v4sf)_mm_setzero_ps()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_moveldup_ps (__m256 __W, __mmask8 __U, __m256 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_moveldup_ps(__A), + (__v8sf)__W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A) +{ + return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, + (__v8sf)_mm256_moveldup_ps(__A), + (__v8sf)_mm256_setzero_ps()); +} + +#define _mm256_mask_shuffle_epi32(W, U, A, I) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shuffle_epi32((A), (I)), \ + (__v8si)(__m256i)(W))) + +#define _mm256_maskz_shuffle_epi32(U, A, I) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shuffle_epi32((A), (I)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_mask_shuffle_epi32(W, U, A, I) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_shuffle_epi32((A), (I)), \ + (__v4si)(__m128i)(W))) + +#define _mm_maskz_shuffle_epi32(U, A, I) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_shuffle_epi32((A), (I)), \ + (__v4si)_mm_setzero_si128())) + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_mask_mov_pd (__m128d __W, __mmask8 __U, __m128d __A) +{ + return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U, + (__v2df) __A, + (__v2df) __W); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maskz_mov_pd (__mmask8 __U, __m128d __A) +{ + return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U, + (__v2df) __A, + (__v2df) _mm_setzero_pd ()); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_mask_mov_pd (__m256d __W, __mmask8 __U, __m256d __A) +{ + return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U, + (__v4df) __A, + (__v4df) __W); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maskz_mov_pd (__mmask8 __U, __m256d __A) +{ + return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U, + (__v4df) __A, + (__v4df) _mm256_setzero_pd ()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_mov_ps (__m128 __W, __mmask8 __U, __m128 __A) +{ + return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U, + (__v4sf) __A, + (__v4sf) __W); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_mov_ps (__mmask8 __U, __m128 __A) +{ + return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U, + (__v4sf) __A, + (__v4sf) _mm_setzero_ps ()); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_mov_ps (__m256 __W, __mmask8 __U, __m256 __A) +{ + return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U, + (__v8sf) __A, + (__v8sf) __W); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_mov_ps (__mmask8 __U, __m256 __A) +{ + return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U, + (__v8sf) __A, + (__v8sf) _mm256_setzero_ps ()); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_mask_cvtph_ps (__m128 __W, __mmask8 __U, __m128i __A) +{ + return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maskz_cvtph_ps (__mmask8 __U, __m128i __A) +{ + return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_mask_cvtph_ps (__m256 __W, __mmask8 __U, __m128i __A) +{ + return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A) +{ + return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +#define _mm_mask_cvt_roundps_ph(W, U, A, I) \ + ((__m128i)__builtin_ia32_vcvtps2ph_mask((__v4sf)(__m128)(A), (int)(I), \ + (__v8hi)(__m128i)(W), \ + (__mmask8)(U))) + +#define _mm_maskz_cvt_roundps_ph(U, A, I) \ + ((__m128i)__builtin_ia32_vcvtps2ph_mask((__v4sf)(__m128)(A), (int)(I), \ + (__v8hi)_mm_setzero_si128(), \ + (__mmask8)(U))) + +#define _mm_mask_cvtps_ph _mm_mask_cvt_roundps_ph +#define _mm_maskz_cvtps_ph _mm_maskz_cvt_roundps_ph + +#define _mm256_mask_cvt_roundps_ph(W, U, A, I) \ + ((__m128i)__builtin_ia32_vcvtps2ph256_mask((__v8sf)(__m256)(A), (int)(I), \ + (__v8hi)(__m128i)(W), \ + (__mmask8)(U))) + +#define _mm256_maskz_cvt_roundps_ph(U, A, I) \ + ((__m128i)__builtin_ia32_vcvtps2ph256_mask((__v8sf)(__m256)(A), (int)(I), \ + (__v8hi)_mm_setzero_si128(), \ + (__mmask8)(U))) + +#define _mm256_mask_cvtps_ph _mm256_mask_cvt_roundps_ph +#define _mm256_maskz_cvtps_ph _mm256_maskz_cvt_roundps_ph + + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __AVX512VLINTRIN_H */ diff --git a/llvm/lib/clang/19/include/avx512vlvbmi2intrin.h b/llvm/lib/clang/19/include/avx512vlvbmi2intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..77af2d5cbd2a0e16dfdbeaeb1108f9ebe0db2387 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlvbmi2intrin.h @@ -0,0 +1,695 @@ +/*===------------- avx512vlvbmi2intrin.h - VBMI2 intrinsics -----------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLVBMI2INTRIN_H +#define __AVX512VLVBMI2INTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512vbmi2,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512vbmi2,no-evex512"), \ + __min_vector_width__(256))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __D, + (__v8hi) __S, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_compress_epi16(__mmask8 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __D, + (__v8hi) _mm_setzero_si128(), + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __D, + (__v16qi) __S, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_compress_epi8(__mmask16 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __D, + (__v16qi) _mm_setzero_si128(), + __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_compressstoreu_epi16(void *__P, __mmask8 __U, __m128i __D) +{ + __builtin_ia32_compressstorehi128_mask ((__v8hi *) __P, (__v8hi) __D, + __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_mask_compressstoreu_epi8(void *__P, __mmask16 __U, __m128i __D) +{ + __builtin_ia32_compressstoreqi128_mask ((__v16qi *) __P, (__v16qi) __D, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_expandhi128_mask ((__v8hi) __D, + (__v8hi) __S, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expand_epi16(__mmask8 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_expandhi128_mask ((__v8hi) __D, + (__v8hi) _mm_setzero_si128(), + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_expandqi128_mask ((__v16qi) __D, + (__v16qi) __S, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expand_epi8(__mmask16 __U, __m128i __D) +{ + return (__m128i) __builtin_ia32_expandqi128_mask ((__v16qi) __D, + (__v16qi) _mm_setzero_si128(), + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_expandloadhi128_mask ((const __v8hi *)__P, + (__v8hi) __S, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expandloadu_epi16(__mmask8 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_expandloadhi128_mask ((const __v8hi *)__P, + (__v8hi) _mm_setzero_si128(), + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_expandloadqi128_mask ((const __v16qi *)__P, + (__v16qi) __S, + __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_expandloadu_epi8(__mmask16 __U, void const *__P) +{ + return (__m128i) __builtin_ia32_expandloadqi128_mask ((const __v16qi *)__P, + (__v16qi) _mm_setzero_si128(), + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_compress_epi16(__m256i __S, __mmask16 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_compresshi256_mask ((__v16hi) __D, + (__v16hi) __S, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_compress_epi16(__mmask16 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_compresshi256_mask ((__v16hi) __D, + (__v16hi) _mm256_setzero_si256(), + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_compress_epi8(__m256i __S, __mmask32 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_compressqi256_mask ((__v32qi) __D, + (__v32qi) __S, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_compress_epi8(__mmask32 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_compressqi256_mask ((__v32qi) __D, + (__v32qi) _mm256_setzero_si256(), + __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_compressstoreu_epi16(void *__P, __mmask16 __U, __m256i __D) +{ + __builtin_ia32_compressstorehi256_mask ((__v16hi *) __P, (__v16hi) __D, + __U); +} + +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_mask_compressstoreu_epi8(void *__P, __mmask32 __U, __m256i __D) +{ + __builtin_ia32_compressstoreqi256_mask ((__v32qi *) __P, (__v32qi) __D, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expand_epi16(__m256i __S, __mmask16 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_expandhi256_mask ((__v16hi) __D, + (__v16hi) __S, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expand_epi16(__mmask16 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_expandhi256_mask ((__v16hi) __D, + (__v16hi) _mm256_setzero_si256(), + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expand_epi8(__m256i __S, __mmask32 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_expandqi256_mask ((__v32qi) __D, + (__v32qi) __S, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expand_epi8(__mmask32 __U, __m256i __D) +{ + return (__m256i) __builtin_ia32_expandqi256_mask ((__v32qi) __D, + (__v32qi) _mm256_setzero_si256(), + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expandloadu_epi16(__m256i __S, __mmask16 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_expandloadhi256_mask ((const __v16hi *)__P, + (__v16hi) __S, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expandloadu_epi16(__mmask16 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_expandloadhi256_mask ((const __v16hi *)__P, + (__v16hi) _mm256_setzero_si256(), + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_expandloadu_epi8(__m256i __S, __mmask32 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_expandloadqi256_mask ((const __v32qi *)__P, + (__v32qi) __S, + __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P) +{ + return (__m256i) __builtin_ia32_expandloadqi256_mask ((const __v32qi *)__P, + (__v32qi) _mm256_setzero_si256(), + __U); +} + +#define _mm256_shldi_epi64(A, B, I) \ + ((__m256i)__builtin_ia32_vpshldq256((__v4di)(__m256i)(A), \ + (__v4di)(__m256i)(B), (int)(I))) + +#define _mm256_mask_shldi_epi64(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_shldi_epi64((A), (B), (I)), \ + (__v4di)(__m256i)(S))) + +#define _mm256_maskz_shldi_epi64(U, A, B, I) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_shldi_epi64((A), (B), (I)), \ + (__v4di)_mm256_setzero_si256())) + +#define _mm_shldi_epi64(A, B, I) \ + ((__m128i)__builtin_ia32_vpshldq128((__v2di)(__m128i)(A), \ + (__v2di)(__m128i)(B), (int)(I))) + +#define _mm_mask_shldi_epi64(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \ + (__v2di)_mm_shldi_epi64((A), (B), (I)), \ + (__v2di)(__m128i)(S))) + +#define _mm_maskz_shldi_epi64(U, A, B, I) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \ + (__v2di)_mm_shldi_epi64((A), (B), (I)), \ + (__v2di)_mm_setzero_si128())) + +#define _mm256_shldi_epi32(A, B, I) \ + ((__m256i)__builtin_ia32_vpshldd256((__v8si)(__m256i)(A), \ + (__v8si)(__m256i)(B), (int)(I))) + +#define _mm256_mask_shldi_epi32(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shldi_epi32((A), (B), (I)), \ + (__v8si)(__m256i)(S))) + +#define _mm256_maskz_shldi_epi32(U, A, B, I) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shldi_epi32((A), (B), (I)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_shldi_epi32(A, B, I) \ + ((__m128i)__builtin_ia32_vpshldd128((__v4si)(__m128i)(A), \ + (__v4si)(__m128i)(B), (int)(I))) + +#define _mm_mask_shldi_epi32(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_shldi_epi32((A), (B), (I)), \ + (__v4si)(__m128i)(S))) + +#define _mm_maskz_shldi_epi32(U, A, B, I) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_shldi_epi32((A), (B), (I)), \ + (__v4si)_mm_setzero_si128())) + +#define _mm256_shldi_epi16(A, B, I) \ + ((__m256i)__builtin_ia32_vpshldw256((__v16hi)(__m256i)(A), \ + (__v16hi)(__m256i)(B), (int)(I))) + +#define _mm256_mask_shldi_epi16(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shldi_epi16((A), (B), (I)), \ + (__v16hi)(__m256i)(S))) + +#define _mm256_maskz_shldi_epi16(U, A, B, I) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shldi_epi16((A), (B), (I)), \ + (__v16hi)_mm256_setzero_si256())) + +#define _mm_shldi_epi16(A, B, I) \ + ((__m128i)__builtin_ia32_vpshldw128((__v8hi)(__m128i)(A), \ + (__v8hi)(__m128i)(B), (int)(I))) + +#define _mm_mask_shldi_epi16(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shldi_epi16((A), (B), (I)), \ + (__v8hi)(__m128i)(S))) + +#define _mm_maskz_shldi_epi16(U, A, B, I) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shldi_epi16((A), (B), (I)), \ + (__v8hi)_mm_setzero_si128())) + +#define _mm256_shrdi_epi64(A, B, I) \ + ((__m256i)__builtin_ia32_vpshrdq256((__v4di)(__m256i)(A), \ + (__v4di)(__m256i)(B), (int)(I))) + +#define _mm256_mask_shrdi_epi64(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_shrdi_epi64((A), (B), (I)), \ + (__v4di)(__m256i)(S))) + +#define _mm256_maskz_shrdi_epi64(U, A, B, I) \ + ((__m256i)__builtin_ia32_selectq_256((__mmask8)(U), \ + (__v4di)_mm256_shrdi_epi64((A), (B), (I)), \ + (__v4di)_mm256_setzero_si256())) + +#define _mm_shrdi_epi64(A, B, I) \ + ((__m128i)__builtin_ia32_vpshrdq128((__v2di)(__m128i)(A), \ + (__v2di)(__m128i)(B), (int)(I))) + +#define _mm_mask_shrdi_epi64(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \ + (__v2di)_mm_shrdi_epi64((A), (B), (I)), \ + (__v2di)(__m128i)(S))) + +#define _mm_maskz_shrdi_epi64(U, A, B, I) \ + ((__m128i)__builtin_ia32_selectq_128((__mmask8)(U), \ + (__v2di)_mm_shrdi_epi64((A), (B), (I)), \ + (__v2di)_mm_setzero_si128())) + +#define _mm256_shrdi_epi32(A, B, I) \ + ((__m256i)__builtin_ia32_vpshrdd256((__v8si)(__m256i)(A), \ + (__v8si)(__m256i)(B), (int)(I))) + +#define _mm256_mask_shrdi_epi32(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shrdi_epi32((A), (B), (I)), \ + (__v8si)(__m256i)(S))) + +#define _mm256_maskz_shrdi_epi32(U, A, B, I) \ + ((__m256i)__builtin_ia32_selectd_256((__mmask8)(U), \ + (__v8si)_mm256_shrdi_epi32((A), (B), (I)), \ + (__v8si)_mm256_setzero_si256())) + +#define _mm_shrdi_epi32(A, B, I) \ + ((__m128i)__builtin_ia32_vpshrdd128((__v4si)(__m128i)(A), \ + (__v4si)(__m128i)(B), (int)(I))) + +#define _mm_mask_shrdi_epi32(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_shrdi_epi32((A), (B), (I)), \ + (__v4si)(__m128i)(S))) + +#define _mm_maskz_shrdi_epi32(U, A, B, I) \ + ((__m128i)__builtin_ia32_selectd_128((__mmask8)(U), \ + (__v4si)_mm_shrdi_epi32((A), (B), (I)), \ + (__v4si)_mm_setzero_si128())) + +#define _mm256_shrdi_epi16(A, B, I) \ + ((__m256i)__builtin_ia32_vpshrdw256((__v16hi)(__m256i)(A), \ + (__v16hi)(__m256i)(B), (int)(I))) + +#define _mm256_mask_shrdi_epi16(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shrdi_epi16((A), (B), (I)), \ + (__v16hi)(__m256i)(S))) + +#define _mm256_maskz_shrdi_epi16(U, A, B, I) \ + ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \ + (__v16hi)_mm256_shrdi_epi16((A), (B), (I)), \ + (__v16hi)_mm256_setzero_si256())) + +#define _mm_shrdi_epi16(A, B, I) \ + ((__m128i)__builtin_ia32_vpshrdw128((__v8hi)(__m128i)(A), \ + (__v8hi)(__m128i)(B), (int)(I))) + +#define _mm_mask_shrdi_epi16(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shrdi_epi16((A), (B), (I)), \ + (__v8hi)(__m128i)(S))) + +#define _mm_maskz_shrdi_epi16(U, A, B, I) \ + ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \ + (__v8hi)_mm_shrdi_epi16((A), (B), (I)), \ + (__v8hi)_mm_setzero_si128())) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_shldv_epi64(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_vpshldvq256((__v4di)__A, (__v4di)__B, + (__v4di)__C); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_shldv_epi64(__A, __B, __C), + (__v4di)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_shldv_epi64(__A, __B, __C), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_shldv_epi64(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpshldvq128((__v2di)__A, (__v2di)__B, + (__v2di)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_shldv_epi64(__A, __B, __C), + (__v2di)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_shldv_epi64(__A, __B, __C), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_shldv_epi32(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_vpshldvd256((__v8si)__A, (__v8si)__B, + (__v8si)__C); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_shldv_epi32(__A, __B, __C), + (__v8si)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_shldv_epi32(__A, __B, __C), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_shldv_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpshldvd128((__v4si)__A, (__v4si)__B, + (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_shldv_epi32(__A, __B, __C), + (__v4si)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_shldv_epi32(__A, __B, __C), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_shldv_epi16(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_vpshldvw256((__v16hi)__A, (__v16hi)__B, + (__v16hi)__C); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_shldv_epi16(__A, __B, __C), + (__v16hi)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_shldv_epi16(__A, __B, __C), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_shldv_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpshldvw128((__v8hi)__A, (__v8hi)__B, + (__v8hi)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_shldv_epi16(__A, __B, __C), + (__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_shldv_epi16(__A, __B, __C), + (__v8hi)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_shrdv_epi64(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_vpshrdvq256((__v4di)__A, (__v4di)__B, + (__v4di)__C); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_shrdv_epi64(__A, __B, __C), + (__v4di)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectq_256(__U, + (__v4di)_mm256_shrdv_epi64(__A, __B, __C), + (__v4di)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_shrdv_epi64(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpshrdvq128((__v2di)__A, (__v2di)__B, + (__v2di)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_shrdv_epi64(__A, __B, __C), + (__v2di)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectq_128(__U, + (__v2di)_mm_shrdv_epi64(__A, __B, __C), + (__v2di)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_shrdv_epi32(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_vpshrdvd256((__v8si)__A, (__v8si)__B, + (__v8si)__C); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_shrdv_epi32(__A, __B, __C), + (__v8si)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_shrdv_epi32(__A, __B, __C), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_shrdv_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpshrdvd128((__v4si)__A, (__v4si)__B, + (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_shrdv_epi32(__A, __B, __C), + (__v4si)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_shrdv_epi32(__A, __B, __C), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_shrdv_epi16(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_vpshrdvw256((__v16hi)__A, (__v16hi)__B, + (__v16hi)__C); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_shrdv_epi16(__A, __B, __C), + (__v16hi)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)__builtin_ia32_selectw_256(__U, + (__v16hi)_mm256_shrdv_epi16(__A, __B, __C), + (__v16hi)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_shrdv_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpshrdvw128((__v8hi)__A, (__v8hi)__B, + (__v8hi)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_shrdv_epi16(__A, __B, __C), + (__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_selectw_128(__U, + (__v8hi)_mm_shrdv_epi16(__A, __B, __C), + (__v8hi)_mm_setzero_si128()); +} + + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avx512vlvnniintrin.h b/llvm/lib/clang/19/include/avx512vlvnniintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..d1e5cd9d6983fd2e67b1654790502cf714d079b5 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlvnniintrin.h @@ -0,0 +1,310 @@ +/*===------------- avx512vlvnniintrin.h - VNNI intrinsics ------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VLVNNIINTRIN_H +#define __AVX512VLVNNIINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512vnni,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512vnni,no-evex512"), \ + __min_vector_width__(256))) + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with +/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a S, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3])) +/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +#define _mm256_dpbusd_epi32(S, A, B) \ + ((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v8si)(A), (__v8si)(B))) + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with +/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a S using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3])) +/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +#define _mm256_dpbusds_epi32(S, A, B) \ + ((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v8si)(A), (__v8si)(B))) + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with +/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a S, +/// and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) +/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) +/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +#define _mm256_dpwssd_epi32(S, A, B) \ + ((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v8si)(A), (__v8si)(B))) + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with +/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a S +/// using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) +/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) +/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +#define _mm256_dpwssds_epi32(S, A, B) \ + ((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v8si)(A), (__v8si)(B))) + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with +/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a S, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3])) +/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +#define _mm_dpbusd_epi32(S, A, B) \ + ((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v4si)(A), (__v4si)(B))) + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with +/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a S using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3])) +/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +#define _mm_dpbusds_epi32(S, A, B) \ + ((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v4si)(A), (__v4si)(B))) + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with +/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a S, +/// and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) +/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) +/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +#define _mm_dpwssd_epi32(S, A, B) \ + ((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v4si)(A), (__v4si)(B))) + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with +/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a S +/// using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) +/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) +/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +#define _mm_dpwssds_epi32(S, A, B) \ + ((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v4si)(A), (__v4si)(B))) + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_dpbusd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpbusd_epi32(__S, __A, __B), + (__v8si)__S); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_dpbusd_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpbusd_epi32(__S, __A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_dpbusds_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpbusds_epi32(__S, __A, __B), + (__v8si)__S); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_dpbusds_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpbusds_epi32(__S, __A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_dpwssd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpwssd_epi32(__S, __A, __B), + (__v8si)__S); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_dpwssd_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpwssd_epi32(__S, __A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_dpwssds_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpwssds_epi32(__S, __A, __B), + (__v8si)__S); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_dpwssds_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_selectd_256(__U, + (__v8si)_mm256_dpwssds_epi32(__S, __A, __B), + (__v8si)_mm256_setzero_si256()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpbusd_epi32(__S, __A, __B), + (__v4si)__S); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpbusd_epi32(__S, __A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpbusds_epi32(__S, __A, __B), + (__v4si)__S); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpbusds_epi32(__S, __A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpwssd_epi32(__S, __A, __B), + (__v4si)__S); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpwssd_epi32(__S, __A, __B), + (__v4si)_mm_setzero_si128()); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpwssds_epi32(__S, __A, __B), + (__v4si)__S); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_selectd_128(__U, + (__v4si)_mm_dpwssds_epi32(__S, __A, __B), + (__v4si)_mm_setzero_si128()); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avx512vlvp2intersectintrin.h b/llvm/lib/clang/19/include/avx512vlvp2intersectintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..63a31241a5ede0519a07cbc3799383e55fa23d03 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vlvp2intersectintrin.h @@ -0,0 +1,123 @@ +/*===------ avx512vlvp2intersectintrin.h - VL VP2INTERSECT intrinsics ------=== + * + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef _AVX512VLVP2INTERSECT_H +#define _AVX512VLVP2INTERSECT_H + +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512vp2intersect,no-evex512"), \ + __min_vector_width__(128))) + +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vl,avx512vp2intersect,no-evex512"), \ + __min_vector_width__(256))) +/// Store, in an even/odd pair of mask registers, the indicators of the +/// locations of value matches between dwords in operands __a and __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VP2INTERSECTD instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x i32]. +/// \param __b +/// A 256-bit vector of [8 x i32] +/// \param __m0 +/// A pointer point to 8-bit mask +/// \param __m1 +/// A pointer point to 8-bit mask +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_2intersect_epi32(__m256i __a, __m256i __b, __mmask8 *__m0, __mmask8 *__m1) { + __builtin_ia32_vp2intersect_d_256((__v8si)__a, (__v8si)__b, __m0, __m1); +} + +/// Store, in an even/odd pair of mask registers, the indicators of the +/// locations of value matches between quadwords in operands __a and __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VP2INTERSECTQ instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x i64]. +/// \param __b +/// A 256-bit vector of [4 x i64] +/// \param __m0 +/// A pointer point to 8-bit mask +/// \param __m1 +/// A pointer point to 8-bit mask +static __inline__ void __DEFAULT_FN_ATTRS256 +_mm256_2intersect_epi64(__m256i __a, __m256i __b, __mmask8 *__m0, __mmask8 *__m1) { + __builtin_ia32_vp2intersect_q_256((__v4di)__a, (__v4di)__b, __m0, __m1); +} + +/// Store, in an even/odd pair of mask registers, the indicators of the +/// locations of value matches between dwords in operands __a and __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VP2INTERSECTD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32]. +/// \param __b +/// A 128-bit vector of [4 x i32] +/// \param __m0 +/// A pointer point to 8-bit mask +/// \param __m1 +/// A pointer point to 8-bit mask +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_2intersect_epi32(__m128i __a, __m128i __b, __mmask8 *__m0, __mmask8 *__m1) { + __builtin_ia32_vp2intersect_d_128((__v4si)__a, (__v4si)__b, __m0, __m1); +} + +/// Store, in an even/odd pair of mask registers, the indicators of the +/// locations of value matches between quadwords in operands __a and __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VP2INTERSECTQ instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x i64]. +/// \param __b +/// A 128-bit vector of [2 x i64] +/// \param __m0 +/// A pointer point to 8-bit mask +/// \param __m1 +/// A pointer point to 8-bit mask +static __inline__ void __DEFAULT_FN_ATTRS128 +_mm_2intersect_epi64(__m128i __a, __m128i __b, __mmask8 *__m0, __mmask8 *__m1) { + __builtin_ia32_vp2intersect_q_128((__v2di)__a, (__v2di)__b, __m0, __m1); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avx512vnniintrin.h b/llvm/lib/clang/19/include/avx512vnniintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..0fb381a12f2fd78290645a2c1fb5b7976ea7e7a6 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vnniintrin.h @@ -0,0 +1,116 @@ +/*===------------- avx512vnniintrin.h - VNNI intrinsics ------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVX512VNNIINTRIN_H +#define __AVX512VNNIINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vnni,evex512"), __min_vector_width__(512))) + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_dpbusd_epi32(__m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_vpdpbusd512((__v16si)__S, (__v16si)__A, + (__v16si)__B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_dpbusd_epi32(__m512i __S, __mmask16 __U, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpbusd_epi32(__S, __A, __B), + (__v16si)__S); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_dpbusd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpbusd_epi32(__S, __A, __B), + (__v16si)_mm512_setzero_si512()); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_dpbusds_epi32(__m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_vpdpbusds512((__v16si)__S, (__v16si)__A, + (__v16si)__B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_dpbusds_epi32(__m512i __S, __mmask16 __U, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpbusds_epi32(__S, __A, __B), + (__v16si)__S); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_dpbusds_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpbusds_epi32(__S, __A, __B), + (__v16si)_mm512_setzero_si512()); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_dpwssd_epi32(__m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_vpdpwssd512((__v16si)__S, (__v16si)__A, + (__v16si)__B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_dpwssd_epi32(__m512i __S, __mmask16 __U, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpwssd_epi32(__S, __A, __B), + (__v16si)__S); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_dpwssd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpwssd_epi32(__S, __A, __B), + (__v16si)_mm512_setzero_si512()); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_dpwssds_epi32(__m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_vpdpwssds512((__v16si)__S, (__v16si)__A, + (__v16si)__B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_dpwssds_epi32(__m512i __S, __mmask16 __U, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpwssds_epi32(__S, __A, __B), + (__v16si)__S); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_dpwssds_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_selectd_512(__U, + (__v16si)_mm512_dpwssds_epi32(__S, __A, __B), + (__v16si)_mm512_setzero_si512()); +} + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/avx512vp2intersectintrin.h b/llvm/lib/clang/19/include/avx512vp2intersectintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..16552cae3b4fb90404c99d5d153784e283dab5f4 --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vp2intersectintrin.h @@ -0,0 +1,78 @@ +/*===------- avx512vpintersectintrin.h - VP2INTERSECT intrinsics ------------=== + * + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef _AVX512VP2INTERSECT_H +#define _AVX512VP2INTERSECT_H + +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vp2intersect,evex512"), \ + __min_vector_width__(512))) + +/// Store, in an even/odd pair of mask registers, the indicators of the +/// locations of value matches between dwords in operands __a and __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VP2INTERSECTD instruction. +/// +/// \param __a +/// A 512-bit vector of [16 x i32]. +/// \param __b +/// A 512-bit vector of [16 x i32] +/// \param __m0 +/// A pointer point to 16-bit mask +/// \param __m1 +/// A pointer point to 16-bit mask +static __inline__ void __DEFAULT_FN_ATTRS +_mm512_2intersect_epi32(__m512i __a, __m512i __b, __mmask16 *__m0, __mmask16 *__m1) { + __builtin_ia32_vp2intersect_d_512((__v16si)__a, (__v16si)__b, __m0, __m1); +} + +/// Store, in an even/odd pair of mask registers, the indicators of the +/// locations of value matches between quadwords in operands __a and __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VP2INTERSECTQ instruction. +/// +/// \param __a +/// A 512-bit vector of [8 x i64]. +/// \param __b +/// A 512-bit vector of [8 x i64] +/// \param __m0 +/// A pointer point to 8-bit mask +/// \param __m1 +/// A pointer point to 8-bit mask +static __inline__ void __DEFAULT_FN_ATTRS +_mm512_2intersect_epi64(__m512i __a, __m512i __b, __mmask8 *__m0, __mmask8 *__m1) { + __builtin_ia32_vp2intersect_q_512((__v8di)__a, (__v8di)__b, __m0, __m1); +} + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/avx512vpopcntdqintrin.h b/llvm/lib/clang/19/include/avx512vpopcntdqintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..e73e7e4f713137f884a709c151c0b441145a26ae --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vpopcntdqintrin.h @@ -0,0 +1,56 @@ +/*===----- avx512vpopcntdqintrin.h - AVX512VPOPCNTDQ intrinsics-------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error \ + "Never use directly; include instead." +#endif + +#ifndef __AVX512VPOPCNTDQINTRIN_H +#define __AVX512VPOPCNTDQINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vpopcntdq,evex512"), \ + __min_vector_width__(512))) + +static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi64(__m512i __A) { + return (__m512i)__builtin_ia32_vpopcntq_512((__v8di)__A); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_popcnt_epi64(__m512i __W, __mmask8 __U, __m512i __A) { + return (__m512i)__builtin_ia32_selectq_512( + (__mmask8)__U, (__v8di)_mm512_popcnt_epi64(__A), (__v8di)__W); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_popcnt_epi64(__mmask8 __U, __m512i __A) { + return _mm512_mask_popcnt_epi64((__m512i)_mm512_setzero_si512(), __U, __A); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi32(__m512i __A) { + return (__m512i)__builtin_ia32_vpopcntd_512((__v16si)__A); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_mask_popcnt_epi32(__m512i __W, __mmask16 __U, __m512i __A) { + return (__m512i)__builtin_ia32_selectd_512( + (__mmask16)__U, (__v16si)_mm512_popcnt_epi32(__A), (__v16si)__W); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_maskz_popcnt_epi32(__mmask16 __U, __m512i __A) { + return _mm512_mask_popcnt_epi32((__m512i)_mm512_setzero_si512(), __U, __A); +} + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/avx512vpopcntdqvlintrin.h b/llvm/lib/clang/19/include/avx512vpopcntdqvlintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..b2df2e84d3ed23e186d5eee1a82be2cf01d7768d --- /dev/null +++ b/llvm/lib/clang/19/include/avx512vpopcntdqvlintrin.h @@ -0,0 +1,95 @@ +/*===---- avx512vpopcntdqintrin.h - AVX512VPOPCNTDQ intrinsics -------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error \ + "Never use directly; include instead." +#endif + +#ifndef __AVX512VPOPCNTDQVLINTRIN_H +#define __AVX512VPOPCNTDQVLINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vpopcntdq,avx512vl,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512vpopcntdq,avx512vl,no-evex512"), \ + __min_vector_width__(256))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_popcnt_epi64(__m128i __A) { + return (__m128i)__builtin_ia32_vpopcntq_128((__v2di)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_popcnt_epi64(__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i)__builtin_ia32_selectq_128( + (__mmask8)__U, (__v2di)_mm_popcnt_epi64(__A), (__v2di)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_popcnt_epi64(__mmask8 __U, __m128i __A) { + return _mm_mask_popcnt_epi64((__m128i)_mm_setzero_si128(), __U, __A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_popcnt_epi32(__m128i __A) { + return (__m128i)__builtin_ia32_vpopcntd_128((__v4si)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_mask_popcnt_epi32(__m128i __W, __mmask8 __U, __m128i __A) { + return (__m128i)__builtin_ia32_selectd_128( + (__mmask8)__U, (__v4si)_mm_popcnt_epi32(__A), (__v4si)__W); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_maskz_popcnt_epi32(__mmask8 __U, __m128i __A) { + return _mm_mask_popcnt_epi32((__m128i)_mm_setzero_si128(), __U, __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_popcnt_epi64(__m256i __A) { + return (__m256i)__builtin_ia32_vpopcntq_256((__v4di)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_popcnt_epi64(__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i)__builtin_ia32_selectq_256( + (__mmask8)__U, (__v4di)_mm256_popcnt_epi64(__A), (__v4di)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_popcnt_epi64(__mmask8 __U, __m256i __A) { + return _mm256_mask_popcnt_epi64((__m256i)_mm256_setzero_si256(), __U, __A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_popcnt_epi32(__m256i __A) { + return (__m256i)__builtin_ia32_vpopcntd_256((__v8si)__A); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_mask_popcnt_epi32(__m256i __W, __mmask8 __U, __m256i __A) { + return (__m256i)__builtin_ia32_selectd_256( + (__mmask8)__U, (__v8si)_mm256_popcnt_epi32(__A), (__v8si)__W); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_maskz_popcnt_epi32(__mmask8 __U, __m256i __A) { + return _mm256_mask_popcnt_epi32((__m256i)_mm256_setzero_si256(), __U, __A); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif diff --git a/llvm/lib/clang/19/include/avxifmaintrin.h b/llvm/lib/clang/19/include/avxifmaintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..5c782d2a5b865154a006b81fce348dc8835a1d64 --- /dev/null +++ b/llvm/lib/clang/19/include/avxifmaintrin.h @@ -0,0 +1,177 @@ +/*===----------------- avxifmaintrin.h - IFMA intrinsics -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVXIFMAINTRIN_H +#define __AVXIFMAINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \ + __min_vector_width__(256))) + +// must vex-encoding + +/// Multiply packed unsigned 52-bit integers in each 64-bit element of \a __Y +/// and \a __Z to form a 104-bit intermediate result. Add the high 52-bit +/// unsigned integer from the intermediate result with the corresponding +/// unsigned 64-bit integer in \a __X, and store the results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i +/// _mm_madd52hi_avx_epu64 (__m128i __X, __m128i __Y, __m128i __Z) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPMADD52HUQ instruction. +/// +/// \return +/// return __m128i dst. +/// \param __X +/// A 128-bit vector of [2 x i64] +/// \param __Y +/// A 128-bit vector of [2 x i64] +/// \param __Z +/// A 128-bit vector of [2 x i64] +/// +/// \code{.operation} +/// FOR j := 0 to 1 +/// i := j*64 +/// tmp[127:0] := ZeroExtend64(__Y[i+51:i]) * ZeroExtend64(__Z[i+51:i]) +/// dst[i+63:i] := __X[i+63:i] + ZeroExtend64(tmp[103:52]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_madd52hi_avx_epu64(__m128i __X, __m128i __Y, __m128i __Z) { + return (__m128i)__builtin_ia32_vpmadd52huq128((__v2di)__X, (__v2di)__Y, + (__v2di)__Z); +} + +/// Multiply packed unsigned 52-bit integers in each 64-bit element of \a __Y +/// and \a __Z to form a 104-bit intermediate result. Add the high 52-bit +/// unsigned integer from the intermediate result with the corresponding +/// unsigned 64-bit integer in \a __X, and store the results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i +/// _mm256_madd52hi_avx_epu64 (__m256i __X, __m256i __Y, __m256i __Z) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPMADD52HUQ instruction. +/// +/// \return +/// return __m256i dst. +/// \param __X +/// A 256-bit vector of [4 x i64] +/// \param __Y +/// A 256-bit vector of [4 x i64] +/// \param __Z +/// A 256-bit vector of [4 x i64] +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// i := j*64 +/// tmp[127:0] := ZeroExtend64(__Y[i+51:i]) * ZeroExtend64(__Z[i+51:i]) +/// dst[i+63:i] := __X[i+63:i] + ZeroExtend64(tmp[103:52]) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_madd52hi_avx_epu64(__m256i __X, __m256i __Y, __m256i __Z) { + return (__m256i)__builtin_ia32_vpmadd52huq256((__v4di)__X, (__v4di)__Y, + (__v4di)__Z); +} + +/// Multiply packed unsigned 52-bit integers in each 64-bit element of \a __Y +/// and \a __Z to form a 104-bit intermediate result. Add the low 52-bit +/// unsigned integer from the intermediate result with the corresponding +/// unsigned 64-bit integer in \a __X, and store the results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i +/// _mm_madd52lo_avx_epu64 (__m128i __X, __m128i __Y, __m128i __Z) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPMADD52LUQ instruction. +/// +/// \return +/// return __m128i dst. +/// \param __X +/// A 128-bit vector of [2 x i64] +/// \param __Y +/// A 128-bit vector of [2 x i64] +/// \param __Z +/// A 128-bit vector of [2 x i64] +/// +/// \code{.operation} +/// FOR j := 0 to 1 +/// i := j*64 +/// tmp[127:0] := ZeroExtend64(__Y[i+51:i]) * ZeroExtend64(__Z[i+51:i]) +/// dst[i+63:i] := __X[i+63:i] + ZeroExtend64(tmp[51:0]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_madd52lo_avx_epu64(__m128i __X, __m128i __Y, __m128i __Z) { + return (__m128i)__builtin_ia32_vpmadd52luq128((__v2di)__X, (__v2di)__Y, + (__v2di)__Z); +} + +/// Multiply packed unsigned 52-bit integers in each 64-bit element of \a __Y +/// and \a __Z to form a 104-bit intermediate result. Add the low 52-bit +/// unsigned integer from the intermediate result with the corresponding +/// unsigned 64-bit integer in \a __X, and store the results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i +/// _mm256_madd52lo_avx_epu64 (__m256i __X, __m256i __Y, __m256i __Z) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPMADD52LUQ instruction. +/// +/// \return +/// return __m256i dst. +/// \param __X +/// A 256-bit vector of [4 x i64] +/// \param __Y +/// A 256-bit vector of [4 x i64] +/// \param __Z +/// A 256-bit vector of [4 x i64] +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// i := j*64 +/// tmp[127:0] := ZeroExtend64(__Y[i+51:i]) * ZeroExtend64(__Z[i+51:i]) +/// dst[i+63:i] := __X[i+63:i] + ZeroExtend64(tmp[51:0]) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_madd52lo_avx_epu64(__m256i __X, __m256i __Y, __m256i __Z) { + return (__m256i)__builtin_ia32_vpmadd52luq256((__v4di)__X, (__v4di)__Y, + (__v4di)__Z); +} +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif // __AVXIFMAINTRIN_H diff --git a/llvm/lib/clang/19/include/avxintrin.h b/llvm/lib/clang/19/include/avxintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..4983f3311370014f773499e784560fbd19eb2b46 --- /dev/null +++ b/llvm/lib/clang/19/include/avxintrin.h @@ -0,0 +1,5126 @@ +/*===---- avxintrin.h - AVX intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVXINTRIN_H +#define __AVXINTRIN_H + +typedef double __v4df __attribute__ ((__vector_size__ (32))); +typedef float __v8sf __attribute__ ((__vector_size__ (32))); +typedef long long __v4di __attribute__ ((__vector_size__ (32))); +typedef int __v8si __attribute__ ((__vector_size__ (32))); +typedef short __v16hi __attribute__ ((__vector_size__ (32))); +typedef char __v32qi __attribute__ ((__vector_size__ (32))); + +/* Unsigned types */ +typedef unsigned long long __v4du __attribute__ ((__vector_size__ (32))); +typedef unsigned int __v8su __attribute__ ((__vector_size__ (32))); +typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32))); +typedef unsigned char __v32qu __attribute__ ((__vector_size__ (32))); + +/* We need an explicitly signed variant for char. Note that this shouldn't + * appear in the interface though. */ +typedef signed char __v32qs __attribute__((__vector_size__(32))); + +typedef float __m256 __attribute__ ((__vector_size__ (32), __aligned__(32))); +typedef double __m256d __attribute__((__vector_size__(32), __aligned__(32))); +typedef long long __m256i __attribute__((__vector_size__(32), __aligned__(32))); + +typedef float __m256_u __attribute__ ((__vector_size__ (32), __aligned__(1))); +typedef double __m256d_u __attribute__((__vector_size__(32), __aligned__(1))); +typedef long long __m256i_u __attribute__((__vector_size__(32), __aligned__(1))); + +#ifdef __SSE2__ +/* Both _Float16 and __bf16 require SSE2 being enabled. */ +typedef _Float16 __v16hf __attribute__((__vector_size__(32), __aligned__(32))); +typedef _Float16 __m256h __attribute__((__vector_size__(32), __aligned__(32))); +typedef _Float16 __m256h_u __attribute__((__vector_size__(32), __aligned__(1))); + +typedef __bf16 __v16bf __attribute__((__vector_size__(32), __aligned__(32))); +typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32))); +#endif + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \ + __min_vector_width__(256))) +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \ + __min_vector_width__(128))) + +/* Arithmetic */ +/// Adds two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \returns A 256-bit vector of [4 x double] containing the sums of both +/// operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_add_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4df)__a+(__v4df)__b); +} + +/// Adds two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \returns A 256-bit vector of [8 x float] containing the sums of both +/// operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_add_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8sf)__a+(__v8sf)__b); +} + +/// Subtracts two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSUBPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing the minuend. +/// \param __b +/// A 256-bit vector of [4 x double] containing the subtrahend. +/// \returns A 256-bit vector of [4 x double] containing the differences between +/// both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_sub_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4df)__a-(__v4df)__b); +} + +/// Subtracts two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSUBPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing the minuend. +/// \param __b +/// A 256-bit vector of [8 x float] containing the subtrahend. +/// \returns A 256-bit vector of [8 x float] containing the differences between +/// both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_sub_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8sf)__a-(__v8sf)__b); +} + +/// Adds the even-indexed values and subtracts the odd-indexed values of +/// two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDSUBPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing the left source operand. +/// \param __b +/// A 256-bit vector of [4 x double] containing the right source operand. +/// \returns A 256-bit vector of [4 x double] containing the alternating sums +/// and differences between both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_addsub_pd(__m256d __a, __m256d __b) +{ + return (__m256d)__builtin_ia32_addsubpd256((__v4df)__a, (__v4df)__b); +} + +/// Adds the even-indexed values and subtracts the odd-indexed values of +/// two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDSUBPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing the left source operand. +/// \param __b +/// A 256-bit vector of [8 x float] containing the right source operand. +/// \returns A 256-bit vector of [8 x float] containing the alternating sums and +/// differences between both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_addsub_ps(__m256 __a, __m256 __b) +{ + return (__m256)__builtin_ia32_addsubps256((__v8sf)__a, (__v8sf)__b); +} + +/// Divides two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDIVPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing the dividend. +/// \param __b +/// A 256-bit vector of [4 x double] containing the divisor. +/// \returns A 256-bit vector of [4 x double] containing the quotients of both +/// operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_div_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4df)__a/(__v4df)__b); +} + +/// Divides two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDIVPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing the dividend. +/// \param __b +/// A 256-bit vector of [8 x float] containing the divisor. +/// \returns A 256-bit vector of [8 x float] containing the quotients of both +/// operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_div_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8sf)__a/(__v8sf)__b); +} + +/// Compares two 256-bit vectors of [4 x double] and returns the greater +/// of each pair of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMAXPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the operands. +/// \returns A 256-bit vector of [4 x double] containing the maximum values +/// between both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_max_pd(__m256d __a, __m256d __b) +{ + return (__m256d)__builtin_ia32_maxpd256((__v4df)__a, (__v4df)__b); +} + +/// Compares two 256-bit vectors of [8 x float] and returns the greater +/// of each pair of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMAXPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the operands. +/// \returns A 256-bit vector of [8 x float] containing the maximum values +/// between both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_max_ps(__m256 __a, __m256 __b) +{ + return (__m256)__builtin_ia32_maxps256((__v8sf)__a, (__v8sf)__b); +} + +/// Compares two 256-bit vectors of [4 x double] and returns the lesser +/// of each pair of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMINPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the operands. +/// \returns A 256-bit vector of [4 x double] containing the minimum values +/// between both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_min_pd(__m256d __a, __m256d __b) +{ + return (__m256d)__builtin_ia32_minpd256((__v4df)__a, (__v4df)__b); +} + +/// Compares two 256-bit vectors of [8 x float] and returns the lesser +/// of each pair of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMINPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the operands. +/// \returns A 256-bit vector of [8 x float] containing the minimum values +/// between both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_min_ps(__m256 __a, __m256 __b) +{ + return (__m256)__builtin_ia32_minps256((__v8sf)__a, (__v8sf)__b); +} + +/// Multiplies two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMULPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the operands. +/// \returns A 256-bit vector of [4 x double] containing the products of both +/// operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_mul_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4df)__a * (__v4df)__b); +} + +/// Multiplies two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMULPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the operands. +/// \returns A 256-bit vector of [8 x float] containing the products of both +/// operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_mul_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8sf)__a * (__v8sf)__b); +} + +/// Calculates the square roots of the values in a 256-bit vector of +/// [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSQRTPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \returns A 256-bit vector of [4 x double] containing the square roots of the +/// values in the operand. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_sqrt_pd(__m256d __a) +{ + return (__m256d)__builtin_ia32_sqrtpd256((__v4df)__a); +} + +/// Calculates the square roots of the values in a 256-bit vector of +/// [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSQRTPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the square roots of the +/// values in the operand. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_sqrt_ps(__m256 __a) +{ + return (__m256)__builtin_ia32_sqrtps256((__v8sf)__a); +} + +/// Calculates the reciprocal square roots of the values in a 256-bit +/// vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VRSQRTPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the reciprocal square +/// roots of the values in the operand. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_rsqrt_ps(__m256 __a) +{ + return (__m256)__builtin_ia32_rsqrtps256((__v8sf)__a); +} + +/// Calculates the reciprocals of the values in a 256-bit vector of +/// [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VRCPPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the reciprocals of the +/// values in the operand. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_rcp_ps(__m256 __a) +{ + return (__m256)__builtin_ia32_rcpps256((__v8sf)__a); +} + +/// Rounds the values in a 256-bit vector of [4 x double] as specified +/// by the byte operand. The source values are rounded to integer values and +/// returned as 64-bit double-precision floating-point values. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_round_pd(__m256d V, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPD instruction. +/// +/// \param V +/// A 256-bit vector of [4 x double]. +/// \param M +/// An integer value that specifies the rounding operation. \n +/// Bits [7:4] are reserved. \n +/// Bit [3] is a precision exception value: \n +/// 0: A normal PE exception is used. \n +/// 1: The PE field is not updated. \n +/// Bit [2] is the rounding control source: \n +/// 0: Use bits [1:0] of \a M. \n +/// 1: Use the current MXCSR setting. \n +/// Bits [1:0] contain the rounding control definition: \n +/// 00: Nearest. \n +/// 01: Downward (toward negative infinity). \n +/// 10: Upward (toward positive infinity). \n +/// 11: Truncated. +/// \returns A 256-bit vector of [4 x double] containing the rounded values. +#define _mm256_round_pd(V, M) \ + ((__m256d)__builtin_ia32_roundpd256((__v4df)(__m256d)(V), (M))) + +/// Rounds the values stored in a 256-bit vector of [8 x float] as +/// specified by the byte operand. The source values are rounded to integer +/// values and returned as floating-point values. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_round_ps(__m256 V, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPS instruction. +/// +/// \param V +/// A 256-bit vector of [8 x float]. +/// \param M +/// An integer value that specifies the rounding operation. \n +/// Bits [7:4] are reserved. \n +/// Bit [3] is a precision exception value: \n +/// 0: A normal PE exception is used. \n +/// 1: The PE field is not updated. \n +/// Bit [2] is the rounding control source: \n +/// 0: Use bits [1:0] of \a M. \n +/// 1: Use the current MXCSR setting. \n +/// Bits [1:0] contain the rounding control definition: \n +/// 00: Nearest. \n +/// 01: Downward (toward negative infinity). \n +/// 10: Upward (toward positive infinity). \n +/// 11: Truncated. +/// \returns A 256-bit vector of [8 x float] containing the rounded values. +#define _mm256_round_ps(V, M) \ + ((__m256)__builtin_ia32_roundps256((__v8sf)(__m256)(V), (M))) + +/// Rounds up the values stored in a 256-bit vector of [4 x double]. The +/// source values are rounded up to integer values and returned as 64-bit +/// double-precision floating-point values. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_ceil_pd(__m256d V); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPD instruction. +/// +/// \param V +/// A 256-bit vector of [4 x double]. +/// \returns A 256-bit vector of [4 x double] containing the rounded up values. +#define _mm256_ceil_pd(V) _mm256_round_pd((V), _MM_FROUND_CEIL) + +/// Rounds down the values stored in a 256-bit vector of [4 x double]. +/// The source values are rounded down to integer values and returned as +/// 64-bit double-precision floating-point values. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_floor_pd(__m256d V); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPD instruction. +/// +/// \param V +/// A 256-bit vector of [4 x double]. +/// \returns A 256-bit vector of [4 x double] containing the rounded down +/// values. +#define _mm256_floor_pd(V) _mm256_round_pd((V), _MM_FROUND_FLOOR) + +/// Rounds up the values stored in a 256-bit vector of [8 x float]. The +/// source values are rounded up to integer values and returned as +/// floating-point values. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_ceil_ps(__m256 V); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPS instruction. +/// +/// \param V +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the rounded up values. +#define _mm256_ceil_ps(V) _mm256_round_ps((V), _MM_FROUND_CEIL) + +/// Rounds down the values stored in a 256-bit vector of [8 x float]. The +/// source values are rounded down to integer values and returned as +/// floating-point values. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_floor_ps(__m256 V); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPS instruction. +/// +/// \param V +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the rounded down values. +#define _mm256_floor_ps(V) _mm256_round_ps((V), _MM_FROUND_FLOOR) + +/* Logical */ +/// Performs a bitwise AND of two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VANDPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the +/// values between both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_and_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4du)__a & (__v4du)__b); +} + +/// Performs a bitwise AND of two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VANDPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the +/// values between both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_and_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8su)__a & (__v8su)__b); +} + +/// Performs a bitwise AND of two 256-bit vectors of [4 x double], using +/// the one's complement of the values contained in the first source operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VANDNPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing the left source operand. The +/// one's complement of this value is used in the bitwise AND. +/// \param __b +/// A 256-bit vector of [4 x double] containing the right source operand. +/// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the +/// values of the second operand and the one's complement of the first +/// operand. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_andnot_pd(__m256d __a, __m256d __b) +{ + return (__m256d)(~(__v4du)__a & (__v4du)__b); +} + +/// Performs a bitwise AND of two 256-bit vectors of [8 x float], using +/// the one's complement of the values contained in the first source operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VANDNPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing the left source operand. The +/// one's complement of this value is used in the bitwise AND. +/// \param __b +/// A 256-bit vector of [8 x float] containing the right source operand. +/// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the +/// values of the second operand and the one's complement of the first +/// operand. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_andnot_ps(__m256 __a, __m256 __b) +{ + return (__m256)(~(__v8su)__a & (__v8su)__b); +} + +/// Performs a bitwise OR of two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VORPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \returns A 256-bit vector of [4 x double] containing the bitwise OR of the +/// values between both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_or_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4du)__a | (__v4du)__b); +} + +/// Performs a bitwise OR of two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VORPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \returns A 256-bit vector of [8 x float] containing the bitwise OR of the +/// values between both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_or_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8su)__a | (__v8su)__b); +} + +/// Performs a bitwise XOR of two 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// \returns A 256-bit vector of [4 x double] containing the bitwise XOR of the +/// values between both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_xor_pd(__m256d __a, __m256d __b) +{ + return (__m256d)((__v4du)__a ^ (__v4du)__b); +} + +/// Performs a bitwise XOR of two 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// \returns A 256-bit vector of [8 x float] containing the bitwise XOR of the +/// values between both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_xor_ps(__m256 __a, __m256 __b) +{ + return (__m256)((__v8su)__a ^ (__v8su)__b); +} + +/* Horizontal arithmetic */ +/// Horizontally adds the adjacent pairs of values contained in two +/// 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHADDPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// The horizontal sums of the values are returned in the even-indexed +/// elements of a vector of [4 x double]. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// The horizontal sums of the values are returned in the odd-indexed +/// elements of a vector of [4 x double]. +/// \returns A 256-bit vector of [4 x double] containing the horizontal sums of +/// both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_hadd_pd(__m256d __a, __m256d __b) +{ + return (__m256d)__builtin_ia32_haddpd256((__v4df)__a, (__v4df)__b); +} + +/// Horizontally adds the adjacent pairs of values contained in two +/// 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHADDPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// The horizontal sums of the values are returned in the elements with +/// index 0, 1, 4, 5 of a vector of [8 x float]. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// The horizontal sums of the values are returned in the elements with +/// index 2, 3, 6, 7 of a vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the horizontal sums of +/// both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_hadd_ps(__m256 __a, __m256 __b) +{ + return (__m256)__builtin_ia32_haddps256((__v8sf)__a, (__v8sf)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in two +/// 256-bit vectors of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHSUBPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// The horizontal differences between the values are returned in the +/// even-indexed elements of a vector of [4 x double]. +/// \param __b +/// A 256-bit vector of [4 x double] containing one of the source operands. +/// The horizontal differences between the values are returned in the +/// odd-indexed elements of a vector of [4 x double]. +/// \returns A 256-bit vector of [4 x double] containing the horizontal +/// differences of both operands. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_hsub_pd(__m256d __a, __m256d __b) +{ + return (__m256d)__builtin_ia32_hsubpd256((__v4df)__a, (__v4df)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in two +/// 256-bit vectors of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHSUBPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// The horizontal differences between the values are returned in the +/// elements with index 0, 1, 4, 5 of a vector of [8 x float]. +/// \param __b +/// A 256-bit vector of [8 x float] containing one of the source operands. +/// The horizontal differences between the values are returned in the +/// elements with index 2, 3, 6, 7 of a vector of [8 x float]. +/// \returns A 256-bit vector of [8 x float] containing the horizontal +/// differences of both operands. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_hsub_ps(__m256 __a, __m256 __b) +{ + return (__m256)__builtin_ia32_hsubps256((__v8sf)__a, (__v8sf)__b); +} + +/* Vector permutations */ +/// Copies the values in a 128-bit vector of [2 x double] as specified +/// by the 128-bit integer vector operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __c +/// A 128-bit integer vector operand specifying how the values are to be +/// copied. \n +/// Bit [1]: \n +/// 0: Bits [63:0] of the source are copied to bits [63:0] of the returned +/// vector. \n +/// 1: Bits [127:64] of the source are copied to bits [63:0] of the +/// returned vector. \n +/// Bit [65]: \n +/// 0: Bits [63:0] of the source are copied to bits [127:64] of the +/// returned vector. \n +/// 1: Bits [127:64] of the source are copied to bits [127:64] of the +/// returned vector. +/// \returns A 128-bit vector of [2 x double] containing the copied values. +static __inline __m128d __DEFAULT_FN_ATTRS128 +_mm_permutevar_pd(__m128d __a, __m128i __c) +{ + return (__m128d)__builtin_ia32_vpermilvarpd((__v2df)__a, (__v2di)__c); +} + +/// Copies the values in a 256-bit vector of [4 x double] as specified +/// by the 256-bit integer vector operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \param __c +/// A 256-bit integer vector operand specifying how the values are to be +/// copied. \n +/// Bit [1]: \n +/// 0: Bits [63:0] of the source are copied to bits [63:0] of the returned +/// vector. \n +/// 1: Bits [127:64] of the source are copied to bits [63:0] of the +/// returned vector. \n +/// Bit [65]: \n +/// 0: Bits [63:0] of the source are copied to bits [127:64] of the +/// returned vector. \n +/// 1: Bits [127:64] of the source are copied to bits [127:64] of the +/// returned vector. \n +/// Bit [129]: \n +/// 0: Bits [191:128] of the source are copied to bits [191:128] of the +/// returned vector. \n +/// 1: Bits [255:192] of the source are copied to bits [191:128] of the +/// returned vector. \n +/// Bit [193]: \n +/// 0: Bits [191:128] of the source are copied to bits [255:192] of the +/// returned vector. \n +/// 1: Bits [255:192] of the source are copied to bits [255:192] of the +/// returned vector. +/// \returns A 256-bit vector of [4 x double] containing the copied values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_permutevar_pd(__m256d __a, __m256i __c) +{ + return (__m256d)__builtin_ia32_vpermilvarpd256((__v4df)__a, (__v4di)__c); +} + +/// Copies the values stored in a 128-bit vector of [4 x float] as +/// specified by the 128-bit integer vector operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __c +/// A 128-bit integer vector operand specifying how the values are to be +/// copied. \n +/// Bits [1:0]: \n +/// 00: Bits [31:0] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// Bits [33:32]: \n +/// 00: Bits [31:0] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// Bits [65:64]: \n +/// 00: Bits [31:0] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// Bits [97:96]: \n +/// 00: Bits [31:0] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [127:96] of the +/// returned vector. +/// \returns A 128-bit vector of [4 x float] containing the copied values. +static __inline __m128 __DEFAULT_FN_ATTRS128 +_mm_permutevar_ps(__m128 __a, __m128i __c) +{ + return (__m128)__builtin_ia32_vpermilvarps((__v4sf)__a, (__v4si)__c); +} + +/// Copies the values stored in a 256-bit vector of [8 x float] as +/// specified by the 256-bit integer vector operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \param __c +/// A 256-bit integer vector operand specifying how the values are to be +/// copied. \n +/// Bits [1:0]: \n +/// 00: Bits [31:0] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// Bits [33:32]: \n +/// 00: Bits [31:0] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// Bits [65:64]: \n +/// 00: Bits [31:0] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// Bits [97:96]: \n +/// 00: Bits [31:0] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// Bits [129:128]: \n +/// 00: Bits [159:128] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// Bits [161:160]: \n +/// 00: Bits [159:128] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// Bits [193:192]: \n +/// 00: Bits [159:128] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// Bits [225:224]: \n +/// 00: Bits [159:128] of the source are copied to bits [255:224] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [255:224] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [255:224] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [255:224] of the +/// returned vector. +/// \returns A 256-bit vector of [8 x float] containing the copied values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_permutevar_ps(__m256 __a, __m256i __c) +{ + return (__m256)__builtin_ia32_vpermilvarps256((__v8sf)__a, (__v8si)__c); +} + +/// Copies the values in a 128-bit vector of [2 x double] as specified +/// by the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_permute_pd(__m128d A, const int C); +/// \endcode +/// +/// This intrinsic corresponds to the VPERMILPD instruction. +/// +/// \param A +/// A 128-bit vector of [2 x double]. +/// \param C +/// An immediate integer operand specifying how the values are to be +/// copied. \n +/// Bit [0]: \n +/// 0: Bits [63:0] of the source are copied to bits [63:0] of the returned +/// vector. \n +/// 1: Bits [127:64] of the source are copied to bits [63:0] of the +/// returned vector. \n +/// Bit [1]: \n +/// 0: Bits [63:0] of the source are copied to bits [127:64] of the +/// returned vector. \n +/// 1: Bits [127:64] of the source are copied to bits [127:64] of the +/// returned vector. +/// \returns A 128-bit vector of [2 x double] containing the copied values. +#define _mm_permute_pd(A, C) \ + ((__m128d)__builtin_ia32_vpermilpd((__v2df)(__m128d)(A), (int)(C))) + +/// Copies the values in a 256-bit vector of [4 x double] as specified by +/// the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_permute_pd(__m256d A, const int C); +/// \endcode +/// +/// This intrinsic corresponds to the VPERMILPD instruction. +/// +/// \param A +/// A 256-bit vector of [4 x double]. +/// \param C +/// An immediate integer operand specifying how the values are to be +/// copied. \n +/// Bit [0]: \n +/// 0: Bits [63:0] of the source are copied to bits [63:0] of the returned +/// vector. \n +/// 1: Bits [127:64] of the source are copied to bits [63:0] of the +/// returned vector. \n +/// Bit [1]: \n +/// 0: Bits [63:0] of the source are copied to bits [127:64] of the +/// returned vector. \n +/// 1: Bits [127:64] of the source are copied to bits [127:64] of the +/// returned vector. \n +/// Bit [2]: \n +/// 0: Bits [191:128] of the source are copied to bits [191:128] of the +/// returned vector. \n +/// 1: Bits [255:192] of the source are copied to bits [191:128] of the +/// returned vector. \n +/// Bit [3]: \n +/// 0: Bits [191:128] of the source are copied to bits [255:192] of the +/// returned vector. \n +/// 1: Bits [255:192] of the source are copied to bits [255:192] of the +/// returned vector. +/// \returns A 256-bit vector of [4 x double] containing the copied values. +#define _mm256_permute_pd(A, C) \ + ((__m256d)__builtin_ia32_vpermilpd256((__v4df)(__m256d)(A), (int)(C))) + +/// Copies the values in a 128-bit vector of [4 x float] as specified by +/// the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_permute_ps(__m128 A, const int C); +/// \endcode +/// +/// This intrinsic corresponds to the VPERMILPS instruction. +/// +/// \param A +/// A 128-bit vector of [4 x float]. +/// \param C +/// An immediate integer operand specifying how the values are to be +/// copied. \n +/// Bits [1:0]: \n +/// 00: Bits [31:0] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// Bits [3:2]: \n +/// 00: Bits [31:0] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// Bits [5:4]: \n +/// 00: Bits [31:0] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// Bits [7:6]: \n +/// 00: Bits [31:0] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [127:96] of the +/// returned vector. +/// \returns A 128-bit vector of [4 x float] containing the copied values. +#define _mm_permute_ps(A, C) \ + ((__m128)__builtin_ia32_vpermilps((__v4sf)(__m128)(A), (int)(C))) + +/// Copies the values in a 256-bit vector of [8 x float] as specified by +/// the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_permute_ps(__m256 A, const int C); +/// \endcode +/// +/// This intrinsic corresponds to the VPERMILPS instruction. +/// +/// \param A +/// A 256-bit vector of [8 x float]. +/// \param C +/// An immediate integer operand specifying how the values are to be +/// copied. \n +/// Bits [1:0]: \n +/// 00: Bits [31:0] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [31:0] of the +/// returned vector. \n +/// Bits [3:2]: \n +/// 00: Bits [31:0] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [63:32] of the +/// returned vector. \n +/// Bits [5:4]: \n +/// 00: Bits [31:0] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [95:64] of the +/// returned vector. \n +/// Bits [7:6]: \n +/// 00: Bits [31:0] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 01: Bits [63:32] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 10: Bits [95:64] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// 11: Bits [127:96] of the source are copied to bits [127:96] of the +/// returned vector. \n +/// Bits [1:0]: \n +/// 00: Bits [159:128] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [159:128] of the +/// returned vector. \n +/// Bits [3:2]: \n +/// 00: Bits [159:128] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [191:160] of the +/// returned vector. \n +/// Bits [5:4]: \n +/// 00: Bits [159:128] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [223:192] of the +/// returned vector. \n +/// Bits [7:6]: \n +/// 00: Bits [159:128] of the source are copied to bits [255:224] of the +/// returned vector. \n +/// 01: Bits [191:160] of the source are copied to bits [255:224] of the +/// returned vector. \n +/// 10: Bits [223:192] of the source are copied to bits [255:224] of the +/// returned vector. \n +/// 11: Bits [255:224] of the source are copied to bits [255:224] of the +/// returned vector. +/// \returns A 256-bit vector of [8 x float] containing the copied values. +#define _mm256_permute_ps(A, C) \ + ((__m256)__builtin_ia32_vpermilps256((__v8sf)(__m256)(A), (int)(C))) + +/// Permutes 128-bit data values stored in two 256-bit vectors of +/// [4 x double], as specified by the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_permute2f128_pd(__m256d V1, __m256d V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPERM2F128 instruction. +/// +/// \param V1 +/// A 256-bit vector of [4 x double]. +/// \param V2 +/// A 256-bit vector of [4 x double. +/// \param M +/// An immediate integer operand specifying how the values are to be +/// permuted. \n +/// Bits [1:0]: \n +/// 00: Bits [127:0] of operand \a V1 are copied to bits [127:0] of the +/// destination. \n +/// 01: Bits [255:128] of operand \a V1 are copied to bits [127:0] of the +/// destination. \n +/// 10: Bits [127:0] of operand \a V2 are copied to bits [127:0] of the +/// destination. \n +/// 11: Bits [255:128] of operand \a V2 are copied to bits [127:0] of the +/// destination. \n +/// Bits [5:4]: \n +/// 00: Bits [127:0] of operand \a V1 are copied to bits [255:128] of the +/// destination. \n +/// 01: Bits [255:128] of operand \a V1 are copied to bits [255:128] of the +/// destination. \n +/// 10: Bits [127:0] of operand \a V2 are copied to bits [255:128] of the +/// destination. \n +/// 11: Bits [255:128] of operand \a V2 are copied to bits [255:128] of the +/// destination. +/// \returns A 256-bit vector of [4 x double] containing the copied values. +#define _mm256_permute2f128_pd(V1, V2, M) \ + ((__m256d)__builtin_ia32_vperm2f128_pd256((__v4df)(__m256d)(V1), \ + (__v4df)(__m256d)(V2), (int)(M))) + +/// Permutes 128-bit data values stored in two 256-bit vectors of +/// [8 x float], as specified by the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_permute2f128_ps(__m256 V1, __m256 V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPERM2F128 instruction. +/// +/// \param V1 +/// A 256-bit vector of [8 x float]. +/// \param V2 +/// A 256-bit vector of [8 x float]. +/// \param M +/// An immediate integer operand specifying how the values are to be +/// permuted. \n +/// Bits [1:0]: \n +/// 00: Bits [127:0] of operand \a V1 are copied to bits [127:0] of the +/// destination. \n +/// 01: Bits [255:128] of operand \a V1 are copied to bits [127:0] of the +/// destination. \n +/// 10: Bits [127:0] of operand \a V2 are copied to bits [127:0] of the +/// destination. \n +/// 11: Bits [255:128] of operand \a V2 are copied to bits [127:0] of the +/// destination. \n +/// Bits [5:4]: \n +/// 00: Bits [127:0] of operand \a V1 are copied to bits [255:128] of the +/// destination. \n +/// 01: Bits [255:128] of operand \a V1 are copied to bits [255:128] of the +/// destination. \n +/// 10: Bits [127:0] of operand \a V2 are copied to bits [255:128] of the +/// destination. \n +/// 11: Bits [255:128] of operand \a V2 are copied to bits [255:128] of the +/// destination. +/// \returns A 256-bit vector of [8 x float] containing the copied values. +#define _mm256_permute2f128_ps(V1, V2, M) \ + ((__m256)__builtin_ia32_vperm2f128_ps256((__v8sf)(__m256)(V1), \ + (__v8sf)(__m256)(V2), (int)(M))) + +/// Permutes 128-bit data values stored in two 256-bit integer vectors, +/// as specified by the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_permute2f128_si256(__m256i V1, __m256i V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPERM2F128 instruction. +/// +/// \param V1 +/// A 256-bit integer vector. +/// \param V2 +/// A 256-bit integer vector. +/// \param M +/// An immediate integer operand specifying how the values are to be copied. +/// Bits [1:0]: \n +/// 00: Bits [127:0] of operand \a V1 are copied to bits [127:0] of the +/// destination. \n +/// 01: Bits [255:128] of operand \a V1 are copied to bits [127:0] of the +/// destination. \n +/// 10: Bits [127:0] of operand \a V2 are copied to bits [127:0] of the +/// destination. \n +/// 11: Bits [255:128] of operand \a V2 are copied to bits [127:0] of the +/// destination. \n +/// Bits [5:4]: \n +/// 00: Bits [127:0] of operand \a V1 are copied to bits [255:128] of the +/// destination. \n +/// 01: Bits [255:128] of operand \a V1 are copied to bits [255:128] of the +/// destination. \n +/// 10: Bits [127:0] of operand \a V2 are copied to bits [255:128] of the +/// destination. \n +/// 11: Bits [255:128] of operand \a V2 are copied to bits [255:128] of the +/// destination. +/// \returns A 256-bit integer vector containing the copied values. +#define _mm256_permute2f128_si256(V1, V2, M) \ + ((__m256i)__builtin_ia32_vperm2f128_si256((__v8si)(__m256i)(V1), \ + (__v8si)(__m256i)(V2), (int)(M))) + +/* Vector Blend */ +/// Merges 64-bit double-precision data values stored in either of the +/// two 256-bit vectors of [4 x double], as specified by the immediate +/// integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_blend_pd(__m256d V1, __m256d V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VBLENDPD instruction. +/// +/// \param V1 +/// A 256-bit vector of [4 x double]. +/// \param V2 +/// A 256-bit vector of [4 x double]. +/// \param M +/// An immediate integer operand, with mask bits [3:0] specifying how the +/// values are to be copied. The position of the mask bit corresponds to the +/// index of a copied value. When a mask bit is 0, the corresponding 64-bit +/// element in operand \a V1 is copied to the same position in the +/// destination. When a mask bit is 1, the corresponding 64-bit element in +/// operand \a V2 is copied to the same position in the destination. +/// \returns A 256-bit vector of [4 x double] containing the copied values. +#define _mm256_blend_pd(V1, V2, M) \ + ((__m256d)__builtin_ia32_blendpd256((__v4df)(__m256d)(V1), \ + (__v4df)(__m256d)(V2), (int)(M))) + +/// Merges 32-bit single-precision data values stored in either of the +/// two 256-bit vectors of [8 x float], as specified by the immediate +/// integer operand. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_blend_ps(__m256 V1, __m256 V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VBLENDPS instruction. +/// +/// \param V1 +/// A 256-bit vector of [8 x float]. +/// \param V2 +/// A 256-bit vector of [8 x float]. +/// \param M +/// An immediate integer operand, with mask bits [7:0] specifying how the +/// values are to be copied. The position of the mask bit corresponds to the +/// index of a copied value. When a mask bit is 0, the corresponding 32-bit +/// element in operand \a V1 is copied to the same position in the +/// destination. When a mask bit is 1, the corresponding 32-bit element in +/// operand \a V2 is copied to the same position in the destination. +/// \returns A 256-bit vector of [8 x float] containing the copied values. +#define _mm256_blend_ps(V1, V2, M) \ + ((__m256)__builtin_ia32_blendps256((__v8sf)(__m256)(V1), \ + (__v8sf)(__m256)(V2), (int)(M))) + +/// Merges 64-bit double-precision data values stored in either of the +/// two 256-bit vectors of [4 x double], as specified by the 256-bit vector +/// operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBLENDVPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \param __b +/// A 256-bit vector of [4 x double]. +/// \param __c +/// A 256-bit vector operand, with mask bits 255, 191, 127, and 63 specifying +/// how the values are to be copied. The position of the mask bit corresponds +/// to the most significant bit of a copied value. When a mask bit is 0, the +/// corresponding 64-bit element in operand \a __a is copied to the same +/// position in the destination. When a mask bit is 1, the corresponding +/// 64-bit element in operand \a __b is copied to the same position in the +/// destination. +/// \returns A 256-bit vector of [4 x double] containing the copied values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c) +{ + return (__m256d)__builtin_ia32_blendvpd256( + (__v4df)__a, (__v4df)__b, (__v4df)__c); +} + +/// Merges 32-bit single-precision data values stored in either of the +/// two 256-bit vectors of [8 x float], as specified by the 256-bit vector +/// operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBLENDVPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \param __b +/// A 256-bit vector of [8 x float]. +/// \param __c +/// A 256-bit vector operand, with mask bits 255, 223, 191, 159, 127, 95, 63, +/// and 31 specifying how the values are to be copied. The position of the +/// mask bit corresponds to the most significant bit of a copied value. When +/// a mask bit is 0, the corresponding 32-bit element in operand \a __a is +/// copied to the same position in the destination. When a mask bit is 1, the +/// corresponding 32-bit element in operand \a __b is copied to the same +/// position in the destination. +/// \returns A 256-bit vector of [8 x float] containing the copied values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c) +{ + return (__m256)__builtin_ia32_blendvps256( + (__v8sf)__a, (__v8sf)__b, (__v8sf)__c); +} + +/* Vector Dot Product */ +/// Computes two dot products in parallel, using the lower and upper +/// halves of two [8 x float] vectors as input to the two computations, and +/// returning the two dot products in the lower and upper halves of the +/// [8 x float] result. +/// +/// The immediate integer operand controls which input elements will +/// contribute to the dot product, and where the final results are returned. +/// In general, for each dot product, the four corresponding elements of the +/// input vectors are multiplied; the first two and second two products are +/// summed, then the two sums are added to form the final result. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_dp_ps(__m256 V1, __m256 V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VDPPS instruction. +/// +/// \param V1 +/// A vector of [8 x float] values, treated as two [4 x float] vectors. +/// \param V2 +/// A vector of [8 x float] values, treated as two [4 x float] vectors. +/// \param M +/// An immediate integer argument. Bits [7:4] determine which elements of +/// the input vectors are used, with bit [4] corresponding to the lowest +/// element and bit [7] corresponding to the highest element of each [4 x +/// float] subvector. If a bit is set, the corresponding elements from the +/// two input vectors are used as an input for dot product; otherwise that +/// input is treated as zero. Bits [3:0] determine which elements of the +/// result will receive a copy of the final dot product, with bit [0] +/// corresponding to the lowest element and bit [3] corresponding to the +/// highest element of each [4 x float] subvector. If a bit is set, the dot +/// product is returned in the corresponding element; otherwise that element +/// is set to zero. The bitmask is applied in the same way to each of the +/// two parallel dot product computations. +/// \returns A 256-bit vector of [8 x float] containing the two dot products. +#define _mm256_dp_ps(V1, V2, M) \ + ((__m256)__builtin_ia32_dpps256((__v8sf)(__m256)(V1), \ + (__v8sf)(__m256)(V2), (M))) + +/* Vector shuffle */ +/// Selects 8 float values from the 256-bit operands of [8 x float], as +/// specified by the immediate value operand. +/// +/// The four selected elements in each operand are copied to the destination +/// according to the bits specified in the immediate operand. The selected +/// elements from the first 256-bit operand are copied to bits [63:0] and +/// bits [191:128] of the destination, and the selected elements from the +/// second 256-bit operand are copied to bits [127:64] and bits [255:192] of +/// the destination. For example, if bits [7:0] of the immediate operand +/// contain a value of 0xFF, the 256-bit destination vector would contain the +/// following values: b[7], b[7], a[7], a[7], b[3], b[3], a[3], a[3]. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_shuffle_ps(__m256 a, __m256 b, const int mask); +/// \endcode +/// +/// This intrinsic corresponds to the VSHUFPS instruction. +/// +/// \param a +/// A 256-bit vector of [8 x float]. The four selected elements in this +/// operand are copied to bits [63:0] and bits [191:128] in the destination, +/// according to the bits specified in the immediate operand. +/// \param b +/// A 256-bit vector of [8 x float]. The four selected elements in this +/// operand are copied to bits [127:64] and bits [255:192] in the +/// destination, according to the bits specified in the immediate operand. +/// \param mask +/// An immediate value containing an 8-bit value specifying which elements to +/// copy from \a a and \a b \n. +/// Bits [3:0] specify the values copied from operand \a a. \n +/// Bits [7:4] specify the values copied from operand \a b. \n +/// The destinations within the 256-bit destination are assigned values as +/// follows, according to the bit value assignments described below: \n +/// Bits [1:0] are used to assign values to bits [31:0] and [159:128] in the +/// destination. \n +/// Bits [3:2] are used to assign values to bits [63:32] and [191:160] in the +/// destination. \n +/// Bits [5:4] are used to assign values to bits [95:64] and [223:192] in the +/// destination. \n +/// Bits [7:6] are used to assign values to bits [127:96] and [255:224] in +/// the destination. \n +/// Bit value assignments: \n +/// 00: Bits [31:0] and [159:128] are copied from the selected operand. \n +/// 01: Bits [63:32] and [191:160] are copied from the selected operand. \n +/// 10: Bits [95:64] and [223:192] are copied from the selected operand. \n +/// 11: Bits [127:96] and [255:224] are copied from the selected operand. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro. +/// _MM_SHUFFLE(b6, b4, b2, b0) can create an 8-bit mask of the form +/// [b6, b4, b2, b0]. +/// \returns A 256-bit vector of [8 x float] containing the shuffled values. +#define _mm256_shuffle_ps(a, b, mask) \ + ((__m256)__builtin_ia32_shufps256((__v8sf)(__m256)(a), \ + (__v8sf)(__m256)(b), (int)(mask))) + +/// Selects four double-precision values from the 256-bit operands of +/// [4 x double], as specified by the immediate value operand. +/// +/// The selected elements from the first 256-bit operand are copied to bits +/// [63:0] and bits [191:128] in the destination, and the selected elements +/// from the second 256-bit operand are copied to bits [127:64] and bits +/// [255:192] in the destination. For example, if bits [3:0] of the immediate +/// operand contain a value of 0xF, the 256-bit destination vector would +/// contain the following values: b[3], a[3], b[1], a[1]. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_shuffle_pd(__m256d a, __m256d b, const int mask); +/// \endcode +/// +/// This intrinsic corresponds to the VSHUFPD instruction. +/// +/// \param a +/// A 256-bit vector of [4 x double]. +/// \param b +/// A 256-bit vector of [4 x double]. +/// \param mask +/// An immediate value containing 8-bit values specifying which elements to +/// copy from \a a and \a b: \n +/// Bit [0]=0: Bits [63:0] are copied from \a a to bits [63:0] of the +/// destination. \n +/// Bit [0]=1: Bits [127:64] are copied from \a a to bits [63:0] of the +/// destination. \n +/// Bit [1]=0: Bits [63:0] are copied from \a b to bits [127:64] of the +/// destination. \n +/// Bit [1]=1: Bits [127:64] are copied from \a b to bits [127:64] of the +/// destination. \n +/// Bit [2]=0: Bits [191:128] are copied from \a a to bits [191:128] of the +/// destination. \n +/// Bit [2]=1: Bits [255:192] are copied from \a a to bits [191:128] of the +/// destination. \n +/// Bit [3]=0: Bits [191:128] are copied from \a b to bits [255:192] of the +/// destination. \n +/// Bit [3]=1: Bits [255:192] are copied from \a b to bits [255:192] of the +/// destination. +/// \returns A 256-bit vector of [4 x double] containing the shuffled values. +#define _mm256_shuffle_pd(a, b, mask) \ + ((__m256d)__builtin_ia32_shufpd256((__v4df)(__m256d)(a), \ + (__v4df)(__m256d)(b), (int)(mask))) + +/* Compare */ +#define _CMP_EQ_UQ 0x08 /* Equal (unordered, non-signaling) */ +#define _CMP_NGE_US 0x09 /* Not-greater-than-or-equal (unordered, signaling) */ +#define _CMP_NGT_US 0x0a /* Not-greater-than (unordered, signaling) */ +#define _CMP_FALSE_OQ 0x0b /* False (ordered, non-signaling) */ +#define _CMP_NEQ_OQ 0x0c /* Not-equal (ordered, non-signaling) */ +#define _CMP_GE_OS 0x0d /* Greater-than-or-equal (ordered, signaling) */ +#define _CMP_GT_OS 0x0e /* Greater-than (ordered, signaling) */ +#define _CMP_TRUE_UQ 0x0f /* True (unordered, non-signaling) */ +#define _CMP_EQ_OS 0x10 /* Equal (ordered, signaling) */ +#define _CMP_LT_OQ 0x11 /* Less-than (ordered, non-signaling) */ +#define _CMP_LE_OQ 0x12 /* Less-than-or-equal (ordered, non-signaling) */ +#define _CMP_UNORD_S 0x13 /* Unordered (signaling) */ +#define _CMP_NEQ_US 0x14 /* Not-equal (unordered, signaling) */ +#define _CMP_NLT_UQ 0x15 /* Not-less-than (unordered, non-signaling) */ +#define _CMP_NLE_UQ 0x16 /* Not-less-than-or-equal (unordered, non-signaling) */ +#define _CMP_ORD_S 0x17 /* Ordered (signaling) */ +#define _CMP_EQ_US 0x18 /* Equal (unordered, signaling) */ +#define _CMP_NGE_UQ 0x19 /* Not-greater-than-or-equal (unordered, non-signaling) */ +#define _CMP_NGT_UQ 0x1a /* Not-greater-than (unordered, non-signaling) */ +#define _CMP_FALSE_OS 0x1b /* False (ordered, signaling) */ +#define _CMP_NEQ_OS 0x1c /* Not-equal (ordered, signaling) */ +#define _CMP_GE_OQ 0x1d /* Greater-than-or-equal (ordered, non-signaling) */ +#define _CMP_GT_OQ 0x1e /* Greater-than (ordered, non-signaling) */ +#define _CMP_TRUE_US 0x1f /* True (unordered, signaling) */ + +/* Below intrinsic defined in emmintrin.h can be used for AVX */ +/// Compares each of the corresponding double-precision values of two +/// 128-bit vectors of [2 x double], using the operation specified by the +/// immediate integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the VCMPPD instruction. +/// +/// \param a +/// A 128-bit vector of [2 x double]. +/// \param b +/// A 128-bit vector of [2 x double]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// 0x08: Equal (unordered, non-signaling) \n +/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n +/// 0x0A: Not-greater-than (unordered, signaling) \n +/// 0x0B: False (ordered, non-signaling) \n +/// 0x0C: Not-equal (ordered, non-signaling) \n +/// 0x0D: Greater-than-or-equal (ordered, signaling) \n +/// 0x0E: Greater-than (ordered, signaling) \n +/// 0x0F: True (unordered, non-signaling) \n +/// 0x10: Equal (ordered, signaling) \n +/// 0x11: Less-than (ordered, non-signaling) \n +/// 0x12: Less-than-or-equal (ordered, non-signaling) \n +/// 0x13: Unordered (signaling) \n +/// 0x14: Not-equal (unordered, signaling) \n +/// 0x15: Not-less-than (unordered, non-signaling) \n +/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n +/// 0x17: Ordered (signaling) \n +/// 0x18: Equal (unordered, signaling) \n +/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n +/// 0x1A: Not-greater-than (unordered, non-signaling) \n +/// 0x1B: False (ordered, signaling) \n +/// 0x1C: Not-equal (ordered, signaling) \n +/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n +/// 0x1E: Greater-than (ordered, non-signaling) \n +/// 0x1F: True (unordered, signaling) +/// \returns A 128-bit vector of [2 x double] containing the comparison results. +/// \fn __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c) + +/* Below intrinsic defined in xmmintrin.h can be used for AVX */ +/// Compares each of the corresponding values of two 128-bit vectors of +/// [4 x float], using the operation specified by the immediate integer +/// operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_cmp_ps(__m128 a, __m128 b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the VCMPPS instruction. +/// +/// \param a +/// A 128-bit vector of [4 x float]. +/// \param b +/// A 128-bit vector of [4 x float]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// 0x08: Equal (unordered, non-signaling) \n +/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n +/// 0x0A: Not-greater-than (unordered, signaling) \n +/// 0x0B: False (ordered, non-signaling) \n +/// 0x0C: Not-equal (ordered, non-signaling) \n +/// 0x0D: Greater-than-or-equal (ordered, signaling) \n +/// 0x0E: Greater-than (ordered, signaling) \n +/// 0x0F: True (unordered, non-signaling) \n +/// 0x10: Equal (ordered, signaling) \n +/// 0x11: Less-than (ordered, non-signaling) \n +/// 0x12: Less-than-or-equal (ordered, non-signaling) \n +/// 0x13: Unordered (signaling) \n +/// 0x14: Not-equal (unordered, signaling) \n +/// 0x15: Not-less-than (unordered, non-signaling) \n +/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n +/// 0x17: Ordered (signaling) \n +/// 0x18: Equal (unordered, signaling) \n +/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n +/// 0x1A: Not-greater-than (unordered, non-signaling) \n +/// 0x1B: False (ordered, signaling) \n +/// 0x1C: Not-equal (ordered, signaling) \n +/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n +/// 0x1E: Greater-than (ordered, non-signaling) \n +/// 0x1F: True (unordered, signaling) +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +/// \fn __m128 _mm_cmp_ps(__m128 a, __m128 b, const int c) + +/// Compares each of the corresponding double-precision values of two +/// 256-bit vectors of [4 x double], using the operation specified by the +/// immediate integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_cmp_pd(__m256d a, __m256d b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the VCMPPD instruction. +/// +/// \param a +/// A 256-bit vector of [4 x double]. +/// \param b +/// A 256-bit vector of [4 x double]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// 0x08: Equal (unordered, non-signaling) \n +/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n +/// 0x0A: Not-greater-than (unordered, signaling) \n +/// 0x0B: False (ordered, non-signaling) \n +/// 0x0C: Not-equal (ordered, non-signaling) \n +/// 0x0D: Greater-than-or-equal (ordered, signaling) \n +/// 0x0E: Greater-than (ordered, signaling) \n +/// 0x0F: True (unordered, non-signaling) \n +/// 0x10: Equal (ordered, signaling) \n +/// 0x11: Less-than (ordered, non-signaling) \n +/// 0x12: Less-than-or-equal (ordered, non-signaling) \n +/// 0x13: Unordered (signaling) \n +/// 0x14: Not-equal (unordered, signaling) \n +/// 0x15: Not-less-than (unordered, non-signaling) \n +/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n +/// 0x17: Ordered (signaling) \n +/// 0x18: Equal (unordered, signaling) \n +/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n +/// 0x1A: Not-greater-than (unordered, non-signaling) \n +/// 0x1B: False (ordered, signaling) \n +/// 0x1C: Not-equal (ordered, signaling) \n +/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n +/// 0x1E: Greater-than (ordered, non-signaling) \n +/// 0x1F: True (unordered, signaling) +/// \returns A 256-bit vector of [4 x double] containing the comparison results. +#define _mm256_cmp_pd(a, b, c) \ + ((__m256d)__builtin_ia32_cmppd256((__v4df)(__m256d)(a), \ + (__v4df)(__m256d)(b), (c))) + +/// Compares each of the corresponding values of two 256-bit vectors of +/// [8 x float], using the operation specified by the immediate integer +/// operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_cmp_ps(__m256 a, __m256 b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the VCMPPS instruction. +/// +/// \param a +/// A 256-bit vector of [8 x float]. +/// \param b +/// A 256-bit vector of [8 x float]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// 0x08: Equal (unordered, non-signaling) \n +/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n +/// 0x0A: Not-greater-than (unordered, signaling) \n +/// 0x0B: False (ordered, non-signaling) \n +/// 0x0C: Not-equal (ordered, non-signaling) \n +/// 0x0D: Greater-than-or-equal (ordered, signaling) \n +/// 0x0E: Greater-than (ordered, signaling) \n +/// 0x0F: True (unordered, non-signaling) \n +/// 0x10: Equal (ordered, signaling) \n +/// 0x11: Less-than (ordered, non-signaling) \n +/// 0x12: Less-than-or-equal (ordered, non-signaling) \n +/// 0x13: Unordered (signaling) \n +/// 0x14: Not-equal (unordered, signaling) \n +/// 0x15: Not-less-than (unordered, non-signaling) \n +/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n +/// 0x17: Ordered (signaling) \n +/// 0x18: Equal (unordered, signaling) \n +/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n +/// 0x1A: Not-greater-than (unordered, non-signaling) \n +/// 0x1B: False (ordered, signaling) \n +/// 0x1C: Not-equal (ordered, signaling) \n +/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n +/// 0x1E: Greater-than (ordered, non-signaling) \n +/// 0x1F: True (unordered, signaling) +/// \returns A 256-bit vector of [8 x float] containing the comparison results. +#define _mm256_cmp_ps(a, b, c) \ + ((__m256)__builtin_ia32_cmpps256((__v8sf)(__m256)(a), \ + (__v8sf)(__m256)(b), (c))) + +/* Below intrinsic defined in emmintrin.h can be used for AVX */ +/// Compares each of the corresponding scalar double-precision values of +/// two 128-bit vectors of [2 x double], using the operation specified by the +/// immediate integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the VCMPSD instruction. +/// +/// \param a +/// A 128-bit vector of [2 x double]. +/// \param b +/// A 128-bit vector of [2 x double]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// 0x08: Equal (unordered, non-signaling) \n +/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n +/// 0x0A: Not-greater-than (unordered, signaling) \n +/// 0x0B: False (ordered, non-signaling) \n +/// 0x0C: Not-equal (ordered, non-signaling) \n +/// 0x0D: Greater-than-or-equal (ordered, signaling) \n +/// 0x0E: Greater-than (ordered, signaling) \n +/// 0x0F: True (unordered, non-signaling) \n +/// 0x10: Equal (ordered, signaling) \n +/// 0x11: Less-than (ordered, non-signaling) \n +/// 0x12: Less-than-or-equal (ordered, non-signaling) \n +/// 0x13: Unordered (signaling) \n +/// 0x14: Not-equal (unordered, signaling) \n +/// 0x15: Not-less-than (unordered, non-signaling) \n +/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n +/// 0x17: Ordered (signaling) \n +/// 0x18: Equal (unordered, signaling) \n +/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n +/// 0x1A: Not-greater-than (unordered, non-signaling) \n +/// 0x1B: False (ordered, signaling) \n +/// 0x1C: Not-equal (ordered, signaling) \n +/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n +/// 0x1E: Greater-than (ordered, non-signaling) \n +/// 0x1F: True (unordered, signaling) +/// \returns A 128-bit vector of [2 x double] containing the comparison results. +/// \fn __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c) + +/* Below intrinsic defined in xmmintrin.h can be used for AVX */ +/// Compares each of the corresponding scalar values of two 128-bit +/// vectors of [4 x float], using the operation specified by the immediate +/// integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_cmp_ss(__m128 a, __m128 b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the VCMPSS instruction. +/// +/// \param a +/// A 128-bit vector of [4 x float]. +/// \param b +/// A 128-bit vector of [4 x float]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// 0x08: Equal (unordered, non-signaling) \n +/// 0x09: Not-greater-than-or-equal (unordered, signaling) \n +/// 0x0A: Not-greater-than (unordered, signaling) \n +/// 0x0B: False (ordered, non-signaling) \n +/// 0x0C: Not-equal (ordered, non-signaling) \n +/// 0x0D: Greater-than-or-equal (ordered, signaling) \n +/// 0x0E: Greater-than (ordered, signaling) \n +/// 0x0F: True (unordered, non-signaling) \n +/// 0x10: Equal (ordered, signaling) \n +/// 0x11: Less-than (ordered, non-signaling) \n +/// 0x12: Less-than-or-equal (ordered, non-signaling) \n +/// 0x13: Unordered (signaling) \n +/// 0x14: Not-equal (unordered, signaling) \n +/// 0x15: Not-less-than (unordered, non-signaling) \n +/// 0x16: Not-less-than-or-equal (unordered, non-signaling) \n +/// 0x17: Ordered (signaling) \n +/// 0x18: Equal (unordered, signaling) \n +/// 0x19: Not-greater-than-or-equal (unordered, non-signaling) \n +/// 0x1A: Not-greater-than (unordered, non-signaling) \n +/// 0x1B: False (ordered, signaling) \n +/// 0x1C: Not-equal (ordered, signaling) \n +/// 0x1D: Greater-than-or-equal (ordered, non-signaling) \n +/// 0x1E: Greater-than (ordered, non-signaling) \n +/// 0x1F: True (unordered, signaling) +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +/// \fn __m128 _mm_cmp_ss(__m128 a, __m128 b, const int c) + +/// Takes a [8 x i32] vector and returns the vector element value +/// indexed by the immediate constant operand. +/// +/// \headerfile +/// +/// \code +/// int _mm256_extract_epi32(__m256i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A 256-bit vector of [8 x i32]. +/// \param N +/// An immediate integer operand with bits [2:0] determining which vector +/// element is extracted and returned. +/// \returns A 32-bit integer containing the extracted 32 bits of extended +/// packed data. +#define _mm256_extract_epi32(X, N) \ + ((int)__builtin_ia32_vec_ext_v8si((__v8si)(__m256i)(X), (int)(N))) + +/// Takes a [16 x i16] vector and returns the vector element value +/// indexed by the immediate constant operand. +/// +/// \headerfile +/// +/// \code +/// int _mm256_extract_epi16(__m256i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A 256-bit integer vector of [16 x i16]. +/// \param N +/// An immediate integer operand with bits [3:0] determining which vector +/// element is extracted and returned. +/// \returns A 32-bit integer containing the extracted 16 bits of zero extended +/// packed data. +#define _mm256_extract_epi16(X, N) \ + ((int)(unsigned short)__builtin_ia32_vec_ext_v16hi((__v16hi)(__m256i)(X), \ + (int)(N))) + +/// Takes a [32 x i8] vector and returns the vector element value +/// indexed by the immediate constant operand. +/// +/// \headerfile +/// +/// \code +/// int _mm256_extract_epi8(__m256i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A 256-bit integer vector of [32 x i8]. +/// \param N +/// An immediate integer operand with bits [4:0] determining which vector +/// element is extracted and returned. +/// \returns A 32-bit integer containing the extracted 8 bits of zero extended +/// packed data. +#define _mm256_extract_epi8(X, N) \ + ((int)(unsigned char)__builtin_ia32_vec_ext_v32qi((__v32qi)(__m256i)(X), \ + (int)(N))) + +#ifdef __x86_64__ +/// Takes a [4 x i64] vector and returns the vector element value +/// indexed by the immediate constant operand. +/// +/// \headerfile +/// +/// \code +/// long long _mm256_extract_epi64(__m256i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A 256-bit integer vector of [4 x i64]. +/// \param N +/// An immediate integer operand with bits [1:0] determining which vector +/// element is extracted and returned. +/// \returns A 64-bit integer containing the extracted 64 bits of extended +/// packed data. +#define _mm256_extract_epi64(X, N) \ + ((long long)__builtin_ia32_vec_ext_v4di((__v4di)(__m256i)(X), (int)(N))) +#endif + +/// Takes a [8 x i32] vector and replaces the vector element value +/// indexed by the immediate constant operand by a new value. Returns the +/// modified vector. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_insert_epi32(__m256i X, int I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A vector of [8 x i32] to be used by the insert operation. +/// \param I +/// An integer value. The replacement value for the insert operation. +/// \param N +/// An immediate integer specifying the index of the vector element to be +/// replaced. +/// \returns A copy of vector \a X, after replacing its element indexed by +/// \a N with \a I. +#define _mm256_insert_epi32(X, I, N) \ + ((__m256i)__builtin_ia32_vec_set_v8si((__v8si)(__m256i)(X), \ + (int)(I), (int)(N))) + + +/// Takes a [16 x i16] vector and replaces the vector element value +/// indexed by the immediate constant operand with a new value. Returns the +/// modified vector. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_insert_epi16(__m256i X, int I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A vector of [16 x i16] to be used by the insert operation. +/// \param I +/// An i16 integer value. The replacement value for the insert operation. +/// \param N +/// An immediate integer specifying the index of the vector element to be +/// replaced. +/// \returns A copy of vector \a X, after replacing its element indexed by +/// \a N with \a I. +#define _mm256_insert_epi16(X, I, N) \ + ((__m256i)__builtin_ia32_vec_set_v16hi((__v16hi)(__m256i)(X), \ + (int)(I), (int)(N))) + +/// Takes a [32 x i8] vector and replaces the vector element value +/// indexed by the immediate constant operand with a new value. Returns the +/// modified vector. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_insert_epi8(__m256i X, int I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A vector of [32 x i8] to be used by the insert operation. +/// \param I +/// An i8 integer value. The replacement value for the insert operation. +/// \param N +/// An immediate integer specifying the index of the vector element to be +/// replaced. +/// \returns A copy of vector \a X, after replacing its element indexed by +/// \a N with \a I. +#define _mm256_insert_epi8(X, I, N) \ + ((__m256i)__builtin_ia32_vec_set_v32qi((__v32qi)(__m256i)(X), \ + (int)(I), (int)(N))) + +#ifdef __x86_64__ +/// Takes a [4 x i64] vector and replaces the vector element value +/// indexed by the immediate constant operand with a new value. Returns the +/// modified vector. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_insert_epi64(__m256i X, int I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128+COMPOSITE +/// instruction. +/// +/// \param X +/// A vector of [4 x i64] to be used by the insert operation. +/// \param I +/// A 64-bit integer value. The replacement value for the insert operation. +/// \param N +/// An immediate integer specifying the index of the vector element to be +/// replaced. +/// \returns A copy of vector \a X, after replacing its element indexed by +/// \a N with \a I. +#define _mm256_insert_epi64(X, I, N) \ + ((__m256i)__builtin_ia32_vec_set_v4di((__v4di)(__m256i)(X), \ + (long long)(I), (int)(N))) +#endif + +/* Conversion */ +/// Converts a vector of [4 x i32] into a vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTDQ2PD instruction. +/// +/// \param __a +/// A 128-bit integer vector of [4 x i32]. +/// \returns A 256-bit vector of [4 x double] containing the converted values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_cvtepi32_pd(__m128i __a) +{ + return (__m256d)__builtin_convertvector((__v4si)__a, __v4df); +} + +/// Converts a vector of [8 x i32] into a vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTDQ2PS instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \returns A 256-bit vector of [8 x float] containing the converted values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_cvtepi32_ps(__m256i __a) +{ + return (__m256)__builtin_convertvector((__v8si)__a, __v8sf); +} + +/// Converts a 256-bit vector of [4 x double] into a 128-bit vector of +/// [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPD2PS instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \returns A 128-bit vector of [4 x float] containing the converted values. +static __inline __m128 __DEFAULT_FN_ATTRS +_mm256_cvtpd_ps(__m256d __a) +{ + return (__m128)__builtin_ia32_cvtpd2ps256((__v4df) __a); +} + +/// Converts a vector of [8 x float] into a vector of [8 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPS2DQ instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit integer vector containing the converted values. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_cvtps_epi32(__m256 __a) +{ + return (__m256i)__builtin_ia32_cvtps2dq256((__v8sf) __a); +} + +/// Converts a 128-bit vector of [4 x float] into a 256-bit vector of [4 +/// x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPS2PD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 256-bit vector of [4 x double] containing the converted values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_cvtps_pd(__m128 __a) +{ + return (__m256d)__builtin_convertvector((__v4sf)__a, __v4df); +} + +/// Converts a 256-bit vector of [4 x double] into four signed truncated +/// (rounded toward zero) 32-bit integers returned in a 128-bit vector of +/// [4 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTPD2DQ instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \returns A 128-bit integer vector containing the converted values. +static __inline __m128i __DEFAULT_FN_ATTRS +_mm256_cvttpd_epi32(__m256d __a) +{ + return (__m128i)__builtin_ia32_cvttpd2dq256((__v4df) __a); +} + +/// Converts a 256-bit vector of [4 x double] into a 128-bit vector of +/// [4 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPD2DQ instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \returns A 128-bit integer vector containing the converted values. +static __inline __m128i __DEFAULT_FN_ATTRS +_mm256_cvtpd_epi32(__m256d __a) +{ + return (__m128i)__builtin_ia32_cvtpd2dq256((__v4df) __a); +} + +/// Converts a vector of [8 x float] into eight signed truncated (rounded +/// toward zero) 32-bit integers returned in a vector of [8 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTPS2DQ instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \returns A 256-bit integer vector containing the converted values. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_cvttps_epi32(__m256 __a) +{ + return (__m256i)__builtin_ia32_cvttps2dq256((__v8sf) __a); +} + +/// Returns the first element of the input vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \returns A 64 bit double containing the first element of the input vector. +static __inline double __DEFAULT_FN_ATTRS +_mm256_cvtsd_f64(__m256d __a) +{ + return __a[0]; +} + +/// Returns the first element of the input vector of [8 x i32]. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x i32]. +/// \returns A 32 bit integer containing the first element of the input vector. +static __inline int __DEFAULT_FN_ATTRS +_mm256_cvtsi256_si32(__m256i __a) +{ + __v8si __b = (__v8si)__a; + return __b[0]; +} + +/// Returns the first element of the input vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \returns A 32 bit float containing the first element of the input vector. +static __inline float __DEFAULT_FN_ATTRS +_mm256_cvtss_f32(__m256 __a) +{ + return __a[0]; +} + +/* Vector replicate */ +/// Moves and duplicates odd-indexed values from a 256-bit vector of +/// [8 x float] to float values in a 256-bit vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSHDUP instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. \n +/// Bits [255:224] of \a __a are written to bits [255:224] and [223:192] of +/// the return value. \n +/// Bits [191:160] of \a __a are written to bits [191:160] and [159:128] of +/// the return value. \n +/// Bits [127:96] of \a __a are written to bits [127:96] and [95:64] of the +/// return value. \n +/// Bits [63:32] of \a __a are written to bits [63:32] and [31:0] of the +/// return value. +/// \returns A 256-bit vector of [8 x float] containing the moved and duplicated +/// values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_movehdup_ps(__m256 __a) +{ + return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 1, 1, 3, 3, 5, 5, 7, 7); +} + +/// Moves and duplicates even-indexed values from a 256-bit vector of +/// [8 x float] to float values in a 256-bit vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSLDUP instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. \n +/// Bits [223:192] of \a __a are written to bits [255:224] and [223:192] of +/// the return value. \n +/// Bits [159:128] of \a __a are written to bits [191:160] and [159:128] of +/// the return value. \n +/// Bits [95:64] of \a __a are written to bits [127:96] and [95:64] of the +/// return value. \n +/// Bits [31:0] of \a __a are written to bits [63:32] and [31:0] of the +/// return value. +/// \returns A 256-bit vector of [8 x float] containing the moved and duplicated +/// values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_moveldup_ps(__m256 __a) +{ + return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 0, 2, 2, 4, 4, 6, 6); +} + +/// Moves and duplicates double-precision floating point values from a +/// 256-bit vector of [4 x double] to double-precision values in a 256-bit +/// vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. \n +/// Bits [63:0] of \a __a are written to bits [127:64] and [63:0] of the +/// return value. \n +/// Bits [191:128] of \a __a are written to bits [255:192] and [191:128] of +/// the return value. +/// \returns A 256-bit vector of [4 x double] containing the moved and +/// duplicated values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_movedup_pd(__m256d __a) +{ + return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 0, 2, 2); +} + +/* Unpack and Interleave */ +/// Unpacks the odd-indexed vector elements from two 256-bit vectors of +/// [4 x double] and interleaves them into a 256-bit vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKHPD instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [4 x double]. \n +/// Bits [127:64] are written to bits [63:0] of the return value. \n +/// Bits [255:192] are written to bits [191:128] of the return value. \n +/// \param __b +/// A 256-bit floating-point vector of [4 x double]. \n +/// Bits [127:64] are written to bits [127:64] of the return value. \n +/// Bits [255:192] are written to bits [255:192] of the return value. \n +/// \returns A 256-bit vector of [4 x double] containing the interleaved values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_unpackhi_pd(__m256d __a, __m256d __b) +{ + return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 1, 5, 1+2, 5+2); +} + +/// Unpacks the even-indexed vector elements from two 256-bit vectors of +/// [4 x double] and interleaves them into a 256-bit vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [4 x double]. \n +/// Bits [63:0] are written to bits [63:0] of the return value. \n +/// Bits [191:128] are written to bits [191:128] of the return value. +/// \param __b +/// A 256-bit floating-point vector of [4 x double]. \n +/// Bits [63:0] are written to bits [127:64] of the return value. \n +/// Bits [191:128] are written to bits [255:192] of the return value. \n +/// \returns A 256-bit vector of [4 x double] containing the interleaved values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_unpacklo_pd(__m256d __a, __m256d __b) +{ + return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 0, 4, 0+2, 4+2); +} + +/// Unpacks the 32-bit vector elements 2, 3, 6 and 7 from each of the +/// two 256-bit vectors of [8 x float] and interleaves them into a 256-bit +/// vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKHPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. \n +/// Bits [95:64] are written to bits [31:0] of the return value. \n +/// Bits [127:96] are written to bits [95:64] of the return value. \n +/// Bits [223:192] are written to bits [159:128] of the return value. \n +/// Bits [255:224] are written to bits [223:192] of the return value. +/// \param __b +/// A 256-bit vector of [8 x float]. \n +/// Bits [95:64] are written to bits [63:32] of the return value. \n +/// Bits [127:96] are written to bits [127:96] of the return value. \n +/// Bits [223:192] are written to bits [191:160] of the return value. \n +/// Bits [255:224] are written to bits [255:224] of the return value. +/// \returns A 256-bit vector of [8 x float] containing the interleaved values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_unpackhi_ps(__m256 __a, __m256 __b) +{ + return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 2, 10, 2+1, 10+1, 6, 14, 6+1, 14+1); +} + +/// Unpacks the 32-bit vector elements 0, 1, 4 and 5 from each of the +/// two 256-bit vectors of [8 x float] and interleaves them into a 256-bit +/// vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. \n +/// Bits [31:0] are written to bits [31:0] of the return value. \n +/// Bits [63:32] are written to bits [95:64] of the return value. \n +/// Bits [159:128] are written to bits [159:128] of the return value. \n +/// Bits [191:160] are written to bits [223:192] of the return value. +/// \param __b +/// A 256-bit vector of [8 x float]. \n +/// Bits [31:0] are written to bits [63:32] of the return value. \n +/// Bits [63:32] are written to bits [127:96] of the return value. \n +/// Bits [159:128] are written to bits [191:160] of the return value. \n +/// Bits [191:160] are written to bits [255:224] of the return value. +/// \returns A 256-bit vector of [8 x float] containing the interleaved values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_unpacklo_ps(__m256 __a, __m256 __b) +{ + return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 0, 8, 0+1, 8+1, 4, 12, 4+1, 12+1); +} + +/* Bit Test */ +/// Given two 128-bit floating-point vectors of [2 x double], perform an +/// element-by-element comparison of the double-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of double-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of double-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the ZF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns the ZF flag in the EFLAGS register. +static __inline int __DEFAULT_FN_ATTRS128 +_mm_testz_pd(__m128d __a, __m128d __b) +{ + return __builtin_ia32_vtestzpd((__v2df)__a, (__v2df)__b); +} + +/// Given two 128-bit floating-point vectors of [2 x double], perform an +/// element-by-element comparison of the double-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of double-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of double-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the CF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns the CF flag in the EFLAGS register. +static __inline int __DEFAULT_FN_ATTRS128 +_mm_testc_pd(__m128d __a, __m128d __b) +{ + return __builtin_ia32_vtestcpd((__v2df)__a, (__v2df)__b); +} + +/// Given two 128-bit floating-point vectors of [2 x double], perform an +/// element-by-element comparison of the double-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of double-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of double-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns 1 if both the ZF and CF flags are set to 0, +/// otherwise it returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. +static __inline int __DEFAULT_FN_ATTRS128 +_mm_testnzc_pd(__m128d __a, __m128d __b) +{ + return __builtin_ia32_vtestnzcpd((__v2df)__a, (__v2df)__b); +} + +/// Given two 128-bit floating-point vectors of [4 x float], perform an +/// element-by-element comparison of the single-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of single-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of single-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the ZF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns the ZF flag. +static __inline int __DEFAULT_FN_ATTRS128 +_mm_testz_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_vtestzps((__v4sf)__a, (__v4sf)__b); +} + +/// Given two 128-bit floating-point vectors of [4 x float], perform an +/// element-by-element comparison of the single-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of single-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of single-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the CF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns the CF flag. +static __inline int __DEFAULT_FN_ATTRS128 +_mm_testc_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_vtestcps((__v4sf)__a, (__v4sf)__b); +} + +/// Given two 128-bit floating-point vectors of [4 x float], perform an +/// element-by-element comparison of the single-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of single-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of single-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns 1 if both the ZF and CF flags are set to 0, +/// otherwise it returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. +static __inline int __DEFAULT_FN_ATTRS128 +_mm_testnzc_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_vtestnzcps((__v4sf)__a, (__v4sf)__b); +} + +/// Given two 256-bit floating-point vectors of [4 x double], perform an +/// element-by-element comparison of the double-precision elements in the +/// first source vector and the corresponding elements in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of double-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of double-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the ZF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \param __b +/// A 256-bit vector of [4 x double]. +/// \returns the ZF flag. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testz_pd(__m256d __a, __m256d __b) +{ + return __builtin_ia32_vtestzpd256((__v4df)__a, (__v4df)__b); +} + +/// Given two 256-bit floating-point vectors of [4 x double], perform an +/// element-by-element comparison of the double-precision elements in the +/// first source vector and the corresponding elements in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of double-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of double-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the CF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \param __b +/// A 256-bit vector of [4 x double]. +/// \returns the CF flag. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testc_pd(__m256d __a, __m256d __b) +{ + return __builtin_ia32_vtestcpd256((__v4df)__a, (__v4df)__b); +} + +/// Given two 256-bit floating-point vectors of [4 x double], perform an +/// element-by-element comparison of the double-precision elements in the +/// first source vector and the corresponding elements in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of double-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of double-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns 1 if both the ZF and CF flags are set to 0, +/// otherwise it returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double]. +/// \param __b +/// A 256-bit vector of [4 x double]. +/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testnzc_pd(__m256d __a, __m256d __b) +{ + return __builtin_ia32_vtestnzcpd256((__v4df)__a, (__v4df)__b); +} + +/// Given two 256-bit floating-point vectors of [8 x float], perform an +/// element-by-element comparison of the single-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of single-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of single-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the ZF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \param __b +/// A 256-bit vector of [8 x float]. +/// \returns the ZF flag. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testz_ps(__m256 __a, __m256 __b) +{ + return __builtin_ia32_vtestzps256((__v8sf)__a, (__v8sf)__b); +} + +/// Given two 256-bit floating-point vectors of [8 x float], perform an +/// element-by-element comparison of the single-precision element in the +/// first source vector and the corresponding element in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of single-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of single-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the CF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \param __b +/// A 256-bit vector of [8 x float]. +/// \returns the CF flag. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testc_ps(__m256 __a, __m256 __b) +{ + return __builtin_ia32_vtestcps256((__v8sf)__a, (__v8sf)__b); +} + +/// Given two 256-bit floating-point vectors of [8 x float], perform an +/// element-by-element comparison of the single-precision elements in the +/// first source vector and the corresponding elements in the second source +/// vector. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of single-precision elements where the +/// sign-bits of both elements are 1, the ZF flag is set to 0. Otherwise the +/// ZF flag is set to 1. \n +/// If there is at least one pair of single-precision elements where the +/// sign-bit of the first element is 0 and the sign-bit of the second element +/// is 1, the CF flag is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns 1 if both the ZF and CF flags are set to 0, +/// otherwise it returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VTESTPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float]. +/// \param __b +/// A 256-bit vector of [8 x float]. +/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testnzc_ps(__m256 __a, __m256 __b) +{ + return __builtin_ia32_vtestnzcps256((__v8sf)__a, (__v8sf)__b); +} + +/// Given two 256-bit integer vectors, perform a bit-by-bit comparison +/// of the two source vectors. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of bits where both bits are 1, the ZF flag +/// is set to 0. Otherwise the ZF flag is set to 1. \n +/// If there is at least one pair of bits where the bit from the first source +/// vector is 0 and the bit from the second source vector is 1, the CF flag +/// is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the ZF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPTEST instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \param __b +/// A 256-bit integer vector. +/// \returns the ZF flag. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testz_si256(__m256i __a, __m256i __b) +{ + return __builtin_ia32_ptestz256((__v4di)__a, (__v4di)__b); +} + +/// Given two 256-bit integer vectors, perform a bit-by-bit comparison +/// of the two source vectors. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of bits where both bits are 1, the ZF flag +/// is set to 0. Otherwise the ZF flag is set to 1. \n +/// If there is at least one pair of bits where the bit from the first source +/// vector is 0 and the bit from the second source vector is 1, the CF flag +/// is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns the value of the CF flag. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPTEST instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \param __b +/// A 256-bit integer vector. +/// \returns the CF flag. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testc_si256(__m256i __a, __m256i __b) +{ + return __builtin_ia32_ptestc256((__v4di)__a, (__v4di)__b); +} + +/// Given two 256-bit integer vectors, perform a bit-by-bit comparison +/// of the two source vectors. +/// +/// The EFLAGS register is updated as follows: \n +/// If there is at least one pair of bits where both bits are 1, the ZF flag +/// is set to 0. Otherwise the ZF flag is set to 1. \n +/// If there is at least one pair of bits where the bit from the first source +/// vector is 0 and the bit from the second source vector is 1, the CF flag +/// is set to 0. Otherwise the CF flag is set to 1. \n +/// This intrinsic returns 1 if both the ZF and CF flags are set to 0, +/// otherwise it returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPTEST instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \param __b +/// A 256-bit integer vector. +/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. +static __inline int __DEFAULT_FN_ATTRS +_mm256_testnzc_si256(__m256i __a, __m256i __b) +{ + return __builtin_ia32_ptestnzc256((__v4di)__a, (__v4di)__b); +} + +/* Vector extract sign mask */ +/// Extracts the sign bits of double-precision floating point elements +/// in a 256-bit vector of [4 x double] and writes them to the lower order +/// bits of the return value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVMSKPD instruction. +/// +/// \param __a +/// A 256-bit vector of [4 x double] containing the double-precision +/// floating point values with sign bits to be extracted. +/// \returns The sign bits from the operand, written to bits [3:0]. +static __inline int __DEFAULT_FN_ATTRS +_mm256_movemask_pd(__m256d __a) +{ + return __builtin_ia32_movmskpd256((__v4df)__a); +} + +/// Extracts the sign bits of single-precision floating point elements +/// in a 256-bit vector of [8 x float] and writes them to the lower order +/// bits of the return value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVMSKPS instruction. +/// +/// \param __a +/// A 256-bit vector of [8 x float] containing the single-precision floating +/// point values with sign bits to be extracted. +/// \returns The sign bits from the operand, written to bits [7:0]. +static __inline int __DEFAULT_FN_ATTRS +_mm256_movemask_ps(__m256 __a) +{ + return __builtin_ia32_movmskps256((__v8sf)__a); +} + +/* Vector __zero */ +/// Zeroes the contents of all XMM or YMM registers. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VZEROALL instruction. +static __inline void __attribute__((__always_inline__, __nodebug__, __target__("avx"))) +_mm256_zeroall(void) +{ + __builtin_ia32_vzeroall(); +} + +/// Zeroes the upper 128 bits (bits 255:128) of all YMM registers. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VZEROUPPER instruction. +static __inline void __attribute__((__always_inline__, __nodebug__, __target__("avx"))) +_mm256_zeroupper(void) +{ + __builtin_ia32_vzeroupper(); +} + +/* Vector load with broadcast */ +/// Loads a scalar single-precision floating point value from the +/// specified address pointed to by \a __a and broadcasts it to the elements +/// of a [4 x float] vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBROADCASTSS instruction. +/// +/// \param __a +/// The single-precision floating point value to be broadcast. +/// \returns A 128-bit vector of [4 x float] whose 32-bit elements are set +/// equal to the broadcast value. +static __inline __m128 __DEFAULT_FN_ATTRS128 +_mm_broadcast_ss(float const *__a) +{ + struct __mm_broadcast_ss_struct { + float __f; + } __attribute__((__packed__, __may_alias__)); + float __f = ((const struct __mm_broadcast_ss_struct*)__a)->__f; + return __extension__ (__m128){ __f, __f, __f, __f }; +} + +/// Loads a scalar double-precision floating point value from the +/// specified address pointed to by \a __a and broadcasts it to the elements +/// of a [4 x double] vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBROADCASTSD instruction. +/// +/// \param __a +/// The double-precision floating point value to be broadcast. +/// \returns A 256-bit vector of [4 x double] whose 64-bit elements are set +/// equal to the broadcast value. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_broadcast_sd(double const *__a) +{ + struct __mm256_broadcast_sd_struct { + double __d; + } __attribute__((__packed__, __may_alias__)); + double __d = ((const struct __mm256_broadcast_sd_struct*)__a)->__d; + return __extension__ (__m256d)(__v4df){ __d, __d, __d, __d }; +} + +/// Loads a scalar single-precision floating point value from the +/// specified address pointed to by \a __a and broadcasts it to the elements +/// of a [8 x float] vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBROADCASTSS instruction. +/// +/// \param __a +/// The single-precision floating point value to be broadcast. +/// \returns A 256-bit vector of [8 x float] whose 32-bit elements are set +/// equal to the broadcast value. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_broadcast_ss(float const *__a) +{ + struct __mm256_broadcast_ss_struct { + float __f; + } __attribute__((__packed__, __may_alias__)); + float __f = ((const struct __mm256_broadcast_ss_struct*)__a)->__f; + return __extension__ (__m256)(__v8sf){ __f, __f, __f, __f, __f, __f, __f, __f }; +} + +/// Loads the data from a 128-bit vector of [2 x double] from the +/// specified address pointed to by \a __a and broadcasts it to 128-bit +/// elements in a 256-bit vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBROADCASTF128 instruction. +/// +/// \param __a +/// The 128-bit vector of [2 x double] to be broadcast. +/// \returns A 256-bit vector of [4 x double] whose 128-bit elements are set +/// equal to the broadcast value. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_broadcast_pd(__m128d const *__a) +{ + __m128d __b = _mm_loadu_pd((const double *)__a); + return (__m256d)__builtin_shufflevector((__v2df)__b, (__v2df)__b, + 0, 1, 0, 1); +} + +/// Loads the data from a 128-bit vector of [4 x float] from the +/// specified address pointed to by \a __a and broadcasts it to 128-bit +/// elements in a 256-bit vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBROADCASTF128 instruction. +/// +/// \param __a +/// The 128-bit vector of [4 x float] to be broadcast. +/// \returns A 256-bit vector of [8 x float] whose 128-bit elements are set +/// equal to the broadcast value. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_broadcast_ps(__m128 const *__a) +{ + __m128 __b = _mm_loadu_ps((const float *)__a); + return (__m256)__builtin_shufflevector((__v4sf)__b, (__v4sf)__b, + 0, 1, 2, 3, 0, 1, 2, 3); +} + +/* SIMD load ops */ +/// Loads 4 double-precision floating point values from a 32-byte aligned +/// memory location pointed to by \a __p into a vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPD instruction. +/// +/// \param __p +/// A 32-byte aligned pointer to a memory location containing +/// double-precision floating point values. +/// \returns A 256-bit vector of [4 x double] containing the moved values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_load_pd(double const *__p) +{ + return *(const __m256d *)__p; +} + +/// Loads 8 single-precision floating point values from a 32-byte aligned +/// memory location pointed to by \a __p into a vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS instruction. +/// +/// \param __p +/// A 32-byte aligned pointer to a memory location containing float values. +/// \returns A 256-bit vector of [8 x float] containing the moved values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_load_ps(float const *__p) +{ + return *(const __m256 *)__p; +} + +/// Loads 4 double-precision floating point values from an unaligned +/// memory location pointed to by \a __p into a vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPD instruction. +/// +/// \param __p +/// A pointer to a memory location containing double-precision floating +/// point values. +/// \returns A 256-bit vector of [4 x double] containing the moved values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_loadu_pd(double const *__p) +{ + struct __loadu_pd { + __m256d_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_pd*)__p)->__v; +} + +/// Loads 8 single-precision floating point values from an unaligned +/// memory location pointed to by \a __p into a vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPS instruction. +/// +/// \param __p +/// A pointer to a memory location containing single-precision floating +/// point values. +/// \returns A 256-bit vector of [8 x float] containing the moved values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_loadu_ps(float const *__p) +{ + struct __loadu_ps { + __m256_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_ps*)__p)->__v; +} + +/// Loads 256 bits of integer data from a 32-byte aligned memory +/// location pointed to by \a __p into elements of a 256-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDQA instruction. +/// +/// \param __p +/// A 32-byte aligned pointer to a 256-bit integer vector containing integer +/// values. +/// \returns A 256-bit integer vector containing the moved values. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_load_si256(__m256i const *__p) +{ + return *__p; +} + +/// Loads 256 bits of integer data from an unaligned memory location +/// pointed to by \a __p into a 256-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDQU instruction. +/// +/// \param __p +/// A pointer to a 256-bit integer vector containing integer values. +/// \returns A 256-bit integer vector containing the moved values. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_loadu_si256(__m256i_u const *__p) +{ + struct __loadu_si256 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_si256*)__p)->__v; +} + +/// Loads 256 bits of integer data from an unaligned memory location +/// pointed to by \a __p into a 256-bit integer vector. This intrinsic may +/// perform better than \c _mm256_loadu_si256 when the data crosses a cache +/// line boundary. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VLDDQU instruction. +/// +/// \param __p +/// A pointer to a 256-bit integer vector containing integer values. +/// \returns A 256-bit integer vector containing the moved values. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_lddqu_si256(__m256i_u const *__p) +{ + return (__m256i)__builtin_ia32_lddqu256((char const *)__p); +} + +/* SIMD store ops */ +/// Stores double-precision floating point values from a 256-bit vector +/// of [4 x double] to a 32-byte aligned memory location pointed to by +/// \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPD instruction. +/// +/// \param __p +/// A 32-byte aligned pointer to a memory location that will receive the +/// double-precision floaing point values. +/// \param __a +/// A 256-bit vector of [4 x double] containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_store_pd(double *__p, __m256d __a) +{ + *(__m256d *)__p = __a; +} + +/// Stores single-precision floating point values from a 256-bit vector +/// of [8 x float] to a 32-byte aligned memory location pointed to by \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS instruction. +/// +/// \param __p +/// A 32-byte aligned pointer to a memory location that will receive the +/// float values. +/// \param __a +/// A 256-bit vector of [8 x float] containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_store_ps(float *__p, __m256 __a) +{ + *(__m256 *)__p = __a; +} + +/// Stores double-precision floating point values from a 256-bit vector +/// of [4 x double] to an unaligned memory location pointed to by \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPD instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the double-precision +/// floating point values. +/// \param __a +/// A 256-bit vector of [4 x double] containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_storeu_pd(double *__p, __m256d __a) +{ + struct __storeu_pd { + __m256d_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_pd*)__p)->__v = __a; +} + +/// Stores single-precision floating point values from a 256-bit vector +/// of [8 x float] to an unaligned memory location pointed to by \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPS instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the float values. +/// \param __a +/// A 256-bit vector of [8 x float] containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_storeu_ps(float *__p, __m256 __a) +{ + struct __storeu_ps { + __m256_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_ps*)__p)->__v = __a; +} + +/// Stores integer values from a 256-bit integer vector to a 32-byte +/// aligned memory location pointed to by \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDQA instruction. +/// +/// \param __p +/// A 32-byte aligned pointer to a memory location that will receive the +/// integer values. +/// \param __a +/// A 256-bit integer vector containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_store_si256(__m256i *__p, __m256i __a) +{ + *__p = __a; +} + +/// Stores integer values from a 256-bit integer vector to an unaligned +/// memory location pointed to by \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDQU instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the integer values. +/// \param __a +/// A 256-bit integer vector containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_storeu_si256(__m256i_u *__p, __m256i __a) +{ + struct __storeu_si256 { + __m256i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_si256*)__p)->__v = __a; +} + +/* Conditional load ops */ +/// Conditionally loads double-precision floating point elements from a +/// memory location pointed to by \a __p into a 128-bit vector of +/// [2 x double], depending on the mask bits associated with each data +/// element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPD instruction. +/// +/// \param __p +/// A pointer to a memory location that contains the double-precision +/// floating point values. +/// \param __m +/// A 128-bit integer vector containing the mask. The most significant bit of +/// each data element represents the mask bits. If a mask bit is zero, the +/// corresponding value in the memory location is not loaded and the +/// corresponding field in the return value is set to zero. +/// \returns A 128-bit vector of [2 x double] containing the loaded values. +static __inline __m128d __DEFAULT_FN_ATTRS128 +_mm_maskload_pd(double const *__p, __m128i __m) +{ + return (__m128d)__builtin_ia32_maskloadpd((const __v2df *)__p, (__v2di)__m); +} + +/// Conditionally loads double-precision floating point elements from a +/// memory location pointed to by \a __p into a 256-bit vector of +/// [4 x double], depending on the mask bits associated with each data +/// element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPD instruction. +/// +/// \param __p +/// A pointer to a memory location that contains the double-precision +/// floating point values. +/// \param __m +/// A 256-bit integer vector of [4 x quadword] containing the mask. The most +/// significant bit of each quadword element represents the mask bits. If a +/// mask bit is zero, the corresponding value in the memory location is not +/// loaded and the corresponding field in the return value is set to zero. +/// \returns A 256-bit vector of [4 x double] containing the loaded values. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_maskload_pd(double const *__p, __m256i __m) +{ + return (__m256d)__builtin_ia32_maskloadpd256((const __v4df *)__p, + (__v4di)__m); +} + +/// Conditionally loads single-precision floating point elements from a +/// memory location pointed to by \a __p into a 128-bit vector of +/// [4 x float], depending on the mask bits associated with each data +/// element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPS instruction. +/// +/// \param __p +/// A pointer to a memory location that contains the single-precision +/// floating point values. +/// \param __m +/// A 128-bit integer vector containing the mask. The most significant bit of +/// each data element represents the mask bits. If a mask bit is zero, the +/// corresponding value in the memory location is not loaded and the +/// corresponding field in the return value is set to zero. +/// \returns A 128-bit vector of [4 x float] containing the loaded values. +static __inline __m128 __DEFAULT_FN_ATTRS128 +_mm_maskload_ps(float const *__p, __m128i __m) +{ + return (__m128)__builtin_ia32_maskloadps((const __v4sf *)__p, (__v4si)__m); +} + +/// Conditionally loads single-precision floating point elements from a +/// memory location pointed to by \a __p into a 256-bit vector of +/// [8 x float], depending on the mask bits associated with each data +/// element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPS instruction. +/// +/// \param __p +/// A pointer to a memory location that contains the single-precision +/// floating point values. +/// \param __m +/// A 256-bit integer vector of [8 x dword] containing the mask. The most +/// significant bit of each dword element represents the mask bits. If a mask +/// bit is zero, the corresponding value in the memory location is not loaded +/// and the corresponding field in the return value is set to zero. +/// \returns A 256-bit vector of [8 x float] containing the loaded values. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_maskload_ps(float const *__p, __m256i __m) +{ + return (__m256)__builtin_ia32_maskloadps256((const __v8sf *)__p, (__v8si)__m); +} + +/* Conditional store ops */ +/// Moves single-precision floating point values from a 256-bit vector +/// of [8 x float] to a memory location pointed to by \a __p, according to +/// the specified mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPS instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the float values. +/// \param __m +/// A 256-bit integer vector of [8 x dword] containing the mask. The most +/// significant bit of each dword element in the mask vector represents the +/// mask bits. If a mask bit is zero, the corresponding value from vector +/// \a __a is not stored and the corresponding field in the memory location +/// pointed to by \a __p is not changed. +/// \param __a +/// A 256-bit vector of [8 x float] containing the values to be stored. +static __inline void __DEFAULT_FN_ATTRS +_mm256_maskstore_ps(float *__p, __m256i __m, __m256 __a) +{ + __builtin_ia32_maskstoreps256((__v8sf *)__p, (__v8si)__m, (__v8sf)__a); +} + +/// Moves double-precision values from a 128-bit vector of [2 x double] +/// to a memory location pointed to by \a __p, according to the specified +/// mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPD instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the float values. +/// \param __m +/// A 128-bit integer vector containing the mask. The most significant bit of +/// each field in the mask vector represents the mask bits. If a mask bit is +/// zero, the corresponding value from vector \a __a is not stored and the +/// corresponding field in the memory location pointed to by \a __p is not +/// changed. +/// \param __a +/// A 128-bit vector of [2 x double] containing the values to be stored. +static __inline void __DEFAULT_FN_ATTRS128 +_mm_maskstore_pd(double *__p, __m128i __m, __m128d __a) +{ + __builtin_ia32_maskstorepd((__v2df *)__p, (__v2di)__m, (__v2df)__a); +} + +/// Moves double-precision values from a 256-bit vector of [4 x double] +/// to a memory location pointed to by \a __p, according to the specified +/// mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPD instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the float values. +/// \param __m +/// A 256-bit integer vector of [4 x quadword] containing the mask. The most +/// significant bit of each quadword element in the mask vector represents +/// the mask bits. If a mask bit is zero, the corresponding value from vector +/// __a is not stored and the corresponding field in the memory location +/// pointed to by \a __p is not changed. +/// \param __a +/// A 256-bit vector of [4 x double] containing the values to be stored. +static __inline void __DEFAULT_FN_ATTRS +_mm256_maskstore_pd(double *__p, __m256i __m, __m256d __a) +{ + __builtin_ia32_maskstorepd256((__v4df *)__p, (__v4di)__m, (__v4df)__a); +} + +/// Moves single-precision floating point values from a 128-bit vector +/// of [4 x float] to a memory location pointed to by \a __p, according to +/// the specified mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVPS instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the float values. +/// \param __m +/// A 128-bit integer vector containing the mask. The most significant bit of +/// each field in the mask vector represents the mask bits. If a mask bit is +/// zero, the corresponding value from vector __a is not stored and the +/// corresponding field in the memory location pointed to by \a __p is not +/// changed. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be stored. +static __inline void __DEFAULT_FN_ATTRS128 +_mm_maskstore_ps(float *__p, __m128i __m, __m128 __a) +{ + __builtin_ia32_maskstoreps((__v4sf *)__p, (__v4si)__m, (__v4sf)__a); +} + +/* Cacheability support ops */ +/// Moves integer data from a 256-bit integer vector to a 32-byte +/// aligned memory location. To minimize caching, the data is flagged as +/// non-temporal (unlikely to be used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTDQ instruction. +/// +/// \param __a +/// A pointer to a 32-byte aligned memory location that will receive the +/// integer values. +/// \param __b +/// A 256-bit integer vector containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_stream_si256(void *__a, __m256i __b) +{ + typedef __v4di __v4di_aligned __attribute__((aligned(32))); + __builtin_nontemporal_store((__v4di_aligned)__b, (__v4di_aligned*)__a); +} + +/// Moves double-precision values from a 256-bit vector of [4 x double] +/// to a 32-byte aligned memory location. To minimize caching, the data is +/// flagged as non-temporal (unlikely to be used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTPD instruction. +/// +/// \param __a +/// A pointer to a 32-byte aligned memory location that will receive the +/// double-precision floating-point values. +/// \param __b +/// A 256-bit vector of [4 x double] containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_stream_pd(void *__a, __m256d __b) +{ + typedef __v4df __v4df_aligned __attribute__((aligned(32))); + __builtin_nontemporal_store((__v4df_aligned)__b, (__v4df_aligned*)__a); +} + +/// Moves single-precision floating point values from a 256-bit vector +/// of [8 x float] to a 32-byte aligned memory location. To minimize +/// caching, the data is flagged as non-temporal (unlikely to be used again +/// soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTPS instruction. +/// +/// \param __p +/// A pointer to a 32-byte aligned memory location that will receive the +/// single-precision floating point values. +/// \param __a +/// A 256-bit vector of [8 x float] containing the values to be moved. +static __inline void __DEFAULT_FN_ATTRS +_mm256_stream_ps(void *__p, __m256 __a) +{ + typedef __v8sf __v8sf_aligned __attribute__((aligned(32))); + __builtin_nontemporal_store((__v8sf_aligned)__a, (__v8sf_aligned*)__p); +} + +/* Create vectors */ +/// Create a 256-bit vector of [4 x double] with undefined values. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \returns A 256-bit vector of [4 x double] containing undefined values. +static __inline__ __m256d __DEFAULT_FN_ATTRS +_mm256_undefined_pd(void) +{ + return (__m256d)__builtin_ia32_undef256(); +} + +/// Create a 256-bit vector of [8 x float] with undefined values. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \returns A 256-bit vector of [8 x float] containing undefined values. +static __inline__ __m256 __DEFAULT_FN_ATTRS +_mm256_undefined_ps(void) +{ + return (__m256)__builtin_ia32_undef256(); +} + +/// Create a 256-bit integer vector with undefined values. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \returns A 256-bit integer vector containing undefined values. +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_undefined_si256(void) +{ + return (__m256i)__builtin_ia32_undef256(); +} + +/// Constructs a 256-bit floating-point vector of [4 x double] +/// initialized with the specified double-precision floating-point values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD+VINSERTF128 +/// instruction. +/// +/// \param __a +/// A double-precision floating-point value used to initialize bits [255:192] +/// of the result. +/// \param __b +/// A double-precision floating-point value used to initialize bits [191:128] +/// of the result. +/// \param __c +/// A double-precision floating-point value used to initialize bits [127:64] +/// of the result. +/// \param __d +/// A double-precision floating-point value used to initialize bits [63:0] +/// of the result. +/// \returns An initialized 256-bit floating-point vector of [4 x double]. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_set_pd(double __a, double __b, double __c, double __d) +{ + return __extension__ (__m256d){ __d, __c, __b, __a }; +} + +/// Constructs a 256-bit floating-point vector of [8 x float] initialized +/// with the specified single-precision floating-point values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __a +/// A single-precision floating-point value used to initialize bits [255:224] +/// of the result. +/// \param __b +/// A single-precision floating-point value used to initialize bits [223:192] +/// of the result. +/// \param __c +/// A single-precision floating-point value used to initialize bits [191:160] +/// of the result. +/// \param __d +/// A single-precision floating-point value used to initialize bits [159:128] +/// of the result. +/// \param __e +/// A single-precision floating-point value used to initialize bits [127:96] +/// of the result. +/// \param __f +/// A single-precision floating-point value used to initialize bits [95:64] +/// of the result. +/// \param __g +/// A single-precision floating-point value used to initialize bits [63:32] +/// of the result. +/// \param __h +/// A single-precision floating-point value used to initialize bits [31:0] +/// of the result. +/// \returns An initialized 256-bit floating-point vector of [8 x float]. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_set_ps(float __a, float __b, float __c, float __d, + float __e, float __f, float __g, float __h) +{ + return __extension__ (__m256){ __h, __g, __f, __e, __d, __c, __b, __a }; +} + +/// Constructs a 256-bit integer vector initialized with the specified +/// 32-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i0 +/// A 32-bit integral value used to initialize bits [255:224] of the result. +/// \param __i1 +/// A 32-bit integral value used to initialize bits [223:192] of the result. +/// \param __i2 +/// A 32-bit integral value used to initialize bits [191:160] of the result. +/// \param __i3 +/// A 32-bit integral value used to initialize bits [159:128] of the result. +/// \param __i4 +/// A 32-bit integral value used to initialize bits [127:96] of the result. +/// \param __i5 +/// A 32-bit integral value used to initialize bits [95:64] of the result. +/// \param __i6 +/// A 32-bit integral value used to initialize bits [63:32] of the result. +/// \param __i7 +/// A 32-bit integral value used to initialize bits [31:0] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set_epi32(int __i0, int __i1, int __i2, int __i3, + int __i4, int __i5, int __i6, int __i7) +{ + return __extension__ (__m256i)(__v8si){ __i7, __i6, __i5, __i4, __i3, __i2, __i1, __i0 }; +} + +/// Constructs a 256-bit integer vector initialized with the specified +/// 16-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w15 +/// A 16-bit integral value used to initialize bits [255:240] of the result. +/// \param __w14 +/// A 16-bit integral value used to initialize bits [239:224] of the result. +/// \param __w13 +/// A 16-bit integral value used to initialize bits [223:208] of the result. +/// \param __w12 +/// A 16-bit integral value used to initialize bits [207:192] of the result. +/// \param __w11 +/// A 16-bit integral value used to initialize bits [191:176] of the result. +/// \param __w10 +/// A 16-bit integral value used to initialize bits [175:160] of the result. +/// \param __w09 +/// A 16-bit integral value used to initialize bits [159:144] of the result. +/// \param __w08 +/// A 16-bit integral value used to initialize bits [143:128] of the result. +/// \param __w07 +/// A 16-bit integral value used to initialize bits [127:112] of the result. +/// \param __w06 +/// A 16-bit integral value used to initialize bits [111:96] of the result. +/// \param __w05 +/// A 16-bit integral value used to initialize bits [95:80] of the result. +/// \param __w04 +/// A 16-bit integral value used to initialize bits [79:64] of the result. +/// \param __w03 +/// A 16-bit integral value used to initialize bits [63:48] of the result. +/// \param __w02 +/// A 16-bit integral value used to initialize bits [47:32] of the result. +/// \param __w01 +/// A 16-bit integral value used to initialize bits [31:16] of the result. +/// \param __w00 +/// A 16-bit integral value used to initialize bits [15:0] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set_epi16(short __w15, short __w14, short __w13, short __w12, + short __w11, short __w10, short __w09, short __w08, + short __w07, short __w06, short __w05, short __w04, + short __w03, short __w02, short __w01, short __w00) +{ + return __extension__ (__m256i)(__v16hi){ __w00, __w01, __w02, __w03, __w04, __w05, __w06, + __w07, __w08, __w09, __w10, __w11, __w12, __w13, __w14, __w15 }; +} + +/// Constructs a 256-bit integer vector initialized with the specified +/// 8-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b31 +/// An 8-bit integral value used to initialize bits [255:248] of the result. +/// \param __b30 +/// An 8-bit integral value used to initialize bits [247:240] of the result. +/// \param __b29 +/// An 8-bit integral value used to initialize bits [239:232] of the result. +/// \param __b28 +/// An 8-bit integral value used to initialize bits [231:224] of the result. +/// \param __b27 +/// An 8-bit integral value used to initialize bits [223:216] of the result. +/// \param __b26 +/// An 8-bit integral value used to initialize bits [215:208] of the result. +/// \param __b25 +/// An 8-bit integral value used to initialize bits [207:200] of the result. +/// \param __b24 +/// An 8-bit integral value used to initialize bits [199:192] of the result. +/// \param __b23 +/// An 8-bit integral value used to initialize bits [191:184] of the result. +/// \param __b22 +/// An 8-bit integral value used to initialize bits [183:176] of the result. +/// \param __b21 +/// An 8-bit integral value used to initialize bits [175:168] of the result. +/// \param __b20 +/// An 8-bit integral value used to initialize bits [167:160] of the result. +/// \param __b19 +/// An 8-bit integral value used to initialize bits [159:152] of the result. +/// \param __b18 +/// An 8-bit integral value used to initialize bits [151:144] of the result. +/// \param __b17 +/// An 8-bit integral value used to initialize bits [143:136] of the result. +/// \param __b16 +/// An 8-bit integral value used to initialize bits [135:128] of the result. +/// \param __b15 +/// An 8-bit integral value used to initialize bits [127:120] of the result. +/// \param __b14 +/// An 8-bit integral value used to initialize bits [119:112] of the result. +/// \param __b13 +/// An 8-bit integral value used to initialize bits [111:104] of the result. +/// \param __b12 +/// An 8-bit integral value used to initialize bits [103:96] of the result. +/// \param __b11 +/// An 8-bit integral value used to initialize bits [95:88] of the result. +/// \param __b10 +/// An 8-bit integral value used to initialize bits [87:80] of the result. +/// \param __b09 +/// An 8-bit integral value used to initialize bits [79:72] of the result. +/// \param __b08 +/// An 8-bit integral value used to initialize bits [71:64] of the result. +/// \param __b07 +/// An 8-bit integral value used to initialize bits [63:56] of the result. +/// \param __b06 +/// An 8-bit integral value used to initialize bits [55:48] of the result. +/// \param __b05 +/// An 8-bit integral value used to initialize bits [47:40] of the result. +/// \param __b04 +/// An 8-bit integral value used to initialize bits [39:32] of the result. +/// \param __b03 +/// An 8-bit integral value used to initialize bits [31:24] of the result. +/// \param __b02 +/// An 8-bit integral value used to initialize bits [23:16] of the result. +/// \param __b01 +/// An 8-bit integral value used to initialize bits [15:8] of the result. +/// \param __b00 +/// An 8-bit integral value used to initialize bits [7:0] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set_epi8(char __b31, char __b30, char __b29, char __b28, + char __b27, char __b26, char __b25, char __b24, + char __b23, char __b22, char __b21, char __b20, + char __b19, char __b18, char __b17, char __b16, + char __b15, char __b14, char __b13, char __b12, + char __b11, char __b10, char __b09, char __b08, + char __b07, char __b06, char __b05, char __b04, + char __b03, char __b02, char __b01, char __b00) +{ + return __extension__ (__m256i)(__v32qi){ + __b00, __b01, __b02, __b03, __b04, __b05, __b06, __b07, + __b08, __b09, __b10, __b11, __b12, __b13, __b14, __b15, + __b16, __b17, __b18, __b19, __b20, __b21, __b22, __b23, + __b24, __b25, __b26, __b27, __b28, __b29, __b30, __b31 + }; +} + +/// Constructs a 256-bit integer vector initialized with the specified +/// 64-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKLQDQ+VINSERTF128 +/// instruction. +/// +/// \param __a +/// A 64-bit integral value used to initialize bits [255:192] of the result. +/// \param __b +/// A 64-bit integral value used to initialize bits [191:128] of the result. +/// \param __c +/// A 64-bit integral value used to initialize bits [127:64] of the result. +/// \param __d +/// A 64-bit integral value used to initialize bits [63:0] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set_epi64x(long long __a, long long __b, long long __c, long long __d) +{ + return __extension__ (__m256i)(__v4di){ __d, __c, __b, __a }; +} + +/* Create vectors with elements in reverse order */ +/// Constructs a 256-bit floating-point vector of [4 x double], +/// initialized in reverse order with the specified double-precision +/// floating-point values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD+VINSERTF128 +/// instruction. +/// +/// \param __a +/// A double-precision floating-point value used to initialize bits [63:0] +/// of the result. +/// \param __b +/// A double-precision floating-point value used to initialize bits [127:64] +/// of the result. +/// \param __c +/// A double-precision floating-point value used to initialize bits [191:128] +/// of the result. +/// \param __d +/// A double-precision floating-point value used to initialize bits [255:192] +/// of the result. +/// \returns An initialized 256-bit floating-point vector of [4 x double]. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_setr_pd(double __a, double __b, double __c, double __d) +{ + return _mm256_set_pd(__d, __c, __b, __a); +} + +/// Constructs a 256-bit floating-point vector of [8 x float], +/// initialized in reverse order with the specified single-precision +/// float-point values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __a +/// A single-precision floating-point value used to initialize bits [31:0] +/// of the result. +/// \param __b +/// A single-precision floating-point value used to initialize bits [63:32] +/// of the result. +/// \param __c +/// A single-precision floating-point value used to initialize bits [95:64] +/// of the result. +/// \param __d +/// A single-precision floating-point value used to initialize bits [127:96] +/// of the result. +/// \param __e +/// A single-precision floating-point value used to initialize bits [159:128] +/// of the result. +/// \param __f +/// A single-precision floating-point value used to initialize bits [191:160] +/// of the result. +/// \param __g +/// A single-precision floating-point value used to initialize bits [223:192] +/// of the result. +/// \param __h +/// A single-precision floating-point value used to initialize bits [255:224] +/// of the result. +/// \returns An initialized 256-bit floating-point vector of [8 x float]. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_setr_ps(float __a, float __b, float __c, float __d, + float __e, float __f, float __g, float __h) +{ + return _mm256_set_ps(__h, __g, __f, __e, __d, __c, __b, __a); +} + +/// Constructs a 256-bit integer vector, initialized in reverse order +/// with the specified 32-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i0 +/// A 32-bit integral value used to initialize bits [31:0] of the result. +/// \param __i1 +/// A 32-bit integral value used to initialize bits [63:32] of the result. +/// \param __i2 +/// A 32-bit integral value used to initialize bits [95:64] of the result. +/// \param __i3 +/// A 32-bit integral value used to initialize bits [127:96] of the result. +/// \param __i4 +/// A 32-bit integral value used to initialize bits [159:128] of the result. +/// \param __i5 +/// A 32-bit integral value used to initialize bits [191:160] of the result. +/// \param __i6 +/// A 32-bit integral value used to initialize bits [223:192] of the result. +/// \param __i7 +/// A 32-bit integral value used to initialize bits [255:224] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3, + int __i4, int __i5, int __i6, int __i7) +{ + return _mm256_set_epi32(__i7, __i6, __i5, __i4, __i3, __i2, __i1, __i0); +} + +/// Constructs a 256-bit integer vector, initialized in reverse order +/// with the specified 16-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w15 +/// A 16-bit integral value used to initialize bits [15:0] of the result. +/// \param __w14 +/// A 16-bit integral value used to initialize bits [31:16] of the result. +/// \param __w13 +/// A 16-bit integral value used to initialize bits [47:32] of the result. +/// \param __w12 +/// A 16-bit integral value used to initialize bits [63:48] of the result. +/// \param __w11 +/// A 16-bit integral value used to initialize bits [79:64] of the result. +/// \param __w10 +/// A 16-bit integral value used to initialize bits [95:80] of the result. +/// \param __w09 +/// A 16-bit integral value used to initialize bits [111:96] of the result. +/// \param __w08 +/// A 16-bit integral value used to initialize bits [127:112] of the result. +/// \param __w07 +/// A 16-bit integral value used to initialize bits [143:128] of the result. +/// \param __w06 +/// A 16-bit integral value used to initialize bits [159:144] of the result. +/// \param __w05 +/// A 16-bit integral value used to initialize bits [175:160] of the result. +/// \param __w04 +/// A 16-bit integral value used to initialize bits [191:176] of the result. +/// \param __w03 +/// A 16-bit integral value used to initialize bits [207:192] of the result. +/// \param __w02 +/// A 16-bit integral value used to initialize bits [223:208] of the result. +/// \param __w01 +/// A 16-bit integral value used to initialize bits [239:224] of the result. +/// \param __w00 +/// A 16-bit integral value used to initialize bits [255:240] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12, + short __w11, short __w10, short __w09, short __w08, + short __w07, short __w06, short __w05, short __w04, + short __w03, short __w02, short __w01, short __w00) +{ + return _mm256_set_epi16(__w00, __w01, __w02, __w03, + __w04, __w05, __w06, __w07, + __w08, __w09, __w10, __w11, + __w12, __w13, __w14, __w15); +} + +/// Constructs a 256-bit integer vector, initialized in reverse order +/// with the specified 8-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b31 +/// An 8-bit integral value used to initialize bits [7:0] of the result. +/// \param __b30 +/// An 8-bit integral value used to initialize bits [15:8] of the result. +/// \param __b29 +/// An 8-bit integral value used to initialize bits [23:16] of the result. +/// \param __b28 +/// An 8-bit integral value used to initialize bits [31:24] of the result. +/// \param __b27 +/// An 8-bit integral value used to initialize bits [39:32] of the result. +/// \param __b26 +/// An 8-bit integral value used to initialize bits [47:40] of the result. +/// \param __b25 +/// An 8-bit integral value used to initialize bits [55:48] of the result. +/// \param __b24 +/// An 8-bit integral value used to initialize bits [63:56] of the result. +/// \param __b23 +/// An 8-bit integral value used to initialize bits [71:64] of the result. +/// \param __b22 +/// An 8-bit integral value used to initialize bits [79:72] of the result. +/// \param __b21 +/// An 8-bit integral value used to initialize bits [87:80] of the result. +/// \param __b20 +/// An 8-bit integral value used to initialize bits [95:88] of the result. +/// \param __b19 +/// An 8-bit integral value used to initialize bits [103:96] of the result. +/// \param __b18 +/// An 8-bit integral value used to initialize bits [111:104] of the result. +/// \param __b17 +/// An 8-bit integral value used to initialize bits [119:112] of the result. +/// \param __b16 +/// An 8-bit integral value used to initialize bits [127:120] of the result. +/// \param __b15 +/// An 8-bit integral value used to initialize bits [135:128] of the result. +/// \param __b14 +/// An 8-bit integral value used to initialize bits [143:136] of the result. +/// \param __b13 +/// An 8-bit integral value used to initialize bits [151:144] of the result. +/// \param __b12 +/// An 8-bit integral value used to initialize bits [159:152] of the result. +/// \param __b11 +/// An 8-bit integral value used to initialize bits [167:160] of the result. +/// \param __b10 +/// An 8-bit integral value used to initialize bits [175:168] of the result. +/// \param __b09 +/// An 8-bit integral value used to initialize bits [183:176] of the result. +/// \param __b08 +/// An 8-bit integral value used to initialize bits [191:184] of the result. +/// \param __b07 +/// An 8-bit integral value used to initialize bits [199:192] of the result. +/// \param __b06 +/// An 8-bit integral value used to initialize bits [207:200] of the result. +/// \param __b05 +/// An 8-bit integral value used to initialize bits [215:208] of the result. +/// \param __b04 +/// An 8-bit integral value used to initialize bits [223:216] of the result. +/// \param __b03 +/// An 8-bit integral value used to initialize bits [231:224] of the result. +/// \param __b02 +/// An 8-bit integral value used to initialize bits [239:232] of the result. +/// \param __b01 +/// An 8-bit integral value used to initialize bits [247:240] of the result. +/// \param __b00 +/// An 8-bit integral value used to initialize bits [255:248] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28, + char __b27, char __b26, char __b25, char __b24, + char __b23, char __b22, char __b21, char __b20, + char __b19, char __b18, char __b17, char __b16, + char __b15, char __b14, char __b13, char __b12, + char __b11, char __b10, char __b09, char __b08, + char __b07, char __b06, char __b05, char __b04, + char __b03, char __b02, char __b01, char __b00) +{ + return _mm256_set_epi8(__b00, __b01, __b02, __b03, __b04, __b05, __b06, __b07, + __b08, __b09, __b10, __b11, __b12, __b13, __b14, __b15, + __b16, __b17, __b18, __b19, __b20, __b21, __b22, __b23, + __b24, __b25, __b26, __b27, __b28, __b29, __b30, __b31); +} + +/// Constructs a 256-bit integer vector, initialized in reverse order +/// with the specified 64-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKLQDQ+VINSERTF128 +/// instruction. +/// +/// \param __a +/// A 64-bit integral value used to initialize bits [63:0] of the result. +/// \param __b +/// A 64-bit integral value used to initialize bits [127:64] of the result. +/// \param __c +/// A 64-bit integral value used to initialize bits [191:128] of the result. +/// \param __d +/// A 64-bit integral value used to initialize bits [255:192] of the result. +/// \returns An initialized 256-bit integer vector. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_setr_epi64x(long long __a, long long __b, long long __c, long long __d) +{ + return _mm256_set_epi64x(__d, __c, __b, __a); +} + +/* Create vectors with repeated elements */ +/// Constructs a 256-bit floating-point vector of [4 x double], with each +/// of the four double-precision floating-point vector elements set to the +/// specified double-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP+VINSERTF128 instruction. +/// +/// \param __w +/// A double-precision floating-point value used to initialize each vector +/// element of the result. +/// \returns An initialized 256-bit floating-point vector of [4 x double]. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_set1_pd(double __w) +{ + return _mm256_set_pd(__w, __w, __w, __w); +} + +/// Constructs a 256-bit floating-point vector of [8 x float], with each +/// of the eight single-precision floating-point vector elements set to the +/// specified single-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPS+VINSERTF128 +/// instruction. +/// +/// \param __w +/// A single-precision floating-point value used to initialize each vector +/// element of the result. +/// \returns An initialized 256-bit floating-point vector of [8 x float]. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_set1_ps(float __w) +{ + return _mm256_set_ps(__w, __w, __w, __w, __w, __w, __w, __w); +} + +/// Constructs a 256-bit integer vector of [8 x i32], with each of the +/// 32-bit integral vector elements set to the specified 32-bit integral +/// value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPS+VINSERTF128 +/// instruction. +/// +/// \param __i +/// A 32-bit integral value used to initialize each vector element of the +/// result. +/// \returns An initialized 256-bit integer vector of [8 x i32]. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set1_epi32(int __i) +{ + return _mm256_set_epi32(__i, __i, __i, __i, __i, __i, __i, __i); +} + +/// Constructs a 256-bit integer vector of [16 x i16], with each of the +/// 16-bit integral vector elements set to the specified 16-bit integral +/// value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSHUFB+VINSERTF128 instruction. +/// +/// \param __w +/// A 16-bit integral value used to initialize each vector element of the +/// result. +/// \returns An initialized 256-bit integer vector of [16 x i16]. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set1_epi16(short __w) +{ + return _mm256_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w, + __w, __w, __w, __w, __w, __w, __w, __w); +} + +/// Constructs a 256-bit integer vector of [32 x i8], with each of the +/// 8-bit integral vector elements set to the specified 8-bit integral value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSHUFB+VINSERTF128 instruction. +/// +/// \param __b +/// An 8-bit integral value used to initialize each vector element of the +/// result. +/// \returns An initialized 256-bit integer vector of [32 x i8]. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set1_epi8(char __b) +{ + return _mm256_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, + __b, __b, __b, __b, __b, __b, __b, __b, + __b, __b, __b, __b, __b, __b, __b, __b, + __b, __b, __b, __b, __b, __b, __b, __b); +} + +/// Constructs a 256-bit integer vector of [4 x i64], with each of the +/// 64-bit integral vector elements set to the specified 64-bit integral +/// value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP+VINSERTF128 instruction. +/// +/// \param __q +/// A 64-bit integral value used to initialize each vector element of the +/// result. +/// \returns An initialized 256-bit integer vector of [4 x i64]. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set1_epi64x(long long __q) +{ + return _mm256_set_epi64x(__q, __q, __q, __q); +} + +/* Create __zeroed vectors */ +/// Constructs a 256-bit floating-point vector of [4 x double] with all +/// vector elements initialized to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS instruction. +/// +/// \returns A 256-bit vector of [4 x double] with all elements set to zero. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_setzero_pd(void) +{ + return __extension__ (__m256d){ 0.0, 0.0, 0.0, 0.0 }; +} + +/// Constructs a 256-bit floating-point vector of [8 x float] with all +/// vector elements initialized to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS instruction. +/// +/// \returns A 256-bit vector of [8 x float] with all elements set to zero. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_setzero_ps(void) +{ + return __extension__ (__m256){ 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f }; +} + +/// Constructs a 256-bit integer vector initialized to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS instruction. +/// +/// \returns A 256-bit integer vector initialized to zero. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_setzero_si256(void) +{ + return __extension__ (__m256i)(__v4di){ 0, 0, 0, 0 }; +} + +/* Cast between vector types */ +/// Casts a 256-bit floating-point vector of [4 x double] into a 256-bit +/// floating-point vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [4 x double]. +/// \returns A 256-bit floating-point vector of [8 x float] containing the same +/// bitwise pattern as the parameter. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_castpd_ps(__m256d __a) +{ + return (__m256)__a; +} + +/// Casts a 256-bit floating-point vector of [4 x double] into a 256-bit +/// integer vector. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [4 x double]. +/// \returns A 256-bit integer vector containing the same bitwise pattern as the +/// parameter. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_castpd_si256(__m256d __a) +{ + return (__m256i)__a; +} + +/// Casts a 256-bit floating-point vector of [8 x float] into a 256-bit +/// floating-point vector of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [8 x float]. +/// \returns A 256-bit floating-point vector of [4 x double] containing the same +/// bitwise pattern as the parameter. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_castps_pd(__m256 __a) +{ + return (__m256d)__a; +} + +/// Casts a 256-bit floating-point vector of [8 x float] into a 256-bit +/// integer vector. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [8 x float]. +/// \returns A 256-bit integer vector containing the same bitwise pattern as the +/// parameter. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_castps_si256(__m256 __a) +{ + return (__m256i)__a; +} + +/// Casts a 256-bit integer vector into a 256-bit floating-point vector +/// of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \returns A 256-bit floating-point vector of [8 x float] containing the same +/// bitwise pattern as the parameter. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_castsi256_ps(__m256i __a) +{ + return (__m256)__a; +} + +/// Casts a 256-bit integer vector into a 256-bit floating-point vector +/// of [4 x double]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \returns A 256-bit floating-point vector of [4 x double] containing the same +/// bitwise pattern as the parameter. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_castsi256_pd(__m256i __a) +{ + return (__m256d)__a; +} + +/// Returns the lower 128 bits of a 256-bit floating-point vector of +/// [4 x double] as a 128-bit floating-point vector of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [4 x double]. +/// \returns A 128-bit floating-point vector of [2 x double] containing the +/// lower 128 bits of the parameter. +static __inline __m128d __DEFAULT_FN_ATTRS +_mm256_castpd256_pd128(__m256d __a) +{ + return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 1); +} + +/// Returns the lower 128 bits of a 256-bit floating-point vector of +/// [8 x float] as a 128-bit floating-point vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit floating-point vector of [8 x float]. +/// \returns A 128-bit floating-point vector of [4 x float] containing the +/// lower 128 bits of the parameter. +static __inline __m128 __DEFAULT_FN_ATTRS +_mm256_castps256_ps128(__m256 __a) +{ + return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 1, 2, 3); +} + +/// Truncates a 256-bit integer vector into a 128-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 256-bit integer vector. +/// \returns A 128-bit integer vector containing the lower 128 bits of the +/// parameter. +static __inline __m128i __DEFAULT_FN_ATTRS +_mm256_castsi256_si128(__m256i __a) +{ + return __builtin_shufflevector((__v4di)__a, (__v4di)__a, 0, 1); +} + +/// Constructs a 256-bit floating-point vector of [4 x double] from a +/// 128-bit floating-point vector of [2 x double]. +/// +/// The lower 128 bits contain the value of the source vector. The contents +/// of the upper 128 bits are undefined. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 256-bit floating-point vector of [4 x double]. The lower 128 bits +/// contain the value of the parameter. The contents of the upper 128 bits +/// are undefined. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_castpd128_pd256(__m128d __a) +{ + return __builtin_shufflevector( + (__v2df)__a, (__v2df)__builtin_nondeterministic_value(__a), 0, 1, 2, 3); +} + +/// Constructs a 256-bit floating-point vector of [8 x float] from a +/// 128-bit floating-point vector of [4 x float]. +/// +/// The lower 128 bits contain the value of the source vector. The contents +/// of the upper 128 bits are undefined. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 256-bit floating-point vector of [8 x float]. The lower 128 bits +/// contain the value of the parameter. The contents of the upper 128 bits +/// are undefined. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_castps128_ps256(__m128 __a) +{ + return __builtin_shufflevector((__v4sf)__a, + (__v4sf)__builtin_nondeterministic_value(__a), + 0, 1, 2, 3, 4, 5, 6, 7); +} + +/// Constructs a 256-bit integer vector from a 128-bit integer vector. +/// +/// The lower 128 bits contain the value of the source vector. The contents +/// of the upper 128 bits are undefined. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \returns A 256-bit integer vector. The lower 128 bits contain the value of +/// the parameter. The contents of the upper 128 bits are undefined. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_castsi128_si256(__m128i __a) +{ + return __builtin_shufflevector( + (__v2di)__a, (__v2di)__builtin_nondeterministic_value(__a), 0, 1, 2, 3); +} + +/// Constructs a 256-bit floating-point vector of [4 x double] from a +/// 128-bit floating-point vector of [2 x double]. The lower 128 bits +/// contain the value of the source vector. The upper 128 bits are set +/// to zero. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 256-bit floating-point vector of [4 x double]. The lower 128 bits +/// contain the value of the parameter. The upper 128 bits are set to zero. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_zextpd128_pd256(__m128d __a) +{ + return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3); +} + +/// Constructs a 256-bit floating-point vector of [8 x float] from a +/// 128-bit floating-point vector of [4 x float]. The lower 128 bits contain +/// the value of the source vector. The upper 128 bits are set to zero. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 256-bit floating-point vector of [8 x float]. The lower 128 bits +/// contain the value of the parameter. The upper 128 bits are set to zero. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_zextps128_ps256(__m128 __a) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7); +} + +/// Constructs a 256-bit integer vector from a 128-bit integer vector. +/// The lower 128 bits contain the value of the source vector. The upper +/// 128 bits are set to zero. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \returns A 256-bit integer vector. The lower 128 bits contain the value of +/// the parameter. The upper 128 bits are set to zero. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_zextsi128_si256(__m128i __a) +{ + return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3); +} + +/* + Vector insert. + We use macros rather than inlines because we only want to accept + invocations where the immediate M is a constant expression. +*/ +/// Constructs a new 256-bit vector of [8 x float] by first duplicating +/// a 256-bit vector of [8 x float] given in the first parameter, and then +/// replacing either the upper or the lower 128 bits with the contents of a +/// 128-bit vector of [4 x float] in the second parameter. +/// +/// The immediate integer parameter determines between the upper or the lower +/// 128 bits. +/// +/// \headerfile +/// +/// \code +/// __m256 _mm256_insertf128_ps(__m256 V1, __m128 V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param V1 +/// A 256-bit vector of [8 x float]. This vector is copied to the result +/// first, and then either the upper or the lower 128 bits of the result will +/// be replaced by the contents of \a V2. +/// \param V2 +/// A 128-bit vector of [4 x float]. The contents of this parameter are +/// written to either the upper or the lower 128 bits of the result depending +/// on the value of parameter \a M. +/// \param M +/// An immediate integer. The least significant bit determines how the values +/// from the two parameters are interleaved: \n +/// If bit [0] of \a M is 0, \a V2 are copied to bits [127:0] of the result, +/// and bits [255:128] of \a V1 are copied to bits [255:128] of the +/// result. \n +/// If bit [0] of \a M is 1, \a V2 are copied to bits [255:128] of the +/// result, and bits [127:0] of \a V1 are copied to bits [127:0] of the +/// result. +/// \returns A 256-bit vector of [8 x float] containing the interleaved values. +#define _mm256_insertf128_ps(V1, V2, M) \ + ((__m256)__builtin_ia32_vinsertf128_ps256((__v8sf)(__m256)(V1), \ + (__v4sf)(__m128)(V2), (int)(M))) + +/// Constructs a new 256-bit vector of [4 x double] by first duplicating +/// a 256-bit vector of [4 x double] given in the first parameter, and then +/// replacing either the upper or the lower 128 bits with the contents of a +/// 128-bit vector of [2 x double] in the second parameter. +/// +/// The immediate integer parameter determines between the upper or the lower +/// 128 bits. +/// +/// \headerfile +/// +/// \code +/// __m256d _mm256_insertf128_pd(__m256d V1, __m128d V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param V1 +/// A 256-bit vector of [4 x double]. This vector is copied to the result +/// first, and then either the upper or the lower 128 bits of the result will +/// be replaced by the contents of \a V2. +/// \param V2 +/// A 128-bit vector of [2 x double]. The contents of this parameter are +/// written to either the upper or the lower 128 bits of the result depending +/// on the value of parameter \a M. +/// \param M +/// An immediate integer. The least significant bit determines how the values +/// from the two parameters are interleaved: \n +/// If bit [0] of \a M is 0, \a V2 are copied to bits [127:0] of the result, +/// and bits [255:128] of \a V1 are copied to bits [255:128] of the +/// result. \n +/// If bit [0] of \a M is 1, \a V2 are copied to bits [255:128] of the +/// result, and bits [127:0] of \a V1 are copied to bits [127:0] of the +/// result. +/// \returns A 256-bit vector of [4 x double] containing the interleaved values. +#define _mm256_insertf128_pd(V1, V2, M) \ + ((__m256d)__builtin_ia32_vinsertf128_pd256((__v4df)(__m256d)(V1), \ + (__v2df)(__m128d)(V2), (int)(M))) + +/// Constructs a new 256-bit integer vector by first duplicating a +/// 256-bit integer vector given in the first parameter, and then replacing +/// either the upper or the lower 128 bits with the contents of a 128-bit +/// integer vector in the second parameter. +/// +/// The immediate integer parameter determines between the upper or the lower +/// 128 bits. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_insertf128_si256(__m256i V1, __m128i V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param V1 +/// A 256-bit integer vector. This vector is copied to the result first, and +/// then either the upper or the lower 128 bits of the result will be +/// replaced by the contents of \a V2. +/// \param V2 +/// A 128-bit integer vector. The contents of this parameter are written to +/// either the upper or the lower 128 bits of the result depending on the +/// value of parameter \a M. +/// \param M +/// An immediate integer. The least significant bit determines how the values +/// from the two parameters are interleaved: \n +/// If bit [0] of \a M is 0, \a V2 are copied to bits [127:0] of the result, +/// and bits [255:128] of \a V1 are copied to bits [255:128] of the +/// result. \n +/// If bit [0] of \a M is 1, \a V2 are copied to bits [255:128] of the +/// result, and bits [127:0] of \a V1 are copied to bits [127:0] of the +/// result. +/// \returns A 256-bit integer vector containing the interleaved values. +#define _mm256_insertf128_si256(V1, V2, M) \ + ((__m256i)__builtin_ia32_vinsertf128_si256((__v8si)(__m256i)(V1), \ + (__v4si)(__m128i)(V2), (int)(M))) + +/* + Vector extract. + We use macros rather than inlines because we only want to accept + invocations where the immediate M is a constant expression. +*/ +/// Extracts either the upper or the lower 128 bits from a 256-bit vector +/// of [8 x float], as determined by the immediate integer parameter, and +/// returns the extracted bits as a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm256_extractf128_ps(__m256 V, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128 instruction. +/// +/// \param V +/// A 256-bit vector of [8 x float]. +/// \param M +/// An immediate integer. The least significant bit determines which bits are +/// extracted from the first parameter: \n +/// If bit [0] of \a M is 0, bits [127:0] of \a V are copied to the +/// result. \n +/// If bit [0] of \a M is 1, bits [255:128] of \a V are copied to the result. +/// \returns A 128-bit vector of [4 x float] containing the extracted bits. +#define _mm256_extractf128_ps(V, M) \ + ((__m128)__builtin_ia32_vextractf128_ps256((__v8sf)(__m256)(V), (int)(M))) + +/// Extracts either the upper or the lower 128 bits from a 256-bit vector +/// of [4 x double], as determined by the immediate integer parameter, and +/// returns the extracted bits as a 128-bit vector of [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm256_extractf128_pd(__m256d V, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128 instruction. +/// +/// \param V +/// A 256-bit vector of [4 x double]. +/// \param M +/// An immediate integer. The least significant bit determines which bits are +/// extracted from the first parameter: \n +/// If bit [0] of \a M is 0, bits [127:0] of \a V are copied to the +/// result. \n +/// If bit [0] of \a M is 1, bits [255:128] of \a V are copied to the result. +/// \returns A 128-bit vector of [2 x double] containing the extracted bits. +#define _mm256_extractf128_pd(V, M) \ + ((__m128d)__builtin_ia32_vextractf128_pd256((__v4df)(__m256d)(V), (int)(M))) + +/// Extracts either the upper or the lower 128 bits from a 256-bit +/// integer vector, as determined by the immediate integer parameter, and +/// returns the extracted bits as a 128-bit integer vector. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm256_extractf128_si256(__m256i V, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTF128 instruction. +/// +/// \param V +/// A 256-bit integer vector. +/// \param M +/// An immediate integer. The least significant bit determines which bits are +/// extracted from the first parameter: \n +/// If bit [0] of \a M is 0, bits [127:0] of \a V are copied to the +/// result. \n +/// If bit [0] of \a M is 1, bits [255:128] of \a V are copied to the result. +/// \returns A 128-bit integer vector containing the extracted bits. +#define _mm256_extractf128_si256(V, M) \ + ((__m128i)__builtin_ia32_vextractf128_si256((__v8si)(__m256i)(V), (int)(M))) + +/// Constructs a 256-bit floating-point vector of [8 x float] by +/// concatenating two 128-bit floating-point vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param __hi +/// A 128-bit floating-point vector of [4 x float] to be copied to the upper +/// 128 bits of the result. +/// \param __lo +/// A 128-bit floating-point vector of [4 x float] to be copied to the lower +/// 128 bits of the result. +/// \returns A 256-bit floating-point vector of [8 x float] containing the +/// concatenated result. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_set_m128 (__m128 __hi, __m128 __lo) +{ + return (__m256) __builtin_shufflevector((__v4sf)__lo, (__v4sf)__hi, 0, 1, 2, 3, 4, 5, 6, 7); +} + +/// Constructs a 256-bit floating-point vector of [4 x double] by +/// concatenating two 128-bit floating-point vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param __hi +/// A 128-bit floating-point vector of [2 x double] to be copied to the upper +/// 128 bits of the result. +/// \param __lo +/// A 128-bit floating-point vector of [2 x double] to be copied to the lower +/// 128 bits of the result. +/// \returns A 256-bit floating-point vector of [4 x double] containing the +/// concatenated result. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_set_m128d (__m128d __hi, __m128d __lo) +{ + return (__m256d) __builtin_shufflevector((__v2df)__lo, (__v2df)__hi, 0, 1, 2, 3); +} + +/// Constructs a 256-bit integer vector by concatenating two 128-bit +/// integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param __hi +/// A 128-bit integer vector to be copied to the upper 128 bits of the +/// result. +/// \param __lo +/// A 128-bit integer vector to be copied to the lower 128 bits of the +/// result. +/// \returns A 256-bit integer vector containing the concatenated result. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_set_m128i (__m128i __hi, __m128i __lo) +{ + return (__m256i) __builtin_shufflevector((__v2di)__lo, (__v2di)__hi, 0, 1, 2, 3); +} + +/// Constructs a 256-bit floating-point vector of [8 x float] by +/// concatenating two 128-bit floating-point vectors of [4 x float]. This is +/// similar to _mm256_set_m128, but the order of the input parameters is +/// swapped. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param __lo +/// A 128-bit floating-point vector of [4 x float] to be copied to the lower +/// 128 bits of the result. +/// \param __hi +/// A 128-bit floating-point vector of [4 x float] to be copied to the upper +/// 128 bits of the result. +/// \returns A 256-bit floating-point vector of [8 x float] containing the +/// concatenated result. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_setr_m128 (__m128 __lo, __m128 __hi) +{ + return _mm256_set_m128(__hi, __lo); +} + +/// Constructs a 256-bit floating-point vector of [4 x double] by +/// concatenating two 128-bit floating-point vectors of [2 x double]. This is +/// similar to _mm256_set_m128d, but the order of the input parameters is +/// swapped. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param __lo +/// A 128-bit floating-point vector of [2 x double] to be copied to the lower +/// 128 bits of the result. +/// \param __hi +/// A 128-bit floating-point vector of [2 x double] to be copied to the upper +/// 128 bits of the result. +/// \returns A 256-bit floating-point vector of [4 x double] containing the +/// concatenated result. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_setr_m128d (__m128d __lo, __m128d __hi) +{ + return (__m256d)_mm256_set_m128d(__hi, __lo); +} + +/// Constructs a 256-bit integer vector by concatenating two 128-bit +/// integer vectors. This is similar to _mm256_set_m128i, but the order of +/// the input parameters is swapped. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VINSERTF128 instruction. +/// +/// \param __lo +/// A 128-bit integer vector to be copied to the lower 128 bits of the +/// result. +/// \param __hi +/// A 128-bit integer vector to be copied to the upper 128 bits of the +/// result. +/// \returns A 256-bit integer vector containing the concatenated result. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_setr_m128i (__m128i __lo, __m128i __hi) +{ + return (__m256i)_mm256_set_m128i(__hi, __lo); +} + +/* SIMD load ops (unaligned) */ +/// Loads two 128-bit floating-point vectors of [4 x float] from +/// unaligned memory locations and constructs a 256-bit floating-point vector +/// of [8 x float] by concatenating the two 128-bit vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to load instructions followed by the +/// VINSERTF128 instruction. +/// +/// \param __addr_hi +/// A pointer to a 128-bit memory location containing 4 consecutive +/// single-precision floating-point values. These values are to be copied to +/// bits[255:128] of the result. The address of the memory location does not +/// have to be aligned. +/// \param __addr_lo +/// A pointer to a 128-bit memory location containing 4 consecutive +/// single-precision floating-point values. These values are to be copied to +/// bits[127:0] of the result. The address of the memory location does not +/// have to be aligned. +/// \returns A 256-bit floating-point vector of [8 x float] containing the +/// concatenated result. +static __inline __m256 __DEFAULT_FN_ATTRS +_mm256_loadu2_m128(float const *__addr_hi, float const *__addr_lo) +{ + return _mm256_set_m128(_mm_loadu_ps(__addr_hi), _mm_loadu_ps(__addr_lo)); +} + +/// Loads two 128-bit floating-point vectors of [2 x double] from +/// unaligned memory locations and constructs a 256-bit floating-point vector +/// of [4 x double] by concatenating the two 128-bit vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to load instructions followed by the +/// VINSERTF128 instruction. +/// +/// \param __addr_hi +/// A pointer to a 128-bit memory location containing two consecutive +/// double-precision floating-point values. These values are to be copied to +/// bits[255:128] of the result. The address of the memory location does not +/// have to be aligned. +/// \param __addr_lo +/// A pointer to a 128-bit memory location containing two consecutive +/// double-precision floating-point values. These values are to be copied to +/// bits[127:0] of the result. The address of the memory location does not +/// have to be aligned. +/// \returns A 256-bit floating-point vector of [4 x double] containing the +/// concatenated result. +static __inline __m256d __DEFAULT_FN_ATTRS +_mm256_loadu2_m128d(double const *__addr_hi, double const *__addr_lo) +{ + return _mm256_set_m128d(_mm_loadu_pd(__addr_hi), _mm_loadu_pd(__addr_lo)); +} + +/// Loads two 128-bit integer vectors from unaligned memory locations and +/// constructs a 256-bit integer vector by concatenating the two 128-bit +/// vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to load instructions followed by the +/// VINSERTF128 instruction. +/// +/// \param __addr_hi +/// A pointer to a 128-bit memory location containing a 128-bit integer +/// vector. This vector is to be copied to bits[255:128] of the result. The +/// address of the memory location does not have to be aligned. +/// \param __addr_lo +/// A pointer to a 128-bit memory location containing a 128-bit integer +/// vector. This vector is to be copied to bits[127:0] of the result. The +/// address of the memory location does not have to be aligned. +/// \returns A 256-bit integer vector containing the concatenated result. +static __inline __m256i __DEFAULT_FN_ATTRS +_mm256_loadu2_m128i(__m128i_u const *__addr_hi, __m128i_u const *__addr_lo) +{ + return _mm256_set_m128i(_mm_loadu_si128(__addr_hi), _mm_loadu_si128(__addr_lo)); +} + +/* SIMD store ops (unaligned) */ +/// Stores the upper and lower 128 bits of a 256-bit floating-point +/// vector of [8 x float] into two different unaligned memory locations. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VEXTRACTF128 instruction and the +/// store instructions. +/// +/// \param __addr_hi +/// A pointer to a 128-bit memory location. Bits[255:128] of \a __a are to be +/// copied to this memory location. The address of this memory location does +/// not have to be aligned. +/// \param __addr_lo +/// A pointer to a 128-bit memory location. Bits[127:0] of \a __a are to be +/// copied to this memory location. The address of this memory location does +/// not have to be aligned. +/// \param __a +/// A 256-bit floating-point vector of [8 x float]. +static __inline void __DEFAULT_FN_ATTRS +_mm256_storeu2_m128(float *__addr_hi, float *__addr_lo, __m256 __a) +{ + __m128 __v128; + + __v128 = _mm256_castps256_ps128(__a); + _mm_storeu_ps(__addr_lo, __v128); + __v128 = _mm256_extractf128_ps(__a, 1); + _mm_storeu_ps(__addr_hi, __v128); +} + +/// Stores the upper and lower 128 bits of a 256-bit floating-point +/// vector of [4 x double] into two different unaligned memory locations. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VEXTRACTF128 instruction and the +/// store instructions. +/// +/// \param __addr_hi +/// A pointer to a 128-bit memory location. Bits[255:128] of \a __a are to be +/// copied to this memory location. The address of this memory location does +/// not have to be aligned. +/// \param __addr_lo +/// A pointer to a 128-bit memory location. Bits[127:0] of \a __a are to be +/// copied to this memory location. The address of this memory location does +/// not have to be aligned. +/// \param __a +/// A 256-bit floating-point vector of [4 x double]. +static __inline void __DEFAULT_FN_ATTRS +_mm256_storeu2_m128d(double *__addr_hi, double *__addr_lo, __m256d __a) +{ + __m128d __v128; + + __v128 = _mm256_castpd256_pd128(__a); + _mm_storeu_pd(__addr_lo, __v128); + __v128 = _mm256_extractf128_pd(__a, 1); + _mm_storeu_pd(__addr_hi, __v128); +} + +/// Stores the upper and lower 128 bits of a 256-bit integer vector into +/// two different unaligned memory locations. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VEXTRACTF128 instruction and the +/// store instructions. +/// +/// \param __addr_hi +/// A pointer to a 128-bit memory location. Bits[255:128] of \a __a are to be +/// copied to this memory location. The address of this memory location does +/// not have to be aligned. +/// \param __addr_lo +/// A pointer to a 128-bit memory location. Bits[127:0] of \a __a are to be +/// copied to this memory location. The address of this memory location does +/// not have to be aligned. +/// \param __a +/// A 256-bit integer vector. +static __inline void __DEFAULT_FN_ATTRS +_mm256_storeu2_m128i(__m128i_u *__addr_hi, __m128i_u *__addr_lo, __m256i __a) +{ + __m128i __v128; + + __v128 = _mm256_castsi256_si128(__a); + _mm_storeu_si128(__addr_lo, __v128); + __v128 = _mm256_extractf128_si256(__a, 1); + _mm_storeu_si128(__addr_hi, __v128); +} + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS128 + +#endif /* __AVXINTRIN_H */ diff --git a/llvm/lib/clang/19/include/avxneconvertintrin.h b/llvm/lib/clang/19/include/avxneconvertintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..1bef1c89378795c86c8d40100bffccb2da913d90 --- /dev/null +++ b/llvm/lib/clang/19/include/avxneconvertintrin.h @@ -0,0 +1,484 @@ +/*===-------------- avxneconvertintrin.h - AVXNECONVERT --------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error \ + "Never use directly; include instead." +#endif // __IMMINTRIN_H + +#ifdef __SSE2__ + +#ifndef __AVXNECONVERTINTRIN_H +#define __AVXNECONVERTINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxneconvert"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxneconvert"), \ + __min_vector_width__(256))) + +/// Convert scalar BF16 (16-bit) floating-point element +/// stored at memory locations starting at location \a __A to a +/// single-precision (32-bit) floating-point, broadcast it to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_bcstnebf16_ps(const void *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VBCSTNEBF162PS instruction. +/// +/// \param __A +/// A pointer to a 16-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns +/// A 128-bit vector of [4 x float]. +/// +/// \code{.operation} +/// b := Convert_BF16_To_FP32(MEM[__A+15:__A]) +/// FOR j := 0 to 3 +/// m := j*32 +/// dst[m+31:m] := b +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_bcstnebf16_ps(const void *__A) { + return (__m128)__builtin_ia32_vbcstnebf162ps128((const __bf16 *)__A); +} + +/// Convert scalar BF16 (16-bit) floating-point element +/// stored at memory locations starting at location \a __A to a +/// single-precision (32-bit) floating-point, broadcast it to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_bcstnebf16_ps(const void *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VBCSTNEBF162PS instruction. +/// +/// \param __A +/// A pointer to a 16-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns +/// A 256-bit vector of [8 x float]. +/// +/// \code{.operation} +/// b := Convert_BF16_To_FP32(MEM[__A+15:__A]) +/// FOR j := 0 to 7 +/// m := j*32 +/// dst[m+31:m] := b +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_bcstnebf16_ps(const void *__A) { + return (__m256)__builtin_ia32_vbcstnebf162ps256((const __bf16 *)__A); +} + +/// Convert scalar half-precision (16-bit) floating-point element +/// stored at memory locations starting at location \a __A to a +/// single-precision (32-bit) floating-point, broadcast it to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_bcstnesh_ps(const void *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VBCSTNESH2PS instruction. +/// +/// \param __A +/// A pointer to a 16-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns +/// A 128-bit vector of [4 x float]. +/// +/// \code{.operation} +/// b := Convert_FP16_To_FP32(MEM[__A+15:__A]) +/// FOR j := 0 to 3 +/// m := j*32 +/// dst[m+31:m] := b +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_bcstnesh_ps(const void *__A) { + return (__m128)__builtin_ia32_vbcstnesh2ps128((const _Float16 *)__A); +} + +/// Convert scalar half-precision (16-bit) floating-point element +/// stored at memory locations starting at location \a __A to a +/// single-precision (32-bit) floating-point, broadcast it to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_bcstnesh_ps(const void *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VBCSTNESH2PS instruction. +/// +/// \param __A +/// A pointer to a 16-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns +/// A 256-bit vector of [8 x float]. +/// +/// \code{.operation} +/// b := Convert_FP16_To_FP32(MEM[__A+15:__A]) +/// FOR j := 0 to 7 +/// m := j*32 +/// dst[m+31:m] := b +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_bcstnesh_ps(const void *__A) { + return (__m256)__builtin_ia32_vbcstnesh2ps256((const _Float16 *)__A); +} + +/// Convert packed BF16 (16-bit) floating-point even-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_cvtneebf16_ps(const __m128bh *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEEBF162PS instruction. +/// +/// \param __A +/// A pointer to a 128-bit memory location containing 8 consecutive +/// BF16 (16-bit) floating-point values. +/// \returns +/// A 128-bit vector of [4 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// k := j*2 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_BF16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtneebf16_ps(const __m128bh *__A) { + return (__m128)__builtin_ia32_vcvtneebf162ps128((const __v8bf *)__A); +} + +/// Convert packed BF16 (16-bit) floating-point even-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_cvtneebf16_ps(const __m256bh *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEEBF162PS instruction. +/// +/// \param __A +/// A pointer to a 256-bit memory location containing 16 consecutive +/// BF16 (16-bit) floating-point values. +/// \returns +/// A 256-bit vector of [8 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// k := j*2 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_BF16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_cvtneebf16_ps(const __m256bh *__A) { + return (__m256)__builtin_ia32_vcvtneebf162ps256((const __v16bf *)__A); +} + +/// Convert packed half-precision (16-bit) floating-point even-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_cvtneeph_ps(const __m128h *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEEPH2PS instruction. +/// +/// \param __A +/// A pointer to a 128-bit memory location containing 8 consecutive +/// half-precision (16-bit) floating-point values. +/// \returns +/// A 128-bit vector of [4 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// k := j*2 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_FP16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtneeph_ps(const __m128h *__A) { + return (__m128)__builtin_ia32_vcvtneeph2ps128((const __v8hf *)__A); +} + +/// Convert packed half-precision (16-bit) floating-point even-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_cvtneeph_ps(const __m256h *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEEPH2PS instruction. +/// +/// \param __A +/// A pointer to a 256-bit memory location containing 16 consecutive +/// half-precision (16-bit) floating-point values. +/// \returns +/// A 256-bit vector of [8 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// k := j*2 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_FP16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_cvtneeph_ps(const __m256h *__A) { + return (__m256)__builtin_ia32_vcvtneeph2ps256((const __v16hf *)__A); +} + +/// Convert packed BF16 (16-bit) floating-point odd-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_cvtneobf16_ps(const __m128bh *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEOBF162PS instruction. +/// +/// \param __A +/// A pointer to a 128-bit memory location containing 8 consecutive +/// BF16 (16-bit) floating-point values. +/// \returns +/// A 128-bit vector of [4 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// k := j*2+1 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_BF16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtneobf16_ps(const __m128bh *__A) { + return (__m128)__builtin_ia32_vcvtneobf162ps128((const __v8bf *)__A); +} + +/// Convert packed BF16 (16-bit) floating-point odd-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_cvtneobf16_ps(const __m256bh *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEOBF162PS instruction. +/// +/// \param __A +/// A pointer to a 256-bit memory location containing 16 consecutive +/// BF16 (16-bit) floating-point values. +/// \returns +/// A 256-bit vector of [8 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// k := j*2+1 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_BF16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_cvtneobf16_ps(const __m256bh *__A) { + return (__m256)__builtin_ia32_vcvtneobf162ps256((const __v16bf *)__A); +} + +/// Convert packed half-precision (16-bit) floating-point odd-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_cvtneoph_ps(const __m128h *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEOPH2PS instruction. +/// +/// \param __A +/// A pointer to a 128-bit memory location containing 8 consecutive +/// half-precision (16-bit) floating-point values. +/// \returns +/// A 128-bit vector of [4 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// k := j*2+1 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_FP16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtneoph_ps(const __m128h *__A) { + return (__m128)__builtin_ia32_vcvtneoph2ps128((const __v8hf *)__A); +} + +/// Convert packed half-precision (16-bit) floating-point odd-indexed elements +/// stored at memory locations starting at location \a __A to packed +/// single-precision (32-bit) floating-point elements, and store the results in +/// \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_cvtneoph_ps(const __m256h *__A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEOPH2PS instruction. +/// +/// \param __A +/// A pointer to a 256-bit memory location containing 16 consecutive +/// half-precision (16-bit) floating-point values. +/// \returns +/// A 256-bit vector of [8 x float]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// k := j*2+1 +/// i := k*16 +/// m := j*32 +/// dst[m+31:m] := Convert_FP16_To_FP32(MEM[__A+i+15:__A+i]) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_cvtneoph_ps(const __m256h *__A) { + return (__m256)__builtin_ia32_vcvtneoph2ps256((const __v16hf *)__A); +} + +/// Convert packed single-precision (32-bit) floating-point elements in \a __A +/// to packed BF16 (16-bit) floating-point elements, and store the results in \a +/// dst. +/// +/// \headerfile +/// +/// \code +/// _mm_cvtneps_avx_pbh(__m128 __A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEPS2BF16 instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float]. +/// \returns +/// A 128-bit vector of [8 x bfloat]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// dst.word[j] := Convert_FP32_To_BF16(__A.fp32[j]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128bh __DEFAULT_FN_ATTRS128 +_mm_cvtneps_avx_pbh(__m128 __A) { + return (__m128bh)__builtin_ia32_vcvtneps2bf16128((__v4sf)__A); +} + +/// Convert packed single-precision (32-bit) floating-point elements in \a __A +/// to packed BF16 (16-bit) floating-point elements, and store the results in \a +/// dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_cvtneps_avx_pbh(__m256 __A); +/// \endcode +/// +/// This intrinsic corresponds to the \c VCVTNEPS2BF16 instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float]. +/// \returns +/// A 128-bit vector of [8 x bfloat]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// dst.word[j] := Convert_FP32_To_BF16(a.fp32[j]) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128bh __DEFAULT_FN_ATTRS256 +_mm256_cvtneps_avx_pbh(__m256 __A) { + return (__m128bh)__builtin_ia32_vcvtneps2bf16256((__v8sf)__A); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif // __AVXNECONVERTINTRIN_H +#endif // __SSE2__ diff --git a/llvm/lib/clang/19/include/avxvnniint16intrin.h b/llvm/lib/clang/19/include/avxvnniint16intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..e4d342a8b45b1de03270691bdd9f9a33a008d903 --- /dev/null +++ b/llvm/lib/clang/19/include/avxvnniint16intrin.h @@ -0,0 +1,473 @@ +/*===----------- avxvnniint16intrin.h - AVXVNNIINT16 intrinsics-------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error \ + "Never use directly; include instead." +#endif // __IMMINTRIN_H + +#ifndef __AVXVNNIINT16INTRIN_H +#define __AVXVNNIINT16INTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint16"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint16"), \ + __min_vector_width__(256))) + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_dpwsud_epi32(__m128i __W, __m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUD instruction. +/// +/// \param __W +/// A 128-bit vector of [4 x int]. +/// \param __A +/// A 128-bit vector of [8 x short]. +/// \param __B +/// A 128-bit vector of [8 x unsigned short]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwsud_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpwsud128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_dpwsud_epi32(__m256i __W, __m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUD instruction. +/// +/// \param __W +/// A 256-bit vector of [8 x int]. +/// \param __A +/// A 256-bit vector of [16 x short]. +/// \param __B +/// A 256-bit vector of [16 x unsigned short]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwsud_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpwsud256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_dpwsuds_epi32(__m128i __W, __m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUDS instruction. +/// +/// \param __W +/// A 128-bit vector of [4 x int]. +/// \param __A +/// A 128-bit vector of [8 x short]. +/// \param __B +/// A 128-bit vector of [8 x unsigned short]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwsuds_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpwsuds128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_dpwsuds_epi32(__m256i __W, __m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUDS instruction. +/// +/// \param __W +/// A 256-bit vector of [8 x int]. +/// \param __A +/// A 256-bit vector of [16 x short]. +/// \param __B +/// A 256-bit vector of [16 x unsigned short]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwsuds_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpwsuds256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_dpbusd_epi32(__m128i __W, __m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWUSD instruction. +/// +/// \param __W +/// A 128-bit vector of [4 x int]. +/// \param __A +/// A 128-bit vector of [8 x unsigned short]. +/// \param __B +/// A 128-bit vector of [8 x short]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwusd_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpwusd128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_dpwusd_epi32(__m256i __W, __m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWUSD instruction. +/// +/// \param __W +/// A 256-bit vector of [8 x int]. +/// \param __A +/// A 256-bit vector of [16 x unsigned short]. +/// \param __B +/// A 256-bit vector of [16 x short]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwusd_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpwusd256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_dpwusds_epi32(__m128i __W, __m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUDS instruction. +/// +/// \param __W +/// A 128-bit vector of [4 x int]. +/// \param __A +/// A 128-bit vector of [8 x unsigned short]. +/// \param __B +/// A 128-bit vector of [8 x short]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwusds_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpwusds128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_dpwsuds_epi32(__m256i __W, __m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUDS instruction. +/// +/// \param __W +/// A 256-bit vector of [8 x int]. +/// \param __A +/// A 256-bit vector of [16 x unsigned short]. +/// \param __B +/// A 256-bit vector of [16 x short]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwusds_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpwusds256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_dpwuud_epi32(__m128i __W, __m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWUUD instruction. +/// +/// \param __W +/// A 128-bit vector of [4 x unsigned int]. +/// \param __A +/// A 128-bit vector of [8 x unsigned short]. +/// \param __B +/// A 128-bit vector of [8 x unsigned short]. +/// \returns +/// A 128-bit vector of [4 x unsigned int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwuud_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpwuud128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_dpwuud_epi32(__m256i __W, __m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWUUD instruction. +/// +/// \param __W +/// A 256-bit vector of [8 x unsigned int]. +/// \param __A +/// A 256-bit vector of [16 x unsigned short]. +/// \param __B +/// A 256-bit vector of [16 x unsigned short]. +/// \returns +/// A 256-bit vector of [8 x unsigned int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwuud_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpwuud256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_dpwsuds_epi32(__m128i __W, __m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUDS instruction. +/// +/// \param __W +/// A 128-bit vector of [4 x unsigned int]. +/// \param __A +/// A 128-bit vector of [8 x unsigned short]. +/// \param __B +/// A 128-bit vector of [8 x unsigned short]. +/// \returns +/// A 128-bit vector of [4 x unsigned int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwuuds_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpwuuds128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with +/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate +/// signed 16-bit results. Sum these 2 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_dpwuuds_epi32(__m256i __W, __m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPWSUDS instruction. +/// +/// \param __W +/// A 256-bit vector of [8 x unsigned int]. +/// \param __A +/// A 256-bit vector of [16 x unsigned short]. +/// \param __B +/// A 256-bit vector of [16 x unsigned short]. +/// \returns +/// A 256-bit vector of [8 x unsigned int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) +/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) +/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwuuds_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpwuuds256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif // __AVXVNNIINT16INTRIN_H diff --git a/llvm/lib/clang/19/include/avxvnniint8intrin.h b/llvm/lib/clang/19/include/avxvnniint8intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..b0b6cb853f713f40d9b126efcc13d60153f83ca7 --- /dev/null +++ b/llvm/lib/clang/19/include/avxvnniint8intrin.h @@ -0,0 +1,471 @@ +/*===-------- avxvnniint8intrin.h - AVXVNNIINT8 intrinsics -----------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error \ + "Never use directly; include instead." +#endif + +#ifndef __AVXVNNIINT8INTRIN_H +#define __AVXVNNIINT8INTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint8"), \ + __min_vector_width__(256))) +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint8"), \ + __min_vector_width__(128))) + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_dpbssd_epi32(__m128i __W, __m128i __A, __m128i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 128-bit vector of [16 x char]. +/// \param __B +/// A 128-bit vector of [16 x char]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) +/// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) +/// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) +/// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbssd_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpbssd128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 256-bit vector of [32 x char]. +/// \param __B +/// A 256-bit vector of [32 x char]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) +/// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) +/// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) +/// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpbssd256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_dpbssds_epi32( __m128i __W, __m128i __A, __m128i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 128-bit vector of [16 x char]. +/// \param __B +/// A 128-bit vector of [16 x char]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) +/// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) +/// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) +/// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbssds_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpbssds128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 256-bit vector of [32 x char]. +/// \param __B +/// A 256-bit vector of [32 x char]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]) +/// tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]) +/// tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]) +/// tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpbssds256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_dpbsud_epi32(__m128i __W, __m128i __A, __m128i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 128-bit vector of [16 x char]. +/// \param __B +/// A 128-bit vector of [16 x unsigned char]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbsud_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpbsud128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 256-bit vector of [32 x char]. +/// \param __B +/// A 256-bit vector of [32 x unsigned char]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpbsud256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_dpbsuds_epi32( __m128i __W, __m128i __A, __m128i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 128-bit vector of [16 x char]. +/// \param __B +/// A 128-bit vector of [16 x unsigned char]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbsuds_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpbsuds128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 256-bit vector of [32 x char]. +/// \param __B +/// A 256-bit vector of [32 x unsigned char]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])) +/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpbsuds256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_dpbuud_epi32(__m128i __W, __m128i __A, __m128i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 128-bit vector of [16 x unsigned char]. +/// \param __B +/// A 128-bit vector of [16 x unsigned char]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) +/// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) +/// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) +/// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbuud_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpbuud128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBSSD instruction. +/// +/// \param __A +/// A 256-bit vector of [32 x unsigned char]. +/// \param __B +/// A 256-bit vector of [32 x unsigned char]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) +/// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) +/// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) +/// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpbuud256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm_dpbuuds_epi32( __m128i __W, __m128i __A, __m128i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBUUDS instruction. +/// +/// \param __A +/// A 128-bit vector of [16 x unsigned char]. +/// \param __B +/// A 128-bit vector of [16 x unsigned char]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) +/// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) +/// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) +/// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbuuds_epi32(__m128i __W, + __m128i __A, + __m128i __B) { + return (__m128i)__builtin_ia32_vpdpbuuds128((__v4si)__W, (__v4si)__A, + (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with +/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate +/// signed 16-bit results. Sum these 4 results with the corresponding +/// 32-bit integer in \a __W with signed saturation, and store the packed +/// 32-bit results in \a dst. +/// +/// \headerfile +/// +/// \code +/// _mm256_dpbuuds_epi32(__m256i __W, __m256i __A, __m256i __B); +/// \endcode +/// +/// This intrinsic corresponds to the \c VPDPBUUDS instruction. +/// +/// \param __A +/// A 256-bit vector of [32 x unsigned char]. +/// \param __B +/// A 256-bit vector of [32 x unsigned char]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]) +/// tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]) +/// tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]) +/// tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]) +/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbuuds_epi32(__m256i __W, __m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vpdpbuuds256((__v8si)__W, (__v8si)__A, + (__v8si)__B); +} +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif // __AVXVNNIINT8INTRIN_H diff --git a/llvm/lib/clang/19/include/avxvnniintrin.h b/llvm/lib/clang/19/include/avxvnniintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..b7de562b57c069ec350eee410b154108d4f0f346 --- /dev/null +++ b/llvm/lib/clang/19/include/avxvnniintrin.h @@ -0,0 +1,225 @@ +/*===--------------- avxvnniintrin.h - VNNI intrinsics --------------------=== + * + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __AVXVNNIINTRIN_H +#define __AVXVNNIINTRIN_H + +/* Below intrinsics defined in avx512vlvnniintrin.h can be used for AVXVNNI */ +/// \fn __m256i _mm256_dpbusd_epi32(__m256i __S, __m256i __A, __m256i __B) +/// \fn __m256i _mm256_dpbusds_epi32(__m256i __S, __m256i __A, __m256i __B) +/// \fn __m256i _mm256_dpwssd_epi32(__m256i __S, __m256i __A, __m256i __B) +/// \fn __m256i _mm256_dpwssds_epi32(__m256i __S, __m256i __A, __m256i __B) +/// \fn __m128i _mm_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B) +/// \fn __m128i _mm_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B) +/// \fn __m128i _mm_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B) +/// \fn __m128i _mm_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B) + +/* Intrinsics with _avx_ prefix are for compatibility with msvc. */ +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("avxvnni"), __min_vector_width__(256))) +#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("avxvnni"), __min_vector_width__(128))) + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a __S, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) +/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v8si)__A, (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a __S using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) +/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v8si)__A, (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S, +/// and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v8si)__A, (__v8si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S +/// using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 7 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// DST[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v8si)__A, (__v8si)__B); +} + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a __S, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) +/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v4si)__A, (__v4si)__B); +} + +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with +/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed +/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in \a __S using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPBUSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) +/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) +/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) +/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) +/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v4si)__A, (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S, +/// and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSD instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v4si)__A, (__v4si)__B); +} + +/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with +/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit +/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S +/// using signed saturation, and store the packed 32-bit results in DST. +/// +/// This intrinsic corresponds to the VPDPWSSDS instructions. +/// +/// \code{.operation} +/// FOR j := 0 to 3 +/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) +/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) +/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2) +/// ENDFOR +/// DST[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 +_mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v4si)__A, (__v4si)__B); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif // __AVXVNNIINTRIN_H diff --git a/llvm/lib/clang/19/include/bmi2intrin.h b/llvm/lib/clang/19/include/bmi2intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f0a3343bef91504f9ae86fefcc89cbd3171fe382 --- /dev/null +++ b/llvm/lib/clang/19/include/bmi2intrin.h @@ -0,0 +1,255 @@ +/*===---- bmi2intrin.h - BMI2 intrinsics -----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __BMI2INTRIN_H +#define __BMI2INTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi2"))) + +/// Copies the unsigned 32-bit integer \a __X and zeroes the upper bits +/// starting at bit number \a __Y. +/// +/// \code{.operation} +/// i := __Y[7:0] +/// result := __X +/// IF i < 32 +/// result[31:i] := 0 +/// FI +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BZHI instruction. +/// +/// \param __X +/// The 32-bit source value to copy. +/// \param __Y +/// The lower 8 bits specify the bit number of the lowest bit to zero. +/// \returns The partially zeroed 32-bit value. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_bzhi_u32(unsigned int __X, unsigned int __Y) +{ + return __builtin_ia32_bzhi_si(__X, __Y); +} + +/// Deposit (scatter) low-order bits from the unsigned 32-bit integer \a __X +/// into the 32-bit result, according to the mask in the unsigned 32-bit +/// integer \a __Y. All other bits of the result are zero. +/// +/// \code{.operation} +/// i := 0 +/// result := 0 +/// FOR m := 0 TO 31 +/// IF __Y[m] == 1 +/// result[m] := __X[i] +/// i := i + 1 +/// ENDIF +/// ENDFOR +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PDEP instruction. +/// +/// \param __X +/// The 32-bit source value to copy. +/// \param __Y +/// The 32-bit mask specifying where to deposit source bits. +/// \returns The 32-bit result. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_pdep_u32(unsigned int __X, unsigned int __Y) +{ + return __builtin_ia32_pdep_si(__X, __Y); +} + +/// Extract (gather) bits from the unsigned 32-bit integer \a __X into the +/// low-order bits of the 32-bit result, according to the mask in the +/// unsigned 32-bit integer \a __Y. All other bits of the result are zero. +/// +/// \code{.operation} +/// i := 0 +/// result := 0 +/// FOR m := 0 TO 31 +/// IF __Y[m] == 1 +/// result[i] := __X[m] +/// i := i + 1 +/// ENDIF +/// ENDFOR +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PEXT instruction. +/// +/// \param __X +/// The 32-bit source value to copy. +/// \param __Y +/// The 32-bit mask specifying which source bits to extract. +/// \returns The 32-bit result. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_pext_u32(unsigned int __X, unsigned int __Y) +{ + return __builtin_ia32_pext_si(__X, __Y); +} + +/// Multiplies the unsigned 32-bit integers \a __X and \a __Y to form a +/// 64-bit product. Stores the upper 32 bits of the product in the +/// memory at \a __P and returns the lower 32 bits. +/// +/// \code{.operation} +/// Store32(__P, (__X * __Y)[63:32]) +/// result := (__X * __Y)[31:0] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c MULX instruction. +/// +/// \param __X +/// An unsigned 32-bit multiplicand. +/// \param __Y +/// An unsigned 32-bit multiplicand. +/// \param __P +/// A pointer to memory for storing the upper half of the product. +/// \returns The lower half of the product. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_mulx_u32(unsigned int __X, unsigned int __Y, unsigned int *__P) +{ + unsigned long long __res = (unsigned long long) __X * __Y; + *__P = (unsigned int)(__res >> 32); + return (unsigned int)__res; +} + +#ifdef __x86_64__ + +/// Copies the unsigned 64-bit integer \a __X and zeroes the upper bits +/// starting at bit number \a __Y. +/// +/// \code{.operation} +/// i := __Y[7:0] +/// result := __X +/// IF i < 64 +/// result[63:i] := 0 +/// FI +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BZHI instruction. +/// +/// \param __X +/// The 64-bit source value to copy. +/// \param __Y +/// The lower 8 bits specify the bit number of the lowest bit to zero. +/// \returns The partially zeroed 64-bit value. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_bzhi_u64(unsigned long long __X, unsigned long long __Y) +{ + return __builtin_ia32_bzhi_di(__X, __Y); +} + +/// Deposit (scatter) low-order bits from the unsigned 64-bit integer \a __X +/// into the 64-bit result, according to the mask in the unsigned 64-bit +/// integer \a __Y. All other bits of the result are zero. +/// +/// \code{.operation} +/// i := 0 +/// result := 0 +/// FOR m := 0 TO 63 +/// IF __Y[m] == 1 +/// result[m] := __X[i] +/// i := i + 1 +/// ENDIF +/// ENDFOR +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PDEP instruction. +/// +/// \param __X +/// The 64-bit source value to copy. +/// \param __Y +/// The 64-bit mask specifying where to deposit source bits. +/// \returns The 64-bit result. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_pdep_u64(unsigned long long __X, unsigned long long __Y) +{ + return __builtin_ia32_pdep_di(__X, __Y); +} + +/// Extract (gather) bits from the unsigned 64-bit integer \a __X into the +/// low-order bits of the 64-bit result, according to the mask in the +/// unsigned 64-bit integer \a __Y. All other bits of the result are zero. +/// +/// \code{.operation} +/// i := 0 +/// result := 0 +/// FOR m := 0 TO 63 +/// IF __Y[m] == 1 +/// result[i] := __X[m] +/// i := i + 1 +/// ENDIF +/// ENDFOR +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PEXT instruction. +/// +/// \param __X +/// The 64-bit source value to copy. +/// \param __Y +/// The 64-bit mask specifying which source bits to extract. +/// \returns The 64-bit result. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_pext_u64(unsigned long long __X, unsigned long long __Y) +{ + return __builtin_ia32_pext_di(__X, __Y); +} + +/// Multiplies the unsigned 64-bit integers \a __X and \a __Y to form a +/// 128-bit product. Stores the upper 64 bits of the product to the +/// memory addressed by \a __P and returns the lower 64 bits. +/// +/// \code{.operation} +/// Store64(__P, (__X * __Y)[127:64]) +/// result := (__X * __Y)[63:0] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c MULX instruction. +/// +/// \param __X +/// An unsigned 64-bit multiplicand. +/// \param __Y +/// An unsigned 64-bit multiplicand. +/// \param __P +/// A pointer to memory for storing the upper half of the product. +/// \returns The lower half of the product. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_mulx_u64 (unsigned long long __X, unsigned long long __Y, + unsigned long long *__P) +{ + unsigned __int128 __res = (unsigned __int128) __X * __Y; + *__P = (unsigned long long) (__res >> 64); + return (unsigned long long) __res; +} + +#endif /* __x86_64__ */ + +#undef __DEFAULT_FN_ATTRS + +#endif /* __BMI2INTRIN_H */ diff --git a/llvm/lib/clang/19/include/bmiintrin.h b/llvm/lib/clang/19/include/bmiintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..78bffe68e221a93efc0d5b4c3704087a0c9f6bc9 --- /dev/null +++ b/llvm/lib/clang/19/include/bmiintrin.h @@ -0,0 +1,614 @@ +/*===---- bmiintrin.h - BMI intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __BMIINTRIN_H +#define __BMIINTRIN_H + +/* Allow using the tzcnt intrinsics even for non-BMI targets. Since the TZCNT + instruction behaves as BSF on non-BMI targets, there is code that expects + to use it as a potentially faster version of BSF. */ +#define __RELAXED_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 16-bit integer whose trailing zeros are to be counted. +/// \returns An unsigned 16-bit integer containing the number of trailing zero +/// bits in the operand. +/// \see _tzcnt_u16 +static __inline__ unsigned short __RELAXED_FN_ATTRS +__tzcnt_u16(unsigned short __X) +{ + return __builtin_ia32_tzcnt_u16(__X); +} + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// \code +/// unsigned short _tzcnt_u16(unsigned short __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 16-bit integer whose trailing zeros are to be counted. +/// \returns An unsigned 16-bit integer containing the number of trailing zero +/// bits in the operand. +/// \see __tzcnt_u16 +#define _tzcnt_u16 __tzcnt_u16 + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 32-bit integer whose trailing zeros are to be counted. +/// \returns An unsigned 32-bit integer containing the number of trailing zero +/// bits in the operand. +/// \see { _mm_tzcnt_32 _tzcnt_u32 } +static __inline__ unsigned int __RELAXED_FN_ATTRS +__tzcnt_u32(unsigned int __X) +{ + return __builtin_ia32_tzcnt_u32(__X); +} + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 32-bit integer whose trailing zeros are to be counted. +/// \returns A 32-bit integer containing the number of trailing zero bits in +/// the operand. +/// \see { __tzcnt_u32 _tzcnt_u32 } +static __inline__ int __RELAXED_FN_ATTRS +_mm_tzcnt_32(unsigned int __X) +{ + return (int)__builtin_ia32_tzcnt_u32(__X); +} + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// \code +/// unsigned int _tzcnt_u32(unsigned int __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 32-bit integer whose trailing zeros are to be counted. +/// \returns An unsigned 32-bit integer containing the number of trailing zero +/// bits in the operand. +/// \see { _mm_tzcnt_32 __tzcnt_u32 } +#define _tzcnt_u32 __tzcnt_u32 + +#ifdef __x86_64__ + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose trailing zeros are to be counted. +/// \returns An unsigned 64-bit integer containing the number of trailing zero +/// bits in the operand. +/// \see { _mm_tzcnt_64 _tzcnt_u64 } +static __inline__ unsigned long long __RELAXED_FN_ATTRS +__tzcnt_u64(unsigned long long __X) +{ + return __builtin_ia32_tzcnt_u64(__X); +} + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose trailing zeros are to be counted. +/// \returns An 64-bit integer containing the number of trailing zero bits in +/// the operand. +/// \see { __tzcnt_u64 _tzcnt_u64 } +static __inline__ long long __RELAXED_FN_ATTRS +_mm_tzcnt_64(unsigned long long __X) +{ + return (long long)__builtin_ia32_tzcnt_u64(__X); +} + +/// Counts the number of trailing zero bits in the operand. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _tzcnt_u64(unsigned long long __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c TZCNT instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose trailing zeros are to be counted. +/// \returns An unsigned 64-bit integer containing the number of trailing zero +/// bits in the operand. +/// \see { _mm_tzcnt_64 __tzcnt_u64 +#define _tzcnt_u64 __tzcnt_u64 + +#endif /* __x86_64__ */ + +#undef __RELAXED_FN_ATTRS + +#if !defined(__SCE__) || __has_feature(modules) || defined(__BMI__) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi"))) + +/// Performs a bitwise AND of the second operand with the one's +/// complement of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ANDN instruction. +/// +/// \param __X +/// An unsigned integer containing one of the operands. +/// \param __Y +/// An unsigned integer containing one of the operands. +/// \returns An unsigned integer containing the bitwise AND of the second +/// operand with the one's complement of the first operand. +/// \see _andn_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__andn_u32(unsigned int __X, unsigned int __Y) +{ + return ~__X & __Y; +} + +/// Performs a bitwise AND of the second operand with the one's +/// complement of the first operand. +/// +/// \headerfile +/// +/// \code +/// unsigned int _andn_u32(unsigned int __X, unsigned int __Y); +/// \endcode +/// +/// This intrinsic corresponds to the \c ANDN instruction. +/// +/// \param __X +/// An unsigned integer containing one of the operands. +/// \param __Y +/// An unsigned integer containing one of the operands. +/// \returns An unsigned integer containing the bitwise AND of the second +/// operand with the one's complement of the first operand. +/// \see __andn_u32 +#define _andn_u32 __andn_u32 + +/* AMD-specified, double-leading-underscore version of BEXTR */ +/// Extracts the specified bits from the first operand and returns them +/// in the least significant bits of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BEXTR instruction. +/// +/// \param __X +/// An unsigned integer whose bits are to be extracted. +/// \param __Y +/// An unsigned integer used to specify which bits are extracted. Bits [7:0] +/// specify the index of the least significant bit. Bits [15:8] specify the +/// number of bits to be extracted. +/// \returns An unsigned integer whose least significant bits contain the +/// extracted bits. +/// \see _bextr_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__bextr_u32(unsigned int __X, unsigned int __Y) +{ + return __builtin_ia32_bextr_u32(__X, __Y); +} + +/* Intel-specified, single-leading-underscore version of BEXTR */ +/// Extracts the specified bits from the first operand and returns them +/// in the least significant bits of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BEXTR instruction. +/// +/// \param __X +/// An unsigned integer whose bits are to be extracted. +/// \param __Y +/// An unsigned integer used to specify the index of the least significant +/// bit for the bits to be extracted. Bits [7:0] specify the index. +/// \param __Z +/// An unsigned integer used to specify the number of bits to be extracted. +/// Bits [7:0] specify the number of bits. +/// \returns An unsigned integer whose least significant bits contain the +/// extracted bits. +/// \see __bextr_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_bextr_u32(unsigned int __X, unsigned int __Y, unsigned int __Z) +{ + return __builtin_ia32_bextr_u32 (__X, ((__Y & 0xff) | ((__Z & 0xff) << 8))); +} + +/* Intel-specified, single-leading-underscore version of BEXTR2 */ +/// Extracts the specified bits from the first operand and returns them +/// in the least significant bits of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BEXTR instruction. +/// +/// \param __X +/// An unsigned integer whose bits are to be extracted. +/// \param __Y +/// An unsigned integer used to specify which bits are extracted. Bits [7:0] +/// specify the index of the least significant bit. Bits [15:8] specify the +/// number of bits to be extracted. +/// \returns An unsigned integer whose least significant bits contain the +/// extracted bits. +/// \see __bextr_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_bextr2_u32(unsigned int __X, unsigned int __Y) { + return __builtin_ia32_bextr_u32(__X, __Y); +} + +/// Clears all bits in the source except for the least significant bit +/// containing a value of 1 and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BLSI instruction. +/// +/// \param __X +/// An unsigned integer whose bits are to be cleared. +/// \returns An unsigned integer containing the result of clearing the bits from +/// the source operand. +/// \see _blsi_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blsi_u32(unsigned int __X) +{ + return __X & -__X; +} + +/// Clears all bits in the source except for the least significant bit +/// containing a value of 1 and returns the result. +/// +/// \headerfile +/// +/// \code +/// unsigned int _blsi_u32(unsigned int __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c BLSI instruction. +/// +/// \param __X +/// An unsigned integer whose bits are to be cleared. +/// \returns An unsigned integer containing the result of clearing the bits from +/// the source operand. +/// \see __blsi_u32 +#define _blsi_u32 __blsi_u32 + +/// Creates a mask whose bits are set to 1, using bit 0 up to and +/// including the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BLSMSK instruction. +/// +/// \param __X +/// An unsigned integer used to create the mask. +/// \returns An unsigned integer containing the newly created mask. +/// \see _blsmsk_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blsmsk_u32(unsigned int __X) +{ + return __X ^ (__X - 1); +} + +/// Creates a mask whose bits are set to 1, using bit 0 up to and +/// including the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// \code +/// unsigned int _blsmsk_u32(unsigned int __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c BLSMSK instruction. +/// +/// \param __X +/// An unsigned integer used to create the mask. +/// \returns An unsigned integer containing the newly created mask. +/// \see __blsmsk_u32 +#define _blsmsk_u32 __blsmsk_u32 + +/// Clears the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BLSR instruction. +/// +/// \param __X +/// An unsigned integer containing the operand to be cleared. +/// \returns An unsigned integer containing the result of clearing the source +/// operand. +/// \see _blsr_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blsr_u32(unsigned int __X) +{ + return __X & (__X - 1); +} + +/// Clears the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// \code +/// unsigned int _bls4_u32(unsigned int __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c BLSR instruction. +/// +/// \param __X +/// An unsigned integer containing the operand to be cleared. +/// \returns An unsigned integer containing the result of clearing the source +/// operand. +/// \see __blsr_u32 +#define _blsr_u32 __blsr_u32 + +#ifdef __x86_64__ + +/// Performs a bitwise AND of the second operand with the one's +/// complement of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ANDN instruction. +/// +/// \param __X +/// An unsigned 64-bit integer containing one of the operands. +/// \param __Y +/// An unsigned 64-bit integer containing one of the operands. +/// \returns An unsigned 64-bit integer containing the bitwise AND of the second +/// operand with the one's complement of the first operand. +/// \see _andn_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__andn_u64 (unsigned long long __X, unsigned long long __Y) +{ + return ~__X & __Y; +} + +/// Performs a bitwise AND of the second operand with the one's +/// complement of the first operand. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _andn_u64(unsigned long long __X, +/// unsigned long long __Y); +/// \endcode +/// +/// This intrinsic corresponds to the \c ANDN instruction. +/// +/// \param __X +/// An unsigned 64-bit integer containing one of the operands. +/// \param __Y +/// An unsigned 64-bit integer containing one of the operands. +/// \returns An unsigned 64-bit integer containing the bitwise AND of the second +/// operand with the one's complement of the first operand. +/// \see __andn_u64 +#define _andn_u64 __andn_u64 + +/* AMD-specified, double-leading-underscore version of BEXTR */ +/// Extracts the specified bits from the first operand and returns them +/// in the least significant bits of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BEXTR instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose bits are to be extracted. +/// \param __Y +/// An unsigned 64-bit integer used to specify which bits are extracted. Bits +/// [7:0] specify the index of the least significant bit. Bits [15:8] specify +/// the number of bits to be extracted. +/// \returns An unsigned 64-bit integer whose least significant bits contain the +/// extracted bits. +/// \see _bextr_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__bextr_u64(unsigned long long __X, unsigned long long __Y) +{ + return __builtin_ia32_bextr_u64(__X, __Y); +} + +/* Intel-specified, single-leading-underscore version of BEXTR */ +/// Extracts the specified bits from the first operand and returns them +/// in the least significant bits of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BEXTR instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose bits are to be extracted. +/// \param __Y +/// An unsigned integer used to specify the index of the least significant +/// bit for the bits to be extracted. Bits [7:0] specify the index. +/// \param __Z +/// An unsigned integer used to specify the number of bits to be extracted. +/// Bits [7:0] specify the number of bits. +/// \returns An unsigned 64-bit integer whose least significant bits contain the +/// extracted bits. +/// \see __bextr_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_bextr_u64(unsigned long long __X, unsigned int __Y, unsigned int __Z) +{ + return __builtin_ia32_bextr_u64 (__X, ((__Y & 0xff) | ((__Z & 0xff) << 8))); +} + +/* Intel-specified, single-leading-underscore version of BEXTR2 */ +/// Extracts the specified bits from the first operand and returns them +/// in the least significant bits of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BEXTR instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose bits are to be extracted. +/// \param __Y +/// An unsigned 64-bit integer used to specify which bits are extracted. Bits +/// [7:0] specify the index of the least significant bit. Bits [15:8] specify +/// the number of bits to be extracted. +/// \returns An unsigned 64-bit integer whose least significant bits contain the +/// extracted bits. +/// \see __bextr_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_bextr2_u64(unsigned long long __X, unsigned long long __Y) { + return __builtin_ia32_bextr_u64(__X, __Y); +} + +/// Clears all bits in the source except for the least significant bit +/// containing a value of 1 and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BLSI instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose bits are to be cleared. +/// \returns An unsigned 64-bit integer containing the result of clearing the +/// bits from the source operand. +/// \see _blsi_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blsi_u64(unsigned long long __X) +{ + return __X & -__X; +} + +/// Clears all bits in the source except for the least significant bit +/// containing a value of 1 and returns the result. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _blsi_u64(unsigned long long __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c BLSI instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose bits are to be cleared. +/// \returns An unsigned 64-bit integer containing the result of clearing the +/// bits from the source operand. +/// \see __blsi_u64 +#define _blsi_u64 __blsi_u64 + +/// Creates a mask whose bits are set to 1, using bit 0 up to and +/// including the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BLSMSK instruction. +/// +/// \param __X +/// An unsigned 64-bit integer used to create the mask. +/// \returns An unsigned 64-bit integer containing the newly created mask. +/// \see _blsmsk_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blsmsk_u64(unsigned long long __X) +{ + return __X ^ (__X - 1); +} + +/// Creates a mask whose bits are set to 1, using bit 0 up to and +/// including the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _blsmsk_u64(unsigned long long __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c BLSMSK instruction. +/// +/// \param __X +/// An unsigned 64-bit integer used to create the mask. +/// \returns An unsigned 64-bit integer containing the newly created mask. +/// \see __blsmsk_u64 +#define _blsmsk_u64 __blsmsk_u64 + +/// Clears the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BLSR instruction. +/// +/// \param __X +/// An unsigned 64-bit integer containing the operand to be cleared. +/// \returns An unsigned 64-bit integer containing the result of clearing the +/// source operand. +/// \see _blsr_u64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blsr_u64(unsigned long long __X) +{ + return __X & (__X - 1); +} + +/// Clears the least significant bit that is set to 1 in the source +/// operand and returns the result. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _blsr_u64(unsigned long long __X); +/// \endcode +/// +/// This intrinsic corresponds to the \c BLSR instruction. +/// +/// \param __X +/// An unsigned 64-bit integer containing the operand to be cleared. +/// \returns An unsigned 64-bit integer containing the result of clearing the +/// source operand. +/// \see __blsr_u64 +#define _blsr_u64 __blsr_u64 + +#endif /* __x86_64__ */ + +#undef __DEFAULT_FN_ATTRS + +#endif /* !defined(__SCE__) || __has_feature(modules) || defined(__BMI__) */ + +#endif /* __BMIINTRIN_H */ diff --git a/llvm/lib/clang/19/include/builtins.h b/llvm/lib/clang/19/include/builtins.h new file mode 100644 index 0000000000000000000000000000000000000000..1e534e632c8ead3ca6f515ba4d44ff858833efc0 --- /dev/null +++ b/llvm/lib/clang/19/include/builtins.h @@ -0,0 +1,19 @@ +/*===---- builtins.h - Standard header for extra builtins -----------------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +/// Some legacy compilers have builtin definitions in a file named builtins.h. +/// This header file has been added to allow compatibility with code that was +/// written for those compilers. Code may have an include line for this file +/// and to avoid an error an empty file with this name is provided. +#ifndef __BUILTINS_H +#define __BUILTINS_H + +#if defined(__MVS__) && __has_include_next() +#include_next +#endif /* __MVS__ */ +#endif /* __BUILTINS_H */ diff --git a/llvm/lib/clang/19/include/cet.h b/llvm/lib/clang/19/include/cet.h new file mode 100644 index 0000000000000000000000000000000000000000..ffb19dec8f2b559a8ff167668676776ccdad46fb --- /dev/null +++ b/llvm/lib/clang/19/include/cet.h @@ -0,0 +1,66 @@ +/*===------ cet.h -Control-flow Enforcement Technology feature ------------=== + * Add x86 feature with IBT and/or SHSTK bits to ELF program property if they + * are enabled. Otherwise, contents in this header file are unused. This file + * is mainly design for assembly source code which want to enable CET. + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __CET_H +#define __CET_H + +#ifdef __ASSEMBLER__ + +#ifndef __CET__ +# define _CET_ENDBR +#endif + +#ifdef __CET__ + +# ifdef __LP64__ +# if __CET__ & 0x1 +# define _CET_ENDBR endbr64 +# else +# define _CET_ENDBR +# endif +# else +# if __CET__ & 0x1 +# define _CET_ENDBR endbr32 +# else +# define _CET_ENDBR +# endif +# endif + + +# ifdef __LP64__ +# define __PROPERTY_ALIGN 3 +# else +# define __PROPERTY_ALIGN 2 +# endif + + .pushsection ".note.gnu.property", "a" + .p2align __PROPERTY_ALIGN + .long 1f - 0f /* name length. */ + .long 4f - 1f /* data length. */ + /* NT_GNU_PROPERTY_TYPE_0. */ + .long 5 /* note type. */ +0: + .asciz "GNU" /* vendor name. */ +1: + .p2align __PROPERTY_ALIGN + /* GNU_PROPERTY_X86_FEATURE_1_AND. */ + .long 0xc0000002 /* pr_type. */ + .long 3f - 2f /* pr_datasz. */ +2: + /* GNU_PROPERTY_X86_FEATURE_1_XXX. */ + .long __CET__ +3: + .p2align __PROPERTY_ALIGN +4: + .popsection +#endif +#endif +#endif diff --git a/llvm/lib/clang/19/include/cetintrin.h b/llvm/lib/clang/19/include/cetintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..a68df5b1d2e7a13b61cda67ae34f521d08245408 --- /dev/null +++ b/llvm/lib/clang/19/include/cetintrin.h @@ -0,0 +1,115 @@ +/*===---- cetintrin.h - CET intrinsic --------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __CETINTRIN_H +#define __CETINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("shstk"))) + +static __inline__ void __DEFAULT_FN_ATTRS _incsspd(int __a) { + __builtin_ia32_incsspd((unsigned int)__a); +} + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS _incsspq(unsigned long long __a) { + __builtin_ia32_incsspq(__a); +} +#endif /* __x86_64__ */ + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS _inc_ssp(unsigned int __a) { + __builtin_ia32_incsspq(__a); +} +#else /* __x86_64__ */ +static __inline__ void __DEFAULT_FN_ATTRS _inc_ssp(unsigned int __a) { + __builtin_ia32_incsspd(__a); +} +#endif /* __x86_64__ */ + +static __inline__ unsigned int __DEFAULT_FN_ATTRS _rdsspd(unsigned int __a) { + return __builtin_ia32_rdsspd(__a); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS _rdsspd_i32(void) { +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wuninitialized" + unsigned int t; + return __builtin_ia32_rdsspd(t); +#pragma clang diagnostic pop +} + +#ifdef __x86_64__ +static __inline__ unsigned long long __DEFAULT_FN_ATTRS _rdsspq(unsigned long long __a) { + return __builtin_ia32_rdsspq(__a); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS _rdsspq_i64(void) { +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wuninitialized" + unsigned long long t; + return __builtin_ia32_rdsspq(t); +#pragma clang diagnostic pop +} +#endif /* __x86_64__ */ + +#ifdef __x86_64__ +static __inline__ unsigned long long __DEFAULT_FN_ATTRS _get_ssp(void) { + return __builtin_ia32_rdsspq(0); +} +#else /* __x86_64__ */ +static __inline__ unsigned int __DEFAULT_FN_ATTRS _get_ssp(void) { + return __builtin_ia32_rdsspd(0); +} +#endif /* __x86_64__ */ + +static __inline__ void __DEFAULT_FN_ATTRS _saveprevssp(void) { + __builtin_ia32_saveprevssp(); +} + +static __inline__ void __DEFAULT_FN_ATTRS _rstorssp(void * __p) { + __builtin_ia32_rstorssp(__p); +} + +static __inline__ void __DEFAULT_FN_ATTRS _wrssd(unsigned int __a, void * __p) { + __builtin_ia32_wrssd(__a, __p); +} + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS _wrssq(unsigned long long __a, void * __p) { + __builtin_ia32_wrssq(__a, __p); +} +#endif /* __x86_64__ */ + +static __inline__ void __DEFAULT_FN_ATTRS _wrussd(unsigned int __a, void * __p) { + __builtin_ia32_wrussd(__a, __p); +} + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS _wrussq(unsigned long long __a, void * __p) { + __builtin_ia32_wrussq(__a, __p); +} +#endif /* __x86_64__ */ + +static __inline__ void __DEFAULT_FN_ATTRS _setssbsy(void) { + __builtin_ia32_setssbsy(); +} + +static __inline__ void __DEFAULT_FN_ATTRS _clrssbsy(void * __p) { + __builtin_ia32_clrssbsy(__p); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __CETINTRIN_H */ diff --git a/llvm/lib/clang/19/include/cldemoteintrin.h b/llvm/lib/clang/19/include/cldemoteintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..cfb951c1b4a9fb9ffa6eb54e776923151761213c --- /dev/null +++ b/llvm/lib/clang/19/include/cldemoteintrin.h @@ -0,0 +1,36 @@ +/*===---- cldemoteintrin.h - CLDEMOTE intrinsic ----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __CLDEMOTEINTRIN_H +#define __CLDEMOTEINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("cldemote"))) + +/// Hint to hardware that the cache line that contains \p __P should be demoted +/// from the cache closest to the processor core to a level more distant from +/// the processor core. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CLDEMOTE instruction. +static __inline__ void __DEFAULT_FN_ATTRS +_cldemote(const void * __P) { + __builtin_ia32_cldemote(__P); +} + +#define _mm_cldemote(p) _cldemote(p) +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/clflushoptintrin.h b/llvm/lib/clang/19/include/clflushoptintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..ae0a0244c49760676e0912138e6b9ff868997176 --- /dev/null +++ b/llvm/lib/clang/19/include/clflushoptintrin.h @@ -0,0 +1,36 @@ +/*===---- clflushoptintrin.h - CLFLUSHOPT intrinsic ------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __CLFLUSHOPTINTRIN_H +#define __CLFLUSHOPTINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("clflushopt"))) + +/// Invalidates all levels of the cache hierarchy and flushes modified data to +/// memory for the cache line specified by the address \a __m. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CLFLUSHOPT instruction. +/// +/// \param __m +/// An address within the cache line to flush and invalidate. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_clflushopt(void const * __m) { + __builtin_ia32_clflushopt(__m); +} + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/clwbintrin.h b/llvm/lib/clang/19/include/clwbintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..3360d203f7d7d651807abed5a992781628e09fc8 --- /dev/null +++ b/llvm/lib/clang/19/include/clwbintrin.h @@ -0,0 +1,38 @@ +/*===---- clwbintrin.h - CLWB intrinsic ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __CLWBINTRIN_H +#define __CLWBINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("clwb"))) + +/// Writes back to memory the cache line (if modified) that contains the +/// linear address specified in \a __p from any level of the cache hierarchy in +/// the cache coherence domain +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CLWB instruction. +/// +/// \param __p +/// A pointer to the memory location used to identify the cache line to be +/// written back. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_clwb(void const *__p) { + __builtin_ia32_clwb(__p); +} + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/clzerointrin.h b/llvm/lib/clang/19/include/clzerointrin.h new file mode 100644 index 0000000000000000000000000000000000000000..acccfe94ff31a574bfda0dcbe8952ca447e429ee --- /dev/null +++ b/llvm/lib/clang/19/include/clzerointrin.h @@ -0,0 +1,38 @@ +/*===----------------------- clzerointrin.h - CLZERO ----------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __CLZEROINTRIN_H +#define __CLZEROINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("clzero"))) + +/// Zeroes out the cache line for the address \a __line. This uses a +/// non-temporal store. Calling \c _mm_sfence() afterward might be needed +/// to enforce ordering. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CLZERO instruction. +/// +/// \param __line +/// An address within the cache line to zero out. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_clzero (void * __line) +{ + __builtin_ia32_clzero ((void *)__line); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __CLZEROINTRIN_H */ diff --git a/llvm/lib/clang/19/include/cmpccxaddintrin.h b/llvm/lib/clang/19/include/cmpccxaddintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..6957498996c89bf5006fa33944de7dd8710e6711 --- /dev/null +++ b/llvm/lib/clang/19/include/cmpccxaddintrin.h @@ -0,0 +1,70 @@ +/*===--------------- cmpccxaddintrin.h - CMPCCXADD intrinsics--------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __X86GPRINTRIN_H +#error \ + "Never use directly; include instead." +#endif // __X86GPRINTRIN_H + +#ifndef __CMPCCXADDINTRIN_H +#define __CMPCCXADDINTRIN_H +#ifdef __x86_64__ + +typedef enum { + _CMPCCX_O, /* Overflow. */ + _CMPCCX_NO, /* No overflow. */ + _CMPCCX_B, /* Below. */ + _CMPCCX_NB, /* Not below. */ + _CMPCCX_Z, /* Zero. */ + _CMPCCX_NZ, /* Not zero. */ + _CMPCCX_BE, /* Below or equal. */ + _CMPCCX_NBE, /* Neither below nor equal. */ + _CMPCCX_S, /* Sign. */ + _CMPCCX_NS, /* No sign. */ + _CMPCCX_P, /* Parity. */ + _CMPCCX_NP, /* No parity. */ + _CMPCCX_L, /* Less. */ + _CMPCCX_NL, /* Not less. */ + _CMPCCX_LE, /* Less or equal. */ + _CMPCCX_NLE, /* Neither less nor equal. */ +} _CMPCCX_ENUM; + +/// Compares the value from the memory __A with the value of __B. If the +/// specified condition __D is met, then add the third operand __C to the +/// __A and write it into __A, else the value of __A is unchanged. The return +/// value is the original value of __A. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CMPCCXADD instructions. +/// +/// \param __A +/// __A pointer specifying the memory address. +/// +/// \param __B +/// A integer operand. +/// +/// \param __C +/// A integer operand. +/// +/// \param __D +/// The specified condition. +/// +/// \returns a integer which is the original value of first operand. + +#define _cmpccxadd_epi32(__A, __B, __C, __D) \ + ((int)(__builtin_ia32_cmpccxadd32((void *)(__A), (int)(__B), (int)(__C), \ + (int)(__D)))) + +#define _cmpccxadd_epi64(__A, __B, __C, __D) \ + ((long long)(__builtin_ia32_cmpccxadd64((void *)(__A), (long long)(__B), \ + (long long)(__C), (int)(__D)))) + +#endif // __x86_64__ +#endif // __CMPCCXADDINTRIN_H diff --git a/llvm/lib/clang/19/include/cpuid.h b/llvm/lib/clang/19/include/cpuid.h new file mode 100644 index 0000000000000000000000000000000000000000..82d995f1b966a3c76d3f74089e3f15f2ae90cea8 --- /dev/null +++ b/llvm/lib/clang/19/include/cpuid.h @@ -0,0 +1,351 @@ +/*===---- cpuid.h - X86 cpu model detection --------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CPUID_H +#define __CPUID_H + +#if !defined(__x86_64__) && !defined(__i386__) +#error this header is for x86 only +#endif + +/* Responses identification request with %eax 0 */ +/* AMD: "AuthenticAMD" */ +#define signature_AMD_ebx 0x68747541 +#define signature_AMD_edx 0x69746e65 +#define signature_AMD_ecx 0x444d4163 +/* CENTAUR: "CentaurHauls" */ +#define signature_CENTAUR_ebx 0x746e6543 +#define signature_CENTAUR_edx 0x48727561 +#define signature_CENTAUR_ecx 0x736c7561 +/* CYRIX: "CyrixInstead" */ +#define signature_CYRIX_ebx 0x69727943 +#define signature_CYRIX_edx 0x736e4978 +#define signature_CYRIX_ecx 0x64616574 +/* HYGON: "HygonGenuine" */ +#define signature_HYGON_ebx 0x6f677948 +#define signature_HYGON_edx 0x6e65476e +#define signature_HYGON_ecx 0x656e6975 +/* INTEL: "GenuineIntel" */ +#define signature_INTEL_ebx 0x756e6547 +#define signature_INTEL_edx 0x49656e69 +#define signature_INTEL_ecx 0x6c65746e +/* TM1: "TransmetaCPU" */ +#define signature_TM1_ebx 0x6e617254 +#define signature_TM1_edx 0x74656d73 +#define signature_TM1_ecx 0x55504361 +/* TM2: "GenuineTMx86" */ +#define signature_TM2_ebx 0x756e6547 +#define signature_TM2_edx 0x54656e69 +#define signature_TM2_ecx 0x3638784d +/* NSC: "Geode by NSC" */ +#define signature_NSC_ebx 0x646f6547 +#define signature_NSC_edx 0x79622065 +#define signature_NSC_ecx 0x43534e20 +/* NEXGEN: "NexGenDriven" */ +#define signature_NEXGEN_ebx 0x4778654e +#define signature_NEXGEN_edx 0x72446e65 +#define signature_NEXGEN_ecx 0x6e657669 +/* RISE: "RiseRiseRise" */ +#define signature_RISE_ebx 0x65736952 +#define signature_RISE_edx 0x65736952 +#define signature_RISE_ecx 0x65736952 +/* SIS: "SiS SiS SiS " */ +#define signature_SIS_ebx 0x20536953 +#define signature_SIS_edx 0x20536953 +#define signature_SIS_ecx 0x20536953 +/* UMC: "UMC UMC UMC " */ +#define signature_UMC_ebx 0x20434d55 +#define signature_UMC_edx 0x20434d55 +#define signature_UMC_ecx 0x20434d55 +/* VIA: "VIA VIA VIA " */ +#define signature_VIA_ebx 0x20414956 +#define signature_VIA_edx 0x20414956 +#define signature_VIA_ecx 0x20414956 +/* VORTEX: "Vortex86 SoC" */ +#define signature_VORTEX_ebx 0x74726f56 +#define signature_VORTEX_edx 0x36387865 +#define signature_VORTEX_ecx 0x436f5320 + +/* Features in %ecx for leaf 1 */ +#define bit_SSE3 0x00000001 +#define bit_PCLMULQDQ 0x00000002 +#define bit_PCLMUL bit_PCLMULQDQ /* for gcc compat */ +#define bit_DTES64 0x00000004 +#define bit_MONITOR 0x00000008 +#define bit_DSCPL 0x00000010 +#define bit_VMX 0x00000020 +#define bit_SMX 0x00000040 +#define bit_EIST 0x00000080 +#define bit_TM2 0x00000100 +#define bit_SSSE3 0x00000200 +#define bit_CNXTID 0x00000400 +#define bit_FMA 0x00001000 +#define bit_CMPXCHG16B 0x00002000 +#define bit_xTPR 0x00004000 +#define bit_PDCM 0x00008000 +#define bit_PCID 0x00020000 +#define bit_DCA 0x00040000 +#define bit_SSE41 0x00080000 +#define bit_SSE4_1 bit_SSE41 /* for gcc compat */ +#define bit_SSE42 0x00100000 +#define bit_SSE4_2 bit_SSE42 /* for gcc compat */ +#define bit_x2APIC 0x00200000 +#define bit_MOVBE 0x00400000 +#define bit_POPCNT 0x00800000 +#define bit_TSCDeadline 0x01000000 +#define bit_AESNI 0x02000000 +#define bit_AES bit_AESNI /* for gcc compat */ +#define bit_XSAVE 0x04000000 +#define bit_OSXSAVE 0x08000000 +#define bit_AVX 0x10000000 +#define bit_F16C 0x20000000 +#define bit_RDRND 0x40000000 + +/* Features in %edx for leaf 1 */ +#define bit_FPU 0x00000001 +#define bit_VME 0x00000002 +#define bit_DE 0x00000004 +#define bit_PSE 0x00000008 +#define bit_TSC 0x00000010 +#define bit_MSR 0x00000020 +#define bit_PAE 0x00000040 +#define bit_MCE 0x00000080 +#define bit_CX8 0x00000100 +#define bit_CMPXCHG8B bit_CX8 /* for gcc compat */ +#define bit_APIC 0x00000200 +#define bit_SEP 0x00000800 +#define bit_MTRR 0x00001000 +#define bit_PGE 0x00002000 +#define bit_MCA 0x00004000 +#define bit_CMOV 0x00008000 +#define bit_PAT 0x00010000 +#define bit_PSE36 0x00020000 +#define bit_PSN 0x00040000 +#define bit_CLFSH 0x00080000 +#define bit_DS 0x00200000 +#define bit_ACPI 0x00400000 +#define bit_MMX 0x00800000 +#define bit_FXSR 0x01000000 +#define bit_FXSAVE bit_FXSR /* for gcc compat */ +#define bit_SSE 0x02000000 +#define bit_SSE2 0x04000000 +#define bit_SS 0x08000000 +#define bit_HTT 0x10000000 +#define bit_TM 0x20000000 +#define bit_PBE 0x80000000 + +/* Features in %ebx for leaf 7 sub-leaf 0 */ +#define bit_FSGSBASE 0x00000001 +#define bit_SGX 0x00000004 +#define bit_BMI 0x00000008 +#define bit_HLE 0x00000010 +#define bit_AVX2 0x00000020 +#define bit_SMEP 0x00000080 +#define bit_BMI2 0x00000100 +#define bit_ENH_MOVSB 0x00000200 +#define bit_INVPCID 0x00000400 +#define bit_RTM 0x00000800 +#define bit_MPX 0x00004000 +#define bit_AVX512F 0x00010000 +#define bit_AVX512DQ 0x00020000 +#define bit_RDSEED 0x00040000 +#define bit_ADX 0x00080000 +#define bit_AVX512IFMA 0x00200000 +#define bit_CLFLUSHOPT 0x00800000 +#define bit_CLWB 0x01000000 +#define bit_AVX512PF 0x04000000 +#define bit_AVX512ER 0x08000000 +#define bit_AVX512CD 0x10000000 +#define bit_SHA 0x20000000 +#define bit_AVX512BW 0x40000000 +#define bit_AVX512VL 0x80000000 + +/* Features in %ecx for leaf 7 sub-leaf 0 */ +#define bit_PREFTCHWT1 0x00000001 +#define bit_AVX512VBMI 0x00000002 +#define bit_PKU 0x00000004 +#define bit_OSPKE 0x00000010 +#define bit_WAITPKG 0x00000020 +#define bit_AVX512VBMI2 0x00000040 +#define bit_SHSTK 0x00000080 +#define bit_GFNI 0x00000100 +#define bit_VAES 0x00000200 +#define bit_VPCLMULQDQ 0x00000400 +#define bit_AVX512VNNI 0x00000800 +#define bit_AVX512BITALG 0x00001000 +#define bit_AVX512VPOPCNTDQ 0x00004000 +#define bit_RDPID 0x00400000 +#define bit_CLDEMOTE 0x02000000 +#define bit_MOVDIRI 0x08000000 +#define bit_MOVDIR64B 0x10000000 +#define bit_ENQCMD 0x20000000 + +/* Features in %edx for leaf 7 sub-leaf 0 */ +#define bit_AVX5124VNNIW 0x00000004 +#define bit_AVX5124FMAPS 0x00000008 +#define bit_UINTR 0x00000020 +#define bit_SERIALIZE 0x00004000 +#define bit_TSXLDTRK 0x00010000 +#define bit_PCONFIG 0x00040000 +#define bit_IBT 0x00100000 +#define bit_AMXBF16 0x00400000 +#define bit_AVX512FP16 0x00800000 +#define bit_AMXTILE 0x01000000 +#define bit_AMXINT8 0x02000000 + +/* Features in %eax for leaf 7 sub-leaf 1 */ +#define bit_SHA512 0x00000001 +#define bit_SM3 0x00000002 +#define bit_SM4 0x00000004 +#define bit_RAOINT 0x00000008 +#define bit_AVXVNNI 0x00000010 +#define bit_AVX512BF16 0x00000020 +#define bit_CMPCCXADD 0x00000080 +#define bit_AMXFP16 0x00200000 +#define bit_HRESET 0x00400000 +#define bit_AVXIFMA 0x00800000 + +/* Features in %edx for leaf 7 sub-leaf 1 */ +#define bit_AVXVNNIINT8 0x00000010 +#define bit_AVXNECONVERT 0x00000020 +#define bit_AMXCOMPLEX 0x00000100 +#define bit_AVXVNNIINT16 0x00000400 +#define bit_PREFETCHI 0x00004000 +#define bit_USERMSR 0x00008000 +#define bit_AVX10 0x00080000 +#define bit_APXF 0x00200000 + +/* Features in %eax for leaf 13 sub-leaf 1 */ +#define bit_XSAVEOPT 0x00000001 +#define bit_XSAVEC 0x00000002 +#define bit_XSAVES 0x00000008 + +/* Features in %eax for leaf 0x14 sub-leaf 0 */ +#define bit_PTWRITE 0x00000010 + +/* Features in %ecx for leaf 0x80000001 */ +#define bit_LAHF_LM 0x00000001 +#define bit_ABM 0x00000020 +#define bit_LZCNT bit_ABM /* for gcc compat */ +#define bit_SSE4a 0x00000040 +#define bit_PRFCHW 0x00000100 +#define bit_XOP 0x00000800 +#define bit_LWP 0x00008000 +#define bit_FMA4 0x00010000 +#define bit_TBM 0x00200000 +#define bit_MWAITX 0x20000000 + +/* Features in %edx for leaf 0x80000001 */ +#define bit_MMXEXT 0x00400000 +#define bit_LM 0x20000000 +#define bit_3DNOWP 0x40000000 +#define bit_3DNOW 0x80000000 + +/* Features in %ebx for leaf 0x80000008 */ +#define bit_CLZERO 0x00000001 +#define bit_RDPRU 0x00000010 +#define bit_WBNOINVD 0x00000200 + +/* Features in %ebx for leaf 0x24 */ +#define bit_AVX10_256 0x00020000 +#define bit_AVX10_512 0x00040000 + +#ifdef __i386__ +#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \ + __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \ + : "0"(__leaf)) + +#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \ + __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \ + : "0"(__leaf), "2"(__count)) +#else +/* x86-64 uses %rbx as the base register, so preserve it. */ +#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \ + __asm(" xchgq %%rbx,%q1\n" \ + " cpuid\n" \ + " xchgq %%rbx,%q1" \ + : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \ + : "0"(__leaf)) + +#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \ + __asm(" xchgq %%rbx,%q1\n" \ + " cpuid\n" \ + " xchgq %%rbx,%q1" \ + : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \ + : "0"(__leaf), "2"(__count)) +#endif + +static __inline unsigned int __get_cpuid_max (unsigned int __leaf, + unsigned int *__sig) +{ + unsigned int __eax, __ebx, __ecx, __edx; +#ifdef __i386__ + int __cpuid_supported; + + __asm(" pushfl\n" + " popl %%eax\n" + " movl %%eax,%%ecx\n" + " xorl $0x00200000,%%eax\n" + " pushl %%eax\n" + " popfl\n" + " pushfl\n" + " popl %%eax\n" + " movl $0,%0\n" + " cmpl %%eax,%%ecx\n" + " je 1f\n" + " movl $1,%0\n" + "1:" + : "=r" (__cpuid_supported) : : "eax", "ecx"); + if (!__cpuid_supported) + return 0; +#endif + + __cpuid(__leaf, __eax, __ebx, __ecx, __edx); + if (__sig) + *__sig = __ebx; + return __eax; +} + +static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax, + unsigned int *__ebx, unsigned int *__ecx, + unsigned int *__edx) +{ + unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0); + + if (__max_leaf == 0 || __max_leaf < __leaf) + return 0; + + __cpuid(__leaf, *__eax, *__ebx, *__ecx, *__edx); + return 1; +} + +static __inline int __get_cpuid_count (unsigned int __leaf, + unsigned int __subleaf, + unsigned int *__eax, unsigned int *__ebx, + unsigned int *__ecx, unsigned int *__edx) +{ + unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0); + + if (__max_leaf == 0 || __max_leaf < __leaf) + return 0; + + __cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx); + return 1; +} + +// In some configurations, __cpuidex is defined as a builtin (primarily +// -fms-extensions) which will conflict with the __cpuidex definition below. +#if !(__has_builtin(__cpuidex)) +static __inline void __cpuidex(int __cpu_info[4], int __leaf, int __subleaf) { + __cpuid_count(__leaf, __subleaf, __cpu_info[0], __cpu_info[1], __cpu_info[2], + __cpu_info[3]); +} +#endif + +#endif /* __CPUID_H */ diff --git a/llvm/lib/clang/19/include/crc32intrin.h b/llvm/lib/clang/19/include/crc32intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..a0bd99d1b57254c13cba60fb8c16a0dd8ecc76ba --- /dev/null +++ b/llvm/lib/clang/19/include/crc32intrin.h @@ -0,0 +1,100 @@ +/*===---- crc32intrin.h - SSE4.2 Accumulate CRC32 intrinsics ---------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CRC32INTRIN_H +#define __CRC32INTRIN_H + +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("crc32"))) + +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// unsigned char operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CRC32B instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 8-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_mm_crc32_u8(unsigned int __C, unsigned char __D) +{ + return __builtin_ia32_crc32qi(__C, __D); +} + +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// unsigned short operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CRC32W instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 16-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_mm_crc32_u16(unsigned int __C, unsigned short __D) +{ + return __builtin_ia32_crc32hi(__C, __D); +} + +/// Adds the first unsigned integer operand to the CRC-32C checksum of +/// the second unsigned integer operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CRC32L instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 32-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_mm_crc32_u32(unsigned int __C, unsigned int __D) +{ + return __builtin_ia32_crc32si(__C, __D); +} + +#ifdef __x86_64__ +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// unsigned 64-bit integer operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CRC32Q instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 64-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_mm_crc32_u64(unsigned long long __C, unsigned long long __D) +{ + return __builtin_ia32_crc32di(__C, __D); +} +#endif /* __x86_64__ */ + +#undef __DEFAULT_FN_ATTRS + +#endif /* __CRC32INTRIN_H */ diff --git a/llvm/lib/clang/19/include/cuda_wrappers/algorithm b/llvm/lib/clang/19/include/cuda_wrappers/algorithm new file mode 100644 index 0000000000000000000000000000000000000000..3f59f28ae35b35bf48d51a4a65c29876447d7ba4 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/algorithm @@ -0,0 +1,116 @@ +/*===---- algorithm - CUDA wrapper for -------------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_WRAPPERS_ALGORITHM +#define __CLANG_CUDA_WRAPPERS_ALGORITHM + +// This header defines __device__ overloads of std::min/max. +// +// Ideally we'd declare these functions only if we're <= C++11. In C++14, +// these functions are constexpr, and so are implicitly __host__ __device__. +// +// However, the compiler being in C++14 mode does not imply that the standard +// library supports C++14. There is no macro we can test to check that the +// stdlib has constexpr std::min/max. Thus we have to unconditionally define +// our device overloads. +// +// A host+device function cannot be overloaded, and a constexpr function +// implicitly become host device if there's no explicitly host or device +// overload preceding it. So the simple thing to do would be to declare our +// device min/max overloads, and then #include_next . This way our +// device overloads would come first, and so if we have a C++14 stdlib, its +// min/max won't become host+device and conflict with our device overloads. +// +// But that also doesn't work. libstdc++ is evil and declares std::min/max in +// an internal header that is included *before* . Thus by the time +// we're inside of this file, std::min/max may already have been declared, and +// thus we can't prevent them from becoming host+device if they're constexpr. +// +// Therefore we perpetrate the following hack: We mark our __device__ overloads +// with __attribute__((enable_if(true, ""))). This causes the signature of the +// function to change without changing anything else about it. (Except that +// overload resolution will prefer it over the __host__ __device__ version +// rather than considering them equally good). + +#include_next + +// We need to define these overloads in exactly the namespace our standard +// library uses (including the right inline namespace), otherwise they won't be +// picked up by other functions in the standard library (e.g. functions in +// ). Thus the ugliness below. +#ifdef _LIBCPP_BEGIN_NAMESPACE_STD +_LIBCPP_BEGIN_NAMESPACE_STD +#else +namespace std { +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_BEGIN_NAMESPACE_VERSION +#endif +#endif + +#pragma push_macro("_CPP14_CONSTEXPR") +#if __cplusplus >= 201402L +#define _CPP14_CONSTEXPR constexpr +#else +#define _CPP14_CONSTEXPR +#endif + +template +__attribute__((enable_if(true, ""))) +inline _CPP14_CONSTEXPR __host__ __device__ const __T & +max(const __T &__a, const __T &__b, __Cmp __cmp) { + return __cmp(__a, __b) ? __b : __a; +} + +template +__attribute__((enable_if(true, ""))) +inline _CPP14_CONSTEXPR __host__ __device__ const __T & +max(const __T &__a, const __T &__b) { + return __a < __b ? __b : __a; +} + +template +__attribute__((enable_if(true, ""))) +inline _CPP14_CONSTEXPR __host__ __device__ const __T & +min(const __T &__a, const __T &__b, __Cmp __cmp) { + return __cmp(__b, __a) ? __b : __a; +} + +template +__attribute__((enable_if(true, ""))) +inline _CPP14_CONSTEXPR __host__ __device__ const __T & +min(const __T &__a, const __T &__b) { + return __b < __a ? __b : __a; +} + +#pragma pop_macro("_CPP14_CONSTEXPR") + +#ifdef _LIBCPP_END_NAMESPACE_STD +_LIBCPP_END_NAMESPACE_STD +#else +#ifdef _GLIBCXX_BEGIN_NAMESPACE_VERSION +_GLIBCXX_END_NAMESPACE_VERSION +#endif +} // namespace std +#endif + +#endif // __CLANG_CUDA_WRAPPERS_ALGORITHM diff --git a/llvm/lib/clang/19/include/cuda_wrappers/bits/basic_string.h b/llvm/lib/clang/19/include/cuda_wrappers/bits/basic_string.h new file mode 100644 index 0000000000000000000000000000000000000000..64f50d9f6a72e7a4240d68490d5449d172faba99 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/bits/basic_string.h @@ -0,0 +1,9 @@ +// CUDA headers define __noinline__ which interferes with libstdc++'s use of +// `__attribute((__noinline__))`. In order to avoid compilation error, +// temporarily unset __noinline__ when we include affected libstdc++ header. + +#pragma push_macro("__noinline__") +#undef __noinline__ +#include_next "bits/basic_string.h" + +#pragma pop_macro("__noinline__") diff --git a/llvm/lib/clang/19/include/cuda_wrappers/bits/basic_string.tcc b/llvm/lib/clang/19/include/cuda_wrappers/bits/basic_string.tcc new file mode 100644 index 0000000000000000000000000000000000000000..90c7fe34d93255ff9ab3ae7b096759390c6a6772 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/bits/basic_string.tcc @@ -0,0 +1,9 @@ +// CUDA headers define __noinline__ which interferes with libstdc++'s use of +// `__attribute((__noinline__))`. In order to avoid compilation error, +// temporarily unset __noinline__ when we include affected libstdc++ header. + +#pragma push_macro("__noinline__") +#undef __noinline__ +#include_next "bits/basic_string.tcc" + +#pragma pop_macro("__noinline__") diff --git a/llvm/lib/clang/19/include/cuda_wrappers/bits/shared_ptr_base.h b/llvm/lib/clang/19/include/cuda_wrappers/bits/shared_ptr_base.h new file mode 100644 index 0000000000000000000000000000000000000000..10028dd7bd9a09191fc5e0ce3b3d71631e935271 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/bits/shared_ptr_base.h @@ -0,0 +1,9 @@ +// CUDA headers define __noinline__ which interferes with libstdc++'s use of +// `__attribute((__noinline__))`. In order to avoid compilation error, +// temporarily unset __noinline__ when we include affected libstdc++ header. + +#pragma push_macro("__noinline__") +#undef __noinline__ +#include_next "bits/shared_ptr_base.h" + +#pragma pop_macro("__noinline__") diff --git a/llvm/lib/clang/19/include/cuda_wrappers/cmath b/llvm/lib/clang/19/include/cuda_wrappers/cmath new file mode 100644 index 0000000000000000000000000000000000000000..45f89beec9b4df4350f3822c8be96bc04b162dc2 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/cmath @@ -0,0 +1,90 @@ +/*===---- cmath - CUDA wrapper for ---------------------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_WRAPPERS_CMATH +#define __CLANG_CUDA_WRAPPERS_CMATH + +#include_next + +#if defined(_LIBCPP_STD_VER) + +// libc++ will need long double variants of these functions, but CUDA does not +// provide them. We'll provide their declarations, which should allow the +// headers to parse, but would not allow accidental use of them on a GPU. + +__attribute__((device)) long double logb(long double); +__attribute__((device)) long double scalbn(long double, int); + +namespace std { + +// For __constexpr_fmin/fmax we only need device-side overloads before c++14 +// where they are not constexpr. +#if _LIBCPP_STD_VER < 14 + +__attribute__((device)) +inline _LIBCPP_HIDE_FROM_ABI _LIBCPP_CONSTEXPR_SINCE_CXX14 float __constexpr_fmax(float __x, float __y) _NOEXCEPT { + return __builtin_fmaxf(__x, __y); +} + +__attribute__((device)) +inline _LIBCPP_HIDE_FROM_ABI _LIBCPP_CONSTEXPR_SINCE_CXX14 double __constexpr_fmax(double __x, double __y) _NOEXCEPT { + return __builtin_fmax(__x, __y); +} + +__attribute__((device)) +inline _LIBCPP_HIDE_FROM_ABI _LIBCPP_CONSTEXPR_SINCE_CXX14 long double +__constexpr_fmax(long double __x, long double __y) _NOEXCEPT { + return __builtin_fmaxl(__x, __y); +} + +template ::value && is_arithmetic<_Up>::value, int> = 0> +__attribute__((device)) +_LIBCPP_HIDE_FROM_ABI _LIBCPP_CONSTEXPR_SINCE_CXX14 typename __promote<_Tp, _Up>::type +__constexpr_fmax(_Tp __x, _Up __y) _NOEXCEPT { + using __result_type = typename __promote<_Tp, _Up>::type; + return std::__constexpr_fmax(static_cast<__result_type>(__x), static_cast<__result_type>(__y)); +} +#endif // _LIBCPP_STD_VER < 14 + +// For logb/scalbn templates we must always provide device overloads because +// libc++ implementation uses __builtin_XXX which gets translated into a libcall +// which we can't handle on GPU. We need to forward those to CUDA-provided +// implementations. + +template +__attribute__((device)) +_LIBCPP_HIDE_FROM_ABI _LIBCPP_CONSTEXPR_SINCE_CXX14 _Tp __constexpr_logb(_Tp __x) { + return ::logb(__x); +} + +template +__attribute__((device)) +_LIBCPP_HIDE_FROM_ABI _LIBCPP_CONSTEXPR_SINCE_CXX20 _Tp __constexpr_scalbn(_Tp __x, int __exp) { + return ::scalbn(__x, __exp); +} + +} // namespace std// + +#endif // _LIBCPP_STD_VER + +#endif // include guard diff --git a/llvm/lib/clang/19/include/cuda_wrappers/complex b/llvm/lib/clang/19/include/cuda_wrappers/complex new file mode 100644 index 0000000000000000000000000000000000000000..e6805b6044e9885a3d698707a65f305f4cec9ba0 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/complex @@ -0,0 +1,90 @@ +/*===---- complex - CUDA wrapper for ------------------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_WRAPPERS_COMPLEX +#define __CLANG_CUDA_WRAPPERS_COMPLEX + +// Wrapper around that forces its functions to be __host__ +// __device__. + +// First, include host-only headers we think are likely to be included by +// , so that the pragma below only applies to itself. +#if __cplusplus >= 201103L +#include +#endif +#include +#include +#include + +// Next, include our wrapper, to ensure that device overloads of +// std::min/max are available. +#include + +#pragma clang force_cuda_host_device begin + +// When compiling for device, ask libstdc++ to use its own implements of +// complex functions, rather than calling builtins (which resolve to library +// functions that don't exist when compiling CUDA device code). +// +// This is a little dicey, because it causes libstdc++ to define a different +// set of overloads on host and device. +// +// // Present only when compiling for host. +// __host__ __device__ void complex sin(const complex& x) { +// return __builtin_csinf(x); +// } +// +// // Present when compiling for host and for device. +// template +// void __host__ __device__ complex sin(const complex& x) { +// return complex(sin(x.real()) * cosh(x.imag()), +// cos(x.real()), sinh(x.imag())); +// } +// +// This is safe because when compiling for device, all function calls in +// __host__ code to sin() will still resolve to *something*, even if they don't +// resolve to the same function as they resolve to when compiling for host. We +// don't care that they don't resolve to the right function because we won't +// codegen this host code when compiling for device. + +#pragma push_macro("_GLIBCXX_USE_C99_COMPLEX") +#pragma push_macro("_GLIBCXX_USE_C99_COMPLEX_TR1") +#define _GLIBCXX_USE_C99_COMPLEX 0 +#define _GLIBCXX_USE_C99_COMPLEX_TR1 0 + +// Work around a compatibility issue with libstdc++ 11.1.0 +// https://bugs.llvm.org/show_bug.cgi?id=50383 +#pragma push_macro("__failed_assertion") +#if _GLIBCXX_RELEASE == 11 +#define __failed_assertion __cuda_failed_assertion +#endif + +#include_next + +#pragma pop_macro("__failed_assertion") +#pragma pop_macro("_GLIBCXX_USE_C99_COMPLEX_TR1") +#pragma pop_macro("_GLIBCXX_USE_C99_COMPLEX") + +#pragma clang force_cuda_host_device end + +#endif // include guard diff --git a/llvm/lib/clang/19/include/cuda_wrappers/new b/llvm/lib/clang/19/include/cuda_wrappers/new new file mode 100644 index 0000000000000000000000000000000000000000..d5fb3b7011de9685a3c98aa8e186c4508f7fac69 --- /dev/null +++ b/llvm/lib/clang/19/include/cuda_wrappers/new @@ -0,0 +1,106 @@ +/*===---- new - CUDA wrapper for -------------------------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_CUDA_WRAPPERS_NEW +#define __CLANG_CUDA_WRAPPERS_NEW + +#include_next + +#if !defined(__device__) +// The header has been included too early from the standard C++ library +// and CUDA-specific macros are not available yet. +// Undo the include guard and try again later. +#undef __CLANG_CUDA_WRAPPERS_NEW +#else + +#pragma push_macro("CUDA_NOEXCEPT") +#if __cplusplus >= 201103L +#define CUDA_NOEXCEPT noexcept +#else +#define CUDA_NOEXCEPT +#endif + +// Device overrides for non-placement new and delete. +__device__ inline void *operator new(__SIZE_TYPE__ size) { + if (size == 0) { + size = 1; + } + return ::malloc(size); +} +__device__ inline void *operator new(__SIZE_TYPE__ size, + const std::nothrow_t &) CUDA_NOEXCEPT { + return ::operator new(size); +} + +__device__ inline void *operator new[](__SIZE_TYPE__ size) { + return ::operator new(size); +} +__device__ inline void *operator new[](__SIZE_TYPE__ size, + const std::nothrow_t &) { + return ::operator new(size); +} + +__device__ inline void operator delete(void* ptr) CUDA_NOEXCEPT { + if (ptr) { + ::free(ptr); + } +} +__device__ inline void operator delete(void *ptr, + const std::nothrow_t &) CUDA_NOEXCEPT { + ::operator delete(ptr); +} + +__device__ inline void operator delete[](void* ptr) CUDA_NOEXCEPT { + ::operator delete(ptr); +} +__device__ inline void operator delete[](void *ptr, + const std::nothrow_t &) CUDA_NOEXCEPT { + ::operator delete(ptr); +} + +// Sized delete, C++14 only. +#if __cplusplus >= 201402L +__device__ inline void operator delete(void *ptr, + __SIZE_TYPE__ size) CUDA_NOEXCEPT { + ::operator delete(ptr); +} +__device__ inline void operator delete[](void *ptr, + __SIZE_TYPE__ size) CUDA_NOEXCEPT { + ::operator delete(ptr); +} +#endif + +// Device overrides for placement new and delete. +__device__ inline void *operator new(__SIZE_TYPE__, void *__ptr) CUDA_NOEXCEPT { + return __ptr; +} +__device__ inline void *operator new[](__SIZE_TYPE__, void *__ptr) CUDA_NOEXCEPT { + return __ptr; +} +__device__ inline void operator delete(void *, void *) CUDA_NOEXCEPT {} +__device__ inline void operator delete[](void *, void *) CUDA_NOEXCEPT {} + +#pragma pop_macro("CUDA_NOEXCEPT") + +#endif // __device__ +#endif // include guard diff --git a/llvm/lib/clang/19/include/emmintrin.h b/llvm/lib/clang/19/include/emmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..4dff6421350c005a18d8923e69daee1a052cc482 --- /dev/null +++ b/llvm/lib/clang/19/include/emmintrin.h @@ -0,0 +1,4906 @@ +/*===---- emmintrin.h - SSE2 intrinsics ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __EMMINTRIN_H +#define __EMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16))); +typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16))); + +typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1))); +typedef long long __m128i_u + __attribute__((__vector_size__(16), __aligned__(1))); + +/* Type defines. */ +typedef double __v2df __attribute__((__vector_size__(16))); +typedef long long __v2di __attribute__((__vector_size__(16))); +typedef short __v8hi __attribute__((__vector_size__(16))); +typedef char __v16qi __attribute__((__vector_size__(16))); + +/* Unsigned types */ +typedef unsigned long long __v2du __attribute__((__vector_size__(16))); +typedef unsigned short __v8hu __attribute__((__vector_size__(16))); +typedef unsigned char __v16qu __attribute__((__vector_size__(16))); + +/* We need an explicitly signed variant for char. Note that this shouldn't + * appear in the interface though. */ +typedef signed char __v16qs __attribute__((__vector_size__(16))); + +#ifdef __SSE2__ +/* Both _Float16 and __bf16 require SSE2 being enabled. */ +typedef _Float16 __v8hf __attribute__((__vector_size__(16), __aligned__(16))); +typedef _Float16 __m128h __attribute__((__vector_size__(16), __aligned__(16))); +typedef _Float16 __m128h_u __attribute__((__vector_size__(16), __aligned__(1))); + +typedef __bf16 __v8bf __attribute__((__vector_size__(16), __aligned__(16))); +typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16))); +#endif + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("sse2,no-evex512"), __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS_MMX \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("mmx,sse2,no-evex512"), __min_vector_width__(64))) + +/// Adds lower double-precision values in both operands and returns the +/// sum in the lower 64 bits of the result. The upper 64 bits of the result +/// are copied from the upper double-precision value of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDSD / ADDSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// sum of the lower 64 bits of both operands. The upper 64 bits are copied +/// from the upper 64 bits of the first source operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_sd(__m128d __a, + __m128d __b) { + __a[0] += __b[0]; + return __a; +} + +/// Adds two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDPD / ADDPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \returns A 128-bit vector of [2 x double] containing the sums of both +/// operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2df)__a + (__v2df)__b); +} + +/// Subtracts the lower double-precision value of the second operand +/// from the lower double-precision value of the first operand and returns +/// the difference in the lower 64 bits of the result. The upper 64 bits of +/// the result are copied from the upper double-precision value of the first +/// operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSUBSD / SUBSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the minuend. +/// \param __b +/// A 128-bit vector of [2 x double] containing the subtrahend. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// difference of the lower 64 bits of both operands. The upper 64 bits are +/// copied from the upper 64 bits of the first source operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sub_sd(__m128d __a, + __m128d __b) { + __a[0] -= __b[0]; + return __a; +} + +/// Subtracts two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSUBPD / SUBPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the minuend. +/// \param __b +/// A 128-bit vector of [2 x double] containing the subtrahend. +/// \returns A 128-bit vector of [2 x double] containing the differences between +/// both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sub_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2df)__a - (__v2df)__b); +} + +/// Multiplies lower double-precision values in both operands and returns +/// the product in the lower 64 bits of the result. The upper 64 bits of the +/// result are copied from the upper double-precision value of the first +/// operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMULSD / MULSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// product of the lower 64 bits of both operands. The upper 64 bits are +/// copied from the upper 64 bits of the first source operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mul_sd(__m128d __a, + __m128d __b) { + __a[0] *= __b[0]; + return __a; +} + +/// Multiplies two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMULPD / MULPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the operands. +/// \returns A 128-bit vector of [2 x double] containing the products of both +/// operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mul_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2df)__a * (__v2df)__b); +} + +/// Divides the lower double-precision value of the first operand by the +/// lower double-precision value of the second operand and returns the +/// quotient in the lower 64 bits of the result. The upper 64 bits of the +/// result are copied from the upper double-precision value of the first +/// operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDIVSD / DIVSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the dividend. +/// \param __b +/// A 128-bit vector of [2 x double] containing divisor. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// quotient of the lower 64 bits of both operands. The upper 64 bits are +/// copied from the upper 64 bits of the first source operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_sd(__m128d __a, + __m128d __b) { + __a[0] /= __b[0]; + return __a; +} + +/// Performs an element-by-element division of two 128-bit vectors of +/// [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDIVPD / DIVPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the dividend. +/// \param __b +/// A 128-bit vector of [2 x double] containing the divisor. +/// \returns A 128-bit vector of [2 x double] containing the quotients of both +/// operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2df)__a / (__v2df)__b); +} + +/// Calculates the square root of the lower double-precision value of +/// the second operand and returns it in the lower 64 bits of the result. +/// The upper 64 bits of the result are copied from the upper +/// double-precision value of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSQRTSD / SQRTSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the operands. The +/// upper 64 bits of this operand are copied to the upper 64 bits of the +/// result. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the operands. The +/// square root is calculated using the lower 64 bits of this operand. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// square root of the lower 64 bits of operand \a __b, and whose upper 64 +/// bits are copied from the upper 64 bits of operand \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a, + __m128d __b) { + __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b); + return __extension__(__m128d){__c[0], __a[1]}; +} + +/// Calculates the square root of the each of two values stored in a +/// 128-bit vector of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSQRTPD / SQRTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector of [2 x double] containing the square roots of the +/// values in the operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) { + return __builtin_ia32_sqrtpd((__v2df)__a); +} + +/// Compares lower 64-bit double-precision values of both operands, and +/// returns the lesser of the pair of values in the lower 64-bits of the +/// result. The upper 64 bits of the result are copied from the upper +/// double-precision value of the first operand. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMINSD / MINSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the operands. The +/// lower 64 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the operands. The +/// lower 64 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// minimum value between both operands. The upper 64 bits are copied from +/// the upper 64 bits of the first source operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b); +} + +/// Performs element-by-element comparison of the two 128-bit vectors of +/// [2 x double] and returns a vector containing the lesser of each pair of +/// values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMINPD / MINPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the operands. +/// \returns A 128-bit vector of [2 x double] containing the minimum values +/// between both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a, + __m128d __b) { + return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b); +} + +/// Compares lower 64-bit double-precision values of both operands, and +/// returns the greater of the pair of values in the lower 64-bits of the +/// result. The upper 64 bits of the result are copied from the upper +/// double-precision value of the first operand. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMAXSD / MAXSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the operands. The +/// lower 64 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the operands. The +/// lower 64 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// maximum value between both operands. The upper 64 bits are copied from +/// the upper 64 bits of the first source operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b); +} + +/// Performs element-by-element comparison of the two 128-bit vectors of +/// [2 x double] and returns a vector containing the greater of each pair +/// of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMAXPD / MAXPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the operands. +/// \returns A 128-bit vector of [2 x double] containing the maximum values +/// between both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a, + __m128d __b) { + return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b); +} + +/// Performs a bitwise AND of two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPAND / PAND instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the +/// values between both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_and_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2du)__a & (__v2du)__b); +} + +/// Performs a bitwise AND of two 128-bit vectors of [2 x double], using +/// the one's complement of the values contained in the first source operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPANDN / PANDN instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the left source operand. The +/// one's complement of this value is used in the bitwise AND. +/// \param __b +/// A 128-bit vector of [2 x double] containing the right source operand. +/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the +/// values in the second operand and the one's complement of the first +/// operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_andnot_pd(__m128d __a, + __m128d __b) { + return (__m128d)(~(__v2du)__a & (__v2du)__b); +} + +/// Performs a bitwise OR of two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPOR / POR instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the +/// values between both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_or_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2du)__a | (__v2du)__b); +} + +/// Performs a bitwise XOR of two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPXOR / PXOR instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the +/// values between both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_xor_pd(__m128d __a, + __m128d __b) { + return (__m128d)((__v2du)__a ^ (__v2du)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] for equality. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPEQPD / CMPEQPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are less than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTPD / CMPLTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are less than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLEPD / CMPLEPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTPD / CMPLTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are greater than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLEPD / CMPLEPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are ordered with respect to those in the second operand. +/// +/// A pair of double-precision values are ordered with respect to each +/// other if neither value is a NaN. Each comparison returns 0x0 for false, +/// 0xFFFFFFFFFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPORDPD / CMPORDPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are unordered with respect to those in the second operand. +/// +/// A pair of double-precision values are unordered with respect to each +/// other if one or both values are NaN. Each comparison returns 0x0 for +/// false, 0xFFFFFFFFFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPUNORDPD / CMPUNORDPD +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are unequal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNEQPD / CMPNEQPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are not less than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTPD / CMPNLTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are not less than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLEPD / CMPNLEPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are not greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTPD / CMPNLTPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a); +} + +/// Compares each of the corresponding double-precision values of the +/// 128-bit vectors of [2 x double] to determine if the values in the first +/// operand are not greater than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLEPD / CMPNLEPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \param __b +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector containing the comparison results. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_pd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] for equality. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPEQSD / CMPEQSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is less than the corresponding value in +/// the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTSD / CMPLTSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is less than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLESD / CMPLESD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is greater than the corresponding value +/// in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTSD / CMPLTSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_sd(__m128d __a, + __m128d __b) { + __m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a); + return __extension__(__m128d){__c[0], __a[1]}; +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is greater than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLESD / CMPLESD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_sd(__m128d __a, + __m128d __b) { + __m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a); + return __extension__(__m128d){__c[0], __a[1]}; +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is ordered with respect to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair +/// of double-precision values are ordered with respect to each other if +/// neither value is a NaN. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPORDSD / CMPORDSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is unordered with respect to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair +/// of double-precision values are unordered with respect to each other if +/// one or both values are NaN. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPUNORDSD / CMPUNORDSD +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is unequal to the corresponding value in +/// the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNEQSD / CMPNEQSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is not less than the corresponding +/// value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTSD / CMPNLTSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is not less than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLESD / CMPNLESD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_sd(__m128d __a, + __m128d __b) { + return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is not greater than the corresponding +/// value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTSD / CMPNLTSD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_sd(__m128d __a, + __m128d __b) { + __m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a); + return __extension__(__m128d){__c[0], __a[1]}; +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is not greater than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLESD / CMPNLESD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns A 128-bit vector. The lower 64 bits contains the comparison +/// results. The upper 64 bits are copied from the upper 64 bits of \a __a. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_sd(__m128d __a, + __m128d __b) { + __m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a); + return __extension__(__m128d){__c[0], __a[1]}; +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] for equality. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISD / COMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_comieq_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is less than the corresponding value in +/// the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISD / COMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_comilt_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is less than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISD / COMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_comile_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is greater than the corresponding value +/// in the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISD / COMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_comigt_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is greater than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISD / COMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_comige_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is unequal to the corresponding value in +/// the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISD / COMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_comineq_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] for equality. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISD / UCOMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomieq_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is less than the corresponding value in +/// the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISD / UCOMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomilt_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is less than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISD / UCOMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomile_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is greater than the corresponding value +/// in the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISD / UCOMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomigt_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is greater than or equal to the +/// corresponding value in the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISD / UCOMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomige_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b); +} + +/// Compares the lower double-precision floating-point values in each of +/// the two 128-bit floating-point vectors of [2 x double] to determine if +/// the value in the first parameter is unequal to the corresponding value in +/// the second parameter. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISD / UCOMISD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __b. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision value is +/// compared to the lower double-precision value of \a __a. +/// \returns An integer containing the comparison result. +static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a, + __m128d __b) { + return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b); +} + +/// Converts the two double-precision floating-point elements of a +/// 128-bit vector of [2 x double] into two single-precision floating-point +/// values, returned in the lower 64 bits of a 128-bit vector of [4 x float]. +/// The upper 64 bits of the result vector are set to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPD2PS / CVTPD2PS instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the +/// converted values. The upper 64 bits are set to zero. +static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) { + return __builtin_ia32_cvtpd2ps((__v2df)__a); +} + +/// Converts the lower two single-precision floating-point elements of a +/// 128-bit vector of [4 x float] into two double-precision floating-point +/// values, returned in a 128-bit vector of [2 x double]. The upper two +/// elements of the input vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPS2PD / CVTPS2PD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower two single-precision +/// floating-point elements are converted to double-precision values. The +/// upper two elements are unused. +/// \returns A 128-bit vector of [2 x double] containing the converted values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtps_pd(__m128 __a) { + return (__m128d) __builtin_convertvector( + __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df); +} + +/// Converts the lower two integer elements of a 128-bit vector of +/// [4 x i32] into two double-precision floating-point values, returned in a +/// 128-bit vector of [2 x double]. +/// +/// The upper two elements of the input vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTDQ2PD / CVTDQ2PD instruction. +/// +/// \param __a +/// A 128-bit integer vector of [4 x i32]. The lower two integer elements are +/// converted to double-precision values. +/// +/// The upper two elements are unused. +/// \returns A 128-bit vector of [2 x double] containing the converted values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepi32_pd(__m128i __a) { + return (__m128d) __builtin_convertvector( + __builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df); +} + +/// Converts the two double-precision floating-point elements of a +/// 128-bit vector of [2 x double] into two signed 32-bit integer values, +/// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper +/// 64 bits of the result vector are set to zero. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPD2DQ / CVTPD2DQ instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the +/// converted values. The upper 64 bits are set to zero. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) { + return __builtin_ia32_cvtpd2dq((__v2df)__a); +} + +/// Converts the low-order element of a 128-bit vector of [2 x double] +/// into a 32-bit signed integer value. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSD2SI / CVTSD2SI instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the +/// conversion. +/// \returns A 32-bit signed integer containing the converted value. +static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) { + return __builtin_ia32_cvtsd2si((__v2df)__a); +} + +/// Converts the lower double-precision floating-point element of a +/// 128-bit vector of [2 x double], in the second parameter, into a +/// single-precision floating-point value, returned in the lower 32 bits of a +/// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are +/// copied from the upper 96 bits of the first parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSD2SS / CVTSD2SS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are +/// copied to the upper 96 bits of the result. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower double-precision +/// floating-point element is used in the conversion. +/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the +/// converted value from the second parameter. The upper 96 bits are copied +/// from the upper 96 bits of the first parameter. +static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a, + __m128d __b) { + return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b); +} + +/// Converts a 32-bit signed integer value, in the second parameter, into +/// a double-precision floating-point value, returned in the lower 64 bits of +/// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector +/// are copied from the upper 64 bits of the first parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSI2SD / CVTSI2SD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are +/// copied to the upper 64 bits of the result. +/// \param __b +/// A 32-bit signed integer containing the value to be converted. +/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the +/// converted value from the second parameter. The upper 64 bits are copied +/// from the upper 64 bits of the first parameter. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi32_sd(__m128d __a, + int __b) { + __a[0] = __b; + return __a; +} + +/// Converts the lower single-precision floating-point element of a +/// 128-bit vector of [4 x float], in the second parameter, into a +/// double-precision floating-point value, returned in the lower 64 bits of +/// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector +/// are copied from the upper 64 bits of the first parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSS2SD / CVTSS2SD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are +/// copied to the upper 64 bits of the result. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower single-precision +/// floating-point element is used in the conversion. +/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the +/// converted value from the second parameter. The upper 64 bits are copied +/// from the upper 64 bits of the first parameter. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a, + __m128 __b) { + __a[0] = __b[0]; + return __a; +} + +/// Converts the two double-precision floating-point elements of a +/// 128-bit vector of [2 x double] into two signed truncated (rounded +/// toward zero) 32-bit integer values, returned in the lower 64 bits +/// of a 128-bit vector of [4 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTPD2DQ / CVTTPD2DQ +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the +/// converted values. The upper 64 bits are set to zero. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) { + return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a); +} + +/// Converts the low-order element of a [2 x double] vector into a 32-bit +/// signed truncated (rounded toward zero) integer value. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTSD2SI / CVTTSD2SI +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the +/// conversion. +/// \returns A 32-bit signed integer containing the converted value. +static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) { + return __builtin_ia32_cvttsd2si((__v2df)__a); +} + +/// Converts the two double-precision floating-point elements of a +/// 128-bit vector of [2 x double] into two signed 32-bit integer values, +/// returned in a 64-bit vector of [2 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPD2PI instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 64-bit vector of [2 x i32] containing the converted values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvtpd_pi32(__m128d __a) { + return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a); +} + +/// Converts the two double-precision floating-point elements of a +/// 128-bit vector of [2 x double] into two signed truncated (rounded toward +/// zero) 32-bit integer values, returned in a 64-bit vector of [2 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTTPD2PI instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. +/// \returns A 64-bit vector of [2 x i32] containing the converted values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvttpd_pi32(__m128d __a) { + return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a); +} + +/// Converts the two signed 32-bit integer elements of a 64-bit vector of +/// [2 x i32] into two double-precision floating-point values, returned in a +/// 128-bit vector of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PD instruction. +/// +/// \param __a +/// A 64-bit vector of [2 x i32]. +/// \returns A 128-bit vector of [2 x double] containing the converted values. +static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX _mm_cvtpi32_pd(__m64 __a) { + return __builtin_ia32_cvtpi2pd((__v2si)__a); +} + +/// Returns the low-order element of a 128-bit vector of [2 x double] as +/// a double-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower 64 bits are returned. +/// \returns A double-precision floating-point value copied from the lower 64 +/// bits of \a __a. +static __inline__ double __DEFAULT_FN_ATTRS _mm_cvtsd_f64(__m128d __a) { + return __a[0]; +} + +/// Loads a 128-bit floating-point vector of [2 x double] from an aligned +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPD / MOVAPD instruction. +/// +/// \param __dp +/// A pointer to a 128-bit memory location. The address of the memory +/// location has to be 16-byte aligned. +/// \returns A 128-bit vector of [2 x double] containing the loaded values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_pd(double const *__dp) { + return *(const __m128d *)__dp; +} + +/// Loads a double-precision floating-point value from a specified memory +/// location and duplicates it to both vector elements of a 128-bit vector of +/// [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP / MOVDDUP instruction. +/// +/// \param __dp +/// A pointer to a memory location containing a double-precision value. +/// \returns A 128-bit vector of [2 x double] containing the loaded and +/// duplicated values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load1_pd(double const *__dp) { + struct __mm_load1_pd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + double __u = ((const struct __mm_load1_pd_struct *)__dp)->__u; + return __extension__(__m128d){__u, __u}; +} + +#define _mm_load_pd1(dp) _mm_load1_pd(dp) + +/// Loads two double-precision values, in reverse order, from an aligned +/// memory location into a 128-bit vector of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPD / MOVAPD instruction + +/// needed shuffling instructions. In AVX mode, the shuffling may be combined +/// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction. +/// +/// \param __dp +/// A 16-byte aligned pointer to an array of double-precision values to be +/// loaded in reverse order. +/// \returns A 128-bit vector of [2 x double] containing the reversed loaded +/// values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadr_pd(double const *__dp) { + __m128d __u = *(const __m128d *)__dp; + return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0); +} + +/// Loads a 128-bit floating-point vector of [2 x double] from an +/// unaligned memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPD / MOVUPD instruction. +/// +/// \param __dp +/// A pointer to a 128-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns A 128-bit vector of [2 x double] containing the loaded values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadu_pd(double const *__dp) { + struct __loadu_pd { + __m128d_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_pd *)__dp)->__v; +} + +/// Loads a 64-bit integer value to the low element of a 128-bit integer +/// vector and clears the upper element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction. +/// +/// \param __a +/// A pointer to a 64-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns A 128-bit vector of [2 x i64] containing the loaded value. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si64(void const *__a) { + struct __loadu_si64 { + long long __v; + } __attribute__((__packed__, __may_alias__)); + long long __u = ((const struct __loadu_si64 *)__a)->__v; + return __extension__(__m128i)(__v2di){__u, 0LL}; +} + +/// Loads a 32-bit integer value to the low element of a 128-bit integer +/// vector and clears the upper element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVD / MOVD instruction. +/// +/// \param __a +/// A pointer to a 32-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns A 128-bit vector of [4 x i32] containing the loaded value. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si32(void const *__a) { + struct __loadu_si32 { + int __v; + } __attribute__((__packed__, __may_alias__)); + int __u = ((const struct __loadu_si32 *)__a)->__v; + return __extension__(__m128i)(__v4si){__u, 0, 0, 0}; +} + +/// Loads a 16-bit integer value to the low element of a 128-bit integer +/// vector and clears the upper element. +/// +/// \headerfile +/// +/// This intrinsic does not correspond to a specific instruction. +/// +/// \param __a +/// A pointer to a 16-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns A 128-bit vector of [8 x i16] containing the loaded value. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si16(void const *__a) { + struct __loadu_si16 { + short __v; + } __attribute__((__packed__, __may_alias__)); + short __u = ((const struct __loadu_si16 *)__a)->__v; + return __extension__(__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0}; +} + +/// Loads a 64-bit double-precision value to the low element of a +/// 128-bit integer vector and clears the upper element. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSD / MOVSD instruction. +/// +/// \param __dp +/// A pointer to a memory location containing a double-precision value. +/// The address of the memory location does not have to be aligned. +/// \returns A 128-bit vector of [2 x double] containing the loaded value. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_sd(double const *__dp) { + struct __mm_load_sd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + double __u = ((const struct __mm_load_sd_struct *)__dp)->__u; + return __extension__(__m128d){__u, 0}; +} + +/// Loads a double-precision value into the high-order bits of a 128-bit +/// vector of [2 x double]. The low-order bits are copied from the low-order +/// bits of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVHPD / MOVHPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. \n +/// Bits [63:0] are written to bits [63:0] of the result. +/// \param __dp +/// A pointer to a 64-bit memory location containing a double-precision +/// floating-point value that is loaded. The loaded value is written to bits +/// [127:64] of the result. The address of the memory location does not have +/// to be aligned. +/// \returns A 128-bit vector of [2 x double] containing the moved values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadh_pd(__m128d __a, + double const *__dp) { + struct __mm_loadh_pd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + double __u = ((const struct __mm_loadh_pd_struct *)__dp)->__u; + return __extension__(__m128d){__a[0], __u}; +} + +/// Loads a double-precision value into the low-order bits of a 128-bit +/// vector of [2 x double]. The high-order bits are copied from the +/// high-order bits of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVLPD / MOVLPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. \n +/// Bits [127:64] are written to bits [127:64] of the result. +/// \param __dp +/// A pointer to a 64-bit memory location containing a double-precision +/// floating-point value that is loaded. The loaded value is written to bits +/// [63:0] of the result. The address of the memory location does not have to +/// be aligned. +/// \returns A 128-bit vector of [2 x double] containing the moved values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadl_pd(__m128d __a, + double const *__dp) { + struct __mm_loadl_pd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + double __u = ((const struct __mm_loadl_pd_struct *)__dp)->__u; + return __extension__(__m128d){__u, __a[1]}; +} + +/// Constructs a 128-bit floating-point vector of [2 x double] with +/// unspecified content. This could be used as an argument to another +/// intrinsic function where the argument is required but the value is not +/// actually used. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \returns A 128-bit floating-point vector of [2 x double] with unspecified +/// content. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_undefined_pd(void) { + return (__m128d)__builtin_ia32_undef128(); +} + +/// Constructs a 128-bit floating-point vector of [2 x double]. The lower +/// 64 bits of the vector are initialized with the specified double-precision +/// floating-point value. The upper 64 bits are set to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction. +/// +/// \param __w +/// A double-precision floating-point value used to initialize the lower 64 +/// bits of the result. +/// \returns An initialized 128-bit floating-point vector of [2 x double]. The +/// lower 64 bits contain the value of the parameter. The upper 64 bits are +/// set to zero. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_sd(double __w) { + return __extension__(__m128d){__w, 0.0}; +} + +/// Constructs a 128-bit floating-point vector of [2 x double], with each +/// of the two double-precision floating-point vector elements set to the +/// specified double-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP / MOVLHPS instruction. +/// +/// \param __w +/// A double-precision floating-point value used to initialize each vector +/// element of the result. +/// \returns An initialized 128-bit floating-point vector of [2 x double]. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set1_pd(double __w) { + return __extension__(__m128d){__w, __w}; +} + +/// Constructs a 128-bit floating-point vector of [2 x double], with each +/// of the two double-precision floating-point vector elements set to the +/// specified double-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP / MOVLHPS instruction. +/// +/// \param __w +/// A double-precision floating-point value used to initialize each vector +/// element of the result. +/// \returns An initialized 128-bit floating-point vector of [2 x double]. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd1(double __w) { + return _mm_set1_pd(__w); +} + +/// Constructs a 128-bit floating-point vector of [2 x double] +/// initialized with the specified double-precision floating-point values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD / UNPCKLPD instruction. +/// +/// \param __w +/// A double-precision floating-point value used to initialize the upper 64 +/// bits of the result. +/// \param __x +/// A double-precision floating-point value used to initialize the lower 64 +/// bits of the result. +/// \returns An initialized 128-bit floating-point vector of [2 x double]. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd(double __w, + double __x) { + return __extension__(__m128d){__x, __w}; +} + +/// Constructs a 128-bit floating-point vector of [2 x double], +/// initialized in reverse order with the specified double-precision +/// floating-point values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD / UNPCKLPD instruction. +/// +/// \param __w +/// A double-precision floating-point value used to initialize the lower 64 +/// bits of the result. +/// \param __x +/// A double-precision floating-point value used to initialize the upper 64 +/// bits of the result. +/// \returns An initialized 128-bit floating-point vector of [2 x double]. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setr_pd(double __w, + double __x) { + return __extension__(__m128d){__w, __x}; +} + +/// Constructs a 128-bit floating-point vector of [2 x double] +/// initialized to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS / XORPS instruction. +/// +/// \returns An initialized 128-bit floating-point vector of [2 x double] with +/// all elements set to zero. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setzero_pd(void) { + return __extension__(__m128d){0.0, 0.0}; +} + +/// Constructs a 128-bit floating-point vector of [2 x double]. The lower +/// 64 bits are set to the lower 64 bits of the second parameter. The upper +/// 64 bits are set to the upper 64 bits of the first parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBLENDPD / BLENDPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The upper 64 bits are written to the +/// upper 64 bits of the result. +/// \param __b +/// A 128-bit vector of [2 x double]. The lower 64 bits are written to the +/// lower 64 bits of the result. +/// \returns A 128-bit vector of [2 x double] containing the moved values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_move_sd(__m128d __a, + __m128d __b) { + __a[0] = __b[0]; + return __a; +} + +/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSD / MOVSD instruction. +/// +/// \param __dp +/// A pointer to a 64-bit memory location. +/// \param __a +/// A 128-bit vector of [2 x double] containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_store_sd(double *__dp, + __m128d __a) { + struct __mm_store_sd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_store_sd_struct *)__dp)->__u = __a[0]; +} + +/// Moves packed double-precision values from a 128-bit vector of +/// [2 x double] to a memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPD / MOVAPS instruction. +/// +/// \param __dp +/// A pointer to an aligned memory location that can store two +/// double-precision values. +/// \param __a +/// A packed 128-bit vector of [2 x double] containing the values to be +/// moved. +static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd(double *__dp, + __m128d __a) { + *(__m128d *)__dp = __a; +} + +/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to +/// the upper and lower 64 bits of a memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the +/// VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS instruction. +/// +/// \param __dp +/// A pointer to a memory location that can store two double-precision +/// values. +/// \param __a +/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each +/// of the values in \a __dp. +static __inline__ void __DEFAULT_FN_ATTRS _mm_store1_pd(double *__dp, + __m128d __a) { + __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0); + _mm_store_pd(__dp, __a); +} + +/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to +/// the upper and lower 64 bits of a memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the +/// VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS instruction. +/// +/// \param __dp +/// A pointer to a memory location that can store two double-precision +/// values. +/// \param __a +/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each +/// of the values in \a __dp. +static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd1(double *__dp, + __m128d __a) { + _mm_store1_pd(__dp, __a); +} + +/// Stores a 128-bit vector of [2 x double] into an unaligned memory +/// location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPD / MOVUPD instruction. +/// +/// \param __dp +/// A pointer to a 128-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \param __a +/// A 128-bit vector of [2 x double] containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_pd(double *__dp, + __m128d __a) { + struct __storeu_pd { + __m128d_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_pd *)__dp)->__v = __a; +} + +/// Stores two double-precision values, in reverse order, from a 128-bit +/// vector of [2 x double] to a 16-byte aligned memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to a shuffling instruction followed by a +/// VMOVAPD / MOVAPD instruction. +/// +/// \param __dp +/// A pointer to a 16-byte aligned memory location that can store two +/// double-precision values. +/// \param __a +/// A 128-bit vector of [2 x double] containing the values to be reversed and +/// stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storer_pd(double *__dp, + __m128d __a) { + __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0); + *(__m128d *)__dp = __a; +} + +/// Stores the upper 64 bits of a 128-bit vector of [2 x double] to a +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVHPD / MOVHPD instruction. +/// +/// \param __dp +/// A pointer to a 64-bit memory location. +/// \param __a +/// A 128-bit vector of [2 x double] containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storeh_pd(double *__dp, + __m128d __a) { + struct __mm_storeh_pd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_storeh_pd_struct *)__dp)->__u = __a[1]; +} + +/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVLPD / MOVLPD instruction. +/// +/// \param __dp +/// A pointer to a 64-bit memory location. +/// \param __a +/// A 128-bit vector of [2 x double] containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp, + __m128d __a) { + struct __mm_storeh_pd_struct { + double __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_storeh_pd_struct *)__dp)->__u = __a[0]; +} + +/// Adds the corresponding elements of two 128-bit vectors of [16 x i8], +/// saving the lower 8 bits of each sum in the corresponding element of a +/// 128-bit result vector of [16 x i8]. +/// +/// The integer elements of both parameters can be either signed or unsigned. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDB / PADDB instruction. +/// +/// \param __a +/// A 128-bit vector of [16 x i8]. +/// \param __b +/// A 128-bit vector of [16 x i8]. +/// \returns A 128-bit vector of [16 x i8] containing the sums of both +/// parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a, + __m128i __b) { + return (__m128i)((__v16qu)__a + (__v16qu)__b); +} + +/// Adds the corresponding elements of two 128-bit vectors of [8 x i16], +/// saving the lower 16 bits of each sum in the corresponding element of a +/// 128-bit result vector of [8 x i16]. +/// +/// The integer elements of both parameters can be either signed or unsigned. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDW / PADDW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16]. +/// \param __b +/// A 128-bit vector of [8 x i16]. +/// \returns A 128-bit vector of [8 x i16] containing the sums of both +/// parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a, + __m128i __b) { + return (__m128i)((__v8hu)__a + (__v8hu)__b); +} + +/// Adds the corresponding elements of two 128-bit vectors of [4 x i32], +/// saving the lower 32 bits of each sum in the corresponding element of a +/// 128-bit result vector of [4 x i32]. +/// +/// The integer elements of both parameters can be either signed or unsigned. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDD / PADDD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32]. +/// \param __b +/// A 128-bit vector of [4 x i32]. +/// \returns A 128-bit vector of [4 x i32] containing the sums of both +/// parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi32(__m128i __a, + __m128i __b) { + return (__m128i)((__v4su)__a + (__v4su)__b); +} + +/// Adds two signed or unsigned 64-bit integer values, returning the +/// lower 64 bits of the sum. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDQ instruction. +/// +/// \param __a +/// A 64-bit integer. +/// \param __b +/// A 64-bit integer. +/// \returns A 64-bit integer containing the sum of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_add_si64(__m64 __a, + __m64 __b) { + return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b); +} + +/// Adds the corresponding elements of two 128-bit vectors of [2 x i64], +/// saving the lower 64 bits of each sum in the corresponding element of a +/// 128-bit result vector of [2 x i64]. +/// +/// The integer elements of both parameters can be either signed or unsigned. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDQ / PADDQ instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x i64]. +/// \param __b +/// A 128-bit vector of [2 x i64]. +/// \returns A 128-bit vector of [2 x i64] containing the sums of both +/// parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a, + __m128i __b) { + return (__m128i)((__v2du)__a + (__v2du)__b); +} + +/// Adds, with saturation, the corresponding elements of two 128-bit +/// signed [16 x i8] vectors, saving each sum in the corresponding element +/// of a 128-bit result vector of [16 x i8]. +/// +/// Positive sums greater than 0x7F are saturated to 0x7F. Negative sums +/// less than 0x80 are saturated to 0x80. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDSB / PADDSB instruction. +/// +/// \param __a +/// A 128-bit signed [16 x i8] vector. +/// \param __b +/// A 128-bit signed [16 x i8] vector. +/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of +/// both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b); +} + +/// Adds, with saturation, the corresponding elements of two 128-bit +/// signed [8 x i16] vectors, saving each sum in the corresponding element +/// of a 128-bit result vector of [8 x i16]. +/// +/// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums +/// less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDSW / PADDSW instruction. +/// +/// \param __a +/// A 128-bit signed [8 x i16] vector. +/// \param __b +/// A 128-bit signed [8 x i16] vector. +/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of +/// both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b); +} + +/// Adds, with saturation, the corresponding elements of two 128-bit +/// unsigned [16 x i8] vectors, saving each sum in the corresponding element +/// of a 128-bit result vector of [16 x i8]. +/// +/// Positive sums greater than 0xFF are saturated to 0xFF. Negative sums are +/// saturated to 0x00. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDUSB / PADDUSB instruction. +/// +/// \param __a +/// A 128-bit unsigned [16 x i8] vector. +/// \param __b +/// A 128-bit unsigned [16 x i8] vector. +/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums +/// of both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b); +} + +/// Adds, with saturation, the corresponding elements of two 128-bit +/// unsigned [8 x i16] vectors, saving each sum in the corresponding element +/// of a 128-bit result vector of [8 x i16]. +/// +/// Positive sums greater than 0xFFFF are saturated to 0xFFFF. Negative sums +/// are saturated to 0x0000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPADDUSB / PADDUSB instruction. +/// +/// \param __a +/// A 128-bit unsigned [8 x i16] vector. +/// \param __b +/// A 128-bit unsigned [8 x i16] vector. +/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums +/// of both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b); +} + +/// Computes the rounded averages of corresponding elements of two +/// 128-bit unsigned [16 x i8] vectors, saving each result in the +/// corresponding element of a 128-bit result vector of [16 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPAVGB / PAVGB instruction. +/// +/// \param __a +/// A 128-bit unsigned [16 x i8] vector. +/// \param __b +/// A 128-bit unsigned [16 x i8] vector. +/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded +/// averages of both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b); +} + +/// Computes the rounded averages of corresponding elements of two +/// 128-bit unsigned [8 x i16] vectors, saving each result in the +/// corresponding element of a 128-bit result vector of [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPAVGW / PAVGW instruction. +/// +/// \param __a +/// A 128-bit unsigned [8 x i16] vector. +/// \param __b +/// A 128-bit unsigned [8 x i16] vector. +/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded +/// averages of both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b); +} + +/// Multiplies the corresponding elements of two 128-bit signed [8 x i16] +/// vectors, producing eight intermediate 32-bit signed integer products, and +/// adds the consecutive pairs of 32-bit products to form a 128-bit signed +/// [4 x i32] vector. +/// +/// For example, bits [15:0] of both parameters are multiplied producing a +/// 32-bit product, bits [31:16] of both parameters are multiplied producing +/// a 32-bit product, and the sum of those two products becomes bits [31:0] +/// of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMADDWD / PMADDWD instruction. +/// +/// \param __a +/// A 128-bit signed [8 x i16] vector. +/// \param __b +/// A 128-bit signed [8 x i16] vector. +/// \returns A 128-bit signed [4 x i32] vector containing the sums of products +/// of both parameters. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b); +} + +/// Compares corresponding elements of two 128-bit signed [8 x i16] +/// vectors, saving the greater value from each comparison in the +/// corresponding element of a 128-bit result vector of [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMAXSW / PMAXSW instruction. +/// +/// \param __a +/// A 128-bit signed [8 x i16] vector. +/// \param __b +/// A 128-bit signed [8 x i16] vector. +/// \returns A 128-bit signed [8 x i16] vector containing the greater value of +/// each comparison. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b); +} + +/// Compares corresponding elements of two 128-bit unsigned [16 x i8] +/// vectors, saving the greater value from each comparison in the +/// corresponding element of a 128-bit result vector of [16 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMAXUB / PMAXUB instruction. +/// +/// \param __a +/// A 128-bit unsigned [16 x i8] vector. +/// \param __b +/// A 128-bit unsigned [16 x i8] vector. +/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of +/// each comparison. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b); +} + +/// Compares corresponding elements of two 128-bit signed [8 x i16] +/// vectors, saving the smaller value from each comparison in the +/// corresponding element of a 128-bit result vector of [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMINSW / PMINSW instruction. +/// +/// \param __a +/// A 128-bit signed [8 x i16] vector. +/// \param __b +/// A 128-bit signed [8 x i16] vector. +/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of +/// each comparison. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b); +} + +/// Compares corresponding elements of two 128-bit unsigned [16 x i8] +/// vectors, saving the smaller value from each comparison in the +/// corresponding element of a 128-bit result vector of [16 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMINUB / PMINUB instruction. +/// +/// \param __a +/// A 128-bit unsigned [16 x i8] vector. +/// \param __b +/// A 128-bit unsigned [16 x i8] vector. +/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of +/// each comparison. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b); +} + +/// Multiplies the corresponding elements of two signed [8 x i16] +/// vectors, saving the upper 16 bits of each 32-bit product in the +/// corresponding element of a 128-bit signed [8 x i16] result vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMULHW / PMULHW instruction. +/// +/// \param __a +/// A 128-bit signed [8 x i16] vector. +/// \param __b +/// A 128-bit signed [8 x i16] vector. +/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of +/// each of the eight 32-bit products. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b); +} + +/// Multiplies the corresponding elements of two unsigned [8 x i16] +/// vectors, saving the upper 16 bits of each 32-bit product in the +/// corresponding element of a 128-bit unsigned [8 x i16] result vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMULHUW / PMULHUW instruction. +/// +/// \param __a +/// A 128-bit unsigned [8 x i16] vector. +/// \param __b +/// A 128-bit unsigned [8 x i16] vector. +/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits +/// of each of the eight 32-bit products. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b); +} + +/// Multiplies the corresponding elements of two signed [8 x i16] +/// vectors, saving the lower 16 bits of each 32-bit product in the +/// corresponding element of a 128-bit signed [8 x i16] result vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMULLW / PMULLW instruction. +/// +/// \param __a +/// A 128-bit signed [8 x i16] vector. +/// \param __b +/// A 128-bit signed [8 x i16] vector. +/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of +/// each of the eight 32-bit products. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a, + __m128i __b) { + return (__m128i)((__v8hu)__a * (__v8hu)__b); +} + +/// Multiplies 32-bit unsigned integer values contained in the lower bits +/// of the two 64-bit integer vectors and returns the 64-bit unsigned +/// product. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMULUDQ instruction. +/// +/// \param __a +/// A 64-bit integer containing one of the source operands. +/// \param __b +/// A 64-bit integer containing one of the source operands. +/// \returns A 64-bit integer vector containing the product of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_mul_su32(__m64 __a, + __m64 __b) { + return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b); +} + +/// Multiplies 32-bit unsigned integer values contained in the lower +/// bits of the corresponding elements of two [2 x i64] vectors, and returns +/// the 64-bit products in the corresponding elements of a [2 x i64] vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMULUDQ / PMULUDQ instruction. +/// +/// \param __a +/// A [2 x i64] vector containing one of the source operands. +/// \param __b +/// A [2 x i64] vector containing one of the source operands. +/// \returns A [2 x i64] vector containing the product of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a, + __m128i __b) { + return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b); +} + +/// Computes the absolute differences of corresponding 8-bit integer +/// values in two 128-bit vectors. Sums the first 8 absolute differences, and +/// separately sums the second 8 absolute differences. Packs these two +/// unsigned 16-bit integer sums into the upper and lower elements of a +/// [2 x i64] vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSADBW / PSADBW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing one of the source operands. +/// \param __b +/// A 128-bit integer vector containing one of the source operands. +/// \returns A [2 x i64] vector containing the sums of the sets of absolute +/// differences between both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a, + __m128i __b) { + return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b); +} + +/// Subtracts the corresponding 8-bit integer values in the operands. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBB / PSUBB instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the differences of the values +/// in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a, + __m128i __b) { + return (__m128i)((__v16qu)__a - (__v16qu)__b); +} + +/// Subtracts the corresponding 16-bit integer values in the operands. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBW / PSUBW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the differences of the values +/// in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a, + __m128i __b) { + return (__m128i)((__v8hu)__a - (__v8hu)__b); +} + +/// Subtracts the corresponding 32-bit integer values in the operands. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBD / PSUBD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the differences of the values +/// in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi32(__m128i __a, + __m128i __b) { + return (__m128i)((__v4su)__a - (__v4su)__b); +} + +/// Subtracts signed or unsigned 64-bit integer values and writes the +/// difference to the corresponding bits in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBQ instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the minuend. +/// \param __b +/// A 64-bit integer vector containing the subtrahend. +/// \returns A 64-bit integer vector containing the difference of the values in +/// the operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sub_si64(__m64 __a, + __m64 __b) { + return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b); +} + +/// Subtracts the corresponding elements of two [2 x i64] vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBQ / PSUBQ instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the differences of the values +/// in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi64(__m128i __a, + __m128i __b) { + return (__m128i)((__v2du)__a - (__v2du)__b); +} + +/// Subtracts, with saturation, corresponding 8-bit signed integer values in +/// the input and returns the differences in the corresponding bytes in the +/// destination. +/// +/// Differences greater than 0x7F are saturated to 0x7F, and differences +/// less than 0x80 are saturated to 0x80. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBSB / PSUBSB instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the differences of the values +/// in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b); +} + +/// Subtracts, with saturation, corresponding 16-bit signed integer values in +/// the input and returns the differences in the corresponding bytes in the +/// destination. +/// +/// Differences greater than 0x7FFF are saturated to 0x7FFF, and values less +/// than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBSW / PSUBSW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the differences of the values +/// in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b); +} + +/// Subtracts, with saturation, corresponding 8-bit unsigned integer values in +/// the input and returns the differences in the corresponding bytes in the +/// destination. +/// +/// Differences less than 0x00 are saturated to 0x00. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBUSB / PSUBUSB instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the unsigned integer +/// differences of the values in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b); +} + +/// Subtracts, with saturation, corresponding 16-bit unsigned integer values in +/// the input and returns the differences in the corresponding bytes in the +/// destination. +/// +/// Differences less than 0x0000 are saturated to 0x0000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSUBUSW / PSUBUSW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the minuends. +/// \param __b +/// A 128-bit integer vector containing the subtrahends. +/// \returns A 128-bit integer vector containing the unsigned integer +/// differences of the values in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b); +} + +/// Performs a bitwise AND of two 128-bit integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPAND / PAND instruction. +/// +/// \param __a +/// A 128-bit integer vector containing one of the source operands. +/// \param __b +/// A 128-bit integer vector containing one of the source operands. +/// \returns A 128-bit integer vector containing the bitwise AND of the values +/// in both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a, + __m128i __b) { + return (__m128i)((__v2du)__a & (__v2du)__b); +} + +/// Performs a bitwise AND of two 128-bit integer vectors, using the +/// one's complement of the values contained in the first source operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPANDN / PANDN instruction. +/// +/// \param __a +/// A 128-bit vector containing the left source operand. The one's complement +/// of this value is used in the bitwise AND. +/// \param __b +/// A 128-bit vector containing the right source operand. +/// \returns A 128-bit integer vector containing the bitwise AND of the one's +/// complement of the first operand and the values in the second operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a, + __m128i __b) { + return (__m128i)(~(__v2du)__a & (__v2du)__b); +} +/// Performs a bitwise OR of two 128-bit integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPOR / POR instruction. +/// +/// \param __a +/// A 128-bit integer vector containing one of the source operands. +/// \param __b +/// A 128-bit integer vector containing one of the source operands. +/// \returns A 128-bit integer vector containing the bitwise OR of the values +/// in both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a, + __m128i __b) { + return (__m128i)((__v2du)__a | (__v2du)__b); +} + +/// Performs a bitwise exclusive OR of two 128-bit integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPXOR / PXOR instruction. +/// +/// \param __a +/// A 128-bit integer vector containing one of the source operands. +/// \param __b +/// A 128-bit integer vector containing one of the source operands. +/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the +/// values in both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a, + __m128i __b) { + return (__m128i)((__v2du)__a ^ (__v2du)__b); +} + +/// Left-shifts the 128-bit integer vector operand by the specified +/// number of bytes. Low-order bits are cleared. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_slli_si128(__m128i a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPSLLDQ / PSLLDQ instruction. +/// +/// \param a +/// A 128-bit integer vector containing the source operand. +/// \param imm +/// An immediate value specifying the number of bytes to left-shift operand +/// \a a. +/// \returns A 128-bit integer vector containing the left-shifted value. +#define _mm_slli_si128(a, imm) \ + ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \ + (int)(imm))) + +#define _mm_bslli_si128(a, imm) \ + ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \ + (int)(imm))) + +/// Left-shifts each 16-bit value in the 128-bit integer vector operand +/// by the specified number of bits. Low-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSLLW / PSLLW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to left-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the left-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a, + int __count) { + return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count); +} + +/// Left-shifts each 16-bit value in the 128-bit integer vector operand +/// by the specified number of bits. Low-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSLLW / PSLLW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to left-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the left-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a, + __m128i __count) { + return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count); +} + +/// Left-shifts each 32-bit value in the 128-bit integer vector operand +/// by the specified number of bits. Low-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSLLD / PSLLD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to left-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the left-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a, + int __count) { + return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count); +} + +/// Left-shifts each 32-bit value in the 128-bit integer vector operand +/// by the specified number of bits. Low-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSLLD / PSLLD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to left-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the left-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a, + __m128i __count) { + return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count); +} + +/// Left-shifts each 64-bit value in the 128-bit integer vector operand +/// by the specified number of bits. Low-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSLLQ / PSLLQ instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to left-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the left-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a, + int __count) { + return __builtin_ia32_psllqi128((__v2di)__a, __count); +} + +/// Left-shifts each 64-bit value in the 128-bit integer vector operand +/// by the specified number of bits. Low-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSLLQ / PSLLQ instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to left-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the left-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a, + __m128i __count) { + return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count); +} + +/// Right-shifts each 16-bit value in the 128-bit integer vector operand +/// by the specified number of bits. High-order bits are filled with the sign +/// bit of the initial value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRAW / PSRAW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to right-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a, + int __count) { + return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count); +} + +/// Right-shifts each 16-bit value in the 128-bit integer vector operand +/// by the specified number of bits. High-order bits are filled with the sign +/// bit of the initial value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRAW / PSRAW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to right-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a, + __m128i __count) { + return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count); +} + +/// Right-shifts each 32-bit value in the 128-bit integer vector operand +/// by the specified number of bits. High-order bits are filled with the sign +/// bit of the initial value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRAD / PSRAD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to right-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a, + int __count) { + return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count); +} + +/// Right-shifts each 32-bit value in the 128-bit integer vector operand +/// by the specified number of bits. High-order bits are filled with the sign +/// bit of the initial value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRAD / PSRAD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to right-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a, + __m128i __count) { + return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count); +} + +/// Right-shifts the 128-bit integer vector operand by the specified +/// number of bytes. High-order bits are cleared. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_srli_si128(__m128i a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPSRLDQ / PSRLDQ instruction. +/// +/// \param a +/// A 128-bit integer vector containing the source operand. +/// \param imm +/// An immediate value specifying the number of bytes to right-shift operand +/// \a a. +/// \returns A 128-bit integer vector containing the right-shifted value. +#define _mm_srli_si128(a, imm) \ + ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \ + (int)(imm))) + +#define _mm_bsrli_si128(a, imm) \ + ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \ + (int)(imm))) + +/// Right-shifts each of 16-bit values in the 128-bit integer vector +/// operand by the specified number of bits. High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRLW / PSRLW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to right-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a, + int __count) { + return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count); +} + +/// Right-shifts each of 16-bit values in the 128-bit integer vector +/// operand by the specified number of bits. High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRLW / PSRLW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to right-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a, + __m128i __count) { + return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count); +} + +/// Right-shifts each of 32-bit values in the 128-bit integer vector +/// operand by the specified number of bits. High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRLD / PSRLD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to right-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a, + int __count) { + return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count); +} + +/// Right-shifts each of 32-bit values in the 128-bit integer vector +/// operand by the specified number of bits. High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRLD / PSRLD instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to right-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a, + __m128i __count) { + return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count); +} + +/// Right-shifts each of 64-bit values in the 128-bit integer vector +/// operand by the specified number of bits. High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRLQ / PSRLQ instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// An integer value specifying the number of bits to right-shift each value +/// in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a, + int __count) { + return __builtin_ia32_psrlqi128((__v2di)__a, __count); +} + +/// Right-shifts each of 64-bit values in the 128-bit integer vector +/// operand by the specified number of bits. High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPSRLQ / PSRLQ instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the source operand. +/// \param __count +/// A 128-bit integer vector in which bits [63:0] specify the number of bits +/// to right-shift each value in operand \a __a. +/// \returns A 128-bit integer vector containing the right-shifted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a, + __m128i __count) { + return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count); +} + +/// Compares each of the corresponding 8-bit values of the 128-bit +/// integer vectors for equality. +/// +/// Each comparison returns 0x0 for false, 0xFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPEQB / PCMPEQB instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a, + __m128i __b) { + return (__m128i)((__v16qi)__a == (__v16qi)__b); +} + +/// Compares each of the corresponding 16-bit values of the 128-bit +/// integer vectors for equality. +/// +/// Each comparison returns 0x0 for false, 0xFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPEQW / PCMPEQW instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a, + __m128i __b) { + return (__m128i)((__v8hi)__a == (__v8hi)__b); +} + +/// Compares each of the corresponding 32-bit values of the 128-bit +/// integer vectors for equality. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPEQD / PCMPEQD instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a, + __m128i __b) { + return (__m128i)((__v4si)__a == (__v4si)__b); +} + +/// Compares each of the corresponding signed 8-bit values of the 128-bit +/// integer vectors to determine if the values in the first operand are +/// greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTB / PCMPGTB instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a, + __m128i __b) { + /* This function always performs a signed comparison, but __v16qi is a char + which may be signed or unsigned, so use __v16qs. */ + return (__m128i)((__v16qs)__a > (__v16qs)__b); +} + +/// Compares each of the corresponding signed 16-bit values of the +/// 128-bit integer vectors to determine if the values in the first operand +/// are greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTW / PCMPGTW instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a, + __m128i __b) { + return (__m128i)((__v8hi)__a > (__v8hi)__b); +} + +/// Compares each of the corresponding signed 32-bit values of the +/// 128-bit integer vectors to determine if the values in the first operand +/// are greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTD / PCMPGTD instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a, + __m128i __b) { + return (__m128i)((__v4si)__a > (__v4si)__b); +} + +/// Compares each of the corresponding signed 8-bit values of the 128-bit +/// integer vectors to determine if the values in the first operand are less +/// than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTB / PCMPGTB instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a, + __m128i __b) { + return _mm_cmpgt_epi8(__b, __a); +} + +/// Compares each of the corresponding signed 16-bit values of the +/// 128-bit integer vectors to determine if the values in the first operand +/// are less than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTW / PCMPGTW instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a, + __m128i __b) { + return _mm_cmpgt_epi16(__b, __a); +} + +/// Compares each of the corresponding signed 32-bit values of the +/// 128-bit integer vectors to determine if the values in the first operand +/// are less than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTD / PCMPGTD instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \param __b +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a, + __m128i __b) { + return _mm_cmpgt_epi32(__b, __a); +} + +#ifdef __x86_64__ +/// Converts a 64-bit signed integer value from the second operand into a +/// double-precision value and returns it in the lower element of a [2 x +/// double] vector; the upper element of the returned vector is copied from +/// the upper element of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSI2SD / CVTSI2SD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are +/// copied to the upper 64 bits of the destination. +/// \param __b +/// A 64-bit signed integer operand containing the value to be converted. +/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the +/// converted value of the second operand. The upper 64 bits are copied from +/// the upper 64 bits of the first operand. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi64_sd(__m128d __a, + long long __b) { + __a[0] = __b; + return __a; +} + +/// Converts the first (lower) element of a vector of [2 x double] into a +/// 64-bit signed integer value. +/// +/// If the converted value does not fit in a 64-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSD2SI / CVTSD2SI instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the +/// conversion. +/// \returns A 64-bit signed integer containing the converted value. +static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) { + return __builtin_ia32_cvtsd2si64((__v2df)__a); +} + +/// Converts the first (lower) element of a vector of [2 x double] into a +/// 64-bit signed truncated (rounded toward zero) integer value. +/// +/// If a converted value does not fit in a 64-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTSD2SI / CVTTSD2SI +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the +/// conversion. +/// \returns A 64-bit signed integer containing the converted value. +static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) { + return __builtin_ia32_cvttsd2si64((__v2df)__a); +} +#endif + +/// Converts a vector of [4 x i32] into a vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTDQ2PS / CVTDQ2PS instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \returns A 128-bit vector of [4 x float] containing the converted values. +static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepi32_ps(__m128i __a) { + return (__m128) __builtin_convertvector((__v4si)__a, __v4sf); +} + +/// Converts a vector of [4 x float] into a vector of [4 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPS2DQ / CVTPS2DQ instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit integer vector of [4 x i32] containing the converted +/// values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) { + return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a); +} + +/// Converts a vector of [4 x float] into four signed truncated (rounded toward +/// zero) 32-bit integers, returned in a vector of [4 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTPS2DQ / CVTTPS2DQ +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x i32] containing the converted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) { + return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a); +} + +/// Returns a vector of [4 x i32] where the lowest element is the input +/// operand and the remaining elements are zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVD / MOVD instruction. +/// +/// \param __a +/// A 32-bit signed integer operand. +/// \returns A 128-bit vector of [4 x i32]. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) { + return __extension__(__m128i)(__v4si){__a, 0, 0, 0}; +} + +/// Returns a vector of [2 x i64] where the lower element is the input +/// operand and the upper element is zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction +/// in 64-bit mode. +/// +/// \param __a +/// A 64-bit signed integer operand containing the value to be converted. +/// \returns A 128-bit vector of [2 x i64] containing the converted value. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) { + return __extension__(__m128i)(__v2di){__a, 0}; +} + +/// Moves the least significant 32 bits of a vector of [4 x i32] to a +/// 32-bit signed integer value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVD / MOVD instruction. +/// +/// \param __a +/// A vector of [4 x i32]. The least significant 32 bits are moved to the +/// destination. +/// \returns A 32-bit signed integer containing the moved value. +static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) { + __v4si __b = (__v4si)__a; + return __b[0]; +} + +/// Moves the least significant 64 bits of a vector of [2 x i64] to a +/// 64-bit signed integer value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction. +/// +/// \param __a +/// A vector of [2 x i64]. The least significant 64 bits are moved to the +/// destination. +/// \returns A 64-bit signed integer containing the moved value. +static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) { + return __a[0]; +} + +/// Moves packed integer values from an aligned 128-bit memory location +/// to elements in a 128-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDQA / MOVDQA instruction. +/// +/// \param __p +/// An aligned pointer to a memory location containing integer values. +/// \returns A 128-bit integer vector containing the moved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_load_si128(__m128i const *__p) { + return *__p; +} + +/// Moves packed integer values from an unaligned 128-bit memory location +/// to elements in a 128-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDQU / MOVDQU instruction. +/// +/// \param __p +/// A pointer to a memory location containing integer values. +/// \returns A 128-bit integer vector containing the moved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_loadu_si128(__m128i_u const *__p) { + struct __loadu_si128 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_si128 *)__p)->__v; +} + +/// Returns a vector of [2 x i64] where the lower element is taken from +/// the lower element of the operand, and the upper element is zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction. +/// +/// \param __p +/// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of +/// the destination. +/// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the +/// moved value. The higher order bits are cleared. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_loadl_epi64(__m128i_u const *__p) { + struct __mm_loadl_epi64_struct { + long long __u; + } __attribute__((__packed__, __may_alias__)); + return __extension__(__m128i){ + ((const struct __mm_loadl_epi64_struct *)__p)->__u, 0}; +} + +/// Generates a 128-bit vector of [4 x i32] with unspecified content. +/// This could be used as an argument to another intrinsic function where the +/// argument is required but the value is not actually used. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \returns A 128-bit vector of [4 x i32] with unspecified content. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void) { + return (__m128i)__builtin_ia32_undef128(); +} + +/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with +/// the specified 64-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __q1 +/// A 64-bit integer value used to initialize the upper 64 bits of the +/// destination vector of [2 x i64]. +/// \param __q0 +/// A 64-bit integer value used to initialize the lower 64 bits of the +/// destination vector of [2 x i64]. +/// \returns An initialized 128-bit vector of [2 x i64] containing the values +/// provided in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64x(long long __q1, + long long __q0) { + return __extension__(__m128i)(__v2di){__q0, __q1}; +} + +/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with +/// the specified 64-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __q1 +/// A 64-bit integer value used to initialize the upper 64 bits of the +/// destination vector of [2 x i64]. +/// \param __q0 +/// A 64-bit integer value used to initialize the lower 64 bits of the +/// destination vector of [2 x i64]. +/// \returns An initialized 128-bit vector of [2 x i64] containing the values +/// provided in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64(__m64 __q1, + __m64 __q0) { + return _mm_set_epi64x((long long)__q1, (long long)__q0); +} + +/// Initializes the 32-bit values in a 128-bit vector of [4 x i32] with +/// the specified 32-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i3 +/// A 32-bit integer value used to initialize bits [127:96] of the +/// destination vector. +/// \param __i2 +/// A 32-bit integer value used to initialize bits [95:64] of the destination +/// vector. +/// \param __i1 +/// A 32-bit integer value used to initialize bits [63:32] of the destination +/// vector. +/// \param __i0 +/// A 32-bit integer value used to initialize bits [31:0] of the destination +/// vector. +/// \returns An initialized 128-bit vector of [4 x i32] containing the values +/// provided in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi32(int __i3, int __i2, + int __i1, int __i0) { + return __extension__(__m128i)(__v4si){__i0, __i1, __i2, __i3}; +} + +/// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with +/// the specified 16-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w7 +/// A 16-bit integer value used to initialize bits [127:112] of the +/// destination vector. +/// \param __w6 +/// A 16-bit integer value used to initialize bits [111:96] of the +/// destination vector. +/// \param __w5 +/// A 16-bit integer value used to initialize bits [95:80] of the destination +/// vector. +/// \param __w4 +/// A 16-bit integer value used to initialize bits [79:64] of the destination +/// vector. +/// \param __w3 +/// A 16-bit integer value used to initialize bits [63:48] of the destination +/// vector. +/// \param __w2 +/// A 16-bit integer value used to initialize bits [47:32] of the destination +/// vector. +/// \param __w1 +/// A 16-bit integer value used to initialize bits [31:16] of the destination +/// vector. +/// \param __w0 +/// A 16-bit integer value used to initialize bits [15:0] of the destination +/// vector. +/// \returns An initialized 128-bit vector of [8 x i16] containing the values +/// provided in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, + short __w2, short __w1, short __w0) { + return __extension__(__m128i)(__v8hi){__w0, __w1, __w2, __w3, + __w4, __w5, __w6, __w7}; +} + +/// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with +/// the specified 8-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b15 +/// Initializes bits [127:120] of the destination vector. +/// \param __b14 +/// Initializes bits [119:112] of the destination vector. +/// \param __b13 +/// Initializes bits [111:104] of the destination vector. +/// \param __b12 +/// Initializes bits [103:96] of the destination vector. +/// \param __b11 +/// Initializes bits [95:88] of the destination vector. +/// \param __b10 +/// Initializes bits [87:80] of the destination vector. +/// \param __b9 +/// Initializes bits [79:72] of the destination vector. +/// \param __b8 +/// Initializes bits [71:64] of the destination vector. +/// \param __b7 +/// Initializes bits [63:56] of the destination vector. +/// \param __b6 +/// Initializes bits [55:48] of the destination vector. +/// \param __b5 +/// Initializes bits [47:40] of the destination vector. +/// \param __b4 +/// Initializes bits [39:32] of the destination vector. +/// \param __b3 +/// Initializes bits [31:24] of the destination vector. +/// \param __b2 +/// Initializes bits [23:16] of the destination vector. +/// \param __b1 +/// Initializes bits [15:8] of the destination vector. +/// \param __b0 +/// Initializes bits [7:0] of the destination vector. +/// \returns An initialized 128-bit vector of [16 x i8] containing the values +/// provided in the operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, + char __b10, char __b9, char __b8, char __b7, char __b6, char __b5, + char __b4, char __b3, char __b2, char __b1, char __b0) { + return __extension__(__m128i)(__v16qi){ + __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, + __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15}; +} + +/// Initializes both values in a 128-bit integer vector with the +/// specified 64-bit integer value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __q +/// Integer value used to initialize the elements of the destination integer +/// vector. +/// \returns An initialized 128-bit integer vector of [2 x i64] with both +/// elements containing the value provided in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64x(long long __q) { + return _mm_set_epi64x(__q, __q); +} + +/// Initializes both values in a 128-bit vector of [2 x i64] with the +/// specified 64-bit value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __q +/// A 64-bit value used to initialize the elements of the destination integer +/// vector. +/// \returns An initialized 128-bit vector of [2 x i64] with all elements +/// containing the value provided in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64(__m64 __q) { + return _mm_set_epi64(__q, __q); +} + +/// Initializes all values in a 128-bit vector of [4 x i32] with the +/// specified 32-bit value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i +/// A 32-bit value used to initialize the elements of the destination integer +/// vector. +/// \returns An initialized 128-bit vector of [4 x i32] with all elements +/// containing the value provided in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi32(int __i) { + return _mm_set_epi32(__i, __i, __i, __i); +} + +/// Initializes all values in a 128-bit vector of [8 x i16] with the +/// specified 16-bit value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w +/// A 16-bit value used to initialize the elements of the destination integer +/// vector. +/// \returns An initialized 128-bit vector of [8 x i16] with all elements +/// containing the value provided in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi16(short __w) { + return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w); +} + +/// Initializes all values in a 128-bit vector of [16 x i8] with the +/// specified 8-bit value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b +/// An 8-bit value used to initialize the elements of the destination integer +/// vector. +/// \returns An initialized 128-bit vector of [16 x i8] with all elements +/// containing the value provided in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi8(char __b) { + return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, + __b, __b, __b, __b, __b); +} + +/// Constructs a 128-bit integer vector, initialized in reverse order +/// with the specified 64-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic does not correspond to a specific instruction. +/// +/// \param __q0 +/// A 64-bit integral value used to initialize the lower 64 bits of the +/// result. +/// \param __q1 +/// A 64-bit integral value used to initialize the upper 64 bits of the +/// result. +/// \returns An initialized 128-bit integer vector. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi64(__m64 __q0, + __m64 __q1) { + return _mm_set_epi64(__q1, __q0); +} + +/// Constructs a 128-bit integer vector, initialized in reverse order +/// with the specified 32-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i0 +/// A 32-bit integral value used to initialize bits [31:0] of the result. +/// \param __i1 +/// A 32-bit integral value used to initialize bits [63:32] of the result. +/// \param __i2 +/// A 32-bit integral value used to initialize bits [95:64] of the result. +/// \param __i3 +/// A 32-bit integral value used to initialize bits [127:96] of the result. +/// \returns An initialized 128-bit integer vector. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi32(int __i0, int __i1, + int __i2, + int __i3) { + return _mm_set_epi32(__i3, __i2, __i1, __i0); +} + +/// Constructs a 128-bit integer vector, initialized in reverse order +/// with the specified 16-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w0 +/// A 16-bit integral value used to initialize bits [15:0] of the result. +/// \param __w1 +/// A 16-bit integral value used to initialize bits [31:16] of the result. +/// \param __w2 +/// A 16-bit integral value used to initialize bits [47:32] of the result. +/// \param __w3 +/// A 16-bit integral value used to initialize bits [63:48] of the result. +/// \param __w4 +/// A 16-bit integral value used to initialize bits [79:64] of the result. +/// \param __w5 +/// A 16-bit integral value used to initialize bits [95:80] of the result. +/// \param __w6 +/// A 16-bit integral value used to initialize bits [111:96] of the result. +/// \param __w7 +/// A 16-bit integral value used to initialize bits [127:112] of the result. +/// \returns An initialized 128-bit integer vector. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, + short __w5, short __w6, short __w7) { + return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0); +} + +/// Constructs a 128-bit integer vector, initialized in reverse order +/// with the specified 8-bit integral values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b0 +/// An 8-bit integral value used to initialize bits [7:0] of the result. +/// \param __b1 +/// An 8-bit integral value used to initialize bits [15:8] of the result. +/// \param __b2 +/// An 8-bit integral value used to initialize bits [23:16] of the result. +/// \param __b3 +/// An 8-bit integral value used to initialize bits [31:24] of the result. +/// \param __b4 +/// An 8-bit integral value used to initialize bits [39:32] of the result. +/// \param __b5 +/// An 8-bit integral value used to initialize bits [47:40] of the result. +/// \param __b6 +/// An 8-bit integral value used to initialize bits [55:48] of the result. +/// \param __b7 +/// An 8-bit integral value used to initialize bits [63:56] of the result. +/// \param __b8 +/// An 8-bit integral value used to initialize bits [71:64] of the result. +/// \param __b9 +/// An 8-bit integral value used to initialize bits [79:72] of the result. +/// \param __b10 +/// An 8-bit integral value used to initialize bits [87:80] of the result. +/// \param __b11 +/// An 8-bit integral value used to initialize bits [95:88] of the result. +/// \param __b12 +/// An 8-bit integral value used to initialize bits [103:96] of the result. +/// \param __b13 +/// An 8-bit integral value used to initialize bits [111:104] of the result. +/// \param __b14 +/// An 8-bit integral value used to initialize bits [119:112] of the result. +/// \param __b15 +/// An 8-bit integral value used to initialize bits [127:120] of the result. +/// \returns An initialized 128-bit integer vector. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, + char __b6, char __b7, char __b8, char __b9, char __b10, + char __b11, char __b12, char __b13, char __b14, char __b15) { + return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8, + __b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0); +} + +/// Creates a 128-bit integer vector initialized to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS / XORPS instruction. +/// +/// \returns An initialized 128-bit integer vector with all elements set to +/// zero. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setzero_si128(void) { + return __extension__(__m128i)(__v2di){0LL, 0LL}; +} + +/// Stores a 128-bit integer vector to a memory location aligned on a +/// 128-bit boundary. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS / MOVAPS instruction. +/// +/// \param __p +/// A pointer to an aligned memory location that will receive the integer +/// values. +/// \param __b +/// A 128-bit integer vector containing the values to be moved. +static __inline__ void __DEFAULT_FN_ATTRS _mm_store_si128(__m128i *__p, + __m128i __b) { + *__p = __b; +} + +/// Stores a 128-bit integer vector to an unaligned memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPS / MOVUPS instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the integer values. +/// \param __b +/// A 128-bit integer vector containing the values to be moved. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si128(__m128i_u *__p, + __m128i __b) { + struct __storeu_si128 { + __m128i_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_si128 *)__p)->__v = __b; +} + +/// Stores a 64-bit integer value from the low element of a 128-bit integer +/// vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction. +/// +/// \param __p +/// A pointer to a 64-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \param __b +/// A 128-bit integer vector containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si64(void *__p, + __m128i __b) { + struct __storeu_si64 { + long long __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_si64 *)__p)->__v = ((__v2di)__b)[0]; +} + +/// Stores a 32-bit integer value from the low element of a 128-bit integer +/// vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVD / MOVD instruction. +/// +/// \param __p +/// A pointer to a 32-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \param __b +/// A 128-bit integer vector containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si32(void *__p, + __m128i __b) { + struct __storeu_si32 { + int __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_si32 *)__p)->__v = ((__v4si)__b)[0]; +} + +/// Stores a 16-bit integer value from the low element of a 128-bit integer +/// vector. +/// +/// \headerfile +/// +/// This intrinsic does not correspond to a specific instruction. +/// +/// \param __p +/// A pointer to a 16-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \param __b +/// A 128-bit integer vector containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si16(void *__p, + __m128i __b) { + struct __storeu_si16 { + short __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_si16 *)__p)->__v = ((__v8hi)__b)[0]; +} + +/// Moves bytes selected by the mask from the first operand to the +/// specified unaligned memory location. When a mask bit is 1, the +/// corresponding byte is written, otherwise it is not written. +/// +/// To minimize caching, the data is flagged as non-temporal (unlikely to be +/// used again soon). Exception and trap behavior for elements not selected +/// for storage to memory are implementation dependent. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMASKMOVDQU / MASKMOVDQU +/// instruction. +/// +/// \param __d +/// A 128-bit integer vector containing the values to be moved. +/// \param __n +/// A 128-bit integer vector containing the mask. The most significant bit of +/// each byte represents the mask bits. +/// \param __p +/// A pointer to an unaligned 128-bit memory location where the specified +/// values are moved. +static __inline__ void __DEFAULT_FN_ATTRS _mm_maskmoveu_si128(__m128i __d, + __m128i __n, + char *__p) { + __builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p); +} + +/// Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to +/// a memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVLPS / MOVLPS instruction. +/// +/// \param __p +/// A pointer to a 64-bit memory location that will receive the lower 64 bits +/// of the integer vector parameter. +/// \param __a +/// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the +/// value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_epi64(__m128i_u *__p, + __m128i __a) { + struct __mm_storel_epi64_struct { + long long __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_storel_epi64_struct *)__p)->__u = __a[0]; +} + +/// Stores a 128-bit floating point vector of [2 x double] to a 128-bit +/// aligned memory location. +/// +/// To minimize caching, the data is flagged as non-temporal (unlikely to be +/// used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTPS / MOVNTPS instruction. +/// +/// \param __p +/// A pointer to the 128-bit aligned memory location used to store the value. +/// \param __a +/// A vector of [2 x double] containing the 64-bit values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_pd(void *__p, + __m128d __a) { + __builtin_nontemporal_store((__v2df)__a, (__v2df *)__p); +} + +/// Stores a 128-bit integer vector to a 128-bit aligned memory location. +/// +/// To minimize caching, the data is flagged as non-temporal (unlikely to be +/// used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTPS / MOVNTPS instruction. +/// +/// \param __p +/// A pointer to the 128-bit aligned memory location used to store the value. +/// \param __a +/// A 128-bit integer vector containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_si128(void *__p, + __m128i __a) { + __builtin_nontemporal_store((__v2di)__a, (__v2di *)__p); +} + +/// Stores a 32-bit integer value in the specified memory location. +/// +/// To minimize caching, the data is flagged as non-temporal (unlikely to be +/// used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVNTI instruction. +/// +/// \param __p +/// A pointer to the 32-bit memory location used to store the value. +/// \param __a +/// A 32-bit integer containing the value to be stored. +static __inline__ void + __attribute__((__always_inline__, __nodebug__, __target__("sse2"))) + _mm_stream_si32(void *__p, int __a) { + __builtin_ia32_movnti((int *)__p, __a); +} + +#ifdef __x86_64__ +/// Stores a 64-bit integer value in the specified memory location. +/// +/// To minimize caching, the data is flagged as non-temporal (unlikely to be +/// used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVNTIQ instruction. +/// +/// \param __p +/// A pointer to the 64-bit memory location used to store the value. +/// \param __a +/// A 64-bit integer containing the value to be stored. +static __inline__ void + __attribute__((__always_inline__, __nodebug__, __target__("sse2"))) + _mm_stream_si64(void *__p, long long __a) { + __builtin_ia32_movnti64((long long *)__p, __a); +} +#endif + +#if defined(__cplusplus) +extern "C" { +#endif + +/// The cache line containing \a __p is flushed and invalidated from all +/// caches in the coherency domain. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CLFLUSH instruction. +/// +/// \param __p +/// A pointer to the memory location used to identify the cache line to be +/// flushed. +void _mm_clflush(void const *__p); + +/// Forces strong memory ordering (serialization) between load +/// instructions preceding this instruction and load instructions following +/// this instruction, ensuring the system completes all previous loads before +/// executing subsequent loads. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LFENCE instruction. +/// +void _mm_lfence(void); + +/// Forces strong memory ordering (serialization) between load and store +/// instructions preceding this instruction and load and store instructions +/// following this instruction, ensuring that the system completes all +/// previous memory accesses before executing subsequent memory accesses. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MFENCE instruction. +/// +void _mm_mfence(void); + +#if defined(__cplusplus) +} // extern "C" +#endif + +/// Converts, with saturation, 16-bit signed integers from both 128-bit integer +/// vector operands into 8-bit signed integers, and packs the results into +/// the destination. +/// +/// Positive values greater than 0x7F are saturated to 0x7F. Negative values +/// less than 0x80 are saturated to 0x80. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPACKSSWB / PACKSSWB instruction. +/// +/// \param __a +/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are +/// written to the lower 64 bits of the result. +/// \param __b +/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are +/// written to the higher 64 bits of the result. +/// \returns A 128-bit vector of [16 x i8] containing the converted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b); +} + +/// Converts, with saturation, 32-bit signed integers from both 128-bit integer +/// vector operands into 16-bit signed integers, and packs the results into +/// the destination. +/// +/// Positive values greater than 0x7FFF are saturated to 0x7FFF. Negative +/// values less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPACKSSDW / PACKSSDW instruction. +/// +/// \param __a +/// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values +/// are written to the lower 64 bits of the result. +/// \param __b +/// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values +/// are written to the higher 64 bits of the result. +/// \returns A 128-bit vector of [8 x i16] containing the converted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b); +} + +/// Converts, with saturation, 16-bit signed integers from both 128-bit integer +/// vector operands into 8-bit unsigned integers, and packs the results into +/// the destination. +/// +/// Values greater than 0xFF are saturated to 0xFF. Values less than 0x00 +/// are saturated to 0x00. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPACKUSWB / PACKUSWB instruction. +/// +/// \param __a +/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are +/// written to the lower 64 bits of the result. +/// \param __b +/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are +/// written to the higher 64 bits of the result. +/// \returns A 128-bit vector of [16 x i8] containing the converted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b); +} + +/// Extracts 16 bits from a 128-bit integer vector of [8 x i16], using +/// the immediate-value parameter as a selector. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_extract_epi16(__m128i a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPEXTRW / PEXTRW instruction. +/// +/// \param a +/// A 128-bit integer vector. +/// \param imm +/// An immediate value. Bits [2:0] selects values from \a a to be assigned +/// to bits[15:0] of the result. \n +/// 000: assign values from bits [15:0] of \a a. \n +/// 001: assign values from bits [31:16] of \a a. \n +/// 010: assign values from bits [47:32] of \a a. \n +/// 011: assign values from bits [63:48] of \a a. \n +/// 100: assign values from bits [79:64] of \a a. \n +/// 101: assign values from bits [95:80] of \a a. \n +/// 110: assign values from bits [111:96] of \a a. \n +/// 111: assign values from bits [127:112] of \a a. +/// \returns An integer, whose lower 16 bits are selected from the 128-bit +/// integer vector parameter and the remaining bits are assigned zeros. +#define _mm_extract_epi16(a, imm) \ + ((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \ + (int)(imm))) + +/// Constructs a 128-bit integer vector by first making a copy of the +/// 128-bit integer vector parameter, and then inserting the lower 16 bits +/// of an integer parameter into an offset specified by the immediate-value +/// parameter. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_insert_epi16(__m128i a, int b, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPINSRW / PINSRW instruction. +/// +/// \param a +/// A 128-bit integer vector of [8 x i16]. This vector is copied to the +/// result and then one of the eight elements in the result is replaced by +/// the lower 16 bits of \a b. +/// \param b +/// An integer. The lower 16 bits of this parameter are written to the +/// result beginning at an offset specified by \a imm. +/// \param imm +/// An immediate value specifying the bit offset in the result at which the +/// lower 16 bits of \a b are written. +/// \returns A 128-bit integer vector containing the constructed values. +#define _mm_insert_epi16(a, b, imm) \ + ((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \ + (int)(imm))) + +/// Copies the values of the most significant bits from each 8-bit +/// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask +/// value, zero-extends the value, and writes it to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVMSKB / PMOVMSKB instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the values with bits to be extracted. +/// \returns The most significant bits from each 8-bit element in \a __a, +/// written to bits [15:0]. The other bits are assigned zeros. +static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) { + return __builtin_ia32_pmovmskb128((__v16qi)__a); +} + +/// Constructs a 128-bit integer vector by shuffling four 32-bit +/// elements of a 128-bit integer vector parameter, using the immediate-value +/// parameter as a specifier. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_shuffle_epi32(__m128i a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPSHUFD / PSHUFD instruction. +/// +/// \param a +/// A 128-bit integer vector containing the values to be copied. +/// \param imm +/// An immediate value containing an 8-bit value specifying which elements to +/// copy from a. The destinations within the 128-bit destination are assigned +/// values as follows: \n +/// Bits [1:0] are used to assign values to bits [31:0] of the result. \n +/// Bits [3:2] are used to assign values to bits [63:32] of the result. \n +/// Bits [5:4] are used to assign values to bits [95:64] of the result. \n +/// Bits [7:6] are used to assign values to bits [127:96] of the result. \n +/// Bit value assignments: \n +/// 00: assign values from bits [31:0] of \a a. \n +/// 01: assign values from bits [63:32] of \a a. \n +/// 10: assign values from bits [95:64] of \a a. \n +/// 11: assign values from bits [127:96] of \a a. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro. +/// _MM_SHUFFLE(b6, b4, b2, b0) can create an 8-bit mask of the form +/// [b6, b4, b2, b0]. +/// \returns A 128-bit integer vector containing the shuffled values. +#define _mm_shuffle_epi32(a, imm) \ + ((__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm))) + +/// Constructs a 128-bit integer vector by shuffling four lower 16-bit +/// elements of a 128-bit integer vector of [8 x i16], using the immediate +/// value parameter as a specifier. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_shufflelo_epi16(__m128i a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPSHUFLW / PSHUFLW instruction. +/// +/// \param a +/// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits +/// [127:64] of the result. +/// \param imm +/// An 8-bit immediate value specifying which elements to copy from \a a. \n +/// Bits[1:0] are used to assign values to bits [15:0] of the result. \n +/// Bits[3:2] are used to assign values to bits [31:16] of the result. \n +/// Bits[5:4] are used to assign values to bits [47:32] of the result. \n +/// Bits[7:6] are used to assign values to bits [63:48] of the result. \n +/// Bit value assignments: \n +/// 00: assign values from bits [15:0] of \a a. \n +/// 01: assign values from bits [31:16] of \a a. \n +/// 10: assign values from bits [47:32] of \a a. \n +/// 11: assign values from bits [63:48] of \a a. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro. +/// _MM_SHUFFLE(b6, b4, b2, b0) can create an 8-bit mask of the form +/// [b6, b4, b2, b0]. +/// \returns A 128-bit integer vector containing the shuffled values. +#define _mm_shufflelo_epi16(a, imm) \ + ((__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm))) + +/// Constructs a 128-bit integer vector by shuffling four upper 16-bit +/// elements of a 128-bit integer vector of [8 x i16], using the immediate +/// value parameter as a specifier. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_shufflehi_epi16(__m128i a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VPSHUFHW / PSHUFHW instruction. +/// +/// \param a +/// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits +/// [63:0] of the result. +/// \param imm +/// An 8-bit immediate value specifying which elements to copy from \a a. \n +/// Bits[1:0] are used to assign values to bits [79:64] of the result. \n +/// Bits[3:2] are used to assign values to bits [95:80] of the result. \n +/// Bits[5:4] are used to assign values to bits [111:96] of the result. \n +/// Bits[7:6] are used to assign values to bits [127:112] of the result. \n +/// Bit value assignments: \n +/// 00: assign values from bits [79:64] of \a a. \n +/// 01: assign values from bits [95:80] of \a a. \n +/// 10: assign values from bits [111:96] of \a a. \n +/// 11: assign values from bits [127:112] of \a a. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro. +/// _MM_SHUFFLE(b6, b4, b2, b0) can create an 8-bit mask of the form +/// [b6, b4, b2, b0]. +/// \returns A 128-bit integer vector containing the shuffled values. +#define _mm_shufflehi_epi16(a, imm) \ + ((__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm))) + +/// Unpacks the high-order (index 8-15) values from two 128-bit vectors +/// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKHBW / PUNPCKHBW +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [16 x i8]. +/// Bits [71:64] are written to bits [7:0] of the result. \n +/// Bits [79:72] are written to bits [23:16] of the result. \n +/// Bits [87:80] are written to bits [39:32] of the result. \n +/// Bits [95:88] are written to bits [55:48] of the result. \n +/// Bits [103:96] are written to bits [71:64] of the result. \n +/// Bits [111:104] are written to bits [87:80] of the result. \n +/// Bits [119:112] are written to bits [103:96] of the result. \n +/// Bits [127:120] are written to bits [119:112] of the result. +/// \param __b +/// A 128-bit vector of [16 x i8]. \n +/// Bits [71:64] are written to bits [15:8] of the result. \n +/// Bits [79:72] are written to bits [31:24] of the result. \n +/// Bits [87:80] are written to bits [47:40] of the result. \n +/// Bits [95:88] are written to bits [63:56] of the result. \n +/// Bits [103:96] are written to bits [79:72] of the result. \n +/// Bits [111:104] are written to bits [95:88] of the result. \n +/// Bits [119:112] are written to bits [111:104] of the result. \n +/// Bits [127:120] are written to bits [127:120] of the result. +/// \returns A 128-bit vector of [16 x i8] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector( + (__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11, + 16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15); +} + +/// Unpacks the high-order (index 4-7) values from two 128-bit vectors of +/// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKHWD / PUNPCKHWD +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16]. +/// Bits [79:64] are written to bits [15:0] of the result. \n +/// Bits [95:80] are written to bits [47:32] of the result. \n +/// Bits [111:96] are written to bits [79:64] of the result. \n +/// Bits [127:112] are written to bits [111:96] of the result. +/// \param __b +/// A 128-bit vector of [8 x i16]. +/// Bits [79:64] are written to bits [31:16] of the result. \n +/// Bits [95:80] are written to bits [63:48] of the result. \n +/// Bits [111:96] are written to bits [95:80] of the result. \n +/// Bits [127:112] are written to bits [127:112] of the result. +/// \returns A 128-bit vector of [8 x i16] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5, + 8 + 5, 6, 8 + 6, 7, 8 + 7); +} + +/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of +/// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKHDQ / PUNPCKHDQ +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32]. \n +/// Bits [95:64] are written to bits [31:0] of the destination. \n +/// Bits [127:96] are written to bits [95:64] of the destination. +/// \param __b +/// A 128-bit vector of [4 x i32]. \n +/// Bits [95:64] are written to bits [64:32] of the destination. \n +/// Bits [127:96] are written to bits [127:96] of the destination. +/// \returns A 128-bit vector of [4 x i32] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3, + 4 + 3); +} + +/// Unpacks the high-order 64-bit elements from two 128-bit vectors of +/// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKHQDQ / PUNPCKHQDQ +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x i64]. \n +/// Bits [127:64] are written to bits [63:0] of the destination. +/// \param __b +/// A 128-bit vector of [2 x i64]. \n +/// Bits [127:64] are written to bits [127:64] of the destination. +/// \returns A 128-bit vector of [2 x i64] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1); +} + +/// Unpacks the low-order (index 0-7) values from two 128-bit vectors of +/// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKLBW / PUNPCKLBW +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [16 x i8]. \n +/// Bits [7:0] are written to bits [7:0] of the result. \n +/// Bits [15:8] are written to bits [23:16] of the result. \n +/// Bits [23:16] are written to bits [39:32] of the result. \n +/// Bits [31:24] are written to bits [55:48] of the result. \n +/// Bits [39:32] are written to bits [71:64] of the result. \n +/// Bits [47:40] are written to bits [87:80] of the result. \n +/// Bits [55:48] are written to bits [103:96] of the result. \n +/// Bits [63:56] are written to bits [119:112] of the result. +/// \param __b +/// A 128-bit vector of [16 x i8]. +/// Bits [7:0] are written to bits [15:8] of the result. \n +/// Bits [15:8] are written to bits [31:24] of the result. \n +/// Bits [23:16] are written to bits [47:40] of the result. \n +/// Bits [31:24] are written to bits [63:56] of the result. \n +/// Bits [39:32] are written to bits [79:72] of the result. \n +/// Bits [47:40] are written to bits [95:88] of the result. \n +/// Bits [55:48] are written to bits [111:104] of the result. \n +/// Bits [63:56] are written to bits [127:120] of the result. +/// \returns A 128-bit vector of [16 x i8] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector( + (__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4, + 16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7); +} + +/// Unpacks the low-order (index 0-3) values from each of the two 128-bit +/// vectors of [8 x i16] and interleaves them into a 128-bit vector of +/// [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKLWD / PUNPCKLWD +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16]. +/// Bits [15:0] are written to bits [15:0] of the result. \n +/// Bits [31:16] are written to bits [47:32] of the result. \n +/// Bits [47:32] are written to bits [79:64] of the result. \n +/// Bits [63:48] are written to bits [111:96] of the result. +/// \param __b +/// A 128-bit vector of [8 x i16]. +/// Bits [15:0] are written to bits [31:16] of the result. \n +/// Bits [31:16] are written to bits [63:48] of the result. \n +/// Bits [47:32] are written to bits [95:80] of the result. \n +/// Bits [63:48] are written to bits [127:112] of the result. +/// \returns A 128-bit vector of [8 x i16] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1, + 8 + 1, 2, 8 + 2, 3, 8 + 3); +} + +/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of +/// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKLDQ / PUNPCKLDQ +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32]. \n +/// Bits [31:0] are written to bits [31:0] of the destination. \n +/// Bits [63:32] are written to bits [95:64] of the destination. +/// \param __b +/// A 128-bit vector of [4 x i32]. \n +/// Bits [31:0] are written to bits [64:32] of the destination. \n +/// Bits [63:32] are written to bits [127:96] of the destination. +/// \returns A 128-bit vector of [4 x i32] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1, + 4 + 1); +} + +/// Unpacks the low-order 64-bit elements from two 128-bit vectors of +/// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPUNPCKLQDQ / PUNPCKLQDQ +/// instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x i64]. \n +/// Bits [63:0] are written to bits [63:0] of the destination. \n +/// \param __b +/// A 128-bit vector of [2 x i64]. \n +/// Bits [63:0] are written to bits [127:64] of the destination. \n +/// \returns A 128-bit vector of [2 x i64] containing the interleaved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a, + __m128i __b) { + return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0); +} + +/// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit +/// integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVDQ2Q instruction. +/// +/// \param __a +/// A 128-bit integer vector operand. The lower 64 bits are moved to the +/// destination. +/// \returns A 64-bit integer containing the lower 64 bits of the parameter. +static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_movepi64_pi64(__m128i __a) { + return (__m64)__a[0]; +} + +/// Moves the 64-bit operand to a 128-bit integer vector, zeroing the +/// upper bits. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVD+VMOVQ instruction. +/// +/// \param __a +/// A 64-bit value. +/// \returns A 128-bit integer vector. The lower 64 bits contain the value from +/// the operand. The upper 64 bits are assigned zeros. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movpi64_epi64(__m64 __a) { + return __extension__(__m128i)(__v2di){(long long)__a, 0}; +} + +/// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit +/// integer vector, zeroing the upper bits. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVQ / MOVQ instruction. +/// +/// \param __a +/// A 128-bit integer vector operand. The lower 64 bits are moved to the +/// destination. +/// \returns A 128-bit integer vector. The lower 64 bits contain the value from +/// the operand. The upper 64 bits are assigned zeros. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_move_epi64(__m128i __a) { + return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2); +} + +/// Unpacks the high-order 64-bit elements from two 128-bit vectors of +/// [2 x double] and interleaves them into a 128-bit vector of [2 x +/// double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKHPD / UNPCKHPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. \n +/// Bits [127:64] are written to bits [63:0] of the destination. +/// \param __b +/// A 128-bit vector of [2 x double]. \n +/// Bits [127:64] are written to bits [127:64] of the destination. +/// \returns A 128-bit vector of [2 x double] containing the interleaved values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpackhi_pd(__m128d __a, + __m128d __b) { + return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2 + 1); +} + +/// Unpacks the low-order 64-bit elements from two 128-bit vectors +/// of [2 x double] and interleaves them into a 128-bit vector of [2 x +/// double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD / UNPCKLPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. \n +/// Bits [63:0] are written to bits [63:0] of the destination. +/// \param __b +/// A 128-bit vector of [2 x double]. \n +/// Bits [63:0] are written to bits [127:64] of the destination. +/// \returns A 128-bit vector of [2 x double] containing the interleaved values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpacklo_pd(__m128d __a, + __m128d __b) { + return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2 + 0); +} + +/// Extracts the sign bits of the double-precision values in the 128-bit +/// vector of [2 x double], zero-extends the value, and writes it to the +/// low-order bits of the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVMSKPD / MOVMSKPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the values with sign bits to +/// be extracted. +/// \returns The sign bits from each of the double-precision elements in \a __a, +/// written to bits [1:0]. The remaining bits are assigned values of zero. +static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) { + return __builtin_ia32_movmskpd((__v2df)__a); +} + +/// Constructs a 128-bit floating-point vector of [2 x double] from two +/// 128-bit vector parameters of [2 x double], using the immediate-value +/// parameter as a specifier. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i); +/// \endcode +/// +/// This intrinsic corresponds to the VSHUFPD / SHUFPD instruction. +/// +/// \param a +/// A 128-bit vector of [2 x double]. +/// \param b +/// A 128-bit vector of [2 x double]. +/// \param i +/// An 8-bit immediate value. The least significant two bits specify which +/// elements to copy from \a a and \a b: \n +/// Bit[0] = 0: lower element of \a a copied to lower element of result. \n +/// Bit[0] = 1: upper element of \a a copied to lower element of result. \n +/// Bit[1] = 0: lower element of \a b copied to upper element of result. \n +/// Bit[1] = 1: upper element of \a b copied to upper element of result. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE2 macro. +/// _MM_SHUFFLE2(b1, b0) can create a 2-bit mask of the form +/// [b1, b0]. +/// \returns A 128-bit vector of [2 x double] containing the shuffled values. +#define _mm_shuffle_pd(a, b, i) \ + ((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \ + (int)(i))) + +/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit +/// floating-point vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [2 x double]. +/// \returns A 128-bit floating-point vector of [4 x float] containing the same +/// bitwise pattern as the parameter. +static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castpd_ps(__m128d __a) { + return (__m128)__a; +} + +/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit +/// integer vector. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [2 x double]. +/// \returns A 128-bit integer vector containing the same bitwise pattern as the +/// parameter. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castpd_si128(__m128d __a) { + return (__m128i)__a; +} + +/// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit +/// floating-point vector of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. +/// \returns A 128-bit floating-point vector of [2 x double] containing the same +/// bitwise pattern as the parameter. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castps_pd(__m128 __a) { + return (__m128d)__a; +} + +/// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit +/// integer vector. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. +/// \returns A 128-bit integer vector containing the same bitwise pattern as the +/// parameter. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castps_si128(__m128 __a) { + return (__m128i)__a; +} + +/// Casts a 128-bit integer vector into a 128-bit floating-point vector +/// of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \returns A 128-bit floating-point vector of [4 x float] containing the same +/// bitwise pattern as the parameter. +static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castsi128_ps(__m128i __a) { + return (__m128)__a; +} + +/// Casts a 128-bit integer vector into a 128-bit floating-point vector +/// of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit integer vector. +/// \returns A 128-bit floating-point vector of [2 x double] containing the same +/// bitwise pattern as the parameter. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castsi128_pd(__m128i __a) { + return (__m128d)__a; +} + +/// Compares each of the corresponding double-precision values of two +/// 128-bit vectors of [2 x double], using the operation specified by the +/// immediate integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the (V)CMPPD instruction. +/// +/// \param a +/// A 128-bit vector of [2 x double]. +/// \param b +/// A 128-bit vector of [2 x double]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// \returns A 128-bit vector of [2 x double] containing the comparison results. +#define _mm_cmp_pd(a, b, c) \ + ((__m128d)__builtin_ia32_cmppd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \ + (c))) + +/// Compares each of the corresponding scalar double-precision values of +/// two 128-bit vectors of [2 x double], using the operation specified by the +/// immediate integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the (V)CMPSD instruction. +/// +/// \param a +/// A 128-bit vector of [2 x double]. +/// \param b +/// A 128-bit vector of [2 x double]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// \returns A 128-bit vector of [2 x double] containing the comparison results. +#define _mm_cmp_sd(a, b, c) \ + ((__m128d)__builtin_ia32_cmpsd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \ + (c))) + +#if defined(__cplusplus) +extern "C" { +#endif + +/// Indicates that a spin loop is being executed for the purposes of +/// optimizing power consumption during the loop. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PAUSE instruction. +/// +void _mm_pause(void); + +#if defined(__cplusplus) +} // extern "C" +#endif +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_MMX + +#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y)) + +#define _MM_DENORMALS_ZERO_ON (0x0040U) +#define _MM_DENORMALS_ZERO_OFF (0x0000U) + +#define _MM_DENORMALS_ZERO_MASK (0x0040U) + +#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK) +#define _MM_SET_DENORMALS_ZERO_MODE(x) \ + (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x))) + +#endif /* __EMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/enqcmdintrin.h b/llvm/lib/clang/19/include/enqcmdintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..30af67f6b4601b8b7034b95b4cd8c769f8e4daed --- /dev/null +++ b/llvm/lib/clang/19/include/enqcmdintrin.h @@ -0,0 +1,63 @@ +/*===------------------ enqcmdintrin.h - enqcmd intrinsics -----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __ENQCMDINTRIN_H +#define __ENQCMDINTRIN_H + +/* Define the default attributes for the functions in this file */ +#define _DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("enqcmd"))) + +/// Reads 64-byte command pointed by \a __src, formats 64-byte enqueue store +/// data, and performs 64-byte enqueue store to memory pointed by \a __dst. +/// This intrinsics may only be used in User mode. +/// +/// \headerfile +/// +/// This intrinsics corresponds to the ENQCMD instruction. +/// +/// \param __dst +/// Pointer to the destination of the enqueue store. +/// \param __src +/// Pointer to 64-byte command data. +/// \returns If the command data is successfully written to \a __dst then 0 is +/// returned. Otherwise 1 is returned. +static __inline__ int _DEFAULT_FN_ATTRS +_enqcmd (void *__dst, const void *__src) +{ + return __builtin_ia32_enqcmd(__dst, __src); +} + +/// Reads 64-byte command pointed by \a __src, formats 64-byte enqueue store +/// data, and performs 64-byte enqueue store to memory pointed by \a __dst +/// This intrinsic may only be used in Privileged mode. +/// +/// \headerfile +/// +/// This intrinsics corresponds to the ENQCMDS instruction. +/// +/// \param __dst +/// Pointer to the destination of the enqueue store. +/// \param __src +/// Pointer to 64-byte command data. +/// \returns If the command data is successfully written to \a __dst then 0 is +/// returned. Otherwise 1 is returned. +static __inline__ int _DEFAULT_FN_ATTRS +_enqcmds (void *__dst, const void *__src) +{ + return __builtin_ia32_enqcmds(__dst, __src); +} + +#undef _DEFAULT_FN_ATTRS + +#endif /* __ENQCMDINTRIN_H */ diff --git a/llvm/lib/clang/19/include/f16cintrin.h b/llvm/lib/clang/19/include/f16cintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..94a662c1d93a8683bafcafec19a28f8178af3de5 --- /dev/null +++ b/llvm/lib/clang/19/include/f16cintrin.h @@ -0,0 +1,162 @@ +/*===---- f16cintrin.h - F16C intrinsics -----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __F16CINTRIN_H +#define __F16CINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(256))) + +/* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h, + * but that's because icc can emulate these without f16c using a library call. + * Since we don't do that let's leave these in f16cintrin.h. + */ + +/// Converts a 16-bit half-precision float value into a 32-bit float +/// value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPH2PS instruction. +/// +/// \param __a +/// A 16-bit half-precision float value. +/// \returns The converted 32-bit float value. +static __inline float __DEFAULT_FN_ATTRS128 +_cvtsh_ss(unsigned short __a) +{ + __v8hi __v = {(short)__a, 0, 0, 0, 0, 0, 0, 0}; + __v4sf __r = __builtin_ia32_vcvtph2ps(__v); + return __r[0]; +} + +/// Converts a 32-bit single-precision float value to a 16-bit +/// half-precision float value. +/// +/// \headerfile +/// +/// \code +/// unsigned short _cvtss_sh(float a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VCVTPS2PH instruction. +/// +/// \param a +/// A 32-bit single-precision float value to be converted to a 16-bit +/// half-precision float value. +/// \param imm +/// An immediate value controlling rounding using bits [2:0]: \n +/// 000: Nearest \n +/// 001: Down \n +/// 010: Up \n +/// 011: Truncate \n +/// 1XX: Use MXCSR.RC for rounding +/// \returns The converted 16-bit half-precision float value. +#define _cvtss_sh(a, imm) __extension__ ({ \ + (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \ + (imm)))[0]); }) + +/// Converts a 128-bit vector containing 32-bit float values into a +/// 128-bit vector containing 16-bit half-precision float values. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_cvtps_ph(__m128 a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VCVTPS2PH instruction. +/// +/// \param a +/// A 128-bit vector containing 32-bit float values. +/// \param imm +/// An immediate value controlling rounding using bits [2:0]: \n +/// 000: Nearest \n +/// 001: Down \n +/// 010: Up \n +/// 011: Truncate \n +/// 1XX: Use MXCSR.RC for rounding +/// \returns A 128-bit vector containing converted 16-bit half-precision float +/// values. The lower 64 bits are used to store the converted 16-bit +/// half-precision floating-point values. +#define _mm_cvtps_ph(a, imm) \ + ((__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm))) + +/// Converts a 128-bit vector containing 16-bit half-precision float +/// values into a 128-bit vector containing 32-bit float values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPH2PS instruction. +/// +/// \param __a +/// A 128-bit vector containing 16-bit half-precision float values. The lower +/// 64 bits are used in the conversion. +/// \returns A 128-bit vector of [4 x float] containing converted float values. +static __inline __m128 __DEFAULT_FN_ATTRS128 +_mm_cvtph_ps(__m128i __a) +{ + return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a); +} + +/// Converts a 256-bit vector of [8 x float] into a 128-bit vector +/// containing 16-bit half-precision float values. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm256_cvtps_ph(__m256 a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the VCVTPS2PH instruction. +/// +/// \param a +/// A 256-bit vector containing 32-bit single-precision float values to be +/// converted to 16-bit half-precision float values. +/// \param imm +/// An immediate value controlling rounding using bits [2:0]: \n +/// 000: Nearest \n +/// 001: Down \n +/// 010: Up \n +/// 011: Truncate \n +/// 1XX: Use MXCSR.RC for rounding +/// \returns A 128-bit vector containing the converted 16-bit half-precision +/// float values. +#define _mm256_cvtps_ph(a, imm) \ + ((__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm))) + +/// Converts a 128-bit vector containing 16-bit half-precision float +/// values into a 256-bit vector of [8 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTPH2PS instruction. +/// +/// \param __a +/// A 128-bit vector containing 16-bit half-precision float values to be +/// converted to 32-bit single-precision float values. +/// \returns A vector of [8 x float] containing the converted 32-bit +/// single-precision float values. +static __inline __m256 __DEFAULT_FN_ATTRS256 +_mm256_cvtph_ps(__m128i __a) +{ + return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __F16CINTRIN_H */ diff --git a/llvm/lib/clang/19/include/float.h b/llvm/lib/clang/19/include/float.h new file mode 100644 index 0000000000000000000000000000000000000000..e5c439a9d47aeeace9a17639b454cd45e29beb54 --- /dev/null +++ b/llvm/lib/clang/19/include/float.h @@ -0,0 +1,196 @@ +/*===---- float.h - Characteristics of floating point types ----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_FLOAT_H +#define __CLANG_FLOAT_H + +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +/* If we're on MinGW, fall back to the system's float.h, which might have + * additional definitions provided for Windows. + * For more details see http://msdn.microsoft.com/en-us/library/y0ybw9fy.aspx + * + * Also fall back on Darwin and AIX to allow additional definitions and + * implementation-defined values. + */ +#if (defined(__APPLE__) || defined(__MINGW32__) || defined(_MSC_VER) || \ + defined(_AIX)) && \ + __STDC_HOSTED__ && __has_include_next() + +/* Prior to Apple's 10.7 SDK, float.h SDK header used to apply an extra level + * of #include_next to keep Metrowerks compilers happy. Avoid this + * extra indirection. + */ +#ifdef __APPLE__ +#define _FLOAT_H_ +#endif + +# include_next + +/* Undefine anything that we'll be redefining below. */ +# undef FLT_EVAL_METHOD +# undef FLT_ROUNDS +# undef FLT_RADIX +# undef FLT_MANT_DIG +# undef DBL_MANT_DIG +# undef LDBL_MANT_DIG +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ + !defined(__STRICT_ANSI__) || \ + (defined(__cplusplus) && __cplusplus >= 201103L) || \ + (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) +# undef DECIMAL_DIG +# endif +# undef FLT_DIG +# undef DBL_DIG +# undef LDBL_DIG +# undef FLT_MIN_EXP +# undef DBL_MIN_EXP +# undef LDBL_MIN_EXP +# undef FLT_MIN_10_EXP +# undef DBL_MIN_10_EXP +# undef LDBL_MIN_10_EXP +# undef FLT_MAX_EXP +# undef DBL_MAX_EXP +# undef LDBL_MAX_EXP +# undef FLT_MAX_10_EXP +# undef DBL_MAX_10_EXP +# undef LDBL_MAX_10_EXP +# undef FLT_MAX +# undef DBL_MAX +# undef LDBL_MAX +# undef FLT_EPSILON +# undef DBL_EPSILON +# undef LDBL_EPSILON +# undef FLT_MIN +# undef DBL_MIN +# undef LDBL_MIN +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ + !defined(__STRICT_ANSI__) || \ + (defined(__cplusplus) && __cplusplus >= 201703L) || \ + (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) +# undef FLT_TRUE_MIN +# undef DBL_TRUE_MIN +# undef LDBL_TRUE_MIN +# undef FLT_DECIMAL_DIG +# undef DBL_DECIMAL_DIG +# undef LDBL_DECIMAL_DIG +# undef FLT_HAS_SUBNORM +# undef DBL_HAS_SUBNORM +# undef LDBL_HAS_SUBNORM +# endif +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ + !defined(__STRICT_ANSI__) +# undef FLT_NORM_MAX +# undef DBL_NORM_MAX +# undef LDBL_NORM_MAX +#endif +#endif + +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ + !defined(__STRICT_ANSI__) +# undef INFINITY +# undef NAN +#endif + +/* Characteristics of floating point types, C99 5.2.4.2.2 */ + +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ + (defined(__cplusplus) && __cplusplus >= 201103L) +#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__ +#endif +#define FLT_ROUNDS (__builtin_flt_rounds()) +#define FLT_RADIX __FLT_RADIX__ + +#define FLT_MANT_DIG __FLT_MANT_DIG__ +#define DBL_MANT_DIG __DBL_MANT_DIG__ +#define LDBL_MANT_DIG __LDBL_MANT_DIG__ + +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ + !defined(__STRICT_ANSI__) || \ + (defined(__cplusplus) && __cplusplus >= 201103L) || \ + (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) +# define DECIMAL_DIG __DECIMAL_DIG__ +#endif + +#define FLT_DIG __FLT_DIG__ +#define DBL_DIG __DBL_DIG__ +#define LDBL_DIG __LDBL_DIG__ + +#define FLT_MIN_EXP __FLT_MIN_EXP__ +#define DBL_MIN_EXP __DBL_MIN_EXP__ +#define LDBL_MIN_EXP __LDBL_MIN_EXP__ + +#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__ +#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__ +#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ + +#define FLT_MAX_EXP __FLT_MAX_EXP__ +#define DBL_MAX_EXP __DBL_MAX_EXP__ +#define LDBL_MAX_EXP __LDBL_MAX_EXP__ + +#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__ +#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__ +#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ + +#define FLT_MAX __FLT_MAX__ +#define DBL_MAX __DBL_MAX__ +#define LDBL_MAX __LDBL_MAX__ + +#define FLT_EPSILON __FLT_EPSILON__ +#define DBL_EPSILON __DBL_EPSILON__ +#define LDBL_EPSILON __LDBL_EPSILON__ + +#define FLT_MIN __FLT_MIN__ +#define DBL_MIN __DBL_MIN__ +#define LDBL_MIN __LDBL_MIN__ + +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ + !defined(__STRICT_ANSI__) || \ + (defined(__cplusplus) && __cplusplus >= 201703L) || \ + (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) +# define FLT_TRUE_MIN __FLT_DENORM_MIN__ +# define DBL_TRUE_MIN __DBL_DENORM_MIN__ +# define LDBL_TRUE_MIN __LDBL_DENORM_MIN__ +# define FLT_DECIMAL_DIG __FLT_DECIMAL_DIG__ +# define DBL_DECIMAL_DIG __DBL_DECIMAL_DIG__ +# define LDBL_DECIMAL_DIG __LDBL_DECIMAL_DIG__ +# define FLT_HAS_SUBNORM __FLT_HAS_DENORM__ +# define DBL_HAS_SUBNORM __DBL_HAS_DENORM__ +# define LDBL_HAS_SUBNORM __LDBL_HAS_DENORM__ +#endif + +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ + !defined(__STRICT_ANSI__) + /* C23 5.2.5.3.3p29-30 */ +# define INFINITY (__builtin_inff()) +# define NAN (__builtin_nanf("")) + /* C23 5.2.5.3.3p32 */ +# define FLT_NORM_MAX __FLT_NORM_MAX__ +# define DBL_NORM_MAX __DBL_NORM_MAX__ +# define LDBL_NORM_MAX __LDBL_NORM_MAX__ +#endif + +#ifdef __STDC_WANT_IEC_60559_TYPES_EXT__ +# define FLT16_MANT_DIG __FLT16_MANT_DIG__ +# define FLT16_DECIMAL_DIG __FLT16_DECIMAL_DIG__ +# define FLT16_DIG __FLT16_DIG__ +# define FLT16_MIN_EXP __FLT16_MIN_EXP__ +# define FLT16_MIN_10_EXP __FLT16_MIN_10_EXP__ +# define FLT16_MAX_EXP __FLT16_MAX_EXP__ +# define FLT16_MAX_10_EXP __FLT16_MAX_10_EXP__ +# define FLT16_MAX __FLT16_MAX__ +# define FLT16_EPSILON __FLT16_EPSILON__ +# define FLT16_MIN __FLT16_MIN__ +# define FLT16_TRUE_MIN __FLT16_TRUE_MIN__ +#endif /* __STDC_WANT_IEC_60559_TYPES_EXT__ */ + +#endif /* __MVS__ */ +#endif /* __CLANG_FLOAT_H */ diff --git a/llvm/lib/clang/19/include/fma4intrin.h b/llvm/lib/clang/19/include/fma4intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..694801b3e8dd4bc0b8639ca0a75c13be19523f71 --- /dev/null +++ b/llvm/lib/clang/19/include/fma4intrin.h @@ -0,0 +1,218 @@ +/*===---- fma4intrin.h - FMA4 intrinsics -----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __FMA4INTRIN_H +#define __FMA4INTRIN_H + +#include + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(256))) + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_macc_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_macc_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_macc_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_msub_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_msub_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_msub_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_msub_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_maddsub_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_maddsub_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_msubadd_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_maddsub_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_maddsub_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_msubadd_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __FMA4INTRIN_H */ diff --git a/llvm/lib/clang/19/include/fmaintrin.h b/llvm/lib/clang/19/include/fmaintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..22d1a780bbfd4eb2885640eeffae74d21b7f2b76 --- /dev/null +++ b/llvm/lib/clang/19/include/fmaintrin.h @@ -0,0 +1,796 @@ +/*===---- fmaintrin.h - FMA intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __FMAINTRIN_H +#define __FMAINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(256))) + +/// Computes a multiply-add of 128-bit vectors of [4 x float]. +/// For each element, computes (__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADD213PS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier. +/// \param __C +/// A 128-bit vector of [4 x float] containing the addend. +/// \returns A 128-bit vector of [4 x float] containing the result. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +/// Computes a multiply-add of 128-bit vectors of [2 x double]. +/// For each element, computes (__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADD213PD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend. +/// \returns A 128-bit [2 x double] vector containing the result. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +/// Computes a scalar multiply-add of the single-precision values in the +/// low 32 bits of 128-bit vectors of [4 x float]. +/// +/// \code{.operation} +/// result[31:0] = (__A[31:0] * __B[31:0]) + __C[31:0] +/// result[127:32] = __A[127:32] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADD213SS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand in the low +/// 32 bits. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier in the low +/// 32 bits. +/// \param __C +/// A 128-bit vector of [4 x float] containing the addend in the low +/// 32 bits. +/// \returns A 128-bit vector of [4 x float] containing the result in the low +/// 32 bits and a copy of \a __A[127:32] in the upper 96 bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +/// Computes a scalar multiply-add of the double-precision values in the +/// low 64 bits of 128-bit vectors of [2 x double]. +/// +/// \code{.operation} +/// result[63:0] = (__A[63:0] * __B[63:0]) + __C[63:0] +/// result[127:64] = __A[127:64] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADD213SD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand in the low +/// 64 bits. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier in the low +/// 64 bits. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend in the low +/// 64 bits. +/// \returns A 128-bit vector of [2 x double] containing the result in the low +/// 64 bits and a copy of \a __A[127:64] in the upper 64 bits. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +/// Computes a multiply-subtract of 128-bit vectors of [4 x float]. +/// For each element, computes (__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUB213PS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier. +/// \param __C +/// A 128-bit vector of [4 x float] containing the subtrahend. +/// \returns A 128-bit vector of [4 x float] containing the result. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +/// Computes a multiply-subtract of 128-bit vectors of [2 x double]. +/// For each element, computes (__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUB213PD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend. +/// \returns A 128-bit vector of [2 x double] containing the result. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +/// Computes a scalar multiply-subtract of the single-precision values in +/// the low 32 bits of 128-bit vectors of [4 x float]. +/// +/// \code{.operation} +/// result[31:0] = (__A[31:0] * __B[31:0]) - __C[31:0] +/// result[127:32] = __A[127:32] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUB213SS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand in the low +/// 32 bits. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier in the low +/// 32 bits. +/// \param __C +/// A 128-bit vector of [4 x float] containing the subtrahend in the low +/// 32 bits. +/// \returns A 128-bit vector of [4 x float] containing the result in the low +/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +/// Computes a scalar multiply-subtract of the double-precision values in +/// the low 64 bits of 128-bit vectors of [2 x double]. +/// +/// \code{.operation} +/// result[63:0] = (__A[63:0] * __B[63:0]) - __C[63:0] +/// result[127:64] = __A[127:64] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUB213SD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand in the low +/// 64 bits. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier in the low +/// 64 bits. +/// \param __C +/// A 128-bit vector of [2 x double] containing the subtrahend in the low +/// 64 bits. +/// \returns A 128-bit vector of [2 x double] containing the result in the low +/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +/// Computes a negated multiply-add of 128-bit vectors of [4 x float]. +/// For each element, computes -(__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMADD213DPS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier. +/// \param __C +/// A 128-bit vector of [4 x float] containing the addend. +/// \returns A 128-bit [4 x float] vector containing the result. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +/// Computes a negated multiply-add of 128-bit vectors of [2 x double]. +/// For each element, computes -(__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMADD213PD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend. +/// \returns A 128-bit vector of [2 x double] containing the result. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +/// Computes a scalar negated multiply-add of the single-precision values in +/// the low 32 bits of 128-bit vectors of [4 x float]. +/// +/// \code{.operation} +/// result[31:0] = -(__A[31:0] * __B[31:0]) + __C[31:0] +/// result[127:32] = __A[127:32] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMADD213SS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand in the low +/// 32 bits. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier in the low +/// 32 bits. +/// \param __C +/// A 128-bit vector of [4 x float] containing the addend in the low +/// 32 bits. +/// \returns A 128-bit vector of [4 x float] containing the result in the low +/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, -(__v4sf)__B, (__v4sf)__C); +} + +/// Computes a scalar negated multiply-add of the double-precision values +/// in the low 64 bits of 128-bit vectors of [2 x double]. +/// +/// \code{.operation} +/// result[63:0] = -(__A[63:0] * __B[63:0]) + __C[63:0] +/// result[127:64] = __A[127:64] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMADD213SD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand in the low +/// 64 bits. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier in the low +/// 64 bits. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend in the low +/// 64 bits. +/// \returns A 128-bit vector of [2 x double] containing the result in the low +/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, -(__v2df)__B, (__v2df)__C); +} + +/// Computes a negated multiply-subtract of 128-bit vectors of [4 x float]. +/// For each element, computes -(__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMSUB213PS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier. +/// \param __C +/// A 128-bit vector of [4 x float] containing the subtrahend. +/// \returns A 128-bit vector of [4 x float] containing the result. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +/// Computes a negated multiply-subtract of 128-bit vectors of [2 x double]. +/// For each element, computes -(__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMSUB213PD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier. +/// \param __C +/// A 128-bit vector of [2 x double] containing the subtrahend. +/// \returns A 128-bit vector of [2 x double] containing the result. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +/// Computes a scalar negated multiply-subtract of the single-precision +/// values in the low 32 bits of 128-bit vectors of [4 x float]. +/// +/// \code{.operation} +/// result[31:0] = -(__A[31:0] * __B[31:0]) - __C[31:0] +/// result[127:32] = __A[127:32] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMSUB213SS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand in the low +/// 32 bits. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier in the low +/// 32 bits. +/// \param __C +/// A 128-bit vector of [4 x float] containing the subtrahend in the low +/// 32 bits. +/// \returns A 128-bit vector of [4 x float] containing the result in the low +/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, -(__v4sf)__B, -(__v4sf)__C); +} + +/// Computes a scalar negated multiply-subtract of the double-precision +/// values in the low 64 bits of 128-bit vectors of [2 x double]. +/// +/// \code{.operation} +/// result[63:0] = -(__A[63:0] * __B[63:0]) - __C[63:0] +/// result[127:64] = __A[127:64] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMSUB213SD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand in the low +/// 64 bits. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier in the low +/// 64 bits. +/// \param __C +/// A 128-bit vector of [2 x double] containing the subtrahend in the low +/// 64 bits. +/// \returns A 128-bit vector of [2 x double] containing the result in the low +/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fnmsub_sd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, -(__v2df)__B, -(__v2df)__C); +} + +/// Computes a multiply with alternating add/subtract of 128-bit vectors of +/// [4 x float]. +/// +/// \code{.operation} +/// result[31:0] = (__A[31:0] * __B[31:0]) - __C[31:0] +/// result[63:32] = (__A[63:32] * __B[63:32]) + __C[63:32] +/// result[95:64] = (__A[95:64] * __B[95:64]) - __C[95:64] +/// result[127:96] = (__A[127:96] * __B[127:96]) + __C[127:96] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADDSUB213PS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier. +/// \param __C +/// A 128-bit vector of [4 x float] containing the addend/subtrahend. +/// \returns A 128-bit vector of [4 x float] containing the result. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); +} + +/// Computes a multiply with alternating add/subtract of 128-bit vectors of +/// [2 x double]. +/// +/// \code{.operation} +/// result[63:0] = (__A[63:0] * __B[63:0]) - __C[63:0] +/// result[127:64] = (__A[127:64] * __B[127:64]) + __C[127:64] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADDSUB213PD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend/subtrahend. +/// \returns A 128-bit vector of [2 x double] containing the result. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, (__v2df)__C); +} + +/// Computes a multiply with alternating add/subtract of 128-bit vectors of +/// [4 x float]. +/// +/// \code{.operation} +/// result[31:0] = (__A[31:0] * __B[31:0]) + __C[31:0] +/// result[63:32] = (__A[63:32] * __B[63:32]) - __C[63:32] +/// result[95:64] = (__A[95:64] * __B[95:64]) + __C[95:64] +/// result[127:96 = (__A[127:96] * __B[127:96]) - __C[127:96] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUBADD213PS instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x float] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [4 x float] containing the multiplier. +/// \param __C +/// A 128-bit vector of [4 x float] containing the addend/subtrahend. +/// \returns A 128-bit vector of [4 x float] containing the result. +static __inline__ __m128 __DEFAULT_FN_ATTRS128 +_mm_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C) +{ + return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); +} + +/// Computes a multiply with alternating add/subtract of 128-bit vectors of +/// [2 x double]. +/// +/// \code{.operation} +/// result[63:0] = (__A[63:0] * __B[63:0]) + __C[63:0] +/// result[127:64] = (__A[127:64] * __B[127:64]) - __C[127:64] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADDSUB213PD instruction. +/// +/// \param __A +/// A 128-bit vector of [2 x double] containing the multiplicand. +/// \param __B +/// A 128-bit vector of [2 x double] containing the multiplier. +/// \param __C +/// A 128-bit vector of [2 x double] containing the addend/subtrahend. +/// \returns A 128-bit vector of [2 x double] containing the result. +static __inline__ __m128d __DEFAULT_FN_ATTRS128 +_mm_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C) +{ + return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); +} + +/// Computes a multiply-add of 256-bit vectors of [8 x float]. +/// For each element, computes (__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADD213PS instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [8 x float] containing the multiplier. +/// \param __C +/// A 256-bit vector of [8 x float] containing the addend. +/// \returns A 256-bit vector of [8 x float] containing the result. +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); +} + +/// Computes a multiply-add of 256-bit vectors of [4 x double]. +/// For each element, computes (__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADD213PD instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x double] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [4 x double] containing the multiplier. +/// \param __C +/// A 256-bit vector of [4 x double] containing the addend. +/// \returns A 256-bit vector of [4 x double] containing the result. +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); +} + +/// Computes a multiply-subtract of 256-bit vectors of [8 x float]. +/// For each element, computes (__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUB213PS instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [8 x float] containing the multiplier. +/// \param __C +/// A 256-bit vector of [8 x float] containing the subtrahend. +/// \returns A 256-bit vector of [8 x float] containing the result. +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); +} + +/// Computes a multiply-subtract of 256-bit vectors of [4 x double]. +/// For each element, computes (__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUB213PD instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x double] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [4 x double] containing the multiplier. +/// \param __C +/// A 256-bit vector of [4 x double] containing the subtrahend. +/// \returns A 256-bit vector of [4 x double] containing the result. +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); +} + +/// Computes a negated multiply-add of 256-bit vectors of [8 x float]. +/// For each element, computes -(__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMADD213PS instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [8 x float] containing the multiplier. +/// \param __C +/// A 256-bit vector of [8 x float] containing the addend. +/// \returns A 256-bit vector of [8 x float] containing the result. +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C); +} + +/// Computes a negated multiply-add of 256-bit vectors of [4 x double]. +/// For each element, computes -(__A * __B) + __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMADD213PD instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x double] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [4 x double] containing the multiplier. +/// \param __C +/// A 256-bit vector of [4 x double] containing the addend. +/// \returns A 256-bit vector of [4 x double] containing the result. +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C); +} + +/// Computes a negated multiply-subtract of 256-bit vectors of [8 x float]. +/// For each element, computes -(__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMSUB213PS instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [8 x float] containing the multiplier. +/// \param __C +/// A 256-bit vector of [8 x float] containing the subtrahend. +/// \returns A 256-bit vector of [8 x float] containing the result. +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); +} + +/// Computes a negated multiply-subtract of 256-bit vectors of [4 x double]. +/// For each element, computes -(__A * __B) - __C . +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFNMSUB213PD instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x double] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [4 x double] containing the multiplier. +/// \param __C +/// A 256-bit vector of [4 x double] containing the subtrahend. +/// \returns A 256-bit vector of [4 x double] containing the result. +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C); +} + +/// Computes a multiply with alternating add/subtract of 256-bit vectors of +/// [8 x float]. +/// +/// \code{.operation} +/// result[31:0] = (__A[31:0] * __B[31:0]) - __C[31:0] +/// result[63:32] = (__A[63:32] * __B[63:32]) + __C[63:32] +/// result[95:64] = (__A[95:64] * __B[95:64]) - __C[95:64] +/// result[127:96] = (__A[127:96] * __B[127:96]) + __C[127:96] +/// result[159:128] = (__A[159:128] * __B[159:128]) - __C[159:128] +/// result[191:160] = (__A[191:160] * __B[191:160]) + __C[191:160] +/// result[223:192] = (__A[223:192] * __B[223:192]) - __C[223:192] +/// result[255:224] = (__A[255:224] * __B[255:224]) + __C[255:224] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADDSUB213PS instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [8 x float] containing the multiplier. +/// \param __C +/// A 256-bit vector of [8 x float] containing the addend/subtrahend. +/// \returns A 256-bit vector of [8 x float] containing the result. +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); +} + +/// Computes a multiply with alternating add/subtract of 256-bit vectors of +/// [4 x double]. +/// +/// \code{.operation} +/// result[63:0] = (__A[63:0] * __B[63:0]) - __C[63:0] +/// result[127:64] = (__A[127:64] * __B[127:64]) + __C[127:64] +/// result[191:128] = (__A[191:128] * __B[191:128]) - __C[191:128] +/// result[255:192] = (__A[255:192] * __B[255:192]) + __C[255:192] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMADDSUB213PD instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x double] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [4 x double] containing the multiplier. +/// \param __C +/// A 256-bit vector of [4 x double] containing the addend/subtrahend. +/// \returns A 256-bit vector of [4 x double] containing the result. +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); +} + +/// Computes a vector multiply with alternating add/subtract of 256-bit +/// vectors of [8 x float]. +/// +/// \code{.operation} +/// result[31:0] = (__A[31:0] * __B[31:0]) + __C[31:0] +/// result[63:32] = (__A[63:32] * __B[63:32]) - __C[63:32] +/// result[95:64] = (__A[95:64] * __B[95:64]) + __C[95:64] +/// result[127:96] = (__A[127:96] * __B[127:96]) - __C[127:96] +/// result[159:128] = (__A[159:128] * __B[159:128]) + __C[159:128] +/// result[191:160] = (__A[191:160] * __B[191:160]) - __C[191:160] +/// result[223:192] = (__A[223:192] * __B[223:192]) + __C[223:192] +/// result[255:224] = (__A[255:224] * __B[255:224]) - __C[255:224] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUBADD213PS instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x float] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [8 x float] containing the multiplier. +/// \param __C +/// A 256-bit vector of [8 x float] containing the addend/subtrahend. +/// \returns A 256-bit vector of [8 x float] containing the result. +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C) +{ + return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); +} + +/// Computes a vector multiply with alternating add/subtract of 256-bit +/// vectors of [4 x double]. +/// +/// \code{.operation} +/// result[63:0] = (__A[63:0] * __B[63:0]) + __C[63:0] +/// result[127:64] = (__A[127:64] * __B[127:64]) - __C[127:64] +/// result[191:128] = (__A[191:128] * __B[191:128]) + __C[191:128] +/// result[255:192] = (__A[255:192] * __B[255:192]) - __C[255:192] +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VFMSUBADD213PD instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x double] containing the multiplicand. +/// \param __B +/// A 256-bit vector of [4 x double] containing the multiplier. +/// \param __C +/// A 256-bit vector of [4 x double] containing the addend/subtrahend. +/// \returns A 256-bit vector of [4 x double] containing the result. +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C) +{ + return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); +} + +#undef __DEFAULT_FN_ATTRS128 +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __FMAINTRIN_H */ diff --git a/llvm/lib/clang/19/include/fuzzer/FuzzedDataProvider.h b/llvm/lib/clang/19/include/fuzzer/FuzzedDataProvider.h new file mode 100644 index 0000000000000000000000000000000000000000..5903ed837917ca9a1ffe6630e6b96771ae319e62 --- /dev/null +++ b/llvm/lib/clang/19/include/fuzzer/FuzzedDataProvider.h @@ -0,0 +1,397 @@ +//===- FuzzedDataProvider.h - Utility header for fuzz targets ---*- C++ -* ===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// A single header library providing an utility class to break up an array of +// bytes. Whenever run on the same input, provides the same output, as long as +// its methods are called in the same order, with the same arguments. +//===----------------------------------------------------------------------===// + +#ifndef LLVM_FUZZER_FUZZED_DATA_PROVIDER_H_ +#define LLVM_FUZZER_FUZZED_DATA_PROVIDER_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +// In addition to the comments below, the API is also briefly documented at +// https://github.com/google/fuzzing/blob/master/docs/split-inputs.md#fuzzed-data-provider +class FuzzedDataProvider { + public: + // |data| is an array of length |size| that the FuzzedDataProvider wraps to + // provide more granular access. |data| must outlive the FuzzedDataProvider. + FuzzedDataProvider(const uint8_t *data, size_t size) + : data_ptr_(data), remaining_bytes_(size) {} + ~FuzzedDataProvider() = default; + + // See the implementation below (after the class definition) for more verbose + // comments for each of the methods. + + // Methods returning std::vector of bytes. These are the most popular choice + // when splitting fuzzing input into pieces, as every piece is put into a + // separate buffer (i.e. ASan would catch any under-/overflow) and the memory + // will be released automatically. + template std::vector ConsumeBytes(size_t num_bytes); + template + std::vector ConsumeBytesWithTerminator(size_t num_bytes, T terminator = 0); + template std::vector ConsumeRemainingBytes(); + + // Methods returning strings. Use only when you need a std::string or a null + // terminated C-string. Otherwise, prefer the methods returning std::vector. + std::string ConsumeBytesAsString(size_t num_bytes); + std::string ConsumeRandomLengthString(size_t max_length); + std::string ConsumeRandomLengthString(); + std::string ConsumeRemainingBytesAsString(); + + // Methods returning integer values. + template T ConsumeIntegral(); + template T ConsumeIntegralInRange(T min, T max); + + // Methods returning floating point values. + template T ConsumeFloatingPoint(); + template T ConsumeFloatingPointInRange(T min, T max); + + // 0 <= return value <= 1. + template T ConsumeProbability(); + + bool ConsumeBool(); + + // Returns a value chosen from the given enum. + template T ConsumeEnum(); + + // Returns a value from the given array. + template T PickValueInArray(const T (&array)[size]); + template + T PickValueInArray(const std::array &array); + template T PickValueInArray(std::initializer_list list); + + // Writes data to the given destination and returns number of bytes written. + size_t ConsumeData(void *destination, size_t num_bytes); + + // Reports the remaining bytes available for fuzzed input. + size_t remaining_bytes() { return remaining_bytes_; } + + private: + FuzzedDataProvider(const FuzzedDataProvider &) = delete; + FuzzedDataProvider &operator=(const FuzzedDataProvider &) = delete; + + void CopyAndAdvance(void *destination, size_t num_bytes); + + void Advance(size_t num_bytes); + + template + std::vector ConsumeBytes(size_t size, size_t num_bytes); + + template TS ConvertUnsignedToSigned(TU value); + + const uint8_t *data_ptr_; + size_t remaining_bytes_; +}; + +// Returns a std::vector containing |num_bytes| of input data. If fewer than +// |num_bytes| of data remain, returns a shorter std::vector containing all +// of the data that's left. Can be used with any byte sized type, such as +// char, unsigned char, uint8_t, etc. +template +std::vector FuzzedDataProvider::ConsumeBytes(size_t num_bytes) { + num_bytes = std::min(num_bytes, remaining_bytes_); + return ConsumeBytes(num_bytes, num_bytes); +} + +// Similar to |ConsumeBytes|, but also appends the terminator value at the end +// of the resulting vector. Useful, when a mutable null-terminated C-string is +// needed, for example. But that is a rare case. Better avoid it, if possible, +// and prefer using |ConsumeBytes| or |ConsumeBytesAsString| methods. +template +std::vector FuzzedDataProvider::ConsumeBytesWithTerminator(size_t num_bytes, + T terminator) { + num_bytes = std::min(num_bytes, remaining_bytes_); + std::vector result = ConsumeBytes(num_bytes + 1, num_bytes); + result.back() = terminator; + return result; +} + +// Returns a std::vector containing all remaining bytes of the input data. +template +std::vector FuzzedDataProvider::ConsumeRemainingBytes() { + return ConsumeBytes(remaining_bytes_); +} + +// Returns a std::string containing |num_bytes| of input data. Using this and +// |.c_str()| on the resulting string is the best way to get an immutable +// null-terminated C string. If fewer than |num_bytes| of data remain, returns +// a shorter std::string containing all of the data that's left. +inline std::string FuzzedDataProvider::ConsumeBytesAsString(size_t num_bytes) { + static_assert(sizeof(std::string::value_type) == sizeof(uint8_t), + "ConsumeBytesAsString cannot convert the data to a string."); + + num_bytes = std::min(num_bytes, remaining_bytes_); + std::string result( + reinterpret_cast(data_ptr_), num_bytes); + Advance(num_bytes); + return result; +} + +// Returns a std::string of length from 0 to |max_length|. When it runs out of +// input data, returns what remains of the input. Designed to be more stable +// with respect to a fuzzer inserting characters than just picking a random +// length and then consuming that many bytes with |ConsumeBytes|. +inline std::string +FuzzedDataProvider::ConsumeRandomLengthString(size_t max_length) { + // Reads bytes from the start of |data_ptr_|. Maps "\\" to "\", and maps "\" + // followed by anything else to the end of the string. As a result of this + // logic, a fuzzer can insert characters into the string, and the string + // will be lengthened to include those new characters, resulting in a more + // stable fuzzer than picking the length of a string independently from + // picking its contents. + std::string result; + + // Reserve the anticipated capacity to prevent several reallocations. + result.reserve(std::min(max_length, remaining_bytes_)); + for (size_t i = 0; i < max_length && remaining_bytes_ != 0; ++i) { + char next = ConvertUnsignedToSigned(data_ptr_[0]); + Advance(1); + if (next == '\\' && remaining_bytes_ != 0) { + next = ConvertUnsignedToSigned(data_ptr_[0]); + Advance(1); + if (next != '\\') + break; + } + result += next; + } + + result.shrink_to_fit(); + return result; +} + +// Returns a std::string of length from 0 to |remaining_bytes_|. +inline std::string FuzzedDataProvider::ConsumeRandomLengthString() { + return ConsumeRandomLengthString(remaining_bytes_); +} + +// Returns a std::string containing all remaining bytes of the input data. +// Prefer using |ConsumeRemainingBytes| unless you actually need a std::string +// object. +inline std::string FuzzedDataProvider::ConsumeRemainingBytesAsString() { + return ConsumeBytesAsString(remaining_bytes_); +} + +// Returns a number in the range [Type's min, Type's max]. The value might +// not be uniformly distributed in the given range. If there's no input data +// left, always returns |min|. +template T FuzzedDataProvider::ConsumeIntegral() { + return ConsumeIntegralInRange(std::numeric_limits::min(), + std::numeric_limits::max()); +} + +// Returns a number in the range [min, max] by consuming bytes from the +// input data. The value might not be uniformly distributed in the given +// range. If there's no input data left, always returns |min|. |min| must +// be less than or equal to |max|. +template +T FuzzedDataProvider::ConsumeIntegralInRange(T min, T max) { + static_assert(std::is_integral::value, "An integral type is required."); + static_assert(sizeof(T) <= sizeof(uint64_t), "Unsupported integral type."); + + if (min > max) + abort(); + + // Use the biggest type possible to hold the range and the result. + uint64_t range = static_cast(max) - static_cast(min); + uint64_t result = 0; + size_t offset = 0; + + while (offset < sizeof(T) * CHAR_BIT && (range >> offset) > 0 && + remaining_bytes_ != 0) { + // Pull bytes off the end of the seed data. Experimentally, this seems to + // allow the fuzzer to more easily explore the input space. This makes + // sense, since it works by modifying inputs that caused new code to run, + // and this data is often used to encode length of data read by + // |ConsumeBytes|. Separating out read lengths makes it easier modify the + // contents of the data that is actually read. + --remaining_bytes_; + result = (result << CHAR_BIT) | data_ptr_[remaining_bytes_]; + offset += CHAR_BIT; + } + + // Avoid division by 0, in case |range + 1| results in overflow. + if (range != std::numeric_limits::max()) + result = result % (range + 1); + + return static_cast(static_cast(min) + result); +} + +// Returns a floating point value in the range [Type's lowest, Type's max] by +// consuming bytes from the input data. If there's no input data left, always +// returns approximately 0. +template T FuzzedDataProvider::ConsumeFloatingPoint() { + return ConsumeFloatingPointInRange(std::numeric_limits::lowest(), + std::numeric_limits::max()); +} + +// Returns a floating point value in the given range by consuming bytes from +// the input data. If there's no input data left, returns |min|. Note that +// |min| must be less than or equal to |max|. +template +T FuzzedDataProvider::ConsumeFloatingPointInRange(T min, T max) { + if (min > max) + abort(); + + T range = .0; + T result = min; + constexpr T zero(.0); + if (max > zero && min < zero && max > min + std::numeric_limits::max()) { + // The diff |max - min| would overflow the given floating point type. Use + // the half of the diff as the range and consume a bool to decide whether + // the result is in the first of the second part of the diff. + range = (max / 2.0) - (min / 2.0); + if (ConsumeBool()) { + result += range; + } + } else { + range = max - min; + } + + return result + range * ConsumeProbability(); +} + +// Returns a floating point number in the range [0.0, 1.0]. If there's no +// input data left, always returns 0. +template T FuzzedDataProvider::ConsumeProbability() { + static_assert(std::is_floating_point::value, + "A floating point type is required."); + + // Use different integral types for different floating point types in order + // to provide better density of the resulting values. + using IntegralType = + typename std::conditional<(sizeof(T) <= sizeof(uint32_t)), uint32_t, + uint64_t>::type; + + T result = static_cast(ConsumeIntegral()); + result /= static_cast(std::numeric_limits::max()); + return result; +} + +// Reads one byte and returns a bool, or false when no data remains. +inline bool FuzzedDataProvider::ConsumeBool() { + return 1 & ConsumeIntegral(); +} + +// Returns an enum value. The enum must start at 0 and be contiguous. It must +// also contain |kMaxValue| aliased to its largest (inclusive) value. Such as: +// enum class Foo { SomeValue, OtherValue, kMaxValue = OtherValue }; +template T FuzzedDataProvider::ConsumeEnum() { + static_assert(std::is_enum::value, "|T| must be an enum type."); + return static_cast( + ConsumeIntegralInRange(0, static_cast(T::kMaxValue))); +} + +// Returns a copy of the value selected from the given fixed-size |array|. +template +T FuzzedDataProvider::PickValueInArray(const T (&array)[size]) { + static_assert(size > 0, "The array must be non empty."); + return array[ConsumeIntegralInRange(0, size - 1)]; +} + +template +T FuzzedDataProvider::PickValueInArray(const std::array &array) { + static_assert(size > 0, "The array must be non empty."); + return array[ConsumeIntegralInRange(0, size - 1)]; +} + +template +T FuzzedDataProvider::PickValueInArray(std::initializer_list list) { + // TODO(Dor1s): switch to static_assert once C++14 is allowed. + if (!list.size()) + abort(); + + return *(list.begin() + ConsumeIntegralInRange(0, list.size() - 1)); +} + +// Writes |num_bytes| of input data to the given destination pointer. If there +// is not enough data left, writes all remaining bytes. Return value is the +// number of bytes written. +// In general, it's better to avoid using this function, but it may be useful +// in cases when it's necessary to fill a certain buffer or object with +// fuzzing data. +inline size_t FuzzedDataProvider::ConsumeData(void *destination, + size_t num_bytes) { + num_bytes = std::min(num_bytes, remaining_bytes_); + CopyAndAdvance(destination, num_bytes); + return num_bytes; +} + +// Private methods. +inline void FuzzedDataProvider::CopyAndAdvance(void *destination, + size_t num_bytes) { + std::memcpy(destination, data_ptr_, num_bytes); + Advance(num_bytes); +} + +inline void FuzzedDataProvider::Advance(size_t num_bytes) { + if (num_bytes > remaining_bytes_) + abort(); + + data_ptr_ += num_bytes; + remaining_bytes_ -= num_bytes; +} + +template +std::vector FuzzedDataProvider::ConsumeBytes(size_t size, size_t num_bytes) { + static_assert(sizeof(T) == sizeof(uint8_t), "Incompatible data type."); + + // The point of using the size-based constructor below is to increase the + // odds of having a vector object with capacity being equal to the length. + // That part is always implementation specific, but at least both libc++ and + // libstdc++ allocate the requested number of bytes in that constructor, + // which seems to be a natural choice for other implementations as well. + // To increase the odds even more, we also call |shrink_to_fit| below. + std::vector result(size); + if (size == 0) { + if (num_bytes != 0) + abort(); + return result; + } + + CopyAndAdvance(result.data(), num_bytes); + + // Even though |shrink_to_fit| is also implementation specific, we expect it + // to provide an additional assurance in case vector's constructor allocated + // a buffer which is larger than the actual amount of data we put inside it. + result.shrink_to_fit(); + return result; +} + +template +TS FuzzedDataProvider::ConvertUnsignedToSigned(TU value) { + static_assert(sizeof(TS) == sizeof(TU), "Incompatible data types."); + static_assert(!std::numeric_limits::is_signed, + "Source type must be unsigned."); + + // TODO(Dor1s): change to `if constexpr` once C++17 becomes mainstream. + if (std::numeric_limits::is_modulo) + return static_cast(value); + + // Avoid using implementation-defined unsigned to signed conversions. + // To learn more, see https://stackoverflow.com/questions/13150449. + if (value <= std::numeric_limits::max()) { + return static_cast(value); + } else { + constexpr auto TS_min = std::numeric_limits::min(); + return TS_min + static_cast(value - TS_min); + } +} + +#endif // LLVM_FUZZER_FUZZED_DATA_PROVIDER_H_ diff --git a/llvm/lib/clang/19/include/fxsrintrin.h b/llvm/lib/clang/19/include/fxsrintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..afee6aa976749307bc07ace87347c55d802089df --- /dev/null +++ b/llvm/lib/clang/19/include/fxsrintrin.h @@ -0,0 +1,91 @@ +/*===---- fxsrintrin.h - FXSR intrinsic ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __FXSRINTRIN_H +#define __FXSRINTRIN_H + +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fxsr"))) + +/// Saves the XMM, MMX, MXCSR and x87 FPU registers into a 512-byte +/// memory region pointed to by the input parameter \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the FXSAVE instruction. +/// +/// \param __p +/// A pointer to a 512-byte memory region. The beginning of this memory +/// region should be aligned on a 16-byte boundary. +static __inline__ void __DEFAULT_FN_ATTRS +_fxsave(void *__p) +{ + __builtin_ia32_fxsave(__p); +} + +/// Restores the XMM, MMX, MXCSR and x87 FPU registers from the 512-byte +/// memory region pointed to by the input parameter \a __p. The contents of +/// this memory region should have been written to by a previous \c _fxsave +/// or \c _fxsave64 intrinsic. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the FXRSTOR instruction. +/// +/// \param __p +/// A pointer to a 512-byte memory region. The beginning of this memory +/// region should be aligned on a 16-byte boundary. +static __inline__ void __DEFAULT_FN_ATTRS +_fxrstor(void *__p) +{ + __builtin_ia32_fxrstor(__p); +} + +#ifdef __x86_64__ +/// Saves the XMM, MMX, MXCSR and x87 FPU registers into a 512-byte +/// memory region pointed to by the input parameter \a __p. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the FXSAVE64 instruction. +/// +/// \param __p +/// A pointer to a 512-byte memory region. The beginning of this memory +/// region should be aligned on a 16-byte boundary. +static __inline__ void __DEFAULT_FN_ATTRS +_fxsave64(void *__p) +{ + __builtin_ia32_fxsave64(__p); +} + +/// Restores the XMM, MMX, MXCSR and x87 FPU registers from the 512-byte +/// memory region pointed to by the input parameter \a __p. The contents of +/// this memory region should have been written to by a previous \c _fxsave +/// or \c _fxsave64 intrinsic. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the FXRSTOR64 instruction. +/// +/// \param __p +/// A pointer to a 512-byte memory region. The beginning of this memory +/// region should be aligned on a 16-byte boundary. +static __inline__ void __DEFAULT_FN_ATTRS +_fxrstor64(void *__p) +{ + __builtin_ia32_fxrstor64(__p); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/gfniintrin.h b/llvm/lib/clang/19/include/gfniintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..73b04a824aba8e557dee0bdd86a0c9f044d34ddb --- /dev/null +++ b/llvm/lib/clang/19/include/gfniintrin.h @@ -0,0 +1,211 @@ +/*===----------------- gfniintrin.h - GFNI intrinsics ----------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __GFNIINTRIN_H +#define __GFNIINTRIN_H + +/* Default attributes for simple form (no masking). */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("gfni,no-evex512"), __min_vector_width__(128))) + +/* Default attributes for YMM unmasked form. */ +#define __DEFAULT_FN_ATTRS_Y \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx,gfni,no-evex512"), \ + __min_vector_width__(256))) + +/* Default attributes for ZMM unmasked forms. */ +#define __DEFAULT_FN_ATTRS_Z \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512f,evex512,gfni"), \ + __min_vector_width__(512))) +/* Default attributes for ZMM masked forms. */ +#define __DEFAULT_FN_ATTRS_Z_MASK \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512bw,evex512,gfni"), \ + __min_vector_width__(512))) + +/* Default attributes for VLX masked forms. */ +#define __DEFAULT_FN_ATTRS_VL128 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512bw,avx512vl,gfni,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS_VL256 \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512bw,avx512vl,gfni,no-evex512"), \ + __min_vector_width__(256))) + +#define _mm_gf2p8affineinv_epi64_epi8(A, B, I) \ + ((__m128i)__builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), \ + (char)(I))) + +#define _mm_gf2p8affine_epi64_epi8(A, B, I) \ + ((__m128i)__builtin_ia32_vgf2p8affineqb_v16qi((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), \ + (char)(I))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_gf2p8mul_epi8(__m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A, + (__v16qi) __B); +} + +#ifdef __AVXINTRIN_H +#define _mm256_gf2p8affineinv_epi64_epi8(A, B, I) \ + ((__m256i)__builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \ + (__v32qi)(__m256i)(B), \ + (char)(I))) + +#define _mm256_gf2p8affine_epi64_epi8(A, B, I) \ + ((__m256i)__builtin_ia32_vgf2p8affineqb_v32qi((__v32qi)(__m256i)(A), \ + (__v32qi)(__m256i)(B), \ + (char)(I))) + +static __inline__ __m256i __DEFAULT_FN_ATTRS_Y +_mm256_gf2p8mul_epi8(__m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi((__v32qi) __A, + (__v32qi) __B); +} +#endif /* __AVXINTRIN_H */ + +#ifdef __AVX512BWINTRIN_H +#define _mm512_gf2p8affineinv_epi64_epi8(A, B, I) \ + ((__m512i)__builtin_ia32_vgf2p8affineinvqb_v64qi((__v64qi)(__m512i)(A), \ + (__v64qi)(__m512i)(B), \ + (char)(I))) + +#define _mm512_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \ + ((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \ + (__v64qi)_mm512_gf2p8affineinv_epi64_epi8(A, B, I), \ + (__v64qi)(__m512i)(S))) + +#define _mm512_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \ + _mm512_mask_gf2p8affineinv_epi64_epi8((__m512i)_mm512_setzero_si512(), \ + U, A, B, I) + +#define _mm512_gf2p8affine_epi64_epi8(A, B, I) \ + ((__m512i)__builtin_ia32_vgf2p8affineqb_v64qi((__v64qi)(__m512i)(A), \ + (__v64qi)(__m512i)(B), \ + (char)(I))) + +#define _mm512_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \ + ((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \ + (__v64qi)_mm512_gf2p8affine_epi64_epi8((A), (B), (I)), \ + (__v64qi)(__m512i)(S))) + +#define _mm512_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \ + _mm512_mask_gf2p8affine_epi64_epi8((__m512i)_mm512_setzero_si512(), \ + U, A, B, I) + +static __inline__ __m512i __DEFAULT_FN_ATTRS_Z +_mm512_gf2p8mul_epi8(__m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi((__v64qi) __A, + (__v64qi) __B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS_Z_MASK +_mm512_mask_gf2p8mul_epi8(__m512i __S, __mmask64 __U, __m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_selectb_512(__U, + (__v64qi) _mm512_gf2p8mul_epi8(__A, __B), + (__v64qi) __S); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS_Z_MASK +_mm512_maskz_gf2p8mul_epi8(__mmask64 __U, __m512i __A, __m512i __B) +{ + return _mm512_mask_gf2p8mul_epi8((__m512i)_mm512_setzero_si512(), + __U, __A, __B); +} +#endif /* __AVX512BWINTRIN_H */ + +#ifdef __AVX512VLBWINTRIN_H +#define _mm_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \ + (__v16qi)_mm_gf2p8affineinv_epi64_epi8(A, B, I), \ + (__v16qi)(__m128i)(S))) + +#define _mm_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \ + _mm_mask_gf2p8affineinv_epi64_epi8((__m128i)_mm_setzero_si128(), \ + U, A, B, I) + +#define _mm256_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \ + (__v32qi)_mm256_gf2p8affineinv_epi64_epi8(A, B, I), \ + (__v32qi)(__m256i)(S))) + +#define _mm256_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \ + _mm256_mask_gf2p8affineinv_epi64_epi8((__m256i)_mm256_setzero_si256(), \ + U, A, B, I) + +#define _mm_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \ + ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \ + (__v16qi)_mm_gf2p8affine_epi64_epi8(A, B, I), \ + (__v16qi)(__m128i)(S))) + +#define _mm_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \ + _mm_mask_gf2p8affine_epi64_epi8((__m128i)_mm_setzero_si128(), U, A, B, I) + +#define _mm256_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \ + ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \ + (__v32qi)_mm256_gf2p8affine_epi64_epi8(A, B, I), \ + (__v32qi)(__m256i)(S))) + +#define _mm256_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \ + _mm256_mask_gf2p8affine_epi64_epi8((__m256i)_mm256_setzero_si256(), \ + U, A, B, I) + +static __inline__ __m128i __DEFAULT_FN_ATTRS_VL128 +_mm_mask_gf2p8mul_epi8(__m128i __S, __mmask16 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_selectb_128(__U, + (__v16qi) _mm_gf2p8mul_epi8(__A, __B), + (__v16qi) __S); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS_VL128 +_mm_maskz_gf2p8mul_epi8(__mmask16 __U, __m128i __A, __m128i __B) +{ + return _mm_mask_gf2p8mul_epi8((__m128i)_mm_setzero_si128(), + __U, __A, __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS_VL256 +_mm256_mask_gf2p8mul_epi8(__m256i __S, __mmask32 __U, __m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_selectb_256(__U, + (__v32qi) _mm256_gf2p8mul_epi8(__A, __B), + (__v32qi) __S); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS_VL256 +_mm256_maskz_gf2p8mul_epi8(__mmask32 __U, __m256i __A, __m256i __B) +{ + return _mm256_mask_gf2p8mul_epi8((__m256i)_mm256_setzero_si256(), + __U, __A, __B); +} +#endif /* __AVX512VLBWINTRIN_H */ + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_Y +#undef __DEFAULT_FN_ATTRS_Z +#undef __DEFAULT_FN_ATTRS_VL128 +#undef __DEFAULT_FN_ATTRS_VL256 + +#endif /* __GFNIINTRIN_H */ + diff --git a/llvm/lib/clang/19/include/hexagon_circ_brev_intrinsics.h b/llvm/lib/clang/19/include/hexagon_circ_brev_intrinsics.h new file mode 100644 index 0000000000000000000000000000000000000000..c53786d3c37bc470696d74b53a4e8223019b9ab8 --- /dev/null +++ b/llvm/lib/clang/19/include/hexagon_circ_brev_intrinsics.h @@ -0,0 +1,298 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _HEXAGON_CIRC_BREV_INTRINSICS_H_ +#define _HEXAGON_CIRC_BREV_INTRINSICS_H_ 1 + +#include +#include + +/* Circular Load */ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_D(Word64 dst, Word64 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_D(dest,ptr,incr,bufsize,K) \ + { ptr = (int64_t *) HEXAGON_circ_ldd (ptr, &(dest), ((((K)+1)<<24)|((bufsize)<<3)), ((incr)*8)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_W(Word32 dst, Word32 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_W(dest,ptr,incr,bufsize,K) \ + { ptr = (int *) HEXAGON_circ_ldw (ptr, &(dest), (((K)<<24)|((bufsize)<<2)), ((incr)*4)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_H(Word16 dst, Word16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_H(dest,ptr,incr,bufsize,K) \ + { ptr = (int16_t *) HEXAGON_circ_ldh (ptr, &(dest), ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_UH( UWord16 dst, UWord16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_UH(dest,ptr,incr,bufsize,K) \ + { ptr = (uint16_t *) HEXAGON_circ_lduh (ptr, &(dest), ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_B(Word8 dst, Word8 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_B(dest,ptr,incr,bufsize,K) \ + { ptr = (int8_t *) HEXAGON_circ_ldb (ptr, &(dest), ((((K)-2)<<24)|(bufsize)), incr); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_UB(UWord8 dst, UWord8 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_UB(dest,ptr,incr,bufsize,K) \ + { ptr = (uint8_t *) HEXAGON_circ_ldub (ptr, &(dest), ((((K)-2)<<24)|(bufsize)), incr); } + +/* Circular Store */ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_D(Word64 *src, Word64 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_D(src,ptr,incr,bufsize,K) \ + { ptr = (int64_t *) HEXAGON_circ_std (ptr, src, ((((K)+1)<<24)|((bufsize)<<3)), ((incr)*8)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_W(Word32 *src, Word32 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_W(src,ptr,incr,bufsize,K) \ + { ptr = (int *) HEXAGON_circ_stw (ptr, src, (((K)<<24)|((bufsize)<<2)), ((incr)*4)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_HL(Word16 *src, Word16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_HL(src,ptr,incr,bufsize,K) \ + { ptr = (int16_t *) HEXAGON_circ_sth (ptr, src, ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_HH(Word16 *src, Word16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_HH(src,ptr,incr,bufsize,K) \ + { ptr = (int16_t *) HEXAGON_circ_sthhi (ptr, src, ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_B(Word8 *src, Word8 *ptr, UWord32 I4, UWord32 bufsize, UWord64 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_B(src,ptr,incr,bufsize,K) \ + { ptr = (int8_t *) HEXAGON_circ_stb (ptr, src, ((((K)-2)<<24)|(bufsize)), incr); } + + +/* Bit Reverse Load */ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_D(Word64 dst, Word64 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_D(dest,ptr,log2bufsize) \ + { ptr = (int64_t *) HEXAGON_brev_ldd (ptr, &(dest), (1<<(16-((log2bufsize) + 3)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_W(Word32 dst, Word32 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_W(dest,ptr,log2bufsize) \ + { ptr = (int *) HEXAGON_brev_ldw (ptr, &(dest), (1<<(16-((log2bufsize) + 2)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_H(Word16 dst, Word16 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_H(dest,ptr,log2bufsize) \ + { ptr = (int16_t *) HEXAGON_brev_ldh (ptr, &(dest), (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_UH(UWord16 dst, UWord16 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_UH(dest,ptr,log2bufsize) \ + { ptr = (uint16_t *) HEXAGON_brev_lduh (ptr, &(dest), (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_B(Word8 dst, Word8 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_B(dest,ptr,log2bufsize) \ + { ptr = (int8_t *) HEXAGON_brev_ldb (ptr, &(dest), (1<<(16-((log2bufsize))))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_UB(UWord8 dst, UWord8 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_UB(dest,ptr,log2bufsize) \ + { ptr = (uint8_t *) HEXAGON_brev_ldub (ptr, &(dest), (1<<(16-((log2bufsize))))); } + +/* Bit Reverse Store */ + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_D(Word64 *src, Word64 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_D(src,ptr,log2bufsize) \ + { ptr = (int64_t *) HEXAGON_brev_std (ptr, src, (1<<(16-((log2bufsize) + 3)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_W(Word32 *src, Word32 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_W(src,ptr,log2bufsize) \ + { ptr = (int *) HEXAGON_brev_stw (ptr, src, (1<<(16-((log2bufsize) + 2)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_HL(Word16 *src, Word16 *ptr, Word32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_HL(src,ptr,log2bufsize) \ + { ptr = (int16_t *) HEXAGON_brev_sth (ptr, src, (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_HH(Word16 *src, Word16 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_HH(src,ptr,log2bufsize) \ + { ptr = (int16_t *) HEXAGON_brev_sthhi (ptr, src, (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_B(Word8 *src, Word8 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_B(src,ptr,log2bufsize) \ + { ptr = (int8_t *) HEXAGON_brev_stb (ptr, src, (1<<(16-((log2bufsize))))); } + + +#define HEXAGON_circ_ldd __builtin_circ_ldd +#define HEXAGON_circ_ldw __builtin_circ_ldw +#define HEXAGON_circ_ldh __builtin_circ_ldh +#define HEXAGON_circ_lduh __builtin_circ_lduh +#define HEXAGON_circ_ldb __builtin_circ_ldb +#define HEXAGON_circ_ldub __builtin_circ_ldub + + +#define HEXAGON_circ_std __builtin_circ_std +#define HEXAGON_circ_stw __builtin_circ_stw +#define HEXAGON_circ_sth __builtin_circ_sth +#define HEXAGON_circ_sthhi __builtin_circ_sthhi +#define HEXAGON_circ_stb __builtin_circ_stb + + +#define HEXAGON_brev_ldd __builtin_brev_ldd +#define HEXAGON_brev_ldw __builtin_brev_ldw +#define HEXAGON_brev_ldh __builtin_brev_ldh +#define HEXAGON_brev_lduh __builtin_brev_lduh +#define HEXAGON_brev_ldb __builtin_brev_ldb +#define HEXAGON_brev_ldub __builtin_brev_ldub + +#define HEXAGON_brev_std __builtin_brev_std +#define HEXAGON_brev_stw __builtin_brev_stw +#define HEXAGON_brev_sth __builtin_brev_sth +#define HEXAGON_brev_sthhi __builtin_brev_sthhi +#define HEXAGON_brev_stb __builtin_brev_stb + +#ifdef __HVX__ +/* ========================================================================== + Assembly Syntax: if (Qt) vmem(Rt+#0) = Vs + C Intrinsic Prototype: void Q6_vmaskedstoreq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstoreq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstoreq) + +/* ========================================================================== + Assembly Syntax: if (!Qt) vmem(Rt+#0) = Vs + C Intrinsic Prototype: void Q6_vmaskedstorenq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstorenq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstorenq) + +/* ========================================================================== + Assembly Syntax: if (Qt) vmem(Rt+#0):nt = Vs + C Intrinsic Prototype: void Q6_vmaskedstorentq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstorentq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstorentq) + +/* ========================================================================== + Assembly Syntax: if (!Qt) vmem(Rt+#0):nt = Vs + C Intrinsic Prototype: void Q6_vmaskedstorentnq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstorentnq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstorentnq) + +#endif + + +#endif /* #ifndef _HEXAGON_CIRC_BREV_INTRINSICS_H_ */ + +#ifdef __NOT_DEFINED__ +/*** comment block template ***/ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: ReturnType Intrinsic(ParamType Rs, ParamType Rt) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#endif /*** __NOT_DEFINED__ ***/ diff --git a/llvm/lib/clang/19/include/hexagon_protos.h b/llvm/lib/clang/19/include/hexagon_protos.h new file mode 100644 index 0000000000000000000000000000000000000000..2642f3c8428d836d45a38977675dfa8cac106e1d --- /dev/null +++ b/llvm/lib/clang/19/include/hexagon_protos.h @@ -0,0 +1,8439 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// Automatically generated file, do not edit! +//===----------------------------------------------------------------------===// + + + +#ifndef __HEXAGON_PROTOS_H_ +#define __HEXAGON_PROTOS_H_ 1 + +/* ========================================================================== + Assembly Syntax: Rd32=abs(Rs32) + C Intrinsic Prototype: Word32 Q6_R_abs_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_abs_R __builtin_HEXAGON_A2_abs + +/* ========================================================================== + Assembly Syntax: Rdd32=abs(Rss32) + C Intrinsic Prototype: Word64 Q6_P_abs_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_abs_P __builtin_HEXAGON_A2_absp + +/* ========================================================================== + Assembly Syntax: Rd32=abs(Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_abs_R_sat(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_abs_R_sat __builtin_HEXAGON_A2_abssat + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_add_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_add_RR __builtin_HEXAGON_A2_add + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRh_s16 __builtin_HEXAGON_A2_addh_h16_hh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRl_s16 __builtin_HEXAGON_A2_addh_h16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh_s16 __builtin_HEXAGON_A2_addh_h16_lh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl_s16 __builtin_HEXAGON_A2_addh_h16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRh_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_hh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRl_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_lh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_add_RlRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh __builtin_HEXAGON_A2_addh_l16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_add_RlRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl __builtin_HEXAGON_A2_addh_l16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h):sat + C Intrinsic Prototype: Word32 Q6_R_add_RlRh_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh_sat __builtin_HEXAGON_A2_addh_l16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l):sat + C Intrinsic Prototype: Word32 Q6_R_add_RlRl_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl_sat __builtin_HEXAGON_A2_addh_l16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,#s16) + C Intrinsic Prototype: Word32 Q6_R_add_RI(Word32 Rs, Word32 Is16) + Instruction Type: ALU32_ADDI + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_add_RI __builtin_HEXAGON_A2_addi + +/* ========================================================================== + Assembly Syntax: Rdd32=add(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_add_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_add_PP __builtin_HEXAGON_A2_addp + +/* ========================================================================== + Assembly Syntax: Rdd32=add(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_add_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_add_PP_sat __builtin_HEXAGON_A2_addpsat + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_add_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_add_RR_sat __builtin_HEXAGON_A2_addsat + +/* ========================================================================== + Assembly Syntax: Rdd32=add(Rs32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_add_RP(Word32 Rs, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_add_RP __builtin_HEXAGON_A2_addsp + +/* ========================================================================== + Assembly Syntax: Rd32=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_and_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_and_RR __builtin_HEXAGON_A2_and + +/* ========================================================================== + Assembly Syntax: Rd32=and(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_and_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_and_RI __builtin_HEXAGON_A2_andir + +/* ========================================================================== + Assembly Syntax: Rdd32=and(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_and_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_and_PP __builtin_HEXAGON_A2_andp + +/* ========================================================================== + Assembly Syntax: Rd32=aslh(Rs32) + C Intrinsic Prototype: Word32 Q6_R_aslh_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_aslh_R __builtin_HEXAGON_A2_aslh + +/* ========================================================================== + Assembly Syntax: Rd32=asrh(Rs32) + C Intrinsic Prototype: Word32 Q6_R_asrh_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_asrh_R __builtin_HEXAGON_A2_asrh + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.h,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_combine_RhRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RhRh __builtin_HEXAGON_A2_combine_hh + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.h,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_combine_RhRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RhRl __builtin_HEXAGON_A2_combine_hl + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.l,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_combine_RlRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RlRh __builtin_HEXAGON_A2_combine_lh + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.l,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_combine_RlRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RlRl __builtin_HEXAGON_A2_combine_ll + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(#s8,#S8) + C Intrinsic Prototype: Word64 Q6_P_combine_II(Word32 Is8, Word32 IS8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_II __builtin_HEXAGON_A2_combineii + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_combine_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_RR __builtin_HEXAGON_A2_combinew + +/* ========================================================================== + Assembly Syntax: Rd32=max(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_max_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_max_RR __builtin_HEXAGON_A2_max + +/* ========================================================================== + Assembly Syntax: Rdd32=max(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_max_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_max_PP __builtin_HEXAGON_A2_maxp + +/* ========================================================================== + Assembly Syntax: Rd32=maxu(Rs32,Rt32) + C Intrinsic Prototype: UWord32 Q6_R_maxu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_maxu_RR __builtin_HEXAGON_A2_maxu + +/* ========================================================================== + Assembly Syntax: Rdd32=maxu(Rss32,Rtt32) + C Intrinsic Prototype: UWord64 Q6_P_maxu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_maxu_PP __builtin_HEXAGON_A2_maxup + +/* ========================================================================== + Assembly Syntax: Rd32=min(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_min_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_min_RR __builtin_HEXAGON_A2_min + +/* ========================================================================== + Assembly Syntax: Rdd32=min(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_min_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_min_PP __builtin_HEXAGON_A2_minp + +/* ========================================================================== + Assembly Syntax: Rd32=minu(Rt32,Rs32) + C Intrinsic Prototype: UWord32 Q6_R_minu_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_minu_RR __builtin_HEXAGON_A2_minu + +/* ========================================================================== + Assembly Syntax: Rdd32=minu(Rtt32,Rss32) + C Intrinsic Prototype: UWord64 Q6_P_minu_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_minu_PP __builtin_HEXAGON_A2_minup + +/* ========================================================================== + Assembly Syntax: Rd32=neg(Rs32) + C Intrinsic Prototype: Word32 Q6_R_neg_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_neg_R __builtin_HEXAGON_A2_neg + +/* ========================================================================== + Assembly Syntax: Rdd32=neg(Rss32) + C Intrinsic Prototype: Word64 Q6_P_neg_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_neg_P __builtin_HEXAGON_A2_negp + +/* ========================================================================== + Assembly Syntax: Rd32=neg(Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_neg_R_sat(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_neg_R_sat __builtin_HEXAGON_A2_negsat + +/* ========================================================================== + Assembly Syntax: Rd32=not(Rs32) + C Intrinsic Prototype: Word32 Q6_R_not_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_not_R __builtin_HEXAGON_A2_not + +/* ========================================================================== + Assembly Syntax: Rdd32=not(Rss32) + C Intrinsic Prototype: Word64 Q6_P_not_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_not_P __builtin_HEXAGON_A2_notp + +/* ========================================================================== + Assembly Syntax: Rd32=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_or_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_or_RR __builtin_HEXAGON_A2_or + +/* ========================================================================== + Assembly Syntax: Rd32=or(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_or_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_or_RI __builtin_HEXAGON_A2_orir + +/* ========================================================================== + Assembly Syntax: Rdd32=or(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_or_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_or_PP __builtin_HEXAGON_A2_orp + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rss32):sat + C Intrinsic Prototype: Word32 Q6_R_round_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_P_sat __builtin_HEXAGON_A2_roundsat + +/* ========================================================================== + Assembly Syntax: Rd32=sat(Rss32) + C Intrinsic Prototype: Word32 Q6_R_sat_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sat_P __builtin_HEXAGON_A2_sat + +/* ========================================================================== + Assembly Syntax: Rd32=satb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_satb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_satb_R __builtin_HEXAGON_A2_satb + +/* ========================================================================== + Assembly Syntax: Rd32=sath(Rs32) + C Intrinsic Prototype: Word32 Q6_R_sath_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sath_R __builtin_HEXAGON_A2_sath + +/* ========================================================================== + Assembly Syntax: Rd32=satub(Rs32) + C Intrinsic Prototype: Word32 Q6_R_satub_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_satub_R __builtin_HEXAGON_A2_satub + +/* ========================================================================== + Assembly Syntax: Rd32=satuh(Rs32) + C Intrinsic Prototype: Word32 Q6_R_satuh_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_satuh_R __builtin_HEXAGON_A2_satuh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_sub_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sub_RR __builtin_HEXAGON_A2_sub + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRh_s16 __builtin_HEXAGON_A2_subh_h16_hh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRl_s16 __builtin_HEXAGON_A2_subh_h16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh_s16 __builtin_HEXAGON_A2_subh_h16_lh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl_s16 __builtin_HEXAGON_A2_subh_h16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRh_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_hh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRl_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_lh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh __builtin_HEXAGON_A2_subh_l16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl __builtin_HEXAGON_A2_subh_l16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h):sat + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh_sat __builtin_HEXAGON_A2_subh_l16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l):sat + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl_sat __builtin_HEXAGON_A2_subh_l16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rdd32=sub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_sub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_sub_PP __builtin_HEXAGON_A2_subp + +/* ========================================================================== + Assembly Syntax: Rd32=sub(#s10,Rs32) + C Intrinsic Prototype: Word32 Q6_R_sub_IR(Word32 Is10, Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sub_IR __builtin_HEXAGON_A2_subri + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32,Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_sub_RR_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sub_RR_sat __builtin_HEXAGON_A2_subsat + +/* ========================================================================== + Assembly Syntax: Rd32=vaddh(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_vaddh_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vaddh_RR __builtin_HEXAGON_A2_svaddh + +/* ========================================================================== + Assembly Syntax: Rd32=vaddh(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_vaddh_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vaddh_RR_sat __builtin_HEXAGON_A2_svaddhs + +/* ========================================================================== + Assembly Syntax: Rd32=vadduh(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_vadduh_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vadduh_RR_sat __builtin_HEXAGON_A2_svadduhs + +/* ========================================================================== + Assembly Syntax: Rd32=vavgh(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_vavgh_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vavgh_RR __builtin_HEXAGON_A2_svavgh + +/* ========================================================================== + Assembly Syntax: Rd32=vavgh(Rs32,Rt32):rnd + C Intrinsic Prototype: Word32 Q6_R_vavgh_RR_rnd(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vavgh_RR_rnd __builtin_HEXAGON_A2_svavghs + +/* ========================================================================== + Assembly Syntax: Rd32=vnavgh(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_vnavgh_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vnavgh_RR __builtin_HEXAGON_A2_svnavgh + +/* ========================================================================== + Assembly Syntax: Rd32=vsubh(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsubh_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vsubh_RR __builtin_HEXAGON_A2_svsubh + +/* ========================================================================== + Assembly Syntax: Rd32=vsubh(Rt32,Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_vsubh_RR_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vsubh_RR_sat __builtin_HEXAGON_A2_svsubhs + +/* ========================================================================== + Assembly Syntax: Rd32=vsubuh(Rt32,Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_vsubuh_RR_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vsubuh_RR_sat __builtin_HEXAGON_A2_svsubuhs + +/* ========================================================================== + Assembly Syntax: Rd32=swiz(Rs32) + C Intrinsic Prototype: Word32 Q6_R_swiz_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_swiz_R __builtin_HEXAGON_A2_swiz + +/* ========================================================================== + Assembly Syntax: Rd32=sxtb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_sxtb_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sxtb_R __builtin_HEXAGON_A2_sxtb + +/* ========================================================================== + Assembly Syntax: Rd32=sxth(Rs32) + C Intrinsic Prototype: Word32 Q6_R_sxth_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sxth_R __builtin_HEXAGON_A2_sxth + +/* ========================================================================== + Assembly Syntax: Rdd32=sxtw(Rs32) + C Intrinsic Prototype: Word64 Q6_P_sxtw_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_sxtw_R __builtin_HEXAGON_A2_sxtw + +/* ========================================================================== + Assembly Syntax: Rd32=Rs32 + C Intrinsic Prototype: Word32 Q6_R_equals_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_equals_R __builtin_HEXAGON_A2_tfr + +/* ========================================================================== + Assembly Syntax: Rx32.h=#u16 + C Intrinsic Prototype: Word32 Q6_Rh_equals_I(Word32 Rx, Word32 Iu16) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Rh_equals_I __builtin_HEXAGON_A2_tfrih + +/* ========================================================================== + Assembly Syntax: Rx32.l=#u16 + C Intrinsic Prototype: Word32 Q6_Rl_equals_I(Word32 Rx, Word32 Iu16) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Rl_equals_I __builtin_HEXAGON_A2_tfril + +/* ========================================================================== + Assembly Syntax: Rdd32=Rss32 + C Intrinsic Prototype: Word64 Q6_P_equals_P(Word64 Rss) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_equals_P __builtin_HEXAGON_A2_tfrp + +/* ========================================================================== + Assembly Syntax: Rdd32=#s8 + C Intrinsic Prototype: Word64 Q6_P_equals_I(Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_equals_I __builtin_HEXAGON_A2_tfrpi + +/* ========================================================================== + Assembly Syntax: Rd32=#s16 + C Intrinsic Prototype: Word32 Q6_R_equals_I(Word32 Is16) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_equals_I __builtin_HEXAGON_A2_tfrsi + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsh(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsh_P __builtin_HEXAGON_A2_vabsh + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsh(Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vabsh_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsh_P_sat __builtin_HEXAGON_A2_vabshsat + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsw(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsw_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsw_P __builtin_HEXAGON_A2_vabsw + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsw(Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vabsw_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsw_P_sat __builtin_HEXAGON_A2_vabswsat + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vaddb_PP __builtin_HEXAGON_A2_vaddb_map + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddh_PP __builtin_HEXAGON_A2_vaddh + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vaddh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddh_PP_sat __builtin_HEXAGON_A2_vaddhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddub_PP __builtin_HEXAGON_A2_vaddub + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddub(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vaddub_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddub_PP_sat __builtin_HEXAGON_A2_vaddubs + +/* ========================================================================== + Assembly Syntax: Rdd32=vadduh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vadduh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vadduh_PP_sat __builtin_HEXAGON_A2_vadduhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddw_PP __builtin_HEXAGON_A2_vaddw + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddw(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vaddw_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddw_PP_sat __builtin_HEXAGON_A2_vaddws + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavgh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgh_PP __builtin_HEXAGON_A2_vavgh + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgh(Rss32,Rtt32):crnd + C Intrinsic Prototype: Word64 Q6_P_vavgh_PP_crnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgh_PP_crnd __builtin_HEXAGON_A2_vavghcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgh(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavgh_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgh_PP_rnd __builtin_HEXAGON_A2_vavghr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavgub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgub_PP __builtin_HEXAGON_A2_vavgub + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgub(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavgub_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgub_PP_rnd __builtin_HEXAGON_A2_vavgubr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavguh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguh_PP __builtin_HEXAGON_A2_vavguh + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguh(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavguh_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguh_PP_rnd __builtin_HEXAGON_A2_vavguhr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavguw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguw_PP __builtin_HEXAGON_A2_vavguw + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguw(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavguw_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguw_PP_rnd __builtin_HEXAGON_A2_vavguwr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavgw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgw_PP __builtin_HEXAGON_A2_vavgw + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgw(Rss32,Rtt32):crnd + C Intrinsic Prototype: Word64 Q6_P_vavgw_PP_crnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgw_PP_crnd __builtin_HEXAGON_A2_vavgwcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgw(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavgw_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgw_PP_rnd __builtin_HEXAGON_A2_vavgwr + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpb_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_eq_PP __builtin_HEXAGON_A2_vcmpbeq + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gtu_PP __builtin_HEXAGON_A2_vcmpbgtu + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmph_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_eq_PP __builtin_HEXAGON_A2_vcmpheq + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmph_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gt_PP __builtin_HEXAGON_A2_vcmphgt + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmph_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gtu_PP __builtin_HEXAGON_A2_vcmphgtu + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpw_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_eq_PP __builtin_HEXAGON_A2_vcmpweq + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gt_PP __builtin_HEXAGON_A2_vcmpwgt + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gtu_PP __builtin_HEXAGON_A2_vcmpwgtu + +/* ========================================================================== + Assembly Syntax: Rdd32=vconj(Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vconj_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vconj_P_sat __builtin_HEXAGON_A2_vconj + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxb(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxb_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxb_PP __builtin_HEXAGON_A2_vmaxb + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxh_PP __builtin_HEXAGON_A2_vmaxh + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxub_PP __builtin_HEXAGON_A2_vmaxub + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxuh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxuh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxuh_PP __builtin_HEXAGON_A2_vmaxuh + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxuw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxuw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxuw_PP __builtin_HEXAGON_A2_vmaxuw + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxw_PP __builtin_HEXAGON_A2_vmaxw + +/* ========================================================================== + Assembly Syntax: Rdd32=vminb(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminb_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminb_PP __builtin_HEXAGON_A2_vminb + +/* ========================================================================== + Assembly Syntax: Rdd32=vminh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminh_PP __builtin_HEXAGON_A2_vminh + +/* ========================================================================== + Assembly Syntax: Rdd32=vminub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminub_PP __builtin_HEXAGON_A2_vminub + +/* ========================================================================== + Assembly Syntax: Rdd32=vminuh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminuh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminuh_PP __builtin_HEXAGON_A2_vminuh + +/* ========================================================================== + Assembly Syntax: Rdd32=vminuw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminuw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminuw_PP __builtin_HEXAGON_A2_vminuw + +/* ========================================================================== + Assembly Syntax: Rdd32=vminw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminw_PP __builtin_HEXAGON_A2_vminw + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgh_PP __builtin_HEXAGON_A2_vnavgh + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgh(Rtt32,Rss32):crnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP_crnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgh_PP_crnd_sat __builtin_HEXAGON_A2_vnavghcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgh(Rtt32,Rss32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP_rnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgh_PP_rnd_sat __builtin_HEXAGON_A2_vnavghr + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgw_PP __builtin_HEXAGON_A2_vnavgw + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgw(Rtt32,Rss32):crnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP_crnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgw_PP_crnd_sat __builtin_HEXAGON_A2_vnavgwcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgw(Rtt32,Rss32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP_rnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgw_PP_rnd_sat __builtin_HEXAGON_A2_vnavgwr + +/* ========================================================================== + Assembly Syntax: Rdd32=vraddub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vraddub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vraddub_PP __builtin_HEXAGON_A2_vraddub + +/* ========================================================================== + Assembly Syntax: Rxx32+=vraddub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vraddubacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vraddubacc_PP __builtin_HEXAGON_A2_vraddub_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vrsadub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrsadub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrsadub_PP __builtin_HEXAGON_A2_vrsadub + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrsadub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrsadubacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrsadubacc_PP __builtin_HEXAGON_A2_vrsadub_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vsubb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vsubb_PP __builtin_HEXAGON_A2_vsubb_map + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsubh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubh_PP __builtin_HEXAGON_A2_vsubh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubh(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubh_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubh_PP_sat __builtin_HEXAGON_A2_vsubhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsubub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubub_PP __builtin_HEXAGON_A2_vsubub + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubub(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubub_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubub_PP_sat __builtin_HEXAGON_A2_vsububs + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubuh(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubuh_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubuh_PP_sat __builtin_HEXAGON_A2_vsubuhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsubw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubw_PP __builtin_HEXAGON_A2_vsubw + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubw(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubw_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubw_PP_sat __builtin_HEXAGON_A2_vsubws + +/* ========================================================================== + Assembly Syntax: Rd32=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xor_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_xor_RR __builtin_HEXAGON_A2_xor + +/* ========================================================================== + Assembly Syntax: Rdd32=xor(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_xor_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_xor_PP __builtin_HEXAGON_A2_xorp + +/* ========================================================================== + Assembly Syntax: Rd32=zxtb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_zxtb_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_zxtb_R __builtin_HEXAGON_A2_zxtb + +/* ========================================================================== + Assembly Syntax: Rd32=zxth(Rs32) + C Intrinsic Prototype: Word32 Q6_R_zxth_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_zxth_R __builtin_HEXAGON_A2_zxth + +/* ========================================================================== + Assembly Syntax: Rd32=and(Rt32,~Rs32) + C Intrinsic Prototype: Word32 Q6_R_and_RnR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_and_RnR __builtin_HEXAGON_A4_andn + +/* ========================================================================== + Assembly Syntax: Rdd32=and(Rtt32,~Rss32) + C Intrinsic Prototype: Word64 Q6_P_and_PnP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_and_PnP __builtin_HEXAGON_A4_andnp + +/* ========================================================================== + Assembly Syntax: Rdd32=bitsplit(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_bitsplit_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_bitsplit_RR __builtin_HEXAGON_A4_bitsplit + +/* ========================================================================== + Assembly Syntax: Rdd32=bitsplit(Rs32,#u5) + C Intrinsic Prototype: Word64 Q6_P_bitsplit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_bitsplit_RI __builtin_HEXAGON_A4_bitspliti + +/* ========================================================================== + Assembly Syntax: Pd4=boundscheck(Rs32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_boundscheck_RP(Word32 Rs, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_boundscheck_RP __builtin_HEXAGON_A4_boundscheck + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmpb_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_eq_RR __builtin_HEXAGON_A4_cmpbeq + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.eq(Rs32,#u8) + C Intrinsic Prototype: Byte Q6_p_cmpb_eq_RI(Word32 Rs, Word32 Iu8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_eq_RI __builtin_HEXAGON_A4_cmpbeqi + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmpb_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gt_RR __builtin_HEXAGON_A4_cmpbgt + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gt(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmpb_gt_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gt_RI __builtin_HEXAGON_A4_cmpbgti + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmpb_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gtu_RR __builtin_HEXAGON_A4_cmpbgtu + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gtu(Rs32,#u7) + C Intrinsic Prototype: Byte Q6_p_cmpb_gtu_RI(Word32 Rs, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gtu_RI __builtin_HEXAGON_A4_cmpbgtui + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmph_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_eq_RR __builtin_HEXAGON_A4_cmpheq + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.eq(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmph_eq_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_eq_RI __builtin_HEXAGON_A4_cmpheqi + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmph_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gt_RR __builtin_HEXAGON_A4_cmphgt + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gt(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmph_gt_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gt_RI __builtin_HEXAGON_A4_cmphgti + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmph_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gtu_RR __builtin_HEXAGON_A4_cmphgtu + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gtu(Rs32,#u7) + C Intrinsic Prototype: Byte Q6_p_cmph_gtu_RI(Word32 Rs, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gtu_RI __builtin_HEXAGON_A4_cmphgtui + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(#s8,Rs32) + C Intrinsic Prototype: Word64 Q6_P_combine_IR(Word32 Is8, Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_IR __builtin_HEXAGON_A4_combineir + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(Rs32,#s8) + C Intrinsic Prototype: Word64 Q6_P_combine_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_RI __builtin_HEXAGON_A4_combineri + +/* ========================================================================== + Assembly Syntax: Rd32=cround(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_cround_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cround_RI __builtin_HEXAGON_A4_cround_ri + +/* ========================================================================== + Assembly Syntax: Rd32=cround(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_cround_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cround_RR __builtin_HEXAGON_A4_cround_rr + +/* ========================================================================== + Assembly Syntax: Rd32=modwrap(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_modwrap_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_modwrap_RR __builtin_HEXAGON_A4_modwrapu + +/* ========================================================================== + Assembly Syntax: Rd32=or(Rt32,~Rs32) + C Intrinsic Prototype: Word32 Q6_R_or_RnR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_or_RnR __builtin_HEXAGON_A4_orn + +/* ========================================================================== + Assembly Syntax: Rdd32=or(Rtt32,~Rss32) + C Intrinsic Prototype: Word64 Q6_P_or_PnP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_or_PnP __builtin_HEXAGON_A4_ornp + +/* ========================================================================== + Assembly Syntax: Rd32=cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_cmp_eq_RR __builtin_HEXAGON_A4_rcmpeq + +/* ========================================================================== + Assembly Syntax: Rd32=cmp.eq(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_cmp_eq_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_cmp_eq_RI __builtin_HEXAGON_A4_rcmpeqi + +/* ========================================================================== + Assembly Syntax: Rd32=!cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_not_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_not_cmp_eq_RR __builtin_HEXAGON_A4_rcmpneq + +/* ========================================================================== + Assembly Syntax: Rd32=!cmp.eq(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_not_cmp_eq_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_not_cmp_eq_RI __builtin_HEXAGON_A4_rcmpneqi + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_round_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RI __builtin_HEXAGON_A4_round_ri + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,#u5):sat + C Intrinsic Prototype: Word32 Q6_R_round_RI_sat(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RI_sat __builtin_HEXAGON_A4_round_ri_sat + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_round_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RR __builtin_HEXAGON_A4_round_rr + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_round_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RR_sat __builtin_HEXAGON_A4_round_rr_sat + +/* ========================================================================== + Assembly Syntax: Pd4=tlbmatch(Rss32,Rt32) + C Intrinsic Prototype: Byte Q6_p_tlbmatch_PR(Word64 Rss, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_tlbmatch_PR __builtin_HEXAGON_A4_tlbmatch + +/* ========================================================================== + Assembly Syntax: Pd4=any8(vcmpb.eq(Rss32,Rtt32)) + C Intrinsic Prototype: Byte Q6_p_any8_vcmpb_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_any8_vcmpb_eq_PP __builtin_HEXAGON_A4_vcmpbeq_any + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.eq(Rss32,#u8) + C Intrinsic Prototype: Byte Q6_p_vcmpb_eq_PI(Word64 Rss, Word32 Iu8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_eq_PI __builtin_HEXAGON_A4_vcmpbeqi + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gt_PP __builtin_HEXAGON_A4_vcmpbgt + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gt(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gt_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gt_PI __builtin_HEXAGON_A4_vcmpbgti + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gtu(Rss32,#u7) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gtu_PI(Word64 Rss, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gtu_PI __builtin_HEXAGON_A4_vcmpbgtui + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.eq(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmph_eq_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_eq_PI __builtin_HEXAGON_A4_vcmpheqi + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gt(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmph_gt_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gt_PI __builtin_HEXAGON_A4_vcmphgti + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gtu(Rss32,#u7) + C Intrinsic Prototype: Byte Q6_p_vcmph_gtu_PI(Word64 Rss, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gtu_PI __builtin_HEXAGON_A4_vcmphgtui + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.eq(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmpw_eq_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_eq_PI __builtin_HEXAGON_A4_vcmpweqi + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gt(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gt_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gt_PI __builtin_HEXAGON_A4_vcmpwgti + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gtu(Rss32,#u7) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gtu_PI(Word64 Rss, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gtu_PI __builtin_HEXAGON_A4_vcmpwgtui + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxh_PR __builtin_HEXAGON_A4_vrmaxh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxuh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxuh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxuh_PR __builtin_HEXAGON_A4_vrmaxuh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxuw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxuw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxuw_PR __builtin_HEXAGON_A4_vrmaxuw + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxw_PR __builtin_HEXAGON_A4_vrmaxw + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminh_PR __builtin_HEXAGON_A4_vrminh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminuh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminuh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminuh_PR __builtin_HEXAGON_A4_vrminuh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminuw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminuw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminuw_PR __builtin_HEXAGON_A4_vrminuw + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminw_PR __builtin_HEXAGON_A4_vrminw + +/* ========================================================================== + Assembly Syntax: Rd32=vaddhub(Rss32,Rtt32):sat + C Intrinsic Prototype: Word32 Q6_R_vaddhub_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vaddhub_PP_sat __builtin_HEXAGON_A5_vaddhubs + +/* ========================================================================== + Assembly Syntax: Pd4=all8(Ps4) + C Intrinsic Prototype: Byte Q6_p_all8_p(Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_all8_p __builtin_HEXAGON_C2_all8 + +/* ========================================================================== + Assembly Syntax: Pd4=and(Pt4,Ps4) + C Intrinsic Prototype: Byte Q6_p_and_pp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_pp __builtin_HEXAGON_C2_and + +/* ========================================================================== + Assembly Syntax: Pd4=and(Pt4,!Ps4) + C Intrinsic Prototype: Byte Q6_p_and_pnp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_pnp __builtin_HEXAGON_C2_andn + +/* ========================================================================== + Assembly Syntax: Pd4=any8(Ps4) + C Intrinsic Prototype: Byte Q6_p_any8_p(Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_any8_p __builtin_HEXAGON_C2_any8 + +/* ========================================================================== + Assembly Syntax: Pd4=bitsclr(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_bitsclr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_bitsclr_RR __builtin_HEXAGON_C2_bitsclr + +/* ========================================================================== + Assembly Syntax: Pd4=bitsclr(Rs32,#u6) + C Intrinsic Prototype: Byte Q6_p_bitsclr_RI(Word32 Rs, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_bitsclr_RI __builtin_HEXAGON_C2_bitsclri + +/* ========================================================================== + Assembly Syntax: Pd4=bitsset(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_bitsset_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_bitsset_RR __builtin_HEXAGON_C2_bitsset + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_eq_RR __builtin_HEXAGON_C2_cmpeq + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.eq(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_cmp_eq_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_eq_RI __builtin_HEXAGON_C2_cmpeqi + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_cmp_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmp_eq_PP __builtin_HEXAGON_C2_cmpeqp + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.ge(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmp_ge_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_ge_RI __builtin_HEXAGON_C2_cmpgei + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.geu(Rs32,#u8) + C Intrinsic Prototype: Byte Q6_p_cmp_geu_RI(Word32 Rs, Word32 Iu8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_geu_RI __builtin_HEXAGON_C2_cmpgeui + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gt_RR __builtin_HEXAGON_C2_cmpgt + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gt(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_cmp_gt_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gt_RI __builtin_HEXAGON_C2_cmpgti + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmp_gt_PP __builtin_HEXAGON_C2_cmpgtp + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gtu_RR __builtin_HEXAGON_C2_cmpgtu + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gtu(Rs32,#u9) + C Intrinsic Prototype: Byte Q6_p_cmp_gtu_RI(Word32 Rs, Word32 Iu9) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gtu_RI __builtin_HEXAGON_C2_cmpgtui + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmp_gtu_PP __builtin_HEXAGON_C2_cmpgtup + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.lt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_lt_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_lt_RR __builtin_HEXAGON_C2_cmplt + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.ltu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_ltu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_ltu_RR __builtin_HEXAGON_C2_cmpltu + +/* ========================================================================== + Assembly Syntax: Rdd32=mask(Pt4) + C Intrinsic Prototype: Word64 Q6_P_mask_p(Byte Pt) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mask_p __builtin_HEXAGON_C2_mask + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mux_pRR(Byte Pu, Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pRR __builtin_HEXAGON_C2_mux + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,#s8,#S8) + C Intrinsic Prototype: Word32 Q6_R_mux_pII(Byte Pu, Word32 Is8, Word32 IS8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pII __builtin_HEXAGON_C2_muxii + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_mux_pRI(Byte Pu, Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pRI __builtin_HEXAGON_C2_muxir + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,#s8,Rs32) + C Intrinsic Prototype: Word32 Q6_R_mux_pIR(Byte Pu, Word32 Is8, Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pIR __builtin_HEXAGON_C2_muxri + +/* ========================================================================== + Assembly Syntax: Pd4=not(Ps4) + C Intrinsic Prototype: Byte Q6_p_not_p(Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_p __builtin_HEXAGON_C2_not + +/* ========================================================================== + Assembly Syntax: Pd4=or(Pt4,Ps4) + C Intrinsic Prototype: Byte Q6_p_or_pp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_pp __builtin_HEXAGON_C2_or + +/* ========================================================================== + Assembly Syntax: Pd4=or(Pt4,!Ps4) + C Intrinsic Prototype: Byte Q6_p_or_pnp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_pnp __builtin_HEXAGON_C2_orn + +/* ========================================================================== + Assembly Syntax: Pd4=Ps4 + C Intrinsic Prototype: Byte Q6_p_equals_p(Byte Ps) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_equals_p __builtin_HEXAGON_C2_pxfer_map + +/* ========================================================================== + Assembly Syntax: Rd32=Ps4 + C Intrinsic Prototype: Word32 Q6_R_equals_p(Byte Ps) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_equals_p __builtin_HEXAGON_C2_tfrpr + +/* ========================================================================== + Assembly Syntax: Pd4=Rs32 + C Intrinsic Prototype: Byte Q6_p_equals_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_equals_R __builtin_HEXAGON_C2_tfrrp + +/* ========================================================================== + Assembly Syntax: Rd32=vitpack(Ps4,Pt4) + C Intrinsic Prototype: Word32 Q6_R_vitpack_pp(Byte Ps, Byte Pt) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vitpack_pp __builtin_HEXAGON_C2_vitpack + +/* ========================================================================== + Assembly Syntax: Rdd32=vmux(Pu4,Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vmux_pPP(Byte Pu, Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmux_pPP __builtin_HEXAGON_C2_vmux + +/* ========================================================================== + Assembly Syntax: Pd4=xor(Ps4,Pt4) + C Intrinsic Prototype: Byte Q6_p_xor_pp(Byte Ps, Byte Pt) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_xor_pp __builtin_HEXAGON_C2_xor + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,and(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_and_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_and_ppp __builtin_HEXAGON_C4_and_and + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,and(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_and_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_and_ppnp __builtin_HEXAGON_C4_and_andn + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,or(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_or_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_or_ppp __builtin_HEXAGON_C4_and_or + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,or(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_or_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_or_ppnp __builtin_HEXAGON_C4_and_orn + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gt_RR __builtin_HEXAGON_C4_cmplte + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gt(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gt_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gt_RI __builtin_HEXAGON_C4_cmpltei + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gtu_RR __builtin_HEXAGON_C4_cmplteu + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gtu(Rs32,#u9) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gtu_RI(Word32 Rs, Word32 Iu9) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gtu_RI __builtin_HEXAGON_C4_cmplteui + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_eq_RR __builtin_HEXAGON_C4_cmpneq + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.eq(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_not_cmp_eq_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_eq_RI __builtin_HEXAGON_C4_cmpneqi + +/* ========================================================================== + Assembly Syntax: Pd4=fastcorner9(Ps4,Pt4) + C Intrinsic Prototype: Byte Q6_p_fastcorner9_pp(Byte Ps, Byte Pt) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_fastcorner9_pp __builtin_HEXAGON_C4_fastcorner9 + +/* ========================================================================== + Assembly Syntax: Pd4=!fastcorner9(Ps4,Pt4) + C Intrinsic Prototype: Byte Q6_p_not_fastcorner9_pp(Byte Ps, Byte Pt) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_fastcorner9_pp __builtin_HEXAGON_C4_fastcorner9_not + +/* ========================================================================== + Assembly Syntax: Pd4=!bitsclr(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_bitsclr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_bitsclr_RR __builtin_HEXAGON_C4_nbitsclr + +/* ========================================================================== + Assembly Syntax: Pd4=!bitsclr(Rs32,#u6) + C Intrinsic Prototype: Byte Q6_p_not_bitsclr_RI(Word32 Rs, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_bitsclr_RI __builtin_HEXAGON_C4_nbitsclri + +/* ========================================================================== + Assembly Syntax: Pd4=!bitsset(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_bitsset_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_bitsset_RR __builtin_HEXAGON_C4_nbitsset + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,and(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_and_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_and_ppp __builtin_HEXAGON_C4_or_and + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,and(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_and_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_and_ppnp __builtin_HEXAGON_C4_or_andn + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,or(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_or_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_or_ppp __builtin_HEXAGON_C4_or_or + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,or(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_or_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_or_ppnp __builtin_HEXAGON_C4_or_orn + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_d2df(Rss32) + C Intrinsic Prototype: Float64 Q6_P_convert_d2df_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_d2df_P __builtin_HEXAGON_F2_conv_d2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_d2sf(Rss32) + C Intrinsic Prototype: Float32 Q6_R_convert_d2sf_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_d2sf_P __builtin_HEXAGON_F2_conv_d2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2d(Rss32) + C Intrinsic Prototype: Word64 Q6_P_convert_df2d_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2d_P __builtin_HEXAGON_F2_conv_df2d + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2d(Rss32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_df2d_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2d_P_chop __builtin_HEXAGON_F2_conv_df2d_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2sf(Rss32) + C Intrinsic Prototype: Float32 Q6_R_convert_df2sf_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2sf_P __builtin_HEXAGON_F2_conv_df2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2ud(Rss32) + C Intrinsic Prototype: Word64 Q6_P_convert_df2ud_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2ud_P __builtin_HEXAGON_F2_conv_df2ud + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2ud(Rss32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_df2ud_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2ud_P_chop __builtin_HEXAGON_F2_conv_df2ud_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2uw(Rss32) + C Intrinsic Prototype: Word32 Q6_R_convert_df2uw_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2uw_P __builtin_HEXAGON_F2_conv_df2uw + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2uw(Rss32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_df2uw_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2uw_P_chop __builtin_HEXAGON_F2_conv_df2uw_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2w(Rss32) + C Intrinsic Prototype: Word32 Q6_R_convert_df2w_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2w_P __builtin_HEXAGON_F2_conv_df2w + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2w(Rss32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_df2w_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2w_P_chop __builtin_HEXAGON_F2_conv_df2w_chop + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2d(Rs32) + C Intrinsic Prototype: Word64 Q6_P_convert_sf2d_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2d_R __builtin_HEXAGON_F2_conv_sf2d + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2d(Rs32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_sf2d_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2d_R_chop __builtin_HEXAGON_F2_conv_sf2d_chop + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2df(Rs32) + C Intrinsic Prototype: Float64 Q6_P_convert_sf2df_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2df_R __builtin_HEXAGON_F2_conv_sf2df + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2ud(Rs32) + C Intrinsic Prototype: Word64 Q6_P_convert_sf2ud_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2ud_R __builtin_HEXAGON_F2_conv_sf2ud + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2ud(Rs32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_sf2ud_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2ud_R_chop __builtin_HEXAGON_F2_conv_sf2ud_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2uw(Rs32) + C Intrinsic Prototype: Word32 Q6_R_convert_sf2uw_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2uw_R __builtin_HEXAGON_F2_conv_sf2uw + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2uw(Rs32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_sf2uw_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2uw_R_chop __builtin_HEXAGON_F2_conv_sf2uw_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2w(Rs32) + C Intrinsic Prototype: Word32 Q6_R_convert_sf2w_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2w_R __builtin_HEXAGON_F2_conv_sf2w + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2w(Rs32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_sf2w_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2w_R_chop __builtin_HEXAGON_F2_conv_sf2w_chop + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_ud2df(Rss32) + C Intrinsic Prototype: Float64 Q6_P_convert_ud2df_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_ud2df_P __builtin_HEXAGON_F2_conv_ud2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_ud2sf(Rss32) + C Intrinsic Prototype: Float32 Q6_R_convert_ud2sf_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_ud2sf_P __builtin_HEXAGON_F2_conv_ud2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_uw2df(Rs32) + C Intrinsic Prototype: Float64 Q6_P_convert_uw2df_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_uw2df_R __builtin_HEXAGON_F2_conv_uw2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_uw2sf(Rs32) + C Intrinsic Prototype: Float32 Q6_R_convert_uw2sf_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_uw2sf_R __builtin_HEXAGON_F2_conv_uw2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_w2df(Rs32) + C Intrinsic Prototype: Float64 Q6_P_convert_w2df_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_w2df_R __builtin_HEXAGON_F2_conv_w2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_w2sf(Rs32) + C Intrinsic Prototype: Float32 Q6_R_convert_w2sf_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_w2sf_R __builtin_HEXAGON_F2_conv_w2sf + +/* ========================================================================== + Assembly Syntax: Pd4=dfclass(Rss32,#u5) + C Intrinsic Prototype: Byte Q6_p_dfclass_PI(Float64 Rss, Word32 Iu5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfclass_PI __builtin_HEXAGON_F2_dfclass + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_eq_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_eq_PP __builtin_HEXAGON_F2_dfcmpeq + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.ge(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_ge_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_ge_PP __builtin_HEXAGON_F2_dfcmpge + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_gt_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_gt_PP __builtin_HEXAGON_F2_dfcmpgt + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.uo(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_uo_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_uo_PP __builtin_HEXAGON_F2_dfcmpuo + +/* ========================================================================== + Assembly Syntax: Rdd32=dfmake(#u10):neg + C Intrinsic Prototype: Float64 Q6_P_dfmake_I_neg(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmake_I_neg __builtin_HEXAGON_F2_dfimm_n + +/* ========================================================================== + Assembly Syntax: Rdd32=dfmake(#u10):pos + C Intrinsic Prototype: Float64 Q6_P_dfmake_I_pos(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmake_I_pos __builtin_HEXAGON_F2_dfimm_p + +/* ========================================================================== + Assembly Syntax: Rd32=sfadd(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfadd_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfadd_RR __builtin_HEXAGON_F2_sfadd + +/* ========================================================================== + Assembly Syntax: Pd4=sfclass(Rs32,#u5) + C Intrinsic Prototype: Byte Q6_p_sfclass_RI(Float32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfclass_RI __builtin_HEXAGON_F2_sfclass + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_eq_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_eq_RR __builtin_HEXAGON_F2_sfcmpeq + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.ge(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_ge_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_ge_RR __builtin_HEXAGON_F2_sfcmpge + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_gt_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_gt_RR __builtin_HEXAGON_F2_sfcmpgt + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.uo(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_uo_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_uo_RR __builtin_HEXAGON_F2_sfcmpuo + +/* ========================================================================== + Assembly Syntax: Rd32=sffixupd(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sffixupd_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sffixupd_RR __builtin_HEXAGON_F2_sffixupd + +/* ========================================================================== + Assembly Syntax: Rd32=sffixupn(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sffixupn_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sffixupn_RR __builtin_HEXAGON_F2_sffixupn + +/* ========================================================================== + Assembly Syntax: Rd32=sffixupr(Rs32) + C Intrinsic Prototype: Float32 Q6_R_sffixupr_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sffixupr_R __builtin_HEXAGON_F2_sffixupr + +/* ========================================================================== + Assembly Syntax: Rx32+=sfmpy(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RR(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpyacc_RR __builtin_HEXAGON_F2_sffma + +/* ========================================================================== + Assembly Syntax: Rx32+=sfmpy(Rs32,Rt32):lib + C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RR_lib(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpyacc_RR_lib __builtin_HEXAGON_F2_sffma_lib + +/* ========================================================================== + Assembly Syntax: Rx32+=sfmpy(Rs32,Rt32,Pu4):scale + C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RRp_scale(Float32 Rx, Float32 Rs, Float32 Rt, Byte Pu) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpyacc_RRp_scale __builtin_HEXAGON_F2_sffma_sc + +/* ========================================================================== + Assembly Syntax: Rx32-=sfmpy(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmpynac_RR(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpynac_RR __builtin_HEXAGON_F2_sffms + +/* ========================================================================== + Assembly Syntax: Rx32-=sfmpy(Rs32,Rt32):lib + C Intrinsic Prototype: Float32 Q6_R_sfmpynac_RR_lib(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpynac_RR_lib __builtin_HEXAGON_F2_sffms_lib + +/* ========================================================================== + Assembly Syntax: Rd32=sfmake(#u10):neg + C Intrinsic Prototype: Float32 Q6_R_sfmake_I_neg(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmake_I_neg __builtin_HEXAGON_F2_sfimm_n + +/* ========================================================================== + Assembly Syntax: Rd32=sfmake(#u10):pos + C Intrinsic Prototype: Float32 Q6_R_sfmake_I_pos(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmake_I_pos __builtin_HEXAGON_F2_sfimm_p + +/* ========================================================================== + Assembly Syntax: Rd32=sfmax(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmax_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmax_RR __builtin_HEXAGON_F2_sfmax + +/* ========================================================================== + Assembly Syntax: Rd32=sfmin(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmin_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmin_RR __builtin_HEXAGON_F2_sfmin + +/* ========================================================================== + Assembly Syntax: Rd32=sfmpy(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmpy_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpy_RR __builtin_HEXAGON_F2_sfmpy + +/* ========================================================================== + Assembly Syntax: Rd32=sfsub(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfsub_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfsub_RR __builtin_HEXAGON_F2_sfsub + +/* ========================================================================== + Assembly Syntax: Rd32=memb(Rx32++#s4:0:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memb_IM_circ(void** Rx, Word32 Is4_0, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memb_IM_circ __builtin_HEXAGON_L2_loadrb_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memb(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memb_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memb_M_circ __builtin_HEXAGON_L2_loadrb_pcr + +/* ========================================================================== + Assembly Syntax: Rdd32=memd(Rx32++#s4:3:circ(Mu2)) + C Intrinsic Prototype: Word64 Q6_P_memd_IM_circ(void** Rx, Word32 Is4_3, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_P_memd_IM_circ __builtin_HEXAGON_L2_loadrd_pci + +/* ========================================================================== + Assembly Syntax: Rdd32=memd(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word64 Q6_P_memd_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_P_memd_M_circ __builtin_HEXAGON_L2_loadrd_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memh(Rx32++#s4:1:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memh_IM_circ(void** Rx, Word32 Is4_1, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memh_IM_circ __builtin_HEXAGON_L2_loadrh_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memh(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memh_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memh_M_circ __builtin_HEXAGON_L2_loadrh_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memw(Rx32++#s4:2:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memw_IM_circ(void** Rx, Word32 Is4_2, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memw_IM_circ __builtin_HEXAGON_L2_loadri_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memw(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memw_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memw_M_circ __builtin_HEXAGON_L2_loadri_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memub(Rx32++#s4:0:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memub_IM_circ(void** Rx, Word32 Is4_0, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memub_IM_circ __builtin_HEXAGON_L2_loadrub_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memub(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memub_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memub_M_circ __builtin_HEXAGON_L2_loadrub_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memuh(Rx32++#s4:1:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memuh_IM_circ(void** Rx, Word32 Is4_1, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memuh_IM_circ __builtin_HEXAGON_L2_loadruh_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memuh(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memuh_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memuh_M_circ __builtin_HEXAGON_L2_loadruh_pcr + +/* ========================================================================== + Assembly Syntax: Rx32+=add(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_addacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addacc_RR __builtin_HEXAGON_M2_acci + +/* ========================================================================== + Assembly Syntax: Rx32+=add(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_addacc_RI(Word32 Rx, Word32 Rs, Word32 Is8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addacc_RI __builtin_HEXAGON_M2_accii + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyi(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyiacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyiacc_RR __builtin_HEXAGON_M2_cmaci_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyr(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyracc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyracc_RR __builtin_HEXAGON_M2_cmacr_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_sat __builtin_HEXAGON_M2_cmacs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_s1_sat __builtin_HEXAGON_M2_cmacs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32*):sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_conj_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_conj_sat __builtin_HEXAGON_M2_cmacsc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32*):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_conj_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_conj_s1_sat __builtin_HEXAGON_M2_cmacsc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyi(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyi_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyi_RR __builtin_HEXAGON_M2_cmpyi_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyr(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyr_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyr_RR __builtin_HEXAGON_M2_cmpyr_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_rnd_sat __builtin_HEXAGON_M2_cmpyrs_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_s1_rnd_sat __builtin_HEXAGON_M2_cmpyrs_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32*):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_conj_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_conj_rnd_sat __builtin_HEXAGON_M2_cmpyrsc_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_conj_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_conj_s1_rnd_sat __builtin_HEXAGON_M2_cmpyrsc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_sat __builtin_HEXAGON_M2_cmpys_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_s1_sat __builtin_HEXAGON_M2_cmpys_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32*):sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_conj_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_conj_sat __builtin_HEXAGON_M2_cmpysc_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32*):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_conj_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_conj_s1_sat __builtin_HEXAGON_M2_cmpysc_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_sat __builtin_HEXAGON_M2_cnacs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_s1_sat __builtin_HEXAGON_M2_cnacs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32*):sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_conj_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_conj_sat __builtin_HEXAGON_M2_cnacsc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32*):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_conj_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_conj_s1_sat __builtin_HEXAGON_M2_cnacsc_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RR __builtin_HEXAGON_M2_dpmpyss_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RR __builtin_HEXAGON_M2_dpmpyss_nac_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RR_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR_rnd __builtin_HEXAGON_M2_dpmpyss_rnd_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpy_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RR __builtin_HEXAGON_M2_dpmpyss_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RR __builtin_HEXAGON_M2_dpmpyuu_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RR __builtin_HEXAGON_M2_dpmpyuu_nac_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32,Rt32) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RR __builtin_HEXAGON_M2_dpmpyuu_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRh_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRh_s1_rnd_sat __builtin_HEXAGON_M2_hmmpyh_rs1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRh_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRh_s1_sat __builtin_HEXAGON_M2_hmmpyh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.l):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRl_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRl_s1_rnd_sat __builtin_HEXAGON_M2_hmmpyl_rs1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRl_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRl_s1_sat __builtin_HEXAGON_M2_hmmpyl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyi(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyiacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyiacc_RR __builtin_HEXAGON_M2_maci + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyi(Rs32,#u8) + C Intrinsic Prototype: Word32 Q6_R_mpyinac_RI(Word32 Rx, Word32 Rs, Word32 Iu8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyinac_RI __builtin_HEXAGON_M2_macsin + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyi(Rs32,#u8) + C Intrinsic Prototype: Word32 Q6_R_mpyiacc_RI(Word32 Rx, Word32 Rs, Word32 Iu8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyiacc_RI __builtin_HEXAGON_M2_macsip + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_rnd_sat __builtin_HEXAGON_M2_mmachs_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmachs_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_sat __builtin_HEXAGON_M2_mmachs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_s1_sat __builtin_HEXAGON_M2_mmachs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_rnd_sat __builtin_HEXAGON_M2_mmacls_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmacls_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_sat __builtin_HEXAGON_M2_mmacls_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_s1_sat __builtin_HEXAGON_M2_mmacls_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_rnd_sat __builtin_HEXAGON_M2_mmacuhs_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmacuhs_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_sat __builtin_HEXAGON_M2_mmacuhs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_s1_sat __builtin_HEXAGON_M2_mmacuhs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_rnd_sat __builtin_HEXAGON_M2_mmaculs_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmaculs_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_sat __builtin_HEXAGON_M2_mmaculs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_s1_sat __builtin_HEXAGON_M2_mmaculs_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyh_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyh_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_sat __builtin_HEXAGON_M2_mmpyh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_s1_sat __builtin_HEXAGON_M2_mmpyh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyl_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyl_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_sat __builtin_HEXAGON_M2_mmpyl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_s1_sat __builtin_HEXAGON_M2_mmpyl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyuh_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyuh_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_sat __builtin_HEXAGON_M2_mmpyuh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_s1_sat __builtin_HEXAGON_M2_mmpyuh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyul_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyul_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_sat __builtin_HEXAGON_M2_mmpyul_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_s1_sat __builtin_HEXAGON_M2_mmpyul_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh __builtin_HEXAGON_M2_mpy_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh_s1 __builtin_HEXAGON_M2_mpy_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl __builtin_HEXAGON_M2_mpy_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl_s1 __builtin_HEXAGON_M2_mpy_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh __builtin_HEXAGON_M2_mpy_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh_s1 __builtin_HEXAGON_M2_mpy_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl __builtin_HEXAGON_M2_mpy_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl_s1 __builtin_HEXAGON_M2_mpy_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh_sat __builtin_HEXAGON_M2_mpy_acc_sat_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl_sat __builtin_HEXAGON_M2_mpy_acc_sat_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh_sat __builtin_HEXAGON_M2_mpy_acc_sat_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl_sat __builtin_HEXAGON_M2_mpy_acc_sat_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh __builtin_HEXAGON_M2_mpy_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1 __builtin_HEXAGON_M2_mpy_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl __builtin_HEXAGON_M2_mpy_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1 __builtin_HEXAGON_M2_mpy_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh __builtin_HEXAGON_M2_mpy_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1 __builtin_HEXAGON_M2_mpy_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl __builtin_HEXAGON_M2_mpy_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1 __builtin_HEXAGON_M2_mpy_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh __builtin_HEXAGON_M2_mpy_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh_s1 __builtin_HEXAGON_M2_mpy_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl __builtin_HEXAGON_M2_mpy_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl_s1 __builtin_HEXAGON_M2_mpy_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh __builtin_HEXAGON_M2_mpy_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh_s1 __builtin_HEXAGON_M2_mpy_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl __builtin_HEXAGON_M2_mpy_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl_s1 __builtin_HEXAGON_M2_mpy_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh_sat __builtin_HEXAGON_M2_mpy_nac_sat_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl_sat __builtin_HEXAGON_M2_mpy_nac_sat_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh_sat __builtin_HEXAGON_M2_mpy_nac_sat_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl_sat __builtin_HEXAGON_M2_mpy_nac_sat_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_rnd __builtin_HEXAGON_M2_mpy_rnd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_rnd __builtin_HEXAGON_M2_mpy_rnd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_rnd __builtin_HEXAGON_M2_mpy_rnd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_rnd __builtin_HEXAGON_M2_mpy_rnd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_sat __builtin_HEXAGON_M2_mpy_sat_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_sat_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_sat __builtin_HEXAGON_M2_mpy_sat_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_sat_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_sat __builtin_HEXAGON_M2_mpy_sat_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_sat_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_sat __builtin_HEXAGON_M2_mpy_sat_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_sat_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpy_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR __builtin_HEXAGON_M2_mpy_up + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RR_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR_s1 __builtin_HEXAGON_M2_mpy_up_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR_s1_sat __builtin_HEXAGON_M2_mpy_up_s1_sat + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRh __builtin_HEXAGON_M2_mpyd_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRh_s1 __builtin_HEXAGON_M2_mpyd_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRl __builtin_HEXAGON_M2_mpyd_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRl_s1 __builtin_HEXAGON_M2_mpyd_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRh __builtin_HEXAGON_M2_mpyd_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRh_s1 __builtin_HEXAGON_M2_mpyd_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRl __builtin_HEXAGON_M2_mpyd_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRl_s1 __builtin_HEXAGON_M2_mpyd_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh __builtin_HEXAGON_M2_mpyd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh_s1 __builtin_HEXAGON_M2_mpyd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl __builtin_HEXAGON_M2_mpyd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl_s1 __builtin_HEXAGON_M2_mpyd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh __builtin_HEXAGON_M2_mpyd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh_s1 __builtin_HEXAGON_M2_mpyd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl __builtin_HEXAGON_M2_mpyd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl_s1 __builtin_HEXAGON_M2_mpyd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRh __builtin_HEXAGON_M2_mpyd_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRh_s1 __builtin_HEXAGON_M2_mpyd_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRl __builtin_HEXAGON_M2_mpyd_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRl_s1 __builtin_HEXAGON_M2_mpyd_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRh __builtin_HEXAGON_M2_mpyd_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRh_s1 __builtin_HEXAGON_M2_mpyd_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRl __builtin_HEXAGON_M2_mpyd_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRl_s1 __builtin_HEXAGON_M2_mpyd_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh_rnd __builtin_HEXAGON_M2_mpyd_rnd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl_rnd __builtin_HEXAGON_M2_mpyd_rnd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh_rnd __builtin_HEXAGON_M2_mpyd_rnd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl_rnd __builtin_HEXAGON_M2_mpyd_rnd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyi(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyi_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyi_RR __builtin_HEXAGON_M2_mpyi + +/* ========================================================================== + Assembly Syntax: Rd32=mpyi(Rs32,#m9) + C Intrinsic Prototype: Word32 Q6_R_mpyi_RI(Word32 Rs, Word32 Im9) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mpyi_RI __builtin_HEXAGON_M2_mpysmi + +/* ========================================================================== + Assembly Syntax: Rd32=mpysu(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpysu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpysu_RR __builtin_HEXAGON_M2_mpysu_up + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRh __builtin_HEXAGON_M2_mpyu_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRh_s1 __builtin_HEXAGON_M2_mpyu_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRl __builtin_HEXAGON_M2_mpyu_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRl_s1 __builtin_HEXAGON_M2_mpyu_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRh __builtin_HEXAGON_M2_mpyu_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRh_s1 __builtin_HEXAGON_M2_mpyu_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRl __builtin_HEXAGON_M2_mpyu_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRl_s1 __builtin_HEXAGON_M2_mpyu_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRh __builtin_HEXAGON_M2_mpyu_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRh_s1 __builtin_HEXAGON_M2_mpyu_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRl __builtin_HEXAGON_M2_mpyu_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRl_s1 __builtin_HEXAGON_M2_mpyu_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRh __builtin_HEXAGON_M2_mpyu_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRh_s1 __builtin_HEXAGON_M2_mpyu_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRl __builtin_HEXAGON_M2_mpyu_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRl_s1 __builtin_HEXAGON_M2_mpyu_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRh __builtin_HEXAGON_M2_mpyu_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRh_s1 __builtin_HEXAGON_M2_mpyu_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRl __builtin_HEXAGON_M2_mpyu_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRl_s1 __builtin_HEXAGON_M2_mpyu_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRh __builtin_HEXAGON_M2_mpyu_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRh_s1 __builtin_HEXAGON_M2_mpyu_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRl __builtin_HEXAGON_M2_mpyu_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRl_s1 __builtin_HEXAGON_M2_mpyu_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32,Rt32) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RR __builtin_HEXAGON_M2_mpyu_up + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRh __builtin_HEXAGON_M2_mpyud_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRh_s1 __builtin_HEXAGON_M2_mpyud_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRl __builtin_HEXAGON_M2_mpyud_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRl_s1 __builtin_HEXAGON_M2_mpyud_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRh __builtin_HEXAGON_M2_mpyud_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRh_s1 __builtin_HEXAGON_M2_mpyud_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRl __builtin_HEXAGON_M2_mpyud_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRl_s1 __builtin_HEXAGON_M2_mpyud_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRh __builtin_HEXAGON_M2_mpyud_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRh_s1 __builtin_HEXAGON_M2_mpyud_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRl __builtin_HEXAGON_M2_mpyud_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRl_s1 __builtin_HEXAGON_M2_mpyud_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRh __builtin_HEXAGON_M2_mpyud_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRh_s1 __builtin_HEXAGON_M2_mpyud_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRl __builtin_HEXAGON_M2_mpyud_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRl_s1 __builtin_HEXAGON_M2_mpyud_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRh __builtin_HEXAGON_M2_mpyud_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRh_s1 __builtin_HEXAGON_M2_mpyud_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRl __builtin_HEXAGON_M2_mpyud_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRl_s1 __builtin_HEXAGON_M2_mpyud_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRh __builtin_HEXAGON_M2_mpyud_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRh_s1 __builtin_HEXAGON_M2_mpyud_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRl __builtin_HEXAGON_M2_mpyud_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRl_s1 __builtin_HEXAGON_M2_mpyud_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyui(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyui_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mpyui_RR __builtin_HEXAGON_M2_mpyui + +/* ========================================================================== + Assembly Syntax: Rx32-=add(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_addnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addnac_RR __builtin_HEXAGON_M2_nacci + +/* ========================================================================== + Assembly Syntax: Rx32-=add(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_addnac_RI(Word32 Rx, Word32 Rs, Word32 Is8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addnac_RI __builtin_HEXAGON_M2_naccii + +/* ========================================================================== + Assembly Syntax: Rx32+=sub(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_subacc_RR(Word32 Rx, Word32 Rt, Word32 Rs) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_subacc_RR __builtin_HEXAGON_M2_subacc + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffh_PP __builtin_HEXAGON_M2_vabsdiffh + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffw_PP __builtin_HEXAGON_M2_vabsdiffw + +/* ========================================================================== + Assembly Syntax: Rxx32+=vcmpyi(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyiacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyiacc_PP_sat __builtin_HEXAGON_M2_vcmac_s0_sat_i + +/* ========================================================================== + Assembly Syntax: Rxx32+=vcmpyr(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyracc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyracc_PP_sat __builtin_HEXAGON_M2_vcmac_s0_sat_r + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyi(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyi_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyi_PP_sat __builtin_HEXAGON_M2_vcmpy_s0_sat_i + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyr(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyr_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyr_PP_sat __builtin_HEXAGON_M2_vcmpy_s0_sat_r + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyi(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyi_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyi_PP_s1_sat __builtin_HEXAGON_M2_vcmpy_s1_sat_i + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyr(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyr_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyr_PP_s1_sat __builtin_HEXAGON_M2_vcmpy_s1_sat_r + +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpy(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpyacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpyacc_PP_sat __builtin_HEXAGON_M2_vdmacs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpy(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vdmpyacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpyacc_PP_s1_sat __builtin_HEXAGON_M2_vdmacs_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vdmpy(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vdmpy_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vdmpy_PP_rnd_sat __builtin_HEXAGON_M2_vdmpyrs_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=vdmpy(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vdmpy_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vdmpy_PP_s1_rnd_sat __builtin_HEXAGON_M2_vdmpyrs_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpy(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpy_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpy_PP_sat __builtin_HEXAGON_M2_vdmpys_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpy(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vdmpy_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpy_PP_s1_sat __builtin_HEXAGON_M2_vdmpys_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyh(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpyhacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhacc_RR __builtin_HEXAGON_M2_vmac2 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyeh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vmpyehacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyehacc_PP __builtin_HEXAGON_M2_vmac2es + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyeh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyehacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyehacc_PP_sat __builtin_HEXAGON_M2_vmac2es_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyeh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyehacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyehacc_PP_s1_sat __builtin_HEXAGON_M2_vmac2es_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyh(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhacc_RR_sat __builtin_HEXAGON_M2_vmac2s_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyh(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhacc_RR_s1_sat __builtin_HEXAGON_M2_vmac2s_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyhsu(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsuacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsuacc_RR_sat __builtin_HEXAGON_M2_vmac2su_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyhsu(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsuacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsuacc_RR_s1_sat __builtin_HEXAGON_M2_vmac2su_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyeh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyeh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyeh_PP_sat __builtin_HEXAGON_M2_vmpy2es_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyeh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyeh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyeh_PP_s1_sat __builtin_HEXAGON_M2_vmpy2es_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyh(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyh_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyh_RR_sat __builtin_HEXAGON_M2_vmpy2s_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=vmpyh(Rs32,Rt32):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vmpyh_RR_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vmpyh_RR_rnd_sat __builtin_HEXAGON_M2_vmpy2s_s0pack + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyh(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyh_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyh_RR_s1_sat __builtin_HEXAGON_M2_vmpy2s_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vmpyh(Rs32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vmpyh_RR_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vmpyh_RR_s1_rnd_sat __builtin_HEXAGON_M2_vmpy2s_s1pack + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyhsu(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsu_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsu_RR_sat __builtin_HEXAGON_M2_vmpy2su_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyhsu(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsu_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsu_RR_s1_sat __builtin_HEXAGON_M2_vmpy2su_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vraddh(Rss32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_vraddh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vraddh_PP __builtin_HEXAGON_M2_vraddh + +/* ========================================================================== + Assembly Syntax: Rd32=vradduh(Rss32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_vradduh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vradduh_PP __builtin_HEXAGON_M2_vradduh + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyi(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyiacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyiacc_PP __builtin_HEXAGON_M2_vrcmaci_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyi(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyiacc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyiacc_PP_conj __builtin_HEXAGON_M2_vrcmaci_s0c + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyr(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyracc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyracc_PP __builtin_HEXAGON_M2_vrcmacr_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyr(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyracc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyracc_PP_conj __builtin_HEXAGON_M2_vrcmacr_s0c + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyi(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyi_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyi_PP __builtin_HEXAGON_M2_vrcmpyi_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyi(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyi_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyi_PP_conj __builtin_HEXAGON_M2_vrcmpyi_s0c + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyr(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyr_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyr_PP __builtin_HEXAGON_M2_vrcmpyr_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyr(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyr_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyr_PP_conj __builtin_HEXAGON_M2_vrcmpyr_s0c + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpys(Rss32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vrcmpysacc_PR_s1_sat(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vrcmpysacc_PR_s1_sat __builtin_HEXAGON_M2_vrcmpys_acc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpys(Rss32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vrcmpys_PR_s1_sat(Word64 Rss, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vrcmpys_PR_s1_sat __builtin_HEXAGON_M2_vrcmpys_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vrcmpys(Rss32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vrcmpys_PR_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vrcmpys_PR_s1_rnd_sat __builtin_HEXAGON_M2_vrcmpys_s1rp + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpyh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpyhacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyhacc_PP __builtin_HEXAGON_M2_vrmac_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpyh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpyh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyh_PP __builtin_HEXAGON_M2_vrmpy_s0 + +/* ========================================================================== + Assembly Syntax: Rx32^=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xorxacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_xorxacc_RR __builtin_HEXAGON_M2_xor_xacc + +/* ========================================================================== + Assembly Syntax: Rx32&=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_andand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andand_RR __builtin_HEXAGON_M4_and_and + +/* ========================================================================== + Assembly Syntax: Rx32&=and(Rs32,~Rt32) + C Intrinsic Prototype: Word32 Q6_R_andand_RnR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andand_RnR __builtin_HEXAGON_M4_and_andn + +/* ========================================================================== + Assembly Syntax: Rx32&=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_orand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_orand_RR __builtin_HEXAGON_M4_and_or + +/* ========================================================================== + Assembly Syntax: Rx32&=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xorand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_xorand_RR __builtin_HEXAGON_M4_and_xor + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiwh(Rss32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiwh_PR_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyiwh_PR_s1_rnd_sat __builtin_HEXAGON_M4_cmpyi_wh + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiwh(Rss32,Rt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiwh_PR_conj_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyiwh_PR_conj_s1_rnd_sat __builtin_HEXAGON_M4_cmpyi_whc + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrwh(Rss32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrwh_PR_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyrwh_PR_s1_rnd_sat __builtin_HEXAGON_M4_cmpyr_wh + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrwh(Rss32,Rt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrwh_PR_conj_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyrwh_PR_conj_s1_rnd_sat __builtin_HEXAGON_M4_cmpyr_whc + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RR_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RR_s1_sat __builtin_HEXAGON_M4_mac_up_s1_sat + +/* ========================================================================== + Assembly Syntax: Rd32=add(#u6,mpyi(Rs32,#U6)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_IRI(Word32 Iu6, Word32 Rs, Word32 IU6) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_IRI __builtin_HEXAGON_M4_mpyri_addi + +/* ========================================================================== + Assembly Syntax: Rd32=add(Ru32,mpyi(Rs32,#u6)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_RRI(Word32 Ru, Word32 Rs, Word32 Iu6) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_RRI __builtin_HEXAGON_M4_mpyri_addr + +/* ========================================================================== + Assembly Syntax: Rd32=add(Ru32,mpyi(#u6:2,Rs32)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_RIR(Word32 Ru, Word32 Iu6_2, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_RIR __builtin_HEXAGON_M4_mpyri_addr_u2 + +/* ========================================================================== + Assembly Syntax: Rd32=add(#u6,mpyi(Rs32,Rt32)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_IRR(Word32 Iu6, Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_IRR __builtin_HEXAGON_M4_mpyrr_addi + +/* ========================================================================== + Assembly Syntax: Ry32=add(Ru32,mpyi(Ry32,Rs32)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_RRR(Word32 Ru, Word32 Ry, Word32 Rs) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_RRR __builtin_HEXAGON_M4_mpyrr_addr + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RR_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RR_s1_sat __builtin_HEXAGON_M4_nac_up_s1_sat + +/* ========================================================================== + Assembly Syntax: Rx32|=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_andor_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andor_RR __builtin_HEXAGON_M4_or_and + +/* ========================================================================== + Assembly Syntax: Rx32|=and(Rs32,~Rt32) + C Intrinsic Prototype: Word32 Q6_R_andor_RnR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andor_RnR __builtin_HEXAGON_M4_or_andn + +/* ========================================================================== + Assembly Syntax: Rx32|=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_oror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_oror_RR __builtin_HEXAGON_M4_or_or + +/* ========================================================================== + Assembly Syntax: Rx32|=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xoror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_xoror_RR __builtin_HEXAGON_M4_or_xor + +/* ========================================================================== + Assembly Syntax: Rdd32=pmpyw(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_pmpyw_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_pmpyw_RR __builtin_HEXAGON_M4_pmpyw + +/* ========================================================================== + Assembly Syntax: Rxx32^=pmpyw(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_pmpywxacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_pmpywxacc_RR __builtin_HEXAGON_M4_pmpyw_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vpmpyh(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vpmpyh_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vpmpyh_RR __builtin_HEXAGON_M4_vpmpyh + +/* ========================================================================== + Assembly Syntax: Rxx32^=vpmpyh(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vpmpyhxacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vpmpyhxacc_RR __builtin_HEXAGON_M4_vpmpyh_acc + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpyweh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpywehacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywehacc_PP __builtin_HEXAGON_M4_vrmpyeh_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpyweh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpywehacc_PP_s1(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywehacc_PP_s1 __builtin_HEXAGON_M4_vrmpyeh_acc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpyweh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpyweh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyweh_PP __builtin_HEXAGON_M4_vrmpyeh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpyweh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpyweh_PP_s1(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyweh_PP_s1 __builtin_HEXAGON_M4_vrmpyeh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpywoh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpywohacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywohacc_PP __builtin_HEXAGON_M4_vrmpyoh_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpywoh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpywohacc_PP_s1(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywohacc_PP_s1 __builtin_HEXAGON_M4_vrmpyoh_acc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpywoh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpywoh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywoh_PP __builtin_HEXAGON_M4_vrmpyoh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpywoh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpywoh_PP_s1(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywoh_PP_s1 __builtin_HEXAGON_M4_vrmpyoh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32^=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_andxacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andxacc_RR __builtin_HEXAGON_M4_xor_and + +/* ========================================================================== + Assembly Syntax: Rx32^=and(Rs32,~Rt32) + C Intrinsic Prototype: Word32 Q6_R_andxacc_RnR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andxacc_RnR __builtin_HEXAGON_M4_xor_andn + +/* ========================================================================== + Assembly Syntax: Rx32^=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_orxacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_orxacc_RR __builtin_HEXAGON_M4_xor_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=xor(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_xorxacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_xorxacc_PP __builtin_HEXAGON_M4_xor_xacc + +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpybsu(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpybsuacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpybsuacc_PP_sat __builtin_HEXAGON_M5_vdmacbsu + +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpybsu(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpybsu_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpybsu_PP_sat __builtin_HEXAGON_M5_vdmpybsu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpybsu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybsuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybsuacc_RR __builtin_HEXAGON_M5_vmacbsu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpybu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybuacc_RR __builtin_HEXAGON_M5_vmacbuu + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpybsu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybsu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybsu_RR __builtin_HEXAGON_M5_vmpybsu + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpybu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybu_RR __builtin_HEXAGON_M5_vmpybuu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpybsu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybsuacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybsuacc_PP __builtin_HEXAGON_M5_vrmacbsu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpybu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybuacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybuacc_PP __builtin_HEXAGON_M5_vrmacbuu + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpybsu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybsu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybsu_PP __builtin_HEXAGON_M5_vrmpybsu + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpybu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybu_PP __builtin_HEXAGON_M5_vrmpybuu + +/* ========================================================================== + Assembly Syntax: Rd32=addasl(Rt32,Rs32,#u3) + C Intrinsic Prototype: Word32 Q6_R_addasl_RRI(Word32 Rt, Word32 Rs, Word32 Iu3) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addasl_RRI __builtin_HEXAGON_S2_addasl_rrri + +/* ========================================================================== + Assembly Syntax: Rdd32=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asl_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asl_PI __builtin_HEXAGON_S2_asl_i_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslacc_PI __builtin_HEXAGON_S2_asl_i_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asland_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asland_PI __builtin_HEXAGON_S2_asl_i_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslnac_PI __builtin_HEXAGON_S2_asl_i_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslor_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslor_PI __builtin_HEXAGON_S2_asl_i_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslxacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslxacc_PI __builtin_HEXAGON_S2_asl_i_p_xacc + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asl_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RI __builtin_HEXAGON_S2_asl_i_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslacc_RI __builtin_HEXAGON_S2_asl_i_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asland_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asland_RI __builtin_HEXAGON_S2_asl_i_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslnac_RI __builtin_HEXAGON_S2_asl_i_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslor_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslor_RI __builtin_HEXAGON_S2_asl_i_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,#u5):sat + C Intrinsic Prototype: Word32 Q6_R_asl_RI_sat(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RI_sat __builtin_HEXAGON_S2_asl_i_r_sat + +/* ========================================================================== + Assembly Syntax: Rx32^=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslxacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslxacc_RI __builtin_HEXAGON_S2_asl_i_r_xacc + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslh(Rss32,#u4) + C Intrinsic Prototype: Word64 Q6_P_vaslh_PI(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslh_PI __builtin_HEXAGON_S2_asl_i_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslw(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vaslw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslw_PI __builtin_HEXAGON_S2_asl_i_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asl_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asl_PR __builtin_HEXAGON_S2_asl_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslacc_PR __builtin_HEXAGON_S2_asl_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asland_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asland_PR __builtin_HEXAGON_S2_asl_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslnac_PR __builtin_HEXAGON_S2_asl_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslor_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslor_PR __builtin_HEXAGON_S2_asl_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslxacc_PR __builtin_HEXAGON_S2_asl_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asl_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RR __builtin_HEXAGON_S2_asl_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_aslacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslacc_RR __builtin_HEXAGON_S2_asl_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asland_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asland_RR __builtin_HEXAGON_S2_asl_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_aslnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslnac_RR __builtin_HEXAGON_S2_asl_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_aslor_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslor_RR __builtin_HEXAGON_S2_asl_r_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_asl_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RR_sat __builtin_HEXAGON_S2_asl_r_r_sat + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vaslh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslh_PR __builtin_HEXAGON_S2_asl_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vaslw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslw_PR __builtin_HEXAGON_S2_asl_r_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asr_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asr_PI __builtin_HEXAGON_S2_asr_i_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asracc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asracc_PI __builtin_HEXAGON_S2_asr_i_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asrand_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrand_PI __builtin_HEXAGON_S2_asr_i_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asrnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrnac_PI __builtin_HEXAGON_S2_asr_i_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asror_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asror_PI __builtin_HEXAGON_S2_asr_i_p_or + +/* ========================================================================== + Assembly Syntax: Rdd32=asr(Rss32,#u6):rnd + C Intrinsic Prototype: Word64 Q6_P_asr_PI_rnd(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asr_PI_rnd __builtin_HEXAGON_S2_asr_i_p_rnd + +/* ========================================================================== + Assembly Syntax: Rdd32=asrrnd(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asrrnd_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_asrrnd_PI __builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asr_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RI __builtin_HEXAGON_S2_asr_i_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asracc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asracc_RI __builtin_HEXAGON_S2_asr_i_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asrand_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrand_RI __builtin_HEXAGON_S2_asr_i_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asrnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrnac_RI __builtin_HEXAGON_S2_asr_i_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asror_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asror_RI __builtin_HEXAGON_S2_asr_i_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,#u5):rnd + C Intrinsic Prototype: Word32 Q6_R_asr_RI_rnd(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RI_rnd __builtin_HEXAGON_S2_asr_i_r_rnd + +/* ========================================================================== + Assembly Syntax: Rd32=asrrnd(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asrrnd_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_asrrnd_RI __builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=vasrw(Rss32,#u5) + C Intrinsic Prototype: Word32 Q6_R_vasrw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vasrw_PI __builtin_HEXAGON_S2_asr_i_svw_trun + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrh(Rss32,#u4) + C Intrinsic Prototype: Word64 Q6_P_vasrh_PI(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrh_PI __builtin_HEXAGON_S2_asr_i_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrw(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vasrw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrw_PI __builtin_HEXAGON_S2_asr_i_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asr_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asr_PR __builtin_HEXAGON_S2_asr_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asracc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asracc_PR __builtin_HEXAGON_S2_asr_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asrand_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrand_PR __builtin_HEXAGON_S2_asr_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asrnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrnac_PR __builtin_HEXAGON_S2_asr_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asror_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asror_PR __builtin_HEXAGON_S2_asr_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asrxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrxacc_PR __builtin_HEXAGON_S2_asr_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RR __builtin_HEXAGON_S2_asr_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asracc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asracc_RR __builtin_HEXAGON_S2_asr_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asrand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrand_RR __builtin_HEXAGON_S2_asr_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asrnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrnac_RR __builtin_HEXAGON_S2_asr_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asror_RR __builtin_HEXAGON_S2_asr_r_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_asr_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RR_sat __builtin_HEXAGON_S2_asr_r_r_sat + +/* ========================================================================== + Assembly Syntax: Rd32=vasrw(Rss32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_vasrw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vasrw_PR __builtin_HEXAGON_S2_asr_r_svw_trun + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vasrh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrh_PR __builtin_HEXAGON_S2_asr_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vasrw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrw_PR __builtin_HEXAGON_S2_asr_r_vw + +/* ========================================================================== + Assembly Syntax: Rd32=brev(Rs32) + C Intrinsic Prototype: Word32 Q6_R_brev_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_brev_R __builtin_HEXAGON_S2_brev + +/* ========================================================================== + Assembly Syntax: Rdd32=brev(Rss32) + C Intrinsic Prototype: Word64 Q6_P_brev_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_brev_P __builtin_HEXAGON_S2_brevp + +/* ========================================================================== + Assembly Syntax: Rd32=cl0(Rs32) + C Intrinsic Prototype: Word32 Q6_R_cl0_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl0_R __builtin_HEXAGON_S2_cl0 + +/* ========================================================================== + Assembly Syntax: Rd32=cl0(Rss32) + C Intrinsic Prototype: Word32 Q6_R_cl0_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl0_P __builtin_HEXAGON_S2_cl0p + +/* ========================================================================== + Assembly Syntax: Rd32=cl1(Rs32) + C Intrinsic Prototype: Word32 Q6_R_cl1_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl1_R __builtin_HEXAGON_S2_cl1 + +/* ========================================================================== + Assembly Syntax: Rd32=cl1(Rss32) + C Intrinsic Prototype: Word32 Q6_R_cl1_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl1_P __builtin_HEXAGON_S2_cl1p + +/* ========================================================================== + Assembly Syntax: Rd32=clb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_clb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clb_R __builtin_HEXAGON_S2_clb + +/* ========================================================================== + Assembly Syntax: Rd32=normamt(Rs32) + C Intrinsic Prototype: Word32 Q6_R_normamt_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_normamt_R __builtin_HEXAGON_S2_clbnorm + +/* ========================================================================== + Assembly Syntax: Rd32=clb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_clb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clb_P __builtin_HEXAGON_S2_clbp + +/* ========================================================================== + Assembly Syntax: Rd32=clrbit(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_clrbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clrbit_RI __builtin_HEXAGON_S2_clrbit_i + +/* ========================================================================== + Assembly Syntax: Rd32=clrbit(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_clrbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clrbit_RR __builtin_HEXAGON_S2_clrbit_r + +/* ========================================================================== + Assembly Syntax: Rd32=ct0(Rs32) + C Intrinsic Prototype: Word32 Q6_R_ct0_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct0_R __builtin_HEXAGON_S2_ct0 + +/* ========================================================================== + Assembly Syntax: Rd32=ct0(Rss32) + C Intrinsic Prototype: Word32 Q6_R_ct0_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct0_P __builtin_HEXAGON_S2_ct0p + +/* ========================================================================== + Assembly Syntax: Rd32=ct1(Rs32) + C Intrinsic Prototype: Word32 Q6_R_ct1_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct1_R __builtin_HEXAGON_S2_ct1 + +/* ========================================================================== + Assembly Syntax: Rd32=ct1(Rss32) + C Intrinsic Prototype: Word32 Q6_R_ct1_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct1_P __builtin_HEXAGON_S2_ct1p + +/* ========================================================================== + Assembly Syntax: Rdd32=deinterleave(Rss32) + C Intrinsic Prototype: Word64 Q6_P_deinterleave_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_deinterleave_P __builtin_HEXAGON_S2_deinterleave + +/* ========================================================================== + Assembly Syntax: Rd32=extractu(Rs32,#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_extractu_RII(Word32 Rs, Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extractu_RII __builtin_HEXAGON_S2_extractu + +/* ========================================================================== + Assembly Syntax: Rd32=extractu(Rs32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_extractu_RP(Word32 Rs, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extractu_RP __builtin_HEXAGON_S2_extractu_rp + +/* ========================================================================== + Assembly Syntax: Rdd32=extractu(Rss32,#u6,#U6) + C Intrinsic Prototype: Word64 Q6_P_extractu_PII(Word64 Rss, Word32 Iu6, Word32 IU6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extractu_PII __builtin_HEXAGON_S2_extractup + +/* ========================================================================== + Assembly Syntax: Rdd32=extractu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_extractu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extractu_PP __builtin_HEXAGON_S2_extractup_rp + +/* ========================================================================== + Assembly Syntax: Rx32=insert(Rs32,#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_insert_RII(Word32 Rx, Word32 Rs, Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_insert_RII __builtin_HEXAGON_S2_insert + +/* ========================================================================== + Assembly Syntax: Rx32=insert(Rs32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_insert_RP(Word32 Rx, Word32 Rs, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_insert_RP __builtin_HEXAGON_S2_insert_rp + +/* ========================================================================== + Assembly Syntax: Rxx32=insert(Rss32,#u6,#U6) + C Intrinsic Prototype: Word64 Q6_P_insert_PII(Word64 Rxx, Word64 Rss, Word32 Iu6, Word32 IU6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_insert_PII __builtin_HEXAGON_S2_insertp + +/* ========================================================================== + Assembly Syntax: Rxx32=insert(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_insert_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_insert_PP __builtin_HEXAGON_S2_insertp_rp + +/* ========================================================================== + Assembly Syntax: Rdd32=interleave(Rss32) + C Intrinsic Prototype: Word64 Q6_P_interleave_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_interleave_P __builtin_HEXAGON_S2_interleave + +/* ========================================================================== + Assembly Syntax: Rdd32=lfs(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_lfs_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lfs_PP __builtin_HEXAGON_S2_lfsp + +/* ========================================================================== + Assembly Syntax: Rdd32=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsl_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsl_PR __builtin_HEXAGON_S2_lsl_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslacc_PR __builtin_HEXAGON_S2_lsl_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsland_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsland_PR __builtin_HEXAGON_S2_lsl_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslnac_PR __builtin_HEXAGON_S2_lsl_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslor_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslor_PR __builtin_HEXAGON_S2_lsl_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslxacc_PR __builtin_HEXAGON_S2_lsl_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsl_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsl_RR __builtin_HEXAGON_S2_lsl_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lslacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lslacc_RR __builtin_HEXAGON_S2_lsl_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsland_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsland_RR __builtin_HEXAGON_S2_lsl_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lslnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lslnac_RR __builtin_HEXAGON_S2_lsl_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lslor_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lslor_RR __builtin_HEXAGON_S2_lsl_r_r_or + +/* ========================================================================== + Assembly Syntax: Rdd32=vlslh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlslh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlslh_PR __builtin_HEXAGON_S2_lsl_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vlslw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlslw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlslw_PR __builtin_HEXAGON_S2_lsl_r_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsr_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsr_PI __builtin_HEXAGON_S2_lsr_i_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsracc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsracc_PI __builtin_HEXAGON_S2_lsr_i_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsrand_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrand_PI __builtin_HEXAGON_S2_lsr_i_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsrnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrnac_PI __builtin_HEXAGON_S2_lsr_i_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsror_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsror_PI __builtin_HEXAGON_S2_lsr_i_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsrxacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrxacc_PI __builtin_HEXAGON_S2_lsr_i_p_xacc + +/* ========================================================================== + Assembly Syntax: Rd32=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsr_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsr_RI __builtin_HEXAGON_S2_lsr_i_r + +/* ========================================================================== + Assembly Syntax: Rx32+=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsracc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsracc_RI __builtin_HEXAGON_S2_lsr_i_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsrand_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrand_RI __builtin_HEXAGON_S2_lsr_i_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsrnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrnac_RI __builtin_HEXAGON_S2_lsr_i_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsror_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsror_RI __builtin_HEXAGON_S2_lsr_i_r_or + +/* ========================================================================== + Assembly Syntax: Rx32^=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsrxacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrxacc_RI __builtin_HEXAGON_S2_lsr_i_r_xacc + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrh(Rss32,#u4) + C Intrinsic Prototype: Word64 Q6_P_vlsrh_PI(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrh_PI __builtin_HEXAGON_S2_lsr_i_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrw(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vlsrw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrw_PI __builtin_HEXAGON_S2_lsr_i_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsr_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsr_PR __builtin_HEXAGON_S2_lsr_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsracc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsracc_PR __builtin_HEXAGON_S2_lsr_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsrand_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrand_PR __builtin_HEXAGON_S2_lsr_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsrnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrnac_PR __builtin_HEXAGON_S2_lsr_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsror_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsror_PR __builtin_HEXAGON_S2_lsr_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsrxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrxacc_PR __builtin_HEXAGON_S2_lsr_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsr_RR __builtin_HEXAGON_S2_lsr_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsracc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsracc_RR __builtin_HEXAGON_S2_lsr_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsrand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrand_RR __builtin_HEXAGON_S2_lsr_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsrnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrnac_RR __builtin_HEXAGON_S2_lsr_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsror_RR __builtin_HEXAGON_S2_lsr_r_r_or + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlsrh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrh_PR __builtin_HEXAGON_S2_lsr_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlsrw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrw_PR __builtin_HEXAGON_S2_lsr_r_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=packhl(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_packhl_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_packhl_RR __builtin_HEXAGON_S2_packhl + +/* ========================================================================== + Assembly Syntax: Rd32=parity(Rss32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_parity_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_parity_PP __builtin_HEXAGON_S2_parityp + +/* ========================================================================== + Assembly Syntax: Rd32=setbit(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_setbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_setbit_RI __builtin_HEXAGON_S2_setbit_i + +/* ========================================================================== + Assembly Syntax: Rd32=setbit(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_setbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_setbit_RR __builtin_HEXAGON_S2_setbit_r + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffeb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_shuffeb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffeb_PP __builtin_HEXAGON_S2_shuffeb + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffeh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_shuffeh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffeh_PP __builtin_HEXAGON_S2_shuffeh + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffob(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_shuffob_PP(Word64 Rtt, Word64 Rss) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffob_PP __builtin_HEXAGON_S2_shuffob + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffoh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_shuffoh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffoh_PP __builtin_HEXAGON_S2_shuffoh + +/* ========================================================================== + Assembly Syntax: memb(Rx32++#s4:0:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memb_IMR_circ(void** Rx, Word32 Is4_0, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memb_IMR_circ __builtin_HEXAGON_S2_storerb_pci + +/* ========================================================================== + Assembly Syntax: memb(Rx32++I:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memb_MR_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memb_MR_circ __builtin_HEXAGON_S2_storerb_pcr + +/* ========================================================================== + Assembly Syntax: memd(Rx32++#s4:3:circ(Mu2))=Rtt32 + C Intrinsic Prototype: void Q6_memd_IMP_circ(void** Rx, Word32 Is4_3, Word32 Mu, Word64 Rtt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memd_IMP_circ __builtin_HEXAGON_S2_storerd_pci + +/* ========================================================================== + Assembly Syntax: memd(Rx32++I:circ(Mu2))=Rtt32 + C Intrinsic Prototype: void Q6_memd_MP_circ(void** Rx, Word32 Mu, Word64 Rtt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memd_MP_circ __builtin_HEXAGON_S2_storerd_pcr + +/* ========================================================================== + Assembly Syntax: memh(Rx32++#s4:1:circ(Mu2))=Rt32.h + C Intrinsic Prototype: void Q6_memh_IMRh_circ(void** Rx, Word32 Is4_1, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_IMRh_circ __builtin_HEXAGON_S2_storerf_pci + +/* ========================================================================== + Assembly Syntax: memh(Rx32++I:circ(Mu2))=Rt32.h + C Intrinsic Prototype: void Q6_memh_MRh_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_MRh_circ __builtin_HEXAGON_S2_storerf_pcr + +/* ========================================================================== + Assembly Syntax: memh(Rx32++#s4:1:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memh_IMR_circ(void** Rx, Word32 Is4_1, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_IMR_circ __builtin_HEXAGON_S2_storerh_pci + +/* ========================================================================== + Assembly Syntax: memh(Rx32++I:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memh_MR_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_MR_circ __builtin_HEXAGON_S2_storerh_pcr + +/* ========================================================================== + Assembly Syntax: memw(Rx32++#s4:2:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memw_IMR_circ(void** Rx, Word32 Is4_2, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memw_IMR_circ __builtin_HEXAGON_S2_storeri_pci + +/* ========================================================================== + Assembly Syntax: memw(Rx32++I:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memw_MR_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memw_MR_circ __builtin_HEXAGON_S2_storeri_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=vsathb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsathb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathb_R __builtin_HEXAGON_S2_svsathb + +/* ========================================================================== + Assembly Syntax: Rd32=vsathub(Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsathub_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathub_R __builtin_HEXAGON_S2_svsathub + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxb(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxb_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxb_RII __builtin_HEXAGON_S2_tableidxb_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxd(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxd_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxd_RII __builtin_HEXAGON_S2_tableidxd_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxh(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxh_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxh_RII __builtin_HEXAGON_S2_tableidxh_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxw(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxw_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxw_RII __builtin_HEXAGON_S2_tableidxw_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=togglebit(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_togglebit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_togglebit_RI __builtin_HEXAGON_S2_togglebit_i + +/* ========================================================================== + Assembly Syntax: Rd32=togglebit(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_togglebit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_togglebit_RR __builtin_HEXAGON_S2_togglebit_r + +/* ========================================================================== + Assembly Syntax: Pd4=tstbit(Rs32,#u5) + C Intrinsic Prototype: Byte Q6_p_tstbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_tstbit_RI __builtin_HEXAGON_S2_tstbit_i + +/* ========================================================================== + Assembly Syntax: Pd4=tstbit(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_tstbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_tstbit_RR __builtin_HEXAGON_S2_tstbit_r + +/* ========================================================================== + Assembly Syntax: Rdd32=valignb(Rtt32,Rss32,#u3) + C Intrinsic Prototype: Word64 Q6_P_valignb_PPI(Word64 Rtt, Word64 Rss, Word32 Iu3) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_valignb_PPI __builtin_HEXAGON_S2_valignib + +/* ========================================================================== + Assembly Syntax: Rdd32=valignb(Rtt32,Rss32,Pu4) + C Intrinsic Prototype: Word64 Q6_P_valignb_PPp(Word64 Rtt, Word64 Rss, Byte Pu) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_valignb_PPp __builtin_HEXAGON_S2_valignrb + +/* ========================================================================== + Assembly Syntax: Rdd32=vcnegh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vcnegh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcnegh_PR __builtin_HEXAGON_S2_vcnegh + +/* ========================================================================== + Assembly Syntax: Rdd32=vcrotate(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vcrotate_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcrotate_PR __builtin_HEXAGON_S2_vcrotate + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcnegh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vrcneghacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcneghacc_PR __builtin_HEXAGON_S2_vrcnegh + +/* ========================================================================== + Assembly Syntax: Rd32=vrndwh(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vrndwh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vrndwh_P __builtin_HEXAGON_S2_vrndpackwh + +/* ========================================================================== + Assembly Syntax: Rd32=vrndwh(Rss32):sat + C Intrinsic Prototype: Word32 Q6_R_vrndwh_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vrndwh_P_sat __builtin_HEXAGON_S2_vrndpackwhs + +/* ========================================================================== + Assembly Syntax: Rd32=vsathb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsathb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathb_P __builtin_HEXAGON_S2_vsathb + +/* ========================================================================== + Assembly Syntax: Rdd32=vsathb(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsathb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsathb_P __builtin_HEXAGON_S2_vsathb_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsathub(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsathub_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathub_P __builtin_HEXAGON_S2_vsathub + +/* ========================================================================== + Assembly Syntax: Rdd32=vsathub(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsathub_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsathub_P __builtin_HEXAGON_S2_vsathub_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsatwh(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsatwh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsatwh_P __builtin_HEXAGON_S2_vsatwh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsatwh(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsatwh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsatwh_P __builtin_HEXAGON_S2_vsatwh_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsatwuh(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsatwuh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsatwuh_P __builtin_HEXAGON_S2_vsatwuh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsatwuh(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsatwuh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsatwuh_P __builtin_HEXAGON_S2_vsatwuh_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsplatb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsplatb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsplatb_R __builtin_HEXAGON_S2_vsplatrb + +/* ========================================================================== + Assembly Syntax: Rdd32=vsplath(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsplath_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsplath_R __builtin_HEXAGON_S2_vsplatrh + +/* ========================================================================== + Assembly Syntax: Rdd32=vspliceb(Rss32,Rtt32,#u3) + C Intrinsic Prototype: Word64 Q6_P_vspliceb_PPI(Word64 Rss, Word64 Rtt, Word32 Iu3) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vspliceb_PPI __builtin_HEXAGON_S2_vspliceib + +/* ========================================================================== + Assembly Syntax: Rdd32=vspliceb(Rss32,Rtt32,Pu4) + C Intrinsic Prototype: Word64 Q6_P_vspliceb_PPp(Word64 Rss, Word64 Rtt, Byte Pu) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vspliceb_PPp __builtin_HEXAGON_S2_vsplicerb + +/* ========================================================================== + Assembly Syntax: Rdd32=vsxtbh(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsxtbh_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsxtbh_R __builtin_HEXAGON_S2_vsxtbh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsxthw(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsxthw_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsxthw_R __builtin_HEXAGON_S2_vsxthw + +/* ========================================================================== + Assembly Syntax: Rd32=vtrunehb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vtrunehb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vtrunehb_P __builtin_HEXAGON_S2_vtrunehb + +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunewh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunewh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunewh_PP __builtin_HEXAGON_S2_vtrunewh + +/* ========================================================================== + Assembly Syntax: Rd32=vtrunohb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vtrunohb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vtrunohb_P __builtin_HEXAGON_S2_vtrunohb + +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunowh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunowh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunowh_PP __builtin_HEXAGON_S2_vtrunowh + +/* ========================================================================== + Assembly Syntax: Rdd32=vzxtbh(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vzxtbh_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vzxtbh_R __builtin_HEXAGON_S2_vzxtbh + +/* ========================================================================== + Assembly Syntax: Rdd32=vzxthw(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vzxthw_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vzxthw_R __builtin_HEXAGON_S2_vzxthw + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,add(Ru32,#s6)) + C Intrinsic Prototype: Word32 Q6_R_add_add_RRI(Word32 Rs, Word32 Ru, Word32 Is6) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_add_RRI __builtin_HEXAGON_S4_addaddi + +/* ========================================================================== + Assembly Syntax: Rx32=add(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_add_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_asl_IRI __builtin_HEXAGON_S4_addi_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=add(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_add_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_lsr_IRI __builtin_HEXAGON_S4_addi_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rx32=and(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_and_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_and_asl_IRI __builtin_HEXAGON_S4_andi_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=and(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_and_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_and_lsr_IRI __builtin_HEXAGON_S4_andi_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rd32=add(clb(Rs32),#s6) + C Intrinsic Prototype: Word32 Q6_R_add_clb_RI(Word32 Rs, Word32 Is6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_clb_RI __builtin_HEXAGON_S4_clbaddi + +/* ========================================================================== + Assembly Syntax: Rd32=add(clb(Rss32),#s6) + C Intrinsic Prototype: Word32 Q6_R_add_clb_PI(Word64 Rss, Word32 Is6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_clb_PI __builtin_HEXAGON_S4_clbpaddi + +/* ========================================================================== + Assembly Syntax: Rd32=normamt(Rss32) + C Intrinsic Prototype: Word32 Q6_R_normamt_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_normamt_P __builtin_HEXAGON_S4_clbpnorm + +/* ========================================================================== + Assembly Syntax: Rd32=extract(Rs32,#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_extract_RII(Word32 Rs, Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extract_RII __builtin_HEXAGON_S4_extract + +/* ========================================================================== + Assembly Syntax: Rd32=extract(Rs32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_extract_RP(Word32 Rs, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extract_RP __builtin_HEXAGON_S4_extract_rp + +/* ========================================================================== + Assembly Syntax: Rdd32=extract(Rss32,#u6,#U6) + C Intrinsic Prototype: Word64 Q6_P_extract_PII(Word64 Rss, Word32 Iu6, Word32 IU6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extract_PII __builtin_HEXAGON_S4_extractp + +/* ========================================================================== + Assembly Syntax: Rdd32=extract(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_extract_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extract_PP __builtin_HEXAGON_S4_extractp_rp + +/* ========================================================================== + Assembly Syntax: Rd32=lsl(#s6,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsl_IR(Word32 Is6, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsl_IR __builtin_HEXAGON_S4_lsli + +/* ========================================================================== + Assembly Syntax: Pd4=!tstbit(Rs32,#u5) + C Intrinsic Prototype: Byte Q6_p_not_tstbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_tstbit_RI __builtin_HEXAGON_S4_ntstbit_i + +/* ========================================================================== + Assembly Syntax: Pd4=!tstbit(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_tstbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_tstbit_RR __builtin_HEXAGON_S4_ntstbit_r + +/* ========================================================================== + Assembly Syntax: Rx32|=and(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_andor_RI(Word32 Rx, Word32 Rs, Word32 Is10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andor_RI __builtin_HEXAGON_S4_or_andi + +/* ========================================================================== + Assembly Syntax: Rx32=or(Ru32,and(Rx32,#s10)) + C Intrinsic Prototype: Word32 Q6_R_or_and_RRI(Word32 Ru, Word32 Rx, Word32 Is10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_or_and_RRI __builtin_HEXAGON_S4_or_andix + +/* ========================================================================== + Assembly Syntax: Rx32|=or(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_oror_RI(Word32 Rx, Word32 Rs, Word32 Is10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_oror_RI __builtin_HEXAGON_S4_or_ori + +/* ========================================================================== + Assembly Syntax: Rx32=or(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_or_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_or_asl_IRI __builtin_HEXAGON_S4_ori_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=or(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_or_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_or_lsr_IRI __builtin_HEXAGON_S4_ori_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rd32=parity(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_parity_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_parity_RR __builtin_HEXAGON_S4_parity + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,sub(#s6,Ru32)) + C Intrinsic Prototype: Word32 Q6_R_add_sub_RIR(Word32 Rs, Word32 Is6, Word32 Ru) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_sub_RIR __builtin_HEXAGON_S4_subaddi + +/* ========================================================================== + Assembly Syntax: Rx32=sub(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_sub_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_asl_IRI __builtin_HEXAGON_S4_subi_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=sub(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_sub_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_lsr_IRI __builtin_HEXAGON_S4_subi_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcrotate(Rss32,Rt32,#u2) + C Intrinsic Prototype: Word64 Q6_P_vrcrotate_PRI(Word64 Rss, Word32 Rt, Word32 Iu2) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcrotate_PRI __builtin_HEXAGON_S4_vrcrotate + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcrotate(Rss32,Rt32,#u2) + C Intrinsic Prototype: Word64 Q6_P_vrcrotateacc_PRI(Word64 Rxx, Word64 Rss, Word32 Rt, Word32 Iu2) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcrotateacc_PRI __builtin_HEXAGON_S4_vrcrotate_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vxaddsubh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxaddsubh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxaddsubh_PP_sat __builtin_HEXAGON_S4_vxaddsubh + +/* ========================================================================== + Assembly Syntax: Rdd32=vxaddsubh(Rss32,Rtt32):rnd:>>1:sat + C Intrinsic Prototype: Word64 Q6_P_vxaddsubh_PP_rnd_rs1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxaddsubh_PP_rnd_rs1_sat __builtin_HEXAGON_S4_vxaddsubhr + +/* ========================================================================== + Assembly Syntax: Rdd32=vxaddsubw(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxaddsubw_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxaddsubw_PP_sat __builtin_HEXAGON_S4_vxaddsubw + +/* ========================================================================== + Assembly Syntax: Rdd32=vxsubaddh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxsubaddh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxsubaddh_PP_sat __builtin_HEXAGON_S4_vxsubaddh + +/* ========================================================================== + Assembly Syntax: Rdd32=vxsubaddh(Rss32,Rtt32):rnd:>>1:sat + C Intrinsic Prototype: Word64 Q6_P_vxsubaddh_PP_rnd_rs1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxsubaddh_PP_rnd_rs1_sat __builtin_HEXAGON_S4_vxsubaddhr + +/* ========================================================================== + Assembly Syntax: Rdd32=vxsubaddw(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxsubaddw_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxsubaddw_PP_sat __builtin_HEXAGON_S4_vxsubaddw + +/* ========================================================================== + Assembly Syntax: Rd32=vasrhub(Rss32,#u4):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vasrhub_PI_rnd_sat(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vasrhub_PI_rnd_sat __builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=vasrhub(Rss32,#u4):sat + C Intrinsic Prototype: Word32 Q6_R_vasrhub_PI_sat(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vasrhub_PI_sat __builtin_HEXAGON_S5_asrhub_sat + +/* ========================================================================== + Assembly Syntax: Rd32=popcount(Rss32) + C Intrinsic Prototype: Word32 Q6_R_popcount_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_popcount_P __builtin_HEXAGON_S5_popcountp + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrh(Rss32,#u4):rnd + C Intrinsic Prototype: Word64 Q6_P_vasrh_PI_rnd(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vasrh_PI_rnd __builtin_HEXAGON_S5_vasrhrnd_goodsyntax + +/* ========================================================================== + Assembly Syntax: dccleana(Rs32) + C Intrinsic Prototype: void Q6_dccleana_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dccleana_A __builtin_HEXAGON_Y2_dccleana + +/* ========================================================================== + Assembly Syntax: dccleaninva(Rs32) + C Intrinsic Prototype: void Q6_dccleaninva_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dccleaninva_A __builtin_HEXAGON_Y2_dccleaninva + +/* ========================================================================== + Assembly Syntax: dcfetch(Rs32) + C Intrinsic Prototype: void Q6_dcfetch_A(Address Rs) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_dcfetch_A __builtin_HEXAGON_Y2_dcfetch + +/* ========================================================================== + Assembly Syntax: dcinva(Rs32) + C Intrinsic Prototype: void Q6_dcinva_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dcinva_A __builtin_HEXAGON_Y2_dcinva + +/* ========================================================================== + Assembly Syntax: dczeroa(Rs32) + C Intrinsic Prototype: void Q6_dczeroa_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dczeroa_A __builtin_HEXAGON_Y2_dczeroa + +/* ========================================================================== + Assembly Syntax: l2fetch(Rs32,Rt32) + C Intrinsic Prototype: void Q6_l2fetch_AR(Address Rs, Word32 Rt) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_l2fetch_AR __builtin_HEXAGON_Y4_l2fetch + +/* ========================================================================== + Assembly Syntax: l2fetch(Rs32,Rtt32) + C Intrinsic Prototype: void Q6_l2fetch_AP(Address Rs, Word64 Rtt) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_l2fetch_AP __builtin_HEXAGON_Y5_l2fetch + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rdd32=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rol_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rol_PI __builtin_HEXAGON_S6_rol_i_p +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32+=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolacc_PI __builtin_HEXAGON_S6_rol_i_p_acc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32&=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_roland_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_roland_PI __builtin_HEXAGON_S6_rol_i_p_and +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32-=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolnac_PI __builtin_HEXAGON_S6_rol_i_p_nac +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32|=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolor_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolor_PI __builtin_HEXAGON_S6_rol_i_p_or +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32^=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolxacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolxacc_PI __builtin_HEXAGON_S6_rol_i_p_xacc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rd32=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rol_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rol_RI __builtin_HEXAGON_S6_rol_i_r +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32+=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolacc_RI __builtin_HEXAGON_S6_rol_i_r_acc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32&=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_roland_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_roland_RI __builtin_HEXAGON_S6_rol_i_r_and +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32-=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolnac_RI __builtin_HEXAGON_S6_rol_i_r_nac +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32|=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolor_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolor_RI __builtin_HEXAGON_S6_rol_i_r_or +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32^=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolxacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolxacc_RI __builtin_HEXAGON_S6_rol_i_r_xacc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffb(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffb_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffb_PP __builtin_HEXAGON_M6_vabsdiffb +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffub_PP __builtin_HEXAGON_M6_vabsdiffub +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vsplatb(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsplatb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsplatb_R __builtin_HEXAGON_S6_vsplatrbp +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunehb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunehb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunehb_PP __builtin_HEXAGON_S6_vtrunehb_ppp +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunohb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunohb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunohb_PP __builtin_HEXAGON_S6_vtrunohb_ppp +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Pd4=!any8(vcmpb.eq(Rss32,Rtt32)) + C Intrinsic Prototype: Byte Q6_p_not_any8_vcmpb_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_any8_vcmpb_eq_PP __builtin_HEXAGON_A6_vcmpbeq_notany +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rdd32=dfadd(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfadd_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfadd_PP __builtin_HEXAGON_F2_dfadd +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rdd32=dfsub(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfsub_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfsub_PP __builtin_HEXAGON_F2_dfsub +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rx32-=mpyi(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyinac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyinac_RR __builtin_HEXAGON_M2_mnaci +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rd32=mask(#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_mask_II(Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mask_II __builtin_HEXAGON_S2_mask +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=clip(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_clip_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clip_RI __builtin_HEXAGON_A7_clip +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cround(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_cround_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cround_PI __builtin_HEXAGON_A7_croundd_ri +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cround(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cround_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cround_PR __builtin_HEXAGON_A7_croundd_rr +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=vclip(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vclip_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vclip_PI __builtin_HEXAGON_A7_vclip +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmax(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmax_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmax_PP __builtin_HEXAGON_F2_dfmax +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmin(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmin_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmin_PP __builtin_HEXAGON_F2_dfmin +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmpyfix(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpyfix_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpyfix_PP __builtin_HEXAGON_F2_dfmpyfix +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rxx32+=dfmpyhh(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpyhhacc_PP(Float64 Rxx, Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpyhhacc_PP __builtin_HEXAGON_F2_dfmpyhh +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rxx32+=dfmpylh(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpylhacc_PP(Float64 Rxx, Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpylhacc_PP __builtin_HEXAGON_F2_dfmpylh +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmpyll(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpyll_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpyll_PP __builtin_HEXAGON_F2_dfmpyll +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyiw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyiw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiw_PP __builtin_HEXAGON_M7_dcmpyiw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyiw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyiwacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiwacc_PP __builtin_HEXAGON_M7_dcmpyiw_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyiw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyiw_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiw_PP_conj __builtin_HEXAGON_M7_dcmpyiwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyiw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyiwacc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiwacc_PP_conj __builtin_HEXAGON_M7_dcmpyiwc_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyrw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyrw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrw_PP __builtin_HEXAGON_M7_dcmpyrw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyrw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyrwacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrwacc_PP __builtin_HEXAGON_M7_dcmpyrw_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyrw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyrw_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrw_PP_conj __builtin_HEXAGON_M7_dcmpyrwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyrw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyrwacc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrwacc_PP_conj __builtin_HEXAGON_M7_dcmpyrwc_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpyw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vdmpyw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_vdmpyw_PP __builtin_HEXAGON_M7_vdmpy +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpyw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vdmpywacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_vdmpywacc_PP __builtin_HEXAGON_M7_vdmpy_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_s1_sat __builtin_HEXAGON_M7_wcmpyiw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyiw_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32*):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_conj_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_conj_s1_sat __builtin_HEXAGON_M7_wcmpyiwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_conj_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_conj_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyiwc_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_s1_sat __builtin_HEXAGON_M7_wcmpyrw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyrw_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32*):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_conj_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_conj_s1_sat __builtin_HEXAGON_M7_wcmpyrwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_conj_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_conj_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyrwc_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: dmlink(Rs32,Rt32) + C Intrinsic Prototype: void Q6_dmlink_AA(Address Rs, Address Rt) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dmlink_AA __builtin_HEXAGON_Y6_dmlink +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Rd32=dmpause + C Intrinsic Prototype: Word32 Q6_R_dmpause() + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_dmpause __builtin_HEXAGON_Y6_dmpause +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Rd32=dmpoll + C Intrinsic Prototype: Word32 Q6_R_dmpoll() + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_dmpoll __builtin_HEXAGON_Y6_dmpoll +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: dmresume(Rs32) + C Intrinsic Prototype: void Q6_dmresume_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dmresume_A __builtin_HEXAGON_Y6_dmresume +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: dmstart(Rs32) + C Intrinsic Prototype: void Q6_dmstart_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dmstart_A __builtin_HEXAGON_Y6_dmstart +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Rd32=dmwait + C Intrinsic Prototype: Word32 Q6_R_dmwait() + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_dmwait __builtin_HEXAGON_Y6_dmwait +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#include +#ifdef __HVX__ +#include +#endif /* __HVX__ */ +#endif diff --git a/llvm/lib/clang/19/include/hexagon_types.h b/llvm/lib/clang/19/include/hexagon_types.h new file mode 100644 index 0000000000000000000000000000000000000000..029727cc48176b32cece33575b2b719d1a826768 --- /dev/null +++ b/llvm/lib/clang/19/include/hexagon_types.h @@ -0,0 +1,2621 @@ +/******************************************************************************/ +/* (c) 2020 Qualcomm Innovation Center, Inc. All rights reserved. */ +/* */ +/******************************************************************************/ +#ifndef HEXAGON_TYPES_H +#define HEXAGON_TYPES_H + +#include + +/* Hexagon names */ +#define HEXAGON_Vect HEXAGON_Vect64 +#define HEXAGON_V_GET_D HEXAGON_V64_GET_D +#define HEXAGON_V_GET_UD HEXAGON_V64_GET_UD +#define HEXAGON_V_GET_W0 HEXAGON_V64_GET_W0 +#define HEXAGON_V_GET_W1 HEXAGON_V64_GET_W1 +#define HEXAGON_V_GET_UW0 HEXAGON_V64_GET_UW0 +#define HEXAGON_V_GET_UW1 HEXAGON_V64_GET_UW1 +#define HEXAGON_V_GET_H0 HEXAGON_V64_GET_H0 +#define HEXAGON_V_GET_H1 HEXAGON_V64_GET_H1 +#define HEXAGON_V_GET_H2 HEXAGON_V64_GET_H2 +#define HEXAGON_V_GET_H3 HEXAGON_V64_GET_H3 +#define HEXAGON_V_GET_UH0 HEXAGON_V64_GET_UH0 +#define HEXAGON_V_GET_UH1 HEXAGON_V64_GET_UH1 +#define HEXAGON_V_GET_UH2 HEXAGON_V64_GET_UH2 +#define HEXAGON_V_GET_UH3 HEXAGON_V64_GET_UH3 +#define HEXAGON_V_GET_B0 HEXAGON_V64_GET_B0 +#define HEXAGON_V_GET_B1 HEXAGON_V64_GET_B1 +#define HEXAGON_V_GET_B2 HEXAGON_V64_GET_B2 +#define HEXAGON_V_GET_B3 HEXAGON_V64_GET_B3 +#define HEXAGON_V_GET_B4 HEXAGON_V64_GET_B4 +#define HEXAGON_V_GET_B5 HEXAGON_V64_GET_B5 +#define HEXAGON_V_GET_B6 HEXAGON_V64_GET_B6 +#define HEXAGON_V_GET_B7 HEXAGON_V64_GET_B7 +#define HEXAGON_V_GET_UB0 HEXAGON_V64_GET_UB0 +#define HEXAGON_V_GET_UB1 HEXAGON_V64_GET_UB1 +#define HEXAGON_V_GET_UB2 HEXAGON_V64_GET_UB2 +#define HEXAGON_V_GET_UB3 HEXAGON_V64_GET_UB3 +#define HEXAGON_V_GET_UB4 HEXAGON_V64_GET_UB4 +#define HEXAGON_V_GET_UB5 HEXAGON_V64_GET_UB5 +#define HEXAGON_V_GET_UB6 HEXAGON_V64_GET_UB6 +#define HEXAGON_V_GET_UB7 HEXAGON_V64_GET_UB7 +#define HEXAGON_V_PUT_D HEXAGON_V64_PUT_D +#define HEXAGON_V_PUT_W0 HEXAGON_V64_PUT_W0 +#define HEXAGON_V_PUT_W1 HEXAGON_V64_PUT_W1 +#define HEXAGON_V_PUT_H0 HEXAGON_V64_PUT_H0 +#define HEXAGON_V_PUT_H1 HEXAGON_V64_PUT_H1 +#define HEXAGON_V_PUT_H2 HEXAGON_V64_PUT_H2 +#define HEXAGON_V_PUT_H3 HEXAGON_V64_PUT_H3 +#define HEXAGON_V_PUT_B0 HEXAGON_V64_PUT_B0 +#define HEXAGON_V_PUT_B1 HEXAGON_V64_PUT_B1 +#define HEXAGON_V_PUT_B2 HEXAGON_V64_PUT_B2 +#define HEXAGON_V_PUT_B3 HEXAGON_V64_PUT_B3 +#define HEXAGON_V_PUT_B4 HEXAGON_V64_PUT_B4 +#define HEXAGON_V_PUT_B5 HEXAGON_V64_PUT_B5 +#define HEXAGON_V_PUT_B6 HEXAGON_V64_PUT_B6 +#define HEXAGON_V_PUT_B7 HEXAGON_V64_PUT_B7 +#define HEXAGON_V_CREATE_D HEXAGON_V64_CREATE_D +#define HEXAGON_V_CREATE_W HEXAGON_V64_CREATE_W +#define HEXAGON_V_CREATE_H HEXAGON_V64_CREATE_H +#define HEXAGON_V_CREATE_B HEXAGON_V64_CREATE_B + +#ifdef __cplusplus +#define HEXAGON_VectC HEXAGON_Vect64C +#endif /* __cplusplus */ + +/* 64 Bit Vectors */ + +typedef long long __attribute__((__may_alias__)) HEXAGON_Vect64; + +/* Extract doubleword macros */ + +#define HEXAGON_V64_GET_D(v) (v) +#define HEXAGON_V64_GET_UD(v) ((unsigned long long)(v)) + +/* Extract word macros */ + +#define HEXAGON_V64_GET_W0(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[0]; \ + }) +#define HEXAGON_V64_GET_W1(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[1]; \ + }) +#define HEXAGON_V64_GET_UW0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uw[0]; \ + }) +#define HEXAGON_V64_GET_UW1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uw[1]; \ + }) + +/* Extract half word macros */ + +#define HEXAGON_V64_GET_H0(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[0]; \ + }) +#define HEXAGON_V64_GET_H1(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[1]; \ + }) +#define HEXAGON_V64_GET_H2(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[2]; \ + }) +#define HEXAGON_V64_GET_H3(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[3]; \ + }) +#define HEXAGON_V64_GET_UH0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[0]; \ + }) +#define HEXAGON_V64_GET_UH1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[1]; \ + }) +#define HEXAGON_V64_GET_UH2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[2]; \ + }) +#define HEXAGON_V64_GET_UH3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[3]; \ + }) + +/* Extract byte macros */ + +#define HEXAGON_V64_GET_B0(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[0]; \ + }) +#define HEXAGON_V64_GET_B1(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[1]; \ + }) +#define HEXAGON_V64_GET_B2(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[2]; \ + }) +#define HEXAGON_V64_GET_B3(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[3]; \ + }) +#define HEXAGON_V64_GET_B4(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[4]; \ + }) +#define HEXAGON_V64_GET_B5(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[5]; \ + }) +#define HEXAGON_V64_GET_B6(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[6]; \ + }) +#define HEXAGON_V64_GET_B7(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[7]; \ + }) +#define HEXAGON_V64_GET_UB0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[0]; \ + }) +#define HEXAGON_V64_GET_UB1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[1]; \ + }) +#define HEXAGON_V64_GET_UB2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[2]; \ + }) +#define HEXAGON_V64_GET_UB3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[3]; \ + }) +#define HEXAGON_V64_GET_UB4(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[4]; \ + }) +#define HEXAGON_V64_GET_UB5(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[5]; \ + }) +#define HEXAGON_V64_GET_UB6(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[6]; \ + }) +#define HEXAGON_V64_GET_UB7(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[7]; \ + }) + +/* NOTE: All set macros return a HEXAGON_Vect64 type */ + +/* Set doubleword macro */ + +#define HEXAGON_V64_PUT_D(v, new) (new) + +/* Set word macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_PUT_W0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[0] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_W1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[1] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_PUT_W0(v, new) \ + (((v) & 0xffffffff00000000LL) | ((HEXAGON_Vect64)((unsigned int)(new)))) +#define HEXAGON_V64_PUT_W1(v, new) \ + (((v) & 0x00000000ffffffffLL) | (((HEXAGON_Vect64)(new)) << 32LL)) + +#endif /* !__hexagon__ */ + +/* Set half word macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_PUT_H0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[0] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_H1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[1] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_H2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[2] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_H3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[3] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_PUT_H0(v, new) \ + (((v) & 0xffffffffffff0000LL) | ((HEXAGON_Vect64)((unsigned short)(new)))) +#define HEXAGON_V64_PUT_H1(v, new) \ + (((v) & 0xffffffff0000ffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 16LL)) +#define HEXAGON_V64_PUT_H2(v, new) \ + (((v) & 0xffff0000ffffffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 32LL)) +#define HEXAGON_V64_PUT_H3(v, new) \ + (((v) & 0x0000ffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 48LL)) + +#endif /* !__hexagon__ */ + +/* Set byte macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_PUT_B0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[0] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[1] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[2] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[3] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B4(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[4] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B5(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[5] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B6(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[6] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B7(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[7] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_PUT_B0(v, new) \ + (((v) & 0xffffffffffffff00LL) | ((HEXAGON_Vect64)((unsigned char)(new)))) +#define HEXAGON_V64_PUT_B1(v, new) \ + (((v) & 0xffffffffffff00ffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 8LL)) +#define HEXAGON_V64_PUT_B2(v, new) \ + (((v) & 0xffffffffff00ffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 16LL)) +#define HEXAGON_V64_PUT_B3(v, new) \ + (((v) & 0xffffffff00ffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 24LL)) +#define HEXAGON_V64_PUT_B4(v, new) \ + (((v) & 0xffffff00ffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 32LL)) +#define HEXAGON_V64_PUT_B5(v, new) \ + (((v) & 0xffff00ffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 40LL)) +#define HEXAGON_V64_PUT_B6(v, new) \ + (((v) & 0xff00ffffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 48LL)) +#define HEXAGON_V64_PUT_B7(v, new) \ + (((v) & 0x00ffffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 56LL)) + +#endif /* !__hexagon__ */ + +/* NOTE: All create macros return a HEXAGON_Vect64 type */ + +/* Create from a doubleword */ + +#define HEXAGON_V64_CREATE_D(d) (d) + +/* Create from words */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_CREATE_W(w1, w0) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.w[0] = (w0); \ + _HEXAGON_V64_internal_union.w[1] = (w1); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_CREATE_W(w1, w0) \ + ((((HEXAGON_Vect64)(w1)) << 32LL) | ((HEXAGON_Vect64)((w0) & 0xffffffff))) + +#endif /* !__hexagon__ */ + +/* Create from half words */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.h[0] = (h0); \ + _HEXAGON_V64_internal_union.h[1] = (h1); \ + _HEXAGON_V64_internal_union.h[2] = (h2); \ + _HEXAGON_V64_internal_union.h[3] = (h3); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \ + ((((HEXAGON_Vect64)(h3)) << 48LL) | (((HEXAGON_Vect64)((h2) & 0xffff)) << 32LL) | \ + (((HEXAGON_Vect64)((h1) & 0xffff)) << 16LL) | ((HEXAGON_Vect64)((h0) & 0xffff))) + +#endif /* !__hexagon__ */ + +/* Create from bytes */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.b[0] = (b0); \ + _HEXAGON_V64_internal_union.b[1] = (b1); \ + _HEXAGON_V64_internal_union.b[2] = (b2); \ + _HEXAGON_V64_internal_union.b[3] = (b3); \ + _HEXAGON_V64_internal_union.b[4] = (b4); \ + _HEXAGON_V64_internal_union.b[5] = (b5); \ + _HEXAGON_V64_internal_union.b[6] = (b6); \ + _HEXAGON_V64_internal_union.b[7] = (b7); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + ((((HEXAGON_Vect64)(b7)) << 56LL) | (((HEXAGON_Vect64)((b6) & 0xff)) << 48LL) | \ + (((HEXAGON_Vect64)((b5) & 0xff)) << 40LL) | (((HEXAGON_Vect64)((b4) & 0xff)) << 32LL) | \ + (((HEXAGON_Vect64)((b3) & 0xff)) << 24LL) | (((HEXAGON_Vect64)((b2) & 0xff)) << 16LL) | \ + (((HEXAGON_Vect64)((b1) & 0xff)) << 8LL) | ((HEXAGON_Vect64)((b0) & 0xff))) + +#endif /* !__hexagon__ */ + +#ifdef __cplusplus + +class HEXAGON_Vect64C { +public: + // Constructors + HEXAGON_Vect64C(long long d = 0) : data(d) {}; + HEXAGON_Vect64C(int w1, int w0) : data(HEXAGON_V64_CREATE_W(w1, w0)) {}; + HEXAGON_Vect64C(short h3, short h2, short h1, short h0) + : data(HEXAGON_V64_CREATE_H(h3, h2, h1, h0)) {}; + HEXAGON_Vect64C(signed char b7, signed char b6, signed char b5, signed char b4, + signed char b3, signed char b2, signed char b1, signed char b0) + : data(HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0)) {}; + HEXAGON_Vect64C(const HEXAGON_Vect64C &v) : data(v.data) {}; + + HEXAGON_Vect64C &operator=(const HEXAGON_Vect64C &v) { + data = v.data; + return *this; + }; + + operator long long() { + return data; + }; + + // Extract doubleword methods + long long D(void) { + return HEXAGON_V64_GET_D(data); + }; + unsigned long long UD(void) { + return HEXAGON_V64_GET_UD(data); + }; + + // Extract word methods + int W0(void) { + return HEXAGON_V64_GET_W0(data); + }; + int W1(void) { + return HEXAGON_V64_GET_W1(data); + }; + unsigned int UW0(void) { + return HEXAGON_V64_GET_UW0(data); + }; + unsigned int UW1(void) { + return HEXAGON_V64_GET_UW1(data); + }; + + // Extract half word methods + short H0(void) { + return HEXAGON_V64_GET_H0(data); + }; + short H1(void) { + return HEXAGON_V64_GET_H1(data); + }; + short H2(void) { + return HEXAGON_V64_GET_H2(data); + }; + short H3(void) { + return HEXAGON_V64_GET_H3(data); + }; + unsigned short UH0(void) { + return HEXAGON_V64_GET_UH0(data); + }; + unsigned short UH1(void) { + return HEXAGON_V64_GET_UH1(data); + }; + unsigned short UH2(void) { + return HEXAGON_V64_GET_UH2(data); + }; + unsigned short UH3(void) { + return HEXAGON_V64_GET_UH3(data); + }; + + // Extract byte methods + signed char B0(void) { + return HEXAGON_V64_GET_B0(data); + }; + signed char B1(void) { + return HEXAGON_V64_GET_B1(data); + }; + signed char B2(void) { + return HEXAGON_V64_GET_B2(data); + }; + signed char B3(void) { + return HEXAGON_V64_GET_B3(data); + }; + signed char B4(void) { + return HEXAGON_V64_GET_B4(data); + }; + signed char B5(void) { + return HEXAGON_V64_GET_B5(data); + }; + signed char B6(void) { + return HEXAGON_V64_GET_B6(data); + }; + signed char B7(void) { + return HEXAGON_V64_GET_B7(data); + }; + unsigned char UB0(void) { + return HEXAGON_V64_GET_UB0(data); + }; + unsigned char UB1(void) { + return HEXAGON_V64_GET_UB1(data); + }; + unsigned char UB2(void) { + return HEXAGON_V64_GET_UB2(data); + }; + unsigned char UB3(void) { + return HEXAGON_V64_GET_UB3(data); + }; + unsigned char UB4(void) { + return HEXAGON_V64_GET_UB4(data); + }; + unsigned char UB5(void) { + return HEXAGON_V64_GET_UB5(data); + }; + unsigned char UB6(void) { + return HEXAGON_V64_GET_UB6(data); + }; + unsigned char UB7(void) { + return HEXAGON_V64_GET_UB7(data); + }; + + // NOTE: All set methods return a HEXAGON_Vect64C type + + // Set doubleword method + HEXAGON_Vect64C D(long long d) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_D(data, d)); + }; + + // Set word methods + HEXAGON_Vect64C W0(int w) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_W0(data, w)); + }; + HEXAGON_Vect64C W1(int w) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_W1(data, w)); + }; + + // Set half word methods + HEXAGON_Vect64C H0(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H0(data, h)); + }; + HEXAGON_Vect64C H1(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H1(data, h)); + }; + HEXAGON_Vect64C H2(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H2(data, h)); + }; + HEXAGON_Vect64C H3(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H3(data, h)); + }; + + // Set byte methods + HEXAGON_Vect64C B0(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data, b)); + }; + HEXAGON_Vect64C B1(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data, b)); + }; + HEXAGON_Vect64C B2(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B2(data, b)); + }; + HEXAGON_Vect64C B3(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B3(data, b)); + }; + HEXAGON_Vect64C B4(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B4(data, b)); + }; + HEXAGON_Vect64C B5(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B5(data, b)); + }; + HEXAGON_Vect64C B6(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B6(data, b)); + }; + HEXAGON_Vect64C B7(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B7(data, b)); + }; + +private: + long long data; +}; + +#endif /* __cplusplus */ + +/* 32 Bit Vectors */ + +typedef int HEXAGON_Vect32; + +/* Extract word macros */ + +#define HEXAGON_V32_GET_W(v) (v) +#define HEXAGON_V32_GET_UW(v) ((unsigned int)(v)) + +/* Extract half word macros */ + +#define HEXAGON_V32_GET_H0(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[0]; \ + }) +#define HEXAGON_V32_GET_H1(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[1]; \ + }) +#define HEXAGON_V32_GET_UH0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.uh[0]; \ + }) +#define HEXAGON_V32_GET_UH1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.uh[1]; \ + }) + +/* Extract byte macros */ + +#define HEXAGON_V32_GET_B0(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[0]; \ + }) +#define HEXAGON_V32_GET_B1(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[1]; \ + }) +#define HEXAGON_V32_GET_B2(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[2]; \ + }) +#define HEXAGON_V32_GET_B3(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[3]; \ + }) +#define HEXAGON_V32_GET_UB0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[0]; \ + }) +#define HEXAGON_V32_GET_UB1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[1]; \ + }) +#define HEXAGON_V32_GET_UB2(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[2]; \ + }) +#define HEXAGON_V32_GET_UB3(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[3]; \ + }) + +/* NOTE: All set macros return a HEXAGON_Vect32 type */ + +/* Set word macro */ + +#define HEXAGON_V32_PUT_W(v, new) (new) + +/* Set half word macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V32_PUT_H0(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[0] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_H1(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[1] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_PUT_H0(v, new) \ + (((v) & 0xffff0000) | ((HEXAGON_Vect32)((unsigned short)(new)))) +#define HEXAGON_V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((HEXAGON_Vect32)(new)) << 16)) + +#endif /* !__hexagon__ */ + +/* Set byte macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V32_PUT_B0(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[0] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_B1(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[1] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_B2(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[2] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_B3(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[3] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_PUT_B0(v, new) \ + (((v) & 0xffffff00) | ((HEXAGON_Vect32)((unsigned char)(new)))) +#define HEXAGON_V32_PUT_B1(v, new) \ + (((v) & 0xffff00ff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 8)) +#define HEXAGON_V32_PUT_B2(v, new) \ + (((v) & 0xff00ffff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 16)) +#define HEXAGON_V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((HEXAGON_Vect32)(new)) << 24)) + +#endif /* !__hexagon__ */ + +/* NOTE: All create macros return a HEXAGON_Vect32 type */ + +/* Create from a word */ + +#define HEXAGON_V32_CREATE_W(w) (w) + +/* Create from half words */ + +#ifdef __hexagon__ + +#define HEXAGON_V32_CREATE_H(h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.h[0] = (h0); \ + _HEXAGON_V32_internal_union.h[1] = (h1); \ + _HEXAGON_V32_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_CREATE_H(h1, h0) \ + ((((HEXAGON_Vect32)(h1)) << 16) | ((HEXAGON_Vect32)((h0) & 0xffff))) + +#endif /* !__hexagon__ */ + +/* Create from bytes */ +#ifdef __hexagon__ + +#define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.b[0] = (b0); \ + _HEXAGON_V32_internal_union.b[1] = (b1); \ + _HEXAGON_V32_internal_union.b[2] = (b2); \ + _HEXAGON_V32_internal_union.b[3] = (b3); \ + _HEXAGON_V32_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \ + ((((HEXAGON_Vect32)(b3)) << 24) | (((HEXAGON_Vect32)((b2) & 0xff)) << 16) | \ + (((HEXAGON_Vect32)((b1) & 0xff)) << 8) | ((HEXAGON_Vect32)((b0) & 0xff))) + +#endif /* !__hexagon__ */ + +#ifdef __cplusplus + +class HEXAGON_Vect32C { +public: + // Constructors + HEXAGON_Vect32C(int w = 0) : data(w) {}; + HEXAGON_Vect32C(short h1, short h0) : data(HEXAGON_V32_CREATE_H(h1, h0)) {}; + HEXAGON_Vect32C(signed char b3, signed char b2, signed char b1, signed char b0) + : data(HEXAGON_V32_CREATE_B(b3, b2, b1, b0)) {}; + HEXAGON_Vect32C(const HEXAGON_Vect32C &v) : data(v.data) {}; + + HEXAGON_Vect32C &operator=(const HEXAGON_Vect32C &v) { + data = v.data; + return *this; + }; + + operator int() { + return data; + }; + + // Extract word methods + int W(void) { + return HEXAGON_V32_GET_W(data); + }; + unsigned int UW(void) { + return HEXAGON_V32_GET_UW(data); + }; + + // Extract half word methods + short H0(void) { + return HEXAGON_V32_GET_H0(data); + }; + short H1(void) { + return HEXAGON_V32_GET_H1(data); + }; + unsigned short UH0(void) { + return HEXAGON_V32_GET_UH0(data); + }; + unsigned short UH1(void) { + return HEXAGON_V32_GET_UH1(data); + }; + + // Extract byte methods + signed char B0(void) { + return HEXAGON_V32_GET_B0(data); + }; + signed char B1(void) { + return HEXAGON_V32_GET_B1(data); + }; + signed char B2(void) { + return HEXAGON_V32_GET_B2(data); + }; + signed char B3(void) { + return HEXAGON_V32_GET_B3(data); + }; + unsigned char UB0(void) { + return HEXAGON_V32_GET_UB0(data); + }; + unsigned char UB1(void) { + return HEXAGON_V32_GET_UB1(data); + }; + unsigned char UB2(void) { + return HEXAGON_V32_GET_UB2(data); + }; + unsigned char UB3(void) { + return HEXAGON_V32_GET_UB3(data); + }; + + // NOTE: All set methods return a HEXAGON_Vect32C type + + // Set word method + HEXAGON_Vect32C W(int w) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_W(data, w)); + }; + + // Set half word methods + HEXAGON_Vect32C H0(short h) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_H0(data, h)); + }; + HEXAGON_Vect32C H1(short h) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_H1(data, h)); + }; + + // Set byte methods + HEXAGON_Vect32C B0(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data, b)); + }; + HEXAGON_Vect32C B1(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data, b)); + }; + HEXAGON_Vect32C B2(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B2(data, b)); + }; + HEXAGON_Vect32C B3(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B3(data, b)); + }; + +private: + int data; +}; + +#endif /* __cplusplus */ + +// V65 Vector types +#if __HVX_ARCH__ >= 65 +#if defined __HVX__ && (__HVX_LENGTH__ == 128) + typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(256))); + + typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(4))); + + typedef long HEXAGON_UVect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(4))); + + #define HVX_VectorPred HEXAGON_VecPred128 + #define HVX_Vector HEXAGON_Vect1024 + #define HVX_VectorPair HEXAGON_Vect2048 + #define HVX_UVector HEXAGON_UVect1024 + #define HVX_UVectorPair HEXAGON_UVect2048 +#else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#if defined __HVX__ && (__HVX_LENGTH__ == 64) + typedef long HEXAGON_VecPred64 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + + typedef long HEXAGON_Vect512 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + + typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_UVect512 __attribute__((__vector_size__(64))) + __attribute__((aligned(4))); + + typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(4))); + + #define HVX_VectorPred HEXAGON_VecPred64 + #define HVX_Vector HEXAGON_Vect512 + #define HVX_VectorPair HEXAGON_Vect1024 + #define HVX_UVector HEXAGON_UVect512 + #define HVX_UVectorPair HEXAGON_UVect1024 +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */ +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#endif /* __HVX_ARCH__ >= 65 */ + +/* Predicates */ + +typedef int HEXAGON_Pred; + +/*** + *** backward compatibility aliases + ***/ + +/* Old names */ +#define Q6Vect Q6Vect64 +#define Q6V_GET_D Q6V64_GET_D +#define Q6V_GET_UD Q6V64_GET_UD +#define Q6V_GET_W0 Q6V64_GET_W0 +#define Q6V_GET_W1 Q6V64_GET_W1 +#define Q6V_GET_UW0 Q6V64_GET_UW0 +#define Q6V_GET_UW1 Q6V64_GET_UW1 +#define Q6V_GET_H0 Q6V64_GET_H0 +#define Q6V_GET_H1 Q6V64_GET_H1 +#define Q6V_GET_H2 Q6V64_GET_H2 +#define Q6V_GET_H3 Q6V64_GET_H3 +#define Q6V_GET_UH0 Q6V64_GET_UH0 +#define Q6V_GET_UH1 Q6V64_GET_UH1 +#define Q6V_GET_UH2 Q6V64_GET_UH2 +#define Q6V_GET_UH3 Q6V64_GET_UH3 +#define Q6V_GET_B0 Q6V64_GET_B0 +#define Q6V_GET_B1 Q6V64_GET_B1 +#define Q6V_GET_B2 Q6V64_GET_B2 +#define Q6V_GET_B3 Q6V64_GET_B3 +#define Q6V_GET_B4 Q6V64_GET_B4 +#define Q6V_GET_B5 Q6V64_GET_B5 +#define Q6V_GET_B6 Q6V64_GET_B6 +#define Q6V_GET_B7 Q6V64_GET_B7 +#define Q6V_GET_UB0 Q6V64_GET_UB0 +#define Q6V_GET_UB1 Q6V64_GET_UB1 +#define Q6V_GET_UB2 Q6V64_GET_UB2 +#define Q6V_GET_UB3 Q6V64_GET_UB3 +#define Q6V_GET_UB4 Q6V64_GET_UB4 +#define Q6V_GET_UB5 Q6V64_GET_UB5 +#define Q6V_GET_UB6 Q6V64_GET_UB6 +#define Q6V_GET_UB7 Q6V64_GET_UB7 +#define Q6V_PUT_D Q6V64_PUT_D +#define Q6V_PUT_W0 Q6V64_PUT_W0 +#define Q6V_PUT_W1 Q6V64_PUT_W1 +#define Q6V_PUT_H0 Q6V64_PUT_H0 +#define Q6V_PUT_H1 Q6V64_PUT_H1 +#define Q6V_PUT_H2 Q6V64_PUT_H2 +#define Q6V_PUT_H3 Q6V64_PUT_H3 +#define Q6V_PUT_B0 Q6V64_PUT_B0 +#define Q6V_PUT_B1 Q6V64_PUT_B1 +#define Q6V_PUT_B2 Q6V64_PUT_B2 +#define Q6V_PUT_B3 Q6V64_PUT_B3 +#define Q6V_PUT_B4 Q6V64_PUT_B4 +#define Q6V_PUT_B5 Q6V64_PUT_B5 +#define Q6V_PUT_B6 Q6V64_PUT_B6 +#define Q6V_PUT_B7 Q6V64_PUT_B7 +#define Q6V_CREATE_D Q6V64_CREATE_D +#define Q6V_CREATE_W Q6V64_CREATE_W +#define Q6V_CREATE_H Q6V64_CREATE_H +#define Q6V_CREATE_B Q6V64_CREATE_B + +#ifdef __cplusplus +#define Q6VectC Q6Vect64C +#endif /* __cplusplus */ + +/* 64 Bit Vectors */ + +typedef long long __attribute__((__may_alias__)) Q6Vect64; + +/* Extract doubleword macros */ + +#define Q6V64_GET_D(v) (v) +#define Q6V64_GET_UD(v) ((unsigned long long)(v)) + +/* Extract word macros */ + +#define Q6V64_GET_W0(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[0]; \ + }) +#define Q6V64_GET_W1(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[1]; \ + }) +#define Q6V64_GET_UW0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uw[0]; \ + }) +#define Q6V64_GET_UW1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uw[1]; \ + }) + +/* Extract half word macros */ + +#define Q6V64_GET_H0(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[0]; \ + }) +#define Q6V64_GET_H1(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[1]; \ + }) +#define Q6V64_GET_H2(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[2]; \ + }) +#define Q6V64_GET_H3(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[3]; \ + }) +#define Q6V64_GET_UH0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[0]; \ + }) +#define Q6V64_GET_UH1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[1]; \ + }) +#define Q6V64_GET_UH2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[2]; \ + }) +#define Q6V64_GET_UH3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[3]; \ + }) + +/* Extract byte macros */ + +#define Q6V64_GET_B0(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[0]; \ + }) +#define Q6V64_GET_B1(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[1]; \ + }) +#define Q6V64_GET_B2(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[2]; \ + }) +#define Q6V64_GET_B3(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[3]; \ + }) +#define Q6V64_GET_B4(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[4]; \ + }) +#define Q6V64_GET_B5(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[5]; \ + }) +#define Q6V64_GET_B6(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[6]; \ + }) +#define Q6V64_GET_B7(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[7]; \ + }) +#define Q6V64_GET_UB0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[0]; \ + }) +#define Q6V64_GET_UB1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[1]; \ + }) +#define Q6V64_GET_UB2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[2]; \ + }) +#define Q6V64_GET_UB3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[3]; \ + }) +#define Q6V64_GET_UB4(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[4]; \ + }) +#define Q6V64_GET_UB5(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[5]; \ + }) +#define Q6V64_GET_UB6(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[6]; \ + }) +#define Q6V64_GET_UB7(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[7]; \ + }) + +/* NOTE: All set macros return a Q6Vect64 type */ + +/* Set doubleword macro */ + +#define Q6V64_PUT_D(v, new) (new) + +/* Set word macros */ + +#ifdef __qdsp6__ + +#define Q6V64_PUT_W0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[0] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_W1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[1] = (new); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_PUT_W0(v, new) \ + (((v) & 0xffffffff00000000LL) | ((Q6Vect64)((unsigned int)(new)))) +#define Q6V64_PUT_W1(v, new) \ + (((v) & 0x00000000ffffffffLL) | (((Q6Vect64)(new)) << 32LL)) + +#endif /* !__qdsp6__ */ + +/* Set half word macros */ + +#ifdef __qdsp6__ + +#define Q6V64_PUT_H0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[0] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_H1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[1] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_H2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[2] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_H3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[3] = (new); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_PUT_H0(v, new) \ + (((v) & 0xffffffffffff0000LL) | ((Q6Vect64)((unsigned short)(new)))) +#define Q6V64_PUT_H1(v, new) \ + (((v) & 0xffffffff0000ffffLL) | (((Q6Vect64)((unsigned short)(new))) << 16LL)) +#define Q6V64_PUT_H2(v, new) \ + (((v) & 0xffff0000ffffffffLL) | (((Q6Vect64)((unsigned short)(new))) << 32LL)) +#define Q6V64_PUT_H3(v, new) \ + (((v) & 0x0000ffffffffffffLL) | (((Q6Vect64)(new)) << 48LL)) + +#endif /* !__qdsp6__ */ + +/* Set byte macros */ + +#ifdef __qdsp6__ + +#define Q6V64_PUT_B0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[0] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[1] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[2] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[3] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B4(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[4] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B5(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[5] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B6(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[6] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B7(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[7] = (new); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_PUT_B0(v, new) \ + (((v) & 0xffffffffffffff00LL) | ((Q6Vect64)((unsigned char)(new)))) +#define Q6V64_PUT_B1(v, new) \ + (((v) & 0xffffffffffff00ffLL) | (((Q6Vect64)((unsigned char)(new))) << 8LL)) +#define Q6V64_PUT_B2(v, new) \ + (((v) & 0xffffffffff00ffffLL) | (((Q6Vect64)((unsigned char)(new))) << 16LL)) +#define Q6V64_PUT_B3(v, new) \ + (((v) & 0xffffffff00ffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 24LL)) +#define Q6V64_PUT_B4(v, new) \ + (((v) & 0xffffff00ffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 32LL)) +#define Q6V64_PUT_B5(v, new) \ + (((v) & 0xffff00ffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 40LL)) +#define Q6V64_PUT_B6(v, new) \ + (((v) & 0xff00ffffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 48LL)) +#define Q6V64_PUT_B7(v, new) \ + (((v) & 0x00ffffffffffffffLL) | (((Q6Vect64)(new)) << 56LL)) + +#endif /* !__qdsp6__ */ + +/* NOTE: All create macros return a Q6Vect64 type */ + +/* Create from a doubleword */ + +#define Q6V64_CREATE_D(d) (d) + +/* Create from words */ + +#ifdef __qdsp6__ + +#define Q6V64_CREATE_W(w1, w0) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.w[0] = (w0); \ + _Q6V64_internal_union.w[1] = (w1); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_CREATE_W(w1, w0) \ + ((((Q6Vect64)(w1)) << 32LL) | ((Q6Vect64)((w0) & 0xffffffff))) + +#endif /* !__qdsp6__ */ + +/* Create from half words */ + +#ifdef __qdsp6__ + +#define Q6V64_CREATE_H(h3, h2, h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.h[0] = (h0); \ + _Q6V64_internal_union.h[1] = (h1); \ + _Q6V64_internal_union.h[2] = (h2); \ + _Q6V64_internal_union.h[3] = (h3); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_CREATE_H(h3, h2, h1, h0) \ + ((((Q6Vect64)(h3)) << 48LL) | (((Q6Vect64)((h2) & 0xffff)) << 32LL) | \ + (((Q6Vect64)((h1) & 0xffff)) << 16LL) | ((Q6Vect64)((h0) & 0xffff))) + +#endif /* !__qdsp6__ */ + +/* Create from bytes */ + +#ifdef __qdsp6__ + +#define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.b[0] = (b0); \ + _Q6V64_internal_union.b[1] = (b1); \ + _Q6V64_internal_union.b[2] = (b2); \ + _Q6V64_internal_union.b[3] = (b3); \ + _Q6V64_internal_union.b[4] = (b4); \ + _Q6V64_internal_union.b[5] = (b5); \ + _Q6V64_internal_union.b[6] = (b6); \ + _Q6V64_internal_union.b[7] = (b7); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + ((((Q6Vect64)(b7)) << 56LL) | (((Q6Vect64)((b6) & 0xff)) << 48LL) | \ + (((Q6Vect64)((b5) & 0xff)) << 40LL) | (((Q6Vect64)((b4) & 0xff)) << 32LL) | \ + (((Q6Vect64)((b3) & 0xff)) << 24LL) | (((Q6Vect64)((b2) & 0xff)) << 16LL) | \ + (((Q6Vect64)((b1) & 0xff)) << 8LL) | ((Q6Vect64)((b0) & 0xff))) + +#endif /* !__qdsp6__ */ + +#ifdef __cplusplus + +class Q6Vect64C { +public: + // Constructors + Q6Vect64C(long long d = 0) : data(d) {}; + Q6Vect64C(int w1, int w0) : data(Q6V64_CREATE_W(w1, w0)) {}; + Q6Vect64C(short h3, short h2, short h1, short h0) + : data(Q6V64_CREATE_H(h3, h2, h1, h0)) {}; + Q6Vect64C(signed char b7, signed char b6, signed char b5, signed char b4, + signed char b3, signed char b2, signed char b1, signed char b0) + : data(Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0)) {}; + Q6Vect64C(const Q6Vect64C &v) : data(v.data) {}; + + Q6Vect64C &operator=(const Q6Vect64C &v) { + data = v.data; + return *this; + }; + + operator long long() { + return data; + }; + + // Extract doubleword methods + long long D(void) { + return Q6V64_GET_D(data); + }; + unsigned long long UD(void) { + return Q6V64_GET_UD(data); + }; + + // Extract word methods + int W0(void) { + return Q6V64_GET_W0(data); + }; + int W1(void) { + return Q6V64_GET_W1(data); + }; + unsigned int UW0(void) { + return Q6V64_GET_UW0(data); + }; + unsigned int UW1(void) { + return Q6V64_GET_UW1(data); + }; + + // Extract half word methods + short H0(void) { + return Q6V64_GET_H0(data); + }; + short H1(void) { + return Q6V64_GET_H1(data); + }; + short H2(void) { + return Q6V64_GET_H2(data); + }; + short H3(void) { + return Q6V64_GET_H3(data); + }; + unsigned short UH0(void) { + return Q6V64_GET_UH0(data); + }; + unsigned short UH1(void) { + return Q6V64_GET_UH1(data); + }; + unsigned short UH2(void) { + return Q6V64_GET_UH2(data); + }; + unsigned short UH3(void) { + return Q6V64_GET_UH3(data); + }; + + // Extract byte methods + signed char B0(void) { + return Q6V64_GET_B0(data); + }; + signed char B1(void) { + return Q6V64_GET_B1(data); + }; + signed char B2(void) { + return Q6V64_GET_B2(data); + }; + signed char B3(void) { + return Q6V64_GET_B3(data); + }; + signed char B4(void) { + return Q6V64_GET_B4(data); + }; + signed char B5(void) { + return Q6V64_GET_B5(data); + }; + signed char B6(void) { + return Q6V64_GET_B6(data); + }; + signed char B7(void) { + return Q6V64_GET_B7(data); + }; + unsigned char UB0(void) { + return Q6V64_GET_UB0(data); + }; + unsigned char UB1(void) { + return Q6V64_GET_UB1(data); + }; + unsigned char UB2(void) { + return Q6V64_GET_UB2(data); + }; + unsigned char UB3(void) { + return Q6V64_GET_UB3(data); + }; + unsigned char UB4(void) { + return Q6V64_GET_UB4(data); + }; + unsigned char UB5(void) { + return Q6V64_GET_UB5(data); + }; + unsigned char UB6(void) { + return Q6V64_GET_UB6(data); + }; + unsigned char UB7(void) { + return Q6V64_GET_UB7(data); + }; + + // NOTE: All set methods return a Q6Vect64C type + + // Set doubleword method + Q6Vect64C D(long long d) { + return Q6Vect64C(Q6V64_PUT_D(data, d)); + }; + + // Set word methods + Q6Vect64C W0(int w) { + return Q6Vect64C(Q6V64_PUT_W0(data, w)); + }; + Q6Vect64C W1(int w) { + return Q6Vect64C(Q6V64_PUT_W1(data, w)); + }; + + // Set half word methods + Q6Vect64C H0(short h) { + return Q6Vect64C(Q6V64_PUT_H0(data, h)); + }; + Q6Vect64C H1(short h) { + return Q6Vect64C(Q6V64_PUT_H1(data, h)); + }; + Q6Vect64C H2(short h) { + return Q6Vect64C(Q6V64_PUT_H2(data, h)); + }; + Q6Vect64C H3(short h) { + return Q6Vect64C(Q6V64_PUT_H3(data, h)); + }; + + // Set byte methods + Q6Vect64C B0(signed char b) { + return Q6Vect64C(Q6V64_PUT_B0(data, b)); + }; + Q6Vect64C B1(signed char b) { + return Q6Vect64C(Q6V64_PUT_B1(data, b)); + }; + Q6Vect64C B2(signed char b) { + return Q6Vect64C(Q6V64_PUT_B2(data, b)); + }; + Q6Vect64C B3(signed char b) { + return Q6Vect64C(Q6V64_PUT_B3(data, b)); + }; + Q6Vect64C B4(signed char b) { + return Q6Vect64C(Q6V64_PUT_B4(data, b)); + }; + Q6Vect64C B5(signed char b) { + return Q6Vect64C(Q6V64_PUT_B5(data, b)); + }; + Q6Vect64C B6(signed char b) { + return Q6Vect64C(Q6V64_PUT_B6(data, b)); + }; + Q6Vect64C B7(signed char b) { + return Q6Vect64C(Q6V64_PUT_B7(data, b)); + }; + +private: + long long data; +}; + +#endif /* __cplusplus */ + +/* 32 Bit Vectors */ + +typedef int Q6Vect32; + +/* Extract word macros */ + +#define Q6V32_GET_W(v) (v) +#define Q6V32_GET_UW(v) ((unsigned int)(v)) + +/* Extract half word macros */ + +#define Q6V32_GET_H0(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[0]; \ + }) +#define Q6V32_GET_H1(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[1]; \ + }) +#define Q6V32_GET_UH0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.uh[0]; \ + }) +#define Q6V32_GET_UH1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.uh[1]; \ + }) + +/* Extract byte macros */ + +#define Q6V32_GET_B0(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[0]; \ + }) +#define Q6V32_GET_B1(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[1]; \ + }) +#define Q6V32_GET_B2(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[2]; \ + }) +#define Q6V32_GET_B3(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[3]; \ + }) +#define Q6V32_GET_UB0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[0]; \ + }) +#define Q6V32_GET_UB1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[1]; \ + }) +#define Q6V32_GET_UB2(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[2]; \ + }) +#define Q6V32_GET_UB3(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[3]; \ + }) + +/* NOTE: All set macros return a Q6Vect32 type */ + +/* Set word macro */ + +#define Q6V32_PUT_W(v, new) (new) + +/* Set half word macros */ + +#ifdef __qdsp6__ + +#define Q6V32_PUT_H0(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[0] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_H1(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[1] = (new); \ + _Q6V32_internal_union.w; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_PUT_H0(v, new) \ + (((v) & 0xffff0000) | ((Q6Vect32)((unsigned short)(new)))) +#define Q6V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((Q6Vect32)(new)) << 16)) + +#endif /* !__qdsp6__ */ + +/* Set byte macros */ + +#ifdef __qdsp6__ + +#define Q6V32_PUT_B0(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[0] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_B1(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[1] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_B2(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[2] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_B3(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[3] = (new); \ + _Q6V32_internal_union.w; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_PUT_B0(v, new) \ + (((v) & 0xffffff00) | ((Q6Vect32)((unsigned char)(new)))) +#define Q6V32_PUT_B1(v, new) \ + (((v) & 0xffff00ff) | (((Q6Vect32)((unsigned char)(new))) << 8)) +#define Q6V32_PUT_B2(v, new) \ + (((v) & 0xff00ffff) | (((Q6Vect32)((unsigned char)(new))) << 16)) +#define Q6V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((Q6Vect32)(new)) << 24)) + +#endif /* !__qdsp6__ */ + +/* NOTE: All create macros return a Q6Vect32 type */ + +/* Create from a word */ + +#define Q6V32_CREATE_W(w) (w) + +/* Create from half words */ + +#ifdef __qdsp6__ + +#define Q6V32_CREATE_H(h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.h[0] = (h0); \ + _Q6V32_internal_union.h[1] = (h1); \ + _Q6V32_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_CREATE_H(h1, h0) \ + ((((Q6Vect32)(h1)) << 16) | ((Q6Vect32)((h0) & 0xffff))) + +#endif /* !__qdsp6__ */ + +/* Create from bytes */ +#ifdef __qdsp6__ + +#define Q6V32_CREATE_B(b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.b[0] = (b0); \ + _Q6V32_internal_union.b[1] = (b1); \ + _Q6V32_internal_union.b[2] = (b2); \ + _Q6V32_internal_union.b[3] = (b3); \ + _Q6V32_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_CREATE_B(b3, b2, b1, b0) \ + ((((Q6Vect32)(b3)) << 24) | (((Q6Vect32)((b2) & 0xff)) << 16) | \ + (((Q6Vect32)((b1) & 0xff)) << 8) | ((Q6Vect32)((b0) & 0xff))) + +#endif /* !__qdsp6__ */ + +#ifdef __cplusplus + +class Q6Vect32C { +public: + // Constructors + Q6Vect32C(int w = 0) : data(w) {}; + Q6Vect32C(short h1, short h0) : data(Q6V32_CREATE_H(h1, h0)) {}; + Q6Vect32C(signed char b3, signed char b2, signed char b1, signed char b0) + : data(Q6V32_CREATE_B(b3, b2, b1, b0)) {}; + Q6Vect32C(const Q6Vect32C &v) : data(v.data) {}; + + Q6Vect32C &operator=(const Q6Vect32C &v) { + data = v.data; + return *this; + }; + + operator int() { + return data; + }; + + // Extract word methods + int W(void) { + return Q6V32_GET_W(data); + }; + unsigned int UW(void) { + return Q6V32_GET_UW(data); + }; + + // Extract half word methods + short H0(void) { + return Q6V32_GET_H0(data); + }; + short H1(void) { + return Q6V32_GET_H1(data); + }; + unsigned short UH0(void) { + return Q6V32_GET_UH0(data); + }; + unsigned short UH1(void) { + return Q6V32_GET_UH1(data); + }; + + // Extract byte methods + signed char B0(void) { + return Q6V32_GET_B0(data); + }; + signed char B1(void) { + return Q6V32_GET_B1(data); + }; + signed char B2(void) { + return Q6V32_GET_B2(data); + }; + signed char B3(void) { + return Q6V32_GET_B3(data); + }; + unsigned char UB0(void) { + return Q6V32_GET_UB0(data); + }; + unsigned char UB1(void) { + return Q6V32_GET_UB1(data); + }; + unsigned char UB2(void) { + return Q6V32_GET_UB2(data); + }; + unsigned char UB3(void) { + return Q6V32_GET_UB3(data); + }; + + // NOTE: All set methods return a Q6Vect32C type + + // Set word method + Q6Vect32C W(int w) { + return Q6Vect32C(Q6V32_PUT_W(data, w)); + }; + + // Set half word methods + Q6Vect32C H0(short h) { + return Q6Vect32C(Q6V32_PUT_H0(data, h)); + }; + Q6Vect32C H1(short h) { + return Q6Vect32C(Q6V32_PUT_H1(data, h)); + }; + + // Set byte methods + Q6Vect32C B0(signed char b) { + return Q6Vect32C(Q6V32_PUT_B0(data, b)); + }; + Q6Vect32C B1(signed char b) { + return Q6Vect32C(Q6V32_PUT_B1(data, b)); + }; + Q6Vect32C B2(signed char b) { + return Q6Vect32C(Q6V32_PUT_B2(data, b)); + }; + Q6Vect32C B3(signed char b) { + return Q6Vect32C(Q6V32_PUT_B3(data, b)); + }; + +private: + int data; +}; + +#endif /* __cplusplus */ + +// V65 Vector types +#if __HVX_ARCH__ >= 65 +#if defined __HVX__ && (__HVX_LENGTH__ == 128) +typedef long Q6VecPred128 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + +typedef long Q6Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + +typedef long Q6Vect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(256))); + +#else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#if defined __HVX__ && (__HVX_LENGTH__ == 64) +typedef long Q6VecPred64 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + +typedef long Q6Vect512 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + +typedef long Q6Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */ +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#endif /* __HVX_ARCH__ >= 65 */ + +/* Predicates */ + +typedef int Q6Pred; + + +#ifdef __HVX__ + +// Extract HVX VectorPair macro. +#define HEXAGON_HVX_GET_W(v) (v) + +// Extract HVX Vector macros. +#define HEXAGON_HVX_GET_V0(v) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[0]; \ + }) +#define HEXAGON_HVX_GET_V1(v) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[1]; \ + }) +#define HEXAGON_HVX_GET_P(v) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_VectorPred P[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.P[0]; \ + }) + +// Set HVX VectorPair macro. +#define HEXAGON_HVX_PUT_W(v, new) (new) + +// Set HVX Vector macros. +#define HEXAGON_HVX_PUT_V0(v, new) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[0] = (new); \ + _HEXAGON_HVX_internal_union.W; \ + }) + +#define HEXAGON_HVX_PUT_V1(v, new) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[1] = (new); \ + _HEXAGON_HVX_internal_union.W; \ + }) + +#define HEXAGON_HVX_PUT_P(v, new) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_VectorPred P[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.P[0] = (new); \ + _HEXAGON_HVX_internal_union.W; \ + }) + + +#define HEXAGON_HVX_CREATE_W(v1, v0) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.V[0] = (v0); \ + _HEXAGON_HVX_internal_union.V[1] = (v1); \ + _HEXAGON_HVX_internal_union.W; \ + }) + +#ifdef __cplusplus + +class HVX_Vect { +public: + // Constructors. + // Default. + HVX_Vect() : data(Q6_W_vcombine_VV(Q6_V_vzero(), Q6_V_vzero())){}; + + // Custom constructors. + HVX_Vect(HVX_VectorPair W) : data(W){}; + HVX_Vect(HVX_Vector v1, HVX_Vector v0) : data(HEXAGON_HVX_CREATE_W(v1, v0)){}; + + // Copy constructor. + HVX_Vect(const HVX_Vect &W) = default; + + // Move constructor. + HVX_Vect(HVX_Vect &&W) = default; + + // Assignment operator. + HVX_Vect &operator=(const HVX_Vect &W) = default; + + operator HVX_VectorPair() { return data; }; + + // Extract VectorPair method. + HVX_VectorPair W(void) { return HEXAGON_HVX_GET_W(data); }; + + // Extract Vector methods. + HVX_Vector V0(void) { return HEXAGON_HVX_GET_V0(data); }; + HVX_Vector V1(void) { return HEXAGON_HVX_GET_V1(data); }; + HVX_VectorPred P(void) { return HEXAGON_HVX_GET_P(data); }; + + // NOTE: All set methods return a HVX_Vect type. + // Set HVX VectorPair method. + HVX_Vect W(HVX_VectorPair w) { return HVX_Vect(HEXAGON_HVX_PUT_W(data, w)); }; + + // Set HVX Vector methods. + HVX_Vect V0(HVX_Vector v) { return HVX_Vect(HEXAGON_HVX_PUT_V0(data, v)); }; + HVX_Vect V1(HVX_Vector v) { return HVX_Vect(HEXAGON_HVX_PUT_V1(data, v)); }; + HVX_Vect P(HVX_VectorPred p) { return HVX_Vect(HEXAGON_HVX_PUT_P(data, p)); }; + +private: + HVX_VectorPair data; +}; + +#endif /* __cplusplus */ +#endif /* __HVX__ */ + +#define HEXAGON_UDMA_DM0_STATUS_IDLE 0x00000000 +#define HEXAGON_UDMA_DM0_STATUS_RUN 0x00000001 +#define HEXAGON_UDMA_DM0_STATUS_ERROR 0x00000002 +#define HEXAGON_UDMA_DESC_DSTATE_INCOMPLETE 0 +#define HEXAGON_UDMA_DESC_DSTATE_COMPLETE 1 +#define HEXAGON_UDMA_DESC_ORDER_NOORDER 0 +#define HEXAGON_UDMA_DESC_ORDER_ORDER 1 +#define HEXAGON_UDMA_DESC_BYPASS_OFF 0 +#define HEXAGON_UDMA_DESC_BYPASS_ON 1 +#define HEXAGON_UDMA_DESC_COMP_NONE 0 +#define HEXAGON_UDMA_DESC_COMP_DLBC 1 +#define HEXAGON_UDMA_DESC_DESCTYPE_TYPE0 0 +#define HEXAGON_UDMA_DESC_DESCTYPE_TYPE1 1 + +typedef struct hexagon_udma_descriptor_type0_s +{ + void *next; + unsigned int length:24; + unsigned int desctype:2; + unsigned int dstcomp:1; + unsigned int srccomp:1; + unsigned int dstbypass:1; + unsigned int srcbypass:1; + unsigned int order:1; + unsigned int dstate:1; + void *src; + void *dst; +} hexagon_udma_descriptor_type0_t; + +typedef struct hexagon_udma_descriptor_type1_s +{ + void *next; + unsigned int length:24; + unsigned int desctype:2; + unsigned int dstcomp:1; + unsigned int srccomp:1; + unsigned int dstbypass:1; + unsigned int srcbypass:1; + unsigned int order:1; + unsigned int dstate:1; + void *src; + void *dst; + unsigned int allocation:28; + unsigned int padding:4; + unsigned int roiwidth:16; + unsigned int roiheight:16; + unsigned int srcstride:16; + unsigned int dststride:16; + unsigned int srcwidthoffset:16; + unsigned int dstwidthoffset:16; +} hexagon_udma_descriptor_type1_t; + +#endif /* !HEXAGON_TYPES_H */ diff --git a/llvm/lib/clang/19/include/hresetintrin.h b/llvm/lib/clang/19/include/hresetintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..646f6c130961dcbd2af15b54e8760e19ee6869af --- /dev/null +++ b/llvm/lib/clang/19/include/hresetintrin.h @@ -0,0 +1,49 @@ +/*===---------------- hresetintrin.h - HRESET intrinsics -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __X86GPRINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __HRESETINTRIN_H +#define __HRESETINTRIN_H + +#if __has_extension(gnu_asm) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("hreset"))) + +/// Provides a hint to the processor to selectively reset the prediction +/// history of the current logical processor specified by a 32-bit integer +/// value \a __eax. +/// +/// This intrinsic corresponds to the HRESET instruction. +/// +/// \code{.operation} +/// IF __eax == 0 +/// // nop +/// ELSE +/// FOR i := 0 to 31 +/// IF __eax[i] +/// ResetPredictionFeature(i) +/// FI +/// ENDFOR +/// FI +/// \endcode +static __inline void __DEFAULT_FN_ATTRS +_hreset(int __eax) +{ + __asm__ ("hreset $0" :: "a"(__eax)); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __has_extension(gnu_asm) */ + +#endif /* __HRESETINTRIN_H */ diff --git a/llvm/lib/clang/19/include/htmintrin.h b/llvm/lib/clang/19/include/htmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..49c2b9860742932683400710386ef87259bef9f7 --- /dev/null +++ b/llvm/lib/clang/19/include/htmintrin.h @@ -0,0 +1,212 @@ +/*===---- htmintrin.h - Standard header for PowerPC HTM ---------------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +#ifndef __HTMINTRIN_H +#define __HTMINTRIN_H + +#ifndef __HTM__ +#error "HTM instruction set not enabled" +#endif + +#ifdef __powerpc__ + +#include + +typedef uint64_t texasr_t; +typedef uint32_t texasru_t; +typedef uint32_t texasrl_t; +typedef uintptr_t tfiar_t; +typedef uintptr_t tfhar_t; + +#define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3) +#define _HTM_NONTRANSACTIONAL 0x0 +#define _HTM_SUSPENDED 0x1 +#define _HTM_TRANSACTIONAL 0x2 + +#define _TEXASR_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \ + (((TEXASR) >> (63-(BITNUM))) & ((1<<(SIZE))-1)) +#define _TEXASRU_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \ + (((TEXASR) >> (31-(BITNUM))) & ((1<<(SIZE))-1)) + +#define _TEXASR_FAILURE_CODE(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 7, 8) +#define _TEXASRU_FAILURE_CODE(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 8) + +#define _TEXASR_FAILURE_PERSISTENT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 7, 1) +#define _TEXASRU_FAILURE_PERSISTENT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 1) + +#define _TEXASR_DISALLOWED(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 8, 1) +#define _TEXASRU_DISALLOWED(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 8, 1) + +#define _TEXASR_NESTING_OVERFLOW(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 9, 1) +#define _TEXASRU_NESTING_OVERFLOW(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 9, 1) + +#define _TEXASR_FOOTPRINT_OVERFLOW(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 10, 1) +#define _TEXASRU_FOOTPRINT_OVERFLOW(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 10, 1) + +#define _TEXASR_SELF_INDUCED_CONFLICT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 11, 1) +#define _TEXASRU_SELF_INDUCED_CONFLICT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 11, 1) + +#define _TEXASR_NON_TRANSACTIONAL_CONFLICT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 12, 1) +#define _TEXASRU_NON_TRANSACTIONAL_CONFLICT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 12, 1) + +#define _TEXASR_TRANSACTION_CONFLICT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 13, 1) +#define _TEXASRU_TRANSACTION_CONFLICT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 13, 1) + +#define _TEXASR_TRANSLATION_INVALIDATION_CONFLICT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 14, 1) +#define _TEXASRU_TRANSLATION_INVALIDATION_CONFLICT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 14, 1) + +#define _TEXASR_IMPLEMENTAION_SPECIFIC(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 15, 1) +#define _TEXASRU_IMPLEMENTAION_SPECIFIC(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 15, 1) + +#define _TEXASR_INSTRUCTION_FETCH_CONFLICT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 16, 1) +#define _TEXASRU_INSTRUCTION_FETCH_CONFLICT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 16, 1) + +#define _TEXASR_ABORT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 31, 1) +#define _TEXASRU_ABORT(TEXASRU) \ + _TEXASRU_EXTRACT_BITS(TEXASRU, 31, 1) + + +#define _TEXASR_SUSPENDED(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 32, 1) + +#define _TEXASR_PRIVILEGE(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 35, 2) + +#define _TEXASR_FAILURE_SUMMARY(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 36, 1) + +#define _TEXASR_TFIAR_EXACT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 37, 1) + +#define _TEXASR_ROT(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 38, 1) + +#define _TEXASR_TRANSACTION_LEVEL(TEXASR) \ + _TEXASR_EXTRACT_BITS(TEXASR, 63, 12) + +#endif /* __powerpc */ + +#ifdef __s390__ + +/* Condition codes generated by tbegin */ +#define _HTM_TBEGIN_STARTED 0 +#define _HTM_TBEGIN_INDETERMINATE 1 +#define _HTM_TBEGIN_TRANSIENT 2 +#define _HTM_TBEGIN_PERSISTENT 3 + +/* The abort codes below this threshold are reserved for machine use. */ +#define _HTM_FIRST_USER_ABORT_CODE 256 + +/* The transaction diagnostic block is it is defined in the Principles + of Operation chapter 5-91. */ + +struct __htm_tdb { + unsigned char format; /* 0 */ + unsigned char flags; + unsigned char reserved1[4]; + unsigned short nesting_depth; + unsigned long long abort_code; /* 8 */ + unsigned long long conflict_token; /* 16 */ + unsigned long long atia; /* 24 */ + unsigned char eaid; /* 32 */ + unsigned char dxc; + unsigned char reserved2[2]; + unsigned int program_int_id; + unsigned long long exception_id; /* 40 */ + unsigned long long bea; /* 48 */ + unsigned char reserved3[72]; /* 56 */ + unsigned long long gprs[16]; /* 128 */ +} __attribute__((__packed__, __aligned__ (8))); + + +/* Helper intrinsics to retry tbegin in case of transient failure. */ + +static __inline int __attribute__((__always_inline__, __nodebug__)) +__builtin_tbegin_retry_null (int __retry) +{ + int cc, i = 0; + + while ((cc = __builtin_tbegin(0)) == _HTM_TBEGIN_TRANSIENT + && i++ < __retry) + __builtin_tx_assist(i); + + return cc; +} + +static __inline int __attribute__((__always_inline__, __nodebug__)) +__builtin_tbegin_retry_tdb (void *__tdb, int __retry) +{ + int cc, i = 0; + + while ((cc = __builtin_tbegin(__tdb)) == _HTM_TBEGIN_TRANSIENT + && i++ < __retry) + __builtin_tx_assist(i); + + return cc; +} + +#define __builtin_tbegin_retry(tdb, retry) \ + (__builtin_constant_p(tdb == 0) && tdb == 0 ? \ + __builtin_tbegin_retry_null(retry) : \ + __builtin_tbegin_retry_tdb(tdb, retry)) + +static __inline int __attribute__((__always_inline__, __nodebug__)) +__builtin_tbegin_retry_nofloat_null (int __retry) +{ + int cc, i = 0; + + while ((cc = __builtin_tbegin_nofloat(0)) == _HTM_TBEGIN_TRANSIENT + && i++ < __retry) + __builtin_tx_assist(i); + + return cc; +} + +static __inline int __attribute__((__always_inline__, __nodebug__)) +__builtin_tbegin_retry_nofloat_tdb (void *__tdb, int __retry) +{ + int cc, i = 0; + + while ((cc = __builtin_tbegin_nofloat(__tdb)) == _HTM_TBEGIN_TRANSIENT + && i++ < __retry) + __builtin_tx_assist(i); + + return cc; +} + +#define __builtin_tbegin_retry_nofloat(tdb, retry) \ + (__builtin_constant_p(tdb == 0) && tdb == 0 ? \ + __builtin_tbegin_retry_nofloat_null(retry) : \ + __builtin_tbegin_retry_nofloat_tdb(tdb, retry)) + +#endif /* __s390__ */ + +#endif /* __HTMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/htmxlintrin.h b/llvm/lib/clang/19/include/htmxlintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..6ef6f4b34279a754e78e54563f23dc7648712f45 --- /dev/null +++ b/llvm/lib/clang/19/include/htmxlintrin.h @@ -0,0 +1,345 @@ +/*===---- htmxlintrin.h - XL compiler HTM execution intrinsics-------------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +#ifndef __HTMXLINTRIN_H +#define __HTMXLINTRIN_H + +#ifndef __HTM__ +#error "HTM instruction set not enabled" +#endif + +#include + +#ifdef __powerpc__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define _TEXASR_PTR(TM_BUF) ((texasr_t *)((char *)(TM_BUF) + 0)) +#define _TEXASRU_PTR(TM_BUF) ((texasru_t *)((char *)(TM_BUF) + 0)) +#define _TEXASRL_PTR(TM_BUF) ((texasrl_t *)((char *)(TM_BUF) + 4)) +#define _TFIAR_PTR(TM_BUF) ((tfiar_t *)((char *)(TM_BUF) + 8)) + +typedef char TM_buff_type[16]; + +/* This macro can be used to determine whether a transaction was successfully + started from the __TM_begin() and __TM_simple_begin() intrinsic functions + below. */ +#define _HTM_TBEGIN_STARTED 1 + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_simple_begin (void) +{ + if (__builtin_expect (__builtin_tbegin (0), 1)) + return _HTM_TBEGIN_STARTED; + return 0; +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_begin (void* const __TM_buff) +{ + *_TEXASRL_PTR (__TM_buff) = 0; + if (__builtin_expect (__builtin_tbegin (0), 1)) + return _HTM_TBEGIN_STARTED; +#ifdef __powerpc64__ + *_TEXASR_PTR (__TM_buff) = __builtin_get_texasr (); +#else + *_TEXASRU_PTR (__TM_buff) = __builtin_get_texasru (); + *_TEXASRL_PTR (__TM_buff) = __builtin_get_texasr (); +#endif + *_TFIAR_PTR (__TM_buff) = __builtin_get_tfiar (); + return 0; +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_end (void) +{ + if (__builtin_expect (__builtin_tend (0), 1)) + return 1; + return 0; +} + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_abort (void) +{ + __builtin_tabort (0); +} + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_named_abort (unsigned char const __code) +{ + __builtin_tabort (__code); +} + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_resume (void) +{ + __builtin_tresume (); +} + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_suspend (void) +{ + __builtin_tsuspend (); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_user_abort (void* const __TM_buff) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + return _TEXASRU_ABORT (texasru); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_named_user_abort (void* const __TM_buff, unsigned char *__code) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + + *__code = _TEXASRU_FAILURE_CODE (texasru); + return _TEXASRU_ABORT (texasru); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_illegal (void* const __TM_buff) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + return _TEXASRU_DISALLOWED (texasru); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_footprint_exceeded (void* const __TM_buff) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + return _TEXASRU_FOOTPRINT_OVERFLOW (texasru); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_nesting_depth (void* const __TM_buff) +{ + texasrl_t texasrl; + + if (_HTM_STATE (__builtin_ttest ()) == _HTM_NONTRANSACTIONAL) + { + texasrl = *_TEXASRL_PTR (__TM_buff); + if (!_TEXASR_FAILURE_SUMMARY (texasrl)) + texasrl = 0; + } + else + texasrl = (texasrl_t) __builtin_get_texasr (); + + return _TEXASR_TRANSACTION_LEVEL (texasrl); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_nested_too_deep(void* const __TM_buff) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + return _TEXASRU_NESTING_OVERFLOW (texasru); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_conflict(void* const __TM_buff) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + /* Return TEXASR bits 11 (Self-Induced Conflict) through + 14 (Translation Invalidation Conflict). */ + return (_TEXASRU_EXTRACT_BITS (texasru, 14, 4)) ? 1 : 0; +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_is_failure_persistent(void* const __TM_buff) +{ + texasru_t texasru = *_TEXASRU_PTR (__TM_buff); + return _TEXASRU_FAILURE_PERSISTENT (texasru); +} + +extern __inline long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_failure_address(void* const __TM_buff) +{ + return *_TFIAR_PTR (__TM_buff); +} + +extern __inline long long +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__TM_failure_code(void* const __TM_buff) +{ + return *_TEXASR_PTR (__TM_buff); +} + +#ifdef __cplusplus +} +#endif + +#endif /* __powerpc__ */ + +#ifdef __s390__ + +#include + +/* These intrinsics are being made available for compatibility with + the IBM XL compiler. For documentation please see the "z/OS XL + C/C++ Programming Guide" publicly available on the web. */ + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_simple_begin () +{ + return __builtin_tbegin_nofloat (0); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_begin (void* const __tdb) +{ + return __builtin_tbegin_nofloat (__tdb); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_end () +{ + return __builtin_tend (); +} + +static __inline void __attribute__((__always_inline__)) +__TM_abort () +{ + return __builtin_tabort (_HTM_FIRST_USER_ABORT_CODE); +} + +static __inline void __attribute__((__always_inline__, __nodebug__)) +__TM_named_abort (unsigned char const __code) +{ + return __builtin_tabort ((int)_HTM_FIRST_USER_ABORT_CODE + __code); +} + +static __inline void __attribute__((__always_inline__, __nodebug__)) +__TM_non_transactional_store (void* const __addr, long long const __value) +{ + __builtin_non_tx_store ((uint64_t*)__addr, (uint64_t)__value); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_nesting_depth (void* const __tdb_ptr) +{ + int depth = __builtin_tx_nesting_depth (); + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + if (depth != 0) + return depth; + + if (tdb->format != 1) + return 0; + return tdb->nesting_depth; +} + +/* Transaction failure diagnostics */ + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_user_abort (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + if (tdb->format != 1) + return 0; + + return !!(tdb->abort_code >= _HTM_FIRST_USER_ABORT_CODE); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_named_user_abort (void* const __tdb_ptr, unsigned char* __code) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + if (tdb->format != 1) + return 0; + + if (tdb->abort_code >= _HTM_FIRST_USER_ABORT_CODE) + { + *__code = tdb->abort_code - _HTM_FIRST_USER_ABORT_CODE; + return 1; + } + return 0; +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_illegal (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + return (tdb->format == 1 + && (tdb->abort_code == 4 /* unfiltered program interruption */ + || tdb->abort_code == 11 /* restricted instruction */)); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_footprint_exceeded (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + return (tdb->format == 1 + && (tdb->abort_code == 7 /* fetch overflow */ + || tdb->abort_code == 8 /* store overflow */)); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_nested_too_deep (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + return tdb->format == 1 && tdb->abort_code == 13; /* depth exceeded */ +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_conflict (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + return (tdb->format == 1 + && (tdb->abort_code == 9 /* fetch conflict */ + || tdb->abort_code == 10 /* store conflict */)); +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_is_failure_persistent (long const __result) +{ + return __result == _HTM_TBEGIN_PERSISTENT; +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_failure_address (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + return tdb->atia; +} + +static __inline long __attribute__((__always_inline__, __nodebug__)) +__TM_failure_code (void* const __tdb_ptr) +{ + struct __htm_tdb *tdb = (struct __htm_tdb*)__tdb_ptr; + + return tdb->abort_code; +} + +#endif /* __s390__ */ + +#endif /* __HTMXLINTRIN_H */ diff --git a/llvm/lib/clang/19/include/hvx_hexagon_protos.h b/llvm/lib/clang/19/include/hvx_hexagon_protos.h new file mode 100644 index 0000000000000000000000000000000000000000..7e3679a38b2cff70bcd576a2dd5094cb95747367 --- /dev/null +++ b/llvm/lib/clang/19/include/hvx_hexagon_protos.h @@ -0,0 +1,5183 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// Automatically generated file, do not edit! +//===----------------------------------------------------------------------===// + + +#ifndef _HVX_HEXAGON_PROTOS_H_ +#define _HVX_HEXAGON_PROTOS_H_ 1 + +#ifdef __HVX__ +#if __HVX_LENGTH__ == 128 +#define __BUILTIN_VECTOR_WRAP(a) a ## _128B +#else +#define __BUILTIN_VECTOR_WRAP(a) a +#endif + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rd32=vextract(Vu32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_vextract_VR(HVX_Vector Vu, Word32 Rs) + Instruction Type: LD + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_vextract_VR(Vu,Rs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_extractw)(Vu,Rs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=hi(Vss32) + C Intrinsic Prototype: HVX_Vector Q6_V_hi_W(HVX_VectorPair Vss) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_hi_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_hi)(Vss) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=lo(Vss32) + C Intrinsic Prototype: HVX_Vector Q6_V_lo_W(HVX_VectorPair Vss) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_lo_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lo)(Vss) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vsplat(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vsplat_R(Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatw)(Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=and(Qs4,Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_and_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=and(Qs4,!Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_and_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=not(Qs4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_not_Q(HVX_VectorPred Qs) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_not_Q(Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_not)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=or(Qs4,Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_or_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=or(Qs4,!Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_or_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vsetq(Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq_R(Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vsetq_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2)(Rt)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=xor(Qs4,Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_xor_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_xor_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) vmem(Rt32+#s4)=Vs32 + C Intrinsic Prototype: void Q6_vmem_QnRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QnRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) vmem(Rt32+#s4):nt=Vs32 + C Intrinsic Prototype: void Q6_vmem_QnRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QnRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) vmem(Rt32+#s4):nt=Vs32 + C Intrinsic Prototype: void Q6_vmem_QRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) vmem(Rt32+#s4)=Vs32 + C Intrinsic Prototype: void Q6_vmem_QRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vabsdiff(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuh_vabsdiff_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vabsdiff(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vabsdiff_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vub_vabsdiff_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vabsdiff(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuh_vabsdiff_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vabsdiff(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vabsdiff_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vabsdiff_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vabs(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vabs_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vabs(Vu32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh_sat(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vabs_Vh_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh_sat)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vabs(Vu32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vabs_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vabs(Vu32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw_sat(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vabs_Vw_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw_sat)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vadd_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vadd_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.b+=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condacc_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.b+=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condacc_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vadd_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.h+=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condacc_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.h+=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condacc_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vadd_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vadd_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vadd(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vadd_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.ub):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vadd_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.ub=vadd(Vuu32.ub,Vvv32.ub):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vadd_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wub_vadd_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vadd(Vu32.uh,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vadd_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vadd_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vadd(Vuu32.uh,Vvv32.uh):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vadd_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vadd_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vadd_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vadd_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.w+=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condacc_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.w+=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condacc_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vadd_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=valign(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_valign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignb)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=valign(Vu32,Vv32,#u3) + C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_valign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignbi)(Vu,Vv,Iu3) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vand(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vand_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vand)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vand(Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QR(HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vand_QR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32|=vand(Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vandor_VQR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vand(Vu32,Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vand_VR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Q_vand_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)(Vu,Rt)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vand(Vu32,Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vandor_QVR(HVX_VectorPred Qx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Q_vandor_QVR(Qx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt_acc)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Rt)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasl(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasl_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasl(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasl_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslhv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasl(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasl_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vasl(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vaslacc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vaslacc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasl(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasl_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslwv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbrndsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubrndsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasr(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasr_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vasr(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasracc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasracc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VwVwR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwh)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhrndsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasr(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=Vu32 + C Intrinsic Prototype: HVX_Vector Q6_V_equals_V(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_equals_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=Vuu32 + C Intrinsic Prototype: HVX_VectorPair Q6_W_equals_W(HVX_VectorPair Vuu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_equals_W(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassignp)(Vuu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vavg_VhVh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavghrnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vavg_VubVub_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgubrnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vavg_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vavg_VuhVuh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguhrnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vavg_VwVw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgwrnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vcl0(Vu32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcl0_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vcl0_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0h)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vcl0(Vu32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vcl0_Vuw(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vcl0_Vuw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0w)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vcombine(Vu32,Vv32) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vcombine_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vcombine_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcombine)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=#0 + C Intrinsic Prototype: HVX_Vector Q6_V_vzero() + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vd0)() +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vdeal(Vu32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeal_Vb(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vdeal_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vdeale(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeale_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vdeale_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb4w)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vdeal(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vdeal_Vh(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vdeal_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vdeal(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vdeal_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vdeal_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealvdd)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vdelta(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vdelta_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdelta)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vdmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpy_VubRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vdmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vdmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpyacc_VhVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vdmpyacc_VhVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vdmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vdmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vdmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vdmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vdmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vdmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vdmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRh_sat(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_WhRh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwWhRh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat_acc)(Vx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRh_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhRh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhRh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRuh_sat(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_WhRuh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRuh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwWhRuh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat_acc)(Vx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRuh_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhRuh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhRuh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhVh_sat(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhVh_sat(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsad_WuhRuh(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vdsad_WuhRuh(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsadacc_WuwWuhRuh(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vdsadacc_WuwWuhRuh(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w=vinsert(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vinsert_VwR(HVX_Vector Vx, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vinsert_VwR(Vx,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vinsertwr)(Vx,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vlalign(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vlalign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignb)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vlalign(Vu32,Vv32,#u3) + C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vlalign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignbi)(Vu,Vv,Iu3) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vlsr(Vu32.uh,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vlsr_VuhR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vlsr_VuhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrh)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vlsr(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vlsr_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vlsr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrhv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vlsr(Vu32.uw,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vlsr_VuwR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vlsr_VuwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrw)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vlsr(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vlsr_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vlsr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrwv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32_VbVbR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbR(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32or_VbVbVbR(Vx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracc)(Vx,Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16_VbVhR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhR(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16or_WhVbVhR(Vxx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracc)(Vxx,Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmax(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmax_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vmax_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vmax(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vmax_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vmax_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vmax(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmax_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vmax_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmax(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmax_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vmax_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmin(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmin_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vmin_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vmin(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vmin_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vmin_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vmin(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmin_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vmin_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmin(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmin_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vmin_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpaacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabusv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWub(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubWub(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuuv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpa(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpa_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpa(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpaacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubRb(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpyacc_WhVubRb(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus_acc)(Vxx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpyacc_WhVubVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVbVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpyacc_WhVbVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpye(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Rt32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhRh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpy_VhRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh_sat(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhRh_sat(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsat_acc)(Vxx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_rnd_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpy_VhRh_s1_rnd_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsrs)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpy_VhRh_s1_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhss)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpy_VhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpy_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpy_VhVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhvsrs)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyieo(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieo_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyieo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyieoh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyieacc_VwVwVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewh_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyie(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyie_VwVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyie_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVuh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyieacc_VwVwVuh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyi_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyiacc_VhVhVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyi_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyiacc_VhVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyio(Vu32.w,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyio_VwVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyio_VwVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiowh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyi_VwRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyiacc_VwVwRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyi_VwRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyiacc_VwVwRh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyo_VwVh_s1_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyo_VwVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_sacc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubRub(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubRub(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpyacc_WuhVubRub(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub_acc)(Vxx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpyacc_WuhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhRuh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpy_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhRuh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpyacc_WuwVuhRuh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh_acc)(Vxx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpy_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpyacc_WuwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vmux(Qt4,Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vmux_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vmux_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmux)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vnavg(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vnavg_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vnavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vnavg(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vnavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vnavg(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vnavg_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vnavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vnormamt(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vnormamt_Vh(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vnormamt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamth)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vnormamt(Vu32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vnormamt_Vw(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vnormamt_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamtw)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vnot(Vu32) + C Intrinsic Prototype: HVX_Vector Q6_V_vnot_V(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vnot_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnot)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vor(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vor_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vor)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vpacke(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacke_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vpacke_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpacke(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacke_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpacke_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vpack(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhb_sat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vpack(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhub_sat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vpacko(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacko_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vpacko_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackob)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpacko(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacko_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpacko_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackoh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpack(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwh_sat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vpack(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwuh_sat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpopcount(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpopcount_Vh(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpopcount_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpopcounth)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vrdelta(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vrdelta_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vrdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrdelta)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpyacc_VwVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpy_WubRbI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vrmpy_WubRbI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi)(Vuu,Rt,Iu1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpyacc_WwWubRbI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vrmpyacc_WwWubRbI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi_acc)(Vxx,Vuu,Rt,Iu1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpyacc_VwVubVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vrmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vrmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVbVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpyacc_VwVbVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubRub(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpyacc_VuwVubRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpy_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrmpy_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi)(Vuu,Rt,Iu1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpyacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrmpyacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi_acc)(Vxx,Vuu,Rt,Iu1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubVub(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpyacc_VuwVubVub(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vror(Vu32,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vror_VR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vror_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vror)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vround(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vround(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vround(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vround(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsad_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrsad_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi)(Vuu,Rt,Iu1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsadacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrsadacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi_acc)(Vxx,Vuu,Rt,Iu1) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vsat(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vsat_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vsat_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsathub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsat(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsat_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vsat_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatwh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsxt(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsxt_Vb(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vsxt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsb)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsxt(Vu32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsxt_Vh(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vsxt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vshuffe(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffe_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vshuffe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufeh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vshuff(Vu32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuff_Vb(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vshuff_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffb)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vshuffe(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffe_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vshuffe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffeb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vshuff(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuff_Vh(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vshuff_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vshuffo(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffo_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vshuffo_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffob)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vshuff(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vshuff_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vshuff_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffvdd)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vshuffoe(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vshuffoe_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vshuffoe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vshuffoe(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vshuffoe_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vshuffoe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vshuffo(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffo_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vshuffo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vsub_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vsub_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.b-=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condnac_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.b-=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condnac_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vsub_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.h-=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condnac_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.h-=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condnac_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vsub_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vsub_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsub(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vsub_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.ub):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vsub_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.ub=vsub(Vuu32.ub,Vvv32.ub):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vsub_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wub_vsub_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vsub(Vu32.uh,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsub_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vsub_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vsub(Vuu32.uh,Vvv32.uh):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vsub_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vsub_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vsub_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsub_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vsub_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.w-=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condnac_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.w-=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condnac_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsub_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vsub_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vswap(Qt4,Vu32,Vv32) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vswap_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vswap_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vswap)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vtmpy(Vuu32.b,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WbRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpy_WbRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.b,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWbRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpyacc_WhWbRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vtmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vtmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vtmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vtmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vtmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vunpack(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpack_Vb(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vunpack_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackb)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vunpack(Vu32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpack_Vh(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vunpack_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h|=vunpacko(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpackoor_WhVb(HVX_VectorPair Vxx, HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vunpackoor_WhVb(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackob)(Vxx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w|=vunpacko(Vu32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpackoor_WwVh(HVX_VectorPair Vxx, HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vunpackoor_WwVh(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackoh)(Vxx,Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vunpack(Vu32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vunpack_Vub(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vunpack_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackub)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vunpack(Vu32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vunpack_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vunpack_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackuh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vxor(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vxor_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vxor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vxor)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vzxt(Vu32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vzxt_Vub(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vzxt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzb)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vzxt(Vu32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vzxt_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vzxt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vsplat(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vsplat_R(Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vb_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatb)(Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsplat(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsplat_R(Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplath)(Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Qd4=vsetq2(Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq2_R(Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vsetq2_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2v2)(Rt)),-1) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Qd4.b=vshuffe(Qs4.h,Qt4.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Qb_vshuffe_QhQh(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Qb_vshuffe_QhQh(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Qd4.h=vshuffe(Qs4.w,Qt4.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Qh_vshuffe_QwQw(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Qh_vshuffe_QwQw(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vadd_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vadd_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w,Qx4):carry + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVwQ_carry(HVX_Vector Vu, HVX_Vector Vv, HVX_VectorPred* Qx) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarry)(Vu,Vv,Qx) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.h=vadd(vclb(Vu32.h),Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_vclb_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vadd_vclb_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(vclb(Vu32.w),Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_vclb_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_vclb_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vadd(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vaddacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vaddacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vadd(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vaddacc_WhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vaddacc_WhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vadd_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddububb_sat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vadd(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vaddacc_WwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vaddacc_WwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vadd(Vu32.uw,Vv32.uw):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vadd_VuwVuw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vadd_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vadd(Vuu32.uw,Vvv32.uw):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vadd_WuwWuw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vadd_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vand(!Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QnR(HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vand_QnR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vx32|=vand(!Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQnR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vandor_VQnR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vand(!Qv4,Vu32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QnV(HVX_VectorPred Qv, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vand_QnV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvnqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vand(Qv4,Vu32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QV(HVX_VectorPred Qv, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vand_QV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VuwVuwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VuwVuwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhrndsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhrndsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vlsr(Vu32.ub,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vlsr_VubR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vlsr_VubR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrb)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8):nomatch + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR_nomatch(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32_VbVbR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_nm)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,#u3) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbI(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32or_VbVbVbI(Vx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracci)(Vx,Vu,Vv,Iu3) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,#u3) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32_VbVbI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvbi)(Vu,Vv,Iu3) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8):nomatch + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR_nomatch(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16_VbVhR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_nm)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,#u3) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhI(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16or_WhVbVhI(Vxx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracci)(Vxx,Vu,Vv,Iu3) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,#u3) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16_VbVhI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwhi)(Vu,Vv,Iu3) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vmax(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vmax_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vmax_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vmin(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vmin_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vmin_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpa(Vuu32.uh,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WuhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpa_WuhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpa(Vuu32.uh,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWuhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpaacc_WwWuhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32=vmpye(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_W_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh_64)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRub(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyi_VwRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyiacc_VwVwRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32+=vmpyo(Vu32.w,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vmpyoacc_WVwVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_W_vmpyoacc_WVwVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_64_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vround(Vu32.uh,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vround_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduhub)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vround(Vu32.uw,Vv32.uw):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VuwVuw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vround_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduwuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vsat(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsat_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vsat_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatuwuh)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vsub_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vsub_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w,Qx4):carry + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVwQ_carry(HVX_Vector Vu, HVX_Vector Vv, HVX_VectorPred* Qx) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsub_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubcarry)(Vu,Vv,Qx) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vsub_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubububb_sat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vsub(Vu32.uw,Vv32.uw):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vsub_VuwVuw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vsub_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vsub(Vuu32.uw,Vvv32.uw):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vsub_WuwWuw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vsub_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat_dv)(Vuu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vabs(Vu32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vabs_Vb(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vabs_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb)(Vu) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vabs(Vu32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vabs_Vb_sat(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vabs_Vb_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb_sat)(Vu) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vasl(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vaslacc_VhVhR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vaslacc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vasr(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasracc_VhVhR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasracc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VuhVuhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VuhVuhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubrndsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VuhVuhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VuhVuhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VuwVuwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VuwVuwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhsat)(Vu,Vv,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vavg(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vavg_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vavg(Vu32.b,Vv32.b):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vb_vavg_VbVb_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vavg_VbVb_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgbrnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vavg(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vavg_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vavg_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vavg(Vu32.uw,Vv32.uw):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vavg_VuwVuw_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vavg_VuwVuw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguwrnd)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vdd32=#0 + C Intrinsic Prototype: HVX_VectorPair Q6_W_vzero() + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdd0)() +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vtmp.h=vgather(Rt32,Mu2,Vv32.h).h + C Intrinsic Prototype: void Q6_vgather_ARMVh(HVX_Vector* Rs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_ARMVh(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermh)(Rs,Rt,Mu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vv32.h).h + C Intrinsic Prototype: void Q6_vgather_AQRMVh(HVX_Vector* Rs, HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_AQRMVh(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h + C Intrinsic Prototype: void Q6_vgather_ARMWw(HVX_Vector* Rs, Word32 Rt, Word32 Mu, HVX_VectorPair Vvv) + Instruction Type: CVI_GATHER_DV + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_ARMWw(Rs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhw)(Rs,Rt,Mu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h + C Intrinsic Prototype: void Q6_vgather_AQRMWw(HVX_Vector* Rs, HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_VectorPair Vvv) + Instruction Type: CVI_GATHER_DV + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_AQRMWw(Rs,Qs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vtmp.w=vgather(Rt32,Mu2,Vv32.w).w + C Intrinsic Prototype: void Q6_vgather_ARMVw(HVX_Vector* Rs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_ARMVw(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermw)(Rs,Rt,Mu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vtmp.w=vgather(Rt32,Mu2,Vv32.w).w + C Intrinsic Prototype: void Q6_vgather_AQRMVw(HVX_Vector* Rs, HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_AQRMVw(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.h=vlut4(Vu32.uh,Rtt32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vlut4_VuhPh(HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vlut4_VuhPh(Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlut4)(Vu,Rtt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRub(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubRub(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu)(Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRub(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpaacc_WhWubRub(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu_acc)(Vxx,Vuu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h=vmpa(Vx32.h,Vu32.h,Rtt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpa_VhVhVhPh_sat(HVX_Vector Vx, HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vmpa_VhVhVhPh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahhsat)(Vx,Vu,Rtt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h=vmpa(Vx32.h,Vu32.uh,Rtt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpa_VhVhVuhPuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vmpa_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhuhsat)(Vx,Vu,Rtt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h=vmps(Vx32.h,Vu32.uh,Rtt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmps_VhVhVuhPuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vmps_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpsuhuhsat)(Vx,Vu,Rtt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhRh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh_acc)(Vxx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vmpye(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vmpye_VuhRuh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vmpye_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe)(Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.uw+=vmpye(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vmpyeacc_VuwVuhRuh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vmpyeacc_VuwVuhRuh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe_acc)(Vx,Vu,Rt) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vnavg(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vnavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgb)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=prefixsum(Qv4) + C Intrinsic Prototype: HVX_Vector Q6_Vb_prefixsum_Q(HVX_VectorPred Qv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqb)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1)) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.h=prefixsum(Qv4) + C Intrinsic Prototype: HVX_Vector Q6_Vh_prefixsum_Q(HVX_VectorPred Qv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1)) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.w=prefixsum(Qv4) + C Intrinsic Prototype: HVX_Vector Q6_Vw_prefixsum_Q(HVX_VectorPred Qv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1)) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.h).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_RMVhV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh)(Rt,Mu,Vv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.h).h+=Vw32 + C Intrinsic Prototype: void Q6_vscatteracc_RMVhV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatteracc_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh_add)(Rt,Mu,Vv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vscatter(Rt32,Mu2,Vv32.h).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_QRMVhV(HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_QRMVhV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vvv32.w).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_RMWwV(Word32 Rt, Word32 Mu, HVX_VectorPair Vvv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER_DV + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw)(Rt,Mu,Vvv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vvv32.w).h+=Vw32 + C Intrinsic Prototype: void Q6_vscatteracc_RMWwV(Word32 Rt, Word32 Mu, HVX_VectorPair Vvv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER_DV + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatteracc_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw_add)(Rt,Mu,Vvv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vscatter(Rt32,Mu2,Vvv32.w).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_QRMWwV(HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_VectorPair Vvv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER_DV + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_QRMWwV(Qs,Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.w).w=Vw32 + C Intrinsic Prototype: void Q6_vscatter_RMVwV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw)(Rt,Mu,Vv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.w).w+=Vw32 + C Intrinsic Prototype: void Q6_vscatteracc_RMVwV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatteracc_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw_add)(Rt,Mu,Vv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vscatter(Rt32,Mu2,Vv32.w).w=Vw32 + C Intrinsic Prototype: void Q6_vscatter_QRMVwV(HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_QRMVwV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w,Qs4):carry:sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVwQ_carry_sat(HVX_Vector Vu, HVX_Vector Vv, HVX_VectorPred Qs) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVwQ_carry_sat(Vu,Vv,Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarrysat)(Vu,Vv,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1)) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vxx32.w=vasrinto(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vasrinto_WwVwVw(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vasrinto_WwVwVw(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasr_into)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vrotr(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrotr_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vrotr_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrotr)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsatdw(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsatdw_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsatdw_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatdw)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):h + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpy_WubWbI_h(HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpy_WubWbI_h(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10)(Vuu,Vvv,Iu2) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):h + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpyacc_WwWubWbI_h(HVX_VectorPair Vxx, HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpyacc_WwWubWbI_h(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10_vxx)(Vxx,Vuu,Vvv,Iu2) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):v + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpy_WubWbI_v(HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpy_WubWbI_v(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10)(Vuu,Vvv,Iu2) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):v + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpyacc_WwWubWbI_v(HVX_VectorPair Vxx, HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpyacc_WwWubWbI_v(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10_vxx)(Vxx,Vuu,Vvv,Iu2) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vabs(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vabs_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vabs_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vabs(Vu32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vabs_Vsf(HVX_Vector Vu) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vabs_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_sf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vadd(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vadd(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vadd(Vu32.qf16,Vv32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vadd_Vqf16Vqf16(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vadd_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vadd(Vu32.qf16,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vadd_Vqf16Vhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vadd_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16_mix)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vadd(Vu32.qf32,Vv32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vadd_Vqf32Vqf32(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vadd_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vadd(Vu32.qf32,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vadd_Vqf32Vsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vadd_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32_mix)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vadd(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vadd_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.sf=vadd(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wsf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vadd(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vadd_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.w=vfmv(Vu32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vfmv_Vw(HVX_Vector Vu) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vfmv_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign_fp)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=Vu32.qf16 + C Intrinsic Prototype: HVX_Vector Q6_Vhf_equals_Vqf16(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vhf_equals_Vqf16(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf16)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=Vuu32.qf32 + C Intrinsic Prototype: HVX_Vector Q6_Vhf_equals_Wqf32(HVX_VectorPair Vuu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vhf_equals_Wqf32(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf32)(Vuu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=Vu32.qf32 + C Intrinsic Prototype: HVX_Vector Q6_Vsf_equals_Vqf32(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vsf_equals_Vqf32(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_qf32)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.b=vcvt(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vb_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_b_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.h=vcvt(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vcvt_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_h_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.hf=vcvt(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vb(HVX_Vector Vu) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Whf_vcvt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_b)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vcvt(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vh(HVX_Vector Vu) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vcvt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_h)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vcvt(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vcvt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.hf=vcvt(Vu32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vub(HVX_Vector Vu) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Whf_vcvt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_ub)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vcvt(Vu32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vcvt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_uh)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.sf=vcvt(Vu32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vcvt_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wsf_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_sf_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vcvt(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vub_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_ub_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vcvt(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcvt_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_uh_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vdmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vdmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vx32.sf+=vdmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpyacc_VsfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vdmpyacc_VsfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vfmax(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmax_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vfmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vfmax(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmax_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vfmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vfmin(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmin_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vfmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vfmin(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmin_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vfmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vfneg(Vu32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfneg_Vhf(HVX_Vector Vu) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vfneg_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_hf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vfneg(Vu32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfneg_Vsf(HVX_Vector Vu) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vfneg_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_sf)(Vu) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVhfVhf(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVhfVhf(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVhfVhf(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf)(Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVsfVsf(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVsfVsf(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVsfVsf(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vmax(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmax_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vhf_vmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vmax(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vmax_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vsf_vmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vmin(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmin_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vhf_vmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vmin(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vmin_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vsf_vmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vx32.hf+=vmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpyacc_VhfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vmpyacc_VhfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf_acc)(Vx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vmpy(Vu32.qf16,Vv32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vmpy_Vqf16Vqf16(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vqf16_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vqf16_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vmpy(Vu32.qf16,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vmpy_Vqf16Vhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vqf16_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vmpy(Vu32.qf32,Vv32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vmpy_Vqf32Vqf32(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vqf32_vmpy_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.qf32=vmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wqf32_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wqf32_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.qf32=vmpy(Vu32.qf16,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wqf32_vmpy_Vqf16Vhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wqf32_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.qf32=vmpy(Vu32.qf16,Vv32.qf16) + C Intrinsic Prototype: HVX_VectorPair Q6_Wqf32_vmpy_Vqf16Vqf16(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wqf32_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_qf16)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vmpy(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vmpy_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vqf32_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.sf=vmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wsf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vxx32.sf+=vmpy(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVhfVhf(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wsf_vmpyacc_WsfVhfVhf(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf_acc)(Vxx,Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vmpy(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vmpy_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vsub(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.hf=vsub(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vhf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vhf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vsub(Vu32.qf16,Vv32.qf16) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vsub_Vqf16Vqf16(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vsub_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf16=vsub(Vu32.qf16,Vv32.hf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vsub_Vqf16Vhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf16_vsub_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16_mix)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vsub(Vu32.qf32,Vv32.qf32) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vsub_Vqf32Vqf32(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vsub_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vsub(Vu32.qf32,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vsub_Vqf32Vsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vsub_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32_mix)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.qf32=vsub(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vsub_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vqf32_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.sf=vsub(Vu32.hf,Vv32.hf) + C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wsf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_hf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vd32.sf=vsub(Vu32.sf,Vv32.sf) + C Intrinsic Prototype: HVX_Vector Q6_Vsf_vsub_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vsf_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_sf)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 69 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vuu32.uh,Vv32.ub):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_WuhVub_rnd_sat(HVX_VectorPair Vuu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_WuhVub_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubrndsat)(Vuu,Vv) +#endif /* __HEXAGON_ARCH___ >= 69 */ + +#if __HVX_ARCH__ >= 69 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vuu32.uh,Vv32.ub):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_WuhVub_sat(HVX_VectorPair Vuu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_WuhVub_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubsat)(Vuu,Vv) +#endif /* __HEXAGON_ARCH___ >= 69 */ + +#if __HVX_ARCH__ >= 69 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vuu32.w,Vv32.uh):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_WwVuh_rnd_sat(HVX_VectorPair Vuu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_WwVuh_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhrndsat)(Vuu,Vv) +#endif /* __HEXAGON_ARCH___ >= 69 */ + +#if __HVX_ARCH__ >= 69 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vuu32.w,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_WwVuh_sat(HVX_VectorPair Vuu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_WwVuh_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhsat)(Vuu,Vv) +#endif /* __HEXAGON_ARCH___ >= 69 */ + +#if __HVX_ARCH__ >= 69 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vmpy(Vu32.uh,Vv32.uh):>>16 + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmpy_VuhVuh_rs16(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuh_vmpy_VuhVuh_rs16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhvs)(Vu,Vv) +#endif /* __HEXAGON_ARCH___ >= 69 */ + +#endif /* __HVX__ */ + +#endif diff --git a/llvm/lib/clang/19/include/ia32intrin.h b/llvm/lib/clang/19/include/ia32intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..8e65f232a0def8b0b7b80f9bdb5d80c68beded6d --- /dev/null +++ b/llvm/lib/clang/19/include/ia32intrin.h @@ -0,0 +1,863 @@ +/* ===-------- ia32intrin.h ---------------------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __IA32INTRIN_H +#define __IA32INTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) +#define __DEFAULT_FN_ATTRS_CRC32 __attribute__((__always_inline__, __nodebug__, __target__("crc32"))) + +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS_CAST __attribute__((__always_inline__)) constexpr +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr +#else +#define __DEFAULT_FN_ATTRS_CAST __attribute__((__always_inline__)) +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS +#endif + +/// Finds the first set bit starting from the least significant bit. The result +/// is undefined if the input is 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSF instruction or the +/// \c TZCNT instruction. +/// +/// \param __A +/// A 32-bit integer operand. +/// \returns A 32-bit integer containing the bit number. +/// \see _bit_scan_forward +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +__bsfd(int __A) { + return __builtin_ctz((unsigned int)__A); +} + +/// Finds the first set bit starting from the most significant bit. The result +/// is undefined if the input is 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSR instruction or the +/// \c LZCNT instruction and an \c XOR. +/// +/// \param __A +/// A 32-bit integer operand. +/// \returns A 32-bit integer containing the bit number. +/// \see _bit_scan_reverse +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +__bsrd(int __A) { + return 31 - __builtin_clz((unsigned int)__A); +} + +/// Swaps the bytes in the input, converting little endian to big endian or +/// vice versa. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSWAP instruction. +/// +/// \param __A +/// A 32-bit integer operand. +/// \returns A 32-bit integer containing the swapped bytes. +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +__bswapd(int __A) { + return (int)__builtin_bswap32((unsigned int)__A); +} + +/// Swaps the bytes in the input, converting little endian to big endian or +/// vice versa. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSWAP instruction. +/// +/// \param __A +/// A 32-bit integer operand. +/// \returns A 32-bit integer containing the swapped bytes. +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +_bswap(int __A) { + return (int)__builtin_bswap32((unsigned int)__A); +} + +/// Finds the first set bit starting from the least significant bit. The result +/// is undefined if the input is 0. +/// +/// \headerfile +/// +/// \code +/// int _bit_scan_forward(int A); +/// \endcode +/// +/// This intrinsic corresponds to the \c BSF instruction or the +/// \c TZCNT instruction. +/// +/// \param A +/// A 32-bit integer operand. +/// \returns A 32-bit integer containing the bit number. +/// \see __bsfd +#define _bit_scan_forward(A) __bsfd((A)) + +/// Finds the first set bit starting from the most significant bit. The result +/// is undefined if the input is 0. +/// +/// \headerfile +/// +/// \code +/// int _bit_scan_reverse(int A); +/// \endcode +/// +/// This intrinsic corresponds to the \c BSR instruction or the +/// \c LZCNT instruction and an \c XOR. +/// +/// \param A +/// A 32-bit integer operand. +/// \returns A 32-bit integer containing the bit number. +/// \see __bsrd +#define _bit_scan_reverse(A) __bsrd((A)) + +#ifdef __x86_64__ +/// Finds the first set bit starting from the least significant bit. The result +/// is undefined if the input is 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSF instruction or the +/// \c TZCNT instruction. +/// +/// \param __A +/// A 64-bit integer operand. +/// \returns A 32-bit integer containing the bit number. +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +__bsfq(long long __A) { + return (long long)__builtin_ctzll((unsigned long long)__A); +} + +/// Finds the first set bit starting from the most significant bit. The result +/// is undefined if input is 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSR instruction or the +/// \c LZCNT instruction and an \c XOR. +/// +/// \param __A +/// A 64-bit integer operand. +/// \returns A 32-bit integer containing the bit number. +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +__bsrq(long long __A) { + return 63 - __builtin_clzll((unsigned long long)__A); +} + +/// Swaps the bytes in the input, converting little endian to big endian or +/// vice versa. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c BSWAP instruction. +/// +/// \param __A +/// A 64-bit integer operand. +/// \returns A 64-bit integer containing the swapped bytes. +/// \see _bswap64 +static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR +__bswapq(long long __A) { + return (long long)__builtin_bswap64((unsigned long long)__A); +} + +/// Swaps the bytes in the input, converting little endian to big endian or +/// vice versa. +/// +/// \headerfile +/// +/// \code +/// long long _bswap64(long long A); +/// \endcode +/// +/// This intrinsic corresponds to the \c BSWAP instruction. +/// +/// \param A +/// A 64-bit integer operand. +/// \returns A 64-bit integer containing the swapped bytes. +/// \see __bswapq +#define _bswap64(A) __bswapq((A)) +#endif /* __x86_64__ */ + +/// Counts the number of bits in the source operand having a value of 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c POPCNT instruction or a +/// sequence of arithmetic and logic operations to calculate it. +/// +/// \param __A +/// An unsigned 32-bit integer operand. +/// \returns A 32-bit integer containing the number of bits with value 1 in the +/// source operand. +/// \see _popcnt32 +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +__popcntd(unsigned int __A) +{ + return __builtin_popcount(__A); +} + +/// Counts the number of bits in the source operand having a value of 1. +/// +/// \headerfile +/// +/// \code +/// int _popcnt32(int A); +/// \endcode +/// +/// This intrinsic corresponds to the \c POPCNT instruction or a +/// sequence of arithmetic and logic operations to calculate it. +/// +/// \param A +/// An unsigned 32-bit integer operand. +/// \returns A 32-bit integer containing the number of bits with value 1 in the +/// source operand. +/// \see __popcntd +#define _popcnt32(A) __popcntd((A)) + +#ifdef __x86_64__ +/// Counts the number of bits in the source operand having a value of 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c POPCNT instruction or a +/// sequence of arithmetic and logic operations to calculate it. +/// +/// \param __A +/// An unsigned 64-bit integer operand. +/// \returns A 64-bit integer containing the number of bits with value 1 in the +/// source operand. +/// \see _popcnt64 +static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR +__popcntq(unsigned long long __A) +{ + return __builtin_popcountll(__A); +} + +/// Counts the number of bits in the source operand having a value of 1. +/// +/// \headerfile +/// +/// \code +/// long long _popcnt64(unsigned long long A); +/// \endcode +/// +/// This intrinsic corresponds to the \c POPCNT instruction or a +/// sequence of arithmetic and logic operations to calculate it. +/// +/// \param A +/// An unsigned 64-bit integer operand. +/// \returns A 64-bit integer containing the number of bits with value 1 in the +/// source operand. +/// \see __popcntq +#define _popcnt64(A) __popcntq((A)) +#endif /* __x86_64__ */ + +#ifdef __x86_64__ +/// Returns the program status-and-control \c RFLAGS register with the \c VM +/// and \c RF flags cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PUSHFQ + \c POP instruction sequence. +/// +/// \returns The 64-bit value of the RFLAGS register. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__readeflags(void) +{ + return __builtin_ia32_readeflags_u64(); +} + +/// Writes the specified value to the program status-and-control \c RFLAGS +/// register. Reserved bits are not affected. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PUSH + \c POPFQ instruction sequence. +/// +/// \param __f +/// The 64-bit value to write to \c RFLAGS. +static __inline__ void __DEFAULT_FN_ATTRS +__writeeflags(unsigned long long __f) +{ + __builtin_ia32_writeeflags_u64(__f); +} + +#else /* !__x86_64__ */ +/// Returns the program status-and-control \c EFLAGS register with the \c VM +/// and \c RF flags cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PUSHFD + \c POP instruction sequence. +/// +/// \returns The 32-bit value of the EFLAGS register. +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__readeflags(void) +{ + return __builtin_ia32_readeflags_u32(); +} + +/// Writes the specified value to the program status-and-control \c EFLAGS +/// register. Reserved bits are not affected. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PUSH + \c POPFD instruction sequence. +/// +/// \param __f +/// The 32-bit value to write to \c EFLAGS. +static __inline__ void __DEFAULT_FN_ATTRS +__writeeflags(unsigned int __f) +{ + __builtin_ia32_writeeflags_u32(__f); +} +#endif /* !__x86_64__ */ + +/// Casts a 32-bit float value to a 32-bit unsigned integer value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VMOVD / \c MOVD instruction in x86_64, +/// and corresponds to the \c VMOVL / \c MOVL instruction in ia32. +/// +/// \param __A +/// A 32-bit float value. +/// \returns A 32-bit unsigned integer containing the converted value. +static __inline__ unsigned int __DEFAULT_FN_ATTRS_CAST +_castf32_u32(float __A) { + return __builtin_bit_cast(unsigned int, __A); +} + +/// Casts a 64-bit float value to a 64-bit unsigned integer value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VMOVQ / \c MOVQ instruction in x86_64, +/// and corresponds to the \c VMOVL / \c MOVL instruction in ia32. +/// +/// \param __A +/// A 64-bit float value. +/// \returns A 64-bit unsigned integer containing the converted value. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CAST +_castf64_u64(double __A) { + return __builtin_bit_cast(unsigned long long, __A); +} + +/// Casts a 32-bit unsigned integer value to a 32-bit float value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VMOVQ / \c MOVQ instruction in x86_64, +/// and corresponds to the \c FLDS instruction in ia32. +/// +/// \param __A +/// A 32-bit unsigned integer value. +/// \returns A 32-bit float value containing the converted value. +static __inline__ float __DEFAULT_FN_ATTRS_CAST +_castu32_f32(unsigned int __A) { + return __builtin_bit_cast(float, __A); +} + +/// Casts a 64-bit unsigned integer value to a 64-bit float value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VMOVQ / \c MOVQ instruction in x86_64, +/// and corresponds to the \c FLDL instruction in ia32. +/// +/// \param __A +/// A 64-bit unsigned integer value. +/// \returns A 64-bit float value containing the converted value. +static __inline__ double __DEFAULT_FN_ATTRS_CAST +_castu64_f64(unsigned long long __A) { + return __builtin_bit_cast(double, __A); +} + +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// unsigned char operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CRC32B instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 8-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32 +__crc32b(unsigned int __C, unsigned char __D) +{ + return __builtin_ia32_crc32qi(__C, __D); +} + +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// unsigned short operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CRC32W instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 16-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32 +__crc32w(unsigned int __C, unsigned short __D) +{ + return __builtin_ia32_crc32hi(__C, __D); +} + +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// second unsigned integer operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CRC32D instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 32-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32 +__crc32d(unsigned int __C, unsigned int __D) +{ + return __builtin_ia32_crc32si(__C, __D); +} + +#ifdef __x86_64__ +/// Adds the unsigned integer operand to the CRC-32C checksum of the +/// unsigned 64-bit integer operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c CRC32Q instruction. +/// +/// \param __C +/// An unsigned integer operand to add to the CRC-32C checksum of operand +/// \a __D. +/// \param __D +/// An unsigned 64-bit integer operand used to compute the CRC-32C checksum. +/// \returns The result of adding operand \a __C to the CRC-32C checksum of +/// operand \a __D. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CRC32 +__crc32q(unsigned long long __C, unsigned long long __D) +{ + return __builtin_ia32_crc32di(__C, __D); +} +#endif /* __x86_64__ */ + +/// Reads the specified performance-monitoring counter. Refer to your +/// processor's documentation to determine which performance counters are +/// supported. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c RDPMC instruction. +/// +/// \param __A +/// The performance counter to read. +/// \returns The 64-bit value read from the performance counter. +/// \see _rdpmc +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__rdpmc(int __A) { + return __builtin_ia32_rdpmc(__A); +} + +/// Reads the processor's time-stamp counter and the \c IA32_TSC_AUX MSR +/// \c (0xc0000103). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c RDTSCP instruction. +/// +/// \param __A +/// The address of where to store the 32-bit \c IA32_TSC_AUX value. +/// \returns The 64-bit value of the time-stamp counter. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__rdtscp(unsigned int *__A) { + return __builtin_ia32_rdtscp(__A); +} + +/// Reads the processor's time-stamp counter. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _rdtsc(); +/// \endcode +/// +/// This intrinsic corresponds to the \c RDTSC instruction. +/// +/// \returns The 64-bit value of the time-stamp counter. +#define _rdtsc() __rdtsc() + +/// Reads the specified performance monitoring counter. Refer to your +/// processor's documentation to determine which performance counters are +/// supported. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _rdpmc(int A); +/// \endcode +/// +/// This intrinsic corresponds to the \c RDPMC instruction. +/// +/// \param A +/// The performance counter to read. +/// \returns The 64-bit value read from the performance counter. +/// \see __rdpmc +#define _rdpmc(A) __rdpmc(A) + +static __inline__ void __DEFAULT_FN_ATTRS +_wbinvd(void) { + __builtin_ia32_wbinvd(); +} + +/// Rotates an 8-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param __X +/// The unsigned 8-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR +__rolb(unsigned char __X, int __C) { + return __builtin_rotateleft8(__X, __C); +} + +/// Rotates an 8-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param __X +/// The unsigned 8-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR +__rorb(unsigned char __X, int __C) { + return __builtin_rotateright8(__X, __C); +} + +/// Rotates a 16-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param __X +/// The unsigned 16-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see _rotwl +static __inline__ unsigned short __DEFAULT_FN_ATTRS_CONSTEXPR +__rolw(unsigned short __X, int __C) { + return __builtin_rotateleft16(__X, __C); +} + +/// Rotates a 16-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param __X +/// The unsigned 16-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see _rotwr +static __inline__ unsigned short __DEFAULT_FN_ATTRS_CONSTEXPR +__rorw(unsigned short __X, int __C) { + return __builtin_rotateright16(__X, __C); +} + +/// Rotates a 32-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param __X +/// The unsigned 32-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see _rotl +static __inline__ unsigned int __DEFAULT_FN_ATTRS_CONSTEXPR +__rold(unsigned int __X, int __C) { + return __builtin_rotateleft32(__X, (unsigned int)__C); +} + +/// Rotates a 32-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param __X +/// The unsigned 32-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see _rotr +static __inline__ unsigned int __DEFAULT_FN_ATTRS_CONSTEXPR +__rord(unsigned int __X, int __C) { + return __builtin_rotateright32(__X, (unsigned int)__C); +} + +#ifdef __x86_64__ +/// Rotates a 64-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param __X +/// The unsigned 64-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR +__rolq(unsigned long long __X, int __C) { + return __builtin_rotateleft64(__X, (unsigned long long)__C); +} + +/// Rotates a 64-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param __X +/// The unsigned 64-bit value to be rotated. +/// \param __C +/// The number of bits to rotate the value. +/// \returns The rotated value. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR +__rorq(unsigned long long __X, int __C) { + return __builtin_rotateright64(__X, (unsigned long long)__C); +} +#endif /* __x86_64__ */ + +#ifndef _MSC_VER +/* These are already provided as builtins for MSVC. */ +/* Select the correct function based on the size of long. */ +#ifdef __LP64__ +/// Rotates a 64-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _lrotl(unsigned long long a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param a +/// The unsigned 64-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rolq +#define _lrotl(a,b) __rolq((a), (b)) + +/// Rotates a 64-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned long long _lrotr(unsigned long long a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param a +/// The unsigned 64-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rorq +#define _lrotr(a,b) __rorq((a), (b)) +#else // __LP64__ +/// Rotates a 32-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned int _lrotl(unsigned int a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param a +/// The unsigned 32-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rold +#define _lrotl(a,b) __rold((a), (b)) + +/// Rotates a 32-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned int _lrotr(unsigned int a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param a +/// The unsigned 32-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rord +#define _lrotr(a,b) __rord((a), (b)) +#endif // __LP64__ + +/// Rotates a 32-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned int _rotl(unsigned int a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param a +/// The unsigned 32-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rold +#define _rotl(a,b) __rold((a), (b)) + +/// Rotates a 32-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned int _rotr(unsigned int a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param a +/// The unsigned 32-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rord +#define _rotr(a,b) __rord((a), (b)) +#endif // _MSC_VER + +/* These are not builtins so need to be provided in all modes. */ +/// Rotates a 16-bit value to the left by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned short _rotwl(unsigned short a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROL instruction. +/// +/// \param a +/// The unsigned 16-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rolw +#define _rotwl(a,b) __rolw((a), (b)) + +/// Rotates a 16-bit value to the right by the specified number of bits. +/// This operation is undefined if the number of bits exceeds the size of +/// the value. +/// +/// \headerfile +/// +/// \code +/// unsigned short _rotwr(unsigned short a, int b); +/// \endcode +/// +/// This intrinsic corresponds to the \c ROR instruction. +/// +/// \param a +/// The unsigned 16-bit value to be rotated. +/// \param b +/// The number of bits to rotate the value. +/// \returns The rotated value. +/// \see __rorw +#define _rotwr(a,b) __rorw((a), (b)) + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_CAST +#undef __DEFAULT_FN_ATTRS_CRC32 +#undef __DEFAULT_FN_ATTRS_CONSTEXPR + +#endif /* __IA32INTRIN_H */ diff --git a/llvm/lib/clang/19/include/immintrin.h b/llvm/lib/clang/19/include/immintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..cd6cf09b90cad6ebc93e2835af48479581742fbc --- /dev/null +++ b/llvm/lib/clang/19/include/immintrin.h @@ -0,0 +1,747 @@ +/*===---- immintrin.h - Intel intrinsics -----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#define __IMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +#if !defined(__SCE__) || __has_feature(modules) || defined(__MMX__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SSE__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SSE2__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SSE3__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SSSE3__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__SSE4_2__) || defined(__SSE4_1__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AES__) || defined(__PCLMUL__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__CLFLUSHOPT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__CLWB__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX2__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__F16C__) +#include +#endif + +/* No feature check desired due to internal checks */ +#include + +#if !defined(__SCE__) || __has_feature(modules) || defined(__BMI2__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__LZCNT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__POPCNT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__FMA__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512F__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512VL__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512BW__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512BITALG__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512CD__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512VPOPCNTDQ__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512VPOPCNTDQ__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512VNNI__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512VNNI__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVXVNNI__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512DQ__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512BITALG__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512BW__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512CD__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512DQ__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512IFMA__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512IFMA__) && defined(__AVX512VL__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVXIFMA__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512VBMI__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VBMI__) && defined(__AVX512VL__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512VBMI2__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VBMI2__) && defined(__AVX512VL__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512FP16__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512FP16__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX512BF16__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512BF16__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__PKU__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__VPCLMULQDQ__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__VAES__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__GFNI__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVXVNNIINT8__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVXNECONVERT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SHA512__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SM3__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SM4__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AVXVNNIINT16__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__RDPID__) +/// Reads the value of the IA32_TSC_AUX MSR (0xc0000103). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDPID instruction. +/// +/// \returns The 32-bit contents of the MSR. +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("rdpid"))) +_rdpid_u32(void) { + return __builtin_ia32_rdpid(); +} +#endif // __RDPID__ + +#if !defined(__SCE__) || __has_feature(modules) || defined(__RDRND__) +/// Returns a 16-bit hardware-generated random value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDRAND instruction. +/// +/// \param __p +/// A pointer to a 16-bit memory location to place the random value. +/// \returns 1 if the value was successfully generated, 0 otherwise. +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) +_rdrand16_step(unsigned short *__p) +{ + return (int)__builtin_ia32_rdrand16_step(__p); +} + +/// Returns a 32-bit hardware-generated random value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDRAND instruction. +/// +/// \param __p +/// A pointer to a 32-bit memory location to place the random value. +/// \returns 1 if the value was successfully generated, 0 otherwise. +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) +_rdrand32_step(unsigned int *__p) +{ + return (int)__builtin_ia32_rdrand32_step(__p); +} + +/// Returns a 64-bit hardware-generated random value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDRAND instruction. +/// +/// \param __p +/// A pointer to a 64-bit memory location to place the random value. +/// \returns 1 if the value was successfully generated, 0 otherwise. +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) +_rdrand64_step(unsigned long long *__p) +{ +#ifdef __x86_64__ + return (int)__builtin_ia32_rdrand64_step(__p); +#else + // We need to emulate the functionality of 64-bit rdrand with 2 32-bit + // rdrand instructions. + unsigned int __lo, __hi; + unsigned int __res_lo = __builtin_ia32_rdrand32_step(&__lo); + unsigned int __res_hi = __builtin_ia32_rdrand32_step(&__hi); + if (__res_lo && __res_hi) { + *__p = ((unsigned long long)__hi << 32) | (unsigned long long)__lo; + return 1; + } else { + *__p = 0; + return 0; + } +#endif +} +#endif /* __RDRND__ */ + +#if !defined(__SCE__) || __has_feature(modules) || defined(__FSGSBASE__) +#ifdef __x86_64__ +/// Reads the FS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDFSBASE instruction. +/// +/// \returns The lower 32 bits of the FS base register. +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_readfsbase_u32(void) +{ + return __builtin_ia32_rdfsbase32(); +} + +/// Reads the FS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDFSBASE instruction. +/// +/// \returns The contents of the FS base register. +static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_readfsbase_u64(void) +{ + return __builtin_ia32_rdfsbase64(); +} + +/// Reads the GS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDGSBASE instruction. +/// +/// \returns The lower 32 bits of the GS base register. +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_readgsbase_u32(void) +{ + return __builtin_ia32_rdgsbase32(); +} + +/// Reads the GS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDGSBASE instruction. +/// +/// \returns The contents of the GS base register. +static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_readgsbase_u64(void) +{ + return __builtin_ia32_rdgsbase64(); +} + +/// Modifies the FS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the WRFSBASE instruction. +/// +/// \param __V +/// Value to use for the lower 32 bits of the FS base register. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_writefsbase_u32(unsigned int __V) +{ + __builtin_ia32_wrfsbase32(__V); +} + +/// Modifies the FS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the WRFSBASE instruction. +/// +/// \param __V +/// Value to use for the FS base register. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_writefsbase_u64(unsigned long long __V) +{ + __builtin_ia32_wrfsbase64(__V); +} + +/// Modifies the GS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the WRGSBASE instruction. +/// +/// \param __V +/// Value to use for the lower 32 bits of the GS base register. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_writegsbase_u32(unsigned int __V) +{ + __builtin_ia32_wrgsbase32(__V); +} + +/// Modifies the GS base register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the WRFSBASE instruction. +/// +/// \param __V +/// Value to use for GS base register. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +_writegsbase_u64(unsigned long long __V) +{ + __builtin_ia32_wrgsbase64(__V); +} + +#endif +#endif /* __FSGSBASE__ */ + +#if !defined(__SCE__) || __has_feature(modules) || defined(__MOVBE__) + +/* The structs used below are to force the load/store to be unaligned. This + * is accomplished with the __packed__ attribute. The __may_alias__ prevents + * tbaa metadata from being generated based on the struct and the type of the + * field inside of it. + */ + +/// Load a 16-bit value from memory and swap its bytes. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVBE instruction. +/// +/// \param __P +/// A pointer to the 16-bit value to load. +/// \returns The byte-swapped value. +static __inline__ short __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) +_loadbe_i16(void const * __P) { + struct __loadu_i16 { + unsigned short __v; + } __attribute__((__packed__, __may_alias__)); + return (short)__builtin_bswap16(((const struct __loadu_i16*)__P)->__v); +} + +/// Swap the bytes of a 16-bit value and store it to memory. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVBE instruction. +/// +/// \param __P +/// A pointer to the memory for storing the swapped value. +/// \param __D +/// The 16-bit value to be byte-swapped. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) +_storebe_i16(void * __P, short __D) { + struct __storeu_i16 { + unsigned short __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_i16*)__P)->__v = __builtin_bswap16((unsigned short)__D); +} + +/// Load a 32-bit value from memory and swap its bytes. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVBE instruction. +/// +/// \param __P +/// A pointer to the 32-bit value to load. +/// \returns The byte-swapped value. +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) +_loadbe_i32(void const * __P) { + struct __loadu_i32 { + unsigned int __v; + } __attribute__((__packed__, __may_alias__)); + return (int)__builtin_bswap32(((const struct __loadu_i32*)__P)->__v); +} + +/// Swap the bytes of a 32-bit value and store it to memory. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVBE instruction. +/// +/// \param __P +/// A pointer to the memory for storing the swapped value. +/// \param __D +/// The 32-bit value to be byte-swapped. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) +_storebe_i32(void * __P, int __D) { + struct __storeu_i32 { + unsigned int __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_i32*)__P)->__v = __builtin_bswap32((unsigned int)__D); +} + +#ifdef __x86_64__ +/// Load a 64-bit value from memory and swap its bytes. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVBE instruction. +/// +/// \param __P +/// A pointer to the 64-bit value to load. +/// \returns The byte-swapped value. +static __inline__ long long __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) +_loadbe_i64(void const * __P) { + struct __loadu_i64 { + unsigned long long __v; + } __attribute__((__packed__, __may_alias__)); + return (long long)__builtin_bswap64(((const struct __loadu_i64*)__P)->__v); +} + +/// Swap the bytes of a 64-bit value and store it to memory. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVBE instruction. +/// +/// \param __P +/// A pointer to the memory for storing the swapped value. +/// \param __D +/// The 64-bit value to be byte-swapped. +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) +_storebe_i64(void * __P, long long __D) { + struct __storeu_i64 { + unsigned long long __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_i64*)__P)->__v = __builtin_bswap64((unsigned long long)__D); +} +#endif +#endif /* __MOVBE */ + +#if !defined(__SCE__) || __has_feature(modules) || defined(__RTM__) +#include +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SHA__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__FXSR__) +#include +#endif + +/* No feature check desired due to internal MSC_VER checks */ +#include + +#if !defined(__SCE__) || __has_feature(modules) || defined(__XSAVEOPT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__XSAVEC__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__XSAVES__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SHSTK__) +#include +#endif + +/* Intrinsics inside adcintrin.h are available at all times. */ +#include + +#if !defined(__SCE__) || __has_feature(modules) || defined(__ADX__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__RDSEED__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__WBNOINVD__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__CLDEMOTE__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__WAITPKG__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__MOVDIRI__) || \ + defined(__MOVDIR64B__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__PCONFIG__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SGX__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__PTWRITE__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__INVPCID__) +#include +#endif +#if !defined(__SCE__) || __has_feature(modules) || defined(__AMX_FP16__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__KL__) || \ + defined(__WIDEKL__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AMX_TILE__) || \ + defined(__AMX_INT8__) || defined(__AMX_BF16__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__AMX_COMPLEX__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + defined(__AVX512VP2INTERSECT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || \ + (defined(__AVX512VL__) && defined(__AVX512VP2INTERSECT__)) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__ENQCMD__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SERIALIZE__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__TSXLDTRK__) +#include +#endif + +#if defined(_MSC_VER) && __has_extension(gnu_asm) +/* Define the default attributes for these intrinsics */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) +#ifdef __cplusplus +extern "C" { +#endif +/*----------------------------------------------------------------------------*\ +|* Interlocked Exchange HLE +\*----------------------------------------------------------------------------*/ +#if defined(__i386__) || defined(__x86_64__) +static __inline__ long __DEFAULT_FN_ATTRS +_InterlockedExchange_HLEAcquire(long volatile *_Target, long _Value) { + __asm__ __volatile__(".byte 0xf2 ; lock ; xchg {%0, %1|%1, %0}" + : "+r" (_Value), "+m" (*_Target) :: "memory"); + return _Value; +} +static __inline__ long __DEFAULT_FN_ATTRS +_InterlockedExchange_HLERelease(long volatile *_Target, long _Value) { + __asm__ __volatile__(".byte 0xf3 ; lock ; xchg {%0, %1|%1, %0}" + : "+r" (_Value), "+m" (*_Target) :: "memory"); + return _Value; +} +#endif +#if defined(__x86_64__) +static __inline__ __int64 __DEFAULT_FN_ATTRS +_InterlockedExchange64_HLEAcquire(__int64 volatile *_Target, __int64 _Value) { + __asm__ __volatile__(".byte 0xf2 ; lock ; xchg {%0, %1|%1, %0}" + : "+r" (_Value), "+m" (*_Target) :: "memory"); + return _Value; +} +static __inline__ __int64 __DEFAULT_FN_ATTRS +_InterlockedExchange64_HLERelease(__int64 volatile *_Target, __int64 _Value) { + __asm__ __volatile__(".byte 0xf3 ; lock ; xchg {%0, %1|%1, %0}" + : "+r" (_Value), "+m" (*_Target) :: "memory"); + return _Value; +} +#endif +/*----------------------------------------------------------------------------*\ +|* Interlocked Compare Exchange HLE +\*----------------------------------------------------------------------------*/ +#if defined(__i386__) || defined(__x86_64__) +static __inline__ long __DEFAULT_FN_ATTRS +_InterlockedCompareExchange_HLEAcquire(long volatile *_Destination, + long _Exchange, long _Comparand) { + __asm__ __volatile__(".byte 0xf2 ; lock ; cmpxchg {%2, %1|%1, %2}" + : "+a" (_Comparand), "+m" (*_Destination) + : "r" (_Exchange) : "memory"); + return _Comparand; +} +static __inline__ long __DEFAULT_FN_ATTRS +_InterlockedCompareExchange_HLERelease(long volatile *_Destination, + long _Exchange, long _Comparand) { + __asm__ __volatile__(".byte 0xf3 ; lock ; cmpxchg {%2, %1|%1, %2}" + : "+a" (_Comparand), "+m" (*_Destination) + : "r" (_Exchange) : "memory"); + return _Comparand; +} +#endif +#if defined(__x86_64__) +static __inline__ __int64 __DEFAULT_FN_ATTRS +_InterlockedCompareExchange64_HLEAcquire(__int64 volatile *_Destination, + __int64 _Exchange, __int64 _Comparand) { + __asm__ __volatile__(".byte 0xf2 ; lock ; cmpxchg {%2, %1|%1, %2}" + : "+a" (_Comparand), "+m" (*_Destination) + : "r" (_Exchange) : "memory"); + return _Comparand; +} +static __inline__ __int64 __DEFAULT_FN_ATTRS +_InterlockedCompareExchange64_HLERelease(__int64 volatile *_Destination, + __int64 _Exchange, __int64 _Comparand) { + __asm__ __volatile__(".byte 0xf3 ; lock ; cmpxchg {%2, %1|%1, %2}" + : "+a" (_Comparand), "+m" (*_Destination) + : "r" (_Exchange) : "memory"); + return _Comparand; +} +#endif +#ifdef __cplusplus +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif /* defined(_MSC_VER) && __has_extension(gnu_asm) */ + +#endif /* __IMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/intrin.h b/llvm/lib/clang/19/include/intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..6308c865ca913693eea2d55f5096a597ffff8ff7 --- /dev/null +++ b/llvm/lib/clang/19/include/intrin.h @@ -0,0 +1,460 @@ +/* ===-------- intrin.h ---------------------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Only include this if we're compiling for the windows platform. */ +#ifndef _MSC_VER +#include_next +#else + +#ifndef __INTRIN_H +#define __INTRIN_H + +#include + +/* First include the standard intrinsics. */ +#if defined(__i386__) || (defined(__x86_64__) && !defined(__arm64ec__)) +#include +#endif + +#if defined(__arm__) +#include +#endif + +#if defined(__aarch64__) || defined(__arm64ec__) +#include +#endif + +/* For the definition of jmp_buf. */ +#if __STDC_HOSTED__ +#include +#endif + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) + +#if __x86_64__ +#define __LPTRINT_TYPE__ __int64 +#else +#define __LPTRINT_TYPE__ long +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(__MMX__) +/* And the random ones that aren't in those files. */ +__m64 _m_from_float(float); +float _m_to_float(__m64); +#endif + +/* Other assorted instruction intrinsics. */ +void __addfsbyte(unsigned long, unsigned char); +void __addfsdword(unsigned long, unsigned long); +void __addfsword(unsigned long, unsigned short); +void __code_seg(const char *); +void __cpuid(int[4], int); +void __cpuidex(int[4], int, int); +__int64 __emul(int, int); +unsigned __int64 __emulu(unsigned int, unsigned int); +unsigned int __getcallerseflags(void); +void __halt(void); +unsigned char __inbyte(unsigned short); +void __inbytestring(unsigned short, unsigned char *, unsigned long); +void __incfsbyte(unsigned long); +void __incfsdword(unsigned long); +void __incfsword(unsigned long); +unsigned long __indword(unsigned short); +void __indwordstring(unsigned short, unsigned long *, unsigned long); +void __int2c(void); +void __invlpg(void *); +unsigned short __inword(unsigned short); +void __inwordstring(unsigned short, unsigned short *, unsigned long); +void __lidt(void *); +unsigned __int64 __ll_lshift(unsigned __int64, int); +__int64 __ll_rshift(__int64, int); +void __movsb(unsigned char *, unsigned char const *, size_t); +void __movsd(unsigned long *, unsigned long const *, size_t); +void __movsw(unsigned short *, unsigned short const *, size_t); +void __nop(void); +void __nvreg_restore_fence(void); +void __nvreg_save_fence(void); +void __outbyte(unsigned short, unsigned char); +void __outbytestring(unsigned short, unsigned char *, unsigned long); +void __outdword(unsigned short, unsigned long); +void __outdwordstring(unsigned short, unsigned long *, unsigned long); +void __outword(unsigned short, unsigned short); +void __outwordstring(unsigned short, unsigned short *, unsigned long); +unsigned long __readcr0(void); +unsigned long __readcr2(void); +unsigned __LPTRINT_TYPE__ __readcr3(void); +unsigned long __readcr4(void); +unsigned long __readcr8(void); +unsigned int __readdr(unsigned int); +#ifdef __i386__ +unsigned char __readfsbyte(unsigned long); +unsigned short __readfsword(unsigned long); +unsigned long __readfsdword(unsigned long); +unsigned __int64 __readfsqword(unsigned long); +#endif +unsigned __int64 __readmsr(unsigned long); +unsigned __int64 __readpmc(unsigned long); +unsigned long __segmentlimit(unsigned long); +void __sidt(void *); +void __stosb(unsigned char *, unsigned char, size_t); +void __stosd(unsigned long *, unsigned long, size_t); +void __stosw(unsigned short *, unsigned short, size_t); +void __svm_clgi(void); +void __svm_invlpga(void *, int); +void __svm_skinit(int); +void __svm_stgi(void); +void __svm_vmload(size_t); +void __svm_vmrun(size_t); +void __svm_vmsave(size_t); +void __ud2(void); +unsigned __int64 __ull_rshift(unsigned __int64, int); +void __vmx_off(void); +void __vmx_vmptrst(unsigned __int64 *); +void __wbinvd(void); +void __writecr0(unsigned int); +void __writecr3(unsigned __INTPTR_TYPE__); +void __writecr4(unsigned int); +void __writecr8(unsigned int); +void __writedr(unsigned int, unsigned int); +void __writefsbyte(unsigned long, unsigned char); +void __writefsdword(unsigned long, unsigned long); +void __writefsqword(unsigned long, unsigned __int64); +void __writefsword(unsigned long, unsigned short); +void __writemsr(unsigned long, unsigned __int64); +void *_AddressOfReturnAddress(void); +unsigned char _bittest(long const *, long); +unsigned char _bittestandcomplement(long *, long); +unsigned char _bittestandreset(long *, long); +unsigned char _bittestandset(long *, long); +void __cdecl _disable(void); +void __cdecl _enable(void); +long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value); +unsigned char _interlockedbittestandreset(long volatile *, long); +unsigned char _interlockedbittestandset(long volatile *, long); +void *_InterlockedCompareExchangePointer_HLEAcquire(void *volatile *, void *, + void *); +void *_InterlockedCompareExchangePointer_HLERelease(void *volatile *, void *, + void *); +long _InterlockedExchangeAdd_HLEAcquire(long volatile *, long); +long _InterlockedExchangeAdd_HLERelease(long volatile *, long); +__int64 _InterlockedExchangeAdd64_HLEAcquire(__int64 volatile *, __int64); +__int64 _InterlockedExchangeAdd64_HLERelease(__int64 volatile *, __int64); +void _ReadBarrier(void); +unsigned int _rorx_u32(unsigned int, const unsigned int); +int _sarx_i32(int, unsigned int); +#if __STDC_HOSTED__ +int __cdecl _setjmp(jmp_buf); +#endif +unsigned int _shlx_u32(unsigned int, unsigned int); +unsigned int _shrx_u32(unsigned int, unsigned int); +void _Store_HLERelease(long volatile *, long); +void _Store64_HLERelease(__int64 volatile *, __int64); +void _StorePointer_HLERelease(void *volatile *, void *); +void _WriteBarrier(void); +unsigned __int32 xbegin(void); +void _xend(void); + +/* These additional intrinsics are turned on in x64/amd64/x86_64 mode. */ +#if defined(__x86_64__) && !defined(__arm64ec__) +void __addgsbyte(unsigned long, unsigned char); +void __addgsdword(unsigned long, unsigned long); +void __addgsqword(unsigned long, unsigned __int64); +void __addgsword(unsigned long, unsigned short); +void __faststorefence(void); +void __incgsbyte(unsigned long); +void __incgsdword(unsigned long); +void __incgsqword(unsigned long); +void __incgsword(unsigned long); +void __movsq(unsigned long long *, unsigned long long const *, size_t); +unsigned char __readgsbyte(unsigned long); +unsigned long __readgsdword(unsigned long); +unsigned __int64 __readgsqword(unsigned long); +unsigned short __readgsword(unsigned long); +void __stosq(unsigned __int64 *, unsigned __int64, size_t); +unsigned char __vmx_on(unsigned __int64 *); +unsigned char __vmx_vmclear(unsigned __int64 *); +unsigned char __vmx_vmlaunch(void); +unsigned char __vmx_vmptrld(unsigned __int64 *); +unsigned char __vmx_vmread(size_t, size_t *); +unsigned char __vmx_vmresume(void); +unsigned char __vmx_vmwrite(size_t, size_t); +void __writegsbyte(unsigned long, unsigned char); +void __writegsdword(unsigned long, unsigned long); +void __writegsqword(unsigned long, unsigned __int64); +void __writegsword(unsigned long, unsigned short); +unsigned char _bittest64(__int64 const *, __int64); +unsigned char _bittestandcomplement64(__int64 *, __int64); +unsigned char _bittestandreset64(__int64 *, __int64); +unsigned char _bittestandset64(__int64 *, __int64); +long _InterlockedAnd_np(long volatile *_Value, long _Mask); +short _InterlockedAnd16_np(short volatile *_Value, short _Mask); +__int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask); +char _InterlockedAnd8_np(char volatile *_Value, char _Mask); +unsigned char _interlockedbittestandreset64(__int64 volatile *, __int64); +unsigned char _interlockedbittestandset64(__int64 volatile *, __int64); +long _InterlockedCompareExchange_np(long volatile *_Destination, long _Exchange, + long _Comparand); +unsigned char _InterlockedCompareExchange128_np(__int64 volatile *_Destination, + __int64 _ExchangeHigh, + __int64 _ExchangeLow, + __int64 *_ComparandResult); +short _InterlockedCompareExchange16_np(short volatile *_Destination, + short _Exchange, short _Comparand); +__int64 _InterlockedCompareExchange64_np(__int64 volatile *_Destination, + __int64 _Exchange, __int64 _Comparand); +void *_InterlockedCompareExchangePointer_np(void *volatile *_Destination, + void *_Exchange, void *_Comparand); +long _InterlockedOr_np(long volatile *_Value, long _Mask); +short _InterlockedOr16_np(short volatile *_Value, short _Mask); +__int64 _InterlockedOr64_np(__int64 volatile *_Value, __int64 _Mask); +char _InterlockedOr8_np(char volatile *_Value, char _Mask); +long _InterlockedXor_np(long volatile *_Value, long _Mask); +short _InterlockedXor16_np(short volatile *_Value, short _Mask); +__int64 _InterlockedXor64_np(__int64 volatile *_Value, __int64 _Mask); +char _InterlockedXor8_np(char volatile *_Value, char _Mask); +unsigned __int64 _rorx_u64(unsigned __int64, const unsigned int); +__int64 _sarx_i64(__int64, unsigned int); +unsigned __int64 _shlx_u64(unsigned __int64, unsigned int); +unsigned __int64 _shrx_u64(unsigned __int64, unsigned int); +__int64 __mulh(__int64, __int64); +unsigned __int64 __umulh(unsigned __int64, unsigned __int64); +__int64 _mul128(__int64, __int64, __int64 *); + +#endif /* __x86_64__ */ + +/*----------------------------------------------------------------------------*\ +|* movs, stos +\*----------------------------------------------------------------------------*/ + +#if defined(__i386__) || (defined(__x86_64__) && !defined(__arm64ec__)) +static __inline__ void __DEFAULT_FN_ATTRS __movsb(unsigned char *__dst, + unsigned char const *__src, + size_t __n) { +#if defined(__x86_64__) + __asm__ __volatile__("rep movsb" + : "+D"(__dst), "+S"(__src), "+c"(__n) + : + : "memory"); +#else + __asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n" + "rep movsb\n" + "xchg {%%esi, %1|%1, esi}" + : "+D"(__dst), "+r"(__src), "+c"(__n) + : + : "memory"); +#endif +} +static __inline__ void __DEFAULT_FN_ATTRS __movsd(unsigned long *__dst, + unsigned long const *__src, + size_t __n) { +#if defined(__x86_64__) + __asm__ __volatile__("rep movs{l|d}" + : "+D"(__dst), "+S"(__src), "+c"(__n) + : + : "memory"); +#else + __asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n" + "rep movs{l|d}\n" + "xchg {%%esi, %1|%1, esi}" + : "+D"(__dst), "+r"(__src), "+c"(__n) + : + : "memory"); +#endif +} +static __inline__ void __DEFAULT_FN_ATTRS __movsw(unsigned short *__dst, + unsigned short const *__src, + size_t __n) { +#if defined(__x86_64__) + __asm__ __volatile__("rep movsw" + : "+D"(__dst), "+S"(__src), "+c"(__n) + : + : "memory"); +#else + __asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n" + "rep movsw\n" + "xchg {%%esi, %1|%1, esi}" + : "+D"(__dst), "+r"(__src), "+c"(__n) + : + : "memory"); +#endif +} +static __inline__ void __DEFAULT_FN_ATTRS __stosd(unsigned long *__dst, + unsigned long __x, + size_t __n) { + __asm__ __volatile__("rep stos{l|d}" + : "+D"(__dst), "+c"(__n) + : "a"(__x) + : "memory"); +} +static __inline__ void __DEFAULT_FN_ATTRS __stosw(unsigned short *__dst, + unsigned short __x, + size_t __n) { + __asm__ __volatile__("rep stosw" + : "+D"(__dst), "+c"(__n) + : "a"(__x) + : "memory"); +} +#endif +#if defined(__x86_64__) && !defined(__arm64ec__) +static __inline__ void __DEFAULT_FN_ATTRS __movsq( + unsigned long long *__dst, unsigned long long const *__src, size_t __n) { + __asm__ __volatile__("rep movsq" + : "+D"(__dst), "+S"(__src), "+c"(__n) + : + : "memory"); +} +static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned __int64 *__dst, + unsigned __int64 __x, + size_t __n) { + __asm__ __volatile__("rep stosq" : "+D"(__dst), "+c"(__n) : "a"(__x) + : "memory"); +} +#endif + +/*----------------------------------------------------------------------------*\ +|* Misc +\*----------------------------------------------------------------------------*/ +#if defined(__i386__) || (defined(__x86_64__) && !defined(__arm64ec__)) +static __inline__ void __DEFAULT_FN_ATTRS __halt(void) { + __asm__ volatile("hlt"); +} + +static inline unsigned char __inbyte(unsigned short port) { + unsigned char ret; + __asm__ __volatile__("inb %w1, %b0" : "=a"(ret) : "Nd"(port)); + return ret; +} + +static inline unsigned short __inword(unsigned short port) { + unsigned short ret; + __asm__ __volatile__("inw %w1, %w0" : "=a"(ret) : "Nd"(port)); + return ret; +} + +static inline unsigned long __indword(unsigned short port) { + unsigned long ret; + __asm__ __volatile__("inl %w1, %k0" : "=a"(ret) : "Nd"(port)); + return ret; +} + +static inline void __outbyte(unsigned short port, unsigned char data) { + __asm__ __volatile__("outb %b0, %w1" : : "a"(data), "Nd"(port)); +} + +static inline void __outword(unsigned short port, unsigned short data) { + __asm__ __volatile__("outw %w0, %w1" : : "a"(data), "Nd"(port)); +} + +static inline void __outdword(unsigned short port, unsigned long data) { + __asm__ __volatile__("outl %k0, %w1" : : "a"(data), "Nd"(port)); +} +#endif + +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) +static __inline__ void __DEFAULT_FN_ATTRS __nop(void) { + __asm__ volatile("nop"); +} +#endif + +/*----------------------------------------------------------------------------*\ +|* MS AArch64 specific +\*----------------------------------------------------------------------------*/ +#if defined(__aarch64__) || defined(__arm64ec__) +unsigned __int64 __getReg(int); +long _InterlockedAdd(long volatile *Addend, long Value); +__int64 _InterlockedAdd64(__int64 volatile *Addend, __int64 Value); +__int64 _ReadStatusReg(int); +void _WriteStatusReg(int, __int64); + +unsigned short __cdecl _byteswap_ushort(unsigned short val); +unsigned long __cdecl _byteswap_ulong (unsigned long val); +unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val); + +__int64 __mulh(__int64 __a, __int64 __b); +unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b); + +void __break(int); + +void __writex18byte(unsigned long offset, unsigned char data); +void __writex18word(unsigned long offset, unsigned short data); +void __writex18dword(unsigned long offset, unsigned long data); +void __writex18qword(unsigned long offset, unsigned __int64 data); + +unsigned char __readx18byte(unsigned long offset); +unsigned short __readx18word(unsigned long offset); +unsigned long __readx18dword(unsigned long offset); +unsigned __int64 __readx18qword(unsigned long offset); + +double _CopyDoubleFromInt64(__int64); +float _CopyFloatFromInt32(__int32); +__int32 _CopyInt32FromFloat(float); +__int64 _CopyInt64FromDouble(double); + +unsigned int _CountLeadingOnes(unsigned long); +unsigned int _CountLeadingOnes64(unsigned __int64); +unsigned int _CountLeadingSigns(long); +unsigned int _CountLeadingSigns64(__int64); +unsigned int _CountOneBits(unsigned long); +unsigned int _CountOneBits64(unsigned __int64); + +unsigned int __hlt(unsigned int, ...); + +void __cdecl __prefetch(const void *); + +#endif + +/*----------------------------------------------------------------------------*\ +|* Privileged intrinsics +\*----------------------------------------------------------------------------*/ +#if defined(__i386__) || (defined(__x86_64__) && !defined(__arm64ec__)) +static __inline__ unsigned __int64 __DEFAULT_FN_ATTRS +__readmsr(unsigned long __register) { + // Loads the contents of a 64-bit model specific register (MSR) specified in + // the ECX register into registers EDX:EAX. The EDX register is loaded with + // the high-order 32 bits of the MSR and the EAX register is loaded with the + // low-order 32 bits. If less than 64 bits are implemented in the MSR being + // read, the values returned to EDX:EAX in unimplemented bit locations are + // undefined. + unsigned long __edx; + unsigned long __eax; + __asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register)); + return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax; +} + +static __inline__ unsigned __LPTRINT_TYPE__ __DEFAULT_FN_ATTRS __readcr3(void) { + unsigned __LPTRINT_TYPE__ __cr3_val; + __asm__ __volatile__( + "mov {%%cr3, %0|%0, cr3}" + : "=r"(__cr3_val) + : + : "memory"); + return __cr3_val; +} + +static __inline__ void __DEFAULT_FN_ATTRS +__writecr3(unsigned __INTPTR_TYPE__ __cr3_val) { + __asm__ ("mov {%0, %%cr3|cr3, %0}" : : "r"(__cr3_val) : "memory"); +} +#endif + +#ifdef __cplusplus +} +#endif + +#undef __LPTRINT_TYPE__ + +#undef __DEFAULT_FN_ATTRS + +#endif /* __INTRIN_H */ +#endif /* _MSC_VER */ diff --git a/llvm/lib/clang/19/include/intrin0.h b/llvm/lib/clang/19/include/intrin0.h new file mode 100644 index 0000000000000000000000000000000000000000..6b01f3808652aa8077c4f0448d41681f250686c3 --- /dev/null +++ b/llvm/lib/clang/19/include/intrin0.h @@ -0,0 +1,247 @@ +/* ===-------- intrin.h ---------------------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Only include this if we're compiling for the windows platform. */ +#ifndef _MSC_VER +#include_next +#else + +#ifndef __INTRIN0_H +#define __INTRIN0_H + +#if defined(__x86_64__) && !defined(__arm64ec__) +#include +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask); +unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask); +void _ReadWriteBarrier(void); + +#if defined(__aarch64__) || defined(__arm64ec__) +unsigned int _CountLeadingZeros(unsigned long); +unsigned int _CountLeadingZeros64(unsigned _int64); +unsigned char _InterlockedCompareExchange128_acq(__int64 volatile *_Destination, + __int64 _ExchangeHigh, + __int64 _ExchangeLow, + __int64 *_ComparandResult); +unsigned char _InterlockedCompareExchange128_nf(__int64 volatile *_Destination, + __int64 _ExchangeHigh, + __int64 _ExchangeLow, + __int64 *_ComparandResult); +unsigned char _InterlockedCompareExchange128_rel(__int64 volatile *_Destination, + __int64 _ExchangeHigh, + __int64 _ExchangeLow, + __int64 *_ComparandResult); +#endif + +#if defined(__x86_64__) && !defined(__arm64ec__) +unsigned __int64 _umul128(unsigned __int64, unsigned __int64, + unsigned __int64 *); +unsigned __int64 __shiftleft128(unsigned __int64 _LowPart, + unsigned __int64 _HighPart, + unsigned char _Shift); +unsigned __int64 __shiftright128(unsigned __int64 _LowPart, + unsigned __int64 _HighPart, + unsigned char _Shift); +#endif + +#if defined(__i386__) || (defined(__x86_64__) && !defined(__arm64ec__)) +void _mm_pause(void); +#endif + +#if defined(__x86_64__) || defined(__aarch64__) +unsigned char _InterlockedCompareExchange128(__int64 volatile *_Destination, + __int64 _ExchangeHigh, + __int64 _ExchangeLow, + __int64 *_ComparandResult); +#endif + +#if defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) +unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask); +unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask); +#endif + +#if defined(__i386__) || defined(__x86_64__) || defined(__arm__) || \ + defined(__aarch64__) +__int64 _InterlockedDecrement64(__int64 volatile *_Addend); +__int64 _InterlockedExchange64(__int64 volatile *_Target, __int64 _Value); +__int64 _InterlockedExchangeAdd64(__int64 volatile *_Addend, __int64 _Value); +__int64 _InterlockedExchangeSub64(__int64 volatile *_Subend, __int64 _Value); +__int64 _InterlockedIncrement64(__int64 volatile *_Addend); +__int64 _InterlockedOr64(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedXor64(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedAnd64(__int64 volatile *_Value, __int64 _Mask); +#endif + +#if defined(__arm__) || defined(__aarch64__) || defined(__arm64ec__) +/*----------------------------------------------------------------------------*\ +|* Interlocked Exchange Add +\*----------------------------------------------------------------------------*/ +char _InterlockedExchangeAdd8_acq(char volatile *_Addend, char _Value); +char _InterlockedExchangeAdd8_nf(char volatile *_Addend, char _Value); +char _InterlockedExchangeAdd8_rel(char volatile *_Addend, char _Value); +short _InterlockedExchangeAdd16_acq(short volatile *_Addend, short _Value); +short _InterlockedExchangeAdd16_nf(short volatile *_Addend, short _Value); +short _InterlockedExchangeAdd16_rel(short volatile *_Addend, short _Value); +long _InterlockedExchangeAdd_acq(long volatile *_Addend, long _Value); +long _InterlockedExchangeAdd_nf(long volatile *_Addend, long _Value); +long _InterlockedExchangeAdd_rel(long volatile *_Addend, long _Value); +__int64 _InterlockedExchangeAdd64_acq(__int64 volatile *_Addend, + __int64 _Value); +__int64 _InterlockedExchangeAdd64_nf(__int64 volatile *_Addend, __int64 _Value); +__int64 _InterlockedExchangeAdd64_rel(__int64 volatile *_Addend, + __int64 _Value); + +/*----------------------------------------------------------------------------*\ +|* Interlocked Increment +\*----------------------------------------------------------------------------*/ +short _InterlockedIncrement16_acq(short volatile *_Value); +short _InterlockedIncrement16_nf(short volatile *_Value); +short _InterlockedIncrement16_rel(short volatile *_Value); +long _InterlockedIncrement_acq(long volatile *_Value); +long _InterlockedIncrement_nf(long volatile *_Value); +long _InterlockedIncrement_rel(long volatile *_Value); +__int64 _InterlockedIncrement64_acq(__int64 volatile *_Value); +__int64 _InterlockedIncrement64_nf(__int64 volatile *_Value); +__int64 _InterlockedIncrement64_rel(__int64 volatile *_Value); + +/*----------------------------------------------------------------------------*\ +|* Interlocked Decrement +\*----------------------------------------------------------------------------*/ +short _InterlockedDecrement16_acq(short volatile *_Value); +short _InterlockedDecrement16_nf(short volatile *_Value); +short _InterlockedDecrement16_rel(short volatile *_Value); +long _InterlockedDecrement_acq(long volatile *_Value); +long _InterlockedDecrement_nf(long volatile *_Value); +long _InterlockedDecrement_rel(long volatile *_Value); +__int64 _InterlockedDecrement64_acq(__int64 volatile *_Value); +__int64 _InterlockedDecrement64_nf(__int64 volatile *_Value); +__int64 _InterlockedDecrement64_rel(__int64 volatile *_Value); + +/*----------------------------------------------------------------------------*\ +|* Interlocked And +\*----------------------------------------------------------------------------*/ +char _InterlockedAnd8_acq(char volatile *_Value, char _Mask); +char _InterlockedAnd8_nf(char volatile *_Value, char _Mask); +char _InterlockedAnd8_rel(char volatile *_Value, char _Mask); +short _InterlockedAnd16_acq(short volatile *_Value, short _Mask); +short _InterlockedAnd16_nf(short volatile *_Value, short _Mask); +short _InterlockedAnd16_rel(short volatile *_Value, short _Mask); +long _InterlockedAnd_acq(long volatile *_Value, long _Mask); +long _InterlockedAnd_nf(long volatile *_Value, long _Mask); +long _InterlockedAnd_rel(long volatile *_Value, long _Mask); +__int64 _InterlockedAnd64_acq(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedAnd64_nf(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedAnd64_rel(__int64 volatile *_Value, __int64 _Mask); + +/*----------------------------------------------------------------------------*\ +|* Bit Counting and Testing +\*----------------------------------------------------------------------------*/ +unsigned char _interlockedbittestandset_acq(long volatile *_BitBase, + long _BitPos); +unsigned char _interlockedbittestandset_nf(long volatile *_BitBase, + long _BitPos); +unsigned char _interlockedbittestandset_rel(long volatile *_BitBase, + long _BitPos); +unsigned char _interlockedbittestandreset_acq(long volatile *_BitBase, + long _BitPos); +unsigned char _interlockedbittestandreset_nf(long volatile *_BitBase, + long _BitPos); +unsigned char _interlockedbittestandreset_rel(long volatile *_BitBase, + long _BitPos); + +/*----------------------------------------------------------------------------*\ +|* Interlocked Or +\*----------------------------------------------------------------------------*/ +char _InterlockedOr8_acq(char volatile *_Value, char _Mask); +char _InterlockedOr8_nf(char volatile *_Value, char _Mask); +char _InterlockedOr8_rel(char volatile *_Value, char _Mask); +short _InterlockedOr16_acq(short volatile *_Value, short _Mask); +short _InterlockedOr16_nf(short volatile *_Value, short _Mask); +short _InterlockedOr16_rel(short volatile *_Value, short _Mask); +long _InterlockedOr_acq(long volatile *_Value, long _Mask); +long _InterlockedOr_nf(long volatile *_Value, long _Mask); +long _InterlockedOr_rel(long volatile *_Value, long _Mask); +__int64 _InterlockedOr64_acq(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedOr64_nf(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedOr64_rel(__int64 volatile *_Value, __int64 _Mask); + +/*----------------------------------------------------------------------------*\ +|* Interlocked Xor +\*----------------------------------------------------------------------------*/ +char _InterlockedXor8_acq(char volatile *_Value, char _Mask); +char _InterlockedXor8_nf(char volatile *_Value, char _Mask); +char _InterlockedXor8_rel(char volatile *_Value, char _Mask); +short _InterlockedXor16_acq(short volatile *_Value, short _Mask); +short _InterlockedXor16_nf(short volatile *_Value, short _Mask); +short _InterlockedXor16_rel(short volatile *_Value, short _Mask); +long _InterlockedXor_acq(long volatile *_Value, long _Mask); +long _InterlockedXor_nf(long volatile *_Value, long _Mask); +long _InterlockedXor_rel(long volatile *_Value, long _Mask); +__int64 _InterlockedXor64_acq(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedXor64_nf(__int64 volatile *_Value, __int64 _Mask); +__int64 _InterlockedXor64_rel(__int64 volatile *_Value, __int64 _Mask); + +/*----------------------------------------------------------------------------*\ +|* Interlocked Exchange +\*----------------------------------------------------------------------------*/ +char _InterlockedExchange8_acq(char volatile *_Target, char _Value); +char _InterlockedExchange8_nf(char volatile *_Target, char _Value); +char _InterlockedExchange8_rel(char volatile *_Target, char _Value); +short _InterlockedExchange16_acq(short volatile *_Target, short _Value); +short _InterlockedExchange16_nf(short volatile *_Target, short _Value); +short _InterlockedExchange16_rel(short volatile *_Target, short _Value); +long _InterlockedExchange_acq(long volatile *_Target, long _Value); +long _InterlockedExchange_nf(long volatile *_Target, long _Value); +long _InterlockedExchange_rel(long volatile *_Target, long _Value); +__int64 _InterlockedExchange64_acq(__int64 volatile *_Target, __int64 _Value); +__int64 _InterlockedExchange64_nf(__int64 volatile *_Target, __int64 _Value); +__int64 _InterlockedExchange64_rel(__int64 volatile *_Target, __int64 _Value); + +/*----------------------------------------------------------------------------*\ +|* Interlocked Compare Exchange +\*----------------------------------------------------------------------------*/ +char _InterlockedCompareExchange8_acq(char volatile *_Destination, + char _Exchange, char _Comparand); +char _InterlockedCompareExchange8_nf(char volatile *_Destination, + char _Exchange, char _Comparand); +char _InterlockedCompareExchange8_rel(char volatile *_Destination, + char _Exchange, char _Comparand); +short _InterlockedCompareExchange16_acq(short volatile *_Destination, + short _Exchange, short _Comparand); +short _InterlockedCompareExchange16_nf(short volatile *_Destination, + short _Exchange, short _Comparand); +short _InterlockedCompareExchange16_rel(short volatile *_Destination, + short _Exchange, short _Comparand); +long _InterlockedCompareExchange_acq(long volatile *_Destination, + long _Exchange, long _Comparand); +long _InterlockedCompareExchange_nf(long volatile *_Destination, long _Exchange, + long _Comparand); +long _InterlockedCompareExchange_rel(long volatile *_Destination, + long _Exchange, long _Comparand); +__int64 _InterlockedCompareExchange64_acq(__int64 volatile *_Destination, + __int64 _Exchange, + __int64 _Comparand); +__int64 _InterlockedCompareExchange64_nf(__int64 volatile *_Destination, + __int64 _Exchange, __int64 _Comparand); +__int64 _InterlockedCompareExchange64_rel(__int64 volatile *_Destination, + __int64 _Exchange, + __int64 _Comparand); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __INTRIN0_H */ +#endif /* _MSC_VER */ diff --git a/llvm/lib/clang/19/include/inttypes.h b/llvm/lib/clang/19/include/inttypes.h new file mode 100644 index 0000000000000000000000000000000000000000..5150d22f8b2e4ed1cae2d738c8a369541ec40cc5 --- /dev/null +++ b/llvm/lib/clang/19/include/inttypes.h @@ -0,0 +1,101 @@ +/*===---- inttypes.h - Standard header for integer printf macros ----------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +#ifndef __CLANG_INTTYPES_H +// AIX system headers need inttypes.h to be re-enterable while _STD_TYPES_T +// is defined until an inclusion of it without _STD_TYPES_T occurs, in which +// case the header guard macro is defined. +#if !defined(_AIX) || !defined(_STD_TYPES_T) +#define __CLANG_INTTYPES_H +#endif +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +#if defined(_MSC_VER) && _MSC_VER < 1800 +#error MSVC does not have inttypes.h prior to Visual Studio 2013 +#endif + +#include_next + +#if defined(_MSC_VER) && _MSC_VER < 1900 +/* MSVC headers define int32_t as int, but PRIx32 as "lx" instead of "x". + * This triggers format warnings, so fix it up here. */ +#undef PRId32 +#undef PRIdLEAST32 +#undef PRIdFAST32 +#undef PRIi32 +#undef PRIiLEAST32 +#undef PRIiFAST32 +#undef PRIo32 +#undef PRIoLEAST32 +#undef PRIoFAST32 +#undef PRIu32 +#undef PRIuLEAST32 +#undef PRIuFAST32 +#undef PRIx32 +#undef PRIxLEAST32 +#undef PRIxFAST32 +#undef PRIX32 +#undef PRIXLEAST32 +#undef PRIXFAST32 + +#undef SCNd32 +#undef SCNdLEAST32 +#undef SCNdFAST32 +#undef SCNi32 +#undef SCNiLEAST32 +#undef SCNiFAST32 +#undef SCNo32 +#undef SCNoLEAST32 +#undef SCNoFAST32 +#undef SCNu32 +#undef SCNuLEAST32 +#undef SCNuFAST32 +#undef SCNx32 +#undef SCNxLEAST32 +#undef SCNxFAST32 + +#define PRId32 "d" +#define PRIdLEAST32 "d" +#define PRIdFAST32 "d" +#define PRIi32 "i" +#define PRIiLEAST32 "i" +#define PRIiFAST32 "i" +#define PRIo32 "o" +#define PRIoLEAST32 "o" +#define PRIoFAST32 "o" +#define PRIu32 "u" +#define PRIuLEAST32 "u" +#define PRIuFAST32 "u" +#define PRIx32 "x" +#define PRIxLEAST32 "x" +#define PRIxFAST32 "x" +#define PRIX32 "X" +#define PRIXLEAST32 "X" +#define PRIXFAST32 "X" + +#define SCNd32 "d" +#define SCNdLEAST32 "d" +#define SCNdFAST32 "d" +#define SCNi32 "i" +#define SCNiLEAST32 "i" +#define SCNiFAST32 "i" +#define SCNo32 "o" +#define SCNoLEAST32 "o" +#define SCNoFAST32 "o" +#define SCNu32 "u" +#define SCNuLEAST32 "u" +#define SCNuFAST32 "u" +#define SCNx32 "x" +#define SCNxLEAST32 "x" +#define SCNxFAST32 "x" +#endif + +#endif /* __MVS__ */ +#endif /* __CLANG_INTTYPES_H */ diff --git a/llvm/lib/clang/19/include/invpcidintrin.h b/llvm/lib/clang/19/include/invpcidintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..48dae0a86f92ab3f2a1b258032876abed23ee3f2 --- /dev/null +++ b/llvm/lib/clang/19/include/invpcidintrin.h @@ -0,0 +1,23 @@ +/*===------------- invpcidintrin.h - INVPCID intrinsic ---------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __INVPCIDINTRIN_H +#define __INVPCIDINTRIN_H + +static __inline__ void + __attribute__((__always_inline__, __nodebug__, __target__("invpcid"))) +_invpcid(unsigned int __type, void *__descriptor) { + __builtin_ia32_invpcid(__type, __descriptor); +} + +#endif /* __INVPCIDINTRIN_H */ diff --git a/llvm/lib/clang/19/include/iso646.h b/llvm/lib/clang/19/include/iso646.h new file mode 100644 index 0000000000000000000000000000000000000000..b53fcd9b4e535932bb2cce3bf0f18a75a1dfa2ef --- /dev/null +++ b/llvm/lib/clang/19/include/iso646.h @@ -0,0 +1,31 @@ +/*===---- iso646.h - Standard header for alternate spellings of operators---=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __ISO646_H +#define __ISO646_H +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +#ifndef __cplusplus +#define and && +#define and_eq &= +#define bitand & +#define bitor | +#define compl ~ +#define not ! +#define not_eq != +#define or || +#define or_eq |= +#define xor ^ +#define xor_eq ^= +#endif + +#endif /* __MVS__ */ +#endif /* __ISO646_H */ diff --git a/llvm/lib/clang/19/include/keylockerintrin.h b/llvm/lib/clang/19/include/keylockerintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f76e91b4d4b306dea4d4155eb1341ad2dd873f5c --- /dev/null +++ b/llvm/lib/clang/19/include/keylockerintrin.h @@ -0,0 +1,527 @@ +/*===----------------- keylockerintrin.h - KL Intrinsics -------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef _KEYLOCKERINTRIN_H +#define _KEYLOCKERINTRIN_H + +#if !defined(__SCE__) || __has_feature(modules) || defined(__KL__) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("kl"),\ + __min_vector_width__(128))) + +/// Load internal wrapping key from __intkey, __enkey_lo and __enkey_hi. __ctl +/// will assigned to EAX, whch specifies the KeySource and whether backing up +/// the key is permitted. The 256-bit encryption key is loaded from the two +/// explicit operands (__enkey_lo and __enkey_hi). The 128-bit integrity key is +/// loaded from the implicit operand XMM0 which assigned by __intkey. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LOADIWKEY instructions. +/// +/// \code{.operation} +/// IF CPL > 0 // LOADKWKEY only allowed at ring 0 (supervisor mode) +/// GP (0) +/// FI +/// IF “LOADIWKEY exiting” VM execution control set +/// VMexit +/// FI +/// IF __ctl[4:1] > 1 // Reserved KeySource encoding used +/// GP (0) +/// FI +/// IF __ctl[31:5] != 0 // Reserved bit in __ctl is set +/// GP (0) +/// FI +/// IF __ctl[0] AND (CPUID.19H.ECX[0] == 0) // NoBackup is not supported on this part +/// GP (0) +/// FI +/// IF (__ctl[4:1] == 1) AND (CPUID.19H.ECX[1] == 0) // KeySource of 1 is not supported on this part +/// GP (0) +/// FI +/// IF (__ctl[4:1] == 0) // KeySource of 0. +/// IWKey.Encryption Key[127:0] := __enkey_hi[127:0]: +/// IWKey.Encryption Key[255:128] := __enkey_lo[127:0] +/// IWKey.IntegrityKey[127:0] := __intkey[127:0] +/// IWKey.NoBackup := __ctl[0] +/// IWKey.KeySource := __ctl[4:1] +/// ZF := 0 +/// ELSE // KeySource of 1. See RDSEED definition for details of randomness +/// IF HW_NRND_GEN.ready == 1 // Full-entropy random data from RDSEED was received +/// IWKey.Encryption Key[127:0] := __enkey_hi[127:0] XOR HW_NRND_GEN.data[127:0] +/// IWKey.Encryption Key[255:128] := __enkey_lo[127:0] XOR HW_NRND_GEN.data[255:128] +/// IWKey.Encryption Key[255:0] := __enkey_hi[127:0]:__enkey_lo[127:0] XOR HW_NRND_GEN.data[255:0] +/// IWKey.IntegrityKey[127:0] := __intkey[127:0] XOR HW_NRND_GEN.data[383:256] +/// IWKey.NoBackup := __ctl[0] +/// IWKey.KeySource := __ctl[4:1] +/// ZF := 0 +/// ELSE // Random data was not returned from RDSEED. IWKey was not loaded +/// ZF := 1 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS +_mm_loadiwkey (unsigned int __ctl, __m128i __intkey, + __m128i __enkey_lo, __m128i __enkey_hi) { + __builtin_ia32_loadiwkey (__intkey, __enkey_lo, __enkey_hi, __ctl); +} + +/// Wrap a 128-bit AES key from __key into a key handle and output in +/// ((__m128i*)__h) to ((__m128i*)__h) + 2 and a 32-bit value as return. +/// The explicit source operand __htype specifies handle restrictions. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the ENCODEKEY128 instructions. +/// +/// \code{.operation} +/// InputKey[127:0] := __key[127:0] +/// KeyMetadata[2:0] := __htype[2:0] +/// KeyMetadata[23:3] := 0 // Reserved for future usage +/// KeyMetadata[27:24] := 0 // KeyType is AES-128 (value of 0) +/// KeyMetadata[127:28] := 0 // Reserved for future usage +/// Handle[383:0] := WrapKey128(InputKey[127:0], KeyMetadata[127:0], +/// IWKey.Integrity Key[127:0], IWKey.Encryption Key[255:0]) +/// dst[0] := IWKey.NoBackup +/// dst[4:1] := IWKey.KeySource[3:0] +/// dst[31:5] := 0 +/// MEM[__h+127:__h] := Handle[127:0] // AAD +/// MEM[__h+255:__h+128] := Handle[255:128] // Integrity Tag +/// MEM[__h+383:__h+256] := Handle[383:256] // CipherText +/// OF := 0 +/// SF := 0 +/// ZF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_mm_encodekey128_u32(unsigned int __htype, __m128i __key, void *__h) { + return __builtin_ia32_encodekey128_u32(__htype, (__v2di)__key, __h); +} + +/// Wrap a 256-bit AES key from __key_hi:__key_lo into a key handle, then +/// output handle in ((__m128i*)__h) to ((__m128i*)__h) + 3 and +/// a 32-bit value as return. +/// The explicit source operand __htype specifies handle restrictions. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the ENCODEKEY256 instructions. +/// +/// \code{.operation} +/// InputKey[127:0] := __key_lo[127:0] +/// InputKey[255:128] := __key_hi[255:128] +/// KeyMetadata[2:0] := __htype[2:0] +/// KeyMetadata[23:3] := 0 // Reserved for future usage +/// KeyMetadata[27:24] := 1 // KeyType is AES-256 (value of 1) +/// KeyMetadata[127:28] := 0 // Reserved for future usage +/// Handle[511:0] := WrapKey256(InputKey[255:0], KeyMetadata[127:0], +/// IWKey.Integrity Key[127:0], IWKey.Encryption Key[255:0]) +/// dst[0] := IWKey.NoBackup +/// dst[4:1] := IWKey.KeySource[3:0] +/// dst[31:5] := 0 +/// MEM[__h+127:__h] := Handle[127:0] // AAD +/// MEM[__h+255:__h+128] := Handle[255:128] // Tag +/// MEM[__h+383:__h+256] := Handle[383:256] // CipherText[127:0] +/// MEM[__h+511:__h+384] := Handle[511:384] // CipherText[255:128] +/// OF := 0 +/// SF := 0 +/// ZF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_mm_encodekey256_u32(unsigned int __htype, __m128i __key_lo, __m128i __key_hi, + void *__h) { + return __builtin_ia32_encodekey256_u32(__htype, (__v2di)__key_lo, + (__v2di)__key_hi, __h); +} + +/// The AESENC128KL performs 10 rounds of AES to encrypt the __idata using +/// the 128-bit key in the handle from the __h. It stores the result in the +/// __odata. And return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESENC128KL instructions. +/// +/// \code{.operation} +/// Handle[383:0] := MEM[__h+383:__h] // Load is not guaranteed to be atomic. +/// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[383:256] || +/// HandleKeyType (Handle[383:0]) != HANDLE_KEY_TYPE_AES128 ) +/// IF (IllegalHandle) +/// ZF := 1 +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) +/// IF (Authentic == 0) +/// ZF := 1 +/// ELSE +/// MEM[__odata+127:__odata] := AES128Encrypt (__idata[127:0], UnwrappedKey) +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesenc128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { + return __builtin_ia32_aesenc128kl_u8((__v2di *)__odata, (__v2di)__idata, __h); +} + +/// The AESENC256KL performs 14 rounds of AES to encrypt the __idata using +/// the 256-bit key in the handle from the __h. It stores the result in the +/// __odata. And return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESENC256KL instructions. +/// +/// \code{.operation} +/// Handle[511:0] := MEM[__h+511:__h] // Load is not guaranteed to be atomic. +/// IllegalHandle := ( HandleReservedBitSet (Handle[511:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[255:128] || +/// HandleKeyType (Handle[511:0]) != HANDLE_KEY_TYPE_AES256 ) +/// IF (IllegalHandle) +/// ZF := 1 +/// MEM[__odata+127:__odata] := 0 +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) +/// IF (Authentic == 0) +/// ZF := 1 +/// MEM[__odata+127:__odata] := 0 +/// ELSE +/// MEM[__odata+127:__odata] := AES256Encrypt (__idata[127:0], UnwrappedKey) +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesenc256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { + return __builtin_ia32_aesenc256kl_u8((__v2di *)__odata, (__v2di)__idata, __h); +} + +/// The AESDEC128KL performs 10 rounds of AES to decrypt the __idata using +/// the 128-bit key in the handle from the __h. It stores the result in the +/// __odata. And return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESDEC128KL instructions. +/// +/// \code{.operation} +/// Handle[383:0] := MEM[__h+383:__h] // Load is not guaranteed to be atomic. +/// IllegalHandle := (HandleReservedBitSet (Handle[383:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[383:256] || +/// HandleKeyType (Handle[383:0]) != HANDLE_KEY_TYPE_AES128) +/// IF (IllegalHandle) +/// ZF := 1 +/// MEM[__odata+127:__odata] := 0 +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) +/// IF (Authentic == 0) +/// ZF := 1 +/// MEM[__odata+127:__odata] := 0 +/// ELSE +/// MEM[__odata+127:__odata] := AES128Decrypt (__idata[127:0], UnwrappedKey) +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesdec128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { + return __builtin_ia32_aesdec128kl_u8((__v2di *)__odata, (__v2di)__idata, __h); +} + +/// The AESDEC256KL performs 10 rounds of AES to decrypt the __idata using +/// the 256-bit key in the handle from the __h. It stores the result in the +/// __odata. And return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESDEC256KL instructions. +/// +/// \code{.operation} +/// Handle[511:0] := MEM[__h+511:__h] +/// IllegalHandle := (HandleReservedBitSet (Handle[511:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[383:256] || +/// HandleKeyType (Handle[511:0]) != HANDLE_KEY_TYPE_AES256) +/// IF (IllegalHandle) +/// ZF := 1 +/// MEM[__odata+127:__odata] := 0 +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) +/// IF (Authentic == 0) +/// ZF := 1 +/// MEM[__odata+127:__odata] := 0 +/// ELSE +/// MEM[__odata+127:__odata] := AES256Decrypt (__idata[127:0], UnwrappedKey) +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesdec256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { + return __builtin_ia32_aesdec256kl_u8((__v2di *)__odata, (__v2di)__idata, __h); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* !defined(__SCE__ || __has_feature(modules) || defined(__KL__) */ + +#if !defined(__SCE__) || __has_feature(modules) || defined(__WIDEKL__) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("kl,widekl"),\ + __min_vector_width__(128))) + +/// Encrypt __idata[0] to __idata[7] using 128-bit AES key indicated by handle +/// at __h and store each resultant block back from __odata to __odata+7. And +/// return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESENCWIDE128KL instructions. +/// +/// \code{.operation} +/// Handle := MEM[__h+383:__h] +/// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[255:128] || +/// HandleKeyType (Handle[383:0]) != HANDLE_KEY_TYPE_AES128 ) +/// IF (IllegalHandle) +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) +/// IF Authentic == 0 +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// FOR i := 0 to 7 +/// __odata[i] := AES128Encrypt (__idata[i], UnwrappedKey) +/// ENDFOR +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesencwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { + return __builtin_ia32_aesencwide128kl_u8((__v2di *)__odata, + (const __v2di *)__idata, __h); +} + +/// Encrypt __idata[0] to __idata[7] using 256-bit AES key indicated by handle +/// at __h and store each resultant block back from __odata to __odata+7. And +/// return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESENCWIDE256KL instructions. +/// +/// \code{.operation} +/// Handle[511:0] := MEM[__h+511:__h] +/// IllegalHandle := ( HandleReservedBitSet (Handle[511:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[255:128] || +/// HandleKeyType (Handle[511:0]) != HANDLE_KEY_TYPE_AES512 ) +/// IF (IllegalHandle) +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) +/// IF Authentic == 0 +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// FOR i := 0 to 7 +/// __odata[i] := AES256Encrypt (__idata[i], UnwrappedKey) +/// ENDFOR +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesencwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { + return __builtin_ia32_aesencwide256kl_u8((__v2di *)__odata, + (const __v2di *)__idata, __h); +} + +/// Decrypt __idata[0] to __idata[7] using 128-bit AES key indicated by handle +/// at __h and store each resultant block back from __odata to __odata+7. And +/// return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESDECWIDE128KL instructions. +/// +/// \code{.operation} +/// Handle[383:0] := MEM[__h+383:__h] +/// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[255:128] || +/// HandleKeyType (Handle) != HANDLE_KEY_TYPE_AES128 ) +/// IF (IllegalHandle) +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) +/// IF Authentic == 0 +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// FOR i := 0 to 7 +/// __odata[i] := AES128Decrypt (__idata[i], UnwrappedKey) +/// ENDFOR +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesdecwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { + return __builtin_ia32_aesdecwide128kl_u8((__v2di *)__odata, + (const __v2di *)__idata, __h); +} + +/// Decrypt __idata[0] to __idata[7] using 256-bit AES key indicated by handle +/// at __h and store each resultant block back from __odata to __odata+7. And +/// return the affected ZF flag status. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the AESDECWIDE256KL instructions. +/// +/// \code{.operation} +/// Handle[511:0] := MEM[__h+511:__h] +/// IllegalHandle = ( HandleReservedBitSet (Handle[511:0]) || +/// (Handle[127:0] AND (CPL > 0)) || +/// Handle[255:128] || +/// HandleKeyType (Handle) != HANDLE_KEY_TYPE_AES512 ) +/// If (IllegalHandle) +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) +/// IF Authentic == 0 +/// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR +/// ELSE +/// FOR i := 0 to 7 +/// __odata[i] := AES256Decrypt (__idata[i], UnwrappedKey) +/// ENDFOR +/// ZF := 0 +/// FI +/// FI +/// dst := ZF +/// OF := 0 +/// SF := 0 +/// AF := 0 +/// PF := 0 +/// CF := 0 +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_mm_aesdecwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { + return __builtin_ia32_aesdecwide256kl_u8((__v2di *)__odata, + (const __v2di *)__idata, __h); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* !defined(__SCE__) || __has_feature(modules) || defined(__WIDEKL__) \ + */ + +#endif /* _KEYLOCKERINTRIN_H */ diff --git a/llvm/lib/clang/19/include/larchintrin.h b/llvm/lib/clang/19/include/larchintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f4218295919a0d0d633e6a7b2f1bb81f83c96eda --- /dev/null +++ b/llvm/lib/clang/19/include/larchintrin.h @@ -0,0 +1,246 @@ +/*===------------ larchintrin.h - LoongArch intrinsics ---------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _LOONGARCH_BASE_INTRIN_H +#define _LOONGARCH_BASE_INTRIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct rdtime { + unsigned int value; + unsigned int timeid; +} __rdtime_t; + +#if __loongarch_grlen == 64 +typedef struct drdtime { + unsigned long dvalue; + unsigned long dtimeid; +} __drdtime_t; + +extern __inline __drdtime_t + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __rdtime_d(void) { + __drdtime_t __drdtime; + __asm__ volatile( + "rdtime.d %[val], %[tid]\n\t" + : [val] "=&r"(__drdtime.dvalue), [tid] "=&r"(__drdtime.dtimeid)); + return __drdtime; +} +#endif + +extern __inline __rdtime_t + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __rdtimeh_w(void) { + __rdtime_t __rdtime; + __asm__ volatile("rdtimeh.w %[val], %[tid]\n\t" + : [val] "=&r"(__rdtime.value), [tid] "=&r"(__rdtime.timeid)); + return __rdtime; +} + +extern __inline __rdtime_t + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __rdtimel_w(void) { + __rdtime_t __rdtime; + __asm__ volatile("rdtimel.w %[val], %[tid]\n\t" + : [val] "=&r"(__rdtime.value), [tid] "=&r"(__rdtime.timeid)); + return __rdtime; +} + +#if __loongarch_grlen == 64 +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crc_w_b_w(char _1, int _2) { + return (int)__builtin_loongarch_crc_w_b_w((char)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crc_w_h_w(short _1, int _2) { + return (int)__builtin_loongarch_crc_w_h_w((short)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crc_w_w_w(int _1, int _2) { + return (int)__builtin_loongarch_crc_w_w_w((int)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crc_w_d_w(long int _1, int _2) { + return (int)__builtin_loongarch_crc_w_d_w((long int)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crcc_w_b_w(char _1, int _2) { + return (int)__builtin_loongarch_crcc_w_b_w((char)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crcc_w_h_w(short _1, int _2) { + return (int)__builtin_loongarch_crcc_w_h_w((short)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crcc_w_w_w(int _1, int _2) { + return (int)__builtin_loongarch_crcc_w_w_w((int)_1, (int)_2); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __crcc_w_d_w(long int _1, int _2) { + return (int)__builtin_loongarch_crcc_w_d_w((long int)_1, (int)_2); +} +#endif + +#define __break(/*ui15*/ _1) __builtin_loongarch_break((_1)) + +#if __loongarch_grlen == 32 +#define __cacop_w(/*uimm5*/ _1, /*unsigned int*/ _2, /*simm12*/ _3) \ + ((void)__builtin_loongarch_cacop_w((_1), (unsigned int)(_2), (_3))) +#endif + +#if __loongarch_grlen == 64 +#define __cacop_d(/*uimm5*/ _1, /*unsigned long int*/ _2, /*simm12*/ _3) \ + ((void)__builtin_loongarch_cacop_d((_1), (unsigned long int)(_2), (_3))) +#endif + +#define __dbar(/*ui15*/ _1) __builtin_loongarch_dbar((_1)) + +#define __ibar(/*ui15*/ _1) __builtin_loongarch_ibar((_1)) + +#define __movfcsr2gr(/*ui5*/ _1) __builtin_loongarch_movfcsr2gr((_1)); + +#define __movgr2fcsr(/*ui5*/ _1, _2) \ + __builtin_loongarch_movgr2fcsr((_1), (unsigned int)_2); + +#define __syscall(/*ui15*/ _1) __builtin_loongarch_syscall((_1)) + +#define __csrrd_w(/*ui14*/ _1) ((unsigned int)__builtin_loongarch_csrrd_w((_1))) + +#define __csrwr_w(/*unsigned int*/ _1, /*ui14*/ _2) \ + ((unsigned int)__builtin_loongarch_csrwr_w((unsigned int)(_1), (_2))) + +#define __csrxchg_w(/*unsigned int*/ _1, /*unsigned int*/ _2, /*ui14*/ _3) \ + ((unsigned int)__builtin_loongarch_csrxchg_w((unsigned int)(_1), \ + (unsigned int)(_2), (_3))) + +#if __loongarch_grlen == 64 +#define __csrrd_d(/*ui14*/ _1) \ + ((unsigned long int)__builtin_loongarch_csrrd_d((_1))) + +#define __csrwr_d(/*unsigned long int*/ _1, /*ui14*/ _2) \ + ((unsigned long int)__builtin_loongarch_csrwr_d((unsigned long int)(_1), \ + (_2))) + +#define __csrxchg_d(/*unsigned long int*/ _1, /*unsigned long int*/ _2, \ + /*ui14*/ _3) \ + ((unsigned long int)__builtin_loongarch_csrxchg_d( \ + (unsigned long int)(_1), (unsigned long int)(_2), (_3))) +#endif + +extern __inline unsigned char + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrrd_b(unsigned int _1) { + return (unsigned char)__builtin_loongarch_iocsrrd_b((unsigned int)_1); +} + +extern __inline unsigned short + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrrd_h(unsigned int _1) { + return (unsigned short)__builtin_loongarch_iocsrrd_h((unsigned int)_1); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrrd_w(unsigned int _1) { + return (unsigned int)__builtin_loongarch_iocsrrd_w((unsigned int)_1); +} + +#if __loongarch_grlen == 64 +extern __inline unsigned long int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrrd_d(unsigned int _1) { + return (unsigned long int)__builtin_loongarch_iocsrrd_d((unsigned int)_1); +} +#endif + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrwr_b(unsigned char _1, unsigned int _2) { + __builtin_loongarch_iocsrwr_b((unsigned char)_1, (unsigned int)_2); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrwr_h(unsigned short _1, unsigned int _2) { + __builtin_loongarch_iocsrwr_h((unsigned short)_1, (unsigned int)_2); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrwr_w(unsigned int _1, unsigned int _2) { + __builtin_loongarch_iocsrwr_w((unsigned int)_1, (unsigned int)_2); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __cpucfg(unsigned int _1) { + return (unsigned int)__builtin_loongarch_cpucfg((unsigned int)_1); +} + +#if __loongarch_grlen == 64 +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __iocsrwr_d(unsigned long int _1, unsigned int _2) { + __builtin_loongarch_iocsrwr_d((unsigned long int)_1, (unsigned int)_2); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __asrtgt_d(long int _1, long int _2) { + __builtin_loongarch_asrtgt_d((long int)_1, (long int)_2); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __asrtle_d(long int _1, long int _2) { + __builtin_loongarch_asrtle_d((long int)_1, (long int)_2); +} +#endif + +#if __loongarch_grlen == 64 +#define __lddir_d(/*long int*/ _1, /*ui5*/ _2) \ + ((long int)__builtin_loongarch_lddir_d((long int)(_1), (_2))) + +#define __ldpte_d(/*long int*/ _1, /*ui5*/ _2) \ + ((void)__builtin_loongarch_ldpte_d((long int)(_1), (_2))) +#endif + +#define __frecipe_s(/*float*/ _1) \ + (float)__builtin_loongarch_frecipe_s((float)_1) + +#define __frecipe_d(/*double*/ _1) \ + (double)__builtin_loongarch_frecipe_d((double)_1) + +#define __frsqrte_s(/*float*/ _1) \ + (float)__builtin_loongarch_frsqrte_s((float)_1) + +#define __frsqrte_d(/*double*/ _1) \ + (double)__builtin_loongarch_frsqrte_d((double)_1) + +#ifdef __cplusplus +} +#endif +#endif /* _LOONGARCH_BASE_INTRIN_H */ diff --git a/llvm/lib/clang/19/include/lasxintrin.h b/llvm/lib/clang/19/include/lasxintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..dafc2a2f3e6a70bd1aa46b2f7998ee3f223fc55c --- /dev/null +++ b/llvm/lib/clang/19/include/lasxintrin.h @@ -0,0 +1,3884 @@ +/*===------------ lasxintrin.h - LoongArch LASX intrinsics -----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _LOONGSON_ASXINTRIN_H +#define _LOONGSON_ASXINTRIN_H 1 + +#if defined(__loongarch_asx) + +typedef signed char v32i8 __attribute__((vector_size(32), aligned(32))); +typedef signed char v32i8_b __attribute__((vector_size(32), aligned(1))); +typedef unsigned char v32u8 __attribute__((vector_size(32), aligned(32))); +typedef unsigned char v32u8_b __attribute__((vector_size(32), aligned(1))); +typedef short v16i16 __attribute__((vector_size(32), aligned(32))); +typedef short v16i16_h __attribute__((vector_size(32), aligned(2))); +typedef unsigned short v16u16 __attribute__((vector_size(32), aligned(32))); +typedef unsigned short v16u16_h __attribute__((vector_size(32), aligned(2))); +typedef int v8i32 __attribute__((vector_size(32), aligned(32))); +typedef int v8i32_w __attribute__((vector_size(32), aligned(4))); +typedef unsigned int v8u32 __attribute__((vector_size(32), aligned(32))); +typedef unsigned int v8u32_w __attribute__((vector_size(32), aligned(4))); +typedef long long v4i64 __attribute__((vector_size(32), aligned(32))); +typedef long long v4i64_d __attribute__((vector_size(32), aligned(8))); +typedef unsigned long long v4u64 __attribute__((vector_size(32), aligned(32))); +typedef unsigned long long v4u64_d __attribute__((vector_size(32), aligned(8))); +typedef float v8f32 __attribute__((vector_size(32), aligned(32))); +typedef float v8f32_w __attribute__((vector_size(32), aligned(4))); +typedef double v4f64 __attribute__((vector_size(32), aligned(32))); +typedef double v4f64_d __attribute__((vector_size(32), aligned(8))); + +typedef double v4f64 __attribute__((vector_size(32), aligned(32))); +typedef double v4f64_d __attribute__((vector_size(32), aligned(8))); + +typedef float __m256 __attribute__((__vector_size__(32), __may_alias__)); +typedef long long __m256i __attribute__((__vector_size__(32), __may_alias__)); +typedef double __m256d __attribute__((__vector_size__(32), __may_alias__)); + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsll_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsll_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsll_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsll_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsll_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsll_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsll_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsll_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvslli_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvslli_b((v32i8)(_1), (_2))) + +#define __lasx_xvslli_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvslli_h((v16i16)(_1), (_2))) + +#define __lasx_xvslli_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslli_w((v8i32)(_1), (_2))) + +#define __lasx_xvslli_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvslli_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsra_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsra_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsra_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsra_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsra_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsra_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsra_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsra_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvsrai_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsrai_b((v32i8)(_1), (_2))) + +#define __lasx_xvsrai_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsrai_h((v16i16)(_1), (_2))) + +#define __lasx_xvsrai_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsrai_w((v8i32)(_1), (_2))) + +#define __lasx_xvsrai_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvsrai_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrar_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrar_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrar_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrar_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrar_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrar_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrar_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrar_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvsrari_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsrari_b((v32i8)(_1), (_2))) + +#define __lasx_xvsrari_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsrari_h((v16i16)(_1), (_2))) + +#define __lasx_xvsrari_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsrari_w((v8i32)(_1), (_2))) + +#define __lasx_xvsrari_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvsrari_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrl_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrl_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrl_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrl_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrl_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrl_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrl_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrl_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvsrli_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsrli_b((v32i8)(_1), (_2))) + +#define __lasx_xvsrli_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsrli_h((v16i16)(_1), (_2))) + +#define __lasx_xvsrli_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsrli_w((v8i32)(_1), (_2))) + +#define __lasx_xvsrli_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvsrli_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlr_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlr_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlr_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlr_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlr_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlr_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlr_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlr_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvsrlri_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsrlri_b((v32i8)(_1), (_2))) + +#define __lasx_xvsrlri_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsrlri_h((v16i16)(_1), (_2))) + +#define __lasx_xvsrlri_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsrlri_w((v8i32)(_1), (_2))) + +#define __lasx_xvsrlri_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvsrlri_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitclr_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitclr_b((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitclr_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitclr_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitclr_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitclr_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitclr_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitclr_d((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvbitclri_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvbitclri_b((v32u8)(_1), (_2))) + +#define __lasx_xvbitclri_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvbitclri_h((v16u16)(_1), (_2))) + +#define __lasx_xvbitclri_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvbitclri_w((v8u32)(_1), (_2))) + +#define __lasx_xvbitclri_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvbitclri_d((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitset_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitset_b((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitset_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitset_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitset_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitset_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitset_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitset_d((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvbitseti_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvbitseti_b((v32u8)(_1), (_2))) + +#define __lasx_xvbitseti_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvbitseti_h((v16u16)(_1), (_2))) + +#define __lasx_xvbitseti_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvbitseti_w((v8u32)(_1), (_2))) + +#define __lasx_xvbitseti_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvbitseti_d((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitrev_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitrev_b((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitrev_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitrev_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitrev_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitrev_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitrev_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvbitrev_d((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvbitrevi_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvbitrevi_b((v32u8)(_1), (_2))) + +#define __lasx_xvbitrevi_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvbitrevi_h((v16u16)(_1), (_2))) + +#define __lasx_xvbitrevi_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvbitrevi_w((v8u32)(_1), (_2))) + +#define __lasx_xvbitrevi_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvbitrevi_d((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadd_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadd_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadd_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadd_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadd_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadd_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadd_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadd_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvaddi_bu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvaddi_bu((v32i8)(_1), (_2))) + +#define __lasx_xvaddi_hu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvaddi_hu((v16i16)(_1), (_2))) + +#define __lasx_xvaddi_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvaddi_wu((v8i32)(_1), (_2))) + +#define __lasx_xvaddi_du(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvaddi_du((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsub_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsub_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsub_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsub_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsub_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsub_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsub_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsub_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvsubi_bu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsubi_bu((v32i8)(_1), (_2))) + +#define __lasx_xvsubi_hu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsubi_hu((v16i16)(_1), (_2))) + +#define __lasx_xvsubi_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsubi_wu((v8i32)(_1), (_2))) + +#define __lasx_xvsubi_du(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsubi_du((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvmaxi_b(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_b((v32i8)(_1), (_2))) + +#define __lasx_xvmaxi_h(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_h((v16i16)(_1), (_2))) + +#define __lasx_xvmaxi_w(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_w((v8i32)(_1), (_2))) + +#define __lasx_xvmaxi_d(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmax_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmax_du((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvmaxi_bu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_bu((v32u8)(_1), (_2))) + +#define __lasx_xvmaxi_hu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_hu((v16u16)(_1), (_2))) + +#define __lasx_xvmaxi_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_wu((v8u32)(_1), (_2))) + +#define __lasx_xvmaxi_du(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmaxi_du((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvmini_b(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_b((v32i8)(_1), (_2))) + +#define __lasx_xvmini_h(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_h((v16i16)(_1), (_2))) + +#define __lasx_xvmini_w(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_w((v8i32)(_1), (_2))) + +#define __lasx_xvmini_d(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmin_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmin_du((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvmini_bu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_bu((v32u8)(_1), (_2))) + +#define __lasx_xvmini_hu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_hu((v16u16)(_1), (_2))) + +#define __lasx_xvmini_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_wu((v8u32)(_1), (_2))) + +#define __lasx_xvmini_du(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvmini_du((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvseq_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvseq_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvseq_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvseq_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvseq_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvseq_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvseq_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvseq_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvseqi_b(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvseqi_b((v32i8)(_1), (_2))) + +#define __lasx_xvseqi_h(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvseqi_h((v16i16)(_1), (_2))) + +#define __lasx_xvseqi_w(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvseqi_w((v8i32)(_1), (_2))) + +#define __lasx_xvseqi_d(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvseqi_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvslti_b(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_b((v32i8)(_1), (_2))) + +#define __lasx_xvslti_h(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_h((v16i16)(_1), (_2))) + +#define __lasx_xvslti_w(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_w((v8i32)(_1), (_2))) + +#define __lasx_xvslti_d(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvslt_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvslt_du((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvslti_bu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_bu((v32u8)(_1), (_2))) + +#define __lasx_xvslti_hu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_hu((v16u16)(_1), (_2))) + +#define __lasx_xvslti_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_wu((v8u32)(_1), (_2))) + +#define __lasx_xvslti_du(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslti_du((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_d((v4i64)_1, (v4i64)_2); +} + +#define __lasx_xvslei_b(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_b((v32i8)(_1), (_2))) + +#define __lasx_xvslei_h(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_h((v16i16)(_1), (_2))) + +#define __lasx_xvslei_w(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_w((v8i32)(_1), (_2))) + +#define __lasx_xvslei_d(/*__m256i*/ _1, /*si5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsle_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsle_du((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvslei_bu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_bu((v32u8)(_1), (_2))) + +#define __lasx_xvslei_hu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_hu((v16u16)(_1), (_2))) + +#define __lasx_xvslei_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_wu((v8u32)(_1), (_2))) + +#define __lasx_xvslei_du(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvslei_du((v4u64)(_1), (_2))) + +#define __lasx_xvsat_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_b((v32i8)(_1), (_2))) + +#define __lasx_xvsat_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_h((v16i16)(_1), (_2))) + +#define __lasx_xvsat_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_w((v8i32)(_1), (_2))) + +#define __lasx_xvsat_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_d((v4i64)(_1), (_2))) + +#define __lasx_xvsat_bu(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_bu((v32u8)(_1), (_2))) + +#define __lasx_xvsat_hu(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_hu((v16u16)(_1), (_2))) + +#define __lasx_xvsat_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_wu((v8u32)(_1), (_2))) + +#define __lasx_xvsat_du(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvsat_du((v4u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadda_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadda_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadda_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadda_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadda_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadda_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadda_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadda_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsadd_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsadd_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavg_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavg_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvavgr_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvavgr_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssub_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssub_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvabsd_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvabsd_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmul_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmul_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmul_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmul_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmul_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmul_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmul_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmul_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmadd_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmadd_b((v32i8)_1, (v32i8)_2, (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmadd_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmadd_h((v16i16)_1, (v16i16)_2, (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmadd_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmadd_w((v8i32)_1, (v8i32)_2, (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmadd_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmadd_d((v4i64)_1, (v4i64)_2, (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmsub_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmsub_b((v32i8)_1, (v32i8)_2, (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmsub_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmsub_h((v16i16)_1, (v16i16)_2, (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmsub_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmsub_w((v8i32)_1, (v8i32)_2, (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmsub_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmsub_d((v4i64)_1, (v4i64)_2, (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvdiv_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvdiv_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_hu_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_hu_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_wu_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_wu_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_du_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_du_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_hu_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_hu_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_wu_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_wu_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_du_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_du_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmod_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmod_du((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvrepl128vei_b(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvrepl128vei_b((v32i8)(_1), (_2))) + +#define __lasx_xvrepl128vei_h(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvrepl128vei_h((v16i16)(_1), (_2))) + +#define __lasx_xvrepl128vei_w(/*__m256i*/ _1, /*ui2*/ _2) \ + ((__m256i)__builtin_lasx_xvrepl128vei_w((v8i32)(_1), (_2))) + +#define __lasx_xvrepl128vei_d(/*__m256i*/ _1, /*ui1*/ _2) \ + ((__m256i)__builtin_lasx_xvrepl128vei_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickev_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickev_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickev_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickev_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickev_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickev_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickev_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickev_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickod_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickod_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickod_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickod_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickod_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickod_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpickod_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpickod_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvh_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvh_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvh_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvh_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvh_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvh_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvh_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvh_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvl_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvl_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvl_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvl_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvl_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvl_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvilvl_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvilvl_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackev_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackev_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackev_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackev_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackev_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackev_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackev_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackev_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackod_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackod_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackod_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackod_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackod_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackod_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpackod_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvpackod_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvshuf_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvshuf_b((v32i8)_1, (v32i8)_2, (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvshuf_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvshuf_h((v16i16)_1, (v16i16)_2, (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvshuf_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvshuf_w((v8i32)_1, (v8i32)_2, (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvshuf_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvshuf_d((v4i64)_1, (v4i64)_2, (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvand_v(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvand_v((v32u8)_1, (v32u8)_2); +} + +#define __lasx_xvandi_b(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvandi_b((v32u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvor_v(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvor_v((v32u8)_1, (v32u8)_2); +} + +#define __lasx_xvori_b(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvori_b((v32u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvnor_v(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvnor_v((v32u8)_1, (v32u8)_2); +} + +#define __lasx_xvnori_b(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvnori_b((v32u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvxor_v(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvxor_v((v32u8)_1, (v32u8)_2); +} + +#define __lasx_xvxori_b(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvxori_b((v32u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvbitsel_v(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvbitsel_v((v32u8)_1, (v32u8)_2, (v32u8)_3); +} + +#define __lasx_xvbitseli_b(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvbitseli_b((v32u8)(_1), (v32u8)(_2), (_3))) + +#define __lasx_xvshuf4i_b(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvshuf4i_b((v32i8)(_1), (_2))) + +#define __lasx_xvshuf4i_h(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvshuf4i_h((v16i16)(_1), (_2))) + +#define __lasx_xvshuf4i_w(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvshuf4i_w((v8i32)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplgr2vr_b(int _1) { + return (__m256i)__builtin_lasx_xvreplgr2vr_b((int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplgr2vr_h(int _1) { + return (__m256i)__builtin_lasx_xvreplgr2vr_h((int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplgr2vr_w(int _1) { + return (__m256i)__builtin_lasx_xvreplgr2vr_w((int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplgr2vr_d(long int _1) { + return (__m256i)__builtin_lasx_xvreplgr2vr_d((long int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpcnt_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvpcnt_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpcnt_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvpcnt_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpcnt_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvpcnt_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvpcnt_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvpcnt_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclo_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvclo_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclo_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvclo_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclo_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvclo_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclo_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvclo_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclz_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvclz_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclz_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvclz_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclz_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvclz_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvclz_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvclz_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfadd_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfadd_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfadd_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfadd_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfsub_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfsub_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfsub_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfsub_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmul_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfmul_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmul_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfmul_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfdiv_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfdiv_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfdiv_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfdiv_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcvt_h_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcvt_h_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfcvt_s_d(__m256d _1, __m256d _2) { + return (__m256)__builtin_lasx_xvfcvt_s_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmin_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfmin_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmin_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfmin_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmina_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfmina_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmina_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfmina_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmax_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfmax_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmax_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfmax_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmaxa_s(__m256 _1, __m256 _2) { + return (__m256)__builtin_lasx_xvfmaxa_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmaxa_d(__m256d _1, __m256d _2) { + return (__m256d)__builtin_lasx_xvfmaxa_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfclass_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvfclass_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfclass_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvfclass_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfsqrt_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfsqrt_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfsqrt_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfsqrt_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrecip_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrecip_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrecip_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrecip_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrecipe_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrecipe_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrecipe_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrecipe_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrint_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrint_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrint_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrint_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrsqrt_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrsqrt_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrsqrt_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrsqrt_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrsqrte_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrsqrte_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrsqrte_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrsqrte_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvflogb_s(__m256 _1) { + return (__m256)__builtin_lasx_xvflogb_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvflogb_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvflogb_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfcvth_s_h(__m256i _1) { + return (__m256)__builtin_lasx_xvfcvth_s_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfcvth_d_s(__m256 _1) { + return (__m256d)__builtin_lasx_xvfcvth_d_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfcvtl_s_h(__m256i _1) { + return (__m256)__builtin_lasx_xvfcvtl_s_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfcvtl_d_s(__m256 _1) { + return (__m256d)__builtin_lasx_xvfcvtl_d_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftint_w_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftint_w_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftint_l_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftint_l_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftint_wu_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftint_wu_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftint_lu_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftint_lu_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrz_w_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrz_w_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrz_l_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftintrz_l_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrz_wu_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrz_wu_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrz_lu_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftintrz_lu_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvffint_s_w(__m256i _1) { + return (__m256)__builtin_lasx_xvffint_s_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvffint_d_l(__m256i _1) { + return (__m256d)__builtin_lasx_xvffint_d_l((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvffint_s_wu(__m256i _1) { + return (__m256)__builtin_lasx_xvffint_s_wu((v8u32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvffint_d_lu(__m256i _1) { + return (__m256d)__builtin_lasx_xvffint_d_lu((v4u64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve_b(__m256i _1, int _2) { + return (__m256i)__builtin_lasx_xvreplve_b((v32i8)_1, (int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve_h(__m256i _1, int _2) { + return (__m256i)__builtin_lasx_xvreplve_h((v16i16)_1, (int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve_w(__m256i _1, int _2) { + return (__m256i)__builtin_lasx_xvreplve_w((v8i32)_1, (int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve_d(__m256i _1, int _2) { + return (__m256i)__builtin_lasx_xvreplve_d((v4i64)_1, (int)_2); +} + +#define __lasx_xvpermi_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvpermi_w((v8i32)(_1), (v8i32)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvandn_v(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvandn_v((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvneg_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvneg_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvneg_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvneg_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvneg_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvneg_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvneg_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvneg_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmuh_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmuh_du((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvsllwil_h_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsllwil_h_b((v32i8)(_1), (_2))) + +#define __lasx_xvsllwil_w_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsllwil_w_h((v16i16)(_1), (_2))) + +#define __lasx_xvsllwil_d_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsllwil_d_w((v8i32)(_1), (_2))) + +#define __lasx_xvsllwil_hu_bu(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvsllwil_hu_bu((v32u8)(_1), (_2))) + +#define __lasx_xvsllwil_wu_hu(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvsllwil_wu_hu((v16u16)(_1), (_2))) + +#define __lasx_xvsllwil_du_wu(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvsllwil_du_wu((v8u32)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsran_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsran_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsran_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsran_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsran_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsran_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssran_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssran_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssran_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssran_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssran_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssran_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssran_bu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssran_bu_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssran_hu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssran_hu_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssran_wu_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssran_wu_d((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrarn_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrarn_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrarn_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrarn_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrarn_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrarn_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrarn_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrarn_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrarn_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrarn_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrarn_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrarn_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrarn_bu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrarn_bu_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrarn_hu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrarn_hu_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrarn_wu_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrarn_wu_d((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrln_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrln_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrln_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrln_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrln_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrln_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrln_bu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrln_bu_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrln_hu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrln_hu_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrln_wu_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrln_wu_d((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlrn_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlrn_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlrn_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlrn_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsrlrn_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsrlrn_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrlrn_bu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrlrn_bu_h((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrlrn_hu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrlrn_hu_w((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrlrn_wu_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrlrn_wu_d((v4u64)_1, (v4u64)_2); +} + +#define __lasx_xvfrstpi_b(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvfrstpi_b((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvfrstpi_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvfrstpi_h((v16i16)(_1), (v16i16)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfrstp_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvfrstp_b((v32i8)_1, (v32i8)_2, (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfrstp_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvfrstp_h((v16i16)_1, (v16i16)_2, (v16i16)_3); +} + +#define __lasx_xvshuf4i_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvshuf4i_d((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvbsrl_v(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvbsrl_v((v32i8)(_1), (_2))) + +#define __lasx_xvbsll_v(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvbsll_v((v32i8)(_1), (_2))) + +#define __lasx_xvextrins_b(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvextrins_b((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvextrins_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvextrins_h((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvextrins_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvextrins_w((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvextrins_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvextrins_d((v4i64)(_1), (v4i64)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmskltz_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvmskltz_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmskltz_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvmskltz_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmskltz_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvmskltz_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmskltz_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvmskltz_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsigncov_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsigncov_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsigncov_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsigncov_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsigncov_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsigncov_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsigncov_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsigncov_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmadd_s(__m256 _1, __m256 _2, __m256 _3) { + return (__m256)__builtin_lasx_xvfmadd_s((v8f32)_1, (v8f32)_2, (v8f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmadd_d(__m256d _1, __m256d _2, __m256d _3) { + return (__m256d)__builtin_lasx_xvfmadd_d((v4f64)_1, (v4f64)_2, (v4f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfmsub_s(__m256 _1, __m256 _2, __m256 _3) { + return (__m256)__builtin_lasx_xvfmsub_s((v8f32)_1, (v8f32)_2, (v8f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfmsub_d(__m256d _1, __m256d _2, __m256d _3) { + return (__m256d)__builtin_lasx_xvfmsub_d((v4f64)_1, (v4f64)_2, (v4f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfnmadd_s(__m256 _1, __m256 _2, __m256 _3) { + return (__m256)__builtin_lasx_xvfnmadd_s((v8f32)_1, (v8f32)_2, (v8f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfnmadd_d(__m256d _1, __m256d _2, __m256d _3) { + return (__m256d)__builtin_lasx_xvfnmadd_d((v4f64)_1, (v4f64)_2, (v4f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfnmsub_s(__m256 _1, __m256 _2, __m256 _3) { + return (__m256)__builtin_lasx_xvfnmsub_s((v8f32)_1, (v8f32)_2, (v8f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfnmsub_d(__m256d _1, __m256d _2, __m256d _3) { + return (__m256d)__builtin_lasx_xvfnmsub_d((v4f64)_1, (v4f64)_2, (v4f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrne_w_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrne_w_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrne_l_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftintrne_l_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrp_w_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrp_w_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrp_l_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftintrp_l_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrm_w_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrm_w_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrm_l_d(__m256d _1) { + return (__m256i)__builtin_lasx_xvftintrm_l_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftint_w_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvftint_w_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvffint_s_l(__m256i _1, __m256i _2) { + return (__m256)__builtin_lasx_xvffint_s_l((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrz_w_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvftintrz_w_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrp_w_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvftintrp_w_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrm_w_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvftintrm_w_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrne_w_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvftintrne_w_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftinth_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftinth_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintl_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintl_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvffinth_d_w(__m256i _1) { + return (__m256d)__builtin_lasx_xvffinth_d_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvffintl_d_w(__m256i _1) { + return (__m256d)__builtin_lasx_xvffintl_d_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrzh_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrzh_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrzl_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrzl_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrph_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrph_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrpl_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrpl_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrmh_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrmh_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrml_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrml_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrneh_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrneh_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvftintrnel_l_s(__m256 _1) { + return (__m256i)__builtin_lasx_xvftintrnel_l_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrintrne_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrintrne_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrintrne_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrintrne_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrintrz_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrintrz_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrintrz_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrintrz_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrintrp_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrintrp_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrintrp_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrintrp_d((v4f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 + __lasx_xvfrintrm_s(__m256 _1) { + return (__m256)__builtin_lasx_xvfrintrm_s((v8f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d + __lasx_xvfrintrm_d(__m256d _1) { + return (__m256d)__builtin_lasx_xvfrintrm_d((v4f64)_1); +} + +#define __lasx_xvld(/*void **/ _1, /*si12*/ _2) \ + ((__m256i)__builtin_lasx_xvld((void const *)(_1), (_2))) + +#define __lasx_xvst(/*__m256i*/ _1, /*void **/ _2, /*si12*/ _3) \ + ((void)__builtin_lasx_xvst((v32i8)(_1), (void *)(_2), (_3))) + +#define __lasx_xvstelm_b(/*__m256i*/ _1, /*void **/ _2, /*si8*/ _3, \ + /*idx*/ _4) \ + ((void)__builtin_lasx_xvstelm_b((v32i8)(_1), (void *)(_2), (_3), (_4))) + +#define __lasx_xvstelm_h(/*__m256i*/ _1, /*void **/ _2, /*si8*/ _3, \ + /*idx*/ _4) \ + ((void)__builtin_lasx_xvstelm_h((v16i16)(_1), (void *)(_2), (_3), (_4))) + +#define __lasx_xvstelm_w(/*__m256i*/ _1, /*void **/ _2, /*si8*/ _3, \ + /*idx*/ _4) \ + ((void)__builtin_lasx_xvstelm_w((v8i32)(_1), (void *)(_2), (_3), (_4))) + +#define __lasx_xvstelm_d(/*__m256i*/ _1, /*void **/ _2, /*si8*/ _3, \ + /*idx*/ _4) \ + ((void)__builtin_lasx_xvstelm_d((v4i64)(_1), (void *)(_2), (_3), (_4))) + +#define __lasx_xvinsve0_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui3*/ _3) \ + ((__m256i)__builtin_lasx_xvinsve0_w((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvinsve0_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui2*/ _3) \ + ((__m256i)__builtin_lasx_xvinsve0_d((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvpickve_w(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvpickve_w((v8i32)(_1), (_2))) + +#define __lasx_xvpickve_d(/*__m256i*/ _1, /*ui2*/ _2) \ + ((__m256i)__builtin_lasx_xvpickve_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrlrn_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrlrn_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrlrn_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrlrn_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrlrn_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrlrn_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrln_b_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrln_b_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrln_h_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrln_h_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvssrln_w_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvssrln_w_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvorn_v(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvorn_v((v32i8)_1, (v32i8)_2); +} + +#define __lasx_xvldi(/*i13*/ _1) ((__m256i)__builtin_lasx_xvldi((_1))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvldx(void const *_1, long int _2) { + return (__m256i)__builtin_lasx_xvldx((void const *)_1, (long int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) void + __lasx_xvstx(__m256i _1, void *_2, long int _3) { + return (void)__builtin_lasx_xvstx((v32i8)_1, (void *)_2, (long int)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvextl_qu_du(__m256i _1) { + return (__m256i)__builtin_lasx_xvextl_qu_du((v4u64)_1); +} + +#define __lasx_xvinsgr2vr_w(/*__m256i*/ _1, /*int*/ _2, /*ui3*/ _3) \ + ((__m256i)__builtin_lasx_xvinsgr2vr_w((v8i32)(_1), (int)(_2), (_3))) + +#define __lasx_xvinsgr2vr_d(/*__m256i*/ _1, /*long int*/ _2, /*ui2*/ _3) \ + ((__m256i)__builtin_lasx_xvinsgr2vr_d((v4i64)(_1), (long int)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve0_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvreplve0_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve0_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvreplve0_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve0_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvreplve0_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve0_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvreplve0_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvreplve0_q(__m256i _1) { + return (__m256i)__builtin_lasx_xvreplve0_q((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_h_b(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_h_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_w_h(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_w_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_d_w(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_d_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_w_b(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_w_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_d_h(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_d_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_d_b(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_d_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_hu_bu(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_hu_bu((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_wu_hu(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_wu_hu((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_du_wu(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_du_wu((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_wu_bu(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_wu_bu((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_du_hu(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_du_hu((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_vext2xv_du_bu(__m256i _1) { + return (__m256i)__builtin_lasx_vext2xv_du_bu((v32i8)_1); +} + +#define __lasx_xvpermi_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui8*/ _3) \ + ((__m256i)__builtin_lasx_xvpermi_q((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvpermi_d(/*__m256i*/ _1, /*ui8*/ _2) \ + ((__m256i)__builtin_lasx_xvpermi_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvperm_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvperm_w((v8i32)_1, (v8i32)_2); +} + +#define __lasx_xvldrepl_b(/*void **/ _1, /*si12*/ _2) \ + ((__m256i)__builtin_lasx_xvldrepl_b((void const *)(_1), (_2))) + +#define __lasx_xvldrepl_h(/*void **/ _1, /*si11*/ _2) \ + ((__m256i)__builtin_lasx_xvldrepl_h((void const *)(_1), (_2))) + +#define __lasx_xvldrepl_w(/*void **/ _1, /*si10*/ _2) \ + ((__m256i)__builtin_lasx_xvldrepl_w((void const *)(_1), (_2))) + +#define __lasx_xvldrepl_d(/*void **/ _1, /*si9*/ _2) \ + ((__m256i)__builtin_lasx_xvldrepl_d((void const *)(_1), (_2))) + +#define __lasx_xvpickve2gr_w(/*__m256i*/ _1, /*ui3*/ _2) \ + ((int)__builtin_lasx_xvpickve2gr_w((v8i32)(_1), (_2))) + +#define __lasx_xvpickve2gr_wu(/*__m256i*/ _1, /*ui3*/ _2) \ + ((unsigned int)__builtin_lasx_xvpickve2gr_wu((v8i32)(_1), (_2))) + +#define __lasx_xvpickve2gr_d(/*__m256i*/ _1, /*ui2*/ _2) \ + ((long int)__builtin_lasx_xvpickve2gr_d((v4i64)(_1), (_2))) + +#define __lasx_xvpickve2gr_du(/*__m256i*/ _1, /*ui2*/ _2) \ + ((unsigned long int)__builtin_lasx_xvpickve2gr_du((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_q_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_q_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_d_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_d_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_w_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_w_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_h_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_h_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_q_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_q_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_d_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_d_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_w_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_w_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwev_h_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwev_h_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_q_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_q_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_d_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_d_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_w_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_w_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_h_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_h_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_q_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_q_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_d_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_d_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_w_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_w_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_h_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_h_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_q_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_q_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_d_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_d_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_w_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_w_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsubwod_h_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsubwod_h_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_d_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_d_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_w_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_w_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_h_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_h_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_q_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_q_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_d_wu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_d_wu((v8u32)_1, (v8u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_w_hu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_w_hu((v16u16)_1, (v16u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_h_bu(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_h_bu((v32u8)_1, (v32u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_d_wu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_d_wu_w((v8u32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_w_hu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_w_hu_h((v16u16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_h_bu_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_h_bu_b((v32u8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_d_wu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_d_wu_w((v8u32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_w_hu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_w_hu_h((v16u16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_h_bu_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_h_bu_b((v32u8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_d_wu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_d_wu_w((v8u32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_w_hu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_w_hu_h((v16u16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_h_bu_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_h_bu_b((v32u8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_d_wu_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_d_wu_w((v8u32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_w_hu_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_w_hu_h((v16u16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_h_bu_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_h_bu_b((v32u8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhaddw_qu_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhaddw_qu_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_q_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_q_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvhsubw_qu_du(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvhsubw_qu_du((v4u64)_1, (v4u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_q_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_q_d((v4i64)_1, (v4i64)_2, (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_d_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_d_w((v4i64)_1, (v8i32)_2, (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_w_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_w_h((v8i32)_1, (v16i16)_2, + (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_h_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_h_b((v16i16)_1, (v32i8)_2, + (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_q_du(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_q_du((v4u64)_1, (v4u64)_2, + (v4u64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_d_wu(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_d_wu((v4u64)_1, (v8u32)_2, + (v8u32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_w_hu(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_w_hu((v8u32)_1, (v16u16)_2, + (v16u16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_h_bu(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_h_bu((v16u16)_1, (v32u8)_2, + (v32u8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_q_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_q_d((v4i64)_1, (v4i64)_2, (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_d_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_d_w((v4i64)_1, (v8i32)_2, (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_w_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_w_h((v8i32)_1, (v16i16)_2, + (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_h_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_h_b((v16i16)_1, (v32i8)_2, + (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_q_du(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_q_du((v4u64)_1, (v4u64)_2, + (v4u64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_d_wu(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_d_wu((v4u64)_1, (v8u32)_2, + (v8u32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_w_hu(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_w_hu((v8u32)_1, (v16u16)_2, + (v16u16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_h_bu(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_h_bu((v16u16)_1, (v32u8)_2, + (v32u8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_q_du_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_q_du_d((v4i64)_1, (v4u64)_2, + (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_d_wu_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_d_wu_w((v4i64)_1, (v8u32)_2, + (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_w_hu_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_w_hu_h((v8i32)_1, (v16u16)_2, + (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwev_h_bu_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwev_h_bu_b((v16i16)_1, (v32u8)_2, + (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_q_du_d(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_q_du_d((v4i64)_1, (v4u64)_2, + (v4i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_d_wu_w(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_d_wu_w((v4i64)_1, (v8u32)_2, + (v8i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_w_hu_h(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_w_hu_h((v8i32)_1, (v16u16)_2, + (v16i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmaddwod_h_bu_b(__m256i _1, __m256i _2, __m256i _3) { + return (__m256i)__builtin_lasx_xvmaddwod_h_bu_b((v16i16)_1, (v32u8)_2, + (v32i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvrotr_b(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvrotr_b((v32i8)_1, (v32i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvrotr_h(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvrotr_h((v16i16)_1, (v16i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvrotr_w(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvrotr_w((v8i32)_1, (v8i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvrotr_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvrotr_d((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvadd_q(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvadd_q((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvsub_q(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvsub_q((v4i64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwev_q_du_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwev_q_du_d((v4u64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvaddwod_q_du_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvaddwod_q_du_d((v4u64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwev_q_du_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwev_q_du_d((v4u64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmulwod_q_du_d(__m256i _1, __m256i _2) { + return (__m256i)__builtin_lasx_xvmulwod_q_du_d((v4u64)_1, (v4i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmskgez_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvmskgez_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvmsknz_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvmsknz_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_h_b(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_h_b((v32i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_w_h(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_w_h((v16i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_d_w(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_d_w((v8i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_q_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_q_d((v4i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_hu_bu(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_hu_bu((v32u8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_wu_hu(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_wu_hu((v16u16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_du_wu(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_du_wu((v8u32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvexth_qu_du(__m256i _1) { + return (__m256i)__builtin_lasx_xvexth_qu_du((v4u64)_1); +} + +#define __lasx_xvrotri_b(/*__m256i*/ _1, /*ui3*/ _2) \ + ((__m256i)__builtin_lasx_xvrotri_b((v32i8)(_1), (_2))) + +#define __lasx_xvrotri_h(/*__m256i*/ _1, /*ui4*/ _2) \ + ((__m256i)__builtin_lasx_xvrotri_h((v16i16)(_1), (_2))) + +#define __lasx_xvrotri_w(/*__m256i*/ _1, /*ui5*/ _2) \ + ((__m256i)__builtin_lasx_xvrotri_w((v8i32)(_1), (_2))) + +#define __lasx_xvrotri_d(/*__m256i*/ _1, /*ui6*/ _2) \ + ((__m256i)__builtin_lasx_xvrotri_d((v4i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvextl_q_d(__m256i _1) { + return (__m256i)__builtin_lasx_xvextl_q_d((v4i64)_1); +} + +#define __lasx_xvsrlni_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlni_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvsrlni_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlni_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvsrlni_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlni_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvsrlni_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlni_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvsrlrni_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlrni_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvsrlrni_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlrni_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvsrlrni_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlrni_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvsrlrni_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvsrlrni_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrlni_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrlni_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrlni_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrlni_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrlni_bu_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_bu_h((v32u8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrlni_hu_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_hu_w((v16u16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrlni_wu_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_wu_d((v8u32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrlni_du_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlni_du_q((v4u64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrlrni_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrlrni_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrlrni_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrlrni_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrlrni_bu_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_bu_h((v32u8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrlrni_hu_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_hu_w((v16u16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrlrni_wu_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_wu_d((v8u32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrlrni_du_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrlrni_du_q((v4u64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvsrani_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvsrani_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvsrani_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvsrani_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvsrani_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvsrani_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvsrani_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvsrani_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvsrarni_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvsrarni_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvsrarni_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvsrarni_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvsrarni_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvsrarni_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvsrarni_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvsrarni_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrani_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrani_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrani_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrani_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrani_bu_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_bu_h((v32u8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrani_hu_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_hu_w((v16u16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrani_wu_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_wu_d((v8u32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrani_du_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrani_du_q((v4u64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrarni_b_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_b_h((v32i8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrarni_h_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_h_w((v16i16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrarni_w_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_w_d((v8i32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrarni_d_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_d_q((v4i64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xvssrarni_bu_h(/*__m256i*/ _1, /*__m256i*/ _2, /*ui4*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_bu_h((v32u8)(_1), (v32i8)(_2), (_3))) + +#define __lasx_xvssrarni_hu_w(/*__m256i*/ _1, /*__m256i*/ _2, /*ui5*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_hu_w((v16u16)(_1), (v16i16)(_2), (_3))) + +#define __lasx_xvssrarni_wu_d(/*__m256i*/ _1, /*__m256i*/ _2, /*ui6*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_wu_d((v8u32)(_1), (v8i32)(_2), (_3))) + +#define __lasx_xvssrarni_du_q(/*__m256i*/ _1, /*__m256i*/ _2, /*ui7*/ _3) \ + ((__m256i)__builtin_lasx_xvssrarni_du_q((v4u64)(_1), (v4i64)(_2), (_3))) + +#define __lasx_xbnz_b(/*__m256i*/ _1) ((int)__builtin_lasx_xbnz_b((v32u8)(_1))) + +#define __lasx_xbnz_d(/*__m256i*/ _1) ((int)__builtin_lasx_xbnz_d((v4u64)(_1))) + +#define __lasx_xbnz_h(/*__m256i*/ _1) ((int)__builtin_lasx_xbnz_h((v16u16)(_1))) + +#define __lasx_xbnz_v(/*__m256i*/ _1) ((int)__builtin_lasx_xbnz_v((v32u8)(_1))) + +#define __lasx_xbnz_w(/*__m256i*/ _1) ((int)__builtin_lasx_xbnz_w((v8u32)(_1))) + +#define __lasx_xbz_b(/*__m256i*/ _1) ((int)__builtin_lasx_xbz_b((v32u8)(_1))) + +#define __lasx_xbz_d(/*__m256i*/ _1) ((int)__builtin_lasx_xbz_d((v4u64)(_1))) + +#define __lasx_xbz_h(/*__m256i*/ _1) ((int)__builtin_lasx_xbz_h((v16u16)(_1))) + +#define __lasx_xbz_v(/*__m256i*/ _1) ((int)__builtin_lasx_xbz_v((v32u8)(_1))) + +#define __lasx_xbz_w(/*__m256i*/ _1) ((int)__builtin_lasx_xbz_w((v8u32)(_1))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_caf_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_caf_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_caf_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_caf_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_ceq_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_ceq_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_ceq_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_ceq_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cle_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cle_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cle_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cle_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_clt_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_clt_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_clt_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_clt_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cne_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cne_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cne_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cne_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cor_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cor_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cor_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cor_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cueq_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cueq_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cueq_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cueq_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cule_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cule_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cule_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cule_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cult_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cult_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cult_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cult_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cun_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cun_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cune_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_cune_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cune_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cune_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_cun_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_cun_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_saf_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_saf_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_saf_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_saf_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_seq_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_seq_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_seq_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_seq_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sle_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sle_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sle_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sle_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_slt_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_slt_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_slt_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_slt_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sne_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sne_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sne_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sne_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sor_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sor_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sor_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sor_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sueq_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sueq_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sueq_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sueq_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sule_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sule_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sule_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sule_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sult_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sult_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sult_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sult_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sun_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sun_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sune_d(__m256d _1, __m256d _2) { + return (__m256i)__builtin_lasx_xvfcmp_sune_d((v4f64)_1, (v4f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sune_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sune_s((v8f32)_1, (v8f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i + __lasx_xvfcmp_sun_s(__m256 _1, __m256 _2) { + return (__m256i)__builtin_lasx_xvfcmp_sun_s((v8f32)_1, (v8f32)_2); +} + +#define __lasx_xvpickve_d_f(/*__m256d*/ _1, /*ui2*/ _2) \ + ((__m256d)__builtin_lasx_xvpickve_d_f((v4f64)(_1), (_2))) + +#define __lasx_xvpickve_w_f(/*__m256*/ _1, /*ui3*/ _2) \ + ((__m256)__builtin_lasx_xvpickve_w_f((v8f32)(_1), (_2))) + +#define __lasx_xvrepli_b(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_b((_1))) + +#define __lasx_xvrepli_d(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_d((_1))) + +#define __lasx_xvrepli_h(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_h((_1))) + +#define __lasx_xvrepli_w(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_w((_1))) + +#endif /* defined(__loongarch_asx). */ +#endif /* _LOONGSON_ASXINTRIN_H. */ diff --git a/llvm/lib/clang/19/include/limits.h b/llvm/lib/clang/19/include/limits.h new file mode 100644 index 0000000000000000000000000000000000000000..56dffe568486cc597243d11184321fcbb86230f1 --- /dev/null +++ b/llvm/lib/clang/19/include/limits.h @@ -0,0 +1,130 @@ +/*===---- limits.h - Standard header for integer sizes --------------------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +#ifndef __CLANG_LIMITS_H +#define __CLANG_LIMITS_H + +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +/* The system's limits.h may, in turn, try to #include_next GCC's limits.h. + Avert this #include_next madness. */ +#if defined __GNUC__ && !defined _GCC_LIMITS_H_ +#define _GCC_LIMITS_H_ +#endif + +/* System headers include a number of constants from POSIX in . + Include it if we're hosted. */ +#if __STDC_HOSTED__ && __has_include_next() +#include_next +#endif + +/* Many system headers try to "help us out" by defining these. No really, we + know how big each datatype is. */ +#undef SCHAR_MIN +#undef SCHAR_MAX +#undef UCHAR_MAX +#undef SHRT_MIN +#undef SHRT_MAX +#undef USHRT_MAX +#undef INT_MIN +#undef INT_MAX +#undef UINT_MAX +#undef LONG_MIN +#undef LONG_MAX +#undef ULONG_MAX + +#undef CHAR_BIT +#undef CHAR_MIN +#undef CHAR_MAX + +/* C90/99 5.2.4.2.1 */ +#define SCHAR_MAX __SCHAR_MAX__ +#define SHRT_MAX __SHRT_MAX__ +#define INT_MAX __INT_MAX__ +#define LONG_MAX __LONG_MAX__ + +#define SCHAR_MIN (-__SCHAR_MAX__-1) +#define SHRT_MIN (-__SHRT_MAX__ -1) +#define INT_MIN (-__INT_MAX__ -1) +#define LONG_MIN (-__LONG_MAX__ -1L) + +#define UCHAR_MAX (__SCHAR_MAX__*2 +1) +#if __SHRT_WIDTH__ < __INT_WIDTH__ +#define USHRT_MAX (__SHRT_MAX__ * 2 + 1) +#else +#define USHRT_MAX (__SHRT_MAX__ * 2U + 1U) +#endif +#define UINT_MAX (__INT_MAX__ *2U +1U) +#define ULONG_MAX (__LONG_MAX__ *2UL+1UL) + +#ifndef MB_LEN_MAX +#define MB_LEN_MAX 1 +#endif + +#define CHAR_BIT __CHAR_BIT__ + +/* C23 5.2.4.2.1 */ +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +#define BOOL_WIDTH __BOOL_WIDTH__ +#define CHAR_WIDTH CHAR_BIT +#define SCHAR_WIDTH CHAR_BIT +#define UCHAR_WIDTH CHAR_BIT +#define USHRT_WIDTH __SHRT_WIDTH__ +#define SHRT_WIDTH __SHRT_WIDTH__ +#define UINT_WIDTH __INT_WIDTH__ +#define INT_WIDTH __INT_WIDTH__ +#define ULONG_WIDTH __LONG_WIDTH__ +#define LONG_WIDTH __LONG_WIDTH__ +#define ULLONG_WIDTH __LLONG_WIDTH__ +#define LLONG_WIDTH __LLONG_WIDTH__ + +#define BITINT_MAXWIDTH __BITINT_MAXWIDTH__ +#endif + +#ifdef __CHAR_UNSIGNED__ /* -funsigned-char */ +#define CHAR_MIN 0 +#define CHAR_MAX UCHAR_MAX +#else +#define CHAR_MIN SCHAR_MIN +#define CHAR_MAX __SCHAR_MAX__ +#endif + +/* C99 5.2.4.2.1: Added long long. + C++11 18.3.3.2: same contents as the Standard C Library header . + */ +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ + (defined(__cplusplus) && __cplusplus >= 201103L) + +#undef LLONG_MIN +#undef LLONG_MAX +#undef ULLONG_MAX + +#define LLONG_MAX __LONG_LONG_MAX__ +#define LLONG_MIN (-__LONG_LONG_MAX__-1LL) +#define ULLONG_MAX (__LONG_LONG_MAX__*2ULL+1ULL) +#endif + +/* LONG_LONG_MIN/LONG_LONG_MAX/ULONG_LONG_MAX are a GNU extension. It's too bad + that we don't have something like #pragma poison that could be used to + deprecate a macro - the code should just use LLONG_MAX and friends. + */ +#if defined(__GNU_LIBRARY__) ? defined(__USE_GNU) : !defined(__STRICT_ANSI__) + +#undef LONG_LONG_MIN +#undef LONG_LONG_MAX +#undef ULONG_LONG_MAX + +#define LONG_LONG_MAX __LONG_LONG_MAX__ +#define LONG_LONG_MIN (-__LONG_LONG_MAX__-1LL) +#define ULONG_LONG_MAX (__LONG_LONG_MAX__*2ULL+1ULL) +#endif + +#endif /* __MVS__ */ +#endif /* __CLANG_LIMITS_H */ diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/assert.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/assert.h new file mode 100644 index 0000000000000000000000000000000000000000..610ed96a458c6a09fd3d48b5eb00637865d9c290 --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/assert.h @@ -0,0 +1,34 @@ +//===-- Wrapper for C standard assert.h declarations on the GPU -*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_ASSERT_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_ASSERT_H__ + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +#include_next + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +#pragma omp begin declare target + +#include + +#pragma omp end declare target + +#undef __LIBC_ATTRS + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_ASSERT_H__ diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/ctype.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/ctype.h new file mode 100644 index 0000000000000000000000000000000000000000..49c2af93471b0e78d0d42296b79bd84a2b406379 --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/ctype.h @@ -0,0 +1,102 @@ +//===-- Wrapper for C standard ctype.h declarations on the GPU ------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_CTYPE_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_CTYPE_H__ + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +// The GNU headers like to define 'toupper' and 'tolower' redundantly. This is +// necessary to prevent it from doing that and remapping our implementation. +#if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(__GLIBC__) +#pragma push_macro("__USE_EXTERN_INLINES") +#undef __USE_EXTERN_INLINES +#endif + +#include_next + +#if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(__GLIBC__) +#pragma pop_macro("__USE_EXTERN_INLINES") +#endif + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +// The GNU headers like to provide these as macros, we need to undefine them so +// they do not conflict with the following definitions for the GPU. + +#pragma push_macro("isalnum") +#pragma push_macro("isalpha") +#pragma push_macro("isascii") +#pragma push_macro("isblank") +#pragma push_macro("iscntrl") +#pragma push_macro("isdigit") +#pragma push_macro("isgraph") +#pragma push_macro("islower") +#pragma push_macro("isprint") +#pragma push_macro("ispunct") +#pragma push_macro("isspace") +#pragma push_macro("isupper") +#pragma push_macro("isxdigit") +#pragma push_macro("toascii") +#pragma push_macro("tolower") +#pragma push_macro("toupper") + +#undef isalnum +#undef isalpha +#undef isascii +#undef iscntrl +#undef isdigit +#undef islower +#undef isgraph +#undef isprint +#undef ispunct +#undef isspace +#undef isupper +#undef isblank +#undef isxdigit +#undef toascii +#undef tolower +#undef toupper + +#pragma omp begin declare target + +#include + +#pragma omp end declare target + +// Restore the original macros when compiling on the host. +#if !defined(__NVPTX__) && !defined(__AMDGPU__) +#pragma pop_macro("isalnum") +#pragma pop_macro("isalpha") +#pragma pop_macro("isascii") +#pragma pop_macro("isblank") +#pragma pop_macro("iscntrl") +#pragma pop_macro("isdigit") +#pragma pop_macro("isgraph") +#pragma pop_macro("islower") +#pragma pop_macro("isprint") +#pragma pop_macro("ispunct") +#pragma pop_macro("isspace") +#pragma pop_macro("isupper") +#pragma pop_macro("isxdigit") +#pragma pop_macro("toascii") +#pragma pop_macro("tolower") +#pragma pop_macro("toupper") +#endif + +#undef __LIBC_ATTRS + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_CTYPE_H__ diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/inttypes.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/inttypes.h new file mode 100644 index 0000000000000000000000000000000000000000..415f1e4b7bcab5441e99baa04249f9f053fe8283 --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/inttypes.h @@ -0,0 +1,34 @@ +//===-- Wrapper for C standard inttypes.h declarations on the GPU ---------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_INTTYPES_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_INTTYPES_H__ + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +#include_next + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +#pragma omp begin declare target + +#include + +#pragma omp end declare target + +#undef __LIBC_ATTRS + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_INTTYPES_H__ diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/stdio.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/stdio.h new file mode 100644 index 0000000000000000000000000000000000000000..950f91b3763e85848e2f17eeacd3253a201caa28 --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/stdio.h @@ -0,0 +1,80 @@ +//===-- Wrapper for C standard stdio.h declarations on the GPU ------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +#include_next + +// In some old versions of glibc, other standard headers sometimes define +// special macros (e.g., __need_FILE) before including stdio.h to cause stdio.h +// to produce special definitions. Future includes of stdio.h when those +// special macros are undefined are expected to produce the normal definitions +// from stdio.h. +// +// We do not apply our include guard (__CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__) +// unconditionally to the above include_next. Otherwise, after an occurrence of +// the first glibc stdio.h use case described above, the include_next would be +// skipped for remaining includes of stdio.h, leaving required symbols +// undefined. +// +// We make the following assumptions to handle all use cases: +// +// 1. If the above include_next produces special glibc definitions, then (a) it +// does not produce the normal definitions that we must intercept below, (b) +// the current file was included from a glibc header that already defined +// __GLIBC__ (usually by including glibc's ), and (c) the above +// include_next does not define _STDIO_H. In that case, we skip the rest of +// the current file and don't guard against future includes. +// 2. If the above include_next produces the normal stdio.h definitions, then +// either (a) __GLIBC__ is not defined because C headers are from some other +// libc implementation or (b) the above include_next defines _STDIO_H to +// prevent the above include_next from having any effect in the future. +#if !defined(__GLIBC__) || defined(_STDIO_H) + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +// Some headers provide these as macros. Temporarily undefine them so they do +// not conflict with any definitions for the GPU. + +#pragma push_macro("stdout") +#pragma push_macro("stdin") +#pragma push_macro("stderr") + +#undef stdout +#undef stderr +#undef stdin + +#pragma omp begin declare target + +#include + +#pragma omp end declare target + +#undef __LIBC_ATTRS + +// Restore the original macros when compiling on the host. +#if !defined(__NVPTX__) && !defined(__AMDGPU__) +#pragma pop_macro("stdout") +#pragma pop_macro("stderr") +#pragma pop_macro("stdin") +#endif + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ + +#endif diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/stdlib.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/stdlib.h new file mode 100644 index 0000000000000000000000000000000000000000..7fce5a1a31d526b0fdec465ee9353f4530693225 --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/stdlib.h @@ -0,0 +1,45 @@ +//===-- Wrapper for C standard stdlib.h declarations on the GPU -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_STDLIB_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_STDLIB_H__ + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +#include_next + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +#pragma omp begin declare target + +// The LLVM C library uses these named types so we forward declare them. +typedef void (*__atexithandler_t)(void); +typedef int (*__bsearchcompare_t)(const void *, const void *); +typedef int (*__qsortcompare_t)(const void *, const void *); +typedef int (*__qsortrcompare_t)(const void *, const void *, void *); + +// Enforce ABI compatibility with the structs used by the LLVM C library. +_Static_assert(__builtin_offsetof(div_t, quot) == 0, "ABI mismatch!"); +_Static_assert(__builtin_offsetof(ldiv_t, quot) == 0, "ABI mismatch!"); +_Static_assert(__builtin_offsetof(lldiv_t, quot) == 0, "ABI mismatch!"); + +#include + +#pragma omp end declare target + +#undef __LIBC_ATTRS + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_STDLIB_H__ diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/string.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/string.h new file mode 100644 index 0000000000000000000000000000000000000000..0ea49cb137606c78071ae1e95403a09386ec3ec7 --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/string.h @@ -0,0 +1,96 @@ +//===-- Wrapper for C standard string.h declarations on the GPU -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_STRING_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_STRING_H__ + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +#include_next + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +#pragma omp begin declare target + +// The GNU headers provide C++ standard compliant headers when in C++ mode and +// the LLVM libc does not. We need to manually provide the definitions using the +// same prototypes. +#if defined(__cplusplus) && defined(__GLIBC__) && \ + defined(__CORRECT_ISO_CPP_STRING_H_PROTO) + +#ifndef __LIBC_ATTRS +#define __LIBC_ATTRS +#endif + +extern "C" { +void *memccpy(void *__restrict, const void *__restrict, int, + size_t) __LIBC_ATTRS; +int memcmp(const void *, const void *, size_t) __LIBC_ATTRS; +void *memcpy(void *__restrict, const void *__restrict, size_t) __LIBC_ATTRS; +void *memmem(const void *, size_t, const void *, size_t) __LIBC_ATTRS; +void *memmove(void *, const void *, size_t) __LIBC_ATTRS; +void *mempcpy(void *__restrict, const void *__restrict, size_t) __LIBC_ATTRS; +void *memset(void *, int, size_t) __LIBC_ATTRS; +char *stpcpy(char *__restrict, const char *__restrict) __LIBC_ATTRS; +char *stpncpy(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; +char *strcat(char *__restrict, const char *__restrict) __LIBC_ATTRS; +int strcmp(const char *, const char *) __LIBC_ATTRS; +int strcoll(const char *, const char *) __LIBC_ATTRS; +char *strcpy(char *__restrict, const char *__restrict) __LIBC_ATTRS; +size_t strcspn(const char *, const char *) __LIBC_ATTRS; +char *strdup(const char *) __LIBC_ATTRS; +size_t strlen(const char *) __LIBC_ATTRS; +char *strncat(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; +int strncmp(const char *, const char *, size_t) __LIBC_ATTRS; +char *strncpy(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; +char *strndup(const char *, size_t) __LIBC_ATTRS; +size_t strnlen(const char *, size_t) __LIBC_ATTRS; +size_t strspn(const char *, const char *) __LIBC_ATTRS; +char *strtok(char *__restrict, const char *__restrict) __LIBC_ATTRS; +char *strtok_r(char *__restrict, const char *__restrict, + char **__restrict) __LIBC_ATTRS; +size_t strxfrm(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; +} + +extern "C++" { +char *strstr(char *, const char *) noexcept __LIBC_ATTRS; +const char *strstr(const char *, const char *) noexcept __LIBC_ATTRS; +char *strpbrk(char *, const char *) noexcept __LIBC_ATTRS; +const char *strpbrk(const char *, const char *) noexcept __LIBC_ATTRS; +char *strrchr(char *, int) noexcept __LIBC_ATTRS; +const char *strrchr(const char *, int) noexcept __LIBC_ATTRS; +char *strchr(char *, int) noexcept __LIBC_ATTRS; +const char *strchr(const char *, int) noexcept __LIBC_ATTRS; +char *strchrnul(char *, int) noexcept __LIBC_ATTRS; +const char *strchrnul(const char *, int) noexcept __LIBC_ATTRS; +char *strcasestr(char *, const char *) noexcept __LIBC_ATTRS; +const char *strcasestr(const char *, const char *) noexcept __LIBC_ATTRS; +void *memrchr(void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; +const void *memrchr(const void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; +void *memchr(void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; +const void *memchr(const void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; +} + +#else +#include + +#endif + +#pragma omp end declare target + +#undef __LIBC_ATTRS + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_STRING_H__ diff --git a/llvm/lib/clang/19/include/llvm_libc_wrappers/time.h b/llvm/lib/clang/19/include/llvm_libc_wrappers/time.h new file mode 100644 index 0000000000000000000000000000000000000000..9d1340c4eb748f0c1bfe36afafc0596368b8180f --- /dev/null +++ b/llvm/lib/clang/19/include/llvm_libc_wrappers/time.h @@ -0,0 +1,34 @@ +//===-- Wrapper for C standard time.h declarations on the GPU -------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __CLANG_LLVM_LIBC_WRAPPERS_TIME_H__ +#define __CLANG_LLVM_LIBC_WRAPPERS_TIME_H__ + +#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) +#error "This file is for GPU offloading compilation only" +#endif + +#include_next + +#if __has_include() + +#if defined(__HIP__) || defined(__CUDA__) +#define __LIBC_ATTRS __attribute__((device)) +#endif + +#pragma omp begin declare target + +_Static_assert(sizeof(clock_t) == sizeof(long), "ABI mismatch!"); + +#include + +#pragma omp end declare target + +#endif + +#endif // __CLANG_LLVM_LIBC_WRAPPERS_TIME_H__ diff --git a/llvm/lib/clang/19/include/lsxintrin.h b/llvm/lib/clang/19/include/lsxintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f347955ce6fb51303a8a70f28e229c9a8b00aec7 --- /dev/null +++ b/llvm/lib/clang/19/include/lsxintrin.h @@ -0,0 +1,3750 @@ +/*===------------- lsxintrin.h - LoongArch LSX intrinsics ------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _LOONGSON_SXINTRIN_H +#define _LOONGSON_SXINTRIN_H 1 + +#if defined(__loongarch_sx) +typedef signed char v16i8 __attribute__((vector_size(16), aligned(16))); +typedef signed char v16i8_b __attribute__((vector_size(16), aligned(1))); +typedef unsigned char v16u8 __attribute__((vector_size(16), aligned(16))); +typedef unsigned char v16u8_b __attribute__((vector_size(16), aligned(1))); +typedef short v8i16 __attribute__((vector_size(16), aligned(16))); +typedef short v8i16_h __attribute__((vector_size(16), aligned(2))); +typedef unsigned short v8u16 __attribute__((vector_size(16), aligned(16))); +typedef unsigned short v8u16_h __attribute__((vector_size(16), aligned(2))); +typedef int v4i32 __attribute__((vector_size(16), aligned(16))); +typedef int v4i32_w __attribute__((vector_size(16), aligned(4))); +typedef unsigned int v4u32 __attribute__((vector_size(16), aligned(16))); +typedef unsigned int v4u32_w __attribute__((vector_size(16), aligned(4))); +typedef long long v2i64 __attribute__((vector_size(16), aligned(16))); +typedef long long v2i64_d __attribute__((vector_size(16), aligned(8))); +typedef unsigned long long v2u64 __attribute__((vector_size(16), aligned(16))); +typedef unsigned long long v2u64_d __attribute__((vector_size(16), aligned(8))); +typedef float v4f32 __attribute__((vector_size(16), aligned(16))); +typedef float v4f32_w __attribute__((vector_size(16), aligned(4))); +typedef double v2f64 __attribute__((vector_size(16), aligned(16))); +typedef double v2f64_d __attribute__((vector_size(16), aligned(8))); + +typedef long long __m128i __attribute__((__vector_size__(16), __may_alias__)); +typedef float __m128 __attribute__((__vector_size__(16), __may_alias__)); +typedef double __m128d __attribute__((__vector_size__(16), __may_alias__)); + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsll_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsll_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsll_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsll_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsll_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsll_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsll_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsll_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vslli_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vslli_b((v16i8)(_1), (_2))) + +#define __lsx_vslli_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vslli_h((v8i16)(_1), (_2))) + +#define __lsx_vslli_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslli_w((v4i32)(_1), (_2))) + +#define __lsx_vslli_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vslli_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsra_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsra_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsra_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsra_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsra_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsra_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsra_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsra_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vsrai_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsrai_b((v16i8)(_1), (_2))) + +#define __lsx_vsrai_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsrai_h((v8i16)(_1), (_2))) + +#define __lsx_vsrai_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsrai_w((v4i32)(_1), (_2))) + +#define __lsx_vsrai_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vsrai_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrar_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrar_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrar_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrar_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrar_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrar_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrar_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrar_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vsrari_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsrari_b((v16i8)(_1), (_2))) + +#define __lsx_vsrari_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsrari_h((v8i16)(_1), (_2))) + +#define __lsx_vsrari_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsrari_w((v4i32)(_1), (_2))) + +#define __lsx_vsrari_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vsrari_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrl_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrl_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrl_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrl_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrl_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrl_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrl_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrl_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vsrli_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsrli_b((v16i8)(_1), (_2))) + +#define __lsx_vsrli_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsrli_h((v8i16)(_1), (_2))) + +#define __lsx_vsrli_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsrli_w((v4i32)(_1), (_2))) + +#define __lsx_vsrli_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vsrli_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlr_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlr_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlr_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlr_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlr_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlr_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlr_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlr_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vsrlri_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsrlri_b((v16i8)(_1), (_2))) + +#define __lsx_vsrlri_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsrlri_h((v8i16)(_1), (_2))) + +#define __lsx_vsrlri_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsrlri_w((v4i32)(_1), (_2))) + +#define __lsx_vsrlri_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vsrlri_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitclr_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitclr_b((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitclr_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitclr_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitclr_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitclr_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitclr_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitclr_d((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vbitclri_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vbitclri_b((v16u8)(_1), (_2))) + +#define __lsx_vbitclri_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vbitclri_h((v8u16)(_1), (_2))) + +#define __lsx_vbitclri_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vbitclri_w((v4u32)(_1), (_2))) + +#define __lsx_vbitclri_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vbitclri_d((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitset_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitset_b((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitset_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitset_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitset_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitset_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitset_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitset_d((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vbitseti_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vbitseti_b((v16u8)(_1), (_2))) + +#define __lsx_vbitseti_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vbitseti_h((v8u16)(_1), (_2))) + +#define __lsx_vbitseti_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vbitseti_w((v4u32)(_1), (_2))) + +#define __lsx_vbitseti_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vbitseti_d((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitrev_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitrev_b((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitrev_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitrev_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitrev_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitrev_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitrev_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vbitrev_d((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vbitrevi_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vbitrevi_b((v16u8)(_1), (_2))) + +#define __lsx_vbitrevi_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vbitrevi_h((v8u16)(_1), (_2))) + +#define __lsx_vbitrevi_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vbitrevi_w((v4u32)(_1), (_2))) + +#define __lsx_vbitrevi_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vbitrevi_d((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadd_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadd_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadd_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadd_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadd_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadd_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadd_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadd_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vaddi_bu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vaddi_bu((v16i8)(_1), (_2))) + +#define __lsx_vaddi_hu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vaddi_hu((v8i16)(_1), (_2))) + +#define __lsx_vaddi_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vaddi_wu((v4i32)(_1), (_2))) + +#define __lsx_vaddi_du(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vaddi_du((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsub_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsub_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsub_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsub_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsub_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsub_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsub_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsub_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vsubi_bu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsubi_bu((v16i8)(_1), (_2))) + +#define __lsx_vsubi_hu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsubi_hu((v8i16)(_1), (_2))) + +#define __lsx_vsubi_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsubi_wu((v4i32)(_1), (_2))) + +#define __lsx_vsubi_du(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsubi_du((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vmaxi_b(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_b((v16i8)(_1), (_2))) + +#define __lsx_vmaxi_h(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_h((v8i16)(_1), (_2))) + +#define __lsx_vmaxi_w(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_w((v4i32)(_1), (_2))) + +#define __lsx_vmaxi_d(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmax_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmax_du((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vmaxi_bu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_bu((v16u8)(_1), (_2))) + +#define __lsx_vmaxi_hu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_hu((v8u16)(_1), (_2))) + +#define __lsx_vmaxi_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_wu((v4u32)(_1), (_2))) + +#define __lsx_vmaxi_du(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmaxi_du((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vmini_b(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_b((v16i8)(_1), (_2))) + +#define __lsx_vmini_h(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_h((v8i16)(_1), (_2))) + +#define __lsx_vmini_w(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_w((v4i32)(_1), (_2))) + +#define __lsx_vmini_d(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmin_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmin_du((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vmini_bu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_bu((v16u8)(_1), (_2))) + +#define __lsx_vmini_hu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_hu((v8u16)(_1), (_2))) + +#define __lsx_vmini_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_wu((v4u32)(_1), (_2))) + +#define __lsx_vmini_du(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vmini_du((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vseq_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vseq_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vseq_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vseq_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vseq_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vseq_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vseq_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vseq_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vseqi_b(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vseqi_b((v16i8)(_1), (_2))) + +#define __lsx_vseqi_h(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vseqi_h((v8i16)(_1), (_2))) + +#define __lsx_vseqi_w(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vseqi_w((v4i32)(_1), (_2))) + +#define __lsx_vseqi_d(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vseqi_d((v2i64)(_1), (_2))) + +#define __lsx_vslti_b(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_b((v16i8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vslti_h(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_h((v8i16)(_1), (_2))) + +#define __lsx_vslti_w(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_w((v4i32)(_1), (_2))) + +#define __lsx_vslti_d(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vslt_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vslt_du((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vslti_bu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_bu((v16u8)(_1), (_2))) + +#define __lsx_vslti_hu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_hu((v8u16)(_1), (_2))) + +#define __lsx_vslti_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_wu((v4u32)(_1), (_2))) + +#define __lsx_vslti_du(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslti_du((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_d((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vslei_b(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_b((v16i8)(_1), (_2))) + +#define __lsx_vslei_h(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_h((v8i16)(_1), (_2))) + +#define __lsx_vslei_w(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_w((v4i32)(_1), (_2))) + +#define __lsx_vslei_d(/*__m128i*/ _1, /*si5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsle_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsle_du((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vslei_bu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_bu((v16u8)(_1), (_2))) + +#define __lsx_vslei_hu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_hu((v8u16)(_1), (_2))) + +#define __lsx_vslei_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_wu((v4u32)(_1), (_2))) + +#define __lsx_vslei_du(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vslei_du((v2u64)(_1), (_2))) + +#define __lsx_vsat_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsat_b((v16i8)(_1), (_2))) + +#define __lsx_vsat_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsat_h((v8i16)(_1), (_2))) + +#define __lsx_vsat_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsat_w((v4i32)(_1), (_2))) + +#define __lsx_vsat_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vsat_d((v2i64)(_1), (_2))) + +#define __lsx_vsat_bu(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsat_bu((v16u8)(_1), (_2))) + +#define __lsx_vsat_hu(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsat_hu((v8u16)(_1), (_2))) + +#define __lsx_vsat_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsat_wu((v4u32)(_1), (_2))) + +#define __lsx_vsat_du(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vsat_du((v2u64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadda_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadda_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadda_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadda_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadda_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadda_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadda_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadda_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsadd_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsadd_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavg_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavg_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vavgr_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vavgr_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssub_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssub_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vabsd_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vabsd_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmul_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmul_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmul_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmul_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmul_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmul_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmul_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmul_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmadd_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmadd_b((v16i8)_1, (v16i8)_2, (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmadd_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmadd_h((v8i16)_1, (v8i16)_2, (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmadd_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmadd_w((v4i32)_1, (v4i32)_2, (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmadd_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmadd_d((v2i64)_1, (v2i64)_2, (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmsub_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmsub_b((v16i8)_1, (v16i8)_2, (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmsub_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmsub_h((v8i16)_1, (v8i16)_2, (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmsub_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmsub_w((v4i32)_1, (v4i32)_2, (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmsub_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmsub_d((v2i64)_1, (v2i64)_2, (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vdiv_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vdiv_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_hu_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_hu_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_wu_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_wu_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_du_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_du_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_hu_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_hu_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_wu_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_wu_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_du_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_du_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmod_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmod_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplve_b(__m128i _1, int _2) { + return (__m128i)__builtin_lsx_vreplve_b((v16i8)_1, (int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplve_h(__m128i _1, int _2) { + return (__m128i)__builtin_lsx_vreplve_h((v8i16)_1, (int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplve_w(__m128i _1, int _2) { + return (__m128i)__builtin_lsx_vreplve_w((v4i32)_1, (int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplve_d(__m128i _1, int _2) { + return (__m128i)__builtin_lsx_vreplve_d((v2i64)_1, (int)_2); +} + +#define __lsx_vreplvei_b(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vreplvei_b((v16i8)(_1), (_2))) + +#define __lsx_vreplvei_h(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vreplvei_h((v8i16)(_1), (_2))) + +#define __lsx_vreplvei_w(/*__m128i*/ _1, /*ui2*/ _2) \ + ((__m128i)__builtin_lsx_vreplvei_w((v4i32)(_1), (_2))) + +#define __lsx_vreplvei_d(/*__m128i*/ _1, /*ui1*/ _2) \ + ((__m128i)__builtin_lsx_vreplvei_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickev_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickev_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickev_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickev_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickev_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickev_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickev_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickev_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickod_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickod_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickod_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickod_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickod_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickod_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpickod_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpickod_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvh_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvh_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvh_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvh_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvh_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvh_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvh_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvh_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvl_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvl_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvl_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvl_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvl_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvl_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vilvl_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vilvl_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackev_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackev_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackev_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackev_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackev_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackev_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackev_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackev_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackod_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackod_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackod_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackod_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackod_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackod_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpackod_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vpackod_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vshuf_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vshuf_h((v8i16)_1, (v8i16)_2, (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vshuf_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vshuf_w((v4i32)_1, (v4i32)_2, (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vshuf_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vshuf_d((v2i64)_1, (v2i64)_2, (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vand_v(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vand_v((v16u8)_1, (v16u8)_2); +} + +#define __lsx_vandi_b(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vandi_b((v16u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vor_v(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vor_v((v16u8)_1, (v16u8)_2); +} + +#define __lsx_vori_b(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vori_b((v16u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vnor_v(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vnor_v((v16u8)_1, (v16u8)_2); +} + +#define __lsx_vnori_b(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vnori_b((v16u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vxor_v(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vxor_v((v16u8)_1, (v16u8)_2); +} + +#define __lsx_vxori_b(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vxori_b((v16u8)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vbitsel_v(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vbitsel_v((v16u8)_1, (v16u8)_2, (v16u8)_3); +} + +#define __lsx_vbitseli_b(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vbitseli_b((v16u8)(_1), (v16u8)(_2), (_3))) + +#define __lsx_vshuf4i_b(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vshuf4i_b((v16i8)(_1), (_2))) + +#define __lsx_vshuf4i_h(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vshuf4i_h((v8i16)(_1), (_2))) + +#define __lsx_vshuf4i_w(/*__m128i*/ _1, /*ui8*/ _2) \ + ((__m128i)__builtin_lsx_vshuf4i_w((v4i32)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplgr2vr_b(int _1) { + return (__m128i)__builtin_lsx_vreplgr2vr_b((int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplgr2vr_h(int _1) { + return (__m128i)__builtin_lsx_vreplgr2vr_h((int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplgr2vr_w(int _1) { + return (__m128i)__builtin_lsx_vreplgr2vr_w((int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vreplgr2vr_d(long int _1) { + return (__m128i)__builtin_lsx_vreplgr2vr_d((long int)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpcnt_b(__m128i _1) { + return (__m128i)__builtin_lsx_vpcnt_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpcnt_h(__m128i _1) { + return (__m128i)__builtin_lsx_vpcnt_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpcnt_w(__m128i _1) { + return (__m128i)__builtin_lsx_vpcnt_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vpcnt_d(__m128i _1) { + return (__m128i)__builtin_lsx_vpcnt_d((v2i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclo_b(__m128i _1) { + return (__m128i)__builtin_lsx_vclo_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclo_h(__m128i _1) { + return (__m128i)__builtin_lsx_vclo_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclo_w(__m128i _1) { + return (__m128i)__builtin_lsx_vclo_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclo_d(__m128i _1) { + return (__m128i)__builtin_lsx_vclo_d((v2i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclz_b(__m128i _1) { + return (__m128i)__builtin_lsx_vclz_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclz_h(__m128i _1) { + return (__m128i)__builtin_lsx_vclz_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclz_w(__m128i _1) { + return (__m128i)__builtin_lsx_vclz_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vclz_d(__m128i _1) { + return (__m128i)__builtin_lsx_vclz_d((v2i64)_1); +} + +#define __lsx_vpickve2gr_b(/*__m128i*/ _1, /*ui4*/ _2) \ + ((int)__builtin_lsx_vpickve2gr_b((v16i8)(_1), (_2))) + +#define __lsx_vpickve2gr_h(/*__m128i*/ _1, /*ui3*/ _2) \ + ((int)__builtin_lsx_vpickve2gr_h((v8i16)(_1), (_2))) + +#define __lsx_vpickve2gr_w(/*__m128i*/ _1, /*ui2*/ _2) \ + ((int)__builtin_lsx_vpickve2gr_w((v4i32)(_1), (_2))) + +#define __lsx_vpickve2gr_d(/*__m128i*/ _1, /*ui1*/ _2) \ + ((long int)__builtin_lsx_vpickve2gr_d((v2i64)(_1), (_2))) + +#define __lsx_vpickve2gr_bu(/*__m128i*/ _1, /*ui4*/ _2) \ + ((unsigned int)__builtin_lsx_vpickve2gr_bu((v16i8)(_1), (_2))) + +#define __lsx_vpickve2gr_hu(/*__m128i*/ _1, /*ui3*/ _2) \ + ((unsigned int)__builtin_lsx_vpickve2gr_hu((v8i16)(_1), (_2))) + +#define __lsx_vpickve2gr_wu(/*__m128i*/ _1, /*ui2*/ _2) \ + ((unsigned int)__builtin_lsx_vpickve2gr_wu((v4i32)(_1), (_2))) + +#define __lsx_vpickve2gr_du(/*__m128i*/ _1, /*ui1*/ _2) \ + ((unsigned long int)__builtin_lsx_vpickve2gr_du((v2i64)(_1), (_2))) + +#define __lsx_vinsgr2vr_b(/*__m128i*/ _1, /*int*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vinsgr2vr_b((v16i8)(_1), (int)(_2), (_3))) + +#define __lsx_vinsgr2vr_h(/*__m128i*/ _1, /*int*/ _2, /*ui3*/ _3) \ + ((__m128i)__builtin_lsx_vinsgr2vr_h((v8i16)(_1), (int)(_2), (_3))) + +#define __lsx_vinsgr2vr_w(/*__m128i*/ _1, /*int*/ _2, /*ui2*/ _3) \ + ((__m128i)__builtin_lsx_vinsgr2vr_w((v4i32)(_1), (int)(_2), (_3))) + +#define __lsx_vinsgr2vr_d(/*__m128i*/ _1, /*long int*/ _2, /*ui1*/ _3) \ + ((__m128i)__builtin_lsx_vinsgr2vr_d((v2i64)(_1), (long int)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfadd_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfadd_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfadd_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfadd_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfsub_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfsub_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfsub_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfsub_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmul_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfmul_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmul_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfmul_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfdiv_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfdiv_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfdiv_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfdiv_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcvt_h_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcvt_h_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfcvt_s_d(__m128d _1, __m128d _2) { + return (__m128)__builtin_lsx_vfcvt_s_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmin_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfmin_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmin_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfmin_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmina_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfmina_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmina_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfmina_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmax_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfmax_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmax_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfmax_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmaxa_s(__m128 _1, __m128 _2) { + return (__m128)__builtin_lsx_vfmaxa_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmaxa_d(__m128d _1, __m128d _2) { + return (__m128d)__builtin_lsx_vfmaxa_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfclass_s(__m128 _1) { + return (__m128i)__builtin_lsx_vfclass_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfclass_d(__m128d _1) { + return (__m128i)__builtin_lsx_vfclass_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfsqrt_s(__m128 _1) { + return (__m128)__builtin_lsx_vfsqrt_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfsqrt_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfsqrt_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrecip_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrecip_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrecip_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrecip_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrecipe_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrecipe_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrecipe_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrecipe_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrint_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrint_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrint_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrint_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrsqrt_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrsqrt_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrsqrt_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrsqrt_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrsqrte_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrsqrte_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrsqrte_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrsqrte_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vflogb_s(__m128 _1) { + return (__m128)__builtin_lsx_vflogb_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vflogb_d(__m128d _1) { + return (__m128d)__builtin_lsx_vflogb_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfcvth_s_h(__m128i _1) { + return (__m128)__builtin_lsx_vfcvth_s_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfcvth_d_s(__m128 _1) { + return (__m128d)__builtin_lsx_vfcvth_d_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfcvtl_s_h(__m128i _1) { + return (__m128)__builtin_lsx_vfcvtl_s_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfcvtl_d_s(__m128 _1) { + return (__m128d)__builtin_lsx_vfcvtl_d_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftint_w_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftint_w_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftint_l_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftint_l_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftint_wu_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftint_wu_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftint_lu_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftint_lu_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrz_w_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrz_w_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrz_l_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftintrz_l_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrz_wu_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrz_wu_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrz_lu_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftintrz_lu_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vffint_s_w(__m128i _1) { + return (__m128)__builtin_lsx_vffint_s_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vffint_d_l(__m128i _1) { + return (__m128d)__builtin_lsx_vffint_d_l((v2i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vffint_s_wu(__m128i _1) { + return (__m128)__builtin_lsx_vffint_s_wu((v4u32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vffint_d_lu(__m128i _1) { + return (__m128d)__builtin_lsx_vffint_d_lu((v2u64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vandn_v(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vandn_v((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vneg_b(__m128i _1) { + return (__m128i)__builtin_lsx_vneg_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vneg_h(__m128i _1) { + return (__m128i)__builtin_lsx_vneg_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vneg_w(__m128i _1) { + return (__m128i)__builtin_lsx_vneg_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vneg_d(__m128i _1) { + return (__m128i)__builtin_lsx_vneg_d((v2i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmuh_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmuh_du((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vsllwil_h_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsllwil_h_b((v16i8)(_1), (_2))) + +#define __lsx_vsllwil_w_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsllwil_w_h((v8i16)(_1), (_2))) + +#define __lsx_vsllwil_d_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsllwil_d_w((v4i32)(_1), (_2))) + +#define __lsx_vsllwil_hu_bu(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vsllwil_hu_bu((v16u8)(_1), (_2))) + +#define __lsx_vsllwil_wu_hu(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vsllwil_wu_hu((v8u16)(_1), (_2))) + +#define __lsx_vsllwil_du_wu(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vsllwil_du_wu((v4u32)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsran_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsran_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsran_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsran_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsran_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsran_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssran_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssran_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssran_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssran_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssran_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssran_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssran_bu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssran_bu_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssran_hu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssran_hu_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssran_wu_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssran_wu_d((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrarn_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrarn_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrarn_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrarn_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrarn_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrarn_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrarn_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrarn_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrarn_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrarn_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrarn_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrarn_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrarn_bu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrarn_bu_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrarn_hu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrarn_hu_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrarn_wu_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrarn_wu_d((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrln_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrln_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrln_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrln_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrln_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrln_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrln_bu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrln_bu_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrln_hu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrln_hu_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrln_wu_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrln_wu_d((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlrn_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlrn_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlrn_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlrn_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsrlrn_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsrlrn_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrlrn_bu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrlrn_bu_h((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrlrn_hu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrlrn_hu_w((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrlrn_wu_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrlrn_wu_d((v2u64)_1, (v2u64)_2); +} + +#define __lsx_vfrstpi_b(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vfrstpi_b((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vfrstpi_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vfrstpi_h((v8i16)(_1), (v8i16)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfrstp_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vfrstp_b((v16i8)_1, (v16i8)_2, (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfrstp_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vfrstp_h((v8i16)_1, (v8i16)_2, (v8i16)_3); +} + +#define __lsx_vshuf4i_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vshuf4i_d((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vbsrl_v(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vbsrl_v((v16i8)(_1), (_2))) + +#define __lsx_vbsll_v(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vbsll_v((v16i8)(_1), (_2))) + +#define __lsx_vextrins_b(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vextrins_b((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vextrins_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vextrins_h((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vextrins_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vextrins_w((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vextrins_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vextrins_d((v2i64)(_1), (v2i64)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmskltz_b(__m128i _1) { + return (__m128i)__builtin_lsx_vmskltz_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmskltz_h(__m128i _1) { + return (__m128i)__builtin_lsx_vmskltz_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmskltz_w(__m128i _1) { + return (__m128i)__builtin_lsx_vmskltz_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmskltz_d(__m128i _1) { + return (__m128i)__builtin_lsx_vmskltz_d((v2i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsigncov_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsigncov_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsigncov_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsigncov_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsigncov_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsigncov_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsigncov_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsigncov_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmadd_s(__m128 _1, __m128 _2, __m128 _3) { + return (__m128)__builtin_lsx_vfmadd_s((v4f32)_1, (v4f32)_2, (v4f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmadd_d(__m128d _1, __m128d _2, __m128d _3) { + return (__m128d)__builtin_lsx_vfmadd_d((v2f64)_1, (v2f64)_2, (v2f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfmsub_s(__m128 _1, __m128 _2, __m128 _3) { + return (__m128)__builtin_lsx_vfmsub_s((v4f32)_1, (v4f32)_2, (v4f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfmsub_d(__m128d _1, __m128d _2, __m128d _3) { + return (__m128d)__builtin_lsx_vfmsub_d((v2f64)_1, (v2f64)_2, (v2f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfnmadd_s(__m128 _1, __m128 _2, __m128 _3) { + return (__m128)__builtin_lsx_vfnmadd_s((v4f32)_1, (v4f32)_2, (v4f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfnmadd_d(__m128d _1, __m128d _2, __m128d _3) { + return (__m128d)__builtin_lsx_vfnmadd_d((v2f64)_1, (v2f64)_2, (v2f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfnmsub_s(__m128 _1, __m128 _2, __m128 _3) { + return (__m128)__builtin_lsx_vfnmsub_s((v4f32)_1, (v4f32)_2, (v4f32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfnmsub_d(__m128d _1, __m128d _2, __m128d _3) { + return (__m128d)__builtin_lsx_vfnmsub_d((v2f64)_1, (v2f64)_2, (v2f64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrne_w_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrne_w_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrne_l_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftintrne_l_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrp_w_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrp_w_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrp_l_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftintrp_l_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrm_w_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrm_w_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrm_l_d(__m128d _1) { + return (__m128i)__builtin_lsx_vftintrm_l_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftint_w_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vftint_w_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vffint_s_l(__m128i _1, __m128i _2) { + return (__m128)__builtin_lsx_vffint_s_l((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrz_w_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vftintrz_w_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrp_w_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vftintrp_w_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrm_w_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vftintrm_w_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrne_w_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vftintrne_w_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintl_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintl_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftinth_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftinth_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vffinth_d_w(__m128i _1) { + return (__m128d)__builtin_lsx_vffinth_d_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vffintl_d_w(__m128i _1) { + return (__m128d)__builtin_lsx_vffintl_d_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrzl_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrzl_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrzh_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrzh_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrpl_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrpl_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrph_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrph_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrml_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrml_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrmh_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrmh_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrnel_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrnel_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vftintrneh_l_s(__m128 _1) { + return (__m128i)__builtin_lsx_vftintrneh_l_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrintrne_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrintrne_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrintrne_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrintrne_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrintrz_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrintrz_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrintrz_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrintrz_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrintrp_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrintrp_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrintrp_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrintrp_d((v2f64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 + __lsx_vfrintrm_s(__m128 _1) { + return (__m128)__builtin_lsx_vfrintrm_s((v4f32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d + __lsx_vfrintrm_d(__m128d _1) { + return (__m128d)__builtin_lsx_vfrintrm_d((v2f64)_1); +} + +#define __lsx_vstelm_b(/*__m128i*/ _1, /*void **/ _2, /*si8*/ _3, /*idx*/ _4) \ + ((void)__builtin_lsx_vstelm_b((v16i8)(_1), (void *)(_2), (_3), (_4))) + +#define __lsx_vstelm_h(/*__m128i*/ _1, /*void **/ _2, /*si8*/ _3, /*idx*/ _4) \ + ((void)__builtin_lsx_vstelm_h((v8i16)(_1), (void *)(_2), (_3), (_4))) + +#define __lsx_vstelm_w(/*__m128i*/ _1, /*void **/ _2, /*si8*/ _3, /*idx*/ _4) \ + ((void)__builtin_lsx_vstelm_w((v4i32)(_1), (void *)(_2), (_3), (_4))) + +#define __lsx_vstelm_d(/*__m128i*/ _1, /*void **/ _2, /*si8*/ _3, /*idx*/ _4) \ + ((void)__builtin_lsx_vstelm_d((v2i64)(_1), (void *)(_2), (_3), (_4))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_d_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_d_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_w_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_w_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_h_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_h_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_d_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_d_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_w_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_w_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_h_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_h_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_d_wu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_d_wu_w((v4u32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_w_hu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_w_hu_h((v8u16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_h_bu_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_h_bu_b((v16u8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_d_wu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_d_wu_w((v4u32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_w_hu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_w_hu_h((v8u16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_h_bu_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_h_bu_b((v16u8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_d_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_d_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_w_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_w_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_h_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_h_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_d_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_d_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_w_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_w_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_h_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_h_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_q_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_q_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_q_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_q_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwev_q_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwev_q_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsubwod_q_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsubwod_q_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwev_q_du_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwev_q_du_d((v2u64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vaddwod_q_du_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vaddwod_q_du_d((v2u64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_d_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_d_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_w_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_w_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_h_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_h_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_d_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_d_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_w_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_w_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_h_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_h_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_d_wu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_d_wu((v4u32)_1, (v4u32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_w_hu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_w_hu((v8u16)_1, (v8u16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_h_bu(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_h_bu((v16u8)_1, (v16u8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_d_wu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_d_wu_w((v4u32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_w_hu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_w_hu_h((v8u16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_h_bu_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_h_bu_b((v16u8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_d_wu_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_d_wu_w((v4u32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_w_hu_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_w_hu_h((v8u16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_h_bu_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_h_bu_b((v16u8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_q_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_q_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_q_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_q_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwev_q_du_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwev_q_du_d((v2u64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmulwod_q_du_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vmulwod_q_du_d((v2u64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhaddw_qu_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhaddw_qu_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_q_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_q_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vhsubw_qu_du(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vhsubw_qu_du((v2u64)_1, (v2u64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_d_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_d_w((v2i64)_1, (v4i32)_2, (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_w_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_w_h((v4i32)_1, (v8i16)_2, (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_h_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_h_b((v8i16)_1, (v16i8)_2, (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_d_wu(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_d_wu((v2u64)_1, (v4u32)_2, (v4u32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_w_hu(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_w_hu((v4u32)_1, (v8u16)_2, (v8u16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_h_bu(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_h_bu((v8u16)_1, (v16u8)_2, (v16u8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_d_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_d_w((v2i64)_1, (v4i32)_2, (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_w_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_w_h((v4i32)_1, (v8i16)_2, (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_h_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_h_b((v8i16)_1, (v16i8)_2, (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_d_wu(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_d_wu((v2u64)_1, (v4u32)_2, (v4u32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_w_hu(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_w_hu((v4u32)_1, (v8u16)_2, (v8u16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_h_bu(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_h_bu((v8u16)_1, (v16u8)_2, (v16u8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_d_wu_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_d_wu_w((v2i64)_1, (v4u32)_2, + (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_w_hu_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_w_hu_h((v4i32)_1, (v8u16)_2, + (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_h_bu_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_h_bu_b((v8i16)_1, (v16u8)_2, + (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_d_wu_w(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_d_wu_w((v2i64)_1, (v4u32)_2, + (v4i32)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_w_hu_h(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_w_hu_h((v4i32)_1, (v8u16)_2, + (v8i16)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_h_bu_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_h_bu_b((v8i16)_1, (v16u8)_2, + (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_q_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_q_d((v2i64)_1, (v2i64)_2, (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_q_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_q_d((v2i64)_1, (v2i64)_2, (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_q_du(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_q_du((v2u64)_1, (v2u64)_2, (v2u64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_q_du(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_q_du((v2u64)_1, (v2u64)_2, (v2u64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwev_q_du_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwev_q_du_d((v2i64)_1, (v2u64)_2, + (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmaddwod_q_du_d(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vmaddwod_q_du_d((v2i64)_1, (v2u64)_2, + (v2i64)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vrotr_b(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vrotr_b((v16i8)_1, (v16i8)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vrotr_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vrotr_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vrotr_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vrotr_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vrotr_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vrotr_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vadd_q(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vadd_q((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vsub_q(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vsub_q((v2i64)_1, (v2i64)_2); +} + +#define __lsx_vldrepl_b(/*void **/ _1, /*si12*/ _2) \ + ((__m128i)__builtin_lsx_vldrepl_b((void const *)(_1), (_2))) + +#define __lsx_vldrepl_h(/*void **/ _1, /*si11*/ _2) \ + ((__m128i)__builtin_lsx_vldrepl_h((void const *)(_1), (_2))) + +#define __lsx_vldrepl_w(/*void **/ _1, /*si10*/ _2) \ + ((__m128i)__builtin_lsx_vldrepl_w((void const *)(_1), (_2))) + +#define __lsx_vldrepl_d(/*void **/ _1, /*si9*/ _2) \ + ((__m128i)__builtin_lsx_vldrepl_d((void const *)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmskgez_b(__m128i _1) { + return (__m128i)__builtin_lsx_vmskgez_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vmsknz_b(__m128i _1) { + return (__m128i)__builtin_lsx_vmsknz_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_h_b(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_h_b((v16i8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_w_h(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_w_h((v8i16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_d_w(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_d_w((v4i32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_q_d(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_q_d((v2i64)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_hu_bu(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_hu_bu((v16u8)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_wu_hu(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_wu_hu((v8u16)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_du_wu(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_du_wu((v4u32)_1); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vexth_qu_du(__m128i _1) { + return (__m128i)__builtin_lsx_vexth_qu_du((v2u64)_1); +} + +#define __lsx_vrotri_b(/*__m128i*/ _1, /*ui3*/ _2) \ + ((__m128i)__builtin_lsx_vrotri_b((v16i8)(_1), (_2))) + +#define __lsx_vrotri_h(/*__m128i*/ _1, /*ui4*/ _2) \ + ((__m128i)__builtin_lsx_vrotri_h((v8i16)(_1), (_2))) + +#define __lsx_vrotri_w(/*__m128i*/ _1, /*ui5*/ _2) \ + ((__m128i)__builtin_lsx_vrotri_w((v4i32)(_1), (_2))) + +#define __lsx_vrotri_d(/*__m128i*/ _1, /*ui6*/ _2) \ + ((__m128i)__builtin_lsx_vrotri_d((v2i64)(_1), (_2))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vextl_q_d(__m128i _1) { + return (__m128i)__builtin_lsx_vextl_q_d((v2i64)_1); +} + +#define __lsx_vsrlni_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vsrlni_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vsrlni_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vsrlni_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vsrlni_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vsrlni_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vsrlni_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vsrlni_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vsrlrni_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vsrlrni_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vsrlrni_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vsrlrni_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vsrlrni_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vsrlrni_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vsrlrni_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vsrlrni_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrlni_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrlni_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrlni_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrlni_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrlni_bu_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_bu_h((v16u8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrlni_hu_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_hu_w((v8u16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrlni_wu_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_wu_d((v4u32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrlni_du_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrlni_du_q((v2u64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrlrni_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrlrni_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrlrni_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrlrni_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrlrni_bu_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_bu_h((v16u8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrlrni_hu_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_hu_w((v8u16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrlrni_wu_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_wu_d((v4u32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrlrni_du_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrlrni_du_q((v2u64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vsrani_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vsrani_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vsrani_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vsrani_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vsrani_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vsrani_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vsrani_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vsrani_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vsrarni_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vsrarni_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vsrarni_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vsrarni_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vsrarni_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vsrarni_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vsrarni_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vsrarni_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrani_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrani_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrani_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrani_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrani_bu_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_bu_h((v16u8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrani_hu_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_hu_w((v8u16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrani_wu_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_wu_d((v4u32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrani_du_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrani_du_q((v2u64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrarni_b_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_b_h((v16i8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrarni_h_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_h_w((v8i16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrarni_w_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_w_d((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrarni_d_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_d_q((v2i64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vssrarni_bu_h(/*__m128i*/ _1, /*__m128i*/ _2, /*ui4*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_bu_h((v16u8)(_1), (v16i8)(_2), (_3))) + +#define __lsx_vssrarni_hu_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui5*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_hu_w((v8u16)(_1), (v8i16)(_2), (_3))) + +#define __lsx_vssrarni_wu_d(/*__m128i*/ _1, /*__m128i*/ _2, /*ui6*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_wu_d((v4u32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vssrarni_du_q(/*__m128i*/ _1, /*__m128i*/ _2, /*ui7*/ _3) \ + ((__m128i)__builtin_lsx_vssrarni_du_q((v2u64)(_1), (v2i64)(_2), (_3))) + +#define __lsx_vpermi_w(/*__m128i*/ _1, /*__m128i*/ _2, /*ui8*/ _3) \ + ((__m128i)__builtin_lsx_vpermi_w((v4i32)(_1), (v4i32)(_2), (_3))) + +#define __lsx_vld(/*void **/ _1, /*si12*/ _2) \ + ((__m128i)__builtin_lsx_vld((void const *)(_1), (_2))) + +#define __lsx_vst(/*__m128i*/ _1, /*void **/ _2, /*si12*/ _3) \ + ((void)__builtin_lsx_vst((v16i8)(_1), (void *)(_2), (_3))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrlrn_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrlrn_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrlrn_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrlrn_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrlrn_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrlrn_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrln_b_h(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrln_b_h((v8i16)_1, (v8i16)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrln_h_w(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrln_h_w((v4i32)_1, (v4i32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vssrln_w_d(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vssrln_w_d((v2i64)_1, (v2i64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vorn_v(__m128i _1, __m128i _2) { + return (__m128i)__builtin_lsx_vorn_v((v16i8)_1, (v16i8)_2); +} + +#define __lsx_vldi(/*i13*/ _1) ((__m128i)__builtin_lsx_vldi((_1))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vshuf_b(__m128i _1, __m128i _2, __m128i _3) { + return (__m128i)__builtin_lsx_vshuf_b((v16i8)_1, (v16i8)_2, (v16i8)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vldx(void const *_1, long int _2) { + return (__m128i)__builtin_lsx_vldx((void const *)_1, (long int)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) void + __lsx_vstx(__m128i _1, void *_2, long int _3) { + return (void)__builtin_lsx_vstx((v16i8)_1, (void *)_2, (long int)_3); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vextl_qu_du(__m128i _1) { + return (__m128i)__builtin_lsx_vextl_qu_du((v2u64)_1); +} + +#define __lsx_bnz_b(/*__m128i*/ _1) ((int)__builtin_lsx_bnz_b((v16u8)(_1))) + +#define __lsx_bnz_d(/*__m128i*/ _1) ((int)__builtin_lsx_bnz_d((v2u64)(_1))) + +#define __lsx_bnz_h(/*__m128i*/ _1) ((int)__builtin_lsx_bnz_h((v8u16)(_1))) + +#define __lsx_bnz_v(/*__m128i*/ _1) ((int)__builtin_lsx_bnz_v((v16u8)(_1))) + +#define __lsx_bnz_w(/*__m128i*/ _1) ((int)__builtin_lsx_bnz_w((v4u32)(_1))) + +#define __lsx_bz_b(/*__m128i*/ _1) ((int)__builtin_lsx_bz_b((v16u8)(_1))) + +#define __lsx_bz_d(/*__m128i*/ _1) ((int)__builtin_lsx_bz_d((v2u64)(_1))) + +#define __lsx_bz_h(/*__m128i*/ _1) ((int)__builtin_lsx_bz_h((v8u16)(_1))) + +#define __lsx_bz_v(/*__m128i*/ _1) ((int)__builtin_lsx_bz_v((v16u8)(_1))) + +#define __lsx_bz_w(/*__m128i*/ _1) ((int)__builtin_lsx_bz_w((v4u32)(_1))) + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_caf_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_caf_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_caf_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_caf_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_ceq_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_ceq_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_ceq_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_ceq_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cle_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cle_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cle_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cle_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_clt_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_clt_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_clt_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_clt_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cne_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cne_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cne_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cne_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cor_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cor_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cor_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cor_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cueq_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cueq_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cueq_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cueq_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cule_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cule_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cule_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cule_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cult_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cult_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cult_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cult_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cun_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cun_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cune_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_cune_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cune_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cune_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_cun_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_cun_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_saf_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_saf_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_saf_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_saf_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_seq_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_seq_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_seq_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_seq_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sle_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sle_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sle_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sle_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_slt_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_slt_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_slt_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_slt_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sne_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sne_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sne_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sne_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sor_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sor_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sor_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sor_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sueq_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sueq_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sueq_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sueq_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sule_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sule_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sule_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sule_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sult_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sult_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sult_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sult_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sun_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sun_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sune_d(__m128d _1, __m128d _2) { + return (__m128i)__builtin_lsx_vfcmp_sune_d((v2f64)_1, (v2f64)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sune_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sune_s((v4f32)_1, (v4f32)_2); +} + +extern __inline + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i + __lsx_vfcmp_sun_s(__m128 _1, __m128 _2) { + return (__m128i)__builtin_lsx_vfcmp_sun_s((v4f32)_1, (v4f32)_2); +} + +#define __lsx_vrepli_b(/*si10*/ _1) ((__m128i)__builtin_lsx_vrepli_b((_1))) + +#define __lsx_vrepli_d(/*si10*/ _1) ((__m128i)__builtin_lsx_vrepli_d((_1))) + +#define __lsx_vrepli_h(/*si10*/ _1) ((__m128i)__builtin_lsx_vrepli_h((_1))) + +#define __lsx_vrepli_w(/*si10*/ _1) ((__m128i)__builtin_lsx_vrepli_w((_1))) + +#endif /* defined(__loongarch_sx) */ +#endif /* _LOONGSON_SXINTRIN_H */ diff --git a/llvm/lib/clang/19/include/lwpintrin.h b/llvm/lib/clang/19/include/lwpintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..d8ab0db037689654b74bb53ea60e7c9b6fd69d9f --- /dev/null +++ b/llvm/lib/clang/19/include/lwpintrin.h @@ -0,0 +1,136 @@ +/*===---- lwpintrin.h - LWP intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __LWPINTRIN_H +#define __LWPINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("lwp"))) + +/// Parses the LWPCB at the specified address and enables +/// profiling if valid. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LLWPCB instruction. +/// +/// \param __addr +/// Address to the new Lightweight Profiling Control Block (LWPCB). If the +/// LWPCB is valid, writes the address into the LWP_CBADDR MSR and enables +/// Lightweight Profiling. +static __inline__ void __DEFAULT_FN_ATTRS +__llwpcb (void *__addr) +{ + __builtin_ia32_llwpcb(__addr); +} + +/// Flushes the LWP state to memory and returns the address of the LWPCB. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the SLWPCB instruction. +/// +/// \return +/// Address to the current Lightweight Profiling Control Block (LWPCB). +/// If LWP is not currently enabled, returns NULL. +static __inline__ void* __DEFAULT_FN_ATTRS +__slwpcb (void) +{ + return __builtin_ia32_slwpcb(); +} + +/// Inserts programmed event record into the LWP event ring buffer +/// and advances the ring buffer pointer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LWPINS instruction. +/// +/// \param DATA2 +/// A 32-bit value is zero-extended and inserted into the 64-bit Data2 field. +/// \param DATA1 +/// A 32-bit value is inserted into the 32-bit Data1 field. +/// \param FLAGS +/// A 32-bit immediate value is inserted into the 32-bit Flags field. +/// \returns If the ring buffer is full and LWP is running in Synchronized Mode, +/// the event record overwrites the last record in the buffer, the MissedEvents +/// counter in the LWPCB is incremented, the head pointer is not advanced, and +/// 1 is returned. Otherwise 0 is returned. +#define __lwpins32(DATA2, DATA1, FLAGS) \ + (__builtin_ia32_lwpins32((unsigned int) (DATA2), (unsigned int) (DATA1), \ + (unsigned int) (FLAGS))) + +/// Decrements the LWP programmed value sample event counter. If the result is +/// negative, inserts an event record into the LWP event ring buffer in memory +/// and advances the ring buffer pointer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LWPVAL instruction. +/// +/// \param DATA2 +/// A 32-bit value is zero-extended and inserted into the 64-bit Data2 field. +/// \param DATA1 +/// A 32-bit value is inserted into the 32-bit Data1 field. +/// \param FLAGS +/// A 32-bit immediate value is inserted into the 32-bit Flags field. +#define __lwpval32(DATA2, DATA1, FLAGS) \ + (__builtin_ia32_lwpval32((unsigned int) (DATA2), (unsigned int) (DATA1), \ + (unsigned int) (FLAGS))) + +#ifdef __x86_64__ + +/// Inserts programmed event record into the LWP event ring buffer +/// and advances the ring buffer pointer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LWPINS instruction. +/// +/// \param DATA2 +/// A 64-bit value is inserted into the 64-bit Data2 field. +/// \param DATA1 +/// A 32-bit value is inserted into the 32-bit Data1 field. +/// \param FLAGS +/// A 32-bit immediate value is inserted into the 32-bit Flags field. +/// \returns If the ring buffer is full and LWP is running in Synchronized Mode, +/// the event record overwrites the last record in the buffer, the MissedEvents +/// counter in the LWPCB is incremented, the head pointer is not advanced, and +/// 1 is returned. Otherwise 0 is returned. +#define __lwpins64(DATA2, DATA1, FLAGS) \ + (__builtin_ia32_lwpins64((unsigned long long) (DATA2), (unsigned int) (DATA1), \ + (unsigned int) (FLAGS))) + +/// Decrements the LWP programmed value sample event counter. If the result is +/// negative, inserts an event record into the LWP event ring buffer in memory +/// and advances the ring buffer pointer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the LWPVAL instruction. +/// +/// \param DATA2 +/// A 64-bit value is and inserted into the 64-bit Data2 field. +/// \param DATA1 +/// A 32-bit value is inserted into the 32-bit Data1 field. +/// \param FLAGS +/// A 32-bit immediate value is inserted into the 32-bit Flags field. +#define __lwpval64(DATA2, DATA1, FLAGS) \ + (__builtin_ia32_lwpval64((unsigned long long) (DATA2), (unsigned int) (DATA1), \ + (unsigned int) (FLAGS))) + +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif /* __LWPINTRIN_H */ diff --git a/llvm/lib/clang/19/include/lzcntintrin.h b/llvm/lib/clang/19/include/lzcntintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f4ddce9d0e6834ae11ce88a9341aae4778a235e6 --- /dev/null +++ b/llvm/lib/clang/19/include/lzcntintrin.h @@ -0,0 +1,104 @@ +/*===---- lzcntintrin.h - LZCNT intrinsics ---------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __LZCNTINTRIN_H +#define __LZCNTINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("lzcnt"))) + +#ifndef _MSC_VER +/// Counts the number of leading zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c LZCNT instruction. +/// +/// \param __X +/// An unsigned 16-bit integer whose leading zeros are to be counted. +/// \returns An unsigned 16-bit integer containing the number of leading zero +/// bits in the operand. +#define __lzcnt16(X) __builtin_ia32_lzcnt_u16((unsigned short)(X)) +#endif // _MSC_VER + +/// Counts the number of leading zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c LZCNT instruction. +/// +/// \param __X +/// An unsigned 32-bit integer whose leading zeros are to be counted. +/// \returns An unsigned 32-bit integer containing the number of leading zero +/// bits in the operand. +/// \see _lzcnt_u32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__lzcnt32(unsigned int __X) +{ + return __builtin_ia32_lzcnt_u32(__X); +} + +/// Counts the number of leading zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c LZCNT instruction. +/// +/// \param __X +/// An unsigned 32-bit integer whose leading zeros are to be counted. +/// \returns An unsigned 32-bit integer containing the number of leading zero +/// bits in the operand. +/// \see __lzcnt32 +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_lzcnt_u32(unsigned int __X) +{ + return __builtin_ia32_lzcnt_u32(__X); +} + +#ifdef __x86_64__ +#ifndef _MSC_VER +/// Counts the number of leading zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c LZCNT instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose leading zeros are to be counted. +/// \returns An unsigned 64-bit integer containing the number of leading zero +/// bits in the operand. +/// \see _lzcnt_u64 +#define __lzcnt64(X) __builtin_ia32_lzcnt_u64((unsigned long long)(X)) +#endif // _MSC_VER + +/// Counts the number of leading zero bits in the operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c LZCNT instruction. +/// +/// \param __X +/// An unsigned 64-bit integer whose leading zeros are to be counted. +/// \returns An unsigned 64-bit integer containing the number of leading zero +/// bits in the operand. +/// \see __lzcnt64 +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +_lzcnt_u64(unsigned long long __X) +{ + return __builtin_ia32_lzcnt_u64(__X); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif /* __LZCNTINTRIN_H */ diff --git a/llvm/lib/clang/19/include/mm3dnow.h b/llvm/lib/clang/19/include/mm3dnow.h new file mode 100644 index 0000000000000000000000000000000000000000..afffba3a9c75eb2ed75c8a4fa2ef41784f721b47 --- /dev/null +++ b/llvm/lib/clang/19/include/mm3dnow.h @@ -0,0 +1,22 @@ +/*===---- mm3dnow.h - 3DNow! intrinsics ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +// 3dNow intrinsics are no longer supported. + +#ifndef _MM3DNOW_H_INCLUDED +#define _MM3DNOW_H_INCLUDED + +#ifndef _CLANG_DISABLE_CRT_DEPRECATION_WARNINGS +#warning "The header is deprecated, and 3dNow! intrinsics are unsupported. For other intrinsics, include , instead." +#endif + +#include +#include + +#endif diff --git a/llvm/lib/clang/19/include/mm_malloc.h b/llvm/lib/clang/19/include/mm_malloc.h new file mode 100644 index 0000000000000000000000000000000000000000..d32fe594162774bbe3d88becbb0dea2556242bf4 --- /dev/null +++ b/llvm/lib/clang/19/include/mm_malloc.h @@ -0,0 +1,67 @@ +/*===---- mm_malloc.h - Allocating and Freeing Aligned Memory Blocks -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __MM_MALLOC_H +#define __MM_MALLOC_H + +#include + +#ifdef _WIN32 +#include +#else +#ifndef __cplusplus +extern int posix_memalign(void **__memptr, size_t __alignment, size_t __size); +#else +// Some systems (e.g. those with GNU libc) declare posix_memalign with an +// exception specifier. Via an "egregious workaround" in +// Sema::CheckEquivalentExceptionSpec, Clang accepts the following as a valid +// redeclaration of glibc's declaration. +extern "C" int posix_memalign(void **__memptr, size_t __alignment, size_t __size); +#endif +#endif + +#if !(defined(_WIN32) && defined(_mm_malloc)) +static __inline__ void *__attribute__((__always_inline__, __nodebug__, + __malloc__, __alloc_size__(1), + __alloc_align__(2))) +_mm_malloc(size_t __size, size_t __align) { + if (__align == 1) { + return malloc(__size); + } + + if (!(__align & (__align - 1)) && __align < sizeof(void *)) + __align = sizeof(void *); + + void *__mallocedMemory; +#if defined(__MINGW32__) + __mallocedMemory = __mingw_aligned_malloc(__size, __align); +#elif defined(_WIN32) + __mallocedMemory = _aligned_malloc(__size, __align); +#else + if (posix_memalign(&__mallocedMemory, __align, __size)) + return 0; +#endif + + return __mallocedMemory; +} + +static __inline__ void __attribute__((__always_inline__, __nodebug__)) +_mm_free(void *__p) +{ +#if defined(__MINGW32__) + __mingw_aligned_free(__p); +#elif defined(_WIN32) + _aligned_free(__p); +#else + free(__p); +#endif +} +#endif + +#endif /* __MM_MALLOC_H */ diff --git a/llvm/lib/clang/19/include/mmintrin.h b/llvm/lib/clang/19/include/mmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..4e154e2d85935303eddf0dbaf0f62c7401adc09d --- /dev/null +++ b/llvm/lib/clang/19/include/mmintrin.h @@ -0,0 +1,1556 @@ +/*===---- mmintrin.h - MMX intrinsics --------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __MMINTRIN_H +#define __MMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +typedef long long __m64 __attribute__((__vector_size__(8), __aligned__(8))); + +typedef long long __v1di __attribute__((__vector_size__(8))); +typedef int __v2si __attribute__((__vector_size__(8))); +typedef short __v4hi __attribute__((__vector_size__(8))); +typedef char __v8qi __attribute__((__vector_size__(8))); + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("mmx,no-evex512"), \ + __min_vector_width__(64))) + +/// Clears the MMX state by setting the state of the x87 stack registers +/// to empty. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the EMMS instruction. +/// +static __inline__ void __attribute__((__always_inline__, __nodebug__, + __target__("mmx,no-evex512"))) +_mm_empty(void) { + __builtin_ia32_emms(); +} + +/// Constructs a 64-bit integer vector, setting the lower 32 bits to the +/// value of the 32-bit integer parameter and setting the upper 32 bits to 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVD instruction. +/// +/// \param __i +/// A 32-bit integer value. +/// \returns A 64-bit integer vector. The lower 32 bits contain the value of the +/// parameter. The upper 32 bits are set to 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cvtsi32_si64(int __i) +{ + return (__m64)__builtin_ia32_vec_init_v2si(__i, 0); +} + +/// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit +/// signed integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVD instruction. +/// +/// \param __m +/// A 64-bit integer vector. +/// \returns A 32-bit signed integer value containing the lower 32 bits of the +/// parameter. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_cvtsi64_si32(__m64 __m) +{ + return __builtin_ia32_vec_ext_v2si((__v2si)__m, 0); +} + +/// Casts a 64-bit signed integer value into a 64-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVQ instruction. +/// +/// \param __i +/// A 64-bit signed integer. +/// \returns A 64-bit integer vector containing the same bitwise pattern as the +/// parameter. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cvtsi64_m64(long long __i) +{ + return (__m64)__i; +} + +/// Casts a 64-bit integer vector into a 64-bit signed integer value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVQ instruction. +/// +/// \param __m +/// A 64-bit integer vector. +/// \returns A 64-bit signed integer containing the same bitwise pattern as the +/// parameter. +static __inline__ long long __DEFAULT_FN_ATTRS +_mm_cvtm64_si64(__m64 __m) +{ + return (long long)__m; +} + +/// Converts, with saturation, 16-bit signed integers from both 64-bit integer +/// vector parameters of [4 x i16] into 8-bit signed integer values, and +/// constructs a 64-bit integer vector of [8 x i8] as the result. +/// +/// Positive values greater than 0x7F are saturated to 0x7F. Negative values +/// less than 0x80 are saturated to 0x80. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PACKSSWB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. The converted [4 x i8] values are +/// written to the lower 32 bits of the result. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. The converted [4 x i8] values are +/// written to the upper 32 bits of the result. +/// \returns A 64-bit integer vector of [8 x i8] containing the converted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_packs_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_packsswb((__v4hi)__m1, (__v4hi)__m2); +} + +/// Converts, with saturation, 32-bit signed integers from both 64-bit integer +/// vector parameters of [2 x i32] into 16-bit signed integer values, and +/// constructs a 64-bit integer vector of [4 x i16] as the result. +/// +/// Positive values greater than 0x7FFF are saturated to 0x7FFF. Negative +/// values less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PACKSSDW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32]. The converted [2 x i16] values are +/// written to the lower 32 bits of the result. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32]. The converted [2 x i16] values are +/// written to the upper 32 bits of the result. +/// \returns A 64-bit integer vector of [4 x i16] containing the converted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_packs_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_packssdw((__v2si)__m1, (__v2si)__m2); +} + +/// Converts, with saturation, 16-bit signed integers from both 64-bit integer +/// vector parameters of [4 x i16] into 8-bit unsigned integer values, and +/// constructs a 64-bit integer vector of [8 x i8] as the result. +/// +/// Values greater than 0xFF are saturated to 0xFF. Values less than 0 are +/// saturated to 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PACKUSWB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. The converted [4 x i8] values are +/// written to the lower 32 bits of the result. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. The converted [4 x i8] values are +/// written to the upper 32 bits of the result. +/// \returns A 64-bit integer vector of [8 x i8] containing the converted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_packs_pu16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_packuswb((__v4hi)__m1, (__v4hi)__m2); +} + +/// Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8] +/// and interleaves them into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PUNPCKHBW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. \n +/// Bits [39:32] are written to bits [7:0] of the result. \n +/// Bits [47:40] are written to bits [23:16] of the result. \n +/// Bits [55:48] are written to bits [39:32] of the result. \n +/// Bits [63:56] are written to bits [55:48] of the result. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// Bits [39:32] are written to bits [15:8] of the result. \n +/// Bits [47:40] are written to bits [31:24] of the result. \n +/// Bits [55:48] are written to bits [47:40] of the result. \n +/// Bits [63:56] are written to bits [63:56] of the result. +/// \returns A 64-bit integer vector of [8 x i8] containing the interleaved +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_unpackhi_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_punpckhbw((__v8qi)__m1, (__v8qi)__m2); +} + +/// Unpacks the upper 32 bits from two 64-bit integer vectors of +/// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PUNPCKHWD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// Bits [47:32] are written to bits [15:0] of the result. \n +/// Bits [63:48] are written to bits [47:32] of the result. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// Bits [47:32] are written to bits [31:16] of the result. \n +/// Bits [63:48] are written to bits [63:48] of the result. +/// \returns A 64-bit integer vector of [4 x i16] containing the interleaved +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_unpackhi_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_punpckhwd((__v4hi)__m1, (__v4hi)__m2); +} + +/// Unpacks the upper 32 bits from two 64-bit integer vectors of +/// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PUNPCKHDQ instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to +/// the lower 32 bits of the result. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to +/// the upper 32 bits of the result. +/// \returns A 64-bit integer vector of [2 x i32] containing the interleaved +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_unpackhi_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_punpckhdq((__v2si)__m1, (__v2si)__m2); +} + +/// Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8] +/// and interleaves them into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PUNPCKLBW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. +/// Bits [7:0] are written to bits [7:0] of the result. \n +/// Bits [15:8] are written to bits [23:16] of the result. \n +/// Bits [23:16] are written to bits [39:32] of the result. \n +/// Bits [31:24] are written to bits [55:48] of the result. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// Bits [7:0] are written to bits [15:8] of the result. \n +/// Bits [15:8] are written to bits [31:24] of the result. \n +/// Bits [23:16] are written to bits [47:40] of the result. \n +/// Bits [31:24] are written to bits [63:56] of the result. +/// \returns A 64-bit integer vector of [8 x i8] containing the interleaved +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_unpacklo_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_punpcklbw((__v8qi)__m1, (__v8qi)__m2); +} + +/// Unpacks the lower 32 bits from two 64-bit integer vectors of +/// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PUNPCKLWD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// Bits [15:0] are written to bits [15:0] of the result. \n +/// Bits [31:16] are written to bits [47:32] of the result. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// Bits [15:0] are written to bits [31:16] of the result. \n +/// Bits [31:16] are written to bits [63:48] of the result. +/// \returns A 64-bit integer vector of [4 x i16] containing the interleaved +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_unpacklo_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_punpcklwd((__v4hi)__m1, (__v4hi)__m2); +} + +/// Unpacks the lower 32 bits from two 64-bit integer vectors of +/// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PUNPCKLDQ instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to +/// the lower 32 bits of the result. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to +/// the upper 32 bits of the result. +/// \returns A 64-bit integer vector of [2 x i32] containing the interleaved +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_unpacklo_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_punpckldq((__v2si)__m1, (__v2si)__m2); +} + +/// Adds each 8-bit integer element of the first 64-bit integer vector +/// of [8 x i8] to the corresponding 8-bit integer element of the second +/// 64-bit integer vector of [8 x i8]. The lower 8 bits of the results are +/// packed into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// \returns A 64-bit integer vector of [8 x i8] containing the sums of both +/// parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_add_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Adds each 16-bit integer element of the first 64-bit integer vector +/// of [4 x i16] to the corresponding 16-bit integer element of the second +/// 64-bit integer vector of [4 x i16]. The lower 16 bits of the results are +/// packed into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the sums of both +/// parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_add_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Adds each 32-bit integer element of the first 64-bit integer vector +/// of [2 x i32] to the corresponding 32-bit integer element of the second +/// 64-bit integer vector of [2 x i32]. The lower 32 bits of the results are +/// packed into a 64-bit integer vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32]. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32]. +/// \returns A 64-bit integer vector of [2 x i32] containing the sums of both +/// parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_add_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddd((__v2si)__m1, (__v2si)__m2); +} + +/// Adds, with saturation, each 8-bit signed integer element of the first +/// 64-bit integer vector of [8 x i8] to the corresponding 8-bit signed +/// integer element of the second 64-bit integer vector of [8 x i8]. +/// +/// Positive sums greater than 0x7F are saturated to 0x7F. Negative sums +/// less than 0x80 are saturated to 0x80. The results are packed into a +/// 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDSB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// \returns A 64-bit integer vector of [8 x i8] containing the saturated sums +/// of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_adds_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddsb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Adds, with saturation, each 16-bit signed integer element of the first +/// 64-bit integer vector of [4 x i16] to the corresponding 16-bit signed +/// integer element of the second 64-bit integer vector of [4 x i16]. +/// +/// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums +/// less than 0x8000 are saturated to 0x8000. The results are packed into a +/// 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDSW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the saturated sums +/// of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_adds_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddsw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Adds, with saturation, each 8-bit unsigned integer element of the first +/// 64-bit integer vector of [8 x i8] to the corresponding 8-bit unsigned +/// integer element of the second 64-bit integer vector of [8 x i8]. +/// +/// Sums greater than 0xFF are saturated to 0xFF. The results are packed +/// into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDUSB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// \returns A 64-bit integer vector of [8 x i8] containing the saturated +/// unsigned sums of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_adds_pu8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddusb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Adds, with saturation, each 16-bit unsigned integer element of the first +/// 64-bit integer vector of [4 x i16] to the corresponding 16-bit unsigned +/// integer element of the second 64-bit integer vector of [4 x i16]. +/// +/// Sums greater than 0xFFFF are saturated to 0xFFFF. The results are packed +/// into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PADDUSW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the saturated +/// unsigned sums of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_adds_pu16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_paddusw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Subtracts each 8-bit integer element of the second 64-bit integer +/// vector of [8 x i8] from the corresponding 8-bit integer element of the +/// first 64-bit integer vector of [8 x i8]. The lower 8 bits of the results +/// are packed into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8] containing the subtrahends. +/// \returns A 64-bit integer vector of [8 x i8] containing the differences of +/// both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sub_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Subtracts each 16-bit integer element of the second 64-bit integer +/// vector of [4 x i16] from the corresponding 16-bit integer element of the +/// first 64-bit integer vector of [4 x i16]. The lower 16 bits of the +/// results are packed into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16] containing the subtrahends. +/// \returns A 64-bit integer vector of [4 x i16] containing the differences of +/// both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sub_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Subtracts each 32-bit integer element of the second 64-bit integer +/// vector of [2 x i32] from the corresponding 32-bit integer element of the +/// first 64-bit integer vector of [2 x i32]. The lower 32 bits of the +/// results are packed into a 64-bit integer vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32] containing the subtrahends. +/// \returns A 64-bit integer vector of [2 x i32] containing the differences of +/// both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sub_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubd((__v2si)__m1, (__v2si)__m2); +} + +/// Subtracts, with saturation, each 8-bit signed integer element of the second +/// 64-bit integer vector of [8 x i8] from the corresponding 8-bit signed +/// integer element of the first 64-bit integer vector of [8 x i8]. +/// +/// Positive results greater than 0x7F are saturated to 0x7F. Negative +/// results less than 0x80 are saturated to 0x80. The results are packed +/// into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBSB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8] containing the subtrahends. +/// \returns A 64-bit integer vector of [8 x i8] containing the saturated +/// differences of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_subs_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubsb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Subtracts, with saturation, each 16-bit signed integer element of the +/// second 64-bit integer vector of [4 x i16] from the corresponding 16-bit +/// signed integer element of the first 64-bit integer vector of [4 x i16]. +/// +/// Positive results greater than 0x7FFF are saturated to 0x7FFF. Negative +/// results less than 0x8000 are saturated to 0x8000. The results are packed +/// into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBSW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16] containing the subtrahends. +/// \returns A 64-bit integer vector of [4 x i16] containing the saturated +/// differences of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_subs_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubsw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Subtracts each 8-bit unsigned integer element of the second 64-bit +/// integer vector of [8 x i8] from the corresponding 8-bit unsigned integer +/// element of the first 64-bit integer vector of [8 x i8]. +/// +/// If an element of the first vector is less than the corresponding element +/// of the second vector, the result is saturated to 0. The results are +/// packed into a 64-bit integer vector of [8 x i8]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBUSB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8] containing the subtrahends. +/// \returns A 64-bit integer vector of [8 x i8] containing the saturated +/// differences of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_subs_pu8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubusb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Subtracts each 16-bit unsigned integer element of the second 64-bit +/// integer vector of [4 x i16] from the corresponding 16-bit unsigned +/// integer element of the first 64-bit integer vector of [4 x i16]. +/// +/// If an element of the first vector is less than the corresponding element +/// of the second vector, the result is saturated to 0. The results are +/// packed into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSUBUSW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16] containing the minuends. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16] containing the subtrahends. +/// \returns A 64-bit integer vector of [4 x i16] containing the saturated +/// differences of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_subs_pu16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_psubusw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Multiplies each 16-bit signed integer element of the first 64-bit +/// integer vector of [4 x i16] by the corresponding 16-bit signed integer +/// element of the second 64-bit integer vector of [4 x i16] and get four +/// 32-bit products. Adds adjacent pairs of products to get two 32-bit sums. +/// The lower 32 bits of these two sums are packed into a 64-bit integer +/// vector of [2 x i32]. +/// +/// For example, bits [15:0] of both parameters are multiplied, bits [31:16] +/// of both parameters are multiplied, and the sum of both results is written +/// to bits [31:0] of the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMADDWD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [2 x i32] containing the sums of +/// products of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_madd_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pmaddwd((__v4hi)__m1, (__v4hi)__m2); +} + +/// Multiplies each 16-bit signed integer element of the first 64-bit +/// integer vector of [4 x i16] by the corresponding 16-bit signed integer +/// element of the second 64-bit integer vector of [4 x i16]. Packs the upper +/// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMULHW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits +/// of the products of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_mulhi_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pmulhw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Multiplies each 16-bit signed integer element of the first 64-bit +/// integer vector of [4 x i16] by the corresponding 16-bit signed integer +/// element of the second 64-bit integer vector of [4 x i16]. Packs the lower +/// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMULLW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the lower 16 bits +/// of the products of both parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_mullo_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pmullw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Left-shifts each 16-bit signed integer element of the first +/// parameter, which is a 64-bit integer vector of [4 x i16], by the number +/// of bits specified by the second parameter, which is a 64-bit integer. The +/// lower 16 bits of the results are packed into a 64-bit integer vector of +/// [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSLLW instruction. +/// +/// \param __m +/// A 64-bit integer vector of [4 x i16]. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted +/// values. If \a __count is greater or equal to 16, the result is set to all +/// 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sll_pi16(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psllw((__v4hi)__m, __count); +} + +/// Left-shifts each 16-bit signed integer element of a 64-bit integer +/// vector of [4 x i16] by the number of bits specified by a 32-bit integer. +/// The lower 16 bits of the results are packed into a 64-bit integer vector +/// of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSLLW instruction. +/// +/// \param __m +/// A 64-bit integer vector of [4 x i16]. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted +/// values. If \a __count is greater or equal to 16, the result is set to all +/// 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_slli_pi16(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psllwi((__v4hi)__m, __count); +} + +/// Left-shifts each 32-bit signed integer element of the first +/// parameter, which is a 64-bit integer vector of [2 x i32], by the number +/// of bits specified by the second parameter, which is a 64-bit integer. The +/// lower 32 bits of the results are packed into a 64-bit integer vector of +/// [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSLLD instruction. +/// +/// \param __m +/// A 64-bit integer vector of [2 x i32]. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted +/// values. If \a __count is greater or equal to 32, the result is set to all +/// 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sll_pi32(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_pslld((__v2si)__m, __count); +} + +/// Left-shifts each 32-bit signed integer element of a 64-bit integer +/// vector of [2 x i32] by the number of bits specified by a 32-bit integer. +/// The lower 32 bits of the results are packed into a 64-bit integer vector +/// of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSLLD instruction. +/// +/// \param __m +/// A 64-bit integer vector of [2 x i32]. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted +/// values. If \a __count is greater or equal to 32, the result is set to all +/// 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_slli_pi32(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_pslldi((__v2si)__m, __count); +} + +/// Left-shifts the first 64-bit integer parameter by the number of bits +/// specified by the second 64-bit integer parameter. The lower 64 bits of +/// result are returned. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSLLQ instruction. +/// +/// \param __m +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector containing the left-shifted value. If +/// \a __count is greater or equal to 64, the result is set to 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sll_si64(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psllq((__v1di)__m, __count); +} + +/// Left-shifts the first parameter, which is a 64-bit integer, by the +/// number of bits specified by the second parameter, which is a 32-bit +/// integer. The lower 64 bits of result are returned. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSLLQ instruction. +/// +/// \param __m +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector containing the left-shifted value. If +/// \a __count is greater or equal to 64, the result is set to 0. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_slli_si64(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psllqi((__v1di)__m, __count); +} + +/// Right-shifts each 16-bit integer element of the first parameter, +/// which is a 64-bit integer vector of [4 x i16], by the number of bits +/// specified by the second parameter, which is a 64-bit integer. +/// +/// High-order bits are filled with the sign bit of the initial value of each +/// 16-bit element. The 16-bit results are packed into a 64-bit integer +/// vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRAW instruction. +/// +/// \param __m +/// A 64-bit integer vector of [4 x i16]. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sra_pi16(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psraw((__v4hi)__m, __count); +} + +/// Right-shifts each 16-bit integer element of a 64-bit integer vector +/// of [4 x i16] by the number of bits specified by a 32-bit integer. +/// +/// High-order bits are filled with the sign bit of the initial value of each +/// 16-bit element. The 16-bit results are packed into a 64-bit integer +/// vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRAW instruction. +/// +/// \param __m +/// A 64-bit integer vector of [4 x i16]. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srai_pi16(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psrawi((__v4hi)__m, __count); +} + +/// Right-shifts each 32-bit integer element of the first parameter, +/// which is a 64-bit integer vector of [2 x i32], by the number of bits +/// specified by the second parameter, which is a 64-bit integer. +/// +/// High-order bits are filled with the sign bit of the initial value of each +/// 32-bit element. The 32-bit results are packed into a 64-bit integer +/// vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRAD instruction. +/// +/// \param __m +/// A 64-bit integer vector of [2 x i32]. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_sra_pi32(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psrad((__v2si)__m, __count); +} + +/// Right-shifts each 32-bit integer element of a 64-bit integer vector +/// of [2 x i32] by the number of bits specified by a 32-bit integer. +/// +/// High-order bits are filled with the sign bit of the initial value of each +/// 32-bit element. The 32-bit results are packed into a 64-bit integer +/// vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRAD instruction. +/// +/// \param __m +/// A 64-bit integer vector of [2 x i32]. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srai_pi32(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psradi((__v2si)__m, __count); +} + +/// Right-shifts each 16-bit integer element of the first parameter, +/// which is a 64-bit integer vector of [4 x i16], by the number of bits +/// specified by the second parameter, which is a 64-bit integer. +/// +/// High-order bits are cleared. The 16-bit results are packed into a 64-bit +/// integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRLW instruction. +/// +/// \param __m +/// A 64-bit integer vector of [4 x i16]. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srl_pi16(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psrlw((__v4hi)__m, __count); +} + +/// Right-shifts each 16-bit integer element of a 64-bit integer vector +/// of [4 x i16] by the number of bits specified by a 32-bit integer. +/// +/// High-order bits are cleared. The 16-bit results are packed into a 64-bit +/// integer vector of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRLW instruction. +/// +/// \param __m +/// A 64-bit integer vector of [4 x i16]. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srli_pi16(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psrlwi((__v4hi)__m, __count); +} + +/// Right-shifts each 32-bit integer element of the first parameter, +/// which is a 64-bit integer vector of [2 x i32], by the number of bits +/// specified by the second parameter, which is a 64-bit integer. +/// +/// High-order bits are cleared. The 32-bit results are packed into a 64-bit +/// integer vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRLD instruction. +/// +/// \param __m +/// A 64-bit integer vector of [2 x i32]. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srl_pi32(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psrld((__v2si)__m, __count); +} + +/// Right-shifts each 32-bit integer element of a 64-bit integer vector +/// of [2 x i32] by the number of bits specified by a 32-bit integer. +/// +/// High-order bits are cleared. The 32-bit results are packed into a 64-bit +/// integer vector of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRLD instruction. +/// +/// \param __m +/// A 64-bit integer vector of [2 x i32]. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srli_pi32(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psrldi((__v2si)__m, __count); +} + +/// Right-shifts the first 64-bit integer parameter by the number of bits +/// specified by the second 64-bit integer parameter. +/// +/// High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRLQ instruction. +/// +/// \param __m +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \param __count +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \returns A 64-bit integer vector containing the right-shifted value. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srl_si64(__m64 __m, __m64 __count) +{ + return (__m64)__builtin_ia32_psrlq((__v1di)__m, __count); +} + +/// Right-shifts the first parameter, which is a 64-bit integer, by the +/// number of bits specified by the second parameter, which is a 32-bit +/// integer. +/// +/// High-order bits are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSRLQ instruction. +/// +/// \param __m +/// A 64-bit integer vector interpreted as a single 64-bit integer. +/// \param __count +/// A 32-bit integer value. +/// \returns A 64-bit integer vector containing the right-shifted value. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_srli_si64(__m64 __m, int __count) +{ + return (__m64)__builtin_ia32_psrlqi((__v1di)__m, __count); +} + +/// Performs a bitwise AND of two 64-bit integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PAND instruction. +/// +/// \param __m1 +/// A 64-bit integer vector. +/// \param __m2 +/// A 64-bit integer vector. +/// \returns A 64-bit integer vector containing the bitwise AND of both +/// parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_and_si64(__m64 __m1, __m64 __m2) +{ + return __builtin_ia32_pand((__v1di)__m1, (__v1di)__m2); +} + +/// Performs a bitwise NOT of the first 64-bit integer vector, and then +/// performs a bitwise AND of the intermediate result and the second 64-bit +/// integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PANDN instruction. +/// +/// \param __m1 +/// A 64-bit integer vector. The one's complement of this parameter is used +/// in the bitwise AND. +/// \param __m2 +/// A 64-bit integer vector. +/// \returns A 64-bit integer vector containing the bitwise AND of the second +/// parameter and the one's complement of the first parameter. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_andnot_si64(__m64 __m1, __m64 __m2) +{ + return __builtin_ia32_pandn((__v1di)__m1, (__v1di)__m2); +} + +/// Performs a bitwise OR of two 64-bit integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the POR instruction. +/// +/// \param __m1 +/// A 64-bit integer vector. +/// \param __m2 +/// A 64-bit integer vector. +/// \returns A 64-bit integer vector containing the bitwise OR of both +/// parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_or_si64(__m64 __m1, __m64 __m2) +{ + return __builtin_ia32_por((__v1di)__m1, (__v1di)__m2); +} + +/// Performs a bitwise exclusive OR of two 64-bit integer vectors. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PXOR instruction. +/// +/// \param __m1 +/// A 64-bit integer vector. +/// \param __m2 +/// A 64-bit integer vector. +/// \returns A 64-bit integer vector containing the bitwise exclusive OR of both +/// parameters. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_xor_si64(__m64 __m1, __m64 __m2) +{ + return __builtin_ia32_pxor((__v1di)__m1, (__v1di)__m2); +} + +/// Compares the 8-bit integer elements of two 64-bit integer vectors of +/// [8 x i8] to determine if the element of the first vector is equal to the +/// corresponding element of the second vector. +/// +/// Each comparison returns 0 for false, 0xFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PCMPEQB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// \returns A 64-bit integer vector of [8 x i8] containing the comparison +/// results. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cmpeq_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pcmpeqb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Compares the 16-bit integer elements of two 64-bit integer vectors of +/// [4 x i16] to determine if the element of the first vector is equal to the +/// corresponding element of the second vector. +/// +/// Each comparison returns 0 for false, 0xFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PCMPEQW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the comparison +/// results. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cmpeq_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pcmpeqw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Compares the 32-bit integer elements of two 64-bit integer vectors of +/// [2 x i32] to determine if the element of the first vector is equal to the +/// corresponding element of the second vector. +/// +/// Each comparison returns 0 for false, 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PCMPEQD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32]. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32]. +/// \returns A 64-bit integer vector of [2 x i32] containing the comparison +/// results. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cmpeq_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pcmpeqd((__v2si)__m1, (__v2si)__m2); +} + +/// Compares the 8-bit integer elements of two 64-bit integer vectors of +/// [8 x i8] to determine if the element of the first vector is greater than +/// the corresponding element of the second vector. +/// +/// Each comparison returns 0 for false, 0xFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PCMPGTB instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [8 x i8]. +/// \param __m2 +/// A 64-bit integer vector of [8 x i8]. +/// \returns A 64-bit integer vector of [8 x i8] containing the comparison +/// results. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cmpgt_pi8(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pcmpgtb((__v8qi)__m1, (__v8qi)__m2); +} + +/// Compares the 16-bit integer elements of two 64-bit integer vectors of +/// [4 x i16] to determine if the element of the first vector is greater than +/// the corresponding element of the second vector. +/// +/// Each comparison returns 0 for false, 0xFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PCMPGTW instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [4 x i16]. +/// \param __m2 +/// A 64-bit integer vector of [4 x i16]. +/// \returns A 64-bit integer vector of [4 x i16] containing the comparison +/// results. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cmpgt_pi16(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pcmpgtw((__v4hi)__m1, (__v4hi)__m2); +} + +/// Compares the 32-bit integer elements of two 64-bit integer vectors of +/// [2 x i32] to determine if the element of the first vector is greater than +/// the corresponding element of the second vector. +/// +/// Each comparison returns 0 for false, 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PCMPGTD instruction. +/// +/// \param __m1 +/// A 64-bit integer vector of [2 x i32]. +/// \param __m2 +/// A 64-bit integer vector of [2 x i32]. +/// \returns A 64-bit integer vector of [2 x i32] containing the comparison +/// results. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_cmpgt_pi32(__m64 __m1, __m64 __m2) +{ + return (__m64)__builtin_ia32_pcmpgtd((__v2si)__m1, (__v2si)__m2); +} + +/// Constructs a 64-bit integer vector initialized to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PXOR instruction. +/// +/// \returns An initialized 64-bit integer vector with all elements set to zero. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_setzero_si64(void) +{ + return __extension__ (__m64){ 0LL }; +} + +/// Constructs a 64-bit integer vector initialized with the specified +/// 32-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i1 +/// A 32-bit integer value used to initialize the upper 32 bits of the +/// result. +/// \param __i0 +/// A 32-bit integer value used to initialize the lower 32 bits of the +/// result. +/// \returns An initialized 64-bit integer vector. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_set_pi32(int __i1, int __i0) +{ + return (__m64)__builtin_ia32_vec_init_v2si(__i0, __i1); +} + +/// Constructs a 64-bit integer vector initialized with the specified +/// 16-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __s3 +/// A 16-bit integer value used to initialize bits [63:48] of the result. +/// \param __s2 +/// A 16-bit integer value used to initialize bits [47:32] of the result. +/// \param __s1 +/// A 16-bit integer value used to initialize bits [31:16] of the result. +/// \param __s0 +/// A 16-bit integer value used to initialize bits [15:0] of the result. +/// \returns An initialized 64-bit integer vector. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_set_pi16(short __s3, short __s2, short __s1, short __s0) +{ + return (__m64)__builtin_ia32_vec_init_v4hi(__s0, __s1, __s2, __s3); +} + +/// Constructs a 64-bit integer vector initialized with the specified +/// 8-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b7 +/// An 8-bit integer value used to initialize bits [63:56] of the result. +/// \param __b6 +/// An 8-bit integer value used to initialize bits [55:48] of the result. +/// \param __b5 +/// An 8-bit integer value used to initialize bits [47:40] of the result. +/// \param __b4 +/// An 8-bit integer value used to initialize bits [39:32] of the result. +/// \param __b3 +/// An 8-bit integer value used to initialize bits [31:24] of the result. +/// \param __b2 +/// An 8-bit integer value used to initialize bits [23:16] of the result. +/// \param __b1 +/// An 8-bit integer value used to initialize bits [15:8] of the result. +/// \param __b0 +/// An 8-bit integer value used to initialize bits [7:0] of the result. +/// \returns An initialized 64-bit integer vector. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, + char __b1, char __b0) +{ + return (__m64)__builtin_ia32_vec_init_v8qi(__b0, __b1, __b2, __b3, + __b4, __b5, __b6, __b7); +} + +/// Constructs a 64-bit integer vector of [2 x i32], with each of the +/// 32-bit integer vector elements set to the specified 32-bit integer +/// value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i +/// A 32-bit integer value used to initialize each vector element of the +/// result. +/// \returns An initialized 64-bit integer vector of [2 x i32]. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_set1_pi32(int __i) +{ + return _mm_set_pi32(__i, __i); +} + +/// Constructs a 64-bit integer vector of [4 x i16], with each of the +/// 16-bit integer vector elements set to the specified 16-bit integer +/// value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w +/// A 16-bit integer value used to initialize each vector element of the +/// result. +/// \returns An initialized 64-bit integer vector of [4 x i16]. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_set1_pi16(short __w) +{ + return _mm_set_pi16(__w, __w, __w, __w); +} + +/// Constructs a 64-bit integer vector of [8 x i8], with each of the +/// 8-bit integer vector elements set to the specified 8-bit integer value. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b +/// An 8-bit integer value used to initialize each vector element of the +/// result. +/// \returns An initialized 64-bit integer vector of [8 x i8]. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_set1_pi8(char __b) +{ + return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b); +} + +/// Constructs a 64-bit integer vector, initialized in reverse order with +/// the specified 32-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __i0 +/// A 32-bit integer value used to initialize the lower 32 bits of the +/// result. +/// \param __i1 +/// A 32-bit integer value used to initialize the upper 32 bits of the +/// result. +/// \returns An initialized 64-bit integer vector. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_setr_pi32(int __i0, int __i1) +{ + return _mm_set_pi32(__i1, __i0); +} + +/// Constructs a 64-bit integer vector, initialized in reverse order with +/// the specified 16-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __w0 +/// A 16-bit integer value used to initialize bits [15:0] of the result. +/// \param __w1 +/// A 16-bit integer value used to initialize bits [31:16] of the result. +/// \param __w2 +/// A 16-bit integer value used to initialize bits [47:32] of the result. +/// \param __w3 +/// A 16-bit integer value used to initialize bits [63:48] of the result. +/// \returns An initialized 64-bit integer vector. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) +{ + return _mm_set_pi16(__w3, __w2, __w1, __w0); +} + +/// Constructs a 64-bit integer vector, initialized in reverse order with +/// the specified 8-bit integer values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __b0 +/// An 8-bit integer value used to initialize bits [7:0] of the result. +/// \param __b1 +/// An 8-bit integer value used to initialize bits [15:8] of the result. +/// \param __b2 +/// An 8-bit integer value used to initialize bits [23:16] of the result. +/// \param __b3 +/// An 8-bit integer value used to initialize bits [31:24] of the result. +/// \param __b4 +/// An 8-bit integer value used to initialize bits [39:32] of the result. +/// \param __b5 +/// An 8-bit integer value used to initialize bits [47:40] of the result. +/// \param __b6 +/// An 8-bit integer value used to initialize bits [55:48] of the result. +/// \param __b7 +/// An 8-bit integer value used to initialize bits [63:56] of the result. +/// \returns An initialized 64-bit integer vector. +static __inline__ __m64 __DEFAULT_FN_ATTRS +_mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, + char __b6, char __b7) +{ + return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0); +} + +#undef __DEFAULT_FN_ATTRS + +/* Aliases for compatibility. */ +#define _m_empty _mm_empty +#define _m_from_int _mm_cvtsi32_si64 +#define _m_from_int64 _mm_cvtsi64_m64 +#define _m_to_int _mm_cvtsi64_si32 +#define _m_to_int64 _mm_cvtm64_si64 +#define _m_packsswb _mm_packs_pi16 +#define _m_packssdw _mm_packs_pi32 +#define _m_packuswb _mm_packs_pu16 +#define _m_punpckhbw _mm_unpackhi_pi8 +#define _m_punpckhwd _mm_unpackhi_pi16 +#define _m_punpckhdq _mm_unpackhi_pi32 +#define _m_punpcklbw _mm_unpacklo_pi8 +#define _m_punpcklwd _mm_unpacklo_pi16 +#define _m_punpckldq _mm_unpacklo_pi32 +#define _m_paddb _mm_add_pi8 +#define _m_paddw _mm_add_pi16 +#define _m_paddd _mm_add_pi32 +#define _m_paddsb _mm_adds_pi8 +#define _m_paddsw _mm_adds_pi16 +#define _m_paddusb _mm_adds_pu8 +#define _m_paddusw _mm_adds_pu16 +#define _m_psubb _mm_sub_pi8 +#define _m_psubw _mm_sub_pi16 +#define _m_psubd _mm_sub_pi32 +#define _m_psubsb _mm_subs_pi8 +#define _m_psubsw _mm_subs_pi16 +#define _m_psubusb _mm_subs_pu8 +#define _m_psubusw _mm_subs_pu16 +#define _m_pmaddwd _mm_madd_pi16 +#define _m_pmulhw _mm_mulhi_pi16 +#define _m_pmullw _mm_mullo_pi16 +#define _m_psllw _mm_sll_pi16 +#define _m_psllwi _mm_slli_pi16 +#define _m_pslld _mm_sll_pi32 +#define _m_pslldi _mm_slli_pi32 +#define _m_psllq _mm_sll_si64 +#define _m_psllqi _mm_slli_si64 +#define _m_psraw _mm_sra_pi16 +#define _m_psrawi _mm_srai_pi16 +#define _m_psrad _mm_sra_pi32 +#define _m_psradi _mm_srai_pi32 +#define _m_psrlw _mm_srl_pi16 +#define _m_psrlwi _mm_srli_pi16 +#define _m_psrld _mm_srl_pi32 +#define _m_psrldi _mm_srli_pi32 +#define _m_psrlq _mm_srl_si64 +#define _m_psrlqi _mm_srli_si64 +#define _m_pand _mm_and_si64 +#define _m_pandn _mm_andnot_si64 +#define _m_por _mm_or_si64 +#define _m_pxor _mm_xor_si64 +#define _m_pcmpeqb _mm_cmpeq_pi8 +#define _m_pcmpeqw _mm_cmpeq_pi16 +#define _m_pcmpeqd _mm_cmpeq_pi32 +#define _m_pcmpgtb _mm_cmpgt_pi8 +#define _m_pcmpgtw _mm_cmpgt_pi16 +#define _m_pcmpgtd _mm_cmpgt_pi32 + +#endif /* __MMINTRIN_H */ + diff --git a/llvm/lib/clang/19/include/module.modulemap b/llvm/lib/clang/19/include/module.modulemap new file mode 100644 index 0000000000000000000000000000000000000000..9ffc249c8d1a23961f2c044e2319abe63960810d --- /dev/null +++ b/llvm/lib/clang/19/include/module.modulemap @@ -0,0 +1,330 @@ +/*===---- module.modulemap - intrinsics module map -------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +module _Builtin_intrinsics [system] [extern_c] { + explicit module altivec { + requires altivec + header "altivec.h" + } + + explicit module arm { + requires arm + + explicit module acle { + header "arm_acle.h" + export * + } + + explicit module neon { + requires neon + header "arm_neon.h" + header "arm_fp16.h" + export * + } + + explicit module sve { + requires sve + header "arm_sve.h" + export * + } + } + + explicit module intel { + requires x86 + export * + + header "immintrin.h" + textual header "f16cintrin.h" + textual header "avxintrin.h" + textual header "avx2intrin.h" + textual header "avx512fintrin.h" + textual header "fmaintrin.h" + + header "x86intrin.h" + textual header "bmiintrin.h" + textual header "bmi2intrin.h" + textual header "lzcntintrin.h" + textual header "xopintrin.h" + textual header "fma4intrin.h" + textual header "mwaitxintrin.h" + textual header "clzerointrin.h" + textual header "wbnoinvdintrin.h" + textual header "cldemoteintrin.h" + textual header "waitpkgintrin.h" + textual header "movdirintrin.h" + textual header "pconfigintrin.h" + textual header "sgxintrin.h" + textual header "ptwriteintrin.h" + textual header "invpcidintrin.h" + + textual header "__wmmintrin_aes.h" + textual header "__wmmintrin_pclmul.h" + + explicit module mm_malloc { + requires !freestanding + header "mm_malloc.h" + export * // note: for dependency + } + + explicit module cpuid { + requires gnuinlineasm + header "cpuid.h" + } + + explicit module mmx { + header "mmintrin.h" + } + + explicit module sse { + export mm_malloc + export mmx + export sse2 // note: for hackish dependency + header "xmmintrin.h" + } + + explicit module sse2 { + export sse + header "emmintrin.h" + } + + explicit module sse3 { + export sse2 + header "pmmintrin.h" + } + + explicit module ssse3 { + export sse3 + header "tmmintrin.h" + } + + explicit module sse4_1 { + export ssse3 + header "smmintrin.h" + } + + explicit module sse4_2 { + export sse4_1 + header "nmmintrin.h" + } + + explicit module sse4a { + export sse3 + header "ammintrin.h" + } + + explicit module popcnt { + header "popcntintrin.h" + } + + explicit module mm3dnow { + header "mm3dnow.h" + } + + explicit module aes_pclmul { + header "wmmintrin.h" + export aes + export pclmul + } + } + + explicit module systemz { + requires systemz + export * + + header "s390intrin.h" + + explicit module htm { + requires htm + header "htmintrin.h" + header "htmxlintrin.h" + } + + explicit module zvector { + requires zvector, vx + header "vecintrin.h" + } + } +} + +// Start -fbuiltin-headers-in-system-modules affected modules + +// The following modules all ignore their headers when +// -fbuiltin-headers-in-system-modules is passed, and many of +// those headers join system modules when present. + +// e.g. if -fbuiltin-headers-in-system-modules is passed, then +// float.h will not be in the _Builtin_float module (that module +// will be empty). If there is a system module that declares +// `header "float.h"`, then the builtin float.h will join +// that module. The system float.h (if present) will be treated +// as a textual header in the sytem module. +module _Builtin_float [system] { + header "float.h" + export * +} + +module _Builtin_inttypes [system] { + header "inttypes.h" + export * +} + +module _Builtin_iso646 [system] { + header "iso646.h" + export * +} + +module _Builtin_limits [system] { + header "limits.h" + export * +} + +module _Builtin_stdalign [system] { + header "stdalign.h" + export * +} + +module _Builtin_stdarg [system] { + textual header "stdarg.h" + + explicit module __gnuc_va_list { + header "__stdarg___gnuc_va_list.h" + export * + } + + explicit module __va_copy { + header "__stdarg___va_copy.h" + export * + } + + explicit module header_macro { + header "__stdarg_header_macro.h" + export * + } + + explicit module va_arg { + header "__stdarg_va_arg.h" + export * + } + + explicit module va_copy { + header "__stdarg_va_copy.h" + export * + } + + explicit module va_list { + header "__stdarg_va_list.h" + export * + } +} + +module _Builtin_stdatomic [system] { + header "stdatomic.h" + export * +} + +module _Builtin_stdbool [system] { + header "stdbool.h" + export * +} + +module _Builtin_stddef [system] { + textual header "stddef.h" + + explicit module header_macro { + header "__stddef_header_macro.h" + export * + } + // __stddef_max_align_t.h is always in this module, even if + // -fbuiltin-headers-in-system-modules is passed. + explicit module max_align_t { + header "__stddef_max_align_t.h" + export * + } + + explicit module null { + header "__stddef_null.h" + export * + } + + explicit module nullptr_t { + header "__stddef_nullptr_t.h" + export * + } + + explicit module offsetof { + header "__stddef_offsetof.h" + export * + } + + explicit module ptrdiff_t { + header "__stddef_ptrdiff_t.h" + export * + } + + explicit module rsize_t { + header "__stddef_rsize_t.h" + export * + } + + explicit module size_t { + header "__stddef_size_t.h" + export * + } + + explicit module unreachable { + header "__stddef_unreachable.h" + export * + } + + explicit module wchar_t { + header "__stddef_wchar_t.h" + export * + } +} + +// wint_t is provided by and not . It's here +// for compatibility, but must be explicitly requested. Therefore +// __stddef_wint_t.h is not part of _Builtin_stddef. It is always in +// this module even if -fbuiltin-headers-in-system-modules is passed. +module _Builtin_stddef_wint_t [system] { + header "__stddef_wint_t.h" + export * +} + +module _Builtin_stdint [system] { + header "stdint.h" + export * +} + +module _Builtin_stdnoreturn [system] { + header "stdnoreturn.h" + export * +} + +module _Builtin_tgmath [system] { + header "tgmath.h" + export * +} + +module _Builtin_unwind [system] { + header "unwind.h" + export * +} +// End -fbuiltin-headers-in-system-modules affected modules + +module opencl_c { + requires opencl + header "opencl-c.h" + header "opencl-c-base.h" +} + +module ptrauth { + header "ptrauth.h" + export * +} diff --git a/llvm/lib/clang/19/include/movdirintrin.h b/llvm/lib/clang/19/include/movdirintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..30c4d02c832d1d0e5847913bb36b1740cfc5701d --- /dev/null +++ b/llvm/lib/clang/19/include/movdirintrin.h @@ -0,0 +1,49 @@ +/*===------------------------- movdirintrin.h ------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef _MOVDIRINTRIN_H +#define _MOVDIRINTRIN_H + +/* Move doubleword as direct store */ +static __inline__ void +__attribute__((__always_inline__, __nodebug__, __target__("movdiri"))) +_directstoreu_u32 (void *__dst, unsigned int __value) +{ + __builtin_ia32_directstore_u32((unsigned int *)__dst, (unsigned int)__value); +} + +#ifdef __x86_64__ + +/* Move quadword as direct store */ +static __inline__ void +__attribute__((__always_inline__, __nodebug__, __target__("movdiri"))) +_directstoreu_u64 (void *__dst, unsigned long __value) +{ + __builtin_ia32_directstore_u64((unsigned long *)__dst, __value); +} + +#endif /* __x86_64__ */ + +/* + * movdir64b - Move 64 bytes as direct store. + * The destination must be 64 byte aligned, and the store is atomic. + * The source address has no alignment requirement, and the load from + * the source address is not atomic. + */ +static __inline__ void +__attribute__((__always_inline__, __nodebug__, __target__("movdir64b"))) +_movdir64b (void *__dst __attribute__((align_value(64))), const void *__src) +{ + __builtin_ia32_movdir64b(__dst, __src); +} + +#endif /* _MOVDIRINTRIN_H */ diff --git a/llvm/lib/clang/19/include/msa.h b/llvm/lib/clang/19/include/msa.h new file mode 100644 index 0000000000000000000000000000000000000000..0ca4900870f1f7183bd6413f6c4d66a70ffd8eab --- /dev/null +++ b/llvm/lib/clang/19/include/msa.h @@ -0,0 +1,573 @@ +/*===---- msa.h - MIPS MSA intrinsics --------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _MSA_H +#define _MSA_H 1 + +#if defined(__mips_msa) +typedef signed char v16i8 __attribute__((vector_size(16), aligned(16))); +typedef signed char v16i8_b __attribute__((vector_size(16), aligned(1))); +typedef unsigned char v16u8 __attribute__((vector_size(16), aligned(16))); +typedef unsigned char v16u8_b __attribute__((vector_size(16), aligned(1))); +typedef short v8i16 __attribute__((vector_size(16), aligned(16))); +typedef short v8i16_h __attribute__((vector_size(16), aligned(2))); +typedef unsigned short v8u16 __attribute__((vector_size(16), aligned(16))); +typedef unsigned short v8u16_h __attribute__((vector_size(16), aligned(2))); +typedef int v4i32 __attribute__((vector_size(16), aligned(16))); +typedef int v4i32_w __attribute__((vector_size(16), aligned(4))); +typedef unsigned int v4u32 __attribute__((vector_size(16), aligned(16))); +typedef unsigned int v4u32_w __attribute__((vector_size(16), aligned(4))); +typedef long long v2i64 __attribute__((vector_size(16), aligned(16))); +typedef long long v2i64_d __attribute__((vector_size(16), aligned(8))); +typedef unsigned long long v2u64 __attribute__((vector_size(16), aligned(16))); +typedef unsigned long long v2u64_d __attribute__((vector_size(16), aligned(8))); +typedef float v4f32 __attribute__((vector_size(16), aligned(16))); +typedef float v4f32_w __attribute__((vector_size(16), aligned(4))); +typedef double v2f64 __attribute__ ((vector_size(16), aligned(16))); +typedef double v2f64_d __attribute__ ((vector_size(16), aligned(8))); + +#define __msa_sll_b __builtin_msa_sll_b +#define __msa_sll_h __builtin_msa_sll_h +#define __msa_sll_w __builtin_msa_sll_w +#define __msa_sll_d __builtin_msa_sll_d +#define __msa_slli_b __builtin_msa_slli_b +#define __msa_slli_h __builtin_msa_slli_h +#define __msa_slli_w __builtin_msa_slli_w +#define __msa_slli_d __builtin_msa_slli_d +#define __msa_sra_b __builtin_msa_sra_b +#define __msa_sra_h __builtin_msa_sra_h +#define __msa_sra_w __builtin_msa_sra_w +#define __msa_sra_d __builtin_msa_sra_d +#define __msa_srai_b __builtin_msa_srai_b +#define __msa_srai_h __builtin_msa_srai_h +#define __msa_srai_w __builtin_msa_srai_w +#define __msa_srai_d __builtin_msa_srai_d +#define __msa_srar_b __builtin_msa_srar_b +#define __msa_srar_h __builtin_msa_srar_h +#define __msa_srar_w __builtin_msa_srar_w +#define __msa_srar_d __builtin_msa_srar_d +#define __msa_srari_b __builtin_msa_srari_b +#define __msa_srari_h __builtin_msa_srari_h +#define __msa_srari_w __builtin_msa_srari_w +#define __msa_srari_d __builtin_msa_srari_d +#define __msa_srl_b __builtin_msa_srl_b +#define __msa_srl_h __builtin_msa_srl_h +#define __msa_srl_w __builtin_msa_srl_w +#define __msa_srl_d __builtin_msa_srl_d +#define __msa_srli_b __builtin_msa_srli_b +#define __msa_srli_h __builtin_msa_srli_h +#define __msa_srli_w __builtin_msa_srli_w +#define __msa_srli_d __builtin_msa_srli_d +#define __msa_srlr_b __builtin_msa_srlr_b +#define __msa_srlr_h __builtin_msa_srlr_h +#define __msa_srlr_w __builtin_msa_srlr_w +#define __msa_srlr_d __builtin_msa_srlr_d +#define __msa_srlri_b __builtin_msa_srlri_b +#define __msa_srlri_h __builtin_msa_srlri_h +#define __msa_srlri_w __builtin_msa_srlri_w +#define __msa_srlri_d __builtin_msa_srlri_d +#define __msa_bclr_b __builtin_msa_bclr_b +#define __msa_bclr_h __builtin_msa_bclr_h +#define __msa_bclr_w __builtin_msa_bclr_w +#define __msa_bclr_d __builtin_msa_bclr_d +#define __msa_bclri_b __builtin_msa_bclri_b +#define __msa_bclri_h __builtin_msa_bclri_h +#define __msa_bclri_w __builtin_msa_bclri_w +#define __msa_bclri_d __builtin_msa_bclri_d +#define __msa_bset_b __builtin_msa_bset_b +#define __msa_bset_h __builtin_msa_bset_h +#define __msa_bset_w __builtin_msa_bset_w +#define __msa_bset_d __builtin_msa_bset_d +#define __msa_bseti_b __builtin_msa_bseti_b +#define __msa_bseti_h __builtin_msa_bseti_h +#define __msa_bseti_w __builtin_msa_bseti_w +#define __msa_bseti_d __builtin_msa_bseti_d +#define __msa_bneg_b __builtin_msa_bneg_b +#define __msa_bneg_h __builtin_msa_bneg_h +#define __msa_bneg_w __builtin_msa_bneg_w +#define __msa_bneg_d __builtin_msa_bneg_d +#define __msa_bnegi_b __builtin_msa_bnegi_b +#define __msa_bnegi_h __builtin_msa_bnegi_h +#define __msa_bnegi_w __builtin_msa_bnegi_w +#define __msa_bnegi_d __builtin_msa_bnegi_d +#define __msa_binsl_b __builtin_msa_binsl_b +#define __msa_binsl_h __builtin_msa_binsl_h +#define __msa_binsl_w __builtin_msa_binsl_w +#define __msa_binsl_d __builtin_msa_binsl_d +#define __msa_binsli_b __builtin_msa_binsli_b +#define __msa_binsli_h __builtin_msa_binsli_h +#define __msa_binsli_w __builtin_msa_binsli_w +#define __msa_binsli_d __builtin_msa_binsli_d +#define __msa_binsr_b __builtin_msa_binsr_b +#define __msa_binsr_h __builtin_msa_binsr_h +#define __msa_binsr_w __builtin_msa_binsr_w +#define __msa_binsr_d __builtin_msa_binsr_d +#define __msa_binsri_b __builtin_msa_binsri_b +#define __msa_binsri_h __builtin_msa_binsri_h +#define __msa_binsri_w __builtin_msa_binsri_w +#define __msa_binsri_d __builtin_msa_binsri_d +#define __msa_addv_b __builtin_msa_addv_b +#define __msa_addv_h __builtin_msa_addv_h +#define __msa_addv_w __builtin_msa_addv_w +#define __msa_addv_d __builtin_msa_addv_d +#define __msa_addvi_b __builtin_msa_addvi_b +#define __msa_addvi_h __builtin_msa_addvi_h +#define __msa_addvi_w __builtin_msa_addvi_w +#define __msa_addvi_d __builtin_msa_addvi_d +#define __msa_subv_b __builtin_msa_subv_b +#define __msa_subv_h __builtin_msa_subv_h +#define __msa_subv_w __builtin_msa_subv_w +#define __msa_subv_d __builtin_msa_subv_d +#define __msa_subvi_b __builtin_msa_subvi_b +#define __msa_subvi_h __builtin_msa_subvi_h +#define __msa_subvi_w __builtin_msa_subvi_w +#define __msa_subvi_d __builtin_msa_subvi_d +#define __msa_max_s_b __builtin_msa_max_s_b +#define __msa_max_s_h __builtin_msa_max_s_h +#define __msa_max_s_w __builtin_msa_max_s_w +#define __msa_max_s_d __builtin_msa_max_s_d +#define __msa_maxi_s_b __builtin_msa_maxi_s_b +#define __msa_maxi_s_h __builtin_msa_maxi_s_h +#define __msa_maxi_s_w __builtin_msa_maxi_s_w +#define __msa_maxi_s_d __builtin_msa_maxi_s_d +#define __msa_max_u_b __builtin_msa_max_u_b +#define __msa_max_u_h __builtin_msa_max_u_h +#define __msa_max_u_w __builtin_msa_max_u_w +#define __msa_max_u_d __builtin_msa_max_u_d +#define __msa_maxi_u_b __builtin_msa_maxi_u_b +#define __msa_maxi_u_h __builtin_msa_maxi_u_h +#define __msa_maxi_u_w __builtin_msa_maxi_u_w +#define __msa_maxi_u_d __builtin_msa_maxi_u_d +#define __msa_min_s_b __builtin_msa_min_s_b +#define __msa_min_s_h __builtin_msa_min_s_h +#define __msa_min_s_w __builtin_msa_min_s_w +#define __msa_min_s_d __builtin_msa_min_s_d +#define __msa_mini_s_b __builtin_msa_mini_s_b +#define __msa_mini_s_h __builtin_msa_mini_s_h +#define __msa_mini_s_w __builtin_msa_mini_s_w +#define __msa_mini_s_d __builtin_msa_mini_s_d +#define __msa_min_u_b __builtin_msa_min_u_b +#define __msa_min_u_h __builtin_msa_min_u_h +#define __msa_min_u_w __builtin_msa_min_u_w +#define __msa_min_u_d __builtin_msa_min_u_d +#define __msa_mini_u_b __builtin_msa_mini_u_b +#define __msa_mini_u_h __builtin_msa_mini_u_h +#define __msa_mini_u_w __builtin_msa_mini_u_w +#define __msa_mini_u_d __builtin_msa_mini_u_d +#define __msa_max_a_b __builtin_msa_max_a_b +#define __msa_max_a_h __builtin_msa_max_a_h +#define __msa_max_a_w __builtin_msa_max_a_w +#define __msa_max_a_d __builtin_msa_max_a_d +#define __msa_min_a_b __builtin_msa_min_a_b +#define __msa_min_a_h __builtin_msa_min_a_h +#define __msa_min_a_w __builtin_msa_min_a_w +#define __msa_min_a_d __builtin_msa_min_a_d +#define __msa_ceq_b __builtin_msa_ceq_b +#define __msa_ceq_h __builtin_msa_ceq_h +#define __msa_ceq_w __builtin_msa_ceq_w +#define __msa_ceq_d __builtin_msa_ceq_d +#define __msa_ceqi_b __builtin_msa_ceqi_b +#define __msa_ceqi_h __builtin_msa_ceqi_h +#define __msa_ceqi_w __builtin_msa_ceqi_w +#define __msa_ceqi_d __builtin_msa_ceqi_d +#define __msa_clt_s_b __builtin_msa_clt_s_b +#define __msa_clt_s_h __builtin_msa_clt_s_h +#define __msa_clt_s_w __builtin_msa_clt_s_w +#define __msa_clt_s_d __builtin_msa_clt_s_d +#define __msa_clti_s_b __builtin_msa_clti_s_b +#define __msa_clti_s_h __builtin_msa_clti_s_h +#define __msa_clti_s_w __builtin_msa_clti_s_w +#define __msa_clti_s_d __builtin_msa_clti_s_d +#define __msa_clt_u_b __builtin_msa_clt_u_b +#define __msa_clt_u_h __builtin_msa_clt_u_h +#define __msa_clt_u_w __builtin_msa_clt_u_w +#define __msa_clt_u_d __builtin_msa_clt_u_d +#define __msa_clti_u_b __builtin_msa_clti_u_b +#define __msa_clti_u_h __builtin_msa_clti_u_h +#define __msa_clti_u_w __builtin_msa_clti_u_w +#define __msa_clti_u_d __builtin_msa_clti_u_d +#define __msa_cle_s_b __builtin_msa_cle_s_b +#define __msa_cle_s_h __builtin_msa_cle_s_h +#define __msa_cle_s_w __builtin_msa_cle_s_w +#define __msa_cle_s_d __builtin_msa_cle_s_d +#define __msa_clei_s_b __builtin_msa_clei_s_b +#define __msa_clei_s_h __builtin_msa_clei_s_h +#define __msa_clei_s_w __builtin_msa_clei_s_w +#define __msa_clei_s_d __builtin_msa_clei_s_d +#define __msa_cle_u_b __builtin_msa_cle_u_b +#define __msa_cle_u_h __builtin_msa_cle_u_h +#define __msa_cle_u_w __builtin_msa_cle_u_w +#define __msa_cle_u_d __builtin_msa_cle_u_d +#define __msa_clei_u_b __builtin_msa_clei_u_b +#define __msa_clei_u_h __builtin_msa_clei_u_h +#define __msa_clei_u_w __builtin_msa_clei_u_w +#define __msa_clei_u_d __builtin_msa_clei_u_d +#define __msa_ld_b __builtin_msa_ld_b +#define __msa_ld_h __builtin_msa_ld_h +#define __msa_ld_w __builtin_msa_ld_w +#define __msa_ld_d __builtin_msa_ld_d +#define __msa_ldr_d __builtin_msa_ldr_d +#define __msa_ldr_w __builtin_msa_ldrq_w +#define __msa_st_b __builtin_msa_st_b +#define __msa_st_h __builtin_msa_st_h +#define __msa_st_w __builtin_msa_st_w +#define __msa_st_d __builtin_msa_st_d +#define __msa_str_d __builtin_msa_str_d +#define __msa_str_w __builtin_msa_strq_w +#define __msa_sat_s_b __builtin_msa_sat_s_b +#define __msa_sat_s_h __builtin_msa_sat_s_h +#define __msa_sat_s_w __builtin_msa_sat_s_w +#define __msa_sat_s_d __builtin_msa_sat_s_d +#define __msa_sat_u_b __builtin_msa_sat_u_b +#define __msa_sat_u_h __builtin_msa_sat_u_h +#define __msa_sat_u_w __builtin_msa_sat_u_w +#define __msa_sat_u_d __builtin_msa_sat_u_d +#define __msa_add_a_b __builtin_msa_add_a_b +#define __msa_add_a_h __builtin_msa_add_a_h +#define __msa_add_a_w __builtin_msa_add_a_w +#define __msa_add_a_d __builtin_msa_add_a_d +#define __msa_adds_a_b __builtin_msa_adds_a_b +#define __msa_adds_a_h __builtin_msa_adds_a_h +#define __msa_adds_a_w __builtin_msa_adds_a_w +#define __msa_adds_a_d __builtin_msa_adds_a_d +#define __msa_adds_s_b __builtin_msa_adds_s_b +#define __msa_adds_s_h __builtin_msa_adds_s_h +#define __msa_adds_s_w __builtin_msa_adds_s_w +#define __msa_adds_s_d __builtin_msa_adds_s_d +#define __msa_adds_u_b __builtin_msa_adds_u_b +#define __msa_adds_u_h __builtin_msa_adds_u_h +#define __msa_adds_u_w __builtin_msa_adds_u_w +#define __msa_adds_u_d __builtin_msa_adds_u_d +#define __msa_ave_s_b __builtin_msa_ave_s_b +#define __msa_ave_s_h __builtin_msa_ave_s_h +#define __msa_ave_s_w __builtin_msa_ave_s_w +#define __msa_ave_s_d __builtin_msa_ave_s_d +#define __msa_ave_u_b __builtin_msa_ave_u_b +#define __msa_ave_u_h __builtin_msa_ave_u_h +#define __msa_ave_u_w __builtin_msa_ave_u_w +#define __msa_ave_u_d __builtin_msa_ave_u_d +#define __msa_aver_s_b __builtin_msa_aver_s_b +#define __msa_aver_s_h __builtin_msa_aver_s_h +#define __msa_aver_s_w __builtin_msa_aver_s_w +#define __msa_aver_s_d __builtin_msa_aver_s_d +#define __msa_aver_u_b __builtin_msa_aver_u_b +#define __msa_aver_u_h __builtin_msa_aver_u_h +#define __msa_aver_u_w __builtin_msa_aver_u_w +#define __msa_aver_u_d __builtin_msa_aver_u_d +#define __msa_subs_s_b __builtin_msa_subs_s_b +#define __msa_subs_s_h __builtin_msa_subs_s_h +#define __msa_subs_s_w __builtin_msa_subs_s_w +#define __msa_subs_s_d __builtin_msa_subs_s_d +#define __msa_subs_u_b __builtin_msa_subs_u_b +#define __msa_subs_u_h __builtin_msa_subs_u_h +#define __msa_subs_u_w __builtin_msa_subs_u_w +#define __msa_subs_u_d __builtin_msa_subs_u_d +#define __msa_subsuu_s_b __builtin_msa_subsuu_s_b +#define __msa_subsuu_s_h __builtin_msa_subsuu_s_h +#define __msa_subsuu_s_w __builtin_msa_subsuu_s_w +#define __msa_subsuu_s_d __builtin_msa_subsuu_s_d +#define __msa_subsus_u_b __builtin_msa_subsus_u_b +#define __msa_subsus_u_h __builtin_msa_subsus_u_h +#define __msa_subsus_u_w __builtin_msa_subsus_u_w +#define __msa_subsus_u_d __builtin_msa_subsus_u_d +#define __msa_asub_s_b __builtin_msa_asub_s_b +#define __msa_asub_s_h __builtin_msa_asub_s_h +#define __msa_asub_s_w __builtin_msa_asub_s_w +#define __msa_asub_s_d __builtin_msa_asub_s_d +#define __msa_asub_u_b __builtin_msa_asub_u_b +#define __msa_asub_u_h __builtin_msa_asub_u_h +#define __msa_asub_u_w __builtin_msa_asub_u_w +#define __msa_asub_u_d __builtin_msa_asub_u_d +#define __msa_mulv_b __builtin_msa_mulv_b +#define __msa_mulv_h __builtin_msa_mulv_h +#define __msa_mulv_w __builtin_msa_mulv_w +#define __msa_mulv_d __builtin_msa_mulv_d +#define __msa_maddv_b __builtin_msa_maddv_b +#define __msa_maddv_h __builtin_msa_maddv_h +#define __msa_maddv_w __builtin_msa_maddv_w +#define __msa_maddv_d __builtin_msa_maddv_d +#define __msa_msubv_b __builtin_msa_msubv_b +#define __msa_msubv_h __builtin_msa_msubv_h +#define __msa_msubv_w __builtin_msa_msubv_w +#define __msa_msubv_d __builtin_msa_msubv_d +#define __msa_div_s_b __builtin_msa_div_s_b +#define __msa_div_s_h __builtin_msa_div_s_h +#define __msa_div_s_w __builtin_msa_div_s_w +#define __msa_div_s_d __builtin_msa_div_s_d +#define __msa_div_u_b __builtin_msa_div_u_b +#define __msa_div_u_h __builtin_msa_div_u_h +#define __msa_div_u_w __builtin_msa_div_u_w +#define __msa_div_u_d __builtin_msa_div_u_d +#define __msa_hadd_s_h __builtin_msa_hadd_s_h +#define __msa_hadd_s_w __builtin_msa_hadd_s_w +#define __msa_hadd_s_d __builtin_msa_hadd_s_d +#define __msa_hadd_u_h __builtin_msa_hadd_u_h +#define __msa_hadd_u_w __builtin_msa_hadd_u_w +#define __msa_hadd_u_d __builtin_msa_hadd_u_d +#define __msa_hsub_s_h __builtin_msa_hsub_s_h +#define __msa_hsub_s_w __builtin_msa_hsub_s_w +#define __msa_hsub_s_d __builtin_msa_hsub_s_d +#define __msa_hsub_u_h __builtin_msa_hsub_u_h +#define __msa_hsub_u_w __builtin_msa_hsub_u_w +#define __msa_hsub_u_d __builtin_msa_hsub_u_d +#define __msa_mod_s_b __builtin_msa_mod_s_b +#define __msa_mod_s_h __builtin_msa_mod_s_h +#define __msa_mod_s_w __builtin_msa_mod_s_w +#define __msa_mod_s_d __builtin_msa_mod_s_d +#define __msa_mod_u_b __builtin_msa_mod_u_b +#define __msa_mod_u_h __builtin_msa_mod_u_h +#define __msa_mod_u_w __builtin_msa_mod_u_w +#define __msa_mod_u_d __builtin_msa_mod_u_d +#define __msa_dotp_s_h __builtin_msa_dotp_s_h +#define __msa_dotp_s_w __builtin_msa_dotp_s_w +#define __msa_dotp_s_d __builtin_msa_dotp_s_d +#define __msa_dotp_u_h __builtin_msa_dotp_u_h +#define __msa_dotp_u_w __builtin_msa_dotp_u_w +#define __msa_dotp_u_d __builtin_msa_dotp_u_d +#define __msa_dpadd_s_h __builtin_msa_dpadd_s_h +#define __msa_dpadd_s_w __builtin_msa_dpadd_s_w +#define __msa_dpadd_s_d __builtin_msa_dpadd_s_d +#define __msa_dpadd_u_h __builtin_msa_dpadd_u_h +#define __msa_dpadd_u_w __builtin_msa_dpadd_u_w +#define __msa_dpadd_u_d __builtin_msa_dpadd_u_d +#define __msa_dpsub_s_h __builtin_msa_dpsub_s_h +#define __msa_dpsub_s_w __builtin_msa_dpsub_s_w +#define __msa_dpsub_s_d __builtin_msa_dpsub_s_d +#define __msa_dpsub_u_h __builtin_msa_dpsub_u_h +#define __msa_dpsub_u_w __builtin_msa_dpsub_u_w +#define __msa_dpsub_u_d __builtin_msa_dpsub_u_d +#define __msa_sld_b __builtin_msa_sld_b +#define __msa_sld_h __builtin_msa_sld_h +#define __msa_sld_w __builtin_msa_sld_w +#define __msa_sld_d __builtin_msa_sld_d +#define __msa_sldi_b __builtin_msa_sldi_b +#define __msa_sldi_h __builtin_msa_sldi_h +#define __msa_sldi_w __builtin_msa_sldi_w +#define __msa_sldi_d __builtin_msa_sldi_d +#define __msa_splat_b __builtin_msa_splat_b +#define __msa_splat_h __builtin_msa_splat_h +#define __msa_splat_w __builtin_msa_splat_w +#define __msa_splat_d __builtin_msa_splat_d +#define __msa_splati_b __builtin_msa_splati_b +#define __msa_splati_h __builtin_msa_splati_h +#define __msa_splati_w __builtin_msa_splati_w +#define __msa_splati_d __builtin_msa_splati_d +#define __msa_pckev_b __builtin_msa_pckev_b +#define __msa_pckev_h __builtin_msa_pckev_h +#define __msa_pckev_w __builtin_msa_pckev_w +#define __msa_pckev_d __builtin_msa_pckev_d +#define __msa_pckod_b __builtin_msa_pckod_b +#define __msa_pckod_h __builtin_msa_pckod_h +#define __msa_pckod_w __builtin_msa_pckod_w +#define __msa_pckod_d __builtin_msa_pckod_d +#define __msa_ilvl_b __builtin_msa_ilvl_b +#define __msa_ilvl_h __builtin_msa_ilvl_h +#define __msa_ilvl_w __builtin_msa_ilvl_w +#define __msa_ilvl_d __builtin_msa_ilvl_d +#define __msa_ilvr_b __builtin_msa_ilvr_b +#define __msa_ilvr_h __builtin_msa_ilvr_h +#define __msa_ilvr_w __builtin_msa_ilvr_w +#define __msa_ilvr_d __builtin_msa_ilvr_d +#define __msa_ilvev_b __builtin_msa_ilvev_b +#define __msa_ilvev_h __builtin_msa_ilvev_h +#define __msa_ilvev_w __builtin_msa_ilvev_w +#define __msa_ilvev_d __builtin_msa_ilvev_d +#define __msa_ilvod_b __builtin_msa_ilvod_b +#define __msa_ilvod_h __builtin_msa_ilvod_h +#define __msa_ilvod_w __builtin_msa_ilvod_w +#define __msa_ilvod_d __builtin_msa_ilvod_d +#define __msa_vshf_b __builtin_msa_vshf_b +#define __msa_vshf_h __builtin_msa_vshf_h +#define __msa_vshf_w __builtin_msa_vshf_w +#define __msa_vshf_d __builtin_msa_vshf_d +#define __msa_and_v __builtin_msa_and_v +#define __msa_andi_b __builtin_msa_andi_b +#define __msa_or_v __builtin_msa_or_v +#define __msa_ori_b __builtin_msa_ori_b +#define __msa_nor_v __builtin_msa_nor_v +#define __msa_nori_b __builtin_msa_nori_b +#define __msa_xor_v __builtin_msa_xor_v +#define __msa_xori_b __builtin_msa_xori_b +#define __msa_bmnz_v __builtin_msa_bmnz_v +#define __msa_bmnzi_b __builtin_msa_bmnzi_b +#define __msa_bmz_v __builtin_msa_bmz_v +#define __msa_bmzi_b __builtin_msa_bmzi_b +#define __msa_bsel_v __builtin_msa_bsel_v +#define __msa_bseli_b __builtin_msa_bseli_b +#define __msa_shf_b __builtin_msa_shf_b +#define __msa_shf_h __builtin_msa_shf_h +#define __msa_shf_w __builtin_msa_shf_w +#define __msa_test_bnz_v __builtin_msa_bnz_v +#define __msa_test_bz_v __builtin_msa_bz_v +#define __msa_fill_b __builtin_msa_fill_b +#define __msa_fill_h __builtin_msa_fill_h +#define __msa_fill_w __builtin_msa_fill_w +#define __msa_fill_d __builtin_msa_fill_d +#define __msa_pcnt_b __builtin_msa_pcnt_b +#define __msa_pcnt_h __builtin_msa_pcnt_h +#define __msa_pcnt_w __builtin_msa_pcnt_w +#define __msa_pcnt_d __builtin_msa_pcnt_d +#define __msa_nloc_b __builtin_msa_nloc_b +#define __msa_nloc_h __builtin_msa_nloc_h +#define __msa_nloc_w __builtin_msa_nloc_w +#define __msa_nloc_d __builtin_msa_nloc_d +#define __msa_nlzc_b __builtin_msa_nlzc_b +#define __msa_nlzc_h __builtin_msa_nlzc_h +#define __msa_nlzc_w __builtin_msa_nlzc_w +#define __msa_nlzc_d __builtin_msa_nlzc_d +#define __msa_copy_s_b __builtin_msa_copy_s_b +#define __msa_copy_s_h __builtin_msa_copy_s_h +#define __msa_copy_s_w __builtin_msa_copy_s_w +#define __msa_copy_s_d __builtin_msa_copy_s_d +#define __msa_copy_u_b __builtin_msa_copy_u_b +#define __msa_copy_u_h __builtin_msa_copy_u_h +#define __msa_copy_u_w __builtin_msa_copy_u_w +#define __msa_copy_u_d __builtin_msa_copy_u_d +#define __msa_insert_b __builtin_msa_insert_b +#define __msa_insert_h __builtin_msa_insert_h +#define __msa_insert_w __builtin_msa_insert_w +#define __msa_insert_d __builtin_msa_insert_d +#define __msa_insve_b __builtin_msa_insve_b +#define __msa_insve_h __builtin_msa_insve_h +#define __msa_insve_w __builtin_msa_insve_w +#define __msa_insve_d __builtin_msa_insve_d +#define __msa_test_bnz_b __builtin_msa_bnz_b +#define __msa_test_bnz_h __builtin_msa_bnz_h +#define __msa_test_bnz_w __builtin_msa_bnz_w +#define __msa_test_bnz_d __builtin_msa_bnz_d +#define __msa_test_bz_b __builtin_msa_bz_b +#define __msa_test_bz_h __builtin_msa_bz_h +#define __msa_test_bz_w __builtin_msa_bz_w +#define __msa_test_bz_d __builtin_msa_bz_d +#define __msa_ldi_b __builtin_msa_ldi_b +#define __msa_ldi_h __builtin_msa_ldi_h +#define __msa_ldi_w __builtin_msa_ldi_w +#define __msa_ldi_d __builtin_msa_ldi_d +#define __msa_fcaf_w __builtin_msa_fcaf_w +#define __msa_fcaf_d __builtin_msa_fcaf_d +#define __msa_fcor_w __builtin_msa_fcor_w +#define __msa_fcor_d __builtin_msa_fcor_d +#define __msa_fcun_w __builtin_msa_fcun_w +#define __msa_fcun_d __builtin_msa_fcun_d +#define __msa_fcune_w __builtin_msa_fcune_w +#define __msa_fcune_d __builtin_msa_fcune_d +#define __msa_fcueq_w __builtin_msa_fcueq_w +#define __msa_fcueq_d __builtin_msa_fcueq_d +#define __msa_fceq_w __builtin_msa_fceq_w +#define __msa_fceq_d __builtin_msa_fceq_d +#define __msa_fcne_w __builtin_msa_fcne_w +#define __msa_fcne_d __builtin_msa_fcne_d +#define __msa_fclt_w __builtin_msa_fclt_w +#define __msa_fclt_d __builtin_msa_fclt_d +#define __msa_fcult_w __builtin_msa_fcult_w +#define __msa_fcult_d __builtin_msa_fcult_d +#define __msa_fcle_w __builtin_msa_fcle_w +#define __msa_fcle_d __builtin_msa_fcle_d +#define __msa_fcule_w __builtin_msa_fcule_w +#define __msa_fcule_d __builtin_msa_fcule_d +#define __msa_fsaf_w __builtin_msa_fsaf_w +#define __msa_fsaf_d __builtin_msa_fsaf_d +#define __msa_fsor_w __builtin_msa_fsor_w +#define __msa_fsor_d __builtin_msa_fsor_d +#define __msa_fsun_w __builtin_msa_fsun_w +#define __msa_fsun_d __builtin_msa_fsun_d +#define __msa_fsune_w __builtin_msa_fsune_w +#define __msa_fsune_d __builtin_msa_fsune_d +#define __msa_fsueq_w __builtin_msa_fsueq_w +#define __msa_fsueq_d __builtin_msa_fsueq_d +#define __msa_fseq_w __builtin_msa_fseq_w +#define __msa_fseq_d __builtin_msa_fseq_d +#define __msa_fsne_w __builtin_msa_fsne_w +#define __msa_fsne_d __builtin_msa_fsne_d +#define __msa_fslt_w __builtin_msa_fslt_w +#define __msa_fslt_d __builtin_msa_fslt_d +#define __msa_fsult_w __builtin_msa_fsult_w +#define __msa_fsult_d __builtin_msa_fsult_d +#define __msa_fsle_w __builtin_msa_fsle_w +#define __msa_fsle_d __builtin_msa_fsle_d +#define __msa_fsule_w __builtin_msa_fsule_w +#define __msa_fsule_d __builtin_msa_fsule_d +#define __msa_fadd_w __builtin_msa_fadd_w +#define __msa_fadd_d __builtin_msa_fadd_d +#define __msa_fsub_w __builtin_msa_fsub_w +#define __msa_fsub_d __builtin_msa_fsub_d +#define __msa_fmul_w __builtin_msa_fmul_w +#define __msa_fmul_d __builtin_msa_fmul_d +#define __msa_fdiv_w __builtin_msa_fdiv_w +#define __msa_fdiv_d __builtin_msa_fdiv_d +#define __msa_fmadd_w __builtin_msa_fmadd_w +#define __msa_fmadd_d __builtin_msa_fmadd_d +#define __msa_fmsub_w __builtin_msa_fmsub_w +#define __msa_fmsub_d __builtin_msa_fmsub_d +#define __msa_fexp2_w __builtin_msa_fexp2_w +#define __msa_fexp2_d __builtin_msa_fexp2_d +#define __msa_fexdo_h __builtin_msa_fexdo_h +#define __msa_fexdo_w __builtin_msa_fexdo_w +#define __msa_ftq_h __builtin_msa_ftq_h +#define __msa_ftq_w __builtin_msa_ftq_w +#define __msa_fmin_w __builtin_msa_fmin_w +#define __msa_fmin_d __builtin_msa_fmin_d +#define __msa_fmin_a_w __builtin_msa_fmin_a_w +#define __msa_fmin_a_d __builtin_msa_fmin_a_d +#define __msa_fmax_w __builtin_msa_fmax_w +#define __msa_fmax_d __builtin_msa_fmax_d +#define __msa_fmax_a_w __builtin_msa_fmax_a_w +#define __msa_fmax_a_d __builtin_msa_fmax_a_d +#define __msa_mul_q_h __builtin_msa_mul_q_h +#define __msa_mul_q_w __builtin_msa_mul_q_w +#define __msa_mulr_q_h __builtin_msa_mulr_q_h +#define __msa_mulr_q_w __builtin_msa_mulr_q_w +#define __msa_madd_q_h __builtin_msa_madd_q_h +#define __msa_madd_q_w __builtin_msa_madd_q_w +#define __msa_maddr_q_h __builtin_msa_maddr_q_h +#define __msa_maddr_q_w __builtin_msa_maddr_q_w +#define __msa_msub_q_h __builtin_msa_msub_q_h +#define __msa_msub_q_w __builtin_msa_msub_q_w +#define __msa_msubr_q_h __builtin_msa_msubr_q_h +#define __msa_msubr_q_w __builtin_msa_msubr_q_w +#define __msa_fclass_w __builtin_msa_fclass_w +#define __msa_fclass_d __builtin_msa_fclass_d +#define __msa_fsqrt_w __builtin_msa_fsqrt_w +#define __msa_fsqrt_d __builtin_msa_fsqrt_d +#define __msa_frcp_w __builtin_msa_frcp_w +#define __msa_frcp_d __builtin_msa_frcp_d +#define __msa_frint_w __builtin_msa_frint_w +#define __msa_frint_d __builtin_msa_frint_d +#define __msa_frsqrt_w __builtin_msa_frsqrt_w +#define __msa_frsqrt_d __builtin_msa_frsqrt_d +#define __msa_flog2_w __builtin_msa_flog2_w +#define __msa_flog2_d __builtin_msa_flog2_d +#define __msa_fexupl_w __builtin_msa_fexupl_w +#define __msa_fexupl_d __builtin_msa_fexupl_d +#define __msa_fexupr_w __builtin_msa_fexupr_w +#define __msa_fexupr_d __builtin_msa_fexupr_d +#define __msa_ffql_w __builtin_msa_ffql_w +#define __msa_ffql_d __builtin_msa_ffql_d +#define __msa_ffqr_w __builtin_msa_ffqr_w +#define __msa_ffqr_d __builtin_msa_ffqr_d +#define __msa_ftint_s_w __builtin_msa_ftint_s_w +#define __msa_ftint_s_d __builtin_msa_ftint_s_d +#define __msa_ftint_u_w __builtin_msa_ftint_u_w +#define __msa_ftint_u_d __builtin_msa_ftint_u_d +#define __msa_ftrunc_s_w __builtin_msa_ftrunc_s_w +#define __msa_ftrunc_s_d __builtin_msa_ftrunc_s_d +#define __msa_ftrunc_u_w __builtin_msa_ftrunc_u_w +#define __msa_ftrunc_u_d __builtin_msa_ftrunc_u_d +#define __msa_ffint_s_w __builtin_msa_ffint_s_w +#define __msa_ffint_s_d __builtin_msa_ffint_s_d +#define __msa_ffint_u_w __builtin_msa_ffint_u_w +#define __msa_ffint_u_d __builtin_msa_ffint_u_d +#define __msa_cfcmsa __builtin_msa_cfcmsa +#define __msa_move_v __builtin_msa_move_v +#define __msa_cast_to_vector_float __builtin_msa_cast_to_vector_float +#define __msa_cast_to_vector_double __builtin_msa_cast_to_vector_double +#define __msa_cast_to_scalar_float __builtin_msa_cast_to_scalar_float +#define __msa_cast_to_scalar_double __builtin_msa_cast_to_scalar_double +#endif /* defined(__mips_msa) */ +#endif /* _MSA_H */ diff --git a/llvm/lib/clang/19/include/mwaitxintrin.h b/llvm/lib/clang/19/include/mwaitxintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..65f427105b41bc4119a3de52ed2dbe91ae4e5976 --- /dev/null +++ b/llvm/lib/clang/19/include/mwaitxintrin.h @@ -0,0 +1,62 @@ +/*===---- mwaitxintrin.h - MONITORX/MWAITX intrinsics ----------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __MWAITXINTRIN_H +#define __MWAITXINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mwaitx"))) + +/// Establishes a linear address memory range to be monitored and puts +/// the processor in the monitor event pending state. Data stored in the +/// monitored address range causes the processor to exit the pending state. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c MONITORX instruction. +/// +/// \param __p +/// The memory range to be monitored. The size of the range is determined by +/// CPUID function 0000_0005h. +/// \param __extensions +/// Optional extensions for the monitoring state. +/// \param __hints +/// Optional hints for the monitoring state. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_monitorx(void * __p, unsigned __extensions, unsigned __hints) +{ + __builtin_ia32_monitorx(__p, __extensions, __hints); +} + +/// Used with the \c MONITORX instruction to wait while the processor is in +/// the monitor event pending state. Data stored in the monitored address +/// range, or an interrupt, causes the processor to exit the pending state. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c MWAITX instruction. +/// +/// \param __extensions +/// Optional extensions for the monitoring state, which can vary by +/// processor. +/// \param __hints +/// Optional hints for the monitoring state, which can vary by processor. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_mwaitx(unsigned __extensions, unsigned __hints, unsigned __clock) +{ + __builtin_ia32_mwaitx(__extensions, __hints, __clock); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __MWAITXINTRIN_H */ diff --git a/llvm/lib/clang/19/include/nmmintrin.h b/llvm/lib/clang/19/include/nmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..59fc7ec99e6145edeadb98ad43ca8b77e5e17e78 --- /dev/null +++ b/llvm/lib/clang/19/include/nmmintrin.h @@ -0,0 +1,20 @@ +/*===---- nmmintrin.h - SSE4 intrinsics ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __NMMINTRIN_H +#define __NMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +/* To match expectations of gcc we put the sse4.2 definitions into smmintrin.h, + just include it now then. */ +#include +#endif /* __NMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/omp.h b/llvm/lib/clang/19/include/omp.h new file mode 100644 index 0000000000000000000000000000000000000000..4e6964f5422fc0c642dc7a2344a54cf8c9b1f255 --- /dev/null +++ b/llvm/lib/clang/19/include/omp.h @@ -0,0 +1,523 @@ +/* + * include/omp.h.var + */ + + +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + + +#ifndef __OMP_H +# define __OMP_H + +# include +# include +# include + +# define KMP_VERSION_MAJOR 5 +# define KMP_VERSION_MINOR 0 +# define KMP_VERSION_BUILD 20140926 +# define KMP_BUILD_DATE "No_Timestamp" + +# ifdef __cplusplus + extern "C" { +# endif + +# define omp_set_affinity_format ompc_set_affinity_format +# define omp_get_affinity_format ompc_get_affinity_format +# define omp_display_affinity ompc_display_affinity +# define omp_capture_affinity ompc_capture_affinity + +# if defined(_WIN32) +# define __KAI_KMPC_CONVENTION __cdecl +# ifndef __KMP_IMP +# define __KMP_IMP __declspec(dllimport) +# endif +# else +# define __KAI_KMPC_CONVENTION +# ifndef __KMP_IMP +# define __KMP_IMP +# endif +# endif + + /* schedule kind constants */ + typedef enum omp_sched_t { + omp_sched_static = 1, + omp_sched_dynamic = 2, + omp_sched_guided = 3, + omp_sched_auto = 4, + omp_sched_monotonic = 0x80000000 + } omp_sched_t; + + /* set API functions */ + extern void __KAI_KMPC_CONVENTION omp_set_num_threads (int); + extern void __KAI_KMPC_CONVENTION omp_set_dynamic (int); + extern void __KAI_KMPC_CONVENTION omp_set_nested (int); + extern void __KAI_KMPC_CONVENTION omp_set_max_active_levels (int); + extern void __KAI_KMPC_CONVENTION omp_set_schedule (omp_sched_t, int); + + /* query API functions */ + extern int __KAI_KMPC_CONVENTION omp_get_num_threads (void); + extern int __KAI_KMPC_CONVENTION omp_get_dynamic (void); + extern int __KAI_KMPC_CONVENTION omp_get_nested (void); + extern int __KAI_KMPC_CONVENTION omp_get_max_threads (void); + extern int __KAI_KMPC_CONVENTION omp_get_thread_num (void); + extern int __KAI_KMPC_CONVENTION omp_get_num_procs (void); + extern int __KAI_KMPC_CONVENTION omp_in_parallel (void); + extern int __KAI_KMPC_CONVENTION omp_in_final (void); + extern int __KAI_KMPC_CONVENTION omp_get_active_level (void); + extern int __KAI_KMPC_CONVENTION omp_get_level (void); + extern int __KAI_KMPC_CONVENTION omp_get_ancestor_thread_num (int); + extern int __KAI_KMPC_CONVENTION omp_get_team_size (int); + extern int __KAI_KMPC_CONVENTION omp_get_thread_limit (void); + extern int __KAI_KMPC_CONVENTION omp_get_max_active_levels (void); + extern void __KAI_KMPC_CONVENTION omp_get_schedule (omp_sched_t *, int *); + extern int __KAI_KMPC_CONVENTION omp_get_max_task_priority (void); + + /* lock API functions */ + typedef struct omp_lock_t { + void * _lk; + } omp_lock_t; + + extern void __KAI_KMPC_CONVENTION omp_init_lock (omp_lock_t *); + extern void __KAI_KMPC_CONVENTION omp_set_lock (omp_lock_t *); + extern void __KAI_KMPC_CONVENTION omp_unset_lock (omp_lock_t *); + extern void __KAI_KMPC_CONVENTION omp_destroy_lock (omp_lock_t *); + extern int __KAI_KMPC_CONVENTION omp_test_lock (omp_lock_t *); + + /* nested lock API functions */ + typedef struct omp_nest_lock_t { + void * _lk; + } omp_nest_lock_t; + + extern void __KAI_KMPC_CONVENTION omp_init_nest_lock (omp_nest_lock_t *); + extern void __KAI_KMPC_CONVENTION omp_set_nest_lock (omp_nest_lock_t *); + extern void __KAI_KMPC_CONVENTION omp_unset_nest_lock (omp_nest_lock_t *); + extern void __KAI_KMPC_CONVENTION omp_destroy_nest_lock (omp_nest_lock_t *); + extern int __KAI_KMPC_CONVENTION omp_test_nest_lock (omp_nest_lock_t *); + + /* OpenMP 5.0 Synchronization hints*/ + typedef enum omp_sync_hint_t { + omp_sync_hint_none = 0, + omp_lock_hint_none = omp_sync_hint_none, + omp_sync_hint_uncontended = 1, + omp_lock_hint_uncontended = omp_sync_hint_uncontended, + omp_sync_hint_contended = (1<<1), + omp_lock_hint_contended = omp_sync_hint_contended, + omp_sync_hint_nonspeculative = (1<<2), + omp_lock_hint_nonspeculative = omp_sync_hint_nonspeculative, + omp_sync_hint_speculative = (1<<3), + omp_lock_hint_speculative = omp_sync_hint_speculative, + kmp_lock_hint_hle = (1<<16), + kmp_lock_hint_rtm = (1<<17), + kmp_lock_hint_adaptive = (1<<18) + } omp_sync_hint_t; + + /* lock hint type for dynamic user lock */ + typedef omp_sync_hint_t omp_lock_hint_t; + + /* hinted lock initializers */ + extern void __KAI_KMPC_CONVENTION omp_init_lock_with_hint(omp_lock_t *, omp_lock_hint_t); + extern void __KAI_KMPC_CONVENTION omp_init_nest_lock_with_hint(omp_nest_lock_t *, omp_lock_hint_t); + + /* time API functions */ + extern double __KAI_KMPC_CONVENTION omp_get_wtime (void); + extern double __KAI_KMPC_CONVENTION omp_get_wtick (void); + + /* OpenMP 4.0 */ + extern int __KAI_KMPC_CONVENTION omp_get_default_device (void); + extern void __KAI_KMPC_CONVENTION omp_set_default_device (int); + extern int __KAI_KMPC_CONVENTION omp_is_initial_device (void); + extern int __KAI_KMPC_CONVENTION omp_get_num_devices (void); + extern int __KAI_KMPC_CONVENTION omp_get_num_teams (void); + extern int __KAI_KMPC_CONVENTION omp_get_team_num (void); + extern int __KAI_KMPC_CONVENTION omp_get_cancellation (void); + + /* OpenMP 4.5 */ + extern int __KAI_KMPC_CONVENTION omp_get_initial_device (void); + extern void* __KAI_KMPC_CONVENTION omp_target_alloc(size_t, int); + extern void __KAI_KMPC_CONVENTION omp_target_free(void *, int); + extern int __KAI_KMPC_CONVENTION omp_target_is_present(const void *, int); + extern int __KAI_KMPC_CONVENTION omp_target_memcpy(void *, const void *, size_t, size_t, size_t, int, int); + extern int __KAI_KMPC_CONVENTION omp_target_memcpy_rect(void *, const void *, size_t, int, const size_t *, + const size_t *, const size_t *, const size_t *, const size_t *, int, int); + extern int __KAI_KMPC_CONVENTION omp_target_associate_ptr(const void *, const void *, size_t, size_t, int); + extern int __KAI_KMPC_CONVENTION omp_target_disassociate_ptr(const void *, int); + + /* OpenMP 5.0 */ + extern int __KAI_KMPC_CONVENTION omp_get_device_num (void); + typedef void * omp_depend_t; + + /* OpenMP 5.1 interop */ + typedef intptr_t omp_intptr_t; + + extern void __KAI_KMPC_CONVENTION ompx_dump_mapping_tables(void); + + /* 0..omp_get_num_interop_properties()-1 are reserved for implementation-defined properties */ + typedef enum omp_interop_property { + omp_ipr_fr_id = -1, + omp_ipr_fr_name = -2, + omp_ipr_vendor = -3, + omp_ipr_vendor_name = -4, + omp_ipr_device_num = -5, + omp_ipr_platform = -6, + omp_ipr_device = -7, + omp_ipr_device_context = -8, + omp_ipr_targetsync = -9, + omp_ipr_first = -9 + } omp_interop_property_t; + + #define omp_interop_none 0 + + typedef enum omp_interop_rc { + omp_irc_no_value = 1, + omp_irc_success = 0, + omp_irc_empty = -1, + omp_irc_out_of_range = -2, + omp_irc_type_int = -3, + omp_irc_type_ptr = -4, + omp_irc_type_str = -5, + omp_irc_other = -6 + } omp_interop_rc_t; + + typedef enum omp_interop_fr { + omp_ifr_cuda = 1, + omp_ifr_cuda_driver = 2, + omp_ifr_opencl = 3, + omp_ifr_sycl = 4, + omp_ifr_hip = 5, + omp_ifr_level_zero = 6, + omp_ifr_last = 7 + } omp_interop_fr_t; + + typedef void * omp_interop_t; + + /*! + * The `omp_get_num_interop_properties` routine retrieves the number of implementation-defined properties available for an `omp_interop_t` object. + */ + extern int __KAI_KMPC_CONVENTION omp_get_num_interop_properties(const omp_interop_t); + /*! + * The `omp_get_interop_int` routine retrieves an integer property from an `omp_interop_t` object. + */ + extern omp_intptr_t __KAI_KMPC_CONVENTION omp_get_interop_int(const omp_interop_t, omp_interop_property_t, int *); + /*! + * The `omp_get_interop_ptr` routine retrieves a pointer property from an `omp_interop_t` object. + */ + extern void * __KAI_KMPC_CONVENTION omp_get_interop_ptr(const omp_interop_t, omp_interop_property_t, int *); + /*! + * The `omp_get_interop_str` routine retrieves a string property from an `omp_interop_t` object. + */ + extern const char * __KAI_KMPC_CONVENTION omp_get_interop_str(const omp_interop_t, omp_interop_property_t, int *); + /*! + * The `omp_get_interop_name` routine retrieves a property name from an `omp_interop_t` object. + */ + extern const char * __KAI_KMPC_CONVENTION omp_get_interop_name(const omp_interop_t, omp_interop_property_t); + /*! + * The `omp_get_interop_type_desc` routine retrieves a description of the type of a property associated with an `omp_interop_t` object. + */ + extern const char * __KAI_KMPC_CONVENTION omp_get_interop_type_desc(const omp_interop_t, omp_interop_property_t); + /*! + * The `omp_get_interop_rc_desc` routine retrieves a description of the return code associated with an `omp_interop_t` object. + */ + extern const char * __KAI_KMPC_CONVENTION omp_get_interop_rc_desc(const omp_interop_t, omp_interop_rc_t); + + /* OpenMP 5.1 device memory routines */ + + /*! + * The `omp_target_memcpy_async` routine asynchronously performs a copy between any combination of host and device pointers. + */ + extern int __KAI_KMPC_CONVENTION omp_target_memcpy_async(void *, const void *, size_t, size_t, size_t, int, + int, int, omp_depend_t *); + /*! + * The `omp_target_memcpy_rect_async` routine asynchronously performs a copy between any combination of host and device pointers. + */ + extern int __KAI_KMPC_CONVENTION omp_target_memcpy_rect_async(void *, const void *, size_t, int, const size_t *, + const size_t *, const size_t *, const size_t *, const size_t *, int, int, + int, omp_depend_t *); + + /* OpenMP 6.0 device memory routines */ + extern void * __KAI_KMPC_CONVENTION omp_target_memset(void *, int, size_t, int); + extern void * __KAI_KMPC_CONVENTION omp_target_memset_async(void *, int, size_t, int, int, omp_depend_t *); + + /*! + * The `omp_get_mapped_ptr` routine returns the device pointer that is associated with a host pointer for a given device. + */ + extern void * __KAI_KMPC_CONVENTION omp_get_mapped_ptr(const void *, int); + extern int __KAI_KMPC_CONVENTION omp_target_is_accessible(const void *, size_t, int); + + /* kmp API functions */ + extern int __KAI_KMPC_CONVENTION kmp_get_stacksize (void); + extern void __KAI_KMPC_CONVENTION kmp_set_stacksize (int); + extern size_t __KAI_KMPC_CONVENTION kmp_get_stacksize_s (void); + extern void __KAI_KMPC_CONVENTION kmp_set_stacksize_s (size_t); + extern int __KAI_KMPC_CONVENTION kmp_get_blocktime (void); + extern int __KAI_KMPC_CONVENTION kmp_get_library (void); + extern void __KAI_KMPC_CONVENTION kmp_set_blocktime (int); + extern void __KAI_KMPC_CONVENTION kmp_set_library (int); + extern void __KAI_KMPC_CONVENTION kmp_set_library_serial (void); + extern void __KAI_KMPC_CONVENTION kmp_set_library_turnaround (void); + extern void __KAI_KMPC_CONVENTION kmp_set_library_throughput (void); + extern void __KAI_KMPC_CONVENTION kmp_set_defaults (char const *); + extern void __KAI_KMPC_CONVENTION kmp_set_disp_num_buffers (int); + + /* Intel affinity API */ + typedef void * kmp_affinity_mask_t; + + extern int __KAI_KMPC_CONVENTION kmp_set_affinity (kmp_affinity_mask_t *); + extern int __KAI_KMPC_CONVENTION kmp_get_affinity (kmp_affinity_mask_t *); + extern int __KAI_KMPC_CONVENTION kmp_get_affinity_max_proc (void); + extern void __KAI_KMPC_CONVENTION kmp_create_affinity_mask (kmp_affinity_mask_t *); + extern void __KAI_KMPC_CONVENTION kmp_destroy_affinity_mask (kmp_affinity_mask_t *); + extern int __KAI_KMPC_CONVENTION kmp_set_affinity_mask_proc (int, kmp_affinity_mask_t *); + extern int __KAI_KMPC_CONVENTION kmp_unset_affinity_mask_proc (int, kmp_affinity_mask_t *); + extern int __KAI_KMPC_CONVENTION kmp_get_affinity_mask_proc (int, kmp_affinity_mask_t *); + + /* OpenMP 4.0 affinity API */ + typedef enum omp_proc_bind_t { + omp_proc_bind_false = 0, + omp_proc_bind_true = 1, + omp_proc_bind_master = 2, + omp_proc_bind_close = 3, + omp_proc_bind_spread = 4 + } omp_proc_bind_t; + + extern omp_proc_bind_t __KAI_KMPC_CONVENTION omp_get_proc_bind (void); + + /* OpenMP 4.5 affinity API */ + extern int __KAI_KMPC_CONVENTION omp_get_num_places (void); + extern int __KAI_KMPC_CONVENTION omp_get_place_num_procs (int); + extern void __KAI_KMPC_CONVENTION omp_get_place_proc_ids (int, int *); + extern int __KAI_KMPC_CONVENTION omp_get_place_num (void); + extern int __KAI_KMPC_CONVENTION omp_get_partition_num_places (void); + extern void __KAI_KMPC_CONVENTION omp_get_partition_place_nums (int *); + + extern void * __KAI_KMPC_CONVENTION kmp_malloc (size_t); + extern void * __KAI_KMPC_CONVENTION kmp_aligned_malloc (size_t, size_t); + extern void * __KAI_KMPC_CONVENTION kmp_calloc (size_t, size_t); + extern void * __KAI_KMPC_CONVENTION kmp_realloc (void *, size_t); + extern void __KAI_KMPC_CONVENTION kmp_free (void *); + + extern void __KAI_KMPC_CONVENTION kmp_set_warnings_on(void); + extern void __KAI_KMPC_CONVENTION kmp_set_warnings_off(void); + + /* OpenMP 5.0 Tool Control */ + typedef enum omp_control_tool_result_t { + omp_control_tool_notool = -2, + omp_control_tool_nocallback = -1, + omp_control_tool_success = 0, + omp_control_tool_ignored = 1 + } omp_control_tool_result_t; + + typedef enum omp_control_tool_t { + omp_control_tool_start = 1, + omp_control_tool_pause = 2, + omp_control_tool_flush = 3, + omp_control_tool_end = 4 + } omp_control_tool_t; + + extern int __KAI_KMPC_CONVENTION omp_control_tool(int, int, void*); + + /* OpenMP 5.0 Memory Management */ + typedef uintptr_t omp_uintptr_t; + + typedef enum { + omp_atk_sync_hint = 1, + omp_atk_alignment = 2, + omp_atk_access = 3, + omp_atk_pool_size = 4, + omp_atk_fallback = 5, + omp_atk_fb_data = 6, + omp_atk_pinned = 7, + omp_atk_partition = 8 + } omp_alloctrait_key_t; + + typedef enum { + omp_atv_false = 0, + omp_atv_true = 1, + omp_atv_contended = 3, + omp_atv_uncontended = 4, + omp_atv_serialized = 5, + omp_atv_sequential = omp_atv_serialized, // (deprecated) + omp_atv_private = 6, + omp_atv_all = 7, + omp_atv_thread = 8, + omp_atv_pteam = 9, + omp_atv_cgroup = 10, + omp_atv_default_mem_fb = 11, + omp_atv_null_fb = 12, + omp_atv_abort_fb = 13, + omp_atv_allocator_fb = 14, + omp_atv_environment = 15, + omp_atv_nearest = 16, + omp_atv_blocked = 17, + omp_atv_interleaved = 18 + } omp_alloctrait_value_t; + #define omp_atv_default ((omp_uintptr_t)-1) + + typedef struct { + omp_alloctrait_key_t key; + omp_uintptr_t value; + } omp_alloctrait_t; + +# if defined(_WIN32) + // On Windows cl and icl do not support 64-bit enum, let's use integer then. + typedef omp_uintptr_t omp_allocator_handle_t; + extern __KMP_IMP omp_allocator_handle_t const omp_null_allocator; + extern __KMP_IMP omp_allocator_handle_t const omp_default_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_large_cap_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_const_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_high_bw_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_low_lat_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_cgroup_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_pteam_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const omp_thread_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const llvm_omp_target_host_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const llvm_omp_target_shared_mem_alloc; + extern __KMP_IMP omp_allocator_handle_t const llvm_omp_target_device_mem_alloc; + + typedef omp_uintptr_t omp_memspace_handle_t; + extern __KMP_IMP omp_memspace_handle_t const omp_default_mem_space; + extern __KMP_IMP omp_memspace_handle_t const omp_large_cap_mem_space; + extern __KMP_IMP omp_memspace_handle_t const omp_const_mem_space; + extern __KMP_IMP omp_memspace_handle_t const omp_high_bw_mem_space; + extern __KMP_IMP omp_memspace_handle_t const omp_low_lat_mem_space; + extern __KMP_IMP omp_memspace_handle_t const llvm_omp_target_host_mem_space; + extern __KMP_IMP omp_memspace_handle_t const llvm_omp_target_shared_mem_space; + extern __KMP_IMP omp_memspace_handle_t const llvm_omp_target_device_mem_space; +# else +# if __cplusplus >= 201103 + typedef enum omp_allocator_handle_t : omp_uintptr_t +# else + typedef enum omp_allocator_handle_t +# endif + { + omp_null_allocator = 0, + omp_default_mem_alloc = 1, + omp_large_cap_mem_alloc = 2, + omp_const_mem_alloc = 3, + omp_high_bw_mem_alloc = 4, + omp_low_lat_mem_alloc = 5, + omp_cgroup_mem_alloc = 6, + omp_pteam_mem_alloc = 7, + omp_thread_mem_alloc = 8, + llvm_omp_target_host_mem_alloc = 100, + llvm_omp_target_shared_mem_alloc = 101, + llvm_omp_target_device_mem_alloc = 102, + KMP_ALLOCATOR_MAX_HANDLE = UINTPTR_MAX + } omp_allocator_handle_t; +# if __cplusplus >= 201103 + typedef enum omp_memspace_handle_t : omp_uintptr_t +# else + typedef enum omp_memspace_handle_t +# endif + { + omp_default_mem_space = 0, + omp_large_cap_mem_space = 1, + omp_const_mem_space = 2, + omp_high_bw_mem_space = 3, + omp_low_lat_mem_space = 4, + llvm_omp_target_host_mem_space = 100, + llvm_omp_target_shared_mem_space = 101, + llvm_omp_target_device_mem_space = 102, + KMP_MEMSPACE_MAX_HANDLE = UINTPTR_MAX + } omp_memspace_handle_t; +# endif + extern omp_allocator_handle_t __KAI_KMPC_CONVENTION omp_init_allocator(omp_memspace_handle_t m, + int ntraits, omp_alloctrait_t traits[]); + extern void __KAI_KMPC_CONVENTION omp_destroy_allocator(omp_allocator_handle_t allocator); + + extern void __KAI_KMPC_CONVENTION omp_set_default_allocator(omp_allocator_handle_t a); + extern omp_allocator_handle_t __KAI_KMPC_CONVENTION omp_get_default_allocator(void); +# ifdef __cplusplus + extern void *__KAI_KMPC_CONVENTION omp_alloc(size_t size, omp_allocator_handle_t a = omp_null_allocator); + extern void *__KAI_KMPC_CONVENTION omp_aligned_alloc(size_t align, size_t size, + omp_allocator_handle_t a = omp_null_allocator); + extern void *__KAI_KMPC_CONVENTION omp_calloc(size_t nmemb, size_t size, + omp_allocator_handle_t a = omp_null_allocator); + extern void *__KAI_KMPC_CONVENTION omp_aligned_calloc(size_t align, size_t nmemb, size_t size, + omp_allocator_handle_t a = omp_null_allocator); + extern void *__KAI_KMPC_CONVENTION omp_realloc(void *ptr, size_t size, + omp_allocator_handle_t allocator = omp_null_allocator, + omp_allocator_handle_t free_allocator = omp_null_allocator); + extern void __KAI_KMPC_CONVENTION omp_free(void * ptr, omp_allocator_handle_t a = omp_null_allocator); +# else + extern void *__KAI_KMPC_CONVENTION omp_alloc(size_t size, omp_allocator_handle_t a); + extern void *__KAI_KMPC_CONVENTION omp_aligned_alloc(size_t align, size_t size, + omp_allocator_handle_t a); + extern void *__KAI_KMPC_CONVENTION omp_calloc(size_t nmemb, size_t size, omp_allocator_handle_t a); + extern void *__KAI_KMPC_CONVENTION omp_aligned_calloc(size_t align, size_t nmemb, size_t size, + omp_allocator_handle_t a); + extern void *__KAI_KMPC_CONVENTION omp_realloc(void *ptr, size_t size, omp_allocator_handle_t allocator, + omp_allocator_handle_t free_allocator); + extern void __KAI_KMPC_CONVENTION omp_free(void *ptr, omp_allocator_handle_t a); +# endif + + /* OpenMP 5.0 Affinity Format */ + extern void __KAI_KMPC_CONVENTION omp_set_affinity_format(char const *); + extern size_t __KAI_KMPC_CONVENTION omp_get_affinity_format(char *, size_t); + extern void __KAI_KMPC_CONVENTION omp_display_affinity(char const *); + extern size_t __KAI_KMPC_CONVENTION omp_capture_affinity(char *, size_t, char const *); + + /* OpenMP 5.0 events */ +# if defined(_WIN32) + // On Windows cl and icl do not support 64-bit enum, let's use integer then. + typedef omp_uintptr_t omp_event_handle_t; +# else + typedef enum omp_event_handle_t { KMP_EVENT_MAX_HANDLE = UINTPTR_MAX } omp_event_handle_t; +# endif + extern void __KAI_KMPC_CONVENTION omp_fulfill_event ( omp_event_handle_t event ); + + /* OpenMP 5.0 Pause Resources */ + typedef enum omp_pause_resource_t { + omp_pause_resume = 0, + omp_pause_soft = 1, + omp_pause_hard = 2 + } omp_pause_resource_t; + extern int __KAI_KMPC_CONVENTION omp_pause_resource(omp_pause_resource_t, int); + extern int __KAI_KMPC_CONVENTION omp_pause_resource_all(omp_pause_resource_t); + + extern int __KAI_KMPC_CONVENTION omp_get_supported_active_levels(void); + + /* OpenMP 5.1 */ + extern void __KAI_KMPC_CONVENTION omp_set_num_teams(int num_teams); + extern int __KAI_KMPC_CONVENTION omp_get_max_teams(void); + extern void __KAI_KMPC_CONVENTION omp_set_teams_thread_limit(int limit); + extern int __KAI_KMPC_CONVENTION omp_get_teams_thread_limit(void); + + /* OpenMP 5.1 Display Environment */ + extern void omp_display_env(int verbose); + +# if defined(_OPENMP) && _OPENMP >= 201811 + #pragma omp begin declare variant match(device={kind(host)}) + static inline int omp_is_initial_device(void) { return 1; } + #pragma omp end declare variant + #pragma omp begin declare variant match(device={kind(nohost)}) + static inline int omp_is_initial_device(void) { return 0; } + #pragma omp end declare variant +# endif + + /* OpenMP 5.2 */ + extern int __KAI_KMPC_CONVENTION omp_in_explicit_task(void); + + /* LLVM Extensions */ + extern void *llvm_omp_target_dynamic_shared_alloc(void); + +# undef __KAI_KMPC_CONVENTION +# undef __KMP_IMP + + /* Warning: + The following typedefs are not standard, deprecated and will be removed in a future release. + */ + typedef int omp_int_t; + typedef double omp_wtime_t; + +# ifdef __cplusplus + } +# endif + +#endif /* __OMP_H */ diff --git a/llvm/lib/clang/19/include/ompx.h b/llvm/lib/clang/19/include/ompx.h new file mode 100644 index 0000000000000000000000000000000000000000..48a8f77b08bb5ebc08500d1848038143544b595c --- /dev/null +++ b/llvm/lib/clang/19/include/ompx.h @@ -0,0 +1,232 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef __OMPX_H +#define __OMPX_H + +#ifdef __AMDGCN_WAVEFRONT_SIZE +#define __WARP_SIZE __AMDGCN_WAVEFRONT_SIZE +#else +#define __WARP_SIZE 32 +#endif + +typedef unsigned long uint64_t; + +#ifdef __cplusplus +extern "C" { +#endif + +int omp_get_ancestor_thread_num(int); +int omp_get_team_size(int); + +#ifdef __cplusplus +} +#endif + +/// Target kernel language extensions +/// +/// These extensions exist for the host to allow fallback implementations, +/// however, they cannot be arbitrarily composed with OpenMP. If the rules of +/// the kernel language are followed, the host fallbacks should behave as +/// expected since the kernel is represented as 3 sequential outer loops, one +/// for each grid dimension, and three (nested) parallel loops, one for each +/// block dimension. This fallback is not supposed to be optimal and should be +/// configurable by the user. +/// +///{ + +#ifdef __cplusplus +extern "C" { +#endif + +enum { + ompx_relaxed = __ATOMIC_RELAXED, + ompx_aquire = __ATOMIC_ACQUIRE, + ompx_release = __ATOMIC_RELEASE, + ompx_acq_rel = __ATOMIC_ACQ_REL, + ompx_seq_cst = __ATOMIC_SEQ_CST, +}; + +enum { + ompx_dim_x = 0, + ompx_dim_y = 1, + ompx_dim_z = 2, +}; + +// TODO: The following implementation is for host fallback. We need to disable +// generation of host fallback in kernel language mode. +#pragma omp begin declare variant match(device = {kind(cpu)}) + +/// ompx_{thread,block}_{id,dim} +///{ +#define _TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_C(NAME, VALUE) \ + static inline int ompx_##NAME(int Dim) { return VALUE; } + +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_C(thread_id, + omp_get_ancestor_thread_num(Dim + 1)) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_C(block_dim, omp_get_team_size(Dim + 1)) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_C(block_id, 0) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_C(grid_dim, 1) +#undef _TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_C +///} + +/// ompx_{sync_block}_{,divergent} +///{ +#define _TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_C(RETTY, NAME, ARGS, BODY) \ + static inline RETTY ompx_##NAME(ARGS) { BODY; } + +_TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_C(void, sync_block, int Ordering, + _Pragma("omp barrier")) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_C(void, sync_block_acq_rel, void, + ompx_sync_block(ompx_acq_rel)) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_C(void, sync_block_divergent, int Ordering, + ompx_sync_block(Ordering)) +#undef _TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_C +///} + +static inline uint64_t ompx_ballot_sync(uint64_t mask, int pred) { + __builtin_trap(); +} + +/// ompx_shfl_down_sync_{i,f,l,d} +///{ +#define _TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC_HOST_IMPL(TYPE, TY) \ + static inline TYPE ompx_shfl_down_sync_##TY(uint64_t mask, TYPE var, \ + unsigned delta, int width) { \ + __builtin_trap(); \ + } + +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC_HOST_IMPL(int, i) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC_HOST_IMPL(float, f) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC_HOST_IMPL(long, l) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC_HOST_IMPL(double, d) + +#undef _TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC_HOST_IMPL +///} + +#pragma omp end declare variant + +/// ompx_{sync_block}_{,divergent} +///{ +#define _TGT_KERNEL_LANGUAGE_DECL_SYNC_C(RETTY, NAME, ARGS) \ + RETTY ompx_##NAME(ARGS); + +_TGT_KERNEL_LANGUAGE_DECL_SYNC_C(void, sync_block, int Ordering) +_TGT_KERNEL_LANGUAGE_DECL_SYNC_C(void, sync_block_acq_rel, void) +_TGT_KERNEL_LANGUAGE_DECL_SYNC_C(void, sync_block_divergent, int Ordering) +#undef _TGT_KERNEL_LANGUAGE_DECL_SYNC_C +///} + +/// ompx_{thread,block}_{id,dim}_{x,y,z} +///{ +#define _TGT_KERNEL_LANGUAGE_DECL_GRID_C(NAME) \ + int ompx_##NAME(int Dim); \ + static inline int ompx_##NAME##_x() { return ompx_##NAME(ompx_dim_x); } \ + static inline int ompx_##NAME##_y() { return ompx_##NAME(ompx_dim_y); } \ + static inline int ompx_##NAME##_z() { return ompx_##NAME(ompx_dim_z); } + +_TGT_KERNEL_LANGUAGE_DECL_GRID_C(thread_id) +_TGT_KERNEL_LANGUAGE_DECL_GRID_C(block_dim) +_TGT_KERNEL_LANGUAGE_DECL_GRID_C(block_id) +_TGT_KERNEL_LANGUAGE_DECL_GRID_C(grid_dim) +#undef _TGT_KERNEL_LANGUAGE_DECL_GRID_C +///} + +uint64_t ompx_ballot_sync(uint64_t mask, int pred); + +/// ompx_shfl_down_sync_{i,f,l,d} +///{ +#define _TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(TYPE, TY) \ + TYPE ompx_shfl_down_sync_##TY(uint64_t mask, TYPE var, unsigned delta, \ + int width); + +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(int, i) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(float, f) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(long, l) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(double, d) + +#undef _TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC +///} + +#ifdef __cplusplus +} +#endif + +#ifdef __cplusplus + +namespace ompx { + +enum { + dim_x = ompx_dim_x, + dim_y = ompx_dim_y, + dim_z = ompx_dim_z, +}; + +enum { + relaxed = ompx_relaxed , + aquire = ompx_aquire, + release = ompx_release, + acc_rel = ompx_acq_rel, + seq_cst = ompx_seq_cst, +}; + +/// ompx::{thread,block}_{id,dim}_{,x,y,z} +///{ +#define _TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_CXX(NAME) \ + static inline int NAME(int Dim) noexcept { return ompx_##NAME(Dim); } \ + static inline int NAME##_x() noexcept { return NAME(ompx_dim_x); } \ + static inline int NAME##_y() noexcept { return NAME(ompx_dim_y); } \ + static inline int NAME##_z() noexcept { return NAME(ompx_dim_z); } + +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_CXX(thread_id) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_CXX(block_dim) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_CXX(block_id) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_CXX(grid_dim) +#undef _TGT_KERNEL_LANGUAGE_HOST_IMPL_GRID_CXX +///} + +/// ompx_{sync_block}_{,divergent} +///{ +#define _TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_CXX(RETTY, NAME, ARGS, CALL_ARGS) \ + static inline RETTY NAME(ARGS) { \ + return ompx_##NAME(CALL_ARGS); \ + } + +_TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_CXX(void, sync_block, int Ordering = acc_rel, + Ordering) +_TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_CXX(void, sync_block_divergent, + int Ordering = acc_rel, Ordering) +#undef _TGT_KERNEL_LANGUAGE_HOST_IMPL_SYNC_CXX +///} + +static inline uint64_t ballot_sync(uint64_t mask, int pred) { + return ompx_ballot_sync(mask, pred); +} + +/// shfl_down_sync +///{ +#define _TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(TYPE, TY) \ + static inline TYPE shfl_down_sync(uint64_t mask, TYPE var, unsigned delta, \ + int width = __WARP_SIZE) { \ + return ompx_shfl_down_sync_##TY(mask, var, delta, width); \ + } + +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(int, i) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(float, f) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(long, l) +_TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC(double, d) + +#undef _TGT_KERNEL_LANGUAGE_SHFL_DOWN_SYNC +///} + +} // namespace ompx +#endif + +///} + +#endif /* __OMPX_H */ diff --git a/llvm/lib/clang/19/include/opencl-c-base.h b/llvm/lib/clang/19/include/opencl-c-base.h new file mode 100644 index 0000000000000000000000000000000000000000..786678b9d8a75320a5473fbe3bf82eff5d0ba4b4 --- /dev/null +++ b/llvm/lib/clang/19/include/opencl-c-base.h @@ -0,0 +1,829 @@ +//===----- opencl-c-base.h - OpenCL C language base definitions -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _OPENCL_BASE_H_ +#define _OPENCL_BASE_H_ + +// Define extension macros + +#if (defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ >= 200) +// For SPIR and SPIR-V all extensions are supported. +#if defined(__SPIR__) || defined(__SPIRV__) +#define cl_khr_subgroup_extended_types 1 +#define cl_khr_subgroup_non_uniform_vote 1 +#define cl_khr_subgroup_ballot 1 +#define cl_khr_subgroup_non_uniform_arithmetic 1 +#define cl_khr_subgroup_shuffle 1 +#define cl_khr_subgroup_shuffle_relative 1 +#define cl_khr_subgroup_clustered_reduce 1 +#define cl_khr_subgroup_rotate 1 +#define cl_khr_extended_bit_ops 1 +#define cl_khr_integer_dot_product 1 +#define __opencl_c_integer_dot_product_input_4x8bit 1 +#define __opencl_c_integer_dot_product_input_4x8bit_packed 1 +#define cl_ext_float_atomics 1 +#ifdef cl_khr_fp16 +#define __opencl_c_ext_fp16_global_atomic_load_store 1 +#define __opencl_c_ext_fp16_local_atomic_load_store 1 +#define __opencl_c_ext_fp16_global_atomic_add 1 +#define __opencl_c_ext_fp16_local_atomic_add 1 +#define __opencl_c_ext_fp16_global_atomic_min_max 1 +#define __opencl_c_ext_fp16_local_atomic_min_max 1 +#endif +#ifdef cl_khr_fp64 +#define __opencl_c_ext_fp64_global_atomic_add 1 +#define __opencl_c_ext_fp64_local_atomic_add 1 +#define __opencl_c_ext_fp64_global_atomic_min_max 1 +#define __opencl_c_ext_fp64_local_atomic_min_max 1 +#endif +#define __opencl_c_ext_fp32_global_atomic_add 1 +#define __opencl_c_ext_fp32_local_atomic_add 1 +#define __opencl_c_ext_fp32_global_atomic_min_max 1 +#define __opencl_c_ext_fp32_local_atomic_min_max 1 +#define __opencl_c_ext_image_raw10_raw12 1 +#define cl_khr_kernel_clock 1 +#define __opencl_c_kernel_clock_scope_device 1 +#define __opencl_c_kernel_clock_scope_work_group 1 +#define __opencl_c_kernel_clock_scope_sub_group 1 + +#endif // defined(__SPIR__) || defined(__SPIRV__) +#endif // (defined(__OPENCL_CPP_VERSION__) || __OPENCL_C_VERSION__ >= 200) + +// Define feature macros for OpenCL C 2.0 +#if (__OPENCL_CPP_VERSION__ == 100 || __OPENCL_C_VERSION__ == 200) +#define __opencl_c_pipes 1 +#define __opencl_c_generic_address_space 1 +#define __opencl_c_work_group_collective_functions 1 +#define __opencl_c_atomic_order_acq_rel 1 +#define __opencl_c_atomic_order_seq_cst 1 +#define __opencl_c_atomic_scope_device 1 +#define __opencl_c_atomic_scope_all_devices 1 +#define __opencl_c_device_enqueue 1 +#define __opencl_c_read_write_images 1 +#define __opencl_c_program_scope_global_variables 1 +#define __opencl_c_images 1 +#endif + +// Define header-only feature macros for OpenCL C 3.0. +#if (__OPENCL_CPP_VERSION__ == 202100 || __OPENCL_C_VERSION__ == 300) +// For the SPIR and SPIR-V target all features are supported. +#if defined(__SPIR__) || defined(__SPIRV__) +#define __opencl_c_work_group_collective_functions 1 +#define __opencl_c_atomic_order_seq_cst 1 +#define __opencl_c_atomic_scope_device 1 +#define __opencl_c_atomic_scope_all_devices 1 +#define __opencl_c_read_write_images 1 +#endif // defined(__SPIR__) + +// Undefine any feature macros that have been explicitly disabled using +// an __undef_ macro. +#ifdef __undef___opencl_c_work_group_collective_functions +#undef __opencl_c_work_group_collective_functions +#endif +#ifdef __undef___opencl_c_atomic_order_seq_cst +#undef __opencl_c_atomic_order_seq_cst +#endif +#ifdef __undef___opencl_c_atomic_scope_device +#undef __opencl_c_atomic_scope_device +#endif +#ifdef __undef___opencl_c_atomic_scope_all_devices +#undef __opencl_c_atomic_scope_all_devices +#endif +#ifdef __undef___opencl_c_read_write_images +#undef __opencl_c_read_write_images +#endif + +#endif // (__OPENCL_CPP_VERSION__ == 202100 || __OPENCL_C_VERSION__ == 300) + +#if !defined(__opencl_c_generic_address_space) +// Internal feature macro to provide named (global, local, private) address +// space overloads for builtin functions that take a pointer argument. +#define __opencl_c_named_address_space_builtins 1 +#endif // !defined(__opencl_c_generic_address_space) + +#if defined(cl_intel_subgroups) || defined(cl_khr_subgroups) || defined(__opencl_c_subgroups) +// Internal feature macro to provide subgroup builtins. +#define __opencl_subgroup_builtins 1 +#endif + +// built-in scalar data types: + +/** + * An unsigned 8-bit integer. + */ +typedef unsigned char uchar; + +/** + * An unsigned 16-bit integer. + */ +typedef unsigned short ushort; + +/** + * An unsigned 32-bit integer. + */ +typedef unsigned int uint; + +/** + * An unsigned 64-bit integer. + */ +typedef unsigned long ulong; + +/** + * The unsigned integer type of the result of the sizeof operator. This + * is a 32-bit unsigned integer if CL_DEVICE_ADDRESS_BITS + * defined in table 4.3 is 32-bits and is a 64-bit unsigned integer if + * CL_DEVICE_ADDRESS_BITS is 64-bits. + */ +typedef __SIZE_TYPE__ size_t; + +/** + * A signed integer type that is the result of subtracting two pointers. + * This is a 32-bit signed integer if CL_DEVICE_ADDRESS_BITS + * defined in table 4.3 is 32-bits and is a 64-bit signed integer if + * CL_DEVICE_ADDRESS_BITS is 64-bits. + */ +typedef __PTRDIFF_TYPE__ ptrdiff_t; + +/** + * A signed integer type with the property that any valid pointer to + * void can be converted to this type, then converted back to pointer + * to void, and the result will compare equal to the original pointer. + */ +typedef __INTPTR_TYPE__ intptr_t; + +/** + * An unsigned integer type with the property that any valid pointer to + * void can be converted to this type, then converted back to pointer + * to void, and the result will compare equal to the original pointer. + */ +typedef __UINTPTR_TYPE__ uintptr_t; + +// built-in vector data types: +typedef char char2 __attribute__((ext_vector_type(2))); +typedef char char3 __attribute__((ext_vector_type(3))); +typedef char char4 __attribute__((ext_vector_type(4))); +typedef char char8 __attribute__((ext_vector_type(8))); +typedef char char16 __attribute__((ext_vector_type(16))); +typedef uchar uchar2 __attribute__((ext_vector_type(2))); +typedef uchar uchar3 __attribute__((ext_vector_type(3))); +typedef uchar uchar4 __attribute__((ext_vector_type(4))); +typedef uchar uchar8 __attribute__((ext_vector_type(8))); +typedef uchar uchar16 __attribute__((ext_vector_type(16))); +typedef short short2 __attribute__((ext_vector_type(2))); +typedef short short3 __attribute__((ext_vector_type(3))); +typedef short short4 __attribute__((ext_vector_type(4))); +typedef short short8 __attribute__((ext_vector_type(8))); +typedef short short16 __attribute__((ext_vector_type(16))); +typedef ushort ushort2 __attribute__((ext_vector_type(2))); +typedef ushort ushort3 __attribute__((ext_vector_type(3))); +typedef ushort ushort4 __attribute__((ext_vector_type(4))); +typedef ushort ushort8 __attribute__((ext_vector_type(8))); +typedef ushort ushort16 __attribute__((ext_vector_type(16))); +typedef int int2 __attribute__((ext_vector_type(2))); +typedef int int3 __attribute__((ext_vector_type(3))); +typedef int int4 __attribute__((ext_vector_type(4))); +typedef int int8 __attribute__((ext_vector_type(8))); +typedef int int16 __attribute__((ext_vector_type(16))); +typedef uint uint2 __attribute__((ext_vector_type(2))); +typedef uint uint3 __attribute__((ext_vector_type(3))); +typedef uint uint4 __attribute__((ext_vector_type(4))); +typedef uint uint8 __attribute__((ext_vector_type(8))); +typedef uint uint16 __attribute__((ext_vector_type(16))); +typedef long long2 __attribute__((ext_vector_type(2))); +typedef long long3 __attribute__((ext_vector_type(3))); +typedef long long4 __attribute__((ext_vector_type(4))); +typedef long long8 __attribute__((ext_vector_type(8))); +typedef long long16 __attribute__((ext_vector_type(16))); +typedef ulong ulong2 __attribute__((ext_vector_type(2))); +typedef ulong ulong3 __attribute__((ext_vector_type(3))); +typedef ulong ulong4 __attribute__((ext_vector_type(4))); +typedef ulong ulong8 __attribute__((ext_vector_type(8))); +typedef ulong ulong16 __attribute__((ext_vector_type(16))); +typedef float float2 __attribute__((ext_vector_type(2))); +typedef float float3 __attribute__((ext_vector_type(3))); +typedef float float4 __attribute__((ext_vector_type(4))); +typedef float float8 __attribute__((ext_vector_type(8))); +typedef float float16 __attribute__((ext_vector_type(16))); +#ifdef cl_khr_fp16 +#pragma OPENCL EXTENSION cl_khr_fp16 : enable +typedef half half2 __attribute__((ext_vector_type(2))); +typedef half half3 __attribute__((ext_vector_type(3))); +typedef half half4 __attribute__((ext_vector_type(4))); +typedef half half8 __attribute__((ext_vector_type(8))); +typedef half half16 __attribute__((ext_vector_type(16))); +#endif +#ifdef cl_khr_fp64 +#if __OPENCL_C_VERSION__ < CL_VERSION_1_2 +#pragma OPENCL EXTENSION cl_khr_fp64 : enable +#endif +typedef double double2 __attribute__((ext_vector_type(2))); +typedef double double3 __attribute__((ext_vector_type(3))); +typedef double double4 __attribute__((ext_vector_type(4))); +typedef double double8 __attribute__((ext_vector_type(8))); +typedef double double16 __attribute__((ext_vector_type(16))); +#endif + +// An internal alias for half, for use by OpenCLBuiltins.td. +#define __half half + +#if defined(__OPENCL_CPP_VERSION__) +#define NULL nullptr +#elif defined(__OPENCL_C_VERSION__) +#define NULL ((void*)0) +#endif + +/** + * Value of maximum non-infinite single-precision floating-point + * number. + */ +#define MAXFLOAT 0x1.fffffep127f + +/** + * A positive float constant expression. HUGE_VALF evaluates + * to +infinity. Used as an error value returned by the built-in + * math functions. + */ +#define HUGE_VALF (__builtin_huge_valf()) + +/** + * A positive double constant expression. HUGE_VAL evaluates + * to +infinity. Used as an error value returned by the built-in + * math functions. + */ +#define HUGE_VAL (__builtin_huge_val()) + +/** + * A constant expression of type float representing positive or + * unsigned infinity. + */ +#define INFINITY (__builtin_inff()) + +/** + * A constant expression of type float representing a quiet NaN. + */ +#define NAN as_float(INT_MAX) + +#define FP_ILOGB0 INT_MIN +#define FP_ILOGBNAN INT_MAX + +#define FLT_DIG 6 +#define FLT_MANT_DIG 24 +#define FLT_MAX_10_EXP +38 +#define FLT_MAX_EXP +128 +#define FLT_MIN_10_EXP -37 +#define FLT_MIN_EXP -125 +#define FLT_RADIX 2 +#define FLT_MAX 0x1.fffffep127f +#define FLT_MIN 0x1.0p-126f +#define FLT_EPSILON 0x1.0p-23f + +#define M_E_F 2.71828182845904523536028747135266250f +#define M_LOG2E_F 1.44269504088896340735992468100189214f +#define M_LOG10E_F 0.434294481903251827651128918916605082f +#define M_LN2_F 0.693147180559945309417232121458176568f +#define M_LN10_F 2.30258509299404568401799145468436421f +#define M_PI_F 3.14159265358979323846264338327950288f +#define M_PI_2_F 1.57079632679489661923132169163975144f +#define M_PI_4_F 0.785398163397448309615660845819875721f +#define M_1_PI_F 0.318309886183790671537767526745028724f +#define M_2_PI_F 0.636619772367581343075535053490057448f +#define M_2_SQRTPI_F 1.12837916709551257389615890312154517f +#define M_SQRT2_F 1.41421356237309504880168872420969808f +#define M_SQRT1_2_F 0.707106781186547524400844362104849039f + +#define DBL_DIG 15 +#define DBL_MANT_DIG 53 +#define DBL_MAX_10_EXP +308 +#define DBL_MAX_EXP +1024 +#define DBL_MIN_10_EXP -307 +#define DBL_MIN_EXP -1021 +#define DBL_RADIX 2 +#define DBL_MAX 0x1.fffffffffffffp1023 +#define DBL_MIN 0x1.0p-1022 +#define DBL_EPSILON 0x1.0p-52 + +#define M_E 0x1.5bf0a8b145769p+1 +#define M_LOG2E 0x1.71547652b82fep+0 +#define M_LOG10E 0x1.bcb7b1526e50ep-2 +#define M_LN2 0x1.62e42fefa39efp-1 +#define M_LN10 0x1.26bb1bbb55516p+1 +#define M_PI 0x1.921fb54442d18p+1 +#define M_PI_2 0x1.921fb54442d18p+0 +#define M_PI_4 0x1.921fb54442d18p-1 +#define M_1_PI 0x1.45f306dc9c883p-2 +#define M_2_PI 0x1.45f306dc9c883p-1 +#define M_2_SQRTPI 0x1.20dd750429b6dp+0 +#define M_SQRT2 0x1.6a09e667f3bcdp+0 +#define M_SQRT1_2 0x1.6a09e667f3bcdp-1 + +#ifdef cl_khr_fp16 + +#define HALF_DIG 3 +#define HALF_MANT_DIG 11 +#define HALF_MAX_10_EXP +4 +#define HALF_MAX_EXP +16 +#define HALF_MIN_10_EXP -4 +#define HALF_MIN_EXP -13 +#define HALF_RADIX 2 +#define HALF_MAX ((0x1.ffcp15h)) +#define HALF_MIN ((0x1.0p-14h)) +#define HALF_EPSILON ((0x1.0p-10h)) + +#define M_E_H 2.71828182845904523536028747135266250h +#define M_LOG2E_H 1.44269504088896340735992468100189214h +#define M_LOG10E_H 0.434294481903251827651128918916605082h +#define M_LN2_H 0.693147180559945309417232121458176568h +#define M_LN10_H 2.30258509299404568401799145468436421h +#define M_PI_H 3.14159265358979323846264338327950288h +#define M_PI_2_H 1.57079632679489661923132169163975144h +#define M_PI_4_H 0.785398163397448309615660845819875721h +#define M_1_PI_H 0.318309886183790671537767526745028724h +#define M_2_PI_H 0.636619772367581343075535053490057448h +#define M_2_SQRTPI_H 1.12837916709551257389615890312154517h +#define M_SQRT2_H 1.41421356237309504880168872420969808h +#define M_SQRT1_2_H 0.707106781186547524400844362104849039h + +#endif //cl_khr_fp16 + +#define CHAR_BIT 8 +#define SCHAR_MAX 127 +#define SCHAR_MIN (-128) +#define UCHAR_MAX 255 +#define CHAR_MAX SCHAR_MAX +#define CHAR_MIN SCHAR_MIN +#define USHRT_MAX 65535 +#define SHRT_MAX 32767 +#define SHRT_MIN (-32768) +#define UINT_MAX 0xffffffff +#define INT_MAX 2147483647 +#define INT_MIN (-2147483647-1) +#define ULONG_MAX 0xffffffffffffffffUL +#define LONG_MAX 0x7fffffffffffffffL +#define LONG_MIN (-0x7fffffffffffffffL-1) + +// OpenCL v1.1 s6.11.8, v1.2 s6.12.8, v2.0 s6.13.8 - Synchronization Functions + +// Flag type and values for barrier, mem_fence, read_mem_fence, write_mem_fence +typedef uint cl_mem_fence_flags; + +/** + * Queue a memory fence to ensure correct + * ordering of memory operations to local memory + */ +#define CLK_LOCAL_MEM_FENCE 0x01 + +/** + * Queue a memory fence to ensure correct + * ordering of memory operations to global memory + */ +#define CLK_GLOBAL_MEM_FENCE 0x02 + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +typedef enum memory_scope { + memory_scope_work_item = __OPENCL_MEMORY_SCOPE_WORK_ITEM, + memory_scope_work_group = __OPENCL_MEMORY_SCOPE_WORK_GROUP, + memory_scope_device = __OPENCL_MEMORY_SCOPE_DEVICE, +#if defined(__opencl_c_atomic_scope_all_devices) + memory_scope_all_svm_devices = __OPENCL_MEMORY_SCOPE_ALL_SVM_DEVICES, +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + memory_scope_all_devices = memory_scope_all_svm_devices, +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif // defined(__opencl_c_atomic_scope_all_devices) +/** + * Subgroups have different requirements on forward progress, so just test + * all the relevant macros. + * CL 3.0 sub-groups "they are not guaranteed to make independent forward progress" + * KHR subgroups "Subgroups within a workgroup are independent, make forward progress with respect to each other" + */ +#if defined(cl_intel_subgroups) || defined(cl_khr_subgroups) || defined(__opencl_c_subgroups) + memory_scope_sub_group = __OPENCL_MEMORY_SCOPE_SUB_GROUP +#endif +} memory_scope; + +/** + * Queue a memory fence to ensure correct ordering of memory + * operations between work-items of a work-group to + * image memory. + */ +#define CLK_IMAGE_MEM_FENCE 0x04 + +#ifndef ATOMIC_VAR_INIT +#define ATOMIC_VAR_INIT(x) (x) +#endif //ATOMIC_VAR_INIT +#define ATOMIC_FLAG_INIT 0 + +// enum values aligned with what clang uses in EmitAtomicExpr() +typedef enum memory_order +{ + memory_order_relaxed = __ATOMIC_RELAXED, + memory_order_acquire = __ATOMIC_ACQUIRE, + memory_order_release = __ATOMIC_RELEASE, + memory_order_acq_rel = __ATOMIC_ACQ_REL, +#if defined(__opencl_c_atomic_order_seq_cst) + memory_order_seq_cst = __ATOMIC_SEQ_CST +#endif +} memory_order; + +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.3, v1.2 s6.12.14, v2.0 s6.13.14 - Image Read and Write Functions + +// These values need to match the runtime equivalent +// +// Addressing Mode. +// +#define CLK_ADDRESS_NONE 0 +#define CLK_ADDRESS_CLAMP_TO_EDGE 2 +#define CLK_ADDRESS_CLAMP 4 +#define CLK_ADDRESS_REPEAT 6 +#define CLK_ADDRESS_MIRRORED_REPEAT 8 + +// +// Coordination Normalization +// +#define CLK_NORMALIZED_COORDS_FALSE 0 +#define CLK_NORMALIZED_COORDS_TRUE 1 + +// +// Filtering Mode. +// +#define CLK_FILTER_NEAREST 0x10 +#define CLK_FILTER_LINEAR 0x20 + +#ifdef cl_khr_gl_msaa_sharing +#pragma OPENCL EXTENSION cl_khr_gl_msaa_sharing : enable +#endif //cl_khr_gl_msaa_sharing + +// +// Channel Datatype. +// +#define CLK_SNORM_INT8 0x10D0 +#define CLK_SNORM_INT16 0x10D1 +#define CLK_UNORM_INT8 0x10D2 +#define CLK_UNORM_INT16 0x10D3 +#define CLK_UNORM_SHORT_565 0x10D4 +#define CLK_UNORM_SHORT_555 0x10D5 +#define CLK_UNORM_INT_101010 0x10D6 +#define CLK_SIGNED_INT8 0x10D7 +#define CLK_SIGNED_INT16 0x10D8 +#define CLK_SIGNED_INT32 0x10D9 +#define CLK_UNSIGNED_INT8 0x10DA +#define CLK_UNSIGNED_INT16 0x10DB +#define CLK_UNSIGNED_INT32 0x10DC +#define CLK_HALF_FLOAT 0x10DD +#define CLK_FLOAT 0x10DE +#define CLK_UNORM_INT24 0x10DF +#if __OPENCL_C_VERSION__ >= CL_VERSION_3_0 +#define CLK_UNORM_INT_101010_2 0x10E0 +#endif // __OPENCL_C_VERSION__ >= CL_VERSION_3_0 +#ifdef __opencl_c_ext_image_raw10_raw12 +#define CLK_UNSIGNED_INT_RAW10_EXT 0x10E3 +#define CLK_UNSIGNED_INT_RAW12_EXT 0x10E4 +#endif // __opencl_c_ext_image_raw10_raw12 + +// Channel order, numbering must be aligned with cl_channel_order in cl.h +// +#define CLK_R 0x10B0 +#define CLK_A 0x10B1 +#define CLK_RG 0x10B2 +#define CLK_RA 0x10B3 +#define CLK_RGB 0x10B4 +#define CLK_RGBA 0x10B5 +#define CLK_BGRA 0x10B6 +#define CLK_ARGB 0x10B7 +#define CLK_INTENSITY 0x10B8 +#define CLK_LUMINANCE 0x10B9 +#define CLK_Rx 0x10BA +#define CLK_RGx 0x10BB +#define CLK_RGBx 0x10BC +#define CLK_DEPTH 0x10BD +#define CLK_DEPTH_STENCIL 0x10BE +#if __OPENCL_C_VERSION__ >= CL_VERSION_2_0 +#define CLK_sRGB 0x10BF +#define CLK_sRGBx 0x10C0 +#define CLK_sRGBA 0x10C1 +#define CLK_sBGRA 0x10C2 +#define CLK_ABGR 0x10C3 +#endif //__OPENCL_C_VERSION__ >= CL_VERSION_2_0 + +// OpenCL v2.0 s6.13.16 - Pipe Functions +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#define CLK_NULL_RESERVE_ID (__builtin_astype(((void*)(__SIZE_MAX__)), reserve_id_t)) + +// OpenCL v2.0 s6.13.17 - Enqueue Kernels +#define CL_COMPLETE 0x0 +#define CL_RUNNING 0x1 +#define CL_SUBMITTED 0x2 +#define CL_QUEUED 0x3 + +#define CLK_SUCCESS 0 +#define CLK_ENQUEUE_FAILURE -101 +#define CLK_INVALID_QUEUE -102 +#define CLK_INVALID_NDRANGE -160 +#define CLK_INVALID_EVENT_WAIT_LIST -57 +#define CLK_DEVICE_QUEUE_FULL -161 +#define CLK_INVALID_ARG_SIZE -51 +#define CLK_EVENT_ALLOCATION_FAILURE -100 +#define CLK_OUT_OF_RESOURCES -5 + +#define CLK_NULL_QUEUE 0 +#define CLK_NULL_EVENT (__builtin_astype(((__SIZE_MAX__)), clk_event_t)) + +// execution model related definitions +#define CLK_ENQUEUE_FLAGS_NO_WAIT 0x0 +#define CLK_ENQUEUE_FLAGS_WAIT_KERNEL 0x1 +#define CLK_ENQUEUE_FLAGS_WAIT_WORK_GROUP 0x2 + +typedef int kernel_enqueue_flags_t; +typedef int clk_profiling_info; + +// Profiling info name (see capture_event_profiling_info) +#define CLK_PROFILING_COMMAND_EXEC_TIME 0x1 + +#define MAX_WORK_DIM 3 + +#ifdef __opencl_c_device_enqueue +typedef struct { + unsigned int workDimension; + size_t globalWorkOffset[MAX_WORK_DIM]; + size_t globalWorkSize[MAX_WORK_DIM]; + size_t localWorkSize[MAX_WORK_DIM]; +} ndrange_t; +#endif // __opencl_c_device_enqueue + +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * OpenCL v1.1/1.2/2.0 s6.2.4.2 - as_type operators + * Reinterprets a data type as another data type of the same size + */ +#define as_char(x) __builtin_astype((x), char) +#define as_char2(x) __builtin_astype((x), char2) +#define as_char3(x) __builtin_astype((x), char3) +#define as_char4(x) __builtin_astype((x), char4) +#define as_char8(x) __builtin_astype((x), char8) +#define as_char16(x) __builtin_astype((x), char16) + +#define as_uchar(x) __builtin_astype((x), uchar) +#define as_uchar2(x) __builtin_astype((x), uchar2) +#define as_uchar3(x) __builtin_astype((x), uchar3) +#define as_uchar4(x) __builtin_astype((x), uchar4) +#define as_uchar8(x) __builtin_astype((x), uchar8) +#define as_uchar16(x) __builtin_astype((x), uchar16) + +#define as_short(x) __builtin_astype((x), short) +#define as_short2(x) __builtin_astype((x), short2) +#define as_short3(x) __builtin_astype((x), short3) +#define as_short4(x) __builtin_astype((x), short4) +#define as_short8(x) __builtin_astype((x), short8) +#define as_short16(x) __builtin_astype((x), short16) + +#define as_ushort(x) __builtin_astype((x), ushort) +#define as_ushort2(x) __builtin_astype((x), ushort2) +#define as_ushort3(x) __builtin_astype((x), ushort3) +#define as_ushort4(x) __builtin_astype((x), ushort4) +#define as_ushort8(x) __builtin_astype((x), ushort8) +#define as_ushort16(x) __builtin_astype((x), ushort16) + +#define as_int(x) __builtin_astype((x), int) +#define as_int2(x) __builtin_astype((x), int2) +#define as_int3(x) __builtin_astype((x), int3) +#define as_int4(x) __builtin_astype((x), int4) +#define as_int8(x) __builtin_astype((x), int8) +#define as_int16(x) __builtin_astype((x), int16) + +#define as_uint(x) __builtin_astype((x), uint) +#define as_uint2(x) __builtin_astype((x), uint2) +#define as_uint3(x) __builtin_astype((x), uint3) +#define as_uint4(x) __builtin_astype((x), uint4) +#define as_uint8(x) __builtin_astype((x), uint8) +#define as_uint16(x) __builtin_astype((x), uint16) + +#define as_long(x) __builtin_astype((x), long) +#define as_long2(x) __builtin_astype((x), long2) +#define as_long3(x) __builtin_astype((x), long3) +#define as_long4(x) __builtin_astype((x), long4) +#define as_long8(x) __builtin_astype((x), long8) +#define as_long16(x) __builtin_astype((x), long16) + +#define as_ulong(x) __builtin_astype((x), ulong) +#define as_ulong2(x) __builtin_astype((x), ulong2) +#define as_ulong3(x) __builtin_astype((x), ulong3) +#define as_ulong4(x) __builtin_astype((x), ulong4) +#define as_ulong8(x) __builtin_astype((x), ulong8) +#define as_ulong16(x) __builtin_astype((x), ulong16) + +#define as_float(x) __builtin_astype((x), float) +#define as_float2(x) __builtin_astype((x), float2) +#define as_float3(x) __builtin_astype((x), float3) +#define as_float4(x) __builtin_astype((x), float4) +#define as_float8(x) __builtin_astype((x), float8) +#define as_float16(x) __builtin_astype((x), float16) + +#ifdef cl_khr_fp64 +#define as_double(x) __builtin_astype((x), double) +#define as_double2(x) __builtin_astype((x), double2) +#define as_double3(x) __builtin_astype((x), double3) +#define as_double4(x) __builtin_astype((x), double4) +#define as_double8(x) __builtin_astype((x), double8) +#define as_double16(x) __builtin_astype((x), double16) +#endif // cl_khr_fp64 + +#ifdef cl_khr_fp16 +#define as_half(x) __builtin_astype((x), half) +#define as_half2(x) __builtin_astype((x), half2) +#define as_half3(x) __builtin_astype((x), half3) +#define as_half4(x) __builtin_astype((x), half4) +#define as_half8(x) __builtin_astype((x), half8) +#define as_half16(x) __builtin_astype((x), half16) +#endif // cl_khr_fp16 + +#define as_size_t(x) __builtin_astype((x), size_t) +#define as_ptrdiff_t(x) __builtin_astype((x), ptrdiff_t) +#define as_intptr_t(x) __builtin_astype((x), intptr_t) +#define as_uintptr_t(x) __builtin_astype((x), uintptr_t) + +// C++ for OpenCL - __remove_address_space +#if defined(__OPENCL_CPP_VERSION__) +template struct __remove_address_space { using type = _Tp; }; +#if defined(__opencl_c_generic_address_space) +template struct __remove_address_space<__generic _Tp> { + using type = _Tp; +}; +#endif +template struct __remove_address_space<__global _Tp> { + using type = _Tp; +}; +template struct __remove_address_space<__private _Tp> { + using type = _Tp; +}; +template struct __remove_address_space<__local _Tp> { + using type = _Tp; +}; +template struct __remove_address_space<__constant _Tp> { + using type = _Tp; +}; +#endif + +// OpenCL v1.1 s6.9, v1.2/2.0 s6.10 - Function qualifiers + +#define __kernel_exec(X, typen) __kernel \ + __attribute__((work_group_size_hint(X, 1, 1))) \ + __attribute__((vec_type_hint(typen))) + +#define kernel_exec(X, typen) __kernel \ + __attribute__((work_group_size_hint(X, 1, 1))) \ + __attribute__((vec_type_hint(typen))) + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +// OpenCL v1.2 s6.12.13, v2.0 s6.13.13 - printf + +int printf(__constant const char* st, ...) __attribute__((format(printf, 1, 2))); +#endif + +#ifdef cl_intel_device_side_avc_motion_estimation + +#define CLK_AVC_ME_MAJOR_16x16_INTEL 0x0 +#define CLK_AVC_ME_MAJOR_16x8_INTEL 0x1 +#define CLK_AVC_ME_MAJOR_8x16_INTEL 0x2 +#define CLK_AVC_ME_MAJOR_8x8_INTEL 0x3 + +#define CLK_AVC_ME_MINOR_8x8_INTEL 0x0 +#define CLK_AVC_ME_MINOR_8x4_INTEL 0x1 +#define CLK_AVC_ME_MINOR_4x8_INTEL 0x2 +#define CLK_AVC_ME_MINOR_4x4_INTEL 0x3 + +#define CLK_AVC_ME_MAJOR_FORWARD_INTEL 0x0 +#define CLK_AVC_ME_MAJOR_BACKWARD_INTEL 0x1 +#define CLK_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2 + +#define CLK_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0 +#define CLK_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E +#define CLK_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D +#define CLK_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B +#define CLK_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77 +#define CLK_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F +#define CLK_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F +#define CLK_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F + +#define CLK_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0 +#define CLK_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1 +#define CLK_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2 + +#define CLK_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0 +#define CLK_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1 +#define CLK_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2 +#define CLK_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3 +#define CLK_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4 +#define CLK_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5 +#define CLK_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6 +#define CLK_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7 +#define CLK_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8 + +#define CLK_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 +#define CLK_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2 + +#define CLK_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 +#define CLK_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 +#define CLK_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3 + +#define CLK_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0 +#define CLK_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1 +#define CLK_AVC_ME_COST_PRECISION_PEL_INTEL 0x2 +#define CLK_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3 + +#define CLK_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10 +#define CLK_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15 +#define CLK_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20 +#define CLK_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B +#define CLK_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30 + +#define CLK_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0 +#define CLK_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2 +#define CLK_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4 +#define CLK_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8 + +#define CLK_AVC_ME_INTRA_16x16_INTEL 0x0 +#define CLK_AVC_ME_INTRA_8x8_INTEL 0x1 +#define CLK_AVC_ME_INTRA_4x4_INTEL 0x2 + +#define CLK_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0 +#define CLK_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000 + +#define CLK_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL (0x1 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL (0x2 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL (0x3 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL (0x55 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL (0xAA << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL (0xFF << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL (0x1 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL (0x2 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL (0x1 << 26) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL (0x2 << 26) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL (0x1 << 28) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL (0x2 << 28) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL (0x1 << 30) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL (0x2 << 30) + +#define CLK_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00 +#define CLK_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80 + +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_ALL_INTEL 0x0 +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6 +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5 +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3 + +#define CLK_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60 +#define CLK_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10 +#define CLK_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8 +#define CLK_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4 + +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 + +#define CLK_AVC_ME_FRAME_FORWARD_INTEL 0x1 +#define CLK_AVC_ME_FRAME_BACKWARD_INTEL 0x2 +#define CLK_AVC_ME_FRAME_DUAL_INTEL 0x3 + +#define CLK_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0 +#define CLK_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1 + +#define CLK_AVC_ME_INITIALIZE_INTEL 0x0 + +#define CLK_AVC_IME_PAYLOAD_INITIALIZE_INTEL 0x0 +#define CLK_AVC_REF_PAYLOAD_INITIALIZE_INTEL 0x0 +#define CLK_AVC_SIC_PAYLOAD_INITIALIZE_INTEL 0x0 + +#define CLK_AVC_IME_RESULT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_REF_RESULT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_SIC_RESULT_INITIALIZE_INTEL 0x0 + +#define CLK_AVC_IME_RESULT_SINGLE_REFERENCE_STREAMOUT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_IME_RESULT_SINGLE_REFERENCE_STREAMIN_INITIALIZE_INTEL 0x0 +#define CLK_AVC_IME_RESULT_DUAL_REFERENCE_STREAMOUT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_IME_RESULT_DUAL_REFERENCE_STREAMIN_INITIALIZE_INTEL 0x0 + +#endif // cl_intel_device_side_avc_motion_estimation + +// Disable any extensions we may have enabled previously. +#pragma OPENCL EXTENSION all : disable + +#endif //_OPENCL_BASE_H_ diff --git a/llvm/lib/clang/19/include/opencl-c.h b/llvm/lib/clang/19/include/opencl-c.h new file mode 100644 index 0000000000000000000000000000000000000000..20719b74b6b8d1dcec5e6c2be19d6589b51ea1a1 --- /dev/null +++ b/llvm/lib/clang/19/include/opencl-c.h @@ -0,0 +1,18371 @@ +//===--- opencl-c.h - OpenCL C language builtin function header -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _OPENCL_H_ +#define _OPENCL_H_ + +#include "opencl-c-base.h" + +#if defined(__opencl_c_images) +#ifndef cl_khr_depth_images +#define cl_khr_depth_images +#endif //cl_khr_depth_images +#endif //defined(__opencl_c_images) + +#if __OPENCL_C_VERSION__ < CL_VERSION_2_0 +#ifdef cl_khr_3d_image_writes +#pragma OPENCL EXTENSION cl_khr_3d_image_writes : enable +#endif //cl_khr_3d_image_writes +#endif //__OPENCL_C_VERSION__ < CL_VERSION_2_0 + +#if (defined(__OPENCL_CPP_VERSION__) || \ + (__OPENCL_C_VERSION__ >= CL_VERSION_1_2)) && \ + (defined(__SPIR__) || defined(__SPIRV__)) +#pragma OPENCL EXTENSION cl_intel_planar_yuv : begin +#pragma OPENCL EXTENSION cl_intel_planar_yuv : end +#endif // (defined(__OPENCL_CPP_VERSION__) || + // (__OPENCL_C_VERSION__ >= CL_VERSION_1_2)) && + // (defined(__SPIR__) || defined(__SPIRV__)) + +#define __ovld __attribute__((overloadable)) +#define __conv __attribute__((convergent)) + +// Optimizations +#define __purefn __attribute__((pure)) +#define __cnfn __attribute__((const)) + + +// OpenCL v1.1/1.2/2.0 s6.2.3 - Explicit conversions + +char __ovld __cnfn convert_char_rte(char); +char __ovld __cnfn convert_char_sat_rte(char); +char __ovld __cnfn convert_char_rtz(char); +char __ovld __cnfn convert_char_sat_rtz(char); +char __ovld __cnfn convert_char_rtp(char); +char __ovld __cnfn convert_char_sat_rtp(char); +char __ovld __cnfn convert_char_rtn(char); +char __ovld __cnfn convert_char_sat_rtn(char); +char __ovld __cnfn convert_char(char); +char __ovld __cnfn convert_char_sat(char); +char __ovld __cnfn convert_char_rte(uchar); +char __ovld __cnfn convert_char_sat_rte(uchar); +char __ovld __cnfn convert_char_rtz(uchar); +char __ovld __cnfn convert_char_sat_rtz(uchar); +char __ovld __cnfn convert_char_rtp(uchar); +char __ovld __cnfn convert_char_sat_rtp(uchar); +char __ovld __cnfn convert_char_rtn(uchar); +char __ovld __cnfn convert_char_sat_rtn(uchar); +char __ovld __cnfn convert_char(uchar); +char __ovld __cnfn convert_char_sat(uchar); +char __ovld __cnfn convert_char_rte(short); +char __ovld __cnfn convert_char_sat_rte(short); +char __ovld __cnfn convert_char_rtz(short); +char __ovld __cnfn convert_char_sat_rtz(short); +char __ovld __cnfn convert_char_rtp(short); +char __ovld __cnfn convert_char_sat_rtp(short); +char __ovld __cnfn convert_char_rtn(short); +char __ovld __cnfn convert_char_sat_rtn(short); +char __ovld __cnfn convert_char(short); +char __ovld __cnfn convert_char_sat(short); +char __ovld __cnfn convert_char_rte(ushort); +char __ovld __cnfn convert_char_sat_rte(ushort); +char __ovld __cnfn convert_char_rtz(ushort); +char __ovld __cnfn convert_char_sat_rtz(ushort); +char __ovld __cnfn convert_char_rtp(ushort); +char __ovld __cnfn convert_char_sat_rtp(ushort); +char __ovld __cnfn convert_char_rtn(ushort); +char __ovld __cnfn convert_char_sat_rtn(ushort); +char __ovld __cnfn convert_char(ushort); +char __ovld __cnfn convert_char_sat(ushort); +char __ovld __cnfn convert_char_rte(int); +char __ovld __cnfn convert_char_sat_rte(int); +char __ovld __cnfn convert_char_rtz(int); +char __ovld __cnfn convert_char_sat_rtz(int); +char __ovld __cnfn convert_char_rtp(int); +char __ovld __cnfn convert_char_sat_rtp(int); +char __ovld __cnfn convert_char_rtn(int); +char __ovld __cnfn convert_char_sat_rtn(int); +char __ovld __cnfn convert_char(int); +char __ovld __cnfn convert_char_sat(int); +char __ovld __cnfn convert_char_rte(uint); +char __ovld __cnfn convert_char_sat_rte(uint); +char __ovld __cnfn convert_char_rtz(uint); +char __ovld __cnfn convert_char_sat_rtz(uint); +char __ovld __cnfn convert_char_rtp(uint); +char __ovld __cnfn convert_char_sat_rtp(uint); +char __ovld __cnfn convert_char_rtn(uint); +char __ovld __cnfn convert_char_sat_rtn(uint); +char __ovld __cnfn convert_char(uint); +char __ovld __cnfn convert_char_sat(uint); +char __ovld __cnfn convert_char_rte(long); +char __ovld __cnfn convert_char_sat_rte(long); +char __ovld __cnfn convert_char_rtz(long); +char __ovld __cnfn convert_char_sat_rtz(long); +char __ovld __cnfn convert_char_rtp(long); +char __ovld __cnfn convert_char_sat_rtp(long); +char __ovld __cnfn convert_char_rtn(long); +char __ovld __cnfn convert_char_sat_rtn(long); +char __ovld __cnfn convert_char(long); +char __ovld __cnfn convert_char_sat(long); +char __ovld __cnfn convert_char_rte(ulong); +char __ovld __cnfn convert_char_sat_rte(ulong); +char __ovld __cnfn convert_char_rtz(ulong); +char __ovld __cnfn convert_char_sat_rtz(ulong); +char __ovld __cnfn convert_char_rtp(ulong); +char __ovld __cnfn convert_char_sat_rtp(ulong); +char __ovld __cnfn convert_char_rtn(ulong); +char __ovld __cnfn convert_char_sat_rtn(ulong); +char __ovld __cnfn convert_char(ulong); +char __ovld __cnfn convert_char_sat(ulong); +char __ovld __cnfn convert_char_rte(float); +char __ovld __cnfn convert_char_sat_rte(float); +char __ovld __cnfn convert_char_rtz(float); +char __ovld __cnfn convert_char_sat_rtz(float); +char __ovld __cnfn convert_char_rtp(float); +char __ovld __cnfn convert_char_sat_rtp(float); +char __ovld __cnfn convert_char_rtn(float); +char __ovld __cnfn convert_char_sat_rtn(float); +char __ovld __cnfn convert_char(float); +char __ovld __cnfn convert_char_sat(float); +uchar __ovld __cnfn convert_uchar_rte(char); +uchar __ovld __cnfn convert_uchar_sat_rte(char); +uchar __ovld __cnfn convert_uchar_rtz(char); +uchar __ovld __cnfn convert_uchar_sat_rtz(char); +uchar __ovld __cnfn convert_uchar_rtp(char); +uchar __ovld __cnfn convert_uchar_sat_rtp(char); +uchar __ovld __cnfn convert_uchar_rtn(char); +uchar __ovld __cnfn convert_uchar_sat_rtn(char); +uchar __ovld __cnfn convert_uchar(char); +uchar __ovld __cnfn convert_uchar_sat(char); +uchar __ovld __cnfn convert_uchar_rte(uchar); +uchar __ovld __cnfn convert_uchar_sat_rte(uchar); +uchar __ovld __cnfn convert_uchar_rtz(uchar); +uchar __ovld __cnfn convert_uchar_sat_rtz(uchar); +uchar __ovld __cnfn convert_uchar_rtp(uchar); +uchar __ovld __cnfn convert_uchar_sat_rtp(uchar); +uchar __ovld __cnfn convert_uchar_rtn(uchar); +uchar __ovld __cnfn convert_uchar_sat_rtn(uchar); +uchar __ovld __cnfn convert_uchar(uchar); +uchar __ovld __cnfn convert_uchar_sat(uchar); +uchar __ovld __cnfn convert_uchar_rte(short); +uchar __ovld __cnfn convert_uchar_sat_rte(short); +uchar __ovld __cnfn convert_uchar_rtz(short); +uchar __ovld __cnfn convert_uchar_sat_rtz(short); +uchar __ovld __cnfn convert_uchar_rtp(short); +uchar __ovld __cnfn convert_uchar_sat_rtp(short); +uchar __ovld __cnfn convert_uchar_rtn(short); +uchar __ovld __cnfn convert_uchar_sat_rtn(short); +uchar __ovld __cnfn convert_uchar(short); +uchar __ovld __cnfn convert_uchar_sat(short); +uchar __ovld __cnfn convert_uchar_rte(ushort); +uchar __ovld __cnfn convert_uchar_sat_rte(ushort); +uchar __ovld __cnfn convert_uchar_rtz(ushort); +uchar __ovld __cnfn convert_uchar_sat_rtz(ushort); +uchar __ovld __cnfn convert_uchar_rtp(ushort); +uchar __ovld __cnfn convert_uchar_sat_rtp(ushort); +uchar __ovld __cnfn convert_uchar_rtn(ushort); +uchar __ovld __cnfn convert_uchar_sat_rtn(ushort); +uchar __ovld __cnfn convert_uchar(ushort); +uchar __ovld __cnfn convert_uchar_sat(ushort); +uchar __ovld __cnfn convert_uchar_rte(int); +uchar __ovld __cnfn convert_uchar_sat_rte(int); +uchar __ovld __cnfn convert_uchar_rtz(int); +uchar __ovld __cnfn convert_uchar_sat_rtz(int); +uchar __ovld __cnfn convert_uchar_rtp(int); +uchar __ovld __cnfn convert_uchar_sat_rtp(int); +uchar __ovld __cnfn convert_uchar_rtn(int); +uchar __ovld __cnfn convert_uchar_sat_rtn(int); +uchar __ovld __cnfn convert_uchar(int); +uchar __ovld __cnfn convert_uchar_sat(int); +uchar __ovld __cnfn convert_uchar_rte(uint); +uchar __ovld __cnfn convert_uchar_sat_rte(uint); +uchar __ovld __cnfn convert_uchar_rtz(uint); +uchar __ovld __cnfn convert_uchar_sat_rtz(uint); +uchar __ovld __cnfn convert_uchar_rtp(uint); +uchar __ovld __cnfn convert_uchar_sat_rtp(uint); +uchar __ovld __cnfn convert_uchar_rtn(uint); +uchar __ovld __cnfn convert_uchar_sat_rtn(uint); +uchar __ovld __cnfn convert_uchar(uint); +uchar __ovld __cnfn convert_uchar_sat(uint); +uchar __ovld __cnfn convert_uchar_rte(long); +uchar __ovld __cnfn convert_uchar_sat_rte(long); +uchar __ovld __cnfn convert_uchar_rtz(long); +uchar __ovld __cnfn convert_uchar_sat_rtz(long); +uchar __ovld __cnfn convert_uchar_rtp(long); +uchar __ovld __cnfn convert_uchar_sat_rtp(long); +uchar __ovld __cnfn convert_uchar_rtn(long); +uchar __ovld __cnfn convert_uchar_sat_rtn(long); +uchar __ovld __cnfn convert_uchar(long); +uchar __ovld __cnfn convert_uchar_sat(long); +uchar __ovld __cnfn convert_uchar_rte(ulong); +uchar __ovld __cnfn convert_uchar_sat_rte(ulong); +uchar __ovld __cnfn convert_uchar_rtz(ulong); +uchar __ovld __cnfn convert_uchar_sat_rtz(ulong); +uchar __ovld __cnfn convert_uchar_rtp(ulong); +uchar __ovld __cnfn convert_uchar_sat_rtp(ulong); +uchar __ovld __cnfn convert_uchar_rtn(ulong); +uchar __ovld __cnfn convert_uchar_sat_rtn(ulong); +uchar __ovld __cnfn convert_uchar(ulong); +uchar __ovld __cnfn convert_uchar_sat(ulong); +uchar __ovld __cnfn convert_uchar_rte(float); +uchar __ovld __cnfn convert_uchar_sat_rte(float); +uchar __ovld __cnfn convert_uchar_rtz(float); +uchar __ovld __cnfn convert_uchar_sat_rtz(float); +uchar __ovld __cnfn convert_uchar_rtp(float); +uchar __ovld __cnfn convert_uchar_sat_rtp(float); +uchar __ovld __cnfn convert_uchar_rtn(float); +uchar __ovld __cnfn convert_uchar_sat_rtn(float); +uchar __ovld __cnfn convert_uchar(float); +uchar __ovld __cnfn convert_uchar_sat(float); + +short __ovld __cnfn convert_short_rte(char); +short __ovld __cnfn convert_short_sat_rte(char); +short __ovld __cnfn convert_short_rtz(char); +short __ovld __cnfn convert_short_sat_rtz(char); +short __ovld __cnfn convert_short_rtp(char); +short __ovld __cnfn convert_short_sat_rtp(char); +short __ovld __cnfn convert_short_rtn(char); +short __ovld __cnfn convert_short_sat_rtn(char); +short __ovld __cnfn convert_short(char); +short __ovld __cnfn convert_short_sat(char); +short __ovld __cnfn convert_short_rte(uchar); +short __ovld __cnfn convert_short_sat_rte(uchar); +short __ovld __cnfn convert_short_rtz(uchar); +short __ovld __cnfn convert_short_sat_rtz(uchar); +short __ovld __cnfn convert_short_rtp(uchar); +short __ovld __cnfn convert_short_sat_rtp(uchar); +short __ovld __cnfn convert_short_rtn(uchar); +short __ovld __cnfn convert_short_sat_rtn(uchar); +short __ovld __cnfn convert_short(uchar); +short __ovld __cnfn convert_short_sat(uchar); +short __ovld __cnfn convert_short_rte(short); +short __ovld __cnfn convert_short_sat_rte(short); +short __ovld __cnfn convert_short_rtz(short); +short __ovld __cnfn convert_short_sat_rtz(short); +short __ovld __cnfn convert_short_rtp(short); +short __ovld __cnfn convert_short_sat_rtp(short); +short __ovld __cnfn convert_short_rtn(short); +short __ovld __cnfn convert_short_sat_rtn(short); +short __ovld __cnfn convert_short(short); +short __ovld __cnfn convert_short_sat(short); +short __ovld __cnfn convert_short_rte(ushort); +short __ovld __cnfn convert_short_sat_rte(ushort); +short __ovld __cnfn convert_short_rtz(ushort); +short __ovld __cnfn convert_short_sat_rtz(ushort); +short __ovld __cnfn convert_short_rtp(ushort); +short __ovld __cnfn convert_short_sat_rtp(ushort); +short __ovld __cnfn convert_short_rtn(ushort); +short __ovld __cnfn convert_short_sat_rtn(ushort); +short __ovld __cnfn convert_short(ushort); +short __ovld __cnfn convert_short_sat(ushort); +short __ovld __cnfn convert_short_rte(int); +short __ovld __cnfn convert_short_sat_rte(int); +short __ovld __cnfn convert_short_rtz(int); +short __ovld __cnfn convert_short_sat_rtz(int); +short __ovld __cnfn convert_short_rtp(int); +short __ovld __cnfn convert_short_sat_rtp(int); +short __ovld __cnfn convert_short_rtn(int); +short __ovld __cnfn convert_short_sat_rtn(int); +short __ovld __cnfn convert_short(int); +short __ovld __cnfn convert_short_sat(int); +short __ovld __cnfn convert_short_rte(uint); +short __ovld __cnfn convert_short_sat_rte(uint); +short __ovld __cnfn convert_short_rtz(uint); +short __ovld __cnfn convert_short_sat_rtz(uint); +short __ovld __cnfn convert_short_rtp(uint); +short __ovld __cnfn convert_short_sat_rtp(uint); +short __ovld __cnfn convert_short_rtn(uint); +short __ovld __cnfn convert_short_sat_rtn(uint); +short __ovld __cnfn convert_short(uint); +short __ovld __cnfn convert_short_sat(uint); +short __ovld __cnfn convert_short_rte(long); +short __ovld __cnfn convert_short_sat_rte(long); +short __ovld __cnfn convert_short_rtz(long); +short __ovld __cnfn convert_short_sat_rtz(long); +short __ovld __cnfn convert_short_rtp(long); +short __ovld __cnfn convert_short_sat_rtp(long); +short __ovld __cnfn convert_short_rtn(long); +short __ovld __cnfn convert_short_sat_rtn(long); +short __ovld __cnfn convert_short(long); +short __ovld __cnfn convert_short_sat(long); +short __ovld __cnfn convert_short_rte(ulong); +short __ovld __cnfn convert_short_sat_rte(ulong); +short __ovld __cnfn convert_short_rtz(ulong); +short __ovld __cnfn convert_short_sat_rtz(ulong); +short __ovld __cnfn convert_short_rtp(ulong); +short __ovld __cnfn convert_short_sat_rtp(ulong); +short __ovld __cnfn convert_short_rtn(ulong); +short __ovld __cnfn convert_short_sat_rtn(ulong); +short __ovld __cnfn convert_short(ulong); +short __ovld __cnfn convert_short_sat(ulong); +short __ovld __cnfn convert_short_rte(float); +short __ovld __cnfn convert_short_sat_rte(float); +short __ovld __cnfn convert_short_rtz(float); +short __ovld __cnfn convert_short_sat_rtz(float); +short __ovld __cnfn convert_short_rtp(float); +short __ovld __cnfn convert_short_sat_rtp(float); +short __ovld __cnfn convert_short_rtn(float); +short __ovld __cnfn convert_short_sat_rtn(float); +short __ovld __cnfn convert_short(float); +short __ovld __cnfn convert_short_sat(float); +ushort __ovld __cnfn convert_ushort_rte(char); +ushort __ovld __cnfn convert_ushort_sat_rte(char); +ushort __ovld __cnfn convert_ushort_rtz(char); +ushort __ovld __cnfn convert_ushort_sat_rtz(char); +ushort __ovld __cnfn convert_ushort_rtp(char); +ushort __ovld __cnfn convert_ushort_sat_rtp(char); +ushort __ovld __cnfn convert_ushort_rtn(char); +ushort __ovld __cnfn convert_ushort_sat_rtn(char); +ushort __ovld __cnfn convert_ushort(char); +ushort __ovld __cnfn convert_ushort_sat(char); +ushort __ovld __cnfn convert_ushort_rte(uchar); +ushort __ovld __cnfn convert_ushort_sat_rte(uchar); +ushort __ovld __cnfn convert_ushort_rtz(uchar); +ushort __ovld __cnfn convert_ushort_sat_rtz(uchar); +ushort __ovld __cnfn convert_ushort_rtp(uchar); +ushort __ovld __cnfn convert_ushort_sat_rtp(uchar); +ushort __ovld __cnfn convert_ushort_rtn(uchar); +ushort __ovld __cnfn convert_ushort_sat_rtn(uchar); +ushort __ovld __cnfn convert_ushort(uchar); +ushort __ovld __cnfn convert_ushort_sat(uchar); +ushort __ovld __cnfn convert_ushort_rte(short); +ushort __ovld __cnfn convert_ushort_sat_rte(short); +ushort __ovld __cnfn convert_ushort_rtz(short); +ushort __ovld __cnfn convert_ushort_sat_rtz(short); +ushort __ovld __cnfn convert_ushort_rtp(short); +ushort __ovld __cnfn convert_ushort_sat_rtp(short); +ushort __ovld __cnfn convert_ushort_rtn(short); +ushort __ovld __cnfn convert_ushort_sat_rtn(short); +ushort __ovld __cnfn convert_ushort(short); +ushort __ovld __cnfn convert_ushort_sat(short); +ushort __ovld __cnfn convert_ushort_rte(ushort); +ushort __ovld __cnfn convert_ushort_sat_rte(ushort); +ushort __ovld __cnfn convert_ushort_rtz(ushort); +ushort __ovld __cnfn convert_ushort_sat_rtz(ushort); +ushort __ovld __cnfn convert_ushort_rtp(ushort); +ushort __ovld __cnfn convert_ushort_sat_rtp(ushort); +ushort __ovld __cnfn convert_ushort_rtn(ushort); +ushort __ovld __cnfn convert_ushort_sat_rtn(ushort); +ushort __ovld __cnfn convert_ushort(ushort); +ushort __ovld __cnfn convert_ushort_sat(ushort); +ushort __ovld __cnfn convert_ushort_rte(int); +ushort __ovld __cnfn convert_ushort_sat_rte(int); +ushort __ovld __cnfn convert_ushort_rtz(int); +ushort __ovld __cnfn convert_ushort_sat_rtz(int); +ushort __ovld __cnfn convert_ushort_rtp(int); +ushort __ovld __cnfn convert_ushort_sat_rtp(int); +ushort __ovld __cnfn convert_ushort_rtn(int); +ushort __ovld __cnfn convert_ushort_sat_rtn(int); +ushort __ovld __cnfn convert_ushort(int); +ushort __ovld __cnfn convert_ushort_sat(int); +ushort __ovld __cnfn convert_ushort_rte(uint); +ushort __ovld __cnfn convert_ushort_sat_rte(uint); +ushort __ovld __cnfn convert_ushort_rtz(uint); +ushort __ovld __cnfn convert_ushort_sat_rtz(uint); +ushort __ovld __cnfn convert_ushort_rtp(uint); +ushort __ovld __cnfn convert_ushort_sat_rtp(uint); +ushort __ovld __cnfn convert_ushort_rtn(uint); +ushort __ovld __cnfn convert_ushort_sat_rtn(uint); +ushort __ovld __cnfn convert_ushort(uint); +ushort __ovld __cnfn convert_ushort_sat(uint); +ushort __ovld __cnfn convert_ushort_rte(long); +ushort __ovld __cnfn convert_ushort_sat_rte(long); +ushort __ovld __cnfn convert_ushort_rtz(long); +ushort __ovld __cnfn convert_ushort_sat_rtz(long); +ushort __ovld __cnfn convert_ushort_rtp(long); +ushort __ovld __cnfn convert_ushort_sat_rtp(long); +ushort __ovld __cnfn convert_ushort_rtn(long); +ushort __ovld __cnfn convert_ushort_sat_rtn(long); +ushort __ovld __cnfn convert_ushort(long); +ushort __ovld __cnfn convert_ushort_sat(long); +ushort __ovld __cnfn convert_ushort_rte(ulong); +ushort __ovld __cnfn convert_ushort_sat_rte(ulong); +ushort __ovld __cnfn convert_ushort_rtz(ulong); +ushort __ovld __cnfn convert_ushort_sat_rtz(ulong); +ushort __ovld __cnfn convert_ushort_rtp(ulong); +ushort __ovld __cnfn convert_ushort_sat_rtp(ulong); +ushort __ovld __cnfn convert_ushort_rtn(ulong); +ushort __ovld __cnfn convert_ushort_sat_rtn(ulong); +ushort __ovld __cnfn convert_ushort(ulong); +ushort __ovld __cnfn convert_ushort_sat(ulong); +ushort __ovld __cnfn convert_ushort_rte(float); +ushort __ovld __cnfn convert_ushort_sat_rte(float); +ushort __ovld __cnfn convert_ushort_rtz(float); +ushort __ovld __cnfn convert_ushort_sat_rtz(float); +ushort __ovld __cnfn convert_ushort_rtp(float); +ushort __ovld __cnfn convert_ushort_sat_rtp(float); +ushort __ovld __cnfn convert_ushort_rtn(float); +ushort __ovld __cnfn convert_ushort_sat_rtn(float); +ushort __ovld __cnfn convert_ushort(float); +ushort __ovld __cnfn convert_ushort_sat(float); +int __ovld __cnfn convert_int_rte(char); +int __ovld __cnfn convert_int_sat_rte(char); +int __ovld __cnfn convert_int_rtz(char); +int __ovld __cnfn convert_int_sat_rtz(char); +int __ovld __cnfn convert_int_rtp(char); +int __ovld __cnfn convert_int_sat_rtp(char); +int __ovld __cnfn convert_int_rtn(char); +int __ovld __cnfn convert_int_sat_rtn(char); +int __ovld __cnfn convert_int(char); +int __ovld __cnfn convert_int_sat(char); +int __ovld __cnfn convert_int_rte(uchar); +int __ovld __cnfn convert_int_sat_rte(uchar); +int __ovld __cnfn convert_int_rtz(uchar); +int __ovld __cnfn convert_int_sat_rtz(uchar); +int __ovld __cnfn convert_int_rtp(uchar); +int __ovld __cnfn convert_int_sat_rtp(uchar); +int __ovld __cnfn convert_int_rtn(uchar); +int __ovld __cnfn convert_int_sat_rtn(uchar); +int __ovld __cnfn convert_int(uchar); +int __ovld __cnfn convert_int_sat(uchar); +int __ovld __cnfn convert_int_rte(short); +int __ovld __cnfn convert_int_sat_rte(short); +int __ovld __cnfn convert_int_rtz(short); +int __ovld __cnfn convert_int_sat_rtz(short); +int __ovld __cnfn convert_int_rtp(short); +int __ovld __cnfn convert_int_sat_rtp(short); +int __ovld __cnfn convert_int_rtn(short); +int __ovld __cnfn convert_int_sat_rtn(short); +int __ovld __cnfn convert_int(short); +int __ovld __cnfn convert_int_sat(short); +int __ovld __cnfn convert_int_rte(ushort); +int __ovld __cnfn convert_int_sat_rte(ushort); +int __ovld __cnfn convert_int_rtz(ushort); +int __ovld __cnfn convert_int_sat_rtz(ushort); +int __ovld __cnfn convert_int_rtp(ushort); +int __ovld __cnfn convert_int_sat_rtp(ushort); +int __ovld __cnfn convert_int_rtn(ushort); +int __ovld __cnfn convert_int_sat_rtn(ushort); +int __ovld __cnfn convert_int(ushort); +int __ovld __cnfn convert_int_sat(ushort); +int __ovld __cnfn convert_int_rte(int); +int __ovld __cnfn convert_int_sat_rte(int); +int __ovld __cnfn convert_int_rtz(int); +int __ovld __cnfn convert_int_sat_rtz(int); +int __ovld __cnfn convert_int_rtp(int); +int __ovld __cnfn convert_int_sat_rtp(int); +int __ovld __cnfn convert_int_rtn(int); +int __ovld __cnfn convert_int_sat_rtn(int); +int __ovld __cnfn convert_int(int); +int __ovld __cnfn convert_int_sat(int); +int __ovld __cnfn convert_int_rte(uint); +int __ovld __cnfn convert_int_sat_rte(uint); +int __ovld __cnfn convert_int_rtz(uint); +int __ovld __cnfn convert_int_sat_rtz(uint); +int __ovld __cnfn convert_int_rtp(uint); +int __ovld __cnfn convert_int_sat_rtp(uint); +int __ovld __cnfn convert_int_rtn(uint); +int __ovld __cnfn convert_int_sat_rtn(uint); +int __ovld __cnfn convert_int(uint); +int __ovld __cnfn convert_int_sat(uint); +int __ovld __cnfn convert_int_rte(long); +int __ovld __cnfn convert_int_sat_rte(long); +int __ovld __cnfn convert_int_rtz(long); +int __ovld __cnfn convert_int_sat_rtz(long); +int __ovld __cnfn convert_int_rtp(long); +int __ovld __cnfn convert_int_sat_rtp(long); +int __ovld __cnfn convert_int_rtn(long); +int __ovld __cnfn convert_int_sat_rtn(long); +int __ovld __cnfn convert_int(long); +int __ovld __cnfn convert_int_sat(long); +int __ovld __cnfn convert_int_rte(ulong); +int __ovld __cnfn convert_int_sat_rte(ulong); +int __ovld __cnfn convert_int_rtz(ulong); +int __ovld __cnfn convert_int_sat_rtz(ulong); +int __ovld __cnfn convert_int_rtp(ulong); +int __ovld __cnfn convert_int_sat_rtp(ulong); +int __ovld __cnfn convert_int_rtn(ulong); +int __ovld __cnfn convert_int_sat_rtn(ulong); +int __ovld __cnfn convert_int(ulong); +int __ovld __cnfn convert_int_sat(ulong); +int __ovld __cnfn convert_int_rte(float); +int __ovld __cnfn convert_int_sat_rte(float); +int __ovld __cnfn convert_int_rtz(float); +int __ovld __cnfn convert_int_sat_rtz(float); +int __ovld __cnfn convert_int_rtp(float); +int __ovld __cnfn convert_int_sat_rtp(float); +int __ovld __cnfn convert_int_rtn(float); +int __ovld __cnfn convert_int_sat_rtn(float); +int __ovld __cnfn convert_int(float); +int __ovld __cnfn convert_int_sat(float); +uint __ovld __cnfn convert_uint_rte(char); +uint __ovld __cnfn convert_uint_sat_rte(char); +uint __ovld __cnfn convert_uint_rtz(char); +uint __ovld __cnfn convert_uint_sat_rtz(char); +uint __ovld __cnfn convert_uint_rtp(char); +uint __ovld __cnfn convert_uint_sat_rtp(char); +uint __ovld __cnfn convert_uint_rtn(char); +uint __ovld __cnfn convert_uint_sat_rtn(char); +uint __ovld __cnfn convert_uint(char); +uint __ovld __cnfn convert_uint_sat(char); +uint __ovld __cnfn convert_uint_rte(uchar); +uint __ovld __cnfn convert_uint_sat_rte(uchar); +uint __ovld __cnfn convert_uint_rtz(uchar); +uint __ovld __cnfn convert_uint_sat_rtz(uchar); +uint __ovld __cnfn convert_uint_rtp(uchar); +uint __ovld __cnfn convert_uint_sat_rtp(uchar); +uint __ovld __cnfn convert_uint_rtn(uchar); +uint __ovld __cnfn convert_uint_sat_rtn(uchar); +uint __ovld __cnfn convert_uint(uchar); +uint __ovld __cnfn convert_uint_sat(uchar); +uint __ovld __cnfn convert_uint_rte(short); +uint __ovld __cnfn convert_uint_sat_rte(short); +uint __ovld __cnfn convert_uint_rtz(short); +uint __ovld __cnfn convert_uint_sat_rtz(short); +uint __ovld __cnfn convert_uint_rtp(short); +uint __ovld __cnfn convert_uint_sat_rtp(short); +uint __ovld __cnfn convert_uint_rtn(short); +uint __ovld __cnfn convert_uint_sat_rtn(short); +uint __ovld __cnfn convert_uint(short); +uint __ovld __cnfn convert_uint_sat(short); +uint __ovld __cnfn convert_uint_rte(ushort); +uint __ovld __cnfn convert_uint_sat_rte(ushort); +uint __ovld __cnfn convert_uint_rtz(ushort); +uint __ovld __cnfn convert_uint_sat_rtz(ushort); +uint __ovld __cnfn convert_uint_rtp(ushort); +uint __ovld __cnfn convert_uint_sat_rtp(ushort); +uint __ovld __cnfn convert_uint_rtn(ushort); +uint __ovld __cnfn convert_uint_sat_rtn(ushort); +uint __ovld __cnfn convert_uint(ushort); +uint __ovld __cnfn convert_uint_sat(ushort); +uint __ovld __cnfn convert_uint_rte(int); +uint __ovld __cnfn convert_uint_sat_rte(int); +uint __ovld __cnfn convert_uint_rtz(int); +uint __ovld __cnfn convert_uint_sat_rtz(int); +uint __ovld __cnfn convert_uint_rtp(int); +uint __ovld __cnfn convert_uint_sat_rtp(int); +uint __ovld __cnfn convert_uint_rtn(int); +uint __ovld __cnfn convert_uint_sat_rtn(int); +uint __ovld __cnfn convert_uint(int); +uint __ovld __cnfn convert_uint_sat(int); +uint __ovld __cnfn convert_uint_rte(uint); +uint __ovld __cnfn convert_uint_sat_rte(uint); +uint __ovld __cnfn convert_uint_rtz(uint); +uint __ovld __cnfn convert_uint_sat_rtz(uint); +uint __ovld __cnfn convert_uint_rtp(uint); +uint __ovld __cnfn convert_uint_sat_rtp(uint); +uint __ovld __cnfn convert_uint_rtn(uint); +uint __ovld __cnfn convert_uint_sat_rtn(uint); +uint __ovld __cnfn convert_uint(uint); +uint __ovld __cnfn convert_uint_sat(uint); +uint __ovld __cnfn convert_uint_rte(long); +uint __ovld __cnfn convert_uint_sat_rte(long); +uint __ovld __cnfn convert_uint_rtz(long); +uint __ovld __cnfn convert_uint_sat_rtz(long); +uint __ovld __cnfn convert_uint_rtp(long); +uint __ovld __cnfn convert_uint_sat_rtp(long); +uint __ovld __cnfn convert_uint_rtn(long); +uint __ovld __cnfn convert_uint_sat_rtn(long); +uint __ovld __cnfn convert_uint(long); +uint __ovld __cnfn convert_uint_sat(long); +uint __ovld __cnfn convert_uint_rte(ulong); +uint __ovld __cnfn convert_uint_sat_rte(ulong); +uint __ovld __cnfn convert_uint_rtz(ulong); +uint __ovld __cnfn convert_uint_sat_rtz(ulong); +uint __ovld __cnfn convert_uint_rtp(ulong); +uint __ovld __cnfn convert_uint_sat_rtp(ulong); +uint __ovld __cnfn convert_uint_rtn(ulong); +uint __ovld __cnfn convert_uint_sat_rtn(ulong); +uint __ovld __cnfn convert_uint(ulong); +uint __ovld __cnfn convert_uint_sat(ulong); +uint __ovld __cnfn convert_uint_rte(float); +uint __ovld __cnfn convert_uint_sat_rte(float); +uint __ovld __cnfn convert_uint_rtz(float); +uint __ovld __cnfn convert_uint_sat_rtz(float); +uint __ovld __cnfn convert_uint_rtp(float); +uint __ovld __cnfn convert_uint_sat_rtp(float); +uint __ovld __cnfn convert_uint_rtn(float); +uint __ovld __cnfn convert_uint_sat_rtn(float); +uint __ovld __cnfn convert_uint(float); +uint __ovld __cnfn convert_uint_sat(float); +long __ovld __cnfn convert_long_rte(char); +long __ovld __cnfn convert_long_sat_rte(char); +long __ovld __cnfn convert_long_rtz(char); +long __ovld __cnfn convert_long_sat_rtz(char); +long __ovld __cnfn convert_long_rtp(char); +long __ovld __cnfn convert_long_sat_rtp(char); +long __ovld __cnfn convert_long_rtn(char); +long __ovld __cnfn convert_long_sat_rtn(char); +long __ovld __cnfn convert_long(char); +long __ovld __cnfn convert_long_sat(char); +long __ovld __cnfn convert_long_rte(uchar); +long __ovld __cnfn convert_long_sat_rte(uchar); +long __ovld __cnfn convert_long_rtz(uchar); +long __ovld __cnfn convert_long_sat_rtz(uchar); +long __ovld __cnfn convert_long_rtp(uchar); +long __ovld __cnfn convert_long_sat_rtp(uchar); +long __ovld __cnfn convert_long_rtn(uchar); +long __ovld __cnfn convert_long_sat_rtn(uchar); +long __ovld __cnfn convert_long(uchar); +long __ovld __cnfn convert_long_sat(uchar); +long __ovld __cnfn convert_long_rte(short); +long __ovld __cnfn convert_long_sat_rte(short); +long __ovld __cnfn convert_long_rtz(short); +long __ovld __cnfn convert_long_sat_rtz(short); +long __ovld __cnfn convert_long_rtp(short); +long __ovld __cnfn convert_long_sat_rtp(short); +long __ovld __cnfn convert_long_rtn(short); +long __ovld __cnfn convert_long_sat_rtn(short); +long __ovld __cnfn convert_long(short); +long __ovld __cnfn convert_long_sat(short); +long __ovld __cnfn convert_long_rte(ushort); +long __ovld __cnfn convert_long_sat_rte(ushort); +long __ovld __cnfn convert_long_rtz(ushort); +long __ovld __cnfn convert_long_sat_rtz(ushort); +long __ovld __cnfn convert_long_rtp(ushort); +long __ovld __cnfn convert_long_sat_rtp(ushort); +long __ovld __cnfn convert_long_rtn(ushort); +long __ovld __cnfn convert_long_sat_rtn(ushort); +long __ovld __cnfn convert_long(ushort); +long __ovld __cnfn convert_long_sat(ushort); +long __ovld __cnfn convert_long_rte(int); +long __ovld __cnfn convert_long_sat_rte(int); +long __ovld __cnfn convert_long_rtz(int); +long __ovld __cnfn convert_long_sat_rtz(int); +long __ovld __cnfn convert_long_rtp(int); +long __ovld __cnfn convert_long_sat_rtp(int); +long __ovld __cnfn convert_long_rtn(int); +long __ovld __cnfn convert_long_sat_rtn(int); +long __ovld __cnfn convert_long(int); +long __ovld __cnfn convert_long_sat(int); +long __ovld __cnfn convert_long_rte(uint); +long __ovld __cnfn convert_long_sat_rte(uint); +long __ovld __cnfn convert_long_rtz(uint); +long __ovld __cnfn convert_long_sat_rtz(uint); +long __ovld __cnfn convert_long_rtp(uint); +long __ovld __cnfn convert_long_sat_rtp(uint); +long __ovld __cnfn convert_long_rtn(uint); +long __ovld __cnfn convert_long_sat_rtn(uint); +long __ovld __cnfn convert_long(uint); +long __ovld __cnfn convert_long_sat(uint); +long __ovld __cnfn convert_long_rte(long); +long __ovld __cnfn convert_long_sat_rte(long); +long __ovld __cnfn convert_long_rtz(long); +long __ovld __cnfn convert_long_sat_rtz(long); +long __ovld __cnfn convert_long_rtp(long); +long __ovld __cnfn convert_long_sat_rtp(long); +long __ovld __cnfn convert_long_rtn(long); +long __ovld __cnfn convert_long_sat_rtn(long); +long __ovld __cnfn convert_long(long); +long __ovld __cnfn convert_long_sat(long); +long __ovld __cnfn convert_long_rte(ulong); +long __ovld __cnfn convert_long_sat_rte(ulong); +long __ovld __cnfn convert_long_rtz(ulong); +long __ovld __cnfn convert_long_sat_rtz(ulong); +long __ovld __cnfn convert_long_rtp(ulong); +long __ovld __cnfn convert_long_sat_rtp(ulong); +long __ovld __cnfn convert_long_rtn(ulong); +long __ovld __cnfn convert_long_sat_rtn(ulong); +long __ovld __cnfn convert_long(ulong); +long __ovld __cnfn convert_long_sat(ulong); +long __ovld __cnfn convert_long_rte(float); +long __ovld __cnfn convert_long_sat_rte(float); +long __ovld __cnfn convert_long_rtz(float); +long __ovld __cnfn convert_long_sat_rtz(float); +long __ovld __cnfn convert_long_rtp(float); +long __ovld __cnfn convert_long_sat_rtp(float); +long __ovld __cnfn convert_long_rtn(float); +long __ovld __cnfn convert_long_sat_rtn(float); +long __ovld __cnfn convert_long(float); +long __ovld __cnfn convert_long_sat(float); +ulong __ovld __cnfn convert_ulong_rte(char); +ulong __ovld __cnfn convert_ulong_sat_rte(char); +ulong __ovld __cnfn convert_ulong_rtz(char); +ulong __ovld __cnfn convert_ulong_sat_rtz(char); +ulong __ovld __cnfn convert_ulong_rtp(char); +ulong __ovld __cnfn convert_ulong_sat_rtp(char); +ulong __ovld __cnfn convert_ulong_rtn(char); +ulong __ovld __cnfn convert_ulong_sat_rtn(char); +ulong __ovld __cnfn convert_ulong(char); +ulong __ovld __cnfn convert_ulong_sat(char); +ulong __ovld __cnfn convert_ulong_rte(uchar); +ulong __ovld __cnfn convert_ulong_sat_rte(uchar); +ulong __ovld __cnfn convert_ulong_rtz(uchar); +ulong __ovld __cnfn convert_ulong_sat_rtz(uchar); +ulong __ovld __cnfn convert_ulong_rtp(uchar); +ulong __ovld __cnfn convert_ulong_sat_rtp(uchar); +ulong __ovld __cnfn convert_ulong_rtn(uchar); +ulong __ovld __cnfn convert_ulong_sat_rtn(uchar); +ulong __ovld __cnfn convert_ulong(uchar); +ulong __ovld __cnfn convert_ulong_sat(uchar); +ulong __ovld __cnfn convert_ulong_rte(short); +ulong __ovld __cnfn convert_ulong_sat_rte(short); +ulong __ovld __cnfn convert_ulong_rtz(short); +ulong __ovld __cnfn convert_ulong_sat_rtz(short); +ulong __ovld __cnfn convert_ulong_rtp(short); +ulong __ovld __cnfn convert_ulong_sat_rtp(short); +ulong __ovld __cnfn convert_ulong_rtn(short); +ulong __ovld __cnfn convert_ulong_sat_rtn(short); +ulong __ovld __cnfn convert_ulong(short); +ulong __ovld __cnfn convert_ulong_sat(short); +ulong __ovld __cnfn convert_ulong_rte(ushort); +ulong __ovld __cnfn convert_ulong_sat_rte(ushort); +ulong __ovld __cnfn convert_ulong_rtz(ushort); +ulong __ovld __cnfn convert_ulong_sat_rtz(ushort); +ulong __ovld __cnfn convert_ulong_rtp(ushort); +ulong __ovld __cnfn convert_ulong_sat_rtp(ushort); +ulong __ovld __cnfn convert_ulong_rtn(ushort); +ulong __ovld __cnfn convert_ulong_sat_rtn(ushort); +ulong __ovld __cnfn convert_ulong(ushort); +ulong __ovld __cnfn convert_ulong_sat(ushort); +ulong __ovld __cnfn convert_ulong_rte(int); +ulong __ovld __cnfn convert_ulong_sat_rte(int); +ulong __ovld __cnfn convert_ulong_rtz(int); +ulong __ovld __cnfn convert_ulong_sat_rtz(int); +ulong __ovld __cnfn convert_ulong_rtp(int); +ulong __ovld __cnfn convert_ulong_sat_rtp(int); +ulong __ovld __cnfn convert_ulong_rtn(int); +ulong __ovld __cnfn convert_ulong_sat_rtn(int); +ulong __ovld __cnfn convert_ulong(int); +ulong __ovld __cnfn convert_ulong_sat(int); +ulong __ovld __cnfn convert_ulong_rte(uint); +ulong __ovld __cnfn convert_ulong_sat_rte(uint); +ulong __ovld __cnfn convert_ulong_rtz(uint); +ulong __ovld __cnfn convert_ulong_sat_rtz(uint); +ulong __ovld __cnfn convert_ulong_rtp(uint); +ulong __ovld __cnfn convert_ulong_sat_rtp(uint); +ulong __ovld __cnfn convert_ulong_rtn(uint); +ulong __ovld __cnfn convert_ulong_sat_rtn(uint); +ulong __ovld __cnfn convert_ulong(uint); +ulong __ovld __cnfn convert_ulong_sat(uint); +ulong __ovld __cnfn convert_ulong_rte(long); +ulong __ovld __cnfn convert_ulong_sat_rte(long); +ulong __ovld __cnfn convert_ulong_rtz(long); +ulong __ovld __cnfn convert_ulong_sat_rtz(long); +ulong __ovld __cnfn convert_ulong_rtp(long); +ulong __ovld __cnfn convert_ulong_sat_rtp(long); +ulong __ovld __cnfn convert_ulong_rtn(long); +ulong __ovld __cnfn convert_ulong_sat_rtn(long); +ulong __ovld __cnfn convert_ulong(long); +ulong __ovld __cnfn convert_ulong_sat(long); +ulong __ovld __cnfn convert_ulong_rte(ulong); +ulong __ovld __cnfn convert_ulong_sat_rte(ulong); +ulong __ovld __cnfn convert_ulong_rtz(ulong); +ulong __ovld __cnfn convert_ulong_sat_rtz(ulong); +ulong __ovld __cnfn convert_ulong_rtp(ulong); +ulong __ovld __cnfn convert_ulong_sat_rtp(ulong); +ulong __ovld __cnfn convert_ulong_rtn(ulong); +ulong __ovld __cnfn convert_ulong_sat_rtn(ulong); +ulong __ovld __cnfn convert_ulong(ulong); +ulong __ovld __cnfn convert_ulong_sat(ulong); +ulong __ovld __cnfn convert_ulong_rte(float); +ulong __ovld __cnfn convert_ulong_sat_rte(float); +ulong __ovld __cnfn convert_ulong_rtz(float); +ulong __ovld __cnfn convert_ulong_sat_rtz(float); +ulong __ovld __cnfn convert_ulong_rtp(float); +ulong __ovld __cnfn convert_ulong_sat_rtp(float); +ulong __ovld __cnfn convert_ulong_rtn(float); +ulong __ovld __cnfn convert_ulong_sat_rtn(float); +ulong __ovld __cnfn convert_ulong(float); +ulong __ovld __cnfn convert_ulong_sat(float); +float __ovld __cnfn convert_float_rte(char); +float __ovld __cnfn convert_float_rtz(char); +float __ovld __cnfn convert_float_rtp(char); +float __ovld __cnfn convert_float_rtn(char); +float __ovld __cnfn convert_float(char); +float __ovld __cnfn convert_float_rte(uchar); +float __ovld __cnfn convert_float_rtz(uchar); +float __ovld __cnfn convert_float_rtp(uchar); +float __ovld __cnfn convert_float_rtn(uchar); +float __ovld __cnfn convert_float(uchar); +float __ovld __cnfn convert_float_rte(short); +float __ovld __cnfn convert_float_rtz(short); +float __ovld __cnfn convert_float_rtp(short); +float __ovld __cnfn convert_float_rtn(short); +float __ovld __cnfn convert_float(short); +float __ovld __cnfn convert_float_rte(ushort); +float __ovld __cnfn convert_float_rtz(ushort); +float __ovld __cnfn convert_float_rtp(ushort); +float __ovld __cnfn convert_float_rtn(ushort); +float __ovld __cnfn convert_float(ushort); +float __ovld __cnfn convert_float_rte(int); +float __ovld __cnfn convert_float_rtz(int); +float __ovld __cnfn convert_float_rtp(int); +float __ovld __cnfn convert_float_rtn(int); +float __ovld __cnfn convert_float(int); +float __ovld __cnfn convert_float_rte(uint); +float __ovld __cnfn convert_float_rtz(uint); +float __ovld __cnfn convert_float_rtp(uint); +float __ovld __cnfn convert_float_rtn(uint); +float __ovld __cnfn convert_float(uint); +float __ovld __cnfn convert_float_rte(long); +float __ovld __cnfn convert_float_rtz(long); +float __ovld __cnfn convert_float_rtp(long); +float __ovld __cnfn convert_float_rtn(long); +float __ovld __cnfn convert_float(long); +float __ovld __cnfn convert_float_rte(ulong); +float __ovld __cnfn convert_float_rtz(ulong); +float __ovld __cnfn convert_float_rtp(ulong); +float __ovld __cnfn convert_float_rtn(ulong); +float __ovld __cnfn convert_float(ulong); +float __ovld __cnfn convert_float_rte(float); +float __ovld __cnfn convert_float_rtz(float); +float __ovld __cnfn convert_float_rtp(float); +float __ovld __cnfn convert_float_rtn(float); +float __ovld __cnfn convert_float(float); +char2 __ovld __cnfn convert_char2_rte(char2); +char2 __ovld __cnfn convert_char2_sat_rte(char2); +char2 __ovld __cnfn convert_char2_rtz(char2); +char2 __ovld __cnfn convert_char2_sat_rtz(char2); +char2 __ovld __cnfn convert_char2_rtp(char2); +char2 __ovld __cnfn convert_char2_sat_rtp(char2); +char2 __ovld __cnfn convert_char2_rtn(char2); +char2 __ovld __cnfn convert_char2_sat_rtn(char2); +char2 __ovld __cnfn convert_char2(char2); +char2 __ovld __cnfn convert_char2_sat(char2); +char2 __ovld __cnfn convert_char2_rte(uchar2); +char2 __ovld __cnfn convert_char2_sat_rte(uchar2); +char2 __ovld __cnfn convert_char2_rtz(uchar2); +char2 __ovld __cnfn convert_char2_sat_rtz(uchar2); +char2 __ovld __cnfn convert_char2_rtp(uchar2); +char2 __ovld __cnfn convert_char2_sat_rtp(uchar2); +char2 __ovld __cnfn convert_char2_rtn(uchar2); +char2 __ovld __cnfn convert_char2_sat_rtn(uchar2); +char2 __ovld __cnfn convert_char2(uchar2); +char2 __ovld __cnfn convert_char2_sat(uchar2); +char2 __ovld __cnfn convert_char2_rte(short2); +char2 __ovld __cnfn convert_char2_sat_rte(short2); +char2 __ovld __cnfn convert_char2_rtz(short2); +char2 __ovld __cnfn convert_char2_sat_rtz(short2); +char2 __ovld __cnfn convert_char2_rtp(short2); +char2 __ovld __cnfn convert_char2_sat_rtp(short2); +char2 __ovld __cnfn convert_char2_rtn(short2); +char2 __ovld __cnfn convert_char2_sat_rtn(short2); +char2 __ovld __cnfn convert_char2(short2); +char2 __ovld __cnfn convert_char2_sat(short2); +char2 __ovld __cnfn convert_char2_rte(ushort2); +char2 __ovld __cnfn convert_char2_sat_rte(ushort2); +char2 __ovld __cnfn convert_char2_rtz(ushort2); +char2 __ovld __cnfn convert_char2_sat_rtz(ushort2); +char2 __ovld __cnfn convert_char2_rtp(ushort2); +char2 __ovld __cnfn convert_char2_sat_rtp(ushort2); +char2 __ovld __cnfn convert_char2_rtn(ushort2); +char2 __ovld __cnfn convert_char2_sat_rtn(ushort2); +char2 __ovld __cnfn convert_char2(ushort2); +char2 __ovld __cnfn convert_char2_sat(ushort2); +char2 __ovld __cnfn convert_char2_rte(int2); +char2 __ovld __cnfn convert_char2_sat_rte(int2); +char2 __ovld __cnfn convert_char2_rtz(int2); +char2 __ovld __cnfn convert_char2_sat_rtz(int2); +char2 __ovld __cnfn convert_char2_rtp(int2); +char2 __ovld __cnfn convert_char2_sat_rtp(int2); +char2 __ovld __cnfn convert_char2_rtn(int2); +char2 __ovld __cnfn convert_char2_sat_rtn(int2); +char2 __ovld __cnfn convert_char2(int2); +char2 __ovld __cnfn convert_char2_sat(int2); +char2 __ovld __cnfn convert_char2_rte(uint2); +char2 __ovld __cnfn convert_char2_sat_rte(uint2); +char2 __ovld __cnfn convert_char2_rtz(uint2); +char2 __ovld __cnfn convert_char2_sat_rtz(uint2); +char2 __ovld __cnfn convert_char2_rtp(uint2); +char2 __ovld __cnfn convert_char2_sat_rtp(uint2); +char2 __ovld __cnfn convert_char2_rtn(uint2); +char2 __ovld __cnfn convert_char2_sat_rtn(uint2); +char2 __ovld __cnfn convert_char2(uint2); +char2 __ovld __cnfn convert_char2_sat(uint2); +char2 __ovld __cnfn convert_char2_rte(long2); +char2 __ovld __cnfn convert_char2_sat_rte(long2); +char2 __ovld __cnfn convert_char2_rtz(long2); +char2 __ovld __cnfn convert_char2_sat_rtz(long2); +char2 __ovld __cnfn convert_char2_rtp(long2); +char2 __ovld __cnfn convert_char2_sat_rtp(long2); +char2 __ovld __cnfn convert_char2_rtn(long2); +char2 __ovld __cnfn convert_char2_sat_rtn(long2); +char2 __ovld __cnfn convert_char2(long2); +char2 __ovld __cnfn convert_char2_sat(long2); +char2 __ovld __cnfn convert_char2_rte(ulong2); +char2 __ovld __cnfn convert_char2_sat_rte(ulong2); +char2 __ovld __cnfn convert_char2_rtz(ulong2); +char2 __ovld __cnfn convert_char2_sat_rtz(ulong2); +char2 __ovld __cnfn convert_char2_rtp(ulong2); +char2 __ovld __cnfn convert_char2_sat_rtp(ulong2); +char2 __ovld __cnfn convert_char2_rtn(ulong2); +char2 __ovld __cnfn convert_char2_sat_rtn(ulong2); +char2 __ovld __cnfn convert_char2(ulong2); +char2 __ovld __cnfn convert_char2_sat(ulong2); +char2 __ovld __cnfn convert_char2_rte(float2); +char2 __ovld __cnfn convert_char2_sat_rte(float2); +char2 __ovld __cnfn convert_char2_rtz(float2); +char2 __ovld __cnfn convert_char2_sat_rtz(float2); +char2 __ovld __cnfn convert_char2_rtp(float2); +char2 __ovld __cnfn convert_char2_sat_rtp(float2); +char2 __ovld __cnfn convert_char2_rtn(float2); +char2 __ovld __cnfn convert_char2_sat_rtn(float2); +char2 __ovld __cnfn convert_char2(float2); +char2 __ovld __cnfn convert_char2_sat(float2); +uchar2 __ovld __cnfn convert_uchar2_rte(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(char2); +uchar2 __ovld __cnfn convert_uchar2_rtz(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(char2); +uchar2 __ovld __cnfn convert_uchar2_rtp(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(char2); +uchar2 __ovld __cnfn convert_uchar2_rtn(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(char2); +uchar2 __ovld __cnfn convert_uchar2(char2); +uchar2 __ovld __cnfn convert_uchar2_sat(char2); +uchar2 __ovld __cnfn convert_uchar2_rte(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rtz(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rtp(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rtn(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(uchar2); +uchar2 __ovld __cnfn convert_uchar2(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rte(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(short2); +uchar2 __ovld __cnfn convert_uchar2_rtz(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(short2); +uchar2 __ovld __cnfn convert_uchar2_rtp(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(short2); +uchar2 __ovld __cnfn convert_uchar2_rtn(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(short2); +uchar2 __ovld __cnfn convert_uchar2(short2); +uchar2 __ovld __cnfn convert_uchar2_sat(short2); +uchar2 __ovld __cnfn convert_uchar2_rte(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rtz(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rtp(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rtn(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(ushort2); +uchar2 __ovld __cnfn convert_uchar2(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rte(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(int2); +uchar2 __ovld __cnfn convert_uchar2_rtz(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(int2); +uchar2 __ovld __cnfn convert_uchar2_rtp(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(int2); +uchar2 __ovld __cnfn convert_uchar2_rtn(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(int2); +uchar2 __ovld __cnfn convert_uchar2(int2); +uchar2 __ovld __cnfn convert_uchar2_sat(int2); +uchar2 __ovld __cnfn convert_uchar2_rte(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(uint2); +uchar2 __ovld __cnfn convert_uchar2_rtz(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(uint2); +uchar2 __ovld __cnfn convert_uchar2_rtp(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(uint2); +uchar2 __ovld __cnfn convert_uchar2_rtn(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(uint2); +uchar2 __ovld __cnfn convert_uchar2(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat(uint2); +uchar2 __ovld __cnfn convert_uchar2_rte(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(long2); +uchar2 __ovld __cnfn convert_uchar2_rtz(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(long2); +uchar2 __ovld __cnfn convert_uchar2_rtp(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(long2); +uchar2 __ovld __cnfn convert_uchar2_rtn(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(long2); +uchar2 __ovld __cnfn convert_uchar2(long2); +uchar2 __ovld __cnfn convert_uchar2_sat(long2); +uchar2 __ovld __cnfn convert_uchar2_rte(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rtz(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rtp(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rtn(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(ulong2); +uchar2 __ovld __cnfn convert_uchar2(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rte(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(float2); +uchar2 __ovld __cnfn convert_uchar2_rtz(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(float2); +uchar2 __ovld __cnfn convert_uchar2_rtp(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(float2); +uchar2 __ovld __cnfn convert_uchar2_rtn(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(float2); +uchar2 __ovld __cnfn convert_uchar2(float2); +uchar2 __ovld __cnfn convert_uchar2_sat(float2); +short2 __ovld __cnfn convert_short2_rte(char2); +short2 __ovld __cnfn convert_short2_sat_rte(char2); +short2 __ovld __cnfn convert_short2_rtz(char2); +short2 __ovld __cnfn convert_short2_sat_rtz(char2); +short2 __ovld __cnfn convert_short2_rtp(char2); +short2 __ovld __cnfn convert_short2_sat_rtp(char2); +short2 __ovld __cnfn convert_short2_rtn(char2); +short2 __ovld __cnfn convert_short2_sat_rtn(char2); +short2 __ovld __cnfn convert_short2(char2); +short2 __ovld __cnfn convert_short2_sat(char2); +short2 __ovld __cnfn convert_short2_rte(uchar2); +short2 __ovld __cnfn convert_short2_sat_rte(uchar2); +short2 __ovld __cnfn convert_short2_rtz(uchar2); +short2 __ovld __cnfn convert_short2_sat_rtz(uchar2); +short2 __ovld __cnfn convert_short2_rtp(uchar2); +short2 __ovld __cnfn convert_short2_sat_rtp(uchar2); +short2 __ovld __cnfn convert_short2_rtn(uchar2); +short2 __ovld __cnfn convert_short2_sat_rtn(uchar2); +short2 __ovld __cnfn convert_short2(uchar2); +short2 __ovld __cnfn convert_short2_sat(uchar2); +short2 __ovld __cnfn convert_short2_rte(short2); +short2 __ovld __cnfn convert_short2_sat_rte(short2); +short2 __ovld __cnfn convert_short2_rtz(short2); +short2 __ovld __cnfn convert_short2_sat_rtz(short2); +short2 __ovld __cnfn convert_short2_rtp(short2); +short2 __ovld __cnfn convert_short2_sat_rtp(short2); +short2 __ovld __cnfn convert_short2_rtn(short2); +short2 __ovld __cnfn convert_short2_sat_rtn(short2); +short2 __ovld __cnfn convert_short2(short2); +short2 __ovld __cnfn convert_short2_sat(short2); +short2 __ovld __cnfn convert_short2_rte(ushort2); +short2 __ovld __cnfn convert_short2_sat_rte(ushort2); +short2 __ovld __cnfn convert_short2_rtz(ushort2); +short2 __ovld __cnfn convert_short2_sat_rtz(ushort2); +short2 __ovld __cnfn convert_short2_rtp(ushort2); +short2 __ovld __cnfn convert_short2_sat_rtp(ushort2); +short2 __ovld __cnfn convert_short2_rtn(ushort2); +short2 __ovld __cnfn convert_short2_sat_rtn(ushort2); +short2 __ovld __cnfn convert_short2(ushort2); +short2 __ovld __cnfn convert_short2_sat(ushort2); +short2 __ovld __cnfn convert_short2_rte(int2); +short2 __ovld __cnfn convert_short2_sat_rte(int2); +short2 __ovld __cnfn convert_short2_rtz(int2); +short2 __ovld __cnfn convert_short2_sat_rtz(int2); +short2 __ovld __cnfn convert_short2_rtp(int2); +short2 __ovld __cnfn convert_short2_sat_rtp(int2); +short2 __ovld __cnfn convert_short2_rtn(int2); +short2 __ovld __cnfn convert_short2_sat_rtn(int2); +short2 __ovld __cnfn convert_short2(int2); +short2 __ovld __cnfn convert_short2_sat(int2); +short2 __ovld __cnfn convert_short2_rte(uint2); +short2 __ovld __cnfn convert_short2_sat_rte(uint2); +short2 __ovld __cnfn convert_short2_rtz(uint2); +short2 __ovld __cnfn convert_short2_sat_rtz(uint2); +short2 __ovld __cnfn convert_short2_rtp(uint2); +short2 __ovld __cnfn convert_short2_sat_rtp(uint2); +short2 __ovld __cnfn convert_short2_rtn(uint2); +short2 __ovld __cnfn convert_short2_sat_rtn(uint2); +short2 __ovld __cnfn convert_short2(uint2); +short2 __ovld __cnfn convert_short2_sat(uint2); +short2 __ovld __cnfn convert_short2_rte(long2); +short2 __ovld __cnfn convert_short2_sat_rte(long2); +short2 __ovld __cnfn convert_short2_rtz(long2); +short2 __ovld __cnfn convert_short2_sat_rtz(long2); +short2 __ovld __cnfn convert_short2_rtp(long2); +short2 __ovld __cnfn convert_short2_sat_rtp(long2); +short2 __ovld __cnfn convert_short2_rtn(long2); +short2 __ovld __cnfn convert_short2_sat_rtn(long2); +short2 __ovld __cnfn convert_short2(long2); +short2 __ovld __cnfn convert_short2_sat(long2); +short2 __ovld __cnfn convert_short2_rte(ulong2); +short2 __ovld __cnfn convert_short2_sat_rte(ulong2); +short2 __ovld __cnfn convert_short2_rtz(ulong2); +short2 __ovld __cnfn convert_short2_sat_rtz(ulong2); +short2 __ovld __cnfn convert_short2_rtp(ulong2); +short2 __ovld __cnfn convert_short2_sat_rtp(ulong2); +short2 __ovld __cnfn convert_short2_rtn(ulong2); +short2 __ovld __cnfn convert_short2_sat_rtn(ulong2); +short2 __ovld __cnfn convert_short2(ulong2); +short2 __ovld __cnfn convert_short2_sat(ulong2); +short2 __ovld __cnfn convert_short2_rte(float2); +short2 __ovld __cnfn convert_short2_sat_rte(float2); +short2 __ovld __cnfn convert_short2_rtz(float2); +short2 __ovld __cnfn convert_short2_sat_rtz(float2); +short2 __ovld __cnfn convert_short2_rtp(float2); +short2 __ovld __cnfn convert_short2_sat_rtp(float2); +short2 __ovld __cnfn convert_short2_rtn(float2); +short2 __ovld __cnfn convert_short2_sat_rtn(float2); +short2 __ovld __cnfn convert_short2(float2); +short2 __ovld __cnfn convert_short2_sat(float2); +ushort2 __ovld __cnfn convert_ushort2_rte(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(char2); +ushort2 __ovld __cnfn convert_ushort2_rtz(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(char2); +ushort2 __ovld __cnfn convert_ushort2_rtp(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(char2); +ushort2 __ovld __cnfn convert_ushort2_rtn(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(char2); +ushort2 __ovld __cnfn convert_ushort2(char2); +ushort2 __ovld __cnfn convert_ushort2_sat(char2); +ushort2 __ovld __cnfn convert_ushort2_rte(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rtz(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rtp(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rtn(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(uchar2); +ushort2 __ovld __cnfn convert_ushort2(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rte(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(short2); +ushort2 __ovld __cnfn convert_ushort2_rtz(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(short2); +ushort2 __ovld __cnfn convert_ushort2_rtp(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(short2); +ushort2 __ovld __cnfn convert_ushort2_rtn(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(short2); +ushort2 __ovld __cnfn convert_ushort2(short2); +ushort2 __ovld __cnfn convert_ushort2_sat(short2); +ushort2 __ovld __cnfn convert_ushort2_rte(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rtz(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rtp(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rtn(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(ushort2); +ushort2 __ovld __cnfn convert_ushort2(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rte(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(int2); +ushort2 __ovld __cnfn convert_ushort2_rtz(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(int2); +ushort2 __ovld __cnfn convert_ushort2_rtp(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(int2); +ushort2 __ovld __cnfn convert_ushort2_rtn(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(int2); +ushort2 __ovld __cnfn convert_ushort2(int2); +ushort2 __ovld __cnfn convert_ushort2_sat(int2); +ushort2 __ovld __cnfn convert_ushort2_rte(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(uint2); +ushort2 __ovld __cnfn convert_ushort2_rtz(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(uint2); +ushort2 __ovld __cnfn convert_ushort2_rtp(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(uint2); +ushort2 __ovld __cnfn convert_ushort2_rtn(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(uint2); +ushort2 __ovld __cnfn convert_ushort2(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat(uint2); +ushort2 __ovld __cnfn convert_ushort2_rte(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(long2); +ushort2 __ovld __cnfn convert_ushort2_rtz(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(long2); +ushort2 __ovld __cnfn convert_ushort2_rtp(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(long2); +ushort2 __ovld __cnfn convert_ushort2_rtn(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(long2); +ushort2 __ovld __cnfn convert_ushort2(long2); +ushort2 __ovld __cnfn convert_ushort2_sat(long2); +ushort2 __ovld __cnfn convert_ushort2_rte(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rtz(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rtp(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rtn(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(ulong2); +ushort2 __ovld __cnfn convert_ushort2(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rte(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(float2); +ushort2 __ovld __cnfn convert_ushort2_rtz(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(float2); +ushort2 __ovld __cnfn convert_ushort2_rtp(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(float2); +ushort2 __ovld __cnfn convert_ushort2_rtn(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(float2); +ushort2 __ovld __cnfn convert_ushort2(float2); +ushort2 __ovld __cnfn convert_ushort2_sat(float2); +int2 __ovld __cnfn convert_int2_rte(char2); +int2 __ovld __cnfn convert_int2_sat_rte(char2); +int2 __ovld __cnfn convert_int2_rtz(char2); +int2 __ovld __cnfn convert_int2_sat_rtz(char2); +int2 __ovld __cnfn convert_int2_rtp(char2); +int2 __ovld __cnfn convert_int2_sat_rtp(char2); +int2 __ovld __cnfn convert_int2_rtn(char2); +int2 __ovld __cnfn convert_int2_sat_rtn(char2); +int2 __ovld __cnfn convert_int2(char2); +int2 __ovld __cnfn convert_int2_sat(char2); +int2 __ovld __cnfn convert_int2_rte(uchar2); +int2 __ovld __cnfn convert_int2_sat_rte(uchar2); +int2 __ovld __cnfn convert_int2_rtz(uchar2); +int2 __ovld __cnfn convert_int2_sat_rtz(uchar2); +int2 __ovld __cnfn convert_int2_rtp(uchar2); +int2 __ovld __cnfn convert_int2_sat_rtp(uchar2); +int2 __ovld __cnfn convert_int2_rtn(uchar2); +int2 __ovld __cnfn convert_int2_sat_rtn(uchar2); +int2 __ovld __cnfn convert_int2(uchar2); +int2 __ovld __cnfn convert_int2_sat(uchar2); +int2 __ovld __cnfn convert_int2_rte(short2); +int2 __ovld __cnfn convert_int2_sat_rte(short2); +int2 __ovld __cnfn convert_int2_rtz(short2); +int2 __ovld __cnfn convert_int2_sat_rtz(short2); +int2 __ovld __cnfn convert_int2_rtp(short2); +int2 __ovld __cnfn convert_int2_sat_rtp(short2); +int2 __ovld __cnfn convert_int2_rtn(short2); +int2 __ovld __cnfn convert_int2_sat_rtn(short2); +int2 __ovld __cnfn convert_int2(short2); +int2 __ovld __cnfn convert_int2_sat(short2); +int2 __ovld __cnfn convert_int2_rte(ushort2); +int2 __ovld __cnfn convert_int2_sat_rte(ushort2); +int2 __ovld __cnfn convert_int2_rtz(ushort2); +int2 __ovld __cnfn convert_int2_sat_rtz(ushort2); +int2 __ovld __cnfn convert_int2_rtp(ushort2); +int2 __ovld __cnfn convert_int2_sat_rtp(ushort2); +int2 __ovld __cnfn convert_int2_rtn(ushort2); +int2 __ovld __cnfn convert_int2_sat_rtn(ushort2); +int2 __ovld __cnfn convert_int2(ushort2); +int2 __ovld __cnfn convert_int2_sat(ushort2); +int2 __ovld __cnfn convert_int2_rte(int2); +int2 __ovld __cnfn convert_int2_sat_rte(int2); +int2 __ovld __cnfn convert_int2_rtz(int2); +int2 __ovld __cnfn convert_int2_sat_rtz(int2); +int2 __ovld __cnfn convert_int2_rtp(int2); +int2 __ovld __cnfn convert_int2_sat_rtp(int2); +int2 __ovld __cnfn convert_int2_rtn(int2); +int2 __ovld __cnfn convert_int2_sat_rtn(int2); +int2 __ovld __cnfn convert_int2(int2); +int2 __ovld __cnfn convert_int2_sat(int2); +int2 __ovld __cnfn convert_int2_rte(uint2); +int2 __ovld __cnfn convert_int2_sat_rte(uint2); +int2 __ovld __cnfn convert_int2_rtz(uint2); +int2 __ovld __cnfn convert_int2_sat_rtz(uint2); +int2 __ovld __cnfn convert_int2_rtp(uint2); +int2 __ovld __cnfn convert_int2_sat_rtp(uint2); +int2 __ovld __cnfn convert_int2_rtn(uint2); +int2 __ovld __cnfn convert_int2_sat_rtn(uint2); +int2 __ovld __cnfn convert_int2(uint2); +int2 __ovld __cnfn convert_int2_sat(uint2); +int2 __ovld __cnfn convert_int2_rte(long2); +int2 __ovld __cnfn convert_int2_sat_rte(long2); +int2 __ovld __cnfn convert_int2_rtz(long2); +int2 __ovld __cnfn convert_int2_sat_rtz(long2); +int2 __ovld __cnfn convert_int2_rtp(long2); +int2 __ovld __cnfn convert_int2_sat_rtp(long2); +int2 __ovld __cnfn convert_int2_rtn(long2); +int2 __ovld __cnfn convert_int2_sat_rtn(long2); +int2 __ovld __cnfn convert_int2(long2); +int2 __ovld __cnfn convert_int2_sat(long2); +int2 __ovld __cnfn convert_int2_rte(ulong2); +int2 __ovld __cnfn convert_int2_sat_rte(ulong2); +int2 __ovld __cnfn convert_int2_rtz(ulong2); +int2 __ovld __cnfn convert_int2_sat_rtz(ulong2); +int2 __ovld __cnfn convert_int2_rtp(ulong2); +int2 __ovld __cnfn convert_int2_sat_rtp(ulong2); +int2 __ovld __cnfn convert_int2_rtn(ulong2); +int2 __ovld __cnfn convert_int2_sat_rtn(ulong2); +int2 __ovld __cnfn convert_int2(ulong2); +int2 __ovld __cnfn convert_int2_sat(ulong2); +int2 __ovld __cnfn convert_int2_rte(float2); +int2 __ovld __cnfn convert_int2_sat_rte(float2); +int2 __ovld __cnfn convert_int2_rtz(float2); +int2 __ovld __cnfn convert_int2_sat_rtz(float2); +int2 __ovld __cnfn convert_int2_rtp(float2); +int2 __ovld __cnfn convert_int2_sat_rtp(float2); +int2 __ovld __cnfn convert_int2_rtn(float2); +int2 __ovld __cnfn convert_int2_sat_rtn(float2); +int2 __ovld __cnfn convert_int2(float2); +int2 __ovld __cnfn convert_int2_sat(float2); +uint2 __ovld __cnfn convert_uint2_rte(char2); +uint2 __ovld __cnfn convert_uint2_sat_rte(char2); +uint2 __ovld __cnfn convert_uint2_rtz(char2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(char2); +uint2 __ovld __cnfn convert_uint2_rtp(char2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(char2); +uint2 __ovld __cnfn convert_uint2_rtn(char2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(char2); +uint2 __ovld __cnfn convert_uint2(char2); +uint2 __ovld __cnfn convert_uint2_sat(char2); +uint2 __ovld __cnfn convert_uint2_rte(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rte(uchar2); +uint2 __ovld __cnfn convert_uint2_rtz(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(uchar2); +uint2 __ovld __cnfn convert_uint2_rtp(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(uchar2); +uint2 __ovld __cnfn convert_uint2_rtn(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(uchar2); +uint2 __ovld __cnfn convert_uint2(uchar2); +uint2 __ovld __cnfn convert_uint2_sat(uchar2); +uint2 __ovld __cnfn convert_uint2_rte(short2); +uint2 __ovld __cnfn convert_uint2_sat_rte(short2); +uint2 __ovld __cnfn convert_uint2_rtz(short2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(short2); +uint2 __ovld __cnfn convert_uint2_rtp(short2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(short2); +uint2 __ovld __cnfn convert_uint2_rtn(short2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(short2); +uint2 __ovld __cnfn convert_uint2(short2); +uint2 __ovld __cnfn convert_uint2_sat(short2); +uint2 __ovld __cnfn convert_uint2_rte(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rte(ushort2); +uint2 __ovld __cnfn convert_uint2_rtz(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(ushort2); +uint2 __ovld __cnfn convert_uint2_rtp(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(ushort2); +uint2 __ovld __cnfn convert_uint2_rtn(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(ushort2); +uint2 __ovld __cnfn convert_uint2(ushort2); +uint2 __ovld __cnfn convert_uint2_sat(ushort2); +uint2 __ovld __cnfn convert_uint2_rte(int2); +uint2 __ovld __cnfn convert_uint2_sat_rte(int2); +uint2 __ovld __cnfn convert_uint2_rtz(int2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(int2); +uint2 __ovld __cnfn convert_uint2_rtp(int2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(int2); +uint2 __ovld __cnfn convert_uint2_rtn(int2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(int2); +uint2 __ovld __cnfn convert_uint2(int2); +uint2 __ovld __cnfn convert_uint2_sat(int2); +uint2 __ovld __cnfn convert_uint2_rte(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rte(uint2); +uint2 __ovld __cnfn convert_uint2_rtz(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(uint2); +uint2 __ovld __cnfn convert_uint2_rtp(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(uint2); +uint2 __ovld __cnfn convert_uint2_rtn(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(uint2); +uint2 __ovld __cnfn convert_uint2(uint2); +uint2 __ovld __cnfn convert_uint2_sat(uint2); +uint2 __ovld __cnfn convert_uint2_rte(long2); +uint2 __ovld __cnfn convert_uint2_sat_rte(long2); +uint2 __ovld __cnfn convert_uint2_rtz(long2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(long2); +uint2 __ovld __cnfn convert_uint2_rtp(long2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(long2); +uint2 __ovld __cnfn convert_uint2_rtn(long2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(long2); +uint2 __ovld __cnfn convert_uint2(long2); +uint2 __ovld __cnfn convert_uint2_sat(long2); +uint2 __ovld __cnfn convert_uint2_rte(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rte(ulong2); +uint2 __ovld __cnfn convert_uint2_rtz(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(ulong2); +uint2 __ovld __cnfn convert_uint2_rtp(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(ulong2); +uint2 __ovld __cnfn convert_uint2_rtn(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(ulong2); +uint2 __ovld __cnfn convert_uint2(ulong2); +uint2 __ovld __cnfn convert_uint2_sat(ulong2); +uint2 __ovld __cnfn convert_uint2_rte(float2); +uint2 __ovld __cnfn convert_uint2_sat_rte(float2); +uint2 __ovld __cnfn convert_uint2_rtz(float2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(float2); +uint2 __ovld __cnfn convert_uint2_rtp(float2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(float2); +uint2 __ovld __cnfn convert_uint2_rtn(float2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(float2); +uint2 __ovld __cnfn convert_uint2(float2); +uint2 __ovld __cnfn convert_uint2_sat(float2); +long2 __ovld __cnfn convert_long2_rte(char2); +long2 __ovld __cnfn convert_long2_sat_rte(char2); +long2 __ovld __cnfn convert_long2_rtz(char2); +long2 __ovld __cnfn convert_long2_sat_rtz(char2); +long2 __ovld __cnfn convert_long2_rtp(char2); +long2 __ovld __cnfn convert_long2_sat_rtp(char2); +long2 __ovld __cnfn convert_long2_rtn(char2); +long2 __ovld __cnfn convert_long2_sat_rtn(char2); +long2 __ovld __cnfn convert_long2(char2); +long2 __ovld __cnfn convert_long2_sat(char2); +long2 __ovld __cnfn convert_long2_rte(uchar2); +long2 __ovld __cnfn convert_long2_sat_rte(uchar2); +long2 __ovld __cnfn convert_long2_rtz(uchar2); +long2 __ovld __cnfn convert_long2_sat_rtz(uchar2); +long2 __ovld __cnfn convert_long2_rtp(uchar2); +long2 __ovld __cnfn convert_long2_sat_rtp(uchar2); +long2 __ovld __cnfn convert_long2_rtn(uchar2); +long2 __ovld __cnfn convert_long2_sat_rtn(uchar2); +long2 __ovld __cnfn convert_long2(uchar2); +long2 __ovld __cnfn convert_long2_sat(uchar2); +long2 __ovld __cnfn convert_long2_rte(short2); +long2 __ovld __cnfn convert_long2_sat_rte(short2); +long2 __ovld __cnfn convert_long2_rtz(short2); +long2 __ovld __cnfn convert_long2_sat_rtz(short2); +long2 __ovld __cnfn convert_long2_rtp(short2); +long2 __ovld __cnfn convert_long2_sat_rtp(short2); +long2 __ovld __cnfn convert_long2_rtn(short2); +long2 __ovld __cnfn convert_long2_sat_rtn(short2); +long2 __ovld __cnfn convert_long2(short2); +long2 __ovld __cnfn convert_long2_sat(short2); +long2 __ovld __cnfn convert_long2_rte(ushort2); +long2 __ovld __cnfn convert_long2_sat_rte(ushort2); +long2 __ovld __cnfn convert_long2_rtz(ushort2); +long2 __ovld __cnfn convert_long2_sat_rtz(ushort2); +long2 __ovld __cnfn convert_long2_rtp(ushort2); +long2 __ovld __cnfn convert_long2_sat_rtp(ushort2); +long2 __ovld __cnfn convert_long2_rtn(ushort2); +long2 __ovld __cnfn convert_long2_sat_rtn(ushort2); +long2 __ovld __cnfn convert_long2(ushort2); +long2 __ovld __cnfn convert_long2_sat(ushort2); +long2 __ovld __cnfn convert_long2_rte(int2); +long2 __ovld __cnfn convert_long2_sat_rte(int2); +long2 __ovld __cnfn convert_long2_rtz(int2); +long2 __ovld __cnfn convert_long2_sat_rtz(int2); +long2 __ovld __cnfn convert_long2_rtp(int2); +long2 __ovld __cnfn convert_long2_sat_rtp(int2); +long2 __ovld __cnfn convert_long2_rtn(int2); +long2 __ovld __cnfn convert_long2_sat_rtn(int2); +long2 __ovld __cnfn convert_long2(int2); +long2 __ovld __cnfn convert_long2_sat(int2); +long2 __ovld __cnfn convert_long2_rte(uint2); +long2 __ovld __cnfn convert_long2_sat_rte(uint2); +long2 __ovld __cnfn convert_long2_rtz(uint2); +long2 __ovld __cnfn convert_long2_sat_rtz(uint2); +long2 __ovld __cnfn convert_long2_rtp(uint2); +long2 __ovld __cnfn convert_long2_sat_rtp(uint2); +long2 __ovld __cnfn convert_long2_rtn(uint2); +long2 __ovld __cnfn convert_long2_sat_rtn(uint2); +long2 __ovld __cnfn convert_long2(uint2); +long2 __ovld __cnfn convert_long2_sat(uint2); +long2 __ovld __cnfn convert_long2_rte(long2); +long2 __ovld __cnfn convert_long2_sat_rte(long2); +long2 __ovld __cnfn convert_long2_rtz(long2); +long2 __ovld __cnfn convert_long2_sat_rtz(long2); +long2 __ovld __cnfn convert_long2_rtp(long2); +long2 __ovld __cnfn convert_long2_sat_rtp(long2); +long2 __ovld __cnfn convert_long2_rtn(long2); +long2 __ovld __cnfn convert_long2_sat_rtn(long2); +long2 __ovld __cnfn convert_long2(long2); +long2 __ovld __cnfn convert_long2_sat(long2); +long2 __ovld __cnfn convert_long2_rte(ulong2); +long2 __ovld __cnfn convert_long2_sat_rte(ulong2); +long2 __ovld __cnfn convert_long2_rtz(ulong2); +long2 __ovld __cnfn convert_long2_sat_rtz(ulong2); +long2 __ovld __cnfn convert_long2_rtp(ulong2); +long2 __ovld __cnfn convert_long2_sat_rtp(ulong2); +long2 __ovld __cnfn convert_long2_rtn(ulong2); +long2 __ovld __cnfn convert_long2_sat_rtn(ulong2); +long2 __ovld __cnfn convert_long2(ulong2); +long2 __ovld __cnfn convert_long2_sat(ulong2); +long2 __ovld __cnfn convert_long2_rte(float2); +long2 __ovld __cnfn convert_long2_sat_rte(float2); +long2 __ovld __cnfn convert_long2_rtz(float2); +long2 __ovld __cnfn convert_long2_sat_rtz(float2); +long2 __ovld __cnfn convert_long2_rtp(float2); +long2 __ovld __cnfn convert_long2_sat_rtp(float2); +long2 __ovld __cnfn convert_long2_rtn(float2); +long2 __ovld __cnfn convert_long2_sat_rtn(float2); +long2 __ovld __cnfn convert_long2(float2); +long2 __ovld __cnfn convert_long2_sat(float2); +ulong2 __ovld __cnfn convert_ulong2_rte(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(char2); +ulong2 __ovld __cnfn convert_ulong2_rtz(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(char2); +ulong2 __ovld __cnfn convert_ulong2_rtp(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(char2); +ulong2 __ovld __cnfn convert_ulong2_rtn(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(char2); +ulong2 __ovld __cnfn convert_ulong2(char2); +ulong2 __ovld __cnfn convert_ulong2_sat(char2); +ulong2 __ovld __cnfn convert_ulong2_rte(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rtz(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rtp(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rtn(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(uchar2); +ulong2 __ovld __cnfn convert_ulong2(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rte(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(short2); +ulong2 __ovld __cnfn convert_ulong2_rtz(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(short2); +ulong2 __ovld __cnfn convert_ulong2_rtp(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(short2); +ulong2 __ovld __cnfn convert_ulong2_rtn(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(short2); +ulong2 __ovld __cnfn convert_ulong2(short2); +ulong2 __ovld __cnfn convert_ulong2_sat(short2); +ulong2 __ovld __cnfn convert_ulong2_rte(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rtz(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rtp(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rtn(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(ushort2); +ulong2 __ovld __cnfn convert_ulong2(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rte(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(int2); +ulong2 __ovld __cnfn convert_ulong2_rtz(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(int2); +ulong2 __ovld __cnfn convert_ulong2_rtp(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(int2); +ulong2 __ovld __cnfn convert_ulong2_rtn(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(int2); +ulong2 __ovld __cnfn convert_ulong2(int2); +ulong2 __ovld __cnfn convert_ulong2_sat(int2); +ulong2 __ovld __cnfn convert_ulong2_rte(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(uint2); +ulong2 __ovld __cnfn convert_ulong2_rtz(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(uint2); +ulong2 __ovld __cnfn convert_ulong2_rtp(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(uint2); +ulong2 __ovld __cnfn convert_ulong2_rtn(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(uint2); +ulong2 __ovld __cnfn convert_ulong2(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat(uint2); +ulong2 __ovld __cnfn convert_ulong2_rte(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(long2); +ulong2 __ovld __cnfn convert_ulong2_rtz(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(long2); +ulong2 __ovld __cnfn convert_ulong2_rtp(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(long2); +ulong2 __ovld __cnfn convert_ulong2_rtn(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(long2); +ulong2 __ovld __cnfn convert_ulong2(long2); +ulong2 __ovld __cnfn convert_ulong2_sat(long2); +ulong2 __ovld __cnfn convert_ulong2_rte(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rtz(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rtp(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rtn(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(ulong2); +ulong2 __ovld __cnfn convert_ulong2(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rte(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(float2); +ulong2 __ovld __cnfn convert_ulong2_rtz(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(float2); +ulong2 __ovld __cnfn convert_ulong2_rtp(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(float2); +ulong2 __ovld __cnfn convert_ulong2_rtn(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(float2); +ulong2 __ovld __cnfn convert_ulong2(float2); +ulong2 __ovld __cnfn convert_ulong2_sat(float2); +float2 __ovld __cnfn convert_float2_rte(char2); +float2 __ovld __cnfn convert_float2_rtz(char2); +float2 __ovld __cnfn convert_float2_rtp(char2); +float2 __ovld __cnfn convert_float2_rtn(char2); +float2 __ovld __cnfn convert_float2(char2); +float2 __ovld __cnfn convert_float2_rte(uchar2); +float2 __ovld __cnfn convert_float2_rtz(uchar2); +float2 __ovld __cnfn convert_float2_rtp(uchar2); +float2 __ovld __cnfn convert_float2_rtn(uchar2); +float2 __ovld __cnfn convert_float2(uchar2); +float2 __ovld __cnfn convert_float2_rte(short2); +float2 __ovld __cnfn convert_float2_rtz(short2); +float2 __ovld __cnfn convert_float2_rtp(short2); +float2 __ovld __cnfn convert_float2_rtn(short2); +float2 __ovld __cnfn convert_float2(short2); +float2 __ovld __cnfn convert_float2_rte(ushort2); +float2 __ovld __cnfn convert_float2_rtz(ushort2); +float2 __ovld __cnfn convert_float2_rtp(ushort2); +float2 __ovld __cnfn convert_float2_rtn(ushort2); +float2 __ovld __cnfn convert_float2(ushort2); +float2 __ovld __cnfn convert_float2_rte(int2); +float2 __ovld __cnfn convert_float2_rtz(int2); +float2 __ovld __cnfn convert_float2_rtp(int2); +float2 __ovld __cnfn convert_float2_rtn(int2); +float2 __ovld __cnfn convert_float2(int2); +float2 __ovld __cnfn convert_float2_rte(uint2); +float2 __ovld __cnfn convert_float2_rtz(uint2); +float2 __ovld __cnfn convert_float2_rtp(uint2); +float2 __ovld __cnfn convert_float2_rtn(uint2); +float2 __ovld __cnfn convert_float2(uint2); +float2 __ovld __cnfn convert_float2_rte(long2); +float2 __ovld __cnfn convert_float2_rtz(long2); +float2 __ovld __cnfn convert_float2_rtp(long2); +float2 __ovld __cnfn convert_float2_rtn(long2); +float2 __ovld __cnfn convert_float2(long2); +float2 __ovld __cnfn convert_float2_rte(ulong2); +float2 __ovld __cnfn convert_float2_rtz(ulong2); +float2 __ovld __cnfn convert_float2_rtp(ulong2); +float2 __ovld __cnfn convert_float2_rtn(ulong2); +float2 __ovld __cnfn convert_float2(ulong2); +float2 __ovld __cnfn convert_float2_rte(float2); +float2 __ovld __cnfn convert_float2_rtz(float2); +float2 __ovld __cnfn convert_float2_rtp(float2); +float2 __ovld __cnfn convert_float2_rtn(float2); +float2 __ovld __cnfn convert_float2(float2); +char3 __ovld __cnfn convert_char3_rte(char3); +char3 __ovld __cnfn convert_char3_sat_rte(char3); +char3 __ovld __cnfn convert_char3_rtz(char3); +char3 __ovld __cnfn convert_char3_sat_rtz(char3); +char3 __ovld __cnfn convert_char3_rtp(char3); +char3 __ovld __cnfn convert_char3_sat_rtp(char3); +char3 __ovld __cnfn convert_char3_rtn(char3); +char3 __ovld __cnfn convert_char3_sat_rtn(char3); +char3 __ovld __cnfn convert_char3(char3); +char3 __ovld __cnfn convert_char3_sat(char3); +char3 __ovld __cnfn convert_char3_rte(uchar3); +char3 __ovld __cnfn convert_char3_sat_rte(uchar3); +char3 __ovld __cnfn convert_char3_rtz(uchar3); +char3 __ovld __cnfn convert_char3_sat_rtz(uchar3); +char3 __ovld __cnfn convert_char3_rtp(uchar3); +char3 __ovld __cnfn convert_char3_sat_rtp(uchar3); +char3 __ovld __cnfn convert_char3_rtn(uchar3); +char3 __ovld __cnfn convert_char3_sat_rtn(uchar3); +char3 __ovld __cnfn convert_char3(uchar3); +char3 __ovld __cnfn convert_char3_sat(uchar3); +char3 __ovld __cnfn convert_char3_rte(short3); +char3 __ovld __cnfn convert_char3_sat_rte(short3); +char3 __ovld __cnfn convert_char3_rtz(short3); +char3 __ovld __cnfn convert_char3_sat_rtz(short3); +char3 __ovld __cnfn convert_char3_rtp(short3); +char3 __ovld __cnfn convert_char3_sat_rtp(short3); +char3 __ovld __cnfn convert_char3_rtn(short3); +char3 __ovld __cnfn convert_char3_sat_rtn(short3); +char3 __ovld __cnfn convert_char3(short3); +char3 __ovld __cnfn convert_char3_sat(short3); +char3 __ovld __cnfn convert_char3_rte(ushort3); +char3 __ovld __cnfn convert_char3_sat_rte(ushort3); +char3 __ovld __cnfn convert_char3_rtz(ushort3); +char3 __ovld __cnfn convert_char3_sat_rtz(ushort3); +char3 __ovld __cnfn convert_char3_rtp(ushort3); +char3 __ovld __cnfn convert_char3_sat_rtp(ushort3); +char3 __ovld __cnfn convert_char3_rtn(ushort3); +char3 __ovld __cnfn convert_char3_sat_rtn(ushort3); +char3 __ovld __cnfn convert_char3(ushort3); +char3 __ovld __cnfn convert_char3_sat(ushort3); +char3 __ovld __cnfn convert_char3_rte(int3); +char3 __ovld __cnfn convert_char3_sat_rte(int3); +char3 __ovld __cnfn convert_char3_rtz(int3); +char3 __ovld __cnfn convert_char3_sat_rtz(int3); +char3 __ovld __cnfn convert_char3_rtp(int3); +char3 __ovld __cnfn convert_char3_sat_rtp(int3); +char3 __ovld __cnfn convert_char3_rtn(int3); +char3 __ovld __cnfn convert_char3_sat_rtn(int3); +char3 __ovld __cnfn convert_char3(int3); +char3 __ovld __cnfn convert_char3_sat(int3); +char3 __ovld __cnfn convert_char3_rte(uint3); +char3 __ovld __cnfn convert_char3_sat_rte(uint3); +char3 __ovld __cnfn convert_char3_rtz(uint3); +char3 __ovld __cnfn convert_char3_sat_rtz(uint3); +char3 __ovld __cnfn convert_char3_rtp(uint3); +char3 __ovld __cnfn convert_char3_sat_rtp(uint3); +char3 __ovld __cnfn convert_char3_rtn(uint3); +char3 __ovld __cnfn convert_char3_sat_rtn(uint3); +char3 __ovld __cnfn convert_char3(uint3); +char3 __ovld __cnfn convert_char3_sat(uint3); +char3 __ovld __cnfn convert_char3_rte(long3); +char3 __ovld __cnfn convert_char3_sat_rte(long3); +char3 __ovld __cnfn convert_char3_rtz(long3); +char3 __ovld __cnfn convert_char3_sat_rtz(long3); +char3 __ovld __cnfn convert_char3_rtp(long3); +char3 __ovld __cnfn convert_char3_sat_rtp(long3); +char3 __ovld __cnfn convert_char3_rtn(long3); +char3 __ovld __cnfn convert_char3_sat_rtn(long3); +char3 __ovld __cnfn convert_char3(long3); +char3 __ovld __cnfn convert_char3_sat(long3); +char3 __ovld __cnfn convert_char3_rte(ulong3); +char3 __ovld __cnfn convert_char3_sat_rte(ulong3); +char3 __ovld __cnfn convert_char3_rtz(ulong3); +char3 __ovld __cnfn convert_char3_sat_rtz(ulong3); +char3 __ovld __cnfn convert_char3_rtp(ulong3); +char3 __ovld __cnfn convert_char3_sat_rtp(ulong3); +char3 __ovld __cnfn convert_char3_rtn(ulong3); +char3 __ovld __cnfn convert_char3_sat_rtn(ulong3); +char3 __ovld __cnfn convert_char3(ulong3); +char3 __ovld __cnfn convert_char3_sat(ulong3); +char3 __ovld __cnfn convert_char3_rte(float3); +char3 __ovld __cnfn convert_char3_sat_rte(float3); +char3 __ovld __cnfn convert_char3_rtz(float3); +char3 __ovld __cnfn convert_char3_sat_rtz(float3); +char3 __ovld __cnfn convert_char3_rtp(float3); +char3 __ovld __cnfn convert_char3_sat_rtp(float3); +char3 __ovld __cnfn convert_char3_rtn(float3); +char3 __ovld __cnfn convert_char3_sat_rtn(float3); +char3 __ovld __cnfn convert_char3(float3); +char3 __ovld __cnfn convert_char3_sat(float3); +uchar3 __ovld __cnfn convert_uchar3_rte(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(char3); +uchar3 __ovld __cnfn convert_uchar3_rtz(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(char3); +uchar3 __ovld __cnfn convert_uchar3_rtp(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(char3); +uchar3 __ovld __cnfn convert_uchar3_rtn(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(char3); +uchar3 __ovld __cnfn convert_uchar3(char3); +uchar3 __ovld __cnfn convert_uchar3_sat(char3); +uchar3 __ovld __cnfn convert_uchar3_rte(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rtz(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rtp(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rtn(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(uchar3); +uchar3 __ovld __cnfn convert_uchar3(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rte(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(short3); +uchar3 __ovld __cnfn convert_uchar3_rtz(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(short3); +uchar3 __ovld __cnfn convert_uchar3_rtp(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(short3); +uchar3 __ovld __cnfn convert_uchar3_rtn(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(short3); +uchar3 __ovld __cnfn convert_uchar3(short3); +uchar3 __ovld __cnfn convert_uchar3_sat(short3); +uchar3 __ovld __cnfn convert_uchar3_rte(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rtz(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rtp(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rtn(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(ushort3); +uchar3 __ovld __cnfn convert_uchar3(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rte(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(int3); +uchar3 __ovld __cnfn convert_uchar3_rtz(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(int3); +uchar3 __ovld __cnfn convert_uchar3_rtp(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(int3); +uchar3 __ovld __cnfn convert_uchar3_rtn(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(int3); +uchar3 __ovld __cnfn convert_uchar3(int3); +uchar3 __ovld __cnfn convert_uchar3_sat(int3); +uchar3 __ovld __cnfn convert_uchar3_rte(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(uint3); +uchar3 __ovld __cnfn convert_uchar3_rtz(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(uint3); +uchar3 __ovld __cnfn convert_uchar3_rtp(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(uint3); +uchar3 __ovld __cnfn convert_uchar3_rtn(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(uint3); +uchar3 __ovld __cnfn convert_uchar3(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat(uint3); +uchar3 __ovld __cnfn convert_uchar3_rte(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(long3); +uchar3 __ovld __cnfn convert_uchar3_rtz(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(long3); +uchar3 __ovld __cnfn convert_uchar3_rtp(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(long3); +uchar3 __ovld __cnfn convert_uchar3_rtn(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(long3); +uchar3 __ovld __cnfn convert_uchar3(long3); +uchar3 __ovld __cnfn convert_uchar3_sat(long3); +uchar3 __ovld __cnfn convert_uchar3_rte(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rtz(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rtp(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rtn(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(ulong3); +uchar3 __ovld __cnfn convert_uchar3(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rte(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(float3); +uchar3 __ovld __cnfn convert_uchar3_rtz(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(float3); +uchar3 __ovld __cnfn convert_uchar3_rtp(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(float3); +uchar3 __ovld __cnfn convert_uchar3_rtn(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(float3); +uchar3 __ovld __cnfn convert_uchar3(float3); +uchar3 __ovld __cnfn convert_uchar3_sat(float3); +short3 __ovld __cnfn convert_short3_rte(char3); +short3 __ovld __cnfn convert_short3_sat_rte(char3); +short3 __ovld __cnfn convert_short3_rtz(char3); +short3 __ovld __cnfn convert_short3_sat_rtz(char3); +short3 __ovld __cnfn convert_short3_rtp(char3); +short3 __ovld __cnfn convert_short3_sat_rtp(char3); +short3 __ovld __cnfn convert_short3_rtn(char3); +short3 __ovld __cnfn convert_short3_sat_rtn(char3); +short3 __ovld __cnfn convert_short3(char3); +short3 __ovld __cnfn convert_short3_sat(char3); +short3 __ovld __cnfn convert_short3_rte(uchar3); +short3 __ovld __cnfn convert_short3_sat_rte(uchar3); +short3 __ovld __cnfn convert_short3_rtz(uchar3); +short3 __ovld __cnfn convert_short3_sat_rtz(uchar3); +short3 __ovld __cnfn convert_short3_rtp(uchar3); +short3 __ovld __cnfn convert_short3_sat_rtp(uchar3); +short3 __ovld __cnfn convert_short3_rtn(uchar3); +short3 __ovld __cnfn convert_short3_sat_rtn(uchar3); +short3 __ovld __cnfn convert_short3(uchar3); +short3 __ovld __cnfn convert_short3_sat(uchar3); +short3 __ovld __cnfn convert_short3_rte(short3); +short3 __ovld __cnfn convert_short3_sat_rte(short3); +short3 __ovld __cnfn convert_short3_rtz(short3); +short3 __ovld __cnfn convert_short3_sat_rtz(short3); +short3 __ovld __cnfn convert_short3_rtp(short3); +short3 __ovld __cnfn convert_short3_sat_rtp(short3); +short3 __ovld __cnfn convert_short3_rtn(short3); +short3 __ovld __cnfn convert_short3_sat_rtn(short3); +short3 __ovld __cnfn convert_short3(short3); +short3 __ovld __cnfn convert_short3_sat(short3); +short3 __ovld __cnfn convert_short3_rte(ushort3); +short3 __ovld __cnfn convert_short3_sat_rte(ushort3); +short3 __ovld __cnfn convert_short3_rtz(ushort3); +short3 __ovld __cnfn convert_short3_sat_rtz(ushort3); +short3 __ovld __cnfn convert_short3_rtp(ushort3); +short3 __ovld __cnfn convert_short3_sat_rtp(ushort3); +short3 __ovld __cnfn convert_short3_rtn(ushort3); +short3 __ovld __cnfn convert_short3_sat_rtn(ushort3); +short3 __ovld __cnfn convert_short3(ushort3); +short3 __ovld __cnfn convert_short3_sat(ushort3); +short3 __ovld __cnfn convert_short3_rte(int3); +short3 __ovld __cnfn convert_short3_sat_rte(int3); +short3 __ovld __cnfn convert_short3_rtz(int3); +short3 __ovld __cnfn convert_short3_sat_rtz(int3); +short3 __ovld __cnfn convert_short3_rtp(int3); +short3 __ovld __cnfn convert_short3_sat_rtp(int3); +short3 __ovld __cnfn convert_short3_rtn(int3); +short3 __ovld __cnfn convert_short3_sat_rtn(int3); +short3 __ovld __cnfn convert_short3(int3); +short3 __ovld __cnfn convert_short3_sat(int3); +short3 __ovld __cnfn convert_short3_rte(uint3); +short3 __ovld __cnfn convert_short3_sat_rte(uint3); +short3 __ovld __cnfn convert_short3_rtz(uint3); +short3 __ovld __cnfn convert_short3_sat_rtz(uint3); +short3 __ovld __cnfn convert_short3_rtp(uint3); +short3 __ovld __cnfn convert_short3_sat_rtp(uint3); +short3 __ovld __cnfn convert_short3_rtn(uint3); +short3 __ovld __cnfn convert_short3_sat_rtn(uint3); +short3 __ovld __cnfn convert_short3(uint3); +short3 __ovld __cnfn convert_short3_sat(uint3); +short3 __ovld __cnfn convert_short3_rte(long3); +short3 __ovld __cnfn convert_short3_sat_rte(long3); +short3 __ovld __cnfn convert_short3_rtz(long3); +short3 __ovld __cnfn convert_short3_sat_rtz(long3); +short3 __ovld __cnfn convert_short3_rtp(long3); +short3 __ovld __cnfn convert_short3_sat_rtp(long3); +short3 __ovld __cnfn convert_short3_rtn(long3); +short3 __ovld __cnfn convert_short3_sat_rtn(long3); +short3 __ovld __cnfn convert_short3(long3); +short3 __ovld __cnfn convert_short3_sat(long3); +short3 __ovld __cnfn convert_short3_rte(ulong3); +short3 __ovld __cnfn convert_short3_sat_rte(ulong3); +short3 __ovld __cnfn convert_short3_rtz(ulong3); +short3 __ovld __cnfn convert_short3_sat_rtz(ulong3); +short3 __ovld __cnfn convert_short3_rtp(ulong3); +short3 __ovld __cnfn convert_short3_sat_rtp(ulong3); +short3 __ovld __cnfn convert_short3_rtn(ulong3); +short3 __ovld __cnfn convert_short3_sat_rtn(ulong3); +short3 __ovld __cnfn convert_short3(ulong3); +short3 __ovld __cnfn convert_short3_sat(ulong3); +short3 __ovld __cnfn convert_short3_rte(float3); +short3 __ovld __cnfn convert_short3_sat_rte(float3); +short3 __ovld __cnfn convert_short3_rtz(float3); +short3 __ovld __cnfn convert_short3_sat_rtz(float3); +short3 __ovld __cnfn convert_short3_rtp(float3); +short3 __ovld __cnfn convert_short3_sat_rtp(float3); +short3 __ovld __cnfn convert_short3_rtn(float3); +short3 __ovld __cnfn convert_short3_sat_rtn(float3); +short3 __ovld __cnfn convert_short3(float3); +short3 __ovld __cnfn convert_short3_sat(float3); +ushort3 __ovld __cnfn convert_ushort3_rte(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(char3); +ushort3 __ovld __cnfn convert_ushort3_rtz(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(char3); +ushort3 __ovld __cnfn convert_ushort3_rtp(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(char3); +ushort3 __ovld __cnfn convert_ushort3_rtn(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(char3); +ushort3 __ovld __cnfn convert_ushort3(char3); +ushort3 __ovld __cnfn convert_ushort3_sat(char3); +ushort3 __ovld __cnfn convert_ushort3_rte(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rtz(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rtp(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rtn(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(uchar3); +ushort3 __ovld __cnfn convert_ushort3(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rte(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(short3); +ushort3 __ovld __cnfn convert_ushort3_rtz(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(short3); +ushort3 __ovld __cnfn convert_ushort3_rtp(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(short3); +ushort3 __ovld __cnfn convert_ushort3_rtn(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(short3); +ushort3 __ovld __cnfn convert_ushort3(short3); +ushort3 __ovld __cnfn convert_ushort3_sat(short3); +ushort3 __ovld __cnfn convert_ushort3_rte(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rtz(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rtp(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rtn(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(ushort3); +ushort3 __ovld __cnfn convert_ushort3(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rte(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(int3); +ushort3 __ovld __cnfn convert_ushort3_rtz(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(int3); +ushort3 __ovld __cnfn convert_ushort3_rtp(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(int3); +ushort3 __ovld __cnfn convert_ushort3_rtn(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(int3); +ushort3 __ovld __cnfn convert_ushort3(int3); +ushort3 __ovld __cnfn convert_ushort3_sat(int3); +ushort3 __ovld __cnfn convert_ushort3_rte(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(uint3); +ushort3 __ovld __cnfn convert_ushort3_rtz(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(uint3); +ushort3 __ovld __cnfn convert_ushort3_rtp(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(uint3); +ushort3 __ovld __cnfn convert_ushort3_rtn(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(uint3); +ushort3 __ovld __cnfn convert_ushort3(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat(uint3); +ushort3 __ovld __cnfn convert_ushort3_rte(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(long3); +ushort3 __ovld __cnfn convert_ushort3_rtz(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(long3); +ushort3 __ovld __cnfn convert_ushort3_rtp(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(long3); +ushort3 __ovld __cnfn convert_ushort3_rtn(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(long3); +ushort3 __ovld __cnfn convert_ushort3(long3); +ushort3 __ovld __cnfn convert_ushort3_sat(long3); +ushort3 __ovld __cnfn convert_ushort3_rte(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rtz(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rtp(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rtn(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(ulong3); +ushort3 __ovld __cnfn convert_ushort3(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rte(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(float3); +ushort3 __ovld __cnfn convert_ushort3_rtz(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(float3); +ushort3 __ovld __cnfn convert_ushort3_rtp(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(float3); +ushort3 __ovld __cnfn convert_ushort3_rtn(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(float3); +ushort3 __ovld __cnfn convert_ushort3(float3); +ushort3 __ovld __cnfn convert_ushort3_sat(float3); +int3 __ovld __cnfn convert_int3_rte(char3); +int3 __ovld __cnfn convert_int3_sat_rte(char3); +int3 __ovld __cnfn convert_int3_rtz(char3); +int3 __ovld __cnfn convert_int3_sat_rtz(char3); +int3 __ovld __cnfn convert_int3_rtp(char3); +int3 __ovld __cnfn convert_int3_sat_rtp(char3); +int3 __ovld __cnfn convert_int3_rtn(char3); +int3 __ovld __cnfn convert_int3_sat_rtn(char3); +int3 __ovld __cnfn convert_int3(char3); +int3 __ovld __cnfn convert_int3_sat(char3); +int3 __ovld __cnfn convert_int3_rte(uchar3); +int3 __ovld __cnfn convert_int3_sat_rte(uchar3); +int3 __ovld __cnfn convert_int3_rtz(uchar3); +int3 __ovld __cnfn convert_int3_sat_rtz(uchar3); +int3 __ovld __cnfn convert_int3_rtp(uchar3); +int3 __ovld __cnfn convert_int3_sat_rtp(uchar3); +int3 __ovld __cnfn convert_int3_rtn(uchar3); +int3 __ovld __cnfn convert_int3_sat_rtn(uchar3); +int3 __ovld __cnfn convert_int3(uchar3); +int3 __ovld __cnfn convert_int3_sat(uchar3); +int3 __ovld __cnfn convert_int3_rte(short3); +int3 __ovld __cnfn convert_int3_sat_rte(short3); +int3 __ovld __cnfn convert_int3_rtz(short3); +int3 __ovld __cnfn convert_int3_sat_rtz(short3); +int3 __ovld __cnfn convert_int3_rtp(short3); +int3 __ovld __cnfn convert_int3_sat_rtp(short3); +int3 __ovld __cnfn convert_int3_rtn(short3); +int3 __ovld __cnfn convert_int3_sat_rtn(short3); +int3 __ovld __cnfn convert_int3(short3); +int3 __ovld __cnfn convert_int3_sat(short3); +int3 __ovld __cnfn convert_int3_rte(ushort3); +int3 __ovld __cnfn convert_int3_sat_rte(ushort3); +int3 __ovld __cnfn convert_int3_rtz(ushort3); +int3 __ovld __cnfn convert_int3_sat_rtz(ushort3); +int3 __ovld __cnfn convert_int3_rtp(ushort3); +int3 __ovld __cnfn convert_int3_sat_rtp(ushort3); +int3 __ovld __cnfn convert_int3_rtn(ushort3); +int3 __ovld __cnfn convert_int3_sat_rtn(ushort3); +int3 __ovld __cnfn convert_int3(ushort3); +int3 __ovld __cnfn convert_int3_sat(ushort3); +int3 __ovld __cnfn convert_int3_rte(int3); +int3 __ovld __cnfn convert_int3_sat_rte(int3); +int3 __ovld __cnfn convert_int3_rtz(int3); +int3 __ovld __cnfn convert_int3_sat_rtz(int3); +int3 __ovld __cnfn convert_int3_rtp(int3); +int3 __ovld __cnfn convert_int3_sat_rtp(int3); +int3 __ovld __cnfn convert_int3_rtn(int3); +int3 __ovld __cnfn convert_int3_sat_rtn(int3); +int3 __ovld __cnfn convert_int3(int3); +int3 __ovld __cnfn convert_int3_sat(int3); +int3 __ovld __cnfn convert_int3_rte(uint3); +int3 __ovld __cnfn convert_int3_sat_rte(uint3); +int3 __ovld __cnfn convert_int3_rtz(uint3); +int3 __ovld __cnfn convert_int3_sat_rtz(uint3); +int3 __ovld __cnfn convert_int3_rtp(uint3); +int3 __ovld __cnfn convert_int3_sat_rtp(uint3); +int3 __ovld __cnfn convert_int3_rtn(uint3); +int3 __ovld __cnfn convert_int3_sat_rtn(uint3); +int3 __ovld __cnfn convert_int3(uint3); +int3 __ovld __cnfn convert_int3_sat(uint3); +int3 __ovld __cnfn convert_int3_rte(long3); +int3 __ovld __cnfn convert_int3_sat_rte(long3); +int3 __ovld __cnfn convert_int3_rtz(long3); +int3 __ovld __cnfn convert_int3_sat_rtz(long3); +int3 __ovld __cnfn convert_int3_rtp(long3); +int3 __ovld __cnfn convert_int3_sat_rtp(long3); +int3 __ovld __cnfn convert_int3_rtn(long3); +int3 __ovld __cnfn convert_int3_sat_rtn(long3); +int3 __ovld __cnfn convert_int3(long3); +int3 __ovld __cnfn convert_int3_sat(long3); +int3 __ovld __cnfn convert_int3_rte(ulong3); +int3 __ovld __cnfn convert_int3_sat_rte(ulong3); +int3 __ovld __cnfn convert_int3_rtz(ulong3); +int3 __ovld __cnfn convert_int3_sat_rtz(ulong3); +int3 __ovld __cnfn convert_int3_rtp(ulong3); +int3 __ovld __cnfn convert_int3_sat_rtp(ulong3); +int3 __ovld __cnfn convert_int3_rtn(ulong3); +int3 __ovld __cnfn convert_int3_sat_rtn(ulong3); +int3 __ovld __cnfn convert_int3(ulong3); +int3 __ovld __cnfn convert_int3_sat(ulong3); +int3 __ovld __cnfn convert_int3_rte(float3); +int3 __ovld __cnfn convert_int3_sat_rte(float3); +int3 __ovld __cnfn convert_int3_rtz(float3); +int3 __ovld __cnfn convert_int3_sat_rtz(float3); +int3 __ovld __cnfn convert_int3_rtp(float3); +int3 __ovld __cnfn convert_int3_sat_rtp(float3); +int3 __ovld __cnfn convert_int3_rtn(float3); +int3 __ovld __cnfn convert_int3_sat_rtn(float3); +int3 __ovld __cnfn convert_int3(float3); +int3 __ovld __cnfn convert_int3_sat(float3); +uint3 __ovld __cnfn convert_uint3_rte(char3); +uint3 __ovld __cnfn convert_uint3_sat_rte(char3); +uint3 __ovld __cnfn convert_uint3_rtz(char3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(char3); +uint3 __ovld __cnfn convert_uint3_rtp(char3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(char3); +uint3 __ovld __cnfn convert_uint3_rtn(char3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(char3); +uint3 __ovld __cnfn convert_uint3(char3); +uint3 __ovld __cnfn convert_uint3_sat(char3); +uint3 __ovld __cnfn convert_uint3_rte(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rte(uchar3); +uint3 __ovld __cnfn convert_uint3_rtz(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(uchar3); +uint3 __ovld __cnfn convert_uint3_rtp(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(uchar3); +uint3 __ovld __cnfn convert_uint3_rtn(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(uchar3); +uint3 __ovld __cnfn convert_uint3(uchar3); +uint3 __ovld __cnfn convert_uint3_sat(uchar3); +uint3 __ovld __cnfn convert_uint3_rte(short3); +uint3 __ovld __cnfn convert_uint3_sat_rte(short3); +uint3 __ovld __cnfn convert_uint3_rtz(short3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(short3); +uint3 __ovld __cnfn convert_uint3_rtp(short3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(short3); +uint3 __ovld __cnfn convert_uint3_rtn(short3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(short3); +uint3 __ovld __cnfn convert_uint3(short3); +uint3 __ovld __cnfn convert_uint3_sat(short3); +uint3 __ovld __cnfn convert_uint3_rte(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rte(ushort3); +uint3 __ovld __cnfn convert_uint3_rtz(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(ushort3); +uint3 __ovld __cnfn convert_uint3_rtp(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(ushort3); +uint3 __ovld __cnfn convert_uint3_rtn(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(ushort3); +uint3 __ovld __cnfn convert_uint3(ushort3); +uint3 __ovld __cnfn convert_uint3_sat(ushort3); +uint3 __ovld __cnfn convert_uint3_rte(int3); +uint3 __ovld __cnfn convert_uint3_sat_rte(int3); +uint3 __ovld __cnfn convert_uint3_rtz(int3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(int3); +uint3 __ovld __cnfn convert_uint3_rtp(int3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(int3); +uint3 __ovld __cnfn convert_uint3_rtn(int3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(int3); +uint3 __ovld __cnfn convert_uint3(int3); +uint3 __ovld __cnfn convert_uint3_sat(int3); +uint3 __ovld __cnfn convert_uint3_rte(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rte(uint3); +uint3 __ovld __cnfn convert_uint3_rtz(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(uint3); +uint3 __ovld __cnfn convert_uint3_rtp(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(uint3); +uint3 __ovld __cnfn convert_uint3_rtn(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(uint3); +uint3 __ovld __cnfn convert_uint3(uint3); +uint3 __ovld __cnfn convert_uint3_sat(uint3); +uint3 __ovld __cnfn convert_uint3_rte(long3); +uint3 __ovld __cnfn convert_uint3_sat_rte(long3); +uint3 __ovld __cnfn convert_uint3_rtz(long3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(long3); +uint3 __ovld __cnfn convert_uint3_rtp(long3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(long3); +uint3 __ovld __cnfn convert_uint3_rtn(long3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(long3); +uint3 __ovld __cnfn convert_uint3(long3); +uint3 __ovld __cnfn convert_uint3_sat(long3); +uint3 __ovld __cnfn convert_uint3_rte(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rte(ulong3); +uint3 __ovld __cnfn convert_uint3_rtz(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(ulong3); +uint3 __ovld __cnfn convert_uint3_rtp(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(ulong3); +uint3 __ovld __cnfn convert_uint3_rtn(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(ulong3); +uint3 __ovld __cnfn convert_uint3(ulong3); +uint3 __ovld __cnfn convert_uint3_sat(ulong3); +uint3 __ovld __cnfn convert_uint3_rte(float3); +uint3 __ovld __cnfn convert_uint3_sat_rte(float3); +uint3 __ovld __cnfn convert_uint3_rtz(float3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(float3); +uint3 __ovld __cnfn convert_uint3_rtp(float3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(float3); +uint3 __ovld __cnfn convert_uint3_rtn(float3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(float3); +uint3 __ovld __cnfn convert_uint3(float3); +uint3 __ovld __cnfn convert_uint3_sat(float3); +long3 __ovld __cnfn convert_long3_rte(char3); +long3 __ovld __cnfn convert_long3_sat_rte(char3); +long3 __ovld __cnfn convert_long3_rtz(char3); +long3 __ovld __cnfn convert_long3_sat_rtz(char3); +long3 __ovld __cnfn convert_long3_rtp(char3); +long3 __ovld __cnfn convert_long3_sat_rtp(char3); +long3 __ovld __cnfn convert_long3_rtn(char3); +long3 __ovld __cnfn convert_long3_sat_rtn(char3); +long3 __ovld __cnfn convert_long3(char3); +long3 __ovld __cnfn convert_long3_sat(char3); +long3 __ovld __cnfn convert_long3_rte(uchar3); +long3 __ovld __cnfn convert_long3_sat_rte(uchar3); +long3 __ovld __cnfn convert_long3_rtz(uchar3); +long3 __ovld __cnfn convert_long3_sat_rtz(uchar3); +long3 __ovld __cnfn convert_long3_rtp(uchar3); +long3 __ovld __cnfn convert_long3_sat_rtp(uchar3); +long3 __ovld __cnfn convert_long3_rtn(uchar3); +long3 __ovld __cnfn convert_long3_sat_rtn(uchar3); +long3 __ovld __cnfn convert_long3(uchar3); +long3 __ovld __cnfn convert_long3_sat(uchar3); +long3 __ovld __cnfn convert_long3_rte(short3); +long3 __ovld __cnfn convert_long3_sat_rte(short3); +long3 __ovld __cnfn convert_long3_rtz(short3); +long3 __ovld __cnfn convert_long3_sat_rtz(short3); +long3 __ovld __cnfn convert_long3_rtp(short3); +long3 __ovld __cnfn convert_long3_sat_rtp(short3); +long3 __ovld __cnfn convert_long3_rtn(short3); +long3 __ovld __cnfn convert_long3_sat_rtn(short3); +long3 __ovld __cnfn convert_long3(short3); +long3 __ovld __cnfn convert_long3_sat(short3); +long3 __ovld __cnfn convert_long3_rte(ushort3); +long3 __ovld __cnfn convert_long3_sat_rte(ushort3); +long3 __ovld __cnfn convert_long3_rtz(ushort3); +long3 __ovld __cnfn convert_long3_sat_rtz(ushort3); +long3 __ovld __cnfn convert_long3_rtp(ushort3); +long3 __ovld __cnfn convert_long3_sat_rtp(ushort3); +long3 __ovld __cnfn convert_long3_rtn(ushort3); +long3 __ovld __cnfn convert_long3_sat_rtn(ushort3); +long3 __ovld __cnfn convert_long3(ushort3); +long3 __ovld __cnfn convert_long3_sat(ushort3); +long3 __ovld __cnfn convert_long3_rte(int3); +long3 __ovld __cnfn convert_long3_sat_rte(int3); +long3 __ovld __cnfn convert_long3_rtz(int3); +long3 __ovld __cnfn convert_long3_sat_rtz(int3); +long3 __ovld __cnfn convert_long3_rtp(int3); +long3 __ovld __cnfn convert_long3_sat_rtp(int3); +long3 __ovld __cnfn convert_long3_rtn(int3); +long3 __ovld __cnfn convert_long3_sat_rtn(int3); +long3 __ovld __cnfn convert_long3(int3); +long3 __ovld __cnfn convert_long3_sat(int3); +long3 __ovld __cnfn convert_long3_rte(uint3); +long3 __ovld __cnfn convert_long3_sat_rte(uint3); +long3 __ovld __cnfn convert_long3_rtz(uint3); +long3 __ovld __cnfn convert_long3_sat_rtz(uint3); +long3 __ovld __cnfn convert_long3_rtp(uint3); +long3 __ovld __cnfn convert_long3_sat_rtp(uint3); +long3 __ovld __cnfn convert_long3_rtn(uint3); +long3 __ovld __cnfn convert_long3_sat_rtn(uint3); +long3 __ovld __cnfn convert_long3(uint3); +long3 __ovld __cnfn convert_long3_sat(uint3); +long3 __ovld __cnfn convert_long3_rte(long3); +long3 __ovld __cnfn convert_long3_sat_rte(long3); +long3 __ovld __cnfn convert_long3_rtz(long3); +long3 __ovld __cnfn convert_long3_sat_rtz(long3); +long3 __ovld __cnfn convert_long3_rtp(long3); +long3 __ovld __cnfn convert_long3_sat_rtp(long3); +long3 __ovld __cnfn convert_long3_rtn(long3); +long3 __ovld __cnfn convert_long3_sat_rtn(long3); +long3 __ovld __cnfn convert_long3(long3); +long3 __ovld __cnfn convert_long3_sat(long3); +long3 __ovld __cnfn convert_long3_rte(ulong3); +long3 __ovld __cnfn convert_long3_sat_rte(ulong3); +long3 __ovld __cnfn convert_long3_rtz(ulong3); +long3 __ovld __cnfn convert_long3_sat_rtz(ulong3); +long3 __ovld __cnfn convert_long3_rtp(ulong3); +long3 __ovld __cnfn convert_long3_sat_rtp(ulong3); +long3 __ovld __cnfn convert_long3_rtn(ulong3); +long3 __ovld __cnfn convert_long3_sat_rtn(ulong3); +long3 __ovld __cnfn convert_long3(ulong3); +long3 __ovld __cnfn convert_long3_sat(ulong3); +long3 __ovld __cnfn convert_long3_rte(float3); +long3 __ovld __cnfn convert_long3_sat_rte(float3); +long3 __ovld __cnfn convert_long3_rtz(float3); +long3 __ovld __cnfn convert_long3_sat_rtz(float3); +long3 __ovld __cnfn convert_long3_rtp(float3); +long3 __ovld __cnfn convert_long3_sat_rtp(float3); +long3 __ovld __cnfn convert_long3_rtn(float3); +long3 __ovld __cnfn convert_long3_sat_rtn(float3); +long3 __ovld __cnfn convert_long3(float3); +long3 __ovld __cnfn convert_long3_sat(float3); +ulong3 __ovld __cnfn convert_ulong3_rte(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(char3); +ulong3 __ovld __cnfn convert_ulong3_rtz(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(char3); +ulong3 __ovld __cnfn convert_ulong3_rtp(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(char3); +ulong3 __ovld __cnfn convert_ulong3_rtn(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(char3); +ulong3 __ovld __cnfn convert_ulong3(char3); +ulong3 __ovld __cnfn convert_ulong3_sat(char3); +ulong3 __ovld __cnfn convert_ulong3_rte(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rtz(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rtp(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rtn(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(uchar3); +ulong3 __ovld __cnfn convert_ulong3(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rte(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(short3); +ulong3 __ovld __cnfn convert_ulong3_rtz(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(short3); +ulong3 __ovld __cnfn convert_ulong3_rtp(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(short3); +ulong3 __ovld __cnfn convert_ulong3_rtn(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(short3); +ulong3 __ovld __cnfn convert_ulong3(short3); +ulong3 __ovld __cnfn convert_ulong3_sat(short3); +ulong3 __ovld __cnfn convert_ulong3_rte(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rtz(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rtp(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rtn(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(ushort3); +ulong3 __ovld __cnfn convert_ulong3(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rte(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(int3); +ulong3 __ovld __cnfn convert_ulong3_rtz(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(int3); +ulong3 __ovld __cnfn convert_ulong3_rtp(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(int3); +ulong3 __ovld __cnfn convert_ulong3_rtn(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(int3); +ulong3 __ovld __cnfn convert_ulong3(int3); +ulong3 __ovld __cnfn convert_ulong3_sat(int3); +ulong3 __ovld __cnfn convert_ulong3_rte(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(uint3); +ulong3 __ovld __cnfn convert_ulong3_rtz(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(uint3); +ulong3 __ovld __cnfn convert_ulong3_rtp(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(uint3); +ulong3 __ovld __cnfn convert_ulong3_rtn(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(uint3); +ulong3 __ovld __cnfn convert_ulong3(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat(uint3); +ulong3 __ovld __cnfn convert_ulong3_rte(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(long3); +ulong3 __ovld __cnfn convert_ulong3_rtz(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(long3); +ulong3 __ovld __cnfn convert_ulong3_rtp(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(long3); +ulong3 __ovld __cnfn convert_ulong3_rtn(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(long3); +ulong3 __ovld __cnfn convert_ulong3(long3); +ulong3 __ovld __cnfn convert_ulong3_sat(long3); +ulong3 __ovld __cnfn convert_ulong3_rte(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rtz(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rtp(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rtn(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(ulong3); +ulong3 __ovld __cnfn convert_ulong3(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rte(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(float3); +ulong3 __ovld __cnfn convert_ulong3_rtz(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(float3); +ulong3 __ovld __cnfn convert_ulong3_rtp(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(float3); +ulong3 __ovld __cnfn convert_ulong3_rtn(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(float3); +ulong3 __ovld __cnfn convert_ulong3(float3); +ulong3 __ovld __cnfn convert_ulong3_sat(float3); +float3 __ovld __cnfn convert_float3_rte(char3); +float3 __ovld __cnfn convert_float3_rtz(char3); +float3 __ovld __cnfn convert_float3_rtp(char3); +float3 __ovld __cnfn convert_float3_rtn(char3); +float3 __ovld __cnfn convert_float3(char3); +float3 __ovld __cnfn convert_float3_rte(uchar3); +float3 __ovld __cnfn convert_float3_rtz(uchar3); +float3 __ovld __cnfn convert_float3_rtp(uchar3); +float3 __ovld __cnfn convert_float3_rtn(uchar3); +float3 __ovld __cnfn convert_float3(uchar3); +float3 __ovld __cnfn convert_float3_rte(short3); +float3 __ovld __cnfn convert_float3_rtz(short3); +float3 __ovld __cnfn convert_float3_rtp(short3); +float3 __ovld __cnfn convert_float3_rtn(short3); +float3 __ovld __cnfn convert_float3(short3); +float3 __ovld __cnfn convert_float3_rte(ushort3); +float3 __ovld __cnfn convert_float3_rtz(ushort3); +float3 __ovld __cnfn convert_float3_rtp(ushort3); +float3 __ovld __cnfn convert_float3_rtn(ushort3); +float3 __ovld __cnfn convert_float3(ushort3); +float3 __ovld __cnfn convert_float3_rte(int3); +float3 __ovld __cnfn convert_float3_rtz(int3); +float3 __ovld __cnfn convert_float3_rtp(int3); +float3 __ovld __cnfn convert_float3_rtn(int3); +float3 __ovld __cnfn convert_float3(int3); +float3 __ovld __cnfn convert_float3_rte(uint3); +float3 __ovld __cnfn convert_float3_rtz(uint3); +float3 __ovld __cnfn convert_float3_rtp(uint3); +float3 __ovld __cnfn convert_float3_rtn(uint3); +float3 __ovld __cnfn convert_float3(uint3); +float3 __ovld __cnfn convert_float3_rte(long3); +float3 __ovld __cnfn convert_float3_rtz(long3); +float3 __ovld __cnfn convert_float3_rtp(long3); +float3 __ovld __cnfn convert_float3_rtn(long3); +float3 __ovld __cnfn convert_float3(long3); +float3 __ovld __cnfn convert_float3_rte(ulong3); +float3 __ovld __cnfn convert_float3_rtz(ulong3); +float3 __ovld __cnfn convert_float3_rtp(ulong3); +float3 __ovld __cnfn convert_float3_rtn(ulong3); +float3 __ovld __cnfn convert_float3(ulong3); +float3 __ovld __cnfn convert_float3_rte(float3); +float3 __ovld __cnfn convert_float3_rtz(float3); +float3 __ovld __cnfn convert_float3_rtp(float3); +float3 __ovld __cnfn convert_float3_rtn(float3); +float3 __ovld __cnfn convert_float3(float3); +char4 __ovld __cnfn convert_char4_rte(char4); +char4 __ovld __cnfn convert_char4_sat_rte(char4); +char4 __ovld __cnfn convert_char4_rtz(char4); +char4 __ovld __cnfn convert_char4_sat_rtz(char4); +char4 __ovld __cnfn convert_char4_rtp(char4); +char4 __ovld __cnfn convert_char4_sat_rtp(char4); +char4 __ovld __cnfn convert_char4_rtn(char4); +char4 __ovld __cnfn convert_char4_sat_rtn(char4); +char4 __ovld __cnfn convert_char4(char4); +char4 __ovld __cnfn convert_char4_sat(char4); +char4 __ovld __cnfn convert_char4_rte(uchar4); +char4 __ovld __cnfn convert_char4_sat_rte(uchar4); +char4 __ovld __cnfn convert_char4_rtz(uchar4); +char4 __ovld __cnfn convert_char4_sat_rtz(uchar4); +char4 __ovld __cnfn convert_char4_rtp(uchar4); +char4 __ovld __cnfn convert_char4_sat_rtp(uchar4); +char4 __ovld __cnfn convert_char4_rtn(uchar4); +char4 __ovld __cnfn convert_char4_sat_rtn(uchar4); +char4 __ovld __cnfn convert_char4(uchar4); +char4 __ovld __cnfn convert_char4_sat(uchar4); +char4 __ovld __cnfn convert_char4_rte(short4); +char4 __ovld __cnfn convert_char4_sat_rte(short4); +char4 __ovld __cnfn convert_char4_rtz(short4); +char4 __ovld __cnfn convert_char4_sat_rtz(short4); +char4 __ovld __cnfn convert_char4_rtp(short4); +char4 __ovld __cnfn convert_char4_sat_rtp(short4); +char4 __ovld __cnfn convert_char4_rtn(short4); +char4 __ovld __cnfn convert_char4_sat_rtn(short4); +char4 __ovld __cnfn convert_char4(short4); +char4 __ovld __cnfn convert_char4_sat(short4); +char4 __ovld __cnfn convert_char4_rte(ushort4); +char4 __ovld __cnfn convert_char4_sat_rte(ushort4); +char4 __ovld __cnfn convert_char4_rtz(ushort4); +char4 __ovld __cnfn convert_char4_sat_rtz(ushort4); +char4 __ovld __cnfn convert_char4_rtp(ushort4); +char4 __ovld __cnfn convert_char4_sat_rtp(ushort4); +char4 __ovld __cnfn convert_char4_rtn(ushort4); +char4 __ovld __cnfn convert_char4_sat_rtn(ushort4); +char4 __ovld __cnfn convert_char4(ushort4); +char4 __ovld __cnfn convert_char4_sat(ushort4); +char4 __ovld __cnfn convert_char4_rte(int4); +char4 __ovld __cnfn convert_char4_sat_rte(int4); +char4 __ovld __cnfn convert_char4_rtz(int4); +char4 __ovld __cnfn convert_char4_sat_rtz(int4); +char4 __ovld __cnfn convert_char4_rtp(int4); +char4 __ovld __cnfn convert_char4_sat_rtp(int4); +char4 __ovld __cnfn convert_char4_rtn(int4); +char4 __ovld __cnfn convert_char4_sat_rtn(int4); +char4 __ovld __cnfn convert_char4(int4); +char4 __ovld __cnfn convert_char4_sat(int4); +char4 __ovld __cnfn convert_char4_rte(uint4); +char4 __ovld __cnfn convert_char4_sat_rte(uint4); +char4 __ovld __cnfn convert_char4_rtz(uint4); +char4 __ovld __cnfn convert_char4_sat_rtz(uint4); +char4 __ovld __cnfn convert_char4_rtp(uint4); +char4 __ovld __cnfn convert_char4_sat_rtp(uint4); +char4 __ovld __cnfn convert_char4_rtn(uint4); +char4 __ovld __cnfn convert_char4_sat_rtn(uint4); +char4 __ovld __cnfn convert_char4(uint4); +char4 __ovld __cnfn convert_char4_sat(uint4); +char4 __ovld __cnfn convert_char4_rte(long4); +char4 __ovld __cnfn convert_char4_sat_rte(long4); +char4 __ovld __cnfn convert_char4_rtz(long4); +char4 __ovld __cnfn convert_char4_sat_rtz(long4); +char4 __ovld __cnfn convert_char4_rtp(long4); +char4 __ovld __cnfn convert_char4_sat_rtp(long4); +char4 __ovld __cnfn convert_char4_rtn(long4); +char4 __ovld __cnfn convert_char4_sat_rtn(long4); +char4 __ovld __cnfn convert_char4(long4); +char4 __ovld __cnfn convert_char4_sat(long4); +char4 __ovld __cnfn convert_char4_rte(ulong4); +char4 __ovld __cnfn convert_char4_sat_rte(ulong4); +char4 __ovld __cnfn convert_char4_rtz(ulong4); +char4 __ovld __cnfn convert_char4_sat_rtz(ulong4); +char4 __ovld __cnfn convert_char4_rtp(ulong4); +char4 __ovld __cnfn convert_char4_sat_rtp(ulong4); +char4 __ovld __cnfn convert_char4_rtn(ulong4); +char4 __ovld __cnfn convert_char4_sat_rtn(ulong4); +char4 __ovld __cnfn convert_char4(ulong4); +char4 __ovld __cnfn convert_char4_sat(ulong4); +char4 __ovld __cnfn convert_char4_rte(float4); +char4 __ovld __cnfn convert_char4_sat_rte(float4); +char4 __ovld __cnfn convert_char4_rtz(float4); +char4 __ovld __cnfn convert_char4_sat_rtz(float4); +char4 __ovld __cnfn convert_char4_rtp(float4); +char4 __ovld __cnfn convert_char4_sat_rtp(float4); +char4 __ovld __cnfn convert_char4_rtn(float4); +char4 __ovld __cnfn convert_char4_sat_rtn(float4); +char4 __ovld __cnfn convert_char4(float4); +char4 __ovld __cnfn convert_char4_sat(float4); +uchar4 __ovld __cnfn convert_uchar4_rte(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(char4); +uchar4 __ovld __cnfn convert_uchar4_rtz(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(char4); +uchar4 __ovld __cnfn convert_uchar4_rtp(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(char4); +uchar4 __ovld __cnfn convert_uchar4_rtn(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(char4); +uchar4 __ovld __cnfn convert_uchar4(char4); +uchar4 __ovld __cnfn convert_uchar4_sat(char4); +uchar4 __ovld __cnfn convert_uchar4_rte(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rtz(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rtp(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rtn(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(uchar4); +uchar4 __ovld __cnfn convert_uchar4(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rte(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(short4); +uchar4 __ovld __cnfn convert_uchar4_rtz(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(short4); +uchar4 __ovld __cnfn convert_uchar4_rtp(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(short4); +uchar4 __ovld __cnfn convert_uchar4_rtn(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(short4); +uchar4 __ovld __cnfn convert_uchar4(short4); +uchar4 __ovld __cnfn convert_uchar4_sat(short4); +uchar4 __ovld __cnfn convert_uchar4_rte(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rtz(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rtp(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rtn(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(ushort4); +uchar4 __ovld __cnfn convert_uchar4(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rte(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(int4); +uchar4 __ovld __cnfn convert_uchar4_rtz(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(int4); +uchar4 __ovld __cnfn convert_uchar4_rtp(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(int4); +uchar4 __ovld __cnfn convert_uchar4_rtn(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(int4); +uchar4 __ovld __cnfn convert_uchar4(int4); +uchar4 __ovld __cnfn convert_uchar4_sat(int4); +uchar4 __ovld __cnfn convert_uchar4_rte(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(uint4); +uchar4 __ovld __cnfn convert_uchar4_rtz(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(uint4); +uchar4 __ovld __cnfn convert_uchar4_rtp(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(uint4); +uchar4 __ovld __cnfn convert_uchar4_rtn(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(uint4); +uchar4 __ovld __cnfn convert_uchar4(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat(uint4); +uchar4 __ovld __cnfn convert_uchar4_rte(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(long4); +uchar4 __ovld __cnfn convert_uchar4_rtz(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(long4); +uchar4 __ovld __cnfn convert_uchar4_rtp(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(long4); +uchar4 __ovld __cnfn convert_uchar4_rtn(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(long4); +uchar4 __ovld __cnfn convert_uchar4(long4); +uchar4 __ovld __cnfn convert_uchar4_sat(long4); +uchar4 __ovld __cnfn convert_uchar4_rte(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rtz(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rtp(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rtn(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(ulong4); +uchar4 __ovld __cnfn convert_uchar4(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rte(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(float4); +uchar4 __ovld __cnfn convert_uchar4_rtz(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(float4); +uchar4 __ovld __cnfn convert_uchar4_rtp(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(float4); +uchar4 __ovld __cnfn convert_uchar4_rtn(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(float4); +uchar4 __ovld __cnfn convert_uchar4(float4); +uchar4 __ovld __cnfn convert_uchar4_sat(float4); +short4 __ovld __cnfn convert_short4_rte(char4); +short4 __ovld __cnfn convert_short4_sat_rte(char4); +short4 __ovld __cnfn convert_short4_rtz(char4); +short4 __ovld __cnfn convert_short4_sat_rtz(char4); +short4 __ovld __cnfn convert_short4_rtp(char4); +short4 __ovld __cnfn convert_short4_sat_rtp(char4); +short4 __ovld __cnfn convert_short4_rtn(char4); +short4 __ovld __cnfn convert_short4_sat_rtn(char4); +short4 __ovld __cnfn convert_short4(char4); +short4 __ovld __cnfn convert_short4_sat(char4); +short4 __ovld __cnfn convert_short4_rte(uchar4); +short4 __ovld __cnfn convert_short4_sat_rte(uchar4); +short4 __ovld __cnfn convert_short4_rtz(uchar4); +short4 __ovld __cnfn convert_short4_sat_rtz(uchar4); +short4 __ovld __cnfn convert_short4_rtp(uchar4); +short4 __ovld __cnfn convert_short4_sat_rtp(uchar4); +short4 __ovld __cnfn convert_short4_rtn(uchar4); +short4 __ovld __cnfn convert_short4_sat_rtn(uchar4); +short4 __ovld __cnfn convert_short4(uchar4); +short4 __ovld __cnfn convert_short4_sat(uchar4); +short4 __ovld __cnfn convert_short4_rte(short4); +short4 __ovld __cnfn convert_short4_sat_rte(short4); +short4 __ovld __cnfn convert_short4_rtz(short4); +short4 __ovld __cnfn convert_short4_sat_rtz(short4); +short4 __ovld __cnfn convert_short4_rtp(short4); +short4 __ovld __cnfn convert_short4_sat_rtp(short4); +short4 __ovld __cnfn convert_short4_rtn(short4); +short4 __ovld __cnfn convert_short4_sat_rtn(short4); +short4 __ovld __cnfn convert_short4(short4); +short4 __ovld __cnfn convert_short4_sat(short4); +short4 __ovld __cnfn convert_short4_rte(ushort4); +short4 __ovld __cnfn convert_short4_sat_rte(ushort4); +short4 __ovld __cnfn convert_short4_rtz(ushort4); +short4 __ovld __cnfn convert_short4_sat_rtz(ushort4); +short4 __ovld __cnfn convert_short4_rtp(ushort4); +short4 __ovld __cnfn convert_short4_sat_rtp(ushort4); +short4 __ovld __cnfn convert_short4_rtn(ushort4); +short4 __ovld __cnfn convert_short4_sat_rtn(ushort4); +short4 __ovld __cnfn convert_short4(ushort4); +short4 __ovld __cnfn convert_short4_sat(ushort4); +short4 __ovld __cnfn convert_short4_rte(int4); +short4 __ovld __cnfn convert_short4_sat_rte(int4); +short4 __ovld __cnfn convert_short4_rtz(int4); +short4 __ovld __cnfn convert_short4_sat_rtz(int4); +short4 __ovld __cnfn convert_short4_rtp(int4); +short4 __ovld __cnfn convert_short4_sat_rtp(int4); +short4 __ovld __cnfn convert_short4_rtn(int4); +short4 __ovld __cnfn convert_short4_sat_rtn(int4); +short4 __ovld __cnfn convert_short4(int4); +short4 __ovld __cnfn convert_short4_sat(int4); +short4 __ovld __cnfn convert_short4_rte(uint4); +short4 __ovld __cnfn convert_short4_sat_rte(uint4); +short4 __ovld __cnfn convert_short4_rtz(uint4); +short4 __ovld __cnfn convert_short4_sat_rtz(uint4); +short4 __ovld __cnfn convert_short4_rtp(uint4); +short4 __ovld __cnfn convert_short4_sat_rtp(uint4); +short4 __ovld __cnfn convert_short4_rtn(uint4); +short4 __ovld __cnfn convert_short4_sat_rtn(uint4); +short4 __ovld __cnfn convert_short4(uint4); +short4 __ovld __cnfn convert_short4_sat(uint4); +short4 __ovld __cnfn convert_short4_rte(long4); +short4 __ovld __cnfn convert_short4_sat_rte(long4); +short4 __ovld __cnfn convert_short4_rtz(long4); +short4 __ovld __cnfn convert_short4_sat_rtz(long4); +short4 __ovld __cnfn convert_short4_rtp(long4); +short4 __ovld __cnfn convert_short4_sat_rtp(long4); +short4 __ovld __cnfn convert_short4_rtn(long4); +short4 __ovld __cnfn convert_short4_sat_rtn(long4); +short4 __ovld __cnfn convert_short4(long4); +short4 __ovld __cnfn convert_short4_sat(long4); +short4 __ovld __cnfn convert_short4_rte(ulong4); +short4 __ovld __cnfn convert_short4_sat_rte(ulong4); +short4 __ovld __cnfn convert_short4_rtz(ulong4); +short4 __ovld __cnfn convert_short4_sat_rtz(ulong4); +short4 __ovld __cnfn convert_short4_rtp(ulong4); +short4 __ovld __cnfn convert_short4_sat_rtp(ulong4); +short4 __ovld __cnfn convert_short4_rtn(ulong4); +short4 __ovld __cnfn convert_short4_sat_rtn(ulong4); +short4 __ovld __cnfn convert_short4(ulong4); +short4 __ovld __cnfn convert_short4_sat(ulong4); +short4 __ovld __cnfn convert_short4_rte(float4); +short4 __ovld __cnfn convert_short4_sat_rte(float4); +short4 __ovld __cnfn convert_short4_rtz(float4); +short4 __ovld __cnfn convert_short4_sat_rtz(float4); +short4 __ovld __cnfn convert_short4_rtp(float4); +short4 __ovld __cnfn convert_short4_sat_rtp(float4); +short4 __ovld __cnfn convert_short4_rtn(float4); +short4 __ovld __cnfn convert_short4_sat_rtn(float4); +short4 __ovld __cnfn convert_short4(float4); +short4 __ovld __cnfn convert_short4_sat(float4); +ushort4 __ovld __cnfn convert_ushort4_rte(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(char4); +ushort4 __ovld __cnfn convert_ushort4_rtz(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(char4); +ushort4 __ovld __cnfn convert_ushort4_rtp(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(char4); +ushort4 __ovld __cnfn convert_ushort4_rtn(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(char4); +ushort4 __ovld __cnfn convert_ushort4(char4); +ushort4 __ovld __cnfn convert_ushort4_sat(char4); +ushort4 __ovld __cnfn convert_ushort4_rte(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rtz(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rtp(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rtn(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(uchar4); +ushort4 __ovld __cnfn convert_ushort4(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rte(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(short4); +ushort4 __ovld __cnfn convert_ushort4_rtz(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(short4); +ushort4 __ovld __cnfn convert_ushort4_rtp(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(short4); +ushort4 __ovld __cnfn convert_ushort4_rtn(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(short4); +ushort4 __ovld __cnfn convert_ushort4(short4); +ushort4 __ovld __cnfn convert_ushort4_sat(short4); +ushort4 __ovld __cnfn convert_ushort4_rte(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rtz(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rtp(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rtn(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(ushort4); +ushort4 __ovld __cnfn convert_ushort4(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rte(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(int4); +ushort4 __ovld __cnfn convert_ushort4_rtz(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(int4); +ushort4 __ovld __cnfn convert_ushort4_rtp(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(int4); +ushort4 __ovld __cnfn convert_ushort4_rtn(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(int4); +ushort4 __ovld __cnfn convert_ushort4(int4); +ushort4 __ovld __cnfn convert_ushort4_sat(int4); +ushort4 __ovld __cnfn convert_ushort4_rte(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(uint4); +ushort4 __ovld __cnfn convert_ushort4_rtz(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(uint4); +ushort4 __ovld __cnfn convert_ushort4_rtp(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(uint4); +ushort4 __ovld __cnfn convert_ushort4_rtn(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(uint4); +ushort4 __ovld __cnfn convert_ushort4(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat(uint4); +ushort4 __ovld __cnfn convert_ushort4_rte(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(long4); +ushort4 __ovld __cnfn convert_ushort4_rtz(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(long4); +ushort4 __ovld __cnfn convert_ushort4_rtp(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(long4); +ushort4 __ovld __cnfn convert_ushort4_rtn(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(long4); +ushort4 __ovld __cnfn convert_ushort4(long4); +ushort4 __ovld __cnfn convert_ushort4_sat(long4); +ushort4 __ovld __cnfn convert_ushort4_rte(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rtz(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rtp(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rtn(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(ulong4); +ushort4 __ovld __cnfn convert_ushort4(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rte(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(float4); +ushort4 __ovld __cnfn convert_ushort4_rtz(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(float4); +ushort4 __ovld __cnfn convert_ushort4_rtp(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(float4); +ushort4 __ovld __cnfn convert_ushort4_rtn(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(float4); +ushort4 __ovld __cnfn convert_ushort4(float4); +ushort4 __ovld __cnfn convert_ushort4_sat(float4); +int4 __ovld __cnfn convert_int4_rte(char4); +int4 __ovld __cnfn convert_int4_sat_rte(char4); +int4 __ovld __cnfn convert_int4_rtz(char4); +int4 __ovld __cnfn convert_int4_sat_rtz(char4); +int4 __ovld __cnfn convert_int4_rtp(char4); +int4 __ovld __cnfn convert_int4_sat_rtp(char4); +int4 __ovld __cnfn convert_int4_rtn(char4); +int4 __ovld __cnfn convert_int4_sat_rtn(char4); +int4 __ovld __cnfn convert_int4(char4); +int4 __ovld __cnfn convert_int4_sat(char4); +int4 __ovld __cnfn convert_int4_rte(uchar4); +int4 __ovld __cnfn convert_int4_sat_rte(uchar4); +int4 __ovld __cnfn convert_int4_rtz(uchar4); +int4 __ovld __cnfn convert_int4_sat_rtz(uchar4); +int4 __ovld __cnfn convert_int4_rtp(uchar4); +int4 __ovld __cnfn convert_int4_sat_rtp(uchar4); +int4 __ovld __cnfn convert_int4_rtn(uchar4); +int4 __ovld __cnfn convert_int4_sat_rtn(uchar4); +int4 __ovld __cnfn convert_int4(uchar4); +int4 __ovld __cnfn convert_int4_sat(uchar4); +int4 __ovld __cnfn convert_int4_rte(short4); +int4 __ovld __cnfn convert_int4_sat_rte(short4); +int4 __ovld __cnfn convert_int4_rtz(short4); +int4 __ovld __cnfn convert_int4_sat_rtz(short4); +int4 __ovld __cnfn convert_int4_rtp(short4); +int4 __ovld __cnfn convert_int4_sat_rtp(short4); +int4 __ovld __cnfn convert_int4_rtn(short4); +int4 __ovld __cnfn convert_int4_sat_rtn(short4); +int4 __ovld __cnfn convert_int4(short4); +int4 __ovld __cnfn convert_int4_sat(short4); +int4 __ovld __cnfn convert_int4_rte(ushort4); +int4 __ovld __cnfn convert_int4_sat_rte(ushort4); +int4 __ovld __cnfn convert_int4_rtz(ushort4); +int4 __ovld __cnfn convert_int4_sat_rtz(ushort4); +int4 __ovld __cnfn convert_int4_rtp(ushort4); +int4 __ovld __cnfn convert_int4_sat_rtp(ushort4); +int4 __ovld __cnfn convert_int4_rtn(ushort4); +int4 __ovld __cnfn convert_int4_sat_rtn(ushort4); +int4 __ovld __cnfn convert_int4(ushort4); +int4 __ovld __cnfn convert_int4_sat(ushort4); +int4 __ovld __cnfn convert_int4_rte(int4); +int4 __ovld __cnfn convert_int4_sat_rte(int4); +int4 __ovld __cnfn convert_int4_rtz(int4); +int4 __ovld __cnfn convert_int4_sat_rtz(int4); +int4 __ovld __cnfn convert_int4_rtp(int4); +int4 __ovld __cnfn convert_int4_sat_rtp(int4); +int4 __ovld __cnfn convert_int4_rtn(int4); +int4 __ovld __cnfn convert_int4_sat_rtn(int4); +int4 __ovld __cnfn convert_int4(int4); +int4 __ovld __cnfn convert_int4_sat(int4); +int4 __ovld __cnfn convert_int4_rte(uint4); +int4 __ovld __cnfn convert_int4_sat_rte(uint4); +int4 __ovld __cnfn convert_int4_rtz(uint4); +int4 __ovld __cnfn convert_int4_sat_rtz(uint4); +int4 __ovld __cnfn convert_int4_rtp(uint4); +int4 __ovld __cnfn convert_int4_sat_rtp(uint4); +int4 __ovld __cnfn convert_int4_rtn(uint4); +int4 __ovld __cnfn convert_int4_sat_rtn(uint4); +int4 __ovld __cnfn convert_int4(uint4); +int4 __ovld __cnfn convert_int4_sat(uint4); +int4 __ovld __cnfn convert_int4_rte(long4); +int4 __ovld __cnfn convert_int4_sat_rte(long4); +int4 __ovld __cnfn convert_int4_rtz(long4); +int4 __ovld __cnfn convert_int4_sat_rtz(long4); +int4 __ovld __cnfn convert_int4_rtp(long4); +int4 __ovld __cnfn convert_int4_sat_rtp(long4); +int4 __ovld __cnfn convert_int4_rtn(long4); +int4 __ovld __cnfn convert_int4_sat_rtn(long4); +int4 __ovld __cnfn convert_int4(long4); +int4 __ovld __cnfn convert_int4_sat(long4); +int4 __ovld __cnfn convert_int4_rte(ulong4); +int4 __ovld __cnfn convert_int4_sat_rte(ulong4); +int4 __ovld __cnfn convert_int4_rtz(ulong4); +int4 __ovld __cnfn convert_int4_sat_rtz(ulong4); +int4 __ovld __cnfn convert_int4_rtp(ulong4); +int4 __ovld __cnfn convert_int4_sat_rtp(ulong4); +int4 __ovld __cnfn convert_int4_rtn(ulong4); +int4 __ovld __cnfn convert_int4_sat_rtn(ulong4); +int4 __ovld __cnfn convert_int4(ulong4); +int4 __ovld __cnfn convert_int4_sat(ulong4); +int4 __ovld __cnfn convert_int4_rte(float4); +int4 __ovld __cnfn convert_int4_sat_rte(float4); +int4 __ovld __cnfn convert_int4_rtz(float4); +int4 __ovld __cnfn convert_int4_sat_rtz(float4); +int4 __ovld __cnfn convert_int4_rtp(float4); +int4 __ovld __cnfn convert_int4_sat_rtp(float4); +int4 __ovld __cnfn convert_int4_rtn(float4); +int4 __ovld __cnfn convert_int4_sat_rtn(float4); +int4 __ovld __cnfn convert_int4(float4); +int4 __ovld __cnfn convert_int4_sat(float4); +uint4 __ovld __cnfn convert_uint4_rte(char4); +uint4 __ovld __cnfn convert_uint4_sat_rte(char4); +uint4 __ovld __cnfn convert_uint4_rtz(char4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(char4); +uint4 __ovld __cnfn convert_uint4_rtp(char4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(char4); +uint4 __ovld __cnfn convert_uint4_rtn(char4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(char4); +uint4 __ovld __cnfn convert_uint4(char4); +uint4 __ovld __cnfn convert_uint4_sat(char4); +uint4 __ovld __cnfn convert_uint4_rte(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rte(uchar4); +uint4 __ovld __cnfn convert_uint4_rtz(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(uchar4); +uint4 __ovld __cnfn convert_uint4_rtp(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(uchar4); +uint4 __ovld __cnfn convert_uint4_rtn(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(uchar4); +uint4 __ovld __cnfn convert_uint4(uchar4); +uint4 __ovld __cnfn convert_uint4_sat(uchar4); +uint4 __ovld __cnfn convert_uint4_rte(short4); +uint4 __ovld __cnfn convert_uint4_sat_rte(short4); +uint4 __ovld __cnfn convert_uint4_rtz(short4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(short4); +uint4 __ovld __cnfn convert_uint4_rtp(short4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(short4); +uint4 __ovld __cnfn convert_uint4_rtn(short4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(short4); +uint4 __ovld __cnfn convert_uint4(short4); +uint4 __ovld __cnfn convert_uint4_sat(short4); +uint4 __ovld __cnfn convert_uint4_rte(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rte(ushort4); +uint4 __ovld __cnfn convert_uint4_rtz(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(ushort4); +uint4 __ovld __cnfn convert_uint4_rtp(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(ushort4); +uint4 __ovld __cnfn convert_uint4_rtn(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(ushort4); +uint4 __ovld __cnfn convert_uint4(ushort4); +uint4 __ovld __cnfn convert_uint4_sat(ushort4); +uint4 __ovld __cnfn convert_uint4_rte(int4); +uint4 __ovld __cnfn convert_uint4_sat_rte(int4); +uint4 __ovld __cnfn convert_uint4_rtz(int4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(int4); +uint4 __ovld __cnfn convert_uint4_rtp(int4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(int4); +uint4 __ovld __cnfn convert_uint4_rtn(int4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(int4); +uint4 __ovld __cnfn convert_uint4(int4); +uint4 __ovld __cnfn convert_uint4_sat(int4); +uint4 __ovld __cnfn convert_uint4_rte(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rte(uint4); +uint4 __ovld __cnfn convert_uint4_rtz(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(uint4); +uint4 __ovld __cnfn convert_uint4_rtp(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(uint4); +uint4 __ovld __cnfn convert_uint4_rtn(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(uint4); +uint4 __ovld __cnfn convert_uint4(uint4); +uint4 __ovld __cnfn convert_uint4_sat(uint4); +uint4 __ovld __cnfn convert_uint4_rte(long4); +uint4 __ovld __cnfn convert_uint4_sat_rte(long4); +uint4 __ovld __cnfn convert_uint4_rtz(long4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(long4); +uint4 __ovld __cnfn convert_uint4_rtp(long4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(long4); +uint4 __ovld __cnfn convert_uint4_rtn(long4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(long4); +uint4 __ovld __cnfn convert_uint4(long4); +uint4 __ovld __cnfn convert_uint4_sat(long4); +uint4 __ovld __cnfn convert_uint4_rte(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rte(ulong4); +uint4 __ovld __cnfn convert_uint4_rtz(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(ulong4); +uint4 __ovld __cnfn convert_uint4_rtp(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(ulong4); +uint4 __ovld __cnfn convert_uint4_rtn(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(ulong4); +uint4 __ovld __cnfn convert_uint4(ulong4); +uint4 __ovld __cnfn convert_uint4_sat(ulong4); +uint4 __ovld __cnfn convert_uint4_rte(float4); +uint4 __ovld __cnfn convert_uint4_sat_rte(float4); +uint4 __ovld __cnfn convert_uint4_rtz(float4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(float4); +uint4 __ovld __cnfn convert_uint4_rtp(float4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(float4); +uint4 __ovld __cnfn convert_uint4_rtn(float4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(float4); +uint4 __ovld __cnfn convert_uint4(float4); +uint4 __ovld __cnfn convert_uint4_sat(float4); +long4 __ovld __cnfn convert_long4_rte(char4); +long4 __ovld __cnfn convert_long4_sat_rte(char4); +long4 __ovld __cnfn convert_long4_rtz(char4); +long4 __ovld __cnfn convert_long4_sat_rtz(char4); +long4 __ovld __cnfn convert_long4_rtp(char4); +long4 __ovld __cnfn convert_long4_sat_rtp(char4); +long4 __ovld __cnfn convert_long4_rtn(char4); +long4 __ovld __cnfn convert_long4_sat_rtn(char4); +long4 __ovld __cnfn convert_long4(char4); +long4 __ovld __cnfn convert_long4_sat(char4); +long4 __ovld __cnfn convert_long4_rte(uchar4); +long4 __ovld __cnfn convert_long4_sat_rte(uchar4); +long4 __ovld __cnfn convert_long4_rtz(uchar4); +long4 __ovld __cnfn convert_long4_sat_rtz(uchar4); +long4 __ovld __cnfn convert_long4_rtp(uchar4); +long4 __ovld __cnfn convert_long4_sat_rtp(uchar4); +long4 __ovld __cnfn convert_long4_rtn(uchar4); +long4 __ovld __cnfn convert_long4_sat_rtn(uchar4); +long4 __ovld __cnfn convert_long4(uchar4); +long4 __ovld __cnfn convert_long4_sat(uchar4); +long4 __ovld __cnfn convert_long4_rte(short4); +long4 __ovld __cnfn convert_long4_sat_rte(short4); +long4 __ovld __cnfn convert_long4_rtz(short4); +long4 __ovld __cnfn convert_long4_sat_rtz(short4); +long4 __ovld __cnfn convert_long4_rtp(short4); +long4 __ovld __cnfn convert_long4_sat_rtp(short4); +long4 __ovld __cnfn convert_long4_rtn(short4); +long4 __ovld __cnfn convert_long4_sat_rtn(short4); +long4 __ovld __cnfn convert_long4(short4); +long4 __ovld __cnfn convert_long4_sat(short4); +long4 __ovld __cnfn convert_long4_rte(ushort4); +long4 __ovld __cnfn convert_long4_sat_rte(ushort4); +long4 __ovld __cnfn convert_long4_rtz(ushort4); +long4 __ovld __cnfn convert_long4_sat_rtz(ushort4); +long4 __ovld __cnfn convert_long4_rtp(ushort4); +long4 __ovld __cnfn convert_long4_sat_rtp(ushort4); +long4 __ovld __cnfn convert_long4_rtn(ushort4); +long4 __ovld __cnfn convert_long4_sat_rtn(ushort4); +long4 __ovld __cnfn convert_long4(ushort4); +long4 __ovld __cnfn convert_long4_sat(ushort4); +long4 __ovld __cnfn convert_long4_rte(int4); +long4 __ovld __cnfn convert_long4_sat_rte(int4); +long4 __ovld __cnfn convert_long4_rtz(int4); +long4 __ovld __cnfn convert_long4_sat_rtz(int4); +long4 __ovld __cnfn convert_long4_rtp(int4); +long4 __ovld __cnfn convert_long4_sat_rtp(int4); +long4 __ovld __cnfn convert_long4_rtn(int4); +long4 __ovld __cnfn convert_long4_sat_rtn(int4); +long4 __ovld __cnfn convert_long4(int4); +long4 __ovld __cnfn convert_long4_sat(int4); +long4 __ovld __cnfn convert_long4_rte(uint4); +long4 __ovld __cnfn convert_long4_sat_rte(uint4); +long4 __ovld __cnfn convert_long4_rtz(uint4); +long4 __ovld __cnfn convert_long4_sat_rtz(uint4); +long4 __ovld __cnfn convert_long4_rtp(uint4); +long4 __ovld __cnfn convert_long4_sat_rtp(uint4); +long4 __ovld __cnfn convert_long4_rtn(uint4); +long4 __ovld __cnfn convert_long4_sat_rtn(uint4); +long4 __ovld __cnfn convert_long4(uint4); +long4 __ovld __cnfn convert_long4_sat(uint4); +long4 __ovld __cnfn convert_long4_rte(long4); +long4 __ovld __cnfn convert_long4_sat_rte(long4); +long4 __ovld __cnfn convert_long4_rtz(long4); +long4 __ovld __cnfn convert_long4_sat_rtz(long4); +long4 __ovld __cnfn convert_long4_rtp(long4); +long4 __ovld __cnfn convert_long4_sat_rtp(long4); +long4 __ovld __cnfn convert_long4_rtn(long4); +long4 __ovld __cnfn convert_long4_sat_rtn(long4); +long4 __ovld __cnfn convert_long4(long4); +long4 __ovld __cnfn convert_long4_sat(long4); +long4 __ovld __cnfn convert_long4_rte(ulong4); +long4 __ovld __cnfn convert_long4_sat_rte(ulong4); +long4 __ovld __cnfn convert_long4_rtz(ulong4); +long4 __ovld __cnfn convert_long4_sat_rtz(ulong4); +long4 __ovld __cnfn convert_long4_rtp(ulong4); +long4 __ovld __cnfn convert_long4_sat_rtp(ulong4); +long4 __ovld __cnfn convert_long4_rtn(ulong4); +long4 __ovld __cnfn convert_long4_sat_rtn(ulong4); +long4 __ovld __cnfn convert_long4(ulong4); +long4 __ovld __cnfn convert_long4_sat(ulong4); +long4 __ovld __cnfn convert_long4_rte(float4); +long4 __ovld __cnfn convert_long4_sat_rte(float4); +long4 __ovld __cnfn convert_long4_rtz(float4); +long4 __ovld __cnfn convert_long4_sat_rtz(float4); +long4 __ovld __cnfn convert_long4_rtp(float4); +long4 __ovld __cnfn convert_long4_sat_rtp(float4); +long4 __ovld __cnfn convert_long4_rtn(float4); +long4 __ovld __cnfn convert_long4_sat_rtn(float4); +long4 __ovld __cnfn convert_long4(float4); +long4 __ovld __cnfn convert_long4_sat(float4); +ulong4 __ovld __cnfn convert_ulong4_rte(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(char4); +ulong4 __ovld __cnfn convert_ulong4_rtz(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(char4); +ulong4 __ovld __cnfn convert_ulong4_rtp(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(char4); +ulong4 __ovld __cnfn convert_ulong4_rtn(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(char4); +ulong4 __ovld __cnfn convert_ulong4(char4); +ulong4 __ovld __cnfn convert_ulong4_sat(char4); +ulong4 __ovld __cnfn convert_ulong4_rte(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rtz(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rtp(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rtn(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(uchar4); +ulong4 __ovld __cnfn convert_ulong4(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rte(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(short4); +ulong4 __ovld __cnfn convert_ulong4_rtz(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(short4); +ulong4 __ovld __cnfn convert_ulong4_rtp(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(short4); +ulong4 __ovld __cnfn convert_ulong4_rtn(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(short4); +ulong4 __ovld __cnfn convert_ulong4(short4); +ulong4 __ovld __cnfn convert_ulong4_sat(short4); +ulong4 __ovld __cnfn convert_ulong4_rte(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rtz(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rtp(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rtn(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(ushort4); +ulong4 __ovld __cnfn convert_ulong4(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rte(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(int4); +ulong4 __ovld __cnfn convert_ulong4_rtz(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(int4); +ulong4 __ovld __cnfn convert_ulong4_rtp(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(int4); +ulong4 __ovld __cnfn convert_ulong4_rtn(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(int4); +ulong4 __ovld __cnfn convert_ulong4(int4); +ulong4 __ovld __cnfn convert_ulong4_sat(int4); +ulong4 __ovld __cnfn convert_ulong4_rte(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(uint4); +ulong4 __ovld __cnfn convert_ulong4_rtz(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(uint4); +ulong4 __ovld __cnfn convert_ulong4_rtp(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(uint4); +ulong4 __ovld __cnfn convert_ulong4_rtn(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(uint4); +ulong4 __ovld __cnfn convert_ulong4(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat(uint4); +ulong4 __ovld __cnfn convert_ulong4_rte(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(long4); +ulong4 __ovld __cnfn convert_ulong4_rtz(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(long4); +ulong4 __ovld __cnfn convert_ulong4_rtp(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(long4); +ulong4 __ovld __cnfn convert_ulong4_rtn(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(long4); +ulong4 __ovld __cnfn convert_ulong4(long4); +ulong4 __ovld __cnfn convert_ulong4_sat(long4); +ulong4 __ovld __cnfn convert_ulong4_rte(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rtz(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rtp(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rtn(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(ulong4); +ulong4 __ovld __cnfn convert_ulong4(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rte(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(float4); +ulong4 __ovld __cnfn convert_ulong4_rtz(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(float4); +ulong4 __ovld __cnfn convert_ulong4_rtp(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(float4); +ulong4 __ovld __cnfn convert_ulong4_rtn(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(float4); +ulong4 __ovld __cnfn convert_ulong4(float4); +ulong4 __ovld __cnfn convert_ulong4_sat(float4); +float4 __ovld __cnfn convert_float4_rte(char4); +float4 __ovld __cnfn convert_float4_rtz(char4); +float4 __ovld __cnfn convert_float4_rtp(char4); +float4 __ovld __cnfn convert_float4_rtn(char4); +float4 __ovld __cnfn convert_float4(char4); +float4 __ovld __cnfn convert_float4_rte(uchar4); +float4 __ovld __cnfn convert_float4_rtz(uchar4); +float4 __ovld __cnfn convert_float4_rtp(uchar4); +float4 __ovld __cnfn convert_float4_rtn(uchar4); +float4 __ovld __cnfn convert_float4(uchar4); +float4 __ovld __cnfn convert_float4_rte(short4); +float4 __ovld __cnfn convert_float4_rtz(short4); +float4 __ovld __cnfn convert_float4_rtp(short4); +float4 __ovld __cnfn convert_float4_rtn(short4); +float4 __ovld __cnfn convert_float4(short4); +float4 __ovld __cnfn convert_float4_rte(ushort4); +float4 __ovld __cnfn convert_float4_rtz(ushort4); +float4 __ovld __cnfn convert_float4_rtp(ushort4); +float4 __ovld __cnfn convert_float4_rtn(ushort4); +float4 __ovld __cnfn convert_float4(ushort4); +float4 __ovld __cnfn convert_float4_rte(int4); +float4 __ovld __cnfn convert_float4_rtz(int4); +float4 __ovld __cnfn convert_float4_rtp(int4); +float4 __ovld __cnfn convert_float4_rtn(int4); +float4 __ovld __cnfn convert_float4(int4); +float4 __ovld __cnfn convert_float4_rte(uint4); +float4 __ovld __cnfn convert_float4_rtz(uint4); +float4 __ovld __cnfn convert_float4_rtp(uint4); +float4 __ovld __cnfn convert_float4_rtn(uint4); +float4 __ovld __cnfn convert_float4(uint4); +float4 __ovld __cnfn convert_float4_rte(long4); +float4 __ovld __cnfn convert_float4_rtz(long4); +float4 __ovld __cnfn convert_float4_rtp(long4); +float4 __ovld __cnfn convert_float4_rtn(long4); +float4 __ovld __cnfn convert_float4(long4); +float4 __ovld __cnfn convert_float4_rte(ulong4); +float4 __ovld __cnfn convert_float4_rtz(ulong4); +float4 __ovld __cnfn convert_float4_rtp(ulong4); +float4 __ovld __cnfn convert_float4_rtn(ulong4); +float4 __ovld __cnfn convert_float4(ulong4); +float4 __ovld __cnfn convert_float4_rte(float4); +float4 __ovld __cnfn convert_float4_rtz(float4); +float4 __ovld __cnfn convert_float4_rtp(float4); +float4 __ovld __cnfn convert_float4_rtn(float4); +float4 __ovld __cnfn convert_float4(float4); +char8 __ovld __cnfn convert_char8_rte(char8); +char8 __ovld __cnfn convert_char8_sat_rte(char8); +char8 __ovld __cnfn convert_char8_rtz(char8); +char8 __ovld __cnfn convert_char8_sat_rtz(char8); +char8 __ovld __cnfn convert_char8_rtp(char8); +char8 __ovld __cnfn convert_char8_sat_rtp(char8); +char8 __ovld __cnfn convert_char8_rtn(char8); +char8 __ovld __cnfn convert_char8_sat_rtn(char8); +char8 __ovld __cnfn convert_char8(char8); +char8 __ovld __cnfn convert_char8_sat(char8); +char8 __ovld __cnfn convert_char8_rte(uchar8); +char8 __ovld __cnfn convert_char8_sat_rte(uchar8); +char8 __ovld __cnfn convert_char8_rtz(uchar8); +char8 __ovld __cnfn convert_char8_sat_rtz(uchar8); +char8 __ovld __cnfn convert_char8_rtp(uchar8); +char8 __ovld __cnfn convert_char8_sat_rtp(uchar8); +char8 __ovld __cnfn convert_char8_rtn(uchar8); +char8 __ovld __cnfn convert_char8_sat_rtn(uchar8); +char8 __ovld __cnfn convert_char8(uchar8); +char8 __ovld __cnfn convert_char8_sat(uchar8); +char8 __ovld __cnfn convert_char8_rte(short8); +char8 __ovld __cnfn convert_char8_sat_rte(short8); +char8 __ovld __cnfn convert_char8_rtz(short8); +char8 __ovld __cnfn convert_char8_sat_rtz(short8); +char8 __ovld __cnfn convert_char8_rtp(short8); +char8 __ovld __cnfn convert_char8_sat_rtp(short8); +char8 __ovld __cnfn convert_char8_rtn(short8); +char8 __ovld __cnfn convert_char8_sat_rtn(short8); +char8 __ovld __cnfn convert_char8(short8); +char8 __ovld __cnfn convert_char8_sat(short8); +char8 __ovld __cnfn convert_char8_rte(ushort8); +char8 __ovld __cnfn convert_char8_sat_rte(ushort8); +char8 __ovld __cnfn convert_char8_rtz(ushort8); +char8 __ovld __cnfn convert_char8_sat_rtz(ushort8); +char8 __ovld __cnfn convert_char8_rtp(ushort8); +char8 __ovld __cnfn convert_char8_sat_rtp(ushort8); +char8 __ovld __cnfn convert_char8_rtn(ushort8); +char8 __ovld __cnfn convert_char8_sat_rtn(ushort8); +char8 __ovld __cnfn convert_char8(ushort8); +char8 __ovld __cnfn convert_char8_sat(ushort8); +char8 __ovld __cnfn convert_char8_rte(int8); +char8 __ovld __cnfn convert_char8_sat_rte(int8); +char8 __ovld __cnfn convert_char8_rtz(int8); +char8 __ovld __cnfn convert_char8_sat_rtz(int8); +char8 __ovld __cnfn convert_char8_rtp(int8); +char8 __ovld __cnfn convert_char8_sat_rtp(int8); +char8 __ovld __cnfn convert_char8_rtn(int8); +char8 __ovld __cnfn convert_char8_sat_rtn(int8); +char8 __ovld __cnfn convert_char8(int8); +char8 __ovld __cnfn convert_char8_sat(int8); +char8 __ovld __cnfn convert_char8_rte(uint8); +char8 __ovld __cnfn convert_char8_sat_rte(uint8); +char8 __ovld __cnfn convert_char8_rtz(uint8); +char8 __ovld __cnfn convert_char8_sat_rtz(uint8); +char8 __ovld __cnfn convert_char8_rtp(uint8); +char8 __ovld __cnfn convert_char8_sat_rtp(uint8); +char8 __ovld __cnfn convert_char8_rtn(uint8); +char8 __ovld __cnfn convert_char8_sat_rtn(uint8); +char8 __ovld __cnfn convert_char8(uint8); +char8 __ovld __cnfn convert_char8_sat(uint8); +char8 __ovld __cnfn convert_char8_rte(long8); +char8 __ovld __cnfn convert_char8_sat_rte(long8); +char8 __ovld __cnfn convert_char8_rtz(long8); +char8 __ovld __cnfn convert_char8_sat_rtz(long8); +char8 __ovld __cnfn convert_char8_rtp(long8); +char8 __ovld __cnfn convert_char8_sat_rtp(long8); +char8 __ovld __cnfn convert_char8_rtn(long8); +char8 __ovld __cnfn convert_char8_sat_rtn(long8); +char8 __ovld __cnfn convert_char8(long8); +char8 __ovld __cnfn convert_char8_sat(long8); +char8 __ovld __cnfn convert_char8_rte(ulong8); +char8 __ovld __cnfn convert_char8_sat_rte(ulong8); +char8 __ovld __cnfn convert_char8_rtz(ulong8); +char8 __ovld __cnfn convert_char8_sat_rtz(ulong8); +char8 __ovld __cnfn convert_char8_rtp(ulong8); +char8 __ovld __cnfn convert_char8_sat_rtp(ulong8); +char8 __ovld __cnfn convert_char8_rtn(ulong8); +char8 __ovld __cnfn convert_char8_sat_rtn(ulong8); +char8 __ovld __cnfn convert_char8(ulong8); +char8 __ovld __cnfn convert_char8_sat(ulong8); +char8 __ovld __cnfn convert_char8_rte(float8); +char8 __ovld __cnfn convert_char8_sat_rte(float8); +char8 __ovld __cnfn convert_char8_rtz(float8); +char8 __ovld __cnfn convert_char8_sat_rtz(float8); +char8 __ovld __cnfn convert_char8_rtp(float8); +char8 __ovld __cnfn convert_char8_sat_rtp(float8); +char8 __ovld __cnfn convert_char8_rtn(float8); +char8 __ovld __cnfn convert_char8_sat_rtn(float8); +char8 __ovld __cnfn convert_char8(float8); +char8 __ovld __cnfn convert_char8_sat(float8); +uchar8 __ovld __cnfn convert_uchar8_rte(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(char8); +uchar8 __ovld __cnfn convert_uchar8_rtz(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(char8); +uchar8 __ovld __cnfn convert_uchar8_rtp(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(char8); +uchar8 __ovld __cnfn convert_uchar8_rtn(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(char8); +uchar8 __ovld __cnfn convert_uchar8(char8); +uchar8 __ovld __cnfn convert_uchar8_sat(char8); +uchar8 __ovld __cnfn convert_uchar8_rte(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rtz(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rtp(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rtn(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(uchar8); +uchar8 __ovld __cnfn convert_uchar8(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rte(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(short8); +uchar8 __ovld __cnfn convert_uchar8_rtz(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(short8); +uchar8 __ovld __cnfn convert_uchar8_rtp(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(short8); +uchar8 __ovld __cnfn convert_uchar8_rtn(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(short8); +uchar8 __ovld __cnfn convert_uchar8(short8); +uchar8 __ovld __cnfn convert_uchar8_sat(short8); +uchar8 __ovld __cnfn convert_uchar8_rte(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rtz(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rtp(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rtn(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(ushort8); +uchar8 __ovld __cnfn convert_uchar8(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rte(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(int8); +uchar8 __ovld __cnfn convert_uchar8_rtz(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(int8); +uchar8 __ovld __cnfn convert_uchar8_rtp(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(int8); +uchar8 __ovld __cnfn convert_uchar8_rtn(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(int8); +uchar8 __ovld __cnfn convert_uchar8(int8); +uchar8 __ovld __cnfn convert_uchar8_sat(int8); +uchar8 __ovld __cnfn convert_uchar8_rte(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(uint8); +uchar8 __ovld __cnfn convert_uchar8_rtz(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(uint8); +uchar8 __ovld __cnfn convert_uchar8_rtp(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(uint8); +uchar8 __ovld __cnfn convert_uchar8_rtn(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(uint8); +uchar8 __ovld __cnfn convert_uchar8(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat(uint8); +uchar8 __ovld __cnfn convert_uchar8_rte(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(long8); +uchar8 __ovld __cnfn convert_uchar8_rtz(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(long8); +uchar8 __ovld __cnfn convert_uchar8_rtp(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(long8); +uchar8 __ovld __cnfn convert_uchar8_rtn(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(long8); +uchar8 __ovld __cnfn convert_uchar8(long8); +uchar8 __ovld __cnfn convert_uchar8_sat(long8); +uchar8 __ovld __cnfn convert_uchar8_rte(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rtz(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rtp(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rtn(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(ulong8); +uchar8 __ovld __cnfn convert_uchar8(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rte(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(float8); +uchar8 __ovld __cnfn convert_uchar8_rtz(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(float8); +uchar8 __ovld __cnfn convert_uchar8_rtp(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(float8); +uchar8 __ovld __cnfn convert_uchar8_rtn(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(float8); +uchar8 __ovld __cnfn convert_uchar8(float8); +uchar8 __ovld __cnfn convert_uchar8_sat(float8); +short8 __ovld __cnfn convert_short8_rte(char8); +short8 __ovld __cnfn convert_short8_sat_rte(char8); +short8 __ovld __cnfn convert_short8_rtz(char8); +short8 __ovld __cnfn convert_short8_sat_rtz(char8); +short8 __ovld __cnfn convert_short8_rtp(char8); +short8 __ovld __cnfn convert_short8_sat_rtp(char8); +short8 __ovld __cnfn convert_short8_rtn(char8); +short8 __ovld __cnfn convert_short8_sat_rtn(char8); +short8 __ovld __cnfn convert_short8(char8); +short8 __ovld __cnfn convert_short8_sat(char8); +short8 __ovld __cnfn convert_short8_rte(uchar8); +short8 __ovld __cnfn convert_short8_sat_rte(uchar8); +short8 __ovld __cnfn convert_short8_rtz(uchar8); +short8 __ovld __cnfn convert_short8_sat_rtz(uchar8); +short8 __ovld __cnfn convert_short8_rtp(uchar8); +short8 __ovld __cnfn convert_short8_sat_rtp(uchar8); +short8 __ovld __cnfn convert_short8_rtn(uchar8); +short8 __ovld __cnfn convert_short8_sat_rtn(uchar8); +short8 __ovld __cnfn convert_short8(uchar8); +short8 __ovld __cnfn convert_short8_sat(uchar8); +short8 __ovld __cnfn convert_short8_rte(short8); +short8 __ovld __cnfn convert_short8_sat_rte(short8); +short8 __ovld __cnfn convert_short8_rtz(short8); +short8 __ovld __cnfn convert_short8_sat_rtz(short8); +short8 __ovld __cnfn convert_short8_rtp(short8); +short8 __ovld __cnfn convert_short8_sat_rtp(short8); +short8 __ovld __cnfn convert_short8_rtn(short8); +short8 __ovld __cnfn convert_short8_sat_rtn(short8); +short8 __ovld __cnfn convert_short8(short8); +short8 __ovld __cnfn convert_short8_sat(short8); +short8 __ovld __cnfn convert_short8_rte(ushort8); +short8 __ovld __cnfn convert_short8_sat_rte(ushort8); +short8 __ovld __cnfn convert_short8_rtz(ushort8); +short8 __ovld __cnfn convert_short8_sat_rtz(ushort8); +short8 __ovld __cnfn convert_short8_rtp(ushort8); +short8 __ovld __cnfn convert_short8_sat_rtp(ushort8); +short8 __ovld __cnfn convert_short8_rtn(ushort8); +short8 __ovld __cnfn convert_short8_sat_rtn(ushort8); +short8 __ovld __cnfn convert_short8(ushort8); +short8 __ovld __cnfn convert_short8_sat(ushort8); +short8 __ovld __cnfn convert_short8_rte(int8); +short8 __ovld __cnfn convert_short8_sat_rte(int8); +short8 __ovld __cnfn convert_short8_rtz(int8); +short8 __ovld __cnfn convert_short8_sat_rtz(int8); +short8 __ovld __cnfn convert_short8_rtp(int8); +short8 __ovld __cnfn convert_short8_sat_rtp(int8); +short8 __ovld __cnfn convert_short8_rtn(int8); +short8 __ovld __cnfn convert_short8_sat_rtn(int8); +short8 __ovld __cnfn convert_short8(int8); +short8 __ovld __cnfn convert_short8_sat(int8); +short8 __ovld __cnfn convert_short8_rte(uint8); +short8 __ovld __cnfn convert_short8_sat_rte(uint8); +short8 __ovld __cnfn convert_short8_rtz(uint8); +short8 __ovld __cnfn convert_short8_sat_rtz(uint8); +short8 __ovld __cnfn convert_short8_rtp(uint8); +short8 __ovld __cnfn convert_short8_sat_rtp(uint8); +short8 __ovld __cnfn convert_short8_rtn(uint8); +short8 __ovld __cnfn convert_short8_sat_rtn(uint8); +short8 __ovld __cnfn convert_short8(uint8); +short8 __ovld __cnfn convert_short8_sat(uint8); +short8 __ovld __cnfn convert_short8_rte(long8); +short8 __ovld __cnfn convert_short8_sat_rte(long8); +short8 __ovld __cnfn convert_short8_rtz(long8); +short8 __ovld __cnfn convert_short8_sat_rtz(long8); +short8 __ovld __cnfn convert_short8_rtp(long8); +short8 __ovld __cnfn convert_short8_sat_rtp(long8); +short8 __ovld __cnfn convert_short8_rtn(long8); +short8 __ovld __cnfn convert_short8_sat_rtn(long8); +short8 __ovld __cnfn convert_short8(long8); +short8 __ovld __cnfn convert_short8_sat(long8); +short8 __ovld __cnfn convert_short8_rte(ulong8); +short8 __ovld __cnfn convert_short8_sat_rte(ulong8); +short8 __ovld __cnfn convert_short8_rtz(ulong8); +short8 __ovld __cnfn convert_short8_sat_rtz(ulong8); +short8 __ovld __cnfn convert_short8_rtp(ulong8); +short8 __ovld __cnfn convert_short8_sat_rtp(ulong8); +short8 __ovld __cnfn convert_short8_rtn(ulong8); +short8 __ovld __cnfn convert_short8_sat_rtn(ulong8); +short8 __ovld __cnfn convert_short8(ulong8); +short8 __ovld __cnfn convert_short8_sat(ulong8); +short8 __ovld __cnfn convert_short8_rte(float8); +short8 __ovld __cnfn convert_short8_sat_rte(float8); +short8 __ovld __cnfn convert_short8_rtz(float8); +short8 __ovld __cnfn convert_short8_sat_rtz(float8); +short8 __ovld __cnfn convert_short8_rtp(float8); +short8 __ovld __cnfn convert_short8_sat_rtp(float8); +short8 __ovld __cnfn convert_short8_rtn(float8); +short8 __ovld __cnfn convert_short8_sat_rtn(float8); +short8 __ovld __cnfn convert_short8(float8); +short8 __ovld __cnfn convert_short8_sat(float8); +ushort8 __ovld __cnfn convert_ushort8_rte(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(char8); +ushort8 __ovld __cnfn convert_ushort8_rtz(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(char8); +ushort8 __ovld __cnfn convert_ushort8_rtp(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(char8); +ushort8 __ovld __cnfn convert_ushort8_rtn(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(char8); +ushort8 __ovld __cnfn convert_ushort8(char8); +ushort8 __ovld __cnfn convert_ushort8_sat(char8); +ushort8 __ovld __cnfn convert_ushort8_rte(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rtz(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rtp(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rtn(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(uchar8); +ushort8 __ovld __cnfn convert_ushort8(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rte(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(short8); +ushort8 __ovld __cnfn convert_ushort8_rtz(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(short8); +ushort8 __ovld __cnfn convert_ushort8_rtp(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(short8); +ushort8 __ovld __cnfn convert_ushort8_rtn(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(short8); +ushort8 __ovld __cnfn convert_ushort8(short8); +ushort8 __ovld __cnfn convert_ushort8_sat(short8); +ushort8 __ovld __cnfn convert_ushort8_rte(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rtz(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rtp(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rtn(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(ushort8); +ushort8 __ovld __cnfn convert_ushort8(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rte(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(int8); +ushort8 __ovld __cnfn convert_ushort8_rtz(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(int8); +ushort8 __ovld __cnfn convert_ushort8_rtp(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(int8); +ushort8 __ovld __cnfn convert_ushort8_rtn(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(int8); +ushort8 __ovld __cnfn convert_ushort8(int8); +ushort8 __ovld __cnfn convert_ushort8_sat(int8); +ushort8 __ovld __cnfn convert_ushort8_rte(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(uint8); +ushort8 __ovld __cnfn convert_ushort8_rtz(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(uint8); +ushort8 __ovld __cnfn convert_ushort8_rtp(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(uint8); +ushort8 __ovld __cnfn convert_ushort8_rtn(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(uint8); +ushort8 __ovld __cnfn convert_ushort8(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat(uint8); +ushort8 __ovld __cnfn convert_ushort8_rte(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(long8); +ushort8 __ovld __cnfn convert_ushort8_rtz(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(long8); +ushort8 __ovld __cnfn convert_ushort8_rtp(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(long8); +ushort8 __ovld __cnfn convert_ushort8_rtn(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(long8); +ushort8 __ovld __cnfn convert_ushort8(long8); +ushort8 __ovld __cnfn convert_ushort8_sat(long8); +ushort8 __ovld __cnfn convert_ushort8_rte(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rtz(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rtp(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rtn(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(ulong8); +ushort8 __ovld __cnfn convert_ushort8(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rte(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(float8); +ushort8 __ovld __cnfn convert_ushort8_rtz(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(float8); +ushort8 __ovld __cnfn convert_ushort8_rtp(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(float8); +ushort8 __ovld __cnfn convert_ushort8_rtn(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(float8); +ushort8 __ovld __cnfn convert_ushort8(float8); +ushort8 __ovld __cnfn convert_ushort8_sat(float8); +int8 __ovld __cnfn convert_int8_rte(char8); +int8 __ovld __cnfn convert_int8_sat_rte(char8); +int8 __ovld __cnfn convert_int8_rtz(char8); +int8 __ovld __cnfn convert_int8_sat_rtz(char8); +int8 __ovld __cnfn convert_int8_rtp(char8); +int8 __ovld __cnfn convert_int8_sat_rtp(char8); +int8 __ovld __cnfn convert_int8_rtn(char8); +int8 __ovld __cnfn convert_int8_sat_rtn(char8); +int8 __ovld __cnfn convert_int8(char8); +int8 __ovld __cnfn convert_int8_sat(char8); +int8 __ovld __cnfn convert_int8_rte(uchar8); +int8 __ovld __cnfn convert_int8_sat_rte(uchar8); +int8 __ovld __cnfn convert_int8_rtz(uchar8); +int8 __ovld __cnfn convert_int8_sat_rtz(uchar8); +int8 __ovld __cnfn convert_int8_rtp(uchar8); +int8 __ovld __cnfn convert_int8_sat_rtp(uchar8); +int8 __ovld __cnfn convert_int8_rtn(uchar8); +int8 __ovld __cnfn convert_int8_sat_rtn(uchar8); +int8 __ovld __cnfn convert_int8(uchar8); +int8 __ovld __cnfn convert_int8_sat(uchar8); +int8 __ovld __cnfn convert_int8_rte(short8); +int8 __ovld __cnfn convert_int8_sat_rte(short8); +int8 __ovld __cnfn convert_int8_rtz(short8); +int8 __ovld __cnfn convert_int8_sat_rtz(short8); +int8 __ovld __cnfn convert_int8_rtp(short8); +int8 __ovld __cnfn convert_int8_sat_rtp(short8); +int8 __ovld __cnfn convert_int8_rtn(short8); +int8 __ovld __cnfn convert_int8_sat_rtn(short8); +int8 __ovld __cnfn convert_int8(short8); +int8 __ovld __cnfn convert_int8_sat(short8); +int8 __ovld __cnfn convert_int8_rte(ushort8); +int8 __ovld __cnfn convert_int8_sat_rte(ushort8); +int8 __ovld __cnfn convert_int8_rtz(ushort8); +int8 __ovld __cnfn convert_int8_sat_rtz(ushort8); +int8 __ovld __cnfn convert_int8_rtp(ushort8); +int8 __ovld __cnfn convert_int8_sat_rtp(ushort8); +int8 __ovld __cnfn convert_int8_rtn(ushort8); +int8 __ovld __cnfn convert_int8_sat_rtn(ushort8); +int8 __ovld __cnfn convert_int8(ushort8); +int8 __ovld __cnfn convert_int8_sat(ushort8); +int8 __ovld __cnfn convert_int8_rte(int8); +int8 __ovld __cnfn convert_int8_sat_rte(int8); +int8 __ovld __cnfn convert_int8_rtz(int8); +int8 __ovld __cnfn convert_int8_sat_rtz(int8); +int8 __ovld __cnfn convert_int8_rtp(int8); +int8 __ovld __cnfn convert_int8_sat_rtp(int8); +int8 __ovld __cnfn convert_int8_rtn(int8); +int8 __ovld __cnfn convert_int8_sat_rtn(int8); +int8 __ovld __cnfn convert_int8(int8); +int8 __ovld __cnfn convert_int8_sat(int8); +int8 __ovld __cnfn convert_int8_rte(uint8); +int8 __ovld __cnfn convert_int8_sat_rte(uint8); +int8 __ovld __cnfn convert_int8_rtz(uint8); +int8 __ovld __cnfn convert_int8_sat_rtz(uint8); +int8 __ovld __cnfn convert_int8_rtp(uint8); +int8 __ovld __cnfn convert_int8_sat_rtp(uint8); +int8 __ovld __cnfn convert_int8_rtn(uint8); +int8 __ovld __cnfn convert_int8_sat_rtn(uint8); +int8 __ovld __cnfn convert_int8(uint8); +int8 __ovld __cnfn convert_int8_sat(uint8); +int8 __ovld __cnfn convert_int8_rte(long8); +int8 __ovld __cnfn convert_int8_sat_rte(long8); +int8 __ovld __cnfn convert_int8_rtz(long8); +int8 __ovld __cnfn convert_int8_sat_rtz(long8); +int8 __ovld __cnfn convert_int8_rtp(long8); +int8 __ovld __cnfn convert_int8_sat_rtp(long8); +int8 __ovld __cnfn convert_int8_rtn(long8); +int8 __ovld __cnfn convert_int8_sat_rtn(long8); +int8 __ovld __cnfn convert_int8(long8); +int8 __ovld __cnfn convert_int8_sat(long8); +int8 __ovld __cnfn convert_int8_rte(ulong8); +int8 __ovld __cnfn convert_int8_sat_rte(ulong8); +int8 __ovld __cnfn convert_int8_rtz(ulong8); +int8 __ovld __cnfn convert_int8_sat_rtz(ulong8); +int8 __ovld __cnfn convert_int8_rtp(ulong8); +int8 __ovld __cnfn convert_int8_sat_rtp(ulong8); +int8 __ovld __cnfn convert_int8_rtn(ulong8); +int8 __ovld __cnfn convert_int8_sat_rtn(ulong8); +int8 __ovld __cnfn convert_int8(ulong8); +int8 __ovld __cnfn convert_int8_sat(ulong8); +int8 __ovld __cnfn convert_int8_rte(float8); +int8 __ovld __cnfn convert_int8_sat_rte(float8); +int8 __ovld __cnfn convert_int8_rtz(float8); +int8 __ovld __cnfn convert_int8_sat_rtz(float8); +int8 __ovld __cnfn convert_int8_rtp(float8); +int8 __ovld __cnfn convert_int8_sat_rtp(float8); +int8 __ovld __cnfn convert_int8_rtn(float8); +int8 __ovld __cnfn convert_int8_sat_rtn(float8); +int8 __ovld __cnfn convert_int8(float8); +int8 __ovld __cnfn convert_int8_sat(float8); +uint8 __ovld __cnfn convert_uint8_rte(char8); +uint8 __ovld __cnfn convert_uint8_sat_rte(char8); +uint8 __ovld __cnfn convert_uint8_rtz(char8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(char8); +uint8 __ovld __cnfn convert_uint8_rtp(char8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(char8); +uint8 __ovld __cnfn convert_uint8_rtn(char8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(char8); +uint8 __ovld __cnfn convert_uint8(char8); +uint8 __ovld __cnfn convert_uint8_sat(char8); +uint8 __ovld __cnfn convert_uint8_rte(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rte(uchar8); +uint8 __ovld __cnfn convert_uint8_rtz(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(uchar8); +uint8 __ovld __cnfn convert_uint8_rtp(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(uchar8); +uint8 __ovld __cnfn convert_uint8_rtn(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(uchar8); +uint8 __ovld __cnfn convert_uint8(uchar8); +uint8 __ovld __cnfn convert_uint8_sat(uchar8); +uint8 __ovld __cnfn convert_uint8_rte(short8); +uint8 __ovld __cnfn convert_uint8_sat_rte(short8); +uint8 __ovld __cnfn convert_uint8_rtz(short8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(short8); +uint8 __ovld __cnfn convert_uint8_rtp(short8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(short8); +uint8 __ovld __cnfn convert_uint8_rtn(short8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(short8); +uint8 __ovld __cnfn convert_uint8(short8); +uint8 __ovld __cnfn convert_uint8_sat(short8); +uint8 __ovld __cnfn convert_uint8_rte(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rte(ushort8); +uint8 __ovld __cnfn convert_uint8_rtz(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(ushort8); +uint8 __ovld __cnfn convert_uint8_rtp(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(ushort8); +uint8 __ovld __cnfn convert_uint8_rtn(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(ushort8); +uint8 __ovld __cnfn convert_uint8(ushort8); +uint8 __ovld __cnfn convert_uint8_sat(ushort8); +uint8 __ovld __cnfn convert_uint8_rte(int8); +uint8 __ovld __cnfn convert_uint8_sat_rte(int8); +uint8 __ovld __cnfn convert_uint8_rtz(int8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(int8); +uint8 __ovld __cnfn convert_uint8_rtp(int8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(int8); +uint8 __ovld __cnfn convert_uint8_rtn(int8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(int8); +uint8 __ovld __cnfn convert_uint8(int8); +uint8 __ovld __cnfn convert_uint8_sat(int8); +uint8 __ovld __cnfn convert_uint8_rte(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rte(uint8); +uint8 __ovld __cnfn convert_uint8_rtz(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(uint8); +uint8 __ovld __cnfn convert_uint8_rtp(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(uint8); +uint8 __ovld __cnfn convert_uint8_rtn(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(uint8); +uint8 __ovld __cnfn convert_uint8(uint8); +uint8 __ovld __cnfn convert_uint8_sat(uint8); +uint8 __ovld __cnfn convert_uint8_rte(long8); +uint8 __ovld __cnfn convert_uint8_sat_rte(long8); +uint8 __ovld __cnfn convert_uint8_rtz(long8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(long8); +uint8 __ovld __cnfn convert_uint8_rtp(long8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(long8); +uint8 __ovld __cnfn convert_uint8_rtn(long8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(long8); +uint8 __ovld __cnfn convert_uint8(long8); +uint8 __ovld __cnfn convert_uint8_sat(long8); +uint8 __ovld __cnfn convert_uint8_rte(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rte(ulong8); +uint8 __ovld __cnfn convert_uint8_rtz(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(ulong8); +uint8 __ovld __cnfn convert_uint8_rtp(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(ulong8); +uint8 __ovld __cnfn convert_uint8_rtn(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(ulong8); +uint8 __ovld __cnfn convert_uint8(ulong8); +uint8 __ovld __cnfn convert_uint8_sat(ulong8); +uint8 __ovld __cnfn convert_uint8_rte(float8); +uint8 __ovld __cnfn convert_uint8_sat_rte(float8); +uint8 __ovld __cnfn convert_uint8_rtz(float8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(float8); +uint8 __ovld __cnfn convert_uint8_rtp(float8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(float8); +uint8 __ovld __cnfn convert_uint8_rtn(float8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(float8); +uint8 __ovld __cnfn convert_uint8(float8); +uint8 __ovld __cnfn convert_uint8_sat(float8); +long8 __ovld __cnfn convert_long8_rte(char8); +long8 __ovld __cnfn convert_long8_sat_rte(char8); +long8 __ovld __cnfn convert_long8_rtz(char8); +long8 __ovld __cnfn convert_long8_sat_rtz(char8); +long8 __ovld __cnfn convert_long8_rtp(char8); +long8 __ovld __cnfn convert_long8_sat_rtp(char8); +long8 __ovld __cnfn convert_long8_rtn(char8); +long8 __ovld __cnfn convert_long8_sat_rtn(char8); +long8 __ovld __cnfn convert_long8(char8); +long8 __ovld __cnfn convert_long8_sat(char8); +long8 __ovld __cnfn convert_long8_rte(uchar8); +long8 __ovld __cnfn convert_long8_sat_rte(uchar8); +long8 __ovld __cnfn convert_long8_rtz(uchar8); +long8 __ovld __cnfn convert_long8_sat_rtz(uchar8); +long8 __ovld __cnfn convert_long8_rtp(uchar8); +long8 __ovld __cnfn convert_long8_sat_rtp(uchar8); +long8 __ovld __cnfn convert_long8_rtn(uchar8); +long8 __ovld __cnfn convert_long8_sat_rtn(uchar8); +long8 __ovld __cnfn convert_long8(uchar8); +long8 __ovld __cnfn convert_long8_sat(uchar8); +long8 __ovld __cnfn convert_long8_rte(short8); +long8 __ovld __cnfn convert_long8_sat_rte(short8); +long8 __ovld __cnfn convert_long8_rtz(short8); +long8 __ovld __cnfn convert_long8_sat_rtz(short8); +long8 __ovld __cnfn convert_long8_rtp(short8); +long8 __ovld __cnfn convert_long8_sat_rtp(short8); +long8 __ovld __cnfn convert_long8_rtn(short8); +long8 __ovld __cnfn convert_long8_sat_rtn(short8); +long8 __ovld __cnfn convert_long8(short8); +long8 __ovld __cnfn convert_long8_sat(short8); +long8 __ovld __cnfn convert_long8_rte(ushort8); +long8 __ovld __cnfn convert_long8_sat_rte(ushort8); +long8 __ovld __cnfn convert_long8_rtz(ushort8); +long8 __ovld __cnfn convert_long8_sat_rtz(ushort8); +long8 __ovld __cnfn convert_long8_rtp(ushort8); +long8 __ovld __cnfn convert_long8_sat_rtp(ushort8); +long8 __ovld __cnfn convert_long8_rtn(ushort8); +long8 __ovld __cnfn convert_long8_sat_rtn(ushort8); +long8 __ovld __cnfn convert_long8(ushort8); +long8 __ovld __cnfn convert_long8_sat(ushort8); +long8 __ovld __cnfn convert_long8_rte(int8); +long8 __ovld __cnfn convert_long8_sat_rte(int8); +long8 __ovld __cnfn convert_long8_rtz(int8); +long8 __ovld __cnfn convert_long8_sat_rtz(int8); +long8 __ovld __cnfn convert_long8_rtp(int8); +long8 __ovld __cnfn convert_long8_sat_rtp(int8); +long8 __ovld __cnfn convert_long8_rtn(int8); +long8 __ovld __cnfn convert_long8_sat_rtn(int8); +long8 __ovld __cnfn convert_long8(int8); +long8 __ovld __cnfn convert_long8_sat(int8); +long8 __ovld __cnfn convert_long8_rte(uint8); +long8 __ovld __cnfn convert_long8_sat_rte(uint8); +long8 __ovld __cnfn convert_long8_rtz(uint8); +long8 __ovld __cnfn convert_long8_sat_rtz(uint8); +long8 __ovld __cnfn convert_long8_rtp(uint8); +long8 __ovld __cnfn convert_long8_sat_rtp(uint8); +long8 __ovld __cnfn convert_long8_rtn(uint8); +long8 __ovld __cnfn convert_long8_sat_rtn(uint8); +long8 __ovld __cnfn convert_long8(uint8); +long8 __ovld __cnfn convert_long8_sat(uint8); +long8 __ovld __cnfn convert_long8_rte(long8); +long8 __ovld __cnfn convert_long8_sat_rte(long8); +long8 __ovld __cnfn convert_long8_rtz(long8); +long8 __ovld __cnfn convert_long8_sat_rtz(long8); +long8 __ovld __cnfn convert_long8_rtp(long8); +long8 __ovld __cnfn convert_long8_sat_rtp(long8); +long8 __ovld __cnfn convert_long8_rtn(long8); +long8 __ovld __cnfn convert_long8_sat_rtn(long8); +long8 __ovld __cnfn convert_long8(long8); +long8 __ovld __cnfn convert_long8_sat(long8); +long8 __ovld __cnfn convert_long8_rte(ulong8); +long8 __ovld __cnfn convert_long8_sat_rte(ulong8); +long8 __ovld __cnfn convert_long8_rtz(ulong8); +long8 __ovld __cnfn convert_long8_sat_rtz(ulong8); +long8 __ovld __cnfn convert_long8_rtp(ulong8); +long8 __ovld __cnfn convert_long8_sat_rtp(ulong8); +long8 __ovld __cnfn convert_long8_rtn(ulong8); +long8 __ovld __cnfn convert_long8_sat_rtn(ulong8); +long8 __ovld __cnfn convert_long8(ulong8); +long8 __ovld __cnfn convert_long8_sat(ulong8); +long8 __ovld __cnfn convert_long8_rte(float8); +long8 __ovld __cnfn convert_long8_sat_rte(float8); +long8 __ovld __cnfn convert_long8_rtz(float8); +long8 __ovld __cnfn convert_long8_sat_rtz(float8); +long8 __ovld __cnfn convert_long8_rtp(float8); +long8 __ovld __cnfn convert_long8_sat_rtp(float8); +long8 __ovld __cnfn convert_long8_rtn(float8); +long8 __ovld __cnfn convert_long8_sat_rtn(float8); +long8 __ovld __cnfn convert_long8(float8); +long8 __ovld __cnfn convert_long8_sat(float8); +ulong8 __ovld __cnfn convert_ulong8_rte(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(char8); +ulong8 __ovld __cnfn convert_ulong8_rtz(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(char8); +ulong8 __ovld __cnfn convert_ulong8_rtp(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(char8); +ulong8 __ovld __cnfn convert_ulong8_rtn(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(char8); +ulong8 __ovld __cnfn convert_ulong8(char8); +ulong8 __ovld __cnfn convert_ulong8_sat(char8); +ulong8 __ovld __cnfn convert_ulong8_rte(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rtz(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rtp(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rtn(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(uchar8); +ulong8 __ovld __cnfn convert_ulong8(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rte(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(short8); +ulong8 __ovld __cnfn convert_ulong8_rtz(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(short8); +ulong8 __ovld __cnfn convert_ulong8_rtp(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(short8); +ulong8 __ovld __cnfn convert_ulong8_rtn(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(short8); +ulong8 __ovld __cnfn convert_ulong8(short8); +ulong8 __ovld __cnfn convert_ulong8_sat(short8); +ulong8 __ovld __cnfn convert_ulong8_rte(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rtz(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rtp(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rtn(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(ushort8); +ulong8 __ovld __cnfn convert_ulong8(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rte(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(int8); +ulong8 __ovld __cnfn convert_ulong8_rtz(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(int8); +ulong8 __ovld __cnfn convert_ulong8_rtp(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(int8); +ulong8 __ovld __cnfn convert_ulong8_rtn(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(int8); +ulong8 __ovld __cnfn convert_ulong8(int8); +ulong8 __ovld __cnfn convert_ulong8_sat(int8); +ulong8 __ovld __cnfn convert_ulong8_rte(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(uint8); +ulong8 __ovld __cnfn convert_ulong8_rtz(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(uint8); +ulong8 __ovld __cnfn convert_ulong8_rtp(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(uint8); +ulong8 __ovld __cnfn convert_ulong8_rtn(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(uint8); +ulong8 __ovld __cnfn convert_ulong8(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat(uint8); +ulong8 __ovld __cnfn convert_ulong8_rte(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(long8); +ulong8 __ovld __cnfn convert_ulong8_rtz(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(long8); +ulong8 __ovld __cnfn convert_ulong8_rtp(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(long8); +ulong8 __ovld __cnfn convert_ulong8_rtn(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(long8); +ulong8 __ovld __cnfn convert_ulong8(long8); +ulong8 __ovld __cnfn convert_ulong8_sat(long8); +ulong8 __ovld __cnfn convert_ulong8_rte(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rtz(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rtp(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rtn(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(ulong8); +ulong8 __ovld __cnfn convert_ulong8(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rte(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(float8); +ulong8 __ovld __cnfn convert_ulong8_rtz(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(float8); +ulong8 __ovld __cnfn convert_ulong8_rtp(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(float8); +ulong8 __ovld __cnfn convert_ulong8_rtn(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(float8); +ulong8 __ovld __cnfn convert_ulong8(float8); +ulong8 __ovld __cnfn convert_ulong8_sat(float8); +float8 __ovld __cnfn convert_float8_rte(char8); +float8 __ovld __cnfn convert_float8_rtz(char8); +float8 __ovld __cnfn convert_float8_rtp(char8); +float8 __ovld __cnfn convert_float8_rtn(char8); +float8 __ovld __cnfn convert_float8(char8); +float8 __ovld __cnfn convert_float8_rte(uchar8); +float8 __ovld __cnfn convert_float8_rtz(uchar8); +float8 __ovld __cnfn convert_float8_rtp(uchar8); +float8 __ovld __cnfn convert_float8_rtn(uchar8); +float8 __ovld __cnfn convert_float8(uchar8); +float8 __ovld __cnfn convert_float8_rte(short8); +float8 __ovld __cnfn convert_float8_rtz(short8); +float8 __ovld __cnfn convert_float8_rtp(short8); +float8 __ovld __cnfn convert_float8_rtn(short8); +float8 __ovld __cnfn convert_float8(short8); +float8 __ovld __cnfn convert_float8_rte(ushort8); +float8 __ovld __cnfn convert_float8_rtz(ushort8); +float8 __ovld __cnfn convert_float8_rtp(ushort8); +float8 __ovld __cnfn convert_float8_rtn(ushort8); +float8 __ovld __cnfn convert_float8(ushort8); +float8 __ovld __cnfn convert_float8_rte(int8); +float8 __ovld __cnfn convert_float8_rtz(int8); +float8 __ovld __cnfn convert_float8_rtp(int8); +float8 __ovld __cnfn convert_float8_rtn(int8); +float8 __ovld __cnfn convert_float8(int8); +float8 __ovld __cnfn convert_float8_rte(uint8); +float8 __ovld __cnfn convert_float8_rtz(uint8); +float8 __ovld __cnfn convert_float8_rtp(uint8); +float8 __ovld __cnfn convert_float8_rtn(uint8); +float8 __ovld __cnfn convert_float8(uint8); +float8 __ovld __cnfn convert_float8_rte(long8); +float8 __ovld __cnfn convert_float8_rtz(long8); +float8 __ovld __cnfn convert_float8_rtp(long8); +float8 __ovld __cnfn convert_float8_rtn(long8); +float8 __ovld __cnfn convert_float8(long8); +float8 __ovld __cnfn convert_float8_rte(ulong8); +float8 __ovld __cnfn convert_float8_rtz(ulong8); +float8 __ovld __cnfn convert_float8_rtp(ulong8); +float8 __ovld __cnfn convert_float8_rtn(ulong8); +float8 __ovld __cnfn convert_float8(ulong8); +float8 __ovld __cnfn convert_float8_rte(float8); +float8 __ovld __cnfn convert_float8_rtz(float8); +float8 __ovld __cnfn convert_float8_rtp(float8); +float8 __ovld __cnfn convert_float8_rtn(float8); +float8 __ovld __cnfn convert_float8(float8); +char16 __ovld __cnfn convert_char16_rte(char16); +char16 __ovld __cnfn convert_char16_sat_rte(char16); +char16 __ovld __cnfn convert_char16_rtz(char16); +char16 __ovld __cnfn convert_char16_sat_rtz(char16); +char16 __ovld __cnfn convert_char16_rtp(char16); +char16 __ovld __cnfn convert_char16_sat_rtp(char16); +char16 __ovld __cnfn convert_char16_rtn(char16); +char16 __ovld __cnfn convert_char16_sat_rtn(char16); +char16 __ovld __cnfn convert_char16(char16); +char16 __ovld __cnfn convert_char16_sat(char16); +char16 __ovld __cnfn convert_char16_rte(uchar16); +char16 __ovld __cnfn convert_char16_sat_rte(uchar16); +char16 __ovld __cnfn convert_char16_rtz(uchar16); +char16 __ovld __cnfn convert_char16_sat_rtz(uchar16); +char16 __ovld __cnfn convert_char16_rtp(uchar16); +char16 __ovld __cnfn convert_char16_sat_rtp(uchar16); +char16 __ovld __cnfn convert_char16_rtn(uchar16); +char16 __ovld __cnfn convert_char16_sat_rtn(uchar16); +char16 __ovld __cnfn convert_char16(uchar16); +char16 __ovld __cnfn convert_char16_sat(uchar16); +char16 __ovld __cnfn convert_char16_rte(short16); +char16 __ovld __cnfn convert_char16_sat_rte(short16); +char16 __ovld __cnfn convert_char16_rtz(short16); +char16 __ovld __cnfn convert_char16_sat_rtz(short16); +char16 __ovld __cnfn convert_char16_rtp(short16); +char16 __ovld __cnfn convert_char16_sat_rtp(short16); +char16 __ovld __cnfn convert_char16_rtn(short16); +char16 __ovld __cnfn convert_char16_sat_rtn(short16); +char16 __ovld __cnfn convert_char16(short16); +char16 __ovld __cnfn convert_char16_sat(short16); +char16 __ovld __cnfn convert_char16_rte(ushort16); +char16 __ovld __cnfn convert_char16_sat_rte(ushort16); +char16 __ovld __cnfn convert_char16_rtz(ushort16); +char16 __ovld __cnfn convert_char16_sat_rtz(ushort16); +char16 __ovld __cnfn convert_char16_rtp(ushort16); +char16 __ovld __cnfn convert_char16_sat_rtp(ushort16); +char16 __ovld __cnfn convert_char16_rtn(ushort16); +char16 __ovld __cnfn convert_char16_sat_rtn(ushort16); +char16 __ovld __cnfn convert_char16(ushort16); +char16 __ovld __cnfn convert_char16_sat(ushort16); +char16 __ovld __cnfn convert_char16_rte(int16); +char16 __ovld __cnfn convert_char16_sat_rte(int16); +char16 __ovld __cnfn convert_char16_rtz(int16); +char16 __ovld __cnfn convert_char16_sat_rtz(int16); +char16 __ovld __cnfn convert_char16_rtp(int16); +char16 __ovld __cnfn convert_char16_sat_rtp(int16); +char16 __ovld __cnfn convert_char16_rtn(int16); +char16 __ovld __cnfn convert_char16_sat_rtn(int16); +char16 __ovld __cnfn convert_char16(int16); +char16 __ovld __cnfn convert_char16_sat(int16); +char16 __ovld __cnfn convert_char16_rte(uint16); +char16 __ovld __cnfn convert_char16_sat_rte(uint16); +char16 __ovld __cnfn convert_char16_rtz(uint16); +char16 __ovld __cnfn convert_char16_sat_rtz(uint16); +char16 __ovld __cnfn convert_char16_rtp(uint16); +char16 __ovld __cnfn convert_char16_sat_rtp(uint16); +char16 __ovld __cnfn convert_char16_rtn(uint16); +char16 __ovld __cnfn convert_char16_sat_rtn(uint16); +char16 __ovld __cnfn convert_char16(uint16); +char16 __ovld __cnfn convert_char16_sat(uint16); +char16 __ovld __cnfn convert_char16_rte(long16); +char16 __ovld __cnfn convert_char16_sat_rte(long16); +char16 __ovld __cnfn convert_char16_rtz(long16); +char16 __ovld __cnfn convert_char16_sat_rtz(long16); +char16 __ovld __cnfn convert_char16_rtp(long16); +char16 __ovld __cnfn convert_char16_sat_rtp(long16); +char16 __ovld __cnfn convert_char16_rtn(long16); +char16 __ovld __cnfn convert_char16_sat_rtn(long16); +char16 __ovld __cnfn convert_char16(long16); +char16 __ovld __cnfn convert_char16_sat(long16); +char16 __ovld __cnfn convert_char16_rte(ulong16); +char16 __ovld __cnfn convert_char16_sat_rte(ulong16); +char16 __ovld __cnfn convert_char16_rtz(ulong16); +char16 __ovld __cnfn convert_char16_sat_rtz(ulong16); +char16 __ovld __cnfn convert_char16_rtp(ulong16); +char16 __ovld __cnfn convert_char16_sat_rtp(ulong16); +char16 __ovld __cnfn convert_char16_rtn(ulong16); +char16 __ovld __cnfn convert_char16_sat_rtn(ulong16); +char16 __ovld __cnfn convert_char16(ulong16); +char16 __ovld __cnfn convert_char16_sat(ulong16); +char16 __ovld __cnfn convert_char16_rte(float16); +char16 __ovld __cnfn convert_char16_sat_rte(float16); +char16 __ovld __cnfn convert_char16_rtz(float16); +char16 __ovld __cnfn convert_char16_sat_rtz(float16); +char16 __ovld __cnfn convert_char16_rtp(float16); +char16 __ovld __cnfn convert_char16_sat_rtp(float16); +char16 __ovld __cnfn convert_char16_rtn(float16); +char16 __ovld __cnfn convert_char16_sat_rtn(float16); +char16 __ovld __cnfn convert_char16(float16); +char16 __ovld __cnfn convert_char16_sat(float16); +uchar16 __ovld __cnfn convert_uchar16_rte(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(char16); +uchar16 __ovld __cnfn convert_uchar16_rtz(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(char16); +uchar16 __ovld __cnfn convert_uchar16_rtp(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(char16); +uchar16 __ovld __cnfn convert_uchar16_rtn(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(char16); +uchar16 __ovld __cnfn convert_uchar16(char16); +uchar16 __ovld __cnfn convert_uchar16_sat(char16); +uchar16 __ovld __cnfn convert_uchar16_rte(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rtz(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rtp(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rtn(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(uchar16); +uchar16 __ovld __cnfn convert_uchar16(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rte(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(short16); +uchar16 __ovld __cnfn convert_uchar16_rtz(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(short16); +uchar16 __ovld __cnfn convert_uchar16_rtp(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(short16); +uchar16 __ovld __cnfn convert_uchar16_rtn(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(short16); +uchar16 __ovld __cnfn convert_uchar16(short16); +uchar16 __ovld __cnfn convert_uchar16_sat(short16); +uchar16 __ovld __cnfn convert_uchar16_rte(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rtz(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rtp(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rtn(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(ushort16); +uchar16 __ovld __cnfn convert_uchar16(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rte(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(int16); +uchar16 __ovld __cnfn convert_uchar16_rtz(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(int16); +uchar16 __ovld __cnfn convert_uchar16_rtp(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(int16); +uchar16 __ovld __cnfn convert_uchar16_rtn(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(int16); +uchar16 __ovld __cnfn convert_uchar16(int16); +uchar16 __ovld __cnfn convert_uchar16_sat(int16); +uchar16 __ovld __cnfn convert_uchar16_rte(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(uint16); +uchar16 __ovld __cnfn convert_uchar16_rtz(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(uint16); +uchar16 __ovld __cnfn convert_uchar16_rtp(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(uint16); +uchar16 __ovld __cnfn convert_uchar16_rtn(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(uint16); +uchar16 __ovld __cnfn convert_uchar16(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat(uint16); +uchar16 __ovld __cnfn convert_uchar16_rte(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(long16); +uchar16 __ovld __cnfn convert_uchar16_rtz(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(long16); +uchar16 __ovld __cnfn convert_uchar16_rtp(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(long16); +uchar16 __ovld __cnfn convert_uchar16_rtn(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(long16); +uchar16 __ovld __cnfn convert_uchar16(long16); +uchar16 __ovld __cnfn convert_uchar16_sat(long16); +uchar16 __ovld __cnfn convert_uchar16_rte(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rtz(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rtp(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rtn(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(ulong16); +uchar16 __ovld __cnfn convert_uchar16(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rte(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(float16); +uchar16 __ovld __cnfn convert_uchar16_rtz(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(float16); +uchar16 __ovld __cnfn convert_uchar16_rtp(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(float16); +uchar16 __ovld __cnfn convert_uchar16_rtn(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(float16); +uchar16 __ovld __cnfn convert_uchar16(float16); +uchar16 __ovld __cnfn convert_uchar16_sat(float16); +short16 __ovld __cnfn convert_short16_rte(char16); +short16 __ovld __cnfn convert_short16_sat_rte(char16); +short16 __ovld __cnfn convert_short16_rtz(char16); +short16 __ovld __cnfn convert_short16_sat_rtz(char16); +short16 __ovld __cnfn convert_short16_rtp(char16); +short16 __ovld __cnfn convert_short16_sat_rtp(char16); +short16 __ovld __cnfn convert_short16_rtn(char16); +short16 __ovld __cnfn convert_short16_sat_rtn(char16); +short16 __ovld __cnfn convert_short16(char16); +short16 __ovld __cnfn convert_short16_sat(char16); +short16 __ovld __cnfn convert_short16_rte(uchar16); +short16 __ovld __cnfn convert_short16_sat_rte(uchar16); +short16 __ovld __cnfn convert_short16_rtz(uchar16); +short16 __ovld __cnfn convert_short16_sat_rtz(uchar16); +short16 __ovld __cnfn convert_short16_rtp(uchar16); +short16 __ovld __cnfn convert_short16_sat_rtp(uchar16); +short16 __ovld __cnfn convert_short16_rtn(uchar16); +short16 __ovld __cnfn convert_short16_sat_rtn(uchar16); +short16 __ovld __cnfn convert_short16(uchar16); +short16 __ovld __cnfn convert_short16_sat(uchar16); +short16 __ovld __cnfn convert_short16_rte(short16); +short16 __ovld __cnfn convert_short16_sat_rte(short16); +short16 __ovld __cnfn convert_short16_rtz(short16); +short16 __ovld __cnfn convert_short16_sat_rtz(short16); +short16 __ovld __cnfn convert_short16_rtp(short16); +short16 __ovld __cnfn convert_short16_sat_rtp(short16); +short16 __ovld __cnfn convert_short16_rtn(short16); +short16 __ovld __cnfn convert_short16_sat_rtn(short16); +short16 __ovld __cnfn convert_short16(short16); +short16 __ovld __cnfn convert_short16_sat(short16); +short16 __ovld __cnfn convert_short16_rte(ushort16); +short16 __ovld __cnfn convert_short16_sat_rte(ushort16); +short16 __ovld __cnfn convert_short16_rtz(ushort16); +short16 __ovld __cnfn convert_short16_sat_rtz(ushort16); +short16 __ovld __cnfn convert_short16_rtp(ushort16); +short16 __ovld __cnfn convert_short16_sat_rtp(ushort16); +short16 __ovld __cnfn convert_short16_rtn(ushort16); +short16 __ovld __cnfn convert_short16_sat_rtn(ushort16); +short16 __ovld __cnfn convert_short16(ushort16); +short16 __ovld __cnfn convert_short16_sat(ushort16); +short16 __ovld __cnfn convert_short16_rte(int16); +short16 __ovld __cnfn convert_short16_sat_rte(int16); +short16 __ovld __cnfn convert_short16_rtz(int16); +short16 __ovld __cnfn convert_short16_sat_rtz(int16); +short16 __ovld __cnfn convert_short16_rtp(int16); +short16 __ovld __cnfn convert_short16_sat_rtp(int16); +short16 __ovld __cnfn convert_short16_rtn(int16); +short16 __ovld __cnfn convert_short16_sat_rtn(int16); +short16 __ovld __cnfn convert_short16(int16); +short16 __ovld __cnfn convert_short16_sat(int16); +short16 __ovld __cnfn convert_short16_rte(uint16); +short16 __ovld __cnfn convert_short16_sat_rte(uint16); +short16 __ovld __cnfn convert_short16_rtz(uint16); +short16 __ovld __cnfn convert_short16_sat_rtz(uint16); +short16 __ovld __cnfn convert_short16_rtp(uint16); +short16 __ovld __cnfn convert_short16_sat_rtp(uint16); +short16 __ovld __cnfn convert_short16_rtn(uint16); +short16 __ovld __cnfn convert_short16_sat_rtn(uint16); +short16 __ovld __cnfn convert_short16(uint16); +short16 __ovld __cnfn convert_short16_sat(uint16); +short16 __ovld __cnfn convert_short16_rte(long16); +short16 __ovld __cnfn convert_short16_sat_rte(long16); +short16 __ovld __cnfn convert_short16_rtz(long16); +short16 __ovld __cnfn convert_short16_sat_rtz(long16); +short16 __ovld __cnfn convert_short16_rtp(long16); +short16 __ovld __cnfn convert_short16_sat_rtp(long16); +short16 __ovld __cnfn convert_short16_rtn(long16); +short16 __ovld __cnfn convert_short16_sat_rtn(long16); +short16 __ovld __cnfn convert_short16(long16); +short16 __ovld __cnfn convert_short16_sat(long16); +short16 __ovld __cnfn convert_short16_rte(ulong16); +short16 __ovld __cnfn convert_short16_sat_rte(ulong16); +short16 __ovld __cnfn convert_short16_rtz(ulong16); +short16 __ovld __cnfn convert_short16_sat_rtz(ulong16); +short16 __ovld __cnfn convert_short16_rtp(ulong16); +short16 __ovld __cnfn convert_short16_sat_rtp(ulong16); +short16 __ovld __cnfn convert_short16_rtn(ulong16); +short16 __ovld __cnfn convert_short16_sat_rtn(ulong16); +short16 __ovld __cnfn convert_short16(ulong16); +short16 __ovld __cnfn convert_short16_sat(ulong16); +short16 __ovld __cnfn convert_short16_rte(float16); +short16 __ovld __cnfn convert_short16_sat_rte(float16); +short16 __ovld __cnfn convert_short16_rtz(float16); +short16 __ovld __cnfn convert_short16_sat_rtz(float16); +short16 __ovld __cnfn convert_short16_rtp(float16); +short16 __ovld __cnfn convert_short16_sat_rtp(float16); +short16 __ovld __cnfn convert_short16_rtn(float16); +short16 __ovld __cnfn convert_short16_sat_rtn(float16); +short16 __ovld __cnfn convert_short16(float16); +short16 __ovld __cnfn convert_short16_sat(float16); +ushort16 __ovld __cnfn convert_ushort16_rte(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(char16); +ushort16 __ovld __cnfn convert_ushort16_rtz(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(char16); +ushort16 __ovld __cnfn convert_ushort16_rtp(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(char16); +ushort16 __ovld __cnfn convert_ushort16_rtn(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(char16); +ushort16 __ovld __cnfn convert_ushort16(char16); +ushort16 __ovld __cnfn convert_ushort16_sat(char16); +ushort16 __ovld __cnfn convert_ushort16_rte(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rtz(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rtp(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rtn(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(uchar16); +ushort16 __ovld __cnfn convert_ushort16(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rte(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(short16); +ushort16 __ovld __cnfn convert_ushort16_rtz(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(short16); +ushort16 __ovld __cnfn convert_ushort16_rtp(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(short16); +ushort16 __ovld __cnfn convert_ushort16_rtn(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(short16); +ushort16 __ovld __cnfn convert_ushort16(short16); +ushort16 __ovld __cnfn convert_ushort16_sat(short16); +ushort16 __ovld __cnfn convert_ushort16_rte(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rtz(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rtp(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rtn(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(ushort16); +ushort16 __ovld __cnfn convert_ushort16(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rte(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(int16); +ushort16 __ovld __cnfn convert_ushort16_rtz(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(int16); +ushort16 __ovld __cnfn convert_ushort16_rtp(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(int16); +ushort16 __ovld __cnfn convert_ushort16_rtn(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(int16); +ushort16 __ovld __cnfn convert_ushort16(int16); +ushort16 __ovld __cnfn convert_ushort16_sat(int16); +ushort16 __ovld __cnfn convert_ushort16_rte(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(uint16); +ushort16 __ovld __cnfn convert_ushort16_rtz(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(uint16); +ushort16 __ovld __cnfn convert_ushort16_rtp(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(uint16); +ushort16 __ovld __cnfn convert_ushort16_rtn(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(uint16); +ushort16 __ovld __cnfn convert_ushort16(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat(uint16); +ushort16 __ovld __cnfn convert_ushort16_rte(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(long16); +ushort16 __ovld __cnfn convert_ushort16_rtz(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(long16); +ushort16 __ovld __cnfn convert_ushort16_rtp(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(long16); +ushort16 __ovld __cnfn convert_ushort16_rtn(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(long16); +ushort16 __ovld __cnfn convert_ushort16(long16); +ushort16 __ovld __cnfn convert_ushort16_sat(long16); +ushort16 __ovld __cnfn convert_ushort16_rte(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rtz(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rtp(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rtn(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(ulong16); +ushort16 __ovld __cnfn convert_ushort16(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rte(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(float16); +ushort16 __ovld __cnfn convert_ushort16_rtz(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(float16); +ushort16 __ovld __cnfn convert_ushort16_rtp(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(float16); +ushort16 __ovld __cnfn convert_ushort16_rtn(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(float16); +ushort16 __ovld __cnfn convert_ushort16(float16); +ushort16 __ovld __cnfn convert_ushort16_sat(float16); +int16 __ovld __cnfn convert_int16_rte(char16); +int16 __ovld __cnfn convert_int16_sat_rte(char16); +int16 __ovld __cnfn convert_int16_rtz(char16); +int16 __ovld __cnfn convert_int16_sat_rtz(char16); +int16 __ovld __cnfn convert_int16_rtp(char16); +int16 __ovld __cnfn convert_int16_sat_rtp(char16); +int16 __ovld __cnfn convert_int16_rtn(char16); +int16 __ovld __cnfn convert_int16_sat_rtn(char16); +int16 __ovld __cnfn convert_int16(char16); +int16 __ovld __cnfn convert_int16_sat(char16); +int16 __ovld __cnfn convert_int16_rte(uchar16); +int16 __ovld __cnfn convert_int16_sat_rte(uchar16); +int16 __ovld __cnfn convert_int16_rtz(uchar16); +int16 __ovld __cnfn convert_int16_sat_rtz(uchar16); +int16 __ovld __cnfn convert_int16_rtp(uchar16); +int16 __ovld __cnfn convert_int16_sat_rtp(uchar16); +int16 __ovld __cnfn convert_int16_rtn(uchar16); +int16 __ovld __cnfn convert_int16_sat_rtn(uchar16); +int16 __ovld __cnfn convert_int16(uchar16); +int16 __ovld __cnfn convert_int16_sat(uchar16); +int16 __ovld __cnfn convert_int16_rte(short16); +int16 __ovld __cnfn convert_int16_sat_rte(short16); +int16 __ovld __cnfn convert_int16_rtz(short16); +int16 __ovld __cnfn convert_int16_sat_rtz(short16); +int16 __ovld __cnfn convert_int16_rtp(short16); +int16 __ovld __cnfn convert_int16_sat_rtp(short16); +int16 __ovld __cnfn convert_int16_rtn(short16); +int16 __ovld __cnfn convert_int16_sat_rtn(short16); +int16 __ovld __cnfn convert_int16(short16); +int16 __ovld __cnfn convert_int16_sat(short16); +int16 __ovld __cnfn convert_int16_rte(ushort16); +int16 __ovld __cnfn convert_int16_sat_rte(ushort16); +int16 __ovld __cnfn convert_int16_rtz(ushort16); +int16 __ovld __cnfn convert_int16_sat_rtz(ushort16); +int16 __ovld __cnfn convert_int16_rtp(ushort16); +int16 __ovld __cnfn convert_int16_sat_rtp(ushort16); +int16 __ovld __cnfn convert_int16_rtn(ushort16); +int16 __ovld __cnfn convert_int16_sat_rtn(ushort16); +int16 __ovld __cnfn convert_int16(ushort16); +int16 __ovld __cnfn convert_int16_sat(ushort16); +int16 __ovld __cnfn convert_int16_rte(int16); +int16 __ovld __cnfn convert_int16_sat_rte(int16); +int16 __ovld __cnfn convert_int16_rtz(int16); +int16 __ovld __cnfn convert_int16_sat_rtz(int16); +int16 __ovld __cnfn convert_int16_rtp(int16); +int16 __ovld __cnfn convert_int16_sat_rtp(int16); +int16 __ovld __cnfn convert_int16_rtn(int16); +int16 __ovld __cnfn convert_int16_sat_rtn(int16); +int16 __ovld __cnfn convert_int16(int16); +int16 __ovld __cnfn convert_int16_sat(int16); +int16 __ovld __cnfn convert_int16_rte(uint16); +int16 __ovld __cnfn convert_int16_sat_rte(uint16); +int16 __ovld __cnfn convert_int16_rtz(uint16); +int16 __ovld __cnfn convert_int16_sat_rtz(uint16); +int16 __ovld __cnfn convert_int16_rtp(uint16); +int16 __ovld __cnfn convert_int16_sat_rtp(uint16); +int16 __ovld __cnfn convert_int16_rtn(uint16); +int16 __ovld __cnfn convert_int16_sat_rtn(uint16); +int16 __ovld __cnfn convert_int16(uint16); +int16 __ovld __cnfn convert_int16_sat(uint16); +int16 __ovld __cnfn convert_int16_rte(long16); +int16 __ovld __cnfn convert_int16_sat_rte(long16); +int16 __ovld __cnfn convert_int16_rtz(long16); +int16 __ovld __cnfn convert_int16_sat_rtz(long16); +int16 __ovld __cnfn convert_int16_rtp(long16); +int16 __ovld __cnfn convert_int16_sat_rtp(long16); +int16 __ovld __cnfn convert_int16_rtn(long16); +int16 __ovld __cnfn convert_int16_sat_rtn(long16); +int16 __ovld __cnfn convert_int16(long16); +int16 __ovld __cnfn convert_int16_sat(long16); +int16 __ovld __cnfn convert_int16_rte(ulong16); +int16 __ovld __cnfn convert_int16_sat_rte(ulong16); +int16 __ovld __cnfn convert_int16_rtz(ulong16); +int16 __ovld __cnfn convert_int16_sat_rtz(ulong16); +int16 __ovld __cnfn convert_int16_rtp(ulong16); +int16 __ovld __cnfn convert_int16_sat_rtp(ulong16); +int16 __ovld __cnfn convert_int16_rtn(ulong16); +int16 __ovld __cnfn convert_int16_sat_rtn(ulong16); +int16 __ovld __cnfn convert_int16(ulong16); +int16 __ovld __cnfn convert_int16_sat(ulong16); +int16 __ovld __cnfn convert_int16_rte(float16); +int16 __ovld __cnfn convert_int16_sat_rte(float16); +int16 __ovld __cnfn convert_int16_rtz(float16); +int16 __ovld __cnfn convert_int16_sat_rtz(float16); +int16 __ovld __cnfn convert_int16_rtp(float16); +int16 __ovld __cnfn convert_int16_sat_rtp(float16); +int16 __ovld __cnfn convert_int16_rtn(float16); +int16 __ovld __cnfn convert_int16_sat_rtn(float16); +int16 __ovld __cnfn convert_int16(float16); +int16 __ovld __cnfn convert_int16_sat(float16); +uint16 __ovld __cnfn convert_uint16_rte(char16); +uint16 __ovld __cnfn convert_uint16_sat_rte(char16); +uint16 __ovld __cnfn convert_uint16_rtz(char16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(char16); +uint16 __ovld __cnfn convert_uint16_rtp(char16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(char16); +uint16 __ovld __cnfn convert_uint16_rtn(char16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(char16); +uint16 __ovld __cnfn convert_uint16(char16); +uint16 __ovld __cnfn convert_uint16_sat(char16); +uint16 __ovld __cnfn convert_uint16_rte(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rte(uchar16); +uint16 __ovld __cnfn convert_uint16_rtz(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(uchar16); +uint16 __ovld __cnfn convert_uint16_rtp(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(uchar16); +uint16 __ovld __cnfn convert_uint16_rtn(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(uchar16); +uint16 __ovld __cnfn convert_uint16(uchar16); +uint16 __ovld __cnfn convert_uint16_sat(uchar16); +uint16 __ovld __cnfn convert_uint16_rte(short16); +uint16 __ovld __cnfn convert_uint16_sat_rte(short16); +uint16 __ovld __cnfn convert_uint16_rtz(short16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(short16); +uint16 __ovld __cnfn convert_uint16_rtp(short16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(short16); +uint16 __ovld __cnfn convert_uint16_rtn(short16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(short16); +uint16 __ovld __cnfn convert_uint16(short16); +uint16 __ovld __cnfn convert_uint16_sat(short16); +uint16 __ovld __cnfn convert_uint16_rte(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rte(ushort16); +uint16 __ovld __cnfn convert_uint16_rtz(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(ushort16); +uint16 __ovld __cnfn convert_uint16_rtp(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(ushort16); +uint16 __ovld __cnfn convert_uint16_rtn(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(ushort16); +uint16 __ovld __cnfn convert_uint16(ushort16); +uint16 __ovld __cnfn convert_uint16_sat(ushort16); +uint16 __ovld __cnfn convert_uint16_rte(int16); +uint16 __ovld __cnfn convert_uint16_sat_rte(int16); +uint16 __ovld __cnfn convert_uint16_rtz(int16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(int16); +uint16 __ovld __cnfn convert_uint16_rtp(int16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(int16); +uint16 __ovld __cnfn convert_uint16_rtn(int16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(int16); +uint16 __ovld __cnfn convert_uint16(int16); +uint16 __ovld __cnfn convert_uint16_sat(int16); +uint16 __ovld __cnfn convert_uint16_rte(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rte(uint16); +uint16 __ovld __cnfn convert_uint16_rtz(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(uint16); +uint16 __ovld __cnfn convert_uint16_rtp(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(uint16); +uint16 __ovld __cnfn convert_uint16_rtn(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(uint16); +uint16 __ovld __cnfn convert_uint16(uint16); +uint16 __ovld __cnfn convert_uint16_sat(uint16); +uint16 __ovld __cnfn convert_uint16_rte(long16); +uint16 __ovld __cnfn convert_uint16_sat_rte(long16); +uint16 __ovld __cnfn convert_uint16_rtz(long16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(long16); +uint16 __ovld __cnfn convert_uint16_rtp(long16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(long16); +uint16 __ovld __cnfn convert_uint16_rtn(long16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(long16); +uint16 __ovld __cnfn convert_uint16(long16); +uint16 __ovld __cnfn convert_uint16_sat(long16); +uint16 __ovld __cnfn convert_uint16_rte(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rte(ulong16); +uint16 __ovld __cnfn convert_uint16_rtz(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(ulong16); +uint16 __ovld __cnfn convert_uint16_rtp(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(ulong16); +uint16 __ovld __cnfn convert_uint16_rtn(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(ulong16); +uint16 __ovld __cnfn convert_uint16(ulong16); +uint16 __ovld __cnfn convert_uint16_sat(ulong16); +uint16 __ovld __cnfn convert_uint16_rte(float16); +uint16 __ovld __cnfn convert_uint16_sat_rte(float16); +uint16 __ovld __cnfn convert_uint16_rtz(float16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(float16); +uint16 __ovld __cnfn convert_uint16_rtp(float16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(float16); +uint16 __ovld __cnfn convert_uint16_rtn(float16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(float16); +uint16 __ovld __cnfn convert_uint16(float16); +uint16 __ovld __cnfn convert_uint16_sat(float16); +long16 __ovld __cnfn convert_long16_rte(char16); +long16 __ovld __cnfn convert_long16_sat_rte(char16); +long16 __ovld __cnfn convert_long16_rtz(char16); +long16 __ovld __cnfn convert_long16_sat_rtz(char16); +long16 __ovld __cnfn convert_long16_rtp(char16); +long16 __ovld __cnfn convert_long16_sat_rtp(char16); +long16 __ovld __cnfn convert_long16_rtn(char16); +long16 __ovld __cnfn convert_long16_sat_rtn(char16); +long16 __ovld __cnfn convert_long16(char16); +long16 __ovld __cnfn convert_long16_sat(char16); +long16 __ovld __cnfn convert_long16_rte(uchar16); +long16 __ovld __cnfn convert_long16_sat_rte(uchar16); +long16 __ovld __cnfn convert_long16_rtz(uchar16); +long16 __ovld __cnfn convert_long16_sat_rtz(uchar16); +long16 __ovld __cnfn convert_long16_rtp(uchar16); +long16 __ovld __cnfn convert_long16_sat_rtp(uchar16); +long16 __ovld __cnfn convert_long16_rtn(uchar16); +long16 __ovld __cnfn convert_long16_sat_rtn(uchar16); +long16 __ovld __cnfn convert_long16(uchar16); +long16 __ovld __cnfn convert_long16_sat(uchar16); +long16 __ovld __cnfn convert_long16_rte(short16); +long16 __ovld __cnfn convert_long16_sat_rte(short16); +long16 __ovld __cnfn convert_long16_rtz(short16); +long16 __ovld __cnfn convert_long16_sat_rtz(short16); +long16 __ovld __cnfn convert_long16_rtp(short16); +long16 __ovld __cnfn convert_long16_sat_rtp(short16); +long16 __ovld __cnfn convert_long16_rtn(short16); +long16 __ovld __cnfn convert_long16_sat_rtn(short16); +long16 __ovld __cnfn convert_long16(short16); +long16 __ovld __cnfn convert_long16_sat(short16); +long16 __ovld __cnfn convert_long16_rte(ushort16); +long16 __ovld __cnfn convert_long16_sat_rte(ushort16); +long16 __ovld __cnfn convert_long16_rtz(ushort16); +long16 __ovld __cnfn convert_long16_sat_rtz(ushort16); +long16 __ovld __cnfn convert_long16_rtp(ushort16); +long16 __ovld __cnfn convert_long16_sat_rtp(ushort16); +long16 __ovld __cnfn convert_long16_rtn(ushort16); +long16 __ovld __cnfn convert_long16_sat_rtn(ushort16); +long16 __ovld __cnfn convert_long16(ushort16); +long16 __ovld __cnfn convert_long16_sat(ushort16); +long16 __ovld __cnfn convert_long16_rte(int16); +long16 __ovld __cnfn convert_long16_sat_rte(int16); +long16 __ovld __cnfn convert_long16_rtz(int16); +long16 __ovld __cnfn convert_long16_sat_rtz(int16); +long16 __ovld __cnfn convert_long16_rtp(int16); +long16 __ovld __cnfn convert_long16_sat_rtp(int16); +long16 __ovld __cnfn convert_long16_rtn(int16); +long16 __ovld __cnfn convert_long16_sat_rtn(int16); +long16 __ovld __cnfn convert_long16(int16); +long16 __ovld __cnfn convert_long16_sat(int16); +long16 __ovld __cnfn convert_long16_rte(uint16); +long16 __ovld __cnfn convert_long16_sat_rte(uint16); +long16 __ovld __cnfn convert_long16_rtz(uint16); +long16 __ovld __cnfn convert_long16_sat_rtz(uint16); +long16 __ovld __cnfn convert_long16_rtp(uint16); +long16 __ovld __cnfn convert_long16_sat_rtp(uint16); +long16 __ovld __cnfn convert_long16_rtn(uint16); +long16 __ovld __cnfn convert_long16_sat_rtn(uint16); +long16 __ovld __cnfn convert_long16(uint16); +long16 __ovld __cnfn convert_long16_sat(uint16); +long16 __ovld __cnfn convert_long16_rte(long16); +long16 __ovld __cnfn convert_long16_sat_rte(long16); +long16 __ovld __cnfn convert_long16_rtz(long16); +long16 __ovld __cnfn convert_long16_sat_rtz(long16); +long16 __ovld __cnfn convert_long16_rtp(long16); +long16 __ovld __cnfn convert_long16_sat_rtp(long16); +long16 __ovld __cnfn convert_long16_rtn(long16); +long16 __ovld __cnfn convert_long16_sat_rtn(long16); +long16 __ovld __cnfn convert_long16(long16); +long16 __ovld __cnfn convert_long16_sat(long16); +long16 __ovld __cnfn convert_long16_rte(ulong16); +long16 __ovld __cnfn convert_long16_sat_rte(ulong16); +long16 __ovld __cnfn convert_long16_rtz(ulong16); +long16 __ovld __cnfn convert_long16_sat_rtz(ulong16); +long16 __ovld __cnfn convert_long16_rtp(ulong16); +long16 __ovld __cnfn convert_long16_sat_rtp(ulong16); +long16 __ovld __cnfn convert_long16_rtn(ulong16); +long16 __ovld __cnfn convert_long16_sat_rtn(ulong16); +long16 __ovld __cnfn convert_long16(ulong16); +long16 __ovld __cnfn convert_long16_sat(ulong16); +long16 __ovld __cnfn convert_long16_rte(float16); +long16 __ovld __cnfn convert_long16_sat_rte(float16); +long16 __ovld __cnfn convert_long16_rtz(float16); +long16 __ovld __cnfn convert_long16_sat_rtz(float16); +long16 __ovld __cnfn convert_long16_rtp(float16); +long16 __ovld __cnfn convert_long16_sat_rtp(float16); +long16 __ovld __cnfn convert_long16_rtn(float16); +long16 __ovld __cnfn convert_long16_sat_rtn(float16); +long16 __ovld __cnfn convert_long16(float16); +long16 __ovld __cnfn convert_long16_sat(float16); +ulong16 __ovld __cnfn convert_ulong16_rte(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(char16); +ulong16 __ovld __cnfn convert_ulong16_rtz(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(char16); +ulong16 __ovld __cnfn convert_ulong16_rtp(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(char16); +ulong16 __ovld __cnfn convert_ulong16_rtn(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(char16); +ulong16 __ovld __cnfn convert_ulong16(char16); +ulong16 __ovld __cnfn convert_ulong16_sat(char16); +ulong16 __ovld __cnfn convert_ulong16_rte(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rtz(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rtp(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rtn(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(uchar16); +ulong16 __ovld __cnfn convert_ulong16(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rte(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(short16); +ulong16 __ovld __cnfn convert_ulong16_rtz(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(short16); +ulong16 __ovld __cnfn convert_ulong16_rtp(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(short16); +ulong16 __ovld __cnfn convert_ulong16_rtn(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(short16); +ulong16 __ovld __cnfn convert_ulong16(short16); +ulong16 __ovld __cnfn convert_ulong16_sat(short16); +ulong16 __ovld __cnfn convert_ulong16_rte(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rtz(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rtp(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rtn(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(ushort16); +ulong16 __ovld __cnfn convert_ulong16(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rte(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(int16); +ulong16 __ovld __cnfn convert_ulong16_rtz(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(int16); +ulong16 __ovld __cnfn convert_ulong16_rtp(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(int16); +ulong16 __ovld __cnfn convert_ulong16_rtn(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(int16); +ulong16 __ovld __cnfn convert_ulong16(int16); +ulong16 __ovld __cnfn convert_ulong16_sat(int16); +ulong16 __ovld __cnfn convert_ulong16_rte(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(uint16); +ulong16 __ovld __cnfn convert_ulong16_rtz(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(uint16); +ulong16 __ovld __cnfn convert_ulong16_rtp(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(uint16); +ulong16 __ovld __cnfn convert_ulong16_rtn(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(uint16); +ulong16 __ovld __cnfn convert_ulong16(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat(uint16); +ulong16 __ovld __cnfn convert_ulong16_rte(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(long16); +ulong16 __ovld __cnfn convert_ulong16_rtz(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(long16); +ulong16 __ovld __cnfn convert_ulong16_rtp(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(long16); +ulong16 __ovld __cnfn convert_ulong16_rtn(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(long16); +ulong16 __ovld __cnfn convert_ulong16(long16); +ulong16 __ovld __cnfn convert_ulong16_sat(long16); +ulong16 __ovld __cnfn convert_ulong16_rte(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rtz(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rtp(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rtn(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(ulong16); +ulong16 __ovld __cnfn convert_ulong16(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rte(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(float16); +ulong16 __ovld __cnfn convert_ulong16_rtz(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(float16); +ulong16 __ovld __cnfn convert_ulong16_rtp(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(float16); +ulong16 __ovld __cnfn convert_ulong16_rtn(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(float16); +ulong16 __ovld __cnfn convert_ulong16(float16); +ulong16 __ovld __cnfn convert_ulong16_sat(float16); +float16 __ovld __cnfn convert_float16_rte(char16); +float16 __ovld __cnfn convert_float16_rtz(char16); +float16 __ovld __cnfn convert_float16_rtp(char16); +float16 __ovld __cnfn convert_float16_rtn(char16); +float16 __ovld __cnfn convert_float16(char16); +float16 __ovld __cnfn convert_float16_rte(uchar16); +float16 __ovld __cnfn convert_float16_rtz(uchar16); +float16 __ovld __cnfn convert_float16_rtp(uchar16); +float16 __ovld __cnfn convert_float16_rtn(uchar16); +float16 __ovld __cnfn convert_float16(uchar16); +float16 __ovld __cnfn convert_float16_rte(short16); +float16 __ovld __cnfn convert_float16_rtz(short16); +float16 __ovld __cnfn convert_float16_rtp(short16); +float16 __ovld __cnfn convert_float16_rtn(short16); +float16 __ovld __cnfn convert_float16(short16); +float16 __ovld __cnfn convert_float16_rte(ushort16); +float16 __ovld __cnfn convert_float16_rtz(ushort16); +float16 __ovld __cnfn convert_float16_rtp(ushort16); +float16 __ovld __cnfn convert_float16_rtn(ushort16); +float16 __ovld __cnfn convert_float16(ushort16); +float16 __ovld __cnfn convert_float16_rte(int16); +float16 __ovld __cnfn convert_float16_rtz(int16); +float16 __ovld __cnfn convert_float16_rtp(int16); +float16 __ovld __cnfn convert_float16_rtn(int16); +float16 __ovld __cnfn convert_float16(int16); +float16 __ovld __cnfn convert_float16_rte(uint16); +float16 __ovld __cnfn convert_float16_rtz(uint16); +float16 __ovld __cnfn convert_float16_rtp(uint16); +float16 __ovld __cnfn convert_float16_rtn(uint16); +float16 __ovld __cnfn convert_float16(uint16); +float16 __ovld __cnfn convert_float16_rte(long16); +float16 __ovld __cnfn convert_float16_rtz(long16); +float16 __ovld __cnfn convert_float16_rtp(long16); +float16 __ovld __cnfn convert_float16_rtn(long16); +float16 __ovld __cnfn convert_float16(long16); +float16 __ovld __cnfn convert_float16_rte(ulong16); +float16 __ovld __cnfn convert_float16_rtz(ulong16); +float16 __ovld __cnfn convert_float16_rtp(ulong16); +float16 __ovld __cnfn convert_float16_rtn(ulong16); +float16 __ovld __cnfn convert_float16(ulong16); +float16 __ovld __cnfn convert_float16_rte(float16); +float16 __ovld __cnfn convert_float16_rtz(float16); +float16 __ovld __cnfn convert_float16_rtp(float16); +float16 __ovld __cnfn convert_float16_rtn(float16); +float16 __ovld __cnfn convert_float16(float16); + +// Conversions with double data type parameters or return value. + +#ifdef cl_khr_fp64 +#pragma OPENCL EXTENSION cl_khr_fp64 : enable +char __ovld __cnfn convert_char(double); +char __ovld __cnfn convert_char_rte(double); +char __ovld __cnfn convert_char_rtn(double); +char __ovld __cnfn convert_char_rtp(double); +char __ovld __cnfn convert_char_rtz(double); +char __ovld __cnfn convert_char_sat(double); +char __ovld __cnfn convert_char_sat_rte(double); +char __ovld __cnfn convert_char_sat_rtn(double); +char __ovld __cnfn convert_char_sat_rtp(double); +char __ovld __cnfn convert_char_sat_rtz(double); +char2 __ovld __cnfn convert_char2(double2); +char2 __ovld __cnfn convert_char2_rte(double2); +char2 __ovld __cnfn convert_char2_rtn(double2); +char2 __ovld __cnfn convert_char2_rtp(double2); +char2 __ovld __cnfn convert_char2_rtz(double2); +char2 __ovld __cnfn convert_char2_sat(double2); +char2 __ovld __cnfn convert_char2_sat_rte(double2); +char2 __ovld __cnfn convert_char2_sat_rtn(double2); +char2 __ovld __cnfn convert_char2_sat_rtp(double2); +char2 __ovld __cnfn convert_char2_sat_rtz(double2); +char3 __ovld __cnfn convert_char3(double3); +char3 __ovld __cnfn convert_char3_rte(double3); +char3 __ovld __cnfn convert_char3_rtn(double3); +char3 __ovld __cnfn convert_char3_rtp(double3); +char3 __ovld __cnfn convert_char3_rtz(double3); +char3 __ovld __cnfn convert_char3_sat(double3); +char3 __ovld __cnfn convert_char3_sat_rte(double3); +char3 __ovld __cnfn convert_char3_sat_rtn(double3); +char3 __ovld __cnfn convert_char3_sat_rtp(double3); +char3 __ovld __cnfn convert_char3_sat_rtz(double3); +char4 __ovld __cnfn convert_char4(double4); +char4 __ovld __cnfn convert_char4_rte(double4); +char4 __ovld __cnfn convert_char4_rtn(double4); +char4 __ovld __cnfn convert_char4_rtp(double4); +char4 __ovld __cnfn convert_char4_rtz(double4); +char4 __ovld __cnfn convert_char4_sat(double4); +char4 __ovld __cnfn convert_char4_sat_rte(double4); +char4 __ovld __cnfn convert_char4_sat_rtn(double4); +char4 __ovld __cnfn convert_char4_sat_rtp(double4); +char4 __ovld __cnfn convert_char4_sat_rtz(double4); +char8 __ovld __cnfn convert_char8(double8); +char8 __ovld __cnfn convert_char8_rte(double8); +char8 __ovld __cnfn convert_char8_rtn(double8); +char8 __ovld __cnfn convert_char8_rtp(double8); +char8 __ovld __cnfn convert_char8_rtz(double8); +char8 __ovld __cnfn convert_char8_sat(double8); +char8 __ovld __cnfn convert_char8_sat_rte(double8); +char8 __ovld __cnfn convert_char8_sat_rtn(double8); +char8 __ovld __cnfn convert_char8_sat_rtp(double8); +char8 __ovld __cnfn convert_char8_sat_rtz(double8); +char16 __ovld __cnfn convert_char16(double16); +char16 __ovld __cnfn convert_char16_rte(double16); +char16 __ovld __cnfn convert_char16_rtn(double16); +char16 __ovld __cnfn convert_char16_rtp(double16); +char16 __ovld __cnfn convert_char16_rtz(double16); +char16 __ovld __cnfn convert_char16_sat(double16); +char16 __ovld __cnfn convert_char16_sat_rte(double16); +char16 __ovld __cnfn convert_char16_sat_rtn(double16); +char16 __ovld __cnfn convert_char16_sat_rtp(double16); +char16 __ovld __cnfn convert_char16_sat_rtz(double16); + +uchar __ovld __cnfn convert_uchar(double); +uchar __ovld __cnfn convert_uchar_rte(double); +uchar __ovld __cnfn convert_uchar_rtn(double); +uchar __ovld __cnfn convert_uchar_rtp(double); +uchar __ovld __cnfn convert_uchar_rtz(double); +uchar __ovld __cnfn convert_uchar_sat(double); +uchar __ovld __cnfn convert_uchar_sat_rte(double); +uchar __ovld __cnfn convert_uchar_sat_rtn(double); +uchar __ovld __cnfn convert_uchar_sat_rtp(double); +uchar __ovld __cnfn convert_uchar_sat_rtz(double); +uchar2 __ovld __cnfn convert_uchar2(double2); +uchar2 __ovld __cnfn convert_uchar2_rte(double2); +uchar2 __ovld __cnfn convert_uchar2_rtn(double2); +uchar2 __ovld __cnfn convert_uchar2_rtp(double2); +uchar2 __ovld __cnfn convert_uchar2_rtz(double2); +uchar2 __ovld __cnfn convert_uchar2_sat(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(double2); +uchar3 __ovld __cnfn convert_uchar3(double3); +uchar3 __ovld __cnfn convert_uchar3_rte(double3); +uchar3 __ovld __cnfn convert_uchar3_rtn(double3); +uchar3 __ovld __cnfn convert_uchar3_rtp(double3); +uchar3 __ovld __cnfn convert_uchar3_rtz(double3); +uchar3 __ovld __cnfn convert_uchar3_sat(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(double3); +uchar4 __ovld __cnfn convert_uchar4(double4); +uchar4 __ovld __cnfn convert_uchar4_rte(double4); +uchar4 __ovld __cnfn convert_uchar4_rtn(double4); +uchar4 __ovld __cnfn convert_uchar4_rtp(double4); +uchar4 __ovld __cnfn convert_uchar4_rtz(double4); +uchar4 __ovld __cnfn convert_uchar4_sat(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(double4); +uchar8 __ovld __cnfn convert_uchar8(double8); +uchar8 __ovld __cnfn convert_uchar8_rte(double8); +uchar8 __ovld __cnfn convert_uchar8_rtn(double8); +uchar8 __ovld __cnfn convert_uchar8_rtp(double8); +uchar8 __ovld __cnfn convert_uchar8_rtz(double8); +uchar8 __ovld __cnfn convert_uchar8_sat(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(double8); +uchar16 __ovld __cnfn convert_uchar16(double16); +uchar16 __ovld __cnfn convert_uchar16_rte(double16); +uchar16 __ovld __cnfn convert_uchar16_rtn(double16); +uchar16 __ovld __cnfn convert_uchar16_rtp(double16); +uchar16 __ovld __cnfn convert_uchar16_rtz(double16); +uchar16 __ovld __cnfn convert_uchar16_sat(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(double16); + +short __ovld __cnfn convert_short(double); +short __ovld __cnfn convert_short_rte(double); +short __ovld __cnfn convert_short_rtn(double); +short __ovld __cnfn convert_short_rtp(double); +short __ovld __cnfn convert_short_rtz(double); +short __ovld __cnfn convert_short_sat(double); +short __ovld __cnfn convert_short_sat_rte(double); +short __ovld __cnfn convert_short_sat_rtn(double); +short __ovld __cnfn convert_short_sat_rtp(double); +short __ovld __cnfn convert_short_sat_rtz(double); +short2 __ovld __cnfn convert_short2(double2); +short2 __ovld __cnfn convert_short2_rte(double2); +short2 __ovld __cnfn convert_short2_rtn(double2); +short2 __ovld __cnfn convert_short2_rtp(double2); +short2 __ovld __cnfn convert_short2_rtz(double2); +short2 __ovld __cnfn convert_short2_sat(double2); +short2 __ovld __cnfn convert_short2_sat_rte(double2); +short2 __ovld __cnfn convert_short2_sat_rtn(double2); +short2 __ovld __cnfn convert_short2_sat_rtp(double2); +short2 __ovld __cnfn convert_short2_sat_rtz(double2); +short3 __ovld __cnfn convert_short3(double3); +short3 __ovld __cnfn convert_short3_rte(double3); +short3 __ovld __cnfn convert_short3_rtn(double3); +short3 __ovld __cnfn convert_short3_rtp(double3); +short3 __ovld __cnfn convert_short3_rtz(double3); +short3 __ovld __cnfn convert_short3_sat(double3); +short3 __ovld __cnfn convert_short3_sat_rte(double3); +short3 __ovld __cnfn convert_short3_sat_rtn(double3); +short3 __ovld __cnfn convert_short3_sat_rtp(double3); +short3 __ovld __cnfn convert_short3_sat_rtz(double3); +short4 __ovld __cnfn convert_short4(double4); +short4 __ovld __cnfn convert_short4_rte(double4); +short4 __ovld __cnfn convert_short4_rtn(double4); +short4 __ovld __cnfn convert_short4_rtp(double4); +short4 __ovld __cnfn convert_short4_rtz(double4); +short4 __ovld __cnfn convert_short4_sat(double4); +short4 __ovld __cnfn convert_short4_sat_rte(double4); +short4 __ovld __cnfn convert_short4_sat_rtn(double4); +short4 __ovld __cnfn convert_short4_sat_rtp(double4); +short4 __ovld __cnfn convert_short4_sat_rtz(double4); +short8 __ovld __cnfn convert_short8(double8); +short8 __ovld __cnfn convert_short8_rte(double8); +short8 __ovld __cnfn convert_short8_rtn(double8); +short8 __ovld __cnfn convert_short8_rtp(double8); +short8 __ovld __cnfn convert_short8_rtz(double8); +short8 __ovld __cnfn convert_short8_sat(double8); +short8 __ovld __cnfn convert_short8_sat_rte(double8); +short8 __ovld __cnfn convert_short8_sat_rtn(double8); +short8 __ovld __cnfn convert_short8_sat_rtp(double8); +short8 __ovld __cnfn convert_short8_sat_rtz(double8); +short16 __ovld __cnfn convert_short16(double16); +short16 __ovld __cnfn convert_short16_rte(double16); +short16 __ovld __cnfn convert_short16_rtn(double16); +short16 __ovld __cnfn convert_short16_rtp(double16); +short16 __ovld __cnfn convert_short16_rtz(double16); +short16 __ovld __cnfn convert_short16_sat(double16); +short16 __ovld __cnfn convert_short16_sat_rte(double16); +short16 __ovld __cnfn convert_short16_sat_rtn(double16); +short16 __ovld __cnfn convert_short16_sat_rtp(double16); +short16 __ovld __cnfn convert_short16_sat_rtz(double16); + +ushort __ovld __cnfn convert_ushort(double); +ushort __ovld __cnfn convert_ushort_rte(double); +ushort __ovld __cnfn convert_ushort_rtn(double); +ushort __ovld __cnfn convert_ushort_rtp(double); +ushort __ovld __cnfn convert_ushort_rtz(double); +ushort __ovld __cnfn convert_ushort_sat(double); +ushort __ovld __cnfn convert_ushort_sat_rte(double); +ushort __ovld __cnfn convert_ushort_sat_rtn(double); +ushort __ovld __cnfn convert_ushort_sat_rtp(double); +ushort __ovld __cnfn convert_ushort_sat_rtz(double); +ushort2 __ovld __cnfn convert_ushort2(double2); +ushort2 __ovld __cnfn convert_ushort2_rte(double2); +ushort2 __ovld __cnfn convert_ushort2_rtn(double2); +ushort2 __ovld __cnfn convert_ushort2_rtp(double2); +ushort2 __ovld __cnfn convert_ushort2_rtz(double2); +ushort2 __ovld __cnfn convert_ushort2_sat(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(double2); +ushort3 __ovld __cnfn convert_ushort3(double3); +ushort3 __ovld __cnfn convert_ushort3_rte(double3); +ushort3 __ovld __cnfn convert_ushort3_rtn(double3); +ushort3 __ovld __cnfn convert_ushort3_rtp(double3); +ushort3 __ovld __cnfn convert_ushort3_rtz(double3); +ushort3 __ovld __cnfn convert_ushort3_sat(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(double3); +ushort4 __ovld __cnfn convert_ushort4(double4); +ushort4 __ovld __cnfn convert_ushort4_rte(double4); +ushort4 __ovld __cnfn convert_ushort4_rtn(double4); +ushort4 __ovld __cnfn convert_ushort4_rtp(double4); +ushort4 __ovld __cnfn convert_ushort4_rtz(double4); +ushort4 __ovld __cnfn convert_ushort4_sat(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(double4); +ushort8 __ovld __cnfn convert_ushort8(double8); +ushort8 __ovld __cnfn convert_ushort8_rte(double8); +ushort8 __ovld __cnfn convert_ushort8_rtn(double8); +ushort8 __ovld __cnfn convert_ushort8_rtp(double8); +ushort8 __ovld __cnfn convert_ushort8_rtz(double8); +ushort8 __ovld __cnfn convert_ushort8_sat(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(double8); +ushort16 __ovld __cnfn convert_ushort16(double16); +ushort16 __ovld __cnfn convert_ushort16_rte(double16); +ushort16 __ovld __cnfn convert_ushort16_rtn(double16); +ushort16 __ovld __cnfn convert_ushort16_rtp(double16); +ushort16 __ovld __cnfn convert_ushort16_rtz(double16); +ushort16 __ovld __cnfn convert_ushort16_sat(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(double16); + +int __ovld __cnfn convert_int(double); +int __ovld __cnfn convert_int_rte(double); +int __ovld __cnfn convert_int_rtn(double); +int __ovld __cnfn convert_int_rtp(double); +int __ovld __cnfn convert_int_rtz(double); +int __ovld __cnfn convert_int_sat(double); +int __ovld __cnfn convert_int_sat_rte(double); +int __ovld __cnfn convert_int_sat_rtn(double); +int __ovld __cnfn convert_int_sat_rtp(double); +int __ovld __cnfn convert_int_sat_rtz(double); +int2 __ovld __cnfn convert_int2(double2); +int2 __ovld __cnfn convert_int2_rte(double2); +int2 __ovld __cnfn convert_int2_rtn(double2); +int2 __ovld __cnfn convert_int2_rtp(double2); +int2 __ovld __cnfn convert_int2_rtz(double2); +int2 __ovld __cnfn convert_int2_sat(double2); +int2 __ovld __cnfn convert_int2_sat_rte(double2); +int2 __ovld __cnfn convert_int2_sat_rtn(double2); +int2 __ovld __cnfn convert_int2_sat_rtp(double2); +int2 __ovld __cnfn convert_int2_sat_rtz(double2); +int3 __ovld __cnfn convert_int3(double3); +int3 __ovld __cnfn convert_int3_rte(double3); +int3 __ovld __cnfn convert_int3_rtn(double3); +int3 __ovld __cnfn convert_int3_rtp(double3); +int3 __ovld __cnfn convert_int3_rtz(double3); +int3 __ovld __cnfn convert_int3_sat(double3); +int3 __ovld __cnfn convert_int3_sat_rte(double3); +int3 __ovld __cnfn convert_int3_sat_rtn(double3); +int3 __ovld __cnfn convert_int3_sat_rtp(double3); +int3 __ovld __cnfn convert_int3_sat_rtz(double3); +int4 __ovld __cnfn convert_int4(double4); +int4 __ovld __cnfn convert_int4_rte(double4); +int4 __ovld __cnfn convert_int4_rtn(double4); +int4 __ovld __cnfn convert_int4_rtp(double4); +int4 __ovld __cnfn convert_int4_rtz(double4); +int4 __ovld __cnfn convert_int4_sat(double4); +int4 __ovld __cnfn convert_int4_sat_rte(double4); +int4 __ovld __cnfn convert_int4_sat_rtn(double4); +int4 __ovld __cnfn convert_int4_sat_rtp(double4); +int4 __ovld __cnfn convert_int4_sat_rtz(double4); +int8 __ovld __cnfn convert_int8(double8); +int8 __ovld __cnfn convert_int8_rte(double8); +int8 __ovld __cnfn convert_int8_rtn(double8); +int8 __ovld __cnfn convert_int8_rtp(double8); +int8 __ovld __cnfn convert_int8_rtz(double8); +int8 __ovld __cnfn convert_int8_sat(double8); +int8 __ovld __cnfn convert_int8_sat_rte(double8); +int8 __ovld __cnfn convert_int8_sat_rtn(double8); +int8 __ovld __cnfn convert_int8_sat_rtp(double8); +int8 __ovld __cnfn convert_int8_sat_rtz(double8); +int16 __ovld __cnfn convert_int16(double16); +int16 __ovld __cnfn convert_int16_rte(double16); +int16 __ovld __cnfn convert_int16_rtn(double16); +int16 __ovld __cnfn convert_int16_rtp(double16); +int16 __ovld __cnfn convert_int16_rtz(double16); +int16 __ovld __cnfn convert_int16_sat(double16); +int16 __ovld __cnfn convert_int16_sat_rte(double16); +int16 __ovld __cnfn convert_int16_sat_rtn(double16); +int16 __ovld __cnfn convert_int16_sat_rtp(double16); +int16 __ovld __cnfn convert_int16_sat_rtz(double16); + +uint __ovld __cnfn convert_uint(double); +uint __ovld __cnfn convert_uint_rte(double); +uint __ovld __cnfn convert_uint_rtn(double); +uint __ovld __cnfn convert_uint_rtp(double); +uint __ovld __cnfn convert_uint_rtz(double); +uint __ovld __cnfn convert_uint_sat(double); +uint __ovld __cnfn convert_uint_sat_rte(double); +uint __ovld __cnfn convert_uint_sat_rtn(double); +uint __ovld __cnfn convert_uint_sat_rtp(double); +uint __ovld __cnfn convert_uint_sat_rtz(double); +uint2 __ovld __cnfn convert_uint2(double2); +uint2 __ovld __cnfn convert_uint2_rte(double2); +uint2 __ovld __cnfn convert_uint2_rtn(double2); +uint2 __ovld __cnfn convert_uint2_rtp(double2); +uint2 __ovld __cnfn convert_uint2_rtz(double2); +uint2 __ovld __cnfn convert_uint2_sat(double2); +uint2 __ovld __cnfn convert_uint2_sat_rte(double2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(double2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(double2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(double2); +uint3 __ovld __cnfn convert_uint3(double3); +uint3 __ovld __cnfn convert_uint3_rte(double3); +uint3 __ovld __cnfn convert_uint3_rtn(double3); +uint3 __ovld __cnfn convert_uint3_rtp(double3); +uint3 __ovld __cnfn convert_uint3_rtz(double3); +uint3 __ovld __cnfn convert_uint3_sat(double3); +uint3 __ovld __cnfn convert_uint3_sat_rte(double3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(double3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(double3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(double3); +uint4 __ovld __cnfn convert_uint4(double4); +uint4 __ovld __cnfn convert_uint4_rte(double4); +uint4 __ovld __cnfn convert_uint4_rtn(double4); +uint4 __ovld __cnfn convert_uint4_rtp(double4); +uint4 __ovld __cnfn convert_uint4_rtz(double4); +uint4 __ovld __cnfn convert_uint4_sat(double4); +uint4 __ovld __cnfn convert_uint4_sat_rte(double4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(double4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(double4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(double4); +uint8 __ovld __cnfn convert_uint8(double8); +uint8 __ovld __cnfn convert_uint8_rte(double8); +uint8 __ovld __cnfn convert_uint8_rtn(double8); +uint8 __ovld __cnfn convert_uint8_rtp(double8); +uint8 __ovld __cnfn convert_uint8_rtz(double8); +uint8 __ovld __cnfn convert_uint8_sat(double8); +uint8 __ovld __cnfn convert_uint8_sat_rte(double8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(double8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(double8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(double8); +uint16 __ovld __cnfn convert_uint16(double16); +uint16 __ovld __cnfn convert_uint16_rte(double16); +uint16 __ovld __cnfn convert_uint16_rtn(double16); +uint16 __ovld __cnfn convert_uint16_rtp(double16); +uint16 __ovld __cnfn convert_uint16_rtz(double16); +uint16 __ovld __cnfn convert_uint16_sat(double16); +uint16 __ovld __cnfn convert_uint16_sat_rte(double16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(double16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(double16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(double16); + +long __ovld __cnfn convert_long(double); +long __ovld __cnfn convert_long_rte(double); +long __ovld __cnfn convert_long_rtn(double); +long __ovld __cnfn convert_long_rtp(double); +long __ovld __cnfn convert_long_rtz(double); +long __ovld __cnfn convert_long_sat(double); +long __ovld __cnfn convert_long_sat_rte(double); +long __ovld __cnfn convert_long_sat_rtn(double); +long __ovld __cnfn convert_long_sat_rtp(double); +long __ovld __cnfn convert_long_sat_rtz(double); +long2 __ovld __cnfn convert_long2(double2); +long2 __ovld __cnfn convert_long2_rte(double2); +long2 __ovld __cnfn convert_long2_rtn(double2); +long2 __ovld __cnfn convert_long2_rtp(double2); +long2 __ovld __cnfn convert_long2_rtz(double2); +long2 __ovld __cnfn convert_long2_sat(double2); +long2 __ovld __cnfn convert_long2_sat_rte(double2); +long2 __ovld __cnfn convert_long2_sat_rtn(double2); +long2 __ovld __cnfn convert_long2_sat_rtp(double2); +long2 __ovld __cnfn convert_long2_sat_rtz(double2); +long3 __ovld __cnfn convert_long3(double3); +long3 __ovld __cnfn convert_long3_rte(double3); +long3 __ovld __cnfn convert_long3_rtn(double3); +long3 __ovld __cnfn convert_long3_rtp(double3); +long3 __ovld __cnfn convert_long3_rtz(double3); +long3 __ovld __cnfn convert_long3_sat(double3); +long3 __ovld __cnfn convert_long3_sat_rte(double3); +long3 __ovld __cnfn convert_long3_sat_rtn(double3); +long3 __ovld __cnfn convert_long3_sat_rtp(double3); +long3 __ovld __cnfn convert_long3_sat_rtz(double3); +long4 __ovld __cnfn convert_long4(double4); +long4 __ovld __cnfn convert_long4_rte(double4); +long4 __ovld __cnfn convert_long4_rtn(double4); +long4 __ovld __cnfn convert_long4_rtp(double4); +long4 __ovld __cnfn convert_long4_rtz(double4); +long4 __ovld __cnfn convert_long4_sat(double4); +long4 __ovld __cnfn convert_long4_sat_rte(double4); +long4 __ovld __cnfn convert_long4_sat_rtn(double4); +long4 __ovld __cnfn convert_long4_sat_rtp(double4); +long4 __ovld __cnfn convert_long4_sat_rtz(double4); +long8 __ovld __cnfn convert_long8(double8); +long8 __ovld __cnfn convert_long8_rte(double8); +long8 __ovld __cnfn convert_long8_rtn(double8); +long8 __ovld __cnfn convert_long8_rtp(double8); +long8 __ovld __cnfn convert_long8_rtz(double8); +long8 __ovld __cnfn convert_long8_sat(double8); +long8 __ovld __cnfn convert_long8_sat_rte(double8); +long8 __ovld __cnfn convert_long8_sat_rtn(double8); +long8 __ovld __cnfn convert_long8_sat_rtp(double8); +long8 __ovld __cnfn convert_long8_sat_rtz(double8); +long16 __ovld __cnfn convert_long16(double16); +long16 __ovld __cnfn convert_long16_rte(double16); +long16 __ovld __cnfn convert_long16_rtn(double16); +long16 __ovld __cnfn convert_long16_rtp(double16); +long16 __ovld __cnfn convert_long16_rtz(double16); +long16 __ovld __cnfn convert_long16_sat(double16); +long16 __ovld __cnfn convert_long16_sat_rte(double16); +long16 __ovld __cnfn convert_long16_sat_rtn(double16); +long16 __ovld __cnfn convert_long16_sat_rtp(double16); +long16 __ovld __cnfn convert_long16_sat_rtz(double16); + +ulong __ovld __cnfn convert_ulong(double); +ulong __ovld __cnfn convert_ulong_rte(double); +ulong __ovld __cnfn convert_ulong_rtn(double); +ulong __ovld __cnfn convert_ulong_rtp(double); +ulong __ovld __cnfn convert_ulong_rtz(double); +ulong __ovld __cnfn convert_ulong_sat(double); +ulong __ovld __cnfn convert_ulong_sat_rte(double); +ulong __ovld __cnfn convert_ulong_sat_rtn(double); +ulong __ovld __cnfn convert_ulong_sat_rtp(double); +ulong __ovld __cnfn convert_ulong_sat_rtz(double); +ulong2 __ovld __cnfn convert_ulong2(double2); +ulong2 __ovld __cnfn convert_ulong2_rte(double2); +ulong2 __ovld __cnfn convert_ulong2_rtn(double2); +ulong2 __ovld __cnfn convert_ulong2_rtp(double2); +ulong2 __ovld __cnfn convert_ulong2_rtz(double2); +ulong2 __ovld __cnfn convert_ulong2_sat(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(double2); +ulong3 __ovld __cnfn convert_ulong3(double3); +ulong3 __ovld __cnfn convert_ulong3_rte(double3); +ulong3 __ovld __cnfn convert_ulong3_rtn(double3); +ulong3 __ovld __cnfn convert_ulong3_rtp(double3); +ulong3 __ovld __cnfn convert_ulong3_rtz(double3); +ulong3 __ovld __cnfn convert_ulong3_sat(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(double3); +ulong4 __ovld __cnfn convert_ulong4(double4); +ulong4 __ovld __cnfn convert_ulong4_rte(double4); +ulong4 __ovld __cnfn convert_ulong4_rtn(double4); +ulong4 __ovld __cnfn convert_ulong4_rtp(double4); +ulong4 __ovld __cnfn convert_ulong4_rtz(double4); +ulong4 __ovld __cnfn convert_ulong4_sat(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(double4); +ulong8 __ovld __cnfn convert_ulong8(double8); +ulong8 __ovld __cnfn convert_ulong8_rte(double8); +ulong8 __ovld __cnfn convert_ulong8_rtn(double8); +ulong8 __ovld __cnfn convert_ulong8_rtp(double8); +ulong8 __ovld __cnfn convert_ulong8_rtz(double8); +ulong8 __ovld __cnfn convert_ulong8_sat(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(double8); +ulong16 __ovld __cnfn convert_ulong16(double16); +ulong16 __ovld __cnfn convert_ulong16_rte(double16); +ulong16 __ovld __cnfn convert_ulong16_rtn(double16); +ulong16 __ovld __cnfn convert_ulong16_rtp(double16); +ulong16 __ovld __cnfn convert_ulong16_rtz(double16); +ulong16 __ovld __cnfn convert_ulong16_sat(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(double16); + +float __ovld __cnfn convert_float(double); +float __ovld __cnfn convert_float_rte(double); +float __ovld __cnfn convert_float_rtn(double); +float __ovld __cnfn convert_float_rtp(double); +float __ovld __cnfn convert_float_rtz(double); +float2 __ovld __cnfn convert_float2(double2); +float2 __ovld __cnfn convert_float2_rte(double2); +float2 __ovld __cnfn convert_float2_rtn(double2); +float2 __ovld __cnfn convert_float2_rtp(double2); +float2 __ovld __cnfn convert_float2_rtz(double2); +float3 __ovld __cnfn convert_float3(double3); +float3 __ovld __cnfn convert_float3_rte(double3); +float3 __ovld __cnfn convert_float3_rtn(double3); +float3 __ovld __cnfn convert_float3_rtp(double3); +float3 __ovld __cnfn convert_float3_rtz(double3); +float4 __ovld __cnfn convert_float4(double4); +float4 __ovld __cnfn convert_float4_rte(double4); +float4 __ovld __cnfn convert_float4_rtn(double4); +float4 __ovld __cnfn convert_float4_rtp(double4); +float4 __ovld __cnfn convert_float4_rtz(double4); +float8 __ovld __cnfn convert_float8(double8); +float8 __ovld __cnfn convert_float8_rte(double8); +float8 __ovld __cnfn convert_float8_rtn(double8); +float8 __ovld __cnfn convert_float8_rtp(double8); +float8 __ovld __cnfn convert_float8_rtz(double8); +float16 __ovld __cnfn convert_float16(double16); +float16 __ovld __cnfn convert_float16_rte(double16); +float16 __ovld __cnfn convert_float16_rtn(double16); +float16 __ovld __cnfn convert_float16_rtp(double16); +float16 __ovld __cnfn convert_float16_rtz(double16); + +double __ovld __cnfn convert_double(char); +double __ovld __cnfn convert_double(double); +double __ovld __cnfn convert_double(float); +double __ovld __cnfn convert_double(int); +double __ovld __cnfn convert_double(long); +double __ovld __cnfn convert_double(short); +double __ovld __cnfn convert_double(uchar); +double __ovld __cnfn convert_double(uint); +double __ovld __cnfn convert_double(ulong); +double __ovld __cnfn convert_double(ushort); +double __ovld __cnfn convert_double_rte(char); +double __ovld __cnfn convert_double_rte(double); +double __ovld __cnfn convert_double_rte(float); +double __ovld __cnfn convert_double_rte(int); +double __ovld __cnfn convert_double_rte(long); +double __ovld __cnfn convert_double_rte(short); +double __ovld __cnfn convert_double_rte(uchar); +double __ovld __cnfn convert_double_rte(uint); +double __ovld __cnfn convert_double_rte(ulong); +double __ovld __cnfn convert_double_rte(ushort); +double __ovld __cnfn convert_double_rtn(char); +double __ovld __cnfn convert_double_rtn(double); +double __ovld __cnfn convert_double_rtn(float); +double __ovld __cnfn convert_double_rtn(int); +double __ovld __cnfn convert_double_rtn(long); +double __ovld __cnfn convert_double_rtn(short); +double __ovld __cnfn convert_double_rtn(uchar); +double __ovld __cnfn convert_double_rtn(uint); +double __ovld __cnfn convert_double_rtn(ulong); +double __ovld __cnfn convert_double_rtn(ushort); +double __ovld __cnfn convert_double_rtp(char); +double __ovld __cnfn convert_double_rtp(double); +double __ovld __cnfn convert_double_rtp(float); +double __ovld __cnfn convert_double_rtp(int); +double __ovld __cnfn convert_double_rtp(long); +double __ovld __cnfn convert_double_rtp(short); +double __ovld __cnfn convert_double_rtp(uchar); +double __ovld __cnfn convert_double_rtp(uint); +double __ovld __cnfn convert_double_rtp(ulong); +double __ovld __cnfn convert_double_rtp(ushort); +double __ovld __cnfn convert_double_rtz(char); +double __ovld __cnfn convert_double_rtz(double); +double __ovld __cnfn convert_double_rtz(float); +double __ovld __cnfn convert_double_rtz(int); +double __ovld __cnfn convert_double_rtz(long); +double __ovld __cnfn convert_double_rtz(short); +double __ovld __cnfn convert_double_rtz(uchar); +double __ovld __cnfn convert_double_rtz(uint); +double __ovld __cnfn convert_double_rtz(ulong); +double __ovld __cnfn convert_double_rtz(ushort); +double2 __ovld __cnfn convert_double2(char2); +double2 __ovld __cnfn convert_double2(double2); +double2 __ovld __cnfn convert_double2(float2); +double2 __ovld __cnfn convert_double2(int2); +double2 __ovld __cnfn convert_double2(long2); +double2 __ovld __cnfn convert_double2(short2); +double2 __ovld __cnfn convert_double2(uchar2); +double2 __ovld __cnfn convert_double2(uint2); +double2 __ovld __cnfn convert_double2(ulong2); +double2 __ovld __cnfn convert_double2(ushort2); +double2 __ovld __cnfn convert_double2_rte(char2); +double2 __ovld __cnfn convert_double2_rte(double2); +double2 __ovld __cnfn convert_double2_rte(float2); +double2 __ovld __cnfn convert_double2_rte(int2); +double2 __ovld __cnfn convert_double2_rte(long2); +double2 __ovld __cnfn convert_double2_rte(short2); +double2 __ovld __cnfn convert_double2_rte(uchar2); +double2 __ovld __cnfn convert_double2_rte(uint2); +double2 __ovld __cnfn convert_double2_rte(ulong2); +double2 __ovld __cnfn convert_double2_rte(ushort2); +double2 __ovld __cnfn convert_double2_rtn(char2); +double2 __ovld __cnfn convert_double2_rtn(double2); +double2 __ovld __cnfn convert_double2_rtn(float2); +double2 __ovld __cnfn convert_double2_rtn(int2); +double2 __ovld __cnfn convert_double2_rtn(long2); +double2 __ovld __cnfn convert_double2_rtn(short2); +double2 __ovld __cnfn convert_double2_rtn(uchar2); +double2 __ovld __cnfn convert_double2_rtn(uint2); +double2 __ovld __cnfn convert_double2_rtn(ulong2); +double2 __ovld __cnfn convert_double2_rtn(ushort2); +double2 __ovld __cnfn convert_double2_rtp(char2); +double2 __ovld __cnfn convert_double2_rtp(double2); +double2 __ovld __cnfn convert_double2_rtp(float2); +double2 __ovld __cnfn convert_double2_rtp(int2); +double2 __ovld __cnfn convert_double2_rtp(long2); +double2 __ovld __cnfn convert_double2_rtp(short2); +double2 __ovld __cnfn convert_double2_rtp(uchar2); +double2 __ovld __cnfn convert_double2_rtp(uint2); +double2 __ovld __cnfn convert_double2_rtp(ulong2); +double2 __ovld __cnfn convert_double2_rtp(ushort2); +double2 __ovld __cnfn convert_double2_rtz(char2); +double2 __ovld __cnfn convert_double2_rtz(double2); +double2 __ovld __cnfn convert_double2_rtz(float2); +double2 __ovld __cnfn convert_double2_rtz(int2); +double2 __ovld __cnfn convert_double2_rtz(long2); +double2 __ovld __cnfn convert_double2_rtz(short2); +double2 __ovld __cnfn convert_double2_rtz(uchar2); +double2 __ovld __cnfn convert_double2_rtz(uint2); +double2 __ovld __cnfn convert_double2_rtz(ulong2); +double2 __ovld __cnfn convert_double2_rtz(ushort2); +double3 __ovld __cnfn convert_double3(char3); +double3 __ovld __cnfn convert_double3(double3); +double3 __ovld __cnfn convert_double3(float3); +double3 __ovld __cnfn convert_double3(int3); +double3 __ovld __cnfn convert_double3(long3); +double3 __ovld __cnfn convert_double3(short3); +double3 __ovld __cnfn convert_double3(uchar3); +double3 __ovld __cnfn convert_double3(uint3); +double3 __ovld __cnfn convert_double3(ulong3); +double3 __ovld __cnfn convert_double3(ushort3); +double3 __ovld __cnfn convert_double3_rte(char3); +double3 __ovld __cnfn convert_double3_rte(double3); +double3 __ovld __cnfn convert_double3_rte(float3); +double3 __ovld __cnfn convert_double3_rte(int3); +double3 __ovld __cnfn convert_double3_rte(long3); +double3 __ovld __cnfn convert_double3_rte(short3); +double3 __ovld __cnfn convert_double3_rte(uchar3); +double3 __ovld __cnfn convert_double3_rte(uint3); +double3 __ovld __cnfn convert_double3_rte(ulong3); +double3 __ovld __cnfn convert_double3_rte(ushort3); +double3 __ovld __cnfn convert_double3_rtn(char3); +double3 __ovld __cnfn convert_double3_rtn(double3); +double3 __ovld __cnfn convert_double3_rtn(float3); +double3 __ovld __cnfn convert_double3_rtn(int3); +double3 __ovld __cnfn convert_double3_rtn(long3); +double3 __ovld __cnfn convert_double3_rtn(short3); +double3 __ovld __cnfn convert_double3_rtn(uchar3); +double3 __ovld __cnfn convert_double3_rtn(uint3); +double3 __ovld __cnfn convert_double3_rtn(ulong3); +double3 __ovld __cnfn convert_double3_rtn(ushort3); +double3 __ovld __cnfn convert_double3_rtp(char3); +double3 __ovld __cnfn convert_double3_rtp(double3); +double3 __ovld __cnfn convert_double3_rtp(float3); +double3 __ovld __cnfn convert_double3_rtp(int3); +double3 __ovld __cnfn convert_double3_rtp(long3); +double3 __ovld __cnfn convert_double3_rtp(short3); +double3 __ovld __cnfn convert_double3_rtp(uchar3); +double3 __ovld __cnfn convert_double3_rtp(uint3); +double3 __ovld __cnfn convert_double3_rtp(ulong3); +double3 __ovld __cnfn convert_double3_rtp(ushort3); +double3 __ovld __cnfn convert_double3_rtz(char3); +double3 __ovld __cnfn convert_double3_rtz(double3); +double3 __ovld __cnfn convert_double3_rtz(float3); +double3 __ovld __cnfn convert_double3_rtz(int3); +double3 __ovld __cnfn convert_double3_rtz(long3); +double3 __ovld __cnfn convert_double3_rtz(short3); +double3 __ovld __cnfn convert_double3_rtz(uchar3); +double3 __ovld __cnfn convert_double3_rtz(uint3); +double3 __ovld __cnfn convert_double3_rtz(ulong3); +double3 __ovld __cnfn convert_double3_rtz(ushort3); +double4 __ovld __cnfn convert_double4(char4); +double4 __ovld __cnfn convert_double4(double4); +double4 __ovld __cnfn convert_double4(float4); +double4 __ovld __cnfn convert_double4(int4); +double4 __ovld __cnfn convert_double4(long4); +double4 __ovld __cnfn convert_double4(short4); +double4 __ovld __cnfn convert_double4(uchar4); +double4 __ovld __cnfn convert_double4(uint4); +double4 __ovld __cnfn convert_double4(ulong4); +double4 __ovld __cnfn convert_double4(ushort4); +double4 __ovld __cnfn convert_double4_rte(char4); +double4 __ovld __cnfn convert_double4_rte(double4); +double4 __ovld __cnfn convert_double4_rte(float4); +double4 __ovld __cnfn convert_double4_rte(int4); +double4 __ovld __cnfn convert_double4_rte(long4); +double4 __ovld __cnfn convert_double4_rte(short4); +double4 __ovld __cnfn convert_double4_rte(uchar4); +double4 __ovld __cnfn convert_double4_rte(uint4); +double4 __ovld __cnfn convert_double4_rte(ulong4); +double4 __ovld __cnfn convert_double4_rte(ushort4); +double4 __ovld __cnfn convert_double4_rtn(char4); +double4 __ovld __cnfn convert_double4_rtn(double4); +double4 __ovld __cnfn convert_double4_rtn(float4); +double4 __ovld __cnfn convert_double4_rtn(int4); +double4 __ovld __cnfn convert_double4_rtn(long4); +double4 __ovld __cnfn convert_double4_rtn(short4); +double4 __ovld __cnfn convert_double4_rtn(uchar4); +double4 __ovld __cnfn convert_double4_rtn(uint4); +double4 __ovld __cnfn convert_double4_rtn(ulong4); +double4 __ovld __cnfn convert_double4_rtn(ushort4); +double4 __ovld __cnfn convert_double4_rtp(char4); +double4 __ovld __cnfn convert_double4_rtp(double4); +double4 __ovld __cnfn convert_double4_rtp(float4); +double4 __ovld __cnfn convert_double4_rtp(int4); +double4 __ovld __cnfn convert_double4_rtp(long4); +double4 __ovld __cnfn convert_double4_rtp(short4); +double4 __ovld __cnfn convert_double4_rtp(uchar4); +double4 __ovld __cnfn convert_double4_rtp(uint4); +double4 __ovld __cnfn convert_double4_rtp(ulong4); +double4 __ovld __cnfn convert_double4_rtp(ushort4); +double4 __ovld __cnfn convert_double4_rtz(char4); +double4 __ovld __cnfn convert_double4_rtz(double4); +double4 __ovld __cnfn convert_double4_rtz(float4); +double4 __ovld __cnfn convert_double4_rtz(int4); +double4 __ovld __cnfn convert_double4_rtz(long4); +double4 __ovld __cnfn convert_double4_rtz(short4); +double4 __ovld __cnfn convert_double4_rtz(uchar4); +double4 __ovld __cnfn convert_double4_rtz(uint4); +double4 __ovld __cnfn convert_double4_rtz(ulong4); +double4 __ovld __cnfn convert_double4_rtz(ushort4); +double8 __ovld __cnfn convert_double8(char8); +double8 __ovld __cnfn convert_double8(double8); +double8 __ovld __cnfn convert_double8(float8); +double8 __ovld __cnfn convert_double8(int8); +double8 __ovld __cnfn convert_double8(long8); +double8 __ovld __cnfn convert_double8(short8); +double8 __ovld __cnfn convert_double8(uchar8); +double8 __ovld __cnfn convert_double8(uint8); +double8 __ovld __cnfn convert_double8(ulong8); +double8 __ovld __cnfn convert_double8(ushort8); +double8 __ovld __cnfn convert_double8_rte(char8); +double8 __ovld __cnfn convert_double8_rte(double8); +double8 __ovld __cnfn convert_double8_rte(float8); +double8 __ovld __cnfn convert_double8_rte(int8); +double8 __ovld __cnfn convert_double8_rte(long8); +double8 __ovld __cnfn convert_double8_rte(short8); +double8 __ovld __cnfn convert_double8_rte(uchar8); +double8 __ovld __cnfn convert_double8_rte(uint8); +double8 __ovld __cnfn convert_double8_rte(ulong8); +double8 __ovld __cnfn convert_double8_rte(ushort8); +double8 __ovld __cnfn convert_double8_rtn(char8); +double8 __ovld __cnfn convert_double8_rtn(double8); +double8 __ovld __cnfn convert_double8_rtn(float8); +double8 __ovld __cnfn convert_double8_rtn(int8); +double8 __ovld __cnfn convert_double8_rtn(long8); +double8 __ovld __cnfn convert_double8_rtn(short8); +double8 __ovld __cnfn convert_double8_rtn(uchar8); +double8 __ovld __cnfn convert_double8_rtn(uint8); +double8 __ovld __cnfn convert_double8_rtn(ulong8); +double8 __ovld __cnfn convert_double8_rtn(ushort8); +double8 __ovld __cnfn convert_double8_rtp(char8); +double8 __ovld __cnfn convert_double8_rtp(double8); +double8 __ovld __cnfn convert_double8_rtp(float8); +double8 __ovld __cnfn convert_double8_rtp(int8); +double8 __ovld __cnfn convert_double8_rtp(long8); +double8 __ovld __cnfn convert_double8_rtp(short8); +double8 __ovld __cnfn convert_double8_rtp(uchar8); +double8 __ovld __cnfn convert_double8_rtp(uint8); +double8 __ovld __cnfn convert_double8_rtp(ulong8); +double8 __ovld __cnfn convert_double8_rtp(ushort8); +double8 __ovld __cnfn convert_double8_rtz(char8); +double8 __ovld __cnfn convert_double8_rtz(double8); +double8 __ovld __cnfn convert_double8_rtz(float8); +double8 __ovld __cnfn convert_double8_rtz(int8); +double8 __ovld __cnfn convert_double8_rtz(long8); +double8 __ovld __cnfn convert_double8_rtz(short8); +double8 __ovld __cnfn convert_double8_rtz(uchar8); +double8 __ovld __cnfn convert_double8_rtz(uint8); +double8 __ovld __cnfn convert_double8_rtz(ulong8); +double8 __ovld __cnfn convert_double8_rtz(ushort8); +double16 __ovld __cnfn convert_double16(char16); +double16 __ovld __cnfn convert_double16(double16); +double16 __ovld __cnfn convert_double16(float16); +double16 __ovld __cnfn convert_double16(int16); +double16 __ovld __cnfn convert_double16(long16); +double16 __ovld __cnfn convert_double16(short16); +double16 __ovld __cnfn convert_double16(uchar16); +double16 __ovld __cnfn convert_double16(uint16); +double16 __ovld __cnfn convert_double16(ulong16); +double16 __ovld __cnfn convert_double16(ushort16); +double16 __ovld __cnfn convert_double16_rte(char16); +double16 __ovld __cnfn convert_double16_rte(double16); +double16 __ovld __cnfn convert_double16_rte(float16); +double16 __ovld __cnfn convert_double16_rte(int16); +double16 __ovld __cnfn convert_double16_rte(long16); +double16 __ovld __cnfn convert_double16_rte(short16); +double16 __ovld __cnfn convert_double16_rte(uchar16); +double16 __ovld __cnfn convert_double16_rte(uint16); +double16 __ovld __cnfn convert_double16_rte(ulong16); +double16 __ovld __cnfn convert_double16_rte(ushort16); +double16 __ovld __cnfn convert_double16_rtn(char16); +double16 __ovld __cnfn convert_double16_rtn(double16); +double16 __ovld __cnfn convert_double16_rtn(float16); +double16 __ovld __cnfn convert_double16_rtn(int16); +double16 __ovld __cnfn convert_double16_rtn(long16); +double16 __ovld __cnfn convert_double16_rtn(short16); +double16 __ovld __cnfn convert_double16_rtn(uchar16); +double16 __ovld __cnfn convert_double16_rtn(uint16); +double16 __ovld __cnfn convert_double16_rtn(ulong16); +double16 __ovld __cnfn convert_double16_rtn(ushort16); +double16 __ovld __cnfn convert_double16_rtp(char16); +double16 __ovld __cnfn convert_double16_rtp(double16); +double16 __ovld __cnfn convert_double16_rtp(float16); +double16 __ovld __cnfn convert_double16_rtp(int16); +double16 __ovld __cnfn convert_double16_rtp(long16); +double16 __ovld __cnfn convert_double16_rtp(short16); +double16 __ovld __cnfn convert_double16_rtp(uchar16); +double16 __ovld __cnfn convert_double16_rtp(uint16); +double16 __ovld __cnfn convert_double16_rtp(ulong16); +double16 __ovld __cnfn convert_double16_rtp(ushort16); +double16 __ovld __cnfn convert_double16_rtz(char16); +double16 __ovld __cnfn convert_double16_rtz(double16); +double16 __ovld __cnfn convert_double16_rtz(float16); +double16 __ovld __cnfn convert_double16_rtz(int16); +double16 __ovld __cnfn convert_double16_rtz(long16); +double16 __ovld __cnfn convert_double16_rtz(short16); +double16 __ovld __cnfn convert_double16_rtz(uchar16); +double16 __ovld __cnfn convert_double16_rtz(uint16); +double16 __ovld __cnfn convert_double16_rtz(ulong16); +double16 __ovld __cnfn convert_double16_rtz(ushort16); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +#pragma OPENCL EXTENSION cl_khr_fp16 : enable +// Convert half types to non-double types. +uchar __ovld __cnfn convert_uchar(half); +uchar __ovld __cnfn convert_uchar_rte(half); +uchar __ovld __cnfn convert_uchar_rtp(half); +uchar __ovld __cnfn convert_uchar_rtn(half); +uchar __ovld __cnfn convert_uchar_rtz(half); +uchar __ovld __cnfn convert_uchar_sat(half); +uchar __ovld __cnfn convert_uchar_sat_rte(half); +uchar __ovld __cnfn convert_uchar_sat_rtp(half); +uchar __ovld __cnfn convert_uchar_sat_rtn(half); +uchar __ovld __cnfn convert_uchar_sat_rtz(half); +uchar2 __ovld __cnfn convert_uchar2(half2); +uchar2 __ovld __cnfn convert_uchar2_rte(half2); +uchar2 __ovld __cnfn convert_uchar2_rtp(half2); +uchar2 __ovld __cnfn convert_uchar2_rtn(half2); +uchar2 __ovld __cnfn convert_uchar2_rtz(half2); +uchar2 __ovld __cnfn convert_uchar2_sat(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(half2); +uchar3 __ovld __cnfn convert_uchar3(half3); +uchar3 __ovld __cnfn convert_uchar3_rte(half3); +uchar3 __ovld __cnfn convert_uchar3_rtp(half3); +uchar3 __ovld __cnfn convert_uchar3_rtn(half3); +uchar3 __ovld __cnfn convert_uchar3_rtz(half3); +uchar3 __ovld __cnfn convert_uchar3_sat(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(half3); +uchar4 __ovld __cnfn convert_uchar4(half4); +uchar4 __ovld __cnfn convert_uchar4_rte(half4); +uchar4 __ovld __cnfn convert_uchar4_rtp(half4); +uchar4 __ovld __cnfn convert_uchar4_rtn(half4); +uchar4 __ovld __cnfn convert_uchar4_rtz(half4); +uchar4 __ovld __cnfn convert_uchar4_sat(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(half4); +uchar8 __ovld __cnfn convert_uchar8(half8); +uchar8 __ovld __cnfn convert_uchar8_rte(half8); +uchar8 __ovld __cnfn convert_uchar8_rtp(half8); +uchar8 __ovld __cnfn convert_uchar8_rtn(half8); +uchar8 __ovld __cnfn convert_uchar8_rtz(half8); +uchar8 __ovld __cnfn convert_uchar8_sat(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(half8); +uchar16 __ovld __cnfn convert_uchar16(half16); +uchar16 __ovld __cnfn convert_uchar16_rte(half16); +uchar16 __ovld __cnfn convert_uchar16_rtp(half16); +uchar16 __ovld __cnfn convert_uchar16_rtn(half16); +uchar16 __ovld __cnfn convert_uchar16_rtz(half16); +uchar16 __ovld __cnfn convert_uchar16_sat(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(half16); +ushort __ovld __cnfn convert_ushort(half); +ushort __ovld __cnfn convert_ushort_rte(half); +ushort __ovld __cnfn convert_ushort_rtp(half); +ushort __ovld __cnfn convert_ushort_rtn(half); +ushort __ovld __cnfn convert_ushort_rtz(half); +ushort __ovld __cnfn convert_ushort_sat(half); +ushort __ovld __cnfn convert_ushort_sat_rte(half); +ushort __ovld __cnfn convert_ushort_sat_rtp(half); +ushort __ovld __cnfn convert_ushort_sat_rtn(half); +ushort __ovld __cnfn convert_ushort_sat_rtz(half); +ushort2 __ovld __cnfn convert_ushort2(half2); +ushort2 __ovld __cnfn convert_ushort2_rte(half2); +ushort2 __ovld __cnfn convert_ushort2_rtp(half2); +ushort2 __ovld __cnfn convert_ushort2_rtn(half2); +ushort2 __ovld __cnfn convert_ushort2_rtz(half2); +ushort2 __ovld __cnfn convert_ushort2_sat(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(half2); +ushort3 __ovld __cnfn convert_ushort3(half3); +ushort3 __ovld __cnfn convert_ushort3_rte(half3); +ushort3 __ovld __cnfn convert_ushort3_rtp(half3); +ushort3 __ovld __cnfn convert_ushort3_rtn(half3); +ushort3 __ovld __cnfn convert_ushort3_rtz(half3); +ushort3 __ovld __cnfn convert_ushort3_sat(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(half3); +ushort4 __ovld __cnfn convert_ushort4(half4); +ushort4 __ovld __cnfn convert_ushort4_rte(half4); +ushort4 __ovld __cnfn convert_ushort4_rtp(half4); +ushort4 __ovld __cnfn convert_ushort4_rtn(half4); +ushort4 __ovld __cnfn convert_ushort4_rtz(half4); +ushort4 __ovld __cnfn convert_ushort4_sat(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(half4); +ushort8 __ovld __cnfn convert_ushort8(half8); +ushort8 __ovld __cnfn convert_ushort8_rte(half8); +ushort8 __ovld __cnfn convert_ushort8_rtp(half8); +ushort8 __ovld __cnfn convert_ushort8_rtn(half8); +ushort8 __ovld __cnfn convert_ushort8_rtz(half8); +ushort8 __ovld __cnfn convert_ushort8_sat(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(half8); +ushort16 __ovld __cnfn convert_ushort16(half16); +ushort16 __ovld __cnfn convert_ushort16_rte(half16); +ushort16 __ovld __cnfn convert_ushort16_rtp(half16); +ushort16 __ovld __cnfn convert_ushort16_rtn(half16); +ushort16 __ovld __cnfn convert_ushort16_rtz(half16); +ushort16 __ovld __cnfn convert_ushort16_sat(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(half16); +uint __ovld __cnfn convert_uint(half); +uint __ovld __cnfn convert_uint_rte(half); +uint __ovld __cnfn convert_uint_rtp(half); +uint __ovld __cnfn convert_uint_rtn(half); +uint __ovld __cnfn convert_uint_rtz(half); +uint __ovld __cnfn convert_uint_sat(half); +uint __ovld __cnfn convert_uint_sat_rte(half); +uint __ovld __cnfn convert_uint_sat_rtp(half); +uint __ovld __cnfn convert_uint_sat_rtn(half); +uint __ovld __cnfn convert_uint_sat_rtz(half); +uint2 __ovld __cnfn convert_uint2(half2); +uint2 __ovld __cnfn convert_uint2_rte(half2); +uint2 __ovld __cnfn convert_uint2_rtp(half2); +uint2 __ovld __cnfn convert_uint2_rtn(half2); +uint2 __ovld __cnfn convert_uint2_rtz(half2); +uint2 __ovld __cnfn convert_uint2_sat(half2); +uint2 __ovld __cnfn convert_uint2_sat_rte(half2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(half2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(half2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(half2); +uint3 __ovld __cnfn convert_uint3(half3); +uint3 __ovld __cnfn convert_uint3_rte(half3); +uint3 __ovld __cnfn convert_uint3_rtp(half3); +uint3 __ovld __cnfn convert_uint3_rtn(half3); +uint3 __ovld __cnfn convert_uint3_rtz(half3); +uint3 __ovld __cnfn convert_uint3_sat(half3); +uint3 __ovld __cnfn convert_uint3_sat_rte(half3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(half3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(half3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(half3); +uint4 __ovld __cnfn convert_uint4(half4); +uint4 __ovld __cnfn convert_uint4_rte(half4); +uint4 __ovld __cnfn convert_uint4_rtp(half4); +uint4 __ovld __cnfn convert_uint4_rtn(half4); +uint4 __ovld __cnfn convert_uint4_rtz(half4); +uint4 __ovld __cnfn convert_uint4_sat(half4); +uint4 __ovld __cnfn convert_uint4_sat_rte(half4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(half4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(half4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(half4); +uint8 __ovld __cnfn convert_uint8(half8); +uint8 __ovld __cnfn convert_uint8_rte(half8); +uint8 __ovld __cnfn convert_uint8_rtp(half8); +uint8 __ovld __cnfn convert_uint8_rtn(half8); +uint8 __ovld __cnfn convert_uint8_rtz(half8); +uint8 __ovld __cnfn convert_uint8_sat(half8); +uint8 __ovld __cnfn convert_uint8_sat_rte(half8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(half8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(half8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(half8); +uint16 __ovld __cnfn convert_uint16(half16); +uint16 __ovld __cnfn convert_uint16_rte(half16); +uint16 __ovld __cnfn convert_uint16_rtp(half16); +uint16 __ovld __cnfn convert_uint16_rtn(half16); +uint16 __ovld __cnfn convert_uint16_rtz(half16); +uint16 __ovld __cnfn convert_uint16_sat(half16); +uint16 __ovld __cnfn convert_uint16_sat_rte(half16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(half16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(half16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(half16); +ulong __ovld __cnfn convert_ulong(half); +ulong __ovld __cnfn convert_ulong_rte(half); +ulong __ovld __cnfn convert_ulong_rtp(half); +ulong __ovld __cnfn convert_ulong_rtn(half); +ulong __ovld __cnfn convert_ulong_rtz(half); +ulong __ovld __cnfn convert_ulong_sat(half); +ulong __ovld __cnfn convert_ulong_sat_rte(half); +ulong __ovld __cnfn convert_ulong_sat_rtp(half); +ulong __ovld __cnfn convert_ulong_sat_rtn(half); +ulong __ovld __cnfn convert_ulong_sat_rtz(half); +ulong2 __ovld __cnfn convert_ulong2(half2); +ulong2 __ovld __cnfn convert_ulong2_rte(half2); +ulong2 __ovld __cnfn convert_ulong2_rtp(half2); +ulong2 __ovld __cnfn convert_ulong2_rtn(half2); +ulong2 __ovld __cnfn convert_ulong2_rtz(half2); +ulong2 __ovld __cnfn convert_ulong2_sat(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(half2); +ulong3 __ovld __cnfn convert_ulong3(half3); +ulong3 __ovld __cnfn convert_ulong3_rte(half3); +ulong3 __ovld __cnfn convert_ulong3_rtp(half3); +ulong3 __ovld __cnfn convert_ulong3_rtn(half3); +ulong3 __ovld __cnfn convert_ulong3_rtz(half3); +ulong3 __ovld __cnfn convert_ulong3_sat(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(half3); +ulong4 __ovld __cnfn convert_ulong4(half4); +ulong4 __ovld __cnfn convert_ulong4_rte(half4); +ulong4 __ovld __cnfn convert_ulong4_rtp(half4); +ulong4 __ovld __cnfn convert_ulong4_rtn(half4); +ulong4 __ovld __cnfn convert_ulong4_rtz(half4); +ulong4 __ovld __cnfn convert_ulong4_sat(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(half4); +ulong8 __ovld __cnfn convert_ulong8(half8); +ulong8 __ovld __cnfn convert_ulong8_rte(half8); +ulong8 __ovld __cnfn convert_ulong8_rtp(half8); +ulong8 __ovld __cnfn convert_ulong8_rtn(half8); +ulong8 __ovld __cnfn convert_ulong8_rtz(half8); +ulong8 __ovld __cnfn convert_ulong8_sat(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(half8); +ulong16 __ovld __cnfn convert_ulong16(half16); +ulong16 __ovld __cnfn convert_ulong16_rte(half16); +ulong16 __ovld __cnfn convert_ulong16_rtp(half16); +ulong16 __ovld __cnfn convert_ulong16_rtn(half16); +ulong16 __ovld __cnfn convert_ulong16_rtz(half16); +ulong16 __ovld __cnfn convert_ulong16_sat(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(half16); +char __ovld __cnfn convert_char(half); +char __ovld __cnfn convert_char_rte(half); +char __ovld __cnfn convert_char_rtp(half); +char __ovld __cnfn convert_char_rtn(half); +char __ovld __cnfn convert_char_rtz(half); +char __ovld __cnfn convert_char_sat(half); +char __ovld __cnfn convert_char_sat_rte(half); +char __ovld __cnfn convert_char_sat_rtp(half); +char __ovld __cnfn convert_char_sat_rtn(half); +char __ovld __cnfn convert_char_sat_rtz(half); +char2 __ovld __cnfn convert_char2(half2); +char2 __ovld __cnfn convert_char2_rte(half2); +char2 __ovld __cnfn convert_char2_rtp(half2); +char2 __ovld __cnfn convert_char2_rtn(half2); +char2 __ovld __cnfn convert_char2_rtz(half2); +char2 __ovld __cnfn convert_char2_sat(half2); +char2 __ovld __cnfn convert_char2_sat_rte(half2); +char2 __ovld __cnfn convert_char2_sat_rtp(half2); +char2 __ovld __cnfn convert_char2_sat_rtn(half2); +char2 __ovld __cnfn convert_char2_sat_rtz(half2); +char3 __ovld __cnfn convert_char3(half3); +char3 __ovld __cnfn convert_char3_rte(half3); +char3 __ovld __cnfn convert_char3_rtp(half3); +char3 __ovld __cnfn convert_char3_rtn(half3); +char3 __ovld __cnfn convert_char3_rtz(half3); +char3 __ovld __cnfn convert_char3_sat(half3); +char3 __ovld __cnfn convert_char3_sat_rte(half3); +char3 __ovld __cnfn convert_char3_sat_rtp(half3); +char3 __ovld __cnfn convert_char3_sat_rtn(half3); +char3 __ovld __cnfn convert_char3_sat_rtz(half3); +char4 __ovld __cnfn convert_char4(half4); +char4 __ovld __cnfn convert_char4_rte(half4); +char4 __ovld __cnfn convert_char4_rtp(half4); +char4 __ovld __cnfn convert_char4_rtn(half4); +char4 __ovld __cnfn convert_char4_rtz(half4); +char4 __ovld __cnfn convert_char4_sat(half4); +char4 __ovld __cnfn convert_char4_sat_rte(half4); +char4 __ovld __cnfn convert_char4_sat_rtp(half4); +char4 __ovld __cnfn convert_char4_sat_rtn(half4); +char4 __ovld __cnfn convert_char4_sat_rtz(half4); +char8 __ovld __cnfn convert_char8(half8); +char8 __ovld __cnfn convert_char8_rte(half8); +char8 __ovld __cnfn convert_char8_rtp(half8); +char8 __ovld __cnfn convert_char8_rtn(half8); +char8 __ovld __cnfn convert_char8_rtz(half8); +char8 __ovld __cnfn convert_char8_sat(half8); +char8 __ovld __cnfn convert_char8_sat_rte(half8); +char8 __ovld __cnfn convert_char8_sat_rtp(half8); +char8 __ovld __cnfn convert_char8_sat_rtn(half8); +char8 __ovld __cnfn convert_char8_sat_rtz(half8); +char16 __ovld __cnfn convert_char16(half16); +char16 __ovld __cnfn convert_char16_rte(half16); +char16 __ovld __cnfn convert_char16_rtp(half16); +char16 __ovld __cnfn convert_char16_rtn(half16); +char16 __ovld __cnfn convert_char16_rtz(half16); +char16 __ovld __cnfn convert_char16_sat(half16); +char16 __ovld __cnfn convert_char16_sat_rte(half16); +char16 __ovld __cnfn convert_char16_sat_rtp(half16); +char16 __ovld __cnfn convert_char16_sat_rtn(half16); +char16 __ovld __cnfn convert_char16_sat_rtz(half16); +short __ovld __cnfn convert_short(half); +short __ovld __cnfn convert_short_rte(half); +short __ovld __cnfn convert_short_rtp(half); +short __ovld __cnfn convert_short_rtn(half); +short __ovld __cnfn convert_short_rtz(half); +short __ovld __cnfn convert_short_sat(half); +short __ovld __cnfn convert_short_sat_rte(half); +short __ovld __cnfn convert_short_sat_rtp(half); +short __ovld __cnfn convert_short_sat_rtn(half); +short __ovld __cnfn convert_short_sat_rtz(half); +short2 __ovld __cnfn convert_short2(half2); +short2 __ovld __cnfn convert_short2_rte(half2); +short2 __ovld __cnfn convert_short2_rtp(half2); +short2 __ovld __cnfn convert_short2_rtn(half2); +short2 __ovld __cnfn convert_short2_rtz(half2); +short2 __ovld __cnfn convert_short2_sat(half2); +short2 __ovld __cnfn convert_short2_sat_rte(half2); +short2 __ovld __cnfn convert_short2_sat_rtp(half2); +short2 __ovld __cnfn convert_short2_sat_rtn(half2); +short2 __ovld __cnfn convert_short2_sat_rtz(half2); +short3 __ovld __cnfn convert_short3(half3); +short3 __ovld __cnfn convert_short3_rte(half3); +short3 __ovld __cnfn convert_short3_rtp(half3); +short3 __ovld __cnfn convert_short3_rtn(half3); +short3 __ovld __cnfn convert_short3_rtz(half3); +short3 __ovld __cnfn convert_short3_sat(half3); +short3 __ovld __cnfn convert_short3_sat_rte(half3); +short3 __ovld __cnfn convert_short3_sat_rtp(half3); +short3 __ovld __cnfn convert_short3_sat_rtn(half3); +short3 __ovld __cnfn convert_short3_sat_rtz(half3); +short4 __ovld __cnfn convert_short4(half4); +short4 __ovld __cnfn convert_short4_rte(half4); +short4 __ovld __cnfn convert_short4_rtp(half4); +short4 __ovld __cnfn convert_short4_rtn(half4); +short4 __ovld __cnfn convert_short4_rtz(half4); +short4 __ovld __cnfn convert_short4_sat(half4); +short4 __ovld __cnfn convert_short4_sat_rte(half4); +short4 __ovld __cnfn convert_short4_sat_rtp(half4); +short4 __ovld __cnfn convert_short4_sat_rtn(half4); +short4 __ovld __cnfn convert_short4_sat_rtz(half4); +short8 __ovld __cnfn convert_short8(half8); +short8 __ovld __cnfn convert_short8_rte(half8); +short8 __ovld __cnfn convert_short8_rtp(half8); +short8 __ovld __cnfn convert_short8_rtn(half8); +short8 __ovld __cnfn convert_short8_rtz(half8); +short8 __ovld __cnfn convert_short8_sat(half8); +short8 __ovld __cnfn convert_short8_sat_rte(half8); +short8 __ovld __cnfn convert_short8_sat_rtp(half8); +short8 __ovld __cnfn convert_short8_sat_rtn(half8); +short8 __ovld __cnfn convert_short8_sat_rtz(half8); +short16 __ovld __cnfn convert_short16(half16); +short16 __ovld __cnfn convert_short16_rte(half16); +short16 __ovld __cnfn convert_short16_rtp(half16); +short16 __ovld __cnfn convert_short16_rtn(half16); +short16 __ovld __cnfn convert_short16_rtz(half16); +short16 __ovld __cnfn convert_short16_sat(half16); +short16 __ovld __cnfn convert_short16_sat_rte(half16); +short16 __ovld __cnfn convert_short16_sat_rtp(half16); +short16 __ovld __cnfn convert_short16_sat_rtn(half16); +short16 __ovld __cnfn convert_short16_sat_rtz(half16); +int __ovld __cnfn convert_int(half); +int __ovld __cnfn convert_int_rte(half); +int __ovld __cnfn convert_int_rtp(half); +int __ovld __cnfn convert_int_rtn(half); +int __ovld __cnfn convert_int_rtz(half); +int __ovld __cnfn convert_int_sat(half); +int __ovld __cnfn convert_int_sat_rte(half); +int __ovld __cnfn convert_int_sat_rtp(half); +int __ovld __cnfn convert_int_sat_rtn(half); +int __ovld __cnfn convert_int_sat_rtz(half); +int2 __ovld __cnfn convert_int2(half2); +int2 __ovld __cnfn convert_int2_rte(half2); +int2 __ovld __cnfn convert_int2_rtp(half2); +int2 __ovld __cnfn convert_int2_rtn(half2); +int2 __ovld __cnfn convert_int2_rtz(half2); +int2 __ovld __cnfn convert_int2_sat(half2); +int2 __ovld __cnfn convert_int2_sat_rte(half2); +int2 __ovld __cnfn convert_int2_sat_rtp(half2); +int2 __ovld __cnfn convert_int2_sat_rtn(half2); +int2 __ovld __cnfn convert_int2_sat_rtz(half2); +int3 __ovld __cnfn convert_int3(half3); +int3 __ovld __cnfn convert_int3_rte(half3); +int3 __ovld __cnfn convert_int3_rtp(half3); +int3 __ovld __cnfn convert_int3_rtn(half3); +int3 __ovld __cnfn convert_int3_rtz(half3); +int3 __ovld __cnfn convert_int3_sat(half3); +int3 __ovld __cnfn convert_int3_sat_rte(half3); +int3 __ovld __cnfn convert_int3_sat_rtp(half3); +int3 __ovld __cnfn convert_int3_sat_rtn(half3); +int3 __ovld __cnfn convert_int3_sat_rtz(half3); +int4 __ovld __cnfn convert_int4(half4); +int4 __ovld __cnfn convert_int4_rte(half4); +int4 __ovld __cnfn convert_int4_rtp(half4); +int4 __ovld __cnfn convert_int4_rtn(half4); +int4 __ovld __cnfn convert_int4_rtz(half4); +int4 __ovld __cnfn convert_int4_sat(half4); +int4 __ovld __cnfn convert_int4_sat_rte(half4); +int4 __ovld __cnfn convert_int4_sat_rtp(half4); +int4 __ovld __cnfn convert_int4_sat_rtn(half4); +int4 __ovld __cnfn convert_int4_sat_rtz(half4); +int8 __ovld __cnfn convert_int8(half8); +int8 __ovld __cnfn convert_int8_rte(half8); +int8 __ovld __cnfn convert_int8_rtp(half8); +int8 __ovld __cnfn convert_int8_rtn(half8); +int8 __ovld __cnfn convert_int8_rtz(half8); +int8 __ovld __cnfn convert_int8_sat(half8); +int8 __ovld __cnfn convert_int8_sat_rte(half8); +int8 __ovld __cnfn convert_int8_sat_rtp(half8); +int8 __ovld __cnfn convert_int8_sat_rtn(half8); +int8 __ovld __cnfn convert_int8_sat_rtz(half8); +int16 __ovld __cnfn convert_int16(half16); +int16 __ovld __cnfn convert_int16_rte(half16); +int16 __ovld __cnfn convert_int16_rtp(half16); +int16 __ovld __cnfn convert_int16_rtn(half16); +int16 __ovld __cnfn convert_int16_rtz(half16); +int16 __ovld __cnfn convert_int16_sat(half16); +int16 __ovld __cnfn convert_int16_sat_rte(half16); +int16 __ovld __cnfn convert_int16_sat_rtp(half16); +int16 __ovld __cnfn convert_int16_sat_rtn(half16); +int16 __ovld __cnfn convert_int16_sat_rtz(half16); +long __ovld __cnfn convert_long(half); +long __ovld __cnfn convert_long_rte(half); +long __ovld __cnfn convert_long_rtp(half); +long __ovld __cnfn convert_long_rtn(half); +long __ovld __cnfn convert_long_rtz(half); +long __ovld __cnfn convert_long_sat(half); +long __ovld __cnfn convert_long_sat_rte(half); +long __ovld __cnfn convert_long_sat_rtp(half); +long __ovld __cnfn convert_long_sat_rtn(half); +long __ovld __cnfn convert_long_sat_rtz(half); +long2 __ovld __cnfn convert_long2(half2); +long2 __ovld __cnfn convert_long2_rte(half2); +long2 __ovld __cnfn convert_long2_rtp(half2); +long2 __ovld __cnfn convert_long2_rtn(half2); +long2 __ovld __cnfn convert_long2_rtz(half2); +long2 __ovld __cnfn convert_long2_sat(half2); +long2 __ovld __cnfn convert_long2_sat_rte(half2); +long2 __ovld __cnfn convert_long2_sat_rtp(half2); +long2 __ovld __cnfn convert_long2_sat_rtn(half2); +long2 __ovld __cnfn convert_long2_sat_rtz(half2); +long3 __ovld __cnfn convert_long3(half3); +long3 __ovld __cnfn convert_long3_rte(half3); +long3 __ovld __cnfn convert_long3_rtp(half3); +long3 __ovld __cnfn convert_long3_rtn(half3); +long3 __ovld __cnfn convert_long3_rtz(half3); +long3 __ovld __cnfn convert_long3_sat(half3); +long3 __ovld __cnfn convert_long3_sat_rte(half3); +long3 __ovld __cnfn convert_long3_sat_rtp(half3); +long3 __ovld __cnfn convert_long3_sat_rtn(half3); +long3 __ovld __cnfn convert_long3_sat_rtz(half3); +long4 __ovld __cnfn convert_long4(half4); +long4 __ovld __cnfn convert_long4_rte(half4); +long4 __ovld __cnfn convert_long4_rtp(half4); +long4 __ovld __cnfn convert_long4_rtn(half4); +long4 __ovld __cnfn convert_long4_rtz(half4); +long4 __ovld __cnfn convert_long4_sat(half4); +long4 __ovld __cnfn convert_long4_sat_rte(half4); +long4 __ovld __cnfn convert_long4_sat_rtp(half4); +long4 __ovld __cnfn convert_long4_sat_rtn(half4); +long4 __ovld __cnfn convert_long4_sat_rtz(half4); +long8 __ovld __cnfn convert_long8(half8); +long8 __ovld __cnfn convert_long8_rte(half8); +long8 __ovld __cnfn convert_long8_rtp(half8); +long8 __ovld __cnfn convert_long8_rtn(half8); +long8 __ovld __cnfn convert_long8_rtz(half8); +long8 __ovld __cnfn convert_long8_sat(half8); +long8 __ovld __cnfn convert_long8_sat_rte(half8); +long8 __ovld __cnfn convert_long8_sat_rtp(half8); +long8 __ovld __cnfn convert_long8_sat_rtn(half8); +long8 __ovld __cnfn convert_long8_sat_rtz(half8); +long16 __ovld __cnfn convert_long16(half16); +long16 __ovld __cnfn convert_long16_rte(half16); +long16 __ovld __cnfn convert_long16_rtp(half16); +long16 __ovld __cnfn convert_long16_rtn(half16); +long16 __ovld __cnfn convert_long16_rtz(half16); +long16 __ovld __cnfn convert_long16_sat(half16); +long16 __ovld __cnfn convert_long16_sat_rte(half16); +long16 __ovld __cnfn convert_long16_sat_rtp(half16); +long16 __ovld __cnfn convert_long16_sat_rtn(half16); +long16 __ovld __cnfn convert_long16_sat_rtz(half16); +float __ovld __cnfn convert_float(half); +float __ovld __cnfn convert_float_rte(half); +float __ovld __cnfn convert_float_rtp(half); +float __ovld __cnfn convert_float_rtn(half); +float __ovld __cnfn convert_float_rtz(half); +float2 __ovld __cnfn convert_float2(half2); +float2 __ovld __cnfn convert_float2_rte(half2); +float2 __ovld __cnfn convert_float2_rtp(half2); +float2 __ovld __cnfn convert_float2_rtn(half2); +float2 __ovld __cnfn convert_float2_rtz(half2); +float3 __ovld __cnfn convert_float3(half3); +float3 __ovld __cnfn convert_float3_rte(half3); +float3 __ovld __cnfn convert_float3_rtp(half3); +float3 __ovld __cnfn convert_float3_rtn(half3); +float3 __ovld __cnfn convert_float3_rtz(half3); +float4 __ovld __cnfn convert_float4(half4); +float4 __ovld __cnfn convert_float4_rte(half4); +float4 __ovld __cnfn convert_float4_rtp(half4); +float4 __ovld __cnfn convert_float4_rtn(half4); +float4 __ovld __cnfn convert_float4_rtz(half4); +float8 __ovld __cnfn convert_float8(half8); +float8 __ovld __cnfn convert_float8_rte(half8); +float8 __ovld __cnfn convert_float8_rtp(half8); +float8 __ovld __cnfn convert_float8_rtn(half8); +float8 __ovld __cnfn convert_float8_rtz(half8); +float16 __ovld __cnfn convert_float16(half16); +float16 __ovld __cnfn convert_float16_rte(half16); +float16 __ovld __cnfn convert_float16_rtp(half16); +float16 __ovld __cnfn convert_float16_rtn(half16); +float16 __ovld __cnfn convert_float16_rtz(half16); + +// Convert non-double types to half types. +half __ovld __cnfn convert_half(uchar); +half __ovld __cnfn convert_half(ushort); +half __ovld __cnfn convert_half(uint); +half __ovld __cnfn convert_half(ulong); +half __ovld __cnfn convert_half(char); +half __ovld __cnfn convert_half(short); +half __ovld __cnfn convert_half(int); +half __ovld __cnfn convert_half(long); +half __ovld __cnfn convert_half(float); +half __ovld __cnfn convert_half(half); +half __ovld __cnfn convert_half_rte(uchar); +half __ovld __cnfn convert_half_rte(ushort); +half __ovld __cnfn convert_half_rte(uint); +half __ovld __cnfn convert_half_rte(ulong); +half __ovld __cnfn convert_half_rte(char); +half __ovld __cnfn convert_half_rte(short); +half __ovld __cnfn convert_half_rte(int); +half __ovld __cnfn convert_half_rte(long); +half __ovld __cnfn convert_half_rte(float); +half __ovld __cnfn convert_half_rte(half); +half __ovld __cnfn convert_half_rtp(uchar); +half __ovld __cnfn convert_half_rtp(ushort); +half __ovld __cnfn convert_half_rtp(uint); +half __ovld __cnfn convert_half_rtp(ulong); +half __ovld __cnfn convert_half_rtp(char); +half __ovld __cnfn convert_half_rtp(short); +half __ovld __cnfn convert_half_rtp(int); +half __ovld __cnfn convert_half_rtp(long); +half __ovld __cnfn convert_half_rtp(float); +half __ovld __cnfn convert_half_rtp(half); +half __ovld __cnfn convert_half_rtn(uchar); +half __ovld __cnfn convert_half_rtn(ushort); +half __ovld __cnfn convert_half_rtn(uint); +half __ovld __cnfn convert_half_rtn(ulong); +half __ovld __cnfn convert_half_rtn(char); +half __ovld __cnfn convert_half_rtn(short); +half __ovld __cnfn convert_half_rtn(int); +half __ovld __cnfn convert_half_rtn(long); +half __ovld __cnfn convert_half_rtn(float); +half __ovld __cnfn convert_half_rtn(half); +half __ovld __cnfn convert_half_rtz(uchar); +half __ovld __cnfn convert_half_rtz(ushort); +half __ovld __cnfn convert_half_rtz(uint); +half __ovld __cnfn convert_half_rtz(ulong); +half __ovld __cnfn convert_half_rtz(char); +half __ovld __cnfn convert_half_rtz(short); +half __ovld __cnfn convert_half_rtz(int); +half __ovld __cnfn convert_half_rtz(long); +half __ovld __cnfn convert_half_rtz(float); +half __ovld __cnfn convert_half_rtz(half); +half2 __ovld __cnfn convert_half2(char2); +half2 __ovld __cnfn convert_half2(uchar2); +half2 __ovld __cnfn convert_half2(short2); +half2 __ovld __cnfn convert_half2(ushort2); +half2 __ovld __cnfn convert_half2(int2); +half2 __ovld __cnfn convert_half2(uint2); +half2 __ovld __cnfn convert_half2(long2); +half2 __ovld __cnfn convert_half2(ulong2); +half2 __ovld __cnfn convert_half2(float2); +half2 __ovld __cnfn convert_half2(half2); +half2 __ovld __cnfn convert_half2_rte(char2); +half2 __ovld __cnfn convert_half2_rte(uchar2); +half2 __ovld __cnfn convert_half2_rte(short2); +half2 __ovld __cnfn convert_half2_rte(ushort2); +half2 __ovld __cnfn convert_half2_rte(int2); +half2 __ovld __cnfn convert_half2_rte(uint2); +half2 __ovld __cnfn convert_half2_rte(long2); +half2 __ovld __cnfn convert_half2_rte(ulong2); +half2 __ovld __cnfn convert_half2_rte(float2); +half2 __ovld __cnfn convert_half2_rte(half2); +half2 __ovld __cnfn convert_half2_rtp(char2); +half2 __ovld __cnfn convert_half2_rtp(uchar2); +half2 __ovld __cnfn convert_half2_rtp(short2); +half2 __ovld __cnfn convert_half2_rtp(ushort2); +half2 __ovld __cnfn convert_half2_rtp(int2); +half2 __ovld __cnfn convert_half2_rtp(uint2); +half2 __ovld __cnfn convert_half2_rtp(long2); +half2 __ovld __cnfn convert_half2_rtp(ulong2); +half2 __ovld __cnfn convert_half2_rtp(float2); +half2 __ovld __cnfn convert_half2_rtp(half2); +half2 __ovld __cnfn convert_half2_rtn(char2); +half2 __ovld __cnfn convert_half2_rtn(uchar2); +half2 __ovld __cnfn convert_half2_rtn(short2); +half2 __ovld __cnfn convert_half2_rtn(ushort2); +half2 __ovld __cnfn convert_half2_rtn(int2); +half2 __ovld __cnfn convert_half2_rtn(uint2); +half2 __ovld __cnfn convert_half2_rtn(long2); +half2 __ovld __cnfn convert_half2_rtn(ulong2); +half2 __ovld __cnfn convert_half2_rtn(float2); +half2 __ovld __cnfn convert_half2_rtn(half2); +half2 __ovld __cnfn convert_half2_rtz(char2); +half2 __ovld __cnfn convert_half2_rtz(uchar2); +half2 __ovld __cnfn convert_half2_rtz(short2); +half2 __ovld __cnfn convert_half2_rtz(ushort2); +half2 __ovld __cnfn convert_half2_rtz(int2); +half2 __ovld __cnfn convert_half2_rtz(uint2); +half2 __ovld __cnfn convert_half2_rtz(long2); +half2 __ovld __cnfn convert_half2_rtz(ulong2); +half2 __ovld __cnfn convert_half2_rtz(float2); +half2 __ovld __cnfn convert_half2_rtz(half2); +half3 __ovld __cnfn convert_half3(char3); +half3 __ovld __cnfn convert_half3(uchar3); +half3 __ovld __cnfn convert_half3(short3); +half3 __ovld __cnfn convert_half3(ushort3); +half3 __ovld __cnfn convert_half3(int3); +half3 __ovld __cnfn convert_half3(uint3); +half3 __ovld __cnfn convert_half3(long3); +half3 __ovld __cnfn convert_half3(ulong3); +half3 __ovld __cnfn convert_half3(float3); +half3 __ovld __cnfn convert_half3(half3); +half3 __ovld __cnfn convert_half3_rte(char3); +half3 __ovld __cnfn convert_half3_rte(uchar3); +half3 __ovld __cnfn convert_half3_rte(short3); +half3 __ovld __cnfn convert_half3_rte(ushort3); +half3 __ovld __cnfn convert_half3_rte(int3); +half3 __ovld __cnfn convert_half3_rte(uint3); +half3 __ovld __cnfn convert_half3_rte(long3); +half3 __ovld __cnfn convert_half3_rte(ulong3); +half3 __ovld __cnfn convert_half3_rte(float3); +half3 __ovld __cnfn convert_half3_rte(half3); +half3 __ovld __cnfn convert_half3_rtp(char3); +half3 __ovld __cnfn convert_half3_rtp(uchar3); +half3 __ovld __cnfn convert_half3_rtp(short3); +half3 __ovld __cnfn convert_half3_rtp(ushort3); +half3 __ovld __cnfn convert_half3_rtp(int3); +half3 __ovld __cnfn convert_half3_rtp(uint3); +half3 __ovld __cnfn convert_half3_rtp(long3); +half3 __ovld __cnfn convert_half3_rtp(ulong3); +half3 __ovld __cnfn convert_half3_rtp(float3); +half3 __ovld __cnfn convert_half3_rtp(half3); +half3 __ovld __cnfn convert_half3_rtn(char3); +half3 __ovld __cnfn convert_half3_rtn(uchar3); +half3 __ovld __cnfn convert_half3_rtn(short3); +half3 __ovld __cnfn convert_half3_rtn(ushort3); +half3 __ovld __cnfn convert_half3_rtn(int3); +half3 __ovld __cnfn convert_half3_rtn(uint3); +half3 __ovld __cnfn convert_half3_rtn(long3); +half3 __ovld __cnfn convert_half3_rtn(ulong3); +half3 __ovld __cnfn convert_half3_rtn(float3); +half3 __ovld __cnfn convert_half3_rtn(half3); +half3 __ovld __cnfn convert_half3_rtz(char3); +half3 __ovld __cnfn convert_half3_rtz(uchar3); +half3 __ovld __cnfn convert_half3_rtz(short3); +half3 __ovld __cnfn convert_half3_rtz(ushort3); +half3 __ovld __cnfn convert_half3_rtz(int3); +half3 __ovld __cnfn convert_half3_rtz(uint3); +half3 __ovld __cnfn convert_half3_rtz(long3); +half3 __ovld __cnfn convert_half3_rtz(ulong3); +half3 __ovld __cnfn convert_half3_rtz(float3); +half3 __ovld __cnfn convert_half3_rtz(half3); +half4 __ovld __cnfn convert_half4(char4); +half4 __ovld __cnfn convert_half4(uchar4); +half4 __ovld __cnfn convert_half4(short4); +half4 __ovld __cnfn convert_half4(ushort4); +half4 __ovld __cnfn convert_half4(int4); +half4 __ovld __cnfn convert_half4(uint4); +half4 __ovld __cnfn convert_half4(long4); +half4 __ovld __cnfn convert_half4(ulong4); +half4 __ovld __cnfn convert_half4(float4); +half4 __ovld __cnfn convert_half4(half4); +half4 __ovld __cnfn convert_half4_rte(char4); +half4 __ovld __cnfn convert_half4_rte(uchar4); +half4 __ovld __cnfn convert_half4_rte(short4); +half4 __ovld __cnfn convert_half4_rte(ushort4); +half4 __ovld __cnfn convert_half4_rte(int4); +half4 __ovld __cnfn convert_half4_rte(uint4); +half4 __ovld __cnfn convert_half4_rte(long4); +half4 __ovld __cnfn convert_half4_rte(ulong4); +half4 __ovld __cnfn convert_half4_rte(float4); +half4 __ovld __cnfn convert_half4_rte(half4); +half4 __ovld __cnfn convert_half4_rtp(char4); +half4 __ovld __cnfn convert_half4_rtp(uchar4); +half4 __ovld __cnfn convert_half4_rtp(short4); +half4 __ovld __cnfn convert_half4_rtp(ushort4); +half4 __ovld __cnfn convert_half4_rtp(int4); +half4 __ovld __cnfn convert_half4_rtp(uint4); +half4 __ovld __cnfn convert_half4_rtp(long4); +half4 __ovld __cnfn convert_half4_rtp(ulong4); +half4 __ovld __cnfn convert_half4_rtp(float4); +half4 __ovld __cnfn convert_half4_rtp(half4); +half4 __ovld __cnfn convert_half4_rtn(char4); +half4 __ovld __cnfn convert_half4_rtn(uchar4); +half4 __ovld __cnfn convert_half4_rtn(short4); +half4 __ovld __cnfn convert_half4_rtn(ushort4); +half4 __ovld __cnfn convert_half4_rtn(int4); +half4 __ovld __cnfn convert_half4_rtn(uint4); +half4 __ovld __cnfn convert_half4_rtn(long4); +half4 __ovld __cnfn convert_half4_rtn(ulong4); +half4 __ovld __cnfn convert_half4_rtn(float4); +half4 __ovld __cnfn convert_half4_rtn(half4); +half4 __ovld __cnfn convert_half4_rtz(char4); +half4 __ovld __cnfn convert_half4_rtz(uchar4); +half4 __ovld __cnfn convert_half4_rtz(short4); +half4 __ovld __cnfn convert_half4_rtz(ushort4); +half4 __ovld __cnfn convert_half4_rtz(int4); +half4 __ovld __cnfn convert_half4_rtz(uint4); +half4 __ovld __cnfn convert_half4_rtz(long4); +half4 __ovld __cnfn convert_half4_rtz(ulong4); +half4 __ovld __cnfn convert_half4_rtz(float4); +half4 __ovld __cnfn convert_half4_rtz(half4); +half8 __ovld __cnfn convert_half8(char8); +half8 __ovld __cnfn convert_half8(uchar8); +half8 __ovld __cnfn convert_half8(short8); +half8 __ovld __cnfn convert_half8(ushort8); +half8 __ovld __cnfn convert_half8(int8); +half8 __ovld __cnfn convert_half8(uint8); +half8 __ovld __cnfn convert_half8(long8); +half8 __ovld __cnfn convert_half8(ulong8); +half8 __ovld __cnfn convert_half8(float8); +half8 __ovld __cnfn convert_half8(half8); +half8 __ovld __cnfn convert_half8_rte(char8); +half8 __ovld __cnfn convert_half8_rte(uchar8); +half8 __ovld __cnfn convert_half8_rte(short8); +half8 __ovld __cnfn convert_half8_rte(ushort8); +half8 __ovld __cnfn convert_half8_rte(int8); +half8 __ovld __cnfn convert_half8_rte(uint8); +half8 __ovld __cnfn convert_half8_rte(long8); +half8 __ovld __cnfn convert_half8_rte(ulong8); +half8 __ovld __cnfn convert_half8_rte(float8); +half8 __ovld __cnfn convert_half8_rte(half8); +half8 __ovld __cnfn convert_half8_rtp(char8); +half8 __ovld __cnfn convert_half8_rtp(uchar8); +half8 __ovld __cnfn convert_half8_rtp(short8); +half8 __ovld __cnfn convert_half8_rtp(ushort8); +half8 __ovld __cnfn convert_half8_rtp(int8); +half8 __ovld __cnfn convert_half8_rtp(uint8); +half8 __ovld __cnfn convert_half8_rtp(long8); +half8 __ovld __cnfn convert_half8_rtp(ulong8); +half8 __ovld __cnfn convert_half8_rtp(float8); +half8 __ovld __cnfn convert_half8_rtp(half8); +half8 __ovld __cnfn convert_half8_rtn(char8); +half8 __ovld __cnfn convert_half8_rtn(uchar8); +half8 __ovld __cnfn convert_half8_rtn(short8); +half8 __ovld __cnfn convert_half8_rtn(ushort8); +half8 __ovld __cnfn convert_half8_rtn(int8); +half8 __ovld __cnfn convert_half8_rtn(uint8); +half8 __ovld __cnfn convert_half8_rtn(long8); +half8 __ovld __cnfn convert_half8_rtn(ulong8); +half8 __ovld __cnfn convert_half8_rtn(float8); +half8 __ovld __cnfn convert_half8_rtn(half8); +half8 __ovld __cnfn convert_half8_rtz(char8); +half8 __ovld __cnfn convert_half8_rtz(uchar8); +half8 __ovld __cnfn convert_half8_rtz(short8); +half8 __ovld __cnfn convert_half8_rtz(ushort8); +half8 __ovld __cnfn convert_half8_rtz(int8); +half8 __ovld __cnfn convert_half8_rtz(uint8); +half8 __ovld __cnfn convert_half8_rtz(long8); +half8 __ovld __cnfn convert_half8_rtz(ulong8); +half8 __ovld __cnfn convert_half8_rtz(float8); +half8 __ovld __cnfn convert_half8_rtz(half8); +half16 __ovld __cnfn convert_half16(char16); +half16 __ovld __cnfn convert_half16(uchar16); +half16 __ovld __cnfn convert_half16(short16); +half16 __ovld __cnfn convert_half16(ushort16); +half16 __ovld __cnfn convert_half16(int16); +half16 __ovld __cnfn convert_half16(uint16); +half16 __ovld __cnfn convert_half16(long16); +half16 __ovld __cnfn convert_half16(ulong16); +half16 __ovld __cnfn convert_half16(float16); +half16 __ovld __cnfn convert_half16(half16); +half16 __ovld __cnfn convert_half16_rte(char16); +half16 __ovld __cnfn convert_half16_rte(uchar16); +half16 __ovld __cnfn convert_half16_rte(short16); +half16 __ovld __cnfn convert_half16_rte(ushort16); +half16 __ovld __cnfn convert_half16_rte(int16); +half16 __ovld __cnfn convert_half16_rte(uint16); +half16 __ovld __cnfn convert_half16_rte(long16); +half16 __ovld __cnfn convert_half16_rte(ulong16); +half16 __ovld __cnfn convert_half16_rte(float16); +half16 __ovld __cnfn convert_half16_rte(half16); +half16 __ovld __cnfn convert_half16_rtp(char16); +half16 __ovld __cnfn convert_half16_rtp(uchar16); +half16 __ovld __cnfn convert_half16_rtp(short16); +half16 __ovld __cnfn convert_half16_rtp(ushort16); +half16 __ovld __cnfn convert_half16_rtp(int16); +half16 __ovld __cnfn convert_half16_rtp(uint16); +half16 __ovld __cnfn convert_half16_rtp(long16); +half16 __ovld __cnfn convert_half16_rtp(ulong16); +half16 __ovld __cnfn convert_half16_rtp(float16); +half16 __ovld __cnfn convert_half16_rtp(half16); +half16 __ovld __cnfn convert_half16_rtn(char16); +half16 __ovld __cnfn convert_half16_rtn(uchar16); +half16 __ovld __cnfn convert_half16_rtn(short16); +half16 __ovld __cnfn convert_half16_rtn(ushort16); +half16 __ovld __cnfn convert_half16_rtn(int16); +half16 __ovld __cnfn convert_half16_rtn(uint16); +half16 __ovld __cnfn convert_half16_rtn(long16); +half16 __ovld __cnfn convert_half16_rtn(ulong16); +half16 __ovld __cnfn convert_half16_rtn(float16); +half16 __ovld __cnfn convert_half16_rtn(half16); +half16 __ovld __cnfn convert_half16_rtz(char16); +half16 __ovld __cnfn convert_half16_rtz(uchar16); +half16 __ovld __cnfn convert_half16_rtz(short16); +half16 __ovld __cnfn convert_half16_rtz(ushort16); +half16 __ovld __cnfn convert_half16_rtz(int16); +half16 __ovld __cnfn convert_half16_rtz(uint16); +half16 __ovld __cnfn convert_half16_rtz(long16); +half16 __ovld __cnfn convert_half16_rtz(ulong16); +half16 __ovld __cnfn convert_half16_rtz(float16); +half16 __ovld __cnfn convert_half16_rtz(half16); + +// Convert half types to double types. +#ifdef cl_khr_fp64 +double __ovld __cnfn convert_double(half); +double __ovld __cnfn convert_double_rte(half); +double __ovld __cnfn convert_double_rtp(half); +double __ovld __cnfn convert_double_rtn(half); +double __ovld __cnfn convert_double_rtz(half); +double2 __ovld __cnfn convert_double2(half2); +double2 __ovld __cnfn convert_double2_rte(half2); +double2 __ovld __cnfn convert_double2_rtp(half2); +double2 __ovld __cnfn convert_double2_rtn(half2); +double2 __ovld __cnfn convert_double2_rtz(half2); +double3 __ovld __cnfn convert_double3(half3); +double3 __ovld __cnfn convert_double3_rte(half3); +double3 __ovld __cnfn convert_double3_rtp(half3); +double3 __ovld __cnfn convert_double3_rtn(half3); +double3 __ovld __cnfn convert_double3_rtz(half3); +double4 __ovld __cnfn convert_double4(half4); +double4 __ovld __cnfn convert_double4_rte(half4); +double4 __ovld __cnfn convert_double4_rtp(half4); +double4 __ovld __cnfn convert_double4_rtn(half4); +double4 __ovld __cnfn convert_double4_rtz(half4); +double8 __ovld __cnfn convert_double8(half8); +double8 __ovld __cnfn convert_double8_rte(half8); +double8 __ovld __cnfn convert_double8_rtp(half8); +double8 __ovld __cnfn convert_double8_rtn(half8); +double8 __ovld __cnfn convert_double8_rtz(half8); +double16 __ovld __cnfn convert_double16(half16); +double16 __ovld __cnfn convert_double16_rte(half16); +double16 __ovld __cnfn convert_double16_rtp(half16); +double16 __ovld __cnfn convert_double16_rtn(half16); +double16 __ovld __cnfn convert_double16_rtz(half16); + +// Convert double types to half types. +half __ovld __cnfn convert_half(double); +half __ovld __cnfn convert_half_rte(double); +half __ovld __cnfn convert_half_rtp(double); +half __ovld __cnfn convert_half_rtn(double); +half __ovld __cnfn convert_half_rtz(double); +half2 __ovld __cnfn convert_half2(double2); +half2 __ovld __cnfn convert_half2_rte(double2); +half2 __ovld __cnfn convert_half2_rtp(double2); +half2 __ovld __cnfn convert_half2_rtn(double2); +half2 __ovld __cnfn convert_half2_rtz(double2); +half3 __ovld __cnfn convert_half3(double3); +half3 __ovld __cnfn convert_half3_rte(double3); +half3 __ovld __cnfn convert_half3_rtp(double3); +half3 __ovld __cnfn convert_half3_rtn(double3); +half3 __ovld __cnfn convert_half3_rtz(double3); +half4 __ovld __cnfn convert_half4(double4); +half4 __ovld __cnfn convert_half4_rte(double4); +half4 __ovld __cnfn convert_half4_rtp(double4); +half4 __ovld __cnfn convert_half4_rtn(double4); +half4 __ovld __cnfn convert_half4_rtz(double4); +half8 __ovld __cnfn convert_half8(double8); +half8 __ovld __cnfn convert_half8_rte(double8); +half8 __ovld __cnfn convert_half8_rtp(double8); +half8 __ovld __cnfn convert_half8_rtn(double8); +half8 __ovld __cnfn convert_half8_rtz(double8); +half16 __ovld __cnfn convert_half16(double16); +half16 __ovld __cnfn convert_half16_rte(double16); +half16 __ovld __cnfn convert_half16_rtp(double16); +half16 __ovld __cnfn convert_half16_rtn(double16); +half16 __ovld __cnfn convert_half16_rtz(double16); +#endif //cl_khr_fp64 + +#endif // cl_khr_fp16 + +// OpenCL v1.1 s6.11.1, v1.2 s6.12.1, v2.0 s6.13.1 - Work-item Functions + +/** + * Returns the number of dimensions in use. This is the + * value given to the work_dim argument specified in + * clEnqueueNDRangeKernel. + * For clEnqueueTask, this returns 1. + */ +uint __ovld __cnfn get_work_dim(void); + +/** + * Returns the number of global work-items specified for + * dimension identified by dimindx. This value is given by + * the global_work_size argument to + * clEnqueueNDRangeKernel. Valid values of dimindx + * are 0 to get_work_dim() - 1. For other values of + * dimindx, get_global_size() returns 1. + * For clEnqueueTask, this always returns 1. + */ +size_t __ovld __cnfn get_global_size(uint); + +/** + * Returns the unique global work-item ID value for + * dimension identified by dimindx. The global work-item + * ID specifies the work-item ID based on the number of + * global work-items specified to execute the kernel. Valid + * values of dimindx are 0 to get_work_dim() - 1. For + * other values of dimindx, get_global_id() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_global_id(uint); + +/** + * Returns the number of local work-items specified in + * dimension identified by dimindx. This value is given by + * the local_work_size argument to + * clEnqueueNDRangeKernel if local_work_size is not + * NULL; otherwise the OpenCL implementation chooses + * an appropriate local_work_size value which is returned + * by this function. Valid values of dimindx are 0 to + * get_work_dim() - 1. For other values of dimindx, + * get_local_size() returns 1. + * For clEnqueueTask, this always returns 1. + */ +size_t __ovld __cnfn get_local_size(uint); + +/** + * Returns the unique local work-item ID i.e. a work-item + * within a specific work-group for dimension identified by + * dimindx. Valid values of dimindx are 0 to + * get_work_dim() - 1. For other values of dimindx, + * get_local_id() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_local_id(uint); + +/** + * Returns the number of work-groups that will execute a + * kernel for dimension identified by dimindx. + * Valid values of dimindx are 0 to get_work_dim() - 1. + * For other values of dimindx, get_num_groups() returns 1. + * For clEnqueueTask, this always returns 1. + */ +size_t __ovld __cnfn get_num_groups(uint); + +/** + * get_group_id returns the work-group ID which is a + * number from 0 .. get_num_groups(dimindx) - 1. + * Valid values of dimindx are 0 to get_work_dim() - 1. + * For other values, get_group_id() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_group_id(uint); + +/** + * get_global_offset returns the offset values specified in + * global_work_offset argument to + * clEnqueueNDRangeKernel. + * Valid values of dimindx are 0 to get_work_dim() - 1. + * For other values, get_global_offset() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_global_offset(uint); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +size_t __ovld get_enqueued_local_size(uint); +size_t __ovld get_global_linear_id(void); +size_t __ovld get_local_linear_id(void); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.2, v1.2 s6.12.2, v2.0 s6.13.2 - Math functions + +/** + * Arc cosine function. + */ +float __ovld __cnfn acos(float); +float2 __ovld __cnfn acos(float2); +float3 __ovld __cnfn acos(float3); +float4 __ovld __cnfn acos(float4); +float8 __ovld __cnfn acos(float8); +float16 __ovld __cnfn acos(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn acos(double); +double2 __ovld __cnfn acos(double2); +double3 __ovld __cnfn acos(double3); +double4 __ovld __cnfn acos(double4); +double8 __ovld __cnfn acos(double8); +double16 __ovld __cnfn acos(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn acos(half); +half2 __ovld __cnfn acos(half2); +half3 __ovld __cnfn acos(half3); +half4 __ovld __cnfn acos(half4); +half8 __ovld __cnfn acos(half8); +half16 __ovld __cnfn acos(half16); +#endif //cl_khr_fp16 + +/** + * Inverse hyperbolic cosine. + */ +float __ovld __cnfn acosh(float); +float2 __ovld __cnfn acosh(float2); +float3 __ovld __cnfn acosh(float3); +float4 __ovld __cnfn acosh(float4); +float8 __ovld __cnfn acosh(float8); +float16 __ovld __cnfn acosh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn acosh(double); +double2 __ovld __cnfn acosh(double2); +double3 __ovld __cnfn acosh(double3); +double4 __ovld __cnfn acosh(double4); +double8 __ovld __cnfn acosh(double8); +double16 __ovld __cnfn acosh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn acosh(half); +half2 __ovld __cnfn acosh(half2); +half3 __ovld __cnfn acosh(half3); +half4 __ovld __cnfn acosh(half4); +half8 __ovld __cnfn acosh(half8); +half16 __ovld __cnfn acosh(half16); +#endif //cl_khr_fp16 + +/** + * Compute acos (x) / PI. + */ +float __ovld __cnfn acospi(float); +float2 __ovld __cnfn acospi(float2); +float3 __ovld __cnfn acospi(float3); +float4 __ovld __cnfn acospi(float4); +float8 __ovld __cnfn acospi(float8); +float16 __ovld __cnfn acospi(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn acospi(double); +double2 __ovld __cnfn acospi(double2); +double3 __ovld __cnfn acospi(double3); +double4 __ovld __cnfn acospi(double4); +double8 __ovld __cnfn acospi(double8); +double16 __ovld __cnfn acospi(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn acospi(half); +half2 __ovld __cnfn acospi(half2); +half3 __ovld __cnfn acospi(half3); +half4 __ovld __cnfn acospi(half4); +half8 __ovld __cnfn acospi(half8); +half16 __ovld __cnfn acospi(half16); +#endif //cl_khr_fp16 + +/** + * Arc sine function. + */ +float __ovld __cnfn asin(float); +float2 __ovld __cnfn asin(float2); +float3 __ovld __cnfn asin(float3); +float4 __ovld __cnfn asin(float4); +float8 __ovld __cnfn asin(float8); +float16 __ovld __cnfn asin(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn asin(double); +double2 __ovld __cnfn asin(double2); +double3 __ovld __cnfn asin(double3); +double4 __ovld __cnfn asin(double4); +double8 __ovld __cnfn asin(double8); +double16 __ovld __cnfn asin(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn asin(half); +half2 __ovld __cnfn asin(half2); +half3 __ovld __cnfn asin(half3); +half4 __ovld __cnfn asin(half4); +half8 __ovld __cnfn asin(half8); +half16 __ovld __cnfn asin(half16); +#endif //cl_khr_fp16 + +/** + * Inverse hyperbolic sine. + */ +float __ovld __cnfn asinh(float); +float2 __ovld __cnfn asinh(float2); +float3 __ovld __cnfn asinh(float3); +float4 __ovld __cnfn asinh(float4); +float8 __ovld __cnfn asinh(float8); +float16 __ovld __cnfn asinh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn asinh(double); +double2 __ovld __cnfn asinh(double2); +double3 __ovld __cnfn asinh(double3); +double4 __ovld __cnfn asinh(double4); +double8 __ovld __cnfn asinh(double8); +double16 __ovld __cnfn asinh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn asinh(half); +half2 __ovld __cnfn asinh(half2); +half3 __ovld __cnfn asinh(half3); +half4 __ovld __cnfn asinh(half4); +half8 __ovld __cnfn asinh(half8); +half16 __ovld __cnfn asinh(half16); +#endif //cl_khr_fp16 + +/** + * Compute asin (x) / PI. + */ +float __ovld __cnfn asinpi(float); +float2 __ovld __cnfn asinpi(float2); +float3 __ovld __cnfn asinpi(float3); +float4 __ovld __cnfn asinpi(float4); +float8 __ovld __cnfn asinpi(float8); +float16 __ovld __cnfn asinpi(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn asinpi(double); +double2 __ovld __cnfn asinpi(double2); +double3 __ovld __cnfn asinpi(double3); +double4 __ovld __cnfn asinpi(double4); +double8 __ovld __cnfn asinpi(double8); +double16 __ovld __cnfn asinpi(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn asinpi(half); +half2 __ovld __cnfn asinpi(half2); +half3 __ovld __cnfn asinpi(half3); +half4 __ovld __cnfn asinpi(half4); +half8 __ovld __cnfn asinpi(half8); +half16 __ovld __cnfn asinpi(half16); +#endif //cl_khr_fp16 + +/** + * Arc tangent function. + */ +float __ovld __cnfn atan(float); +float2 __ovld __cnfn atan(float2); +float3 __ovld __cnfn atan(float3); +float4 __ovld __cnfn atan(float4); +float8 __ovld __cnfn atan(float8); +float16 __ovld __cnfn atan(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn atan(double); +double2 __ovld __cnfn atan(double2); +double3 __ovld __cnfn atan(double3); +double4 __ovld __cnfn atan(double4); +double8 __ovld __cnfn atan(double8); +double16 __ovld __cnfn atan(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atan(half); +half2 __ovld __cnfn atan(half2); +half3 __ovld __cnfn atan(half3); +half4 __ovld __cnfn atan(half4); +half8 __ovld __cnfn atan(half8); +half16 __ovld __cnfn atan(half16); +#endif //cl_khr_fp16 + +/** + * Arc tangent of y / x. + */ +float __ovld __cnfn atan2(float, float); +float2 __ovld __cnfn atan2(float2, float2); +float3 __ovld __cnfn atan2(float3, float3); +float4 __ovld __cnfn atan2(float4, float4); +float8 __ovld __cnfn atan2(float8, float8); +float16 __ovld __cnfn atan2(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn atan2(double, double); +double2 __ovld __cnfn atan2(double2, double2); +double3 __ovld __cnfn atan2(double3, double3); +double4 __ovld __cnfn atan2(double4, double4); +double8 __ovld __cnfn atan2(double8, double8); +double16 __ovld __cnfn atan2(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atan2(half, half); +half2 __ovld __cnfn atan2(half2, half2); +half3 __ovld __cnfn atan2(half3, half3); +half4 __ovld __cnfn atan2(half4, half4); +half8 __ovld __cnfn atan2(half8, half8); +half16 __ovld __cnfn atan2(half16, half16); +#endif //cl_khr_fp16 + +/** + * Hyperbolic arc tangent. + */ +float __ovld __cnfn atanh(float); +float2 __ovld __cnfn atanh(float2); +float3 __ovld __cnfn atanh(float3); +float4 __ovld __cnfn atanh(float4); +float8 __ovld __cnfn atanh(float8); +float16 __ovld __cnfn atanh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn atanh(double); +double2 __ovld __cnfn atanh(double2); +double3 __ovld __cnfn atanh(double3); +double4 __ovld __cnfn atanh(double4); +double8 __ovld __cnfn atanh(double8); +double16 __ovld __cnfn atanh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atanh(half); +half2 __ovld __cnfn atanh(half2); +half3 __ovld __cnfn atanh(half3); +half4 __ovld __cnfn atanh(half4); +half8 __ovld __cnfn atanh(half8); +half16 __ovld __cnfn atanh(half16); +#endif //cl_khr_fp16 + +/** + * Compute atan (x) / PI. + */ +float __ovld __cnfn atanpi(float); +float2 __ovld __cnfn atanpi(float2); +float3 __ovld __cnfn atanpi(float3); +float4 __ovld __cnfn atanpi(float4); +float8 __ovld __cnfn atanpi(float8); +float16 __ovld __cnfn atanpi(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn atanpi(double); +double2 __ovld __cnfn atanpi(double2); +double3 __ovld __cnfn atanpi(double3); +double4 __ovld __cnfn atanpi(double4); +double8 __ovld __cnfn atanpi(double8); +double16 __ovld __cnfn atanpi(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atanpi(half); +half2 __ovld __cnfn atanpi(half2); +half3 __ovld __cnfn atanpi(half3); +half4 __ovld __cnfn atanpi(half4); +half8 __ovld __cnfn atanpi(half8); +half16 __ovld __cnfn atanpi(half16); +#endif //cl_khr_fp16 + +/** + * Compute atan2 (y, x) / PI. + */ +float __ovld __cnfn atan2pi(float, float); +float2 __ovld __cnfn atan2pi(float2, float2); +float3 __ovld __cnfn atan2pi(float3, float3); +float4 __ovld __cnfn atan2pi(float4, float4); +float8 __ovld __cnfn atan2pi(float8, float8); +float16 __ovld __cnfn atan2pi(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn atan2pi(double, double); +double2 __ovld __cnfn atan2pi(double2, double2); +double3 __ovld __cnfn atan2pi(double3, double3); +double4 __ovld __cnfn atan2pi(double4, double4); +double8 __ovld __cnfn atan2pi(double8, double8); +double16 __ovld __cnfn atan2pi(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atan2pi(half, half); +half2 __ovld __cnfn atan2pi(half2, half2); +half3 __ovld __cnfn atan2pi(half3, half3); +half4 __ovld __cnfn atan2pi(half4, half4); +half8 __ovld __cnfn atan2pi(half8, half8); +half16 __ovld __cnfn atan2pi(half16, half16); +#endif //cl_khr_fp16 + +/** + * Compute cube-root. + */ +float __ovld __cnfn cbrt(float); +float2 __ovld __cnfn cbrt(float2); +float3 __ovld __cnfn cbrt(float3); +float4 __ovld __cnfn cbrt(float4); +float8 __ovld __cnfn cbrt(float8); +float16 __ovld __cnfn cbrt(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cbrt(double); +double2 __ovld __cnfn cbrt(double2); +double3 __ovld __cnfn cbrt(double3); +double4 __ovld __cnfn cbrt(double4); +double8 __ovld __cnfn cbrt(double8); +double16 __ovld __cnfn cbrt(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cbrt(half); +half2 __ovld __cnfn cbrt(half2); +half3 __ovld __cnfn cbrt(half3); +half4 __ovld __cnfn cbrt(half4); +half8 __ovld __cnfn cbrt(half8); +half16 __ovld __cnfn cbrt(half16); +#endif //cl_khr_fp16 + +/** + * Round to integral value using the round to positive + * infinity rounding mode. + */ +float __ovld __cnfn ceil(float); +float2 __ovld __cnfn ceil(float2); +float3 __ovld __cnfn ceil(float3); +float4 __ovld __cnfn ceil(float4); +float8 __ovld __cnfn ceil(float8); +float16 __ovld __cnfn ceil(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn ceil(double); +double2 __ovld __cnfn ceil(double2); +double3 __ovld __cnfn ceil(double3); +double4 __ovld __cnfn ceil(double4); +double8 __ovld __cnfn ceil(double8); +double16 __ovld __cnfn ceil(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn ceil(half); +half2 __ovld __cnfn ceil(half2); +half3 __ovld __cnfn ceil(half3); +half4 __ovld __cnfn ceil(half4); +half8 __ovld __cnfn ceil(half8); +half16 __ovld __cnfn ceil(half16); +#endif //cl_khr_fp16 + +/** + * Returns x with its sign changed to match the sign of y. + */ +float __ovld __cnfn copysign(float, float); +float2 __ovld __cnfn copysign(float2, float2); +float3 __ovld __cnfn copysign(float3, float3); +float4 __ovld __cnfn copysign(float4, float4); +float8 __ovld __cnfn copysign(float8, float8); +float16 __ovld __cnfn copysign(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn copysign(double, double); +double2 __ovld __cnfn copysign(double2, double2); +double3 __ovld __cnfn copysign(double3, double3); +double4 __ovld __cnfn copysign(double4, double4); +double8 __ovld __cnfn copysign(double8, double8); +double16 __ovld __cnfn copysign(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn copysign(half, half); +half2 __ovld __cnfn copysign(half2, half2); +half3 __ovld __cnfn copysign(half3, half3); +half4 __ovld __cnfn copysign(half4, half4); +half8 __ovld __cnfn copysign(half8, half8); +half16 __ovld __cnfn copysign(half16, half16); +#endif //cl_khr_fp16 + +/** + * Compute cosine. + */ +float __ovld __cnfn cos(float); +float2 __ovld __cnfn cos(float2); +float3 __ovld __cnfn cos(float3); +float4 __ovld __cnfn cos(float4); +float8 __ovld __cnfn cos(float8); +float16 __ovld __cnfn cos(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cos(double); +double2 __ovld __cnfn cos(double2); +double3 __ovld __cnfn cos(double3); +double4 __ovld __cnfn cos(double4); +double8 __ovld __cnfn cos(double8); +double16 __ovld __cnfn cos(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cos(half); +half2 __ovld __cnfn cos(half2); +half3 __ovld __cnfn cos(half3); +half4 __ovld __cnfn cos(half4); +half8 __ovld __cnfn cos(half8); +half16 __ovld __cnfn cos(half16); +#endif //cl_khr_fp16 + +/** + * Compute hyperbolic cosine. + */ +float __ovld __cnfn cosh(float); +float2 __ovld __cnfn cosh(float2); +float3 __ovld __cnfn cosh(float3); +float4 __ovld __cnfn cosh(float4); +float8 __ovld __cnfn cosh(float8); +float16 __ovld __cnfn cosh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cosh(double); +double2 __ovld __cnfn cosh(double2); +double3 __ovld __cnfn cosh(double3); +double4 __ovld __cnfn cosh(double4); +double8 __ovld __cnfn cosh(double8); +double16 __ovld __cnfn cosh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cosh(half); +half2 __ovld __cnfn cosh(half2); +half3 __ovld __cnfn cosh(half3); +half4 __ovld __cnfn cosh(half4); +half8 __ovld __cnfn cosh(half8); +half16 __ovld __cnfn cosh(half16); +#endif //cl_khr_fp16 + +/** + * Compute cos (PI * x). + */ +float __ovld __cnfn cospi(float); +float2 __ovld __cnfn cospi(float2); +float3 __ovld __cnfn cospi(float3); +float4 __ovld __cnfn cospi(float4); +float8 __ovld __cnfn cospi(float8); +float16 __ovld __cnfn cospi(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cospi(double); +double2 __ovld __cnfn cospi(double2); +double3 __ovld __cnfn cospi(double3); +double4 __ovld __cnfn cospi(double4); +double8 __ovld __cnfn cospi(double8); +double16 __ovld __cnfn cospi(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cospi(half); +half2 __ovld __cnfn cospi(half2); +half3 __ovld __cnfn cospi(half3); +half4 __ovld __cnfn cospi(half4); +half8 __ovld __cnfn cospi(half8); +half16 __ovld __cnfn cospi(half16); +#endif //cl_khr_fp16 + +/** + * Complementary error function. + */ +float __ovld __cnfn erfc(float); +float2 __ovld __cnfn erfc(float2); +float3 __ovld __cnfn erfc(float3); +float4 __ovld __cnfn erfc(float4); +float8 __ovld __cnfn erfc(float8); +float16 __ovld __cnfn erfc(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn erfc(double); +double2 __ovld __cnfn erfc(double2); +double3 __ovld __cnfn erfc(double3); +double4 __ovld __cnfn erfc(double4); +double8 __ovld __cnfn erfc(double8); +double16 __ovld __cnfn erfc(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn erfc(half); +half2 __ovld __cnfn erfc(half2); +half3 __ovld __cnfn erfc(half3); +half4 __ovld __cnfn erfc(half4); +half8 __ovld __cnfn erfc(half8); +half16 __ovld __cnfn erfc(half16); +#endif //cl_khr_fp16 + +/** + * Error function encountered in integrating the + * normal distribution. + */ +float __ovld __cnfn erf(float); +float2 __ovld __cnfn erf(float2); +float3 __ovld __cnfn erf(float3); +float4 __ovld __cnfn erf(float4); +float8 __ovld __cnfn erf(float8); +float16 __ovld __cnfn erf(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn erf(double); +double2 __ovld __cnfn erf(double2); +double3 __ovld __cnfn erf(double3); +double4 __ovld __cnfn erf(double4); +double8 __ovld __cnfn erf(double8); +double16 __ovld __cnfn erf(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn erf(half); +half2 __ovld __cnfn erf(half2); +half3 __ovld __cnfn erf(half3); +half4 __ovld __cnfn erf(half4); +half8 __ovld __cnfn erf(half8); +half16 __ovld __cnfn erf(half16); +#endif //cl_khr_fp16 + +/** + * Compute the base e exponential function of x. + */ +float __ovld __cnfn exp(float); +float2 __ovld __cnfn exp(float2); +float3 __ovld __cnfn exp(float3); +float4 __ovld __cnfn exp(float4); +float8 __ovld __cnfn exp(float8); +float16 __ovld __cnfn exp(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn exp(double); +double2 __ovld __cnfn exp(double2); +double3 __ovld __cnfn exp(double3); +double4 __ovld __cnfn exp(double4); +double8 __ovld __cnfn exp(double8); +double16 __ovld __cnfn exp(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn exp(half); +half2 __ovld __cnfn exp(half2); +half3 __ovld __cnfn exp(half3); +half4 __ovld __cnfn exp(half4); +half8 __ovld __cnfn exp(half8); +half16 __ovld __cnfn exp(half16); +#endif //cl_khr_fp16 + +/** + * Exponential base 2 function. + */ +float __ovld __cnfn exp2(float); +float2 __ovld __cnfn exp2(float2); +float3 __ovld __cnfn exp2(float3); +float4 __ovld __cnfn exp2(float4); +float8 __ovld __cnfn exp2(float8); +float16 __ovld __cnfn exp2(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn exp2(double); +double2 __ovld __cnfn exp2(double2); +double3 __ovld __cnfn exp2(double3); +double4 __ovld __cnfn exp2(double4); +double8 __ovld __cnfn exp2(double8); +double16 __ovld __cnfn exp2(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn exp2(half); +half2 __ovld __cnfn exp2(half2); +half3 __ovld __cnfn exp2(half3); +half4 __ovld __cnfn exp2(half4); +half8 __ovld __cnfn exp2(half8); +half16 __ovld __cnfn exp2(half16); +#endif //cl_khr_fp16 + +/** + * Exponential base 10 function. + */ +float __ovld __cnfn exp10(float); +float2 __ovld __cnfn exp10(float2); +float3 __ovld __cnfn exp10(float3); +float4 __ovld __cnfn exp10(float4); +float8 __ovld __cnfn exp10(float8); +float16 __ovld __cnfn exp10(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn exp10(double); +double2 __ovld __cnfn exp10(double2); +double3 __ovld __cnfn exp10(double3); +double4 __ovld __cnfn exp10(double4); +double8 __ovld __cnfn exp10(double8); +double16 __ovld __cnfn exp10(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn exp10(half); +half2 __ovld __cnfn exp10(half2); +half3 __ovld __cnfn exp10(half3); +half4 __ovld __cnfn exp10(half4); +half8 __ovld __cnfn exp10(half8); +half16 __ovld __cnfn exp10(half16); +#endif //cl_khr_fp16 + +/** + * Compute e^x- 1.0. + */ +float __ovld __cnfn expm1(float); +float2 __ovld __cnfn expm1(float2); +float3 __ovld __cnfn expm1(float3); +float4 __ovld __cnfn expm1(float4); +float8 __ovld __cnfn expm1(float8); +float16 __ovld __cnfn expm1(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn expm1(double); +double2 __ovld __cnfn expm1(double2); +double3 __ovld __cnfn expm1(double3); +double4 __ovld __cnfn expm1(double4); +double8 __ovld __cnfn expm1(double8); +double16 __ovld __cnfn expm1(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn expm1(half); +half2 __ovld __cnfn expm1(half2); +half3 __ovld __cnfn expm1(half3); +half4 __ovld __cnfn expm1(half4); +half8 __ovld __cnfn expm1(half8); +half16 __ovld __cnfn expm1(half16); +#endif //cl_khr_fp16 + +/** + * Compute absolute value of a floating-point number. + */ +float __ovld __cnfn fabs(float); +float2 __ovld __cnfn fabs(float2); +float3 __ovld __cnfn fabs(float3); +float4 __ovld __cnfn fabs(float4); +float8 __ovld __cnfn fabs(float8); +float16 __ovld __cnfn fabs(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn fabs(double); +double2 __ovld __cnfn fabs(double2); +double3 __ovld __cnfn fabs(double3); +double4 __ovld __cnfn fabs(double4); +double8 __ovld __cnfn fabs(double8); +double16 __ovld __cnfn fabs(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fabs(half); +half2 __ovld __cnfn fabs(half2); +half3 __ovld __cnfn fabs(half3); +half4 __ovld __cnfn fabs(half4); +half8 __ovld __cnfn fabs(half8); +half16 __ovld __cnfn fabs(half16); +#endif //cl_khr_fp16 + +/** + * x - y if x > y, +0 if x is less than or equal to y. + */ +float __ovld __cnfn fdim(float, float); +float2 __ovld __cnfn fdim(float2, float2); +float3 __ovld __cnfn fdim(float3, float3); +float4 __ovld __cnfn fdim(float4, float4); +float8 __ovld __cnfn fdim(float8, float8); +float16 __ovld __cnfn fdim(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn fdim(double, double); +double2 __ovld __cnfn fdim(double2, double2); +double3 __ovld __cnfn fdim(double3, double3); +double4 __ovld __cnfn fdim(double4, double4); +double8 __ovld __cnfn fdim(double8, double8); +double16 __ovld __cnfn fdim(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fdim(half, half); +half2 __ovld __cnfn fdim(half2, half2); +half3 __ovld __cnfn fdim(half3, half3); +half4 __ovld __cnfn fdim(half4, half4); +half8 __ovld __cnfn fdim(half8, half8); +half16 __ovld __cnfn fdim(half16, half16); +#endif //cl_khr_fp16 + +/** + * Round to integral value using the round to -ve + * infinity rounding mode. + */ +float __ovld __cnfn floor(float); +float2 __ovld __cnfn floor(float2); +float3 __ovld __cnfn floor(float3); +float4 __ovld __cnfn floor(float4); +float8 __ovld __cnfn floor(float8); +float16 __ovld __cnfn floor(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn floor(double); +double2 __ovld __cnfn floor(double2); +double3 __ovld __cnfn floor(double3); +double4 __ovld __cnfn floor(double4); +double8 __ovld __cnfn floor(double8); +double16 __ovld __cnfn floor(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn floor(half); +half2 __ovld __cnfn floor(half2); +half3 __ovld __cnfn floor(half3); +half4 __ovld __cnfn floor(half4); +half8 __ovld __cnfn floor(half8); +half16 __ovld __cnfn floor(half16); +#endif //cl_khr_fp16 + +/** + * Returns the correctly rounded floating-point + * representation of the sum of c with the infinitely + * precise product of a and b. Rounding of + * intermediate products shall not occur. Edge case + * behavior is per the IEEE 754-2008 standard. + */ +float __ovld __cnfn fma(float, float, float); +float2 __ovld __cnfn fma(float2, float2, float2); +float3 __ovld __cnfn fma(float3, float3, float3); +float4 __ovld __cnfn fma(float4, float4, float4); +float8 __ovld __cnfn fma(float8, float8, float8); +float16 __ovld __cnfn fma(float16, float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn fma(double, double, double); +double2 __ovld __cnfn fma(double2, double2, double2); +double3 __ovld __cnfn fma(double3, double3, double3); +double4 __ovld __cnfn fma(double4, double4, double4); +double8 __ovld __cnfn fma(double8, double8, double8); +double16 __ovld __cnfn fma(double16, double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fma(half, half, half); +half2 __ovld __cnfn fma(half2, half2, half2); +half3 __ovld __cnfn fma(half3, half3, half3); +half4 __ovld __cnfn fma(half4, half4, half4); +half8 __ovld __cnfn fma(half8, half8, half8); +half16 __ovld __cnfn fma(half16, half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns y if x < y, otherwise it returns x. If one + * argument is a NaN, fmax() returns the other + * argument. If both arguments are NaNs, fmax() + * returns a NaN. + */ +float __ovld __cnfn fmax(float, float); +float2 __ovld __cnfn fmax(float2, float2); +float3 __ovld __cnfn fmax(float3, float3); +float4 __ovld __cnfn fmax(float4, float4); +float8 __ovld __cnfn fmax(float8, float8); +float16 __ovld __cnfn fmax(float16, float16); +float2 __ovld __cnfn fmax(float2, float); +float3 __ovld __cnfn fmax(float3, float); +float4 __ovld __cnfn fmax(float4, float); +float8 __ovld __cnfn fmax(float8, float); +float16 __ovld __cnfn fmax(float16, float); +#ifdef cl_khr_fp64 +double __ovld __cnfn fmax(double, double); +double2 __ovld __cnfn fmax(double2, double2); +double3 __ovld __cnfn fmax(double3, double3); +double4 __ovld __cnfn fmax(double4, double4); +double8 __ovld __cnfn fmax(double8, double8); +double16 __ovld __cnfn fmax(double16, double16); +double2 __ovld __cnfn fmax(double2, double); +double3 __ovld __cnfn fmax(double3, double); +double4 __ovld __cnfn fmax(double4, double); +double8 __ovld __cnfn fmax(double8, double); +double16 __ovld __cnfn fmax(double16, double); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fmax(half, half); +half2 __ovld __cnfn fmax(half2, half2); +half3 __ovld __cnfn fmax(half3, half3); +half4 __ovld __cnfn fmax(half4, half4); +half8 __ovld __cnfn fmax(half8, half8); +half16 __ovld __cnfn fmax(half16, half16); +half2 __ovld __cnfn fmax(half2, half); +half3 __ovld __cnfn fmax(half3, half); +half4 __ovld __cnfn fmax(half4, half); +half8 __ovld __cnfn fmax(half8, half); +half16 __ovld __cnfn fmax(half16, half); +#endif //cl_khr_fp16 + +/** + * Returns y if y < x, otherwise it returns x. If one + * argument is a NaN, fmin() returns the other + * argument. If both arguments are NaNs, fmin() + * returns a NaN. + */ +float __ovld __cnfn fmin(float, float); +float2 __ovld __cnfn fmin(float2, float2); +float3 __ovld __cnfn fmin(float3, float3); +float4 __ovld __cnfn fmin(float4, float4); +float8 __ovld __cnfn fmin(float8, float8); +float16 __ovld __cnfn fmin(float16, float16); +float2 __ovld __cnfn fmin(float2, float); +float3 __ovld __cnfn fmin(float3, float); +float4 __ovld __cnfn fmin(float4, float); +float8 __ovld __cnfn fmin(float8, float); +float16 __ovld __cnfn fmin(float16, float); +#ifdef cl_khr_fp64 +double __ovld __cnfn fmin(double, double); +double2 __ovld __cnfn fmin(double2, double2); +double3 __ovld __cnfn fmin(double3, double3); +double4 __ovld __cnfn fmin(double4, double4); +double8 __ovld __cnfn fmin(double8, double8); +double16 __ovld __cnfn fmin(double16, double16); +double2 __ovld __cnfn fmin(double2, double); +double3 __ovld __cnfn fmin(double3, double); +double4 __ovld __cnfn fmin(double4, double); +double8 __ovld __cnfn fmin(double8, double); +double16 __ovld __cnfn fmin(double16, double); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fmin(half, half); +half2 __ovld __cnfn fmin(half2, half2); +half3 __ovld __cnfn fmin(half3, half3); +half4 __ovld __cnfn fmin(half4, half4); +half8 __ovld __cnfn fmin(half8, half8); +half16 __ovld __cnfn fmin(half16, half16); +half2 __ovld __cnfn fmin(half2, half); +half3 __ovld __cnfn fmin(half3, half); +half4 __ovld __cnfn fmin(half4, half); +half8 __ovld __cnfn fmin(half8, half); +half16 __ovld __cnfn fmin(half16, half); +#endif //cl_khr_fp16 + +/** + * Modulus. Returns x - y * trunc (x/y). + */ +float __ovld __cnfn fmod(float, float); +float2 __ovld __cnfn fmod(float2, float2); +float3 __ovld __cnfn fmod(float3, float3); +float4 __ovld __cnfn fmod(float4, float4); +float8 __ovld __cnfn fmod(float8, float8); +float16 __ovld __cnfn fmod(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn fmod(double, double); +double2 __ovld __cnfn fmod(double2, double2); +double3 __ovld __cnfn fmod(double3, double3); +double4 __ovld __cnfn fmod(double4, double4); +double8 __ovld __cnfn fmod(double8, double8); +double16 __ovld __cnfn fmod(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fmod(half, half); +half2 __ovld __cnfn fmod(half2, half2); +half3 __ovld __cnfn fmod(half3, half3); +half4 __ovld __cnfn fmod(half4, half4); +half8 __ovld __cnfn fmod(half8, half8); +half16 __ovld __cnfn fmod(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns fmin(x - floor (x), 0x1.fffffep-1f ). + * floor(x) is returned in iptr. + */ +#if defined(__opencl_c_generic_address_space) +float __ovld fract(float, float *); +float2 __ovld fract(float2, float2 *); +float3 __ovld fract(float3, float3 *); +float4 __ovld fract(float4, float4 *); +float8 __ovld fract(float8, float8 *); +float16 __ovld fract(float16, float16 *); +#ifdef cl_khr_fp64 +double __ovld fract(double, double *); +double2 __ovld fract(double2, double2 *); +double3 __ovld fract(double3, double3 *); +double4 __ovld fract(double4, double4 *); +double8 __ovld fract(double8, double8 *); +double16 __ovld fract(double16, double16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld fract(half, half *); +half2 __ovld fract(half2, half2 *); +half3 __ovld fract(half3, half3 *); +half4 __ovld fract(half4, half4 *); +half8 __ovld fract(half8, half8 *); +half16 __ovld fract(half16, half16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld fract(float, __global float *); +float2 __ovld fract(float2, __global float2 *); +float3 __ovld fract(float3, __global float3 *); +float4 __ovld fract(float4, __global float4 *); +float8 __ovld fract(float8, __global float8 *); +float16 __ovld fract(float16, __global float16 *); +float __ovld fract(float, __local float *); +float2 __ovld fract(float2, __local float2 *); +float3 __ovld fract(float3, __local float3 *); +float4 __ovld fract(float4, __local float4 *); +float8 __ovld fract(float8, __local float8 *); +float16 __ovld fract(float16, __local float16 *); +float __ovld fract(float, __private float *); +float2 __ovld fract(float2, __private float2 *); +float3 __ovld fract(float3, __private float3 *); +float4 __ovld fract(float4, __private float4 *); +float8 __ovld fract(float8, __private float8 *); +float16 __ovld fract(float16, __private float16 *); +#ifdef cl_khr_fp64 +double __ovld fract(double, __global double *); +double2 __ovld fract(double2, __global double2 *); +double3 __ovld fract(double3, __global double3 *); +double4 __ovld fract(double4, __global double4 *); +double8 __ovld fract(double8, __global double8 *); +double16 __ovld fract(double16, __global double16 *); +double __ovld fract(double, __local double *); +double2 __ovld fract(double2, __local double2 *); +double3 __ovld fract(double3, __local double3 *); +double4 __ovld fract(double4, __local double4 *); +double8 __ovld fract(double8, __local double8 *); +double16 __ovld fract(double16, __local double16 *); +double __ovld fract(double, __private double *); +double2 __ovld fract(double2, __private double2 *); +double3 __ovld fract(double3, __private double3 *); +double4 __ovld fract(double4, __private double4 *); +double8 __ovld fract(double8, __private double8 *); +double16 __ovld fract(double16, __private double16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld fract(half, __global half *); +half2 __ovld fract(half2, __global half2 *); +half3 __ovld fract(half3, __global half3 *); +half4 __ovld fract(half4, __global half4 *); +half8 __ovld fract(half8, __global half8 *); +half16 __ovld fract(half16, __global half16 *); +half __ovld fract(half, __local half *); +half2 __ovld fract(half2, __local half2 *); +half3 __ovld fract(half3, __local half3 *); +half4 __ovld fract(half4, __local half4 *); +half8 __ovld fract(half8, __local half8 *); +half16 __ovld fract(half16, __local half16 *); +half __ovld fract(half, __private half *); +half2 __ovld fract(half2, __private half2 *); +half3 __ovld fract(half3, __private half3 *); +half4 __ovld fract(half4, __private half4 *); +half8 __ovld fract(half8, __private half8 *); +half16 __ovld fract(half16, __private half16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Extract mantissa and exponent from x. For each + * component the mantissa returned is a float with + * magnitude in the interval [1/2, 1) or 0. Each + * component of x equals mantissa returned * 2^exp. + */ +#if defined(__opencl_c_generic_address_space) +float __ovld frexp(float, int *); +float2 __ovld frexp(float2, int2 *); +float3 __ovld frexp(float3, int3 *); +float4 __ovld frexp(float4, int4 *); +float8 __ovld frexp(float8, int8 *); +float16 __ovld frexp(float16, int16 *); +#ifdef cl_khr_fp64 +double __ovld frexp(double, int *); +double2 __ovld frexp(double2, int2 *); +double3 __ovld frexp(double3, int3 *); +double4 __ovld frexp(double4, int4 *); +double8 __ovld frexp(double8, int8 *); +double16 __ovld frexp(double16, int16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld frexp(half, int *); +half2 __ovld frexp(half2, int2 *); +half3 __ovld frexp(half3, int3 *); +half4 __ovld frexp(half4, int4 *); +half8 __ovld frexp(half8, int8 *); +half16 __ovld frexp(half16, int16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld frexp(float, __global int *); +float2 __ovld frexp(float2, __global int2 *); +float3 __ovld frexp(float3, __global int3 *); +float4 __ovld frexp(float4, __global int4 *); +float8 __ovld frexp(float8, __global int8 *); +float16 __ovld frexp(float16, __global int16 *); +float __ovld frexp(float, __local int *); +float2 __ovld frexp(float2, __local int2 *); +float3 __ovld frexp(float3, __local int3 *); +float4 __ovld frexp(float4, __local int4 *); +float8 __ovld frexp(float8, __local int8 *); +float16 __ovld frexp(float16, __local int16 *); +float __ovld frexp(float, __private int *); +float2 __ovld frexp(float2, __private int2 *); +float3 __ovld frexp(float3, __private int3 *); +float4 __ovld frexp(float4, __private int4 *); +float8 __ovld frexp(float8, __private int8 *); +float16 __ovld frexp(float16, __private int16 *); +#ifdef cl_khr_fp64 +double __ovld frexp(double, __global int *); +double2 __ovld frexp(double2, __global int2 *); +double3 __ovld frexp(double3, __global int3 *); +double4 __ovld frexp(double4, __global int4 *); +double8 __ovld frexp(double8, __global int8 *); +double16 __ovld frexp(double16, __global int16 *); +double __ovld frexp(double, __local int *); +double2 __ovld frexp(double2, __local int2 *); +double3 __ovld frexp(double3, __local int3 *); +double4 __ovld frexp(double4, __local int4 *); +double8 __ovld frexp(double8, __local int8 *); +double16 __ovld frexp(double16, __local int16 *); +double __ovld frexp(double, __private int *); +double2 __ovld frexp(double2, __private int2 *); +double3 __ovld frexp(double3, __private int3 *); +double4 __ovld frexp(double4, __private int4 *); +double8 __ovld frexp(double8, __private int8 *); +double16 __ovld frexp(double16, __private int16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld frexp(half, __global int *); +half2 __ovld frexp(half2, __global int2 *); +half3 __ovld frexp(half3, __global int3 *); +half4 __ovld frexp(half4, __global int4 *); +half8 __ovld frexp(half8, __global int8 *); +half16 __ovld frexp(half16, __global int16 *); +half __ovld frexp(half, __local int *); +half2 __ovld frexp(half2, __local int2 *); +half3 __ovld frexp(half3, __local int3 *); +half4 __ovld frexp(half4, __local int4 *); +half8 __ovld frexp(half8, __local int8 *); +half16 __ovld frexp(half16, __local int16 *); +half __ovld frexp(half, __private int *); +half2 __ovld frexp(half2, __private int2 *); +half3 __ovld frexp(half3, __private int3 *); +half4 __ovld frexp(half4, __private int4 *); +half8 __ovld frexp(half8, __private int8 *); +half16 __ovld frexp(half16, __private int16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Compute the value of the square root of x^2 + y^2 + * without undue overflow or underflow. + */ +float __ovld __cnfn hypot(float, float); +float2 __ovld __cnfn hypot(float2, float2); +float3 __ovld __cnfn hypot(float3, float3); +float4 __ovld __cnfn hypot(float4, float4); +float8 __ovld __cnfn hypot(float8, float8); +float16 __ovld __cnfn hypot(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn hypot(double, double); +double2 __ovld __cnfn hypot(double2, double2); +double3 __ovld __cnfn hypot(double3, double3); +double4 __ovld __cnfn hypot(double4, double4); +double8 __ovld __cnfn hypot(double8, double8); +double16 __ovld __cnfn hypot(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn hypot(half, half); +half2 __ovld __cnfn hypot(half2, half2); +half3 __ovld __cnfn hypot(half3, half3); +half4 __ovld __cnfn hypot(half4, half4); +half8 __ovld __cnfn hypot(half8, half8); +half16 __ovld __cnfn hypot(half16, half16); +#endif //cl_khr_fp16 + +/** + * Return the exponent as an integer value. + */ +int __ovld __cnfn ilogb(float); +int2 __ovld __cnfn ilogb(float2); +int3 __ovld __cnfn ilogb(float3); +int4 __ovld __cnfn ilogb(float4); +int8 __ovld __cnfn ilogb(float8); +int16 __ovld __cnfn ilogb(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn ilogb(double); +int2 __ovld __cnfn ilogb(double2); +int3 __ovld __cnfn ilogb(double3); +int4 __ovld __cnfn ilogb(double4); +int8 __ovld __cnfn ilogb(double8); +int16 __ovld __cnfn ilogb(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn ilogb(half); +int2 __ovld __cnfn ilogb(half2); +int3 __ovld __cnfn ilogb(half3); +int4 __ovld __cnfn ilogb(half4); +int8 __ovld __cnfn ilogb(half8); +int16 __ovld __cnfn ilogb(half16); +#endif //cl_khr_fp16 + +/** + * Multiply x by 2 to the power n. + */ +float __ovld __cnfn ldexp(float, int); +float2 __ovld __cnfn ldexp(float2, int2); +float3 __ovld __cnfn ldexp(float3, int3); +float4 __ovld __cnfn ldexp(float4, int4); +float8 __ovld __cnfn ldexp(float8, int8); +float16 __ovld __cnfn ldexp(float16, int16); +float2 __ovld __cnfn ldexp(float2, int); +float3 __ovld __cnfn ldexp(float3, int); +float4 __ovld __cnfn ldexp(float4, int); +float8 __ovld __cnfn ldexp(float8, int); +float16 __ovld __cnfn ldexp(float16, int); +#ifdef cl_khr_fp64 +double __ovld __cnfn ldexp(double, int); +double2 __ovld __cnfn ldexp(double2, int2); +double3 __ovld __cnfn ldexp(double3, int3); +double4 __ovld __cnfn ldexp(double4, int4); +double8 __ovld __cnfn ldexp(double8, int8); +double16 __ovld __cnfn ldexp(double16, int16); +double2 __ovld __cnfn ldexp(double2, int); +double3 __ovld __cnfn ldexp(double3, int); +double4 __ovld __cnfn ldexp(double4, int); +double8 __ovld __cnfn ldexp(double8, int); +double16 __ovld __cnfn ldexp(double16, int); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn ldexp(half, int); +half2 __ovld __cnfn ldexp(half2, int2); +half3 __ovld __cnfn ldexp(half3, int3); +half4 __ovld __cnfn ldexp(half4, int4); +half8 __ovld __cnfn ldexp(half8, int8); +half16 __ovld __cnfn ldexp(half16, int16); +half2 __ovld __cnfn ldexp(half2, int); +half3 __ovld __cnfn ldexp(half3, int); +half4 __ovld __cnfn ldexp(half4, int); +half8 __ovld __cnfn ldexp(half8, int); +half16 __ovld __cnfn ldexp(half16, int); +#endif //cl_khr_fp16 + +/** + * Log gamma function. Returns the natural + * logarithm of the absolute value of the gamma + * function. The sign of the gamma function is + * returned in the signp argument of lgamma_r. + */ +float __ovld __cnfn lgamma(float); +float2 __ovld __cnfn lgamma(float2); +float3 __ovld __cnfn lgamma(float3); +float4 __ovld __cnfn lgamma(float4); +float8 __ovld __cnfn lgamma(float8); +float16 __ovld __cnfn lgamma(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn lgamma(double); +double2 __ovld __cnfn lgamma(double2); +double3 __ovld __cnfn lgamma(double3); +double4 __ovld __cnfn lgamma(double4); +double8 __ovld __cnfn lgamma(double8); +double16 __ovld __cnfn lgamma(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn lgamma(half); +half2 __ovld __cnfn lgamma(half2); +half3 __ovld __cnfn lgamma(half3); +half4 __ovld __cnfn lgamma(half4); +half8 __ovld __cnfn lgamma(half8); +half16 __ovld __cnfn lgamma(half16); +#endif //cl_khr_fp16 + +#if defined(__opencl_c_generic_address_space) +float __ovld lgamma_r(float, int *); +float2 __ovld lgamma_r(float2, int2 *); +float3 __ovld lgamma_r(float3, int3 *); +float4 __ovld lgamma_r(float4, int4 *); +float8 __ovld lgamma_r(float8, int8 *); +float16 __ovld lgamma_r(float16, int16 *); +#ifdef cl_khr_fp64 +double __ovld lgamma_r(double, int *); +double2 __ovld lgamma_r(double2, int2 *); +double3 __ovld lgamma_r(double3, int3 *); +double4 __ovld lgamma_r(double4, int4 *); +double8 __ovld lgamma_r(double8, int8 *); +double16 __ovld lgamma_r(double16, int16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld lgamma_r(half, int *); +half2 __ovld lgamma_r(half2, int2 *); +half3 __ovld lgamma_r(half3, int3 *); +half4 __ovld lgamma_r(half4, int4 *); +half8 __ovld lgamma_r(half8, int8 *); +half16 __ovld lgamma_r(half16, int16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld lgamma_r(float, __global int *); +float2 __ovld lgamma_r(float2, __global int2 *); +float3 __ovld lgamma_r(float3, __global int3 *); +float4 __ovld lgamma_r(float4, __global int4 *); +float8 __ovld lgamma_r(float8, __global int8 *); +float16 __ovld lgamma_r(float16, __global int16 *); +float __ovld lgamma_r(float, __local int *); +float2 __ovld lgamma_r(float2, __local int2 *); +float3 __ovld lgamma_r(float3, __local int3 *); +float4 __ovld lgamma_r(float4, __local int4 *); +float8 __ovld lgamma_r(float8, __local int8 *); +float16 __ovld lgamma_r(float16, __local int16 *); +float __ovld lgamma_r(float, __private int *); +float2 __ovld lgamma_r(float2, __private int2 *); +float3 __ovld lgamma_r(float3, __private int3 *); +float4 __ovld lgamma_r(float4, __private int4 *); +float8 __ovld lgamma_r(float8, __private int8 *); +float16 __ovld lgamma_r(float16, __private int16 *); +#ifdef cl_khr_fp64 +double __ovld lgamma_r(double, __global int *); +double2 __ovld lgamma_r(double2, __global int2 *); +double3 __ovld lgamma_r(double3, __global int3 *); +double4 __ovld lgamma_r(double4, __global int4 *); +double8 __ovld lgamma_r(double8, __global int8 *); +double16 __ovld lgamma_r(double16, __global int16 *); +double __ovld lgamma_r(double, __local int *); +double2 __ovld lgamma_r(double2, __local int2 *); +double3 __ovld lgamma_r(double3, __local int3 *); +double4 __ovld lgamma_r(double4, __local int4 *); +double8 __ovld lgamma_r(double8, __local int8 *); +double16 __ovld lgamma_r(double16, __local int16 *); +double __ovld lgamma_r(double, __private int *); +double2 __ovld lgamma_r(double2, __private int2 *); +double3 __ovld lgamma_r(double3, __private int3 *); +double4 __ovld lgamma_r(double4, __private int4 *); +double8 __ovld lgamma_r(double8, __private int8 *); +double16 __ovld lgamma_r(double16, __private int16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld lgamma_r(half, __global int *); +half2 __ovld lgamma_r(half2, __global int2 *); +half3 __ovld lgamma_r(half3, __global int3 *); +half4 __ovld lgamma_r(half4, __global int4 *); +half8 __ovld lgamma_r(half8, __global int8 *); +half16 __ovld lgamma_r(half16, __global int16 *); +half __ovld lgamma_r(half, __local int *); +half2 __ovld lgamma_r(half2, __local int2 *); +half3 __ovld lgamma_r(half3, __local int3 *); +half4 __ovld lgamma_r(half4, __local int4 *); +half8 __ovld lgamma_r(half8, __local int8 *); +half16 __ovld lgamma_r(half16, __local int16 *); +half __ovld lgamma_r(half, __private int *); +half2 __ovld lgamma_r(half2, __private int2 *); +half3 __ovld lgamma_r(half3, __private int3 *); +half4 __ovld lgamma_r(half4, __private int4 *); +half8 __ovld lgamma_r(half8, __private int8 *); +half16 __ovld lgamma_r(half16, __private int16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Compute natural logarithm. + */ +float __ovld __cnfn log(float); +float2 __ovld __cnfn log(float2); +float3 __ovld __cnfn log(float3); +float4 __ovld __cnfn log(float4); +float8 __ovld __cnfn log(float8); +float16 __ovld __cnfn log(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log(double); +double2 __ovld __cnfn log(double2); +double3 __ovld __cnfn log(double3); +double4 __ovld __cnfn log(double4); +double8 __ovld __cnfn log(double8); +double16 __ovld __cnfn log(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log(half); +half2 __ovld __cnfn log(half2); +half3 __ovld __cnfn log(half3); +half4 __ovld __cnfn log(half4); +half8 __ovld __cnfn log(half8); +half16 __ovld __cnfn log(half16); +#endif //cl_khr_fp16 + +/** + * Compute a base 2 logarithm. + */ +float __ovld __cnfn log2(float); +float2 __ovld __cnfn log2(float2); +float3 __ovld __cnfn log2(float3); +float4 __ovld __cnfn log2(float4); +float8 __ovld __cnfn log2(float8); +float16 __ovld __cnfn log2(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log2(double); +double2 __ovld __cnfn log2(double2); +double3 __ovld __cnfn log2(double3); +double4 __ovld __cnfn log2(double4); +double8 __ovld __cnfn log2(double8); +double16 __ovld __cnfn log2(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log2(half); +half2 __ovld __cnfn log2(half2); +half3 __ovld __cnfn log2(half3); +half4 __ovld __cnfn log2(half4); +half8 __ovld __cnfn log2(half8); +half16 __ovld __cnfn log2(half16); +#endif //cl_khr_fp16 + +/** + * Compute a base 10 logarithm. + */ +float __ovld __cnfn log10(float); +float2 __ovld __cnfn log10(float2); +float3 __ovld __cnfn log10(float3); +float4 __ovld __cnfn log10(float4); +float8 __ovld __cnfn log10(float8); +float16 __ovld __cnfn log10(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log10(double); +double2 __ovld __cnfn log10(double2); +double3 __ovld __cnfn log10(double3); +double4 __ovld __cnfn log10(double4); +double8 __ovld __cnfn log10(double8); +double16 __ovld __cnfn log10(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log10(half); +half2 __ovld __cnfn log10(half2); +half3 __ovld __cnfn log10(half3); +half4 __ovld __cnfn log10(half4); +half8 __ovld __cnfn log10(half8); +half16 __ovld __cnfn log10(half16); +#endif //cl_khr_fp16 + +/** + * Compute a base e logarithm of (1.0 + x). + */ +float __ovld __cnfn log1p(float); +float2 __ovld __cnfn log1p(float2); +float3 __ovld __cnfn log1p(float3); +float4 __ovld __cnfn log1p(float4); +float8 __ovld __cnfn log1p(float8); +float16 __ovld __cnfn log1p(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log1p(double); +double2 __ovld __cnfn log1p(double2); +double3 __ovld __cnfn log1p(double3); +double4 __ovld __cnfn log1p(double4); +double8 __ovld __cnfn log1p(double8); +double16 __ovld __cnfn log1p(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log1p(half); +half2 __ovld __cnfn log1p(half2); +half3 __ovld __cnfn log1p(half3); +half4 __ovld __cnfn log1p(half4); +half8 __ovld __cnfn log1p(half8); +half16 __ovld __cnfn log1p(half16); +#endif //cl_khr_fp16 + +/** + * Compute the exponent of x, which is the integral + * part of logr | x |. + */ +float __ovld __cnfn logb(float); +float2 __ovld __cnfn logb(float2); +float3 __ovld __cnfn logb(float3); +float4 __ovld __cnfn logb(float4); +float8 __ovld __cnfn logb(float8); +float16 __ovld __cnfn logb(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn logb(double); +double2 __ovld __cnfn logb(double2); +double3 __ovld __cnfn logb(double3); +double4 __ovld __cnfn logb(double4); +double8 __ovld __cnfn logb(double8); +double16 __ovld __cnfn logb(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn logb(half); +half2 __ovld __cnfn logb(half2); +half3 __ovld __cnfn logb(half3); +half4 __ovld __cnfn logb(half4); +half8 __ovld __cnfn logb(half8); +half16 __ovld __cnfn logb(half16); +#endif //cl_khr_fp16 + +/** + * mad approximates a * b + c. Whether or how the + * product of a * b is rounded and how supernormal or + * subnormal intermediate products are handled is not + * defined. mad is intended to be used where speed is + * preferred over accuracy. + */ +float __ovld __cnfn mad(float, float, float); +float2 __ovld __cnfn mad(float2, float2, float2); +float3 __ovld __cnfn mad(float3, float3, float3); +float4 __ovld __cnfn mad(float4, float4, float4); +float8 __ovld __cnfn mad(float8, float8, float8); +float16 __ovld __cnfn mad(float16, float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn mad(double, double, double); +double2 __ovld __cnfn mad(double2, double2, double2); +double3 __ovld __cnfn mad(double3, double3, double3); +double4 __ovld __cnfn mad(double4, double4, double4); +double8 __ovld __cnfn mad(double8, double8, double8); +double16 __ovld __cnfn mad(double16, double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn mad(half, half, half); +half2 __ovld __cnfn mad(half2, half2, half2); +half3 __ovld __cnfn mad(half3, half3, half3); +half4 __ovld __cnfn mad(half4, half4, half4); +half8 __ovld __cnfn mad(half8, half8, half8); +half16 __ovld __cnfn mad(half16, half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns x if | x | > | y |, y if | y | > | x |, otherwise + * fmax(x, y). + */ +float __ovld __cnfn maxmag(float, float); +float2 __ovld __cnfn maxmag(float2, float2); +float3 __ovld __cnfn maxmag(float3, float3); +float4 __ovld __cnfn maxmag(float4, float4); +float8 __ovld __cnfn maxmag(float8, float8); +float16 __ovld __cnfn maxmag(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn maxmag(double, double); +double2 __ovld __cnfn maxmag(double2, double2); +double3 __ovld __cnfn maxmag(double3, double3); +double4 __ovld __cnfn maxmag(double4, double4); +double8 __ovld __cnfn maxmag(double8, double8); +double16 __ovld __cnfn maxmag(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn maxmag(half, half); +half2 __ovld __cnfn maxmag(half2, half2); +half3 __ovld __cnfn maxmag(half3, half3); +half4 __ovld __cnfn maxmag(half4, half4); +half8 __ovld __cnfn maxmag(half8, half8); +half16 __ovld __cnfn maxmag(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns x if | x | < | y |, y if | y | < | x |, otherwise + * fmin(x, y). + */ +float __ovld __cnfn minmag(float, float); +float2 __ovld __cnfn minmag(float2, float2); +float3 __ovld __cnfn minmag(float3, float3); +float4 __ovld __cnfn minmag(float4, float4); +float8 __ovld __cnfn minmag(float8, float8); +float16 __ovld __cnfn minmag(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn minmag(double, double); +double2 __ovld __cnfn minmag(double2, double2); +double3 __ovld __cnfn minmag(double3, double3); +double4 __ovld __cnfn minmag(double4, double4); +double8 __ovld __cnfn minmag(double8, double8); +double16 __ovld __cnfn minmag(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn minmag(half, half); +half2 __ovld __cnfn minmag(half2, half2); +half3 __ovld __cnfn minmag(half3, half3); +half4 __ovld __cnfn minmag(half4, half4); +half8 __ovld __cnfn minmag(half8, half8); +half16 __ovld __cnfn minmag(half16, half16); +#endif //cl_khr_fp16 + +/** + * Decompose a floating-point number. The modf + * function breaks the argument x into integral and + * fractional parts, each of which has the same sign as + * the argument. It stores the integral part in the object + * pointed to by iptr. + */ +#if defined(__opencl_c_generic_address_space) +float __ovld modf(float, float *); +float2 __ovld modf(float2, float2 *); +float3 __ovld modf(float3, float3 *); +float4 __ovld modf(float4, float4 *); +float8 __ovld modf(float8, float8 *); +float16 __ovld modf(float16, float16 *); +#ifdef cl_khr_fp64 +double __ovld modf(double, double *); +double2 __ovld modf(double2, double2 *); +double3 __ovld modf(double3, double3 *); +double4 __ovld modf(double4, double4 *); +double8 __ovld modf(double8, double8 *); +double16 __ovld modf(double16, double16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld modf(half, half *); +half2 __ovld modf(half2, half2 *); +half3 __ovld modf(half3, half3 *); +half4 __ovld modf(half4, half4 *); +half8 __ovld modf(half8, half8 *); +half16 __ovld modf(half16, half16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld modf(float, __global float *); +float2 __ovld modf(float2, __global float2 *); +float3 __ovld modf(float3, __global float3 *); +float4 __ovld modf(float4, __global float4 *); +float8 __ovld modf(float8, __global float8 *); +float16 __ovld modf(float16, __global float16 *); +float __ovld modf(float, __local float *); +float2 __ovld modf(float2, __local float2 *); +float3 __ovld modf(float3, __local float3 *); +float4 __ovld modf(float4, __local float4 *); +float8 __ovld modf(float8, __local float8 *); +float16 __ovld modf(float16, __local float16 *); +float __ovld modf(float, __private float *); +float2 __ovld modf(float2, __private float2 *); +float3 __ovld modf(float3, __private float3 *); +float4 __ovld modf(float4, __private float4 *); +float8 __ovld modf(float8, __private float8 *); +float16 __ovld modf(float16, __private float16 *); +#ifdef cl_khr_fp64 +double __ovld modf(double, __global double *); +double2 __ovld modf(double2, __global double2 *); +double3 __ovld modf(double3, __global double3 *); +double4 __ovld modf(double4, __global double4 *); +double8 __ovld modf(double8, __global double8 *); +double16 __ovld modf(double16, __global double16 *); +double __ovld modf(double, __local double *); +double2 __ovld modf(double2, __local double2 *); +double3 __ovld modf(double3, __local double3 *); +double4 __ovld modf(double4, __local double4 *); +double8 __ovld modf(double8, __local double8 *); +double16 __ovld modf(double16, __local double16 *); +double __ovld modf(double, __private double *); +double2 __ovld modf(double2, __private double2 *); +double3 __ovld modf(double3, __private double3 *); +double4 __ovld modf(double4, __private double4 *); +double8 __ovld modf(double8, __private double8 *); +double16 __ovld modf(double16, __private double16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld modf(half, __global half *); +half2 __ovld modf(half2, __global half2 *); +half3 __ovld modf(half3, __global half3 *); +half4 __ovld modf(half4, __global half4 *); +half8 __ovld modf(half8, __global half8 *); +half16 __ovld modf(half16, __global half16 *); +half __ovld modf(half, __local half *); +half2 __ovld modf(half2, __local half2 *); +half3 __ovld modf(half3, __local half3 *); +half4 __ovld modf(half4, __local half4 *); +half8 __ovld modf(half8, __local half8 *); +half16 __ovld modf(half16, __local half16 *); +half __ovld modf(half, __private half *); +half2 __ovld modf(half2, __private half2 *); +half3 __ovld modf(half3, __private half3 *); +half4 __ovld modf(half4, __private half4 *); +half8 __ovld modf(half8, __private half8 *); +half16 __ovld modf(half16, __private half16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Returns a quiet NaN. The nancode may be placed + * in the significand of the resulting NaN. + */ +float __ovld __cnfn nan(uint); +float2 __ovld __cnfn nan(uint2); +float3 __ovld __cnfn nan(uint3); +float4 __ovld __cnfn nan(uint4); +float8 __ovld __cnfn nan(uint8); +float16 __ovld __cnfn nan(uint16); +#ifdef cl_khr_fp64 +double __ovld __cnfn nan(ulong); +double2 __ovld __cnfn nan(ulong2); +double3 __ovld __cnfn nan(ulong3); +double4 __ovld __cnfn nan(ulong4); +double8 __ovld __cnfn nan(ulong8); +double16 __ovld __cnfn nan(ulong16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn nan(ushort); +half2 __ovld __cnfn nan(ushort2); +half3 __ovld __cnfn nan(ushort3); +half4 __ovld __cnfn nan(ushort4); +half8 __ovld __cnfn nan(ushort8); +half16 __ovld __cnfn nan(ushort16); +#endif //cl_khr_fp16 + +/** + * Computes the next representable single-precision + * floating-point value following x in the direction of + * y. Thus, if y is less than x, nextafter() returns the + * largest representable floating-point number less + * than x. + */ +float __ovld __cnfn nextafter(float, float); +float2 __ovld __cnfn nextafter(float2, float2); +float3 __ovld __cnfn nextafter(float3, float3); +float4 __ovld __cnfn nextafter(float4, float4); +float8 __ovld __cnfn nextafter(float8, float8); +float16 __ovld __cnfn nextafter(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn nextafter(double, double); +double2 __ovld __cnfn nextafter(double2, double2); +double3 __ovld __cnfn nextafter(double3, double3); +double4 __ovld __cnfn nextafter(double4, double4); +double8 __ovld __cnfn nextafter(double8, double8); +double16 __ovld __cnfn nextafter(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn nextafter(half, half); +half2 __ovld __cnfn nextafter(half2, half2); +half3 __ovld __cnfn nextafter(half3, half3); +half4 __ovld __cnfn nextafter(half4, half4); +half8 __ovld __cnfn nextafter(half8, half8); +half16 __ovld __cnfn nextafter(half16, half16); +#endif //cl_khr_fp16 + +/** + * Compute x to the power y. + */ +float __ovld __cnfn pow(float, float); +float2 __ovld __cnfn pow(float2, float2); +float3 __ovld __cnfn pow(float3, float3); +float4 __ovld __cnfn pow(float4, float4); +float8 __ovld __cnfn pow(float8, float8); +float16 __ovld __cnfn pow(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn pow(double, double); +double2 __ovld __cnfn pow(double2, double2); +double3 __ovld __cnfn pow(double3, double3); +double4 __ovld __cnfn pow(double4, double4); +double8 __ovld __cnfn pow(double8, double8); +double16 __ovld __cnfn pow(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn pow(half, half); +half2 __ovld __cnfn pow(half2, half2); +half3 __ovld __cnfn pow(half3, half3); +half4 __ovld __cnfn pow(half4, half4); +half8 __ovld __cnfn pow(half8, half8); +half16 __ovld __cnfn pow(half16, half16); +#endif //cl_khr_fp16 + +/** + * Compute x to the power y, where y is an integer. + */ +float __ovld __cnfn pown(float, int); +float2 __ovld __cnfn pown(float2, int2); +float3 __ovld __cnfn pown(float3, int3); +float4 __ovld __cnfn pown(float4, int4); +float8 __ovld __cnfn pown(float8, int8); +float16 __ovld __cnfn pown(float16, int16); +#ifdef cl_khr_fp64 +double __ovld __cnfn pown(double, int); +double2 __ovld __cnfn pown(double2, int2); +double3 __ovld __cnfn pown(double3, int3); +double4 __ovld __cnfn pown(double4, int4); +double8 __ovld __cnfn pown(double8, int8); +double16 __ovld __cnfn pown(double16, int16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn pown(half, int); +half2 __ovld __cnfn pown(half2, int2); +half3 __ovld __cnfn pown(half3, int3); +half4 __ovld __cnfn pown(half4, int4); +half8 __ovld __cnfn pown(half8, int8); +half16 __ovld __cnfn pown(half16, int16); +#endif //cl_khr_fp16 + +/** + * Compute x to the power y, where x is >= 0. + */ +float __ovld __cnfn powr(float, float); +float2 __ovld __cnfn powr(float2, float2); +float3 __ovld __cnfn powr(float3, float3); +float4 __ovld __cnfn powr(float4, float4); +float8 __ovld __cnfn powr(float8, float8); +float16 __ovld __cnfn powr(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn powr(double, double); +double2 __ovld __cnfn powr(double2, double2); +double3 __ovld __cnfn powr(double3, double3); +double4 __ovld __cnfn powr(double4, double4); +double8 __ovld __cnfn powr(double8, double8); +double16 __ovld __cnfn powr(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn powr(half, half); +half2 __ovld __cnfn powr(half2, half2); +half3 __ovld __cnfn powr(half3, half3); +half4 __ovld __cnfn powr(half4, half4); +half8 __ovld __cnfn powr(half8, half8); +half16 __ovld __cnfn powr(half16, half16); +#endif //cl_khr_fp16 + +/** + * Compute the value r such that r = x - n*y, where n + * is the integer nearest the exact value of x/y. If there + * are two integers closest to x/y, n shall be the even + * one. If r is zero, it is given the same sign as x. + */ +float __ovld __cnfn remainder(float, float); +float2 __ovld __cnfn remainder(float2, float2); +float3 __ovld __cnfn remainder(float3, float3); +float4 __ovld __cnfn remainder(float4, float4); +float8 __ovld __cnfn remainder(float8, float8); +float16 __ovld __cnfn remainder(float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn remainder(double, double); +double2 __ovld __cnfn remainder(double2, double2); +double3 __ovld __cnfn remainder(double3, double3); +double4 __ovld __cnfn remainder(double4, double4); +double8 __ovld __cnfn remainder(double8, double8); +double16 __ovld __cnfn remainder(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn remainder(half, half); +half2 __ovld __cnfn remainder(half2, half2); +half3 __ovld __cnfn remainder(half3, half3); +half4 __ovld __cnfn remainder(half4, half4); +half8 __ovld __cnfn remainder(half8, half8); +half16 __ovld __cnfn remainder(half16, half16); +#endif //cl_khr_fp16 + +/** + * The remquo function computes the value r such + * that r = x - n*y, where n is the integer nearest the + * exact value of x/y. If there are two integers closest + * to x/y, n shall be the even one. If r is zero, it is + * given the same sign as x. This is the same value + * that is returned by the remainder function. + * remquo also calculates the lower seven bits of the + * integral quotient x/y, and gives that value the same + * sign as x/y. It stores this signed value in the object + * pointed to by quo. + */ +#if defined(__opencl_c_generic_address_space) +float __ovld remquo(float, float, int *); +float2 __ovld remquo(float2, float2, int2 *); +float3 __ovld remquo(float3, float3, int3 *); +float4 __ovld remquo(float4, float4, int4 *); +float8 __ovld remquo(float8, float8, int8 *); +float16 __ovld remquo(float16, float16, int16 *); +#ifdef cl_khr_fp64 +double __ovld remquo(double, double, int *); +double2 __ovld remquo(double2, double2, int2 *); +double3 __ovld remquo(double3, double3, int3 *); +double4 __ovld remquo(double4, double4, int4 *); +double8 __ovld remquo(double8, double8, int8 *); +double16 __ovld remquo(double16, double16, int16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld remquo(half, half, int *); +half2 __ovld remquo(half2, half2, int2 *); +half3 __ovld remquo(half3, half3, int3 *); +half4 __ovld remquo(half4, half4, int4 *); +half8 __ovld remquo(half8, half8, int8 *); +half16 __ovld remquo(half16, half16, int16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld remquo(float, float, __global int *); +float2 __ovld remquo(float2, float2, __global int2 *); +float3 __ovld remquo(float3, float3, __global int3 *); +float4 __ovld remquo(float4, float4, __global int4 *); +float8 __ovld remquo(float8, float8, __global int8 *); +float16 __ovld remquo(float16, float16, __global int16 *); +float __ovld remquo(float, float, __local int *); +float2 __ovld remquo(float2, float2, __local int2 *); +float3 __ovld remquo(float3, float3, __local int3 *); +float4 __ovld remquo(float4, float4, __local int4 *); +float8 __ovld remquo(float8, float8, __local int8 *); +float16 __ovld remquo(float16, float16, __local int16 *); +float __ovld remquo(float, float, __private int *); +float2 __ovld remquo(float2, float2, __private int2 *); +float3 __ovld remquo(float3, float3, __private int3 *); +float4 __ovld remquo(float4, float4, __private int4 *); +float8 __ovld remquo(float8, float8, __private int8 *); +float16 __ovld remquo(float16, float16, __private int16 *); +#ifdef cl_khr_fp64 +double __ovld remquo(double, double, __global int *); +double2 __ovld remquo(double2, double2, __global int2 *); +double3 __ovld remquo(double3, double3, __global int3 *); +double4 __ovld remquo(double4, double4, __global int4 *); +double8 __ovld remquo(double8, double8, __global int8 *); +double16 __ovld remquo(double16, double16, __global int16 *); +double __ovld remquo(double, double, __local int *); +double2 __ovld remquo(double2, double2, __local int2 *); +double3 __ovld remquo(double3, double3, __local int3 *); +double4 __ovld remquo(double4, double4, __local int4 *); +double8 __ovld remquo(double8, double8, __local int8 *); +double16 __ovld remquo(double16, double16, __local int16 *); +double __ovld remquo(double, double, __private int *); +double2 __ovld remquo(double2, double2, __private int2 *); +double3 __ovld remquo(double3, double3, __private int3 *); +double4 __ovld remquo(double4, double4, __private int4 *); +double8 __ovld remquo(double8, double8, __private int8 *); +double16 __ovld remquo(double16, double16, __private int16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld remquo(half, half, __global int *); +half2 __ovld remquo(half2, half2, __global int2 *); +half3 __ovld remquo(half3, half3, __global int3 *); +half4 __ovld remquo(half4, half4, __global int4 *); +half8 __ovld remquo(half8, half8, __global int8 *); +half16 __ovld remquo(half16, half16, __global int16 *); +half __ovld remquo(half, half, __local int *); +half2 __ovld remquo(half2, half2, __local int2 *); +half3 __ovld remquo(half3, half3, __local int3 *); +half4 __ovld remquo(half4, half4, __local int4 *); +half8 __ovld remquo(half8, half8, __local int8 *); +half16 __ovld remquo(half16, half16, __local int16 *); +half __ovld remquo(half, half, __private int *); +half2 __ovld remquo(half2, half2, __private int2 *); +half3 __ovld remquo(half3, half3, __private int3 *); +half4 __ovld remquo(half4, half4, __private int4 *); +half8 __ovld remquo(half8, half8, __private int8 *); +half16 __ovld remquo(half16, half16, __private int16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) +/** + * Round to integral value (using round to nearest + * even rounding mode) in floating-point format. + * Refer to section 7.1 for description of rounding + * modes. + */ +float __ovld __cnfn rint(float); +float2 __ovld __cnfn rint(float2); +float3 __ovld __cnfn rint(float3); +float4 __ovld __cnfn rint(float4); +float8 __ovld __cnfn rint(float8); +float16 __ovld __cnfn rint(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn rint(double); +double2 __ovld __cnfn rint(double2); +double3 __ovld __cnfn rint(double3); +double4 __ovld __cnfn rint(double4); +double8 __ovld __cnfn rint(double8); +double16 __ovld __cnfn rint(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn rint(half); +half2 __ovld __cnfn rint(half2); +half3 __ovld __cnfn rint(half3); +half4 __ovld __cnfn rint(half4); +half8 __ovld __cnfn rint(half8); +half16 __ovld __cnfn rint(half16); +#endif //cl_khr_fp16 + +/** + * Compute x to the power 1/y. + */ +float __ovld __cnfn rootn(float, int); +float2 __ovld __cnfn rootn(float2, int2); +float3 __ovld __cnfn rootn(float3, int3); +float4 __ovld __cnfn rootn(float4, int4); +float8 __ovld __cnfn rootn(float8, int8); +float16 __ovld __cnfn rootn(float16, int16); +#ifdef cl_khr_fp64 +double __ovld __cnfn rootn(double, int); +double2 __ovld __cnfn rootn(double2, int2); +double3 __ovld __cnfn rootn(double3, int3); +double4 __ovld __cnfn rootn(double4, int4); +double8 __ovld __cnfn rootn(double8, int8); +double16 __ovld __cnfn rootn(double16, int16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn rootn(half, int); +half2 __ovld __cnfn rootn(half2, int2); +half3 __ovld __cnfn rootn(half3, int3); +half4 __ovld __cnfn rootn(half4, int4); +half8 __ovld __cnfn rootn(half8, int8); +half16 __ovld __cnfn rootn(half16, int16); +#endif //cl_khr_fp16 + +/** + * Return the integral value nearest to x rounding + * halfway cases away from zero, regardless of the + * current rounding direction. + */ +float __ovld __cnfn round(float); +float2 __ovld __cnfn round(float2); +float3 __ovld __cnfn round(float3); +float4 __ovld __cnfn round(float4); +float8 __ovld __cnfn round(float8); +float16 __ovld __cnfn round(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn round(double); +double2 __ovld __cnfn round(double2); +double3 __ovld __cnfn round(double3); +double4 __ovld __cnfn round(double4); +double8 __ovld __cnfn round(double8); +double16 __ovld __cnfn round(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn round(half); +half2 __ovld __cnfn round(half2); +half3 __ovld __cnfn round(half3); +half4 __ovld __cnfn round(half4); +half8 __ovld __cnfn round(half8); +half16 __ovld __cnfn round(half16); +#endif //cl_khr_fp16 + +/** + * Compute inverse square root. + */ +float __ovld __cnfn rsqrt(float); +float2 __ovld __cnfn rsqrt(float2); +float3 __ovld __cnfn rsqrt(float3); +float4 __ovld __cnfn rsqrt(float4); +float8 __ovld __cnfn rsqrt(float8); +float16 __ovld __cnfn rsqrt(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn rsqrt(double); +double2 __ovld __cnfn rsqrt(double2); +double3 __ovld __cnfn rsqrt(double3); +double4 __ovld __cnfn rsqrt(double4); +double8 __ovld __cnfn rsqrt(double8); +double16 __ovld __cnfn rsqrt(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn rsqrt(half); +half2 __ovld __cnfn rsqrt(half2); +half3 __ovld __cnfn rsqrt(half3); +half4 __ovld __cnfn rsqrt(half4); +half8 __ovld __cnfn rsqrt(half8); +half16 __ovld __cnfn rsqrt(half16); +#endif //cl_khr_fp16 + +/** + * Compute sine. + */ +float __ovld __cnfn sin(float); +float2 __ovld __cnfn sin(float2); +float3 __ovld __cnfn sin(float3); +float4 __ovld __cnfn sin(float4); +float8 __ovld __cnfn sin(float8); +float16 __ovld __cnfn sin(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sin(double); +double2 __ovld __cnfn sin(double2); +double3 __ovld __cnfn sin(double3); +double4 __ovld __cnfn sin(double4); +double8 __ovld __cnfn sin(double8); +double16 __ovld __cnfn sin(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sin(half); +half2 __ovld __cnfn sin(half2); +half3 __ovld __cnfn sin(half3); +half4 __ovld __cnfn sin(half4); +half8 __ovld __cnfn sin(half8); +half16 __ovld __cnfn sin(half16); +#endif //cl_khr_fp16 + +/** + * Compute sine and cosine of x. The computed sine + * is the return value and computed cosine is returned + * in cosval. + */ +#if defined(__opencl_c_generic_address_space) +float __ovld sincos(float, float *); +float2 __ovld sincos(float2, float2 *); +float3 __ovld sincos(float3, float3 *); +float4 __ovld sincos(float4, float4 *); +float8 __ovld sincos(float8, float8 *); +float16 __ovld sincos(float16, float16 *); +#ifdef cl_khr_fp64 +double __ovld sincos(double, double *); +double2 __ovld sincos(double2, double2 *); +double3 __ovld sincos(double3, double3 *); +double4 __ovld sincos(double4, double4 *); +double8 __ovld sincos(double8, double8 *); +double16 __ovld sincos(double16, double16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld sincos(half, half *); +half2 __ovld sincos(half2, half2 *); +half3 __ovld sincos(half3, half3 *); +half4 __ovld sincos(half4, half4 *); +half8 __ovld sincos(half8, half8 *); +half16 __ovld sincos(half16, half16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld sincos(float, __global float *); +float2 __ovld sincos(float2, __global float2 *); +float3 __ovld sincos(float3, __global float3 *); +float4 __ovld sincos(float4, __global float4 *); +float8 __ovld sincos(float8, __global float8 *); +float16 __ovld sincos(float16, __global float16 *); +float __ovld sincos(float, __local float *); +float2 __ovld sincos(float2, __local float2 *); +float3 __ovld sincos(float3, __local float3 *); +float4 __ovld sincos(float4, __local float4 *); +float8 __ovld sincos(float8, __local float8 *); +float16 __ovld sincos(float16, __local float16 *); +float __ovld sincos(float, __private float *); +float2 __ovld sincos(float2, __private float2 *); +float3 __ovld sincos(float3, __private float3 *); +float4 __ovld sincos(float4, __private float4 *); +float8 __ovld sincos(float8, __private float8 *); +float16 __ovld sincos(float16, __private float16 *); +#ifdef cl_khr_fp64 +double __ovld sincos(double, __global double *); +double2 __ovld sincos(double2, __global double2 *); +double3 __ovld sincos(double3, __global double3 *); +double4 __ovld sincos(double4, __global double4 *); +double8 __ovld sincos(double8, __global double8 *); +double16 __ovld sincos(double16, __global double16 *); +double __ovld sincos(double, __local double *); +double2 __ovld sincos(double2, __local double2 *); +double3 __ovld sincos(double3, __local double3 *); +double4 __ovld sincos(double4, __local double4 *); +double8 __ovld sincos(double8, __local double8 *); +double16 __ovld sincos(double16, __local double16 *); +double __ovld sincos(double, __private double *); +double2 __ovld sincos(double2, __private double2 *); +double3 __ovld sincos(double3, __private double3 *); +double4 __ovld sincos(double4, __private double4 *); +double8 __ovld sincos(double8, __private double8 *); +double16 __ovld sincos(double16, __private double16 *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld sincos(half, __global half *); +half2 __ovld sincos(half2, __global half2 *); +half3 __ovld sincos(half3, __global half3 *); +half4 __ovld sincos(half4, __global half4 *); +half8 __ovld sincos(half8, __global half8 *); +half16 __ovld sincos(half16, __global half16 *); +half __ovld sincos(half, __local half *); +half2 __ovld sincos(half2, __local half2 *); +half3 __ovld sincos(half3, __local half3 *); +half4 __ovld sincos(half4, __local half4 *); +half8 __ovld sincos(half8, __local half8 *); +half16 __ovld sincos(half16, __local half16 *); +half __ovld sincos(half, __private half *); +half2 __ovld sincos(half2, __private half2 *); +half3 __ovld sincos(half3, __private half3 *); +half4 __ovld sincos(half4, __private half4 *); +half8 __ovld sincos(half8, __private half8 *); +half16 __ovld sincos(half16, __private half16 *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Compute hyperbolic sine. + */ +float __ovld __cnfn sinh(float); +float2 __ovld __cnfn sinh(float2); +float3 __ovld __cnfn sinh(float3); +float4 __ovld __cnfn sinh(float4); +float8 __ovld __cnfn sinh(float8); +float16 __ovld __cnfn sinh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sinh(double); +double2 __ovld __cnfn sinh(double2); +double3 __ovld __cnfn sinh(double3); +double4 __ovld __cnfn sinh(double4); +double8 __ovld __cnfn sinh(double8); +double16 __ovld __cnfn sinh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sinh(half); +half2 __ovld __cnfn sinh(half2); +half3 __ovld __cnfn sinh(half3); +half4 __ovld __cnfn sinh(half4); +half8 __ovld __cnfn sinh(half8); +half16 __ovld __cnfn sinh(half16); +#endif //cl_khr_fp16 + +/** + * Compute sin (PI * x). + */ +float __ovld __cnfn sinpi(float); +float2 __ovld __cnfn sinpi(float2); +float3 __ovld __cnfn sinpi(float3); +float4 __ovld __cnfn sinpi(float4); +float8 __ovld __cnfn sinpi(float8); +float16 __ovld __cnfn sinpi(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sinpi(double); +double2 __ovld __cnfn sinpi(double2); +double3 __ovld __cnfn sinpi(double3); +double4 __ovld __cnfn sinpi(double4); +double8 __ovld __cnfn sinpi(double8); +double16 __ovld __cnfn sinpi(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sinpi(half); +half2 __ovld __cnfn sinpi(half2); +half3 __ovld __cnfn sinpi(half3); +half4 __ovld __cnfn sinpi(half4); +half8 __ovld __cnfn sinpi(half8); +half16 __ovld __cnfn sinpi(half16); +#endif //cl_khr_fp16 + +/** + * Compute square root. + */ +float __ovld __cnfn sqrt(float); +float2 __ovld __cnfn sqrt(float2); +float3 __ovld __cnfn sqrt(float3); +float4 __ovld __cnfn sqrt(float4); +float8 __ovld __cnfn sqrt(float8); +float16 __ovld __cnfn sqrt(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sqrt(double); +double2 __ovld __cnfn sqrt(double2); +double3 __ovld __cnfn sqrt(double3); +double4 __ovld __cnfn sqrt(double4); +double8 __ovld __cnfn sqrt(double8); +double16 __ovld __cnfn sqrt(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sqrt(half); +half2 __ovld __cnfn sqrt(half2); +half3 __ovld __cnfn sqrt(half3); +half4 __ovld __cnfn sqrt(half4); +half8 __ovld __cnfn sqrt(half8); +half16 __ovld __cnfn sqrt(half16); +#endif //cl_khr_fp16 + +/** + * Compute tangent. + */ +float __ovld __cnfn tan(float); +float2 __ovld __cnfn tan(float2); +float3 __ovld __cnfn tan(float3); +float4 __ovld __cnfn tan(float4); +float8 __ovld __cnfn tan(float8); +float16 __ovld __cnfn tan(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tan(double); +double2 __ovld __cnfn tan(double2); +double3 __ovld __cnfn tan(double3); +double4 __ovld __cnfn tan(double4); +double8 __ovld __cnfn tan(double8); +double16 __ovld __cnfn tan(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tan(half); +half2 __ovld __cnfn tan(half2); +half3 __ovld __cnfn tan(half3); +half4 __ovld __cnfn tan(half4); +half8 __ovld __cnfn tan(half8); +half16 __ovld __cnfn tan(half16); +#endif //cl_khr_fp16 + +/** + * Compute hyperbolic tangent. + */ +float __ovld __cnfn tanh(float); +float2 __ovld __cnfn tanh(float2); +float3 __ovld __cnfn tanh(float3); +float4 __ovld __cnfn tanh(float4); +float8 __ovld __cnfn tanh(float8); +float16 __ovld __cnfn tanh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tanh(double); +double2 __ovld __cnfn tanh(double2); +double3 __ovld __cnfn tanh(double3); +double4 __ovld __cnfn tanh(double4); +double8 __ovld __cnfn tanh(double8); +double16 __ovld __cnfn tanh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tanh(half); +half2 __ovld __cnfn tanh(half2); +half3 __ovld __cnfn tanh(half3); +half4 __ovld __cnfn tanh(half4); +half8 __ovld __cnfn tanh(half8); +half16 __ovld __cnfn tanh(half16); +#endif //cl_khr_fp16 + +/** + * Compute tan (PI * x). + */ +float __ovld __cnfn tanpi(float); +float2 __ovld __cnfn tanpi(float2); +float3 __ovld __cnfn tanpi(float3); +float4 __ovld __cnfn tanpi(float4); +float8 __ovld __cnfn tanpi(float8); +float16 __ovld __cnfn tanpi(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tanpi(double); +double2 __ovld __cnfn tanpi(double2); +double3 __ovld __cnfn tanpi(double3); +double4 __ovld __cnfn tanpi(double4); +double8 __ovld __cnfn tanpi(double8); +double16 __ovld __cnfn tanpi(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tanpi(half); +half2 __ovld __cnfn tanpi(half2); +half3 __ovld __cnfn tanpi(half3); +half4 __ovld __cnfn tanpi(half4); +half8 __ovld __cnfn tanpi(half8); +half16 __ovld __cnfn tanpi(half16); +#endif //cl_khr_fp16 + +/** + * Compute the gamma function. + */ +float __ovld __cnfn tgamma(float); +float2 __ovld __cnfn tgamma(float2); +float3 __ovld __cnfn tgamma(float3); +float4 __ovld __cnfn tgamma(float4); +float8 __ovld __cnfn tgamma(float8); +float16 __ovld __cnfn tgamma(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tgamma(double); +double2 __ovld __cnfn tgamma(double2); +double3 __ovld __cnfn tgamma(double3); +double4 __ovld __cnfn tgamma(double4); +double8 __ovld __cnfn tgamma(double8); +double16 __ovld __cnfn tgamma(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tgamma(half); +half2 __ovld __cnfn tgamma(half2); +half3 __ovld __cnfn tgamma(half3); +half4 __ovld __cnfn tgamma(half4); +half8 __ovld __cnfn tgamma(half8); +half16 __ovld __cnfn tgamma(half16); +#endif //cl_khr_fp16 + +/** + * Round to integral value using the round to zero + * rounding mode. + */ +float __ovld __cnfn trunc(float); +float2 __ovld __cnfn trunc(float2); +float3 __ovld __cnfn trunc(float3); +float4 __ovld __cnfn trunc(float4); +float8 __ovld __cnfn trunc(float8); +float16 __ovld __cnfn trunc(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn trunc(double); +double2 __ovld __cnfn trunc(double2); +double3 __ovld __cnfn trunc(double3); +double4 __ovld __cnfn trunc(double4); +double8 __ovld __cnfn trunc(double8); +double16 __ovld __cnfn trunc(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn trunc(half); +half2 __ovld __cnfn trunc(half2); +half3 __ovld __cnfn trunc(half3); +half4 __ovld __cnfn trunc(half4); +half8 __ovld __cnfn trunc(half8); +half16 __ovld __cnfn trunc(half16); +#endif //cl_khr_fp16 + +/** + * Compute cosine. x must be in the range -2^16 ... +2^16. + */ +float __ovld __cnfn half_cos(float); +float2 __ovld __cnfn half_cos(float2); +float3 __ovld __cnfn half_cos(float3); +float4 __ovld __cnfn half_cos(float4); +float8 __ovld __cnfn half_cos(float8); +float16 __ovld __cnfn half_cos(float16); + +/** + * Compute x / y. + */ +float __ovld __cnfn half_divide(float, float); +float2 __ovld __cnfn half_divide(float2, float2); +float3 __ovld __cnfn half_divide(float3, float3); +float4 __ovld __cnfn half_divide(float4, float4); +float8 __ovld __cnfn half_divide(float8, float8); +float16 __ovld __cnfn half_divide(float16, float16); + +/** + * Compute the base- e exponential of x. + */ +float __ovld __cnfn half_exp(float); +float2 __ovld __cnfn half_exp(float2); +float3 __ovld __cnfn half_exp(float3); +float4 __ovld __cnfn half_exp(float4); +float8 __ovld __cnfn half_exp(float8); +float16 __ovld __cnfn half_exp(float16); + +/** + * Compute the base- 2 exponential of x. + */ +float __ovld __cnfn half_exp2(float); +float2 __ovld __cnfn half_exp2(float2); +float3 __ovld __cnfn half_exp2(float3); +float4 __ovld __cnfn half_exp2(float4); +float8 __ovld __cnfn half_exp2(float8); +float16 __ovld __cnfn half_exp2(float16); + +/** + * Compute the base- 10 exponential of x. + */ +float __ovld __cnfn half_exp10(float); +float2 __ovld __cnfn half_exp10(float2); +float3 __ovld __cnfn half_exp10(float3); +float4 __ovld __cnfn half_exp10(float4); +float8 __ovld __cnfn half_exp10(float8); +float16 __ovld __cnfn half_exp10(float16); + +/** + * Compute natural logarithm. + */ +float __ovld __cnfn half_log(float); +float2 __ovld __cnfn half_log(float2); +float3 __ovld __cnfn half_log(float3); +float4 __ovld __cnfn half_log(float4); +float8 __ovld __cnfn half_log(float8); +float16 __ovld __cnfn half_log(float16); + +/** + * Compute a base 2 logarithm. + */ +float __ovld __cnfn half_log2(float); +float2 __ovld __cnfn half_log2(float2); +float3 __ovld __cnfn half_log2(float3); +float4 __ovld __cnfn half_log2(float4); +float8 __ovld __cnfn half_log2(float8); +float16 __ovld __cnfn half_log2(float16); + +/** + * Compute a base 10 logarithm. + */ +float __ovld __cnfn half_log10(float); +float2 __ovld __cnfn half_log10(float2); +float3 __ovld __cnfn half_log10(float3); +float4 __ovld __cnfn half_log10(float4); +float8 __ovld __cnfn half_log10(float8); +float16 __ovld __cnfn half_log10(float16); + +/** + * Compute x to the power y, where x is >= 0. + */ +float __ovld __cnfn half_powr(float, float); +float2 __ovld __cnfn half_powr(float2, float2); +float3 __ovld __cnfn half_powr(float3, float3); +float4 __ovld __cnfn half_powr(float4, float4); +float8 __ovld __cnfn half_powr(float8, float8); +float16 __ovld __cnfn half_powr(float16, float16); + +/** + * Compute reciprocal. + */ +float __ovld __cnfn half_recip(float); +float2 __ovld __cnfn half_recip(float2); +float3 __ovld __cnfn half_recip(float3); +float4 __ovld __cnfn half_recip(float4); +float8 __ovld __cnfn half_recip(float8); +float16 __ovld __cnfn half_recip(float16); + +/** + * Compute inverse square root. + */ +float __ovld __cnfn half_rsqrt(float); +float2 __ovld __cnfn half_rsqrt(float2); +float3 __ovld __cnfn half_rsqrt(float3); +float4 __ovld __cnfn half_rsqrt(float4); +float8 __ovld __cnfn half_rsqrt(float8); +float16 __ovld __cnfn half_rsqrt(float16); + +/** + * Compute sine. x must be in the range -2^16 ... +2^16. + */ +float __ovld __cnfn half_sin(float); +float2 __ovld __cnfn half_sin(float2); +float3 __ovld __cnfn half_sin(float3); +float4 __ovld __cnfn half_sin(float4); +float8 __ovld __cnfn half_sin(float8); +float16 __ovld __cnfn half_sin(float16); + +/** + * Compute square root. + */ +float __ovld __cnfn half_sqrt(float); +float2 __ovld __cnfn half_sqrt(float2); +float3 __ovld __cnfn half_sqrt(float3); +float4 __ovld __cnfn half_sqrt(float4); +float8 __ovld __cnfn half_sqrt(float8); +float16 __ovld __cnfn half_sqrt(float16); + +/** + * Compute tangent. x must be in the range -216 ... +216. + */ +float __ovld __cnfn half_tan(float); +float2 __ovld __cnfn half_tan(float2); +float3 __ovld __cnfn half_tan(float3); +float4 __ovld __cnfn half_tan(float4); +float8 __ovld __cnfn half_tan(float8); +float16 __ovld __cnfn half_tan(float16); + +/** + * Compute cosine over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_cos(float); +float2 __ovld __cnfn native_cos(float2); +float3 __ovld __cnfn native_cos(float3); +float4 __ovld __cnfn native_cos(float4); +float8 __ovld __cnfn native_cos(float8); +float16 __ovld __cnfn native_cos(float16); + +/** + * Compute x / y over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_divide(float, float); +float2 __ovld __cnfn native_divide(float2, float2); +float3 __ovld __cnfn native_divide(float3, float3); +float4 __ovld __cnfn native_divide(float4, float4); +float8 __ovld __cnfn native_divide(float8, float8); +float16 __ovld __cnfn native_divide(float16, float16); + +/** + * Compute the base- e exponential of x over an + * implementation-defined range. The maximum error is + * implementation-defined. + */ +float __ovld __cnfn native_exp(float); +float2 __ovld __cnfn native_exp(float2); +float3 __ovld __cnfn native_exp(float3); +float4 __ovld __cnfn native_exp(float4); +float8 __ovld __cnfn native_exp(float8); +float16 __ovld __cnfn native_exp(float16); + +/** + * Compute the base- 2 exponential of x over an + * implementation-defined range. The maximum error is + * implementation-defined. + */ +float __ovld __cnfn native_exp2(float); +float2 __ovld __cnfn native_exp2(float2); +float3 __ovld __cnfn native_exp2(float3); +float4 __ovld __cnfn native_exp2(float4); +float8 __ovld __cnfn native_exp2(float8); +float16 __ovld __cnfn native_exp2(float16); + +/** + * Compute the base- 10 exponential of x over an + * implementation-defined range. The maximum error is + * implementation-defined. + */ +float __ovld __cnfn native_exp10(float); +float2 __ovld __cnfn native_exp10(float2); +float3 __ovld __cnfn native_exp10(float3); +float4 __ovld __cnfn native_exp10(float4); +float8 __ovld __cnfn native_exp10(float8); +float16 __ovld __cnfn native_exp10(float16); + +/** + * Compute natural logarithm over an implementationdefined + * range. The maximum error is implementation + * defined. + */ +float __ovld __cnfn native_log(float); +float2 __ovld __cnfn native_log(float2); +float3 __ovld __cnfn native_log(float3); +float4 __ovld __cnfn native_log(float4); +float8 __ovld __cnfn native_log(float8); +float16 __ovld __cnfn native_log(float16); + +/** + * Compute a base 2 logarithm over an implementationdefined + * range. The maximum error is implementationdefined. + */ +float __ovld __cnfn native_log2(float); +float2 __ovld __cnfn native_log2(float2); +float3 __ovld __cnfn native_log2(float3); +float4 __ovld __cnfn native_log2(float4); +float8 __ovld __cnfn native_log2(float8); +float16 __ovld __cnfn native_log2(float16); + +/** + * Compute a base 10 logarithm over an implementationdefined + * range. The maximum error is implementationdefined. + */ +float __ovld __cnfn native_log10(float); +float2 __ovld __cnfn native_log10(float2); +float3 __ovld __cnfn native_log10(float3); +float4 __ovld __cnfn native_log10(float4); +float8 __ovld __cnfn native_log10(float8); +float16 __ovld __cnfn native_log10(float16); + +/** + * Compute x to the power y, where x is >= 0. The range of + * x and y are implementation-defined. The maximum error + * is implementation-defined. + */ +float __ovld __cnfn native_powr(float, float); +float2 __ovld __cnfn native_powr(float2, float2); +float3 __ovld __cnfn native_powr(float3, float3); +float4 __ovld __cnfn native_powr(float4, float4); +float8 __ovld __cnfn native_powr(float8, float8); +float16 __ovld __cnfn native_powr(float16, float16); + +/** + * Compute reciprocal over an implementation-defined + * range. The maximum error is implementation-defined. + */ +float __ovld __cnfn native_recip(float); +float2 __ovld __cnfn native_recip(float2); +float3 __ovld __cnfn native_recip(float3); +float4 __ovld __cnfn native_recip(float4); +float8 __ovld __cnfn native_recip(float8); +float16 __ovld __cnfn native_recip(float16); + +/** + * Compute inverse square root over an implementationdefined + * range. The maximum error is implementationdefined. + */ +float __ovld __cnfn native_rsqrt(float); +float2 __ovld __cnfn native_rsqrt(float2); +float3 __ovld __cnfn native_rsqrt(float3); +float4 __ovld __cnfn native_rsqrt(float4); +float8 __ovld __cnfn native_rsqrt(float8); +float16 __ovld __cnfn native_rsqrt(float16); + +/** + * Compute sine over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_sin(float); +float2 __ovld __cnfn native_sin(float2); +float3 __ovld __cnfn native_sin(float3); +float4 __ovld __cnfn native_sin(float4); +float8 __ovld __cnfn native_sin(float8); +float16 __ovld __cnfn native_sin(float16); + +/** + * Compute square root over an implementation-defined + * range. The maximum error is implementation-defined. + */ +float __ovld __cnfn native_sqrt(float); +float2 __ovld __cnfn native_sqrt(float2); +float3 __ovld __cnfn native_sqrt(float3); +float4 __ovld __cnfn native_sqrt(float4); +float8 __ovld __cnfn native_sqrt(float8); +float16 __ovld __cnfn native_sqrt(float16); + +/** + * Compute tangent over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_tan(float); +float2 __ovld __cnfn native_tan(float2); +float3 __ovld __cnfn native_tan(float3); +float4 __ovld __cnfn native_tan(float4); +float8 __ovld __cnfn native_tan(float8); +float16 __ovld __cnfn native_tan(float16); + +// OpenCL v1.1 s6.11.3, v1.2 s6.12.3, v2.0 s6.13.3 - Integer Functions + +/** + * Returns | x |. + */ +uchar __ovld __cnfn abs(char); +uchar __ovld __cnfn abs(uchar); +uchar2 __ovld __cnfn abs(char2); +uchar2 __ovld __cnfn abs(uchar2); +uchar3 __ovld __cnfn abs(char3); +uchar3 __ovld __cnfn abs(uchar3); +uchar4 __ovld __cnfn abs(char4); +uchar4 __ovld __cnfn abs(uchar4); +uchar8 __ovld __cnfn abs(char8); +uchar8 __ovld __cnfn abs(uchar8); +uchar16 __ovld __cnfn abs(char16); +uchar16 __ovld __cnfn abs(uchar16); +ushort __ovld __cnfn abs(short); +ushort __ovld __cnfn abs(ushort); +ushort2 __ovld __cnfn abs(short2); +ushort2 __ovld __cnfn abs(ushort2); +ushort3 __ovld __cnfn abs(short3); +ushort3 __ovld __cnfn abs(ushort3); +ushort4 __ovld __cnfn abs(short4); +ushort4 __ovld __cnfn abs(ushort4); +ushort8 __ovld __cnfn abs(short8); +ushort8 __ovld __cnfn abs(ushort8); +ushort16 __ovld __cnfn abs(short16); +ushort16 __ovld __cnfn abs(ushort16); +uint __ovld __cnfn abs(int); +uint __ovld __cnfn abs(uint); +uint2 __ovld __cnfn abs(int2); +uint2 __ovld __cnfn abs(uint2); +uint3 __ovld __cnfn abs(int3); +uint3 __ovld __cnfn abs(uint3); +uint4 __ovld __cnfn abs(int4); +uint4 __ovld __cnfn abs(uint4); +uint8 __ovld __cnfn abs(int8); +uint8 __ovld __cnfn abs(uint8); +uint16 __ovld __cnfn abs(int16); +uint16 __ovld __cnfn abs(uint16); +ulong __ovld __cnfn abs(long); +ulong __ovld __cnfn abs(ulong); +ulong2 __ovld __cnfn abs(long2); +ulong2 __ovld __cnfn abs(ulong2); +ulong3 __ovld __cnfn abs(long3); +ulong3 __ovld __cnfn abs(ulong3); +ulong4 __ovld __cnfn abs(long4); +ulong4 __ovld __cnfn abs(ulong4); +ulong8 __ovld __cnfn abs(long8); +ulong8 __ovld __cnfn abs(ulong8); +ulong16 __ovld __cnfn abs(long16); +ulong16 __ovld __cnfn abs(ulong16); + +/** + * Returns | x - y | without modulo overflow. + */ +uchar __ovld __cnfn abs_diff(char, char); +uchar __ovld __cnfn abs_diff(uchar, uchar); +uchar2 __ovld __cnfn abs_diff(char2, char2); +uchar2 __ovld __cnfn abs_diff(uchar2, uchar2); +uchar3 __ovld __cnfn abs_diff(char3, char3); +uchar3 __ovld __cnfn abs_diff(uchar3, uchar3); +uchar4 __ovld __cnfn abs_diff(char4, char4); +uchar4 __ovld __cnfn abs_diff(uchar4, uchar4); +uchar8 __ovld __cnfn abs_diff(char8, char8); +uchar8 __ovld __cnfn abs_diff(uchar8, uchar8); +uchar16 __ovld __cnfn abs_diff(char16, char16); +uchar16 __ovld __cnfn abs_diff(uchar16, uchar16); +ushort __ovld __cnfn abs_diff(short, short); +ushort __ovld __cnfn abs_diff(ushort, ushort); +ushort2 __ovld __cnfn abs_diff(short2, short2); +ushort2 __ovld __cnfn abs_diff(ushort2, ushort2); +ushort3 __ovld __cnfn abs_diff(short3, short3); +ushort3 __ovld __cnfn abs_diff(ushort3, ushort3); +ushort4 __ovld __cnfn abs_diff(short4, short4); +ushort4 __ovld __cnfn abs_diff(ushort4, ushort4); +ushort8 __ovld __cnfn abs_diff(short8, short8); +ushort8 __ovld __cnfn abs_diff(ushort8, ushort8); +ushort16 __ovld __cnfn abs_diff(short16, short16); +ushort16 __ovld __cnfn abs_diff(ushort16, ushort16); +uint __ovld __cnfn abs_diff(int, int); +uint __ovld __cnfn abs_diff(uint, uint); +uint2 __ovld __cnfn abs_diff(int2, int2); +uint2 __ovld __cnfn abs_diff(uint2, uint2); +uint3 __ovld __cnfn abs_diff(int3, int3); +uint3 __ovld __cnfn abs_diff(uint3, uint3); +uint4 __ovld __cnfn abs_diff(int4, int4); +uint4 __ovld __cnfn abs_diff(uint4, uint4); +uint8 __ovld __cnfn abs_diff(int8, int8); +uint8 __ovld __cnfn abs_diff(uint8, uint8); +uint16 __ovld __cnfn abs_diff(int16, int16); +uint16 __ovld __cnfn abs_diff(uint16, uint16); +ulong __ovld __cnfn abs_diff(long, long); +ulong __ovld __cnfn abs_diff(ulong, ulong); +ulong2 __ovld __cnfn abs_diff(long2, long2); +ulong2 __ovld __cnfn abs_diff(ulong2, ulong2); +ulong3 __ovld __cnfn abs_diff(long3, long3); +ulong3 __ovld __cnfn abs_diff(ulong3, ulong3); +ulong4 __ovld __cnfn abs_diff(long4, long4); +ulong4 __ovld __cnfn abs_diff(ulong4, ulong4); +ulong8 __ovld __cnfn abs_diff(long8, long8); +ulong8 __ovld __cnfn abs_diff(ulong8, ulong8); +ulong16 __ovld __cnfn abs_diff(long16, long16); +ulong16 __ovld __cnfn abs_diff(ulong16, ulong16); + +/** + * Returns x + y and saturates the result. + */ +char __ovld __cnfn add_sat(char, char); +uchar __ovld __cnfn add_sat(uchar, uchar); +char2 __ovld __cnfn add_sat(char2, char2); +uchar2 __ovld __cnfn add_sat(uchar2, uchar2); +char3 __ovld __cnfn add_sat(char3, char3); +uchar3 __ovld __cnfn add_sat(uchar3, uchar3); +char4 __ovld __cnfn add_sat(char4, char4); +uchar4 __ovld __cnfn add_sat(uchar4, uchar4); +char8 __ovld __cnfn add_sat(char8, char8); +uchar8 __ovld __cnfn add_sat(uchar8, uchar8); +char16 __ovld __cnfn add_sat(char16, char16); +uchar16 __ovld __cnfn add_sat(uchar16, uchar16); +short __ovld __cnfn add_sat(short, short); +ushort __ovld __cnfn add_sat(ushort, ushort); +short2 __ovld __cnfn add_sat(short2, short2); +ushort2 __ovld __cnfn add_sat(ushort2, ushort2); +short3 __ovld __cnfn add_sat(short3, short3); +ushort3 __ovld __cnfn add_sat(ushort3, ushort3); +short4 __ovld __cnfn add_sat(short4, short4); +ushort4 __ovld __cnfn add_sat(ushort4, ushort4); +short8 __ovld __cnfn add_sat(short8, short8); +ushort8 __ovld __cnfn add_sat(ushort8, ushort8); +short16 __ovld __cnfn add_sat(short16, short16); +ushort16 __ovld __cnfn add_sat(ushort16, ushort16); +int __ovld __cnfn add_sat(int, int); +uint __ovld __cnfn add_sat(uint, uint); +int2 __ovld __cnfn add_sat(int2, int2); +uint2 __ovld __cnfn add_sat(uint2, uint2); +int3 __ovld __cnfn add_sat(int3, int3); +uint3 __ovld __cnfn add_sat(uint3, uint3); +int4 __ovld __cnfn add_sat(int4, int4); +uint4 __ovld __cnfn add_sat(uint4, uint4); +int8 __ovld __cnfn add_sat(int8, int8); +uint8 __ovld __cnfn add_sat(uint8, uint8); +int16 __ovld __cnfn add_sat(int16, int16); +uint16 __ovld __cnfn add_sat(uint16, uint16); +long __ovld __cnfn add_sat(long, long); +ulong __ovld __cnfn add_sat(ulong, ulong); +long2 __ovld __cnfn add_sat(long2, long2); +ulong2 __ovld __cnfn add_sat(ulong2, ulong2); +long3 __ovld __cnfn add_sat(long3, long3); +ulong3 __ovld __cnfn add_sat(ulong3, ulong3); +long4 __ovld __cnfn add_sat(long4, long4); +ulong4 __ovld __cnfn add_sat(ulong4, ulong4); +long8 __ovld __cnfn add_sat(long8, long8); +ulong8 __ovld __cnfn add_sat(ulong8, ulong8); +long16 __ovld __cnfn add_sat(long16, long16); +ulong16 __ovld __cnfn add_sat(ulong16, ulong16); + +/** + * Returns (x + y) >> 1. The intermediate sum does + * not modulo overflow. + */ +char __ovld __cnfn hadd(char, char); +uchar __ovld __cnfn hadd(uchar, uchar); +char2 __ovld __cnfn hadd(char2, char2); +uchar2 __ovld __cnfn hadd(uchar2, uchar2); +char3 __ovld __cnfn hadd(char3, char3); +uchar3 __ovld __cnfn hadd(uchar3, uchar3); +char4 __ovld __cnfn hadd(char4, char4); +uchar4 __ovld __cnfn hadd(uchar4, uchar4); +char8 __ovld __cnfn hadd(char8, char8); +uchar8 __ovld __cnfn hadd(uchar8, uchar8); +char16 __ovld __cnfn hadd(char16, char16); +uchar16 __ovld __cnfn hadd(uchar16, uchar16); +short __ovld __cnfn hadd(short, short); +ushort __ovld __cnfn hadd(ushort, ushort); +short2 __ovld __cnfn hadd(short2, short2); +ushort2 __ovld __cnfn hadd(ushort2, ushort2); +short3 __ovld __cnfn hadd(short3, short3); +ushort3 __ovld __cnfn hadd(ushort3, ushort3); +short4 __ovld __cnfn hadd(short4, short4); +ushort4 __ovld __cnfn hadd(ushort4, ushort4); +short8 __ovld __cnfn hadd(short8, short8); +ushort8 __ovld __cnfn hadd(ushort8, ushort8); +short16 __ovld __cnfn hadd(short16, short16); +ushort16 __ovld __cnfn hadd(ushort16, ushort16); +int __ovld __cnfn hadd(int, int); +uint __ovld __cnfn hadd(uint, uint); +int2 __ovld __cnfn hadd(int2, int2); +uint2 __ovld __cnfn hadd(uint2, uint2); +int3 __ovld __cnfn hadd(int3, int3); +uint3 __ovld __cnfn hadd(uint3, uint3); +int4 __ovld __cnfn hadd(int4, int4); +uint4 __ovld __cnfn hadd(uint4, uint4); +int8 __ovld __cnfn hadd(int8, int8); +uint8 __ovld __cnfn hadd(uint8, uint8); +int16 __ovld __cnfn hadd(int16, int16); +uint16 __ovld __cnfn hadd(uint16, uint16); +long __ovld __cnfn hadd(long, long); +ulong __ovld __cnfn hadd(ulong, ulong); +long2 __ovld __cnfn hadd(long2, long2); +ulong2 __ovld __cnfn hadd(ulong2, ulong2); +long3 __ovld __cnfn hadd(long3, long3); +ulong3 __ovld __cnfn hadd(ulong3, ulong3); +long4 __ovld __cnfn hadd(long4, long4); +ulong4 __ovld __cnfn hadd(ulong4, ulong4); +long8 __ovld __cnfn hadd(long8, long8); +ulong8 __ovld __cnfn hadd(ulong8, ulong8); +long16 __ovld __cnfn hadd(long16, long16); +ulong16 __ovld __cnfn hadd(ulong16, ulong16); + +/** + * Returns (x + y + 1) >> 1. The intermediate sum + * does not modulo overflow. + */ +char __ovld __cnfn rhadd(char, char); +uchar __ovld __cnfn rhadd(uchar, uchar); +char2 __ovld __cnfn rhadd(char2, char2); +uchar2 __ovld __cnfn rhadd(uchar2, uchar2); +char3 __ovld __cnfn rhadd(char3, char3); +uchar3 __ovld __cnfn rhadd(uchar3, uchar3); +char4 __ovld __cnfn rhadd(char4, char4); +uchar4 __ovld __cnfn rhadd(uchar4, uchar4); +char8 __ovld __cnfn rhadd(char8, char8); +uchar8 __ovld __cnfn rhadd(uchar8, uchar8); +char16 __ovld __cnfn rhadd(char16, char16); +uchar16 __ovld __cnfn rhadd(uchar16, uchar16); +short __ovld __cnfn rhadd(short, short); +ushort __ovld __cnfn rhadd(ushort, ushort); +short2 __ovld __cnfn rhadd(short2, short2); +ushort2 __ovld __cnfn rhadd(ushort2, ushort2); +short3 __ovld __cnfn rhadd(short3, short3); +ushort3 __ovld __cnfn rhadd(ushort3, ushort3); +short4 __ovld __cnfn rhadd(short4, short4); +ushort4 __ovld __cnfn rhadd(ushort4, ushort4); +short8 __ovld __cnfn rhadd(short8, short8); +ushort8 __ovld __cnfn rhadd(ushort8, ushort8); +short16 __ovld __cnfn rhadd(short16, short16); +ushort16 __ovld __cnfn rhadd(ushort16, ushort16); +int __ovld __cnfn rhadd(int, int); +uint __ovld __cnfn rhadd(uint, uint); +int2 __ovld __cnfn rhadd(int2, int2); +uint2 __ovld __cnfn rhadd(uint2, uint2); +int3 __ovld __cnfn rhadd(int3, int3); +uint3 __ovld __cnfn rhadd(uint3, uint3); +int4 __ovld __cnfn rhadd(int4, int4); +uint4 __ovld __cnfn rhadd(uint4, uint4); +int8 __ovld __cnfn rhadd(int8, int8); +uint8 __ovld __cnfn rhadd(uint8, uint8); +int16 __ovld __cnfn rhadd(int16, int16); +uint16 __ovld __cnfn rhadd(uint16, uint16); +long __ovld __cnfn rhadd(long, long); +ulong __ovld __cnfn rhadd(ulong, ulong); +long2 __ovld __cnfn rhadd(long2, long2); +ulong2 __ovld __cnfn rhadd(ulong2, ulong2); +long3 __ovld __cnfn rhadd(long3, long3); +ulong3 __ovld __cnfn rhadd(ulong3, ulong3); +long4 __ovld __cnfn rhadd(long4, long4); +ulong4 __ovld __cnfn rhadd(ulong4, ulong4); +long8 __ovld __cnfn rhadd(long8, long8); +ulong8 __ovld __cnfn rhadd(ulong8, ulong8); +long16 __ovld __cnfn rhadd(long16, long16); +ulong16 __ovld __cnfn rhadd(ulong16, ulong16); + +/** + * Returns min(max(x, minval), maxval). + * Results are undefined if minval > maxval. + */ +char __ovld __cnfn clamp(char, char, char); +uchar __ovld __cnfn clamp(uchar, uchar, uchar); +char2 __ovld __cnfn clamp(char2, char2, char2); +uchar2 __ovld __cnfn clamp(uchar2, uchar2, uchar2); +char3 __ovld __cnfn clamp(char3, char3, char3); +uchar3 __ovld __cnfn clamp(uchar3, uchar3, uchar3); +char4 __ovld __cnfn clamp(char4, char4, char4); +uchar4 __ovld __cnfn clamp(uchar4, uchar4, uchar4); +char8 __ovld __cnfn clamp(char8, char8, char8); +uchar8 __ovld __cnfn clamp(uchar8, uchar8, uchar8); +char16 __ovld __cnfn clamp(char16, char16, char16); +uchar16 __ovld __cnfn clamp(uchar16, uchar16, uchar16); +short __ovld __cnfn clamp(short, short, short); +ushort __ovld __cnfn clamp(ushort, ushort, ushort); +short2 __ovld __cnfn clamp(short2, short2, short2); +ushort2 __ovld __cnfn clamp(ushort2, ushort2, ushort2); +short3 __ovld __cnfn clamp(short3, short3, short3); +ushort3 __ovld __cnfn clamp(ushort3, ushort3, ushort3); +short4 __ovld __cnfn clamp(short4, short4, short4); +ushort4 __ovld __cnfn clamp(ushort4, ushort4, ushort4); +short8 __ovld __cnfn clamp(short8, short8, short8); +ushort8 __ovld __cnfn clamp(ushort8, ushort8, ushort8); +short16 __ovld __cnfn clamp(short16, short16, short16); +ushort16 __ovld __cnfn clamp(ushort16, ushort16, ushort16); +int __ovld __cnfn clamp(int, int, int); +uint __ovld __cnfn clamp(uint, uint, uint); +int2 __ovld __cnfn clamp(int2, int2, int2); +uint2 __ovld __cnfn clamp(uint2, uint2, uint2); +int3 __ovld __cnfn clamp(int3, int3, int3); +uint3 __ovld __cnfn clamp(uint3, uint3, uint3); +int4 __ovld __cnfn clamp(int4, int4, int4); +uint4 __ovld __cnfn clamp(uint4, uint4, uint4); +int8 __ovld __cnfn clamp(int8, int8, int8); +uint8 __ovld __cnfn clamp(uint8, uint8, uint8); +int16 __ovld __cnfn clamp(int16, int16, int16); +uint16 __ovld __cnfn clamp(uint16, uint16, uint16); +long __ovld __cnfn clamp(long, long, long); +ulong __ovld __cnfn clamp(ulong, ulong, ulong); +long2 __ovld __cnfn clamp(long2, long2, long2); +ulong2 __ovld __cnfn clamp(ulong2, ulong2, ulong2); +long3 __ovld __cnfn clamp(long3, long3, long3); +ulong3 __ovld __cnfn clamp(ulong3, ulong3, ulong3); +long4 __ovld __cnfn clamp(long4, long4, long4); +ulong4 __ovld __cnfn clamp(ulong4, ulong4, ulong4); +long8 __ovld __cnfn clamp(long8, long8, long8); +ulong8 __ovld __cnfn clamp(ulong8, ulong8, ulong8); +long16 __ovld __cnfn clamp(long16, long16, long16); +ulong16 __ovld __cnfn clamp(ulong16, ulong16, ulong16); +char2 __ovld __cnfn clamp(char2, char, char); +uchar2 __ovld __cnfn clamp(uchar2, uchar, uchar); +char3 __ovld __cnfn clamp(char3, char, char); +uchar3 __ovld __cnfn clamp(uchar3, uchar, uchar); +char4 __ovld __cnfn clamp(char4, char, char); +uchar4 __ovld __cnfn clamp(uchar4, uchar, uchar); +char8 __ovld __cnfn clamp(char8, char, char); +uchar8 __ovld __cnfn clamp(uchar8, uchar, uchar); +char16 __ovld __cnfn clamp(char16, char, char); +uchar16 __ovld __cnfn clamp(uchar16, uchar, uchar); +short2 __ovld __cnfn clamp(short2, short, short); +ushort2 __ovld __cnfn clamp(ushort2, ushort, ushort); +short3 __ovld __cnfn clamp(short3, short, short); +ushort3 __ovld __cnfn clamp(ushort3, ushort, ushort); +short4 __ovld __cnfn clamp(short4, short, short); +ushort4 __ovld __cnfn clamp(ushort4, ushort, ushort); +short8 __ovld __cnfn clamp(short8, short, short); +ushort8 __ovld __cnfn clamp(ushort8, ushort, ushort); +short16 __ovld __cnfn clamp(short16, short, short); +ushort16 __ovld __cnfn clamp(ushort16, ushort, ushort); +int2 __ovld __cnfn clamp(int2, int, int); +uint2 __ovld __cnfn clamp(uint2, uint, uint); +int3 __ovld __cnfn clamp(int3, int, int); +uint3 __ovld __cnfn clamp(uint3, uint, uint); +int4 __ovld __cnfn clamp(int4, int, int); +uint4 __ovld __cnfn clamp(uint4, uint, uint); +int8 __ovld __cnfn clamp(int8, int, int); +uint8 __ovld __cnfn clamp(uint8, uint, uint); +int16 __ovld __cnfn clamp(int16, int, int); +uint16 __ovld __cnfn clamp(uint16, uint, uint); +long2 __ovld __cnfn clamp(long2, long, long); +ulong2 __ovld __cnfn clamp(ulong2, ulong, ulong); +long3 __ovld __cnfn clamp(long3, long, long); +ulong3 __ovld __cnfn clamp(ulong3, ulong, ulong); +long4 __ovld __cnfn clamp(long4, long, long); +ulong4 __ovld __cnfn clamp(ulong4, ulong, ulong); +long8 __ovld __cnfn clamp(long8, long, long); +ulong8 __ovld __cnfn clamp(ulong8, ulong, ulong); +long16 __ovld __cnfn clamp(long16, long, long); +ulong16 __ovld __cnfn clamp(ulong16, ulong, ulong); + +/** + * Returns the number of leading 0-bits in x, starting + * at the most significant bit position. + */ +char __ovld __cnfn clz(char); +uchar __ovld __cnfn clz(uchar); +char2 __ovld __cnfn clz(char2); +uchar2 __ovld __cnfn clz(uchar2); +char3 __ovld __cnfn clz(char3); +uchar3 __ovld __cnfn clz(uchar3); +char4 __ovld __cnfn clz(char4); +uchar4 __ovld __cnfn clz(uchar4); +char8 __ovld __cnfn clz(char8); +uchar8 __ovld __cnfn clz(uchar8); +char16 __ovld __cnfn clz(char16); +uchar16 __ovld __cnfn clz(uchar16); +short __ovld __cnfn clz(short); +ushort __ovld __cnfn clz(ushort); +short2 __ovld __cnfn clz(short2); +ushort2 __ovld __cnfn clz(ushort2); +short3 __ovld __cnfn clz(short3); +ushort3 __ovld __cnfn clz(ushort3); +short4 __ovld __cnfn clz(short4); +ushort4 __ovld __cnfn clz(ushort4); +short8 __ovld __cnfn clz(short8); +ushort8 __ovld __cnfn clz(ushort8); +short16 __ovld __cnfn clz(short16); +ushort16 __ovld __cnfn clz(ushort16); +int __ovld __cnfn clz(int); +uint __ovld __cnfn clz(uint); +int2 __ovld __cnfn clz(int2); +uint2 __ovld __cnfn clz(uint2); +int3 __ovld __cnfn clz(int3); +uint3 __ovld __cnfn clz(uint3); +int4 __ovld __cnfn clz(int4); +uint4 __ovld __cnfn clz(uint4); +int8 __ovld __cnfn clz(int8); +uint8 __ovld __cnfn clz(uint8); +int16 __ovld __cnfn clz(int16); +uint16 __ovld __cnfn clz(uint16); +long __ovld __cnfn clz(long); +ulong __ovld __cnfn clz(ulong); +long2 __ovld __cnfn clz(long2); +ulong2 __ovld __cnfn clz(ulong2); +long3 __ovld __cnfn clz(long3); +ulong3 __ovld __cnfn clz(ulong3); +long4 __ovld __cnfn clz(long4); +ulong4 __ovld __cnfn clz(ulong4); +long8 __ovld __cnfn clz(long8); +ulong8 __ovld __cnfn clz(ulong8); +long16 __ovld __cnfn clz(long16); +ulong16 __ovld __cnfn clz(ulong16); + +/** + * Returns the count of trailing 0-bits in x. If x is 0, + * returns the size in bits of the type of x or + * component type of x, if x is a vector. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +char __ovld __cnfn ctz(char); +uchar __ovld __cnfn ctz(uchar); +char2 __ovld __cnfn ctz(char2); +uchar2 __ovld __cnfn ctz(uchar2); +char3 __ovld __cnfn ctz(char3); +uchar3 __ovld __cnfn ctz(uchar3); +char4 __ovld __cnfn ctz(char4); +uchar4 __ovld __cnfn ctz(uchar4); +char8 __ovld __cnfn ctz(char8); +uchar8 __ovld __cnfn ctz(uchar8); +char16 __ovld __cnfn ctz(char16); +uchar16 __ovld __cnfn ctz(uchar16); +short __ovld __cnfn ctz(short); +ushort __ovld __cnfn ctz(ushort); +short2 __ovld __cnfn ctz(short2); +ushort2 __ovld __cnfn ctz(ushort2); +short3 __ovld __cnfn ctz(short3); +ushort3 __ovld __cnfn ctz(ushort3); +short4 __ovld __cnfn ctz(short4); +ushort4 __ovld __cnfn ctz(ushort4); +short8 __ovld __cnfn ctz(short8); +ushort8 __ovld __cnfn ctz(ushort8); +short16 __ovld __cnfn ctz(short16); +ushort16 __ovld __cnfn ctz(ushort16); +int __ovld __cnfn ctz(int); +uint __ovld __cnfn ctz(uint); +int2 __ovld __cnfn ctz(int2); +uint2 __ovld __cnfn ctz(uint2); +int3 __ovld __cnfn ctz(int3); +uint3 __ovld __cnfn ctz(uint3); +int4 __ovld __cnfn ctz(int4); +uint4 __ovld __cnfn ctz(uint4); +int8 __ovld __cnfn ctz(int8); +uint8 __ovld __cnfn ctz(uint8); +int16 __ovld __cnfn ctz(int16); +uint16 __ovld __cnfn ctz(uint16); +long __ovld __cnfn ctz(long); +ulong __ovld __cnfn ctz(ulong); +long2 __ovld __cnfn ctz(long2); +ulong2 __ovld __cnfn ctz(ulong2); +long3 __ovld __cnfn ctz(long3); +ulong3 __ovld __cnfn ctz(ulong3); +long4 __ovld __cnfn ctz(long4); +ulong4 __ovld __cnfn ctz(ulong4); +long8 __ovld __cnfn ctz(long8); +ulong8 __ovld __cnfn ctz(ulong8); +long16 __ovld __cnfn ctz(long16); +ulong16 __ovld __cnfn ctz(ulong16); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Returns mul_hi(a, b) + c. + */ +char __ovld __cnfn mad_hi(char, char, char); +uchar __ovld __cnfn mad_hi(uchar, uchar, uchar); +char2 __ovld __cnfn mad_hi(char2, char2, char2); +uchar2 __ovld __cnfn mad_hi(uchar2, uchar2, uchar2); +char3 __ovld __cnfn mad_hi(char3, char3, char3); +uchar3 __ovld __cnfn mad_hi(uchar3, uchar3, uchar3); +char4 __ovld __cnfn mad_hi(char4, char4, char4); +uchar4 __ovld __cnfn mad_hi(uchar4, uchar4, uchar4); +char8 __ovld __cnfn mad_hi(char8, char8, char8); +uchar8 __ovld __cnfn mad_hi(uchar8, uchar8, uchar8); +char16 __ovld __cnfn mad_hi(char16, char16, char16); +uchar16 __ovld __cnfn mad_hi(uchar16, uchar16, uchar16); +short __ovld __cnfn mad_hi(short, short, short); +ushort __ovld __cnfn mad_hi(ushort, ushort, ushort); +short2 __ovld __cnfn mad_hi(short2, short2, short2); +ushort2 __ovld __cnfn mad_hi(ushort2, ushort2, ushort2); +short3 __ovld __cnfn mad_hi(short3, short3, short3); +ushort3 __ovld __cnfn mad_hi(ushort3, ushort3, ushort3); +short4 __ovld __cnfn mad_hi(short4, short4, short4); +ushort4 __ovld __cnfn mad_hi(ushort4, ushort4, ushort4); +short8 __ovld __cnfn mad_hi(short8, short8, short8); +ushort8 __ovld __cnfn mad_hi(ushort8, ushort8, ushort8); +short16 __ovld __cnfn mad_hi(short16, short16, short16); +ushort16 __ovld __cnfn mad_hi(ushort16, ushort16, ushort16); +int __ovld __cnfn mad_hi(int, int, int); +uint __ovld __cnfn mad_hi(uint, uint, uint); +int2 __ovld __cnfn mad_hi(int2, int2, int2); +uint2 __ovld __cnfn mad_hi(uint2, uint2, uint2); +int3 __ovld __cnfn mad_hi(int3, int3, int3); +uint3 __ovld __cnfn mad_hi(uint3, uint3, uint3); +int4 __ovld __cnfn mad_hi(int4, int4, int4); +uint4 __ovld __cnfn mad_hi(uint4, uint4, uint4); +int8 __ovld __cnfn mad_hi(int8, int8, int8); +uint8 __ovld __cnfn mad_hi(uint8, uint8, uint8); +int16 __ovld __cnfn mad_hi(int16, int16, int16); +uint16 __ovld __cnfn mad_hi(uint16, uint16, uint16); +long __ovld __cnfn mad_hi(long, long, long); +ulong __ovld __cnfn mad_hi(ulong, ulong, ulong); +long2 __ovld __cnfn mad_hi(long2, long2, long2); +ulong2 __ovld __cnfn mad_hi(ulong2, ulong2, ulong2); +long3 __ovld __cnfn mad_hi(long3, long3, long3); +ulong3 __ovld __cnfn mad_hi(ulong3, ulong3, ulong3); +long4 __ovld __cnfn mad_hi(long4, long4, long4); +ulong4 __ovld __cnfn mad_hi(ulong4, ulong4, ulong4); +long8 __ovld __cnfn mad_hi(long8, long8, long8); +ulong8 __ovld __cnfn mad_hi(ulong8, ulong8, ulong8); +long16 __ovld __cnfn mad_hi(long16, long16, long16); +ulong16 __ovld __cnfn mad_hi(ulong16, ulong16, ulong16); + +/** + * Returns a * b + c and saturates the result. + */ +char __ovld __cnfn mad_sat(char, char, char); +uchar __ovld __cnfn mad_sat(uchar, uchar, uchar); +char2 __ovld __cnfn mad_sat(char2, char2, char2); +uchar2 __ovld __cnfn mad_sat(uchar2, uchar2, uchar2); +char3 __ovld __cnfn mad_sat(char3, char3, char3); +uchar3 __ovld __cnfn mad_sat(uchar3, uchar3, uchar3); +char4 __ovld __cnfn mad_sat(char4, char4, char4); +uchar4 __ovld __cnfn mad_sat(uchar4, uchar4, uchar4); +char8 __ovld __cnfn mad_sat(char8, char8, char8); +uchar8 __ovld __cnfn mad_sat(uchar8, uchar8, uchar8); +char16 __ovld __cnfn mad_sat(char16, char16, char16); +uchar16 __ovld __cnfn mad_sat(uchar16, uchar16, uchar16); +short __ovld __cnfn mad_sat(short, short, short); +ushort __ovld __cnfn mad_sat(ushort, ushort, ushort); +short2 __ovld __cnfn mad_sat(short2, short2, short2); +ushort2 __ovld __cnfn mad_sat(ushort2, ushort2, ushort2); +short3 __ovld __cnfn mad_sat(short3, short3, short3); +ushort3 __ovld __cnfn mad_sat(ushort3, ushort3, ushort3); +short4 __ovld __cnfn mad_sat(short4, short4, short4); +ushort4 __ovld __cnfn mad_sat(ushort4, ushort4, ushort4); +short8 __ovld __cnfn mad_sat(short8, short8, short8); +ushort8 __ovld __cnfn mad_sat(ushort8, ushort8, ushort8); +short16 __ovld __cnfn mad_sat(short16, short16, short16); +ushort16 __ovld __cnfn mad_sat(ushort16, ushort16, ushort16); +int __ovld __cnfn mad_sat(int, int, int); +uint __ovld __cnfn mad_sat(uint, uint, uint); +int2 __ovld __cnfn mad_sat(int2, int2, int2); +uint2 __ovld __cnfn mad_sat(uint2, uint2, uint2); +int3 __ovld __cnfn mad_sat(int3, int3, int3); +uint3 __ovld __cnfn mad_sat(uint3, uint3, uint3); +int4 __ovld __cnfn mad_sat(int4, int4, int4); +uint4 __ovld __cnfn mad_sat(uint4, uint4, uint4); +int8 __ovld __cnfn mad_sat(int8, int8, int8); +uint8 __ovld __cnfn mad_sat(uint8, uint8, uint8); +int16 __ovld __cnfn mad_sat(int16, int16, int16); +uint16 __ovld __cnfn mad_sat(uint16, uint16, uint16); +long __ovld __cnfn mad_sat(long, long, long); +ulong __ovld __cnfn mad_sat(ulong, ulong, ulong); +long2 __ovld __cnfn mad_sat(long2, long2, long2); +ulong2 __ovld __cnfn mad_sat(ulong2, ulong2, ulong2); +long3 __ovld __cnfn mad_sat(long3, long3, long3); +ulong3 __ovld __cnfn mad_sat(ulong3, ulong3, ulong3); +long4 __ovld __cnfn mad_sat(long4, long4, long4); +ulong4 __ovld __cnfn mad_sat(ulong4, ulong4, ulong4); +long8 __ovld __cnfn mad_sat(long8, long8, long8); +ulong8 __ovld __cnfn mad_sat(ulong8, ulong8, ulong8); +long16 __ovld __cnfn mad_sat(long16, long16, long16); +ulong16 __ovld __cnfn mad_sat(ulong16, ulong16, ulong16); + +/** + * Returns y if x < y, otherwise it returns x. + */ +char __ovld __cnfn max(char, char); +uchar __ovld __cnfn max(uchar, uchar); +char2 __ovld __cnfn max(char2, char2); +uchar2 __ovld __cnfn max(uchar2, uchar2); +char3 __ovld __cnfn max(char3, char3); +uchar3 __ovld __cnfn max(uchar3, uchar3); +char4 __ovld __cnfn max(char4, char4); +uchar4 __ovld __cnfn max(uchar4, uchar4); +char8 __ovld __cnfn max(char8, char8); +uchar8 __ovld __cnfn max(uchar8, uchar8); +char16 __ovld __cnfn max(char16, char16); +uchar16 __ovld __cnfn max(uchar16, uchar16); +short __ovld __cnfn max(short, short); +ushort __ovld __cnfn max(ushort, ushort); +short2 __ovld __cnfn max(short2, short2); +ushort2 __ovld __cnfn max(ushort2, ushort2); +short3 __ovld __cnfn max(short3, short3); +ushort3 __ovld __cnfn max(ushort3, ushort3); +short4 __ovld __cnfn max(short4, short4); +ushort4 __ovld __cnfn max(ushort4, ushort4); +short8 __ovld __cnfn max(short8, short8); +ushort8 __ovld __cnfn max(ushort8, ushort8); +short16 __ovld __cnfn max(short16, short16); +ushort16 __ovld __cnfn max(ushort16, ushort16); +int __ovld __cnfn max(int, int); +uint __ovld __cnfn max(uint, uint); +int2 __ovld __cnfn max(int2, int2); +uint2 __ovld __cnfn max(uint2, uint2); +int3 __ovld __cnfn max(int3, int3); +uint3 __ovld __cnfn max(uint3, uint3); +int4 __ovld __cnfn max(int4, int4); +uint4 __ovld __cnfn max(uint4, uint4); +int8 __ovld __cnfn max(int8, int8); +uint8 __ovld __cnfn max(uint8, uint8); +int16 __ovld __cnfn max(int16, int16); +uint16 __ovld __cnfn max(uint16, uint16); +long __ovld __cnfn max(long, long); +ulong __ovld __cnfn max(ulong, ulong); +long2 __ovld __cnfn max(long2, long2); +ulong2 __ovld __cnfn max(ulong2, ulong2); +long3 __ovld __cnfn max(long3, long3); +ulong3 __ovld __cnfn max(ulong3, ulong3); +long4 __ovld __cnfn max(long4, long4); +ulong4 __ovld __cnfn max(ulong4, ulong4); +long8 __ovld __cnfn max(long8, long8); +ulong8 __ovld __cnfn max(ulong8, ulong8); +long16 __ovld __cnfn max(long16, long16); +ulong16 __ovld __cnfn max(ulong16, ulong16); +char2 __ovld __cnfn max(char2, char); +uchar2 __ovld __cnfn max(uchar2, uchar); +char3 __ovld __cnfn max(char3, char); +uchar3 __ovld __cnfn max(uchar3, uchar); +char4 __ovld __cnfn max(char4, char); +uchar4 __ovld __cnfn max(uchar4, uchar); +char8 __ovld __cnfn max(char8, char); +uchar8 __ovld __cnfn max(uchar8, uchar); +char16 __ovld __cnfn max(char16, char); +uchar16 __ovld __cnfn max(uchar16, uchar); +short2 __ovld __cnfn max(short2, short); +ushort2 __ovld __cnfn max(ushort2, ushort); +short3 __ovld __cnfn max(short3, short); +ushort3 __ovld __cnfn max(ushort3, ushort); +short4 __ovld __cnfn max(short4, short); +ushort4 __ovld __cnfn max(ushort4, ushort); +short8 __ovld __cnfn max(short8, short); +ushort8 __ovld __cnfn max(ushort8, ushort); +short16 __ovld __cnfn max(short16, short); +ushort16 __ovld __cnfn max(ushort16, ushort); +int2 __ovld __cnfn max(int2, int); +uint2 __ovld __cnfn max(uint2, uint); +int3 __ovld __cnfn max(int3, int); +uint3 __ovld __cnfn max(uint3, uint); +int4 __ovld __cnfn max(int4, int); +uint4 __ovld __cnfn max(uint4, uint); +int8 __ovld __cnfn max(int8, int); +uint8 __ovld __cnfn max(uint8, uint); +int16 __ovld __cnfn max(int16, int); +uint16 __ovld __cnfn max(uint16, uint); +long2 __ovld __cnfn max(long2, long); +ulong2 __ovld __cnfn max(ulong2, ulong); +long3 __ovld __cnfn max(long3, long); +ulong3 __ovld __cnfn max(ulong3, ulong); +long4 __ovld __cnfn max(long4, long); +ulong4 __ovld __cnfn max(ulong4, ulong); +long8 __ovld __cnfn max(long8, long); +ulong8 __ovld __cnfn max(ulong8, ulong); +long16 __ovld __cnfn max(long16, long); +ulong16 __ovld __cnfn max(ulong16, ulong); + +/** + * Returns y if y < x, otherwise it returns x. + */ +char __ovld __cnfn min(char, char); +uchar __ovld __cnfn min(uchar, uchar); +char2 __ovld __cnfn min(char2, char2); +uchar2 __ovld __cnfn min(uchar2, uchar2); +char3 __ovld __cnfn min(char3, char3); +uchar3 __ovld __cnfn min(uchar3, uchar3); +char4 __ovld __cnfn min(char4, char4); +uchar4 __ovld __cnfn min(uchar4, uchar4); +char8 __ovld __cnfn min(char8, char8); +uchar8 __ovld __cnfn min(uchar8, uchar8); +char16 __ovld __cnfn min(char16, char16); +uchar16 __ovld __cnfn min(uchar16, uchar16); +short __ovld __cnfn min(short, short); +ushort __ovld __cnfn min(ushort, ushort); +short2 __ovld __cnfn min(short2, short2); +ushort2 __ovld __cnfn min(ushort2, ushort2); +short3 __ovld __cnfn min(short3, short3); +ushort3 __ovld __cnfn min(ushort3, ushort3); +short4 __ovld __cnfn min(short4, short4); +ushort4 __ovld __cnfn min(ushort4, ushort4); +short8 __ovld __cnfn min(short8, short8); +ushort8 __ovld __cnfn min(ushort8, ushort8); +short16 __ovld __cnfn min(short16, short16); +ushort16 __ovld __cnfn min(ushort16, ushort16); +int __ovld __cnfn min(int, int); +uint __ovld __cnfn min(uint, uint); +int2 __ovld __cnfn min(int2, int2); +uint2 __ovld __cnfn min(uint2, uint2); +int3 __ovld __cnfn min(int3, int3); +uint3 __ovld __cnfn min(uint3, uint3); +int4 __ovld __cnfn min(int4, int4); +uint4 __ovld __cnfn min(uint4, uint4); +int8 __ovld __cnfn min(int8, int8); +uint8 __ovld __cnfn min(uint8, uint8); +int16 __ovld __cnfn min(int16, int16); +uint16 __ovld __cnfn min(uint16, uint16); +long __ovld __cnfn min(long, long); +ulong __ovld __cnfn min(ulong, ulong); +long2 __ovld __cnfn min(long2, long2); +ulong2 __ovld __cnfn min(ulong2, ulong2); +long3 __ovld __cnfn min(long3, long3); +ulong3 __ovld __cnfn min(ulong3, ulong3); +long4 __ovld __cnfn min(long4, long4); +ulong4 __ovld __cnfn min(ulong4, ulong4); +long8 __ovld __cnfn min(long8, long8); +ulong8 __ovld __cnfn min(ulong8, ulong8); +long16 __ovld __cnfn min(long16, long16); +ulong16 __ovld __cnfn min(ulong16, ulong16); +char2 __ovld __cnfn min(char2, char); +uchar2 __ovld __cnfn min(uchar2, uchar); +char3 __ovld __cnfn min(char3, char); +uchar3 __ovld __cnfn min(uchar3, uchar); +char4 __ovld __cnfn min(char4, char); +uchar4 __ovld __cnfn min(uchar4, uchar); +char8 __ovld __cnfn min(char8, char); +uchar8 __ovld __cnfn min(uchar8, uchar); +char16 __ovld __cnfn min(char16, char); +uchar16 __ovld __cnfn min(uchar16, uchar); +short2 __ovld __cnfn min(short2, short); +ushort2 __ovld __cnfn min(ushort2, ushort); +short3 __ovld __cnfn min(short3, short); +ushort3 __ovld __cnfn min(ushort3, ushort); +short4 __ovld __cnfn min(short4, short); +ushort4 __ovld __cnfn min(ushort4, ushort); +short8 __ovld __cnfn min(short8, short); +ushort8 __ovld __cnfn min(ushort8, ushort); +short16 __ovld __cnfn min(short16, short); +ushort16 __ovld __cnfn min(ushort16, ushort); +int2 __ovld __cnfn min(int2, int); +uint2 __ovld __cnfn min(uint2, uint); +int3 __ovld __cnfn min(int3, int); +uint3 __ovld __cnfn min(uint3, uint); +int4 __ovld __cnfn min(int4, int); +uint4 __ovld __cnfn min(uint4, uint); +int8 __ovld __cnfn min(int8, int); +uint8 __ovld __cnfn min(uint8, uint); +int16 __ovld __cnfn min(int16, int); +uint16 __ovld __cnfn min(uint16, uint); +long2 __ovld __cnfn min(long2, long); +ulong2 __ovld __cnfn min(ulong2, ulong); +long3 __ovld __cnfn min(long3, long); +ulong3 __ovld __cnfn min(ulong3, ulong); +long4 __ovld __cnfn min(long4, long); +ulong4 __ovld __cnfn min(ulong4, ulong); +long8 __ovld __cnfn min(long8, long); +ulong8 __ovld __cnfn min(ulong8, ulong); +long16 __ovld __cnfn min(long16, long); +ulong16 __ovld __cnfn min(ulong16, ulong); + +/** + * Computes x * y and returns the high half of the + * product of x and y. + */ +char __ovld __cnfn mul_hi(char, char); +uchar __ovld __cnfn mul_hi(uchar, uchar); +char2 __ovld __cnfn mul_hi(char2, char2); +uchar2 __ovld __cnfn mul_hi(uchar2, uchar2); +char3 __ovld __cnfn mul_hi(char3, char3); +uchar3 __ovld __cnfn mul_hi(uchar3, uchar3); +char4 __ovld __cnfn mul_hi(char4, char4); +uchar4 __ovld __cnfn mul_hi(uchar4, uchar4); +char8 __ovld __cnfn mul_hi(char8, char8); +uchar8 __ovld __cnfn mul_hi(uchar8, uchar8); +char16 __ovld __cnfn mul_hi(char16, char16); +uchar16 __ovld __cnfn mul_hi(uchar16, uchar16); +short __ovld __cnfn mul_hi(short, short); +ushort __ovld __cnfn mul_hi(ushort, ushort); +short2 __ovld __cnfn mul_hi(short2, short2); +ushort2 __ovld __cnfn mul_hi(ushort2, ushort2); +short3 __ovld __cnfn mul_hi(short3, short3); +ushort3 __ovld __cnfn mul_hi(ushort3, ushort3); +short4 __ovld __cnfn mul_hi(short4, short4); +ushort4 __ovld __cnfn mul_hi(ushort4, ushort4); +short8 __ovld __cnfn mul_hi(short8, short8); +ushort8 __ovld __cnfn mul_hi(ushort8, ushort8); +short16 __ovld __cnfn mul_hi(short16, short16); +ushort16 __ovld __cnfn mul_hi(ushort16, ushort16); +int __ovld __cnfn mul_hi(int, int); +uint __ovld __cnfn mul_hi(uint, uint); +int2 __ovld __cnfn mul_hi(int2, int2); +uint2 __ovld __cnfn mul_hi(uint2, uint2); +int3 __ovld __cnfn mul_hi(int3, int3); +uint3 __ovld __cnfn mul_hi(uint3, uint3); +int4 __ovld __cnfn mul_hi(int4, int4); +uint4 __ovld __cnfn mul_hi(uint4, uint4); +int8 __ovld __cnfn mul_hi(int8, int8); +uint8 __ovld __cnfn mul_hi(uint8, uint8); +int16 __ovld __cnfn mul_hi(int16, int16); +uint16 __ovld __cnfn mul_hi(uint16, uint16); +long __ovld __cnfn mul_hi(long, long); +ulong __ovld __cnfn mul_hi(ulong, ulong); +long2 __ovld __cnfn mul_hi(long2, long2); +ulong2 __ovld __cnfn mul_hi(ulong2, ulong2); +long3 __ovld __cnfn mul_hi(long3, long3); +ulong3 __ovld __cnfn mul_hi(ulong3, ulong3); +long4 __ovld __cnfn mul_hi(long4, long4); +ulong4 __ovld __cnfn mul_hi(ulong4, ulong4); +long8 __ovld __cnfn mul_hi(long8, long8); +ulong8 __ovld __cnfn mul_hi(ulong8, ulong8); +long16 __ovld __cnfn mul_hi(long16, long16); +ulong16 __ovld __cnfn mul_hi(ulong16, ulong16); + +/** + * For each element in v, the bits are shifted left by + * the number of bits given by the corresponding + * element in i (subject to usual shift modulo rules + * described in section 6.3). Bits shifted off the left + * side of the element are shifted back in from the + * right. + */ +char __ovld __cnfn rotate(char, char); +uchar __ovld __cnfn rotate(uchar, uchar); +char2 __ovld __cnfn rotate(char2, char2); +uchar2 __ovld __cnfn rotate(uchar2, uchar2); +char3 __ovld __cnfn rotate(char3, char3); +uchar3 __ovld __cnfn rotate(uchar3, uchar3); +char4 __ovld __cnfn rotate(char4, char4); +uchar4 __ovld __cnfn rotate(uchar4, uchar4); +char8 __ovld __cnfn rotate(char8, char8); +uchar8 __ovld __cnfn rotate(uchar8, uchar8); +char16 __ovld __cnfn rotate(char16, char16); +uchar16 __ovld __cnfn rotate(uchar16, uchar16); +short __ovld __cnfn rotate(short, short); +ushort __ovld __cnfn rotate(ushort, ushort); +short2 __ovld __cnfn rotate(short2, short2); +ushort2 __ovld __cnfn rotate(ushort2, ushort2); +short3 __ovld __cnfn rotate(short3, short3); +ushort3 __ovld __cnfn rotate(ushort3, ushort3); +short4 __ovld __cnfn rotate(short4, short4); +ushort4 __ovld __cnfn rotate(ushort4, ushort4); +short8 __ovld __cnfn rotate(short8, short8); +ushort8 __ovld __cnfn rotate(ushort8, ushort8); +short16 __ovld __cnfn rotate(short16, short16); +ushort16 __ovld __cnfn rotate(ushort16, ushort16); +int __ovld __cnfn rotate(int, int); +uint __ovld __cnfn rotate(uint, uint); +int2 __ovld __cnfn rotate(int2, int2); +uint2 __ovld __cnfn rotate(uint2, uint2); +int3 __ovld __cnfn rotate(int3, int3); +uint3 __ovld __cnfn rotate(uint3, uint3); +int4 __ovld __cnfn rotate(int4, int4); +uint4 __ovld __cnfn rotate(uint4, uint4); +int8 __ovld __cnfn rotate(int8, int8); +uint8 __ovld __cnfn rotate(uint8, uint8); +int16 __ovld __cnfn rotate(int16, int16); +uint16 __ovld __cnfn rotate(uint16, uint16); +long __ovld __cnfn rotate(long, long); +ulong __ovld __cnfn rotate(ulong, ulong); +long2 __ovld __cnfn rotate(long2, long2); +ulong2 __ovld __cnfn rotate(ulong2, ulong2); +long3 __ovld __cnfn rotate(long3, long3); +ulong3 __ovld __cnfn rotate(ulong3, ulong3); +long4 __ovld __cnfn rotate(long4, long4); +ulong4 __ovld __cnfn rotate(ulong4, ulong4); +long8 __ovld __cnfn rotate(long8, long8); +ulong8 __ovld __cnfn rotate(ulong8, ulong8); +long16 __ovld __cnfn rotate(long16, long16); +ulong16 __ovld __cnfn rotate(ulong16, ulong16); + +/** + * Returns x - y and saturates the result. + */ +char __ovld __cnfn sub_sat(char, char); +uchar __ovld __cnfn sub_sat(uchar, uchar); +char2 __ovld __cnfn sub_sat(char2, char2); +uchar2 __ovld __cnfn sub_sat(uchar2, uchar2); +char3 __ovld __cnfn sub_sat(char3, char3); +uchar3 __ovld __cnfn sub_sat(uchar3, uchar3); +char4 __ovld __cnfn sub_sat(char4, char4); +uchar4 __ovld __cnfn sub_sat(uchar4, uchar4); +char8 __ovld __cnfn sub_sat(char8, char8); +uchar8 __ovld __cnfn sub_sat(uchar8, uchar8); +char16 __ovld __cnfn sub_sat(char16, char16); +uchar16 __ovld __cnfn sub_sat(uchar16, uchar16); +short __ovld __cnfn sub_sat(short, short); +ushort __ovld __cnfn sub_sat(ushort, ushort); +short2 __ovld __cnfn sub_sat(short2, short2); +ushort2 __ovld __cnfn sub_sat(ushort2, ushort2); +short3 __ovld __cnfn sub_sat(short3, short3); +ushort3 __ovld __cnfn sub_sat(ushort3, ushort3); +short4 __ovld __cnfn sub_sat(short4, short4); +ushort4 __ovld __cnfn sub_sat(ushort4, ushort4); +short8 __ovld __cnfn sub_sat(short8, short8); +ushort8 __ovld __cnfn sub_sat(ushort8, ushort8); +short16 __ovld __cnfn sub_sat(short16, short16); +ushort16 __ovld __cnfn sub_sat(ushort16, ushort16); +int __ovld __cnfn sub_sat(int, int); +uint __ovld __cnfn sub_sat(uint, uint); +int2 __ovld __cnfn sub_sat(int2, int2); +uint2 __ovld __cnfn sub_sat(uint2, uint2); +int3 __ovld __cnfn sub_sat(int3, int3); +uint3 __ovld __cnfn sub_sat(uint3, uint3); +int4 __ovld __cnfn sub_sat(int4, int4); +uint4 __ovld __cnfn sub_sat(uint4, uint4); +int8 __ovld __cnfn sub_sat(int8, int8); +uint8 __ovld __cnfn sub_sat(uint8, uint8); +int16 __ovld __cnfn sub_sat(int16, int16); +uint16 __ovld __cnfn sub_sat(uint16, uint16); +long __ovld __cnfn sub_sat(long, long); +ulong __ovld __cnfn sub_sat(ulong, ulong); +long2 __ovld __cnfn sub_sat(long2, long2); +ulong2 __ovld __cnfn sub_sat(ulong2, ulong2); +long3 __ovld __cnfn sub_sat(long3, long3); +ulong3 __ovld __cnfn sub_sat(ulong3, ulong3); +long4 __ovld __cnfn sub_sat(long4, long4); +ulong4 __ovld __cnfn sub_sat(ulong4, ulong4); +long8 __ovld __cnfn sub_sat(long8, long8); +ulong8 __ovld __cnfn sub_sat(ulong8, ulong8); +long16 __ovld __cnfn sub_sat(long16, long16); +ulong16 __ovld __cnfn sub_sat(ulong16, ulong16); + +/** + * result[i] = ((short)hi[i] << 8) | lo[i] + * result[i] = ((ushort)hi[i] << 8) | lo[i] + */ +short __ovld __cnfn upsample(char, uchar); +ushort __ovld __cnfn upsample(uchar, uchar); +short2 __ovld __cnfn upsample(char2, uchar2); +short3 __ovld __cnfn upsample(char3, uchar3); +short4 __ovld __cnfn upsample(char4, uchar4); +short8 __ovld __cnfn upsample(char8, uchar8); +short16 __ovld __cnfn upsample(char16, uchar16); +ushort2 __ovld __cnfn upsample(uchar2, uchar2); +ushort3 __ovld __cnfn upsample(uchar3, uchar3); +ushort4 __ovld __cnfn upsample(uchar4, uchar4); +ushort8 __ovld __cnfn upsample(uchar8, uchar8); +ushort16 __ovld __cnfn upsample(uchar16, uchar16); + +/** + * result[i] = ((int)hi[i] << 16) | lo[i] + * result[i] = ((uint)hi[i] << 16) | lo[i] + */ +int __ovld __cnfn upsample(short, ushort); +uint __ovld __cnfn upsample(ushort, ushort); +int2 __ovld __cnfn upsample(short2, ushort2); +int3 __ovld __cnfn upsample(short3, ushort3); +int4 __ovld __cnfn upsample(short4, ushort4); +int8 __ovld __cnfn upsample(short8, ushort8); +int16 __ovld __cnfn upsample(short16, ushort16); +uint2 __ovld __cnfn upsample(ushort2, ushort2); +uint3 __ovld __cnfn upsample(ushort3, ushort3); +uint4 __ovld __cnfn upsample(ushort4, ushort4); +uint8 __ovld __cnfn upsample(ushort8, ushort8); +uint16 __ovld __cnfn upsample(ushort16, ushort16); +/** + * result[i] = ((long)hi[i] << 32) | lo[i] + * result[i] = ((ulong)hi[i] << 32) | lo[i] + */ +long __ovld __cnfn upsample(int, uint); +ulong __ovld __cnfn upsample(uint, uint); +long2 __ovld __cnfn upsample(int2, uint2); +long3 __ovld __cnfn upsample(int3, uint3); +long4 __ovld __cnfn upsample(int4, uint4); +long8 __ovld __cnfn upsample(int8, uint8); +long16 __ovld __cnfn upsample(int16, uint16); +ulong2 __ovld __cnfn upsample(uint2, uint2); +ulong3 __ovld __cnfn upsample(uint3, uint3); +ulong4 __ovld __cnfn upsample(uint4, uint4); +ulong8 __ovld __cnfn upsample(uint8, uint8); +ulong16 __ovld __cnfn upsample(uint16, uint16); + +/* + * popcount(x): returns the number of set bit in x + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +char __ovld __cnfn popcount(char); +uchar __ovld __cnfn popcount(uchar); +char2 __ovld __cnfn popcount(char2); +uchar2 __ovld __cnfn popcount(uchar2); +char3 __ovld __cnfn popcount(char3); +uchar3 __ovld __cnfn popcount(uchar3); +char4 __ovld __cnfn popcount(char4); +uchar4 __ovld __cnfn popcount(uchar4); +char8 __ovld __cnfn popcount(char8); +uchar8 __ovld __cnfn popcount(uchar8); +char16 __ovld __cnfn popcount(char16); +uchar16 __ovld __cnfn popcount(uchar16); +short __ovld __cnfn popcount(short); +ushort __ovld __cnfn popcount(ushort); +short2 __ovld __cnfn popcount(short2); +ushort2 __ovld __cnfn popcount(ushort2); +short3 __ovld __cnfn popcount(short3); +ushort3 __ovld __cnfn popcount(ushort3); +short4 __ovld __cnfn popcount(short4); +ushort4 __ovld __cnfn popcount(ushort4); +short8 __ovld __cnfn popcount(short8); +ushort8 __ovld __cnfn popcount(ushort8); +short16 __ovld __cnfn popcount(short16); +ushort16 __ovld __cnfn popcount(ushort16); +int __ovld __cnfn popcount(int); +uint __ovld __cnfn popcount(uint); +int2 __ovld __cnfn popcount(int2); +uint2 __ovld __cnfn popcount(uint2); +int3 __ovld __cnfn popcount(int3); +uint3 __ovld __cnfn popcount(uint3); +int4 __ovld __cnfn popcount(int4); +uint4 __ovld __cnfn popcount(uint4); +int8 __ovld __cnfn popcount(int8); +uint8 __ovld __cnfn popcount(uint8); +int16 __ovld __cnfn popcount(int16); +uint16 __ovld __cnfn popcount(uint16); +long __ovld __cnfn popcount(long); +ulong __ovld __cnfn popcount(ulong); +long2 __ovld __cnfn popcount(long2); +ulong2 __ovld __cnfn popcount(ulong2); +long3 __ovld __cnfn popcount(long3); +ulong3 __ovld __cnfn popcount(ulong3); +long4 __ovld __cnfn popcount(long4); +ulong4 __ovld __cnfn popcount(ulong4); +long8 __ovld __cnfn popcount(long8); +ulong8 __ovld __cnfn popcount(ulong8); +long16 __ovld __cnfn popcount(long16); +ulong16 __ovld __cnfn popcount(ulong16); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +/** + * Multiply two 24-bit integer values x and y and add + * the 32-bit integer result to the 32-bit integer z. + * Refer to definition of mul24 to see how the 24-bit + * integer multiplication is performed. + */ +int __ovld __cnfn mad24(int, int, int); +uint __ovld __cnfn mad24(uint, uint, uint); +int2 __ovld __cnfn mad24(int2, int2, int2); +uint2 __ovld __cnfn mad24(uint2, uint2, uint2); +int3 __ovld __cnfn mad24(int3, int3, int3); +uint3 __ovld __cnfn mad24(uint3, uint3, uint3); +int4 __ovld __cnfn mad24(int4, int4, int4); +uint4 __ovld __cnfn mad24(uint4, uint4, uint4); +int8 __ovld __cnfn mad24(int8, int8, int8); +uint8 __ovld __cnfn mad24(uint8, uint8, uint8); +int16 __ovld __cnfn mad24(int16, int16, int16); +uint16 __ovld __cnfn mad24(uint16, uint16, uint16); + +/** + * Multiply two 24-bit integer values x and y. x and y + * are 32-bit integers but only the low 24-bits are used + * to perform the multiplication. mul24 should only + * be used when values in x and y are in the range [- + * 2^23, 2^23-1] if x and y are signed integers and in the + * range [0, 2^24-1] if x and y are unsigned integers. If + * x and y are not in this range, the multiplication + * result is implementation-defined. + */ +int __ovld __cnfn mul24(int, int); +uint __ovld __cnfn mul24(uint, uint); +int2 __ovld __cnfn mul24(int2, int2); +uint2 __ovld __cnfn mul24(uint2, uint2); +int3 __ovld __cnfn mul24(int3, int3); +uint3 __ovld __cnfn mul24(uint3, uint3); +int4 __ovld __cnfn mul24(int4, int4); +uint4 __ovld __cnfn mul24(uint4, uint4); +int8 __ovld __cnfn mul24(int8, int8); +uint8 __ovld __cnfn mul24(uint8, uint8); +int16 __ovld __cnfn mul24(int16, int16); +uint16 __ovld __cnfn mul24(uint16, uint16); + +// OpenCL v1.1 s6.11.4, v1.2 s6.12.4, v2.0 s6.13.4 - Common Functions + +/** + * Returns fmin(fmax(x, minval), maxval). + * Results are undefined if minval > maxval. + */ +float __ovld __cnfn clamp(float, float, float); +float2 __ovld __cnfn clamp(float2, float2, float2); +float3 __ovld __cnfn clamp(float3, float3, float3); +float4 __ovld __cnfn clamp(float4, float4, float4); +float8 __ovld __cnfn clamp(float8, float8, float8); +float16 __ovld __cnfn clamp(float16, float16, float16); +float2 __ovld __cnfn clamp(float2, float, float); +float3 __ovld __cnfn clamp(float3, float, float); +float4 __ovld __cnfn clamp(float4, float, float); +float8 __ovld __cnfn clamp(float8, float, float); +float16 __ovld __cnfn clamp(float16, float, float); +#ifdef cl_khr_fp64 +double __ovld __cnfn clamp(double, double, double); +double2 __ovld __cnfn clamp(double2, double2, double2); +double3 __ovld __cnfn clamp(double3, double3, double3); +double4 __ovld __cnfn clamp(double4, double4, double4); +double8 __ovld __cnfn clamp(double8, double8, double8); +double16 __ovld __cnfn clamp(double16, double16, double16); +double2 __ovld __cnfn clamp(double2, double, double); +double3 __ovld __cnfn clamp(double3, double, double); +double4 __ovld __cnfn clamp(double4, double, double); +double8 __ovld __cnfn clamp(double8, double, double); +double16 __ovld __cnfn clamp(double16, double, double); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn clamp(half, half, half); +half2 __ovld __cnfn clamp(half2, half2, half2); +half3 __ovld __cnfn clamp(half3, half3, half3); +half4 __ovld __cnfn clamp(half4, half4, half4); +half8 __ovld __cnfn clamp(half8, half8, half8); +half16 __ovld __cnfn clamp(half16, half16, half16); +half2 __ovld __cnfn clamp(half2, half, half); +half3 __ovld __cnfn clamp(half3, half, half); +half4 __ovld __cnfn clamp(half4, half, half); +half8 __ovld __cnfn clamp(half8, half, half); +half16 __ovld __cnfn clamp(half16, half, half); +#endif //cl_khr_fp16 + +/** + * Converts radians to degrees, i.e. (180 / PI) * + * radians. + */ +float __ovld __cnfn degrees(float); +float2 __ovld __cnfn degrees(float2); +float3 __ovld __cnfn degrees(float3); +float4 __ovld __cnfn degrees(float4); +float8 __ovld __cnfn degrees(float8); +float16 __ovld __cnfn degrees(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn degrees(double); +double2 __ovld __cnfn degrees(double2); +double3 __ovld __cnfn degrees(double3); +double4 __ovld __cnfn degrees(double4); +double8 __ovld __cnfn degrees(double8); +double16 __ovld __cnfn degrees(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn degrees(half); +half2 __ovld __cnfn degrees(half2); +half3 __ovld __cnfn degrees(half3); +half4 __ovld __cnfn degrees(half4); +half8 __ovld __cnfn degrees(half8); +half16 __ovld __cnfn degrees(half16); +#endif //cl_khr_fp16 + +/** + * Returns y if x < y, otherwise it returns x. If x and y + * are infinite or NaN, the return values are undefined. + */ +float __ovld __cnfn max(float, float); +float2 __ovld __cnfn max(float2, float2); +float3 __ovld __cnfn max(float3, float3); +float4 __ovld __cnfn max(float4, float4); +float8 __ovld __cnfn max(float8, float8); +float16 __ovld __cnfn max(float16, float16); +float2 __ovld __cnfn max(float2, float); +float3 __ovld __cnfn max(float3, float); +float4 __ovld __cnfn max(float4, float); +float8 __ovld __cnfn max(float8, float); +float16 __ovld __cnfn max(float16, float); +#ifdef cl_khr_fp64 +double __ovld __cnfn max(double, double); +double2 __ovld __cnfn max(double2, double2); +double3 __ovld __cnfn max(double3, double3); +double4 __ovld __cnfn max(double4, double4); +double8 __ovld __cnfn max(double8, double8); +double16 __ovld __cnfn max(double16, double16); +double2 __ovld __cnfn max(double2, double); +double3 __ovld __cnfn max(double3, double); +double4 __ovld __cnfn max(double4, double); +double8 __ovld __cnfn max(double8, double); +double16 __ovld __cnfn max(double16, double); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn max(half, half); +half2 __ovld __cnfn max(half2, half2); +half3 __ovld __cnfn max(half3, half3); +half4 __ovld __cnfn max(half4, half4); +half8 __ovld __cnfn max(half8, half8); +half16 __ovld __cnfn max(half16, half16); +half2 __ovld __cnfn max(half2, half); +half3 __ovld __cnfn max(half3, half); +half4 __ovld __cnfn max(half4, half); +half8 __ovld __cnfn max(half8, half); +half16 __ovld __cnfn max(half16, half); +#endif //cl_khr_fp16 + +/** + * Returns y if y < x, otherwise it returns x. If x and y + * are infinite or NaN, the return values are undefined. + */ +float __ovld __cnfn min(float, float); +float2 __ovld __cnfn min(float2, float2); +float3 __ovld __cnfn min(float3, float3); +float4 __ovld __cnfn min(float4, float4); +float8 __ovld __cnfn min(float8, float8); +float16 __ovld __cnfn min(float16, float16); +float2 __ovld __cnfn min(float2, float); +float3 __ovld __cnfn min(float3, float); +float4 __ovld __cnfn min(float4, float); +float8 __ovld __cnfn min(float8, float); +float16 __ovld __cnfn min(float16, float); +#ifdef cl_khr_fp64 +double __ovld __cnfn min(double, double); +double2 __ovld __cnfn min(double2, double2); +double3 __ovld __cnfn min(double3, double3); +double4 __ovld __cnfn min(double4, double4); +double8 __ovld __cnfn min(double8, double8); +double16 __ovld __cnfn min(double16, double16); +double2 __ovld __cnfn min(double2, double); +double3 __ovld __cnfn min(double3, double); +double4 __ovld __cnfn min(double4, double); +double8 __ovld __cnfn min(double8, double); +double16 __ovld __cnfn min(double16, double); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn min(half, half); +half2 __ovld __cnfn min(half2, half2); +half3 __ovld __cnfn min(half3, half3); +half4 __ovld __cnfn min(half4, half4); +half8 __ovld __cnfn min(half8, half8); +half16 __ovld __cnfn min(half16, half16); +half2 __ovld __cnfn min(half2, half); +half3 __ovld __cnfn min(half3, half); +half4 __ovld __cnfn min(half4, half); +half8 __ovld __cnfn min(half8, half); +half16 __ovld __cnfn min(half16, half); +#endif //cl_khr_fp16 + +/** + * Returns the linear blend of x & y implemented as: + * x + (y - x) * a + * a must be a value in the range 0.0 ... 1.0. If a is not + * in the range 0.0 ... 1.0, the return values are + * undefined. + */ +float __ovld __cnfn mix(float, float, float); +float2 __ovld __cnfn mix(float2, float2, float2); +float3 __ovld __cnfn mix(float3, float3, float3); +float4 __ovld __cnfn mix(float4, float4, float4); +float8 __ovld __cnfn mix(float8, float8, float8); +float16 __ovld __cnfn mix(float16, float16, float16); +float2 __ovld __cnfn mix(float2, float2, float); +float3 __ovld __cnfn mix(float3, float3, float); +float4 __ovld __cnfn mix(float4, float4, float); +float8 __ovld __cnfn mix(float8, float8, float); +float16 __ovld __cnfn mix(float16, float16, float); +#ifdef cl_khr_fp64 +double __ovld __cnfn mix(double, double, double); +double2 __ovld __cnfn mix(double2, double2, double2); +double3 __ovld __cnfn mix(double3, double3, double3); +double4 __ovld __cnfn mix(double4, double4, double4); +double8 __ovld __cnfn mix(double8, double8, double8); +double16 __ovld __cnfn mix(double16, double16, double16); +double2 __ovld __cnfn mix(double2, double2, double); +double3 __ovld __cnfn mix(double3, double3, double); +double4 __ovld __cnfn mix(double4, double4, double); +double8 __ovld __cnfn mix(double8, double8, double); +double16 __ovld __cnfn mix(double16, double16, double); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn mix(half, half, half); +half2 __ovld __cnfn mix(half2, half2, half2); +half3 __ovld __cnfn mix(half3, half3, half3); +half4 __ovld __cnfn mix(half4, half4, half4); +half8 __ovld __cnfn mix(half8, half8, half8); +half16 __ovld __cnfn mix(half16, half16, half16); +half2 __ovld __cnfn mix(half2, half2, half); +half3 __ovld __cnfn mix(half3, half3, half); +half4 __ovld __cnfn mix(half4, half4, half); +half8 __ovld __cnfn mix(half8, half8, half); +half16 __ovld __cnfn mix(half16, half16, half); +#endif //cl_khr_fp16 + +/** + * Converts degrees to radians, i.e. (PI / 180) * + * degrees. + */ +float __ovld __cnfn radians(float); +float2 __ovld __cnfn radians(float2); +float3 __ovld __cnfn radians(float3); +float4 __ovld __cnfn radians(float4); +float8 __ovld __cnfn radians(float8); +float16 __ovld __cnfn radians(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn radians(double); +double2 __ovld __cnfn radians(double2); +double3 __ovld __cnfn radians(double3); +double4 __ovld __cnfn radians(double4); +double8 __ovld __cnfn radians(double8); +double16 __ovld __cnfn radians(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn radians(half); +half2 __ovld __cnfn radians(half2); +half3 __ovld __cnfn radians(half3); +half4 __ovld __cnfn radians(half4); +half8 __ovld __cnfn radians(half8); +half16 __ovld __cnfn radians(half16); +#endif //cl_khr_fp16 + +/** + * Returns 0.0 if x < edge, otherwise it returns 1.0. + */ +float __ovld __cnfn step(float, float); +float2 __ovld __cnfn step(float2, float2); +float3 __ovld __cnfn step(float3, float3); +float4 __ovld __cnfn step(float4, float4); +float8 __ovld __cnfn step(float8, float8); +float16 __ovld __cnfn step(float16, float16); +float2 __ovld __cnfn step(float, float2); +float3 __ovld __cnfn step(float, float3); +float4 __ovld __cnfn step(float, float4); +float8 __ovld __cnfn step(float, float8); +float16 __ovld __cnfn step(float, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn step(double, double); +double2 __ovld __cnfn step(double2, double2); +double3 __ovld __cnfn step(double3, double3); +double4 __ovld __cnfn step(double4, double4); +double8 __ovld __cnfn step(double8, double8); +double16 __ovld __cnfn step(double16, double16); +double2 __ovld __cnfn step(double, double2); +double3 __ovld __cnfn step(double, double3); +double4 __ovld __cnfn step(double, double4); +double8 __ovld __cnfn step(double, double8); +double16 __ovld __cnfn step(double, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn step(half, half); +half2 __ovld __cnfn step(half2, half2); +half3 __ovld __cnfn step(half3, half3); +half4 __ovld __cnfn step(half4, half4); +half8 __ovld __cnfn step(half8, half8); +half16 __ovld __cnfn step(half16, half16); +half2 __ovld __cnfn step(half, half2); +half3 __ovld __cnfn step(half, half3); +half4 __ovld __cnfn step(half, half4); +half8 __ovld __cnfn step(half, half8); +half16 __ovld __cnfn step(half, half16); +#endif //cl_khr_fp16 + +/** + * Returns 0.0 if x <= edge0 and 1.0 if x >= edge1 and + * performs smooth Hermite interpolation between 0 + * and 1when edge0 < x < edge1. This is useful in + * cases where you would want a threshold function + * with a smooth transition. + * This is equivalent to: + * gentype t; + * t = clamp ((x - edge0) / (edge1 - edge0), 0, 1); + * return t * t * (3 - 2 * t); + * Results are undefined if edge0 >= edge1 or if x, + * edge0 or edge1 is a NaN. + */ +float __ovld __cnfn smoothstep(float, float, float); +float2 __ovld __cnfn smoothstep(float2, float2, float2); +float3 __ovld __cnfn smoothstep(float3, float3, float3); +float4 __ovld __cnfn smoothstep(float4, float4, float4); +float8 __ovld __cnfn smoothstep(float8, float8, float8); +float16 __ovld __cnfn smoothstep(float16, float16, float16); +float2 __ovld __cnfn smoothstep(float, float, float2); +float3 __ovld __cnfn smoothstep(float, float, float3); +float4 __ovld __cnfn smoothstep(float, float, float4); +float8 __ovld __cnfn smoothstep(float, float, float8); +float16 __ovld __cnfn smoothstep(float, float, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn smoothstep(double, double, double); +double2 __ovld __cnfn smoothstep(double2, double2, double2); +double3 __ovld __cnfn smoothstep(double3, double3, double3); +double4 __ovld __cnfn smoothstep(double4, double4, double4); +double8 __ovld __cnfn smoothstep(double8, double8, double8); +double16 __ovld __cnfn smoothstep(double16, double16, double16); +double2 __ovld __cnfn smoothstep(double, double, double2); +double3 __ovld __cnfn smoothstep(double, double, double3); +double4 __ovld __cnfn smoothstep(double, double, double4); +double8 __ovld __cnfn smoothstep(double, double, double8); +double16 __ovld __cnfn smoothstep(double, double, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn smoothstep(half, half, half); +half2 __ovld __cnfn smoothstep(half2, half2, half2); +half3 __ovld __cnfn smoothstep(half3, half3, half3); +half4 __ovld __cnfn smoothstep(half4, half4, half4); +half8 __ovld __cnfn smoothstep(half8, half8, half8); +half16 __ovld __cnfn smoothstep(half16, half16, half16); +half2 __ovld __cnfn smoothstep(half, half, half2); +half3 __ovld __cnfn smoothstep(half, half, half3); +half4 __ovld __cnfn smoothstep(half, half, half4); +half8 __ovld __cnfn smoothstep(half, half, half8); +half16 __ovld __cnfn smoothstep(half, half, half16); +#endif //cl_khr_fp16 + +/** + * Returns 1.0 if x > 0, -0.0 if x = -0.0, +0.0 if x = + * +0.0, or -1.0 if x < 0. Returns 0.0 if x is a NaN. + */ +float __ovld __cnfn sign(float); +float2 __ovld __cnfn sign(float2); +float3 __ovld __cnfn sign(float3); +float4 __ovld __cnfn sign(float4); +float8 __ovld __cnfn sign(float8); +float16 __ovld __cnfn sign(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sign(double); +double2 __ovld __cnfn sign(double2); +double3 __ovld __cnfn sign(double3); +double4 __ovld __cnfn sign(double4); +double8 __ovld __cnfn sign(double8); +double16 __ovld __cnfn sign(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sign(half); +half2 __ovld __cnfn sign(half2); +half3 __ovld __cnfn sign(half3); +half4 __ovld __cnfn sign(half4); +half8 __ovld __cnfn sign(half8); +half16 __ovld __cnfn sign(half16); +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.11.5, v1.2 s6.12.5, v2.0 s6.13.5 - Geometric Functions + +/** + * Returns the cross product of p0.xyz and p1.xyz. The + * w component of float4 result returned will be 0.0. + */ +float4 __ovld __cnfn cross(float4, float4); +float3 __ovld __cnfn cross(float3, float3); +#ifdef cl_khr_fp64 +double4 __ovld __cnfn cross(double4, double4); +double3 __ovld __cnfn cross(double3, double3); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half4 __ovld __cnfn cross(half4, half4); +half3 __ovld __cnfn cross(half3, half3); +#endif //cl_khr_fp16 + +/** + * Compute dot product. + */ +float __ovld __cnfn dot(float, float); +float __ovld __cnfn dot(float2, float2); +float __ovld __cnfn dot(float3, float3); +float __ovld __cnfn dot(float4, float4); +#ifdef cl_khr_fp64 +double __ovld __cnfn dot(double, double); +double __ovld __cnfn dot(double2, double2); +double __ovld __cnfn dot(double3, double3); +double __ovld __cnfn dot(double4, double4); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn dot(half, half); +half __ovld __cnfn dot(half2, half2); +half __ovld __cnfn dot(half3, half3); +half __ovld __cnfn dot(half4, half4); +#endif //cl_khr_fp16 + +/** + * Returns the distance between p0 and p1. This is + * calculated as length(p0 - p1). + */ +float __ovld __cnfn distance(float, float); +float __ovld __cnfn distance(float2, float2); +float __ovld __cnfn distance(float3, float3); +float __ovld __cnfn distance(float4, float4); +#ifdef cl_khr_fp64 +double __ovld __cnfn distance(double, double); +double __ovld __cnfn distance(double2, double2); +double __ovld __cnfn distance(double3, double3); +double __ovld __cnfn distance(double4, double4); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn distance(half, half); +half __ovld __cnfn distance(half2, half2); +half __ovld __cnfn distance(half3, half3); +half __ovld __cnfn distance(half4, half4); +#endif //cl_khr_fp16 + +/** + * Return the length of vector p, i.e., + * sqrt(p.x2 + p.y 2 + ...) + */ +float __ovld __cnfn length(float); +float __ovld __cnfn length(float2); +float __ovld __cnfn length(float3); +float __ovld __cnfn length(float4); +#ifdef cl_khr_fp64 +double __ovld __cnfn length(double); +double __ovld __cnfn length(double2); +double __ovld __cnfn length(double3); +double __ovld __cnfn length(double4); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn length(half); +half __ovld __cnfn length(half2); +half __ovld __cnfn length(half3); +half __ovld __cnfn length(half4); +#endif //cl_khr_fp16 + +/** + * Returns a vector in the same direction as p but with a + * length of 1. + */ +float __ovld __cnfn normalize(float); +float2 __ovld __cnfn normalize(float2); +float3 __ovld __cnfn normalize(float3); +float4 __ovld __cnfn normalize(float4); +#ifdef cl_khr_fp64 +double __ovld __cnfn normalize(double); +double2 __ovld __cnfn normalize(double2); +double3 __ovld __cnfn normalize(double3); +double4 __ovld __cnfn normalize(double4); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn normalize(half); +half2 __ovld __cnfn normalize(half2); +half3 __ovld __cnfn normalize(half3); +half4 __ovld __cnfn normalize(half4); +#endif //cl_khr_fp16 + +/** + * Returns fast_length(p0 - p1). + */ +float __ovld __cnfn fast_distance(float, float); +float __ovld __cnfn fast_distance(float2, float2); +float __ovld __cnfn fast_distance(float3, float3); +float __ovld __cnfn fast_distance(float4, float4); + +/** + * Returns the length of vector p computed as: + * half_sqrt(p.x2 + p.y2 + ...) + */ +float __ovld __cnfn fast_length(float); +float __ovld __cnfn fast_length(float2); +float __ovld __cnfn fast_length(float3); +float __ovld __cnfn fast_length(float4); + +/** + * Returns a vector in the same direction as p but with a + * length of 1. fast_normalize is computed as: + * p * half_rsqrt (p.x^2 + p.y^2 + ... ) + * The result shall be within 8192 ulps error from the + * infinitely precise result of + * if (all(p == 0.0f)) + * result = p; + * else + * result = p / sqrt (p.x^2 + p.y^2 + ...); + * with the following exceptions: + * 1) If the sum of squares is greater than FLT_MAX + * then the value of the floating-point values in the + * result vector are undefined. + * 2) If the sum of squares is less than FLT_MIN then + * the implementation may return back p. + * 3) If the device is in "denorms are flushed to zero" + * mode, individual operand elements with magnitude + * less than sqrt(FLT_MIN) may be flushed to zero + * before proceeding with the calculation. + */ +float __ovld __cnfn fast_normalize(float); +float2 __ovld __cnfn fast_normalize(float2); +float3 __ovld __cnfn fast_normalize(float3); +float4 __ovld __cnfn fast_normalize(float4); + +// OpenCL v1.1 s6.11.6, v1.2 s6.12.6, v2.0 s6.13.6 - Relational Functions + +/** + * intn isequal (floatn x, floatn y) + * Returns the component-wise compare of x == y. + */ +int __ovld __cnfn isequal(float, float); +int2 __ovld __cnfn isequal(float2, float2); +int3 __ovld __cnfn isequal(float3, float3); +int4 __ovld __cnfn isequal(float4, float4); +int8 __ovld __cnfn isequal(float8, float8); +int16 __ovld __cnfn isequal(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isequal(double, double); +long2 __ovld __cnfn isequal(double2, double2); +long3 __ovld __cnfn isequal(double3, double3); +long4 __ovld __cnfn isequal(double4, double4); +long8 __ovld __cnfn isequal(double8, double8); +long16 __ovld __cnfn isequal(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isequal(half, half); +short2 __ovld __cnfn isequal(half2, half2); +short3 __ovld __cnfn isequal(half3, half3); +short4 __ovld __cnfn isequal(half4, half4); +short8 __ovld __cnfn isequal(half8, half8); +short16 __ovld __cnfn isequal(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x != y. + */ +int __ovld __cnfn isnotequal(float, float); +int2 __ovld __cnfn isnotequal(float2, float2); +int3 __ovld __cnfn isnotequal(float3, float3); +int4 __ovld __cnfn isnotequal(float4, float4); +int8 __ovld __cnfn isnotequal(float8, float8); +int16 __ovld __cnfn isnotequal(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isnotequal(double, double); +long2 __ovld __cnfn isnotequal(double2, double2); +long3 __ovld __cnfn isnotequal(double3, double3); +long4 __ovld __cnfn isnotequal(double4, double4); +long8 __ovld __cnfn isnotequal(double8, double8); +long16 __ovld __cnfn isnotequal(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isnotequal(half, half); +short2 __ovld __cnfn isnotequal(half2, half2); +short3 __ovld __cnfn isnotequal(half3, half3); +short4 __ovld __cnfn isnotequal(half4, half4); +short8 __ovld __cnfn isnotequal(half8, half8); +short16 __ovld __cnfn isnotequal(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x > y. + */ +int __ovld __cnfn isgreater(float, float); +int2 __ovld __cnfn isgreater(float2, float2); +int3 __ovld __cnfn isgreater(float3, float3); +int4 __ovld __cnfn isgreater(float4, float4); +int8 __ovld __cnfn isgreater(float8, float8); +int16 __ovld __cnfn isgreater(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isgreater(double, double); +long2 __ovld __cnfn isgreater(double2, double2); +long3 __ovld __cnfn isgreater(double3, double3); +long4 __ovld __cnfn isgreater(double4, double4); +long8 __ovld __cnfn isgreater(double8, double8); +long16 __ovld __cnfn isgreater(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isgreater(half, half); +short2 __ovld __cnfn isgreater(half2, half2); +short3 __ovld __cnfn isgreater(half3, half3); +short4 __ovld __cnfn isgreater(half4, half4); +short8 __ovld __cnfn isgreater(half8, half8); +short16 __ovld __cnfn isgreater(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x >= y. + */ +int __ovld __cnfn isgreaterequal(float, float); +int2 __ovld __cnfn isgreaterequal(float2, float2); +int3 __ovld __cnfn isgreaterequal(float3, float3); +int4 __ovld __cnfn isgreaterequal(float4, float4); +int8 __ovld __cnfn isgreaterequal(float8, float8); +int16 __ovld __cnfn isgreaterequal(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isgreaterequal(double, double); +long2 __ovld __cnfn isgreaterequal(double2, double2); +long3 __ovld __cnfn isgreaterequal(double3, double3); +long4 __ovld __cnfn isgreaterequal(double4, double4); +long8 __ovld __cnfn isgreaterequal(double8, double8); +long16 __ovld __cnfn isgreaterequal(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isgreaterequal(half, half); +short2 __ovld __cnfn isgreaterequal(half2, half2); +short3 __ovld __cnfn isgreaterequal(half3, half3); +short4 __ovld __cnfn isgreaterequal(half4, half4); +short8 __ovld __cnfn isgreaterequal(half8, half8); +short16 __ovld __cnfn isgreaterequal(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x < y. + */ +int __ovld __cnfn isless(float, float); +int2 __ovld __cnfn isless(float2, float2); +int3 __ovld __cnfn isless(float3, float3); +int4 __ovld __cnfn isless(float4, float4); +int8 __ovld __cnfn isless(float8, float8); +int16 __ovld __cnfn isless(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isless(double, double); +long2 __ovld __cnfn isless(double2, double2); +long3 __ovld __cnfn isless(double3, double3); +long4 __ovld __cnfn isless(double4, double4); +long8 __ovld __cnfn isless(double8, double8); +long16 __ovld __cnfn isless(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isless(half, half); +short2 __ovld __cnfn isless(half2, half2); +short3 __ovld __cnfn isless(half3, half3); +short4 __ovld __cnfn isless(half4, half4); +short8 __ovld __cnfn isless(half8, half8); +short16 __ovld __cnfn isless(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x <= y. + */ +int __ovld __cnfn islessequal(float, float); +int2 __ovld __cnfn islessequal(float2, float2); +int3 __ovld __cnfn islessequal(float3, float3); +int4 __ovld __cnfn islessequal(float4, float4); +int8 __ovld __cnfn islessequal(float8, float8); +int16 __ovld __cnfn islessequal(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn islessequal(double, double); +long2 __ovld __cnfn islessequal(double2, double2); +long3 __ovld __cnfn islessequal(double3, double3); +long4 __ovld __cnfn islessequal(double4, double4); +long8 __ovld __cnfn islessequal(double8, double8); +long16 __ovld __cnfn islessequal(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn islessequal(half, half); +short2 __ovld __cnfn islessequal(half2, half2); +short3 __ovld __cnfn islessequal(half3, half3); +short4 __ovld __cnfn islessequal(half4, half4); +short8 __ovld __cnfn islessequal(half8, half8); +short16 __ovld __cnfn islessequal(half16, half16); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of + * (x < y) || (x > y) . + */ +int __ovld __cnfn islessgreater(float, float); +int2 __ovld __cnfn islessgreater(float2, float2); +int3 __ovld __cnfn islessgreater(float3, float3); +int4 __ovld __cnfn islessgreater(float4, float4); +int8 __ovld __cnfn islessgreater(float8, float8); +int16 __ovld __cnfn islessgreater(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn islessgreater(double, double); +long2 __ovld __cnfn islessgreater(double2, double2); +long3 __ovld __cnfn islessgreater(double3, double3); +long4 __ovld __cnfn islessgreater(double4, double4); +long8 __ovld __cnfn islessgreater(double8, double8); +long16 __ovld __cnfn islessgreater(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn islessgreater(half, half); +short2 __ovld __cnfn islessgreater(half2, half2); +short3 __ovld __cnfn islessgreater(half3, half3); +short4 __ovld __cnfn islessgreater(half4, half4); +short8 __ovld __cnfn islessgreater(half8, half8); +short16 __ovld __cnfn islessgreater(half16, half16); +#endif //cl_khr_fp16 + +/** + * Test for finite value. + */ +int __ovld __cnfn isfinite(float); +int2 __ovld __cnfn isfinite(float2); +int3 __ovld __cnfn isfinite(float3); +int4 __ovld __cnfn isfinite(float4); +int8 __ovld __cnfn isfinite(float8); +int16 __ovld __cnfn isfinite(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isfinite(double); +long2 __ovld __cnfn isfinite(double2); +long3 __ovld __cnfn isfinite(double3); +long4 __ovld __cnfn isfinite(double4); +long8 __ovld __cnfn isfinite(double8); +long16 __ovld __cnfn isfinite(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isfinite(half); +short2 __ovld __cnfn isfinite(half2); +short3 __ovld __cnfn isfinite(half3); +short4 __ovld __cnfn isfinite(half4); +short8 __ovld __cnfn isfinite(half8); +short16 __ovld __cnfn isfinite(half16); +#endif //cl_khr_fp16 + +/** + * Test for infinity value (+ve or -ve) . + */ +int __ovld __cnfn isinf(float); +int2 __ovld __cnfn isinf(float2); +int3 __ovld __cnfn isinf(float3); +int4 __ovld __cnfn isinf(float4); +int8 __ovld __cnfn isinf(float8); +int16 __ovld __cnfn isinf(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isinf(double); +long2 __ovld __cnfn isinf(double2); +long3 __ovld __cnfn isinf(double3); +long4 __ovld __cnfn isinf(double4); +long8 __ovld __cnfn isinf(double8); +long16 __ovld __cnfn isinf(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isinf(half); +short2 __ovld __cnfn isinf(half2); +short3 __ovld __cnfn isinf(half3); +short4 __ovld __cnfn isinf(half4); +short8 __ovld __cnfn isinf(half8); +short16 __ovld __cnfn isinf(half16); +#endif //cl_khr_fp16 + +/** + * Test for a NaN. + */ +int __ovld __cnfn isnan(float); +int2 __ovld __cnfn isnan(float2); +int3 __ovld __cnfn isnan(float3); +int4 __ovld __cnfn isnan(float4); +int8 __ovld __cnfn isnan(float8); +int16 __ovld __cnfn isnan(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isnan(double); +long2 __ovld __cnfn isnan(double2); +long3 __ovld __cnfn isnan(double3); +long4 __ovld __cnfn isnan(double4); +long8 __ovld __cnfn isnan(double8); +long16 __ovld __cnfn isnan(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isnan(half); +short2 __ovld __cnfn isnan(half2); +short3 __ovld __cnfn isnan(half3); +short4 __ovld __cnfn isnan(half4); +short8 __ovld __cnfn isnan(half8); +short16 __ovld __cnfn isnan(half16); +#endif //cl_khr_fp16 + +/** + * Test for a normal value. + */ +int __ovld __cnfn isnormal(float); +int2 __ovld __cnfn isnormal(float2); +int3 __ovld __cnfn isnormal(float3); +int4 __ovld __cnfn isnormal(float4); +int8 __ovld __cnfn isnormal(float8); +int16 __ovld __cnfn isnormal(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isnormal(double); +long2 __ovld __cnfn isnormal(double2); +long3 __ovld __cnfn isnormal(double3); +long4 __ovld __cnfn isnormal(double4); +long8 __ovld __cnfn isnormal(double8); +long16 __ovld __cnfn isnormal(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isnormal(half); +short2 __ovld __cnfn isnormal(half2); +short3 __ovld __cnfn isnormal(half3); +short4 __ovld __cnfn isnormal(half4); +short8 __ovld __cnfn isnormal(half8); +short16 __ovld __cnfn isnormal(half16); +#endif //cl_khr_fp16 + +/** + * Test if arguments are ordered. isordered() takes + * arguments x and y, and returns the result + * isequal(x, x) && isequal(y, y). + */ +int __ovld __cnfn isordered(float, float); +int2 __ovld __cnfn isordered(float2, float2); +int3 __ovld __cnfn isordered(float3, float3); +int4 __ovld __cnfn isordered(float4, float4); +int8 __ovld __cnfn isordered(float8, float8); +int16 __ovld __cnfn isordered(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isordered(double, double); +long2 __ovld __cnfn isordered(double2, double2); +long3 __ovld __cnfn isordered(double3, double3); +long4 __ovld __cnfn isordered(double4, double4); +long8 __ovld __cnfn isordered(double8, double8); +long16 __ovld __cnfn isordered(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isordered(half, half); +short2 __ovld __cnfn isordered(half2, half2); +short3 __ovld __cnfn isordered(half3, half3); +short4 __ovld __cnfn isordered(half4, half4); +short8 __ovld __cnfn isordered(half8, half8); +short16 __ovld __cnfn isordered(half16, half16); +#endif //cl_khr_fp16 + +/** + * Test if arguments are unordered. isunordered() + * takes arguments x and y, returning non-zero if x or y + * is NaN, and zero otherwise. + */ +int __ovld __cnfn isunordered(float, float); +int2 __ovld __cnfn isunordered(float2, float2); +int3 __ovld __cnfn isunordered(float3, float3); +int4 __ovld __cnfn isunordered(float4, float4); +int8 __ovld __cnfn isunordered(float8, float8); +int16 __ovld __cnfn isunordered(float16, float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isunordered(double, double); +long2 __ovld __cnfn isunordered(double2, double2); +long3 __ovld __cnfn isunordered(double3, double3); +long4 __ovld __cnfn isunordered(double4, double4); +long8 __ovld __cnfn isunordered(double8, double8); +long16 __ovld __cnfn isunordered(double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isunordered(half, half); +short2 __ovld __cnfn isunordered(half2, half2); +short3 __ovld __cnfn isunordered(half3, half3); +short4 __ovld __cnfn isunordered(half4, half4); +short8 __ovld __cnfn isunordered(half8, half8); +short16 __ovld __cnfn isunordered(half16, half16); +#endif //cl_khr_fp16 + +/** + * Test for sign bit. The scalar version of the function + * returns a 1 if the sign bit in the float is set else returns + * 0. The vector version of the function returns the + * following for each component in floatn: a -1 if the + * sign bit in the float is set else returns 0. + */ +int __ovld __cnfn signbit(float); +int2 __ovld __cnfn signbit(float2); +int3 __ovld __cnfn signbit(float3); +int4 __ovld __cnfn signbit(float4); +int8 __ovld __cnfn signbit(float8); +int16 __ovld __cnfn signbit(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn signbit(double); +long2 __ovld __cnfn signbit(double2); +long3 __ovld __cnfn signbit(double3); +long4 __ovld __cnfn signbit(double4); +long8 __ovld __cnfn signbit(double8); +long16 __ovld __cnfn signbit(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn signbit(half); +short2 __ovld __cnfn signbit(half2); +short3 __ovld __cnfn signbit(half3); +short4 __ovld __cnfn signbit(half4); +short8 __ovld __cnfn signbit(half8); +short16 __ovld __cnfn signbit(half16); +#endif //cl_khr_fp16 + +/** + * Returns 1 if the most significant bit in any component + * of x is set; otherwise returns 0. + */ +int __ovld __cnfn any(char); +int __ovld __cnfn any(char2); +int __ovld __cnfn any(char3); +int __ovld __cnfn any(char4); +int __ovld __cnfn any(char8); +int __ovld __cnfn any(char16); +int __ovld __cnfn any(short); +int __ovld __cnfn any(short2); +int __ovld __cnfn any(short3); +int __ovld __cnfn any(short4); +int __ovld __cnfn any(short8); +int __ovld __cnfn any(short16); +int __ovld __cnfn any(int); +int __ovld __cnfn any(int2); +int __ovld __cnfn any(int3); +int __ovld __cnfn any(int4); +int __ovld __cnfn any(int8); +int __ovld __cnfn any(int16); +int __ovld __cnfn any(long); +int __ovld __cnfn any(long2); +int __ovld __cnfn any(long3); +int __ovld __cnfn any(long4); +int __ovld __cnfn any(long8); +int __ovld __cnfn any(long16); + +/** + * Returns 1 if the most significant bit in all components + * of x is set; otherwise returns 0. + */ +int __ovld __cnfn all(char); +int __ovld __cnfn all(char2); +int __ovld __cnfn all(char3); +int __ovld __cnfn all(char4); +int __ovld __cnfn all(char8); +int __ovld __cnfn all(char16); +int __ovld __cnfn all(short); +int __ovld __cnfn all(short2); +int __ovld __cnfn all(short3); +int __ovld __cnfn all(short4); +int __ovld __cnfn all(short8); +int __ovld __cnfn all(short16); +int __ovld __cnfn all(int); +int __ovld __cnfn all(int2); +int __ovld __cnfn all(int3); +int __ovld __cnfn all(int4); +int __ovld __cnfn all(int8); +int __ovld __cnfn all(int16); +int __ovld __cnfn all(long); +int __ovld __cnfn all(long2); +int __ovld __cnfn all(long3); +int __ovld __cnfn all(long4); +int __ovld __cnfn all(long8); +int __ovld __cnfn all(long16); + +/** + * Each bit of the result is the corresponding bit of a if + * the corresponding bit of c is 0. Otherwise it is the + * corresponding bit of b. + */ +char __ovld __cnfn bitselect(char, char, char); +uchar __ovld __cnfn bitselect(uchar, uchar, uchar); +char2 __ovld __cnfn bitselect(char2, char2, char2); +uchar2 __ovld __cnfn bitselect(uchar2, uchar2, uchar2); +char3 __ovld __cnfn bitselect(char3, char3, char3); +uchar3 __ovld __cnfn bitselect(uchar3, uchar3, uchar3); +char4 __ovld __cnfn bitselect(char4, char4, char4); +uchar4 __ovld __cnfn bitselect(uchar4, uchar4, uchar4); +char8 __ovld __cnfn bitselect(char8, char8, char8); +uchar8 __ovld __cnfn bitselect(uchar8, uchar8, uchar8); +char16 __ovld __cnfn bitselect(char16, char16, char16); +uchar16 __ovld __cnfn bitselect(uchar16, uchar16, uchar16); +short __ovld __cnfn bitselect(short, short, short); +ushort __ovld __cnfn bitselect(ushort, ushort, ushort); +short2 __ovld __cnfn bitselect(short2, short2, short2); +ushort2 __ovld __cnfn bitselect(ushort2, ushort2, ushort2); +short3 __ovld __cnfn bitselect(short3, short3, short3); +ushort3 __ovld __cnfn bitselect(ushort3, ushort3, ushort3); +short4 __ovld __cnfn bitselect(short4, short4, short4); +ushort4 __ovld __cnfn bitselect(ushort4, ushort4, ushort4); +short8 __ovld __cnfn bitselect(short8, short8, short8); +ushort8 __ovld __cnfn bitselect(ushort8, ushort8, ushort8); +short16 __ovld __cnfn bitselect(short16, short16, short16); +ushort16 __ovld __cnfn bitselect(ushort16, ushort16, ushort16); +int __ovld __cnfn bitselect(int, int, int); +uint __ovld __cnfn bitselect(uint, uint, uint); +int2 __ovld __cnfn bitselect(int2, int2, int2); +uint2 __ovld __cnfn bitselect(uint2, uint2, uint2); +int3 __ovld __cnfn bitselect(int3, int3, int3); +uint3 __ovld __cnfn bitselect(uint3, uint3, uint3); +int4 __ovld __cnfn bitselect(int4, int4, int4); +uint4 __ovld __cnfn bitselect(uint4, uint4, uint4); +int8 __ovld __cnfn bitselect(int8, int8, int8); +uint8 __ovld __cnfn bitselect(uint8, uint8, uint8); +int16 __ovld __cnfn bitselect(int16, int16, int16); +uint16 __ovld __cnfn bitselect(uint16, uint16, uint16); +long __ovld __cnfn bitselect(long, long, long); +ulong __ovld __cnfn bitselect(ulong, ulong, ulong); +long2 __ovld __cnfn bitselect(long2, long2, long2); +ulong2 __ovld __cnfn bitselect(ulong2, ulong2, ulong2); +long3 __ovld __cnfn bitselect(long3, long3, long3); +ulong3 __ovld __cnfn bitselect(ulong3, ulong3, ulong3); +long4 __ovld __cnfn bitselect(long4, long4, long4); +ulong4 __ovld __cnfn bitselect(ulong4, ulong4, ulong4); +long8 __ovld __cnfn bitselect(long8, long8, long8); +ulong8 __ovld __cnfn bitselect(ulong8, ulong8, ulong8); +long16 __ovld __cnfn bitselect(long16, long16, long16); +ulong16 __ovld __cnfn bitselect(ulong16, ulong16, ulong16); +float __ovld __cnfn bitselect(float, float, float); +float2 __ovld __cnfn bitselect(float2, float2, float2); +float3 __ovld __cnfn bitselect(float3, float3, float3); +float4 __ovld __cnfn bitselect(float4, float4, float4); +float8 __ovld __cnfn bitselect(float8, float8, float8); +float16 __ovld __cnfn bitselect(float16, float16, float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn bitselect(double, double, double); +double2 __ovld __cnfn bitselect(double2, double2, double2); +double3 __ovld __cnfn bitselect(double3, double3, double3); +double4 __ovld __cnfn bitselect(double4, double4, double4); +double8 __ovld __cnfn bitselect(double8, double8, double8); +double16 __ovld __cnfn bitselect(double16, double16, double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn bitselect(half, half, half); +half2 __ovld __cnfn bitselect(half2, half2, half2); +half3 __ovld __cnfn bitselect(half3, half3, half3); +half4 __ovld __cnfn bitselect(half4, half4, half4); +half8 __ovld __cnfn bitselect(half8, half8, half8); +half16 __ovld __cnfn bitselect(half16, half16, half16); +#endif //cl_khr_fp16 + +/** + * For each component of a vector type, + * result[i] = if MSB of c[i] is set ? b[i] : a[i]. + * For a scalar type, result = c ? b : a. + * b and a must have the same type. + * c must have the same number of elements and bits as a. + */ +char __ovld __cnfn select(char, char, char); +uchar __ovld __cnfn select(uchar, uchar, char); +char2 __ovld __cnfn select(char2, char2, char2); +uchar2 __ovld __cnfn select(uchar2, uchar2, char2); +char3 __ovld __cnfn select(char3, char3, char3); +uchar3 __ovld __cnfn select(uchar3, uchar3, char3); +char4 __ovld __cnfn select(char4, char4, char4); +uchar4 __ovld __cnfn select(uchar4, uchar4, char4); +char8 __ovld __cnfn select(char8, char8, char8); +uchar8 __ovld __cnfn select(uchar8, uchar8, char8); +char16 __ovld __cnfn select(char16, char16, char16); +uchar16 __ovld __cnfn select(uchar16, uchar16, char16); + +short __ovld __cnfn select(short, short, short); +ushort __ovld __cnfn select(ushort, ushort, short); +short2 __ovld __cnfn select(short2, short2, short2); +ushort2 __ovld __cnfn select(ushort2, ushort2, short2); +short3 __ovld __cnfn select(short3, short3, short3); +ushort3 __ovld __cnfn select(ushort3, ushort3, short3); +short4 __ovld __cnfn select(short4, short4, short4); +ushort4 __ovld __cnfn select(ushort4, ushort4, short4); +short8 __ovld __cnfn select(short8, short8, short8); +ushort8 __ovld __cnfn select(ushort8, ushort8, short8); +short16 __ovld __cnfn select(short16, short16, short16); +ushort16 __ovld __cnfn select(ushort16, ushort16, short16); + +int __ovld __cnfn select(int, int, int); +uint __ovld __cnfn select(uint, uint, int); +int2 __ovld __cnfn select(int2, int2, int2); +uint2 __ovld __cnfn select(uint2, uint2, int2); +int3 __ovld __cnfn select(int3, int3, int3); +uint3 __ovld __cnfn select(uint3, uint3, int3); +int4 __ovld __cnfn select(int4, int4, int4); +uint4 __ovld __cnfn select(uint4, uint4, int4); +int8 __ovld __cnfn select(int8, int8, int8); +uint8 __ovld __cnfn select(uint8, uint8, int8); +int16 __ovld __cnfn select(int16, int16, int16); +uint16 __ovld __cnfn select(uint16, uint16, int16); +float __ovld __cnfn select(float, float, int); +float2 __ovld __cnfn select(float2, float2, int2); +float3 __ovld __cnfn select(float3, float3, int3); +float4 __ovld __cnfn select(float4, float4, int4); +float8 __ovld __cnfn select(float8, float8, int8); +float16 __ovld __cnfn select(float16, float16, int16); + +long __ovld __cnfn select(long, long, long); +ulong __ovld __cnfn select(ulong, ulong, long); +long2 __ovld __cnfn select(long2, long2, long2); +ulong2 __ovld __cnfn select(ulong2, ulong2, long2); +long3 __ovld __cnfn select(long3, long3, long3); +ulong3 __ovld __cnfn select(ulong3, ulong3, long3); +long4 __ovld __cnfn select(long4, long4, long4); +ulong4 __ovld __cnfn select(ulong4, ulong4, long4); +long8 __ovld __cnfn select(long8, long8, long8); +ulong8 __ovld __cnfn select(ulong8, ulong8, long8); +long16 __ovld __cnfn select(long16, long16, long16); +ulong16 __ovld __cnfn select(ulong16, ulong16, long16); + +char __ovld __cnfn select(char, char, uchar); +uchar __ovld __cnfn select(uchar, uchar, uchar); +char2 __ovld __cnfn select(char2, char2, uchar2); +uchar2 __ovld __cnfn select(uchar2, uchar2, uchar2); +char3 __ovld __cnfn select(char3, char3, uchar3); +uchar3 __ovld __cnfn select(uchar3, uchar3, uchar3); +char4 __ovld __cnfn select(char4, char4, uchar4); +uchar4 __ovld __cnfn select(uchar4, uchar4, uchar4); +char8 __ovld __cnfn select(char8, char8, uchar8); +uchar8 __ovld __cnfn select(uchar8, uchar8, uchar8); +char16 __ovld __cnfn select(char16, char16, uchar16); +uchar16 __ovld __cnfn select(uchar16, uchar16, uchar16); + +short __ovld __cnfn select(short, short, ushort); +ushort __ovld __cnfn select(ushort, ushort, ushort); +short2 __ovld __cnfn select(short2, short2, ushort2); +ushort2 __ovld __cnfn select(ushort2, ushort2, ushort2); +short3 __ovld __cnfn select(short3, short3, ushort3); +ushort3 __ovld __cnfn select(ushort3, ushort3, ushort3); +short4 __ovld __cnfn select(short4, short4, ushort4); +ushort4 __ovld __cnfn select(ushort4, ushort4, ushort4); +short8 __ovld __cnfn select(short8, short8, ushort8); +ushort8 __ovld __cnfn select(ushort8, ushort8, ushort8); +short16 __ovld __cnfn select(short16, short16, ushort16); +ushort16 __ovld __cnfn select(ushort16, ushort16, ushort16); + +int __ovld __cnfn select(int, int, uint); +uint __ovld __cnfn select(uint, uint, uint); +int2 __ovld __cnfn select(int2, int2, uint2); +uint2 __ovld __cnfn select(uint2, uint2, uint2); +int3 __ovld __cnfn select(int3, int3, uint3); +uint3 __ovld __cnfn select(uint3, uint3, uint3); +int4 __ovld __cnfn select(int4, int4, uint4); +uint4 __ovld __cnfn select(uint4, uint4, uint4); +int8 __ovld __cnfn select(int8, int8, uint8); +uint8 __ovld __cnfn select(uint8, uint8, uint8); +int16 __ovld __cnfn select(int16, int16, uint16); +uint16 __ovld __cnfn select(uint16, uint16, uint16); +float __ovld __cnfn select(float, float, uint); +float2 __ovld __cnfn select(float2, float2, uint2); +float3 __ovld __cnfn select(float3, float3, uint3); +float4 __ovld __cnfn select(float4, float4, uint4); +float8 __ovld __cnfn select(float8, float8, uint8); +float16 __ovld __cnfn select(float16, float16, uint16); + +long __ovld __cnfn select(long, long, ulong); +ulong __ovld __cnfn select(ulong, ulong, ulong); +long2 __ovld __cnfn select(long2, long2, ulong2); +ulong2 __ovld __cnfn select(ulong2, ulong2, ulong2); +long3 __ovld __cnfn select(long3, long3, ulong3); +ulong3 __ovld __cnfn select(ulong3, ulong3, ulong3); +long4 __ovld __cnfn select(long4, long4, ulong4); +ulong4 __ovld __cnfn select(ulong4, ulong4, ulong4); +long8 __ovld __cnfn select(long8, long8, ulong8); +ulong8 __ovld __cnfn select(ulong8, ulong8, ulong8); +long16 __ovld __cnfn select(long16, long16, ulong16); +ulong16 __ovld __cnfn select(ulong16, ulong16, ulong16); + +#ifdef cl_khr_fp64 +double __ovld __cnfn select(double, double, long); +double2 __ovld __cnfn select(double2, double2, long2); +double3 __ovld __cnfn select(double3, double3, long3); +double4 __ovld __cnfn select(double4, double4, long4); +double8 __ovld __cnfn select(double8, double8, long8); +double16 __ovld __cnfn select(double16, double16, long16); +double __ovld __cnfn select(double, double, ulong); +double2 __ovld __cnfn select(double2, double2, ulong2); +double3 __ovld __cnfn select(double3, double3, ulong3); +double4 __ovld __cnfn select(double4, double4, ulong4); +double8 __ovld __cnfn select(double8, double8, ulong8); +double16 __ovld __cnfn select(double16, double16, ulong16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn select(half, half, short); +half2 __ovld __cnfn select(half2, half2, short2); +half3 __ovld __cnfn select(half3, half3, short3); +half4 __ovld __cnfn select(half4, half4, short4); +half8 __ovld __cnfn select(half8, half8, short8); +half16 __ovld __cnfn select(half16, half16, short16); +half __ovld __cnfn select(half, half, ushort); +half2 __ovld __cnfn select(half2, half2, ushort2); +half3 __ovld __cnfn select(half3, half3, ushort3); +half4 __ovld __cnfn select(half4, half4, ushort4); +half8 __ovld __cnfn select(half8, half8, ushort8); +half16 __ovld __cnfn select(half16, half16, ushort16); +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.11.7, v1.2 s6.12.7, v2.0 s6.13.7 - Vector Data Load and Store Functions +// OpenCL extensions v1.1 s9.6.6, v1.2 s9.5.6, v2.0 s9.4.6 - Vector Data Load and Store Functions for Half Type +/** + * Use generic type gentype to indicate the built-in data types + * char, uchar, short, ushort, int, uint, long, ulong, float, + * double or half. + * + * vloadn return sizeof (gentypen) bytes of data read from address (p + (offset * n)). + * + * vstoren write sizeof (gentypen) bytes given by data to address (p + (offset * n)). + * + * The address computed as (p + (offset * n)) must be + * 8-bit aligned if gentype is char, uchar; + * 16-bit aligned if gentype is short, ushort, half; + * 32-bit aligned if gentype is int, uint, float; + * 64-bit aligned if gentype is long, ulong, double. + */ + +char2 __ovld __purefn vload2(size_t, const __constant char *); +uchar2 __ovld __purefn vload2(size_t, const __constant uchar *); +short2 __ovld __purefn vload2(size_t, const __constant short *); +ushort2 __ovld __purefn vload2(size_t, const __constant ushort *); +int2 __ovld __purefn vload2(size_t, const __constant int *); +uint2 __ovld __purefn vload2(size_t, const __constant uint *); +long2 __ovld __purefn vload2(size_t, const __constant long *); +ulong2 __ovld __purefn vload2(size_t, const __constant ulong *); +float2 __ovld __purefn vload2(size_t, const __constant float *); +char3 __ovld __purefn vload3(size_t, const __constant char *); +uchar3 __ovld __purefn vload3(size_t, const __constant uchar *); +short3 __ovld __purefn vload3(size_t, const __constant short *); +ushort3 __ovld __purefn vload3(size_t, const __constant ushort *); +int3 __ovld __purefn vload3(size_t, const __constant int *); +uint3 __ovld __purefn vload3(size_t, const __constant uint *); +long3 __ovld __purefn vload3(size_t, const __constant long *); +ulong3 __ovld __purefn vload3(size_t, const __constant ulong *); +float3 __ovld __purefn vload3(size_t, const __constant float *); +char4 __ovld __purefn vload4(size_t, const __constant char *); +uchar4 __ovld __purefn vload4(size_t, const __constant uchar *); +short4 __ovld __purefn vload4(size_t, const __constant short *); +ushort4 __ovld __purefn vload4(size_t, const __constant ushort *); +int4 __ovld __purefn vload4(size_t, const __constant int *); +uint4 __ovld __purefn vload4(size_t, const __constant uint *); +long4 __ovld __purefn vload4(size_t, const __constant long *); +ulong4 __ovld __purefn vload4(size_t, const __constant ulong *); +float4 __ovld __purefn vload4(size_t, const __constant float *); +char8 __ovld __purefn vload8(size_t, const __constant char *); +uchar8 __ovld __purefn vload8(size_t, const __constant uchar *); +short8 __ovld __purefn vload8(size_t, const __constant short *); +ushort8 __ovld __purefn vload8(size_t, const __constant ushort *); +int8 __ovld __purefn vload8(size_t, const __constant int *); +uint8 __ovld __purefn vload8(size_t, const __constant uint *); +long8 __ovld __purefn vload8(size_t, const __constant long *); +ulong8 __ovld __purefn vload8(size_t, const __constant ulong *); +float8 __ovld __purefn vload8(size_t, const __constant float *); +char16 __ovld __purefn vload16(size_t, const __constant char *); +uchar16 __ovld __purefn vload16(size_t, const __constant uchar *); +short16 __ovld __purefn vload16(size_t, const __constant short *); +ushort16 __ovld __purefn vload16(size_t, const __constant ushort *); +int16 __ovld __purefn vload16(size_t, const __constant int *); +uint16 __ovld __purefn vload16(size_t, const __constant uint *); +long16 __ovld __purefn vload16(size_t, const __constant long *); +ulong16 __ovld __purefn vload16(size_t, const __constant ulong *); +float16 __ovld __purefn vload16(size_t, const __constant float *); +#ifdef cl_khr_fp64 +double2 __ovld __purefn vload2(size_t, const __constant double *); +double3 __ovld __purefn vload3(size_t, const __constant double *); +double4 __ovld __purefn vload4(size_t, const __constant double *); +double8 __ovld __purefn vload8(size_t, const __constant double *); +double16 __ovld __purefn vload16(size_t, const __constant double *); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __purefn vload2(size_t, const __constant half *); +half3 __ovld __purefn vload3(size_t, const __constant half *); +half4 __ovld __purefn vload4(size_t, const __constant half *); +half8 __ovld __purefn vload8(size_t, const __constant half *); +half16 __ovld __purefn vload16(size_t, const __constant half *); +#endif //cl_khr_fp16 + +#if defined(__opencl_c_generic_address_space) +char2 __ovld __purefn vload2(size_t, const char *); +uchar2 __ovld __purefn vload2(size_t, const uchar *); +short2 __ovld __purefn vload2(size_t, const short *); +ushort2 __ovld __purefn vload2(size_t, const ushort *); +int2 __ovld __purefn vload2(size_t, const int *); +uint2 __ovld __purefn vload2(size_t, const uint *); +long2 __ovld __purefn vload2(size_t, const long *); +ulong2 __ovld __purefn vload2(size_t, const ulong *); +float2 __ovld __purefn vload2(size_t, const float *); +char3 __ovld __purefn vload3(size_t, const char *); +uchar3 __ovld __purefn vload3(size_t, const uchar *); +short3 __ovld __purefn vload3(size_t, const short *); +ushort3 __ovld __purefn vload3(size_t, const ushort *); +int3 __ovld __purefn vload3(size_t, const int *); +uint3 __ovld __purefn vload3(size_t, const uint *); +long3 __ovld __purefn vload3(size_t, const long *); +ulong3 __ovld __purefn vload3(size_t, const ulong *); +float3 __ovld __purefn vload3(size_t, const float *); +char4 __ovld __purefn vload4(size_t, const char *); +uchar4 __ovld __purefn vload4(size_t, const uchar *); +short4 __ovld __purefn vload4(size_t, const short *); +ushort4 __ovld __purefn vload4(size_t, const ushort *); +int4 __ovld __purefn vload4(size_t, const int *); +uint4 __ovld __purefn vload4(size_t, const uint *); +long4 __ovld __purefn vload4(size_t, const long *); +ulong4 __ovld __purefn vload4(size_t, const ulong *); +float4 __ovld __purefn vload4(size_t, const float *); +char8 __ovld __purefn vload8(size_t, const char *); +uchar8 __ovld __purefn vload8(size_t, const uchar *); +short8 __ovld __purefn vload8(size_t, const short *); +ushort8 __ovld __purefn vload8(size_t, const ushort *); +int8 __ovld __purefn vload8(size_t, const int *); +uint8 __ovld __purefn vload8(size_t, const uint *); +long8 __ovld __purefn vload8(size_t, const long *); +ulong8 __ovld __purefn vload8(size_t, const ulong *); +float8 __ovld __purefn vload8(size_t, const float *); +char16 __ovld __purefn vload16(size_t, const char *); +uchar16 __ovld __purefn vload16(size_t, const uchar *); +short16 __ovld __purefn vload16(size_t, const short *); +ushort16 __ovld __purefn vload16(size_t, const ushort *); +int16 __ovld __purefn vload16(size_t, const int *); +uint16 __ovld __purefn vload16(size_t, const uint *); +long16 __ovld __purefn vload16(size_t, const long *); +ulong16 __ovld __purefn vload16(size_t, const ulong *); +float16 __ovld __purefn vload16(size_t, const float *); + +#ifdef cl_khr_fp64 +double2 __ovld __purefn vload2(size_t, const double *); +double3 __ovld __purefn vload3(size_t, const double *); +double4 __ovld __purefn vload4(size_t, const double *); +double8 __ovld __purefn vload8(size_t, const double *); +double16 __ovld __purefn vload16(size_t, const double *); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __purefn vload2(size_t, const half *); +half3 __ovld __purefn vload3(size_t, const half *); +half4 __ovld __purefn vload4(size_t, const half *); +half8 __ovld __purefn vload8(size_t, const half *); +half16 __ovld __purefn vload16(size_t, const half *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +char2 __ovld __purefn vload2(size_t, const __global char *); +uchar2 __ovld __purefn vload2(size_t, const __global uchar *); +short2 __ovld __purefn vload2(size_t, const __global short *); +ushort2 __ovld __purefn vload2(size_t, const __global ushort *); +int2 __ovld __purefn vload2(size_t, const __global int *); +uint2 __ovld __purefn vload2(size_t, const __global uint *); +long2 __ovld __purefn vload2(size_t, const __global long *); +ulong2 __ovld __purefn vload2(size_t, const __global ulong *); +float2 __ovld __purefn vload2(size_t, const __global float *); +char3 __ovld __purefn vload3(size_t, const __global char *); +uchar3 __ovld __purefn vload3(size_t, const __global uchar *); +short3 __ovld __purefn vload3(size_t, const __global short *); +ushort3 __ovld __purefn vload3(size_t, const __global ushort *); +int3 __ovld __purefn vload3(size_t, const __global int *); +uint3 __ovld __purefn vload3(size_t, const __global uint *); +long3 __ovld __purefn vload3(size_t, const __global long *); +ulong3 __ovld __purefn vload3(size_t, const __global ulong *); +float3 __ovld __purefn vload3(size_t, const __global float *); +char4 __ovld __purefn vload4(size_t, const __global char *); +uchar4 __ovld __purefn vload4(size_t, const __global uchar *); +short4 __ovld __purefn vload4(size_t, const __global short *); +ushort4 __ovld __purefn vload4(size_t, const __global ushort *); +int4 __ovld __purefn vload4(size_t, const __global int *); +uint4 __ovld __purefn vload4(size_t, const __global uint *); +long4 __ovld __purefn vload4(size_t, const __global long *); +ulong4 __ovld __purefn vload4(size_t, const __global ulong *); +float4 __ovld __purefn vload4(size_t, const __global float *); +char8 __ovld __purefn vload8(size_t, const __global char *); +uchar8 __ovld __purefn vload8(size_t, const __global uchar *); +short8 __ovld __purefn vload8(size_t, const __global short *); +ushort8 __ovld __purefn vload8(size_t, const __global ushort *); +int8 __ovld __purefn vload8(size_t, const __global int *); +uint8 __ovld __purefn vload8(size_t, const __global uint *); +long8 __ovld __purefn vload8(size_t, const __global long *); +ulong8 __ovld __purefn vload8(size_t, const __global ulong *); +float8 __ovld __purefn vload8(size_t, const __global float *); +char16 __ovld __purefn vload16(size_t, const __global char *); +uchar16 __ovld __purefn vload16(size_t, const __global uchar *); +short16 __ovld __purefn vload16(size_t, const __global short *); +ushort16 __ovld __purefn vload16(size_t, const __global ushort *); +int16 __ovld __purefn vload16(size_t, const __global int *); +uint16 __ovld __purefn vload16(size_t, const __global uint *); +long16 __ovld __purefn vload16(size_t, const __global long *); +ulong16 __ovld __purefn vload16(size_t, const __global ulong *); +float16 __ovld __purefn vload16(size_t, const __global float *); +char2 __ovld __purefn vload2(size_t, const __local char *); +uchar2 __ovld __purefn vload2(size_t, const __local uchar *); +short2 __ovld __purefn vload2(size_t, const __local short *); +ushort2 __ovld __purefn vload2(size_t, const __local ushort *); +int2 __ovld __purefn vload2(size_t, const __local int *); +uint2 __ovld __purefn vload2(size_t, const __local uint *); +long2 __ovld __purefn vload2(size_t, const __local long *); +ulong2 __ovld __purefn vload2(size_t, const __local ulong *); +float2 __ovld __purefn vload2(size_t, const __local float *); +char3 __ovld __purefn vload3(size_t, const __local char *); +uchar3 __ovld __purefn vload3(size_t, const __local uchar *); +short3 __ovld __purefn vload3(size_t, const __local short *); +ushort3 __ovld __purefn vload3(size_t, const __local ushort *); +int3 __ovld __purefn vload3(size_t, const __local int *); +uint3 __ovld __purefn vload3(size_t, const __local uint *); +long3 __ovld __purefn vload3(size_t, const __local long *); +ulong3 __ovld __purefn vload3(size_t, const __local ulong *); +float3 __ovld __purefn vload3(size_t, const __local float *); +char4 __ovld __purefn vload4(size_t, const __local char *); +uchar4 __ovld __purefn vload4(size_t, const __local uchar *); +short4 __ovld __purefn vload4(size_t, const __local short *); +ushort4 __ovld __purefn vload4(size_t, const __local ushort *); +int4 __ovld __purefn vload4(size_t, const __local int *); +uint4 __ovld __purefn vload4(size_t, const __local uint *); +long4 __ovld __purefn vload4(size_t, const __local long *); +ulong4 __ovld __purefn vload4(size_t, const __local ulong *); +float4 __ovld __purefn vload4(size_t, const __local float *); +char8 __ovld __purefn vload8(size_t, const __local char *); +uchar8 __ovld __purefn vload8(size_t, const __local uchar *); +short8 __ovld __purefn vload8(size_t, const __local short *); +ushort8 __ovld __purefn vload8(size_t, const __local ushort *); +int8 __ovld __purefn vload8(size_t, const __local int *); +uint8 __ovld __purefn vload8(size_t, const __local uint *); +long8 __ovld __purefn vload8(size_t, const __local long *); +ulong8 __ovld __purefn vload8(size_t, const __local ulong *); +float8 __ovld __purefn vload8(size_t, const __local float *); +char16 __ovld __purefn vload16(size_t, const __local char *); +uchar16 __ovld __purefn vload16(size_t, const __local uchar *); +short16 __ovld __purefn vload16(size_t, const __local short *); +ushort16 __ovld __purefn vload16(size_t, const __local ushort *); +int16 __ovld __purefn vload16(size_t, const __local int *); +uint16 __ovld __purefn vload16(size_t, const __local uint *); +long16 __ovld __purefn vload16(size_t, const __local long *); +ulong16 __ovld __purefn vload16(size_t, const __local ulong *); +float16 __ovld __purefn vload16(size_t, const __local float *); +char2 __ovld __purefn vload2(size_t, const __private char *); +uchar2 __ovld __purefn vload2(size_t, const __private uchar *); +short2 __ovld __purefn vload2(size_t, const __private short *); +ushort2 __ovld __purefn vload2(size_t, const __private ushort *); +int2 __ovld __purefn vload2(size_t, const __private int *); +uint2 __ovld __purefn vload2(size_t, const __private uint *); +long2 __ovld __purefn vload2(size_t, const __private long *); +ulong2 __ovld __purefn vload2(size_t, const __private ulong *); +float2 __ovld __purefn vload2(size_t, const __private float *); +char3 __ovld __purefn vload3(size_t, const __private char *); +uchar3 __ovld __purefn vload3(size_t, const __private uchar *); +short3 __ovld __purefn vload3(size_t, const __private short *); +ushort3 __ovld __purefn vload3(size_t, const __private ushort *); +int3 __ovld __purefn vload3(size_t, const __private int *); +uint3 __ovld __purefn vload3(size_t, const __private uint *); +long3 __ovld __purefn vload3(size_t, const __private long *); +ulong3 __ovld __purefn vload3(size_t, const __private ulong *); +float3 __ovld __purefn vload3(size_t, const __private float *); +char4 __ovld __purefn vload4(size_t, const __private char *); +uchar4 __ovld __purefn vload4(size_t, const __private uchar *); +short4 __ovld __purefn vload4(size_t, const __private short *); +ushort4 __ovld __purefn vload4(size_t, const __private ushort *); +int4 __ovld __purefn vload4(size_t, const __private int *); +uint4 __ovld __purefn vload4(size_t, const __private uint *); +long4 __ovld __purefn vload4(size_t, const __private long *); +ulong4 __ovld __purefn vload4(size_t, const __private ulong *); +float4 __ovld __purefn vload4(size_t, const __private float *); +char8 __ovld __purefn vload8(size_t, const __private char *); +uchar8 __ovld __purefn vload8(size_t, const __private uchar *); +short8 __ovld __purefn vload8(size_t, const __private short *); +ushort8 __ovld __purefn vload8(size_t, const __private ushort *); +int8 __ovld __purefn vload8(size_t, const __private int *); +uint8 __ovld __purefn vload8(size_t, const __private uint *); +long8 __ovld __purefn vload8(size_t, const __private long *); +ulong8 __ovld __purefn vload8(size_t, const __private ulong *); +float8 __ovld __purefn vload8(size_t, const __private float *); +char16 __ovld __purefn vload16(size_t, const __private char *); +uchar16 __ovld __purefn vload16(size_t, const __private uchar *); +short16 __ovld __purefn vload16(size_t, const __private short *); +ushort16 __ovld __purefn vload16(size_t, const __private ushort *); +int16 __ovld __purefn vload16(size_t, const __private int *); +uint16 __ovld __purefn vload16(size_t, const __private uint *); +long16 __ovld __purefn vload16(size_t, const __private long *); +ulong16 __ovld __purefn vload16(size_t, const __private ulong *); +float16 __ovld __purefn vload16(size_t, const __private float *); + +#ifdef cl_khr_fp64 +double2 __ovld __purefn vload2(size_t, const __global double *); +double3 __ovld __purefn vload3(size_t, const __global double *); +double4 __ovld __purefn vload4(size_t, const __global double *); +double8 __ovld __purefn vload8(size_t, const __global double *); +double16 __ovld __purefn vload16(size_t, const __global double *); +double2 __ovld __purefn vload2(size_t, const __local double *); +double3 __ovld __purefn vload3(size_t, const __local double *); +double4 __ovld __purefn vload4(size_t, const __local double *); +double8 __ovld __purefn vload8(size_t, const __local double *); +double16 __ovld __purefn vload16(size_t, const __local double *); +double2 __ovld __purefn vload2(size_t, const __private double *); +double3 __ovld __purefn vload3(size_t, const __private double *); +double4 __ovld __purefn vload4(size_t, const __private double *); +double8 __ovld __purefn vload8(size_t, const __private double *); +double16 __ovld __purefn vload16(size_t, const __private double *); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __purefn vload2(size_t, const __global half *); +half3 __ovld __purefn vload3(size_t, const __global half *); +half4 __ovld __purefn vload4(size_t, const __global half *); +half8 __ovld __purefn vload8(size_t, const __global half *); +half16 __ovld __purefn vload16(size_t, const __global half *); +half2 __ovld __purefn vload2(size_t, const __local half *); +half3 __ovld __purefn vload3(size_t, const __local half *); +half4 __ovld __purefn vload4(size_t, const __local half *); +half8 __ovld __purefn vload8(size_t, const __local half *); +half16 __ovld __purefn vload16(size_t, const __local half *); +half2 __ovld __purefn vload2(size_t, const __private half *); +half3 __ovld __purefn vload3(size_t, const __private half *); +half4 __ovld __purefn vload4(size_t, const __private half *); +half8 __ovld __purefn vload8(size_t, const __private half *); +half16 __ovld __purefn vload16(size_t, const __private half *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +#if defined(__opencl_c_generic_address_space) +void __ovld vstore2(char2, size_t, char *); +void __ovld vstore2(uchar2, size_t, uchar *); +void __ovld vstore2(short2, size_t, short *); +void __ovld vstore2(ushort2, size_t, ushort *); +void __ovld vstore2(int2, size_t, int *); +void __ovld vstore2(uint2, size_t, uint *); +void __ovld vstore2(long2, size_t, long *); +void __ovld vstore2(ulong2, size_t, ulong *); +void __ovld vstore2(float2, size_t, float *); +void __ovld vstore3(char3, size_t, char *); +void __ovld vstore3(uchar3, size_t, uchar *); +void __ovld vstore3(short3, size_t, short *); +void __ovld vstore3(ushort3, size_t, ushort *); +void __ovld vstore3(int3, size_t, int *); +void __ovld vstore3(uint3, size_t, uint *); +void __ovld vstore3(long3, size_t, long *); +void __ovld vstore3(ulong3, size_t, ulong *); +void __ovld vstore3(float3, size_t, float *); +void __ovld vstore4(char4, size_t, char *); +void __ovld vstore4(uchar4, size_t, uchar *); +void __ovld vstore4(short4, size_t, short *); +void __ovld vstore4(ushort4, size_t, ushort *); +void __ovld vstore4(int4, size_t, int *); +void __ovld vstore4(uint4, size_t, uint *); +void __ovld vstore4(long4, size_t, long *); +void __ovld vstore4(ulong4, size_t, ulong *); +void __ovld vstore4(float4, size_t, float *); +void __ovld vstore8(char8, size_t, char *); +void __ovld vstore8(uchar8, size_t, uchar *); +void __ovld vstore8(short8, size_t, short *); +void __ovld vstore8(ushort8, size_t, ushort *); +void __ovld vstore8(int8, size_t, int *); +void __ovld vstore8(uint8, size_t, uint *); +void __ovld vstore8(long8, size_t, long *); +void __ovld vstore8(ulong8, size_t, ulong *); +void __ovld vstore8(float8, size_t, float *); +void __ovld vstore16(char16, size_t, char *); +void __ovld vstore16(uchar16, size_t, uchar *); +void __ovld vstore16(short16, size_t, short *); +void __ovld vstore16(ushort16, size_t, ushort *); +void __ovld vstore16(int16, size_t, int *); +void __ovld vstore16(uint16, size_t, uint *); +void __ovld vstore16(long16, size_t, long *); +void __ovld vstore16(ulong16, size_t, ulong *); +void __ovld vstore16(float16, size_t, float *); +#ifdef cl_khr_fp64 +void __ovld vstore2(double2, size_t, double *); +void __ovld vstore3(double3, size_t, double *); +void __ovld vstore4(double4, size_t, double *); +void __ovld vstore8(double8, size_t, double *); +void __ovld vstore16(double16, size_t, double *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +void __ovld vstore2(half2, size_t, half *); +void __ovld vstore3(half3, size_t, half *); +void __ovld vstore4(half4, size_t, half *); +void __ovld vstore8(half8, size_t, half *); +void __ovld vstore16(half16, size_t, half *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +void __ovld vstore2(char2, size_t, __global char *); +void __ovld vstore2(uchar2, size_t, __global uchar *); +void __ovld vstore2(short2, size_t, __global short *); +void __ovld vstore2(ushort2, size_t, __global ushort *); +void __ovld vstore2(int2, size_t, __global int *); +void __ovld vstore2(uint2, size_t, __global uint *); +void __ovld vstore2(long2, size_t, __global long *); +void __ovld vstore2(ulong2, size_t, __global ulong *); +void __ovld vstore2(float2, size_t, __global float *); +void __ovld vstore3(char3, size_t, __global char *); +void __ovld vstore3(uchar3, size_t, __global uchar *); +void __ovld vstore3(short3, size_t, __global short *); +void __ovld vstore3(ushort3, size_t, __global ushort *); +void __ovld vstore3(int3, size_t, __global int *); +void __ovld vstore3(uint3, size_t, __global uint *); +void __ovld vstore3(long3, size_t, __global long *); +void __ovld vstore3(ulong3, size_t, __global ulong *); +void __ovld vstore3(float3, size_t, __global float *); +void __ovld vstore4(char4, size_t, __global char *); +void __ovld vstore4(uchar4, size_t, __global uchar *); +void __ovld vstore4(short4, size_t, __global short *); +void __ovld vstore4(ushort4, size_t, __global ushort *); +void __ovld vstore4(int4, size_t, __global int *); +void __ovld vstore4(uint4, size_t, __global uint *); +void __ovld vstore4(long4, size_t, __global long *); +void __ovld vstore4(ulong4, size_t, __global ulong *); +void __ovld vstore4(float4, size_t, __global float *); +void __ovld vstore8(char8, size_t, __global char *); +void __ovld vstore8(uchar8, size_t, __global uchar *); +void __ovld vstore8(short8, size_t, __global short *); +void __ovld vstore8(ushort8, size_t, __global ushort *); +void __ovld vstore8(int8, size_t, __global int *); +void __ovld vstore8(uint8, size_t, __global uint *); +void __ovld vstore8(long8, size_t, __global long *); +void __ovld vstore8(ulong8, size_t, __global ulong *); +void __ovld vstore8(float8, size_t, __global float *); +void __ovld vstore16(char16, size_t, __global char *); +void __ovld vstore16(uchar16, size_t, __global uchar *); +void __ovld vstore16(short16, size_t, __global short *); +void __ovld vstore16(ushort16, size_t, __global ushort *); +void __ovld vstore16(int16, size_t, __global int *); +void __ovld vstore16(uint16, size_t, __global uint *); +void __ovld vstore16(long16, size_t, __global long *); +void __ovld vstore16(ulong16, size_t, __global ulong *); +void __ovld vstore16(float16, size_t, __global float *); +void __ovld vstore2(char2, size_t, __local char *); +void __ovld vstore2(uchar2, size_t, __local uchar *); +void __ovld vstore2(short2, size_t, __local short *); +void __ovld vstore2(ushort2, size_t, __local ushort *); +void __ovld vstore2(int2, size_t, __local int *); +void __ovld vstore2(uint2, size_t, __local uint *); +void __ovld vstore2(long2, size_t, __local long *); +void __ovld vstore2(ulong2, size_t, __local ulong *); +void __ovld vstore2(float2, size_t, __local float *); +void __ovld vstore3(char3, size_t, __local char *); +void __ovld vstore3(uchar3, size_t, __local uchar *); +void __ovld vstore3(short3, size_t, __local short *); +void __ovld vstore3(ushort3, size_t, __local ushort *); +void __ovld vstore3(int3, size_t, __local int *); +void __ovld vstore3(uint3, size_t, __local uint *); +void __ovld vstore3(long3, size_t, __local long *); +void __ovld vstore3(ulong3, size_t, __local ulong *); +void __ovld vstore3(float3, size_t, __local float *); +void __ovld vstore4(char4, size_t, __local char *); +void __ovld vstore4(uchar4, size_t, __local uchar *); +void __ovld vstore4(short4, size_t, __local short *); +void __ovld vstore4(ushort4, size_t, __local ushort *); +void __ovld vstore4(int4, size_t, __local int *); +void __ovld vstore4(uint4, size_t, __local uint *); +void __ovld vstore4(long4, size_t, __local long *); +void __ovld vstore4(ulong4, size_t, __local ulong *); +void __ovld vstore4(float4, size_t, __local float *); +void __ovld vstore8(char8, size_t, __local char *); +void __ovld vstore8(uchar8, size_t, __local uchar *); +void __ovld vstore8(short8, size_t, __local short *); +void __ovld vstore8(ushort8, size_t, __local ushort *); +void __ovld vstore8(int8, size_t, __local int *); +void __ovld vstore8(uint8, size_t, __local uint *); +void __ovld vstore8(long8, size_t, __local long *); +void __ovld vstore8(ulong8, size_t, __local ulong *); +void __ovld vstore8(float8, size_t, __local float *); +void __ovld vstore16(char16, size_t, __local char *); +void __ovld vstore16(uchar16, size_t, __local uchar *); +void __ovld vstore16(short16, size_t, __local short *); +void __ovld vstore16(ushort16, size_t, __local ushort *); +void __ovld vstore16(int16, size_t, __local int *); +void __ovld vstore16(uint16, size_t, __local uint *); +void __ovld vstore16(long16, size_t, __local long *); +void __ovld vstore16(ulong16, size_t, __local ulong *); +void __ovld vstore16(float16, size_t, __local float *); +void __ovld vstore2(char2, size_t, __private char *); +void __ovld vstore2(uchar2, size_t, __private uchar *); +void __ovld vstore2(short2, size_t, __private short *); +void __ovld vstore2(ushort2, size_t, __private ushort *); +void __ovld vstore2(int2, size_t, __private int *); +void __ovld vstore2(uint2, size_t, __private uint *); +void __ovld vstore2(long2, size_t, __private long *); +void __ovld vstore2(ulong2, size_t, __private ulong *); +void __ovld vstore2(float2, size_t, __private float *); +void __ovld vstore3(char3, size_t, __private char *); +void __ovld vstore3(uchar3, size_t, __private uchar *); +void __ovld vstore3(short3, size_t, __private short *); +void __ovld vstore3(ushort3, size_t, __private ushort *); +void __ovld vstore3(int3, size_t, __private int *); +void __ovld vstore3(uint3, size_t, __private uint *); +void __ovld vstore3(long3, size_t, __private long *); +void __ovld vstore3(ulong3, size_t, __private ulong *); +void __ovld vstore3(float3, size_t, __private float *); +void __ovld vstore4(char4, size_t, __private char *); +void __ovld vstore4(uchar4, size_t, __private uchar *); +void __ovld vstore4(short4, size_t, __private short *); +void __ovld vstore4(ushort4, size_t, __private ushort *); +void __ovld vstore4(int4, size_t, __private int *); +void __ovld vstore4(uint4, size_t, __private uint *); +void __ovld vstore4(long4, size_t, __private long *); +void __ovld vstore4(ulong4, size_t, __private ulong *); +void __ovld vstore4(float4, size_t, __private float *); +void __ovld vstore8(char8, size_t, __private char *); +void __ovld vstore8(uchar8, size_t, __private uchar *); +void __ovld vstore8(short8, size_t, __private short *); +void __ovld vstore8(ushort8, size_t, __private ushort *); +void __ovld vstore8(int8, size_t, __private int *); +void __ovld vstore8(uint8, size_t, __private uint *); +void __ovld vstore8(long8, size_t, __private long *); +void __ovld vstore8(ulong8, size_t, __private ulong *); +void __ovld vstore8(float8, size_t, __private float *); +void __ovld vstore16(char16, size_t, __private char *); +void __ovld vstore16(uchar16, size_t, __private uchar *); +void __ovld vstore16(short16, size_t, __private short *); +void __ovld vstore16(ushort16, size_t, __private ushort *); +void __ovld vstore16(int16, size_t, __private int *); +void __ovld vstore16(uint16, size_t, __private uint *); +void __ovld vstore16(long16, size_t, __private long *); +void __ovld vstore16(ulong16, size_t, __private ulong *); +void __ovld vstore16(float16, size_t, __private float *); +#ifdef cl_khr_fp64 +void __ovld vstore2(double2, size_t, __global double *); +void __ovld vstore3(double3, size_t, __global double *); +void __ovld vstore4(double4, size_t, __global double *); +void __ovld vstore8(double8, size_t, __global double *); +void __ovld vstore16(double16, size_t, __global double *); +void __ovld vstore2(double2, size_t, __local double *); +void __ovld vstore3(double3, size_t, __local double *); +void __ovld vstore4(double4, size_t, __local double *); +void __ovld vstore8(double8, size_t, __local double *); +void __ovld vstore16(double16, size_t, __local double *); +void __ovld vstore2(double2, size_t, __private double *); +void __ovld vstore3(double3, size_t, __private double *); +void __ovld vstore4(double4, size_t, __private double *); +void __ovld vstore8(double8, size_t, __private double *); +void __ovld vstore16(double16, size_t, __private double *); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +void __ovld vstore2(half2, size_t, __global half *); +void __ovld vstore3(half3, size_t, __global half *); +void __ovld vstore4(half4, size_t, __global half *); +void __ovld vstore8(half8, size_t, __global half *); +void __ovld vstore16(half16, size_t, __global half *); +void __ovld vstore2(half2, size_t, __local half *); +void __ovld vstore3(half3, size_t, __local half *); +void __ovld vstore4(half4, size_t, __local half *); +void __ovld vstore8(half8, size_t, __local half *); +void __ovld vstore16(half16, size_t, __local half *); +void __ovld vstore2(half2, size_t, __private half *); +void __ovld vstore3(half3, size_t, __private half *); +void __ovld vstore4(half4, size_t, __private half *); +void __ovld vstore8(half8, size_t, __private half *); +void __ovld vstore16(half16, size_t, __private half *); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Read sizeof (half) bytes of data from address + * (p + offset). The data read is interpreted as a + * half value. The half value is converted to a + * float value and the float value is returned. + * The read address computed as (p + offset) + * must be 16-bit aligned. + */ +float __ovld __purefn vload_half(size_t, const __constant half *); +#if defined(__opencl_c_generic_address_space) +float __ovld __purefn vload_half(size_t, const half *); +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float __ovld __purefn vload_half(size_t, const __global half *); +float __ovld __purefn vload_half(size_t, const __local half *); +float __ovld __purefn vload_half(size_t, const __private half *); +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * Read sizeof (halfn) bytes of data from address + * (p + (offset * n)). The data read is interpreted + * as a halfn value. The halfn value read is + * converted to a floatn value and the floatn + * value is returned. The read address computed + * as (p + (offset * n)) must be 16-bit aligned. + */ +float2 __ovld __purefn vload_half2(size_t, const __constant half *); +float3 __ovld __purefn vload_half3(size_t, const __constant half *); +float4 __ovld __purefn vload_half4(size_t, const __constant half *); +float8 __ovld __purefn vload_half8(size_t, const __constant half *); +float16 __ovld __purefn vload_half16(size_t, const __constant half *); +#if defined(__opencl_c_generic_address_space) +float2 __ovld __purefn vload_half2(size_t, const half *); +float3 __ovld __purefn vload_half3(size_t, const half *); +float4 __ovld __purefn vload_half4(size_t, const half *); +float8 __ovld __purefn vload_half8(size_t, const half *); +float16 __ovld __purefn vload_half16(size_t, const half *); +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float2 __ovld __purefn vload_half2(size_t, const __global half *); +float3 __ovld __purefn vload_half3(size_t, const __global half *); +float4 __ovld __purefn vload_half4(size_t, const __global half *); +float8 __ovld __purefn vload_half8(size_t, const __global half *); +float16 __ovld __purefn vload_half16(size_t, const __global half *); +float2 __ovld __purefn vload_half2(size_t, const __local half *); +float3 __ovld __purefn vload_half3(size_t, const __local half *); +float4 __ovld __purefn vload_half4(size_t, const __local half *); +float8 __ovld __purefn vload_half8(size_t, const __local half *); +float16 __ovld __purefn vload_half16(size_t, const __local half *); +float2 __ovld __purefn vload_half2(size_t, const __private half *); +float3 __ovld __purefn vload_half3(size_t, const __private half *); +float4 __ovld __purefn vload_half4(size_t, const __private half *); +float8 __ovld __purefn vload_half8(size_t, const __private half *); +float16 __ovld __purefn vload_half16(size_t, const __private half *); +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * The float value given by data is first + * converted to a half value using the appropriate + * rounding mode. The half value is then written + * to address computed as (p + offset). The + * address computed as (p + offset) must be 16- + * bit aligned. + * vstore_half use the current rounding mode. + * The default current rounding mode is round to + * nearest even. + */ +#if defined(__opencl_c_generic_address_space) +void __ovld vstore_half(float, size_t, half *); +void __ovld vstore_half_rte(float, size_t, half *); +void __ovld vstore_half_rtz(float, size_t, half *); +void __ovld vstore_half_rtp(float, size_t, half *); +void __ovld vstore_half_rtn(float, size_t, half *); +#ifdef cl_khr_fp64 +void __ovld vstore_half(double, size_t, half *); +void __ovld vstore_half_rte(double, size_t, half *); +void __ovld vstore_half_rtz(double, size_t, half *); +void __ovld vstore_half_rtp(double, size_t, half *); +void __ovld vstore_half_rtn(double, size_t, half *); +#endif //cl_khr_fp64 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +void __ovld vstore_half(float, size_t, __global half *); +void __ovld vstore_half_rte(float, size_t, __global half *); +void __ovld vstore_half_rtz(float, size_t, __global half *); +void __ovld vstore_half_rtp(float, size_t, __global half *); +void __ovld vstore_half_rtn(float, size_t, __global half *); +void __ovld vstore_half(float, size_t, __local half *); +void __ovld vstore_half_rte(float, size_t, __local half *); +void __ovld vstore_half_rtz(float, size_t, __local half *); +void __ovld vstore_half_rtp(float, size_t, __local half *); +void __ovld vstore_half_rtn(float, size_t, __local half *); +void __ovld vstore_half(float, size_t, __private half *); +void __ovld vstore_half_rte(float, size_t, __private half *); +void __ovld vstore_half_rtz(float, size_t, __private half *); +void __ovld vstore_half_rtp(float, size_t, __private half *); +void __ovld vstore_half_rtn(float, size_t, __private half *); +#ifdef cl_khr_fp64 +void __ovld vstore_half(double, size_t, __global half *); +void __ovld vstore_half_rte(double, size_t, __global half *); +void __ovld vstore_half_rtz(double, size_t, __global half *); +void __ovld vstore_half_rtp(double, size_t, __global half *); +void __ovld vstore_half_rtn(double, size_t, __global half *); +void __ovld vstore_half(double, size_t, __local half *); +void __ovld vstore_half_rte(double, size_t, __local half *); +void __ovld vstore_half_rtz(double, size_t, __local half *); +void __ovld vstore_half_rtp(double, size_t, __local half *); +void __ovld vstore_half_rtn(double, size_t, __local half *); +void __ovld vstore_half(double, size_t, __private half *); +void __ovld vstore_half_rte(double, size_t, __private half *); +void __ovld vstore_half_rtz(double, size_t, __private half *); +void __ovld vstore_half_rtp(double, size_t, __private half *); +void __ovld vstore_half_rtn(double, size_t, __private half *); +#endif //cl_khr_fp64 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * The floatn value given by data is converted to + * a halfn value using the appropriate rounding + * mode. The halfn value is then written to + * address computed as (p + (offset * n)). The + * address computed as (p + (offset * n)) must be + * 16-bit aligned. + * vstore_halfn uses the current rounding mode. + * The default current rounding mode is round to + * nearest even. + */ +#if defined(__opencl_c_generic_address_space) +void __ovld vstore_half2(float2, size_t, half *); +void __ovld vstore_half3(float3, size_t, half *); +void __ovld vstore_half4(float4, size_t, half *); +void __ovld vstore_half8(float8, size_t, half *); +void __ovld vstore_half16(float16, size_t, half *); +void __ovld vstore_half2_rte(float2, size_t, half *); +void __ovld vstore_half3_rte(float3, size_t, half *); +void __ovld vstore_half4_rte(float4, size_t, half *); +void __ovld vstore_half8_rte(float8, size_t, half *); +void __ovld vstore_half16_rte(float16, size_t, half *); +void __ovld vstore_half2_rtz(float2, size_t, half *); +void __ovld vstore_half3_rtz(float3, size_t, half *); +void __ovld vstore_half4_rtz(float4, size_t, half *); +void __ovld vstore_half8_rtz(float8, size_t, half *); +void __ovld vstore_half16_rtz(float16, size_t, half *); +void __ovld vstore_half2_rtp(float2, size_t, half *); +void __ovld vstore_half3_rtp(float3, size_t, half *); +void __ovld vstore_half4_rtp(float4, size_t, half *); +void __ovld vstore_half8_rtp(float8, size_t, half *); +void __ovld vstore_half16_rtp(float16, size_t, half *); +void __ovld vstore_half2_rtn(float2, size_t, half *); +void __ovld vstore_half3_rtn(float3, size_t, half *); +void __ovld vstore_half4_rtn(float4, size_t, half *); +void __ovld vstore_half8_rtn(float8, size_t, half *); +void __ovld vstore_half16_rtn(float16, size_t, half *); +#ifdef cl_khr_fp64 +void __ovld vstore_half2(double2, size_t, half *); +void __ovld vstore_half3(double3, size_t, half *); +void __ovld vstore_half4(double4, size_t, half *); +void __ovld vstore_half8(double8, size_t, half *); +void __ovld vstore_half16(double16, size_t, half *); +void __ovld vstore_half2_rte(double2, size_t, half *); +void __ovld vstore_half3_rte(double3, size_t, half *); +void __ovld vstore_half4_rte(double4, size_t, half *); +void __ovld vstore_half8_rte(double8, size_t, half *); +void __ovld vstore_half16_rte(double16, size_t, half *); +void __ovld vstore_half2_rtz(double2, size_t, half *); +void __ovld vstore_half3_rtz(double3, size_t, half *); +void __ovld vstore_half4_rtz(double4, size_t, half *); +void __ovld vstore_half8_rtz(double8, size_t, half *); +void __ovld vstore_half16_rtz(double16, size_t, half *); +void __ovld vstore_half2_rtp(double2, size_t, half *); +void __ovld vstore_half3_rtp(double3, size_t, half *); +void __ovld vstore_half4_rtp(double4, size_t, half *); +void __ovld vstore_half8_rtp(double8, size_t, half *); +void __ovld vstore_half16_rtp(double16, size_t, half *); +void __ovld vstore_half2_rtn(double2, size_t, half *); +void __ovld vstore_half3_rtn(double3, size_t, half *); +void __ovld vstore_half4_rtn(double4, size_t, half *); +void __ovld vstore_half8_rtn(double8, size_t, half *); +void __ovld vstore_half16_rtn(double16, size_t, half *); +#endif //cl_khr_fp64 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +void __ovld vstore_half2(float2, size_t, __global half *); +void __ovld vstore_half3(float3, size_t, __global half *); +void __ovld vstore_half4(float4, size_t, __global half *); +void __ovld vstore_half8(float8, size_t, __global half *); +void __ovld vstore_half16(float16, size_t, __global half *); +void __ovld vstore_half2_rte(float2, size_t, __global half *); +void __ovld vstore_half3_rte(float3, size_t, __global half *); +void __ovld vstore_half4_rte(float4, size_t, __global half *); +void __ovld vstore_half8_rte(float8, size_t, __global half *); +void __ovld vstore_half16_rte(float16, size_t, __global half *); +void __ovld vstore_half2_rtz(float2, size_t, __global half *); +void __ovld vstore_half3_rtz(float3, size_t, __global half *); +void __ovld vstore_half4_rtz(float4, size_t, __global half *); +void __ovld vstore_half8_rtz(float8, size_t, __global half *); +void __ovld vstore_half16_rtz(float16, size_t, __global half *); +void __ovld vstore_half2_rtp(float2, size_t, __global half *); +void __ovld vstore_half3_rtp(float3, size_t, __global half *); +void __ovld vstore_half4_rtp(float4, size_t, __global half *); +void __ovld vstore_half8_rtp(float8, size_t, __global half *); +void __ovld vstore_half16_rtp(float16, size_t, __global half *); +void __ovld vstore_half2_rtn(float2, size_t, __global half *); +void __ovld vstore_half3_rtn(float3, size_t, __global half *); +void __ovld vstore_half4_rtn(float4, size_t, __global half *); +void __ovld vstore_half8_rtn(float8, size_t, __global half *); +void __ovld vstore_half16_rtn(float16, size_t, __global half *); +void __ovld vstore_half2(float2, size_t, __local half *); +void __ovld vstore_half3(float3, size_t, __local half *); +void __ovld vstore_half4(float4, size_t, __local half *); +void __ovld vstore_half8(float8, size_t, __local half *); +void __ovld vstore_half16(float16, size_t, __local half *); +void __ovld vstore_half2_rte(float2, size_t, __local half *); +void __ovld vstore_half3_rte(float3, size_t, __local half *); +void __ovld vstore_half4_rte(float4, size_t, __local half *); +void __ovld vstore_half8_rte(float8, size_t, __local half *); +void __ovld vstore_half16_rte(float16, size_t, __local half *); +void __ovld vstore_half2_rtz(float2, size_t, __local half *); +void __ovld vstore_half3_rtz(float3, size_t, __local half *); +void __ovld vstore_half4_rtz(float4, size_t, __local half *); +void __ovld vstore_half8_rtz(float8, size_t, __local half *); +void __ovld vstore_half16_rtz(float16, size_t, __local half *); +void __ovld vstore_half2_rtp(float2, size_t, __local half *); +void __ovld vstore_half3_rtp(float3, size_t, __local half *); +void __ovld vstore_half4_rtp(float4, size_t, __local half *); +void __ovld vstore_half8_rtp(float8, size_t, __local half *); +void __ovld vstore_half16_rtp(float16, size_t, __local half *); +void __ovld vstore_half2_rtn(float2, size_t, __local half *); +void __ovld vstore_half3_rtn(float3, size_t, __local half *); +void __ovld vstore_half4_rtn(float4, size_t, __local half *); +void __ovld vstore_half8_rtn(float8, size_t, __local half *); +void __ovld vstore_half16_rtn(float16, size_t, __local half *); +void __ovld vstore_half2(float2, size_t, __private half *); +void __ovld vstore_half3(float3, size_t, __private half *); +void __ovld vstore_half4(float4, size_t, __private half *); +void __ovld vstore_half8(float8, size_t, __private half *); +void __ovld vstore_half16(float16, size_t, __private half *); +void __ovld vstore_half2_rte(float2, size_t, __private half *); +void __ovld vstore_half3_rte(float3, size_t, __private half *); +void __ovld vstore_half4_rte(float4, size_t, __private half *); +void __ovld vstore_half8_rte(float8, size_t, __private half *); +void __ovld vstore_half16_rte(float16, size_t, __private half *); +void __ovld vstore_half2_rtz(float2, size_t, __private half *); +void __ovld vstore_half3_rtz(float3, size_t, __private half *); +void __ovld vstore_half4_rtz(float4, size_t, __private half *); +void __ovld vstore_half8_rtz(float8, size_t, __private half *); +void __ovld vstore_half16_rtz(float16, size_t, __private half *); +void __ovld vstore_half2_rtp(float2, size_t, __private half *); +void __ovld vstore_half3_rtp(float3, size_t, __private half *); +void __ovld vstore_half4_rtp(float4, size_t, __private half *); +void __ovld vstore_half8_rtp(float8, size_t, __private half *); +void __ovld vstore_half16_rtp(float16, size_t, __private half *); +void __ovld vstore_half2_rtn(float2, size_t, __private half *); +void __ovld vstore_half3_rtn(float3, size_t, __private half *); +void __ovld vstore_half4_rtn(float4, size_t, __private half *); +void __ovld vstore_half8_rtn(float8, size_t, __private half *); +void __ovld vstore_half16_rtn(float16, size_t, __private half *); +#ifdef cl_khr_fp64 +void __ovld vstore_half2(double2, size_t, __global half *); +void __ovld vstore_half3(double3, size_t, __global half *); +void __ovld vstore_half4(double4, size_t, __global half *); +void __ovld vstore_half8(double8, size_t, __global half *); +void __ovld vstore_half16(double16, size_t, __global half *); +void __ovld vstore_half2_rte(double2, size_t, __global half *); +void __ovld vstore_half3_rte(double3, size_t, __global half *); +void __ovld vstore_half4_rte(double4, size_t, __global half *); +void __ovld vstore_half8_rte(double8, size_t, __global half *); +void __ovld vstore_half16_rte(double16, size_t, __global half *); +void __ovld vstore_half2_rtz(double2, size_t, __global half *); +void __ovld vstore_half3_rtz(double3, size_t, __global half *); +void __ovld vstore_half4_rtz(double4, size_t, __global half *); +void __ovld vstore_half8_rtz(double8, size_t, __global half *); +void __ovld vstore_half16_rtz(double16, size_t, __global half *); +void __ovld vstore_half2_rtp(double2, size_t, __global half *); +void __ovld vstore_half3_rtp(double3, size_t, __global half *); +void __ovld vstore_half4_rtp(double4, size_t, __global half *); +void __ovld vstore_half8_rtp(double8, size_t, __global half *); +void __ovld vstore_half16_rtp(double16, size_t, __global half *); +void __ovld vstore_half2_rtn(double2, size_t, __global half *); +void __ovld vstore_half3_rtn(double3, size_t, __global half *); +void __ovld vstore_half4_rtn(double4, size_t, __global half *); +void __ovld vstore_half8_rtn(double8, size_t, __global half *); +void __ovld vstore_half16_rtn(double16, size_t, __global half *); +void __ovld vstore_half2(double2, size_t, __local half *); +void __ovld vstore_half3(double3, size_t, __local half *); +void __ovld vstore_half4(double4, size_t, __local half *); +void __ovld vstore_half8(double8, size_t, __local half *); +void __ovld vstore_half16(double16, size_t, __local half *); +void __ovld vstore_half2_rte(double2, size_t, __local half *); +void __ovld vstore_half3_rte(double3, size_t, __local half *); +void __ovld vstore_half4_rte(double4, size_t, __local half *); +void __ovld vstore_half8_rte(double8, size_t, __local half *); +void __ovld vstore_half16_rte(double16, size_t, __local half *); +void __ovld vstore_half2_rtz(double2, size_t, __local half *); +void __ovld vstore_half3_rtz(double3, size_t, __local half *); +void __ovld vstore_half4_rtz(double4, size_t, __local half *); +void __ovld vstore_half8_rtz(double8, size_t, __local half *); +void __ovld vstore_half16_rtz(double16, size_t, __local half *); +void __ovld vstore_half2_rtp(double2, size_t, __local half *); +void __ovld vstore_half3_rtp(double3, size_t, __local half *); +void __ovld vstore_half4_rtp(double4, size_t, __local half *); +void __ovld vstore_half8_rtp(double8, size_t, __local half *); +void __ovld vstore_half16_rtp(double16, size_t, __local half *); +void __ovld vstore_half2_rtn(double2, size_t, __local half *); +void __ovld vstore_half3_rtn(double3, size_t, __local half *); +void __ovld vstore_half4_rtn(double4, size_t, __local half *); +void __ovld vstore_half8_rtn(double8, size_t, __local half *); +void __ovld vstore_half16_rtn(double16, size_t, __local half *); +void __ovld vstore_half2(double2, size_t, __private half *); +void __ovld vstore_half3(double3, size_t, __private half *); +void __ovld vstore_half4(double4, size_t, __private half *); +void __ovld vstore_half8(double8, size_t, __private half *); +void __ovld vstore_half16(double16, size_t, __private half *); +void __ovld vstore_half2_rte(double2, size_t, __private half *); +void __ovld vstore_half3_rte(double3, size_t, __private half *); +void __ovld vstore_half4_rte(double4, size_t, __private half *); +void __ovld vstore_half8_rte(double8, size_t, __private half *); +void __ovld vstore_half16_rte(double16, size_t, __private half *); +void __ovld vstore_half2_rtz(double2, size_t, __private half *); +void __ovld vstore_half3_rtz(double3, size_t, __private half *); +void __ovld vstore_half4_rtz(double4, size_t, __private half *); +void __ovld vstore_half8_rtz(double8, size_t, __private half *); +void __ovld vstore_half16_rtz(double16, size_t, __private half *); +void __ovld vstore_half2_rtp(double2, size_t, __private half *); +void __ovld vstore_half3_rtp(double3, size_t, __private half *); +void __ovld vstore_half4_rtp(double4, size_t, __private half *); +void __ovld vstore_half8_rtp(double8, size_t, __private half *); +void __ovld vstore_half16_rtp(double16, size_t, __private half *); +void __ovld vstore_half2_rtn(double2, size_t, __private half *); +void __ovld vstore_half3_rtn(double3, size_t, __private half *); +void __ovld vstore_half4_rtn(double4, size_t, __private half *); +void __ovld vstore_half8_rtn(double8, size_t, __private half *); +void __ovld vstore_half16_rtn(double16, size_t, __private half *); +#endif //cl_khr_fp64 +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * For n = 1, 2, 4, 8 and 16 read sizeof (halfn) + * bytes of data from address (p + (offset * n)). + * The data read is interpreted as a halfn value. + * The halfn value read is converted to a floatn + * value and the floatn value is returned. + * The address computed as (p + (offset * n)) + * must be aligned to sizeof (halfn) bytes. + * For n = 3, vloada_half3 reads a half3 from + * address (p + (offset * 4)) and returns a float3. + * The address computed as (p + (offset * 4)) + * must be aligned to sizeof (half) * 4 bytes. + */ +float2 __ovld __purefn vloada_half2(size_t, const __constant half *); +float3 __ovld __purefn vloada_half3(size_t, const __constant half *); +float4 __ovld __purefn vloada_half4(size_t, const __constant half *); +float8 __ovld __purefn vloada_half8(size_t, const __constant half *); +float16 __ovld __purefn vloada_half16(size_t, const __constant half *); +#if defined(__opencl_c_generic_address_space) +float2 __ovld __purefn vloada_half2(size_t, const half *); +float3 __ovld __purefn vloada_half3(size_t, const half *); +float4 __ovld __purefn vloada_half4(size_t, const half *); +float8 __ovld __purefn vloada_half8(size_t, const half *); +float16 __ovld __purefn vloada_half16(size_t, const half *); +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +float2 __ovld __purefn vloada_half2(size_t, const __global half *); +float3 __ovld __purefn vloada_half3(size_t, const __global half *); +float4 __ovld __purefn vloada_half4(size_t, const __global half *); +float8 __ovld __purefn vloada_half8(size_t, const __global half *); +float16 __ovld __purefn vloada_half16(size_t, const __global half *); +float2 __ovld __purefn vloada_half2(size_t, const __local half *); +float3 __ovld __purefn vloada_half3(size_t, const __local half *); +float4 __ovld __purefn vloada_half4(size_t, const __local half *); +float8 __ovld __purefn vloada_half8(size_t, const __local half *); +float16 __ovld __purefn vloada_half16(size_t, const __local half *); +float2 __ovld __purefn vloada_half2(size_t, const __private half *); +float3 __ovld __purefn vloada_half3(size_t, const __private half *); +float4 __ovld __purefn vloada_half4(size_t, const __private half *); +float8 __ovld __purefn vloada_half8(size_t, const __private half *); +float16 __ovld __purefn vloada_half16(size_t, const __private half *); +#endif //defined(__opencl_c_named_address_space_builtins) + +/** + * The floatn value given by data is converted to + * a halfn value using the appropriate rounding + * mode. + * For n = 1, 2, 4, 8 and 16, the halfn value is + * written to the address computed as (p + (offset + * * n)). The address computed as (p + (offset * + * n)) must be aligned to sizeof (halfn) bytes. + * For n = 3, the half3 value is written to the + * address computed as (p + (offset * 4)). The + * address computed as (p + (offset * 4)) must be + * aligned to sizeof (half) * 4 bytes. + * vstorea_halfn uses the current rounding + * mode. The default current rounding mode is + * round to nearest even. + */ +#if defined(__opencl_c_generic_address_space) +void __ovld vstorea_half2(float2, size_t, half *); +void __ovld vstorea_half3(float3, size_t, half *); +void __ovld vstorea_half4(float4, size_t, half *); +void __ovld vstorea_half8(float8, size_t, half *); +void __ovld vstorea_half16(float16, size_t, half *); + +void __ovld vstorea_half2_rte(float2, size_t, half *); +void __ovld vstorea_half3_rte(float3, size_t, half *); +void __ovld vstorea_half4_rte(float4, size_t, half *); +void __ovld vstorea_half8_rte(float8, size_t, half *); +void __ovld vstorea_half16_rte(float16, size_t, half *); + +void __ovld vstorea_half2_rtz(float2, size_t, half *); +void __ovld vstorea_half3_rtz(float3, size_t, half *); +void __ovld vstorea_half4_rtz(float4, size_t, half *); +void __ovld vstorea_half8_rtz(float8, size_t, half *); +void __ovld vstorea_half16_rtz(float16, size_t, half *); + +void __ovld vstorea_half2_rtp(float2, size_t, half *); +void __ovld vstorea_half3_rtp(float3, size_t, half *); +void __ovld vstorea_half4_rtp(float4, size_t, half *); +void __ovld vstorea_half8_rtp(float8, size_t, half *); +void __ovld vstorea_half16_rtp(float16, size_t, half *); + +void __ovld vstorea_half2_rtn(float2, size_t, half *); +void __ovld vstorea_half3_rtn(float3, size_t, half *); +void __ovld vstorea_half4_rtn(float4, size_t, half *); +void __ovld vstorea_half8_rtn(float8, size_t, half *); +void __ovld vstorea_half16_rtn(float16, size_t, half *); + +#ifdef cl_khr_fp64 +void __ovld vstorea_half2(double2, size_t, half *); +void __ovld vstorea_half3(double3, size_t, half *); +void __ovld vstorea_half4(double4, size_t, half *); +void __ovld vstorea_half8(double8, size_t, half *); +void __ovld vstorea_half16(double16, size_t, half *); + +void __ovld vstorea_half2_rte(double2, size_t, half *); +void __ovld vstorea_half3_rte(double3, size_t, half *); +void __ovld vstorea_half4_rte(double4, size_t, half *); +void __ovld vstorea_half8_rte(double8, size_t, half *); +void __ovld vstorea_half16_rte(double16, size_t, half *); + +void __ovld vstorea_half2_rtz(double2, size_t, half *); +void __ovld vstorea_half3_rtz(double3, size_t, half *); +void __ovld vstorea_half4_rtz(double4, size_t, half *); +void __ovld vstorea_half8_rtz(double8, size_t, half *); +void __ovld vstorea_half16_rtz(double16, size_t, half *); + +void __ovld vstorea_half2_rtp(double2, size_t, half *); +void __ovld vstorea_half3_rtp(double3, size_t, half *); +void __ovld vstorea_half4_rtp(double4, size_t, half *); +void __ovld vstorea_half8_rtp(double8, size_t, half *); +void __ovld vstorea_half16_rtp(double16, size_t, half *); + +void __ovld vstorea_half2_rtn(double2, size_t, half *); +void __ovld vstorea_half3_rtn(double3, size_t, half *); +void __ovld vstorea_half4_rtn(double4, size_t, half *); +void __ovld vstorea_half8_rtn(double8, size_t, half *); +void __ovld vstorea_half16_rtn(double16, size_t, half *); +#endif //cl_khr_fp64 +#endif //defined(__opencl_c_generic_address_space) + +#if defined(__opencl_c_named_address_space_builtins) +void __ovld vstorea_half2(float2, size_t, __global half *); +void __ovld vstorea_half3(float3, size_t, __global half *); +void __ovld vstorea_half4(float4, size_t, __global half *); +void __ovld vstorea_half8(float8, size_t, __global half *); +void __ovld vstorea_half16(float16, size_t, __global half *); + +void __ovld vstorea_half2_rte(float2, size_t, __global half *); +void __ovld vstorea_half3_rte(float3, size_t, __global half *); +void __ovld vstorea_half4_rte(float4, size_t, __global half *); +void __ovld vstorea_half8_rte(float8, size_t, __global half *); +void __ovld vstorea_half16_rte(float16, size_t, __global half *); + +void __ovld vstorea_half2_rtz(float2, size_t, __global half *); +void __ovld vstorea_half3_rtz(float3, size_t, __global half *); +void __ovld vstorea_half4_rtz(float4, size_t, __global half *); +void __ovld vstorea_half8_rtz(float8, size_t, __global half *); +void __ovld vstorea_half16_rtz(float16, size_t, __global half *); + +void __ovld vstorea_half2_rtp(float2, size_t, __global half *); +void __ovld vstorea_half3_rtp(float3, size_t, __global half *); +void __ovld vstorea_half4_rtp(float4, size_t, __global half *); +void __ovld vstorea_half8_rtp(float8, size_t, __global half *); +void __ovld vstorea_half16_rtp(float16, size_t, __global half *); + +void __ovld vstorea_half2_rtn(float2, size_t, __global half *); +void __ovld vstorea_half3_rtn(float3, size_t, __global half *); +void __ovld vstorea_half4_rtn(float4, size_t, __global half *); +void __ovld vstorea_half8_rtn(float8, size_t, __global half *); +void __ovld vstorea_half16_rtn(float16, size_t, __global half *); + +void __ovld vstorea_half2(float2, size_t, __local half *); +void __ovld vstorea_half3(float3, size_t, __local half *); +void __ovld vstorea_half4(float4, size_t, __local half *); +void __ovld vstorea_half8(float8, size_t, __local half *); +void __ovld vstorea_half16(float16, size_t, __local half *); + +void __ovld vstorea_half2_rte(float2, size_t, __local half *); +void __ovld vstorea_half3_rte(float3, size_t, __local half *); +void __ovld vstorea_half4_rte(float4, size_t, __local half *); +void __ovld vstorea_half8_rte(float8, size_t, __local half *); +void __ovld vstorea_half16_rte(float16, size_t, __local half *); + +void __ovld vstorea_half2_rtz(float2, size_t, __local half *); +void __ovld vstorea_half3_rtz(float3, size_t, __local half *); +void __ovld vstorea_half4_rtz(float4, size_t, __local half *); +void __ovld vstorea_half8_rtz(float8, size_t, __local half *); +void __ovld vstorea_half16_rtz(float16, size_t, __local half *); + +void __ovld vstorea_half2_rtp(float2, size_t, __local half *); +void __ovld vstorea_half3_rtp(float3, size_t, __local half *); +void __ovld vstorea_half4_rtp(float4, size_t, __local half *); +void __ovld vstorea_half8_rtp(float8, size_t, __local half *); +void __ovld vstorea_half16_rtp(float16, size_t, __local half *); + +void __ovld vstorea_half2_rtn(float2, size_t, __local half *); +void __ovld vstorea_half3_rtn(float3, size_t, __local half *); +void __ovld vstorea_half4_rtn(float4, size_t, __local half *); +void __ovld vstorea_half8_rtn(float8, size_t, __local half *); +void __ovld vstorea_half16_rtn(float16, size_t, __local half *); + +void __ovld vstorea_half2(float2, size_t, __private half *); +void __ovld vstorea_half3(float3, size_t, __private half *); +void __ovld vstorea_half4(float4, size_t, __private half *); +void __ovld vstorea_half8(float8, size_t, __private half *); +void __ovld vstorea_half16(float16, size_t, __private half *); + +void __ovld vstorea_half2_rte(float2, size_t, __private half *); +void __ovld vstorea_half3_rte(float3, size_t, __private half *); +void __ovld vstorea_half4_rte(float4, size_t, __private half *); +void __ovld vstorea_half8_rte(float8, size_t, __private half *); +void __ovld vstorea_half16_rte(float16, size_t, __private half *); + +void __ovld vstorea_half2_rtz(float2, size_t, __private half *); +void __ovld vstorea_half3_rtz(float3, size_t, __private half *); +void __ovld vstorea_half4_rtz(float4, size_t, __private half *); +void __ovld vstorea_half8_rtz(float8, size_t, __private half *); +void __ovld vstorea_half16_rtz(float16, size_t, __private half *); + +void __ovld vstorea_half2_rtp(float2, size_t, __private half *); +void __ovld vstorea_half3_rtp(float3, size_t, __private half *); +void __ovld vstorea_half4_rtp(float4, size_t, __private half *); +void __ovld vstorea_half8_rtp(float8, size_t, __private half *); +void __ovld vstorea_half16_rtp(float16, size_t, __private half *); + +void __ovld vstorea_half2_rtn(float2, size_t, __private half *); +void __ovld vstorea_half3_rtn(float3, size_t, __private half *); +void __ovld vstorea_half4_rtn(float4, size_t, __private half *); +void __ovld vstorea_half8_rtn(float8, size_t, __private half *); +void __ovld vstorea_half16_rtn(float16, size_t, __private half *); + +#ifdef cl_khr_fp64 +void __ovld vstorea_half2(double2, size_t, __global half *); +void __ovld vstorea_half3(double3, size_t, __global half *); +void __ovld vstorea_half4(double4, size_t, __global half *); +void __ovld vstorea_half8(double8, size_t, __global half *); +void __ovld vstorea_half16(double16, size_t, __global half *); + +void __ovld vstorea_half2_rte(double2, size_t, __global half *); +void __ovld vstorea_half3_rte(double3, size_t, __global half *); +void __ovld vstorea_half4_rte(double4, size_t, __global half *); +void __ovld vstorea_half8_rte(double8, size_t, __global half *); +void __ovld vstorea_half16_rte(double16, size_t, __global half *); + +void __ovld vstorea_half2_rtz(double2, size_t, __global half *); +void __ovld vstorea_half3_rtz(double3, size_t, __global half *); +void __ovld vstorea_half4_rtz(double4, size_t, __global half *); +void __ovld vstorea_half8_rtz(double8, size_t, __global half *); +void __ovld vstorea_half16_rtz(double16, size_t, __global half *); + +void __ovld vstorea_half2_rtp(double2, size_t, __global half *); +void __ovld vstorea_half3_rtp(double3, size_t, __global half *); +void __ovld vstorea_half4_rtp(double4, size_t, __global half *); +void __ovld vstorea_half8_rtp(double8, size_t, __global half *); +void __ovld vstorea_half16_rtp(double16, size_t, __global half *); + +void __ovld vstorea_half2_rtn(double2, size_t, __global half *); +void __ovld vstorea_half3_rtn(double3, size_t, __global half *); +void __ovld vstorea_half4_rtn(double4, size_t, __global half *); +void __ovld vstorea_half8_rtn(double8, size_t, __global half *); +void __ovld vstorea_half16_rtn(double16, size_t, __global half *); + +void __ovld vstorea_half2(double2, size_t, __local half *); +void __ovld vstorea_half3(double3, size_t, __local half *); +void __ovld vstorea_half4(double4, size_t, __local half *); +void __ovld vstorea_half8(double8, size_t, __local half *); +void __ovld vstorea_half16(double16, size_t, __local half *); + +void __ovld vstorea_half2_rte(double2, size_t, __local half *); +void __ovld vstorea_half3_rte(double3, size_t, __local half *); +void __ovld vstorea_half4_rte(double4, size_t, __local half *); +void __ovld vstorea_half8_rte(double8, size_t, __local half *); +void __ovld vstorea_half16_rte(double16, size_t, __local half *); + +void __ovld vstorea_half2_rtz(double2, size_t, __local half *); +void __ovld vstorea_half3_rtz(double3, size_t, __local half *); +void __ovld vstorea_half4_rtz(double4, size_t, __local half *); +void __ovld vstorea_half8_rtz(double8, size_t, __local half *); +void __ovld vstorea_half16_rtz(double16, size_t, __local half *); + +void __ovld vstorea_half2_rtp(double2, size_t, __local half *); +void __ovld vstorea_half3_rtp(double3, size_t, __local half *); +void __ovld vstorea_half4_rtp(double4, size_t, __local half *); +void __ovld vstorea_half8_rtp(double8, size_t, __local half *); +void __ovld vstorea_half16_rtp(double16, size_t, __local half *); + +void __ovld vstorea_half2_rtn(double2, size_t, __local half *); +void __ovld vstorea_half3_rtn(double3, size_t, __local half *); +void __ovld vstorea_half4_rtn(double4, size_t, __local half *); +void __ovld vstorea_half8_rtn(double8, size_t, __local half *); +void __ovld vstorea_half16_rtn(double16, size_t, __local half *); + +void __ovld vstorea_half2(double2, size_t, __private half *); +void __ovld vstorea_half3(double3, size_t, __private half *); +void __ovld vstorea_half4(double4, size_t, __private half *); +void __ovld vstorea_half8(double8, size_t, __private half *); +void __ovld vstorea_half16(double16, size_t, __private half *); + +void __ovld vstorea_half2_rte(double2, size_t, __private half *); +void __ovld vstorea_half3_rte(double3, size_t, __private half *); +void __ovld vstorea_half4_rte(double4, size_t, __private half *); +void __ovld vstorea_half8_rte(double8, size_t, __private half *); +void __ovld vstorea_half16_rte(double16, size_t, __private half *); + +void __ovld vstorea_half2_rtz(double2, size_t, __private half *); +void __ovld vstorea_half3_rtz(double3, size_t, __private half *); +void __ovld vstorea_half4_rtz(double4, size_t, __private half *); +void __ovld vstorea_half8_rtz(double8, size_t, __private half *); +void __ovld vstorea_half16_rtz(double16, size_t, __private half *); + +void __ovld vstorea_half2_rtp(double2, size_t, __private half *); +void __ovld vstorea_half3_rtp(double3, size_t, __private half *); +void __ovld vstorea_half4_rtp(double4, size_t, __private half *); +void __ovld vstorea_half8_rtp(double8, size_t, __private half *); +void __ovld vstorea_half16_rtp(double16, size_t, __private half *); + +void __ovld vstorea_half2_rtn(double2, size_t, __private half *); +void __ovld vstorea_half3_rtn(double3, size_t, __private half *); +void __ovld vstorea_half4_rtn(double4, size_t, __private half *); +void __ovld vstorea_half8_rtn(double8, size_t, __private half *); +void __ovld vstorea_half16_rtn(double16, size_t, __private half *); +#endif //cl_khr_fp64 +#endif //defined(__opencl_c_named_address_space_builtins) + +// OpenCL v1.1 s6.11.8, v1.2 s6.12.8, v2.0 s6.13.8 - Synchronization Functions + +/** + * All work-items in a work-group executing the kernel + * on a processor must execute this function before any + * are allowed to continue execution beyond the barrier. + * This function must be encountered by all work-items in + * a work-group executing the kernel. + * If barrier is inside a conditional statement, then all + * work-items must enter the conditional if any work-item + * enters the conditional statement and executes the + * barrier. + * If barrer is inside a loop, all work-items must execute + * the barrier for each iteration of the loop before any are + * allowed to continue execution beyond the barrier. + * The barrier function also queues a memory fence + * (reads and writes) to ensure correct ordering of + * memory operations to local or global memory. + * The flags argument specifies the memory address space + * and can be set to a combination of the following literal + * values. + * CLK_LOCAL_MEM_FENCE - The barrier function + * will either flush any variables stored in local memory + * or queue a memory fence to ensure correct ordering of + * memory operations to local memory. + * CLK_GLOBAL_MEM_FENCE - The barrier function + * will queue a memory fence to ensure correct ordering + * of memory operations to global memory. This can be + * useful when work-items, for example, write to buffer or + * image objects and then want to read the updated data. + */ + +void __ovld __conv barrier(cl_mem_fence_flags); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv work_group_barrier(cl_mem_fence_flags, memory_scope); +void __ovld __conv work_group_barrier(cl_mem_fence_flags); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.9, v1.2 s6.12.9 - Explicit Memory Fence Functions + +/** + * Orders loads and stores of a work-item + * executing a kernel. This means that loads + * and stores preceding the mem_fence will + * be committed to memory before any loads + * and stores following the mem_fence. + * The flags argument specifies the memory + * address space and can be set to a + * combination of the following literal + * values: + * CLK_LOCAL_MEM_FENCE + * CLK_GLOBAL_MEM_FENCE. + */ +void __ovld mem_fence(cl_mem_fence_flags); + +/** + * Read memory barrier that orders only + * loads. + * The flags argument specifies the memory + * address space and can be set to a + * combination of the following literal + * values: + * CLK_LOCAL_MEM_FENCE + * CLK_GLOBAL_MEM_FENCE. + */ +void __ovld read_mem_fence(cl_mem_fence_flags); + +/** + * Write memory barrier that orders only + * stores. + * The flags argument specifies the memory + * address space and can be set to a + * combination of the following literal + * values: + * CLK_LOCAL_MEM_FENCE + * CLK_GLOBAL_MEM_FENCE. + */ +void __ovld write_mem_fence(cl_mem_fence_flags); + +// OpenCL v2.0 s6.13.9 - Address Space Qualifier Functions + +#if defined(__opencl_c_generic_address_space) +cl_mem_fence_flags __ovld get_fence(const void *ptr); +cl_mem_fence_flags __ovld get_fence(void *ptr); + +/** + * Builtin functions to_global, to_local, and to_private need to be declared as Clang builtin functions + * and checked in Sema since they should be declared as + * addr gentype* to_addr (gentype*); + * where gentype is builtin type or user defined type. + */ + +#endif //defined(__opencl_c_generic_address_space) + +// OpenCL v1.1 s6.11.10, v1.2 s6.12.10, v2.0 s6.13.10 - Async Copies from Global to Local Memory, Local to Global Memory, and Prefetch + +/** + * event_t async_work_group_copy ( + * __global gentype *dst, + * const __local gentype *src, + * size_t num_elements, + * event_t event) + * Perform an async copy of num_elements + * gentype elements from src to dst. The async + * copy is performed by all work-items in a workgroup + * and this built-in function must therefore + * be encountered by all work-items in a workgroup + * executing the kernel with the same + * argument values; otherwise the results are + * undefined. + * Returns an event object that can be used by + * wait_group_events to wait for the async copy + * to finish. The event argument can also be used + * to associate the async_work_group_copy with + * a previous async copy allowing an event to be + * shared by multiple async copies; otherwise event + * should be zero. + * If event argument is non-zero, the event object + * supplied in event argument will be returned. + * This function does not perform any implicit + * synchronization of source data such as using a + * barrier before performing the copy. + */ +event_t __ovld async_work_group_copy(__local char *, const __global char *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uchar *, const __global uchar *, size_t, event_t); +event_t __ovld async_work_group_copy(__local short *, const __global short *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ushort *, const __global ushort *, size_t, event_t); +event_t __ovld async_work_group_copy(__local int *, const __global int *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uint *, const __global uint *, size_t, event_t); +event_t __ovld async_work_group_copy(__local long *, const __global long *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ulong *, const __global ulong *, size_t, event_t); +event_t __ovld async_work_group_copy(__local float *, const __global float *, size_t, event_t); +event_t __ovld async_work_group_copy(__local char2 *, const __global char2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uchar2 *, const __global uchar2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local short2 *, const __global short2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ushort2 *, const __global ushort2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local int2 *, const __global int2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uint2 *, const __global uint2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local long2 *, const __global long2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ulong2 *, const __global ulong2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local float2 *, const __global float2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local char3 *, const __global char3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uchar3 *, const __global uchar3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local short3 *, const __global short3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ushort3 *, const __global ushort3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local int3 *, const __global int3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uint3 *, const __global uint3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local long3 *, const __global long3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ulong3 *, const __global ulong3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local float3 *, const __global float3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local char4 *, const __global char4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uchar4 *, const __global uchar4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local short4 *, const __global short4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ushort4 *, const __global ushort4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local int4 *, const __global int4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uint4 *, const __global uint4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local long4 *, const __global long4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ulong4 *, const __global ulong4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local float4 *, const __global float4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local char8 *, const __global char8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uchar8 *, const __global uchar8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local short8 *, const __global short8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ushort8 *, const __global ushort8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local int8 *, const __global int8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uint8 *, const __global uint8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local long8 *, const __global long8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ulong8 *, const __global ulong8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local float8 *, const __global float8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local char16 *, const __global char16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uchar16 *, const __global uchar16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local short16 *, const __global short16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ushort16 *, const __global ushort16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local int16 *, const __global int16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local uint16 *, const __global uint16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local long16 *, const __global long16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local ulong16 *, const __global ulong16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local float16 *, const __global float16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global char *, const __local char *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uchar *, const __local uchar *, size_t, event_t); +event_t __ovld async_work_group_copy(__global short *, const __local short *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ushort *, const __local ushort *, size_t, event_t); +event_t __ovld async_work_group_copy(__global int *, const __local int *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uint *, const __local uint *, size_t, event_t); +event_t __ovld async_work_group_copy(__global long *, const __local long *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ulong *, const __local ulong *, size_t, event_t); +event_t __ovld async_work_group_copy(__global float *, const __local float *, size_t, event_t); +event_t __ovld async_work_group_copy(__global char2 *, const __local char2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uchar2 *, const __local uchar2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global short2 *, const __local short2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ushort2 *, const __local ushort2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global int2 *, const __local int2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uint2 *, const __local uint2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global long2 *, const __local long2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ulong2 *, const __local ulong2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global float2 *, const __local float2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global char3 *, const __local char3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uchar3 *, const __local uchar3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global short3 *, const __local short3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ushort3 *, const __local ushort3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global int3 *, const __local int3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uint3 *, const __local uint3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global long3 *, const __local long3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ulong3 *, const __local ulong3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global float3 *, const __local float3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global char4 *, const __local char4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uchar4 *, const __local uchar4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global short4 *, const __local short4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ushort4 *, const __local ushort4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global int4 *, const __local int4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uint4 *, const __local uint4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global long4 *, const __local long4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ulong4 *, const __local ulong4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global float4 *, const __local float4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global char8 *, const __local char8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uchar8 *, const __local uchar8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global short8 *, const __local short8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ushort8 *, const __local ushort8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global int8 *, const __local int8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uint8 *, const __local uint8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global long8 *, const __local long8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ulong8 *, const __local ulong8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global float8 *, const __local float8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global char16 *, const __local char16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uchar16 *, const __local uchar16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global short16 *, const __local short16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ushort16 *, const __local ushort16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global int16 *, const __local int16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global uint16 *, const __local uint16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global long16 *, const __local long16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global ulong16 *, const __local ulong16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global float16 *, const __local float16 *, size_t, event_t); +#ifdef cl_khr_fp64 +event_t __ovld async_work_group_copy(__local double *, const __global double *, size_t, event_t); +event_t __ovld async_work_group_copy(__local double2 *, const __global double2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local double3 *, const __global double3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local double4 *, const __global double4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local double8 *, const __global double8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local double16 *, const __global double16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global double *, const __local double *, size_t, event_t); +event_t __ovld async_work_group_copy(__global double2 *, const __local double2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global double3 *, const __local double3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global double4 *, const __local double4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global double8 *, const __local double8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global double16 *, const __local double16 *, size_t, event_t); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +event_t __ovld async_work_group_copy(__local half *, const __global half *, size_t, event_t); +event_t __ovld async_work_group_copy(__local half2 *, const __global half2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local half3 *, const __global half3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local half4 *, const __global half4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local half8 *, const __global half8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__local half16 *, const __global half16 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global half *, const __local half *, size_t, event_t); +event_t __ovld async_work_group_copy(__global half2 *, const __local half2 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global half3 *, const __local half3 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global half4 *, const __local half4 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global half8 *, const __local half8 *, size_t, event_t); +event_t __ovld async_work_group_copy(__global half16 *, const __local half16 *, size_t, event_t); +#endif //cl_khr_fp16 + +/** + * Perform an async gather of num_elements + * gentype elements from src to dst. The + * src_stride is the stride in elements for each + * gentype element read from src. The dst_stride + * is the stride in elements for each gentype + * element written to dst. The async gather is + * performed by all work-items in a work-group. + * This built-in function must therefore be + * encountered by all work-items in a work-group + * executing the kernel with the same argument + * values; otherwise the results are undefined. + * Returns an event object that can be used by + * wait_group_events to wait for the async copy + * to finish. The event argument can also be used + * to associate the + * async_work_group_strided_copy with a + * previous async copy allowing an event to be + * shared by multiple async copies; otherwise event + * should be zero. + * If event argument is non-zero, the event object + * supplied in event argument will be returned. + * This function does not perform any implicit + * synchronization of source data such as using a + * barrier before performing the copy. + */ +event_t __ovld async_work_group_strided_copy(__local char *, const __global char *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uchar *, const __global uchar *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local short *, const __global short *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ushort *, const __global ushort *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local int *, const __global int *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uint *, const __global uint *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local long *, const __global long *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ulong *, const __global ulong *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local float *, const __global float *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local char2 *, const __global char2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uchar2 *, const __global uchar2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local short2 *, const __global short2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ushort2 *, const __global ushort2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local int2 *, const __global int2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uint2 *, const __global uint2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local long2 *, const __global long2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ulong2 *, const __global ulong2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local float2 *, const __global float2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local char3 *, const __global char3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uchar3 *, const __global uchar3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local short3 *, const __global short3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ushort3 *, const __global ushort3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local int3 *, const __global int3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uint3 *, const __global uint3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local long3 *, const __global long3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ulong3 *, const __global ulong3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local float3 *, const __global float3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local char4 *, const __global char4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uchar4 *, const __global uchar4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local short4 *, const __global short4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ushort4 *, const __global ushort4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local int4 *, const __global int4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uint4 *, const __global uint4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local long4 *, const __global long4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ulong4 *, const __global ulong4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local float4 *, const __global float4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local char8 *, const __global char8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uchar8 *, const __global uchar8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local short8 *, const __global short8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ushort8 *, const __global ushort8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local int8 *, const __global int8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uint8 *, const __global uint8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local long8 *, const __global long8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ulong8 *, const __global ulong8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local float8 *, const __global float8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local char16 *, const __global char16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uchar16 *, const __global uchar16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local short16 *, const __global short16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ushort16 *, const __global ushort16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local int16 *, const __global int16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local uint16 *, const __global uint16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local long16 *, const __global long16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local ulong16 *, const __global ulong16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local float16 *, const __global float16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global char *, const __local char *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uchar *, const __local uchar *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global short *, const __local short *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ushort *, const __local ushort *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global int *, const __local int *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uint *, const __local uint *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global long *, const __local long *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ulong *, const __local ulong *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global float *, const __local float *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global char2 *, const __local char2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uchar2 *, const __local uchar2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global short2 *, const __local short2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ushort2 *, const __local ushort2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global int2 *, const __local int2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uint2 *, const __local uint2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global long2 *, const __local long2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ulong2 *, const __local ulong2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global float2 *, const __local float2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global char3 *, const __local char3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uchar3 *, const __local uchar3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global short3 *, const __local short3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ushort3 *, const __local ushort3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global int3 *, const __local int3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uint3 *, const __local uint3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global long3 *, const __local long3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ulong3 *, const __local ulong3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global float3 *, const __local float3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global char4 *, const __local char4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uchar4 *, const __local uchar4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global short4 *, const __local short4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ushort4 *, const __local ushort4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global int4 *, const __local int4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uint4 *, const __local uint4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global long4 *, const __local long4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ulong4 *, const __local ulong4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global float4 *, const __local float4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global char8 *, const __local char8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uchar8 *, const __local uchar8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global short8 *, const __local short8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ushort8 *, const __local ushort8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global int8 *, const __local int8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uint8 *, const __local uint8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global long8 *, const __local long8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ulong8 *, const __local ulong8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global float8 *, const __local float8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global char16 *, const __local char16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uchar16 *, const __local uchar16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global short16 *, const __local short16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ushort16 *, const __local ushort16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global int16 *, const __local int16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global uint16 *, const __local uint16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global long16 *, const __local long16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global ulong16 *, const __local ulong16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global float16 *, const __local float16 *, size_t, size_t, event_t); +#ifdef cl_khr_fp64 +event_t __ovld async_work_group_strided_copy(__local double *, const __global double *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local double2 *, const __global double2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local double3 *, const __global double3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local double4 *, const __global double4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local double8 *, const __global double8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local double16 *, const __global double16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global double *, const __local double *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global double2 *, const __local double2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global double3 *, const __local double3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global double4 *, const __local double4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global double8 *, const __local double8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global double16 *, const __local double16 *, size_t, size_t, event_t); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +event_t __ovld async_work_group_strided_copy(__local half *, const __global half *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local half2 *, const __global half2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local half3 *, const __global half3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local half4 *, const __global half4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local half8 *, const __global half8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__local half16 *, const __global half16 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global half *, const __local half *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global half2 *, const __local half2 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global half3 *, const __local half3 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global half4 *, const __local half4 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global half8 *, const __local half8 *, size_t, size_t, event_t); +event_t __ovld async_work_group_strided_copy(__global half16 *, const __local half16 *, size_t, size_t, event_t); +#endif //cl_khr_fp16 + +/** + * Wait for events that identify the + * async_work_group_copy operations to + * complete. The event objects specified in + * event_list will be released after the wait is + * performed. + * This function must be encountered by all workitems + * in a work-group executing the kernel with + * the same num_events and event objects specified + * in event_list; otherwise the results are undefined. + */ +void __ovld wait_group_events(int, event_t *); + +/** + * Prefetch num_elements * sizeof(gentype) + * bytes into the global cache. The prefetch + * instruction is applied to a work-item in a workgroup + * and does not affect the functional + * behavior of the kernel. + */ +void __ovld prefetch(const __global char *, size_t); +void __ovld prefetch(const __global uchar *, size_t); +void __ovld prefetch(const __global short *, size_t); +void __ovld prefetch(const __global ushort *, size_t); +void __ovld prefetch(const __global int *, size_t); +void __ovld prefetch(const __global uint *, size_t); +void __ovld prefetch(const __global long *, size_t); +void __ovld prefetch(const __global ulong *, size_t); +void __ovld prefetch(const __global float *, size_t); +void __ovld prefetch(const __global char2 *, size_t); +void __ovld prefetch(const __global uchar2 *, size_t); +void __ovld prefetch(const __global short2 *, size_t); +void __ovld prefetch(const __global ushort2 *, size_t); +void __ovld prefetch(const __global int2 *, size_t); +void __ovld prefetch(const __global uint2 *, size_t); +void __ovld prefetch(const __global long2 *, size_t); +void __ovld prefetch(const __global ulong2 *, size_t); +void __ovld prefetch(const __global float2 *, size_t); +void __ovld prefetch(const __global char3 *, size_t); +void __ovld prefetch(const __global uchar3 *, size_t); +void __ovld prefetch(const __global short3 *, size_t); +void __ovld prefetch(const __global ushort3 *, size_t); +void __ovld prefetch(const __global int3 *, size_t); +void __ovld prefetch(const __global uint3 *, size_t); +void __ovld prefetch(const __global long3 *, size_t); +void __ovld prefetch(const __global ulong3 *, size_t); +void __ovld prefetch(const __global float3 *, size_t); +void __ovld prefetch(const __global char4 *, size_t); +void __ovld prefetch(const __global uchar4 *, size_t); +void __ovld prefetch(const __global short4 *, size_t); +void __ovld prefetch(const __global ushort4 *, size_t); +void __ovld prefetch(const __global int4 *, size_t); +void __ovld prefetch(const __global uint4 *, size_t); +void __ovld prefetch(const __global long4 *, size_t); +void __ovld prefetch(const __global ulong4 *, size_t); +void __ovld prefetch(const __global float4 *, size_t); +void __ovld prefetch(const __global char8 *, size_t); +void __ovld prefetch(const __global uchar8 *, size_t); +void __ovld prefetch(const __global short8 *, size_t); +void __ovld prefetch(const __global ushort8 *, size_t); +void __ovld prefetch(const __global int8 *, size_t); +void __ovld prefetch(const __global uint8 *, size_t); +void __ovld prefetch(const __global long8 *, size_t); +void __ovld prefetch(const __global ulong8 *, size_t); +void __ovld prefetch(const __global float8 *, size_t); +void __ovld prefetch(const __global char16 *, size_t); +void __ovld prefetch(const __global uchar16 *, size_t); +void __ovld prefetch(const __global short16 *, size_t); +void __ovld prefetch(const __global ushort16 *, size_t); +void __ovld prefetch(const __global int16 *, size_t); +void __ovld prefetch(const __global uint16 *, size_t); +void __ovld prefetch(const __global long16 *, size_t); +void __ovld prefetch(const __global ulong16 *, size_t); +void __ovld prefetch(const __global float16 *, size_t); +#ifdef cl_khr_fp64 +void __ovld prefetch(const __global double *, size_t); +void __ovld prefetch(const __global double2 *, size_t); +void __ovld prefetch(const __global double3 *, size_t); +void __ovld prefetch(const __global double4 *, size_t); +void __ovld prefetch(const __global double8 *, size_t); +void __ovld prefetch(const __global double16 *, size_t); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +void __ovld prefetch(const __global half *, size_t); +void __ovld prefetch(const __global half2 *, size_t); +void __ovld prefetch(const __global half3 *, size_t); +void __ovld prefetch(const __global half4 *, size_t); +void __ovld prefetch(const __global half8 *, size_t); +void __ovld prefetch(const __global half16 *, size_t); +#endif // cl_khr_fp16 + +// OpenCL v1.1 s6.11.1, v1.2 s6.12.11 - Atomic Functions + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : enable +#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : enable +#endif +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old + val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_add(volatile __global int *, int); +uint __ovld atomic_add(volatile __global uint *, uint); +int __ovld atomic_add(volatile __local int *, int); +uint __ovld atomic_add(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_add(volatile int *, int); +uint __ovld atomic_add(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_add(volatile __global int *, int); +uint __ovld atom_add(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_add(volatile __local int *, int); +uint __ovld atom_add(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_add(volatile __global long *, long); +ulong __ovld atom_add(volatile __global ulong *, ulong); +long __ovld atom_add(volatile __local long *, long); +ulong __ovld atom_add(volatile __local ulong *, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) stored at location pointed by p. + * Compute (old - val) and store result at location pointed by p. The function + * returns old. + */ +int __ovld atomic_sub(volatile __global int *, int); +uint __ovld atomic_sub(volatile __global uint *, uint); +int __ovld atomic_sub(volatile __local int *, int); +uint __ovld atomic_sub(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_sub(volatile int *, int); +uint __ovld atomic_sub(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_sub(volatile __global int *, int); +uint __ovld atom_sub(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_sub(volatile __local int *, int); +uint __ovld atom_sub(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_sub(volatile __global long *, long); +ulong __ovld atom_sub(volatile __global ulong *, ulong); +long __ovld atom_sub(volatile __local long *, long); +ulong __ovld atom_sub(volatile __local ulong *, ulong); +#endif + +/** + * Swaps the old value stored at location p + * with new value given by val. Returns old + * value. + */ +int __ovld atomic_xchg(volatile __global int *, int); +uint __ovld atomic_xchg(volatile __global uint *, uint); +int __ovld atomic_xchg(volatile __local int *, int); +uint __ovld atomic_xchg(volatile __local uint *, uint); +float __ovld atomic_xchg(volatile __global float *, float); +float __ovld atomic_xchg(volatile __local float *, float); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_xchg(volatile int *, int); +uint __ovld atomic_xchg(volatile uint *, uint); +float __ovld atomic_xchg(volatile float *, float); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_xchg(volatile __global int *, int); +uint __ovld atom_xchg(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_xchg(volatile __local int *, int); +uint __ovld atom_xchg(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_xchg(volatile __global long *, long); +long __ovld atom_xchg(volatile __local long *, long); +ulong __ovld atom_xchg(volatile __global ulong *, ulong); +ulong __ovld atom_xchg(volatile __local ulong *, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old + 1) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_inc(volatile __global int *); +uint __ovld atomic_inc(volatile __global uint *); +int __ovld atomic_inc(volatile __local int *); +uint __ovld atomic_inc(volatile __local uint *); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_inc(volatile int *); +uint __ovld atomic_inc(volatile uint *); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_inc(volatile __global int *); +uint __ovld atom_inc(volatile __global uint *); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_inc(volatile __local int *); +uint __ovld atom_inc(volatile __local uint *); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_inc(volatile __global long *); +ulong __ovld atom_inc(volatile __global ulong *); +long __ovld atom_inc(volatile __local long *); +ulong __ovld atom_inc(volatile __local ulong *); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old - 1) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_dec(volatile __global int *); +uint __ovld atomic_dec(volatile __global uint *); +int __ovld atomic_dec(volatile __local int *); +uint __ovld atomic_dec(volatile __local uint *); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_dec(volatile int *); +uint __ovld atomic_dec(volatile uint *); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_dec(volatile __global int *); +uint __ovld atom_dec(volatile __global uint *); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_dec(volatile __local int *); +uint __ovld atom_dec(volatile __local uint *); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_dec(volatile __global long *); +ulong __ovld atom_dec(volatile __global ulong *); +long __ovld atom_dec(volatile __local long *); +ulong __ovld atom_dec(volatile __local ulong *); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old == cmp) ? val : old and store result at + * location pointed by p. The function + * returns old. + */ +int __ovld atomic_cmpxchg(volatile __global int *, int, int); +uint __ovld atomic_cmpxchg(volatile __global uint *, uint, uint); +int __ovld atomic_cmpxchg(volatile __local int *, int, int); +uint __ovld atomic_cmpxchg(volatile __local uint *, uint, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_cmpxchg(volatile int *, int, int); +uint __ovld atomic_cmpxchg(volatile uint *, uint, uint); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_cmpxchg(volatile __global int *, int, int); +uint __ovld atom_cmpxchg(volatile __global uint *, uint, uint); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_cmpxchg(volatile __local int *, int, int); +uint __ovld atom_cmpxchg(volatile __local uint *, uint, uint); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_cmpxchg(volatile __global long *, long, long); +ulong __ovld atom_cmpxchg(volatile __global ulong *, ulong, ulong); +long __ovld atom_cmpxchg(volatile __local long *, long, long); +ulong __ovld atom_cmpxchg(volatile __local ulong *, ulong, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * min(old, val) and store minimum value at + * location pointed by p. The function + * returns old. + */ +int __ovld atomic_min(volatile __global int *, int); +uint __ovld atomic_min(volatile __global uint *, uint); +int __ovld atomic_min(volatile __local int *, int); +uint __ovld atomic_min(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_min(volatile int *, int); +uint __ovld atomic_min(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_min(volatile __global int *, int); +uint __ovld atom_min(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_min(volatile __local int *, int); +uint __ovld atom_min(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_min(volatile __global long *, long); +ulong __ovld atom_min(volatile __global ulong *, ulong); +long __ovld atom_min(volatile __local long *, long); +ulong __ovld atom_min(volatile __local ulong *, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * max(old, val) and store maximum value at + * location pointed by p. The function + * returns old. + */ +int __ovld atomic_max(volatile __global int *, int); +uint __ovld atomic_max(volatile __global uint *, uint); +int __ovld atomic_max(volatile __local int *, int); +uint __ovld atomic_max(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_max(volatile int *, int); +uint __ovld atomic_max(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_max(volatile __global int *, int); +uint __ovld atom_max(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_max(volatile __local int *, int); +uint __ovld atom_max(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_max(volatile __global long *, long); +ulong __ovld atom_max(volatile __global ulong *, ulong); +long __ovld atom_max(volatile __local long *, long); +ulong __ovld atom_max(volatile __local ulong *, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old & val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_and(volatile __global int *, int); +uint __ovld atomic_and(volatile __global uint *, uint); +int __ovld atomic_and(volatile __local int *, int); +uint __ovld atomic_and(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_and(volatile int *, int); +uint __ovld atomic_and(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_and(volatile __global int *, int); +uint __ovld atom_and(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_and(volatile __local int *, int); +uint __ovld atom_and(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_and(volatile __global long *, long); +ulong __ovld atom_and(volatile __global ulong *, ulong); +long __ovld atom_and(volatile __local long *, long); +ulong __ovld atom_and(volatile __local ulong *, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old | val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_or(volatile __global int *, int); +uint __ovld atomic_or(volatile __global uint *, uint); +int __ovld atomic_or(volatile __local int *, int); +uint __ovld atomic_or(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_or(volatile int *, int); +uint __ovld atomic_or(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_or(volatile __global int *, int); +uint __ovld atom_or(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_or(volatile __local int *, int); +uint __ovld atom_or(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_or(volatile __global long *, long); +ulong __ovld atom_or(volatile __global ulong *, ulong); +long __ovld atom_or(volatile __local long *, long); +ulong __ovld atom_or(volatile __local ulong *, ulong); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old ^ val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_xor(volatile __global int *, int); +uint __ovld atomic_xor(volatile __global uint *, uint); +int __ovld atomic_xor(volatile __local int *, int); +uint __ovld atomic_xor(volatile __local uint *, uint); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_xor(volatile int *, int); +uint __ovld atomic_xor(volatile uint *, uint); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_xor(volatile __global int *, int); +uint __ovld atom_xor(volatile __global uint *, uint); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_xor(volatile __local int *, int); +uint __ovld atom_xor(volatile __local uint *, uint); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_xor(volatile __global long *, long); +ulong __ovld atom_xor(volatile __global ulong *, ulong); +long __ovld atom_xor(volatile __local long *, long); +ulong __ovld atom_xor(volatile __local ulong *, ulong); +#endif + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : disable +#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : disable +#endif + +// OpenCL v2.0 s6.13.11 - Atomics Functions + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// double atomics support requires extensions cl_khr_int64_base_atomics and cl_khr_int64_extended_atomics +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : enable +#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : enable +#endif + +// atomic_init() +#if defined(__opencl_c_generic_address_space) +void __ovld atomic_init(volatile atomic_int *, int); +void __ovld atomic_init(volatile atomic_uint *, uint); +void __ovld atomic_init(volatile atomic_float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +void __ovld atomic_init(volatile atomic_long *, long); +void __ovld atomic_init(volatile atomic_ulong *, ulong); +#ifdef cl_khr_fp64 +void __ovld atomic_init(volatile atomic_double *, double); +#endif //cl_khr_fp64 +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +void __ovld atomic_init(volatile __global atomic_int *, int); +void __ovld atomic_init(volatile __local atomic_int *, int); +void __ovld atomic_init(volatile __global atomic_uint *, uint); +void __ovld atomic_init(volatile __local atomic_uint *, uint); +void __ovld atomic_init(volatile __global atomic_float *, float); +void __ovld atomic_init(volatile __local atomic_float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +void __ovld atomic_init(volatile __global atomic_long *, long); +void __ovld atomic_init(volatile __local atomic_long *, long); +void __ovld atomic_init(volatile __global atomic_ulong *, ulong); +void __ovld atomic_init(volatile __local atomic_ulong *, ulong); +#ifdef cl_khr_fp64 +void __ovld atomic_init(volatile __global atomic_double *, double); +void __ovld atomic_init(volatile __local atomic_double *, double); +#endif //cl_khr_fp64 +#endif +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + +// atomic_work_item_fence() +void __ovld atomic_work_item_fence(cl_mem_fence_flags, memory_order, memory_scope); + +// atomic_fetch() +// OpenCL v2.0 s6.13.11.7.5: +// add/sub: atomic type argument can be uintptr_t/intptr_t, value type argument can be ptrdiff_t. + +#if defined(__opencl_c_atomic_order_seq_cst) && defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_fetch_add(volatile atomic_int *, int); +uint __ovld atomic_fetch_add(volatile atomic_uint *, uint); +int __ovld atomic_fetch_sub(volatile atomic_int *, int); +uint __ovld atomic_fetch_sub(volatile atomic_uint *, uint); +int __ovld atomic_fetch_or(volatile atomic_int *, int); +uint __ovld atomic_fetch_or(volatile atomic_uint *, uint); +int __ovld atomic_fetch_xor(volatile atomic_int *, int); +uint __ovld atomic_fetch_xor(volatile atomic_uint *, uint); +int __ovld atomic_fetch_and(volatile atomic_int *, int); +uint __ovld atomic_fetch_and(volatile atomic_uint *, uint); +int __ovld atomic_fetch_min(volatile atomic_int *, int); +uint __ovld atomic_fetch_min(volatile atomic_uint *, uint); +int __ovld atomic_fetch_max(volatile atomic_int *, int); +uint __ovld atomic_fetch_max(volatile atomic_uint *, uint); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add(volatile atomic_long *, long); +ulong __ovld atomic_fetch_add(volatile atomic_ulong *, ulong); +long __ovld atomic_fetch_sub(volatile atomic_long *, long); +ulong __ovld atomic_fetch_sub(volatile atomic_ulong *, ulong); +long __ovld atomic_fetch_or(volatile atomic_long *, long); +ulong __ovld atomic_fetch_or(volatile atomic_ulong *, ulong); +long __ovld atomic_fetch_xor(volatile atomic_long *, long); +ulong __ovld atomic_fetch_xor(volatile atomic_ulong *, ulong); +long __ovld atomic_fetch_and(volatile atomic_long *, long); +ulong __ovld atomic_fetch_and(volatile atomic_ulong *, ulong); +long __ovld atomic_fetch_min(volatile atomic_long *, long); +ulong __ovld atomic_fetch_min(volatile atomic_ulong *, ulong); +long __ovld atomic_fetch_max(volatile atomic_long *, long); +ulong __ovld atomic_fetch_max(volatile atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_add(volatile atomic_uintptr_t *, ptrdiff_t); +uintptr_t __ovld atomic_fetch_sub(volatile atomic_uintptr_t *, ptrdiff_t); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_fetch_add(volatile __global atomic_int *, int); +int __ovld atomic_fetch_add(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_add(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_add(volatile __local atomic_uint *, uint); +int __ovld atomic_fetch_sub(volatile __global atomic_int *, int); +int __ovld atomic_fetch_sub(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_sub(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_sub(volatile __local atomic_uint *, uint); +int __ovld atomic_fetch_or(volatile __global atomic_int *, int); +int __ovld atomic_fetch_or(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_or(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_or(volatile __local atomic_uint *, uint); +int __ovld atomic_fetch_xor(volatile __global atomic_int *, int); +int __ovld atomic_fetch_xor(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_xor(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_xor(volatile __local atomic_uint *, uint); +int __ovld atomic_fetch_and(volatile __global atomic_int *, int); +int __ovld atomic_fetch_and(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_and(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_and(volatile __local atomic_uint *, uint); +int __ovld atomic_fetch_min(volatile __global atomic_int *, int); +int __ovld atomic_fetch_min(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_min(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_min(volatile __local atomic_uint *, uint); +int __ovld atomic_fetch_max(volatile __global atomic_int *, int); +int __ovld atomic_fetch_max(volatile __local atomic_int *, int); +uint __ovld atomic_fetch_max(volatile __global atomic_uint *, uint); +uint __ovld atomic_fetch_max(volatile __local atomic_uint *, uint); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add(volatile __global atomic_long *, long); +long __ovld atomic_fetch_add(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_add(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_add(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_add(volatile __global atomic_uintptr_t *, ptrdiff_t); +uintptr_t __ovld atomic_fetch_add(volatile __local atomic_uintptr_t *, ptrdiff_t); +long __ovld atomic_fetch_sub(volatile __global atomic_long *, long); +long __ovld atomic_fetch_sub(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_sub(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_sub(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_sub(volatile __global atomic_uintptr_t *, ptrdiff_t); +uintptr_t __ovld atomic_fetch_sub(volatile __local atomic_uintptr_t *, ptrdiff_t); +long __ovld atomic_fetch_or(volatile __global atomic_long *, long); +long __ovld atomic_fetch_or(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_or(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_or(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_or(volatile __global atomic_uintptr_t *, intptr_t); +uintptr_t __ovld atomic_fetch_or(volatile __local atomic_uintptr_t *, intptr_t); +intptr_t __ovld atomic_fetch_or(volatile __global atomic_intptr_t *, uintptr_t); +intptr_t __ovld atomic_fetch_or(volatile __local atomic_intptr_t *, uintptr_t); +long __ovld atomic_fetch_xor(volatile __global atomic_long *, long); +long __ovld atomic_fetch_xor(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_xor(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_xor(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_xor(volatile __global atomic_uintptr_t *, intptr_t); +uintptr_t __ovld atomic_fetch_xor(volatile __local atomic_uintptr_t *, intptr_t); +intptr_t __ovld atomic_fetch_xor(volatile __global atomic_intptr_t *, uintptr_t); +intptr_t __ovld atomic_fetch_xor(volatile __local atomic_intptr_t *, uintptr_t); +long __ovld atomic_fetch_and(volatile __global atomic_long *, long); +long __ovld atomic_fetch_and(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_and(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_and(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_and(volatile __global atomic_uintptr_t *, intptr_t); +uintptr_t __ovld atomic_fetch_and(volatile __local atomic_uintptr_t *, intptr_t); +intptr_t __ovld atomic_fetch_and(volatile __global atomic_intptr_t *, uintptr_t); +intptr_t __ovld atomic_fetch_and(volatile __local atomic_intptr_t *, uintptr_t); +long __ovld atomic_fetch_min(volatile __global atomic_long *, long); +long __ovld atomic_fetch_min(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_min(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_min(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_min(volatile __global atomic_uintptr_t *, intptr_t); +uintptr_t __ovld atomic_fetch_min(volatile __local atomic_uintptr_t *, intptr_t); +intptr_t __ovld atomic_fetch_min(volatile __global atomic_intptr_t *, uintptr_t); +intptr_t __ovld atomic_fetch_min(volatile __local atomic_intptr_t *, uintptr_t); +long __ovld atomic_fetch_max(volatile __global atomic_long *, long); +long __ovld atomic_fetch_max(volatile __local atomic_long *, long); +ulong __ovld atomic_fetch_max(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_fetch_max(volatile __local atomic_ulong *, ulong); +uintptr_t __ovld atomic_fetch_max(volatile __global atomic_uintptr_t *, uintptr_t); +uintptr_t __ovld atomic_fetch_max(volatile __local atomic_uintptr_t *, uintptr_t); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_fetch_add_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_add_explicit(volatile atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_sub_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_sub_explicit(volatile atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_or_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_or_explicit(volatile atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_xor_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_xor_explicit(volatile atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_and_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_and_explicit(volatile atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_min_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_min_explicit(volatile atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_max_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_fetch_max_explicit(volatile atomic_uint *, uint, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_add_explicit(volatile atomic_ulong *, ulong, memory_order); +long __ovld atomic_fetch_sub_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_sub_explicit(volatile atomic_ulong *, ulong, memory_order); +long __ovld atomic_fetch_or_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_or_explicit(volatile atomic_ulong *, ulong, memory_order); +long __ovld atomic_fetch_xor_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_xor_explicit(volatile atomic_ulong *, ulong, memory_order); +long __ovld atomic_fetch_and_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_and_explicit(volatile atomic_ulong *, ulong, memory_order); +long __ovld atomic_fetch_min_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_min_explicit(volatile atomic_ulong *, ulong, memory_order); +long __ovld atomic_fetch_max_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_max_explicit(volatile atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_add_explicit(volatile atomic_uintptr_t *, ptrdiff_t, memory_order); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile atomic_uintptr_t *, ptrdiff_t, memory_order); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_fetch_add_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_add_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_add_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_add_explicit(volatile __local atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_sub_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_sub_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_sub_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_sub_explicit(volatile __local atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_or_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_or_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_or_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_or_explicit(volatile __local atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_xor_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_xor_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_xor_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_xor_explicit(volatile __local atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_and_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_and_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_and_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_and_explicit(volatile __local atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_min_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_min_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_min_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_min_explicit(volatile __local atomic_uint *, uint, memory_order); +int __ovld atomic_fetch_max_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_fetch_max_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_fetch_max_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_fetch_max_explicit(volatile __local atomic_uint *, uint, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_add_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_add_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_add_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_add_explicit(volatile __global atomic_uintptr_t *, ptrdiff_t, memory_order); +uintptr_t __ovld atomic_fetch_add_explicit(volatile __local atomic_uintptr_t *, ptrdiff_t, memory_order); +long __ovld atomic_fetch_sub_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_sub_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_sub_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_sub_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile __global atomic_uintptr_t *, ptrdiff_t, memory_order); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile __local atomic_uintptr_t *, ptrdiff_t, memory_order); +long __ovld atomic_fetch_or_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_or_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_or_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_or_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_or_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order); +uintptr_t __ovld atomic_fetch_or_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order); +intptr_t __ovld atomic_fetch_or_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order); +intptr_t __ovld atomic_fetch_or_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order); +long __ovld atomic_fetch_xor_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_xor_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_xor_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_xor_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_xor_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order); +uintptr_t __ovld atomic_fetch_xor_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order); +intptr_t __ovld atomic_fetch_xor_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order); +intptr_t __ovld atomic_fetch_xor_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order); +long __ovld atomic_fetch_and_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_and_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_and_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_and_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_and_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order); +uintptr_t __ovld atomic_fetch_and_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order); +intptr_t __ovld atomic_fetch_and_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order); +intptr_t __ovld atomic_fetch_and_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order); +long __ovld atomic_fetch_min_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_min_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_min_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_min_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_min_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order); +uintptr_t __ovld atomic_fetch_min_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order); +intptr_t __ovld atomic_fetch_min_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order); +intptr_t __ovld atomic_fetch_min_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order); +long __ovld atomic_fetch_max_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_fetch_max_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_fetch_max_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_fetch_max_explicit(volatile __local atomic_ulong *, ulong, memory_order); +uintptr_t __ovld atomic_fetch_max_explicit(volatile __global atomic_uintptr_t *, uintptr_t, memory_order); +uintptr_t __ovld atomic_fetch_max_explicit(volatile __local atomic_uintptr_t *, uintptr_t, memory_order); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_fetch_add_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_add_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_sub_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_sub_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_or_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_or_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_xor_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_xor_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_and_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_and_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_min_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_min_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_max_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_max_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_add_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_sub_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_sub_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_or_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_or_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_xor_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_xor_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_and_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_and_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_min_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_min_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_max_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_max_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_add_explicit(volatile atomic_uintptr_t *, ptrdiff_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile atomic_uintptr_t *, ptrdiff_t, memory_order, memory_scope); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_fetch_add_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_add_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_add_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_add_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_sub_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_sub_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_sub_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_sub_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_or_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_or_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_or_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_or_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_xor_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_xor_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_xor_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_xor_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_and_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_and_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_and_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_and_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_min_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_min_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_min_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_min_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +int __ovld atomic_fetch_max_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_fetch_max_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_fetch_max_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_fetch_max_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_add_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_add_explicit(volatile __global atomic_uintptr_t *, ptrdiff_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_add_explicit(volatile __local atomic_uintptr_t *, ptrdiff_t, memory_order, memory_scope); +ulong __ovld atomic_fetch_add_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_add_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +long __ovld atomic_fetch_sub_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_sub_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_sub_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_sub_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile __global atomic_uintptr_t *, ptrdiff_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile __local atomic_uintptr_t *, ptrdiff_t, memory_order, memory_scope); +long __ovld atomic_fetch_or_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_or_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_or_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_or_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_or_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_or_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_or_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_or_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +long __ovld atomic_fetch_xor_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_xor_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_xor_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_xor_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_xor_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_xor_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_xor_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_xor_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +long __ovld atomic_fetch_and_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_and_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_and_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_and_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_and_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_and_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_and_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_and_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +long __ovld atomic_fetch_min_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_min_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_min_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_min_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_min_explicit(volatile __global atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_min_explicit(volatile __local atomic_uintptr_t *, intptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_min_explicit(volatile __global atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +intptr_t __ovld atomic_fetch_min_explicit(volatile __local atomic_intptr_t *, uintptr_t, memory_order, memory_scope); +long __ovld atomic_fetch_max_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_fetch_max_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_fetch_max_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_fetch_max_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_max_explicit(volatile __global atomic_uintptr_t *, uintptr_t, memory_order, memory_scope); +uintptr_t __ovld atomic_fetch_max_explicit(volatile __local atomic_uintptr_t *, uintptr_t, memory_order, memory_scope); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + +// The functionality added by cl_ext_float_atomics extension +#if defined(cl_ext_float_atomics) + +#if defined(__opencl_c_ext_fp16_global_atomic_load_store) +void __ovld atomic_store(volatile __global atomic_half *, half); +void __ovld atomic_store_explicit(volatile __global atomic_half *, + half, memory_order); +void __ovld atomic_store_explicit(volatile __global atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_load(volatile __global atomic_half *); +half __ovld atomic_load_explicit(volatile __global atomic_half *, + memory_order); +half __ovld atomic_load_explicit(volatile __global atomic_half *, + memory_order, memory_scope); +half __ovld atomic_exchange(volatile __global atomic_half *, half); +half __ovld atomic_exchange_explicit(volatile __global atomic_half *, + half, memory_order); +half __ovld atomic_exchange_explicit(volatile __global atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_global_atomic_load_store) + +#if defined(__opencl_c_ext_fp16_local_atomic_load_store) +void __ovld atomic_store(volatile __local atomic_half *, half); +void __ovld atomic_store_explicit(volatile __local atomic_half *, + half, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_load(volatile __local atomic_half *); +half __ovld atomic_load_explicit(volatile __local atomic_half *, + memory_order); +half __ovld atomic_load_explicit(volatile __local atomic_half *, + memory_order, memory_scope); +half __ovld atomic_exchange(volatile __local atomic_half *, half); +half __ovld atomic_exchange_explicit(volatile __local atomic_half *, + half, memory_order); +half __ovld atomic_exchange_explicit(volatile __local atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_local_atomic_load_store) + +#if defined(__opencl_c_ext_fp16_global_atomic_load_store) && \ + defined(__opencl_c_ext_fp16_local_atomic_load_store) +void __ovld atomic_store(volatile atomic_half *, half); +void __ovld atomic_store_explicit(volatile atomic_half *, half, + memory_order); +void __ovld atomic_store_explicit(volatile atomic_half *, half, + memory_order, memory_scope); +half __ovld atomic_load(volatile atomic_half *); +half __ovld atomic_load_explicit(volatile atomic_half *, + memory_order); +half __ovld atomic_load_explicit(volatile atomic_half *, + memory_order, memory_scope); +half __ovld atomic_exchange(volatile atomic_half *, half); +half __ovld atomic_exchange_explicit(volatile atomic_half *, half, + memory_order); +half __ovld atomic_exchange_explicit(volatile atomic_half *, half, + memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_global_atomic_load_store) && + // defined(__opencl_c_ext_fp16_local_atomic_load_store) + +#if defined(__opencl_c_ext_fp16_global_atomic_min_max) +half __ovld atomic_fetch_min(volatile __global atomic_half *, half); +half __ovld atomic_fetch_max(volatile __global atomic_half *, half); +half __ovld atomic_fetch_min_explicit(volatile __global atomic_half *, + half, memory_order); +half __ovld atomic_fetch_max_explicit(volatile __global atomic_half *, + half, memory_order); +half __ovld atomic_fetch_min_explicit(volatile __global atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_fetch_max_explicit(volatile __global atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_global_atomic_min_max) + +#if defined(__opencl_c_ext_fp16_local_atomic_min_max) +half __ovld atomic_fetch_min(volatile __local atomic_half *, half); +half __ovld atomic_fetch_max(volatile __local atomic_half *, half); +half __ovld atomic_fetch_min_explicit(volatile __local atomic_half *, + half, memory_order); +half __ovld atomic_fetch_max_explicit(volatile __local atomic_half *, + half, memory_order); +half __ovld atomic_fetch_min_explicit(volatile __local atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_fetch_max_explicit(volatile __local atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_local_atomic_min_max) + +#if defined(__opencl_c_ext_fp16_global_atomic_min_max) && \ + defined(__opencl_c_ext_fp16_local_atomic_min_max) +half __ovld atomic_fetch_min(volatile atomic_half *, half); +half __ovld atomic_fetch_max(volatile atomic_half *, half); +half __ovld atomic_fetch_min_explicit(volatile atomic_half *, + half, memory_order); +half __ovld atomic_fetch_max_explicit(volatile atomic_half *, + half, memory_order); +half __ovld atomic_fetch_min_explicit(volatile atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_fetch_max_explicit(volatile atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_global_atomic_min_max) && \ + defined(__opencl_c_ext_fp16_local_atomic_min_max) + +#if defined(__opencl_c_ext_fp32_global_atomic_min_max) +float __ovld atomic_fetch_min(volatile __global atomic_float *, float); +float __ovld atomic_fetch_max(volatile __global atomic_float *, float); +float __ovld atomic_fetch_min_explicit(volatile __global atomic_float *, + float, memory_order); +float __ovld atomic_fetch_max_explicit(volatile __global atomic_float *, + float, memory_order); +float __ovld atomic_fetch_min_explicit(volatile __global atomic_float *, + float, memory_order, memory_scope); +float __ovld atomic_fetch_max_explicit(volatile __global atomic_float *, + float, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp32_global_atomic_min_max) + +#if defined(__opencl_c_ext_fp32_local_atomic_min_max) +float __ovld atomic_fetch_min(volatile __local atomic_float *, float); +float __ovld atomic_fetch_max(volatile __local atomic_float *, float); +float __ovld atomic_fetch_min_explicit(volatile __local atomic_float *, + float, memory_order); +float __ovld atomic_fetch_max_explicit(volatile __local atomic_float *, + float, memory_order); +float __ovld atomic_fetch_min_explicit(volatile __local atomic_float *, + float, memory_order, memory_scope); +float __ovld atomic_fetch_max_explicit(volatile __local atomic_float *, + float, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp32_local_atomic_min_max) + +#if defined(__opencl_c_ext_fp32_global_atomic_min_max) && \ + defined(__opencl_c_ext_fp32_local_atomic_min_max) +float __ovld atomic_fetch_min(volatile atomic_float *, float); +float __ovld atomic_fetch_max(volatile atomic_float *, float); +float __ovld atomic_fetch_min_explicit(volatile atomic_float *, + float, memory_order); +float __ovld atomic_fetch_max_explicit(volatile atomic_float *, + float, memory_order); +float __ovld atomic_fetch_min_explicit(volatile atomic_float *, + float, memory_order, memory_scope); +float __ovld atomic_fetch_max_explicit(volatile atomic_float *, + float, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp32_global_atomic_min_max) && \ + defined(__opencl_c_ext_fp32_local_atomic_min_max) + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#if defined(__opencl_c_ext_fp64_global_atomic_min_max) +double __ovld atomic_fetch_min(volatile __global atomic_double *, double); +double __ovld atomic_fetch_max(volatile __global atomic_double *, double); +double __ovld atomic_fetch_min_explicit(volatile __global atomic_double *, + double, memory_order); +double __ovld atomic_fetch_max_explicit(volatile __global atomic_double *, + double, memory_order); +double __ovld atomic_fetch_min_explicit(volatile __global atomic_double *, + double, memory_order, memory_scope); +double __ovld atomic_fetch_max_explicit(volatile __global atomic_double *, + double, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp64_global_atomic_min_max) + +#if defined(__opencl_c_ext_fp64_local_atomic_min_max) +double __ovld atomic_fetch_min(volatile __local atomic_double *, double); +double __ovld atomic_fetch_max(volatile __local atomic_double *, double); +double __ovld atomic_fetch_min_explicit(volatile __local atomic_double *, + double, memory_order); +double __ovld atomic_fetch_max_explicit(volatile __local atomic_double *, + double, memory_order); +double __ovld atomic_fetch_min_explicit(volatile __local atomic_double *, + double, memory_order, memory_scope); +double __ovld atomic_fetch_max_explicit(volatile __local atomic_double *, + double, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp64_local_atomic_min_max) + +#if defined(__opencl_c_ext_fp64_global_atomic_min_max) && \ + defined(__opencl_c_ext_fp64_local_atomic_min_max) +double __ovld atomic_fetch_min(volatile atomic_double *, double); +double __ovld atomic_fetch_max(volatile atomic_double *, double); +double __ovld atomic_fetch_min_explicit(volatile atomic_double *, + double, memory_order); +double __ovld atomic_fetch_max_explicit(volatile atomic_double *, + double, memory_order); +double __ovld atomic_fetch_min_explicit(volatile atomic_double *, + double, memory_order, memory_scope); +double __ovld atomic_fetch_max_explicit(volatile atomic_double *, + double, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp64_global_atomic_min_max) && \ + defined(__opencl_c_ext_fp64_local_atomic_min_max) +#endif // defined(cl_khr_int64_base_atomics) && \ + defined(cl_khr_int64_extended_atomics) + +#if defined(__opencl_c_ext_fp16_global_atomic_add) +half __ovld atomic_fetch_add(volatile __global atomic_half *, half); +half __ovld atomic_fetch_sub(volatile __global atomic_half *, half); +half __ovld atomic_fetch_add_explicit(volatile __global atomic_half *, + half, memory_order); +half __ovld atomic_fetch_sub_explicit(volatile __global atomic_half *, + half, memory_order); +half __ovld atomic_fetch_add_explicit(volatile __global atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_fetch_sub_explicit(volatile __global atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_global_atomic_add) + +#if defined(__opencl_c_ext_fp16_local_atomic_add) +half __ovld atomic_fetch_add(volatile __local atomic_half *, half); +half __ovld atomic_fetch_sub(volatile __local atomic_half *, half); +half __ovld atomic_fetch_add_explicit(volatile __local atomic_half *, + half, memory_order); +half __ovld atomic_fetch_sub_explicit(volatile __local atomic_half *, + half, memory_order); +half __ovld atomic_fetch_add_explicit(volatile __local atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_fetch_sub_explicit(volatile __local atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_local_atomic_add) + +#if defined(__opencl_c_ext_fp16_global_atomic_add) && \ + defined(__opencl_c_ext_fp16_local_atomic_add) +half __ovld atomic_fetch_add(volatile atomic_half *, half); +half __ovld atomic_fetch_sub(volatile atomic_half *, half); +half __ovld atomic_fetch_add_explicit(volatile atomic_half *, + half, memory_order); +half __ovld atomic_fetch_sub_explicit(volatile atomic_half *, + half, memory_order); +half __ovld atomic_fetch_add_explicit(volatile atomic_half *, + half, memory_order, memory_scope); +half __ovld atomic_fetch_sub_explicit(volatile atomic_half *, + half, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp16_global_atomic_add) && \ + defined(__opencl_c_ext_fp16_local_atomic_add) + +#if defined(__opencl_c_ext_fp32_global_atomic_add) +float __ovld atomic_fetch_add(volatile __global atomic_float *, float); +float __ovld atomic_fetch_sub(volatile __global atomic_float *, float); +float __ovld atomic_fetch_add_explicit(volatile __global atomic_float *, + float, memory_order); +float __ovld atomic_fetch_sub_explicit(volatile __global atomic_float *, + float, memory_order); +float __ovld atomic_fetch_add_explicit(volatile __global atomic_float *, + float, memory_order, memory_scope); +float __ovld atomic_fetch_sub_explicit(volatile __global atomic_float *, + float, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp32_global_atomic_add) + +#if defined(__opencl_c_ext_fp32_local_atomic_add) +float __ovld atomic_fetch_add(volatile __local atomic_float *, float); +float __ovld atomic_fetch_sub(volatile __local atomic_float *, float); +float __ovld atomic_fetch_add_explicit(volatile __local atomic_float *, + float, memory_order); +float __ovld atomic_fetch_sub_explicit(volatile __local atomic_float *, + float, memory_order); +float __ovld atomic_fetch_add_explicit(volatile __local atomic_float *, + float, memory_order, memory_scope); +float __ovld atomic_fetch_sub_explicit(volatile __local atomic_float *, + float, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp32_local_atomic_add) + +#if defined(__opencl_c_ext_fp32_global_atomic_add) && \ + defined(__opencl_c_ext_fp32_local_atomic_add) +float __ovld atomic_fetch_add(volatile atomic_float *, float); +float __ovld atomic_fetch_sub(volatile atomic_float *, float); +float __ovld atomic_fetch_add_explicit(volatile atomic_float *, + float, memory_order); +float __ovld atomic_fetch_sub_explicit(volatile atomic_float *, + float, memory_order); +float __ovld atomic_fetch_add_explicit(volatile atomic_float *, + float, memory_order, memory_scope); +float __ovld atomic_fetch_sub_explicit(volatile atomic_float *, + float, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp32_global_atomic_add) && \ + defined(__opencl_c_ext_fp32_local_atomic_add) + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#if defined(__opencl_c_ext_fp64_global_atomic_add) +double __ovld atomic_fetch_add(volatile __global atomic_double *, double); +double __ovld atomic_fetch_sub(volatile __global atomic_double *, double); +double __ovld atomic_fetch_add_explicit(volatile __global atomic_double *, + double, memory_order); +double __ovld atomic_fetch_sub_explicit(volatile __global atomic_double *, + double, memory_order); +double __ovld atomic_fetch_add_explicit(volatile __global atomic_double *, + double, memory_order, memory_scope); +double __ovld atomic_fetch_sub_explicit(volatile __global atomic_double *, + double, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp64_global_atomic_add) + +#if defined(__opencl_c_ext_fp64_local_atomic_add) +double __ovld atomic_fetch_add(volatile __local atomic_double *, double); +double __ovld atomic_fetch_sub(volatile __local atomic_double *, double); +double __ovld atomic_fetch_add_explicit(volatile __local atomic_double *, + double, memory_order); +double __ovld atomic_fetch_sub_explicit(volatile __local atomic_double *, + double, memory_order); +double __ovld atomic_fetch_add_explicit(volatile __local atomic_double *, + double, memory_order, memory_scope); +double __ovld atomic_fetch_sub_explicit(volatile __local atomic_double *, + double, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp64_local_atomic_add) + +#if defined(__opencl_c_ext_fp64_global_atomic_add) && \ + defined(__opencl_c_ext_fp64_local_atomic_add) +double __ovld atomic_fetch_add(volatile atomic_double *, double); +double __ovld atomic_fetch_sub(volatile atomic_double *, double); +double __ovld atomic_fetch_add_explicit(volatile atomic_double *, + double, memory_order); +double __ovld atomic_fetch_sub_explicit(volatile atomic_double *, + double, memory_order); +double __ovld atomic_fetch_add_explicit(volatile atomic_double *, + double, memory_order, memory_scope); +double __ovld atomic_fetch_sub_explicit(volatile atomic_double *, + double, memory_order, memory_scope); +#endif // defined(__opencl_c_ext_fp64_global_atomic_add) && \ + defined(__opencl_c_ext_fp64_local_atomic_add) +#endif // defined(cl_khr_int64_base_atomics) && \ + defined(cl_khr_int64_extended_atomics) + +#endif // cl_ext_float_atomics + +// atomic_store() + +#if defined(__opencl_c_atomic_order_seq_cst) && defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +void __ovld atomic_store(volatile atomic_int *, int); +void __ovld atomic_store(volatile atomic_uint *, uint); +void __ovld atomic_store(volatile atomic_float *, float); + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store(volatile atomic_double *, double); +#endif //cl_khr_fp64 +void __ovld atomic_store(volatile atomic_long *, long); +void __ovld atomic_store(volatile atomic_ulong *, ulong); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +void __ovld atomic_store(volatile __global atomic_int *, int); +void __ovld atomic_store(volatile __local atomic_int *, int); +void __ovld atomic_store(volatile __global atomic_uint *, uint); +void __ovld atomic_store(volatile __local atomic_uint *, uint); +void __ovld atomic_store(volatile __global atomic_float *, float); +void __ovld atomic_store(volatile __local atomic_float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store(volatile __global atomic_double *, double); +void __ovld atomic_store(volatile __local atomic_double *, double); +#endif //cl_khr_fp64 +void __ovld atomic_store(volatile __global atomic_long *, long); +void __ovld atomic_store(volatile __local atomic_long *, long); +void __ovld atomic_store(volatile __global atomic_ulong *, ulong); +void __ovld atomic_store(volatile __local atomic_ulong *, ulong); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +void __ovld atomic_store_explicit(volatile atomic_int *, int, memory_order); +void __ovld atomic_store_explicit(volatile atomic_uint *, uint, memory_order); +void __ovld atomic_store_explicit(volatile atomic_float *, float, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store_explicit(volatile atomic_double *, double, memory_order); +#endif //cl_khr_fp64 +void __ovld atomic_store_explicit(volatile atomic_long *, long, memory_order); +void __ovld atomic_store_explicit(volatile atomic_ulong *, ulong, memory_order); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +void __ovld atomic_store_explicit(volatile __global atomic_int *, int, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_int *, int, memory_order); +void __ovld atomic_store_explicit(volatile __global atomic_uint *, uint, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_uint *, uint, memory_order); +void __ovld atomic_store_explicit(volatile __global atomic_float *, float, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_float *, float, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store_explicit(volatile __global atomic_double *, double, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_double *, double, memory_order); +#endif +void __ovld atomic_store_explicit(volatile __global atomic_long *, long, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_long *, long, memory_order); +void __ovld atomic_store_explicit(volatile __global atomic_ulong *, ulong, memory_order); +void __ovld atomic_store_explicit(volatile __local atomic_ulong *, ulong, memory_order); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_generic_address_space) +void __ovld atomic_store_explicit(volatile atomic_int *, int, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile atomic_float *, float, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store_explicit(volatile atomic_double *, double, memory_order, memory_scope); +#endif //cl_khr_fp64 +void __ovld atomic_store_explicit(volatile atomic_long *, long, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +void __ovld atomic_store_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __global atomic_float *, float, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __local atomic_float *, float, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store_explicit(volatile __global atomic_double *, double, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __local atomic_double *, double, memory_order, memory_scope); +#endif //cl_khr_fp64 +void __ovld atomic_store_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +void __ovld atomic_store_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + +// atomic_load() +#if defined(__opencl_c_atomic_order_seq_cst) && defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_load(volatile atomic_int *); +uint __ovld atomic_load(volatile atomic_uint *); +float __ovld atomic_load(volatile atomic_float *); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load(volatile atomic_double *); +#endif //cl_khr_fp64 +long __ovld atomic_load(volatile atomic_long *); +ulong __ovld atomic_load(volatile atomic_ulong *); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_load(volatile __global atomic_int *); +int __ovld atomic_load(volatile __local atomic_int *); +uint __ovld atomic_load(volatile __global atomic_uint *); +uint __ovld atomic_load(volatile __local atomic_uint *); +float __ovld atomic_load(volatile __global atomic_float *); +float __ovld atomic_load(volatile __local atomic_float *); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load(volatile __global atomic_double *); +double __ovld atomic_load(volatile __local atomic_double *); +#endif //cl_khr_fp64 +long __ovld atomic_load(volatile __global atomic_long *); +long __ovld atomic_load(volatile __local atomic_long *); +ulong __ovld atomic_load(volatile __global atomic_ulong *); +ulong __ovld atomic_load(volatile __local atomic_ulong *); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_load_explicit(volatile atomic_int *, memory_order); +uint __ovld atomic_load_explicit(volatile atomic_uint *, memory_order); +float __ovld atomic_load_explicit(volatile atomic_float *, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load_explicit(volatile atomic_double *, memory_order); +#endif //cl_khr_fp64 +long __ovld atomic_load_explicit(volatile atomic_long *, memory_order); +ulong __ovld atomic_load_explicit(volatile atomic_ulong *, memory_order); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_load_explicit(volatile __global atomic_int *, memory_order); +int __ovld atomic_load_explicit(volatile __local atomic_int *, memory_order); +uint __ovld atomic_load_explicit(volatile __global atomic_uint *, memory_order); +uint __ovld atomic_load_explicit(volatile __local atomic_uint *, memory_order); +float __ovld atomic_load_explicit(volatile __global atomic_float *, memory_order); +float __ovld atomic_load_explicit(volatile __local atomic_float *, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load_explicit(volatile __global atomic_double *, memory_order); +double __ovld atomic_load_explicit(volatile __local atomic_double *, memory_order); +#endif //cl_khr_fp64 +long __ovld atomic_load_explicit(volatile __global atomic_long *, memory_order); +long __ovld atomic_load_explicit(volatile __local atomic_long *, memory_order); +ulong __ovld atomic_load_explicit(volatile __global atomic_ulong *, memory_order); +ulong __ovld atomic_load_explicit(volatile __local atomic_ulong *, memory_order); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_load_explicit(volatile atomic_int *, memory_order, memory_scope); +uint __ovld atomic_load_explicit(volatile atomic_uint *, memory_order, memory_scope); +float __ovld atomic_load_explicit(volatile atomic_float *, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load_explicit(volatile atomic_double *, memory_order, memory_scope); +#endif //cl_khr_fp64 +long __ovld atomic_load_explicit(volatile atomic_long *, memory_order, memory_scope); +ulong __ovld atomic_load_explicit(volatile atomic_ulong *, memory_order, memory_scope); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_load_explicit(volatile __global atomic_int *, memory_order, memory_scope); +int __ovld atomic_load_explicit(volatile __local atomic_int *, memory_order, memory_scope); +uint __ovld atomic_load_explicit(volatile __global atomic_uint *, memory_order, memory_scope); +uint __ovld atomic_load_explicit(volatile __local atomic_uint *, memory_order, memory_scope); +float __ovld atomic_load_explicit(volatile __global atomic_float *, memory_order, memory_scope); +float __ovld atomic_load_explicit(volatile __local atomic_float *, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load_explicit(volatile __global atomic_double *, memory_order, memory_scope); +double __ovld atomic_load_explicit(volatile __local atomic_double *, memory_order, memory_scope); +#endif +long __ovld atomic_load_explicit(volatile __global atomic_long *, memory_order, memory_scope); +long __ovld atomic_load_explicit(volatile __local atomic_long *, memory_order, memory_scope); +ulong __ovld atomic_load_explicit(volatile __global atomic_ulong *, memory_order, memory_scope); +ulong __ovld atomic_load_explicit(volatile __local atomic_ulong *, memory_order, memory_scope); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + +// atomic_exchange() + +#if defined(__opencl_c_atomic_order_seq_cst) && defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_exchange(volatile atomic_int *, int); +uint __ovld atomic_exchange(volatile atomic_uint *, uint); +float __ovld atomic_exchange(volatile atomic_float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange(volatile atomic_double *, double); +#endif //cl_khr_fp64 +long __ovld atomic_exchange(volatile atomic_long *, long); +ulong __ovld atomic_exchange(volatile atomic_ulong *, ulong); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_exchange(volatile __global atomic_int *, int); +int __ovld atomic_exchange(volatile __local atomic_int *, int); +uint __ovld atomic_exchange(volatile __global atomic_uint *, uint); +uint __ovld atomic_exchange(volatile __local atomic_uint *, uint); +float __ovld atomic_exchange(volatile __global atomic_float *, float); +float __ovld atomic_exchange(volatile __local atomic_float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange(volatile __global atomic_double *, double); +double __ovld atomic_exchange(volatile __local atomic_double *, double); +#endif //cl_khr_fp64 +long __ovld atomic_exchange(volatile __global atomic_long *, long); +long __ovld atomic_exchange(volatile __local atomic_long *, long); +ulong __ovld atomic_exchange(volatile __global atomic_ulong *, ulong); +ulong __ovld atomic_exchange(volatile __local atomic_ulong *, ulong); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_exchange_explicit(volatile atomic_int *, int, memory_order); +uint __ovld atomic_exchange_explicit(volatile atomic_uint *, uint, memory_order); +float __ovld atomic_exchange_explicit(volatile atomic_float *, float, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange_explicit(volatile atomic_double *, double, memory_order); +#endif //cl_khr_fp64 +long __ovld atomic_exchange_explicit(volatile atomic_long *, long, memory_order); +ulong __ovld atomic_exchange_explicit(volatile atomic_ulong *, ulong, memory_order); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_exchange_explicit(volatile __global atomic_int *, int, memory_order); +int __ovld atomic_exchange_explicit(volatile __local atomic_int *, int, memory_order); +uint __ovld atomic_exchange_explicit(volatile __global atomic_uint *, uint, memory_order); +uint __ovld atomic_exchange_explicit(volatile __local atomic_uint *, uint, memory_order); +float __ovld atomic_exchange_explicit(volatile __global atomic_float *, float, memory_order); +float __ovld atomic_exchange_explicit(volatile __local atomic_float *, float, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange_explicit(volatile __global atomic_double *, double, memory_order); +double __ovld atomic_exchange_explicit(volatile __local atomic_double *, double, memory_order); +#endif //cl_khr_fp64 +long __ovld atomic_exchange_explicit(volatile __global atomic_long *, long, memory_order); +long __ovld atomic_exchange_explicit(volatile __local atomic_long *, long, memory_order); +ulong __ovld atomic_exchange_explicit(volatile __global atomic_ulong *, ulong, memory_order); +ulong __ovld atomic_exchange_explicit(volatile __local atomic_ulong *, ulong, memory_order); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics)wi +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_generic_address_space) +int __ovld atomic_exchange_explicit(volatile atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_exchange_explicit(volatile atomic_uint *, uint, memory_order, memory_scope); +float __ovld atomic_exchange_explicit(volatile atomic_float *, float, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange_explicit(volatile atomic_double *, double, memory_order, memory_scope); +#endif //cl_khr_fp64 +long __ovld atomic_exchange_explicit(volatile atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_exchange_explicit(volatile atomic_ulong *, ulong, memory_order, memory_scope); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +int __ovld atomic_exchange_explicit(volatile __global atomic_int *, int, memory_order, memory_scope); +int __ovld atomic_exchange_explicit(volatile __local atomic_int *, int, memory_order, memory_scope); +uint __ovld atomic_exchange_explicit(volatile __global atomic_uint *, uint, memory_order, memory_scope); +uint __ovld atomic_exchange_explicit(volatile __local atomic_uint *, uint, memory_order, memory_scope); +float __ovld atomic_exchange_explicit(volatile __global atomic_float *, float, memory_order, memory_scope); +float __ovld atomic_exchange_explicit(volatile __local atomic_float *, float, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange_explicit(volatile __global atomic_double *, double, memory_order, memory_scope); +double __ovld atomic_exchange_explicit(volatile __local atomic_double *, double, memory_order, memory_scope); +#endif //cl_khr_fp64 +long __ovld atomic_exchange_explicit(volatile __global atomic_long *, long, memory_order, memory_scope); +long __ovld atomic_exchange_explicit(volatile __local atomic_long *, long, memory_order, memory_scope); +ulong __ovld atomic_exchange_explicit(volatile __global atomic_ulong *, ulong, memory_order, memory_scope); +ulong __ovld atomic_exchange_explicit(volatile __local atomic_ulong *, ulong, memory_order, memory_scope); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + +// atomic_compare_exchange_strong() and atomic_compare_exchange_weak() +#if defined(__opencl_c_atomic_order_seq_cst) && defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +bool __ovld atomic_compare_exchange_strong(volatile atomic_int *, int *, int); +bool __ovld atomic_compare_exchange_strong(volatile atomic_uint *, uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile atomic_int *, int *, int); +bool __ovld atomic_compare_exchange_weak(volatile atomic_uint *, uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile atomic_float *, float *, float); +bool __ovld atomic_compare_exchange_weak(volatile atomic_float *, float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong(volatile atomic_double *, double *, double); +bool __ovld atomic_compare_exchange_weak(volatile atomic_double *, double *, double); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong(volatile atomic_long *, long *, long); +bool __ovld atomic_compare_exchange_weak(volatile atomic_long *, long *, long); +bool __ovld atomic_compare_exchange_strong(volatile atomic_ulong *, ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile atomic_ulong *, ulong *, ulong); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_int *, __global int *, int); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_int *, __local int *, int); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_int *, __private int *, int); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_int *, __global int *, int); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_int *, __local int *, int); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_int *, __private int *, int); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_uint *, __global uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_uint *, __local uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_uint *, __private uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_uint *, __global uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_uint *, __local uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_uint *, __private uint *, uint); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_float *, __global float *, float); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_float *, __local float *, float); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_float *, __private float *, float); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_float *, __global float *, float); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_float *, __local float *, float); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_float *, __private float *, float); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_int *, __global int *, int); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_int *, __local int *, int); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_int *, __private int *, int); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_int *, __global int *, int); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_int *, __local int *, int); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_int *, __private int *, int); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_uint *, __global uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_uint *, __local uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_uint *, __private uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_uint *, __global uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_uint *, __local uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_uint *, __private uint *, uint); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_float *, __global float *, float); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_float *, __local float *, float); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_float *, __private float *, float); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_float *, __global float *, float); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_float *, __local float *, float); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_float *, __private float *, float); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_double *, __global double *, double); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_double *, __local double *, double); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_double *, __private double *, double); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_double *, __global double *, double); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_double *, __local double *, double); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_double *, __private double *, double); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_double *, __global double *, double); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_double *, __local double *, double); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_double *, __private double *, double); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_double *, __global double *, double); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_double *, __local double *, double); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_double *, __private double *, double); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_long *, __global long *, long); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_long *, __local long *, long); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_long *, __private long *, long); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_long *, __global long *, long); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_long *, __local long *, long); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_long *, __private long *, long); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_ulong *, __global ulong *, ulong); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_ulong *, __local ulong *, ulong); +bool __ovld atomic_compare_exchange_strong(volatile __global atomic_ulong *, __private ulong *, ulong); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_ulong *, __global ulong *, ulong); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_ulong *, __local ulong *, ulong); +bool __ovld atomic_compare_exchange_strong(volatile __local atomic_ulong *, __private ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_long *, __global long *, long); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_long *, __local long *, long); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_long *, __private long *, long); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_long *, __global long *, long); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_long *, __local long *, long); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_long *, __private long *, long); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_ulong *, __global ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_ulong *, __local ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile __global atomic_ulong *, __private ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_ulong *, __global ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_ulong *, __local ulong *, ulong); +bool __ovld atomic_compare_exchange_weak(volatile __local atomic_ulong *, __private ulong *, ulong); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_int *, int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_uint *, uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_int *, int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_uint *, uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_float *, float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_float *, float *, float, memory_order, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_double *, double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_double *, double *, double, memory_order, memory_order); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_long *, long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_long *, long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_ulong *, ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_ulong *, ulong *, ulong, memory_order, memory_order); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_int *, __global int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_int *, __local int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_int *, __private int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_int *, __global int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_int *, __local int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_int *, __private int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_uint *, __global uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_uint *, __local uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_uint *, __private uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_uint *, __global uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_uint *, __local uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_uint *, __private uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_float *, __global float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_float *, __local float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_float *, __private float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_float *, __global float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_float *, __local float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_float *, __private float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_int *, __global int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_int *, __local int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_int *, __private int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_int *, __global int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_int *, __local int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_int *, __private int *, int, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_uint *, __global uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_uint *, __local uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_uint *, __private uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_uint *, __global uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_uint *, __local uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_uint *, __private uint *, uint, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_float *, __global float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_float *, __local float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_float *, __private float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_float *, __global float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_float *, __local float *, float, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_float *, __private float *, float, memory_order, memory_order); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_double *, __global double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_double *, __local double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_double *, __private double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_double *, __global double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_double *, __local double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_double *, __private double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_double *, __global double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_double *, __local double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_double *, __private double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_double *, __global double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_double *, __local double *, double, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_double *, __private double *, double, memory_order, memory_order); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_long *, __global long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_long *, __local long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_long *, __private long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_long *, __global long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_long *, __local long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_long *, __private long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_ulong *, __global ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_ulong *, __local ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_ulong *, __private ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_ulong *, __global ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_ulong *, __local ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_ulong *, __private ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_long *, __global long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_long *, __local long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_long *, __private long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_long *, __global long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_long *, __local long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_long *, __private long *, long, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_ulong *, __global ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_ulong *, __local ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_ulong *, __private ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_ulong *, __global ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_ulong *, __local ulong *, ulong, memory_order, memory_order); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_ulong *, __private ulong *, ulong, memory_order, memory_order); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif //defined(__opencl_c_atomic_scope_device) + +#if defined(__opencl_c_generic_address_space) +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_int *, int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_uint *, uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_int *, int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_uint *, uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_float *, float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_float *, float *, float, memory_order, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_double *, double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_double *, double *, double, memory_order, memory_order, memory_scope); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_long *, long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_long *, long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_ulong *, ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_ulong *, ulong *, ulong, memory_order, memory_order, memory_scope); +#endif +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_int *, __global int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_int *, __local int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_int *, __private int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_int *, __global int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_int *, __local int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_int *, __private int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_uint *, __global uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_uint *, __local uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_uint *, __private uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_uint *, __global uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_uint *, __local uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_uint *, __private uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_float *, __global float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_float *, __local float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_float *, __private float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_float *, __global float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_float *, __local float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_float *, __private float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_int *, __global int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_int *, __local int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_int *, __private int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_int *, __global int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_int *, __local int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_int *, __private int *, int, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_uint *, __global uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_uint *, __local uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_uint *, __private uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_uint *, __global uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_uint *, __local uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_uint *, __private uint *, uint, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_float *, __global float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_float *, __local float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_float *, __private float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_float *, __global float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_float *, __local float *, float, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_float *, __private float *, float, memory_order, memory_order, memory_scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_double *, __global double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_double *, __local double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_double *, __private double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_double *, __global double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_double *, __local double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_double *, __private double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_double *, __global double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_double *, __local double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_double *, __private double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_double *, __global double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_double *, __local double *, double, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_double *, __private double *, double, memory_order, memory_order, memory_scope); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_long *, __global long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_long *, __local long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_long *, __private long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_long *, __global long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_long *, __local long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_long *, __private long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_ulong *, __global ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_ulong *, __local ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __global atomic_ulong *, __private ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_ulong *, __global ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_ulong *, __local ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_strong_explicit(volatile __local atomic_ulong *, __private ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_long *, __global long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_long *, __local long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_long *, __private long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_long *, __global long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_long *, __local long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_long *, __private long *, long, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_ulong *, __global ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_ulong *, __local ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __global atomic_ulong *, __private ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_ulong *, __global ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_ulong *, __local ulong *, ulong, memory_order, memory_order, memory_scope); +bool __ovld atomic_compare_exchange_weak_explicit(volatile __local atomic_ulong *, __private ulong *, ulong, memory_order, memory_order, memory_scope); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) + +// atomic_flag_test_and_set() and atomic_flag_clear() +#if defined(__opencl_c_atomic_order_seq_cst) && defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +bool __ovld atomic_flag_test_and_set(volatile atomic_flag *); +void __ovld atomic_flag_clear(volatile atomic_flag *); +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +bool __ovld atomic_flag_test_and_set(volatile __global atomic_flag *); +bool __ovld atomic_flag_test_and_set(volatile __local atomic_flag *); +void __ovld atomic_flag_clear(volatile __global atomic_flag *); +void __ovld atomic_flag_clear(volatile __local atomic_flag *); +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_atomic_scope_device) +#if defined(__opencl_c_generic_address_space) +bool __ovld atomic_flag_test_and_set_explicit(volatile atomic_flag *, memory_order); +void __ovld atomic_flag_clear_explicit(volatile atomic_flag *, memory_order); +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +bool __ovld atomic_flag_test_and_set_explicit(volatile __global atomic_flag *, memory_order); +bool __ovld atomic_flag_test_and_set_explicit(volatile __local atomic_flag *, memory_order); +void __ovld atomic_flag_clear_explicit(volatile __global atomic_flag *, memory_order); +void __ovld atomic_flag_clear_explicit(volatile __local atomic_flag *, memory_order); +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif + +#if defined(__opencl_c_generic_address_space) +bool __ovld atomic_flag_test_and_set_explicit(volatile atomic_flag *, memory_order, memory_scope); +void __ovld atomic_flag_clear_explicit(volatile atomic_flag *, memory_order, memory_scope); +#endif //defined(__opencl_c_generic_address_space) +#if (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +bool __ovld atomic_flag_test_and_set_explicit(volatile __global atomic_flag *, memory_order, memory_scope); +bool __ovld atomic_flag_test_and_set_explicit(volatile __local atomic_flag *, memory_order, memory_scope); +void __ovld atomic_flag_clear_explicit(volatile __global atomic_flag *, memory_order, memory_scope); +void __ovld atomic_flag_clear_explicit(volatile __local atomic_flag *, memory_order, memory_scope); +#endif // (__OPENCL_C_VERSION__ >= CL_VERSION_3_0 || __OPENCL_CPP_VERSION__ >= 202100) +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.12, v1.2 s6.12.12, v2.0 s6.13.12 - Miscellaneous Vector Functions + +/** + * The shuffle and shuffle2 built-in functions construct + * a permutation of elements from one or two input + * vectors respectively that are of the same type, + * returning a vector with the same element type as the + * input and length that is the same as the shuffle mask. + * The size of each element in the mask must match the + * size of each element in the result. For shuffle, only + * the ilogb(2m-1) least significant bits of each mask + * element are considered. For shuffle2, only the + * ilogb(2m-1)+1 least significant bits of each mask + * element are considered. Other bits in the mask shall + * be ignored. + * The elements of the input vectors are numbered from + * left to right across one or both of the vectors. For this + * purpose, the number of elements in a vector is given + * by vec_step(gentypem). The shuffle mask operand + * specifies, for each element of the result vector, which + * element of the one or two input vectors the result + * element gets. + * Examples: + * uint4 mask = (uint4)(3, 2, + * 1, 0); + * float4 a; + * float4 r = shuffle(a, mask); + * // r.s0123 = a.wzyx + * uint8 mask = (uint8)(0, 1, 2, 3, + * 4, 5, 6, 7); + * float4 a, b; + * float8 r = shuffle2(a, b, mask); + * // r.s0123 = a.xyzw + * // r.s4567 = b.xyzw + * uint4 mask; + * float8 a; + * float4 b; + * b = shuffle(a, mask); + * Examples that are not valid are: + * uint8 mask; + * short16 a; + * short8 b; + * b = shuffle(a, mask); <- not valid + */ +char2 __ovld __cnfn shuffle(char2, uchar2); +char2 __ovld __cnfn shuffle(char4, uchar2); +char2 __ovld __cnfn shuffle(char8, uchar2); +char2 __ovld __cnfn shuffle(char16, uchar2); + +uchar2 __ovld __cnfn shuffle(uchar2, uchar2); +uchar2 __ovld __cnfn shuffle(uchar4, uchar2); +uchar2 __ovld __cnfn shuffle(uchar8, uchar2); +uchar2 __ovld __cnfn shuffle(uchar16, uchar2); + +short2 __ovld __cnfn shuffle(short2, ushort2); +short2 __ovld __cnfn shuffle(short4, ushort2); +short2 __ovld __cnfn shuffle(short8, ushort2); +short2 __ovld __cnfn shuffle(short16, ushort2); + +ushort2 __ovld __cnfn shuffle(ushort2, ushort2); +ushort2 __ovld __cnfn shuffle(ushort4, ushort2); +ushort2 __ovld __cnfn shuffle(ushort8, ushort2); +ushort2 __ovld __cnfn shuffle(ushort16, ushort2); + +int2 __ovld __cnfn shuffle(int2, uint2); +int2 __ovld __cnfn shuffle(int4, uint2); +int2 __ovld __cnfn shuffle(int8, uint2); +int2 __ovld __cnfn shuffle(int16, uint2); + +uint2 __ovld __cnfn shuffle(uint2, uint2); +uint2 __ovld __cnfn shuffle(uint4, uint2); +uint2 __ovld __cnfn shuffle(uint8, uint2); +uint2 __ovld __cnfn shuffle(uint16, uint2); + +long2 __ovld __cnfn shuffle(long2, ulong2); +long2 __ovld __cnfn shuffle(long4, ulong2); +long2 __ovld __cnfn shuffle(long8, ulong2); +long2 __ovld __cnfn shuffle(long16, ulong2); + +ulong2 __ovld __cnfn shuffle(ulong2, ulong2); +ulong2 __ovld __cnfn shuffle(ulong4, ulong2); +ulong2 __ovld __cnfn shuffle(ulong8, ulong2); +ulong2 __ovld __cnfn shuffle(ulong16, ulong2); + +float2 __ovld __cnfn shuffle(float2, uint2); +float2 __ovld __cnfn shuffle(float4, uint2); +float2 __ovld __cnfn shuffle(float8, uint2); +float2 __ovld __cnfn shuffle(float16, uint2); + +char4 __ovld __cnfn shuffle(char2, uchar4); +char4 __ovld __cnfn shuffle(char4, uchar4); +char4 __ovld __cnfn shuffle(char8, uchar4); +char4 __ovld __cnfn shuffle(char16, uchar4); + +uchar4 __ovld __cnfn shuffle(uchar2, uchar4); +uchar4 __ovld __cnfn shuffle(uchar4, uchar4); +uchar4 __ovld __cnfn shuffle(uchar8, uchar4); +uchar4 __ovld __cnfn shuffle(uchar16, uchar4); + +short4 __ovld __cnfn shuffle(short2, ushort4); +short4 __ovld __cnfn shuffle(short4, ushort4); +short4 __ovld __cnfn shuffle(short8, ushort4); +short4 __ovld __cnfn shuffle(short16, ushort4); + +ushort4 __ovld __cnfn shuffle(ushort2, ushort4); +ushort4 __ovld __cnfn shuffle(ushort4, ushort4); +ushort4 __ovld __cnfn shuffle(ushort8, ushort4); +ushort4 __ovld __cnfn shuffle(ushort16, ushort4); + +int4 __ovld __cnfn shuffle(int2, uint4); +int4 __ovld __cnfn shuffle(int4, uint4); +int4 __ovld __cnfn shuffle(int8, uint4); +int4 __ovld __cnfn shuffle(int16, uint4); + +uint4 __ovld __cnfn shuffle(uint2, uint4); +uint4 __ovld __cnfn shuffle(uint4, uint4); +uint4 __ovld __cnfn shuffle(uint8, uint4); +uint4 __ovld __cnfn shuffle(uint16, uint4); + +long4 __ovld __cnfn shuffle(long2, ulong4); +long4 __ovld __cnfn shuffle(long4, ulong4); +long4 __ovld __cnfn shuffle(long8, ulong4); +long4 __ovld __cnfn shuffle(long16, ulong4); + +ulong4 __ovld __cnfn shuffle(ulong2, ulong4); +ulong4 __ovld __cnfn shuffle(ulong4, ulong4); +ulong4 __ovld __cnfn shuffle(ulong8, ulong4); +ulong4 __ovld __cnfn shuffle(ulong16, ulong4); + +float4 __ovld __cnfn shuffle(float2, uint4); +float4 __ovld __cnfn shuffle(float4, uint4); +float4 __ovld __cnfn shuffle(float8, uint4); +float4 __ovld __cnfn shuffle(float16, uint4); + +char8 __ovld __cnfn shuffle(char2, uchar8); +char8 __ovld __cnfn shuffle(char4, uchar8); +char8 __ovld __cnfn shuffle(char8, uchar8); +char8 __ovld __cnfn shuffle(char16, uchar8); + +uchar8 __ovld __cnfn shuffle(uchar2, uchar8); +uchar8 __ovld __cnfn shuffle(uchar4, uchar8); +uchar8 __ovld __cnfn shuffle(uchar8, uchar8); +uchar8 __ovld __cnfn shuffle(uchar16, uchar8); + +short8 __ovld __cnfn shuffle(short2, ushort8); +short8 __ovld __cnfn shuffle(short4, ushort8); +short8 __ovld __cnfn shuffle(short8, ushort8); +short8 __ovld __cnfn shuffle(short16, ushort8); + +ushort8 __ovld __cnfn shuffle(ushort2, ushort8); +ushort8 __ovld __cnfn shuffle(ushort4, ushort8); +ushort8 __ovld __cnfn shuffle(ushort8, ushort8); +ushort8 __ovld __cnfn shuffle(ushort16, ushort8); + +int8 __ovld __cnfn shuffle(int2, uint8); +int8 __ovld __cnfn shuffle(int4, uint8); +int8 __ovld __cnfn shuffle(int8, uint8); +int8 __ovld __cnfn shuffle(int16, uint8); + +uint8 __ovld __cnfn shuffle(uint2, uint8); +uint8 __ovld __cnfn shuffle(uint4, uint8); +uint8 __ovld __cnfn shuffle(uint8, uint8); +uint8 __ovld __cnfn shuffle(uint16, uint8); + +long8 __ovld __cnfn shuffle(long2, ulong8); +long8 __ovld __cnfn shuffle(long4, ulong8); +long8 __ovld __cnfn shuffle(long8, ulong8); +long8 __ovld __cnfn shuffle(long16, ulong8); + +ulong8 __ovld __cnfn shuffle(ulong2, ulong8); +ulong8 __ovld __cnfn shuffle(ulong4, ulong8); +ulong8 __ovld __cnfn shuffle(ulong8, ulong8); +ulong8 __ovld __cnfn shuffle(ulong16, ulong8); + +float8 __ovld __cnfn shuffle(float2, uint8); +float8 __ovld __cnfn shuffle(float4, uint8); +float8 __ovld __cnfn shuffle(float8, uint8); +float8 __ovld __cnfn shuffle(float16, uint8); + +char16 __ovld __cnfn shuffle(char2, uchar16); +char16 __ovld __cnfn shuffle(char4, uchar16); +char16 __ovld __cnfn shuffle(char8, uchar16); +char16 __ovld __cnfn shuffle(char16, uchar16); + +uchar16 __ovld __cnfn shuffle(uchar2, uchar16); +uchar16 __ovld __cnfn shuffle(uchar4, uchar16); +uchar16 __ovld __cnfn shuffle(uchar8, uchar16); +uchar16 __ovld __cnfn shuffle(uchar16, uchar16); + +short16 __ovld __cnfn shuffle(short2, ushort16); +short16 __ovld __cnfn shuffle(short4, ushort16); +short16 __ovld __cnfn shuffle(short8, ushort16); +short16 __ovld __cnfn shuffle(short16, ushort16); + +ushort16 __ovld __cnfn shuffle(ushort2, ushort16); +ushort16 __ovld __cnfn shuffle(ushort4, ushort16); +ushort16 __ovld __cnfn shuffle(ushort8, ushort16); +ushort16 __ovld __cnfn shuffle(ushort16, ushort16); + +int16 __ovld __cnfn shuffle(int2, uint16); +int16 __ovld __cnfn shuffle(int4, uint16); +int16 __ovld __cnfn shuffle(int8, uint16); +int16 __ovld __cnfn shuffle(int16, uint16); + +uint16 __ovld __cnfn shuffle(uint2, uint16); +uint16 __ovld __cnfn shuffle(uint4, uint16); +uint16 __ovld __cnfn shuffle(uint8, uint16); +uint16 __ovld __cnfn shuffle(uint16, uint16); + +long16 __ovld __cnfn shuffle(long2, ulong16); +long16 __ovld __cnfn shuffle(long4, ulong16); +long16 __ovld __cnfn shuffle(long8, ulong16); +long16 __ovld __cnfn shuffle(long16, ulong16); + +ulong16 __ovld __cnfn shuffle(ulong2, ulong16); +ulong16 __ovld __cnfn shuffle(ulong4, ulong16); +ulong16 __ovld __cnfn shuffle(ulong8, ulong16); +ulong16 __ovld __cnfn shuffle(ulong16, ulong16); + +float16 __ovld __cnfn shuffle(float2, uint16); +float16 __ovld __cnfn shuffle(float4, uint16); +float16 __ovld __cnfn shuffle(float8, uint16); +float16 __ovld __cnfn shuffle(float16, uint16); + +#ifdef cl_khr_fp64 +double2 __ovld __cnfn shuffle(double2, ulong2); +double2 __ovld __cnfn shuffle(double4, ulong2); +double2 __ovld __cnfn shuffle(double8, ulong2); +double2 __ovld __cnfn shuffle(double16, ulong2); + +double4 __ovld __cnfn shuffle(double2, ulong4); +double4 __ovld __cnfn shuffle(double4, ulong4); +double4 __ovld __cnfn shuffle(double8, ulong4); +double4 __ovld __cnfn shuffle(double16, ulong4); + +double8 __ovld __cnfn shuffle(double2, ulong8); +double8 __ovld __cnfn shuffle(double4, ulong8); +double8 __ovld __cnfn shuffle(double8, ulong8); +double8 __ovld __cnfn shuffle(double16, ulong8); + +double16 __ovld __cnfn shuffle(double2, ulong16); +double16 __ovld __cnfn shuffle(double4, ulong16); +double16 __ovld __cnfn shuffle(double8, ulong16); +double16 __ovld __cnfn shuffle(double16, ulong16); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __cnfn shuffle(half2, ushort2); +half2 __ovld __cnfn shuffle(half4, ushort2); +half2 __ovld __cnfn shuffle(half8, ushort2); +half2 __ovld __cnfn shuffle(half16, ushort2); + +half4 __ovld __cnfn shuffle(half2, ushort4); +half4 __ovld __cnfn shuffle(half4, ushort4); +half4 __ovld __cnfn shuffle(half8, ushort4); +half4 __ovld __cnfn shuffle(half16, ushort4); + +half8 __ovld __cnfn shuffle(half2, ushort8); +half8 __ovld __cnfn shuffle(half4, ushort8); +half8 __ovld __cnfn shuffle(half8, ushort8); +half8 __ovld __cnfn shuffle(half16, ushort8); + +half16 __ovld __cnfn shuffle(half2, ushort16); +half16 __ovld __cnfn shuffle(half4, ushort16); +half16 __ovld __cnfn shuffle(half8, ushort16); +half16 __ovld __cnfn shuffle(half16, ushort16); +#endif //cl_khr_fp16 + +char2 __ovld __cnfn shuffle2(char2, char2, uchar2); +char2 __ovld __cnfn shuffle2(char4, char4, uchar2); +char2 __ovld __cnfn shuffle2(char8, char8, uchar2); +char2 __ovld __cnfn shuffle2(char16, char16, uchar2); + +uchar2 __ovld __cnfn shuffle2(uchar2, uchar2, uchar2); +uchar2 __ovld __cnfn shuffle2(uchar4, uchar4, uchar2); +uchar2 __ovld __cnfn shuffle2(uchar8, uchar8, uchar2); +uchar2 __ovld __cnfn shuffle2(uchar16, uchar16, uchar2); + +short2 __ovld __cnfn shuffle2(short2, short2, ushort2); +short2 __ovld __cnfn shuffle2(short4, short4, ushort2); +short2 __ovld __cnfn shuffle2(short8, short8, ushort2); +short2 __ovld __cnfn shuffle2(short16, short16, ushort2); + +ushort2 __ovld __cnfn shuffle2(ushort2, ushort2, ushort2); +ushort2 __ovld __cnfn shuffle2(ushort4, ushort4, ushort2); +ushort2 __ovld __cnfn shuffle2(ushort8, ushort8, ushort2); +ushort2 __ovld __cnfn shuffle2(ushort16, ushort16, ushort2); + +int2 __ovld __cnfn shuffle2(int2, int2, uint2); +int2 __ovld __cnfn shuffle2(int4, int4, uint2); +int2 __ovld __cnfn shuffle2(int8, int8, uint2); +int2 __ovld __cnfn shuffle2(int16, int16, uint2); + +uint2 __ovld __cnfn shuffle2(uint2, uint2, uint2); +uint2 __ovld __cnfn shuffle2(uint4, uint4, uint2); +uint2 __ovld __cnfn shuffle2(uint8, uint8, uint2); +uint2 __ovld __cnfn shuffle2(uint16, uint16, uint2); + +long2 __ovld __cnfn shuffle2(long2, long2, ulong2); +long2 __ovld __cnfn shuffle2(long4, long4, ulong2); +long2 __ovld __cnfn shuffle2(long8, long8, ulong2); +long2 __ovld __cnfn shuffle2(long16, long16, ulong2); + +ulong2 __ovld __cnfn shuffle2(ulong2, ulong2, ulong2); +ulong2 __ovld __cnfn shuffle2(ulong4, ulong4, ulong2); +ulong2 __ovld __cnfn shuffle2(ulong8, ulong8, ulong2); +ulong2 __ovld __cnfn shuffle2(ulong16, ulong16, ulong2); + +float2 __ovld __cnfn shuffle2(float2, float2, uint2); +float2 __ovld __cnfn shuffle2(float4, float4, uint2); +float2 __ovld __cnfn shuffle2(float8, float8, uint2); +float2 __ovld __cnfn shuffle2(float16, float16, uint2); + +char4 __ovld __cnfn shuffle2(char2, char2, uchar4); +char4 __ovld __cnfn shuffle2(char4, char4, uchar4); +char4 __ovld __cnfn shuffle2(char8, char8, uchar4); +char4 __ovld __cnfn shuffle2(char16, char16, uchar4); + +uchar4 __ovld __cnfn shuffle2(uchar2, uchar2, uchar4); +uchar4 __ovld __cnfn shuffle2(uchar4, uchar4, uchar4); +uchar4 __ovld __cnfn shuffle2(uchar8, uchar8, uchar4); +uchar4 __ovld __cnfn shuffle2(uchar16, uchar16, uchar4); + +short4 __ovld __cnfn shuffle2(short2, short2, ushort4); +short4 __ovld __cnfn shuffle2(short4, short4, ushort4); +short4 __ovld __cnfn shuffle2(short8, short8, ushort4); +short4 __ovld __cnfn shuffle2(short16, short16, ushort4); + +ushort4 __ovld __cnfn shuffle2(ushort2, ushort2, ushort4); +ushort4 __ovld __cnfn shuffle2(ushort4, ushort4, ushort4); +ushort4 __ovld __cnfn shuffle2(ushort8, ushort8, ushort4); +ushort4 __ovld __cnfn shuffle2(ushort16, ushort16, ushort4); + +int4 __ovld __cnfn shuffle2(int2, int2, uint4); +int4 __ovld __cnfn shuffle2(int4, int4, uint4); +int4 __ovld __cnfn shuffle2(int8, int8, uint4); +int4 __ovld __cnfn shuffle2(int16, int16, uint4); + +uint4 __ovld __cnfn shuffle2(uint2, uint2, uint4); +uint4 __ovld __cnfn shuffle2(uint4, uint4, uint4); +uint4 __ovld __cnfn shuffle2(uint8, uint8, uint4); +uint4 __ovld __cnfn shuffle2(uint16, uint16, uint4); + +long4 __ovld __cnfn shuffle2(long2, long2, ulong4); +long4 __ovld __cnfn shuffle2(long4, long4, ulong4); +long4 __ovld __cnfn shuffle2(long8, long8, ulong4); +long4 __ovld __cnfn shuffle2(long16, long16, ulong4); + +ulong4 __ovld __cnfn shuffle2(ulong2, ulong2, ulong4); +ulong4 __ovld __cnfn shuffle2(ulong4, ulong4, ulong4); +ulong4 __ovld __cnfn shuffle2(ulong8, ulong8, ulong4); +ulong4 __ovld __cnfn shuffle2(ulong16, ulong16, ulong4); + +float4 __ovld __cnfn shuffle2(float2, float2, uint4); +float4 __ovld __cnfn shuffle2(float4, float4, uint4); +float4 __ovld __cnfn shuffle2(float8, float8, uint4); +float4 __ovld __cnfn shuffle2(float16, float16, uint4); + +char8 __ovld __cnfn shuffle2(char2, char2, uchar8); +char8 __ovld __cnfn shuffle2(char4, char4, uchar8); +char8 __ovld __cnfn shuffle2(char8, char8, uchar8); +char8 __ovld __cnfn shuffle2(char16, char16, uchar8); + +uchar8 __ovld __cnfn shuffle2(uchar2, uchar2, uchar8); +uchar8 __ovld __cnfn shuffle2(uchar4, uchar4, uchar8); +uchar8 __ovld __cnfn shuffle2(uchar8, uchar8, uchar8); +uchar8 __ovld __cnfn shuffle2(uchar16, uchar16, uchar8); + +short8 __ovld __cnfn shuffle2(short2, short2, ushort8); +short8 __ovld __cnfn shuffle2(short4, short4, ushort8); +short8 __ovld __cnfn shuffle2(short8, short8, ushort8); +short8 __ovld __cnfn shuffle2(short16, short16, ushort8); + +ushort8 __ovld __cnfn shuffle2(ushort2, ushort2, ushort8); +ushort8 __ovld __cnfn shuffle2(ushort4, ushort4, ushort8); +ushort8 __ovld __cnfn shuffle2(ushort8, ushort8, ushort8); +ushort8 __ovld __cnfn shuffle2(ushort16, ushort16, ushort8); + +int8 __ovld __cnfn shuffle2(int2, int2, uint8); +int8 __ovld __cnfn shuffle2(int4, int4, uint8); +int8 __ovld __cnfn shuffle2(int8, int8, uint8); +int8 __ovld __cnfn shuffle2(int16, int16, uint8); + +uint8 __ovld __cnfn shuffle2(uint2, uint2, uint8); +uint8 __ovld __cnfn shuffle2(uint4, uint4, uint8); +uint8 __ovld __cnfn shuffle2(uint8, uint8, uint8); +uint8 __ovld __cnfn shuffle2(uint16, uint16, uint8); + +long8 __ovld __cnfn shuffle2(long2, long2, ulong8); +long8 __ovld __cnfn shuffle2(long4, long4, ulong8); +long8 __ovld __cnfn shuffle2(long8, long8, ulong8); +long8 __ovld __cnfn shuffle2(long16, long16, ulong8); + +ulong8 __ovld __cnfn shuffle2(ulong2, ulong2, ulong8); +ulong8 __ovld __cnfn shuffle2(ulong4, ulong4, ulong8); +ulong8 __ovld __cnfn shuffle2(ulong8, ulong8, ulong8); +ulong8 __ovld __cnfn shuffle2(ulong16, ulong16, ulong8); + +float8 __ovld __cnfn shuffle2(float2, float2, uint8); +float8 __ovld __cnfn shuffle2(float4, float4, uint8); +float8 __ovld __cnfn shuffle2(float8, float8, uint8); +float8 __ovld __cnfn shuffle2(float16, float16, uint8); + +char16 __ovld __cnfn shuffle2(char2, char2, uchar16); +char16 __ovld __cnfn shuffle2(char4, char4, uchar16); +char16 __ovld __cnfn shuffle2(char8, char8, uchar16); +char16 __ovld __cnfn shuffle2(char16, char16, uchar16); + +uchar16 __ovld __cnfn shuffle2(uchar2, uchar2, uchar16); +uchar16 __ovld __cnfn shuffle2(uchar4, uchar4, uchar16); +uchar16 __ovld __cnfn shuffle2(uchar8, uchar8, uchar16); +uchar16 __ovld __cnfn shuffle2(uchar16, uchar16, uchar16); + +short16 __ovld __cnfn shuffle2(short2, short2, ushort16); +short16 __ovld __cnfn shuffle2(short4, short4, ushort16); +short16 __ovld __cnfn shuffle2(short8, short8, ushort16); +short16 __ovld __cnfn shuffle2(short16, short16, ushort16); + +ushort16 __ovld __cnfn shuffle2(ushort2, ushort2, ushort16); +ushort16 __ovld __cnfn shuffle2(ushort4, ushort4, ushort16); +ushort16 __ovld __cnfn shuffle2(ushort8, ushort8, ushort16); +ushort16 __ovld __cnfn shuffle2(ushort16, ushort16, ushort16); + +int16 __ovld __cnfn shuffle2(int2, int2, uint16); +int16 __ovld __cnfn shuffle2(int4, int4, uint16); +int16 __ovld __cnfn shuffle2(int8, int8, uint16); +int16 __ovld __cnfn shuffle2(int16, int16, uint16); + +uint16 __ovld __cnfn shuffle2(uint2, uint2, uint16); +uint16 __ovld __cnfn shuffle2(uint4, uint4, uint16); +uint16 __ovld __cnfn shuffle2(uint8, uint8, uint16); +uint16 __ovld __cnfn shuffle2(uint16, uint16, uint16); + +long16 __ovld __cnfn shuffle2(long2, long2, ulong16); +long16 __ovld __cnfn shuffle2(long4, long4, ulong16); +long16 __ovld __cnfn shuffle2(long8, long8, ulong16); +long16 __ovld __cnfn shuffle2(long16, long16, ulong16); + +ulong16 __ovld __cnfn shuffle2(ulong2, ulong2, ulong16); +ulong16 __ovld __cnfn shuffle2(ulong4, ulong4, ulong16); +ulong16 __ovld __cnfn shuffle2(ulong8, ulong8, ulong16); +ulong16 __ovld __cnfn shuffle2(ulong16, ulong16, ulong16); + +float16 __ovld __cnfn shuffle2(float2, float2, uint16); +float16 __ovld __cnfn shuffle2(float4, float4, uint16); +float16 __ovld __cnfn shuffle2(float8, float8, uint16); +float16 __ovld __cnfn shuffle2(float16, float16, uint16); + +#ifdef cl_khr_fp64 +double2 __ovld __cnfn shuffle2(double2, double2, ulong2); +double2 __ovld __cnfn shuffle2(double4, double4, ulong2); +double2 __ovld __cnfn shuffle2(double8, double8, ulong2); +double2 __ovld __cnfn shuffle2(double16, double16, ulong2); + +double4 __ovld __cnfn shuffle2(double2, double2, ulong4); +double4 __ovld __cnfn shuffle2(double4, double4, ulong4); +double4 __ovld __cnfn shuffle2(double8, double8, ulong4); +double4 __ovld __cnfn shuffle2(double16, double16, ulong4); + +double8 __ovld __cnfn shuffle2(double2, double2, ulong8); +double8 __ovld __cnfn shuffle2(double4, double4, ulong8); +double8 __ovld __cnfn shuffle2(double8, double8, ulong8); +double8 __ovld __cnfn shuffle2(double16, double16, ulong8); + +double16 __ovld __cnfn shuffle2(double2, double2, ulong16); +double16 __ovld __cnfn shuffle2(double4, double4, ulong16); +double16 __ovld __cnfn shuffle2(double8, double8, ulong16); +double16 __ovld __cnfn shuffle2(double16, double16, ulong16); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __cnfn shuffle2(half2, half2, ushort2); +half2 __ovld __cnfn shuffle2(half4, half4, ushort2); +half2 __ovld __cnfn shuffle2(half8, half8, ushort2); +half2 __ovld __cnfn shuffle2(half16, half16, ushort2); + +half4 __ovld __cnfn shuffle2(half2, half2, ushort4); +half4 __ovld __cnfn shuffle2(half4, half4, ushort4); +half4 __ovld __cnfn shuffle2(half8, half8, ushort4); +half4 __ovld __cnfn shuffle2(half16, half16, ushort4); + +half8 __ovld __cnfn shuffle2(half2, half2, ushort8); +half8 __ovld __cnfn shuffle2(half4, half4, ushort8); +half8 __ovld __cnfn shuffle2(half8, half8, ushort8); +half8 __ovld __cnfn shuffle2(half16, half16, ushort8); + +half16 __ovld __cnfn shuffle2(half2, half2, ushort16); +half16 __ovld __cnfn shuffle2(half4, half4, ushort16); +half16 __ovld __cnfn shuffle2(half8, half8, ushort16); +half16 __ovld __cnfn shuffle2(half16, half16, ushort16); +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.11.3, v1.2 s6.12.14, v2.0 s6.13.14 - Image Read and Write Functions + +#ifdef cl_khr_gl_msaa_sharing +#pragma OPENCL EXTENSION cl_khr_gl_msaa_sharing : enable +#endif //cl_khr_gl_msaa_sharing + +/** + * Use the coordinate (coord.xy) to do an element lookup in + * the 2D image object specified by image. + * + * Use the coordinate (coord.x, coord.y, coord.z) to do + * an element lookup in the 3D image object specified + * by image. coord.w is ignored. + * + * Use the coordinate (coord.z) to index into the + * 2D image array object specified by image_array + * and (coord.x, coord.y) to do an element lookup in + * the 2D image object specified by image. + * + * Use the coordinate (x) to do an element lookup in + * the 1D image object specified by image. + * + * Use the coordinate (coord.y) to index into the + * 1D image array object specified by image_array + * and (coord.x) to do an element lookup in + * the 1D image object specified by image. + * + * Use the coordinate (cood.xy) and sample to do an + * element lookup in the 2D multi-sample image specified + * by image. + * + * Use coord.xy and sample to do an element + * lookup in the 2D multi-sample image layer + * identified by index coord.z in the 2D multi-sample + * image array specified by image. + * + * For mipmap images, use the mip-level specified by + * the Level-of-Detail (lod) or use gradients for LOD + * computation. + * + * read_imagef returns floating-point values in the + * range [0.0 ... 1.0] for image objects created with + * image_channel_data_type set to one of the predefined + * packed formats or CL_UNORM_INT8, or + * CL_UNORM_INT16. + * + * read_imagef returns floating-point values in the + * range [-1.0 ... 1.0] for image objects created with + * image_channel_data_type set to CL_SNORM_INT8, + * or CL_SNORM_INT16. + * + * read_imagef returns floating-point values for image + * objects created with image_channel_data_type set to + * CL_HALF_FLOAT or CL_FLOAT. + * + * read_imagei and read_imageui return + * unnormalized signed integer and unsigned integer + * values respectively. Each channel will be stored in a + * 32-bit integer. + * + * read_imagei can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_SIGNED_INT8, + * CL_SIGNED_INT16 and + * CL_SIGNED_INT32. + * If the image_channel_data_type is not one of the + * above values, the values returned by read_imagei + * are undefined. + * + * read_imageui can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_UNSIGNED_INT8, + * CL_UNSIGNED_INT16 and + * CL_UNSIGNED_INT32. + * If the image_channel_data_type is not one of the + * above values, the values returned by read_imageui + * are undefined. + * + * The read_image{i|ui} calls support a nearest filter + * only. The filter_mode specified in sampler + * must be set to CLK_FILTER_NEAREST; otherwise + * the values returned are undefined. + + * The read_image{f|i|ui} calls that take + * integer coordinates must use a sampler with + * normalized coordinates set to + * CLK_NORMALIZED_COORDS_FALSE and + * addressing mode set to + * CLK_ADDRESS_CLAMP_TO_EDGE, + * CLK_ADDRESS_CLAMP or CLK_ADDRESS_NONE; + * otherwise the values returned are undefined. + * + * Values returned by read_imagef for image objects + * with image_channel_data_type values not specified + * in the description above are undefined. + */ + +float4 __ovld __purefn read_imagef(read_only image2d_t, sampler_t, int2); +float4 __ovld __purefn read_imagef(read_only image2d_t, sampler_t, float2); + +int4 __ovld __purefn read_imagei(read_only image2d_t, sampler_t, int2); +int4 __ovld __purefn read_imagei(read_only image2d_t, sampler_t, float2); +uint4 __ovld __purefn read_imageui(read_only image2d_t, sampler_t, int2); +uint4 __ovld __purefn read_imageui(read_only image2d_t, sampler_t, float2); + +float4 __ovld __purefn read_imagef(read_only image3d_t, sampler_t, int4); +float4 __ovld __purefn read_imagef(read_only image3d_t, sampler_t, float4); + +int4 __ovld __purefn read_imagei(read_only image3d_t, sampler_t, int4); +int4 __ovld __purefn read_imagei(read_only image3d_t, sampler_t, float4); +uint4 __ovld __purefn read_imageui(read_only image3d_t, sampler_t, int4); +uint4 __ovld __purefn read_imageui(read_only image3d_t, sampler_t, float4); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +float4 __ovld __purefn read_imagef(read_only image2d_array_t, sampler_t, int4); +float4 __ovld __purefn read_imagef(read_only image2d_array_t, sampler_t, float4); + +int4 __ovld __purefn read_imagei(read_only image2d_array_t, sampler_t, int4); +int4 __ovld __purefn read_imagei(read_only image2d_array_t, sampler_t, float4); +uint4 __ovld __purefn read_imageui(read_only image2d_array_t, sampler_t, int4); +uint4 __ovld __purefn read_imageui(read_only image2d_array_t, sampler_t, float4); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +float4 __ovld __purefn read_imagef(read_only image1d_t, sampler_t, int); +float4 __ovld __purefn read_imagef(read_only image1d_t, sampler_t, float); + +int4 __ovld __purefn read_imagei(read_only image1d_t, sampler_t, int); +int4 __ovld __purefn read_imagei(read_only image1d_t, sampler_t, float); +uint4 __ovld __purefn read_imageui(read_only image1d_t, sampler_t, int); +uint4 __ovld __purefn read_imageui(read_only image1d_t, sampler_t, float); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +float4 __ovld __purefn read_imagef(read_only image1d_array_t, sampler_t, int2); +float4 __ovld __purefn read_imagef(read_only image1d_array_t, sampler_t, float2); + +int4 __ovld __purefn read_imagei(read_only image1d_array_t, sampler_t, int2); +int4 __ovld __purefn read_imagei(read_only image1d_array_t, sampler_t, float2); +uint4 __ovld __purefn read_imageui(read_only image1d_array_t, sampler_t, int2); +uint4 __ovld __purefn read_imageui(read_only image1d_array_t, sampler_t, float2); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_only image2d_depth_t, sampler_t, float2); +float __ovld __purefn read_imagef(read_only image2d_depth_t, sampler_t, int2); + +float __ovld __purefn read_imagef(read_only image2d_array_depth_t, sampler_t, float4); +float __ovld __purefn read_imagef(read_only image2d_array_depth_t, sampler_t, int4); +#endif //cl_khr_depth_images + +#if defined(cl_khr_gl_msaa_sharing) +float4 __ovld __purefn read_imagef(read_only image2d_msaa_t, int2, int); +int4 __ovld __purefn read_imagei(read_only image2d_msaa_t, int2, int); +uint4 __ovld __purefn read_imageui(read_only image2d_msaa_t, int2, int); + +float __ovld __purefn read_imagef(read_only image2d_msaa_depth_t, int2, int); + +float4 __ovld __purefn read_imagef(read_only image2d_array_msaa_t, int4, int); +int4 __ovld __purefn read_imagei(read_only image2d_array_msaa_t, int4, int); +uint4 __ovld __purefn read_imageui(read_only image2d_array_msaa_t, int4, int); + +float __ovld __purefn read_imagef(read_only image2d_array_msaa_depth_t, int4, int); +#endif //cl_khr_gl_msaa_sharing + +// OpenCL Extension v2.0 s9.18 - Mipmaps +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image + +float4 __ovld __purefn read_imagef(read_only image1d_t, sampler_t, float, float); +int4 __ovld __purefn read_imagei(read_only image1d_t, sampler_t, float, float); +uint4 __ovld __purefn read_imageui(read_only image1d_t, sampler_t, float, float); + +float4 __ovld __purefn read_imagef(read_only image1d_array_t, sampler_t, float2, float); +int4 __ovld __purefn read_imagei(read_only image1d_array_t, sampler_t, float2, float); +uint4 __ovld __purefn read_imageui(read_only image1d_array_t, sampler_t, float2, float); + +float4 __ovld __purefn read_imagef(read_only image2d_t, sampler_t, float2, float); +int4 __ovld __purefn read_imagei(read_only image2d_t, sampler_t, float2, float); +uint4 __ovld __purefn read_imageui(read_only image2d_t, sampler_t, float2, float); + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_only image2d_depth_t, sampler_t, float2, float); +#endif // cl_khr_depth_images + +float4 __ovld __purefn read_imagef(read_only image2d_array_t, sampler_t, float4, float); +int4 __ovld __purefn read_imagei(read_only image2d_array_t, sampler_t, float4, float); +uint4 __ovld __purefn read_imageui(read_only image2d_array_t, sampler_t, float4, float); + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_only image2d_array_depth_t, sampler_t, float4, float); +#endif // cl_khr_depth_images + +float4 __ovld __purefn read_imagef(read_only image3d_t, sampler_t, float4, float); +int4 __ovld __purefn read_imagei(read_only image3d_t, sampler_t, float4, float); +uint4 __ovld __purefn read_imageui(read_only image3d_t, sampler_t, float4, float); + +float4 __ovld __purefn read_imagef(read_only image1d_t, sampler_t, float, float, float); +int4 __ovld __purefn read_imagei(read_only image1d_t, sampler_t, float, float, float); +uint4 __ovld __purefn read_imageui(read_only image1d_t, sampler_t, float, float, float); + +float4 __ovld __purefn read_imagef(read_only image1d_array_t, sampler_t, float2, float, float); +int4 __ovld __purefn read_imagei(read_only image1d_array_t, sampler_t, float2, float, float); +uint4 __ovld __purefn read_imageui(read_only image1d_array_t, sampler_t, float2, float, float); + +float4 __ovld __purefn read_imagef(read_only image2d_t, sampler_t, float2, float2, float2); +int4 __ovld __purefn read_imagei(read_only image2d_t, sampler_t, float2, float2, float2); +uint4 __ovld __purefn read_imageui(read_only image2d_t, sampler_t, float2, float2, float2); + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_only image2d_depth_t, sampler_t, float2, float2, float2); +#endif // cl_khr_depth_images + +float4 __ovld __purefn read_imagef(read_only image2d_array_t, sampler_t, float4, float2, float2); +int4 __ovld __purefn read_imagei(read_only image2d_array_t, sampler_t, float4, float2, float2); +uint4 __ovld __purefn read_imageui(read_only image2d_array_t, sampler_t, float4, float2, float2); + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_only image2d_array_depth_t, sampler_t, float4, float2, float2); +#endif // cl_khr_depth_images + +float4 __ovld __purefn read_imagef(read_only image3d_t, sampler_t, float4, float4, float4); +int4 __ovld __purefn read_imagei(read_only image3d_t, sampler_t, float4, float4, float4); +uint4 __ovld __purefn read_imageui(read_only image3d_t, sampler_t, float4, float4, float4); + +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +/** +* Sampler-less Image Access +*/ + +float4 __ovld __purefn read_imagef(read_only image1d_t, int); +int4 __ovld __purefn read_imagei(read_only image1d_t, int); +uint4 __ovld __purefn read_imageui(read_only image1d_t, int); + +float4 __ovld __purefn read_imagef(read_only image1d_buffer_t, int); +int4 __ovld __purefn read_imagei(read_only image1d_buffer_t, int); +uint4 __ovld __purefn read_imageui(read_only image1d_buffer_t, int); + +float4 __ovld __purefn read_imagef(read_only image1d_array_t, int2); +int4 __ovld __purefn read_imagei(read_only image1d_array_t, int2); +uint4 __ovld __purefn read_imageui(read_only image1d_array_t, int2); + +float4 __ovld __purefn read_imagef(read_only image2d_t, int2); +int4 __ovld __purefn read_imagei(read_only image2d_t, int2); +uint4 __ovld __purefn read_imageui(read_only image2d_t, int2); + +float4 __ovld __purefn read_imagef(read_only image2d_array_t, int4); +int4 __ovld __purefn read_imagei(read_only image2d_array_t, int4); +uint4 __ovld __purefn read_imageui(read_only image2d_array_t, int4); + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_only image2d_depth_t, int2); +float __ovld __purefn read_imagef(read_only image2d_array_depth_t, int4); +#endif //cl_khr_depth_images + +float4 __ovld __purefn read_imagef(read_only image3d_t, int4); +int4 __ovld __purefn read_imagei(read_only image3d_t, int4); +uint4 __ovld __purefn read_imageui(read_only image3d_t, int4); + +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +// Image read functions returning half4 type +#ifdef cl_khr_fp16 +half4 __ovld __purefn read_imageh(read_only image1d_t, sampler_t, int); +half4 __ovld __purefn read_imageh(read_only image1d_t, sampler_t, float); +half4 __ovld __purefn read_imageh(read_only image2d_t, sampler_t, int2); +half4 __ovld __purefn read_imageh(read_only image2d_t, sampler_t, float2); +half4 __ovld __purefn read_imageh(read_only image3d_t, sampler_t, int4); +half4 __ovld __purefn read_imageh(read_only image3d_t, sampler_t, float4); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +half4 __ovld __purefn read_imageh(read_only image1d_array_t, sampler_t, int2); +half4 __ovld __purefn read_imageh(read_only image1d_array_t, sampler_t, float2); +half4 __ovld __purefn read_imageh(read_only image2d_array_t, sampler_t, int4); +half4 __ovld __purefn read_imageh(read_only image2d_array_t, sampler_t, float4); +/** + * Sampler-less Image Access + */ +half4 __ovld __purefn read_imageh(read_only image1d_t, int); +half4 __ovld __purefn read_imageh(read_only image2d_t, int2); +half4 __ovld __purefn read_imageh(read_only image3d_t, int4); +half4 __ovld __purefn read_imageh(read_only image1d_array_t, int2); +half4 __ovld __purefn read_imageh(read_only image2d_array_t, int4); +half4 __ovld __purefn read_imageh(read_only image1d_buffer_t, int); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +#endif //cl_khr_fp16 + +// Image read functions for read_write images +#if defined(__opencl_c_read_write_images) +float4 __ovld __purefn read_imagef(read_write image1d_t, int); +int4 __ovld __purefn read_imagei(read_write image1d_t, int); +uint4 __ovld __purefn read_imageui(read_write image1d_t, int); + +float4 __ovld __purefn read_imagef(read_write image1d_buffer_t, int); +int4 __ovld __purefn read_imagei(read_write image1d_buffer_t, int); +uint4 __ovld __purefn read_imageui(read_write image1d_buffer_t, int); + +float4 __ovld __purefn read_imagef(read_write image1d_array_t, int2); +int4 __ovld __purefn read_imagei(read_write image1d_array_t, int2); +uint4 __ovld __purefn read_imageui(read_write image1d_array_t, int2); + +float4 __ovld __purefn read_imagef(read_write image2d_t, int2); +int4 __ovld __purefn read_imagei(read_write image2d_t, int2); +uint4 __ovld __purefn read_imageui(read_write image2d_t, int2); + +float4 __ovld __purefn read_imagef(read_write image2d_array_t, int4); +int4 __ovld __purefn read_imagei(read_write image2d_array_t, int4); +uint4 __ovld __purefn read_imageui(read_write image2d_array_t, int4); + +#ifdef cl_khr_3d_image_writes +float4 __ovld __purefn read_imagef(read_write image3d_t, int4); +int4 __ovld __purefn read_imagei(read_write image3d_t, int4); +uint4 __ovld __purefn read_imageui(read_write image3d_t, int4); +#endif // cl_khr_3d_image_writes + +#ifdef cl_khr_depth_images +float __ovld __purefn read_imagef(read_write image2d_depth_t, int2); +float __ovld __purefn read_imagef(read_write image2d_array_depth_t, int4); +#endif //cl_khr_depth_images + +#if cl_khr_gl_msaa_sharing +float4 __ovld __purefn read_imagef(read_write image2d_msaa_t, int2, int); +int4 __ovld __purefn read_imagei(read_write image2d_msaa_t, int2, int); +uint4 __ovld __purefn read_imageui(read_write image2d_msaa_t, int2, int); + +float4 __ovld __purefn read_imagef(read_write image2d_array_msaa_t, int4, int); +int4 __ovld __purefn read_imagei(read_write image2d_array_msaa_t, int4, int); +uint4 __ovld __purefn read_imageui(read_write image2d_array_msaa_t, int4, int); + +float __ovld __purefn read_imagef(read_write image2d_msaa_depth_t, int2, int); +float __ovld __purefn read_imagef(read_write image2d_array_msaa_depth_t, int4, int); +#endif //cl_khr_gl_msaa_sharing + +#ifdef cl_khr_mipmap_image +float4 __ovld __purefn read_imagef(read_write image1d_t, sampler_t, float, float); +int4 __ovld __purefn read_imagei(read_write image1d_t, sampler_t, float, float); +uint4 __ovld __purefn read_imageui(read_write image1d_t, sampler_t, float, float); + +float4 __ovld __purefn read_imagef(read_write image1d_array_t, sampler_t, float2, float); +int4 __ovld __purefn read_imagei(read_write image1d_array_t, sampler_t, float2, float); +uint4 __ovld __purefn read_imageui(read_write image1d_array_t, sampler_t, float2, float); + +float4 __ovld __purefn read_imagef(read_write image2d_t, sampler_t, float2, float); +int4 __ovld __purefn read_imagei(read_write image2d_t, sampler_t, float2, float); +uint4 __ovld __purefn read_imageui(read_write image2d_t, sampler_t, float2, float); + +float __ovld __purefn read_imagef(read_write image2d_depth_t, sampler_t, float2, float); + +float4 __ovld __purefn read_imagef(read_write image2d_array_t, sampler_t, float4, float); +int4 __ovld __purefn read_imagei(read_write image2d_array_t, sampler_t, float4, float); +uint4 __ovld __purefn read_imageui(read_write image2d_array_t, sampler_t, float4, float); + +float __ovld __purefn read_imagef(read_write image2d_array_depth_t, sampler_t, float4, float); + +#ifdef cl_khr_3d_image_writes +float4 __ovld __purefn read_imagef(read_write image3d_t, sampler_t, float4, float); +int4 __ovld __purefn read_imagei(read_write image3d_t, sampler_t, float4, float); +uint4 __ovld __purefn read_imageui(read_write image3d_t, sampler_t, float4, float); +#endif // cl_khr_3d_image_writes + +float4 __ovld __purefn read_imagef(read_write image1d_t, sampler_t, float, float, float); +int4 __ovld __purefn read_imagei(read_write image1d_t, sampler_t, float, float, float); +uint4 __ovld __purefn read_imageui(read_write image1d_t, sampler_t, float, float, float); + +float4 __ovld __purefn read_imagef(read_write image1d_array_t, sampler_t, float2, float, float); +int4 __ovld __purefn read_imagei(read_write image1d_array_t, sampler_t, float2, float, float); +uint4 __ovld __purefn read_imageui(read_write image1d_array_t, sampler_t, float2, float, float); + +float4 __ovld __purefn read_imagef(read_write image2d_t, sampler_t, float2, float2, float2); +int4 __ovld __purefn read_imagei(read_write image2d_t, sampler_t, float2, float2, float2); +uint4 __ovld __purefn read_imageui(read_write image2d_t, sampler_t, float2, float2, float2); + +float __ovld __purefn read_imagef(read_write image2d_depth_t, sampler_t, float2, float2, float2); + +float4 __ovld __purefn read_imagef(read_write image2d_array_t, sampler_t, float4, float2, float2); +int4 __ovld __purefn read_imagei(read_write image2d_array_t, sampler_t, float4, float2, float2); +uint4 __ovld __purefn read_imageui(read_write image2d_array_t, sampler_t, float4, float2, float2); + +float __ovld __purefn read_imagef(read_write image2d_array_depth_t, sampler_t, float4, float2, float2); + +#ifdef cl_khr_3d_image_writes +float4 __ovld __purefn read_imagef(read_write image3d_t, sampler_t, float4, float4, float4); +int4 __ovld __purefn read_imagei(read_write image3d_t, sampler_t, float4, float4, float4); +uint4 __ovld __purefn read_imageui(read_write image3d_t, sampler_t, float4, float4, float4); +#endif // cl_khr_3d_image_writes + +#endif //cl_khr_mipmap_image + +// Image read functions returning half4 type +#ifdef cl_khr_fp16 +half4 __ovld __purefn read_imageh(read_write image1d_t, int); +half4 __ovld __purefn read_imageh(read_write image2d_t, int2); +#ifdef cl_khr_3d_image_writes +half4 __ovld __purefn read_imageh(read_write image3d_t, int4); +#endif // cl_khr_3d_image_writes +half4 __ovld __purefn read_imageh(read_write image1d_array_t, int2); +half4 __ovld __purefn read_imageh(read_write image2d_array_t, int4); +half4 __ovld __purefn read_imageh(read_write image1d_buffer_t, int); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_read_write_images) + +/** + * Write color value to location specified by coordinate + * (coord.x, coord.y) in the 2D image object specified by image. + * (coord.x, coord.y) are considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1, and 0 + * ... image height - 1. + + * Write color value to location specified by coordinate + * (coord.x, coord.y) in the 2D image object specified by index + * (coord.z) of the 2D image array object image_array. + * (coord.x, coord.y) are considered to be unnormalized + * coordinates and must be in the range 0 ... image width + * - 1. + * + * Write color value to location specified by coordinate + * (coord) in the 1D image (buffer) object specified by image. + * coord is considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1. + * + * Write color value to location specified by coordinate + * (coord.x) in the 1D image object specified by index + * (coord.y) of the 1D image array object image_array. + * x is considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1. + * + * Write color value to location specified by coordinate + * (coord.x, coord.y, coord.z) in the 3D image object specified by image. + * coord.x & coord.y are considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1, and 0 + * ... image height - 1. + * + * For mipmap images, use mip-level specified by lod. + * + * Appropriate data format conversion to the specified + * image format is done before writing the color value. + * + * write_imagef can only be used with image objects + * created with image_channel_data_type set to one of + * the pre-defined packed formats or set to + * CL_SNORM_INT8, CL_UNORM_INT8, + * CL_SNORM_INT16, CL_UNORM_INT16, + * CL_HALF_FLOAT or CL_FLOAT. Appropriate data + * format conversion will be done to convert channel + * data from a floating-point value to actual data format + * in which the channels are stored. + * + * write_imagei can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_SIGNED_INT8, + * CL_SIGNED_INT16 and + * CL_SIGNED_INT32. + * + * write_imageui can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_UNSIGNED_INT8, + * CL_UNSIGNED_INT16 and + * CL_UNSIGNED_INT32. + * + * The behavior of write_imagef, write_imagei and + * write_imageui for image objects created with + * image_channel_data_type values not specified in + * the description above or with (x, y) coordinate + * values that are not in the range (0 ... image width -1, + * 0 ... image height - 1), respectively, is undefined. + */ +void __ovld write_imagef(write_only image2d_t, int2, float4); +void __ovld write_imagei(write_only image2d_t, int2, int4); +void __ovld write_imageui(write_only image2d_t, int2, uint4); + +void __ovld write_imagef(write_only image2d_array_t, int4, float4); +void __ovld write_imagei(write_only image2d_array_t, int4, int4); +void __ovld write_imageui(write_only image2d_array_t, int4, uint4); + +void __ovld write_imagef(write_only image1d_t, int, float4); +void __ovld write_imagei(write_only image1d_t, int, int4); +void __ovld write_imageui(write_only image1d_t, int, uint4); + +void __ovld write_imagef(write_only image1d_buffer_t, int, float4); +void __ovld write_imagei(write_only image1d_buffer_t, int, int4); +void __ovld write_imageui(write_only image1d_buffer_t, int, uint4); + +void __ovld write_imagef(write_only image1d_array_t, int2, float4); +void __ovld write_imagei(write_only image1d_array_t, int2, int4); +void __ovld write_imageui(write_only image1d_array_t, int2, uint4); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(write_only image3d_t, int4, float4); +void __ovld write_imagei(write_only image3d_t, int4, int4); +void __ovld write_imageui(write_only image3d_t, int4, uint4); +#endif + +#ifdef cl_khr_depth_images +void __ovld write_imagef(write_only image2d_depth_t, int2, float); +void __ovld write_imagef(write_only image2d_array_depth_t, int4, float); +#endif //cl_khr_depth_images + +// OpenCL Extension v2.0 s9.18 - Mipmaps +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#if defined(cl_khr_mipmap_image_writes) +void __ovld write_imagef(write_only image1d_t, int, int, float4); +void __ovld write_imagei(write_only image1d_t, int, int, int4); +void __ovld write_imageui(write_only image1d_t, int, int, uint4); + +void __ovld write_imagef(write_only image1d_array_t, int2, int, float4); +void __ovld write_imagei(write_only image1d_array_t, int2, int, int4); +void __ovld write_imageui(write_only image1d_array_t, int2, int, uint4); + +void __ovld write_imagef(write_only image2d_t, int2, int, float4); +void __ovld write_imagei(write_only image2d_t, int2, int, int4); +void __ovld write_imageui(write_only image2d_t, int2, int, uint4); + +void __ovld write_imagef(write_only image2d_array_t, int4, int, float4); +void __ovld write_imagei(write_only image2d_array_t, int4, int, int4); +void __ovld write_imageui(write_only image2d_array_t, int4, int, uint4); + +void __ovld write_imagef(write_only image2d_depth_t, int2, int, float); +void __ovld write_imagef(write_only image2d_array_depth_t, int4, int, float); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(write_only image3d_t, int4, int, float4); +void __ovld write_imagei(write_only image3d_t, int4, int, int4); +void __ovld write_imageui(write_only image3d_t, int4, int, uint4); +#endif //cl_khr_3d_image_writes + +#endif //defined(cl_khr_mipmap_image_writes) +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// Image write functions for half4 type +#ifdef cl_khr_fp16 +void __ovld write_imageh(write_only image1d_t, int, half4); +void __ovld write_imageh(write_only image2d_t, int2, half4); +#ifdef cl_khr_3d_image_writes +void __ovld write_imageh(write_only image3d_t, int4, half4); +#endif +void __ovld write_imageh(write_only image1d_array_t, int2, half4); +void __ovld write_imageh(write_only image2d_array_t, int4, half4); +void __ovld write_imageh(write_only image1d_buffer_t, int, half4); +#endif //cl_khr_fp16 + +// Image write functions for read_write images +#if defined(__opencl_c_read_write_images) +void __ovld write_imagef(read_write image2d_t, int2, float4); +void __ovld write_imagei(read_write image2d_t, int2, int4); +void __ovld write_imageui(read_write image2d_t, int2, uint4); + +void __ovld write_imagef(read_write image2d_array_t, int4, float4); +void __ovld write_imagei(read_write image2d_array_t, int4, int4); +void __ovld write_imageui(read_write image2d_array_t, int4, uint4); + +void __ovld write_imagef(read_write image1d_t, int, float4); +void __ovld write_imagei(read_write image1d_t, int, int4); +void __ovld write_imageui(read_write image1d_t, int, uint4); + +void __ovld write_imagef(read_write image1d_buffer_t, int, float4); +void __ovld write_imagei(read_write image1d_buffer_t, int, int4); +void __ovld write_imageui(read_write image1d_buffer_t, int, uint4); + +void __ovld write_imagef(read_write image1d_array_t, int2, float4); +void __ovld write_imagei(read_write image1d_array_t, int2, int4); +void __ovld write_imageui(read_write image1d_array_t, int2, uint4); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(read_write image3d_t, int4, float4); +void __ovld write_imagei(read_write image3d_t, int4, int4); +void __ovld write_imageui(read_write image3d_t, int4, uint4); +#endif + +#ifdef cl_khr_depth_images +void __ovld write_imagef(read_write image2d_depth_t, int2, float); +void __ovld write_imagef(read_write image2d_array_depth_t, int4, float); +#endif //cl_khr_depth_images + +#if defined(cl_khr_mipmap_image_writes) +void __ovld write_imagef(read_write image1d_t, int, int, float4); +void __ovld write_imagei(read_write image1d_t, int, int, int4); +void __ovld write_imageui(read_write image1d_t, int, int, uint4); + +void __ovld write_imagef(read_write image1d_array_t, int2, int, float4); +void __ovld write_imagei(read_write image1d_array_t, int2, int, int4); +void __ovld write_imageui(read_write image1d_array_t, int2, int, uint4); + +void __ovld write_imagef(read_write image2d_t, int2, int, float4); +void __ovld write_imagei(read_write image2d_t, int2, int, int4); +void __ovld write_imageui(read_write image2d_t, int2, int, uint4); + +void __ovld write_imagef(read_write image2d_array_t, int4, int, float4); +void __ovld write_imagei(read_write image2d_array_t, int4, int, int4); +void __ovld write_imageui(read_write image2d_array_t, int4, int, uint4); + +void __ovld write_imagef(read_write image2d_depth_t, int2, int, float); +void __ovld write_imagef(read_write image2d_array_depth_t, int4, int, float); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(read_write image3d_t, int4, int, float4); +void __ovld write_imagei(read_write image3d_t, int4, int, int4); +void __ovld write_imageui(read_write image3d_t, int4, int, uint4); +#endif //cl_khr_3d_image_writes + +#endif //cl_khr_mipmap_image_writes + +// Image write functions for half4 type +#ifdef cl_khr_fp16 +void __ovld write_imageh(read_write image1d_t, int, half4); +void __ovld write_imageh(read_write image2d_t, int2, half4); +#ifdef cl_khr_3d_image_writes +void __ovld write_imageh(read_write image3d_t, int4, half4); +#endif +void __ovld write_imageh(read_write image1d_array_t, int2, half4); +void __ovld write_imageh(read_write image2d_array_t, int4, half4); +void __ovld write_imageh(read_write image1d_buffer_t, int, half4); +#endif //cl_khr_fp16 +#endif //defined(__opencl_c_read_write_images) + +// Note: In OpenCL v1.0/1.1/1.2, image argument of image query builtin functions does not have +// access qualifier, which by default assume read_only access qualifier. Image query builtin +// functions with write_only image argument should also be declared. + +/** + * Return the image width in pixels. + * + */ +int __ovld __cnfn get_image_width(read_only image1d_t); +int __ovld __cnfn get_image_width(read_only image1d_buffer_t); +int __ovld __cnfn get_image_width(read_only image2d_t); +int __ovld __cnfn get_image_width(read_only image3d_t); +int __ovld __cnfn get_image_width(read_only image1d_array_t); +int __ovld __cnfn get_image_width(read_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_width(read_only image2d_depth_t); +int __ovld __cnfn get_image_width(read_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_width(read_only image2d_msaa_t); +int __ovld __cnfn get_image_width(read_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_width(read_only image2d_array_msaa_t); +int __ovld __cnfn get_image_width(read_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_width(write_only image1d_t); +int __ovld __cnfn get_image_width(write_only image1d_buffer_t); +int __ovld __cnfn get_image_width(write_only image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_width(write_only image3d_t); +#endif +int __ovld __cnfn get_image_width(write_only image1d_array_t); +int __ovld __cnfn get_image_width(write_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_width(write_only image2d_depth_t); +int __ovld __cnfn get_image_width(write_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_width(write_only image2d_msaa_t); +int __ovld __cnfn get_image_width(write_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_width(write_only image2d_array_msaa_t); +int __ovld __cnfn get_image_width(write_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__opencl_c_read_write_images) +int __ovld __cnfn get_image_width(read_write image1d_t); +int __ovld __cnfn get_image_width(read_write image1d_buffer_t); +int __ovld __cnfn get_image_width(read_write image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_width(read_write image3d_t); +#endif // cl_khr_3d_image_writes +int __ovld __cnfn get_image_width(read_write image1d_array_t); +int __ovld __cnfn get_image_width(read_write image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_width(read_write image2d_depth_t); +int __ovld __cnfn get_image_width(read_write image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_width(read_write image2d_msaa_t); +int __ovld __cnfn get_image_width(read_write image2d_msaa_depth_t); +int __ovld __cnfn get_image_width(read_write image2d_array_msaa_t); +int __ovld __cnfn get_image_width(read_write image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__opencl_c_read_write_images) + +/** + * Return the image height in pixels. + */ +int __ovld __cnfn get_image_height(read_only image2d_t); +int __ovld __cnfn get_image_height(read_only image3d_t); +int __ovld __cnfn get_image_height(read_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_height(read_only image2d_depth_t); +int __ovld __cnfn get_image_height(read_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_height(read_only image2d_msaa_t); +int __ovld __cnfn get_image_height(read_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_height(read_only image2d_array_msaa_t); +int __ovld __cnfn get_image_height(read_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_height(write_only image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_height(write_only image3d_t); +#endif +int __ovld __cnfn get_image_height(write_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_height(write_only image2d_depth_t); +int __ovld __cnfn get_image_height(write_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_height(write_only image2d_msaa_t); +int __ovld __cnfn get_image_height(write_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_height(write_only image2d_array_msaa_t); +int __ovld __cnfn get_image_height(write_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__opencl_c_read_write_images) +int __ovld __cnfn get_image_height(read_write image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_height(read_write image3d_t); +#endif // cl_khr_3d_image_writes +int __ovld __cnfn get_image_height(read_write image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_height(read_write image2d_depth_t); +int __ovld __cnfn get_image_height(read_write image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_height(read_write image2d_msaa_t); +int __ovld __cnfn get_image_height(read_write image2d_msaa_depth_t); +int __ovld __cnfn get_image_height(read_write image2d_array_msaa_t); +int __ovld __cnfn get_image_height(read_write image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__opencl_c_read_write_images) + +/** + * Return the image depth in pixels. + */ +int __ovld __cnfn get_image_depth(read_only image3d_t); + +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_depth(write_only image3d_t); + +#if defined(__opencl_c_read_write_images) +int __ovld __cnfn get_image_depth(read_write image3d_t); +#endif //defined(__opencl_c_read_write_images) +#endif // cl_khr_3d_image_writes + +// OpenCL Extension v2.0 s9.18 - Mipmaps +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image +/** + * Return the image miplevels. + */ + +int __ovld get_image_num_mip_levels(read_only image1d_t); +int __ovld get_image_num_mip_levels(read_only image2d_t); +int __ovld get_image_num_mip_levels(read_only image3d_t); + +int __ovld get_image_num_mip_levels(write_only image1d_t); +int __ovld get_image_num_mip_levels(write_only image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld get_image_num_mip_levels(write_only image3d_t); +#endif + +#if defined(__opencl_c_read_write_images) +int __ovld get_image_num_mip_levels(read_write image1d_t); +int __ovld get_image_num_mip_levels(read_write image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld get_image_num_mip_levels(read_write image3d_t); +#endif // cl_khr_3d_image_writes +#endif //defined(__opencl_c_read_write_images) + +int __ovld get_image_num_mip_levels(read_only image1d_array_t); +int __ovld get_image_num_mip_levels(read_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld get_image_num_mip_levels(read_only image2d_array_depth_t); +int __ovld get_image_num_mip_levels(read_only image2d_depth_t); +#endif // cl_khr_depth_images + +int __ovld get_image_num_mip_levels(write_only image1d_array_t); +int __ovld get_image_num_mip_levels(write_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld get_image_num_mip_levels(write_only image2d_array_depth_t); +int __ovld get_image_num_mip_levels(write_only image2d_depth_t); +#endif // cl_khr_depth_images + +#if defined(__opencl_c_read_write_images) +int __ovld get_image_num_mip_levels(read_write image1d_array_t); +int __ovld get_image_num_mip_levels(read_write image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld get_image_num_mip_levels(read_write image2d_array_depth_t); +int __ovld get_image_num_mip_levels(read_write image2d_depth_t); +#endif // cl_khr_depth_images +#endif //defined(__opencl_c_read_write_images) + +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the channel data type. Valid values are: + * CLK_SNORM_INT8 + * CLK_SNORM_INT16 + * CLK_UNORM_INT8 + * CLK_UNORM_INT16 + * CLK_UNORM_SHORT_565 + * CLK_UNORM_SHORT_555 + * CLK_UNORM_SHORT_101010 + * CLK_SIGNED_INT8 + * CLK_SIGNED_INT16 + * CLK_SIGNED_INT32 + * CLK_UNSIGNED_INT8 + * CLK_UNSIGNED_INT16 + * CLK_UNSIGNED_INT32 + * CLK_HALF_FLOAT + * CLK_FLOAT + */ + +int __ovld __cnfn get_image_channel_data_type(read_only image1d_t); +int __ovld __cnfn get_image_channel_data_type(read_only image1d_buffer_t); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_t); +int __ovld __cnfn get_image_channel_data_type(read_only image3d_t); +int __ovld __cnfn get_image_channel_data_type(read_only image1d_array_t); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_data_type(read_only image2d_depth_t); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_data_type(read_only image2d_msaa_t); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_msaa_t); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_channel_data_type(write_only image1d_t); +int __ovld __cnfn get_image_channel_data_type(write_only image1d_buffer_t); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_data_type(write_only image3d_t); +#endif +int __ovld __cnfn get_image_channel_data_type(write_only image1d_array_t); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_data_type(write_only image2d_depth_t); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_data_type(write_only image2d_msaa_t); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_msaa_t); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__opencl_c_read_write_images) +int __ovld __cnfn get_image_channel_data_type(read_write image1d_t); +int __ovld __cnfn get_image_channel_data_type(read_write image1d_buffer_t); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_data_type(read_write image3d_t); +#endif // cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_data_type(read_write image1d_array_t); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_data_type(read_write image2d_depth_t); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_data_type(read_write image2d_msaa_t); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_msaa_depth_t); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_msaa_t); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__opencl_c_read_write_images) + +/** + * Return the image channel order. Valid values are: + * CLK_A + * CLK_R + * CLK_Rx + * CLK_RG + * CLK_RGx + * CLK_RA + * CLK_RGB + * CLK_RGBx + * CLK_RGBA + * CLK_ARGB + * CLK_BGRA + * CLK_INTENSITY + * CLK_LUMINANCE + */ + +int __ovld __cnfn get_image_channel_order(read_only image1d_t); +int __ovld __cnfn get_image_channel_order(read_only image1d_buffer_t); +int __ovld __cnfn get_image_channel_order(read_only image2d_t); +int __ovld __cnfn get_image_channel_order(read_only image3d_t); +int __ovld __cnfn get_image_channel_order(read_only image1d_array_t); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_order(read_only image2d_depth_t); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_order(read_only image2d_msaa_t); +int __ovld __cnfn get_image_channel_order(read_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_msaa_t); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_channel_order(write_only image1d_t); +int __ovld __cnfn get_image_channel_order(write_only image1d_buffer_t); +int __ovld __cnfn get_image_channel_order(write_only image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_order(write_only image3d_t); +#endif +int __ovld __cnfn get_image_channel_order(write_only image1d_array_t); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_order(write_only image2d_depth_t); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_order(write_only image2d_msaa_t); +int __ovld __cnfn get_image_channel_order(write_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_msaa_t); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__opencl_c_read_write_images) +int __ovld __cnfn get_image_channel_order(read_write image1d_t); +int __ovld __cnfn get_image_channel_order(read_write image1d_buffer_t); +int __ovld __cnfn get_image_channel_order(read_write image2d_t); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_order(read_write image3d_t); +#endif // cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_order(read_write image1d_array_t); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_t); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_order(read_write image2d_depth_t); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_order(read_write image2d_msaa_t); +int __ovld __cnfn get_image_channel_order(read_write image2d_msaa_depth_t); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_msaa_t); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__opencl_c_read_write_images) + +/** + * Return the 2D image width and height as an int2 + * type. The width is returned in the x component, and + * the height in the y component. + */ +int2 __ovld __cnfn get_image_dim(read_only image2d_t); +int2 __ovld __cnfn get_image_dim(read_only image2d_array_t); +#ifdef cl_khr_depth_images +int2 __ovld __cnfn get_image_dim(read_only image2d_array_depth_t); +int2 __ovld __cnfn get_image_dim(read_only image2d_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int2 __ovld __cnfn get_image_dim(read_only image2d_msaa_t); +int2 __ovld __cnfn get_image_dim(read_only image2d_msaa_depth_t); +int2 __ovld __cnfn get_image_dim(read_only image2d_array_msaa_t); +int2 __ovld __cnfn get_image_dim(read_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +int2 __ovld __cnfn get_image_dim(write_only image2d_t); +int2 __ovld __cnfn get_image_dim(write_only image2d_array_t); +#ifdef cl_khr_depth_images +int2 __ovld __cnfn get_image_dim(write_only image2d_array_depth_t); +int2 __ovld __cnfn get_image_dim(write_only image2d_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int2 __ovld __cnfn get_image_dim(write_only image2d_msaa_t); +int2 __ovld __cnfn get_image_dim(write_only image2d_msaa_depth_t); +int2 __ovld __cnfn get_image_dim(write_only image2d_array_msaa_t); +int2 __ovld __cnfn get_image_dim(write_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__opencl_c_read_write_images) +int2 __ovld __cnfn get_image_dim(read_write image2d_t); +int2 __ovld __cnfn get_image_dim(read_write image2d_array_t); +#ifdef cl_khr_depth_images +int2 __ovld __cnfn get_image_dim(read_write image2d_array_depth_t); +int2 __ovld __cnfn get_image_dim(read_write image2d_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int2 __ovld __cnfn get_image_dim(read_write image2d_msaa_t); +int2 __ovld __cnfn get_image_dim(read_write image2d_msaa_depth_t); +int2 __ovld __cnfn get_image_dim(read_write image2d_array_msaa_t); +int2 __ovld __cnfn get_image_dim(read_write image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__opencl_c_read_write_images) + +/** + * Return the 3D image width, height, and depth as an + * int4 type. The width is returned in the x + * component, height in the y component, depth in the z + * component and the w component is 0. + */ +int4 __ovld __cnfn get_image_dim(read_only image3d_t); +#ifdef cl_khr_3d_image_writes +int4 __ovld __cnfn get_image_dim(write_only image3d_t); +#if defined(__opencl_c_read_write_images) +int4 __ovld __cnfn get_image_dim(read_write image3d_t); +#endif //defined(__opencl_c_read_write_images) +#endif // cl_khr_3d_image_writes + +/** + * Return the image array size. + */ + +size_t __ovld __cnfn get_image_array_size(read_only image1d_array_t); +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_t); +#ifdef cl_khr_depth_images +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_msaa_t); +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +size_t __ovld __cnfn get_image_array_size(write_only image1d_array_t); +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_t); +#ifdef cl_khr_depth_images +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_msaa_t); +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__opencl_c_read_write_images) +size_t __ovld __cnfn get_image_array_size(read_write image1d_array_t); +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_t); +#ifdef cl_khr_depth_images +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_depth_t); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_msaa_t); +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_msaa_depth_t); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__opencl_c_read_write_images) + +/** +* Return the number of samples associated with image +*/ +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_num_samples(read_only image2d_msaa_t); +int __ovld __cnfn get_image_num_samples(read_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_num_samples(read_only image2d_array_msaa_t); +int __ovld __cnfn get_image_num_samples(read_only image2d_array_msaa_depth_t); + +int __ovld __cnfn get_image_num_samples(write_only image2d_msaa_t); +int __ovld __cnfn get_image_num_samples(write_only image2d_msaa_depth_t); +int __ovld __cnfn get_image_num_samples(write_only image2d_array_msaa_t); +int __ovld __cnfn get_image_num_samples(write_only image2d_array_msaa_depth_t); + +#if defined(__opencl_c_read_write_images) +int __ovld __cnfn get_image_num_samples(read_write image2d_msaa_t); +int __ovld __cnfn get_image_num_samples(read_write image2d_msaa_depth_t); +int __ovld __cnfn get_image_num_samples(read_write image2d_array_msaa_t); +int __ovld __cnfn get_image_num_samples(read_write image2d_array_msaa_depth_t); +#endif //defined(__opencl_c_read_write_images) +#endif + +// OpenCL v2.0 s6.13.15 - Work-group Functions + +#if defined(__opencl_c_work_group_collective_functions) +int __ovld __conv work_group_all(int predicate); +int __ovld __conv work_group_any(int predicate); + +#ifdef cl_khr_fp16 +half __ovld __conv work_group_broadcast(half, size_t local_id); +half __ovld __conv work_group_broadcast(half, size_t, size_t); +half __ovld __conv work_group_broadcast(half, size_t, size_t, size_t); +#endif +int __ovld __conv work_group_broadcast(int, size_t local_id); +int __ovld __conv work_group_broadcast(int, size_t, size_t); +int __ovld __conv work_group_broadcast(int, size_t, size_t, size_t); +uint __ovld __conv work_group_broadcast(uint, size_t local_id); +uint __ovld __conv work_group_broadcast(uint, size_t, size_t); +uint __ovld __conv work_group_broadcast(uint, size_t, size_t, size_t); +long __ovld __conv work_group_broadcast(long, size_t local_id); +long __ovld __conv work_group_broadcast(long, size_t, size_t); +long __ovld __conv work_group_broadcast(long, size_t, size_t, size_t); +ulong __ovld __conv work_group_broadcast(ulong, size_t local_id); +ulong __ovld __conv work_group_broadcast(ulong, size_t, size_t); +ulong __ovld __conv work_group_broadcast(ulong, size_t, size_t, size_t); +float __ovld __conv work_group_broadcast(float, size_t local_id); +float __ovld __conv work_group_broadcast(float, size_t, size_t); +float __ovld __conv work_group_broadcast(float, size_t, size_t, size_t); +#ifdef cl_khr_fp64 +double __ovld __conv work_group_broadcast(double, size_t local_id); +double __ovld __conv work_group_broadcast(double, size_t, size_t); +double __ovld __conv work_group_broadcast(double, size_t, size_t, size_t); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half __ovld __conv work_group_reduce_add(half); +half __ovld __conv work_group_reduce_min(half); +half __ovld __conv work_group_reduce_max(half); +half __ovld __conv work_group_scan_exclusive_add(half); +half __ovld __conv work_group_scan_exclusive_min(half); +half __ovld __conv work_group_scan_exclusive_max(half); +half __ovld __conv work_group_scan_inclusive_add(half); +half __ovld __conv work_group_scan_inclusive_min(half); +half __ovld __conv work_group_scan_inclusive_max(half); +#endif +int __ovld __conv work_group_reduce_add(int); +int __ovld __conv work_group_reduce_min(int); +int __ovld __conv work_group_reduce_max(int); +int __ovld __conv work_group_scan_exclusive_add(int); +int __ovld __conv work_group_scan_exclusive_min(int); +int __ovld __conv work_group_scan_exclusive_max(int); +int __ovld __conv work_group_scan_inclusive_add(int); +int __ovld __conv work_group_scan_inclusive_min(int); +int __ovld __conv work_group_scan_inclusive_max(int); +uint __ovld __conv work_group_reduce_add(uint); +uint __ovld __conv work_group_reduce_min(uint); +uint __ovld __conv work_group_reduce_max(uint); +uint __ovld __conv work_group_scan_exclusive_add(uint); +uint __ovld __conv work_group_scan_exclusive_min(uint); +uint __ovld __conv work_group_scan_exclusive_max(uint); +uint __ovld __conv work_group_scan_inclusive_add(uint); +uint __ovld __conv work_group_scan_inclusive_min(uint); +uint __ovld __conv work_group_scan_inclusive_max(uint); +long __ovld __conv work_group_reduce_add(long); +long __ovld __conv work_group_reduce_min(long); +long __ovld __conv work_group_reduce_max(long); +long __ovld __conv work_group_scan_exclusive_add(long); +long __ovld __conv work_group_scan_exclusive_min(long); +long __ovld __conv work_group_scan_exclusive_max(long); +long __ovld __conv work_group_scan_inclusive_add(long); +long __ovld __conv work_group_scan_inclusive_min(long); +long __ovld __conv work_group_scan_inclusive_max(long); +ulong __ovld __conv work_group_reduce_add(ulong); +ulong __ovld __conv work_group_reduce_min(ulong); +ulong __ovld __conv work_group_reduce_max(ulong); +ulong __ovld __conv work_group_scan_exclusive_add(ulong); +ulong __ovld __conv work_group_scan_exclusive_min(ulong); +ulong __ovld __conv work_group_scan_exclusive_max(ulong); +ulong __ovld __conv work_group_scan_inclusive_add(ulong); +ulong __ovld __conv work_group_scan_inclusive_min(ulong); +ulong __ovld __conv work_group_scan_inclusive_max(ulong); +float __ovld __conv work_group_reduce_add(float); +float __ovld __conv work_group_reduce_min(float); +float __ovld __conv work_group_reduce_max(float); +float __ovld __conv work_group_scan_exclusive_add(float); +float __ovld __conv work_group_scan_exclusive_min(float); +float __ovld __conv work_group_scan_exclusive_max(float); +float __ovld __conv work_group_scan_inclusive_add(float); +float __ovld __conv work_group_scan_inclusive_min(float); +float __ovld __conv work_group_scan_inclusive_max(float); +#ifdef cl_khr_fp64 +double __ovld __conv work_group_reduce_add(double); +double __ovld __conv work_group_reduce_min(double); +double __ovld __conv work_group_reduce_max(double); +double __ovld __conv work_group_scan_exclusive_add(double); +double __ovld __conv work_group_scan_exclusive_min(double); +double __ovld __conv work_group_scan_exclusive_max(double); +double __ovld __conv work_group_scan_inclusive_add(double); +double __ovld __conv work_group_scan_inclusive_min(double); +double __ovld __conv work_group_scan_inclusive_max(double); +#endif //cl_khr_fp64 + +#endif //defined(__opencl_c_work_group_collective_functions) + +// OpenCL v2.0 s6.13.16 - Pipe Functions +#if defined(__opencl_c_pipes) +bool __ovld is_valid_reserve_id(reserve_id_t reserve_id); +#endif //defined(__opencl_c_pipes) + + +// OpenCL v2.0 s6.13.17 - Enqueue Kernels +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +#ifdef __opencl_c_device_enqueue +ndrange_t __ovld ndrange_1D(size_t); +ndrange_t __ovld ndrange_1D(size_t, size_t); +ndrange_t __ovld ndrange_1D(size_t, size_t, size_t); + +ndrange_t __ovld ndrange_2D(const size_t[2]); +ndrange_t __ovld ndrange_2D(const size_t[2], const size_t[2]); +ndrange_t __ovld ndrange_2D(const size_t[2], const size_t[2], const size_t[2]); + +ndrange_t __ovld ndrange_3D(const size_t[3]); +ndrange_t __ovld ndrange_3D(const size_t[3], const size_t[3]); +ndrange_t __ovld ndrange_3D(const size_t[3], const size_t[3], const size_t[3]); + +int __ovld enqueue_marker(queue_t, uint, const clk_event_t*, clk_event_t*); + +void __ovld retain_event(clk_event_t); + +void __ovld release_event(clk_event_t); + +clk_event_t __ovld create_user_event(void); + +void __ovld set_user_event_status(clk_event_t e, int state); + +bool __ovld is_valid_event (clk_event_t event); + +void __ovld capture_event_profiling_info(clk_event_t, clk_profiling_info, __global void*); + +queue_t __ovld get_default_queue(void); +#endif //__opencl_c_device_enqueue +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL Extension v2.0 s9.17 - Sub-groups + +#if defined(__opencl_subgroup_builtins) +// Shared Sub Group Functions +uint __ovld get_sub_group_size(void); +uint __ovld get_max_sub_group_size(void); +uint __ovld get_num_sub_groups(void); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +uint __ovld get_enqueued_num_sub_groups(void); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +uint __ovld get_sub_group_id(void); +uint __ovld get_sub_group_local_id(void); + +void __ovld __conv sub_group_barrier(cl_mem_fence_flags); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv sub_group_barrier(cl_mem_fence_flags, memory_scope); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +int __ovld __conv sub_group_all(int predicate); +int __ovld __conv sub_group_any(int predicate); + +int __ovld __conv sub_group_broadcast(int , uint sub_group_local_id); +uint __ovld __conv sub_group_broadcast(uint , uint sub_group_local_id); +long __ovld __conv sub_group_broadcast(long , uint sub_group_local_id); +ulong __ovld __conv sub_group_broadcast(ulong, uint sub_group_local_id); +float __ovld __conv sub_group_broadcast(float, uint sub_group_local_id); + +int __ovld __conv sub_group_reduce_add(int ); +uint __ovld __conv sub_group_reduce_add(uint ); +long __ovld __conv sub_group_reduce_add(long ); +ulong __ovld __conv sub_group_reduce_add(ulong); +float __ovld __conv sub_group_reduce_add(float); +int __ovld __conv sub_group_reduce_min(int ); +uint __ovld __conv sub_group_reduce_min(uint ); +long __ovld __conv sub_group_reduce_min(long ); +ulong __ovld __conv sub_group_reduce_min(ulong); +float __ovld __conv sub_group_reduce_min(float); +int __ovld __conv sub_group_reduce_max(int ); +uint __ovld __conv sub_group_reduce_max(uint ); +long __ovld __conv sub_group_reduce_max(long ); +ulong __ovld __conv sub_group_reduce_max(ulong); +float __ovld __conv sub_group_reduce_max(float); + +int __ovld __conv sub_group_scan_exclusive_add(int ); +uint __ovld __conv sub_group_scan_exclusive_add(uint ); +long __ovld __conv sub_group_scan_exclusive_add(long ); +ulong __ovld __conv sub_group_scan_exclusive_add(ulong); +float __ovld __conv sub_group_scan_exclusive_add(float); +int __ovld __conv sub_group_scan_exclusive_min(int ); +uint __ovld __conv sub_group_scan_exclusive_min(uint ); +long __ovld __conv sub_group_scan_exclusive_min(long ); +ulong __ovld __conv sub_group_scan_exclusive_min(ulong); +float __ovld __conv sub_group_scan_exclusive_min(float); +int __ovld __conv sub_group_scan_exclusive_max(int ); +uint __ovld __conv sub_group_scan_exclusive_max(uint ); +long __ovld __conv sub_group_scan_exclusive_max(long ); +ulong __ovld __conv sub_group_scan_exclusive_max(ulong); +float __ovld __conv sub_group_scan_exclusive_max(float); + +int __ovld __conv sub_group_scan_inclusive_add(int ); +uint __ovld __conv sub_group_scan_inclusive_add(uint ); +long __ovld __conv sub_group_scan_inclusive_add(long ); +ulong __ovld __conv sub_group_scan_inclusive_add(ulong); +float __ovld __conv sub_group_scan_inclusive_add(float); +int __ovld __conv sub_group_scan_inclusive_min(int ); +uint __ovld __conv sub_group_scan_inclusive_min(uint ); +long __ovld __conv sub_group_scan_inclusive_min(long ); +ulong __ovld __conv sub_group_scan_inclusive_min(ulong); +float __ovld __conv sub_group_scan_inclusive_min(float); +int __ovld __conv sub_group_scan_inclusive_max(int ); +uint __ovld __conv sub_group_scan_inclusive_max(uint ); +long __ovld __conv sub_group_scan_inclusive_max(long ); +ulong __ovld __conv sub_group_scan_inclusive_max(ulong); +float __ovld __conv sub_group_scan_inclusive_max(float); + +#ifdef cl_khr_fp16 +half __ovld __conv sub_group_broadcast(half, uint sub_group_local_id); +half __ovld __conv sub_group_reduce_add(half); +half __ovld __conv sub_group_reduce_min(half); +half __ovld __conv sub_group_reduce_max(half); +half __ovld __conv sub_group_scan_exclusive_add(half); +half __ovld __conv sub_group_scan_exclusive_min(half); +half __ovld __conv sub_group_scan_exclusive_max(half); +half __ovld __conv sub_group_scan_inclusive_add(half); +half __ovld __conv sub_group_scan_inclusive_min(half); +half __ovld __conv sub_group_scan_inclusive_max(half); +#endif //cl_khr_fp16 + +#ifdef cl_khr_fp64 +double __ovld __conv sub_group_broadcast(double, uint sub_group_local_id); +double __ovld __conv sub_group_reduce_add(double); +double __ovld __conv sub_group_reduce_min(double); +double __ovld __conv sub_group_reduce_max(double); +double __ovld __conv sub_group_scan_exclusive_add(double); +double __ovld __conv sub_group_scan_exclusive_min(double); +double __ovld __conv sub_group_scan_exclusive_max(double); +double __ovld __conv sub_group_scan_inclusive_add(double); +double __ovld __conv sub_group_scan_inclusive_min(double); +double __ovld __conv sub_group_scan_inclusive_max(double); +#endif //cl_khr_fp64 + +#endif // __opencl_subgroup_builtins + +#if defined(cl_khr_subgroup_extended_types) +char __ovld __conv sub_group_broadcast( char value, uint index ); +char2 __ovld __conv sub_group_broadcast( char2 value, uint index ); +char3 __ovld __conv sub_group_broadcast( char3 value, uint index ); +char4 __ovld __conv sub_group_broadcast( char4 value, uint index ); +char8 __ovld __conv sub_group_broadcast( char8 value, uint index ); +char16 __ovld __conv sub_group_broadcast( char16 value, uint index ); + +uchar __ovld __conv sub_group_broadcast( uchar value, uint index ); +uchar2 __ovld __conv sub_group_broadcast( uchar2 value, uint index ); +uchar3 __ovld __conv sub_group_broadcast( uchar3 value, uint index ); +uchar4 __ovld __conv sub_group_broadcast( uchar4 value, uint index ); +uchar8 __ovld __conv sub_group_broadcast( uchar8 value, uint index ); +uchar16 __ovld __conv sub_group_broadcast( uchar16 value, uint index ); + +short __ovld __conv sub_group_broadcast( short value, uint index ); +short2 __ovld __conv sub_group_broadcast( short2 value, uint index ); +short3 __ovld __conv sub_group_broadcast( short3 value, uint index ); +short4 __ovld __conv sub_group_broadcast( short4 value, uint index ); +short8 __ovld __conv sub_group_broadcast( short8 value, uint index ); +short16 __ovld __conv sub_group_broadcast( short16 value, uint index ); + +ushort __ovld __conv sub_group_broadcast( ushort value, uint index ); +ushort2 __ovld __conv sub_group_broadcast( ushort2 value, uint index ); +ushort3 __ovld __conv sub_group_broadcast( ushort3 value, uint index ); +ushort4 __ovld __conv sub_group_broadcast( ushort4 value, uint index ); +ushort8 __ovld __conv sub_group_broadcast( ushort8 value, uint index ); +ushort16 __ovld __conv sub_group_broadcast( ushort16 value, uint index ); + +// scalar int broadcast is part of cl_khr_subgroups +int2 __ovld __conv sub_group_broadcast( int2 value, uint index ); +int3 __ovld __conv sub_group_broadcast( int3 value, uint index ); +int4 __ovld __conv sub_group_broadcast( int4 value, uint index ); +int8 __ovld __conv sub_group_broadcast( int8 value, uint index ); +int16 __ovld __conv sub_group_broadcast( int16 value, uint index ); + +// scalar uint broadcast is part of cl_khr_subgroups +uint2 __ovld __conv sub_group_broadcast( uint2 value, uint index ); +uint3 __ovld __conv sub_group_broadcast( uint3 value, uint index ); +uint4 __ovld __conv sub_group_broadcast( uint4 value, uint index ); +uint8 __ovld __conv sub_group_broadcast( uint8 value, uint index ); +uint16 __ovld __conv sub_group_broadcast( uint16 value, uint index ); + +// scalar long broadcast is part of cl_khr_subgroups +long2 __ovld __conv sub_group_broadcast( long2 value, uint index ); +long3 __ovld __conv sub_group_broadcast( long3 value, uint index ); +long4 __ovld __conv sub_group_broadcast( long4 value, uint index ); +long8 __ovld __conv sub_group_broadcast( long8 value, uint index ); +long16 __ovld __conv sub_group_broadcast( long16 value, uint index ); + +// scalar ulong broadcast is part of cl_khr_subgroups +ulong2 __ovld __conv sub_group_broadcast( ulong2 value, uint index ); +ulong3 __ovld __conv sub_group_broadcast( ulong3 value, uint index ); +ulong4 __ovld __conv sub_group_broadcast( ulong4 value, uint index ); +ulong8 __ovld __conv sub_group_broadcast( ulong8 value, uint index ); +ulong16 __ovld __conv sub_group_broadcast( ulong16 value, uint index ); + +// scalar float broadcast is part of cl_khr_subgroups +float2 __ovld __conv sub_group_broadcast( float2 value, uint index ); +float3 __ovld __conv sub_group_broadcast( float3 value, uint index ); +float4 __ovld __conv sub_group_broadcast( float4 value, uint index ); +float8 __ovld __conv sub_group_broadcast( float8 value, uint index ); +float16 __ovld __conv sub_group_broadcast( float16 value, uint index ); + +char __ovld __conv sub_group_reduce_add( char value ); +uchar __ovld __conv sub_group_reduce_add( uchar value ); +short __ovld __conv sub_group_reduce_add( short value ); +ushort __ovld __conv sub_group_reduce_add( ushort value ); + +char __ovld __conv sub_group_reduce_min( char value ); +uchar __ovld __conv sub_group_reduce_min( uchar value ); +short __ovld __conv sub_group_reduce_min( short value ); +ushort __ovld __conv sub_group_reduce_min( ushort value ); + +char __ovld __conv sub_group_reduce_max( char value ); +uchar __ovld __conv sub_group_reduce_max( uchar value ); +short __ovld __conv sub_group_reduce_max( short value ); +ushort __ovld __conv sub_group_reduce_max( ushort value ); + +char __ovld __conv sub_group_scan_inclusive_add( char value ); +uchar __ovld __conv sub_group_scan_inclusive_add( uchar value ); +short __ovld __conv sub_group_scan_inclusive_add( short value ); +ushort __ovld __conv sub_group_scan_inclusive_add( ushort value ); + +char __ovld __conv sub_group_scan_inclusive_min( char value ); +uchar __ovld __conv sub_group_scan_inclusive_min( uchar value ); +short __ovld __conv sub_group_scan_inclusive_min( short value ); +ushort __ovld __conv sub_group_scan_inclusive_min( ushort value ); + +char __ovld __conv sub_group_scan_inclusive_max( char value ); +uchar __ovld __conv sub_group_scan_inclusive_max( uchar value ); +short __ovld __conv sub_group_scan_inclusive_max( short value ); +ushort __ovld __conv sub_group_scan_inclusive_max( ushort value ); + +char __ovld __conv sub_group_scan_exclusive_add( char value ); +uchar __ovld __conv sub_group_scan_exclusive_add( uchar value ); +short __ovld __conv sub_group_scan_exclusive_add( short value ); +ushort __ovld __conv sub_group_scan_exclusive_add( ushort value ); + +char __ovld __conv sub_group_scan_exclusive_min( char value ); +uchar __ovld __conv sub_group_scan_exclusive_min( uchar value ); +short __ovld __conv sub_group_scan_exclusive_min( short value ); +ushort __ovld __conv sub_group_scan_exclusive_min( ushort value ); + +char __ovld __conv sub_group_scan_exclusive_max( char value ); +uchar __ovld __conv sub_group_scan_exclusive_max( uchar value ); +short __ovld __conv sub_group_scan_exclusive_max( short value ); +ushort __ovld __conv sub_group_scan_exclusive_max( ushort value ); + +#if defined(cl_khr_fp16) +// scalar half broadcast is part of cl_khr_subgroups +half2 __ovld __conv sub_group_broadcast( half2 value, uint index ); +half3 __ovld __conv sub_group_broadcast( half3 value, uint index ); +half4 __ovld __conv sub_group_broadcast( half4 value, uint index ); +half8 __ovld __conv sub_group_broadcast( half8 value, uint index ); +half16 __ovld __conv sub_group_broadcast( half16 value, uint index ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +// scalar double broadcast is part of cl_khr_subgroups +double2 __ovld __conv sub_group_broadcast( double2 value, uint index ); +double3 __ovld __conv sub_group_broadcast( double3 value, uint index ); +double4 __ovld __conv sub_group_broadcast( double4 value, uint index ); +double8 __ovld __conv sub_group_broadcast( double8 value, uint index ); +double16 __ovld __conv sub_group_broadcast( double16 value, uint index ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_extended_types + +#if defined(cl_khr_subgroup_non_uniform_vote) +int __ovld sub_group_elect(void); +int __ovld sub_group_non_uniform_all( int predicate ); +int __ovld sub_group_non_uniform_any( int predicate ); + +int __ovld sub_group_non_uniform_all_equal( char value ); +int __ovld sub_group_non_uniform_all_equal( uchar value ); +int __ovld sub_group_non_uniform_all_equal( short value ); +int __ovld sub_group_non_uniform_all_equal( ushort value ); +int __ovld sub_group_non_uniform_all_equal( int value ); +int __ovld sub_group_non_uniform_all_equal( uint value ); +int __ovld sub_group_non_uniform_all_equal( long value ); +int __ovld sub_group_non_uniform_all_equal( ulong value ); +int __ovld sub_group_non_uniform_all_equal( float value ); + +#if defined(cl_khr_fp16) +int __ovld sub_group_non_uniform_all_equal( half value ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +int __ovld sub_group_non_uniform_all_equal( double value ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_non_uniform_vote + +#if defined(cl_khr_subgroup_ballot) +char __ovld sub_group_non_uniform_broadcast( char value, uint index ); +char2 __ovld sub_group_non_uniform_broadcast( char2 value, uint index ); +char3 __ovld sub_group_non_uniform_broadcast( char3 value, uint index ); +char4 __ovld sub_group_non_uniform_broadcast( char4 value, uint index ); +char8 __ovld sub_group_non_uniform_broadcast( char8 value, uint index ); +char16 __ovld sub_group_non_uniform_broadcast( char16 value, uint index ); + +uchar __ovld sub_group_non_uniform_broadcast( uchar value, uint index ); +uchar2 __ovld sub_group_non_uniform_broadcast( uchar2 value, uint index ); +uchar3 __ovld sub_group_non_uniform_broadcast( uchar3 value, uint index ); +uchar4 __ovld sub_group_non_uniform_broadcast( uchar4 value, uint index ); +uchar8 __ovld sub_group_non_uniform_broadcast( uchar8 value, uint index ); +uchar16 __ovld sub_group_non_uniform_broadcast( uchar16 value, uint index ); + +short __ovld sub_group_non_uniform_broadcast( short value, uint index ); +short2 __ovld sub_group_non_uniform_broadcast( short2 value, uint index ); +short3 __ovld sub_group_non_uniform_broadcast( short3 value, uint index ); +short4 __ovld sub_group_non_uniform_broadcast( short4 value, uint index ); +short8 __ovld sub_group_non_uniform_broadcast( short8 value, uint index ); +short16 __ovld sub_group_non_uniform_broadcast( short16 value, uint index ); + +ushort __ovld sub_group_non_uniform_broadcast( ushort value, uint index ); +ushort2 __ovld sub_group_non_uniform_broadcast( ushort2 value, uint index ); +ushort3 __ovld sub_group_non_uniform_broadcast( ushort3 value, uint index ); +ushort4 __ovld sub_group_non_uniform_broadcast( ushort4 value, uint index ); +ushort8 __ovld sub_group_non_uniform_broadcast( ushort8 value, uint index ); +ushort16 __ovld sub_group_non_uniform_broadcast( ushort16 value, uint index ); + +int __ovld sub_group_non_uniform_broadcast( int value, uint index ); +int2 __ovld sub_group_non_uniform_broadcast( int2 value, uint index ); +int3 __ovld sub_group_non_uniform_broadcast( int3 value, uint index ); +int4 __ovld sub_group_non_uniform_broadcast( int4 value, uint index ); +int8 __ovld sub_group_non_uniform_broadcast( int8 value, uint index ); +int16 __ovld sub_group_non_uniform_broadcast( int16 value, uint index ); + +uint __ovld sub_group_non_uniform_broadcast( uint value, uint index ); +uint2 __ovld sub_group_non_uniform_broadcast( uint2 value, uint index ); +uint3 __ovld sub_group_non_uniform_broadcast( uint3 value, uint index ); +uint4 __ovld sub_group_non_uniform_broadcast( uint4 value, uint index ); +uint8 __ovld sub_group_non_uniform_broadcast( uint8 value, uint index ); +uint16 __ovld sub_group_non_uniform_broadcast( uint16 value, uint index ); + +long __ovld sub_group_non_uniform_broadcast( long value, uint index ); +long2 __ovld sub_group_non_uniform_broadcast( long2 value, uint index ); +long3 __ovld sub_group_non_uniform_broadcast( long3 value, uint index ); +long4 __ovld sub_group_non_uniform_broadcast( long4 value, uint index ); +long8 __ovld sub_group_non_uniform_broadcast( long8 value, uint index ); +long16 __ovld sub_group_non_uniform_broadcast( long16 value, uint index ); + +ulong __ovld sub_group_non_uniform_broadcast( ulong value, uint index ); +ulong2 __ovld sub_group_non_uniform_broadcast( ulong2 value, uint index ); +ulong3 __ovld sub_group_non_uniform_broadcast( ulong3 value, uint index ); +ulong4 __ovld sub_group_non_uniform_broadcast( ulong4 value, uint index ); +ulong8 __ovld sub_group_non_uniform_broadcast( ulong8 value, uint index ); +ulong16 __ovld sub_group_non_uniform_broadcast( ulong16 value, uint index ); + +float __ovld sub_group_non_uniform_broadcast( float value, uint index ); +float2 __ovld sub_group_non_uniform_broadcast( float2 value, uint index ); +float3 __ovld sub_group_non_uniform_broadcast( float3 value, uint index ); +float4 __ovld sub_group_non_uniform_broadcast( float4 value, uint index ); +float8 __ovld sub_group_non_uniform_broadcast( float8 value, uint index ); +float16 __ovld sub_group_non_uniform_broadcast( float16 value, uint index ); + +char __ovld sub_group_broadcast_first( char value ); +uchar __ovld sub_group_broadcast_first( uchar value ); +short __ovld sub_group_broadcast_first( short value ); +ushort __ovld sub_group_broadcast_first( ushort value ); +int __ovld sub_group_broadcast_first( int value ); +uint __ovld sub_group_broadcast_first( uint value ); +long __ovld sub_group_broadcast_first( long value ); +ulong __ovld sub_group_broadcast_first( ulong value ); +float __ovld sub_group_broadcast_first( float value ); + +uint4 __ovld sub_group_ballot( int predicate ); +int __ovld __cnfn sub_group_inverse_ballot( uint4 value ); +int __ovld __cnfn sub_group_ballot_bit_extract( uint4 value, uint index ); +uint __ovld __cnfn sub_group_ballot_bit_count( uint4 value ); + +uint __ovld sub_group_ballot_inclusive_scan( uint4 value ); +uint __ovld sub_group_ballot_exclusive_scan( uint4 value ); +uint __ovld sub_group_ballot_find_lsb( uint4 value ); +uint __ovld sub_group_ballot_find_msb( uint4 value ); + +uint4 __ovld __cnfn get_sub_group_eq_mask(void); +uint4 __ovld __cnfn get_sub_group_ge_mask(void); +uint4 __ovld __cnfn get_sub_group_gt_mask(void); +uint4 __ovld __cnfn get_sub_group_le_mask(void); +uint4 __ovld __cnfn get_sub_group_lt_mask(void); + +#if defined(cl_khr_fp16) +half __ovld sub_group_non_uniform_broadcast( half value, uint index ); +half2 __ovld sub_group_non_uniform_broadcast( half2 value, uint index ); +half3 __ovld sub_group_non_uniform_broadcast( half3 value, uint index ); +half4 __ovld sub_group_non_uniform_broadcast( half4 value, uint index ); +half8 __ovld sub_group_non_uniform_broadcast( half8 value, uint index ); +half16 __ovld sub_group_non_uniform_broadcast( half16 value, uint index ); + +half __ovld sub_group_broadcast_first( half value ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +double __ovld sub_group_non_uniform_broadcast( double value, uint index ); +double2 __ovld sub_group_non_uniform_broadcast( double2 value, uint index ); +double3 __ovld sub_group_non_uniform_broadcast( double3 value, uint index ); +double4 __ovld sub_group_non_uniform_broadcast( double4 value, uint index ); +double8 __ovld sub_group_non_uniform_broadcast( double8 value, uint index ); +double16 __ovld sub_group_non_uniform_broadcast( double16 value, uint index ); + +double __ovld sub_group_broadcast_first( double value ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_ballot + +#if defined(cl_khr_subgroup_non_uniform_arithmetic) +char __ovld sub_group_non_uniform_reduce_add( char value ); +uchar __ovld sub_group_non_uniform_reduce_add( uchar value ); +short __ovld sub_group_non_uniform_reduce_add( short value ); +ushort __ovld sub_group_non_uniform_reduce_add( ushort value ); +int __ovld sub_group_non_uniform_reduce_add( int value ); +uint __ovld sub_group_non_uniform_reduce_add( uint value ); +long __ovld sub_group_non_uniform_reduce_add( long value ); +ulong __ovld sub_group_non_uniform_reduce_add( ulong value ); +float __ovld sub_group_non_uniform_reduce_add( float value ); + +char __ovld sub_group_non_uniform_reduce_mul( char value ); +uchar __ovld sub_group_non_uniform_reduce_mul( uchar value ); +short __ovld sub_group_non_uniform_reduce_mul( short value ); +ushort __ovld sub_group_non_uniform_reduce_mul( ushort value ); +int __ovld sub_group_non_uniform_reduce_mul( int value ); +uint __ovld sub_group_non_uniform_reduce_mul( uint value ); +long __ovld sub_group_non_uniform_reduce_mul( long value ); +ulong __ovld sub_group_non_uniform_reduce_mul( ulong value ); +float __ovld sub_group_non_uniform_reduce_mul( float value ); + +char __ovld sub_group_non_uniform_reduce_min( char value ); +uchar __ovld sub_group_non_uniform_reduce_min( uchar value ); +short __ovld sub_group_non_uniform_reduce_min( short value ); +ushort __ovld sub_group_non_uniform_reduce_min( ushort value ); +int __ovld sub_group_non_uniform_reduce_min( int value ); +uint __ovld sub_group_non_uniform_reduce_min( uint value ); +long __ovld sub_group_non_uniform_reduce_min( long value ); +ulong __ovld sub_group_non_uniform_reduce_min( ulong value ); +float __ovld sub_group_non_uniform_reduce_min( float value ); + +char __ovld sub_group_non_uniform_reduce_max( char value ); +uchar __ovld sub_group_non_uniform_reduce_max( uchar value ); +short __ovld sub_group_non_uniform_reduce_max( short value ); +ushort __ovld sub_group_non_uniform_reduce_max( ushort value ); +int __ovld sub_group_non_uniform_reduce_max( int value ); +uint __ovld sub_group_non_uniform_reduce_max( uint value ); +long __ovld sub_group_non_uniform_reduce_max( long value ); +ulong __ovld sub_group_non_uniform_reduce_max( ulong value ); +float __ovld sub_group_non_uniform_reduce_max( float value ); + +char __ovld sub_group_non_uniform_scan_inclusive_add( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_add( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_add( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_add( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_add( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_add( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_add( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_add( ulong value ); +float __ovld sub_group_non_uniform_scan_inclusive_add( float value ); + +char __ovld sub_group_non_uniform_scan_inclusive_mul( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_mul( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_mul( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_mul( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_mul( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_mul( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_mul( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_mul( ulong value ); +float __ovld sub_group_non_uniform_scan_inclusive_mul( float value ); + +char __ovld sub_group_non_uniform_scan_inclusive_min( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_min( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_min( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_min( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_min( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_min( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_min( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_min( ulong value ); +float __ovld sub_group_non_uniform_scan_inclusive_min( float value ); + +char __ovld sub_group_non_uniform_scan_inclusive_max( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_max( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_max( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_max( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_max( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_max( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_max( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_max( ulong value ); +float __ovld sub_group_non_uniform_scan_inclusive_max( float value ); + +char __ovld sub_group_non_uniform_scan_exclusive_add( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_add( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_add( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_add( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_add( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_add( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_add( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_add( ulong value ); +float __ovld sub_group_non_uniform_scan_exclusive_add( float value ); + +char __ovld sub_group_non_uniform_scan_exclusive_mul( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_mul( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_mul( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_mul( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_mul( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_mul( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_mul( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_mul( ulong value ); +float __ovld sub_group_non_uniform_scan_exclusive_mul( float value ); + +char __ovld sub_group_non_uniform_scan_exclusive_min( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_min( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_min( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_min( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_min( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_min( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_min( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_min( ulong value ); +float __ovld sub_group_non_uniform_scan_exclusive_min( float value ); + +char __ovld sub_group_non_uniform_scan_exclusive_max( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_max( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_max( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_max( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_max( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_max( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_max( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_max( ulong value ); +float __ovld sub_group_non_uniform_scan_exclusive_max( float value ); + +char __ovld sub_group_non_uniform_reduce_and( char value ); +uchar __ovld sub_group_non_uniform_reduce_and( uchar value ); +short __ovld sub_group_non_uniform_reduce_and( short value ); +ushort __ovld sub_group_non_uniform_reduce_and( ushort value ); +int __ovld sub_group_non_uniform_reduce_and( int value ); +uint __ovld sub_group_non_uniform_reduce_and( uint value ); +long __ovld sub_group_non_uniform_reduce_and( long value ); +ulong __ovld sub_group_non_uniform_reduce_and( ulong value ); + +char __ovld sub_group_non_uniform_reduce_or( char value ); +uchar __ovld sub_group_non_uniform_reduce_or( uchar value ); +short __ovld sub_group_non_uniform_reduce_or( short value ); +ushort __ovld sub_group_non_uniform_reduce_or( ushort value ); +int __ovld sub_group_non_uniform_reduce_or( int value ); +uint __ovld sub_group_non_uniform_reduce_or( uint value ); +long __ovld sub_group_non_uniform_reduce_or( long value ); +ulong __ovld sub_group_non_uniform_reduce_or( ulong value ); + +char __ovld sub_group_non_uniform_reduce_xor( char value ); +uchar __ovld sub_group_non_uniform_reduce_xor( uchar value ); +short __ovld sub_group_non_uniform_reduce_xor( short value ); +ushort __ovld sub_group_non_uniform_reduce_xor( ushort value ); +int __ovld sub_group_non_uniform_reduce_xor( int value ); +uint __ovld sub_group_non_uniform_reduce_xor( uint value ); +long __ovld sub_group_non_uniform_reduce_xor( long value ); +ulong __ovld sub_group_non_uniform_reduce_xor( ulong value ); + +char __ovld sub_group_non_uniform_scan_inclusive_and( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_and( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_and( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_and( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_and( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_and( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_and( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_and( ulong value ); + +char __ovld sub_group_non_uniform_scan_inclusive_or( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_or( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_or( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_or( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_or( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_or( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_or( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_or( ulong value ); + +char __ovld sub_group_non_uniform_scan_inclusive_xor( char value ); +uchar __ovld sub_group_non_uniform_scan_inclusive_xor( uchar value ); +short __ovld sub_group_non_uniform_scan_inclusive_xor( short value ); +ushort __ovld sub_group_non_uniform_scan_inclusive_xor( ushort value ); +int __ovld sub_group_non_uniform_scan_inclusive_xor( int value ); +uint __ovld sub_group_non_uniform_scan_inclusive_xor( uint value ); +long __ovld sub_group_non_uniform_scan_inclusive_xor( long value ); +ulong __ovld sub_group_non_uniform_scan_inclusive_xor( ulong value ); + +char __ovld sub_group_non_uniform_scan_exclusive_and( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_and( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_and( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_and( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_and( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_and( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_and( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_and( ulong value ); + +char __ovld sub_group_non_uniform_scan_exclusive_or( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_or( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_or( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_or( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_or( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_or( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_or( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_or( ulong value ); + +char __ovld sub_group_non_uniform_scan_exclusive_xor( char value ); +uchar __ovld sub_group_non_uniform_scan_exclusive_xor( uchar value ); +short __ovld sub_group_non_uniform_scan_exclusive_xor( short value ); +ushort __ovld sub_group_non_uniform_scan_exclusive_xor( ushort value ); +int __ovld sub_group_non_uniform_scan_exclusive_xor( int value ); +uint __ovld sub_group_non_uniform_scan_exclusive_xor( uint value ); +long __ovld sub_group_non_uniform_scan_exclusive_xor( long value ); +ulong __ovld sub_group_non_uniform_scan_exclusive_xor( ulong value ); + +int __ovld sub_group_non_uniform_reduce_logical_and( int predicate ); +int __ovld sub_group_non_uniform_reduce_logical_or( int predicate ); +int __ovld sub_group_non_uniform_reduce_logical_xor( int predicate ); + +int __ovld sub_group_non_uniform_scan_inclusive_logical_and( int predicate ); +int __ovld sub_group_non_uniform_scan_inclusive_logical_or( int predicate ); +int __ovld sub_group_non_uniform_scan_inclusive_logical_xor( int predicate ); + +int __ovld sub_group_non_uniform_scan_exclusive_logical_and( int predicate ); +int __ovld sub_group_non_uniform_scan_exclusive_logical_or( int predicate ); +int __ovld sub_group_non_uniform_scan_exclusive_logical_xor( int predicate ); + +#if defined(cl_khr_fp16) +half __ovld sub_group_non_uniform_reduce_add( half value ); +half __ovld sub_group_non_uniform_reduce_mul( half value ); +half __ovld sub_group_non_uniform_reduce_min( half value ); +half __ovld sub_group_non_uniform_reduce_max( half value ); +half __ovld sub_group_non_uniform_scan_inclusive_add( half value ); +half __ovld sub_group_non_uniform_scan_inclusive_mul( half value ); +half __ovld sub_group_non_uniform_scan_inclusive_min( half value ); +half __ovld sub_group_non_uniform_scan_inclusive_max( half value ); +half __ovld sub_group_non_uniform_scan_exclusive_add( half value ); +half __ovld sub_group_non_uniform_scan_exclusive_mul( half value ); +half __ovld sub_group_non_uniform_scan_exclusive_min( half value ); +half __ovld sub_group_non_uniform_scan_exclusive_max( half value ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +double __ovld sub_group_non_uniform_reduce_add( double value ); +double __ovld sub_group_non_uniform_reduce_mul( double value ); +double __ovld sub_group_non_uniform_reduce_min( double value ); +double __ovld sub_group_non_uniform_reduce_max( double value ); +double __ovld sub_group_non_uniform_scan_inclusive_add( double value ); +double __ovld sub_group_non_uniform_scan_inclusive_mul( double value ); +double __ovld sub_group_non_uniform_scan_inclusive_min( double value ); +double __ovld sub_group_non_uniform_scan_inclusive_max( double value ); +double __ovld sub_group_non_uniform_scan_exclusive_add( double value ); +double __ovld sub_group_non_uniform_scan_exclusive_mul( double value ); +double __ovld sub_group_non_uniform_scan_exclusive_min( double value ); +double __ovld sub_group_non_uniform_scan_exclusive_max( double value ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_non_uniform_arithmetic + +#if defined(cl_khr_subgroup_shuffle) +char __ovld sub_group_shuffle( char value, uint index ); +uchar __ovld sub_group_shuffle( uchar value, uint index ); +short __ovld sub_group_shuffle( short value, uint index ); +ushort __ovld sub_group_shuffle( ushort value, uint index ); +int __ovld sub_group_shuffle( int value, uint index ); +uint __ovld sub_group_shuffle( uint value, uint index ); +long __ovld sub_group_shuffle( long value, uint index ); +ulong __ovld sub_group_shuffle( ulong value, uint index ); +float __ovld sub_group_shuffle( float value, uint index ); + +char __ovld sub_group_shuffle_xor( char value, uint mask ); +uchar __ovld sub_group_shuffle_xor( uchar value, uint mask ); +short __ovld sub_group_shuffle_xor( short value, uint mask ); +ushort __ovld sub_group_shuffle_xor( ushort value, uint mask ); +int __ovld sub_group_shuffle_xor( int value, uint mask ); +uint __ovld sub_group_shuffle_xor( uint value, uint mask ); +long __ovld sub_group_shuffle_xor( long value, uint mask ); +ulong __ovld sub_group_shuffle_xor( ulong value, uint mask ); +float __ovld sub_group_shuffle_xor( float value, uint mask ); + +#if defined(cl_khr_fp16) +half __ovld sub_group_shuffle( half value, uint index ); +half __ovld sub_group_shuffle_xor( half value, uint mask ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +double __ovld sub_group_shuffle( double value, uint index ); +double __ovld sub_group_shuffle_xor( double value, uint mask ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_shuffle + +#if defined(cl_khr_subgroup_shuffle_relative) +char __ovld sub_group_shuffle_up( char value, uint delta ); +uchar __ovld sub_group_shuffle_up( uchar value, uint delta ); +short __ovld sub_group_shuffle_up( short value, uint delta ); +ushort __ovld sub_group_shuffle_up( ushort value, uint delta ); +int __ovld sub_group_shuffle_up( int value, uint delta ); +uint __ovld sub_group_shuffle_up( uint value, uint delta ); +long __ovld sub_group_shuffle_up( long value, uint delta ); +ulong __ovld sub_group_shuffle_up( ulong value, uint delta ); +float __ovld sub_group_shuffle_up( float value, uint delta ); + +char __ovld sub_group_shuffle_down( char value, uint delta ); +uchar __ovld sub_group_shuffle_down( uchar value, uint delta ); +short __ovld sub_group_shuffle_down( short value, uint delta ); +ushort __ovld sub_group_shuffle_down( ushort value, uint delta ); +int __ovld sub_group_shuffle_down( int value, uint delta ); +uint __ovld sub_group_shuffle_down( uint value, uint delta ); +long __ovld sub_group_shuffle_down( long value, uint delta ); +ulong __ovld sub_group_shuffle_down( ulong value, uint delta ); +float __ovld sub_group_shuffle_down( float value, uint delta ); + +#if defined(cl_khr_fp16) +half __ovld sub_group_shuffle_up( half value, uint delta ); +half __ovld sub_group_shuffle_down( half value, uint delta ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +double __ovld sub_group_shuffle_up( double value, uint delta ); +double __ovld sub_group_shuffle_down( double value, uint delta ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_shuffle_relative + +#if defined(cl_khr_subgroup_clustered_reduce) +char __ovld sub_group_clustered_reduce_add( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_add( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_add( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_add( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_add( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_add( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_add( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_add( ulong value, uint clustersize ); +float __ovld sub_group_clustered_reduce_add( float value, uint clustersize ); + +char __ovld sub_group_clustered_reduce_mul( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_mul( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_mul( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_mul( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_mul( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_mul( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_mul( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_mul( ulong value, uint clustersize ); +float __ovld sub_group_clustered_reduce_mul( float value, uint clustersize ); + +char __ovld sub_group_clustered_reduce_min( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_min( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_min( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_min( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_min( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_min( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_min( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_min( ulong value, uint clustersize ); +float __ovld sub_group_clustered_reduce_min( float value, uint clustersize ); + +char __ovld sub_group_clustered_reduce_max( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_max( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_max( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_max( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_max( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_max( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_max( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_max( ulong value, uint clustersize ); +float __ovld sub_group_clustered_reduce_max( float value, uint clustersize ); + +char __ovld sub_group_clustered_reduce_and( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_and( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_and( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_and( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_and( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_and( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_and( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_and( ulong value, uint clustersize ); + +char __ovld sub_group_clustered_reduce_or( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_or( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_or( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_or( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_or( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_or( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_or( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_or( ulong value, uint clustersize ); + +char __ovld sub_group_clustered_reduce_xor( char value, uint clustersize ); +uchar __ovld sub_group_clustered_reduce_xor( uchar value, uint clustersize ); +short __ovld sub_group_clustered_reduce_xor( short value, uint clustersize ); +ushort __ovld sub_group_clustered_reduce_xor( ushort value, uint clustersize ); +int __ovld sub_group_clustered_reduce_xor( int value, uint clustersize ); +uint __ovld sub_group_clustered_reduce_xor( uint value, uint clustersize ); +long __ovld sub_group_clustered_reduce_xor( long value, uint clustersize ); +ulong __ovld sub_group_clustered_reduce_xor( ulong value, uint clustersize ); + +int __ovld sub_group_clustered_reduce_logical_and( int predicate, uint clustersize ); +int __ovld sub_group_clustered_reduce_logical_or( int predicate, uint clustersize ); +int __ovld sub_group_clustered_reduce_logical_xor( int predicate, uint clustersize ); + +#if defined(cl_khr_fp16) +half __ovld sub_group_clustered_reduce_add( half value, uint clustersize ); +half __ovld sub_group_clustered_reduce_mul( half value, uint clustersize ); +half __ovld sub_group_clustered_reduce_min( half value, uint clustersize ); +half __ovld sub_group_clustered_reduce_max( half value, uint clustersize ); +#endif // cl_khr_fp16 + +#if defined(cl_khr_fp64) +double __ovld sub_group_clustered_reduce_add( double value, uint clustersize ); +double __ovld sub_group_clustered_reduce_mul( double value, uint clustersize ); +double __ovld sub_group_clustered_reduce_min( double value, uint clustersize ); +double __ovld sub_group_clustered_reduce_max( double value, uint clustersize ); +#endif // cl_khr_fp64 + +#endif // cl_khr_subgroup_clustered_reduce + +#if defined(cl_khr_extended_bit_ops) +char __ovld __cnfn bitfield_insert(char, char, uint, uint); +uchar __ovld __cnfn bitfield_insert(uchar, uchar, uint, uint); +short __ovld __cnfn bitfield_insert(short, short, uint, uint); +ushort __ovld __cnfn bitfield_insert(ushort, ushort, uint, uint); +int __ovld __cnfn bitfield_insert(int, int, uint, uint); +uint __ovld __cnfn bitfield_insert(uint, uint, uint, uint); +long __ovld __cnfn bitfield_insert(long, long, uint, uint); +ulong __ovld __cnfn bitfield_insert(ulong, ulong, uint, uint); +char2 __ovld __cnfn bitfield_insert(char2, char2, uint, uint); +uchar2 __ovld __cnfn bitfield_insert(uchar2, uchar2, uint, uint); +short2 __ovld __cnfn bitfield_insert(short2, short2, uint, uint); +ushort2 __ovld __cnfn bitfield_insert(ushort2, ushort2, uint, uint); +int2 __ovld __cnfn bitfield_insert(int2, int2, uint, uint); +uint2 __ovld __cnfn bitfield_insert(uint2, uint2, uint, uint); +long2 __ovld __cnfn bitfield_insert(long2, long2, uint, uint); +ulong2 __ovld __cnfn bitfield_insert(ulong2, ulong2, uint, uint); +char3 __ovld __cnfn bitfield_insert(char3, char3, uint, uint); +uchar3 __ovld __cnfn bitfield_insert(uchar3, uchar3, uint, uint); +short3 __ovld __cnfn bitfield_insert(short3, short3, uint, uint); +ushort3 __ovld __cnfn bitfield_insert(ushort3, ushort3, uint, uint); +int3 __ovld __cnfn bitfield_insert(int3, int3, uint, uint); +uint3 __ovld __cnfn bitfield_insert(uint3, uint3, uint, uint); +long3 __ovld __cnfn bitfield_insert(long3, long3, uint, uint); +ulong3 __ovld __cnfn bitfield_insert(ulong3, ulong3, uint, uint); +char4 __ovld __cnfn bitfield_insert(char4, char4, uint, uint); +uchar4 __ovld __cnfn bitfield_insert(uchar4, uchar4, uint, uint); +short4 __ovld __cnfn bitfield_insert(short4, short4, uint, uint); +ushort4 __ovld __cnfn bitfield_insert(ushort4, ushort4, uint, uint); +int4 __ovld __cnfn bitfield_insert(int4, int4, uint, uint); +uint4 __ovld __cnfn bitfield_insert(uint4, uint4, uint, uint); +long4 __ovld __cnfn bitfield_insert(long4, long4, uint, uint); +ulong4 __ovld __cnfn bitfield_insert(ulong4, ulong4, uint, uint); +char8 __ovld __cnfn bitfield_insert(char8, char8, uint, uint); +uchar8 __ovld __cnfn bitfield_insert(uchar8, uchar8, uint, uint); +short8 __ovld __cnfn bitfield_insert(short8, short8, uint, uint); +ushort8 __ovld __cnfn bitfield_insert(ushort8, ushort8, uint, uint); +int8 __ovld __cnfn bitfield_insert(int8, int8, uint, uint); +uint8 __ovld __cnfn bitfield_insert(uint8, uint8, uint, uint); +long8 __ovld __cnfn bitfield_insert(long8, long8, uint, uint); +ulong8 __ovld __cnfn bitfield_insert(ulong8, ulong8, uint, uint); +char16 __ovld __cnfn bitfield_insert(char16, char16, uint, uint); +uchar16 __ovld __cnfn bitfield_insert(uchar16, uchar16, uint, uint); +short16 __ovld __cnfn bitfield_insert(short16, short16, uint, uint); +ushort16 __ovld __cnfn bitfield_insert(ushort16, ushort16, uint, uint); +int16 __ovld __cnfn bitfield_insert(int16, int16, uint, uint); +uint16 __ovld __cnfn bitfield_insert(uint16, uint16, uint, uint); +long16 __ovld __cnfn bitfield_insert(long16, long16, uint, uint); +ulong16 __ovld __cnfn bitfield_insert(ulong16, ulong16, uint, uint); + +char __ovld __cnfn bitfield_extract_signed(char, uint, uint); +short __ovld __cnfn bitfield_extract_signed(short, uint, uint); +int __ovld __cnfn bitfield_extract_signed(int, uint, uint); +long __ovld __cnfn bitfield_extract_signed(long, uint, uint); +char2 __ovld __cnfn bitfield_extract_signed(char2, uint, uint); +short2 __ovld __cnfn bitfield_extract_signed(short2, uint, uint); +int2 __ovld __cnfn bitfield_extract_signed(int2, uint, uint); +long2 __ovld __cnfn bitfield_extract_signed(long2, uint, uint); +char3 __ovld __cnfn bitfield_extract_signed(char3, uint, uint); +short3 __ovld __cnfn bitfield_extract_signed(short3, uint, uint); +int3 __ovld __cnfn bitfield_extract_signed(int3, uint, uint); +long3 __ovld __cnfn bitfield_extract_signed(long3, uint, uint); +char4 __ovld __cnfn bitfield_extract_signed(char4, uint, uint); +short4 __ovld __cnfn bitfield_extract_signed(short4, uint, uint); +int4 __ovld __cnfn bitfield_extract_signed(int4, uint, uint); +long4 __ovld __cnfn bitfield_extract_signed(long4, uint, uint); +char8 __ovld __cnfn bitfield_extract_signed(char8, uint, uint); +short8 __ovld __cnfn bitfield_extract_signed(short8, uint, uint); +int8 __ovld __cnfn bitfield_extract_signed(int8, uint, uint); +long8 __ovld __cnfn bitfield_extract_signed(long8, uint, uint); +char16 __ovld __cnfn bitfield_extract_signed(char16, uint, uint); +short16 __ovld __cnfn bitfield_extract_signed(short16, uint, uint); +int16 __ovld __cnfn bitfield_extract_signed(int16, uint, uint); +long16 __ovld __cnfn bitfield_extract_signed(long16, uint, uint); + +char __ovld __cnfn bitfield_extract_signed(uchar, uint, uint); +short __ovld __cnfn bitfield_extract_signed(ushort, uint, uint); +int __ovld __cnfn bitfield_extract_signed(uint, uint, uint); +long __ovld __cnfn bitfield_extract_signed(ulong, uint, uint); +char2 __ovld __cnfn bitfield_extract_signed(uchar2, uint, uint); +short2 __ovld __cnfn bitfield_extract_signed(ushort2, uint, uint); +int2 __ovld __cnfn bitfield_extract_signed(uint2, uint, uint); +long2 __ovld __cnfn bitfield_extract_signed(ulong2, uint, uint); +char3 __ovld __cnfn bitfield_extract_signed(uchar3, uint, uint); +short3 __ovld __cnfn bitfield_extract_signed(ushort3, uint, uint); +int3 __ovld __cnfn bitfield_extract_signed(uint3, uint, uint); +long3 __ovld __cnfn bitfield_extract_signed(ulong3, uint, uint); +char4 __ovld __cnfn bitfield_extract_signed(uchar4, uint, uint); +short4 __ovld __cnfn bitfield_extract_signed(ushort4, uint, uint); +int4 __ovld __cnfn bitfield_extract_signed(uint4, uint, uint); +long4 __ovld __cnfn bitfield_extract_signed(ulong4, uint, uint); +char8 __ovld __cnfn bitfield_extract_signed(uchar8, uint, uint); +short8 __ovld __cnfn bitfield_extract_signed(ushort8, uint, uint); +int8 __ovld __cnfn bitfield_extract_signed(uint8, uint, uint); +long8 __ovld __cnfn bitfield_extract_signed(ulong8, uint, uint); +char16 __ovld __cnfn bitfield_extract_signed(uchar16, uint, uint); +short16 __ovld __cnfn bitfield_extract_signed(ushort16, uint, uint); +int16 __ovld __cnfn bitfield_extract_signed(uint16, uint, uint); +long16 __ovld __cnfn bitfield_extract_signed(ulong16, uint, uint); + +uchar __ovld __cnfn bitfield_extract_unsigned(char, uint, uint); +ushort __ovld __cnfn bitfield_extract_unsigned(short, uint, uint); +uint __ovld __cnfn bitfield_extract_unsigned(int, uint, uint); +ulong __ovld __cnfn bitfield_extract_unsigned(long, uint, uint); +uchar2 __ovld __cnfn bitfield_extract_unsigned(char2, uint, uint); +ushort2 __ovld __cnfn bitfield_extract_unsigned(short2, uint, uint); +uint2 __ovld __cnfn bitfield_extract_unsigned(int2, uint, uint); +ulong2 __ovld __cnfn bitfield_extract_unsigned(long2, uint, uint); +uchar3 __ovld __cnfn bitfield_extract_unsigned(char3, uint, uint); +ushort3 __ovld __cnfn bitfield_extract_unsigned(short3, uint, uint); +uint3 __ovld __cnfn bitfield_extract_unsigned(int3, uint, uint); +ulong3 __ovld __cnfn bitfield_extract_unsigned(long3, uint, uint); +uchar4 __ovld __cnfn bitfield_extract_unsigned(char4, uint, uint); +ushort4 __ovld __cnfn bitfield_extract_unsigned(short4, uint, uint); +uint4 __ovld __cnfn bitfield_extract_unsigned(int4, uint, uint); +ulong4 __ovld __cnfn bitfield_extract_unsigned(long4, uint, uint); +uchar8 __ovld __cnfn bitfield_extract_unsigned(char8, uint, uint); +ushort8 __ovld __cnfn bitfield_extract_unsigned(short8, uint, uint); +uint8 __ovld __cnfn bitfield_extract_unsigned(int8, uint, uint); +ulong8 __ovld __cnfn bitfield_extract_unsigned(long8, uint, uint); +uchar16 __ovld __cnfn bitfield_extract_unsigned(char16, uint, uint); +ushort16 __ovld __cnfn bitfield_extract_unsigned(short16, uint, uint); +uint16 __ovld __cnfn bitfield_extract_unsigned(int16, uint, uint); +ulong16 __ovld __cnfn bitfield_extract_unsigned(long16, uint, uint); + +uchar __ovld __cnfn bitfield_extract_unsigned(uchar, uint, uint); +ushort __ovld __cnfn bitfield_extract_unsigned(ushort, uint, uint); +uint __ovld __cnfn bitfield_extract_unsigned(uint, uint, uint); +ulong __ovld __cnfn bitfield_extract_unsigned(ulong, uint, uint); +uchar2 __ovld __cnfn bitfield_extract_unsigned(uchar2, uint, uint); +ushort2 __ovld __cnfn bitfield_extract_unsigned(ushort2, uint, uint); +uint2 __ovld __cnfn bitfield_extract_unsigned(uint2, uint, uint); +ulong2 __ovld __cnfn bitfield_extract_unsigned(ulong2, uint, uint); +uchar3 __ovld __cnfn bitfield_extract_unsigned(uchar3, uint, uint); +ushort3 __ovld __cnfn bitfield_extract_unsigned(ushort3, uint, uint); +uint3 __ovld __cnfn bitfield_extract_unsigned(uint3, uint, uint); +ulong3 __ovld __cnfn bitfield_extract_unsigned(ulong3, uint, uint); +uchar4 __ovld __cnfn bitfield_extract_unsigned(uchar4, uint, uint); +ushort4 __ovld __cnfn bitfield_extract_unsigned(ushort4, uint, uint); +uint4 __ovld __cnfn bitfield_extract_unsigned(uint4, uint, uint); +ulong4 __ovld __cnfn bitfield_extract_unsigned(ulong4, uint, uint); +uchar8 __ovld __cnfn bitfield_extract_unsigned(uchar8, uint, uint); +ushort8 __ovld __cnfn bitfield_extract_unsigned(ushort8, uint, uint); +uint8 __ovld __cnfn bitfield_extract_unsigned(uint8, uint, uint); +ulong8 __ovld __cnfn bitfield_extract_unsigned(ulong8, uint, uint); +uchar16 __ovld __cnfn bitfield_extract_unsigned(uchar16, uint, uint); +ushort16 __ovld __cnfn bitfield_extract_unsigned(ushort16, uint, uint); +uint16 __ovld __cnfn bitfield_extract_unsigned(uint16, uint, uint); +ulong16 __ovld __cnfn bitfield_extract_unsigned(ulong16, uint, uint); + +char __ovld __cnfn bit_reverse(char); +uchar __ovld __cnfn bit_reverse(uchar); +short __ovld __cnfn bit_reverse(short); +ushort __ovld __cnfn bit_reverse(ushort); +int __ovld __cnfn bit_reverse(int); +uint __ovld __cnfn bit_reverse(uint); +long __ovld __cnfn bit_reverse(long); +ulong __ovld __cnfn bit_reverse(ulong); +char2 __ovld __cnfn bit_reverse(char2); +uchar2 __ovld __cnfn bit_reverse(uchar2); +short2 __ovld __cnfn bit_reverse(short2); +ushort2 __ovld __cnfn bit_reverse(ushort2); +int2 __ovld __cnfn bit_reverse(int2); +uint2 __ovld __cnfn bit_reverse(uint2); +long2 __ovld __cnfn bit_reverse(long2); +ulong2 __ovld __cnfn bit_reverse(ulong2); +char3 __ovld __cnfn bit_reverse(char3); +uchar3 __ovld __cnfn bit_reverse(uchar3); +short3 __ovld __cnfn bit_reverse(short3); +ushort3 __ovld __cnfn bit_reverse(ushort3); +int3 __ovld __cnfn bit_reverse(int3); +uint3 __ovld __cnfn bit_reverse(uint3); +long3 __ovld __cnfn bit_reverse(long3); +ulong3 __ovld __cnfn bit_reverse(ulong3); +char4 __ovld __cnfn bit_reverse(char4); +uchar4 __ovld __cnfn bit_reverse(uchar4); +short4 __ovld __cnfn bit_reverse(short4); +ushort4 __ovld __cnfn bit_reverse(ushort4); +int4 __ovld __cnfn bit_reverse(int4); +uint4 __ovld __cnfn bit_reverse(uint4); +long4 __ovld __cnfn bit_reverse(long4); +ulong4 __ovld __cnfn bit_reverse(ulong4); +char8 __ovld __cnfn bit_reverse(char8); +uchar8 __ovld __cnfn bit_reverse(uchar8); +short8 __ovld __cnfn bit_reverse(short8); +ushort8 __ovld __cnfn bit_reverse(ushort8); +int8 __ovld __cnfn bit_reverse(int8); +uint8 __ovld __cnfn bit_reverse(uint8); +long8 __ovld __cnfn bit_reverse(long8); +ulong8 __ovld __cnfn bit_reverse(ulong8); +char16 __ovld __cnfn bit_reverse(char16); +uchar16 __ovld __cnfn bit_reverse(uchar16); +short16 __ovld __cnfn bit_reverse(short16); +ushort16 __ovld __cnfn bit_reverse(ushort16); +int16 __ovld __cnfn bit_reverse(int16); +uint16 __ovld __cnfn bit_reverse(uint16); +long16 __ovld __cnfn bit_reverse(long16); +ulong16 __ovld __cnfn bit_reverse(ulong16); +#endif // cl_khr_extended_bit_ops + +#if defined(__opencl_c_integer_dot_product_input_4x8bit) +uint __ovld __cnfn dot(uchar4, uchar4); +int __ovld __cnfn dot(char4, char4); +int __ovld __cnfn dot(uchar4, char4); +int __ovld __cnfn dot(char4, uchar4); + +uint __ovld __cnfn dot_acc_sat(uchar4, uchar4, uint); +int __ovld __cnfn dot_acc_sat(char4, char4, int); +int __ovld __cnfn dot_acc_sat(uchar4, char4, int); +int __ovld __cnfn dot_acc_sat(char4, uchar4, int); +#endif // __opencl_c_integer_dot_product_input_4x8bit + +#if defined(__opencl_c_integer_dot_product_input_4x8bit_packed) +uint __ovld __cnfn dot_4x8packed_uu_uint(uint, uint); +int __ovld __cnfn dot_4x8packed_ss_int(uint, uint); +int __ovld __cnfn dot_4x8packed_us_int(uint, uint); +int __ovld __cnfn dot_4x8packed_su_int(uint, uint); + +uint __ovld __cnfn dot_acc_sat_4x8packed_uu_uint(uint, uint, uint); +int __ovld __cnfn dot_acc_sat_4x8packed_ss_int(uint, uint, int); +int __ovld __cnfn dot_acc_sat_4x8packed_us_int(uint, uint, int); +int __ovld __cnfn dot_acc_sat_4x8packed_su_int(uint, uint, int); +#endif // __opencl_c_integer_dot_product_input_4x8bit_packed + +#if defined(cl_khr_subgroup_rotate) +char __ovld __conv sub_group_rotate(char, int); +uchar __ovld __conv sub_group_rotate(uchar, int); +short __ovld __conv sub_group_rotate(short, int); +ushort __ovld __conv sub_group_rotate(ushort, int); +int __ovld __conv sub_group_rotate(int, int); +uint __ovld __conv sub_group_rotate(uint, int); +long __ovld __conv sub_group_rotate(long, int); +ulong __ovld __conv sub_group_rotate(ulong, int); +float __ovld __conv sub_group_rotate(float, int); +#if defined(cl_khr_fp64) +double __ovld __conv sub_group_rotate(double, int); +#endif // cl_khr_fp64 +#if defined(cl_khr_fp16) +half __ovld __conv sub_group_rotate(half, int); +#endif // cl_khr_fp16 + +char __ovld __conv sub_group_clustered_rotate(char, int, uint); +uchar __ovld __conv sub_group_clustered_rotate(uchar, int, uint); +short __ovld __conv sub_group_clustered_rotate(short, int, uint); +ushort __ovld __conv sub_group_clustered_rotate(ushort, int, uint); +int __ovld __conv sub_group_clustered_rotate(int, int, uint); +uint __ovld __conv sub_group_clustered_rotate(uint, int, uint); +long __ovld __conv sub_group_clustered_rotate(long, int, uint); +ulong __ovld __conv sub_group_clustered_rotate(ulong, int, uint); +float __ovld __conv sub_group_clustered_rotate(float, int, uint); +#if defined(cl_khr_fp64) +double __ovld __conv sub_group_clustered_rotate(double, int, uint); +#endif // cl_khr_fp64 +#if defined(cl_khr_fp16) +half __ovld __conv sub_group_clustered_rotate(half, int, uint); +#endif // cl_khr_fp16 +#endif // cl_khr_subgroup_rotate + +#if defined(cl_khr_kernel_clock) +#if defined(__opencl_c_kernel_clock_scope_device) +ulong __ovld clock_read_device(); +uint2 __ovld clock_read_hilo_device(); +#endif // __opencl_c_kernel_clock_scope_device +#if defined(__opencl_c_kernel_clock_scope_work_group) +ulong __ovld clock_read_work_group(); +uint2 __ovld clock_read_hilo_work_group(); +#endif // __opencl_c_kernel_clock_scope_work_group +#if defined(__opencl_c_kernel_clock_scope_sub_group) +ulong __ovld clock_read_sub_group(); +uint2 __ovld clock_read_hilo_sub_group(); +#endif // __opencl_c_kernel_clock_scope_sub_group +#endif // cl_khr_kernel_clock + +#if defined(cl_intel_subgroups) +// Intel-Specific Sub Group Functions +float __ovld __conv intel_sub_group_shuffle( float , uint ); +float2 __ovld __conv intel_sub_group_shuffle( float2, uint ); +float3 __ovld __conv intel_sub_group_shuffle( float3, uint ); +float4 __ovld __conv intel_sub_group_shuffle( float4, uint ); +float8 __ovld __conv intel_sub_group_shuffle( float8, uint ); +float16 __ovld __conv intel_sub_group_shuffle( float16, uint ); + +int __ovld __conv intel_sub_group_shuffle( int , uint ); +int2 __ovld __conv intel_sub_group_shuffle( int2, uint ); +int3 __ovld __conv intel_sub_group_shuffle( int3, uint ); +int4 __ovld __conv intel_sub_group_shuffle( int4, uint ); +int8 __ovld __conv intel_sub_group_shuffle( int8, uint ); +int16 __ovld __conv intel_sub_group_shuffle( int16, uint ); + +uint __ovld __conv intel_sub_group_shuffle( uint , uint ); +uint2 __ovld __conv intel_sub_group_shuffle( uint2, uint ); +uint3 __ovld __conv intel_sub_group_shuffle( uint3, uint ); +uint4 __ovld __conv intel_sub_group_shuffle( uint4, uint ); +uint8 __ovld __conv intel_sub_group_shuffle( uint8, uint ); +uint16 __ovld __conv intel_sub_group_shuffle( uint16, uint ); + +long __ovld __conv intel_sub_group_shuffle( long, uint ); +ulong __ovld __conv intel_sub_group_shuffle( ulong, uint ); + +float __ovld __conv intel_sub_group_shuffle_down( float cur, float next, uint ); +float2 __ovld __conv intel_sub_group_shuffle_down( float2 cur, float2 next, uint ); +float3 __ovld __conv intel_sub_group_shuffle_down( float3 cur, float3 next, uint ); +float4 __ovld __conv intel_sub_group_shuffle_down( float4 cur, float4 next, uint ); +float8 __ovld __conv intel_sub_group_shuffle_down( float8 cur, float8 next, uint ); +float16 __ovld __conv intel_sub_group_shuffle_down( float16 cur, float16 next, uint ); + +int __ovld __conv intel_sub_group_shuffle_down( int cur, int next, uint ); +int2 __ovld __conv intel_sub_group_shuffle_down( int2 cur, int2 next, uint ); +int3 __ovld __conv intel_sub_group_shuffle_down( int3 cur, int3 next, uint ); +int4 __ovld __conv intel_sub_group_shuffle_down( int4 cur, int4 next, uint ); +int8 __ovld __conv intel_sub_group_shuffle_down( int8 cur, int8 next, uint ); +int16 __ovld __conv intel_sub_group_shuffle_down( int16 cur, int16 next, uint ); + +uint __ovld __conv intel_sub_group_shuffle_down( uint cur, uint next, uint ); +uint2 __ovld __conv intel_sub_group_shuffle_down( uint2 cur, uint2 next, uint ); +uint3 __ovld __conv intel_sub_group_shuffle_down( uint3 cur, uint3 next, uint ); +uint4 __ovld __conv intel_sub_group_shuffle_down( uint4 cur, uint4 next, uint ); +uint8 __ovld __conv intel_sub_group_shuffle_down( uint8 cur, uint8 next, uint ); +uint16 __ovld __conv intel_sub_group_shuffle_down( uint16 cur, uint16 next, uint ); + +long __ovld __conv intel_sub_group_shuffle_down( long prev, long cur, uint ); +ulong __ovld __conv intel_sub_group_shuffle_down( ulong prev, ulong cur, uint ); + +float __ovld __conv intel_sub_group_shuffle_up( float prev, float cur, uint ); +float2 __ovld __conv intel_sub_group_shuffle_up( float2 prev, float2 cur, uint ); +float3 __ovld __conv intel_sub_group_shuffle_up( float3 prev, float3 cur, uint ); +float4 __ovld __conv intel_sub_group_shuffle_up( float4 prev, float4 cur, uint ); +float8 __ovld __conv intel_sub_group_shuffle_up( float8 prev, float8 cur, uint ); +float16 __ovld __conv intel_sub_group_shuffle_up( float16 prev, float16 cur, uint ); + +int __ovld __conv intel_sub_group_shuffle_up( int prev, int cur, uint ); +int2 __ovld __conv intel_sub_group_shuffle_up( int2 prev, int2 cur, uint ); +int3 __ovld __conv intel_sub_group_shuffle_up( int3 prev, int3 cur, uint ); +int4 __ovld __conv intel_sub_group_shuffle_up( int4 prev, int4 cur, uint ); +int8 __ovld __conv intel_sub_group_shuffle_up( int8 prev, int8 cur, uint ); +int16 __ovld __conv intel_sub_group_shuffle_up( int16 prev, int16 cur, uint ); + +uint __ovld __conv intel_sub_group_shuffle_up( uint prev, uint cur, uint ); +uint2 __ovld __conv intel_sub_group_shuffle_up( uint2 prev, uint2 cur, uint ); +uint3 __ovld __conv intel_sub_group_shuffle_up( uint3 prev, uint3 cur, uint ); +uint4 __ovld __conv intel_sub_group_shuffle_up( uint4 prev, uint4 cur, uint ); +uint8 __ovld __conv intel_sub_group_shuffle_up( uint8 prev, uint8 cur, uint ); +uint16 __ovld __conv intel_sub_group_shuffle_up( uint16 prev, uint16 cur, uint ); + +long __ovld __conv intel_sub_group_shuffle_up( long prev, long cur, uint ); +ulong __ovld __conv intel_sub_group_shuffle_up( ulong prev, ulong cur, uint ); + +float __ovld __conv intel_sub_group_shuffle_xor( float , uint ); +float2 __ovld __conv intel_sub_group_shuffle_xor( float2, uint ); +float3 __ovld __conv intel_sub_group_shuffle_xor( float3, uint ); +float4 __ovld __conv intel_sub_group_shuffle_xor( float4, uint ); +float8 __ovld __conv intel_sub_group_shuffle_xor( float8, uint ); +float16 __ovld __conv intel_sub_group_shuffle_xor( float16, uint ); + +int __ovld __conv intel_sub_group_shuffle_xor( int , uint ); +int2 __ovld __conv intel_sub_group_shuffle_xor( int2, uint ); +int3 __ovld __conv intel_sub_group_shuffle_xor( int3, uint ); +int4 __ovld __conv intel_sub_group_shuffle_xor( int4, uint ); +int8 __ovld __conv intel_sub_group_shuffle_xor( int8, uint ); +int16 __ovld __conv intel_sub_group_shuffle_xor( int16, uint ); + +uint __ovld __conv intel_sub_group_shuffle_xor( uint , uint ); +uint2 __ovld __conv intel_sub_group_shuffle_xor( uint2, uint ); +uint3 __ovld __conv intel_sub_group_shuffle_xor( uint3, uint ); +uint4 __ovld __conv intel_sub_group_shuffle_xor( uint4, uint ); +uint8 __ovld __conv intel_sub_group_shuffle_xor( uint8, uint ); +uint16 __ovld __conv intel_sub_group_shuffle_xor( uint16, uint ); + +long __ovld __conv intel_sub_group_shuffle_xor( long, uint ); +ulong __ovld __conv intel_sub_group_shuffle_xor( ulong, uint ); + +#if defined(__opencl_c_images) +uint __ovld __conv intel_sub_group_block_read(read_only image2d_t, int2); +uint2 __ovld __conv intel_sub_group_block_read2(read_only image2d_t, int2); +uint4 __ovld __conv intel_sub_group_block_read4(read_only image2d_t, int2); +uint8 __ovld __conv intel_sub_group_block_read8(read_only image2d_t, int2); +#endif + +#if defined(__opencl_c_read_write_images) +uint __ovld __conv intel_sub_group_block_read(read_write image2d_t, int2); +uint2 __ovld __conv intel_sub_group_block_read2(read_write image2d_t, int2); +uint4 __ovld __conv intel_sub_group_block_read4(read_write image2d_t, int2); +uint8 __ovld __conv intel_sub_group_block_read8(read_write image2d_t, int2); +#endif // defined(__opencl_c_read_write_images) + +uint __ovld __conv intel_sub_group_block_read( const __global uint* p ); +uint2 __ovld __conv intel_sub_group_block_read2( const __global uint* p ); +uint4 __ovld __conv intel_sub_group_block_read4( const __global uint* p ); +uint8 __ovld __conv intel_sub_group_block_read8( const __global uint* p ); + +#if defined(__opencl_c_images) +void __ovld __conv intel_sub_group_block_write(write_only image2d_t, int2, uint); +void __ovld __conv intel_sub_group_block_write2(write_only image2d_t, int2, uint2); +void __ovld __conv intel_sub_group_block_write4(write_only image2d_t, int2, uint4); +void __ovld __conv intel_sub_group_block_write8(write_only image2d_t, int2, uint8); +#endif // defined(__opencl_c_images) + +#if defined(__opencl_c_read_write_images) +void __ovld __conv intel_sub_group_block_write(read_write image2d_t, int2, uint); +void __ovld __conv intel_sub_group_block_write2(read_write image2d_t, int2, uint2); +void __ovld __conv intel_sub_group_block_write4(read_write image2d_t, int2, uint4); +void __ovld __conv intel_sub_group_block_write8(read_write image2d_t, int2, uint8); +#endif // defined(__opencl_c_read_write_images) + +void __ovld __conv intel_sub_group_block_write( __global uint* p, uint data ); +void __ovld __conv intel_sub_group_block_write2( __global uint* p, uint2 data ); +void __ovld __conv intel_sub_group_block_write4( __global uint* p, uint4 data ); +void __ovld __conv intel_sub_group_block_write8( __global uint* p, uint8 data ); + +#ifdef cl_khr_fp16 +half __ovld __conv intel_sub_group_shuffle( half, uint ); +half __ovld __conv intel_sub_group_shuffle_down( half prev, half cur, uint ); +half __ovld __conv intel_sub_group_shuffle_up( half prev, half cur, uint ); +half __ovld __conv intel_sub_group_shuffle_xor( half, uint ); +#endif + +#if defined(cl_khr_fp64) +double __ovld __conv intel_sub_group_shuffle( double, uint ); +double __ovld __conv intel_sub_group_shuffle_down( double prev, double cur, uint ); +double __ovld __conv intel_sub_group_shuffle_up( double prev, double cur, uint ); +double __ovld __conv intel_sub_group_shuffle_xor( double, uint ); +#endif + +#endif //cl_intel_subgroups + +#if defined(cl_intel_subgroups_short) +short __ovld __conv intel_sub_group_broadcast( short , uint sub_group_local_id ); +short2 __ovld __conv intel_sub_group_broadcast( short2, uint sub_group_local_id ); +short3 __ovld __conv intel_sub_group_broadcast( short3, uint sub_group_local_id ); +short4 __ovld __conv intel_sub_group_broadcast( short4, uint sub_group_local_id ); +short8 __ovld __conv intel_sub_group_broadcast( short8, uint sub_group_local_id ); + +ushort __ovld __conv intel_sub_group_broadcast( ushort , uint sub_group_local_id ); +ushort2 __ovld __conv intel_sub_group_broadcast( ushort2, uint sub_group_local_id ); +ushort3 __ovld __conv intel_sub_group_broadcast( ushort3, uint sub_group_local_id ); +ushort4 __ovld __conv intel_sub_group_broadcast( ushort4, uint sub_group_local_id ); +ushort8 __ovld __conv intel_sub_group_broadcast( ushort8, uint sub_group_local_id ); + +short __ovld __conv intel_sub_group_shuffle( short , uint ); +short2 __ovld __conv intel_sub_group_shuffle( short2 , uint ); +short3 __ovld __conv intel_sub_group_shuffle( short3 , uint ); +short4 __ovld __conv intel_sub_group_shuffle( short4 , uint ); +short8 __ovld __conv intel_sub_group_shuffle( short8 , uint ); +short16 __ovld __conv intel_sub_group_shuffle( short16, uint); + +ushort __ovld __conv intel_sub_group_shuffle( ushort , uint ); +ushort2 __ovld __conv intel_sub_group_shuffle( ushort2 , uint ); +ushort3 __ovld __conv intel_sub_group_shuffle( ushort3 , uint ); +ushort4 __ovld __conv intel_sub_group_shuffle( ushort4 , uint ); +ushort8 __ovld __conv intel_sub_group_shuffle( ushort8 , uint ); +ushort16 __ovld __conv intel_sub_group_shuffle( ushort16, uint ); + +short __ovld __conv intel_sub_group_shuffle_down( short cur, short next, uint ); +short2 __ovld __conv intel_sub_group_shuffle_down( short2 cur, short2 next, uint ); +short3 __ovld __conv intel_sub_group_shuffle_down( short3 cur, short3 next, uint ); +short4 __ovld __conv intel_sub_group_shuffle_down( short4 cur, short4 next, uint ); +short8 __ovld __conv intel_sub_group_shuffle_down( short8 cur, short8 next, uint ); +short16 __ovld __conv intel_sub_group_shuffle_down( short16 cur, short16 next, uint ); + +ushort __ovld __conv intel_sub_group_shuffle_down( ushort cur, ushort next, uint ); +ushort2 __ovld __conv intel_sub_group_shuffle_down( ushort2 cur, ushort2 next, uint ); +ushort3 __ovld __conv intel_sub_group_shuffle_down( ushort3 cur, ushort3 next, uint ); +ushort4 __ovld __conv intel_sub_group_shuffle_down( ushort4 cur, ushort4 next, uint ); +ushort8 __ovld __conv intel_sub_group_shuffle_down( ushort8 cur, ushort8 next, uint ); +ushort16 __ovld __conv intel_sub_group_shuffle_down( ushort16 cur, ushort16 next, uint ); + +short __ovld __conv intel_sub_group_shuffle_up( short cur, short next, uint ); +short2 __ovld __conv intel_sub_group_shuffle_up( short2 cur, short2 next, uint ); +short3 __ovld __conv intel_sub_group_shuffle_up( short3 cur, short3 next, uint ); +short4 __ovld __conv intel_sub_group_shuffle_up( short4 cur, short4 next, uint ); +short8 __ovld __conv intel_sub_group_shuffle_up( short8 cur, short8 next, uint ); +short16 __ovld __conv intel_sub_group_shuffle_up( short16 cur, short16 next, uint ); + +ushort __ovld __conv intel_sub_group_shuffle_up( ushort cur, ushort next, uint ); +ushort2 __ovld __conv intel_sub_group_shuffle_up( ushort2 cur, ushort2 next, uint ); +ushort3 __ovld __conv intel_sub_group_shuffle_up( ushort3 cur, ushort3 next, uint ); +ushort4 __ovld __conv intel_sub_group_shuffle_up( ushort4 cur, ushort4 next, uint ); +ushort8 __ovld __conv intel_sub_group_shuffle_up( ushort8 cur, ushort8 next, uint ); +ushort16 __ovld __conv intel_sub_group_shuffle_up( ushort16 cur, ushort16 next, uint ); + +short __ovld __conv intel_sub_group_shuffle_xor( short , uint ); +short2 __ovld __conv intel_sub_group_shuffle_xor( short2 , uint ); +short3 __ovld __conv intel_sub_group_shuffle_xor( short3 , uint ); +short4 __ovld __conv intel_sub_group_shuffle_xor( short4 , uint ); +short8 __ovld __conv intel_sub_group_shuffle_xor( short8 , uint ); +short16 __ovld __conv intel_sub_group_shuffle_xor( short16, uint ); + +ushort __ovld __conv intel_sub_group_shuffle_xor( ushort , uint ); +ushort2 __ovld __conv intel_sub_group_shuffle_xor( ushort2 , uint ); +ushort3 __ovld __conv intel_sub_group_shuffle_xor( ushort3 , uint ); +ushort4 __ovld __conv intel_sub_group_shuffle_xor( ushort4 , uint ); +ushort8 __ovld __conv intel_sub_group_shuffle_xor( ushort8 , uint ); +ushort16 __ovld __conv intel_sub_group_shuffle_xor( ushort16, uint ); + +short __ovld __conv intel_sub_group_reduce_add( short x ); +ushort __ovld __conv intel_sub_group_reduce_add( ushort x ); +short __ovld __conv intel_sub_group_reduce_min( short x ); +ushort __ovld __conv intel_sub_group_reduce_min( ushort x ); +short __ovld __conv intel_sub_group_reduce_max( short x ); +ushort __ovld __conv intel_sub_group_reduce_max( ushort x ); + +short __ovld __conv intel_sub_group_scan_exclusive_add( short x ); +ushort __ovld __conv intel_sub_group_scan_exclusive_add( ushort x ); +short __ovld __conv intel_sub_group_scan_exclusive_min( short x ); +ushort __ovld __conv intel_sub_group_scan_exclusive_min( ushort x ); +short __ovld __conv intel_sub_group_scan_exclusive_max( short x ); +ushort __ovld __conv intel_sub_group_scan_exclusive_max( ushort x ); + +short __ovld __conv intel_sub_group_scan_inclusive_add( short x ); +ushort __ovld __conv intel_sub_group_scan_inclusive_add( ushort x ); +short __ovld __conv intel_sub_group_scan_inclusive_min( short x ); +ushort __ovld __conv intel_sub_group_scan_inclusive_min( ushort x ); +short __ovld __conv intel_sub_group_scan_inclusive_max( short x ); +ushort __ovld __conv intel_sub_group_scan_inclusive_max( ushort x ); + +#if defined(__opencl_c_images) +uint __ovld __conv intel_sub_group_block_read_ui(read_only image2d_t, int2); +uint2 __ovld __conv intel_sub_group_block_read_ui2(read_only image2d_t, int2); +uint4 __ovld __conv intel_sub_group_block_read_ui4(read_only image2d_t, int2); +uint8 __ovld __conv intel_sub_group_block_read_ui8(read_only image2d_t, int2); +#endif // defined(__opencl_c_images) + +#if defined(__opencl_c_read_write_images) +uint __ovld __conv intel_sub_group_block_read_ui(read_write image2d_t, int2); +uint2 __ovld __conv intel_sub_group_block_read_ui2(read_write image2d_t, int2); +uint4 __ovld __conv intel_sub_group_block_read_ui4(read_write image2d_t, int2); +uint8 __ovld __conv intel_sub_group_block_read_ui8(read_write image2d_t, int2); +#endif // defined(__opencl_c_read_write_images) + +uint __ovld __conv intel_sub_group_block_read_ui( const __global uint* p ); +uint2 __ovld __conv intel_sub_group_block_read_ui2( const __global uint* p ); +uint4 __ovld __conv intel_sub_group_block_read_ui4( const __global uint* p ); +uint8 __ovld __conv intel_sub_group_block_read_ui8( const __global uint* p ); + +#if defined(__opencl_c_images) +void __ovld __conv intel_sub_group_block_write_ui(read_only image2d_t, int2, uint); +void __ovld __conv intel_sub_group_block_write_ui2(read_only image2d_t, int2, uint2); +void __ovld __conv intel_sub_group_block_write_ui4(read_only image2d_t, int2, uint4); +void __ovld __conv intel_sub_group_block_write_ui8(read_only image2d_t, int2, uint8); +#endif //defined(__opencl_c_images) + +#if defined(__opencl_c_read_write_images) +void __ovld __conv intel_sub_group_block_write_ui(read_write image2d_t, int2, uint); +void __ovld __conv intel_sub_group_block_write_ui2(read_write image2d_t, int2, uint2); +void __ovld __conv intel_sub_group_block_write_ui4(read_write image2d_t, int2, uint4); +void __ovld __conv intel_sub_group_block_write_ui8(read_write image2d_t, int2, uint8); +#endif // defined(__opencl_c_read_write_images) + +void __ovld __conv intel_sub_group_block_write_ui( __global uint* p, uint data ); +void __ovld __conv intel_sub_group_block_write_ui2( __global uint* p, uint2 data ); +void __ovld __conv intel_sub_group_block_write_ui4( __global uint* p, uint4 data ); +void __ovld __conv intel_sub_group_block_write_ui8( __global uint* p, uint8 data ); + +#if defined(__opencl_c_images) +ushort __ovld __conv intel_sub_group_block_read_us(read_only image2d_t, int2); +ushort2 __ovld __conv intel_sub_group_block_read_us2(read_only image2d_t, int2); +ushort4 __ovld __conv intel_sub_group_block_read_us4(read_only image2d_t, int2); +ushort8 __ovld __conv intel_sub_group_block_read_us8(read_only image2d_t, int2); +#endif // defined(__opencl_c_images) + +#if defined(__opencl_c_read_write_images) +ushort __ovld __conv intel_sub_group_block_read_us(read_write image2d_t, int2); +ushort2 __ovld __conv intel_sub_group_block_read_us2(read_write image2d_t, int2); +ushort4 __ovld __conv intel_sub_group_block_read_us4(read_write image2d_t, int2); +ushort8 __ovld __conv intel_sub_group_block_read_us8(read_write image2d_t, int2); +#endif // defined(__opencl_c_read_write_images) + +ushort __ovld __conv intel_sub_group_block_read_us( const __global ushort* p ); +ushort2 __ovld __conv intel_sub_group_block_read_us2( const __global ushort* p ); +ushort4 __ovld __conv intel_sub_group_block_read_us4( const __global ushort* p ); +ushort8 __ovld __conv intel_sub_group_block_read_us8( const __global ushort* p ); + +#if defined(__opencl_c_images) +void __ovld __conv intel_sub_group_block_write_us(write_only image2d_t, int2, ushort); +void __ovld __conv intel_sub_group_block_write_us2(write_only image2d_t, int2, ushort2); +void __ovld __conv intel_sub_group_block_write_us4(write_only image2d_t, int2, ushort4); +void __ovld __conv intel_sub_group_block_write_us8(write_only image2d_t, int2, ushort8); +#endif // defined(__opencl_c_images) + +#if defined(__opencl_c_read_write_images) +void __ovld __conv intel_sub_group_block_write_us(read_write image2d_t, int2, ushort); +void __ovld __conv intel_sub_group_block_write_us2(read_write image2d_t, int2, ushort2); +void __ovld __conv intel_sub_group_block_write_us4(read_write image2d_t, int2, ushort4); +void __ovld __conv intel_sub_group_block_write_us8(read_write image2d_t, int2, ushort8); +#endif // defined(__opencl_c_read_write_images) + +void __ovld __conv intel_sub_group_block_write_us( __global ushort* p, ushort data ); +void __ovld __conv intel_sub_group_block_write_us2( __global ushort* p, ushort2 data ); +void __ovld __conv intel_sub_group_block_write_us4( __global ushort* p, ushort4 data ); +void __ovld __conv intel_sub_group_block_write_us8( __global ushort* p, ushort8 data ); +#endif // cl_intel_subgroups_short + +#ifdef cl_intel_device_side_avc_motion_estimation +#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : begin + +// MCE built-in functions +uchar __ovld +intel_sub_group_avc_mce_get_default_inter_base_multi_reference_penalty( + uchar slice_type, uchar qp); +ulong __ovld intel_sub_group_avc_mce_get_default_inter_shape_penalty( + uchar slice_type, uchar qp); +uchar __ovld intel_sub_group_avc_mce_get_default_inter_direction_penalty( + uchar slice_type, uchar qp); +uint __ovld intel_sub_group_avc_mce_get_default_intra_luma_shape_penalty( + uchar slice_type, uchar qp); +uint2 __ovld +intel_sub_group_avc_mce_get_default_inter_motion_vector_cost_table( + uchar slice_type, uchar qp); +uchar __ovld intel_sub_group_avc_mce_get_default_intra_luma_mode_penalty( + uchar slice_type, uchar qp); + +uint2 __ovld intel_sub_group_avc_mce_get_default_high_penalty_cost_table(); +uint2 __ovld intel_sub_group_avc_mce_get_default_medium_penalty_cost_table(); +uint2 __ovld intel_sub_group_avc_mce_get_default_low_penalty_cost_table(); +uint __ovld intel_sub_group_avc_mce_get_default_non_dc_luma_intra_penalty(); +uchar __ovld +intel_sub_group_avc_mce_get_default_intra_chroma_mode_base_penalty(); + +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_inter_shape_penalty( + ulong packed_shape_penalty, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_ac_only_haar( + intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_mce_payload_t payload); + +ulong __ovld intel_sub_group_avc_mce_get_motion_vectors( + intel_sub_group_avc_mce_result_t result); +ushort __ovld intel_sub_group_avc_mce_get_inter_distortions( + intel_sub_group_avc_mce_result_t result); +ushort __ovld intel_sub_group_avc_mce_get_best_inter_distortion( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_major_shape( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_minor_shapes( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_directions( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_motion_vector_count( + intel_sub_group_avc_mce_result_t result); +uint __ovld intel_sub_group_avc_mce_get_inter_reference_ids( + intel_sub_group_avc_mce_result_t result); +uchar __ovld +intel_sub_group_avc_mce_get_inter_reference_interlaced_field_polarities( + uint packed_reference_ids, uint packed_reference_parameter_field_polarities, + intel_sub_group_avc_mce_result_t result); + +// IME built-in functions +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_initialize( + ushort2 src_coord, uchar partition_mask, uchar sad_adjustment); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_single_reference( + short2 ref_offset, uchar search_window_config, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_dual_reference( + short2 fwd_ref_offset, short2 bwd_ref_offset, uchar search_window_config, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_max_motion_vector_count( + uchar max_motion_vector_count, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_unidirectional_mix_disable( + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_early_search_termination_threshold( + uchar threshold, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_weighted_sad( + uint packed_sad_weights, intel_sub_group_avc_ime_payload_t payload); + +__attribute__((deprecated("If you use the latest Intel driver, please use " + "intel_sub_group_avc_ime_ref_window_size instead", + "intel_sub_group_avc_ime_ref_window_size"))) +ushort2 __ovld +intel_sub_group_ime_ref_window_size(uchar search_window_config, char dual_ref); +ushort2 __ovld intel_sub_group_avc_ime_ref_window_size( + uchar search_window_config, char dual_ref); +short2 __ovld intel_sub_group_avc_ime_adjust_ref_offset( + short2 ref_offset, ushort2 src_coord, ushort2 ref_window_size, + ushort2 image_size); + +#if defined(__opencl_c_images) +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_single_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference_streamout( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_dual_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference_streamout( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference_streamin( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_single_reference_streamin_t streamin_components); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference_streamin( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_dual_reference_streamin_t streamin_components); +intel_sub_group_avc_ime_result_single_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference_streaminout( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_single_reference_streamin_t streamin_components); +intel_sub_group_avc_ime_result_dual_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference_streaminout( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_dual_reference_streamin_t streamin_components); +#endif + +intel_sub_group_avc_ime_single_reference_streamin_t __ovld +intel_sub_group_avc_ime_get_single_reference_streamin( + intel_sub_group_avc_ime_result_single_reference_streamout_t result); +intel_sub_group_avc_ime_dual_reference_streamin_t __ovld +intel_sub_group_avc_ime_get_dual_reference_streamin( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_strip_single_reference_streamout( + intel_sub_group_avc_ime_result_single_reference_streamout_t result); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_strip_dual_reference_streamout( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result); + +uint __ovld intel_sub_group_avc_ime_get_streamout_major_shape_motion_vectors( + intel_sub_group_avc_ime_result_single_reference_streamout_t result, + uchar major_shape); +ushort __ovld intel_sub_group_avc_ime_get_streamout_major_shape_distortions( + intel_sub_group_avc_ime_result_single_reference_streamout_t result, + uchar major_shape); +uchar __ovld intel_sub_group_avc_ime_get_streamout_major_shape_reference_ids( + intel_sub_group_avc_ime_result_single_reference_streamout_t result, + uchar major_shape); +uint __ovld intel_sub_group_avc_ime_get_streamout_major_shape_motion_vectors( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result, + uchar major_shape, uchar direction); +ushort __ovld intel_sub_group_avc_ime_get_streamout_major_shape_distortions( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result, + uchar major_shape, uchar direction); +uchar __ovld intel_sub_group_avc_ime_get_streamout_major_shape_reference_ids( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result, + uchar major_shape, uchar direction); + +uchar __ovld intel_sub_group_avc_ime_get_border_reached( + uchar image_select, intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ime_get_truncated_search_indication( + intel_sub_group_avc_ime_result_t result); +uchar __ovld +intel_sub_group_avc_ime_get_unidirectional_early_search_termination( + intel_sub_group_avc_ime_result_t result); +uint __ovld intel_sub_group_avc_ime_get_weighting_pattern_minimum_motion_vector( + intel_sub_group_avc_ime_result_t result); +ushort __ovld intel_sub_group_avc_ime_get_weighting_pattern_minimum_distortion( + intel_sub_group_avc_ime_result_t result); + +// REF built-in functions +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_fme_initialize( + ushort2 src_coord, ulong motion_vectors, uchar major_shapes, + uchar minor_shapes, uchar directions, uchar pixel_resolution, + uchar sad_adjustment); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_bme_initialize( + ushort2 src_coord, ulong motion_vectors, uchar major_shapes, + uchar minor_shapes, uchar directions, uchar pixel_resolution, + uchar bidirectional_weight, uchar sad_adjustment); + +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_bidirectional_mix_disable( + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_bilinear_filter_enable( + intel_sub_group_avc_ref_payload_t payload); + +#if defined(__opencl_c_images) +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_single_reference( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_dual_reference( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + sampler_t vme_media_sampler, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + uchar packed_reference_field_polarities, sampler_t vme_media_sampler, + intel_sub_group_avc_ref_payload_t payload); +#endif //defined(__opencl_c_images) + +// SIC built-in functions +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_initialize( + ushort2 src_coord); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_configure_skc( + uint skip_block_partition_type, uint skip_motion_vector_mask, + ulong motion_vectors, uchar bidirectional_weight, uchar skip_sad_adjustment, + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld intel_sub_group_avc_sic_configure_ipe( + uchar luma_intra_partition_mask, uchar intra_neighbour_availability, + uchar left_edge_luma_pixels, uchar upper_left_corner_luma_pixel, + uchar upper_edge_luma_pixels, uchar upper_right_edge_luma_pixels, + uchar intra_sad_adjustment, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld intel_sub_group_avc_sic_configure_ipe( + uchar luma_intra_partition_mask, uchar intra_neighbour_availability, + uchar left_edge_luma_pixels, uchar upper_left_corner_luma_pixel, + uchar upper_edge_luma_pixels, uchar upper_right_edge_luma_pixels, + ushort left_edge_chroma_pixels, ushort upper_left_corner_chroma_pixel, + ushort upper_edge_chroma_pixels, uchar intra_sad_adjustment, + intel_sub_group_avc_sic_payload_t payload); +uint __ovld +intel_sub_group_avc_sic_get_motion_vector_mask( + uint skip_block_partition_type, uchar direction); + +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_intra_luma_shape_penalty( + uint packed_shape_cost, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_intra_luma_mode_cost_function( + uchar luma_mode_penalty, uint luma_packed_neighbor_modes, + uint luma_packed_non_dc_penalty, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_intra_chroma_mode_cost_function( + uchar chroma_mode_penalty, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_skc_bilinear_filter_enable( + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_skc_forward_transform_enable( + ulong packed_sad_coefficients, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_block_based_raw_skip_sad( + uchar block_based_skip_type, + intel_sub_group_avc_sic_payload_t payload); + +#if defined(__opencl_c_images) +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_ipe( + read_only image2d_t src_image, sampler_t vme_media_sampler, + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_single_reference( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_dual_reference( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + sampler_t vme_media_sampler, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + uchar packed_reference_field_polarities, sampler_t vme_media_sampler, + intel_sub_group_avc_sic_payload_t payload); +#endif //defined(__opencl_c_images) + +uchar __ovld intel_sub_group_avc_sic_get_ipe_luma_shape( + intel_sub_group_avc_sic_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_best_ipe_luma_distortion( + intel_sub_group_avc_sic_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_best_ipe_chroma_distortion( + intel_sub_group_avc_sic_result_t result); +ulong __ovld intel_sub_group_avc_sic_get_packed_ipe_luma_modes( + intel_sub_group_avc_sic_result_t result); +uchar __ovld intel_sub_group_avc_sic_get_ipe_chroma_mode( + intel_sub_group_avc_sic_result_t result); +uint __ovld intel_sub_group_avc_sic_get_packed_skc_luma_count_threshold( + intel_sub_group_avc_sic_result_t result); +ulong __ovld intel_sub_group_avc_sic_get_packed_skc_luma_sum_threshold( + intel_sub_group_avc_sic_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_inter_raw_sads( + intel_sub_group_avc_sic_result_t result); + +// Wrappers +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_inter_shape_penalty( + ulong packed_shape_cost, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_inter_shape_penalty( + ulong packed_shape_cost, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_inter_shape_penalty( + ulong packed_shape_cost, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_ac_only_haar( + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_ac_only_haar( + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_ac_only_haar( + intel_sub_group_avc_sic_payload_t payload); + +ulong __ovld intel_sub_group_avc_ime_get_motion_vectors( + intel_sub_group_avc_ime_result_t result); +ulong __ovld intel_sub_group_avc_ref_get_motion_vectors( + intel_sub_group_avc_ref_result_t result); + +ushort __ovld intel_sub_group_avc_ime_get_inter_distortions( + intel_sub_group_avc_ime_result_t result); +ushort __ovld intel_sub_group_avc_ref_get_inter_distortions( + intel_sub_group_avc_ref_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_inter_distortions( + intel_sub_group_avc_sic_result_t result); + +ushort __ovld intel_sub_group_avc_ime_get_best_inter_distortion( + intel_sub_group_avc_ime_result_t result); +ushort __ovld intel_sub_group_avc_ref_get_best_inter_distortion( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld intel_sub_group_avc_ime_get_inter_major_shape( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_major_shape( + intel_sub_group_avc_ref_result_t result); +uchar __ovld intel_sub_group_avc_ime_get_inter_minor_shapes( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_minor_shapes( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld intel_sub_group_avc_ime_get_inter_directions( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_directions( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld intel_sub_group_avc_ime_get_inter_motion_vector_count( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_motion_vector_count( + intel_sub_group_avc_ref_result_t result); + +uint __ovld intel_sub_group_avc_ime_get_inter_reference_ids( + intel_sub_group_avc_ime_result_t result); +uint __ovld intel_sub_group_avc_ref_get_inter_reference_ids( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld +intel_sub_group_avc_ime_get_inter_reference_interlaced_field_polarities( + uint packed_reference_ids, uint packed_reference_parameter_field_polarities, + intel_sub_group_avc_ime_result_t result); +uchar __ovld +intel_sub_group_avc_ref_get_inter_reference_interlaced_field_polarities( + uint packed_reference_ids, uint packed_reference_parameter_field_polarities, + intel_sub_group_avc_ref_result_t result); + +// Type conversion functions +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_ime_convert_to_mce_payload( + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_mce_convert_to_ime_payload( + intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_ref_convert_to_mce_payload( + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_mce_convert_to_ref_payload( + intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_sic_convert_to_mce_payload( + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_mce_convert_to_sic_payload( + intel_sub_group_avc_mce_payload_t payload); + +intel_sub_group_avc_mce_result_t __ovld +intel_sub_group_avc_ime_convert_to_mce_result( + intel_sub_group_avc_ime_result_t result); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_mce_convert_to_ime_result( + intel_sub_group_avc_mce_result_t result); +intel_sub_group_avc_mce_result_t __ovld +intel_sub_group_avc_ref_convert_to_mce_result( + intel_sub_group_avc_ref_result_t result); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_mce_convert_to_ref_result( + intel_sub_group_avc_mce_result_t result); +intel_sub_group_avc_mce_result_t __ovld +intel_sub_group_avc_sic_convert_to_mce_result( + intel_sub_group_avc_sic_result_t result); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_mce_convert_to_sic_result( + intel_sub_group_avc_mce_result_t result); +#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : end +#endif // cl_intel_device_side_avc_motion_estimation + +#ifdef cl_amd_media_ops +uint __ovld amd_bitalign(uint, uint, uint); +uint2 __ovld amd_bitalign(uint2, uint2, uint2); +uint3 __ovld amd_bitalign(uint3, uint3, uint3); +uint4 __ovld amd_bitalign(uint4, uint4, uint4); +uint8 __ovld amd_bitalign(uint8, uint8, uint8); +uint16 __ovld amd_bitalign(uint16, uint16, uint16); + +uint __ovld amd_bytealign(uint, uint, uint); +uint2 __ovld amd_bytealign(uint2, uint2, uint2); +uint3 __ovld amd_bytealign(uint3, uint3, uint3); +uint4 __ovld amd_bytealign(uint4, uint4, uint4); +uint8 __ovld amd_bytealign(uint8, uint8, uint8); +uint16 __ovld amd_bytealign(uint16, uint16, uint16); + +uint __ovld amd_lerp(uint, uint, uint); +uint2 __ovld amd_lerp(uint2, uint2, uint2); +uint3 __ovld amd_lerp(uint3, uint3, uint3); +uint4 __ovld amd_lerp(uint4, uint4, uint4); +uint8 __ovld amd_lerp(uint8, uint8, uint8); +uint16 __ovld amd_lerp(uint16, uint16, uint16); + +uint __ovld amd_pack(float4 v); + +uint __ovld amd_sad4(uint4, uint4, uint); + +uint __ovld amd_sadhi(uint, uint, uint); +uint2 __ovld amd_sadhi(uint2, uint2, uint2); +uint3 __ovld amd_sadhi(uint3, uint3, uint3); +uint4 __ovld amd_sadhi(uint4, uint4, uint4); +uint8 __ovld amd_sadhi(uint8, uint8, uint8); +uint16 __ovld amd_sadhi(uint16, uint16, uint16); + +uint __ovld amd_sad(uint, uint, uint); +uint2 __ovld amd_sad(uint2, uint2, uint2); +uint3 __ovld amd_sad(uint3, uint3, uint3); +uint4 __ovld amd_sad(uint4, uint4, uint4); +uint8 __ovld amd_sad(uint8, uint8, uint8); +uint16 __ovld amd_sad(uint16, uint16, uint16); + +float __ovld amd_unpack0(uint); +float2 __ovld amd_unpack0(uint2); +float3 __ovld amd_unpack0(uint3); +float4 __ovld amd_unpack0(uint4); +float8 __ovld amd_unpack0(uint8); +float16 __ovld amd_unpack0(uint16); + +float __ovld amd_unpack1(uint); +float2 __ovld amd_unpack1(uint2); +float3 __ovld amd_unpack1(uint3); +float4 __ovld amd_unpack1(uint4); +float8 __ovld amd_unpack1(uint8); +float16 __ovld amd_unpack1(uint16); + +float __ovld amd_unpack2(uint); +float2 __ovld amd_unpack2(uint2); +float3 __ovld amd_unpack2(uint3); +float4 __ovld amd_unpack2(uint4); +float8 __ovld amd_unpack2(uint8); +float16 __ovld amd_unpack2(uint16); + +float __ovld amd_unpack3(uint); +float2 __ovld amd_unpack3(uint2); +float3 __ovld amd_unpack3(uint3); +float4 __ovld amd_unpack3(uint4); +float8 __ovld amd_unpack3(uint8); +float16 __ovld amd_unpack3(uint16); +#endif // cl_amd_media_ops + +#ifdef cl_amd_media_ops2 +int __ovld amd_bfe(int src0, uint src1, uint src2); +int2 __ovld amd_bfe(int2 src0, uint2 src1, uint2 src2); +int3 __ovld amd_bfe(int3 src0, uint3 src1, uint3 src2); +int4 __ovld amd_bfe(int4 src0, uint4 src1, uint4 src2); +int8 __ovld amd_bfe(int8 src0, uint8 src1, uint8 src2); +int16 __ovld amd_bfe(int16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_bfe(uint src0, uint src1, uint src2); +uint2 __ovld amd_bfe(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_bfe(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_bfe(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_bfe(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_bfe(uint16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_bfm(uint src0, uint src1); +uint2 __ovld amd_bfm(uint2 src0, uint2 src1); +uint3 __ovld amd_bfm(uint3 src0, uint3 src1); +uint4 __ovld amd_bfm(uint4 src0, uint4 src1); +uint8 __ovld amd_bfm(uint8 src0, uint8 src1); +uint16 __ovld amd_bfm(uint16 src0, uint16 src1); + +float __ovld amd_max3(float src0, float src1, float src2); +float2 __ovld amd_max3(float2 src0, float2 src1, float2 src2); +float3 __ovld amd_max3(float3 src0, float3 src1, float3 src2); +float4 __ovld amd_max3(float4 src0, float4 src1, float4 src2); +float8 __ovld amd_max3(float8 src0, float8 src1, float8 src2); +float16 __ovld amd_max3(float16 src0, float16 src1, float16 src2); + +int __ovld amd_max3(int src0, int src1, int src2); +int2 __ovld amd_max3(int2 src0, int2 src1, int2 src2); +int3 __ovld amd_max3(int3 src0, int3 src1, int3 src2); +int4 __ovld amd_max3(int4 src0, int4 src1, int4 src2); +int8 __ovld amd_max3(int8 src0, int8 src1, int8 src2); +int16 __ovld amd_max3(int16 src0, int16 src1, int16 src2); + +uint __ovld amd_max3(uint src0, uint src1, uint src2); +uint2 __ovld amd_max3(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_max3(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_max3(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_max3(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_max3(uint16 src0, uint16 src1, uint16 src2); + +float __ovld amd_median3(float src0, float src1, float src2); +float2 __ovld amd_median3(float2 src0, float2 src1, float2 src2); +float3 __ovld amd_median3(float3 src0, float3 src1, float3 src2); +float4 __ovld amd_median3(float4 src0, float4 src1, float4 src2); +float8 __ovld amd_median3(float8 src0, float8 src1, float8 src2); +float16 __ovld amd_median3(float16 src0, float16 src1, float16 src2); + +int __ovld amd_median3(int src0, int src1, int src2); +int2 __ovld amd_median3(int2 src0, int2 src1, int2 src2); +int3 __ovld amd_median3(int3 src0, int3 src1, int3 src2); +int4 __ovld amd_median3(int4 src0, int4 src1, int4 src2); +int8 __ovld amd_median3(int8 src0, int8 src1, int8 src2); +int16 __ovld amd_median3(int16 src0, int16 src1, int16 src2); + +uint __ovld amd_median3(uint src0, uint src1, uint src2); +uint2 __ovld amd_median3(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_median3(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_median3(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_median3(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_median3(uint16 src0, uint16 src1, uint16 src2); + +float __ovld amd_min3(float src0, float src1, float src); +float2 __ovld amd_min3(float2 src0, float2 src1, float2 src); +float3 __ovld amd_min3(float3 src0, float3 src1, float3 src); +float4 __ovld amd_min3(float4 src0, float4 src1, float4 src); +float8 __ovld amd_min3(float8 src0, float8 src1, float8 src); +float16 __ovld amd_min3(float16 src0, float16 src1, float16 src); + +int __ovld amd_min3(int src0, int src1, int src2); +int2 __ovld amd_min3(int2 src0, int2 src1, int2 src2); +int3 __ovld amd_min3(int3 src0, int3 src1, int3 src2); +int4 __ovld amd_min3(int4 src0, int4 src1, int4 src2); +int8 __ovld amd_min3(int8 src0, int8 src1, int8 src2); +int16 __ovld amd_min3(int16 src0, int16 src1, int16 src2); + +uint __ovld amd_min3(uint src0, uint src1, uint src2); +uint2 __ovld amd_min3(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_min3(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_min3(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_min3(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_min3(uint16 src0, uint16 src1, uint16 src2); + +ulong __ovld amd_mqsad(ulong src0, uint src1, ulong src2); +ulong2 __ovld amd_mqsad(ulong2 src0, uint2 src1, ulong2 src2); +ulong3 __ovld amd_mqsad(ulong3 src0, uint3 src1, ulong3 src2); +ulong4 __ovld amd_mqsad(ulong4 src0, uint4 src1, ulong4 src2); +ulong8 __ovld amd_mqsad(ulong8 src0, uint8 src1, ulong8 src2); +ulong16 __ovld amd_mqsad(ulong16 src0, uint16 src1, ulong16 src2); + +ulong __ovld amd_qsad(ulong src0, uint src1, ulong src2); +ulong2 __ovld amd_qsad(ulong2 src0, uint2 src1, ulong2 src2); +ulong3 __ovld amd_qsad(ulong3 src0, uint3 src1, ulong3 src2); +ulong4 __ovld amd_qsad(ulong4 src0, uint4 src1, ulong4 src2); +ulong8 __ovld amd_qsad(ulong8 src0, uint8 src1, ulong8 src2); +ulong16 __ovld amd_qsad(ulong16 src0, uint16 src1, ulong16 src2); + +uint __ovld amd_msad(uint src0, uint src1, uint src2); +uint2 __ovld amd_msad(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_msad(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_msad(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_msad(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_msad(uint16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_sadd(uint src0, uint src1, uint src2); +uint2 __ovld amd_sadd(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_sadd(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_sadd(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_sadd(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_sadd(uint16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_sadw(uint src0, uint src1, uint src2); +uint2 __ovld amd_sadw(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_sadw(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_sadw(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_sadw(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_sadw(uint16 src0, uint16 src1, uint16 src2); +#endif // cl_amd_media_ops2 + +#if defined(cl_arm_integer_dot_product_int8) +uint __ovld arm_dot(uchar4, uchar4); +int __ovld arm_dot(char4, char4); +#endif // defined(cl_arm_integer_dot_product_int8) + +#if defined(cl_arm_integer_dot_product_accumulate_int8) +uint __ovld arm_dot_acc(uchar4, uchar4, uint); +int __ovld arm_dot_acc(char4, char4, int); +#endif // defined(cl_arm_integer_dot_product_accumulate_int8) + +#if defined(cl_arm_integer_dot_product_accumulate_int16) +uint __ovld arm_dot_acc(ushort2, ushort2, uint); +int __ovld arm_dot_acc(short2, short2, int); +#endif // defined(cl_arm_integer_dot_product_accumulate_int16) + +#if defined(cl_arm_integer_dot_product_accumulate_saturate_int8) +uint __ovld arm_dot_acc_sat(uchar4, uchar4, uint); +int __ovld arm_dot_acc_sat(char4, char4, int); +#endif // defined(cl_arm_integer_dot_product_accumulate_saturate_int8) + +// Disable any extensions we may have enabled previously. +#pragma OPENCL EXTENSION all : disable + +#undef __opencl_c_named_address_space_builtins + +#undef __cnfn +#undef __ovld +#endif //_OPENCL_H_ diff --git a/llvm/lib/clang/19/include/openmp_wrappers/__clang_openmp_device_functions.h b/llvm/lib/clang/19/include/openmp_wrappers/__clang_openmp_device_functions.h new file mode 100644 index 0000000000000000000000000000000000000000..d5b6846b034885964e007cd1acfd5a61ee89c747 --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/__clang_openmp_device_functions.h @@ -0,0 +1,105 @@ +/*===- __clang_openmp_device_functions.h - OpenMP device function declares -=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_OPENMP_DEVICE_FUNCTIONS_H__ +#define __CLANG_OPENMP_DEVICE_FUNCTIONS_H__ + +#ifndef _OPENMP +#error "This file is for OpenMP compilation only." +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#pragma omp begin declare variant match( \ + device = {arch(nvptx, nvptx64)}, implementation = {extension(match_any)}) + +#define __CUDA__ +#define __OPENMP_NVPTX__ + +/// Include declarations for libdevice functions. +#include <__clang_cuda_libdevice_declares.h> + +/// Provide definitions for these functions. +#include <__clang_cuda_device_functions.h> + +#undef __OPENMP_NVPTX__ +#undef __CUDA__ + +#pragma omp end declare variant + +#ifdef __AMDGCN__ +#pragma omp begin declare variant match(device = {arch(amdgcn)}) + +// Import types which will be used by __clang_hip_libdevice_declares.h +#ifndef __cplusplus +#include +#endif + +#define __OPENMP_AMDGCN__ +#pragma push_macro("__device__") +#define __device__ + +/// Include declarations for libdevice functions. +#include <__clang_hip_libdevice_declares.h> + +#pragma pop_macro("__device__") +#undef __OPENMP_AMDGCN__ + +#pragma omp end declare variant +#endif + +#ifdef __cplusplus +} // extern "C" +#endif + +// Ensure we make `_ZdlPv`, aka. `operator delete(void*)` available without the +// need to `include ` in C++ mode. +#ifdef __cplusplus + +// We require malloc/free. +#include + +#pragma push_macro("OPENMP_NOEXCEPT") +#if __cplusplus >= 201103L +#define OPENMP_NOEXCEPT noexcept +#else +#define OPENMP_NOEXCEPT +#endif + +// Device overrides for non-placement new and delete. +inline void *operator new(__SIZE_TYPE__ size) { + if (size == 0) + size = 1; + return ::malloc(size); +} + +inline void *operator new[](__SIZE_TYPE__ size) { return ::operator new(size); } + +inline void operator delete(void *ptr)OPENMP_NOEXCEPT { ::free(ptr); } + +inline void operator delete[](void *ptr) OPENMP_NOEXCEPT { + ::operator delete(ptr); +} + +// Sized delete, C++14 only. +#if __cplusplus >= 201402L +inline void operator delete(void *ptr, __SIZE_TYPE__ size)OPENMP_NOEXCEPT { + ::operator delete(ptr); +} +inline void operator delete[](void *ptr, __SIZE_TYPE__ size) OPENMP_NOEXCEPT { + ::operator delete(ptr); +} +#endif + +#pragma pop_macro("OPENMP_NOEXCEPT") +#endif + +#endif diff --git a/llvm/lib/clang/19/include/openmp_wrappers/cmath b/llvm/lib/clang/19/include/openmp_wrappers/cmath new file mode 100644 index 0000000000000000000000000000000000000000..e1b71516e72c2e0e7f23c506e2350b9a5b628cd6 --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/cmath @@ -0,0 +1,132 @@ +/*===-- __clang_openmp_device_functions.h - OpenMP math declares -*- c++ -*-=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_OPENMP_CMATH_H__ +#define __CLANG_OPENMP_CMATH_H__ + +#ifndef _OPENMP +#error "This file is for OpenMP compilation only." +#endif + +#include_next + +// Make sure we include our math.h overlay, it probably happend already but we +// need to be sure. +#include + +// We (might) need cstdlib because __clang_cuda_cmath.h below declares `abs` +// which might live in cstdlib. +#include + +// We need limits because __clang_cuda_cmath.h below uses `std::numeric_limit`. +#include + +#pragma omp begin declare variant match( \ + device = {arch(nvptx, nvptx64)}, implementation = {extension(match_any, allow_templates)}) + +#define __CUDA__ +#define __OPENMP_NVPTX__ +#include <__clang_cuda_cmath.h> +#undef __OPENMP_NVPTX__ +#undef __CUDA__ + +// Overloads not provided by the CUDA wrappers but by the CUDA system headers. +// Since we do not include the latter we define them ourselves. +#define __DEVICE__ static constexpr __attribute__((always_inline, nothrow)) + +__DEVICE__ float acosh(float __x) { return ::acoshf(__x); } +__DEVICE__ float asinh(float __x) { return ::asinhf(__x); } +__DEVICE__ float atanh(float __x) { return ::atanhf(__x); } +__DEVICE__ float cbrt(float __x) { return ::cbrtf(__x); } +__DEVICE__ float erf(float __x) { return ::erff(__x); } +__DEVICE__ float erfc(float __x) { return ::erfcf(__x); } +__DEVICE__ float exp2(float __x) { return ::exp2f(__x); } +__DEVICE__ float expm1(float __x) { return ::expm1f(__x); } +__DEVICE__ float fdim(float __x, float __y) { return ::fdimf(__x, __y); } +__DEVICE__ float hypot(float __x, float __y) { return ::hypotf(__x, __y); } +__DEVICE__ int ilogb(float __x) { return ::ilogbf(__x); } +__DEVICE__ float lgamma(float __x) { return ::lgammaf(__x); } +__DEVICE__ long long int llrint(float __x) { return ::llrintf(__x); } +__DEVICE__ long long int llround(float __x) { return ::llroundf(__x); } +__DEVICE__ float log1p(float __x) { return ::log1pf(__x); } +__DEVICE__ float log2(float __x) { return ::log2f(__x); } +__DEVICE__ float logb(float __x) { return ::logbf(__x); } +__DEVICE__ long int lrint(float __x) { return ::lrintf(__x); } +__DEVICE__ long int lround(float __x) { return ::lroundf(__x); } +__DEVICE__ float nextafter(float __x, float __y) { + return ::nextafterf(__x, __y); +} +__DEVICE__ float remainder(float __x, float __y) { + return ::remainderf(__x, __y); +} +__DEVICE__ float scalbln(float __x, long int __y) { + return ::scalblnf(__x, __y); +} +__DEVICE__ float scalbn(float __x, int __y) { return ::scalbnf(__x, __y); } +__DEVICE__ float tgamma(float __x) { return ::tgammaf(__x); } + +#undef __DEVICE__ + +#pragma omp end declare variant + +#ifdef __AMDGCN__ +#pragma omp begin declare variant match(device = {arch(amdgcn)}) + +#pragma push_macro("__constant__") +#define __constant__ __attribute__((constant)) +#define __OPENMP_AMDGCN__ + +#include <__clang_hip_cmath.h> + +#pragma pop_macro("__constant__") +#undef __OPENMP_AMDGCN__ + +// Define overloads otherwise which are absent +#define __DEVICE__ static constexpr __attribute__((always_inline, nothrow)) + +__DEVICE__ float acos(float __x) { return ::acosf(__x); } +__DEVICE__ float acosh(float __x) { return ::acoshf(__x); } +__DEVICE__ float asin(float __x) { return ::asinf(__x); } +__DEVICE__ float asinh(float __x) { return ::asinhf(__x); } +__DEVICE__ float atan(float __x) { return ::atanf(__x); } +__DEVICE__ float atan2(float __x, float __y) { return ::atan2f(__x, __y); } +__DEVICE__ float atanh(float __x) { return ::atanhf(__x); } +__DEVICE__ float cbrt(float __x) { return ::cbrtf(__x); } +__DEVICE__ float cosh(float __x) { return ::coshf(__x); } +__DEVICE__ float erf(float __x) { return ::erff(__x); } +__DEVICE__ float erfc(float __x) { return ::erfcf(__x); } +__DEVICE__ float exp2(float __x) { return ::exp2f(__x); } +__DEVICE__ float expm1(float __x) { return ::expm1f(__x); } +__DEVICE__ float fdim(float __x, float __y) { return ::fdimf(__x, __y); } +__DEVICE__ float hypot(float __x, float __y) { return ::hypotf(__x, __y); } +__DEVICE__ int ilogb(float __x) { return ::ilogbf(__x); } +__DEVICE__ float ldexp(float __arg, int __exp) { + return ::ldexpf(__arg, __exp); +} +__DEVICE__ float lgamma(float __x) { return ::lgammaf(__x); } +__DEVICE__ float log1p(float __x) { return ::log1pf(__x); } +__DEVICE__ float logb(float __x) { return ::logbf(__x); } +__DEVICE__ float nextafter(float __x, float __y) { + return ::nextafterf(__x, __y); +} +__DEVICE__ float remainder(float __x, float __y) { + return ::remainderf(__x, __y); +} +__DEVICE__ float scalbn(float __x, int __y) { return ::scalbnf(__x, __y); } +__DEVICE__ float sinh(float __x) { return ::sinhf(__x); } +__DEVICE__ float tan(float __x) { return ::tanf(__x); } +__DEVICE__ float tanh(float __x) { return ::tanhf(__x); } +__DEVICE__ float tgamma(float __x) { return ::tgammaf(__x); } + +#undef __DEVICE__ + +#pragma omp end declare variant +#endif // __AMDGCN__ + +#endif diff --git a/llvm/lib/clang/19/include/openmp_wrappers/complex b/llvm/lib/clang/19/include/openmp_wrappers/complex new file mode 100644 index 0000000000000000000000000000000000000000..1ceecc1af8aeca00045e3736e6cb4941d808814f --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/complex @@ -0,0 +1,55 @@ +/*===-- complex --- OpenMP complex wrapper for target regions --------- c++ -=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_OPENMP_COMPLEX__ +#define __CLANG_OPENMP_COMPLEX__ + +#ifndef _OPENMP +#error "This file is for OpenMP compilation only." +#endif + +// We require std::math functions in the complex builtins below. +#include + +#ifdef __NVPTX__ +#define __OPENMP_NVPTX__ +#include <__clang_cuda_complex_builtins.h> +#undef __OPENMP_NVPTX__ +#endif // __NVPTX__ + +#ifdef __AMDGCN__ +#define __OPENMP_AMDGCN__ +#include <__clang_cuda_complex_builtins.h> +#undef __OPENMP_AMDGCN__ +#endif // __AMDGCN__ + +#endif + +// Grab the host header too. +#include_next + +// If we are compiling against libc++, the macro _LIBCPP_STD_VER should be set +// after including above. Since the complex header we use is a +// simplified version of the libc++, we don't need it in this case. If we +// compile against libstdc++, or any other standard library, we will overload +// the (hopefully template) functions in the header with the ones we +// got from libc++ which decomposes math functions, like `std::sin`, into +// arithmetic and calls to non-complex functions, all of which we can then +// handle. +#ifndef _LIBCPP_STD_VER + +#pragma omp begin declare variant match( \ + device = {arch(amdgcn, nvptx, nvptx64)}, \ + implementation = {extension(match_any, allow_templates)}) + +#include + +#pragma omp end declare variant + +#endif // _LIBCPP_STD_VER diff --git a/llvm/lib/clang/19/include/openmp_wrappers/complex.h b/llvm/lib/clang/19/include/openmp_wrappers/complex.h new file mode 100644 index 0000000000000000000000000000000000000000..7e7c0866426bc9ec9ffb9e41f11c1c8b6c079243 --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/complex.h @@ -0,0 +1,35 @@ +/*===-- complex --- OpenMP complex wrapper for target regions --------- c++ -=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_OPENMP_COMPLEX_H__ +#define __CLANG_OPENMP_COMPLEX_H__ + +#ifndef _OPENMP +#error "This file is for OpenMP compilation only." +#endif + +// We require math functions in the complex builtins below. +#include + +#ifdef __NVPTX__ +#define __OPENMP_NVPTX__ +#include <__clang_cuda_complex_builtins.h> +#undef __OPENMP_NVPTX__ +#endif + +#ifdef __AMDGCN__ +#define __OPENMP_AMDGCN__ +#include <__clang_cuda_complex_builtins.h> +#undef __OPENMP_AMDGCN__ +#endif + +#endif + +// Grab the host header too. +#include_next diff --git a/llvm/lib/clang/19/include/openmp_wrappers/complex_cmath.h b/llvm/lib/clang/19/include/openmp_wrappers/complex_cmath.h new file mode 100644 index 0000000000000000000000000000000000000000..e3d9aebbbc2436a3acb0a81554f6994c2d14560f --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/complex_cmath.h @@ -0,0 +1,388 @@ +//===------------------------- __complex_cmath.h --------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// std::complex header copied from the libcxx source and simplified for use in +// OpenMP target offload regions. +// +//===----------------------------------------------------------------------===// + +#ifndef _OPENMP +#error "This file is for OpenMP compilation only." +#endif + +#ifndef __cplusplus +#error "This file is for C++ compilation only." +#endif + +#ifndef _LIBCPP_COMPLEX +#define _LIBCPP_COMPLEX + +#include +#include + +#define __DEVICE__ static constexpr __attribute__((nothrow)) + +namespace std { + +// abs + +template __DEVICE__ _Tp abs(const std::complex<_Tp> &__c) { + return hypot(__c.real(), __c.imag()); +} + +// arg + +template __DEVICE__ _Tp arg(const std::complex<_Tp> &__c) { + return atan2(__c.imag(), __c.real()); +} + +template +typename enable_if::value || is_same<_Tp, double>::value, + double>::type +arg(_Tp __re) { + return atan2(0., __re); +} + +template +typename enable_if::value, float>::type arg(_Tp __re) { + return atan2f(0.F, __re); +} + +// norm + +template __DEVICE__ _Tp norm(const std::complex<_Tp> &__c) { + if (std::isinf(__c.real())) + return abs(__c.real()); + if (std::isinf(__c.imag())) + return abs(__c.imag()); + return __c.real() * __c.real() + __c.imag() * __c.imag(); +} + +// conj + +template std::complex<_Tp> conj(const std::complex<_Tp> &__c) { + return std::complex<_Tp>(__c.real(), -__c.imag()); +} + +// proj + +template std::complex<_Tp> proj(const std::complex<_Tp> &__c) { + std::complex<_Tp> __r = __c; + if (std::isinf(__c.real()) || std::isinf(__c.imag())) + __r = std::complex<_Tp>(INFINITY, copysign(_Tp(0), __c.imag())); + return __r; +} + +// polar + +template +complex<_Tp> polar(const _Tp &__rho, const _Tp &__theta = _Tp()) { + if (std::isnan(__rho) || signbit(__rho)) + return std::complex<_Tp>(_Tp(NAN), _Tp(NAN)); + if (std::isnan(__theta)) { + if (std::isinf(__rho)) + return std::complex<_Tp>(__rho, __theta); + return std::complex<_Tp>(__theta, __theta); + } + if (std::isinf(__theta)) { + if (std::isinf(__rho)) + return std::complex<_Tp>(__rho, _Tp(NAN)); + return std::complex<_Tp>(_Tp(NAN), _Tp(NAN)); + } + _Tp __x = __rho * cos(__theta); + if (std::isnan(__x)) + __x = 0; + _Tp __y = __rho * sin(__theta); + if (std::isnan(__y)) + __y = 0; + return std::complex<_Tp>(__x, __y); +} + +// log + +template std::complex<_Tp> log(const std::complex<_Tp> &__x) { + return std::complex<_Tp>(log(abs(__x)), arg(__x)); +} + +// log10 + +template std::complex<_Tp> log10(const std::complex<_Tp> &__x) { + return log(__x) / log(_Tp(10)); +} + +// sqrt + +template +__DEVICE__ std::complex<_Tp> sqrt(const std::complex<_Tp> &__x) { + if (std::isinf(__x.imag())) + return std::complex<_Tp>(_Tp(INFINITY), __x.imag()); + if (std::isinf(__x.real())) { + if (__x.real() > _Tp(0)) + return std::complex<_Tp>(__x.real(), std::isnan(__x.imag()) + ? __x.imag() + : copysign(_Tp(0), __x.imag())); + return std::complex<_Tp>(std::isnan(__x.imag()) ? __x.imag() : _Tp(0), + copysign(__x.real(), __x.imag())); + } + return polar(sqrt(abs(__x)), arg(__x) / _Tp(2)); +} + +// exp + +template +__DEVICE__ std::complex<_Tp> exp(const std::complex<_Tp> &__x) { + _Tp __i = __x.imag(); + if (std::isinf(__x.real())) { + if (__x.real() < _Tp(0)) { + if (!std::isfinite(__i)) + __i = _Tp(1); + } else if (__i == 0 || !std::isfinite(__i)) { + if (std::isinf(__i)) + __i = _Tp(NAN); + return std::complex<_Tp>(__x.real(), __i); + } + } else if (std::isnan(__x.real()) && __x.imag() == 0) + return __x; + _Tp __e = exp(__x.real()); + return std::complex<_Tp>(__e * cos(__i), __e * sin(__i)); +} + +// pow + +template +std::complex<_Tp> pow(const std::complex<_Tp> &__x, + const std::complex<_Tp> &__y) { + return exp(__y * log(__x)); +} + +// __sqr, computes pow(x, 2) + +template std::complex<_Tp> __sqr(const std::complex<_Tp> &__x) { + return std::complex<_Tp>((__x.real() - __x.imag()) * + (__x.real() + __x.imag()), + _Tp(2) * __x.real() * __x.imag()); +} + +// asinh + +template +__DEVICE__ std::complex<_Tp> asinh(const std::complex<_Tp> &__x) { + const _Tp __pi(atan2(+0., -0.)); + if (std::isinf(__x.real())) { + if (std::isnan(__x.imag())) + return __x; + if (std::isinf(__x.imag())) + return std::complex<_Tp>(__x.real(), + copysign(__pi * _Tp(0.25), __x.imag())); + return std::complex<_Tp>(__x.real(), copysign(_Tp(0), __x.imag())); + } + if (std::isnan(__x.real())) { + if (std::isinf(__x.imag())) + return std::complex<_Tp>(__x.imag(), __x.real()); + if (__x.imag() == 0) + return __x; + return std::complex<_Tp>(__x.real(), __x.real()); + } + if (std::isinf(__x.imag())) + return std::complex<_Tp>(copysign(__x.imag(), __x.real()), + copysign(__pi / _Tp(2), __x.imag())); + std::complex<_Tp> __z = log(__x + sqrt(__sqr(__x) + _Tp(1))); + return std::complex<_Tp>(copysign(__z.real(), __x.real()), + copysign(__z.imag(), __x.imag())); +} + +// acosh + +template +__DEVICE__ std::complex<_Tp> acosh(const std::complex<_Tp> &__x) { + const _Tp __pi(atan2(+0., -0.)); + if (std::isinf(__x.real())) { + if (std::isnan(__x.imag())) + return std::complex<_Tp>(abs(__x.real()), __x.imag()); + if (std::isinf(__x.imag())) { + if (__x.real() > 0) + return std::complex<_Tp>(__x.real(), + copysign(__pi * _Tp(0.25), __x.imag())); + else + return std::complex<_Tp>(-__x.real(), + copysign(__pi * _Tp(0.75), __x.imag())); + } + if (__x.real() < 0) + return std::complex<_Tp>(-__x.real(), copysign(__pi, __x.imag())); + return std::complex<_Tp>(__x.real(), copysign(_Tp(0), __x.imag())); + } + if (std::isnan(__x.real())) { + if (std::isinf(__x.imag())) + return std::complex<_Tp>(abs(__x.imag()), __x.real()); + return std::complex<_Tp>(__x.real(), __x.real()); + } + if (std::isinf(__x.imag())) + return std::complex<_Tp>(abs(__x.imag()), + copysign(__pi / _Tp(2), __x.imag())); + std::complex<_Tp> __z = log(__x + sqrt(__sqr(__x) - _Tp(1))); + return std::complex<_Tp>(copysign(__z.real(), _Tp(0)), + copysign(__z.imag(), __x.imag())); +} + +// atanh + +template +__DEVICE__ std::complex<_Tp> atanh(const std::complex<_Tp> &__x) { + const _Tp __pi(atan2(+0., -0.)); + if (std::isinf(__x.imag())) { + return std::complex<_Tp>(copysign(_Tp(0), __x.real()), + copysign(__pi / _Tp(2), __x.imag())); + } + if (std::isnan(__x.imag())) { + if (std::isinf(__x.real()) || __x.real() == 0) + return std::complex<_Tp>(copysign(_Tp(0), __x.real()), __x.imag()); + return std::complex<_Tp>(__x.imag(), __x.imag()); + } + if (std::isnan(__x.real())) { + return std::complex<_Tp>(__x.real(), __x.real()); + } + if (std::isinf(__x.real())) { + return std::complex<_Tp>(copysign(_Tp(0), __x.real()), + copysign(__pi / _Tp(2), __x.imag())); + } + if (abs(__x.real()) == _Tp(1) && __x.imag() == _Tp(0)) { + return std::complex<_Tp>(copysign(_Tp(INFINITY), __x.real()), + copysign(_Tp(0), __x.imag())); + } + std::complex<_Tp> __z = log((_Tp(1) + __x) / (_Tp(1) - __x)) / _Tp(2); + return std::complex<_Tp>(copysign(__z.real(), __x.real()), + copysign(__z.imag(), __x.imag())); +} + +// sinh + +template +__DEVICE__ std::complex<_Tp> sinh(const std::complex<_Tp> &__x) { + if (std::isinf(__x.real()) && !std::isfinite(__x.imag())) + return std::complex<_Tp>(__x.real(), _Tp(NAN)); + if (__x.real() == 0 && !std::isfinite(__x.imag())) + return std::complex<_Tp>(__x.real(), _Tp(NAN)); + if (__x.imag() == 0 && !std::isfinite(__x.real())) + return __x; + return std::complex<_Tp>(sinh(__x.real()) * cos(__x.imag()), + cosh(__x.real()) * sin(__x.imag())); +} + +// cosh + +template +__DEVICE__ std::complex<_Tp> cosh(const std::complex<_Tp> &__x) { + if (std::isinf(__x.real()) && !std::isfinite(__x.imag())) + return std::complex<_Tp>(abs(__x.real()), _Tp(NAN)); + if (__x.real() == 0 && !std::isfinite(__x.imag())) + return std::complex<_Tp>(_Tp(NAN), __x.real()); + if (__x.real() == 0 && __x.imag() == 0) + return std::complex<_Tp>(_Tp(1), __x.imag()); + if (__x.imag() == 0 && !std::isfinite(__x.real())) + return std::complex<_Tp>(abs(__x.real()), __x.imag()); + return std::complex<_Tp>(cosh(__x.real()) * cos(__x.imag()), + sinh(__x.real()) * sin(__x.imag())); +} + +// tanh + +template +__DEVICE__ std::complex<_Tp> tanh(const std::complex<_Tp> &__x) { + if (std::isinf(__x.real())) { + if (!std::isfinite(__x.imag())) + return std::complex<_Tp>(_Tp(1), _Tp(0)); + return std::complex<_Tp>(_Tp(1), + copysign(_Tp(0), sin(_Tp(2) * __x.imag()))); + } + if (std::isnan(__x.real()) && __x.imag() == 0) + return __x; + _Tp __2r(_Tp(2) * __x.real()); + _Tp __2i(_Tp(2) * __x.imag()); + _Tp __d(cosh(__2r) + cos(__2i)); + _Tp __2rsh(sinh(__2r)); + if (std::isinf(__2rsh) && std::isinf(__d)) + return std::complex<_Tp>(__2rsh > _Tp(0) ? _Tp(1) : _Tp(-1), + __2i > _Tp(0) ? _Tp(0) : _Tp(-0.)); + return std::complex<_Tp>(__2rsh / __d, sin(__2i) / __d); +} + +// asin + +template +__DEVICE__ std::complex<_Tp> asin(const std::complex<_Tp> &__x) { + std::complex<_Tp> __z = asinh(complex<_Tp>(-__x.imag(), __x.real())); + return std::complex<_Tp>(__z.imag(), -__z.real()); +} + +// acos + +template +__DEVICE__ std::complex<_Tp> acos(const std::complex<_Tp> &__x) { + const _Tp __pi(atan2(+0., -0.)); + if (std::isinf(__x.real())) { + if (std::isnan(__x.imag())) + return std::complex<_Tp>(__x.imag(), __x.real()); + if (std::isinf(__x.imag())) { + if (__x.real() < _Tp(0)) + return std::complex<_Tp>(_Tp(0.75) * __pi, -__x.imag()); + return std::complex<_Tp>(_Tp(0.25) * __pi, -__x.imag()); + } + if (__x.real() < _Tp(0)) + return std::complex<_Tp>(__pi, + signbit(__x.imag()) ? -__x.real() : __x.real()); + return std::complex<_Tp>(_Tp(0), + signbit(__x.imag()) ? __x.real() : -__x.real()); + } + if (std::isnan(__x.real())) { + if (std::isinf(__x.imag())) + return std::complex<_Tp>(__x.real(), -__x.imag()); + return std::complex<_Tp>(__x.real(), __x.real()); + } + if (std::isinf(__x.imag())) + return std::complex<_Tp>(__pi / _Tp(2), -__x.imag()); + if (__x.real() == 0 && (__x.imag() == 0 || isnan(__x.imag()))) + return std::complex<_Tp>(__pi / _Tp(2), -__x.imag()); + std::complex<_Tp> __z = log(__x + sqrt(__sqr(__x) - _Tp(1))); + if (signbit(__x.imag())) + return std::complex<_Tp>(abs(__z.imag()), abs(__z.real())); + return std::complex<_Tp>(abs(__z.imag()), -abs(__z.real())); +} + +// atan + +template +__DEVICE__ std::complex<_Tp> atan(const std::complex<_Tp> &__x) { + std::complex<_Tp> __z = atanh(complex<_Tp>(-__x.imag(), __x.real())); + return std::complex<_Tp>(__z.imag(), -__z.real()); +} + +// sin + +template +__DEVICE__ std::complex<_Tp> sin(const std::complex<_Tp> &__x) { + std::complex<_Tp> __z = sinh(complex<_Tp>(-__x.imag(), __x.real())); + return std::complex<_Tp>(__z.imag(), -__z.real()); +} + +// cos + +template std::complex<_Tp> cos(const std::complex<_Tp> &__x) { + return cosh(complex<_Tp>(-__x.imag(), __x.real())); +} + +// tan + +template +__DEVICE__ std::complex<_Tp> tan(const std::complex<_Tp> &__x) { + std::complex<_Tp> __z = tanh(complex<_Tp>(-__x.imag(), __x.real())); + return std::complex<_Tp>(__z.imag(), -__z.real()); +} + +} // namespace std + +#endif diff --git a/llvm/lib/clang/19/include/openmp_wrappers/math.h b/llvm/lib/clang/19/include/openmp_wrappers/math.h new file mode 100644 index 0000000000000000000000000000000000000000..1e3c07cfdb8cd53da2e7ed1117073c22533ada1f --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/math.h @@ -0,0 +1,61 @@ +/*===---- openmp_wrapper/math.h -------- OpenMP math.h intercept ------ c++ -=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +// If we are in C++ mode and include (not ) first, we still need +// to make sure is read first. The problem otherwise is that we haven't +// seen the declarations of the math.h functions when the system math.h includes +// our cmath overlay. However, our cmath overlay, or better the underlying +// overlay, e.g. CUDA, uses the math.h functions. Since we haven't declared them +// yet we get errors. CUDA avoids this by eagerly declaring all math functions +// (in the __device__ space) but we cannot do this. Instead we break the +// dependence by forcing cmath to go first. While our cmath will in turn include +// this file, the cmath guards will prevent recursion. +#ifdef __cplusplus +#include +#endif + +#ifndef __CLANG_OPENMP_MATH_H__ +#define __CLANG_OPENMP_MATH_H__ + +#ifndef _OPENMP +#error "This file is for OpenMP compilation only." +#endif + +#include_next + +// We need limits.h for __clang_cuda_math.h below and because it should not hurt +// we include it eagerly here. +#include + +// We need stdlib.h because (for now) __clang_cuda_math.h below declares `abs` +// which should live in stdlib.h. +#include + +#pragma omp begin declare variant match( \ + device = {arch(nvptx, nvptx64)}, implementation = {extension(match_any)}) + +#define __CUDA__ +#define __OPENMP_NVPTX__ +#include <__clang_cuda_math.h> +#undef __OPENMP_NVPTX__ +#undef __CUDA__ + +#pragma omp end declare variant + +#ifdef __AMDGCN__ +#pragma omp begin declare variant match(device = {arch(amdgcn)}) + +#define __OPENMP_AMDGCN__ +#include <__clang_hip_math.h> +#undef __OPENMP_AMDGCN__ + +#pragma omp end declare variant +#endif + +#endif diff --git a/llvm/lib/clang/19/include/openmp_wrappers/new b/llvm/lib/clang/19/include/openmp_wrappers/new new file mode 100644 index 0000000000000000000000000000000000000000..8bad3f19d6251c6d1c53c4a32505fead6f80ef71 --- /dev/null +++ b/llvm/lib/clang/19/include/openmp_wrappers/new @@ -0,0 +1,48 @@ +//===--------- new - OPENMP wrapper for ------------------------------=== +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===-----------------------------------------------------------------------=== + +#ifndef __CLANG_OPENMP_WRAPPERS_NEW +#define __CLANG_OPENMP_WRAPPERS_NEW + +// We need the system for the std::nothrow_t. The new/delete operators +// which do not use nothrow_t are provided without the header. +#include_next + +#if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(_OPENMP) + +#include + +#pragma push_macro("OPENMP_NOEXCEPT") +#if __cplusplus >= 201103L +#define OPENMP_NOEXCEPT noexcept +#else +#define OPENMP_NOEXCEPT +#endif + +inline void *operator new(__SIZE_TYPE__ size, + const std::nothrow_t &) OPENMP_NOEXCEPT { + return ::operator new(size); +} + +inline void *operator new[](__SIZE_TYPE__ size, const std::nothrow_t &) { + return ::operator new(size); +} + +inline void operator delete(void *ptr, const std::nothrow_t &)OPENMP_NOEXCEPT { + ::operator delete(ptr); +} + +inline void operator delete[](void *ptr, + const std::nothrow_t &) OPENMP_NOEXCEPT { + ::operator delete(ptr); +} + +#pragma pop_macro("OPENMP_NOEXCEPT") +#endif + +#endif // include guard diff --git a/llvm/lib/clang/19/include/orc/c_api.h b/llvm/lib/clang/19/include/orc/c_api.h new file mode 100644 index 0000000000000000000000000000000000000000..5585cd608684691783a1538b55ed9056bd8ce6f3 --- /dev/null +++ b/llvm/lib/clang/19/include/orc/c_api.h @@ -0,0 +1,202 @@ +/*===- c_api.h - C API for the ORC runtime ------------------------*- C -*-===*\ +|* *| +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM *| +|* Exceptions. *| +|* See https://llvm.org/LICENSE.txt for license information. *| +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This file defines the C API for the ORC runtime *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef ORC_RT_C_API_H +#define ORC_RT_C_API_H + +#include +#include +#include +#include + +/* Helper to suppress strict prototype warnings. */ +#ifdef __clang__ +#define ORC_RT_C_STRICT_PROTOTYPES_BEGIN \ + _Pragma("clang diagnostic push") \ + _Pragma("clang diagnostic error \"-Wstrict-prototypes\"") +#define ORC_RT_C_STRICT_PROTOTYPES_END _Pragma("clang diagnostic pop") +#else +#define ORC_RT_C_STRICT_PROTOTYPES_BEGIN +#define ORC_RT_C_STRICT_PROTOTYPES_END +#endif + +/* Helper to wrap C code for C++ */ +#ifdef __cplusplus +#define ORC_RT_C_EXTERN_C_BEGIN \ + extern "C" { \ + ORC_RT_C_STRICT_PROTOTYPES_BEGIN +#define ORC_RT_C_EXTERN_C_END \ + ORC_RT_C_STRICT_PROTOTYPES_END \ + } +#else +#define ORC_RT_C_EXTERN_C_BEGIN ORC_RT_C_STRICT_PROTOTYPES_BEGIN +#define ORC_RT_C_EXTERN_C_END ORC_RT_C_STRICT_PROTOTYPES_END +#endif + +ORC_RT_C_EXTERN_C_BEGIN + +typedef union { + char *ValuePtr; + char Value[sizeof(char *)]; +} orc_rt_CWrapperFunctionResultDataUnion; + +/** + * orc_rt_CWrapperFunctionResult is a kind of C-SmallVector with an + * out-of-band error state. + * + * If Size == 0 and Data.ValuePtr is non-zero then the value is in the + * 'out-of-band error' state, and Data.ValuePtr points at a malloc-allocated, + * null-terminated string error message. + * + * If Size <= sizeof(orc_rt_CWrapperFunctionResultData) then the value is in + * the 'small' state and the content is held in the first Size bytes of + * Data.Value. + * + * If Size > sizeof(OrtRTCWrapperFunctionResultData) then the value is in the + * 'large' state and the content is held in the first Size bytes of the + * memory pointed to by Data.ValuePtr. This memory must have been allocated by + * malloc, and will be freed with free when this value is destroyed. + */ +typedef struct { + orc_rt_CWrapperFunctionResultDataUnion Data; + size_t Size; +} orc_rt_CWrapperFunctionResult; + +/** + * Zero-initialize an orc_rt_CWrapperFunctionResult. + */ +static inline void +orc_rt_CWrapperFunctionResultInit(orc_rt_CWrapperFunctionResult *R) { + R->Size = 0; + R->Data.ValuePtr = 0; +} + +/** + * Create an orc_rt_CWrapperFunctionResult with an uninitialized buffer of + * size Size. The buffer is returned via the DataPtr argument. + */ +static inline orc_rt_CWrapperFunctionResult +orc_rt_CWrapperFunctionResultAllocate(size_t Size) { + orc_rt_CWrapperFunctionResult R; + R.Size = Size; + // If Size is 0 ValuePtr must be 0 or it is considered an out-of-band error. + R.Data.ValuePtr = 0; + if (Size > sizeof(R.Data.Value)) + R.Data.ValuePtr = (char *)malloc(Size); + return R; +} + +/** + * Create an orc_rt_WrapperFunctionResult from the given data range. + */ +static inline orc_rt_CWrapperFunctionResult +orc_rt_CreateCWrapperFunctionResultFromRange(const char *Data, size_t Size) { + orc_rt_CWrapperFunctionResult R; + R.Size = Size; + if (R.Size > sizeof(R.Data.Value)) { + char *Tmp = (char *)malloc(Size); + memcpy(Tmp, Data, Size); + R.Data.ValuePtr = Tmp; + } else + memcpy(R.Data.Value, Data, Size); + return R; +} + +/** + * Create an orc_rt_CWrapperFunctionResult by copying the given string, + * including the null-terminator. + * + * This function copies the input string. The client is responsible for freeing + * the ErrMsg arg. + */ +static inline orc_rt_CWrapperFunctionResult +orc_rt_CreateCWrapperFunctionResultFromString(const char *Source) { + return orc_rt_CreateCWrapperFunctionResultFromRange(Source, + strlen(Source) + 1); +} + +/** + * Create an orc_rt_CWrapperFunctionResult representing an out-of-band + * error. + * + * This function copies the input string. The client is responsible for freeing + * the ErrMsg arg. + */ +static inline orc_rt_CWrapperFunctionResult +orc_rt_CreateCWrapperFunctionResultFromOutOfBandError(const char *ErrMsg) { + orc_rt_CWrapperFunctionResult R; + R.Size = 0; + char *Tmp = (char *)malloc(strlen(ErrMsg) + 1); + strcpy(Tmp, ErrMsg); + R.Data.ValuePtr = Tmp; + return R; +} + +/** + * This should be called to destroy orc_rt_CWrapperFunctionResult values + * regardless of their state. + */ +static inline void +orc_rt_DisposeCWrapperFunctionResult(orc_rt_CWrapperFunctionResult *R) { + if (R->Size > sizeof(R->Data.Value) || + (R->Size == 0 && R->Data.ValuePtr)) + free(R->Data.ValuePtr); +} + +/** + * Get a pointer to the data contained in the given + * orc_rt_CWrapperFunctionResult. + */ +static inline char * +orc_rt_CWrapperFunctionResultData(orc_rt_CWrapperFunctionResult *R) { + assert((R->Size != 0 || R->Data.ValuePtr == NULL) && + "Cannot get data for out-of-band error value"); + return R->Size > sizeof(R->Data.Value) ? R->Data.ValuePtr : R->Data.Value; +} + +/** + * Safely get the size of the given orc_rt_CWrapperFunctionResult. + * + * Asserts that we're not trying to access the size of an error value. + */ +static inline size_t +orc_rt_CWrapperFunctionResultSize(const orc_rt_CWrapperFunctionResult *R) { + assert((R->Size != 0 || R->Data.ValuePtr == NULL) && + "Cannot get size for out-of-band error value"); + return R->Size; +} + +/** + * Returns 1 if this value is equivalent to a value just initialized by + * orc_rt_CWrapperFunctionResultInit, 0 otherwise. + */ +static inline size_t +orc_rt_CWrapperFunctionResultEmpty(const orc_rt_CWrapperFunctionResult *R) { + return R->Size == 0 && R->Data.ValuePtr == 0; +} + +/** + * Returns a pointer to the out-of-band error string for this + * orc_rt_CWrapperFunctionResult, or null if there is no error. + * + * The orc_rt_CWrapperFunctionResult retains ownership of the error + * string, so it should be copied if the caller wishes to preserve it. + */ +static inline const char *orc_rt_CWrapperFunctionResultGetOutOfBandError( + const orc_rt_CWrapperFunctionResult *R) { + return R->Size == 0 ? R->Data.ValuePtr : 0; +} + +ORC_RT_C_EXTERN_C_END + +#endif /* ORC_RT_C_API_H */ diff --git a/llvm/lib/clang/19/include/pconfigintrin.h b/llvm/lib/clang/19/include/pconfigintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..d2014b026f3686618304538d29718920c5f8695f --- /dev/null +++ b/llvm/lib/clang/19/include/pconfigintrin.h @@ -0,0 +1,40 @@ +/*===---- pconfigintrin.h - X86 platform configuration ---------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __PCONFIGINTRIN_H +#define __PCONFIGINTRIN_H + +#define __PCONFIG_KEY_PROGRAM 0x00000001 + +#if __has_extension(gnu_asm) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("pconfig"))) + +static __inline unsigned int __DEFAULT_FN_ATTRS +_pconfig_u32(unsigned int __leaf, __SIZE_TYPE__ __d[]) +{ + unsigned int __result; + __asm__ ("pconfig" + : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2]) + : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2]) + : "cc"); + return __result; +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __has_extension(gnu_asm) */ + +#endif diff --git a/llvm/lib/clang/19/include/pkuintrin.h b/llvm/lib/clang/19/include/pkuintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..c62080becb0f2e0b82fa19fc9413f41bb365f983 --- /dev/null +++ b/llvm/lib/clang/19/include/pkuintrin.h @@ -0,0 +1,34 @@ +/*===---- pkuintrin.h - PKU intrinsics -------------------------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __PKUINTRIN_H +#define __PKUINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("pku"))) + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_rdpkru_u32(void) +{ + return __builtin_ia32_rdpkru(); +} + +static __inline__ void __DEFAULT_FN_ATTRS +_wrpkru(unsigned int __val) +{ + __builtin_ia32_wrpkru(__val); +} + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/pmmintrin.h b/llvm/lib/clang/19/include/pmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..91cee1edda30678e4e6cd4f99543f0b87225c7b9 --- /dev/null +++ b/llvm/lib/clang/19/include/pmmintrin.h @@ -0,0 +1,301 @@ +/*===---- pmmintrin.h - SSE3 intrinsics ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __PMMINTRIN_H +#define __PMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("sse3,no-evex512"), __min_vector_width__(128))) + +/// Loads data from an unaligned memory location to elements in a 128-bit +/// vector. +/// +/// If the address of the data is not 16-byte aligned, the instruction may +/// read two adjacent aligned blocks of memory to retrieve the requested +/// data. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VLDDQU instruction. +/// +/// \param __p +/// A pointer to a 128-bit integer vector containing integer values. +/// \returns A 128-bit vector containing the moved values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_lddqu_si128(__m128i_u const *__p) +{ + return (__m128i)__builtin_ia32_lddqu((char const *)__p); +} + +/// Adds the even-indexed values and subtracts the odd-indexed values of +/// two 128-bit vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDSUBPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing the left source operand. +/// \param __b +/// A 128-bit vector of [4 x float] containing the right source operand. +/// \returns A 128-bit vector of [4 x float] containing the alternating sums and +/// differences of both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_addsub_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_addsubps((__v4sf)__a, (__v4sf)__b); +} + +/// Horizontally adds the adjacent pairs of values contained in two +/// 128-bit vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHADDPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 128-bit vector of [4 x float] containing the horizontal sums of +/// both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_hadd_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_haddps((__v4sf)__a, (__v4sf)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in two +/// 128-bit vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHSUBPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The horizontal differences between the values are stored in the lower +/// bits of the destination. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The horizontal differences between the values are stored in the upper +/// bits of the destination. +/// \returns A 128-bit vector of [4 x float] containing the horizontal +/// differences of both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_hsub_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_hsubps((__v4sf)__a, (__v4sf)__b); +} + +/// Moves and duplicates odd-indexed values from a 128-bit vector +/// of [4 x float] to float values stored in a 128-bit vector of +/// [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSHDUP instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. \n +/// Bits [127:96] of the source are written to bits [127:96] and [95:64] of +/// the destination. \n +/// Bits [63:32] of the source are written to bits [63:32] and [31:0] of the +/// destination. +/// \returns A 128-bit vector of [4 x float] containing the moved and duplicated +/// values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_movehdup_ps(__m128 __a) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 1, 1, 3, 3); +} + +/// Duplicates even-indexed values from a 128-bit vector of +/// [4 x float] to float values stored in a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSLDUP instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float] \n +/// Bits [95:64] of the source are written to bits [127:96] and [95:64] of +/// the destination. \n +/// Bits [31:0] of the source are written to bits [63:32] and [31:0] of the +/// destination. +/// \returns A 128-bit vector of [4 x float] containing the moved and duplicated +/// values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_moveldup_ps(__m128 __a) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 0, 2, 2); +} + +/// Adds the even-indexed values and subtracts the odd-indexed values of +/// two 128-bit vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDSUBPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing the left source operand. +/// \param __b +/// A 128-bit vector of [2 x double] containing the right source operand. +/// \returns A 128-bit vector of [2 x double] containing the alternating sums +/// and differences of both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS +_mm_addsub_pd(__m128d __a, __m128d __b) +{ + return __builtin_ia32_addsubpd((__v2df)__a, (__v2df)__b); +} + +/// Horizontally adds the pairs of values contained in two 128-bit +/// vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHADDPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// The horizontal sum of the values is stored in the lower bits of the +/// destination. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// The horizontal sum of the values is stored in the upper bits of the +/// destination. +/// \returns A 128-bit vector of [2 x double] containing the horizontal sums of +/// both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS +_mm_hadd_pd(__m128d __a, __m128d __b) +{ + return __builtin_ia32_haddpd((__v2df)__a, (__v2df)__b); +} + +/// Horizontally subtracts the pairs of values contained in two 128-bit +/// vectors of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VHSUBPD instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// The horizontal difference of the values is stored in the lower bits of +/// the destination. +/// \param __b +/// A 128-bit vector of [2 x double] containing one of the source operands. +/// The horizontal difference of the values is stored in the upper bits of +/// the destination. +/// \returns A 128-bit vector of [2 x double] containing the horizontal +/// differences of both operands. +static __inline__ __m128d __DEFAULT_FN_ATTRS +_mm_hsub_pd(__m128d __a, __m128d __b) +{ + return __builtin_ia32_hsubpd((__v2df)__a, (__v2df)__b); +} + +/// Moves and duplicates one double-precision value to double-precision +/// values stored in a 128-bit vector of [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_loaddup_pd(double const *dp); +/// \endcode +/// +/// This intrinsic corresponds to the VMOVDDUP instruction. +/// +/// \param dp +/// A pointer to a double-precision value to be moved and duplicated. +/// \returns A 128-bit vector of [2 x double] containing the moved and +/// duplicated values. +#define _mm_loaddup_pd(dp) _mm_load1_pd(dp) + +/// Moves and duplicates the double-precision value in the lower bits of +/// a 128-bit vector of [2 x double] to double-precision values stored in a +/// 128-bit vector of [2 x double]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVDDUP instruction. +/// +/// \param __a +/// A 128-bit vector of [2 x double]. Bits [63:0] are written to bits +/// [127:64] and [63:0] of the destination. +/// \returns A 128-bit vector of [2 x double] containing the moved and +/// duplicated values. +static __inline__ __m128d __DEFAULT_FN_ATTRS +_mm_movedup_pd(__m128d __a) +{ + return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0); +} + +/// Establishes a linear address memory range to be monitored and puts +/// the processor in the monitor event pending state. Data stored in the +/// monitored address range causes the processor to exit the pending state. +/// +/// The \c MONITOR instruction can be used in kernel mode, and in other modes +/// if MSR C001_0015h[MonMwaitUserEn] is set. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c MONITOR instruction. +/// +/// \param __p +/// The memory range to be monitored. The size of the range is determined by +/// CPUID function 0000_0005h. +/// \param __extensions +/// Optional extensions for the monitoring state. +/// \param __hints +/// Optional hints for the monitoring state. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_monitor(void const *__p, unsigned __extensions, unsigned __hints) +{ + __builtin_ia32_monitor(__p, __extensions, __hints); +} + +/// Used with the \c MONITOR instruction to wait while the processor is in +/// the monitor event pending state. Data stored in the monitored address +/// range, or an interrupt, causes the processor to exit the pending state. +/// +/// The \c MWAIT instruction can be used in kernel mode, and in other modes if +/// MSR C001_0015h[MonMwaitUserEn] is set. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c MWAIT instruction. +/// +/// \param __extensions +/// Optional extensions for the monitoring state, which can vary by +/// processor. +/// \param __hints +/// Optional hints for the monitoring state, which can vary by processor. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_mwait(unsigned __extensions, unsigned __hints) +{ + __builtin_ia32_mwait(__extensions, __hints); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __PMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/popcntintrin.h b/llvm/lib/clang/19/include/popcntintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..0aa94aecda5b8042da5ad261bb3bc0b815360039 --- /dev/null +++ b/llvm/lib/clang/19/include/popcntintrin.h @@ -0,0 +1,59 @@ +/*===---- popcntintrin.h - POPCNT intrinsics -------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __POPCNTINTRIN_H +#define __POPCNTINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("popcnt"))) + +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr +#else +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS +#endif + +/// Counts the number of bits in the source operand having a value of 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the POPCNT instruction. +/// +/// \param __A +/// An unsigned 32-bit integer operand. +/// \returns A 32-bit integer containing the number of bits with value 1 in the +/// source operand. +static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_popcnt_u32(unsigned int __A) +{ + return __builtin_popcount(__A); +} + +#ifdef __x86_64__ +/// Counts the number of bits in the source operand having a value of 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the POPCNT instruction. +/// +/// \param __A +/// An unsigned 64-bit integer operand. +/// \returns A 64-bit integer containing the number of bits with value 1 in the +/// source operand. +static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_popcnt_u64(unsigned long long __A) +{ + return __builtin_popcountll(__A); +} +#endif /* __x86_64__ */ + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_CONSTEXPR + +#endif /* __POPCNTINTRIN_H */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/bmi2intrin.h b/llvm/lib/clang/19/include/ppc_wrappers/bmi2intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..0dc0d14ad480f9676757d9422b159d9b155d5b20 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/bmi2intrin.h @@ -0,0 +1,134 @@ +/*===---- bmiintrin.h - Implementation of BMI2 intrinsics on PowerPC -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined X86GPRINTRIN_H_ +#error "Never use directly; include instead." +#endif + +#ifndef BMI2INTRIN_H_ +#define BMI2INTRIN_H_ + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _bzhi_u32(unsigned int __X, unsigned int __Y) { + return ((__X << (32 - __Y)) >> (32 - __Y)); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mulx_u32(unsigned int __X, unsigned int __Y, unsigned int *__P) { + unsigned long long __res = (unsigned long long)__X * __Y; + *__P = (unsigned int)(__res >> 32); + return (unsigned int)__res; +} + +#ifdef __PPC64__ +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _bzhi_u64(unsigned long long __X, unsigned long long __Y) { + return ((__X << (64 - __Y)) >> (64 - __Y)); +} + +/* __int128 requires base 64-bit. */ +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mulx_u64(unsigned long long __X, unsigned long long __Y, + unsigned long long *__P) { + unsigned __int128 __res = (unsigned __int128)__X * __Y; + *__P = (unsigned long long)(__res >> 64); + return (unsigned long long)__res; +} + +#ifdef _ARCH_PWR7 +/* popcount and bpermd require power7 minimum. */ +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _pdep_u64(unsigned long long __X, unsigned long long __M) { + unsigned long __result = 0x0UL; + const unsigned long __mask = 0x8000000000000000UL; + unsigned long __m = __M; + unsigned long __c, __t; + unsigned long __p; + + /* The pop-count of the mask gives the number of the bits from + source to process. This is also needed to shift bits from the + source into the correct position for the result. */ + __p = 64 - __builtin_popcountl(__M); + + /* The loop is for the number of '1' bits in the mask and clearing + each mask bit as it is processed. */ + while (__m != 0) { + __c = __builtin_clzl(__m); + __t = __X << (__p - __c); + __m ^= (__mask >> __c); + __result |= (__t & (__mask >> __c)); + __p++; + } + return __result; +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _pext_u64(unsigned long long __X, unsigned long long __M) { + unsigned long __p = 0x4040404040404040UL; // initial bit permute control + const unsigned long __mask = 0x8000000000000000UL; + unsigned long __m = __M; + unsigned long __c; + unsigned long __result; + + /* if the mask is constant and selects 8 bits or less we can use + the Power8 Bit permute instruction. */ + if (__builtin_constant_p(__M) && (__builtin_popcountl(__M) <= 8)) { + /* Also if the pext mask is constant, then the popcount is + constant, we can evaluate the following loop at compile + time and use a constant bit permute vector. */ + long __i; + for (__i = 0; __i < __builtin_popcountl(__M); __i++) { + __c = __builtin_clzl(__m); + __p = (__p << 8) | __c; + __m ^= (__mask >> __c); + } + __result = __builtin_bpermd(__p, __X); + } else { + __p = 64 - __builtin_popcountl(__M); + __result = 0; + /* We could a use a for loop here, but that combined with + -funroll-loops can expand to a lot of code. The while + loop avoids unrolling and the compiler commons the xor + from clearing the mask bit with the (m != 0) test. The + result is a more compact loop setup and body. */ + while (__m != 0) { + unsigned long __t; + __c = __builtin_clzl(__m); + __t = (__X & (__mask >> __c)) >> (__p - __c); + __m ^= (__mask >> __c); + __result |= (__t); + __p++; + } + } + return __result; +} + +/* these 32-bit implementations depend on 64-bit pdep/pext + which depend on _ARCH_PWR7. */ +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _pdep_u32(unsigned int __X, unsigned int __Y) { + return _pdep_u64(__X, __Y); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _pext_u32(unsigned int __X, unsigned int __Y) { + return _pext_u64(__X, __Y); +} +#endif /* _ARCH_PWR7 */ +#endif /* __PPC64__ */ + +#endif /* BMI2INTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/bmiintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/bmiintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..7d3315958c7b7f06915c0135d06201a82f24b0b8 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/bmiintrin.h @@ -0,0 +1,165 @@ +/*===---- bmiintrin.h - Implementation of BMI intrinsics on PowerPC --------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined X86GPRINTRIN_H_ +#error "Never use directly; include instead." +#endif + +#ifndef BMIINTRIN_H_ +#define BMIINTRIN_H_ + +extern __inline unsigned short + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __tzcnt_u16(unsigned short __X) { + return __builtin_ctz(__X); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __andn_u32(unsigned int __X, unsigned int __Y) { + return (~__X & __Y); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _bextr_u32(unsigned int __X, unsigned int __P, unsigned int __L) { + return ((__X << (32 - (__L + __P))) >> (32 - __L)); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __bextr_u32(unsigned int __X, unsigned int __Y) { + unsigned int __P, __L; + __P = __Y & 0xFF; + __L = (__Y >> 8) & 0xFF; + return (_bextr_u32(__X, __P, __L)); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __blsi_u32(unsigned int __X) { + return (__X & -__X); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _blsi_u32(unsigned int __X) { + return __blsi_u32(__X); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __blsmsk_u32(unsigned int __X) { + return (__X ^ (__X - 1)); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _blsmsk_u32(unsigned int __X) { + return __blsmsk_u32(__X); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __blsr_u32(unsigned int __X) { + return (__X & (__X - 1)); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _blsr_u32(unsigned int __X) { + return __blsr_u32(__X); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __tzcnt_u32(unsigned int __X) { + return __builtin_ctz(__X); +} + +extern __inline unsigned int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _tzcnt_u32(unsigned int __X) { + return __builtin_ctz(__X); +} + +/* use the 64-bit shift, rotate, and count leading zeros instructions + for long long. */ +#ifdef __PPC64__ +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __andn_u64(unsigned long long __X, unsigned long long __Y) { + return (~__X & __Y); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _bextr_u64(unsigned long long __X, unsigned int __P, unsigned int __L) { + return ((__X << (64 - (__L + __P))) >> (64 - __L)); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __bextr_u64(unsigned long long __X, unsigned long long __Y) { + unsigned int __P, __L; + __P = __Y & 0xFF; + __L = (__Y & 0xFF00) >> 8; + return (_bextr_u64(__X, __P, __L)); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __blsi_u64(unsigned long long __X) { + return __X & -__X; +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _blsi_u64(unsigned long long __X) { + return __blsi_u64(__X); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __blsmsk_u64(unsigned long long __X) { + return (__X ^ (__X - 1)); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _blsmsk_u64(unsigned long long __X) { + return __blsmsk_u64(__X); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __blsr_u64(unsigned long long __X) { + return (__X & (__X - 1)); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _blsr_u64(unsigned long long __X) { + return __blsr_u64(__X); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + __tzcnt_u64(unsigned long long __X) { + return __builtin_ctzll(__X); +} + +extern __inline unsigned long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _tzcnt_u64(unsigned long long __X) { + return __builtin_ctzll(__X); +} +#endif /* __PPC64__ */ + +#endif /* BMIINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/emmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/emmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..fc18ab9d43b15ec3ed09efa67253a3143aa06fb6 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/emmintrin.h @@ -0,0 +1,2269 @@ +/*===---- emmintrin.h - Implementation of SSE2 intrinsics on PowerPC -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Implemented from the specification included in the Intel C++ Compiler + User Guide and Reference, version 9.0. */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header file is to help porting code using Intel intrinsics + explicitly from x86_64 to powerpc64/powerpc64le. + + Since X86 SSE2 intrinsics mainly handles __m128i and __m128d type, + PowerPC VMX/VSX ISA is a good match for vector float SIMD operations. + However scalar float operations in vector (XMM) registers require + the POWER8 VSX ISA (2.07) level. There are differences for data + format and placement of float scalars in the vector register, which + require extra steps to match SSE2 scalar float semantics on POWER. + + It should be noted that there's much difference between X86_64's + MXSCR and PowerISA's FPSCR/VSCR registers. It's recommended to use + portable instead of access MXSCR directly. + + Most SSE2 scalar float intrinsic operations can be performed more + efficiently as C language float scalar operations or optimized to + use vector SIMD operations. We recommend this for new applications. +*/ +#error \ + "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." +#endif + +#ifndef EMMINTRIN_H_ +#define EMMINTRIN_H_ + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +#include + +/* We need definitions from the SSE header files. */ +#include + +/* SSE2 */ +typedef __vector double __v2df; +typedef __vector float __v4f; +typedef __vector long long __v2di; +typedef __vector unsigned long long __v2du; +typedef __vector int __v4si; +typedef __vector unsigned int __v4su; +typedef __vector short __v8hi; +typedef __vector unsigned short __v8hu; +typedef __vector signed char __v16qi; +typedef __vector unsigned char __v16qu; + +/* The Intel API is flexible enough that we must allow aliasing with other + vector types, and their scalar components. */ +typedef long long __m128i __attribute__((__vector_size__(16), __may_alias__)); +typedef double __m128d __attribute__((__vector_size__(16), __may_alias__)); + +/* Unaligned version of the same types. */ +typedef long long __m128i_u + __attribute__((__vector_size__(16), __may_alias__, __aligned__(1))); +typedef double __m128d_u + __attribute__((__vector_size__(16), __may_alias__, __aligned__(1))); + +/* Define two value permute mask. */ +#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y)) + +/* Create a vector with element 0 as F and the rest zero. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_sd(double __F) { + return __extension__(__m128d){__F, 0.0}; +} + +/* Create a vector with both elements equal to F. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_pd(double __F) { + return __extension__(__m128d){__F, __F}; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_pd1(double __F) { + return _mm_set1_pd(__F); +} + +/* Create a vector with the lower value X and upper value W. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_pd(double __W, double __X) { + return __extension__(__m128d){__X, __W}; +} + +/* Create a vector with the lower value W and upper value X. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_pd(double __W, double __X) { + return __extension__(__m128d){__W, __X}; +} + +/* Create an undefined vector. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_undefined_pd(void) { + __m128d __Y = __Y; + return __Y; +} + +/* Create a vector of zeros. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setzero_pd(void) { + return (__m128d)vec_splats(0); +} + +/* Sets the low DPFP value of A from the low value of B. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_move_sd(__m128d __A, __m128d __B) { + __v2df __result = (__v2df)__A; + __result[0] = ((__v2df)__B)[0]; + return (__m128d)__result; +} + +/* Load two DPFP values from P. The address must be 16-byte aligned. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_pd(double const *__P) { + return ((__m128d)vec_ld(0, (__v16qu *)__P)); +} + +/* Load two DPFP values from P. The address need not be 16-byte aligned. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadu_pd(double const *__P) { + return (vec_vsx_ld(0, __P)); +} + +/* Create a vector with all two elements equal to *P. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load1_pd(double const *__P) { + return (vec_splats(*__P)); +} + +/* Create a vector with element 0 as *P and the rest zero. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_sd(double const *__P) { + return _mm_set_sd(*__P); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_pd1(double const *__P) { + return _mm_load1_pd(__P); +} + +/* Load two DPFP values in reverse order. The address must be aligned. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadr_pd(double const *__P) { + __v2df __tmp = _mm_load_pd(__P); + return (__m128d)vec_xxpermdi(__tmp, __tmp, 2); +} + +/* Store two DPFP values. The address must be 16-byte aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_pd(double *__P, __m128d __A) { + vec_st((__v16qu)__A, 0, (__v16qu *)__P); +} + +/* Store two DPFP values. The address need not be 16-byte aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storeu_pd(double *__P, __m128d __A) { + *(__m128d_u *)__P = __A; +} + +/* Stores the lower DPFP value. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_sd(double *__P, __m128d __A) { + *__P = ((__v2df)__A)[0]; +} + +extern __inline double + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsd_f64(__m128d __A) { + return ((__v2df)__A)[0]; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storel_pd(double *__P, __m128d __A) { + _mm_store_sd(__P, __A); +} + +/* Stores the upper DPFP value. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storeh_pd(double *__P, __m128d __A) { + *__P = ((__v2df)__A)[1]; +} +/* Store the lower DPFP value across two words. + The address must be 16-byte aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store1_pd(double *__P, __m128d __A) { + _mm_store_pd(__P, vec_splat(__A, 0)); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_pd1(double *__P, __m128d __A) { + _mm_store1_pd(__P, __A); +} + +/* Store two DPFP values in reverse order. The address must be aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storer_pd(double *__P, __m128d __A) { + _mm_store_pd(__P, vec_xxpermdi(__A, __A, 2)); +} + +/* Intel intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi128_si64(__m128i __A) { + return ((__v2di)__A)[0]; +} + +/* Microsoft intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi128_si64x(__m128i __A) { + return ((__v2di)__A)[0]; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_pd(__m128d __A, __m128d __B) { + return (__m128d)((__v2df)__A + (__v2df)__B); +} + +/* Add the lower double-precision (64-bit) floating-point element in + a and b, store the result in the lower element of dst, and copy + the upper element from a to the upper element of dst. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_sd(__m128d __A, __m128d __B) { + __A[0] = __A[0] + __B[0]; + return (__A); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_pd(__m128d __A, __m128d __B) { + return (__m128d)((__v2df)__A - (__v2df)__B); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_sd(__m128d __A, __m128d __B) { + __A[0] = __A[0] - __B[0]; + return (__A); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_pd(__m128d __A, __m128d __B) { + return (__m128d)((__v2df)__A * (__v2df)__B); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_sd(__m128d __A, __m128d __B) { + __A[0] = __A[0] * __B[0]; + return (__A); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_div_pd(__m128d __A, __m128d __B) { + return (__m128d)((__v2df)__A / (__v2df)__B); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_div_sd(__m128d __A, __m128d __B) { + __A[0] = __A[0] / __B[0]; + return (__A); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sqrt_pd(__m128d __A) { + return (vec_sqrt(__A)); +} + +/* Return pair {sqrt (B[0]), A[1]}. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sqrt_sd(__m128d __A, __m128d __B) { + __v2df __c; + __c = vec_sqrt((__v2df)_mm_set1_pd(__B[0])); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_pd(__m128d __A, __m128d __B) { + return (vec_min(__A, __B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = vec_min(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_pd(__m128d __A, __m128d __B) { + return (vec_max(__A, __B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = vec_max(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmpeq((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmplt((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmple_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmple((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmpgt((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpge_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmpge((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpneq_pd(__m128d __A, __m128d __B) { + __v2df __temp = (__v2df)vec_cmpeq((__v2df)__A, (__v2df)__B); + return ((__m128d)vec_nor(__temp, __temp)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnlt_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmpge((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnle_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmpgt((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpngt_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmple((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnge_pd(__m128d __A, __m128d __B) { + return ((__m128d)vec_cmplt((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpord_pd(__m128d __A, __m128d __B) { + __v2du __c, __d; + /* Compare against self will return false (0's) if NAN. */ + __c = (__v2du)vec_cmpeq(__A, __A); + __d = (__v2du)vec_cmpeq(__B, __B); + /* A != NAN and B != NAN. */ + return ((__m128d)vec_and(__c, __d)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpunord_pd(__m128d __A, __m128d __B) { +#if _ARCH_PWR8 + __v2du __c, __d; + /* Compare against self will return false (0's) if NAN. */ + __c = (__v2du)vec_cmpeq((__v2df)__A, (__v2df)__A); + __d = (__v2du)vec_cmpeq((__v2df)__B, (__v2df)__B); + /* A == NAN OR B == NAN converts too: + NOT(A != NAN) OR NOT(B != NAN). */ + __c = vec_nor(__c, __c); + return ((__m128d)vec_orc(__c, __d)); +#else + __v2du __c, __d; + /* Compare against self will return false (0's) if NAN. */ + __c = (__v2du)vec_cmpeq((__v2df)__A, (__v2df)__A); + __d = (__v2du)vec_cmpeq((__v2df)__B, (__v2df)__B); + /* Convert the true ('1's) is NAN. */ + __c = vec_nor(__c, __c); + __d = vec_nor(__d, __d); + return ((__m128d)vec_or(__c, __d)); +#endif +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + /* PowerISA VSX does not allow partial (for just lower double) + results. So to insure we don't generate spurious exceptions + (from the upper double values) we splat the lower double + before we do the operation. */ + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = (__v2df)vec_cmpeq(__a, __b); + /* Then we merge the lower double result with the original upper + double from __A. */ + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = (__v2df)vec_cmplt(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmple_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = (__v2df)vec_cmple(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = (__v2df)vec_cmpgt(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpge_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = (__v2df)vec_cmpge(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpneq_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + __c = (__v2df)vec_cmpeq(__a, __b); + __c = vec_nor(__c, __c); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnlt_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + /* Not less than is just greater than or equal. */ + __c = (__v2df)vec_cmpge(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnle_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + /* Not less than or equal is just greater than. */ + __c = (__v2df)vec_cmpge(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpngt_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + /* Not greater than is just less than or equal. */ + __c = (__v2df)vec_cmple(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnge_sd(__m128d __A, __m128d __B) { + __v2df __a, __b, __c; + __a = vec_splats(__A[0]); + __b = vec_splats(__B[0]); + /* Not greater than or equal is just less than. */ + __c = (__v2df)vec_cmplt(__a, __b); + return (__m128d)_mm_setr_pd(__c[0], __A[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpord_sd(__m128d __A, __m128d __B) { + __v2df __r; + __r = (__v2df)_mm_cmpord_pd(vec_splats(__A[0]), vec_splats(__B[0])); + return (__m128d)_mm_setr_pd(__r[0], ((__v2df)__A)[1]); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpunord_sd(__m128d __A, __m128d __B) { + __v2df __r; + __r = _mm_cmpunord_pd(vec_splats(__A[0]), vec_splats(__B[0])); + return (__m128d)_mm_setr_pd(__r[0], __A[1]); +} + +/* FIXME + The __mm_comi??_sd and __mm_ucomi??_sd implementations below are + exactly the same because GCC for PowerPC only generates unordered + compares (scalar and vector). + Technically __mm_comieq_sp et all should be using the ordered + compare and signal for QNaNs. The __mm_ucomieq_sd et all should + be OK. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comieq_sd(__m128d __A, __m128d __B) { + return (__A[0] == __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comilt_sd(__m128d __A, __m128d __B) { + return (__A[0] < __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comile_sd(__m128d __A, __m128d __B) { + return (__A[0] <= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comigt_sd(__m128d __A, __m128d __B) { + return (__A[0] > __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comige_sd(__m128d __A, __m128d __B) { + return (__A[0] >= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comineq_sd(__m128d __A, __m128d __B) { + return (__A[0] != __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomieq_sd(__m128d __A, __m128d __B) { + return (__A[0] == __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomilt_sd(__m128d __A, __m128d __B) { + return (__A[0] < __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomile_sd(__m128d __A, __m128d __B) { + return (__A[0] <= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomigt_sd(__m128d __A, __m128d __B) { + return (__A[0] > __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomige_sd(__m128d __A, __m128d __B) { + return (__A[0] >= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomineq_sd(__m128d __A, __m128d __B) { + return (__A[0] != __B[0]); +} + +/* Create a vector of Qi, where i is the element number. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_epi64x(long long __q1, long long __q0) { + return __extension__(__m128i)(__v2di){__q0, __q1}; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_epi64(__m64 __q1, __m64 __q0) { + return _mm_set_epi64x((long long)__q1, (long long)__q0); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_epi32(int __q3, int __q2, int __q1, int __q0) { + return __extension__(__m128i)(__v4si){__q0, __q1, __q2, __q3}; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_epi16(short __q7, short __q6, short __q5, short __q4, short __q3, + short __q2, short __q1, short __q0) { + return __extension__(__m128i)(__v8hi){__q0, __q1, __q2, __q3, + __q4, __q5, __q6, __q7}; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_epi8(char __q15, char __q14, char __q13, char __q12, char __q11, + char __q10, char __q09, char __q08, char __q07, char __q06, + char __q05, char __q04, char __q03, char __q02, char __q01, + char __q00) { + return __extension__(__m128i)(__v16qi){ + __q00, __q01, __q02, __q03, __q04, __q05, __q06, __q07, + __q08, __q09, __q10, __q11, __q12, __q13, __q14, __q15}; +} + +/* Set all of the elements of the vector to A. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_epi64x(long long __A) { + return _mm_set_epi64x(__A, __A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_epi64(__m64 __A) { + return _mm_set_epi64(__A, __A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_epi32(int __A) { + return _mm_set_epi32(__A, __A, __A, __A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_epi16(short __A) { + return _mm_set_epi16(__A, __A, __A, __A, __A, __A, __A, __A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_epi8(char __A) { + return _mm_set_epi8(__A, __A, __A, __A, __A, __A, __A, __A, __A, __A, __A, + __A, __A, __A, __A, __A); +} + +/* Create a vector of Qi, where i is the element number. + The parameter order is reversed from the _mm_set_epi* functions. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_epi64(__m64 __q0, __m64 __q1) { + return _mm_set_epi64(__q1, __q0); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_epi32(int __q0, int __q1, int __q2, int __q3) { + return _mm_set_epi32(__q3, __q2, __q1, __q0); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_epi16(short __q0, short __q1, short __q2, short __q3, short __q4, + short __q5, short __q6, short __q7) { + return _mm_set_epi16(__q7, __q6, __q5, __q4, __q3, __q2, __q1, __q0); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_epi8(char __q00, char __q01, char __q02, char __q03, char __q04, + char __q05, char __q06, char __q07, char __q08, char __q09, + char __q10, char __q11, char __q12, char __q13, char __q14, + char __q15) { + return _mm_set_epi8(__q15, __q14, __q13, __q12, __q11, __q10, __q09, __q08, + __q07, __q06, __q05, __q04, __q03, __q02, __q01, __q00); +} + +/* Create a vector with element 0 as *P and the rest zero. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_si128(__m128i const *__P) { + return *__P; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadu_si128(__m128i_u const *__P) { + return (__m128i)(vec_vsx_ld(0, (signed int const *)__P)); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadl_epi64(__m128i_u const *__P) { + return _mm_set_epi64((__m64)0LL, *(__m64 *)__P); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_si128(__m128i *__P, __m128i __B) { + vec_st((__v16qu)__B, 0, (__v16qu *)__P); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storeu_si128(__m128i_u *__P, __m128i __B) { + *__P = __B; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storel_epi64(__m128i_u *__P, __m128i __B) { + *(long long *)__P = ((__v2di)__B)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movepi64_pi64(__m128i_u __B) { + return (__m64)((__v2di)__B)[0]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movpi64_epi64(__m64 __A) { + return _mm_set_epi64((__m64)0LL, __A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_move_epi64(__m128i __A) { + return _mm_set_epi64((__m64)0LL, (__m64)__A[0]); +} + +/* Create an undefined vector. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_undefined_si128(void) { + __m128i __Y = __Y; + return __Y; +} + +/* Create a vector of zeros. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setzero_si128(void) { + return __extension__(__m128i)(__v4si){0, 0, 0, 0}; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi32_pd(__m128i __A) { + __v2di __val; + /* For LE need to generate Vector Unpack Low Signed Word. + Which is generated from unpackh. */ + __val = (__v2di)vec_unpackh((__v4si)__A); + + return (__m128d)vec_ctf(__val, 0); +} +#endif + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi32_ps(__m128i __A) { + return ((__m128)vec_ctf((__v4si)__A, 0)); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpd_epi32(__m128d __A) { + __v2df __rounded = vec_rint(__A); + __v4si __result, __temp; + const __v4si __vzero = {0, 0, 0, 0}; + + /* VSX Vector truncate Double-Precision to integer and Convert to + Signed Integer Word format with Saturate. */ + __asm__("xvcvdpsxws %x0,%x1" : "=wa"(__temp) : "wa"(__rounded) :); + +#ifdef _ARCH_PWR8 +#ifdef __LITTLE_ENDIAN__ + __temp = vec_mergeo(__temp, __temp); +#else + __temp = vec_mergee(__temp, __temp); +#endif + __result = (__v4si)vec_vpkudum((__vector long long)__temp, + (__vector long long)__vzero); +#else + { + const __v16qu __pkperm = {0x00, 0x01, 0x02, 0x03, 0x08, 0x09, 0x0a, 0x0b, + 0x14, 0x15, 0x16, 0x17, 0x1c, 0x1d, 0x1e, 0x1f}; + __result = (__v4si)vec_perm((__v16qu)__temp, (__v16qu)__vzero, __pkperm); + } +#endif + return (__m128i)__result; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpd_pi32(__m128d __A) { + __m128i __result = _mm_cvtpd_epi32(__A); + + return (__m64)__result[0]; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpd_ps(__m128d __A) { + __v4sf __result; + __v4si __temp; + const __v4si __vzero = {0, 0, 0, 0}; + + __asm__("xvcvdpsp %x0,%x1" : "=wa"(__temp) : "wa"(__A) :); + +#ifdef _ARCH_PWR8 +#ifdef __LITTLE_ENDIAN__ + __temp = vec_mergeo(__temp, __temp); +#else + __temp = vec_mergee(__temp, __temp); +#endif + __result = (__v4sf)vec_vpkudum((__vector long long)__temp, + (__vector long long)__vzero); +#else + { + const __v16qu __pkperm = {0x00, 0x01, 0x02, 0x03, 0x08, 0x09, 0x0a, 0x0b, + 0x14, 0x15, 0x16, 0x17, 0x1c, 0x1d, 0x1e, 0x1f}; + __result = (__v4sf)vec_perm((__v16qu)__temp, (__v16qu)__vzero, __pkperm); + } +#endif + return ((__m128)__result); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttpd_epi32(__m128d __A) { + __v4si __result; + __v4si __temp; + const __v4si __vzero = {0, 0, 0, 0}; + + /* VSX Vector truncate Double-Precision to integer and Convert to + Signed Integer Word format with Saturate. */ + __asm__("xvcvdpsxws %x0,%x1" : "=wa"(__temp) : "wa"(__A) :); + +#ifdef _ARCH_PWR8 +#ifdef __LITTLE_ENDIAN__ + __temp = vec_mergeo(__temp, __temp); +#else + __temp = vec_mergee(__temp, __temp); +#endif + __result = (__v4si)vec_vpkudum((__vector long long)__temp, + (__vector long long)__vzero); +#else + { + const __v16qu __pkperm = {0x00, 0x01, 0x02, 0x03, 0x08, 0x09, 0x0a, 0x0b, + 0x14, 0x15, 0x16, 0x17, 0x1c, 0x1d, 0x1e, 0x1f}; + __result = (__v4si)vec_perm((__v16qu)__temp, (__v16qu)__vzero, __pkperm); + } +#endif + + return ((__m128i)__result); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttpd_pi32(__m128d __A) { + __m128i __result = _mm_cvttpd_epi32(__A); + + return (__m64)__result[0]; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi128_si32(__m128i __A) { + return ((__v4si)__A)[0]; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpi32_pd(__m64 __A) { + __v4si __temp; + __v2di __tmp2; + __v4f __result; + + __temp = (__v4si)vec_splats(__A); + __tmp2 = (__v2di)vec_unpackl(__temp); + __result = vec_ctf((__vector signed long long)__tmp2, 0); + return (__m128d)__result; +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtps_epi32(__m128 __A) { + __v4sf __rounded; + __v4si __result; + + __rounded = vec_rint((__v4sf)__A); + __result = vec_cts(__rounded, 0); + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttps_epi32(__m128 __A) { + __v4si __result; + + __result = vec_cts((__v4sf)__A, 0); + return (__m128i)__result; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtps_pd(__m128 __A) { + /* Check if vec_doubleh is defined by . If so use that. */ +#ifdef vec_doubleh + return (__m128d)vec_doubleh((__v4sf)__A); +#else + /* Otherwise the compiler is not current and so need to generate the + equivalent code. */ + __v4sf __a = (__v4sf)__A; + __v4sf __temp; + __v2df __result; +#ifdef __LITTLE_ENDIAN__ + /* The input float values are in elements {[0], [1]} but the convert + instruction needs them in elements {[1], [3]}, So we use two + shift left double vector word immediates to get the elements + lined up. */ + __temp = __builtin_vsx_xxsldwi(__a, __a, 3); + __temp = __builtin_vsx_xxsldwi(__a, __temp, 2); +#else + /* The input float values are in elements {[0], [1]} but the convert + instruction needs them in elements {[0], [2]}, So we use two + shift left double vector word immediates to get the elements + lined up. */ + __temp = vec_vmrghw(__a, __a); +#endif + __asm__(" xvcvspdp %x0,%x1" : "=wa"(__result) : "wa"(__temp) :); + return (__m128d)__result; +#endif +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsd_si32(__m128d __A) { + __v2df __rounded = vec_rint((__v2df)__A); + int __result = ((__v2df)__rounded)[0]; + + return __result; +} +/* Intel intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsd_si64(__m128d __A) { + __v2df __rounded = vec_rint((__v2df)__A); + long long __result = ((__v2df)__rounded)[0]; + + return __result; +} + +/* Microsoft intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsd_si64x(__m128d __A) { + return _mm_cvtsd_si64((__v2df)__A); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttsd_si32(__m128d __A) { + int __result = ((__v2df)__A)[0]; + + return __result; +} + +/* Intel intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttsd_si64(__m128d __A) { + long long __result = ((__v2df)__A)[0]; + + return __result; +} + +/* Microsoft intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttsd_si64x(__m128d __A) { + return _mm_cvttsd_si64(__A); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsd_ss(__m128 __A, __m128d __B) { + __v4sf __result = (__v4sf)__A; + +#ifdef __LITTLE_ENDIAN__ + __v4sf __temp_s; + /* Copy double element[0] to element [1] for conversion. */ + __v2df __temp_b = vec_splat((__v2df)__B, 0); + + /* Pre-rotate __A left 3 (logically right 1) elements. */ + __result = __builtin_vsx_xxsldwi(__result, __result, 3); + /* Convert double to single float scalar in a vector. */ + __asm__("xscvdpsp %x0,%x1" : "=wa"(__temp_s) : "wa"(__temp_b) :); + /* Shift the resulting scalar into vector element [0]. */ + __result = __builtin_vsx_xxsldwi(__result, __temp_s, 1); +#else + __result[0] = ((__v2df)__B)[0]; +#endif + return (__m128)__result; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi32_sd(__m128d __A, int __B) { + __v2df __result = (__v2df)__A; + double __db = __B; + __result[0] = __db; + return (__m128d)__result; +} + +/* Intel intrinsic. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64_sd(__m128d __A, long long __B) { + __v2df __result = (__v2df)__A; + double __db = __B; + __result[0] = __db; + return (__m128d)__result; +} + +/* Microsoft intrinsic. */ +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64x_sd(__m128d __A, long long __B) { + return _mm_cvtsi64_sd(__A, __B); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtss_sd(__m128d __A, __m128 __B) { +#ifdef __LITTLE_ENDIAN__ + /* Use splat to move element [0] into position for the convert. */ + __v4sf __temp = vec_splat((__v4sf)__B, 0); + __v2df __res; + /* Convert single float scalar to double in a vector. */ + __asm__("xscvspdp %x0,%x1" : "=wa"(__res) : "wa"(__temp) :); + return (__m128d)vec_mergel(__res, (__v2df)__A); +#else + __v2df __res = (__v2df)__A; + __res[0] = ((__v4sf)__B)[0]; + return (__m128d)__res; +#endif +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shuffle_pd(__m128d __A, __m128d __B, const int __mask) { + __vector double __result; + const int __litmsk = __mask & 0x3; + + if (__litmsk == 0) + __result = vec_mergeh(__A, __B); +#if __GNUC__ < 6 + else if (__litmsk == 1) + __result = vec_xxpermdi(__B, __A, 2); + else if (__litmsk == 2) + __result = vec_xxpermdi(__B, __A, 1); +#else + else if (__litmsk == 1) + __result = vec_xxpermdi(__A, __B, 2); + else if (__litmsk == 2) + __result = vec_xxpermdi(__A, __B, 1); +#endif + else + __result = vec_mergel(__A, __B); + + return __result; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_pd(__m128d __A, __m128d __B) { + return (__m128d)vec_mergel((__v2df)__A, (__v2df)__B); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_pd(__m128d __A, __m128d __B) { + return (__m128d)vec_mergeh((__v2df)__A, (__v2df)__B); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadh_pd(__m128d __A, double const *__B) { + __v2df __result = (__v2df)__A; + __result[1] = *__B; + return (__m128d)__result; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadl_pd(__m128d __A, double const *__B) { + __v2df __result = (__v2df)__A; + __result[0] = *__B; + return (__m128d)__result; +} + +#ifdef _ARCH_PWR8 +/* Intrinsic functions that require PowerISA 2.07 minimum. */ + +/* Creates a 2-bit mask from the most significant bits of the DPFP values. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movemask_pd(__m128d __A) { +#ifdef _ARCH_PWR10 + return vec_extractm((__v2du)__A); +#else + __vector unsigned long long __result; + static const __vector unsigned int __perm_mask = { +#ifdef __LITTLE_ENDIAN__ + 0x80800040, 0x80808080, 0x80808080, 0x80808080 +#else + 0x80808080, 0x80808080, 0x80808080, 0x80804000 +#endif + }; + + __result = ((__vector unsigned long long)vec_vbpermq( + (__vector unsigned char)__A, (__vector unsigned char)__perm_mask)); + +#ifdef __LITTLE_ENDIAN__ + return __result[1]; +#else + return __result[0]; +#endif +#endif /* !_ARCH_PWR10 */ +} +#endif /* _ARCH_PWR8 */ + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packs_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_packs((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packs_epi32(__m128i __A, __m128i __B) { + return (__m128i)vec_packs((__v4si)__A, (__v4si)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packus_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_packsu((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_mergel((__v16qu)__A, (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_mergel((__v8hu)__A, (__v8hu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_epi32(__m128i __A, __m128i __B) { + return (__m128i)vec_mergel((__v4su)__A, (__v4su)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_epi64(__m128i __A, __m128i __B) { + return (__m128i)vec_mergel((__vector long long)__A, (__vector long long)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_mergeh((__v16qu)__A, (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_mergeh((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_epi32(__m128i __A, __m128i __B) { + return (__m128i)vec_mergeh((__v4si)__A, (__v4si)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_epi64(__m128i __A, __m128i __B) { + return (__m128i)vec_mergeh((__vector long long)__A, (__vector long long)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_epi8(__m128i __A, __m128i __B) { + return (__m128i)((__v16qu)__A + (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_epi16(__m128i __A, __m128i __B) { + return (__m128i)((__v8hu)__A + (__v8hu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_epi32(__m128i __A, __m128i __B) { + return (__m128i)((__v4su)__A + (__v4su)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_epi64(__m128i __A, __m128i __B) { + return (__m128i)((__v2du)__A + (__v2du)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_adds((__v16qi)__A, (__v16qi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_adds((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_epu8(__m128i __A, __m128i __B) { + return (__m128i)vec_adds((__v16qu)__A, (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_epu16(__m128i __A, __m128i __B) { + return (__m128i)vec_adds((__v8hu)__A, (__v8hu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_epi8(__m128i __A, __m128i __B) { + return (__m128i)((__v16qu)__A - (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_epi16(__m128i __A, __m128i __B) { + return (__m128i)((__v8hu)__A - (__v8hu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_epi32(__m128i __A, __m128i __B) { + return (__m128i)((__v4su)__A - (__v4su)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_epi64(__m128i __A, __m128i __B) { + return (__m128i)((__v2du)__A - (__v2du)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_subs((__v16qi)__A, (__v16qi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_subs((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_epu8(__m128i __A, __m128i __B) { + return (__m128i)vec_subs((__v16qu)__A, (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_epu16(__m128i __A, __m128i __B) { + return (__m128i)vec_subs((__v8hu)__A, (__v8hu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_madd_epi16(__m128i __A, __m128i __B) { + __vector signed int __zero = {0, 0, 0, 0}; + + return (__m128i)vec_vmsumshm((__v8hi)__A, (__v8hi)__B, __zero); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mulhi_epi16(__m128i __A, __m128i __B) { + __vector signed int __w0, __w1; + + __vector unsigned char __xform1 = { +#ifdef __LITTLE_ENDIAN__ + 0x02, 0x03, 0x12, 0x13, 0x06, 0x07, 0x16, 0x17, 0x0A, + 0x0B, 0x1A, 0x1B, 0x0E, 0x0F, 0x1E, 0x1F +#else + 0x00, 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15, 0x08, + 0x09, 0x18, 0x19, 0x0C, 0x0D, 0x1C, 0x1D +#endif + }; + + __w0 = vec_vmulesh((__v8hi)__A, (__v8hi)__B); + __w1 = vec_vmulosh((__v8hi)__A, (__v8hi)__B); + return (__m128i)vec_perm(__w0, __w1, __xform1); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mullo_epi16(__m128i __A, __m128i __B) { + return (__m128i)((__v8hi)__A * (__v8hi)__B); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_su32(__m64 __A, __m64 __B) { + unsigned int __a = __A; + unsigned int __b = __B; + + return ((__m64)__a * (__m64)__b); +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_epu32(__m128i __A, __m128i __B) { +#if __GNUC__ < 8 + __v2du __result; + +#ifdef __LITTLE_ENDIAN__ + /* VMX Vector Multiply Odd Unsigned Word. */ + __asm__("vmulouw %0,%1,%2" : "=v"(__result) : "v"(__A), "v"(__B) :); +#else + /* VMX Vector Multiply Even Unsigned Word. */ + __asm__("vmuleuw %0,%1,%2" : "=v"(__result) : "v"(__A), "v"(__B) :); +#endif + return (__m128i)__result; +#else + return (__m128i)vec_mule((__v4su)__A, (__v4su)__B); +#endif +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_epi16(__m128i __A, int __B) { + __v8hu __lshift; + __v8hi __result = {0, 0, 0, 0, 0, 0, 0, 0}; + + if (__B >= 0 && __B < 16) { + if (__builtin_constant_p(__B)) + __lshift = (__v8hu)vec_splat_s16(__B); + else + __lshift = vec_splats((unsigned short)__B); + + __result = vec_sl((__v8hi)__A, __lshift); + } + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_epi32(__m128i __A, int __B) { + __v4su __lshift; + __v4si __result = {0, 0, 0, 0}; + + if (__B >= 0 && __B < 32) { + if (__builtin_constant_p(__B) && __B < 16) + __lshift = (__v4su)vec_splat_s32(__B); + else + __lshift = vec_splats((unsigned int)__B); + + __result = vec_sl((__v4si)__A, __lshift); + } + + return (__m128i)__result; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_epi64(__m128i __A, int __B) { + __v2du __lshift; + __v2di __result = {0, 0}; + + if (__B >= 0 && __B < 64) { + if (__builtin_constant_p(__B) && __B < 16) + __lshift = (__v2du)vec_splat_s32(__B); + else + __lshift = (__v2du)vec_splats((unsigned int)__B); + + __result = vec_sl((__v2di)__A, __lshift); + } + + return (__m128i)__result; +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srai_epi16(__m128i __A, int __B) { + __v8hu __rshift = {15, 15, 15, 15, 15, 15, 15, 15}; + __v8hi __result; + + if (__B < 16) { + if (__builtin_constant_p(__B)) + __rshift = (__v8hu)vec_splat_s16(__B); + else + __rshift = vec_splats((unsigned short)__B); + } + __result = vec_sra((__v8hi)__A, __rshift); + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srai_epi32(__m128i __A, int __B) { + __v4su __rshift = {31, 31, 31, 31}; + __v4si __result; + + if (__B < 32) { + if (__builtin_constant_p(__B)) { + if (__B < 16) + __rshift = (__v4su)vec_splat_s32(__B); + else + __rshift = (__v4su)vec_splats((unsigned int)__B); + } else + __rshift = vec_splats((unsigned int)__B); + } + __result = vec_sra((__v4si)__A, __rshift); + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_bslli_si128(__m128i __A, const int __N) { + __v16qu __result; + const __v16qu __zeros = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + + if (__N < 16) + __result = vec_sld((__v16qu)__A, __zeros, __N); + else + __result = __zeros; + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_bsrli_si128(__m128i __A, const int __N) { + __v16qu __result; + const __v16qu __zeros = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + + if (__N < 16) +#ifdef __LITTLE_ENDIAN__ + if (__builtin_constant_p(__N)) + /* Would like to use Vector Shift Left Double by Octet + Immediate here to use the immediate form and avoid + load of __N * 8 value into a separate VR. */ + __result = vec_sld(__zeros, (__v16qu)__A, (16 - __N)); + else +#endif + { + __v16qu __shift = vec_splats((unsigned char)(__N * 8)); +#ifdef __LITTLE_ENDIAN__ + __result = vec_sro((__v16qu)__A, __shift); +#else + __result = vec_slo((__v16qu)__A, __shift); +#endif + } + else + __result = __zeros; + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srli_si128(__m128i __A, const int __N) { + return _mm_bsrli_si128(__A, __N); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_si128(__m128i __A, const int _imm5) { + __v16qu __result; + const __v16qu __zeros = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + + if (_imm5 < 16) +#ifdef __LITTLE_ENDIAN__ + __result = vec_sld((__v16qu)__A, __zeros, _imm5); +#else + __result = vec_sld(__zeros, (__v16qu)__A, (16 - _imm5)); +#endif + else + __result = __zeros; + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + + _mm_srli_epi16(__m128i __A, int __B) { + __v8hu __rshift; + __v8hi __result = {0, 0, 0, 0, 0, 0, 0, 0}; + + if (__B < 16) { + if (__builtin_constant_p(__B)) + __rshift = (__v8hu)vec_splat_s16(__B); + else + __rshift = vec_splats((unsigned short)__B); + + __result = vec_sr((__v8hi)__A, __rshift); + } + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srli_epi32(__m128i __A, int __B) { + __v4su __rshift; + __v4si __result = {0, 0, 0, 0}; + + if (__B < 32) { + if (__builtin_constant_p(__B)) { + if (__B < 16) + __rshift = (__v4su)vec_splat_s32(__B); + else + __rshift = (__v4su)vec_splats((unsigned int)__B); + } else + __rshift = vec_splats((unsigned int)__B); + + __result = vec_sr((__v4si)__A, __rshift); + } + + return (__m128i)__result; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srli_epi64(__m128i __A, int __B) { + __v2du __rshift; + __v2di __result = {0, 0}; + + if (__B < 64) { + if (__builtin_constant_p(__B)) { + if (__B < 16) + __rshift = (__v2du)vec_splat_s32(__B); + else + __rshift = (__v2du)vec_splats((unsigned long long)__B); + } else + __rshift = (__v2du)vec_splats((unsigned int)__B); + + __result = vec_sr((__v2di)__A, __rshift); + } + + return (__m128i)__result; +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sll_epi16(__m128i __A, __m128i __B) { + __v8hu __lshift; + __vector __bool short __shmask; + const __v8hu __shmax = {15, 15, 15, 15, 15, 15, 15, 15}; + __v8hu __result; + +#ifdef __LITTLE_ENDIAN__ + __lshift = vec_splat((__v8hu)__B, 0); +#else + __lshift = vec_splat((__v8hu)__B, 3); +#endif + __shmask = vec_cmple(__lshift, __shmax); + __result = vec_sl((__v8hu)__A, __lshift); + __result = vec_sel((__v8hu)__shmask, __result, __shmask); + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sll_epi32(__m128i __A, __m128i __B) { + __v4su __lshift; + __vector __bool int __shmask; + const __v4su __shmax = {32, 32, 32, 32}; + __v4su __result; +#ifdef __LITTLE_ENDIAN__ + __lshift = vec_splat((__v4su)__B, 0); +#else + __lshift = vec_splat((__v4su)__B, 1); +#endif + __shmask = vec_cmplt(__lshift, __shmax); + __result = vec_sl((__v4su)__A, __lshift); + __result = vec_sel((__v4su)__shmask, __result, __shmask); + + return (__m128i)__result; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sll_epi64(__m128i __A, __m128i __B) { + __v2du __lshift; + __vector __bool long long __shmask; + const __v2du __shmax = {64, 64}; + __v2du __result; + + __lshift = vec_splat((__v2du)__B, 0); + __shmask = vec_cmplt(__lshift, __shmax); + __result = vec_sl((__v2du)__A, __lshift); + __result = vec_sel((__v2du)__shmask, __result, __shmask); + + return (__m128i)__result; +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sra_epi16(__m128i __A, __m128i __B) { + const __v8hu __rshmax = {15, 15, 15, 15, 15, 15, 15, 15}; + __v8hu __rshift; + __v8hi __result; + +#ifdef __LITTLE_ENDIAN__ + __rshift = vec_splat((__v8hu)__B, 0); +#else + __rshift = vec_splat((__v8hu)__B, 3); +#endif + __rshift = vec_min(__rshift, __rshmax); + __result = vec_sra((__v8hi)__A, __rshift); + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sra_epi32(__m128i __A, __m128i __B) { + const __v4su __rshmax = {31, 31, 31, 31}; + __v4su __rshift; + __v4si __result; + +#ifdef __LITTLE_ENDIAN__ + __rshift = vec_splat((__v4su)__B, 0); +#else + __rshift = vec_splat((__v4su)__B, 1); +#endif + __rshift = vec_min(__rshift, __rshmax); + __result = vec_sra((__v4si)__A, __rshift); + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srl_epi16(__m128i __A, __m128i __B) { + __v8hu __rshift; + __vector __bool short __shmask; + const __v8hu __shmax = {15, 15, 15, 15, 15, 15, 15, 15}; + __v8hu __result; + +#ifdef __LITTLE_ENDIAN__ + __rshift = vec_splat((__v8hu)__B, 0); +#else + __rshift = vec_splat((__v8hu)__B, 3); +#endif + __shmask = vec_cmple(__rshift, __shmax); + __result = vec_sr((__v8hu)__A, __rshift); + __result = vec_sel((__v8hu)__shmask, __result, __shmask); + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srl_epi32(__m128i __A, __m128i __B) { + __v4su __rshift; + __vector __bool int __shmask; + const __v4su __shmax = {32, 32, 32, 32}; + __v4su __result; + +#ifdef __LITTLE_ENDIAN__ + __rshift = vec_splat((__v4su)__B, 0); +#else + __rshift = vec_splat((__v4su)__B, 1); +#endif + __shmask = vec_cmplt(__rshift, __shmax); + __result = vec_sr((__v4su)__A, __rshift); + __result = vec_sel((__v4su)__shmask, __result, __shmask); + + return (__m128i)__result; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srl_epi64(__m128i __A, __m128i __B) { + __v2du __rshift; + __vector __bool long long __shmask; + const __v2du __shmax = {64, 64}; + __v2du __result; + + __rshift = vec_splat((__v2du)__B, 0); + __shmask = vec_cmplt(__rshift, __shmax); + __result = vec_sr((__v2du)__A, __rshift); + __result = vec_sel((__v2du)__shmask, __result, __shmask); + + return (__m128i)__result; +} +#endif + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_and_pd(__m128d __A, __m128d __B) { + return (vec_and((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_andnot_pd(__m128d __A, __m128d __B) { + return (vec_andc((__v2df)__B, (__v2df)__A)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_or_pd(__m128d __A, __m128d __B) { + return (vec_or((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_xor_pd(__m128d __A, __m128d __B) { + return (vec_xor((__v2df)__A, (__v2df)__B)); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_and_si128(__m128i __A, __m128i __B) { + return (__m128i)vec_and((__v2di)__A, (__v2di)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_andnot_si128(__m128i __A, __m128i __B) { + return (__m128i)vec_andc((__v2di)__B, (__v2di)__A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_or_si128(__m128i __A, __m128i __B) { + return (__m128i)vec_or((__v2di)__A, (__v2di)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_xor_si128(__m128i __A, __m128i __B) { + return (__m128i)vec_xor((__v2di)__A, (__v2di)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_cmpeq((__v16qi)__A, (__v16qi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_cmpeq((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_epi32(__m128i __A, __m128i __B) { + return (__m128i)vec_cmpeq((__v4si)__A, (__v4si)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_cmplt((__v16qi)__A, (__v16qi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_cmplt((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_epi32(__m128i __A, __m128i __B) { + return (__m128i)vec_cmplt((__v4si)__A, (__v4si)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_epi8(__m128i __A, __m128i __B) { + return (__m128i)vec_cmpgt((__v16qi)__A, (__v16qi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_cmpgt((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_epi32(__m128i __A, __m128i __B) { + return (__m128i)vec_cmpgt((__v4si)__A, (__v4si)__B); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_extract_epi16(__m128i const __A, int const __N) { + return (unsigned short)((__v8hi)__A)[__N & 7]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_insert_epi16(__m128i const __A, int const __D, int const __N) { + __v8hi __result = (__v8hi)__A; + + __result[(__N & 7)] = __D; + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_max((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_epu8(__m128i __A, __m128i __B) { + return (__m128i)vec_max((__v16qu)__A, (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_epi16(__m128i __A, __m128i __B) { + return (__m128i)vec_min((__v8hi)__A, (__v8hi)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_epu8(__m128i __A, __m128i __B) { + return (__m128i)vec_min((__v16qu)__A, (__v16qu)__B); +} + +#ifdef _ARCH_PWR8 +/* Intrinsic functions that require PowerISA 2.07 minimum. */ + +/* Return a mask created from the most significant bit of each 8-bit + element in A. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movemask_epi8(__m128i __A) { +#ifdef _ARCH_PWR10 + return vec_extractm((__v16qu)__A); +#else + __vector unsigned long long __result; + static const __vector unsigned char __perm_mask = { + 0x78, 0x70, 0x68, 0x60, 0x58, 0x50, 0x48, 0x40, + 0x38, 0x30, 0x28, 0x20, 0x18, 0x10, 0x08, 0x00}; + + __result = ((__vector unsigned long long)vec_vbpermq( + (__vector unsigned char)__A, (__vector unsigned char)__perm_mask)); + +#ifdef __LITTLE_ENDIAN__ + return __result[1]; +#else + return __result[0]; +#endif +#endif /* !_ARCH_PWR10 */ +} +#endif /* _ARCH_PWR8 */ + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mulhi_epu16(__m128i __A, __m128i __B) { + __v4su __w0, __w1; + __v16qu __xform1 = { +#ifdef __LITTLE_ENDIAN__ + 0x02, 0x03, 0x12, 0x13, 0x06, 0x07, 0x16, 0x17, 0x0A, + 0x0B, 0x1A, 0x1B, 0x0E, 0x0F, 0x1E, 0x1F +#else + 0x00, 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15, 0x08, + 0x09, 0x18, 0x19, 0x0C, 0x0D, 0x1C, 0x1D +#endif + }; + + __w0 = vec_vmuleuh((__v8hu)__A, (__v8hu)__B); + __w1 = vec_vmulouh((__v8hu)__A, (__v8hu)__B); + return (__m128i)vec_perm(__w0, __w1, __xform1); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shufflehi_epi16(__m128i __A, const int __mask) { + unsigned long __element_selector_98 = __mask & 0x03; + unsigned long __element_selector_BA = (__mask >> 2) & 0x03; + unsigned long __element_selector_DC = (__mask >> 4) & 0x03; + unsigned long __element_selector_FE = (__mask >> 6) & 0x03; + static const unsigned short __permute_selectors[4] = { +#ifdef __LITTLE_ENDIAN__ + 0x0908, 0x0B0A, 0x0D0C, 0x0F0E +#else + 0x0809, 0x0A0B, 0x0C0D, 0x0E0F +#endif + }; + __v2du __pmask = +#ifdef __LITTLE_ENDIAN__ + {0x1716151413121110UL, 0UL}; +#else + {0x1011121314151617UL, 0UL}; +#endif + __m64_union __t; + __v2du __a, __r; + + __t.as_short[0] = __permute_selectors[__element_selector_98]; + __t.as_short[1] = __permute_selectors[__element_selector_BA]; + __t.as_short[2] = __permute_selectors[__element_selector_DC]; + __t.as_short[3] = __permute_selectors[__element_selector_FE]; + __pmask[1] = __t.as_m64; + __a = (__v2du)__A; + __r = vec_perm(__a, __a, (__vector unsigned char)__pmask); + return (__m128i)__r; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shufflelo_epi16(__m128i __A, const int __mask) { + unsigned long __element_selector_10 = __mask & 0x03; + unsigned long __element_selector_32 = (__mask >> 2) & 0x03; + unsigned long __element_selector_54 = (__mask >> 4) & 0x03; + unsigned long __element_selector_76 = (__mask >> 6) & 0x03; + static const unsigned short __permute_selectors[4] = { +#ifdef __LITTLE_ENDIAN__ + 0x0100, 0x0302, 0x0504, 0x0706 +#else + 0x0001, 0x0203, 0x0405, 0x0607 +#endif + }; + __v2du __pmask = +#ifdef __LITTLE_ENDIAN__ + {0UL, 0x1f1e1d1c1b1a1918UL}; +#else + {0UL, 0x18191a1b1c1d1e1fUL}; +#endif + __m64_union __t; + __v2du __a, __r; + __t.as_short[0] = __permute_selectors[__element_selector_10]; + __t.as_short[1] = __permute_selectors[__element_selector_32]; + __t.as_short[2] = __permute_selectors[__element_selector_54]; + __t.as_short[3] = __permute_selectors[__element_selector_76]; + __pmask[0] = __t.as_m64; + __a = (__v2du)__A; + __r = vec_perm(__a, __a, (__vector unsigned char)__pmask); + return (__m128i)__r; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shuffle_epi32(__m128i __A, const int __mask) { + unsigned long __element_selector_10 = __mask & 0x03; + unsigned long __element_selector_32 = (__mask >> 2) & 0x03; + unsigned long __element_selector_54 = (__mask >> 4) & 0x03; + unsigned long __element_selector_76 = (__mask >> 6) & 0x03; + static const unsigned int __permute_selectors[4] = { +#ifdef __LITTLE_ENDIAN__ + 0x03020100, 0x07060504, 0x0B0A0908, 0x0F0E0D0C +#else + 0x00010203, 0x04050607, 0x08090A0B, 0x0C0D0E0F +#endif + }; + __v4su __t; + + __t[0] = __permute_selectors[__element_selector_10]; + __t[1] = __permute_selectors[__element_selector_32]; + __t[2] = __permute_selectors[__element_selector_54] + 0x10101010; + __t[3] = __permute_selectors[__element_selector_76] + 0x10101010; + return (__m128i)vec_perm((__v4si)__A, (__v4si)__A, + (__vector unsigned char)__t); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_maskmoveu_si128(__m128i __A, __m128i __B, char *__C) { + __v2du __hibit = {0x7f7f7f7f7f7f7f7fUL, 0x7f7f7f7f7f7f7f7fUL}; + __v16qu __mask, __tmp; + __m128i_u *__p = (__m128i_u *)__C; + + __tmp = (__v16qu)_mm_loadu_si128(__p); + __mask = (__v16qu)vec_cmpgt((__v16qu)__B, (__v16qu)__hibit); + __tmp = vec_sel(__tmp, (__v16qu)__A, __mask); + _mm_storeu_si128(__p, (__m128i)__tmp); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_avg_epu8(__m128i __A, __m128i __B) { + return (__m128i)vec_avg((__v16qu)__A, (__v16qu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_avg_epu16(__m128i __A, __m128i __B) { + return (__m128i)vec_avg((__v8hu)__A, (__v8hu)__B); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sad_epu8(__m128i __A, __m128i __B) { + __v16qu __a, __b; + __v16qu __vabsdiff; + __v4si __vsum; + const __v4su __zero = {0, 0, 0, 0}; + __v4si __result; + + __a = (__v16qu)__A; + __b = (__v16qu)__B; +#ifndef _ARCH_PWR9 + __v16qu __vmin = vec_min(__a, __b); + __v16qu __vmax = vec_max(__a, __b); + __vabsdiff = vec_sub(__vmax, __vmin); +#else + __vabsdiff = vec_absd(__a, __b); +#endif + /* Sum four groups of bytes into integers. */ + __vsum = (__vector signed int)vec_sum4s(__vabsdiff, __zero); +#ifdef __LITTLE_ENDIAN__ + /* Sum across four integers with two integer results. */ + __asm__("vsum2sws %0,%1,%2" : "=v"(__result) : "v"(__vsum), "v"(__zero)); + /* Note: vec_sum2s could be used here, but on little-endian, vector + shifts are added that are not needed for this use-case. + A vector shift to correctly position the 32-bit integer results + (currently at [0] and [2]) to [1] and [3] would then need to be + swapped back again since the desired results are two 64-bit + integers ([1]|[0] and [3]|[2]). Thus, no shift is performed. */ +#else + /* Sum across four integers with two integer results. */ + __result = vec_sum2s(__vsum, (__vector signed int)__zero); + /* Rotate the sums into the correct position. */ + __result = vec_sld(__result, __result, 6); +#endif + return (__m128i)__result; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_stream_si32(int *__A, int __B) { + /* Use the data cache block touch for store transient. */ + __asm__("dcbtstt 0,%0" : : "b"(__A) : "memory"); + *__A = __B; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_stream_si64(long long int *__A, long long int __B) { + /* Use the data cache block touch for store transient. */ + __asm__(" dcbtstt 0,%0" : : "b"(__A) : "memory"); + *__A = __B; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_stream_si128(__m128i *__A, __m128i __B) { + /* Use the data cache block touch for store transient. */ + __asm__("dcbtstt 0,%0" : : "b"(__A) : "memory"); + *__A = __B; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_stream_pd(double *__A, __m128d __B) { + /* Use the data cache block touch for store transient. */ + __asm__("dcbtstt 0,%0" : : "b"(__A) : "memory"); + *(__m128d *)__A = __B; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_clflush(void const *__A) { + /* Use the data cache block flush. */ + __asm__("dcbf 0,%0" : : "b"(__A) : "memory"); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_lfence(void) { + /* Use light weight sync for load to load ordering. */ + __atomic_thread_fence(__ATOMIC_RELEASE); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mfence(void) { + /* Use heavy weight sync for any to any ordering. */ + __atomic_thread_fence(__ATOMIC_SEQ_CST); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi32_si128(int __A) { + return _mm_set_epi32(0, 0, 0, __A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64_si128(long long __A) { + return __extension__(__m128i)(__v2di){__A, 0LL}; +} + +/* Microsoft intrinsic. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64x_si128(long long __A) { + return __extension__(__m128i)(__v2di){__A, 0LL}; +} + +/* Casts between various SP, DP, INT vector types. Note that these do no + conversion of values, they just change the type. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_castpd_ps(__m128d __A) { + return (__m128)__A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_castpd_si128(__m128d __A) { + return (__m128i)__A; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_castps_pd(__m128 __A) { + return (__m128d)__A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_castps_si128(__m128 __A) { + return (__m128i)__A; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_castsi128_ps(__m128i __A) { + return (__m128)__A; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_castsi128_pd(__m128i __A) { + return (__m128d)__A; +} + +#else +#include_next +#endif /* defined(__powerpc64__) && \ + * (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) */ + +#endif /* EMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/immintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/immintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..c1ada9889d4af771b691dadd2915b9784eb7c9c7 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/immintrin.h @@ -0,0 +1,27 @@ +/*===---- immintrin.h - Implementation of Intel intrinsics on PowerPC ------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef IMMINTRIN_H_ +#define IMMINTRIN_H_ + +#include + +#include + +#include + +#include + +#include + +#include + +#include + +#endif /* IMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/mm_malloc.h b/llvm/lib/clang/19/include/ppc_wrappers/mm_malloc.h new file mode 100644 index 0000000000000000000000000000000000000000..7c1e625e44d511f7c82218be95a589d86bfc5d4f --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/mm_malloc.h @@ -0,0 +1,45 @@ +/*===---- mm_malloc.h - Implementation of _mm_malloc and _mm_free ----------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef _MM_MALLOC_H_INCLUDED +#define _MM_MALLOC_H_INCLUDED + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +#include + +/* We can't depend on since the prototype of posix_memalign + may not be visible. */ +#ifndef __cplusplus +extern int posix_memalign(void **, size_t, size_t); +#else +extern "C" int posix_memalign(void **, size_t, size_t); +#endif + +static __inline void *_mm_malloc(size_t __size, size_t __alignment) { + /* PowerPC64 ELF V2 ABI requires quadword alignment. */ + size_t __vec_align = sizeof(__vector float); + void *__ptr; + + if (__alignment < __vec_align) + __alignment = __vec_align; + if (posix_memalign(&__ptr, __alignment, __size) == 0) + return __ptr; + else + return NULL; +} + +static __inline void _mm_free(void *__ptr) { free(__ptr); } + +#else +#include_next +#endif + +#endif /* _MM_MALLOC_H_INCLUDED */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/mmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/mmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..0be3af2b0bd72e6cd19b06cff95402fe4df55a9a --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/mmintrin.h @@ -0,0 +1,1453 @@ +/*===---- mmintrin.h - Implementation of MMX intrinsics on PowerPC ---------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Implemented from the specification included in the Intel C++ Compiler + User Guide and Reference, version 9.0. */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header file is to help porting code using Intel intrinsics + explicitly from x86_64 to powerpc64/powerpc64le. + + Since PowerPC target doesn't support native 64-bit vector type, we + typedef __m64 to 64-bit unsigned long long in MMX intrinsics, which + works well for _si64 and some _pi32 operations. + + For _pi16 and _pi8 operations, it's better to transfer __m64 into + 128-bit PowerPC vector first. Power8 introduced direct register + move instructions which helps for more efficient implementation. + + It's user's responsibility to determine if the results of such port + are acceptable or further changes are needed. Please note that much + code using Intel intrinsics CAN BE REWRITTEN in more portable and + efficient standard C or GNU C extensions with 64-bit scalar + operations, or 128-bit SSE/Altivec operations, which are more + recommended. */ +#error \ + "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." +#endif + +#ifndef _MMINTRIN_H_INCLUDED +#define _MMINTRIN_H_INCLUDED + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +#include +/* The Intel API is flexible enough that we must allow aliasing with other + vector types, and their scalar components. */ +typedef __attribute__((__aligned__(8))) unsigned long long __m64; + +typedef __attribute__((__aligned__(8))) union { + __m64 as_m64; + char as_char[8]; + signed char as_signed_char[8]; + short as_short[4]; + int as_int[2]; + long long as_long_long; + float as_float[2]; + double as_double; +} __m64_union; + +/* Empty the multimedia state. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_empty(void) { + /* nothing to do on PowerPC. */ +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_empty(void) { + /* nothing to do on PowerPC. */ +} + +/* Convert I to a __m64 object. The integer is zero-extended to 64-bits. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi32_si64(int __i) { + return (__m64)(unsigned int)__i; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_from_int(int __i) { + return _mm_cvtsi32_si64(__i); +} + +/* Convert the lower 32 bits of the __m64 object into an integer. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64_si32(__m64 __i) { + return ((int)__i); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_to_int(__m64 __i) { + return _mm_cvtsi64_si32(__i); +} + +/* Convert I to a __m64 object. */ + +/* Intel intrinsic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_from_int64(long long __i) { + return (__m64)__i; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64_m64(long long __i) { + return (__m64)__i; +} + +/* Microsoft intrinsic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64x_si64(long long __i) { + return (__m64)__i; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_pi64x(long long __i) { + return (__m64)__i; +} + +/* Convert the __m64 object to a 64bit integer. */ + +/* Intel intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_to_int64(__m64 __i) { + return (long long)__i; +} + +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtm64_si64(__m64 __i) { + return (long long)__i; +} + +/* Microsoft intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64_si64x(__m64 __i) { + return (long long)__i; +} + +#ifdef _ARCH_PWR8 +/* Pack the four 16-bit values from M1 into the lower four 8-bit values of + the result, and the four 16-bit values from M2 into the upper four 8-bit + values of the result, all with signed saturation. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packs_pi16(__m64 __m1, __m64 __m2) { + __vector signed short __vm1; + __vector signed char __vresult; + + __vm1 = (__vector signed short)(__vector unsigned long long) +#ifdef __LITTLE_ENDIAN__ + {__m1, __m2}; +#else + {__m2, __m1}; +#endif + __vresult = vec_packs(__vm1, __vm1); + return (__m64)((__vector long long)__vresult)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_packsswb(__m64 __m1, __m64 __m2) { + return _mm_packs_pi16(__m1, __m2); +} + +/* Pack the two 32-bit values from M1 in to the lower two 16-bit values of + the result, and the two 32-bit values from M2 into the upper two 16-bit + values of the result, all with signed saturation. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packs_pi32(__m64 __m1, __m64 __m2) { + __vector signed int __vm1; + __vector signed short __vresult; + + __vm1 = (__vector signed int)(__vector unsigned long long) +#ifdef __LITTLE_ENDIAN__ + {__m1, __m2}; +#else + {__m2, __m1}; +#endif + __vresult = vec_packs(__vm1, __vm1); + return (__m64)((__vector long long)__vresult)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_packssdw(__m64 __m1, __m64 __m2) { + return _mm_packs_pi32(__m1, __m2); +} + +/* Pack the four 16-bit values from M1 into the lower four 8-bit values of + the result, and the four 16-bit values from M2 into the upper four 8-bit + values of the result, all with unsigned saturation. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packs_pu16(__m64 __m1, __m64 __m2) { + __vector unsigned char __r; + __vector signed short __vm1 = (__vector signed short)(__vector long long) +#ifdef __LITTLE_ENDIAN__ + {__m1, __m2}; +#else + {__m2, __m1}; +#endif + const __vector signed short __zero = {0}; + __vector __bool short __select = vec_cmplt(__vm1, __zero); + __r = + vec_packs((__vector unsigned short)__vm1, (__vector unsigned short)__vm1); + __vector __bool char __packsel = vec_pack(__select, __select); + __r = vec_sel(__r, (const __vector unsigned char)__zero, __packsel); + return (__m64)((__vector long long)__r)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_packuswb(__m64 __m1, __m64 __m2) { + return _mm_packs_pu16(__m1, __m2); +} +#endif /* end ARCH_PWR8 */ + +/* Interleave the four 8-bit values from the high half of M1 with the four + 8-bit values from the high half of M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_pi8(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector unsigned char __a, __b, __c; + + __a = (__vector unsigned char)vec_splats(__m1); + __b = (__vector unsigned char)vec_splats(__m2); + __c = vec_mergel(__a, __b); + return (__m64)((__vector long long)__c)[1]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_char[0] = __mu1.as_char[4]; + __res.as_char[1] = __mu2.as_char[4]; + __res.as_char[2] = __mu1.as_char[5]; + __res.as_char[3] = __mu2.as_char[5]; + __res.as_char[4] = __mu1.as_char[6]; + __res.as_char[5] = __mu2.as_char[6]; + __res.as_char[6] = __mu1.as_char[7]; + __res.as_char[7] = __mu2.as_char[7]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_punpckhbw(__m64 __m1, __m64 __m2) { + return _mm_unpackhi_pi8(__m1, __m2); +} + +/* Interleave the two 16-bit values from the high half of M1 with the two + 16-bit values from the high half of M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_pi16(__m64 __m1, __m64 __m2) { + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_short[0] = __mu1.as_short[2]; + __res.as_short[1] = __mu2.as_short[2]; + __res.as_short[2] = __mu1.as_short[3]; + __res.as_short[3] = __mu2.as_short[3]; + + return (__m64)__res.as_m64; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_punpckhwd(__m64 __m1, __m64 __m2) { + return _mm_unpackhi_pi16(__m1, __m2); +} +/* Interleave the 32-bit value from the high half of M1 with the 32-bit + value from the high half of M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_pi32(__m64 __m1, __m64 __m2) { + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_int[0] = __mu1.as_int[1]; + __res.as_int[1] = __mu2.as_int[1]; + + return (__m64)__res.as_m64; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_punpckhdq(__m64 __m1, __m64 __m2) { + return _mm_unpackhi_pi32(__m1, __m2); +} +/* Interleave the four 8-bit values from the low half of M1 with the four + 8-bit values from the low half of M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_pi8(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector unsigned char __a, __b, __c; + + __a = (__vector unsigned char)vec_splats(__m1); + __b = (__vector unsigned char)vec_splats(__m2); + __c = vec_mergel(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_char[0] = __mu1.as_char[0]; + __res.as_char[1] = __mu2.as_char[0]; + __res.as_char[2] = __mu1.as_char[1]; + __res.as_char[3] = __mu2.as_char[1]; + __res.as_char[4] = __mu1.as_char[2]; + __res.as_char[5] = __mu2.as_char[2]; + __res.as_char[6] = __mu1.as_char[3]; + __res.as_char[7] = __mu2.as_char[3]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_punpcklbw(__m64 __m1, __m64 __m2) { + return _mm_unpacklo_pi8(__m1, __m2); +} +/* Interleave the two 16-bit values from the low half of M1 with the two + 16-bit values from the low half of M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_pi16(__m64 __m1, __m64 __m2) { + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_short[0] = __mu1.as_short[0]; + __res.as_short[1] = __mu2.as_short[0]; + __res.as_short[2] = __mu1.as_short[1]; + __res.as_short[3] = __mu2.as_short[1]; + + return (__m64)__res.as_m64; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_punpcklwd(__m64 __m1, __m64 __m2) { + return _mm_unpacklo_pi16(__m1, __m2); +} + +/* Interleave the 32-bit value from the low half of M1 with the 32-bit + value from the low half of M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_pi32(__m64 __m1, __m64 __m2) { + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_int[0] = __mu1.as_int[0]; + __res.as_int[1] = __mu2.as_int[0]; + + return (__m64)__res.as_m64; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_punpckldq(__m64 __m1, __m64 __m2) { + return _mm_unpacklo_pi32(__m1, __m2); +} + +/* Add the 8-bit values in M1 to the 8-bit values in M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_pi8(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed char __a, __b, __c; + + __a = (__vector signed char)vec_splats(__m1); + __b = (__vector signed char)vec_splats(__m2); + __c = vec_add(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_char[0] = __mu1.as_char[0] + __mu2.as_char[0]; + __res.as_char[1] = __mu1.as_char[1] + __mu2.as_char[1]; + __res.as_char[2] = __mu1.as_char[2] + __mu2.as_char[2]; + __res.as_char[3] = __mu1.as_char[3] + __mu2.as_char[3]; + __res.as_char[4] = __mu1.as_char[4] + __mu2.as_char[4]; + __res.as_char[5] = __mu1.as_char[5] + __mu2.as_char[5]; + __res.as_char[6] = __mu1.as_char[6] + __mu2.as_char[6]; + __res.as_char[7] = __mu1.as_char[7] + __mu2.as_char[7]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddb(__m64 __m1, __m64 __m2) { + return _mm_add_pi8(__m1, __m2); +} + +/* Add the 16-bit values in M1 to the 16-bit values in M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_pi16(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = vec_add(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_short[0] = __mu1.as_short[0] + __mu2.as_short[0]; + __res.as_short[1] = __mu1.as_short[1] + __mu2.as_short[1]; + __res.as_short[2] = __mu1.as_short[2] + __mu2.as_short[2]; + __res.as_short[3] = __mu1.as_short[3] + __mu2.as_short[3]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddw(__m64 __m1, __m64 __m2) { + return _mm_add_pi16(__m1, __m2); +} + +/* Add the 32-bit values in M1 to the 32-bit values in M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_pi32(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR9 + __vector signed int __a, __b, __c; + + __a = (__vector signed int)vec_splats(__m1); + __b = (__vector signed int)vec_splats(__m2); + __c = vec_add(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_int[0] = __mu1.as_int[0] + __mu2.as_int[0]; + __res.as_int[1] = __mu1.as_int[1] + __mu2.as_int[1]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddd(__m64 __m1, __m64 __m2) { + return _mm_add_pi32(__m1, __m2); +} + +/* Subtract the 8-bit values in M2 from the 8-bit values in M1. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_pi8(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed char __a, __b, __c; + + __a = (__vector signed char)vec_splats(__m1); + __b = (__vector signed char)vec_splats(__m2); + __c = vec_sub(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_char[0] = __mu1.as_char[0] - __mu2.as_char[0]; + __res.as_char[1] = __mu1.as_char[1] - __mu2.as_char[1]; + __res.as_char[2] = __mu1.as_char[2] - __mu2.as_char[2]; + __res.as_char[3] = __mu1.as_char[3] - __mu2.as_char[3]; + __res.as_char[4] = __mu1.as_char[4] - __mu2.as_char[4]; + __res.as_char[5] = __mu1.as_char[5] - __mu2.as_char[5]; + __res.as_char[6] = __mu1.as_char[6] - __mu2.as_char[6]; + __res.as_char[7] = __mu1.as_char[7] - __mu2.as_char[7]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubb(__m64 __m1, __m64 __m2) { + return _mm_sub_pi8(__m1, __m2); +} + +/* Subtract the 16-bit values in M2 from the 16-bit values in M1. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_pi16(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = vec_sub(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_short[0] = __mu1.as_short[0] - __mu2.as_short[0]; + __res.as_short[1] = __mu1.as_short[1] - __mu2.as_short[1]; + __res.as_short[2] = __mu1.as_short[2] - __mu2.as_short[2]; + __res.as_short[3] = __mu1.as_short[3] - __mu2.as_short[3]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubw(__m64 __m1, __m64 __m2) { + return _mm_sub_pi16(__m1, __m2); +} + +/* Subtract the 32-bit values in M2 from the 32-bit values in M1. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_pi32(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR9 + __vector signed int __a, __b, __c; + + __a = (__vector signed int)vec_splats(__m1); + __b = (__vector signed int)vec_splats(__m2); + __c = vec_sub(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_int[0] = __mu1.as_int[0] - __mu2.as_int[0]; + __res.as_int[1] = __mu1.as_int[1] - __mu2.as_int[1]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubd(__m64 __m1, __m64 __m2) { + return _mm_sub_pi32(__m1, __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_si64(__m64 __m1, __m64 __m2) { + return (__m1 + __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_si64(__m64 __m1, __m64 __m2) { + return (__m1 - __m2); +} + +/* Shift the 64-bit value in M left by COUNT. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sll_si64(__m64 __m, __m64 __count) { + return (__m << __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psllq(__m64 __m, __m64 __count) { + return _mm_sll_si64(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_si64(__m64 __m, const int __count) { + return (__m << __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psllqi(__m64 __m, const int __count) { + return _mm_slli_si64(__m, __count); +} + +/* Shift the 64-bit value in M left by COUNT; shift in zeros. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srl_si64(__m64 __m, __m64 __count) { + return (__m >> __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrlq(__m64 __m, __m64 __count) { + return _mm_srl_si64(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srli_si64(__m64 __m, const int __count) { + return (__m >> __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrlqi(__m64 __m, const int __count) { + return _mm_srli_si64(__m, __count); +} + +/* Bit-wise AND the 64-bit values in M1 and M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_and_si64(__m64 __m1, __m64 __m2) { + return (__m1 & __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pand(__m64 __m1, __m64 __m2) { + return _mm_and_si64(__m1, __m2); +} + +/* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the + 64-bit value in M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_andnot_si64(__m64 __m1, __m64 __m2) { + return (~__m1 & __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pandn(__m64 __m1, __m64 __m2) { + return _mm_andnot_si64(__m1, __m2); +} + +/* Bit-wise inclusive OR the 64-bit values in M1 and M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_or_si64(__m64 __m1, __m64 __m2) { + return (__m1 | __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_por(__m64 __m1, __m64 __m2) { + return _mm_or_si64(__m1, __m2); +} + +/* Bit-wise exclusive OR the 64-bit values in M1 and M2. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_xor_si64(__m64 __m1, __m64 __m2) { + return (__m1 ^ __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pxor(__m64 __m1, __m64 __m2) { + return _mm_xor_si64(__m1, __m2); +} + +/* Creates a 64-bit zero. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setzero_si64(void) { + return (__m64)0; +} + +/* Compare eight 8-bit values. The result of the comparison is 0xFF if the + test is true and zero if false. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_pi8(__m64 __m1, __m64 __m2) { +#if defined(_ARCH_PWR6) && defined(__powerpc64__) + __m64 __res; + __asm__("cmpb %0,%1,%2;\n" : "=r"(__res) : "r"(__m1), "r"(__m2) :); + return (__res); +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_char[0] = (__mu1.as_char[0] == __mu2.as_char[0]) ? -1 : 0; + __res.as_char[1] = (__mu1.as_char[1] == __mu2.as_char[1]) ? -1 : 0; + __res.as_char[2] = (__mu1.as_char[2] == __mu2.as_char[2]) ? -1 : 0; + __res.as_char[3] = (__mu1.as_char[3] == __mu2.as_char[3]) ? -1 : 0; + __res.as_char[4] = (__mu1.as_char[4] == __mu2.as_char[4]) ? -1 : 0; + __res.as_char[5] = (__mu1.as_char[5] == __mu2.as_char[5]) ? -1 : 0; + __res.as_char[6] = (__mu1.as_char[6] == __mu2.as_char[6]) ? -1 : 0; + __res.as_char[7] = (__mu1.as_char[7] == __mu2.as_char[7]) ? -1 : 0; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pcmpeqb(__m64 __m1, __m64 __m2) { + return _mm_cmpeq_pi8(__m1, __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_pi8(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed char __a, __b, __c; + + __a = (__vector signed char)vec_splats(__m1); + __b = (__vector signed char)vec_splats(__m2); + __c = (__vector signed char)vec_cmpgt(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_char[0] = (__mu1.as_char[0] > __mu2.as_char[0]) ? -1 : 0; + __res.as_char[1] = (__mu1.as_char[1] > __mu2.as_char[1]) ? -1 : 0; + __res.as_char[2] = (__mu1.as_char[2] > __mu2.as_char[2]) ? -1 : 0; + __res.as_char[3] = (__mu1.as_char[3] > __mu2.as_char[3]) ? -1 : 0; + __res.as_char[4] = (__mu1.as_char[4] > __mu2.as_char[4]) ? -1 : 0; + __res.as_char[5] = (__mu1.as_char[5] > __mu2.as_char[5]) ? -1 : 0; + __res.as_char[6] = (__mu1.as_char[6] > __mu2.as_char[6]) ? -1 : 0; + __res.as_char[7] = (__mu1.as_char[7] > __mu2.as_char[7]) ? -1 : 0; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pcmpgtb(__m64 __m1, __m64 __m2) { + return _mm_cmpgt_pi8(__m1, __m2); +} + +/* Compare four 16-bit values. The result of the comparison is 0xFFFF if + the test is true and zero if false. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_pi16(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = (__vector signed short)vec_cmpeq(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_short[0] = (__mu1.as_short[0] == __mu2.as_short[0]) ? -1 : 0; + __res.as_short[1] = (__mu1.as_short[1] == __mu2.as_short[1]) ? -1 : 0; + __res.as_short[2] = (__mu1.as_short[2] == __mu2.as_short[2]) ? -1 : 0; + __res.as_short[3] = (__mu1.as_short[3] == __mu2.as_short[3]) ? -1 : 0; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pcmpeqw(__m64 __m1, __m64 __m2) { + return _mm_cmpeq_pi16(__m1, __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_pi16(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR8 + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = (__vector signed short)vec_cmpgt(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_short[0] = (__mu1.as_short[0] > __mu2.as_short[0]) ? -1 : 0; + __res.as_short[1] = (__mu1.as_short[1] > __mu2.as_short[1]) ? -1 : 0; + __res.as_short[2] = (__mu1.as_short[2] > __mu2.as_short[2]) ? -1 : 0; + __res.as_short[3] = (__mu1.as_short[3] > __mu2.as_short[3]) ? -1 : 0; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pcmpgtw(__m64 __m1, __m64 __m2) { + return _mm_cmpgt_pi16(__m1, __m2); +} + +/* Compare two 32-bit values. The result of the comparison is 0xFFFFFFFF if + the test is true and zero if false. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_pi32(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR9 + __vector signed int __a, __b, __c; + + __a = (__vector signed int)vec_splats(__m1); + __b = (__vector signed int)vec_splats(__m2); + __c = (__vector signed int)vec_cmpeq(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_int[0] = (__mu1.as_int[0] == __mu2.as_int[0]) ? -1 : 0; + __res.as_int[1] = (__mu1.as_int[1] == __mu2.as_int[1]) ? -1 : 0; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pcmpeqd(__m64 __m1, __m64 __m2) { + return _mm_cmpeq_pi32(__m1, __m2); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_pi32(__m64 __m1, __m64 __m2) { +#if _ARCH_PWR9 + __vector signed int __a, __b, __c; + + __a = (__vector signed int)vec_splats(__m1); + __b = (__vector signed int)vec_splats(__m2); + __c = (__vector signed int)vec_cmpgt(__a, __b); + return (__m64)((__vector long long)__c)[0]; +#else + __m64_union __mu1, __mu2, __res; + + __mu1.as_m64 = __m1; + __mu2.as_m64 = __m2; + + __res.as_int[0] = (__mu1.as_int[0] > __mu2.as_int[0]) ? -1 : 0; + __res.as_int[1] = (__mu1.as_int[1] > __mu2.as_int[1]) ? -1 : 0; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pcmpgtd(__m64 __m1, __m64 __m2) { + return _mm_cmpgt_pi32(__m1, __m2); +} + +#if _ARCH_PWR8 +/* Add the 8-bit values in M1 to the 8-bit values in M2 using signed + saturated arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_pi8(__m64 __m1, __m64 __m2) { + __vector signed char __a, __b, __c; + + __a = (__vector signed char)vec_splats(__m1); + __b = (__vector signed char)vec_splats(__m2); + __c = vec_adds(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddsb(__m64 __m1, __m64 __m2) { + return _mm_adds_pi8(__m1, __m2); +} +/* Add the 16-bit values in M1 to the 16-bit values in M2 using signed + saturated arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_pi16(__m64 __m1, __m64 __m2) { + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = vec_adds(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddsw(__m64 __m1, __m64 __m2) { + return _mm_adds_pi16(__m1, __m2); +} +/* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned + saturated arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_pu8(__m64 __m1, __m64 __m2) { + __vector unsigned char __a, __b, __c; + + __a = (__vector unsigned char)vec_splats(__m1); + __b = (__vector unsigned char)vec_splats(__m2); + __c = vec_adds(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddusb(__m64 __m1, __m64 __m2) { + return _mm_adds_pu8(__m1, __m2); +} + +/* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned + saturated arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_adds_pu16(__m64 __m1, __m64 __m2) { + __vector unsigned short __a, __b, __c; + + __a = (__vector unsigned short)vec_splats(__m1); + __b = (__vector unsigned short)vec_splats(__m2); + __c = vec_adds(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_paddusw(__m64 __m1, __m64 __m2) { + return _mm_adds_pu16(__m1, __m2); +} + +/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed + saturating arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_pi8(__m64 __m1, __m64 __m2) { + __vector signed char __a, __b, __c; + + __a = (__vector signed char)vec_splats(__m1); + __b = (__vector signed char)vec_splats(__m2); + __c = vec_subs(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubsb(__m64 __m1, __m64 __m2) { + return _mm_subs_pi8(__m1, __m2); +} + +/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using + signed saturating arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_pi16(__m64 __m1, __m64 __m2) { + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = vec_subs(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubsw(__m64 __m1, __m64 __m2) { + return _mm_subs_pi16(__m1, __m2); +} + +/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using + unsigned saturating arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_pu8(__m64 __m1, __m64 __m2) { + __vector unsigned char __a, __b, __c; + + __a = (__vector unsigned char)vec_splats(__m1); + __b = (__vector unsigned char)vec_splats(__m2); + __c = vec_subs(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubusb(__m64 __m1, __m64 __m2) { + return _mm_subs_pu8(__m1, __m2); +} + +/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using + unsigned saturating arithmetic. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_subs_pu16(__m64 __m1, __m64 __m2) { + __vector unsigned short __a, __b, __c; + + __a = (__vector unsigned short)vec_splats(__m1); + __b = (__vector unsigned short)vec_splats(__m2); + __c = vec_subs(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psubusw(__m64 __m1, __m64 __m2) { + return _mm_subs_pu16(__m1, __m2); +} + +/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing + four 32-bit intermediate results, which are then summed by pairs to + produce two 32-bit results. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_madd_pi16(__m64 __m1, __m64 __m2) { + __vector signed short __a, __b; + __vector signed int __c; + __vector signed int __zero = {0, 0, 0, 0}; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = vec_vmsumshm(__a, __b, __zero); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmaddwd(__m64 __m1, __m64 __m2) { + return _mm_madd_pi16(__m1, __m2); +} +/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in + M2 and produce the high 16 bits of the 32-bit results. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mulhi_pi16(__m64 __m1, __m64 __m2) { + __vector signed short __a, __b; + __vector signed short __c; + __vector signed int __w0, __w1; + __vector unsigned char __xform1 = { +#ifdef __LITTLE_ENDIAN__ + 0x02, 0x03, 0x12, 0x13, 0x06, 0x07, 0x16, 0x17, 0x0A, + 0x0B, 0x1A, 0x1B, 0x0E, 0x0F, 0x1E, 0x1F +#else + 0x00, 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15, 0x00, + 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15 +#endif + }; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + + __w0 = vec_vmulesh(__a, __b); + __w1 = vec_vmulosh(__a, __b); + __c = (__vector signed short)vec_perm(__w0, __w1, __xform1); + + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmulhw(__m64 __m1, __m64 __m2) { + return _mm_mulhi_pi16(__m1, __m2); +} + +/* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce + the low 16 bits of the results. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mullo_pi16(__m64 __m1, __m64 __m2) { + __vector signed short __a, __b, __c; + + __a = (__vector signed short)vec_splats(__m1); + __b = (__vector signed short)vec_splats(__m2); + __c = __a * __b; + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmullw(__m64 __m1, __m64 __m2) { + return _mm_mullo_pi16(__m1, __m2); +} + +/* Shift four 16-bit values in M left by COUNT. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sll_pi16(__m64 __m, __m64 __count) { + __vector signed short __r; + __vector unsigned short __c; + + if (__count <= 15) { + __r = (__vector signed short)vec_splats(__m); + __c = (__vector unsigned short)vec_splats((unsigned short)__count); + __r = vec_sl(__r, (__vector unsigned short)__c); + return (__m64)((__vector long long)__r)[0]; + } else + return (0); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psllw(__m64 __m, __m64 __count) { + return _mm_sll_pi16(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_pi16(__m64 __m, int __count) { + /* Promote int to long then invoke mm_sll_pi16. */ + return _mm_sll_pi16(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psllwi(__m64 __m, int __count) { + return _mm_slli_pi16(__m, __count); +} + +/* Shift two 32-bit values in M left by COUNT. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sll_pi32(__m64 __m, __m64 __count) { + __m64_union __res; + + __res.as_m64 = __m; + + __res.as_int[0] = __res.as_int[0] << __count; + __res.as_int[1] = __res.as_int[1] << __count; + return (__res.as_m64); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pslld(__m64 __m, __m64 __count) { + return _mm_sll_pi32(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_slli_pi32(__m64 __m, int __count) { + /* Promote int to long then invoke mm_sll_pi32. */ + return _mm_sll_pi32(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pslldi(__m64 __m, int __count) { + return _mm_slli_pi32(__m, __count); +} + +/* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sra_pi16(__m64 __m, __m64 __count) { + __vector signed short __r; + __vector unsigned short __c; + + if (__count <= 15) { + __r = (__vector signed short)vec_splats(__m); + __c = (__vector unsigned short)vec_splats((unsigned short)__count); + __r = vec_sra(__r, (__vector unsigned short)__c); + return (__m64)((__vector long long)__r)[0]; + } else + return (0); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psraw(__m64 __m, __m64 __count) { + return _mm_sra_pi16(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srai_pi16(__m64 __m, int __count) { + /* Promote int to long then invoke mm_sra_pi32. */ + return _mm_sra_pi16(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrawi(__m64 __m, int __count) { + return _mm_srai_pi16(__m, __count); +} + +/* Shift two 32-bit values in M right by COUNT; shift in the sign bit. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sra_pi32(__m64 __m, __m64 __count) { + __m64_union __res; + + __res.as_m64 = __m; + + __res.as_int[0] = __res.as_int[0] >> __count; + __res.as_int[1] = __res.as_int[1] >> __count; + return (__res.as_m64); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrad(__m64 __m, __m64 __count) { + return _mm_sra_pi32(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srai_pi32(__m64 __m, int __count) { + /* Promote int to long then invoke mm_sra_pi32. */ + return _mm_sra_pi32(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psradi(__m64 __m, int __count) { + return _mm_srai_pi32(__m, __count); +} + +/* Shift four 16-bit values in M right by COUNT; shift in zeros. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srl_pi16(__m64 __m, __m64 __count) { + __vector unsigned short __r; + __vector unsigned short __c; + + if (__count <= 15) { + __r = (__vector unsigned short)vec_splats(__m); + __c = (__vector unsigned short)vec_splats((unsigned short)__count); + __r = vec_sr(__r, (__vector unsigned short)__c); + return (__m64)((__vector long long)__r)[0]; + } else + return (0); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrlw(__m64 __m, __m64 __count) { + return _mm_srl_pi16(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srli_pi16(__m64 __m, int __count) { + /* Promote int to long then invoke mm_sra_pi32. */ + return _mm_srl_pi16(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrlwi(__m64 __m, int __count) { + return _mm_srli_pi16(__m, __count); +} + +/* Shift two 32-bit values in M right by COUNT; shift in zeros. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srl_pi32(__m64 __m, __m64 __count) { + __m64_union __res; + + __res.as_m64 = __m; + + __res.as_int[0] = (unsigned int)__res.as_int[0] >> __count; + __res.as_int[1] = (unsigned int)__res.as_int[1] >> __count; + return (__res.as_m64); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrld(__m64 __m, __m64 __count) { + return _mm_srl_pi32(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_srli_pi32(__m64 __m, int __count) { + /* Promote int to long then invoke mm_srl_pi32. */ + return _mm_srl_pi32(__m, __count); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psrldi(__m64 __m, int __count) { + return _mm_srli_pi32(__m, __count); +} +#endif /* _ARCH_PWR8 */ + +/* Creates a vector of two 32-bit values; I0 is least significant. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_pi32(int __i1, int __i0) { + __m64_union __res; + + __res.as_int[0] = __i0; + __res.as_int[1] = __i1; + return (__res.as_m64); +} + +/* Creates a vector of four 16-bit values; W0 is least significant. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_pi16(short __w3, short __w2, short __w1, short __w0) { + __m64_union __res; + + __res.as_short[0] = __w0; + __res.as_short[1] = __w1; + __res.as_short[2] = __w2; + __res.as_short[3] = __w3; + return (__res.as_m64); +} + +/* Creates a vector of eight 8-bit values; B0 is least significant. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, + char __b2, char __b1, char __b0) { + __m64_union __res; + + __res.as_char[0] = __b0; + __res.as_char[1] = __b1; + __res.as_char[2] = __b2; + __res.as_char[3] = __b3; + __res.as_char[4] = __b4; + __res.as_char[5] = __b5; + __res.as_char[6] = __b6; + __res.as_char[7] = __b7; + return (__res.as_m64); +} + +/* Similar, but with the arguments in reverse order. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_pi32(int __i0, int __i1) { + __m64_union __res; + + __res.as_int[0] = __i0; + __res.as_int[1] = __i1; + return (__res.as_m64); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) { + return _mm_set_pi16(__w3, __w2, __w1, __w0); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, + char __b5, char __b6, char __b7) { + return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0); +} + +/* Creates a vector of two 32-bit values, both elements containing I. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_pi32(int __i) { + __m64_union __res; + + __res.as_int[0] = __i; + __res.as_int[1] = __i; + return (__res.as_m64); +} + +/* Creates a vector of four 16-bit values, all elements containing W. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_pi16(short __w) { +#if _ARCH_PWR9 + __vector signed short w; + + w = (__vector signed short)vec_splats(__w); + return (__m64)((__vector long long)w)[0]; +#else + __m64_union __res; + + __res.as_short[0] = __w; + __res.as_short[1] = __w; + __res.as_short[2] = __w; + __res.as_short[3] = __w; + return (__res.as_m64); +#endif +} + +/* Creates a vector of eight 8-bit values, all elements containing B. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_pi8(signed char __b) { +#if _ARCH_PWR8 + __vector signed char __res; + + __res = (__vector signed char)vec_splats(__b); + return (__m64)((__vector long long)__res)[0]; +#else + __m64_union __res; + + __res.as_char[0] = __b; + __res.as_char[1] = __b; + __res.as_char[2] = __b; + __res.as_char[3] = __b; + __res.as_char[4] = __b; + __res.as_char[5] = __b; + __res.as_char[6] = __b; + __res.as_char[7] = __b; + return (__res.as_m64); +#endif +} + +#else +#include_next +#endif /* defined(__powerpc64__) && \ + * (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) */ + +#endif /* _MMINTRIN_H_INCLUDED */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/nmmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/nmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..789bba6bc0d33d0fca781ca3eda25217c8b58eb7 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/nmmintrin.h @@ -0,0 +1,26 @@ +/*===---- nmmintrin.h - Implementation of SSE4 intrinsics on PowerPC -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header is distributed to simplify porting x86_64 code that + makes explicit use of Intel intrinsics to powerpc64le. + It is the user's responsibility to determine if the results are + acceptable and make additional changes as necessary. + Note that much code that uses Intel intrinsics can be rewritten in + standard C or GNU C extensions, which are more portable and better + optimized across multiple targets. */ +#endif + +#ifndef NMMINTRIN_H_ +#define NMMINTRIN_H_ + +/* We just include SSE4.1 header file. */ +#include + +#endif /* NMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/pmmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/pmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..db128192abfb465677e85732e0e9f176c20f6f4a --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/pmmintrin.h @@ -0,0 +1,145 @@ +/*===---- pmmintrin.h - Implementation of SSE3 intrinsics on PowerPC -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Implemented from the specification included in the Intel C++ Compiler + User Guide and Reference, version 9.0. */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header is distributed to simplify porting x86_64 code that + makes explicit use of Intel intrinsics to powerpc64le. + It is the user's responsibility to determine if the results are + acceptable and make additional changes as necessary. + Note that much code that uses Intel intrinsics can be rewritten in + standard C or GNU C extensions, which are more portable and better + optimized across multiple targets. + + In the specific case of X86 SSE3 intrinsics, the PowerPC VMX/VSX ISA + is a good match for most SIMD operations. However the Horizontal + add/sub requires the data pairs be permuted into a separate + registers with vertical even/odd alignment for the operation. + And the addsub operation requires the sign of only the even numbered + elements be flipped (xored with -0.0). + For larger blocks of code using these intrinsic implementations, + the compiler be should be able to schedule instructions to avoid + additional latency. + + In the specific case of the monitor and mwait instructions there are + no direct equivalent in the PowerISA at this time. So those + intrinsics are not implemented. */ +#error \ + "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." +#endif + +#ifndef PMMINTRIN_H_ +#define PMMINTRIN_H_ + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +/* We need definitions from the SSE2 and SSE header files*/ +#include + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_addsub_ps(__m128 __X, __m128 __Y) { + const __v4sf __even_n0 = {-0.0, 0.0, -0.0, 0.0}; + __v4sf __even_neg_Y = vec_xor(__Y, __even_n0); + return (__m128)vec_add(__X, __even_neg_Y); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_addsub_pd(__m128d __X, __m128d __Y) { + const __v2df __even_n0 = {-0.0, 0.0}; + __v2df __even_neg_Y = vec_xor(__Y, __even_n0); + return (__m128d)vec_add(__X, __even_neg_Y); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadd_ps(__m128 __X, __m128 __Y) { + __vector unsigned char __xform2 = {0x00, 0x01, 0x02, 0x03, 0x08, 0x09, + 0x0A, 0x0B, 0x10, 0x11, 0x12, 0x13, + 0x18, 0x19, 0x1A, 0x1B}; + __vector unsigned char __xform1 = {0x04, 0x05, 0x06, 0x07, 0x0C, 0x0D, + 0x0E, 0x0F, 0x14, 0x15, 0x16, 0x17, + 0x1C, 0x1D, 0x1E, 0x1F}; + return (__m128)vec_add(vec_perm((__v4sf)__X, (__v4sf)__Y, __xform2), + vec_perm((__v4sf)__X, (__v4sf)__Y, __xform1)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsub_ps(__m128 __X, __m128 __Y) { + __vector unsigned char __xform2 = {0x00, 0x01, 0x02, 0x03, 0x08, 0x09, + 0x0A, 0x0B, 0x10, 0x11, 0x12, 0x13, + 0x18, 0x19, 0x1A, 0x1B}; + __vector unsigned char __xform1 = {0x04, 0x05, 0x06, 0x07, 0x0C, 0x0D, + 0x0E, 0x0F, 0x14, 0x15, 0x16, 0x17, + 0x1C, 0x1D, 0x1E, 0x1F}; + return (__m128)vec_sub(vec_perm((__v4sf)__X, (__v4sf)__Y, __xform2), + vec_perm((__v4sf)__X, (__v4sf)__Y, __xform1)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadd_pd(__m128d __X, __m128d __Y) { + return (__m128d)vec_add(vec_mergeh((__v2df)__X, (__v2df)__Y), + vec_mergel((__v2df)__X, (__v2df)__Y)); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsub_pd(__m128d __X, __m128d __Y) { + return (__m128d)vec_sub(vec_mergeh((__v2df)__X, (__v2df)__Y), + vec_mergel((__v2df)__X, (__v2df)__Y)); +} + +#ifdef _ARCH_PWR8 +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movehdup_ps(__m128 __X) { + return (__m128)vec_mergeo((__v4su)__X, (__v4su)__X); +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_moveldup_ps(__m128 __X) { + return (__m128)vec_mergee((__v4su)__X, (__v4su)__X); +} +#endif + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loaddup_pd(double const *__P) { + return (__m128d)vec_splats(*__P); +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movedup_pd(__m128d __X) { + return _mm_shuffle_pd(__X, __X, _MM_SHUFFLE2(0, 0)); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_lddqu_si128(__m128i const *__P) { + return (__m128i)(vec_vsx_ld(0, (signed int const *)__P)); +} + +/* POWER8 / POWER9 have no equivalent for _mm_monitor nor _mm_wait. */ + +#else +#include_next +#endif /* defined(__powerpc64__) && \ + * (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) */ + +#endif /* PMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/smmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/smmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..19cdecb18d2b83f83760a92efeedc7d7aa4947c2 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/smmintrin.h @@ -0,0 +1,683 @@ +/*===---- smmintrin.h - Implementation of SSE4 intrinsics on PowerPC -------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Implemented from the specification included in the Intel C++ Compiler + User Guide and Reference, version 9.0. + + NOTE: This is NOT a complete implementation of the SSE4 intrinsics! */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header is distributed to simplify porting x86_64 code that + makes explicit use of Intel intrinsics to powerpc64/powerpc64le. + + It is the user's responsibility to determine if the results are + acceptable and make additional changes as necessary. + + Note that much code that uses Intel intrinsics can be rewritten in + standard C or GNU C extensions, which are more portable and better + optimized across multiple targets. */ +#error \ + "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." +#endif + +#ifndef SMMINTRIN_H_ +#define SMMINTRIN_H_ + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +#include +#include + +/* Rounding mode macros. */ +#define _MM_FROUND_TO_NEAREST_INT 0x00 +#define _MM_FROUND_TO_ZERO 0x01 +#define _MM_FROUND_TO_POS_INF 0x02 +#define _MM_FROUND_TO_NEG_INF 0x03 +#define _MM_FROUND_CUR_DIRECTION 0x04 + +#define _MM_FROUND_NINT (_MM_FROUND_TO_NEAREST_INT | _MM_FROUND_RAISE_EXC) +#define _MM_FROUND_FLOOR (_MM_FROUND_TO_NEG_INF | _MM_FROUND_RAISE_EXC) +#define _MM_FROUND_CEIL (_MM_FROUND_TO_POS_INF | _MM_FROUND_RAISE_EXC) +#define _MM_FROUND_TRUNC (_MM_FROUND_TO_ZERO | _MM_FROUND_RAISE_EXC) +#define _MM_FROUND_RINT (_MM_FROUND_CUR_DIRECTION | _MM_FROUND_RAISE_EXC) +#define _MM_FROUND_NEARBYINT (_MM_FROUND_CUR_DIRECTION | _MM_FROUND_NO_EXC) + +#define _MM_FROUND_RAISE_EXC 0x00 +#define _MM_FROUND_NO_EXC 0x08 + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_round_pd(__m128d __A, int __rounding) { + __v2df __r; + union { + double __fr; + long long __fpscr; + } __enables_save, __fpscr_save; + + if (__rounding & _MM_FROUND_NO_EXC) { + /* Save enabled exceptions, disable all exceptions, + and preserve the rounding mode. */ +#ifdef _ARCH_PWR9 + __asm__("mffsce %0" : "=f"(__fpscr_save.__fr)); + __enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8; +#else + __fpscr_save.__fr = __builtin_ppc_mffs(); + __enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8; + __fpscr_save.__fpscr &= ~0xf8; + __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr); +#endif + /* Insert an artificial "read/write" reference to the variable + read below, to ensure the compiler does not schedule + a read/use of the variable before the FPSCR is modified, above. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : "+wa"(__A)); + } + + switch (__rounding) { + case _MM_FROUND_TO_NEAREST_INT: +#ifdef _ARCH_PWR9 + __fpscr_save.__fr = __builtin_ppc_mffsl(); +#else + __fpscr_save.__fr = __builtin_ppc_mffs(); + __fpscr_save.__fpscr &= 0x70007f0ffL; +#endif + __attribute__((fallthrough)); + case _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC: + __builtin_ppc_set_fpscr_rn(0b00); + /* Insert an artificial "read/write" reference to the variable + read below, to ensure the compiler does not schedule + a read/use of the variable before the FPSCR is modified, above. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : "+wa"(__A)); + + __r = vec_rint((__v2df)__A); + + /* Insert an artificial "read" reference to the variable written + above, to ensure the compiler does not schedule the computation + of the value after the manipulation of the FPSCR, below. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : : "wa"(__r)); + __builtin_ppc_set_fpscr_rn(__fpscr_save.__fpscr); + break; + case _MM_FROUND_TO_NEG_INF: + case _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC: + __r = vec_floor((__v2df)__A); + break; + case _MM_FROUND_TO_POS_INF: + case _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC: + __r = vec_ceil((__v2df)__A); + break; + case _MM_FROUND_TO_ZERO: + case _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC: + __r = vec_trunc((__v2df)__A); + break; + case _MM_FROUND_CUR_DIRECTION: + __r = vec_rint((__v2df)__A); + break; + } + if (__rounding & _MM_FROUND_NO_EXC) { + /* Insert an artificial "read" reference to the variable written + above, to ensure the compiler does not schedule the computation + of the value after the manipulation of the FPSCR, below. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : : "wa"(__r)); + /* Restore enabled exceptions. */ +#ifdef _ARCH_PWR9 + __fpscr_save.__fr = __builtin_ppc_mffsl(); +#else + __fpscr_save.__fr = __builtin_ppc_mffs(); + __fpscr_save.__fpscr &= 0x70007f0ffL; +#endif + __fpscr_save.__fpscr |= __enables_save.__fpscr; + __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr); + } + return (__m128d)__r; +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_round_sd(__m128d __A, __m128d __B, int __rounding) { + __B = _mm_round_pd(__B, __rounding); + __v2df __r = {((__v2df)__B)[0], ((__v2df)__A)[1]}; + return (__m128d)__r; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_round_ps(__m128 __A, int __rounding) { + __v4sf __r; + union { + double __fr; + long long __fpscr; + } __enables_save, __fpscr_save; + + if (__rounding & _MM_FROUND_NO_EXC) { + /* Save enabled exceptions, disable all exceptions, + and preserve the rounding mode. */ +#ifdef _ARCH_PWR9 + __asm__("mffsce %0" : "=f"(__fpscr_save.__fr)); + __enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8; +#else + __fpscr_save.__fr = __builtin_ppc_mffs(); + __enables_save.__fpscr = __fpscr_save.__fpscr & 0xf8; + __fpscr_save.__fpscr &= ~0xf8; + __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr); +#endif + /* Insert an artificial "read/write" reference to the variable + read below, to ensure the compiler does not schedule + a read/use of the variable before the FPSCR is modified, above. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : "+wa"(__A)); + } + + switch (__rounding) { + case _MM_FROUND_TO_NEAREST_INT: +#ifdef _ARCH_PWR9 + __fpscr_save.__fr = __builtin_ppc_mffsl(); +#else + __fpscr_save.__fr = __builtin_ppc_mffs(); + __fpscr_save.__fpscr &= 0x70007f0ffL; +#endif + __attribute__((fallthrough)); + case _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC: + __builtin_ppc_set_fpscr_rn(0b00); + /* Insert an artificial "read/write" reference to the variable + read below, to ensure the compiler does not schedule + a read/use of the variable before the FPSCR is modified, above. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : "+wa"(__A)); + + __r = vec_rint((__v4sf)__A); + + /* Insert an artificial "read" reference to the variable written + above, to ensure the compiler does not schedule the computation + of the value after the manipulation of the FPSCR, below. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : : "wa"(__r)); + __builtin_ppc_set_fpscr_rn(__fpscr_save.__fpscr); + break; + case _MM_FROUND_TO_NEG_INF: + case _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC: + __r = vec_floor((__v4sf)__A); + break; + case _MM_FROUND_TO_POS_INF: + case _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC: + __r = vec_ceil((__v4sf)__A); + break; + case _MM_FROUND_TO_ZERO: + case _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC: + __r = vec_trunc((__v4sf)__A); + break; + case _MM_FROUND_CUR_DIRECTION: + __r = vec_rint((__v4sf)__A); + break; + } + if (__rounding & _MM_FROUND_NO_EXC) { + /* Insert an artificial "read" reference to the variable written + above, to ensure the compiler does not schedule the computation + of the value after the manipulation of the FPSCR, below. + This can be removed if and when GCC PR102783 is fixed. + */ + __asm__("" : : "wa"(__r)); + /* Restore enabled exceptions. */ +#ifdef _ARCH_PWR9 + __fpscr_save.__fr = __builtin_ppc_mffsl(); +#else + __fpscr_save.__fr = __builtin_ppc_mffs(); + __fpscr_save.__fpscr &= 0x70007f0ffL; +#endif + __fpscr_save.__fpscr |= __enables_save.__fpscr; + __builtin_ppc_mtfsf(0b00000011, __fpscr_save.__fr); + } + return (__m128)__r; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_round_ss(__m128 __A, __m128 __B, int __rounding) { + __B = _mm_round_ps(__B, __rounding); + __v4sf __r = (__v4sf)__A; + __r[0] = ((__v4sf)__B)[0]; + return (__m128)__r; +} + +#define _mm_ceil_pd(V) _mm_round_pd((V), _MM_FROUND_CEIL) +#define _mm_ceil_sd(D, V) _mm_round_sd((D), (V), _MM_FROUND_CEIL) + +#define _mm_floor_pd(V) _mm_round_pd((V), _MM_FROUND_FLOOR) +#define _mm_floor_sd(D, V) _mm_round_sd((D), (V), _MM_FROUND_FLOOR) + +#define _mm_ceil_ps(V) _mm_round_ps((V), _MM_FROUND_CEIL) +#define _mm_ceil_ss(D, V) _mm_round_ss((D), (V), _MM_FROUND_CEIL) + +#define _mm_floor_ps(V) _mm_round_ps((V), _MM_FROUND_FLOOR) +#define _mm_floor_ss(D, V) _mm_round_ss((D), (V), _MM_FROUND_FLOOR) + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_insert_epi8(__m128i const __A, int const __D, int const __N) { + __v16qi __result = (__v16qi)__A; + + __result[__N & 0xf] = __D; + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_insert_epi32(__m128i const __A, int const __D, int const __N) { + __v4si __result = (__v4si)__A; + + __result[__N & 3] = __D; + + return (__m128i)__result; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_insert_epi64(__m128i const __A, long long const __D, int const __N) { + __v2di __result = (__v2di)__A; + + __result[__N & 1] = __D; + + return (__m128i)__result; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_extract_epi8(__m128i __X, const int __N) { + return (unsigned char)((__v16qi)__X)[__N & 15]; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_extract_epi32(__m128i __X, const int __N) { + return ((__v4si)__X)[__N & 3]; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_extract_epi64(__m128i __X, const int __N) { + return ((__v2di)__X)[__N & 1]; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_extract_ps(__m128 __X, const int __N) { + return ((__v4si)__X)[__N & 3]; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { + __v16qu __charmask = vec_splats((unsigned char)__imm8); + __charmask = vec_gb(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); +#ifdef __BIG_ENDIAN__ + __shortmask = vec_reve(__shortmask); +#endif + return (__m128i)vec_sel((__v8hu)__A, (__v8hu)__B, __shortmask); +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_blendv_epi8(__m128i __A, __m128i __B, __m128i __mask) { +#ifdef _ARCH_PWR10 + return (__m128i)vec_blendv((__v16qi)__A, (__v16qi)__B, (__v16qu)__mask); +#else + const __v16qu __seven = vec_splats((unsigned char)0x07); + __v16qu __lmask = vec_sra((__v16qu)__mask, __seven); + return (__m128i)vec_sel((__v16qi)__A, (__v16qi)__B, __lmask); +#endif +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_blend_ps(__m128 __A, __m128 __B, const int __imm8) { + __v16qu __pcv[] = { + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, + {16, 17, 18, 19, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, + {0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 12, 13, 14, 15}, + {16, 17, 18, 19, 20, 21, 22, 23, 8, 9, 10, 11, 12, 13, 14, 15}, + {0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 12, 13, 14, 15}, + {16, 17, 18, 19, 4, 5, 6, 7, 24, 25, 26, 27, 12, 13, 14, 15}, + {0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 12, 13, 14, 15}, + {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 12, 13, 14, 15}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 28, 29, 30, 31}, + {16, 17, 18, 19, 4, 5, 6, 7, 8, 9, 10, 11, 28, 29, 30, 31}, + {0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31}, + {16, 17, 18, 19, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31}, + {0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31}, + {16, 17, 18, 19, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31}, + {0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, + {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, + }; + __v16qu __r = vec_perm((__v16qu)__A, (__v16qu)__B, __pcv[__imm8]); + return (__m128)__r; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_blendv_ps(__m128 __A, __m128 __B, __m128 __mask) { +#ifdef _ARCH_PWR10 + return (__m128)vec_blendv((__v4sf)__A, (__v4sf)__B, (__v4su)__mask); +#else + const __v4si __zero = {0}; + const __vector __bool int __boolmask = vec_cmplt((__v4si)__mask, __zero); + return (__m128)vec_sel((__v4su)__A, (__v4su)__B, (__v4su)__boolmask); +#endif +} + +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_blend_pd(__m128d __A, __m128d __B, const int __imm8) { + __v16qu __pcv[] = { + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, + {16, 17, 18, 19, 20, 21, 22, 23, 8, 9, 10, 11, 12, 13, 14, 15}, + {0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31}, + {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}}; + __v16qu __r = vec_perm((__v16qu)__A, (__v16qu)__B, __pcv[__imm8]); + return (__m128d)__r; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128d + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_blendv_pd(__m128d __A, __m128d __B, __m128d __mask) { +#ifdef _ARCH_PWR10 + return (__m128d)vec_blendv((__v2df)__A, (__v2df)__B, (__v2du)__mask); +#else + const __v2di __zero = {0}; + const __vector __bool long long __boolmask = + vec_cmplt((__v2di)__mask, __zero); + return (__m128d)vec_sel((__v2du)__A, (__v2du)__B, (__v2du)__boolmask); +#endif +} +#endif + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_testz_si128(__m128i __A, __m128i __B) { + /* Note: This implementation does NOT set "zero" or "carry" flags. */ + const __v16qu __zero = {0}; + return vec_all_eq(vec_and((__v16qu)__A, (__v16qu)__B), __zero); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_testc_si128(__m128i __A, __m128i __B) { + /* Note: This implementation does NOT set "zero" or "carry" flags. */ + const __v16qu __zero = {0}; + const __v16qu __notA = vec_nor((__v16qu)__A, (__v16qu)__A); + return vec_all_eq(vec_and((__v16qu)__notA, (__v16qu)__B), __zero); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_testnzc_si128(__m128i __A, __m128i __B) { + /* Note: This implementation does NOT set "zero" or "carry" flags. */ + return _mm_testz_si128(__A, __B) == 0 && _mm_testc_si128(__A, __B) == 0; +} + +#define _mm_test_all_zeros(M, V) _mm_testz_si128((M), (V)) + +#define _mm_test_all_ones(V) _mm_testc_si128((V), _mm_cmpeq_epi32((V), (V))) + +#define _mm_test_mix_ones_zeros(M, V) _mm_testnzc_si128((M), (V)) + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_epi64(__m128i __X, __m128i __Y) { + return (__m128i)vec_cmpeq((__v2di)__X, (__v2di)__Y); +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_epi8(__m128i __X, __m128i __Y) { + return (__m128i)vec_min((__v16qi)__X, (__v16qi)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_epu16(__m128i __X, __m128i __Y) { + return (__m128i)vec_min((__v8hu)__X, (__v8hu)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_epi32(__m128i __X, __m128i __Y) { + return (__m128i)vec_min((__v4si)__X, (__v4si)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_epu32(__m128i __X, __m128i __Y) { + return (__m128i)vec_min((__v4su)__X, (__v4su)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_epi8(__m128i __X, __m128i __Y) { + return (__m128i)vec_max((__v16qi)__X, (__v16qi)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_epu16(__m128i __X, __m128i __Y) { + return (__m128i)vec_max((__v8hu)__X, (__v8hu)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_epi32(__m128i __X, __m128i __Y) { + return (__m128i)vec_max((__v4si)__X, (__v4si)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_epu32(__m128i __X, __m128i __Y) { + return (__m128i)vec_max((__v4su)__X, (__v4su)__Y); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mullo_epi32(__m128i __X, __m128i __Y) { + return (__m128i)vec_mul((__v4su)__X, (__v4su)__Y); +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_epi32(__m128i __X, __m128i __Y) { + return (__m128i)vec_mule((__v4si)__X, (__v4si)__Y); +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi8_epi16(__m128i __A) { + return (__m128i)vec_unpackh((__v16qi)__A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi8_epi32(__m128i __A) { + __A = (__m128i)vec_unpackh((__v16qi)__A); + return (__m128i)vec_unpackh((__v8hi)__A); +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi8_epi64(__m128i __A) { + __A = (__m128i)vec_unpackh((__v16qi)__A); + __A = (__m128i)vec_unpackh((__v8hi)__A); + return (__m128i)vec_unpackh((__v4si)__A); +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi16_epi32(__m128i __A) { + return (__m128i)vec_unpackh((__v8hi)__A); +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi16_epi64(__m128i __A) { + __A = (__m128i)vec_unpackh((__v8hi)__A); + return (__m128i)vec_unpackh((__v4si)__A); +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepi32_epi64(__m128i __A) { + return (__m128i)vec_unpackh((__v4si)__A); +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepu8_epi16(__m128i __A) { + const __v16qu __zero = {0}; +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_mergeh((__v16qu)__A, __zero); +#else /* __BIG_ENDIAN__. */ + __A = (__m128i)vec_mergeh(__zero, (__v16qu)__A); +#endif /* __BIG_ENDIAN__. */ + return __A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepu8_epi32(__m128i __A) { + const __v16qu __zero = {0}; +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_mergeh((__v16qu)__A, __zero); + __A = (__m128i)vec_mergeh((__v8hu)__A, (__v8hu)__zero); +#else /* __BIG_ENDIAN__. */ + __A = (__m128i)vec_mergeh(__zero, (__v16qu)__A); + __A = (__m128i)vec_mergeh((__v8hu)__zero, (__v8hu)__A); +#endif /* __BIG_ENDIAN__. */ + return __A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepu8_epi64(__m128i __A) { + const __v16qu __zero = {0}; +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_mergeh((__v16qu)__A, __zero); + __A = (__m128i)vec_mergeh((__v8hu)__A, (__v8hu)__zero); + __A = (__m128i)vec_mergeh((__v4su)__A, (__v4su)__zero); +#else /* __BIG_ENDIAN__. */ + __A = (__m128i)vec_mergeh(__zero, (__v16qu)__A); + __A = (__m128i)vec_mergeh((__v8hu)__zero, (__v8hu)__A); + __A = (__m128i)vec_mergeh((__v4su)__zero, (__v4su)__A); +#endif /* __BIG_ENDIAN__. */ + return __A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepu16_epi32(__m128i __A) { + const __v8hu __zero = {0}; +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_mergeh((__v8hu)__A, __zero); +#else /* __BIG_ENDIAN__. */ + __A = (__m128i)vec_mergeh(__zero, (__v8hu)__A); +#endif /* __BIG_ENDIAN__. */ + return __A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepu16_epi64(__m128i __A) { + const __v8hu __zero = {0}; +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_mergeh((__v8hu)__A, __zero); + __A = (__m128i)vec_mergeh((__v4su)__A, (__v4su)__zero); +#else /* __BIG_ENDIAN__. */ + __A = (__m128i)vec_mergeh(__zero, (__v8hu)__A); + __A = (__m128i)vec_mergeh((__v4su)__zero, (__v4su)__A); +#endif /* __BIG_ENDIAN__. */ + return __A; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtepu32_epi64(__m128i __A) { + const __v4su __zero = {0}; +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_mergeh((__v4su)__A, __zero); +#else /* __BIG_ENDIAN__. */ + __A = (__m128i)vec_mergeh(__zero, (__v4su)__A); +#endif /* __BIG_ENDIAN__. */ + return __A; +} + +/* Return horizontal packed word minimum and its index in bits [15:0] + and bits [18:16] respectively. */ +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_minpos_epu16(__m128i __A) { + union __u { + __m128i __m; + __v8hu __uh; + }; + union __u __u = {.__m = __A}, __r = {.__m = {0}}; + unsigned short __ridx = 0; + unsigned short __rmin = __u.__uh[__ridx]; + unsigned long __i; + for (__i = 1; __i < 8; __i++) { + if (__u.__uh[__i] < __rmin) { + __rmin = __u.__uh[__i]; + __ridx = __i; + } + } + __r.__uh[0] = __rmin; + __r.__uh[1] = __ridx; + return __r.__m; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_packus_epi32(__m128i __X, __m128i __Y) { + return (__m128i)vec_packsu((__v4si)__X, (__v4si)__Y); +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_epi64(__m128i __X, __m128i __Y) { + return (__m128i)vec_cmpgt((__v2di)__X, (__v2di)__Y); +} +#endif + +#else +#include_next +#endif /* defined(__powerpc64__) && \ + * (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) */ + +#endif /* SMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/tmmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/tmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..92f08676d2dfade7391127a0612c845fbffd32bf --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/tmmintrin.h @@ -0,0 +1,453 @@ +/*===---- tmmintrin.h - Implementation of SSSE3 intrinsics on PowerPC ------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Implemented from the specification included in the Intel C++ Compiler + User Guide and Reference, version 9.0. */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header is distributed to simplify porting x86_64 code that + makes explicit use of Intel intrinsics to powerpc64le. + + It is the user's responsibility to determine if the results are + acceptable and make additional changes as necessary. + + Note that much code that uses Intel intrinsics can be rewritten in + standard C or GNU C extensions, which are more portable and better + optimized across multiple targets. */ +#endif + +#ifndef TMMINTRIN_H_ +#define TMMINTRIN_H_ + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +#include + +/* We need definitions from the SSE header files. */ +#include + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_abs_epi16(__m128i __A) { + return (__m128i)vec_abs((__v8hi)__A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_abs_epi32(__m128i __A) { + return (__m128i)vec_abs((__v4si)__A); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_abs_epi8(__m128i __A) { + return (__m128i)vec_abs((__v16qi)__A); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_abs_pi16(__m64 __A) { + __v8hi __B = (__v8hi)(__v2du){__A, __A}; + return (__m64)((__v2du)vec_abs(__B))[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_abs_pi32(__m64 __A) { + __v4si __B = (__v4si)(__v2du){__A, __A}; + return (__m64)((__v2du)vec_abs(__B))[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_abs_pi8(__m64 __A) { + __v16qi __B = (__v16qi)(__v2du){__A, __A}; + return (__m64)((__v2du)vec_abs(__B))[0]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_alignr_epi8(__m128i __A, __m128i __B, const unsigned int __count) { + if (__builtin_constant_p(__count) && __count < 16) { +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_reve((__v16qu)__A); + __B = (__m128i)vec_reve((__v16qu)__B); +#endif + __A = (__m128i)vec_sld((__v16qu)__B, (__v16qu)__A, __count); +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_reve((__v16qu)__A); +#endif + return __A; + } + + if (__count == 0) + return __B; + + if (__count >= 16) { + if (__count >= 32) { + const __v16qu __zero = {0}; + return (__m128i)__zero; + } else { + const __v16qu __shift = vec_splats((unsigned char)((__count - 16) * 8)); +#ifdef __LITTLE_ENDIAN__ + return (__m128i)vec_sro((__v16qu)__A, __shift); +#else + return (__m128i)vec_slo((__v16qu)__A, __shift); +#endif + } + } else { + const __v16qu __shiftA = vec_splats((unsigned char)((16 - __count) * 8)); + const __v16qu __shiftB = vec_splats((unsigned char)(__count * 8)); +#ifdef __LITTLE_ENDIAN__ + __A = (__m128i)vec_slo((__v16qu)__A, __shiftA); + __B = (__m128i)vec_sro((__v16qu)__B, __shiftB); +#else + __A = (__m128i)vec_sro((__v16qu)__A, __shiftA); + __B = (__m128i)vec_slo((__v16qu)__B, __shiftB); +#endif + return (__m128i)vec_or((__v16qu)__A, (__v16qu)__B); + } +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_alignr_pi8(__m64 __A, __m64 __B, unsigned int __count) { + if (__count < 16) { + __v2du __C = {__B, __A}; +#ifdef __LITTLE_ENDIAN__ + const __v4su __shift = {__count << 3, 0, 0, 0}; + __C = (__v2du)vec_sro((__v16qu)__C, (__v16qu)__shift); +#else + const __v4su __shift = {0, 0, 0, __count << 3}; + __C = (__v2du)vec_slo((__v16qu)__C, (__v16qu)__shift); +#endif + return (__m64)__C[0]; + } else { + const __m64 __zero = {0}; + return __zero; + } +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadd_epi16(__m128i __A, __m128i __B) { + const __v16qu __P = {0, 1, 4, 5, 8, 9, 12, 13, + 16, 17, 20, 21, 24, 25, 28, 29}; + const __v16qu __Q = {2, 3, 6, 7, 10, 11, 14, 15, + 18, 19, 22, 23, 26, 27, 30, 31}; + __v8hi __C = vec_perm((__v8hi)__A, (__v8hi)__B, __P); + __v8hi __D = vec_perm((__v8hi)__A, (__v8hi)__B, __Q); + return (__m128i)vec_add(__C, __D); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadd_epi32(__m128i __A, __m128i __B) { + const __v16qu __P = {0, 1, 2, 3, 8, 9, 10, 11, + 16, 17, 18, 19, 24, 25, 26, 27}; + const __v16qu __Q = {4, 5, 6, 7, 12, 13, 14, 15, + 20, 21, 22, 23, 28, 29, 30, 31}; + __v4si __C = vec_perm((__v4si)__A, (__v4si)__B, __P); + __v4si __D = vec_perm((__v4si)__A, (__v4si)__B, __Q); + return (__m128i)vec_add(__C, __D); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadd_pi16(__m64 __A, __m64 __B) { + __v8hi __C = (__v8hi)(__v2du){__A, __B}; + const __v16qu __P = {0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 4, 5, 8, 9, 12, 13}; + const __v16qu __Q = {2, 3, 6, 7, 10, 11, 14, 15, 2, 3, 6, 7, 10, 11, 14, 15}; + __v8hi __D = vec_perm(__C, __C, __Q); + __C = vec_perm(__C, __C, __P); + __C = vec_add(__C, __D); + return (__m64)((__v2du)__C)[1]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadd_pi32(__m64 __A, __m64 __B) { + __v4si __C = (__v4si)(__v2du){__A, __B}; + const __v16qu __P = {0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 8, 9, 10, 11}; + const __v16qu __Q = {4, 5, 6, 7, 12, 13, 14, 15, 4, 5, 6, 7, 12, 13, 14, 15}; + __v4si __D = vec_perm(__C, __C, __Q); + __C = vec_perm(__C, __C, __P); + __C = vec_add(__C, __D); + return (__m64)((__v2du)__C)[1]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadds_epi16(__m128i __A, __m128i __B) { + __v4si __C = {0}, __D = {0}; + __C = vec_sum4s((__v8hi)__A, __C); + __D = vec_sum4s((__v8hi)__B, __D); + __C = (__v4si)vec_packs(__C, __D); + return (__m128i)__C; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hadds_pi16(__m64 __A, __m64 __B) { + const __v4si __zero = {0}; + __v8hi __C = (__v8hi)(__v2du){__A, __B}; + __v4si __D = vec_sum4s(__C, __zero); + __C = vec_packs(__D, __D); + return (__m64)((__v2du)__C)[1]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsub_epi16(__m128i __A, __m128i __B) { + const __v16qu __P = {0, 1, 4, 5, 8, 9, 12, 13, + 16, 17, 20, 21, 24, 25, 28, 29}; + const __v16qu __Q = {2, 3, 6, 7, 10, 11, 14, 15, + 18, 19, 22, 23, 26, 27, 30, 31}; + __v8hi __C = vec_perm((__v8hi)__A, (__v8hi)__B, __P); + __v8hi __D = vec_perm((__v8hi)__A, (__v8hi)__B, __Q); + return (__m128i)vec_sub(__C, __D); +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsub_epi32(__m128i __A, __m128i __B) { + const __v16qu __P = {0, 1, 2, 3, 8, 9, 10, 11, + 16, 17, 18, 19, 24, 25, 26, 27}; + const __v16qu __Q = {4, 5, 6, 7, 12, 13, 14, 15, + 20, 21, 22, 23, 28, 29, 30, 31}; + __v4si __C = vec_perm((__v4si)__A, (__v4si)__B, __P); + __v4si __D = vec_perm((__v4si)__A, (__v4si)__B, __Q); + return (__m128i)vec_sub(__C, __D); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsub_pi16(__m64 __A, __m64 __B) { + const __v16qu __P = {0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 4, 5, 8, 9, 12, 13}; + const __v16qu __Q = {2, 3, 6, 7, 10, 11, 14, 15, 2, 3, 6, 7, 10, 11, 14, 15}; + __v8hi __C = (__v8hi)(__v2du){__A, __B}; + __v8hi __D = vec_perm(__C, __C, __Q); + __C = vec_perm(__C, __C, __P); + __C = vec_sub(__C, __D); + return (__m64)((__v2du)__C)[1]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsub_pi32(__m64 __A, __m64 __B) { + const __v16qu __P = {0, 1, 2, 3, 8, 9, 10, 11, 0, 1, 2, 3, 8, 9, 10, 11}; + const __v16qu __Q = {4, 5, 6, 7, 12, 13, 14, 15, 4, 5, 6, 7, 12, 13, 14, 15}; + __v4si __C = (__v4si)(__v2du){__A, __B}; + __v4si __D = vec_perm(__C, __C, __Q); + __C = vec_perm(__C, __C, __P); + __C = vec_sub(__C, __D); + return (__m64)((__v2du)__C)[1]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsubs_epi16(__m128i __A, __m128i __B) { + const __v16qu __P = {0, 1, 4, 5, 8, 9, 12, 13, + 16, 17, 20, 21, 24, 25, 28, 29}; + const __v16qu __Q = {2, 3, 6, 7, 10, 11, 14, 15, + 18, 19, 22, 23, 26, 27, 30, 31}; + __v8hi __C = vec_perm((__v8hi)__A, (__v8hi)__B, __P); + __v8hi __D = vec_perm((__v8hi)__A, (__v8hi)__B, __Q); + return (__m128i)vec_subs(__C, __D); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_hsubs_pi16(__m64 __A, __m64 __B) { + const __v16qu __P = {0, 1, 4, 5, 8, 9, 12, 13, 0, 1, 4, 5, 8, 9, 12, 13}; + const __v16qu __Q = {2, 3, 6, 7, 10, 11, 14, 15, 2, 3, 6, 7, 10, 11, 14, 15}; + __v8hi __C = (__v8hi)(__v2du){__A, __B}; + __v8hi __D = vec_perm(__C, __C, __P); + __v8hi __E = vec_perm(__C, __C, __Q); + __C = vec_subs(__D, __E); + return (__m64)((__v2du)__C)[1]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shuffle_epi8(__m128i __A, __m128i __B) { + const __v16qi __zero = {0}; + __vector __bool char __select = vec_cmplt((__v16qi)__B, __zero); + __v16qi __C = vec_perm((__v16qi)__A, (__v16qi)__A, (__v16qu)__B); + return (__m128i)vec_sel(__C, __zero, __select); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shuffle_pi8(__m64 __A, __m64 __B) { + const __v16qi __zero = {0}; + __v16qi __C = (__v16qi)(__v2du){__A, __A}; + __v16qi __D = (__v16qi)(__v2du){__B, __B}; + __vector __bool char __select = vec_cmplt((__v16qi)__D, __zero); + __C = vec_perm((__v16qi)__C, (__v16qi)__C, (__v16qu)__D); + __C = vec_sel(__C, __zero, __select); + return (__m64)((__v2du)(__C))[0]; +} + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sign_epi8(__m128i __A, __m128i __B) { + const __v16qi __zero = {0}; + __v16qi __selectneg = (__v16qi)vec_cmplt((__v16qi)__B, __zero); + __v16qi __selectpos = + (__v16qi)vec_neg((__v16qi)vec_cmpgt((__v16qi)__B, __zero)); + __v16qi __conv = vec_add(__selectneg, __selectpos); + return (__m128i)vec_mul((__v16qi)__A, (__v16qi)__conv); +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sign_epi16(__m128i __A, __m128i __B) { + const __v8hi __zero = {0}; + __v8hi __selectneg = (__v8hi)vec_cmplt((__v8hi)__B, __zero); + __v8hi __selectpos = (__v8hi)vec_neg((__v8hi)vec_cmpgt((__v8hi)__B, __zero)); + __v8hi __conv = vec_add(__selectneg, __selectpos); + return (__m128i)vec_mul((__v8hi)__A, (__v8hi)__conv); +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sign_epi32(__m128i __A, __m128i __B) { + const __v4si __zero = {0}; + __v4si __selectneg = (__v4si)vec_cmplt((__v4si)__B, __zero); + __v4si __selectpos = (__v4si)vec_neg((__v4si)vec_cmpgt((__v4si)__B, __zero)); + __v4si __conv = vec_add(__selectneg, __selectpos); + return (__m128i)vec_mul((__v4si)__A, (__v4si)__conv); +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sign_pi8(__m64 __A, __m64 __B) { + const __v16qi __zero = {0}; + __v16qi __C = (__v16qi)(__v2du){__A, __A}; + __v16qi __D = (__v16qi)(__v2du){__B, __B}; + __C = (__v16qi)_mm_sign_epi8((__m128i)__C, (__m128i)__D); + return (__m64)((__v2du)(__C))[0]; +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sign_pi16(__m64 __A, __m64 __B) { + const __v8hi __zero = {0}; + __v8hi __C = (__v8hi)(__v2du){__A, __A}; + __v8hi __D = (__v8hi)(__v2du){__B, __B}; + __C = (__v8hi)_mm_sign_epi16((__m128i)__C, (__m128i)__D); + return (__m64)((__v2du)(__C))[0]; +} +#endif + +#ifdef _ARCH_PWR8 +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sign_pi32(__m64 __A, __m64 __B) { + const __v4si __zero = {0}; + __v4si __C = (__v4si)(__v2du){__A, __A}; + __v4si __D = (__v4si)(__v2du){__B, __B}; + __C = (__v4si)_mm_sign_epi32((__m128i)__C, (__m128i)__D); + return (__m64)((__v2du)(__C))[0]; +} +#endif + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_maddubs_epi16(__m128i __A, __m128i __B) { + __v8hi __unsigned = vec_splats((signed short)0x00ff); + __v8hi __C = vec_and(vec_unpackh((__v16qi)__A), __unsigned); + __v8hi __D = vec_and(vec_unpackl((__v16qi)__A), __unsigned); + __v8hi __E = vec_unpackh((__v16qi)__B); + __v8hi __F = vec_unpackl((__v16qi)__B); + __C = vec_mul(__C, __E); + __D = vec_mul(__D, __F); + const __v16qu __odds = {0, 1, 4, 5, 8, 9, 12, 13, + 16, 17, 20, 21, 24, 25, 28, 29}; + const __v16qu __evens = {2, 3, 6, 7, 10, 11, 14, 15, + 18, 19, 22, 23, 26, 27, 30, 31}; + __E = vec_perm(__C, __D, __odds); + __F = vec_perm(__C, __D, __evens); + return (__m128i)vec_adds(__E, __F); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_maddubs_pi16(__m64 __A, __m64 __B) { + __v8hi __C = (__v8hi)(__v2du){__A, __A}; + __C = vec_unpackl((__v16qi)__C); + const __v8hi __unsigned = vec_splats((signed short)0x00ff); + __C = vec_and(__C, __unsigned); + __v8hi __D = (__v8hi)(__v2du){__B, __B}; + __D = vec_unpackl((__v16qi)__D); + __D = vec_mul(__C, __D); + const __v16qu __odds = {0, 1, 4, 5, 8, 9, 12, 13, + 16, 17, 20, 21, 24, 25, 28, 29}; + const __v16qu __evens = {2, 3, 6, 7, 10, 11, 14, 15, + 18, 19, 22, 23, 26, 27, 30, 31}; + __C = vec_perm(__D, __D, __odds); + __D = vec_perm(__D, __D, __evens); + __C = vec_adds(__C, __D); + return (__m64)((__v2du)(__C))[0]; +} + +extern __inline __m128i + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mulhrs_epi16(__m128i __A, __m128i __B) { + __v4si __C = vec_unpackh((__v8hi)__A); + __v4si __D = vec_unpackh((__v8hi)__B); + __C = vec_mul(__C, __D); + __D = vec_unpackl((__v8hi)__A); + __v4si __E = vec_unpackl((__v8hi)__B); + __D = vec_mul(__D, __E); + const __v4su __shift = vec_splats((unsigned int)14); + __C = vec_sr(__C, __shift); + __D = vec_sr(__D, __shift); + const __v4si __ones = vec_splats((signed int)1); + __C = vec_add(__C, __ones); + __C = vec_sr(__C, (__v4su)__ones); + __D = vec_add(__D, __ones); + __D = vec_sr(__D, (__v4su)__ones); + return (__m128i)vec_pack(__C, __D); +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mulhrs_pi16(__m64 __A, __m64 __B) { + __v4si __C = (__v4si)(__v2du){__A, __A}; + __C = vec_unpackh((__v8hi)__C); + __v4si __D = (__v4si)(__v2du){__B, __B}; + __D = vec_unpackh((__v8hi)__D); + __C = vec_mul(__C, __D); + const __v4su __shift = vec_splats((unsigned int)14); + __C = vec_sr(__C, __shift); + const __v4si __ones = vec_splats((signed int)1); + __C = vec_add(__C, __ones); + __C = vec_sr(__C, (__v4su)__ones); + __v8hi __E = vec_pack(__C, __D); + return (__m64)((__v2du)(__E))[0]; +} + +#else +#include_next +#endif /* defined(__powerpc64__) && \ + * (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) */ + +#endif /* TMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/x86gprintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/x86gprintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..cbfac262395c4a40fd3718df599f1d6e9c447c93 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/x86gprintrin.h @@ -0,0 +1,17 @@ +/*===--- x86gprintrin.h - Implementation of X86 GPR intrinsics on PowerPC --=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef X86GPRINTRIN_H_ +#define X86GPRINTRIN_H_ + +#include + +#include + +#endif /* X86GPRINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/x86intrin.h b/llvm/lib/clang/19/include/ppc_wrappers/x86intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f5c201262e69e90bc5f25e1e1e2a109b2e34893b --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/x86intrin.h @@ -0,0 +1,28 @@ +/*===---- x86intrin.h - Implementation of X86 intrinsics on PowerPC --------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header is distributed to simplify porting x86_64 code that + makes explicit use of Intel intrinsics to powerpc64le. + It is the user's responsibility to determine if the results are + acceptable and make additional changes as necessary. + Note that much code that uses Intel intrinsics can be rewritten in + standard C or GNU C extensions, which are more portable and better + optimized across multiple targets. */ +#error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." +#endif + +#ifndef X86INTRIN_H_ +#define X86INTRIN_H_ + +#ifdef __ALTIVEC__ +#include +#endif /* __ALTIVEC__ */ + +#endif /* X86INTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/ppc_wrappers/xmmintrin.h b/llvm/lib/clang/19/include/ppc_wrappers/xmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..9dd21b65c2f70e3dd18cf943baab6ffb3f034f15 --- /dev/null +++ b/llvm/lib/clang/19/include/ppc_wrappers/xmmintrin.h @@ -0,0 +1,1827 @@ +/*===---- xmmintrin.h - Implementation of SSE intrinsics on PowerPC --------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Implemented from the specification included in the Intel C++ Compiler + User Guide and Reference, version 9.0. */ + +#ifndef NO_WARN_X86_INTRINSICS +/* This header file is to help porting code using Intel intrinsics + explicitly from x86_64 to powerpc64/powerpc64le. + + Since X86 SSE intrinsics mainly handles __m128 type, PowerPC + VMX/VSX ISA is a good match for vector float SIMD operations. + However scalar float operations in vector (XMM) registers require + the POWER8 VSX ISA (2.07) level. There are differences for data + format and placement of float scalars in the vector register, which + require extra steps to match SSE scalar float semantics on POWER. + + It should be noted that there's much difference between X86_64's + MXSCR and PowerISA's FPSCR/VSCR registers. It's recommended to use + portable instead of access MXSCR directly. + + Most SSE scalar float intrinsic operations can be performed more + efficiently as C language float scalar operations or optimized to + use vector SIMD operations. We recommend this for new applications. */ +#error \ + "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error." +#endif + +#ifndef XMMINTRIN_H_ +#define XMMINTRIN_H_ + +#if defined(__powerpc64__) && \ + (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) + +/* Define four value permute mask */ +#define _MM_SHUFFLE(w, x, y, z) (((w) << 6) | ((x) << 4) | ((y) << 2) | (z)) + +#include + +/* Avoid collisions between altivec.h and strict adherence to C++ and + C11 standards. This should eventually be done inside altivec.h itself, + but only after testing a full distro build. */ +#if defined(__STRICT_ANSI__) && \ + (defined(__cplusplus) || \ + (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L)) +#undef vector +#undef pixel +#undef bool +#endif + +/* We need type definitions from the MMX header file. */ +#include + +/* Get _mm_malloc () and _mm_free (). */ +#if __STDC_HOSTED__ +#include +#endif + +/* The Intel API is flexible enough that we must allow aliasing with other + vector types, and their scalar components. */ +typedef vector float __m128 __attribute__((__may_alias__)); + +/* Unaligned version of the same type. */ +typedef vector float __m128_u __attribute__((__may_alias__, __aligned__(1))); + +/* Internal data types for implementing the intrinsics. */ +typedef vector float __v4sf; + +/* Create an undefined vector. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_undefined_ps(void) { + __m128 __Y = __Y; + return __Y; +} + +/* Create a vector of zeros. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setzero_ps(void) { + return __extension__(__m128){0.0f, 0.0f, 0.0f, 0.0f}; +} + +/* Load four SPFP values from P. The address must be 16-byte aligned. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_ps(float const *__P) { + return ((__m128)vec_ld(0, (__v4sf *)__P)); +} + +/* Load four SPFP values from P. The address need not be 16-byte aligned. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadu_ps(float const *__P) { + return (vec_vsx_ld(0, __P)); +} + +/* Load four SPFP values in reverse order. The address must be aligned. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadr_ps(float const *__P) { + __v4sf __tmp; + __m128 __result; + static const __vector unsigned char __permute_vector = { + 0x1C, 0x1D, 0x1E, 0x1F, 0x18, 0x19, 0x1A, 0x1B, + 0x14, 0x15, 0x16, 0x17, 0x10, 0x11, 0x12, 0x13}; + + __tmp = vec_ld(0, (__v4sf *)__P); + __result = (__m128)vec_perm(__tmp, __tmp, __permute_vector); + return __result; +} + +/* Create a vector with all four elements equal to F. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set1_ps(float __F) { + return __extension__(__m128)(__v4sf){__F, __F, __F, __F}; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_ps1(float __F) { + return _mm_set1_ps(__F); +} + +/* Create the vector [Z Y X W]. */ +extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, + __artificial__)) +_mm_set_ps(const float __Z, const float __Y, const float __X, const float __W) { + return __extension__(__m128)(__v4sf){__W, __X, __Y, __Z}; +} + +/* Create the vector [W X Y Z]. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_setr_ps(float __Z, float __Y, float __X, float __W) { + return __extension__(__m128)(__v4sf){__Z, __Y, __X, __W}; +} + +/* Store four SPFP values. The address must be 16-byte aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_ps(float *__P, __m128 __A) { + vec_st((__v4sf)__A, 0, (__v4sf *)__P); +} + +/* Store four SPFP values. The address need not be 16-byte aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storeu_ps(float *__P, __m128 __A) { + *(__m128_u *)__P = __A; +} + +/* Store four SPFP values in reverse order. The address must be aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storer_ps(float *__P, __m128 __A) { + __v4sf __tmp; + static const __vector unsigned char __permute_vector = { + 0x1C, 0x1D, 0x1E, 0x1F, 0x18, 0x19, 0x1A, 0x1B, + 0x14, 0x15, 0x16, 0x17, 0x10, 0x11, 0x12, 0x13}; + + __tmp = (__m128)vec_perm(__A, __A, __permute_vector); + + _mm_store_ps(__P, __tmp); +} + +/* Store the lower SPFP value across four words. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store1_ps(float *__P, __m128 __A) { + __v4sf __va = vec_splat((__v4sf)__A, 0); + _mm_store_ps(__P, __va); +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_ps1(float *__P, __m128 __A) { + _mm_store1_ps(__P, __A); +} + +/* Create a vector with element 0 as F and the rest zero. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_set_ss(float __F) { + return __extension__(__m128)(__v4sf){__F, 0.0f, 0.0f, 0.0f}; +} + +/* Sets the low SPFP value of A from the low value of B. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_move_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + + return (vec_sel((__v4sf)__A, (__v4sf)__B, __mask)); +} + +/* Create a vector with element 0 as *P and the rest zero. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_ss(float const *__P) { + return _mm_set_ss(*__P); +} + +/* Stores the lower SPFP value. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_store_ss(float *__P, __m128 __A) { + *__P = ((__v4sf)__A)[0]; +} + +/* Perform the respective operation on the lower SPFP (single-precision + floating-point) values of A and B; the upper three SPFP values are + passed through from A. */ + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_ss(__m128 __A, __m128 __B) { +#ifdef _ARCH_PWR7 + __m128 __a, __b, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + results. So to insure we don't generate spurious exceptions + (from the upper double values) we splat the lower double + before we to the operation. */ + __a = vec_splat(__A, 0); + __b = vec_splat(__B, 0); + __c = __a + __b; + /* Then we merge the lower float result with the original upper + float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +#else + __A[0] = __A[0] + __B[0]; + return (__A); +#endif +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_ss(__m128 __A, __m128 __B) { +#ifdef _ARCH_PWR7 + __m128 __a, __b, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + results. So to insure we don't generate spurious exceptions + (from the upper double values) we splat the lower double + before we to the operation. */ + __a = vec_splat(__A, 0); + __b = vec_splat(__B, 0); + __c = __a - __b; + /* Then we merge the lower float result with the original upper + float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +#else + __A[0] = __A[0] - __B[0]; + return (__A); +#endif +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_ss(__m128 __A, __m128 __B) { +#ifdef _ARCH_PWR7 + __m128 __a, __b, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + results. So to insure we don't generate spurious exceptions + (from the upper double values) we splat the lower double + before we to the operation. */ + __a = vec_splat(__A, 0); + __b = vec_splat(__B, 0); + __c = __a * __b; + /* Then we merge the lower float result with the original upper + float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +#else + __A[0] = __A[0] * __B[0]; + return (__A); +#endif +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_div_ss(__m128 __A, __m128 __B) { +#ifdef _ARCH_PWR7 + __m128 __a, __b, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + results. So to insure we don't generate spurious exceptions + (from the upper double values) we splat the lower double + before we to the operation. */ + __a = vec_splat(__A, 0); + __b = vec_splat(__B, 0); + __c = __a / __b; + /* Then we merge the lower float result with the original upper + float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +#else + __A[0] = __A[0] / __B[0]; + return (__A); +#endif +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sqrt_ss(__m128 __A) { + __m128 __a, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + * results. So to insure we don't generate spurious exceptions + * (from the upper double values) we splat the lower double + * before we to the operation. */ + __a = vec_splat(__A, 0); + __c = vec_sqrt(__a); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +} + +/* Perform the respective operation on the four SPFP values in A and B. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_add_ps(__m128 __A, __m128 __B) { + return (__m128)((__v4sf)__A + (__v4sf)__B); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sub_ps(__m128 __A, __m128 __B) { + return (__m128)((__v4sf)__A - (__v4sf)__B); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mul_ps(__m128 __A, __m128 __B) { + return (__m128)((__v4sf)__A * (__v4sf)__B); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_div_ps(__m128 __A, __m128 __B) { + return (__m128)((__v4sf)__A / (__v4sf)__B); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sqrt_ps(__m128 __A) { + return (vec_sqrt((__v4sf)__A)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_rcp_ps(__m128 __A) { + return (vec_re((__v4sf)__A)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_rsqrt_ps(__m128 __A) { + return (vec_rsqrte(__A)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_rcp_ss(__m128 __A) { + __m128 __a, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + * results. So to insure we don't generate spurious exceptions + * (from the upper double values) we splat the lower double + * before we to the operation. */ + __a = vec_splat(__A, 0); + __c = _mm_rcp_ps(__a); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_rsqrt_ss(__m128 __A) { + __m128 __a, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower double) + * results. So to insure we don't generate spurious exceptions + * (from the upper double values) we splat the lower double + * before we to the operation. */ + __a = vec_splat(__A, 0); + __c = vec_rsqrte(__a); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return (vec_sel(__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_ss(__m128 __A, __m128 __B) { + __v4sf __a, __b, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower float) + * results. So to insure we don't generate spurious exceptions + * (from the upper float values) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = vec_min(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return (vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_ss(__m128 __A, __m128 __B) { + __v4sf __a, __b, __c; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + /* PowerISA VSX does not allow partial (for just lower float) + * results. So to insure we don't generate spurious exceptions + * (from the upper float values) we splat the lower float + * before we to the operation. */ + __a = vec_splat(__A, 0); + __b = vec_splat(__B, 0); + __c = vec_max(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return (vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_ps(__m128 __A, __m128 __B) { + __vector __bool int __m = vec_cmpgt((__v4sf)__B, (__v4sf)__A); + return vec_sel(__B, __A, __m); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_ps(__m128 __A, __m128 __B) { + __vector __bool int __m = vec_cmpgt((__v4sf)__A, (__v4sf)__B); + return vec_sel(__B, __A, __m); +} + +/* Perform logical bit-wise operations on 128-bit values. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_and_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_and((__v4sf)__A, (__v4sf)__B)); + // return __builtin_ia32_andps (__A, __B); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_andnot_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_andc((__v4sf)__B, (__v4sf)__A)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_or_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_or((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_xor_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_xor((__v4sf)__A, (__v4sf)__B)); +} + +/* Perform a comparison on the four SPFP values of A and B. For each + element, if the comparison is true, place a mask of all ones in the + result, otherwise a mask of zeros. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmpeq((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmplt((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmple_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmple((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmpgt((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpge_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmpge((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpneq_ps(__m128 __A, __m128 __B) { + __v4sf __temp = (__v4sf)vec_cmpeq((__v4sf)__A, (__v4sf)__B); + return ((__m128)vec_nor(__temp, __temp)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnlt_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmpge((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnle_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmpgt((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpngt_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmple((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnge_ps(__m128 __A, __m128 __B) { + return ((__m128)vec_cmplt((__v4sf)__A, (__v4sf)__B)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpord_ps(__m128 __A, __m128 __B) { + __vector unsigned int __a, __b; + __vector unsigned int __c, __d; + static const __vector unsigned int __float_exp_mask = { + 0x7f800000, 0x7f800000, 0x7f800000, 0x7f800000}; + + __a = (__vector unsigned int)vec_abs((__v4sf)__A); + __b = (__vector unsigned int)vec_abs((__v4sf)__B); + __c = (__vector unsigned int)vec_cmpgt(__float_exp_mask, __a); + __d = (__vector unsigned int)vec_cmpgt(__float_exp_mask, __b); + return ((__m128)vec_and(__c, __d)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpunord_ps(__m128 __A, __m128 __B) { + __vector unsigned int __a, __b; + __vector unsigned int __c, __d; + static const __vector unsigned int __float_exp_mask = { + 0x7f800000, 0x7f800000, 0x7f800000, 0x7f800000}; + + __a = (__vector unsigned int)vec_abs((__v4sf)__A); + __b = (__vector unsigned int)vec_abs((__v4sf)__B); + __c = (__vector unsigned int)vec_cmpgt(__a, __float_exp_mask); + __d = (__vector unsigned int)vec_cmpgt(__b, __float_exp_mask); + return ((__m128)vec_or(__c, __d)); +} + +/* Perform a comparison on the lower SPFP values of A and B. If the + comparison is true, place a mask of all ones in the result, otherwise a + mask of zeros. The upper three SPFP values are passed through from A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmpeq(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmplt_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmplt(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmple_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmple(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpgt_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmpgt(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpge_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmpge(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpneq_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmpeq(__a, __b); + __c = vec_nor(__c, __c); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnlt_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmpge(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnle_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmpgt(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpngt_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we to the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmple(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpnge_ss(__m128 __A, __m128 __B) { + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + __v4sf __a, __b, __c; + /* PowerISA VMX does not allow partial (for just element 0) + * results. So to insure we don't generate spurious exceptions + * (from the upper elements) we splat the lower float + * before we do the operation. */ + __a = vec_splat((__v4sf)__A, 0); + __b = vec_splat((__v4sf)__B, 0); + __c = (__v4sf)vec_cmplt(__a, __b); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, __c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpord_ss(__m128 __A, __m128 __B) { + __vector unsigned int __a, __b; + __vector unsigned int __c, __d; + static const __vector unsigned int __float_exp_mask = { + 0x7f800000, 0x7f800000, 0x7f800000, 0x7f800000}; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + + __a = (__vector unsigned int)vec_abs((__v4sf)__A); + __b = (__vector unsigned int)vec_abs((__v4sf)__B); + __c = (__vector unsigned int)vec_cmpgt(__float_exp_mask, __a); + __d = (__vector unsigned int)vec_cmpgt(__float_exp_mask, __b); + __c = vec_and(__c, __d); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, (__v4sf)__c, __mask)); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpunord_ss(__m128 __A, __m128 __B) { + __vector unsigned int __a, __b; + __vector unsigned int __c, __d; + static const __vector unsigned int __float_exp_mask = { + 0x7f800000, 0x7f800000, 0x7f800000, 0x7f800000}; + static const __vector unsigned int __mask = {0xffffffff, 0, 0, 0}; + + __a = (__vector unsigned int)vec_abs((__v4sf)__A); + __b = (__vector unsigned int)vec_abs((__v4sf)__B); + __c = (__vector unsigned int)vec_cmpgt(__a, __float_exp_mask); + __d = (__vector unsigned int)vec_cmpgt(__b, __float_exp_mask); + __c = vec_or(__c, __d); + /* Then we merge the lower float result with the original upper + * float elements from __A. */ + return ((__m128)vec_sel((__v4sf)__A, (__v4sf)__c, __mask)); +} + +/* Compare the lower SPFP values of A and B and return 1 if true + and 0 if false. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comieq_ss(__m128 __A, __m128 __B) { + return (__A[0] == __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comilt_ss(__m128 __A, __m128 __B) { + return (__A[0] < __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comile_ss(__m128 __A, __m128 __B) { + return (__A[0] <= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comigt_ss(__m128 __A, __m128 __B) { + return (__A[0] > __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comige_ss(__m128 __A, __m128 __B) { + return (__A[0] >= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_comineq_ss(__m128 __A, __m128 __B) { + return (__A[0] != __B[0]); +} + +/* FIXME + * The __mm_ucomi??_ss implementations below are exactly the same as + * __mm_comi??_ss because GCC for PowerPC only generates unordered + * compares (scalar and vector). + * Technically __mm_comieq_ss et al should be using the ordered + * compare and signal for QNaNs. + * The __mm_ucomieq_sd et all should be OK, as is. + */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomieq_ss(__m128 __A, __m128 __B) { + return (__A[0] == __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomilt_ss(__m128 __A, __m128 __B) { + return (__A[0] < __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomile_ss(__m128 __A, __m128 __B) { + return (__A[0] <= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomigt_ss(__m128 __A, __m128 __B) { + return (__A[0] > __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomige_ss(__m128 __A, __m128 __B) { + return (__A[0] >= __B[0]); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_ucomineq_ss(__m128 __A, __m128 __B) { + return (__A[0] != __B[0]); +} + +extern __inline float + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtss_f32(__m128 __A) { + return ((__v4sf)__A)[0]; +} + +/* Convert the lower SPFP value to a 32-bit integer according to the current + rounding mode. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtss_si32(__m128 __A) { + int __res; +#ifdef _ARCH_PWR8 + double __dtmp; + __asm__( +#ifdef __LITTLE_ENDIAN__ + "xxsldwi %x0,%x0,%x0,3;\n" +#endif + "xscvspdp %x2,%x0;\n" + "fctiw %2,%2;\n" + "mfvsrd %1,%x2;\n" + : "+wa"(__A), "=r"(__res), "=f"(__dtmp) + :); +#else + __res = __builtin_rint(__A[0]); +#endif + return __res; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvt_ss2si(__m128 __A) { + return _mm_cvtss_si32(__A); +} + +/* Convert the lower SPFP value to a 32-bit integer according to the + current rounding mode. */ + +/* Intel intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtss_si64(__m128 __A) { + long long __res; +#if defined(_ARCH_PWR8) && defined(__powerpc64__) + double __dtmp; + __asm__( +#ifdef __LITTLE_ENDIAN__ + "xxsldwi %x0,%x0,%x0,3;\n" +#endif + "xscvspdp %x2,%x0;\n" + "fctid %2,%2;\n" + "mfvsrd %1,%x2;\n" + : "+wa"(__A), "=r"(__res), "=f"(__dtmp) + :); +#else + __res = __builtin_llrint(__A[0]); +#endif + return __res; +} + +/* Microsoft intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtss_si64x(__m128 __A) { + return _mm_cvtss_si64((__v4sf)__A); +} + +/* Constants for use with _mm_prefetch. */ +enum _mm_hint { + /* _MM_HINT_ET is _MM_HINT_T with set 3rd bit. */ + _MM_HINT_ET0 = 7, + _MM_HINT_ET1 = 6, + _MM_HINT_T0 = 3, + _MM_HINT_T1 = 2, + _MM_HINT_T2 = 1, + _MM_HINT_NTA = 0 +}; + +/* Loads one cache line from address P to a location "closer" to the + processor. The selector I specifies the type of prefetch operation. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_prefetch(const void *__P, enum _mm_hint __I) { + /* Current PowerPC will ignores the hint parameters. */ + __builtin_prefetch(__P); +} + +/* Convert the two lower SPFP values to 32-bit integers according to the + current rounding mode. Return the integers in packed form. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtps_pi32(__m128 __A) { + /* Splat two lower SPFP values to both halves. */ + __v4sf __temp, __rounded; + __vector unsigned long long __result; + + /* Splat two lower SPFP values to both halves. */ + __temp = (__v4sf)vec_splat((__vector long long)__A, 0); + __rounded = vec_rint(__temp); + __result = (__vector unsigned long long)vec_cts(__rounded, 0); + + return (__m64)((__vector long long)__result)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvt_ps2pi(__m128 __A) { + return _mm_cvtps_pi32(__A); +} + +/* Truncate the lower SPFP value to a 32-bit integer. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttss_si32(__m128 __A) { + /* Extract the lower float element. */ + float __temp = __A[0]; + /* truncate to 32-bit integer and return. */ + return __temp; +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtt_ss2si(__m128 __A) { + return _mm_cvttss_si32(__A); +} + +/* Intel intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttss_si64(__m128 __A) { + /* Extract the lower float element. */ + float __temp = __A[0]; + /* truncate to 32-bit integer and return. */ + return __temp; +} + +/* Microsoft intrinsic. */ +extern __inline long long + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttss_si64x(__m128 __A) { + /* Extract the lower float element. */ + float __temp = __A[0]; + /* truncate to 32-bit integer and return. */ + return __temp; +} + +/* Truncate the two lower SPFP values to 32-bit integers. Return the + integers in packed form. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvttps_pi32(__m128 __A) { + __v4sf __temp; + __vector unsigned long long __result; + + /* Splat two lower SPFP values to both halves. */ + __temp = (__v4sf)vec_splat((__vector long long)__A, 0); + __result = (__vector unsigned long long)vec_cts(__temp, 0); + + return (__m64)((__vector long long)__result)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtt_ps2pi(__m128 __A) { + return _mm_cvttps_pi32(__A); +} + +/* Convert B to a SPFP value and insert it as element zero in A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi32_ss(__m128 __A, int __B) { + float __temp = __B; + __A[0] = __temp; + + return __A; +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvt_si2ss(__m128 __A, int __B) { + return _mm_cvtsi32_ss(__A, __B); +} + +/* Convert B to a SPFP value and insert it as element zero in A. */ +/* Intel intrinsic. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64_ss(__m128 __A, long long __B) { + float __temp = __B; + __A[0] = __temp; + + return __A; +} + +/* Microsoft intrinsic. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtsi64x_ss(__m128 __A, long long __B) { + return _mm_cvtsi64_ss(__A, __B); +} + +/* Convert the two 32-bit values in B to SPFP form and insert them + as the two lower elements in A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpi32_ps(__m128 __A, __m64 __B) { + __vector signed int __vm1; + __vector float __vf1; + + __vm1 = (__vector signed int)(__vector unsigned long long){__B, __B}; + __vf1 = (__vector float)vec_ctf(__vm1, 0); + + return ((__m128)(__vector unsigned long long){ + ((__vector unsigned long long)__vf1)[0], + ((__vector unsigned long long)__A)[1]}); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvt_pi2ps(__m128 __A, __m64 __B) { + return _mm_cvtpi32_ps(__A, __B); +} + +/* Convert the four signed 16-bit values in A to SPFP form. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpi16_ps(__m64 __A) { + __vector signed short __vs8; + __vector signed int __vi4; + __vector float __vf1; + + __vs8 = (__vector signed short)(__vector unsigned long long){__A, __A}; + __vi4 = vec_vupklsh(__vs8); + __vf1 = (__vector float)vec_ctf(__vi4, 0); + + return (__m128)__vf1; +} + +/* Convert the four unsigned 16-bit values in A to SPFP form. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpu16_ps(__m64 __A) { + const __vector unsigned short __zero = {0, 0, 0, 0, 0, 0, 0, 0}; + __vector unsigned short __vs8; + __vector unsigned int __vi4; + __vector float __vf1; + + __vs8 = (__vector unsigned short)(__vector unsigned long long){__A, __A}; + __vi4 = (__vector unsigned int)vec_mergel +#ifdef __LITTLE_ENDIAN__ + (__vs8, __zero); +#else + (__zero, __vs8); +#endif + __vf1 = (__vector float)vec_ctf(__vi4, 0); + + return (__m128)__vf1; +} + +/* Convert the low four signed 8-bit values in A to SPFP form. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpi8_ps(__m64 __A) { + __vector signed char __vc16; + __vector signed short __vs8; + __vector signed int __vi4; + __vector float __vf1; + + __vc16 = (__vector signed char)(__vector unsigned long long){__A, __A}; + __vs8 = vec_vupkhsb(__vc16); + __vi4 = vec_vupkhsh(__vs8); + __vf1 = (__vector float)vec_ctf(__vi4, 0); + + return (__m128)__vf1; +} + +/* Convert the low four unsigned 8-bit values in A to SPFP form. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + + _mm_cvtpu8_ps(__m64 __A) { + const __vector unsigned char __zero = {0, 0, 0, 0, 0, 0, 0, 0}; + __vector unsigned char __vc16; + __vector unsigned short __vs8; + __vector unsigned int __vi4; + __vector float __vf1; + + __vc16 = (__vector unsigned char)(__vector unsigned long long){__A, __A}; +#ifdef __LITTLE_ENDIAN__ + __vs8 = (__vector unsigned short)vec_mergel(__vc16, __zero); + __vi4 = + (__vector unsigned int)vec_mergeh(__vs8, (__vector unsigned short)__zero); +#else + __vs8 = (__vector unsigned short)vec_mergel(__zero, __vc16); + __vi4 = + (__vector unsigned int)vec_mergeh((__vector unsigned short)__zero, __vs8); +#endif + __vf1 = (__vector float)vec_ctf(__vi4, 0); + + return (__m128)__vf1; +} + +/* Convert the four signed 32-bit values in A and B to SPFP form. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtpi32x2_ps(__m64 __A, __m64 __B) { + __vector signed int __vi4; + __vector float __vf4; + + __vi4 = (__vector signed int)(__vector unsigned long long){__A, __B}; + __vf4 = (__vector float)vec_ctf(__vi4, 0); + return (__m128)__vf4; +} + +/* Convert the four SPFP values in A to four signed 16-bit integers. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtps_pi16(__m128 __A) { + __v4sf __rounded; + __vector signed int __temp; + __vector unsigned long long __result; + + __rounded = vec_rint(__A); + __temp = vec_cts(__rounded, 0); + __result = (__vector unsigned long long)vec_pack(__temp, __temp); + + return (__m64)((__vector long long)__result)[0]; +} + +/* Convert the four SPFP values in A to four signed 8-bit integers. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cvtps_pi8(__m128 __A) { + __v4sf __rounded; + __vector signed int __tmp_i; + static const __vector signed int __zero = {0, 0, 0, 0}; + __vector signed short __tmp_s; + __vector signed char __res_v; + + __rounded = vec_rint(__A); + __tmp_i = vec_cts(__rounded, 0); + __tmp_s = vec_pack(__tmp_i, __zero); + __res_v = vec_pack(__tmp_s, __tmp_s); + return (__m64)((__vector long long)__res_v)[0]; +} + +/* Selects four specific SPFP values from A and B based on MASK. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + + _mm_shuffle_ps(__m128 __A, __m128 __B, int const __mask) { + unsigned long __element_selector_10 = __mask & 0x03; + unsigned long __element_selector_32 = (__mask >> 2) & 0x03; + unsigned long __element_selector_54 = (__mask >> 4) & 0x03; + unsigned long __element_selector_76 = (__mask >> 6) & 0x03; + static const unsigned int __permute_selectors[4] = { +#ifdef __LITTLE_ENDIAN__ + 0x03020100, 0x07060504, 0x0B0A0908, 0x0F0E0D0C +#else + 0x00010203, 0x04050607, 0x08090A0B, 0x0C0D0E0F +#endif + }; + __vector unsigned int __t; + + __t[0] = __permute_selectors[__element_selector_10]; + __t[1] = __permute_selectors[__element_selector_32]; + __t[2] = __permute_selectors[__element_selector_54] + 0x10101010; + __t[3] = __permute_selectors[__element_selector_76] + 0x10101010; + return vec_perm((__v4sf)__A, (__v4sf)__B, (__vector unsigned char)__t); +} + +/* Selects and interleaves the upper two SPFP values from A and B. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpackhi_ps(__m128 __A, __m128 __B) { + return (__m128)vec_vmrglw((__v4sf)__A, (__v4sf)__B); +} + +/* Selects and interleaves the lower two SPFP values from A and B. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_unpacklo_ps(__m128 __A, __m128 __B) { + return (__m128)vec_vmrghw((__v4sf)__A, (__v4sf)__B); +} + +/* Sets the upper two SPFP values with 64-bits of data loaded from P; + the lower two values are passed through from A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadh_pi(__m128 __A, __m64 const *__P) { + __vector unsigned long long __a = (__vector unsigned long long)__A; + __vector unsigned long long __p = vec_splats(*__P); + __a[1] = __p[1]; + + return (__m128)__a; +} + +/* Stores the upper two SPFP values of A into P. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storeh_pi(__m64 *__P, __m128 __A) { + __vector unsigned long long __a = (__vector unsigned long long)__A; + + *__P = __a[1]; +} + +/* Moves the upper two values of B into the lower two values of A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movehl_ps(__m128 __A, __m128 __B) { + return (__m128)vec_mergel((__vector unsigned long long)__B, + (__vector unsigned long long)__A); +} + +/* Moves the lower two values of B into the upper two values of A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movelh_ps(__m128 __A, __m128 __B) { + return (__m128)vec_mergeh((__vector unsigned long long)__A, + (__vector unsigned long long)__B); +} + +/* Sets the lower two SPFP values with 64-bits of data loaded from P; + the upper two values are passed through from A. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadl_pi(__m128 __A, __m64 const *__P) { + __vector unsigned long long __a = (__vector unsigned long long)__A; + __vector unsigned long long __p = vec_splats(*__P); + __a[0] = __p[0]; + + return (__m128)__a; +} + +/* Stores the lower two SPFP values of A into P. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_storel_pi(__m64 *__P, __m128 __A) { + __vector unsigned long long __a = (__vector unsigned long long)__A; + + *__P = __a[0]; +} + +#ifdef _ARCH_PWR8 +/* Intrinsic functions that require PowerISA 2.07 minimum. */ + +/* Creates a 4-bit mask from the most significant bits of the SPFP values. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movemask_ps(__m128 __A) { +#ifdef _ARCH_PWR10 + return vec_extractm((__vector unsigned int)__A); +#else + __vector unsigned long long __result; + static const __vector unsigned int __perm_mask = { +#ifdef __LITTLE_ENDIAN__ + 0x00204060, 0x80808080, 0x80808080, 0x80808080 +#else + 0x80808080, 0x80808080, 0x80808080, 0x00204060 +#endif + }; + + __result = ((__vector unsigned long long)vec_vbpermq( + (__vector unsigned char)__A, (__vector unsigned char)__perm_mask)); + +#ifdef __LITTLE_ENDIAN__ + return __result[1]; +#else + return __result[0]; +#endif +#endif /* !_ARCH_PWR10 */ +} +#endif /* _ARCH_PWR8 */ + +/* Create a vector with all four elements equal to *P. */ +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load1_ps(float const *__P) { + return _mm_set1_ps(*__P); +} + +extern __inline __m128 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_load_ps1(float const *__P) { + return _mm_load1_ps(__P); +} + +/* Extracts one of the four words of A. The selector N must be immediate. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_extract_pi16(__m64 const __A, int const __N) { + unsigned int __shiftr = __N & 3; +#ifdef __BIG_ENDIAN__ + __shiftr = 3 - __shiftr; +#endif + + return ((__A >> (__shiftr * 16)) & 0xffff); +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pextrw(__m64 const __A, int const __N) { + return _mm_extract_pi16(__A, __N); +} + +/* Inserts word D into one of four words of A. The selector N must be + immediate. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_insert_pi16(__m64 const __A, int const __D, int const __N) { + const int __shiftl = (__N & 3) * 16; + const __m64 __shiftD = (const __m64)__D << __shiftl; + const __m64 __mask = 0xffffUL << __shiftl; + __m64 __result = (__A & (~__mask)) | (__shiftD & __mask); + + return __result; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pinsrw(__m64 const __A, int const __D, int const __N) { + return _mm_insert_pi16(__A, __D, __N); +} + +/* Compute the element-wise maximum of signed 16-bit values. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + + _mm_max_pi16(__m64 __A, __m64 __B) { +#if _ARCH_PWR8 + __vector signed short __a, __b, __r; + __vector __bool short __c; + + __a = (__vector signed short)vec_splats(__A); + __b = (__vector signed short)vec_splats(__B); + __c = (__vector __bool short)vec_cmpgt(__a, __b); + __r = vec_sel(__b, __a, __c); + return (__m64)((__vector long long)__r)[0]; +#else + __m64_union __m1, __m2, __res; + + __m1.as_m64 = __A; + __m2.as_m64 = __B; + + __res.as_short[0] = (__m1.as_short[0] > __m2.as_short[0]) ? __m1.as_short[0] + : __m2.as_short[0]; + __res.as_short[1] = (__m1.as_short[1] > __m2.as_short[1]) ? __m1.as_short[1] + : __m2.as_short[1]; + __res.as_short[2] = (__m1.as_short[2] > __m2.as_short[2]) ? __m1.as_short[2] + : __m2.as_short[2]; + __res.as_short[3] = (__m1.as_short[3] > __m2.as_short[3]) ? __m1.as_short[3] + : __m2.as_short[3]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmaxsw(__m64 __A, __m64 __B) { + return _mm_max_pi16(__A, __B); +} + +/* Compute the element-wise maximum of unsigned 8-bit values. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_max_pu8(__m64 __A, __m64 __B) { +#if _ARCH_PWR8 + __vector unsigned char __a, __b, __r; + __vector __bool char __c; + + __a = (__vector unsigned char)vec_splats(__A); + __b = (__vector unsigned char)vec_splats(__B); + __c = (__vector __bool char)vec_cmpgt(__a, __b); + __r = vec_sel(__b, __a, __c); + return (__m64)((__vector long long)__r)[0]; +#else + __m64_union __m1, __m2, __res; + long __i; + + __m1.as_m64 = __A; + __m2.as_m64 = __B; + + for (__i = 0; __i < 8; __i++) + __res.as_char[__i] = + ((unsigned char)__m1.as_char[__i] > (unsigned char)__m2.as_char[__i]) + ? __m1.as_char[__i] + : __m2.as_char[__i]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmaxub(__m64 __A, __m64 __B) { + return _mm_max_pu8(__A, __B); +} + +/* Compute the element-wise minimum of signed 16-bit values. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_pi16(__m64 __A, __m64 __B) { +#if _ARCH_PWR8 + __vector signed short __a, __b, __r; + __vector __bool short __c; + + __a = (__vector signed short)vec_splats(__A); + __b = (__vector signed short)vec_splats(__B); + __c = (__vector __bool short)vec_cmplt(__a, __b); + __r = vec_sel(__b, __a, __c); + return (__m64)((__vector long long)__r)[0]; +#else + __m64_union __m1, __m2, __res; + + __m1.as_m64 = __A; + __m2.as_m64 = __B; + + __res.as_short[0] = (__m1.as_short[0] < __m2.as_short[0]) ? __m1.as_short[0] + : __m2.as_short[0]; + __res.as_short[1] = (__m1.as_short[1] < __m2.as_short[1]) ? __m1.as_short[1] + : __m2.as_short[1]; + __res.as_short[2] = (__m1.as_short[2] < __m2.as_short[2]) ? __m1.as_short[2] + : __m2.as_short[2]; + __res.as_short[3] = (__m1.as_short[3] < __m2.as_short[3]) ? __m1.as_short[3] + : __m2.as_short[3]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pminsw(__m64 __A, __m64 __B) { + return _mm_min_pi16(__A, __B); +} + +/* Compute the element-wise minimum of unsigned 8-bit values. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_min_pu8(__m64 __A, __m64 __B) { +#if _ARCH_PWR8 + __vector unsigned char __a, __b, __r; + __vector __bool char __c; + + __a = (__vector unsigned char)vec_splats(__A); + __b = (__vector unsigned char)vec_splats(__B); + __c = (__vector __bool char)vec_cmplt(__a, __b); + __r = vec_sel(__b, __a, __c); + return (__m64)((__vector long long)__r)[0]; +#else + __m64_union __m1, __m2, __res; + long __i; + + __m1.as_m64 = __A; + __m2.as_m64 = __B; + + for (__i = 0; __i < 8; __i++) + __res.as_char[__i] = + ((unsigned char)__m1.as_char[__i] < (unsigned char)__m2.as_char[__i]) + ? __m1.as_char[__i] + : __m2.as_char[__i]; + + return (__m64)__res.as_m64; +#endif +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pminub(__m64 __A, __m64 __B) { + return _mm_min_pu8(__A, __B); +} + +/* Create an 8-bit mask of the signs of 8-bit values. */ +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movemask_pi8(__m64 __A) { +#ifdef __powerpc64__ + unsigned long long __p = +#ifdef __LITTLE_ENDIAN__ + 0x0008101820283038UL; // permute control for sign bits +#else + 0x3830282018100800UL; // permute control for sign bits +#endif + return __builtin_bpermd(__p, __A); +#else +#ifdef __LITTLE_ENDIAN__ + unsigned int __mask = 0x20283038UL; + unsigned int __r1 = __builtin_bpermd(__mask, __A) & 0xf; + unsigned int __r2 = __builtin_bpermd(__mask, __A >> 32) & 0xf; +#else + unsigned int __mask = 0x38302820UL; + unsigned int __r1 = __builtin_bpermd(__mask, __A >> 32) & 0xf; + unsigned int __r2 = __builtin_bpermd(__mask, __A) & 0xf; +#endif + return (__r2 << 4) | __r1; +#endif +} + +extern __inline int + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmovmskb(__m64 __A) { + return _mm_movemask_pi8(__A); +} + +/* Multiply four unsigned 16-bit values in A by four unsigned 16-bit values + in B and produce the high 16 bits of the 32-bit results. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_mulhi_pu16(__m64 __A, __m64 __B) { + __vector unsigned short __a, __b; + __vector unsigned short __c; + __vector unsigned int __w0, __w1; + __vector unsigned char __xform1 = { +#ifdef __LITTLE_ENDIAN__ + 0x02, 0x03, 0x12, 0x13, 0x06, 0x07, 0x16, 0x17, 0x0A, + 0x0B, 0x1A, 0x1B, 0x0E, 0x0F, 0x1E, 0x1F +#else + 0x00, 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15, 0x00, + 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15 +#endif + }; + + __a = (__vector unsigned short)vec_splats(__A); + __b = (__vector unsigned short)vec_splats(__B); + + __w0 = vec_vmuleuh(__a, __b); + __w1 = vec_vmulouh(__a, __b); + __c = (__vector unsigned short)vec_perm(__w0, __w1, __xform1); + + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pmulhuw(__m64 __A, __m64 __B) { + return _mm_mulhi_pu16(__A, __B); +} + +/* Return a combination of the four 16-bit values in A. The selector + must be an immediate. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_shuffle_pi16(__m64 __A, int const __N) { + unsigned long __element_selector_10 = __N & 0x03; + unsigned long __element_selector_32 = (__N >> 2) & 0x03; + unsigned long __element_selector_54 = (__N >> 4) & 0x03; + unsigned long __element_selector_76 = (__N >> 6) & 0x03; + static const unsigned short __permute_selectors[4] = { +#ifdef __LITTLE_ENDIAN__ + 0x0908, 0x0B0A, 0x0D0C, 0x0F0E +#else + 0x0607, 0x0405, 0x0203, 0x0001 +#endif + }; + __m64_union __t; + __vector unsigned long long __a, __p, __r; + +#ifdef __LITTLE_ENDIAN__ + __t.as_short[0] = __permute_selectors[__element_selector_10]; + __t.as_short[1] = __permute_selectors[__element_selector_32]; + __t.as_short[2] = __permute_selectors[__element_selector_54]; + __t.as_short[3] = __permute_selectors[__element_selector_76]; +#else + __t.as_short[3] = __permute_selectors[__element_selector_10]; + __t.as_short[2] = __permute_selectors[__element_selector_32]; + __t.as_short[1] = __permute_selectors[__element_selector_54]; + __t.as_short[0] = __permute_selectors[__element_selector_76]; +#endif + __p = vec_splats(__t.as_m64); + __a = vec_splats(__A); + __r = vec_perm(__a, __a, (__vector unsigned char)__p); + return (__m64)((__vector long long)__r)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pshufw(__m64 __A, int const __N) { + return _mm_shuffle_pi16(__A, __N); +} + +/* Conditionally store byte elements of A into P. The high bit of each + byte in the selector N determines whether the corresponding byte from + A is stored. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_maskmove_si64(__m64 __A, __m64 __N, char *__P) { + __m64 __hibit = 0x8080808080808080UL; + __m64 __mask, __tmp; + __m64 *__p = (__m64 *)__P; + + __tmp = *__p; + __mask = _mm_cmpeq_pi8((__N & __hibit), __hibit); + __tmp = (__tmp & (~__mask)) | (__A & __mask); + *__p = __tmp; +} + +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_maskmovq(__m64 __A, __m64 __N, char *__P) { + _mm_maskmove_si64(__A, __N, __P); +} + +/* Compute the rounded averages of the unsigned 8-bit values in A and B. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_avg_pu8(__m64 __A, __m64 __B) { + __vector unsigned char __a, __b, __c; + + __a = (__vector unsigned char)vec_splats(__A); + __b = (__vector unsigned char)vec_splats(__B); + __c = vec_avg(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pavgb(__m64 __A, __m64 __B) { + return _mm_avg_pu8(__A, __B); +} + +/* Compute the rounded averages of the unsigned 16-bit values in A and B. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_avg_pu16(__m64 __A, __m64 __B) { + __vector unsigned short __a, __b, __c; + + __a = (__vector unsigned short)vec_splats(__A); + __b = (__vector unsigned short)vec_splats(__B); + __c = vec_avg(__a, __b); + return (__m64)((__vector long long)__c)[0]; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_pavgw(__m64 __A, __m64 __B) { + return _mm_avg_pu16(__A, __B); +} + +/* Compute the sum of the absolute differences of the unsigned 8-bit + values in A and B. Return the value in the lower 16-bit word; the + upper words are cleared. */ +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sad_pu8(__m64 __A, __m64 __B) { + __vector unsigned char __a, __b; + __vector unsigned char __vmin, __vmax, __vabsdiff; + __vector signed int __vsum; + const __vector unsigned int __zero = {0, 0, 0, 0}; + __m64_union __result = {0}; + + __a = (__vector unsigned char)(__vector unsigned long long){0UL, __A}; + __b = (__vector unsigned char)(__vector unsigned long long){0UL, __B}; + __vmin = vec_min(__a, __b); + __vmax = vec_max(__a, __b); + __vabsdiff = vec_sub(__vmax, __vmin); + /* Sum four groups of bytes into integers. */ + __vsum = (__vector signed int)vec_sum4s(__vabsdiff, __zero); + /* Sum across four integers with integer result. */ + __vsum = vec_sums(__vsum, (__vector signed int)__zero); + /* The sum is in the right most 32-bits of the vector result. + Transfer to a GPR and truncate to 16 bits. */ + __result.as_short[0] = __vsum[3]; + return __result.as_m64; +} + +extern __inline __m64 + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _m_psadbw(__m64 __A, __m64 __B) { + return _mm_sad_pu8(__A, __B); +} + +/* Stores the data in A to the address P without polluting the caches. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_stream_pi(__m64 *__P, __m64 __A) { + /* Use the data cache block touch for store transient. */ + __asm__(" dcbtstt 0,%0" : : "b"(__P) : "memory"); + *__P = __A; +} + +/* Likewise. The address must be 16-byte aligned. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_stream_ps(float *__P, __m128 __A) { + /* Use the data cache block touch for store transient. */ + __asm__(" dcbtstt 0,%0" : : "b"(__P) : "memory"); + _mm_store_ps(__P, __A); +} + +/* Guarantees that every preceding store is globally visible before + any subsequent store. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_sfence(void) { + /* Generate a light weight sync. */ + __atomic_thread_fence(__ATOMIC_RELEASE); +} + +/* The execution of the next instruction is delayed by an implementation + specific amount of time. The instruction does not modify the + architectural state. This is after the pop_options pragma because + it does not require SSE support in the processor--the encoding is a + nop on processors that do not support it. */ +extern __inline void + __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_pause(void) { + /* There is no exact match with this construct, but the following is + close to the desired effect. */ +#if _ARCH_PWR8 + /* On power8 and later processors we can depend on Program Priority + (PRI) and associated "very low" PPI setting. Since we don't know + what PPI this thread is running at we: 1) save the current PRI + from the PPR SPR into a local GRP, 2) set the PRI to "very low* + via the special or 31,31,31 encoding. 3) issue an "isync" to + insure the PRI change takes effect before we execute any more + instructions. + Now we can execute a lwsync (release barrier) while we execute + this thread at "very low" PRI. Finally we restore the original + PRI and continue execution. */ + unsigned long __PPR; + + __asm__ volatile(" mfppr %0;" + " or 31,31,31;" + " isync;" + " lwsync;" + " isync;" + " mtppr %0;" + : "=r"(__PPR) + : + : "memory"); +#else + /* For older processor where we may not even have Program Priority + controls we can only depend on Heavy Weight Sync. */ + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif +} + +/* Transpose the 4x4 matrix composed of row[0-3]. */ +#define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \ + do { \ + __v4sf __r0 = (row0), __r1 = (row1), __r2 = (row2), __r3 = (row3); \ + __v4sf __t0 = vec_vmrghw(__r0, __r1); \ + __v4sf __t1 = vec_vmrghw(__r2, __r3); \ + __v4sf __t2 = vec_vmrglw(__r0, __r1); \ + __v4sf __t3 = vec_vmrglw(__r2, __r3); \ + (row0) = (__v4sf)vec_mergeh((__vector long long)__t0, \ + (__vector long long)__t1); \ + (row1) = (__v4sf)vec_mergel((__vector long long)__t0, \ + (__vector long long)__t1); \ + (row2) = (__v4sf)vec_mergeh((__vector long long)__t2, \ + (__vector long long)__t3); \ + (row3) = (__v4sf)vec_mergel((__vector long long)__t2, \ + (__vector long long)__t3); \ + } while (0) + +/* For backward source compatibility. */ +//# include + +#else +#include_next +#endif /* defined(__powerpc64__) && \ + * (defined(__linux__) || defined(__FreeBSD__) || defined(_AIX)) */ + +#endif /* XMMINTRIN_H_ */ diff --git a/llvm/lib/clang/19/include/prfchiintrin.h b/llvm/lib/clang/19/include/prfchiintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..36600b25aa1d1bb857d3c4dfbcadd7401bba7964 --- /dev/null +++ b/llvm/lib/clang/19/include/prfchiintrin.h @@ -0,0 +1,61 @@ +/*===---- prfchiintrin.h - PREFETCHI intrinsic -----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __PRFCHIINTRIN_H +#define __PRFCHIINTRIN_H + +#ifdef __x86_64__ + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("prefetchi"))) + +/// Loads an instruction sequence containing the specified memory address into +/// all level cache. +/// +/// Note that the effect of this intrinsic is dependent on the processor +/// implementation. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PREFETCHIT0 instruction. +/// +/// \param __P +/// A pointer specifying the memory address to be prefetched. +static __inline__ void __DEFAULT_FN_ATTRS +_m_prefetchit0(volatile const void *__P) { +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wcast-qual" + __builtin_ia32_prefetchi((const void *)__P, 3 /* _MM_HINT_T0 */); +#pragma clang diagnostic pop +} + +/// Loads an instruction sequence containing the specified memory address into +/// all but the first-level cache. +/// +/// Note that the effect of this intrinsic is dependent on the processor +/// implementation. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PREFETCHIT1 instruction. +/// +/// \param __P +/// A pointer specifying the memory address to be prefetched. +static __inline__ void __DEFAULT_FN_ATTRS +_m_prefetchit1(volatile const void *__P) { +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wcast-qual" + __builtin_ia32_prefetchi((const void *)__P, 2 /* _MM_HINT_T1 */); +#pragma clang diagnostic pop +} +#endif /* __x86_64__ */ +#undef __DEFAULT_FN_ATTRS + +#endif /* __PRFCHWINTRIN_H */ diff --git a/llvm/lib/clang/19/include/prfchwintrin.h b/llvm/lib/clang/19/include/prfchwintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..eaea5f3cf8febfee2e4096d47216ec7436ba7351 --- /dev/null +++ b/llvm/lib/clang/19/include/prfchwintrin.h @@ -0,0 +1,60 @@ +/*===---- prfchwintrin.h - PREFETCHW intrinsic -----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined(__X86INTRIN_H) && !defined(_MM3DNOW_H_INCLUDED) +#error "Never use directly; include instead." +#endif + +#ifndef __PRFCHWINTRIN_H +#define __PRFCHWINTRIN_H + +/// Loads a memory sequence containing the specified memory address into +/// all data cache levels. +/// +/// The cache-coherency state is set to exclusive. Data can be read from +/// and written to the cache line without additional delay. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PREFETCHT0 instruction. +/// +/// \param __P +/// A pointer specifying the memory address to be prefetched. +static __inline__ void __attribute__((__always_inline__, __nodebug__)) +_m_prefetch(void *__P) +{ + __builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */); +} + +/// Loads a memory sequence containing the specified memory address into +/// the L1 data cache and sets the cache-coherency state to modified. +/// +/// This provides a hint to the processor that the cache line will be +/// modified. It is intended for use when the cache line will be written to +/// shortly after the prefetch is performed. +/// +/// Note that the effect of this intrinsic is dependent on the processor +/// implementation. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PREFETCHW instruction. +/// +/// \param __P +/// A pointer specifying the memory address to be prefetched. +static __inline__ void __attribute__((__always_inline__, __nodebug__)) +_m_prefetchw(volatile const void *__P) +{ +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wcast-qual" + __builtin_prefetch ((const void*)__P, 1, 3 /* _MM_HINT_T0 */); +#pragma clang diagnostic pop +} + +#endif /* __PRFCHWINTRIN_H */ diff --git a/llvm/lib/clang/19/include/profile/InstrProfData.inc b/llvm/lib/clang/19/include/profile/InstrProfData.inc new file mode 100644 index 0000000000000000000000000000000000000000..847e53cfa74328d26a6cd5d75b9ae6c7a6bc52cf --- /dev/null +++ b/llvm/lib/clang/19/include/profile/InstrProfData.inc @@ -0,0 +1,996 @@ +/*===-- InstrProfData.inc - instr profiling runtime structures -*- C++ -*-=== *\ +|* +|* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +|* See https://llvm.org/LICENSE.txt for license information. +|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +|* +\*===----------------------------------------------------------------------===*/ +/* + * This is the main file that defines all the data structure, signature, + * constant literals that are shared across profiling runtime library, + * compiler (instrumentation), and host tools (reader/writer). The entities + * defined in this file affect the profile runtime ABI, the raw profile format, + * or both. + * + * The file has two identical copies. The primary copy lives in LLVM and + * the other one sits in compiler-rt/lib/profile directory. To make changes + * in this file, first modify the primary copy and copy it over to compiler-rt. + * Testing of any change in this file can start only after the two copies are + * synced up. + * + * The first part of the file includes macros that defines types, names, and + * initializers for the member fields of the core data structures. The field + * declarations for one structure is enabled by defining the field activation + * macro associated with that structure. Only one field activation record + * can be defined at one time and the rest definitions will be filtered out by + * the preprocessor. + * + * Examples of how the template is used to instantiate structure definition: + * 1. To declare a structure: + * + * struct ProfData { + * #define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) \ + * Type Name; + * #include "llvm/ProfileData/InstrProfData.inc" + * }; + * + * 2. To construct LLVM type arrays for the struct type: + * + * Type *DataTypes[] = { + * #define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) \ + * LLVMType, + * #include "llvm/ProfileData/InstrProfData.inc" + * }; + * + * 4. To construct constant array for the initializers: + * #define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) \ + * Initializer, + * Constant *ConstantVals[] = { + * #include "llvm/ProfileData/InstrProfData.inc" + * }; + * + * + * The second part of the file includes definitions all other entities that + * are related to runtime ABI and format. When no field activation macro is + * defined, this file can be included to introduce the definitions. + * +\*===----------------------------------------------------------------------===*/ + +/* Functions marked with INSTR_PROF_VISIBILITY must have hidden visibility in + * the compiler runtime. */ +#ifndef INSTR_PROF_VISIBILITY +#define INSTR_PROF_VISIBILITY +#endif + +// clang-format off:consider re-enabling clang-format if auto-formatted C macros +// are readable (e.g., after `issue #82426` is fixed) +/* INSTR_PROF_DATA start. */ +/* Definition of member fields of the per-function control structure. */ +#ifndef INSTR_PROF_DATA +#define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) +#else +#define INSTR_PROF_DATA_DEFINED +#endif +INSTR_PROF_DATA(const uint64_t, llvm::Type::getInt64Ty(Ctx), NameRef, \ + ConstantInt::get(llvm::Type::getInt64Ty(Ctx), \ + IndexedInstrProf::ComputeHash(getPGOFuncNameVarInitializer(Inc->getName())))) +INSTR_PROF_DATA(const uint64_t, llvm::Type::getInt64Ty(Ctx), FuncHash, \ + ConstantInt::get(llvm::Type::getInt64Ty(Ctx), \ + Inc->getHash()->getZExtValue())) +INSTR_PROF_DATA(const IntPtrT, IntPtrTy, CounterPtr, RelativeCounterPtr) +INSTR_PROF_DATA(const IntPtrT, IntPtrTy, BitmapPtr, RelativeBitmapPtr) +/* This is used to map function pointers for the indirect call targets to + * function name hashes during the conversion from raw to merged profile + * data. + */ +INSTR_PROF_DATA(const IntPtrT, llvm::PointerType::getUnqual(Ctx), FunctionPointer, \ + FunctionAddr) +INSTR_PROF_DATA(IntPtrT, llvm::PointerType::getUnqual(Ctx), Values, \ + ValuesPtrExpr) +INSTR_PROF_DATA(const uint32_t, llvm::Type::getInt32Ty(Ctx), NumCounters, \ + ConstantInt::get(llvm::Type::getInt32Ty(Ctx), NumCounters)) +INSTR_PROF_DATA(const uint16_t, Int16ArrayTy, NumValueSites[IPVK_Last+1], \ + ConstantArray::get(Int16ArrayTy, Int16ArrayVals)) \ +INSTR_PROF_DATA(const uint32_t, llvm::Type::getInt32Ty(Ctx), NumBitmapBytes, \ + ConstantInt::get(llvm::Type::getInt32Ty(Ctx), NumBitmapBytes)) +#undef INSTR_PROF_DATA +/* INSTR_PROF_DATA end. */ + +/* For a virtual table object, record the name hash to associate profiled + * addresses with global variables, and record {starting address, size in bytes} + * to map the profiled virtual table (which usually have an offset from the + * starting address) back to a virtual table object. */ +#ifndef INSTR_PROF_VTABLE_DATA +#define INSTR_PROF_VTABLE_DATA(Type, LLVMType, Name, Initializer) +#else +#define INSTR_PROF_VTABLE_DATA_DEFINED +#endif +INSTR_PROF_VTABLE_DATA(const uint64_t, llvm::Type::getInt64Ty(Ctx), \ + VTableNameHash, ConstantInt::get(llvm::Type::getInt64Ty(Ctx), \ + IndexedInstrProf::ComputeHash(PGOVTableName))) +INSTR_PROF_VTABLE_DATA(const IntPtrT, llvm::PointerType::getUnqual(Ctx), \ + VTablePointer, VTableAddr) +INSTR_PROF_VTABLE_DATA(const uint32_t, llvm::Type::getInt32Ty(Ctx), VTableSize, \ + ConstantInt::get(llvm::Type::getInt32Ty(Ctx), \ + VTableSizeVal)) +#undef INSTR_PROF_VTABLE_DATA +/* INSTR_PROF_VTABLE_DATA end. */ + +/* This is an internal data structure used by value profiler. It + * is defined here to allow serialization code sharing by LLVM + * to be used in unit test. + * + * typedef struct ValueProfNode { + * // InstrProfValueData VData; + * uint64_t Value; + * uint64_t Count; + * struct ValueProfNode *Next; + * } ValueProfNode; + */ +/* INSTR_PROF_VALUE_NODE start. */ +#ifndef INSTR_PROF_VALUE_NODE +#define INSTR_PROF_VALUE_NODE(Type, LLVMType, Name, Initializer) +#else +#define INSTR_PROF_DATA_DEFINED +#endif +INSTR_PROF_VALUE_NODE(uint64_t, llvm::Type::getInt64Ty(Ctx), Value, \ + ConstantInt::get(llvm::Type::GetInt64Ty(Ctx), 0)) +INSTR_PROF_VALUE_NODE(uint64_t, llvm::Type::getInt64Ty(Ctx), Count, \ + ConstantInt::get(llvm::Type::GetInt64Ty(Ctx), 0)) +INSTR_PROF_VALUE_NODE(PtrToNodeT, llvm::PointerType::getUnqual(Ctx), Next, \ + ConstantInt::get(llvm::PointerType::getUnqual(Ctx), 0)) +#undef INSTR_PROF_VALUE_NODE +/* INSTR_PROF_VALUE_NODE end. */ + +/* INSTR_PROF_RAW_HEADER start */ +/* Definition of member fields of the raw profile header data structure. */ +/* Please update llvm/docs/InstrProfileFormat.rst as appropriate when updating + raw profile format. */ +#ifndef INSTR_PROF_RAW_HEADER +#define INSTR_PROF_RAW_HEADER(Type, Name, Initializer) +#else +#define INSTR_PROF_DATA_DEFINED +#endif +INSTR_PROF_RAW_HEADER(uint64_t, Magic, __llvm_profile_get_magic()) +INSTR_PROF_RAW_HEADER(uint64_t, Version, __llvm_profile_get_version()) +INSTR_PROF_RAW_HEADER(uint64_t, BinaryIdsSize, __llvm_write_binary_ids(NULL)) +INSTR_PROF_RAW_HEADER(uint64_t, NumData, NumData) +INSTR_PROF_RAW_HEADER(uint64_t, PaddingBytesBeforeCounters, PaddingBytesBeforeCounters) +INSTR_PROF_RAW_HEADER(uint64_t, NumCounters, NumCounters) +INSTR_PROF_RAW_HEADER(uint64_t, PaddingBytesAfterCounters, PaddingBytesAfterCounters) +INSTR_PROF_RAW_HEADER(uint64_t, NumBitmapBytes, NumBitmapBytes) +INSTR_PROF_RAW_HEADER(uint64_t, PaddingBytesAfterBitmapBytes, PaddingBytesAfterBitmapBytes) +INSTR_PROF_RAW_HEADER(uint64_t, NamesSize, NamesSize) +INSTR_PROF_RAW_HEADER(uint64_t, CountersDelta, + (uintptr_t)CountersBegin - (uintptr_t)DataBegin) +INSTR_PROF_RAW_HEADER(uint64_t, BitmapDelta, + (uintptr_t)BitmapBegin - (uintptr_t)DataBegin) +INSTR_PROF_RAW_HEADER(uint64_t, NamesDelta, (uintptr_t)NamesBegin) +INSTR_PROF_RAW_HEADER(uint64_t, NumVTables, NumVTables) +INSTR_PROF_RAW_HEADER(uint64_t, VNamesSize, VNamesSize) +INSTR_PROF_RAW_HEADER(uint64_t, ValueKindLast, IPVK_Last) +#undef INSTR_PROF_RAW_HEADER +/* INSTR_PROF_RAW_HEADER end */ + +/* VALUE_PROF_FUNC_PARAM start */ +/* Definition of parameter types of the runtime API used to do value profiling + * for a given value site. + */ +#ifndef VALUE_PROF_FUNC_PARAM +#define VALUE_PROF_FUNC_PARAM(ArgType, ArgName, ArgLLVMType) +#define INSTR_PROF_COMMA +#else +#define INSTR_PROF_DATA_DEFINED +#define INSTR_PROF_COMMA , +#endif +VALUE_PROF_FUNC_PARAM(uint64_t, TargetValue, Type::getInt64Ty(Ctx)) \ + INSTR_PROF_COMMA +VALUE_PROF_FUNC_PARAM(void *, Data, PointerType::getUnqual(Ctx)) INSTR_PROF_COMMA +VALUE_PROF_FUNC_PARAM(uint32_t, CounterIndex, Type::getInt32Ty(Ctx)) +#undef VALUE_PROF_FUNC_PARAM +#undef INSTR_PROF_COMMA +/* VALUE_PROF_FUNC_PARAM end */ + +/* VALUE_PROF_KIND start */ +#ifndef VALUE_PROF_KIND +#define VALUE_PROF_KIND(Enumerator, Value, Descr) +#else +#define INSTR_PROF_DATA_DEFINED +#endif +/* For indirect function call value profiling, the addresses of the target + * functions are profiled by the instrumented code. The target addresses are + * written in the raw profile data and converted to target function name's MD5 + * hash by the profile reader during deserialization. Typically, this happens + * when the raw profile data is read during profile merging. + * + * For this remapping the ProfData is used. ProfData contains both the function + * name hash and the function address. + */ +VALUE_PROF_KIND(IPVK_IndirectCallTarget, 0, "indirect call target") +/* For memory intrinsic functions size profiling. */ +VALUE_PROF_KIND(IPVK_MemOPSize, 1, "memory intrinsic functions size") +/* For virtual table address profiling, the address point of the virtual table + * (i.e., the address contained in objects pointing to a virtual table) are + * profiled. Note this may not be the address of the per C++ class virtual table + * object (e.g., there might be an offset). + * + * The profiled addresses are stored in raw profile, together with the following + * two types of information. + * 1. The (starting and ending) addresses of per C++ class virtual table objects. + * 2. The (compressed) virtual table object names. + * RawInstrProfReader converts profiled virtual table addresses to virtual table + * objects' MD5 hash. + */ +VALUE_PROF_KIND(IPVK_VTableTarget, 2, "The profiled address point of the vtable") +/* These two kinds must be the last to be + * declared. This is to make sure the string + * array created with the template can be + * indexed with the kind value. + */ +VALUE_PROF_KIND(IPVK_First, IPVK_IndirectCallTarget, "first") +VALUE_PROF_KIND(IPVK_Last, IPVK_VTableTarget, "last") + +#undef VALUE_PROF_KIND +/* VALUE_PROF_KIND end */ + +#undef COVMAP_V2_OR_V3 +#ifdef COVMAP_V2 +#define COVMAP_V2_OR_V3 +#endif +#ifdef COVMAP_V3 +#define COVMAP_V2_OR_V3 +#endif + +/* COVMAP_FUNC_RECORD start */ +/* Definition of member fields of the function record structure in coverage + * map. + */ +#ifndef COVMAP_FUNC_RECORD +#define COVMAP_FUNC_RECORD(Type, LLVMType, Name, Initializer) +#else +#define INSTR_PROF_DATA_DEFINED +#endif +#ifdef COVMAP_V1 +COVMAP_FUNC_RECORD(const IntPtrT, llvm::PointerType::getUnqual(Ctx), \ + NamePtr, llvm::ConstantExpr::getBitCast(NamePtr, \ + llvm::PointerType::getUnqual(Ctx))) +COVMAP_FUNC_RECORD(const uint32_t, llvm::Type::getInt32Ty(Ctx), NameSize, \ + llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), \ + NameValue.size())) +#endif +#ifdef COVMAP_V2_OR_V3 +COVMAP_FUNC_RECORD(const int64_t, llvm::Type::getInt64Ty(Ctx), NameRef, \ + llvm::ConstantInt::get( \ + llvm::Type::getInt64Ty(Ctx), NameHash)) +#endif +COVMAP_FUNC_RECORD(const uint32_t, llvm::Type::getInt32Ty(Ctx), DataSize, \ + llvm::ConstantInt::get( \ + llvm::Type::getInt32Ty(Ctx), CoverageMapping.size())) +COVMAP_FUNC_RECORD(const uint64_t, llvm::Type::getInt64Ty(Ctx), FuncHash, \ + llvm::ConstantInt::get( \ + llvm::Type::getInt64Ty(Ctx), FuncHash)) +#ifdef COVMAP_V3 +COVMAP_FUNC_RECORD(const uint64_t, llvm::Type::getInt64Ty(Ctx), FilenamesRef, \ + llvm::ConstantInt::get( \ + llvm::Type::getInt64Ty(Ctx), FilenamesRef)) +COVMAP_FUNC_RECORD(const char, \ + llvm::ArrayType::get(llvm::Type::getInt8Ty(Ctx), \ + CoverageMapping.size()), \ + CoverageMapping, + llvm::ConstantDataArray::getRaw( \ + CoverageMapping, CoverageMapping.size(), \ + llvm::Type::getInt8Ty(Ctx))) +#endif +#undef COVMAP_FUNC_RECORD +/* COVMAP_FUNC_RECORD end. */ + +/* COVMAP_HEADER start */ +/* Definition of member fields of coverage map header. + */ +#ifndef COVMAP_HEADER +#define COVMAP_HEADER(Type, LLVMType, Name, Initializer) +#else +#define INSTR_PROF_DATA_DEFINED +#endif +COVMAP_HEADER(uint32_t, Int32Ty, NRecords, \ + llvm::ConstantInt::get(Int32Ty, NRecords)) +COVMAP_HEADER(uint32_t, Int32Ty, FilenamesSize, \ + llvm::ConstantInt::get(Int32Ty, FilenamesSize)) +COVMAP_HEADER(uint32_t, Int32Ty, CoverageSize, \ + llvm::ConstantInt::get(Int32Ty, CoverageMappingSize)) +COVMAP_HEADER(uint32_t, Int32Ty, Version, \ + llvm::ConstantInt::get(Int32Ty, CovMapVersion::CurrentVersion)) +#undef COVMAP_HEADER +/* COVMAP_HEADER end. */ + + +#ifdef INSTR_PROF_SECT_ENTRY +#define INSTR_PROF_DATA_DEFINED +INSTR_PROF_SECT_ENTRY(IPSK_data, \ + INSTR_PROF_QUOTE(INSTR_PROF_DATA_COMMON), \ + INSTR_PROF_DATA_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_cnts, \ + INSTR_PROF_QUOTE(INSTR_PROF_CNTS_COMMON), \ + INSTR_PROF_CNTS_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_bitmap, \ + INSTR_PROF_QUOTE(INSTR_PROF_BITS_COMMON), \ + INSTR_PROF_BITS_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_name, \ + INSTR_PROF_QUOTE(INSTR_PROF_NAME_COMMON), \ + INSTR_PROF_NAME_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_vname, \ + INSTR_PROF_QUOTE(INSTR_PROF_VNAME_COMMON), \ + INSTR_PROF_VNAME_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_vals, \ + INSTR_PROF_QUOTE(INSTR_PROF_VALS_COMMON), \ + INSTR_PROF_VALS_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_vnodes, \ + INSTR_PROF_QUOTE(INSTR_PROF_VNODES_COMMON), \ + INSTR_PROF_VNODES_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_vtab, \ + INSTR_PROF_QUOTE(INSTR_PROF_VTAB_COMMON), \ + INSTR_PROF_VTAB_COFF, "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_covmap, \ + INSTR_PROF_QUOTE(INSTR_PROF_COVMAP_COMMON), \ + INSTR_PROF_COVMAP_COFF, "__LLVM_COV,") +INSTR_PROF_SECT_ENTRY(IPSK_covfun, \ + INSTR_PROF_QUOTE(INSTR_PROF_COVFUN_COMMON), \ + INSTR_PROF_COVFUN_COFF, "__LLVM_COV,") +INSTR_PROF_SECT_ENTRY(IPSK_orderfile, \ + INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_COMMON), \ + INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_COFF), "__DATA,") +INSTR_PROF_SECT_ENTRY(IPSK_covdata, \ + INSTR_PROF_QUOTE(INSTR_PROF_COVDATA_COMMON), \ + INSTR_PROF_COVDATA_COFF, "__LLVM_COV,") +INSTR_PROF_SECT_ENTRY(IPSK_covname, \ + INSTR_PROF_QUOTE(INSTR_PROF_COVNAME_COMMON), \ + INSTR_PROF_COVNAME_COFF, "__LLVM_COV,") + +#undef INSTR_PROF_SECT_ENTRY +#endif + + +#ifdef INSTR_PROF_VALUE_PROF_DATA +#define INSTR_PROF_DATA_DEFINED + +#define INSTR_PROF_MAX_NUM_VAL_PER_SITE 255 +/*! + * This is the header of the data structure that defines the on-disk + * layout of the value profile data of a particular kind for one function. + */ +typedef struct ValueProfRecord { + /* The kind of the value profile record. */ + uint32_t Kind; + /* + * The number of value profile sites. It is guaranteed to be non-zero; + * otherwise the record for this kind won't be emitted. + */ + uint32_t NumValueSites; + /* + * The first element of the array that stores the number of profiled + * values for each value site. The size of the array is NumValueSites. + * Since NumValueSites is greater than zero, there is at least one + * element in the array. + */ + uint8_t SiteCountArray[1]; + + /* + * The fake declaration is for documentation purpose only. + * Align the start of next field to be on 8 byte boundaries. + uint8_t Padding[X]; + */ + + /* The array of value profile data. The size of the array is the sum + * of all elements in SiteCountArray[]. + InstrProfValueData ValueData[]; + */ + +#ifdef __cplusplus + /*! + * Return the number of value sites. + */ + uint32_t getNumValueSites() const { return NumValueSites; } + /*! + * Read data from this record and save it to Record. + */ + void deserializeTo(InstrProfRecord &Record, + InstrProfSymtab *SymTab); + /* + * In-place byte swap: + * Do byte swap for this instance. \c Old is the original order before + * the swap, and \c New is the New byte order. + */ + void swapBytes(llvm::endianness Old, llvm::endianness New); +#endif +} ValueProfRecord; + +/*! + * Per-function header/control data structure for value profiling + * data in indexed format. + */ +typedef struct ValueProfData { + /* + * Total size in bytes including this field. It must be a multiple + * of sizeof(uint64_t). + */ + uint32_t TotalSize; + /* + *The number of value profile kinds that has value profile data. + * In this implementation, a value profile kind is considered to + * have profile data if the number of value profile sites for the + * kind is not zero. More aggressively, the implementation can + * choose to check the actual data value: if none of the value sites + * has any profiled values, the kind can be skipped. + */ + uint32_t NumValueKinds; + + /* + * Following are a sequence of variable length records. The prefix/header + * of each record is defined by ValueProfRecord type. The number of + * records is NumValueKinds. + * ValueProfRecord Record_1; + * ValueProfRecord Record_N; + */ + +#if __cplusplus + /*! + * Return the total size in bytes of the on-disk value profile data + * given the data stored in Record. + */ + static uint32_t getSize(const InstrProfRecord &Record); + /*! + * Return a pointer to \c ValueProfData instance ready to be streamed. + */ + static std::unique_ptr + serializeFrom(const InstrProfRecord &Record); + /*! + * Check the integrity of the record. + */ + Error checkIntegrity(); + /*! + * Return a pointer to \c ValueProfileData instance ready to be read. + * All data in the instance are properly byte swapped. The input + * data is assumed to be in little endian order. + */ + static Expected> + getValueProfData(const unsigned char *SrcBuffer, + const unsigned char *const SrcBufferEnd, + llvm::endianness SrcDataEndianness); + /*! + * Swap byte order from \c Endianness order to host byte order. + */ + void swapBytesToHost(llvm::endianness Endianness); + /*! + * Swap byte order from host byte order to \c Endianness order. + */ + void swapBytesFromHost(llvm::endianness Endianness); + /*! + * Return the total size of \c ValueProfileData. + */ + uint32_t getSize() const { return TotalSize; } + /*! + * Read data from this data and save it to \c Record. + */ + void deserializeTo(InstrProfRecord &Record, + InstrProfSymtab *SymTab); + void operator delete(void *ptr) { ::operator delete(ptr); } +#endif +} ValueProfData; + +/* + * The closure is designed to abstact away two types of value profile data: + * - InstrProfRecord which is the primary data structure used to + * represent profile data in host tools (reader, writer, and profile-use) + * - value profile runtime data structure suitable to be used by C + * runtime library. + * + * Both sources of data need to serialize to disk/memory-buffer in common + * format: ValueProfData. The abstraction allows compiler-rt's raw profiler + * writer to share the same format and code with indexed profile writer. + * + * For documentation of the member methods below, refer to corresponding methods + * in class InstrProfRecord. + */ +typedef struct ValueProfRecordClosure { + const void *Record; + uint32_t (*GetNumValueKinds)(const void *Record); + uint32_t (*GetNumValueSites)(const void *Record, uint32_t VKind); + uint32_t (*GetNumValueData)(const void *Record, uint32_t VKind); + uint32_t (*GetNumValueDataForSite)(const void *R, uint32_t VK, uint32_t S); + + /* + * After extracting the value profile data from the value profile record, + * this method is used to map the in-memory value to on-disk value. If + * the method is null, value will be written out untranslated. + */ + uint64_t (*RemapValueData)(uint32_t, uint64_t Value); + void (*GetValueForSite)(const void *R, InstrProfValueData *Dst, uint32_t K, + uint32_t S); + ValueProfData *(*AllocValueProfData)(size_t TotalSizeInBytes); +} ValueProfRecordClosure; + +INSTR_PROF_VISIBILITY ValueProfRecord * +getFirstValueProfRecord(ValueProfData *VPD); +INSTR_PROF_VISIBILITY ValueProfRecord * +getValueProfRecordNext(ValueProfRecord *VPR); +INSTR_PROF_VISIBILITY InstrProfValueData * +getValueProfRecordValueData(ValueProfRecord *VPR); +INSTR_PROF_VISIBILITY uint32_t +getValueProfRecordHeaderSize(uint32_t NumValueSites); + +#undef INSTR_PROF_VALUE_PROF_DATA +#endif /* INSTR_PROF_VALUE_PROF_DATA */ + + +#ifdef INSTR_PROF_COMMON_API_IMPL +#define INSTR_PROF_DATA_DEFINED +#ifdef __cplusplus +#define INSTR_PROF_INLINE inline +#define INSTR_PROF_NULLPTR nullptr +#else +#define INSTR_PROF_INLINE +#define INSTR_PROF_NULLPTR NULL +#endif + +#ifndef offsetof +#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) +#endif + +// clang-format on + +/*! + * Return the \c ValueProfRecord header size including the + * padding bytes. + */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE uint32_t +getValueProfRecordHeaderSize(uint32_t NumValueSites) { + uint32_t Size = offsetof(ValueProfRecord, SiteCountArray) + + sizeof(uint8_t) * NumValueSites; + /* Round the size to multiple of 8 bytes. */ + Size = (Size + 7) & ~7; + return Size; +} + +/*! + * Return the total size of the value profile record including the + * header and the value data. + */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE uint32_t +getValueProfRecordSize(uint32_t NumValueSites, uint32_t NumValueData) { + return getValueProfRecordHeaderSize(NumValueSites) + + sizeof(InstrProfValueData) * NumValueData; +} + +/*! + * Return the pointer to the start of value data array. + */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE InstrProfValueData * +getValueProfRecordValueData(ValueProfRecord *This) { + return (InstrProfValueData *)((char *)This + getValueProfRecordHeaderSize( + This->NumValueSites)); +} + +/*! + * Return the total number of value data for \c This record. + */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE uint32_t +getValueProfRecordNumValueData(ValueProfRecord *This) { + uint32_t NumValueData = 0; + uint32_t I; + for (I = 0; I < This->NumValueSites; I++) + NumValueData += This->SiteCountArray[I]; + return NumValueData; +} + +/*! + * Use this method to advance to the next \c This \c ValueProfRecord. + */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE ValueProfRecord * +getValueProfRecordNext(ValueProfRecord *This) { + uint32_t NumValueData = getValueProfRecordNumValueData(This); + return (ValueProfRecord *)((char *)This + + getValueProfRecordSize(This->NumValueSites, + NumValueData)); +} + +/*! + * Return the first \c ValueProfRecord instance. + */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE ValueProfRecord * +getFirstValueProfRecord(ValueProfData *This) { + return (ValueProfRecord *)((char *)This + sizeof(ValueProfData)); +} + +/* Closure based interfaces. */ + +/*! + * Return the total size in bytes of the on-disk value profile data + * given the data stored in Record. + */ +INSTR_PROF_VISIBILITY uint32_t +getValueProfDataSize(ValueProfRecordClosure *Closure) { + uint32_t Kind; + uint32_t TotalSize = sizeof(ValueProfData); + const void *Record = Closure->Record; + + for (Kind = IPVK_First; Kind <= IPVK_Last; Kind++) { + uint32_t NumValueSites = Closure->GetNumValueSites(Record, Kind); + if (!NumValueSites) + continue; + TotalSize += getValueProfRecordSize(NumValueSites, + Closure->GetNumValueData(Record, Kind)); + } + return TotalSize; +} + +/*! + * Extract value profile data of a function for the profile kind \c ValueKind + * from the \c Closure and serialize the data into \c This record instance. + */ +INSTR_PROF_VISIBILITY void +serializeValueProfRecordFrom(ValueProfRecord *This, + ValueProfRecordClosure *Closure, + uint32_t ValueKind, uint32_t NumValueSites) { + uint32_t S; + const void *Record = Closure->Record; + This->Kind = ValueKind; + This->NumValueSites = NumValueSites; + InstrProfValueData *DstVD = getValueProfRecordValueData(This); + + for (S = 0; S < NumValueSites; S++) { + uint32_t ND = Closure->GetNumValueDataForSite(Record, ValueKind, S); + This->SiteCountArray[S] = ND; + Closure->GetValueForSite(Record, DstVD, ValueKind, S); + DstVD += ND; + } +} + +/*! + * Extract value profile data of a function from the \c Closure + * and serialize the data into \c DstData if it is not NULL or heap + * memory allocated by the \c Closure's allocator method. If \c + * DstData is not null, the caller is expected to set the TotalSize + * in DstData. + */ +INSTR_PROF_VISIBILITY ValueProfData * +serializeValueProfDataFrom(ValueProfRecordClosure *Closure, + ValueProfData *DstData) { + uint32_t Kind; + uint32_t TotalSize = + DstData ? DstData->TotalSize : getValueProfDataSize(Closure); + + ValueProfData *VPD = + DstData ? DstData : Closure->AllocValueProfData(TotalSize); + + VPD->TotalSize = TotalSize; + VPD->NumValueKinds = Closure->GetNumValueKinds(Closure->Record); + ValueProfRecord *VR = getFirstValueProfRecord(VPD); + for (Kind = IPVK_First; Kind <= IPVK_Last; Kind++) { + uint32_t NumValueSites = Closure->GetNumValueSites(Closure->Record, Kind); + if (!NumValueSites) + continue; + serializeValueProfRecordFrom(VR, Closure, Kind, NumValueSites); + VR = getValueProfRecordNext(VR); + } + return VPD; +} + +#undef INSTR_PROF_COMMON_API_IMPL +#endif /* INSTR_PROF_COMMON_API_IMPL */ + +/*============================================================================*/ + +// clang-format off:consider re-enabling clang-format if auto-formatted C macros +// are readable (e.g., after `issue #82426` is fixed) +#ifndef INSTR_PROF_DATA_DEFINED + +#ifndef INSTR_PROF_DATA_INC +#define INSTR_PROF_DATA_INC + +/* Helper macros. */ +#define INSTR_PROF_SIMPLE_QUOTE(x) #x +#define INSTR_PROF_QUOTE(x) INSTR_PROF_SIMPLE_QUOTE(x) +#define INSTR_PROF_SIMPLE_CONCAT(x,y) x ## y +#define INSTR_PROF_CONCAT(x,y) INSTR_PROF_SIMPLE_CONCAT(x,y) + +/* Magic number to detect file format and endianness. + * Use 255 at one end, since no UTF-8 file can use that character. Avoid 0, + * so that utilities, like strings, don't grab it as a string. 129 is also + * invalid UTF-8, and high enough to be interesting. + * Use "lprofr" in the centre to stand for "LLVM Profile Raw", or "lprofR" + * for 32-bit platforms. + */ +#define INSTR_PROF_RAW_MAGIC_64 (uint64_t)255 << 56 | (uint64_t)'l' << 48 | \ + (uint64_t)'p' << 40 | (uint64_t)'r' << 32 | (uint64_t)'o' << 24 | \ + (uint64_t)'f' << 16 | (uint64_t)'r' << 8 | (uint64_t)129 +#define INSTR_PROF_RAW_MAGIC_32 (uint64_t)255 << 56 | (uint64_t)'l' << 48 | \ + (uint64_t)'p' << 40 | (uint64_t)'r' << 32 | (uint64_t)'o' << 24 | \ + (uint64_t)'f' << 16 | (uint64_t)'R' << 8 | (uint64_t)129 + +/* Raw profile format version (start from 1). */ +#define INSTR_PROF_RAW_VERSION 10 +/* Indexed profile format version (start from 1). */ +#define INSTR_PROF_INDEX_VERSION 12 +/* Coverage mapping format version (start from 0). */ +#define INSTR_PROF_COVMAP_VERSION 6 + +/* Profile version is always of type uint64_t. Reserve the upper 32 bits in the + * version for other variants of profile. We set the 8th most significant bit + * (i.e. bit 56) to 1 to indicate if this is an IR-level instrumentation + * generated profile, and 0 if this is a Clang FE generated profile. + * 1 in bit 57 indicates there are context-sensitive records in the profile. + * The 59th bit indicates whether to use debug info to correlate profiles. + * The 60th bit indicates single byte coverage instrumentation. + * The 61st bit indicates function entry instrumentation only. + * The 62nd bit indicates whether memory profile information is present. + * The 63rd bit indicates if this is a temporal profile. + */ +#define VARIANT_MASKS_ALL 0xffffffff00000000ULL +#define GET_VERSION(V) ((V) & ~VARIANT_MASKS_ALL) +#define VARIANT_MASK_IR_PROF (0x1ULL << 56) +#define VARIANT_MASK_CSIR_PROF (0x1ULL << 57) +#define VARIANT_MASK_INSTR_ENTRY (0x1ULL << 58) +#define VARIANT_MASK_DBG_CORRELATE (0x1ULL << 59) +#define VARIANT_MASK_BYTE_COVERAGE (0x1ULL << 60) +#define VARIANT_MASK_FUNCTION_ENTRY_ONLY (0x1ULL << 61) +#define VARIANT_MASK_MEMPROF (0x1ULL << 62) +#define VARIANT_MASK_TEMPORAL_PROF (0x1ULL << 63) +#define INSTR_PROF_RAW_VERSION_VAR __llvm_profile_raw_version +#define INSTR_PROF_PROFILE_RUNTIME_VAR __llvm_profile_runtime +#define INSTR_PROF_PROFILE_COUNTER_BIAS_VAR __llvm_profile_counter_bias +#define INSTR_PROF_PROFILE_SET_TIMESTAMP __llvm_profile_set_timestamp +#define INSTR_PROF_PROFILE_SAMPLING_VAR __llvm_profile_sampling + +/* The variable that holds the name of the profile data + * specified via command line. */ +#define INSTR_PROF_PROFILE_NAME_VAR __llvm_profile_filename + +/* section name strings common to all targets other + than WIN32 */ +#define INSTR_PROF_DATA_COMMON __llvm_prf_data +#define INSTR_PROF_NAME_COMMON __llvm_prf_names +#define INSTR_PROF_VNAME_COMMON __llvm_prf_vns +#define INSTR_PROF_CNTS_COMMON __llvm_prf_cnts +#define INSTR_PROF_BITS_COMMON __llvm_prf_bits +#define INSTR_PROF_VALS_COMMON __llvm_prf_vals +#define INSTR_PROF_VNODES_COMMON __llvm_prf_vnds +#define INSTR_PROF_VTAB_COMMON __llvm_prf_vtab +#define INSTR_PROF_COVMAP_COMMON __llvm_covmap +#define INSTR_PROF_COVFUN_COMMON __llvm_covfun +#define INSTR_PROF_COVDATA_COMMON __llvm_covdata +#define INSTR_PROF_COVNAME_COMMON __llvm_covnames +#define INSTR_PROF_ORDERFILE_COMMON __llvm_orderfile +/* Windows section names. Because these section names contain dollar characters, + * they must be quoted. + */ +#define INSTR_PROF_DATA_COFF ".lprfd$M" +#define INSTR_PROF_NAME_COFF ".lprfn$M" +#define INSTR_PROF_VNAME_COFF ".lprfvn$M" +#define INSTR_PROF_CNTS_COFF ".lprfc$M" +#define INSTR_PROF_BITS_COFF ".lprfb$M" +#define INSTR_PROF_VALS_COFF ".lprfv$M" +#define INSTR_PROF_VNODES_COFF ".lprfnd$M" +#define INSTR_PROF_VTAB_COFF ".lprfvt$M" +#define INSTR_PROF_COVMAP_COFF ".lcovmap$M" +#define INSTR_PROF_COVFUN_COFF ".lcovfun$M" +/* Since cov data and cov names sections are not allocated, we don't need to + * access them at runtime. + */ +#define INSTR_PROF_COVDATA_COFF ".lcovd" +#define INSTR_PROF_COVNAME_COFF ".lcovn" +#define INSTR_PROF_ORDERFILE_COFF ".lorderfile$M" + +#ifdef _WIN32 +/* Runtime section names and name strings. */ +#define INSTR_PROF_DATA_SECT_NAME INSTR_PROF_DATA_COFF +#define INSTR_PROF_NAME_SECT_NAME INSTR_PROF_NAME_COFF +#define INSTR_PROF_CNTS_SECT_NAME INSTR_PROF_CNTS_COFF +#define INSTR_PROF_BITS_SECT_NAME INSTR_PROF_BITS_COFF +#define INSTR_PROF_VTAB_SECT_NAME INSTR_PROF_VTAB_COFF +#define INSTR_PROF_VNAME_SECT_NAME INSTR_PROF_VNAME_COFF +/* Array of pointers. Each pointer points to a list + * of value nodes associated with one value site. + */ +#define INSTR_PROF_VALS_SECT_NAME INSTR_PROF_VALS_COFF +/* Value profile nodes section. */ +#define INSTR_PROF_VNODES_SECT_NAME INSTR_PROF_VNODES_COFF +#define INSTR_PROF_COVMAP_SECT_NAME INSTR_PROF_COVMAP_COFF +#define INSTR_PROF_COVFUN_SECT_NAME INSTR_PROF_COVFUN_COFF +#define INSTR_PROF_COVDATA_SECT_NAME INSTR_PROF_COVDATA_COFF +#define INSTR_PROF_COVNAME_SECT_NAME INSTR_PROF_COVNAME_COFF +#define INSTR_PROF_ORDERFILE_SECT_NAME INSTR_PROF_ORDERFILE_COFF +#else +/* Runtime section names and name strings. */ +#define INSTR_PROF_DATA_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_DATA_COMMON) +#define INSTR_PROF_NAME_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_NAME_COMMON) +#define INSTR_PROF_CNTS_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_CNTS_COMMON) +#define INSTR_PROF_BITS_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_BITS_COMMON) +#define INSTR_PROF_VTAB_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_VTAB_COMMON) +#define INSTR_PROF_VNAME_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_VNAME_COMMON) +/* Array of pointers. Each pointer points to a list + * of value nodes associated with one value site. + */ +#define INSTR_PROF_VALS_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_VALS_COMMON) +/* Value profile nodes section. */ +#define INSTR_PROF_VNODES_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_VNODES_COMMON) +#define INSTR_PROF_COVMAP_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_COVMAP_COMMON) +#define INSTR_PROF_COVFUN_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_COVFUN_COMMON) +#define INSTR_PROF_COVDATA_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_COVDATA_COMMON) +#define INSTR_PROF_COVNAME_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_COVNAME_COMMON) +/* Order file instrumentation. */ +#define INSTR_PROF_ORDERFILE_SECT_NAME \ + INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_COMMON) +#endif + +#define INSTR_PROF_ORDERFILE_BUFFER_NAME _llvm_order_file_buffer +#define INSTR_PROF_ORDERFILE_BUFFER_NAME_STR \ + INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_BUFFER_NAME) +#define INSTR_PROF_ORDERFILE_BUFFER_IDX_NAME _llvm_order_file_buffer_idx +#define INSTR_PROF_ORDERFILE_BUFFER_IDX_NAME_STR \ + INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_BUFFER_IDX_NAME) + +/* Macros to define start/stop section symbol for a given + * section on Linux. For instance + * INSTR_PROF_SECT_START(INSTR_PROF_DATA_SECT_NAME) will + * expand to __start___llvm_prof_data + */ +#define INSTR_PROF_SECT_START(Sect) \ + INSTR_PROF_CONCAT(__start_,Sect) +#define INSTR_PROF_SECT_STOP(Sect) \ + INSTR_PROF_CONCAT(__stop_,Sect) + +/* Value Profiling API linkage name. */ +#define INSTR_PROF_VALUE_PROF_FUNC __llvm_profile_instrument_target +#define INSTR_PROF_VALUE_PROF_FUNC_STR \ + INSTR_PROF_QUOTE(INSTR_PROF_VALUE_PROF_FUNC) +#define INSTR_PROF_VALUE_PROF_MEMOP_FUNC __llvm_profile_instrument_memop +#define INSTR_PROF_VALUE_PROF_MEMOP_FUNC_STR \ + INSTR_PROF_QUOTE(INSTR_PROF_VALUE_PROF_MEMOP_FUNC) + +/* InstrProfile per-function control data alignment. */ +#define INSTR_PROF_DATA_ALIGNMENT 8 + +/* The data structure that represents a tracked value by the + * value profiler. + */ +typedef struct InstrProfValueData { + /* Profiled value. */ + uint64_t Value; + /* Number of times the value appears in the training run. */ + uint64_t Count; +} InstrProfValueData; + +#endif /* INSTR_PROF_DATA_INC */ + +#ifndef INSTR_ORDER_FILE_INC +/* The maximal # of functions: 128*1024 (the buffer size will be 128*4 KB). */ +#define INSTR_ORDER_FILE_BUFFER_SIZE 131072 +#define INSTR_ORDER_FILE_BUFFER_BITS 17 +#define INSTR_ORDER_FILE_BUFFER_MASK 0x1ffff +#endif /* INSTR_ORDER_FILE_INC */ +#else +#undef INSTR_PROF_DATA_DEFINED +#endif + +#undef COVMAP_V2_OR_V3 + +#ifdef INSTR_PROF_VALUE_PROF_MEMOP_API + +#ifdef __cplusplus +#define INSTR_PROF_INLINE inline +#else +#define INSTR_PROF_INLINE +#endif + +/* The value range buckets (22 buckets) for the memop size value profiling looks + * like: + * + * [0, 0] + * [1, 1] + * [2, 2] + * [3, 3] + * [4, 4] + * [5, 5] + * [6, 6] + * [7, 7] + * [8, 8] + * [9, 15] + * [16, 16] + * [17, 31] + * [32, 32] + * [33, 63] + * [64, 64] + * [65, 127] + * [128, 128] + * [129, 255] + * [256, 256] + * [257, 511] + * [512, 512] + * [513, UINT64_MAX] + * + * Each range has a 'representative value' which is the lower end value of the + * range and used to store in the runtime profile data records and the VP + * metadata. For example, it's 2 for [2, 2] and 64 for [65, 127]. + */ +#define INSTR_PROF_NUM_BUCKETS 22 + +/* + * Clz and Popcount. This code was copied from + * compiler-rt/lib/fuzzer/{FuzzerBuiltins.h,FuzzerBuiltinsMsvc.h} and + * llvm/include/llvm/Support/MathExtras.h. + */ +#if defined(_MSC_VER) && !defined(__clang__) + +#include +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE +int InstProfClzll(unsigned long long X) { + unsigned long LeadZeroIdx = 0; +#if !defined(_M_ARM64) && !defined(_M_X64) + // Scan the high 32 bits. + if (_BitScanReverse(&LeadZeroIdx, (unsigned long)(X >> 32))) + return (int)(63 - (LeadZeroIdx + 32)); // Create a bit offset + // from the MSB. + // Scan the low 32 bits. + if (_BitScanReverse(&LeadZeroIdx, (unsigned long)(X))) + return (int)(63 - LeadZeroIdx); +#else + if (_BitScanReverse64(&LeadZeroIdx, X)) return 63 - LeadZeroIdx; +#endif + return 64; +} +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE +int InstProfPopcountll(unsigned long long X) { + // This code originates from https://reviews.llvm.org/rG30626254510f. + unsigned long long v = X; + v = v - ((v >> 1) & 0x5555555555555555ULL); + v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL); + v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL; + return (int)((unsigned long long)(v * 0x0101010101010101ULL) >> 56); +} + +#else + +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE +int InstProfClzll(unsigned long long X) { return __builtin_clzll(X); } +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE +int InstProfPopcountll(unsigned long long X) { return __builtin_popcountll(X); } + +#endif /* defined(_MSC_VER) && !defined(__clang__) */ + +// clang-format on + +/* Map an (observed) memop size value to the representative value of its range. + * For example, 5 -> 5, 22 -> 17, 99 -> 65, 256 -> 256, 1001 -> 513. */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE uint64_t +InstrProfGetRangeRepValue(uint64_t Value) { + if (Value <= 8) + // The first ranges are individually tracked. Use the value as is. + return Value; + else if (Value >= 513) + // The last range is mapped to its lowest value. + return 513; + else if (InstProfPopcountll(Value) == 1) + // If it's a power of two, use it as is. + return Value; + else + // Otherwise, take to the previous power of two + 1. + return (UINT64_C(1) << (64 - InstProfClzll(Value) - 1)) + 1; +} + +/* Return true if the range that an (observed) memop size value belongs to has + * only a single value in the range. For example, 0 -> true, 8 -> true, 10 -> + * false, 64 -> true, 100 -> false, 513 -> false. */ +INSTR_PROF_VISIBILITY INSTR_PROF_INLINE unsigned +InstrProfIsSingleValRange(uint64_t Value) { + if (Value <= 8) + // The first ranges are individually tracked. + return 1; + else if (InstProfPopcountll(Value) == 1) + // If it's a power of two, there's only one value. + return 1; + else + // Otherwise, there's more than one value in the range. + return 0; +} + +#endif /* INSTR_PROF_VALUE_PROF_MEMOP_API */ diff --git a/llvm/lib/clang/19/include/profile/instr_prof_interface.h b/llvm/lib/clang/19/include/profile/instr_prof_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..be40f2685934bea48d201d9edb8e0f5240a0b78d --- /dev/null +++ b/llvm/lib/clang/19/include/profile/instr_prof_interface.h @@ -0,0 +1,92 @@ +/*===---- instr_prof_interface.h - Instrumentation PGO User Program API ----=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + * + * This header provides a public interface for fine-grained control of counter + * reset and profile dumping. These interface functions can be directly called + * in user programs. + * +\*===---------------------------------------------------------------------===*/ + +#ifndef COMPILER_RT_INSTR_PROFILING +#define COMPILER_RT_INSTR_PROFILING + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __LLVM_INSTR_PROFILE_GENERATE +// Profile file reset and dump interfaces. +// When `-fprofile[-instr]-generate`/`-fcs-profile-generate` is in effect, +// clang defines __LLVM_INSTR_PROFILE_GENERATE to pick up the API calls. + +/*! + * \brief Set the filename for writing instrumentation data. + * + * Sets the filename to be used for subsequent calls to + * \a __llvm_profile_write_file(). + * + * \c Name is not copied, so it must remain valid. Passing NULL resets the + * filename logic to the default behaviour. + * + * Note: There may be multiple copies of the profile runtime (one for each + * instrumented image/DSO). This API only modifies the filename within the + * copy of the runtime available to the calling image. + * + * Warning: This is a no-op if continuous mode (\ref + * __llvm_profile_is_continuous_mode_enabled) is on. The reason for this is + * that in continuous mode, profile counters are mmap()'d to the profile at + * program initialization time. Support for transferring the mmap'd profile + * counts to a new file has not been implemented. + */ +void __llvm_profile_set_filename(const char *Name); + +/*! + * \brief Interface to set all PGO counters to zero for the current process. + * + */ +void __llvm_profile_reset_counters(void); + +/*! + * \brief this is a wrapper interface to \c __llvm_profile_write_file. + * After this interface is invoked, an already dumped flag will be set + * so that profile won't be dumped again during program exit. + * Invocation of interface __llvm_profile_reset_counters will clear + * the flag. This interface is designed to be used to collect profile + * data from user selected hot regions. The use model is + * __llvm_profile_reset_counters(); + * ... hot region 1 + * __llvm_profile_dump(); + * .. some other code + * __llvm_profile_reset_counters(); + * ... hot region 2 + * __llvm_profile_dump(); + * + * It is expected that on-line profile merging is on with \c %m specifier + * used in profile filename . If merging is not turned on, user is expected + * to invoke __llvm_profile_set_filename to specify different profile names + * for different regions before dumping to avoid profile write clobbering. + */ +int __llvm_profile_dump(void); + +// Interface to dump the current process' order file to disk. +int __llvm_orderfile_dump(void); + +#else + +#define __llvm_profile_set_filename(Name) +#define __llvm_profile_reset_counters() +#define __llvm_profile_dump() (0) +#define __llvm_orderfile_dump() (0) + +#endif + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/llvm/lib/clang/19/include/ptrauth.h b/llvm/lib/clang/19/include/ptrauth.h new file mode 100644 index 0000000000000000000000000000000000000000..154b599862a8e2eb076326f287bf0b6143efb218 --- /dev/null +++ b/llvm/lib/clang/19/include/ptrauth.h @@ -0,0 +1,330 @@ +/*===---- ptrauth.h - Pointer authentication -------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __PTRAUTH_H +#define __PTRAUTH_H + +typedef enum { + ptrauth_key_asia = 0, + ptrauth_key_asib = 1, + ptrauth_key_asda = 2, + ptrauth_key_asdb = 3, + + /* A process-independent key which can be used to sign code pointers. */ + ptrauth_key_process_independent_code = ptrauth_key_asia, + + /* A process-specific key which can be used to sign code pointers. */ + ptrauth_key_process_dependent_code = ptrauth_key_asib, + + /* A process-independent key which can be used to sign data pointers. */ + ptrauth_key_process_independent_data = ptrauth_key_asda, + + /* A process-specific key which can be used to sign data pointers. */ + ptrauth_key_process_dependent_data = ptrauth_key_asdb, + + /* The key used to sign return addresses on the stack. + The extra data is based on the storage address of the return address. + On AArch64, that is always the storage address of the return address + 8 + (or, in other words, the value of the stack pointer on function entry) */ + ptrauth_key_return_address = ptrauth_key_process_dependent_code, + + /* The key used to sign C function pointers. + The extra data is always 0. */ + ptrauth_key_function_pointer = ptrauth_key_process_independent_code, + + /* The key used to sign C++ v-table pointers. + The extra data is always 0. */ + ptrauth_key_cxx_vtable_pointer = ptrauth_key_process_independent_data, + + /* Other pointers signed under the ABI use private ABI rules. */ + +} ptrauth_key; + +/* An integer type of the appropriate size for a discriminator argument. */ +typedef __UINTPTR_TYPE__ ptrauth_extra_data_t; + +/* An integer type of the appropriate size for a generic signature. */ +typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t; + +/* A signed pointer value embeds the original pointer together with + a signature that attests to the validity of that pointer. Because + this signature must use only "spare" bits of the pointer, a + signature's validity is probabilistic in practice: it is unlikely + but still plausible that an invalidly-derived signature will + somehow equal the correct signature and therefore successfully + authenticate. Nonetheless, this scheme provides a strong degree + of protection against certain kinds of attacks. */ + +/* Authenticating a pointer that was not signed with the given key + and extra-data value will (likely) fail by trapping. */ + +/* The null function pointer is always the all-zero bit pattern. + Signing an all-zero bit pattern will embed a (likely) non-zero + signature in the result, and so the result will not seem to be + a null function pointer. Authenticating this value will yield + a null function pointer back. However, authenticating an + all-zero bit pattern will probably fail, because the + authentication will expect a (likely) non-zero signature to + embedded in the value. + + Because of this, if a pointer may validly be null, you should + check for null before attempting to authenticate it with one + of these intrinsics. This is not necessary when using the + __ptrauth qualifier; the compiler will perform this check + automatically. */ + +#if __has_feature(ptrauth_intrinsics) + +/* Strip the signature from a value without authenticating it. + + If the value is a function pointer, the result will not be a + legal function pointer because of the missing signature, and + attempting to call it will result in an authentication failure. + + The value must be an expression of pointer type. + The key must be a constant expression of type ptrauth_key. + The result will have the same type as the original value. */ +#define ptrauth_strip(__value, __key) __builtin_ptrauth_strip(__value, __key) + +/* Blend a constant discriminator into the given pointer-like value + to form a new discriminator. Not all bits of the inputs are + guaranteed to contribute to the result. + + On arm64e, the integer must fall within the range of a uint16_t; + other bits may be ignored. + + For the purposes of ptrauth_sign_constant, the result of calling + this function is considered a constant expression if the arguments + are constant. Some restrictions may be imposed on the pointer. + + The first argument must be an expression of pointer type. + The second argument must be an expression of integer type. + The result will have type uintptr_t. */ +#define ptrauth_blend_discriminator(__pointer, __integer) \ + __builtin_ptrauth_blend_discriminator(__pointer, __integer) + +/* Return a signed pointer for a constant address in a manner which guarantees + a non-attackable sequence. + + The value must be a constant expression of pointer type which evaluates to + a non-null pointer. + The key must be a constant expression of type ptrauth_key. + The extra data must be a constant expression of pointer or integer type; + if an integer, it will be coerced to ptrauth_extra_data_t. + The result will have the same type as the original value. + + This can be used in constant expressions. */ +#define ptrauth_sign_constant(__value, __key, __data) \ + __builtin_ptrauth_sign_constant(__value, __key, __data) + +/* Add a signature to the given pointer value using a specific key, + using the given extra data as a salt to the signing process. + + This operation does not authenticate the original value and is + therefore potentially insecure if an attacker could possibly + control that value. + + The value must be an expression of pointer type. + The key must be a constant expression of type ptrauth_key. + The extra data must be an expression of pointer or integer type; + if an integer, it will be coerced to ptrauth_extra_data_t. + The result will have the same type as the original value. */ +#define ptrauth_sign_unauthenticated(__value, __key, __data) \ + __builtin_ptrauth_sign_unauthenticated(__value, __key, __data) + +/* Authenticate a pointer using one scheme and resign it using another. + + If the result is subsequently authenticated using the new scheme, that + authentication is guaranteed to fail if and only if the initial + authentication failed. + + The value must be an expression of pointer type. + The key must be a constant expression of type ptrauth_key. + The extra data must be an expression of pointer or integer type; + if an integer, it will be coerced to ptrauth_extra_data_t. + The result will have the same type as the original value. + + This operation is guaranteed to not leave the intermediate value + available for attack before it is re-signed. + + Do not pass a null pointer to this function. A null pointer + will not successfully authenticate. + + This operation traps if the authentication fails. */ +#define ptrauth_auth_and_resign(__value, __old_key, __old_data, __new_key, \ + __new_data) \ + __builtin_ptrauth_auth_and_resign(__value, __old_key, __old_data, __new_key, \ + __new_data) + +/* Authenticate a pointer using one scheme and resign it as a C + function pointer. + + If the result is subsequently authenticated using the new scheme, that + authentication is guaranteed to fail if and only if the initial + authentication failed. + + The value must be an expression of function pointer type. + The key must be a constant expression of type ptrauth_key. + The extra data must be an expression of pointer or integer type; + if an integer, it will be coerced to ptrauth_extra_data_t. + The result will have the same type as the original value. + + This operation is guaranteed to not leave the intermediate value + available for attack before it is re-signed. Additionally, if this + expression is used syntactically as the function expression in a + call, only a single authentication will be performed. */ +#define ptrauth_auth_function(__value, __old_key, __old_data) \ + ptrauth_auth_and_resign(__value, __old_key, __old_data, \ + ptrauth_key_function_pointer, 0) + +/* Authenticate a data pointer. + + The value must be an expression of non-function pointer type. + The key must be a constant expression of type ptrauth_key. + The extra data must be an expression of pointer or integer type; + if an integer, it will be coerced to ptrauth_extra_data_t. + The result will have the same type as the original value. + + This operation traps if the authentication fails. */ +#define ptrauth_auth_data(__value, __old_key, __old_data) \ + __builtin_ptrauth_auth(__value, __old_key, __old_data) + +/* Compute a constant discriminator from the given string. + + The argument must be a string literal of char character type. The result + has type ptrauth_extra_data_t. + + The result value is never zero and always within range for both the + __ptrauth qualifier and ptrauth_blend_discriminator. + + This can be used in constant expressions. +*/ +#define ptrauth_string_discriminator(__string) \ + __builtin_ptrauth_string_discriminator(__string) + +/* Compute a constant discriminator from the given type. + + The result can be used as the second argument to + ptrauth_blend_discriminator or the third argument to the + __ptrauth qualifier. It has type size_t. + + If the type is a C++ member function pointer type, the result is + the discriminator used to signed member function pointers of that + type. If the type is a function, function pointer, or function + reference type, the result is the discriminator used to sign + functions of that type. It is ill-formed to use this macro with any + other type. + + A call to this function is an integer constant expression. */ +#define ptrauth_type_discriminator(__type) \ + __builtin_ptrauth_type_discriminator(__type) + +/* Compute a signature for the given pair of pointer-sized values. + The order of the arguments is significant. + + Like a pointer signature, the resulting signature depends on + private key data and therefore should not be reliably reproducible + by attackers. That means that this can be used to validate the + integrity of arbitrary data by storing a signature for that data + alongside it, then checking that the signature is still valid later. + Data which exceeds two pointers in size can be signed by either + computing a tree of generic signatures or just signing an ordinary + cryptographic hash of the data. + + The result has type ptrauth_generic_signature_t. However, it may + not have as many bits of entropy as that type's width would suggest; + some implementations are known to compute a compressed signature as + if the arguments were a pointer and a discriminator. + + The arguments must be either pointers or integers; if integers, they + will be coerce to uintptr_t. */ +#define ptrauth_sign_generic_data(__value, __data) \ + __builtin_ptrauth_sign_generic_data(__value, __data) + +/* C++ vtable pointer signing class attribute */ +#define ptrauth_cxx_vtable_pointer(key, address_discrimination, \ + extra_discrimination...) \ + [[clang::ptrauth_vtable_pointer(key, address_discrimination, \ + extra_discrimination)]] + +#else + +#define ptrauth_strip(__value, __key) \ + ({ \ + (void)__key; \ + __value; \ + }) + +#define ptrauth_blend_discriminator(__pointer, __integer) \ + ({ \ + (void)__pointer; \ + (void)__integer; \ + ((ptrauth_extra_data_t)0); \ + }) + +#define ptrauth_sign_constant(__value, __key, __data) \ + ({ \ + (void)__key; \ + (void)__data; \ + __value; \ + }) + +#define ptrauth_sign_unauthenticated(__value, __key, __data) \ + ({ \ + (void)__key; \ + (void)__data; \ + __value; \ + }) + +#define ptrauth_auth_and_resign(__value, __old_key, __old_data, __new_key, \ + __new_data) \ + ({ \ + (void)__old_key; \ + (void)__old_data; \ + (void)__new_key; \ + (void)__new_data; \ + __value; \ + }) + +#define ptrauth_auth_function(__value, __old_key, __old_data) \ + ({ \ + (void)__old_key; \ + (void)__old_data; \ + __value; \ + }) + +#define ptrauth_auth_data(__value, __old_key, __old_data) \ + ({ \ + (void)__old_key; \ + (void)__old_data; \ + __value; \ + }) + +#define ptrauth_string_discriminator(__string) \ + ({ \ + (void)__string; \ + ((ptrauth_extra_data_t)0); \ + }) + +#define ptrauth_type_discriminator(__type) ((ptrauth_extra_data_t)0) + +#define ptrauth_sign_generic_data(__value, __data) \ + ({ \ + (void)__value; \ + (void)__data; \ + ((ptrauth_generic_signature_t)0); \ + }) + + +#define ptrauth_cxx_vtable_pointer(key, address_discrimination, \ + extra_discrimination...) + +#endif /* __has_feature(ptrauth_intrinsics) */ + +#endif /* __PTRAUTH_H */ diff --git a/llvm/lib/clang/19/include/ptwriteintrin.h b/llvm/lib/clang/19/include/ptwriteintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..0a04f7c1dfc404607e5eff99d048c082a8f7e24d --- /dev/null +++ b/llvm/lib/clang/19/include/ptwriteintrin.h @@ -0,0 +1,37 @@ +/*===------------ ptwriteintrin.h - PTWRITE intrinsic --------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __PTWRITEINTRIN_H +#define __PTWRITEINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("ptwrite"))) + +static __inline__ void __DEFAULT_FN_ATTRS +_ptwrite32(unsigned int __value) { + __builtin_ia32_ptwrite32(__value); +} + +#ifdef __x86_64__ + +static __inline__ void __DEFAULT_FN_ATTRS +_ptwrite64(unsigned long long __value) { + __builtin_ia32_ptwrite64(__value); +} + +#endif /* __x86_64__ */ + +#undef __DEFAULT_FN_ATTRS + +#endif /* __PTWRITEINTRIN_H */ diff --git a/llvm/lib/clang/19/include/raointintrin.h b/llvm/lib/clang/19/include/raointintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..d3290eb62abf8c0bbf5bc1929bad4854fa8b4275 --- /dev/null +++ b/llvm/lib/clang/19/include/raointintrin.h @@ -0,0 +1,203 @@ +/*===----------------------- raointintrin.h - RAOINT ------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86GPRINTRIN_H +#error "Never use directly; include instead." +#endif // __X86GPRINTRIN_H + +#ifndef __RAOINTINTRIN_H +#define __RAOINTINTRIN_H + +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("raoint"))) + +/// Atomically add a 32-bit value at memory operand \a __A and a 32-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AADD instruction. +/// +/// \param __A +/// A pointer to a 32-bit memory location. +/// \param __B +/// A 32-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+31:__A] := MEM[__A+31:__A] + __B[31:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _aadd_i32(int *__A, int __B) { + __builtin_ia32_aadd32((int *)__A, __B); +} + +/// Atomically and a 32-bit value at memory operand \a __A and a 32-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AAND instruction. +/// +/// \param __A +/// A pointer to a 32-bit memory location. +/// \param __B +/// A 32-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+31:__A] := MEM[__A+31:__A] AND __B[31:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _aand_i32(int *__A, int __B) { + __builtin_ia32_aand32((int *)__A, __B); +} + +/// Atomically or a 32-bit value at memory operand \a __A and a 32-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AOR instruction. +/// +/// \param __A +/// A pointer to a 32-bit memory location. +/// \param __B +/// A 32-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+31:__A] := MEM[__A+31:__A] OR __B[31:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _aor_i32(int *__A, int __B) { + __builtin_ia32_aor32((int *)__A, __B); +} + +/// Atomically xor a 32-bit value at memory operand \a __A and a 32-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AXOR instruction. +/// +/// \param __A +/// A pointer to a 32-bit memory location. +/// \param __B +/// A 32-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+31:__A] := MEM[__A+31:__A] XOR __B[31:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _axor_i32(int *__A, int __B) { + __builtin_ia32_axor32((int *)__A, __B); +} + +#ifdef __x86_64__ +/// Atomically add a 64-bit value at memory operand \a __A and a 64-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AADD instruction. +/// +/// \param __A +/// A pointer to a 64-bit memory location. +/// \param __B +/// A 64-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+63:__A] := MEM[__A+63:__A] + __B[63:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _aadd_i64(long long *__A, + long long __B) { + __builtin_ia32_aadd64((long long *)__A, __B); +} + +/// Atomically and a 64-bit value at memory operand \a __A and a 64-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AAND instruction. +/// +/// \param __A +/// A pointer to a 64-bit memory location. +/// \param __B +/// A 64-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+63:__A] := MEM[__A+63:__A] AND __B[63:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _aand_i64(long long *__A, + long long __B) { + __builtin_ia32_aand64((long long *)__A, __B); +} + +/// Atomically or a 64-bit value at memory operand \a __A and a 64-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AOR instruction. +/// +/// \param __A +/// A pointer to a 64-bit memory location. +/// \param __B +/// A 64-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+63:__A] := MEM[__A+63:__A] OR __B[63:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _aor_i64(long long *__A, + long long __B) { + __builtin_ia32_aor64((long long *)__A, __B); +} + +/// Atomically xor a 64-bit value at memory operand \a __A and a 64-bit \a __B, +/// and store the result to the same memory location. +/// +/// This intrinsic should be used for contention or weak ordering. It may +/// result in bad performance for hot data used by single thread only. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c AXOR instruction. +/// +/// \param __A +/// A pointer to a 64-bit memory location. +/// \param __B +/// A 64-bit integer value. +/// +/// \code{.operation} +/// MEM[__A+63:__A] := MEM[__A+63:__A] XOR __B[63:0] +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS _axor_i64(long long *__A, + long long __B) { + __builtin_ia32_axor64((long long *)__A, __B); +} +#endif // __x86_64__ + +#undef __DEFAULT_FN_ATTRS +#endif // __RAOINTINTRIN_H diff --git a/llvm/lib/clang/19/include/rdpruintrin.h b/llvm/lib/clang/19/include/rdpruintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..89732bb8b3cf1128edbae7ec060a197f1c45d111 --- /dev/null +++ b/llvm/lib/clang/19/include/rdpruintrin.h @@ -0,0 +1,57 @@ +/*===---- rdpruintrin.h - RDPRU intrinsics ---------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __RDPRUINTRIN_H +#define __RDPRUINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("rdpru"))) + + +/// Reads the content of a processor register. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the RDPRU instruction. +/// +/// \param reg_id +/// A processor register identifier. +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__rdpru (int reg_id) +{ + return __builtin_ia32_rdpru(reg_id); +} + +#define __RDPRU_MPERF 0 +#define __RDPRU_APERF 1 + +/// Reads the content of processor register MPERF. +/// +/// \headerfile +/// +/// This intrinsic generates instruction RDPRU to read the value of +/// register MPERF. +#define __mperf() __builtin_ia32_rdpru(__RDPRU_MPERF) + +/// Reads the content of processor register APERF. +/// +/// \headerfile +/// +/// This intrinsic generates instruction RDPRU to read the value of +/// register APERF. +#define __aperf() __builtin_ia32_rdpru(__RDPRU_APERF) + +#undef __DEFAULT_FN_ATTRS + +#endif /* __RDPRUINTRIN_H */ diff --git a/llvm/lib/clang/19/include/rdseedintrin.h b/llvm/lib/clang/19/include/rdseedintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..8a4fe093055b2f97a1b06f79244d9bf53c21c60f --- /dev/null +++ b/llvm/lib/clang/19/include/rdseedintrin.h @@ -0,0 +1,105 @@ +/*===---- rdseedintrin.h - RDSEED intrinsics -------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __RDSEEDINTRIN_H +#define __RDSEEDINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rdseed"))) + +/// Stores a hardware-generated 16-bit random value in the memory at \a __p. +/// +/// The random number generator complies with NIST SP800-90B and SP800-90C. +/// +/// \code{.operation} +/// IF HW_NRND_GEN.ready == 1 +/// Store16(__p, HW_NRND_GEN.data) +/// result := 1 +/// ELSE +/// Store16(__p, 0) +/// result := 0 +/// END +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c RDSEED instruction. +/// +/// \param __p +/// Pointer to memory for storing the 16-bit random number. +/// \returns 1 if a random number was generated, 0 if not. +static __inline__ int __DEFAULT_FN_ATTRS +_rdseed16_step(unsigned short *__p) +{ + return (int) __builtin_ia32_rdseed16_step(__p); +} + +/// Stores a hardware-generated 32-bit random value in the memory at \a __p. +/// +/// The random number generator complies with NIST SP800-90B and SP800-90C. +/// +/// \code{.operation} +/// IF HW_NRND_GEN.ready == 1 +/// Store32(__p, HW_NRND_GEN.data) +/// result := 1 +/// ELSE +/// Store32(__p, 0) +/// result := 0 +/// END +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c RDSEED instruction. +/// +/// \param __p +/// Pointer to memory for storing the 32-bit random number. +/// \returns 1 if a random number was generated, 0 if not. +static __inline__ int __DEFAULT_FN_ATTRS +_rdseed32_step(unsigned int *__p) +{ + return (int) __builtin_ia32_rdseed32_step(__p); +} + +#ifdef __x86_64__ +/// Stores a hardware-generated 64-bit random value in the memory at \a __p. +/// +/// The random number generator complies with NIST SP800-90B and SP800-90C. +/// +/// \code{.operation} +/// IF HW_NRND_GEN.ready == 1 +/// Store64(__p, HW_NRND_GEN.data) +/// result := 1 +/// ELSE +/// Store64(__p, 0) +/// result := 0 +/// END +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c RDSEED instruction. +/// +/// \param __p +/// Pointer to memory for storing the 64-bit random number. +/// \returns 1 if a random number was generated, 0 if not. +static __inline__ int __DEFAULT_FN_ATTRS +_rdseed64_step(unsigned long long *__p) +{ + return (int) __builtin_ia32_rdseed64_step(__p); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif /* __RDSEEDINTRIN_H */ diff --git a/llvm/lib/clang/19/include/riscv_bitmanip.h b/llvm/lib/clang/19/include/riscv_bitmanip.h new file mode 100644 index 0000000000000000000000000000000000000000..2bc7ee022a96bdf22729911982a004c91183008f --- /dev/null +++ b/llvm/lib/clang/19/include/riscv_bitmanip.h @@ -0,0 +1,195 @@ +/*===---- riscv_bitmanip.h - RISC-V Zb* intrinsics --------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __RISCV_BITMANIP_H +#define __RISCV_BITMANIP_H + +#include + +#if defined(__cplusplus) +extern "C" { +#endif + +#if defined(__riscv_zbb) +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_orc_b_32(uint32_t __x) { + return __builtin_riscv_orc_b_32(__x); +} + +static __inline__ unsigned __attribute__((__always_inline__, __nodebug__)) +__riscv_clz_32(uint32_t __x) { + return __builtin_riscv_clz_32(__x); +} + +static __inline__ unsigned __attribute__((__always_inline__, __nodebug__)) +__riscv_ctz_32(uint32_t __x) { + return __builtin_riscv_ctz_32(__x); +} + +static __inline__ unsigned __attribute__((__always_inline__, __nodebug__)) +__riscv_cpop_32(uint32_t __x) { + return __builtin_popcount(__x); +} + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_orc_b_64(uint64_t __x) { + return __builtin_riscv_orc_b_64(__x); +} + +static __inline__ unsigned __attribute__((__always_inline__, __nodebug__)) +__riscv_clz_64(uint64_t __x) { + return __builtin_riscv_clz_64(__x); +} + +static __inline__ unsigned __attribute__((__always_inline__, __nodebug__)) +__riscv_ctz_64(uint64_t __x) { + return __builtin_riscv_ctz_64(__x); +} + +static __inline__ unsigned __attribute__((__always_inline__, __nodebug__)) +__riscv_cpop_64(uint64_t __x) { + return __builtin_popcountll(__x); +} +#endif +#endif // defined(__riscv_zbb) + +#if defined(__riscv_zbb) || defined(__riscv_zbkb) +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_rev8_32(uint32_t __x) { + return __builtin_bswap32(__x); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_rol_32(uint32_t __x, uint32_t __y) { + return __builtin_rotateleft32(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_ror_32(uint32_t __x, uint32_t __y) { + return __builtin_rotateright32(__x, __y); +} + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_rev8_64(uint64_t __x) { + return __builtin_bswap64(__x); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_rol_64(uint64_t __x, uint32_t __y) { + return __builtin_rotateleft64(__x, __y); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_ror_64(uint64_t __x, uint32_t __y) { + return __builtin_rotateright64(__x, __y); +} +#endif +#endif // defined(__riscv_zbb) || defined(__riscv_zbkb) + +#if defined(__riscv_zbkb) +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_brev8_32(uint32_t __x) { + return __builtin_riscv_brev8_32(__x); +} + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_brev8_64(uint64_t __x) { + return __builtin_riscv_brev8_64(__x); +} +#endif + +#if __riscv_xlen == 32 +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_unzip_32(uint32_t __x) { + return __builtin_riscv_unzip_32(__x); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_zip_32(uint32_t __x) { + return __builtin_riscv_zip_32(__x); +} +#endif +#endif // defined(__riscv_zbkb) + +#if defined(__riscv_zbc) +#if __riscv_xlen == 32 +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_clmulr_32(uint32_t __x, uint32_t __y) { + return __builtin_riscv_clmulr_32(__x, __y); +} +#endif + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_clmulr_64(uint64_t __x, uint64_t __y) { + return __builtin_riscv_clmulr_64(__x, __y); +} +#endif +#endif // defined(__riscv_zbc) + +#if defined(__riscv_zbkc) || defined(__riscv_zbc) +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_clmul_32(uint32_t __x, uint32_t __y) { + return __builtin_riscv_clmul_32(__x, __y); +} + +#if __riscv_xlen == 32 +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_clmulh_32(uint32_t __x, uint32_t __y) { + return __builtin_riscv_clmulh_32(__x, __y); +} +#endif + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_clmul_64(uint64_t __x, uint64_t __y) { + return __builtin_riscv_clmul_64(__x, __y); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_clmulh_64(uint64_t __x, uint64_t __y) { + return __builtin_riscv_clmulh_64(__x, __y); +} +#endif +#endif // defined(__riscv_zbkc) || defined(__riscv_zbc) + +#if defined(__riscv_zbkx) +#if __riscv_xlen == 32 +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_xperm4_32(uint32_t __x, uint32_t __y) { + return __builtin_riscv_xperm4_32(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_xperm8_32(uint32_t __x, uint32_t __y) { + return __builtin_riscv_xperm8_32(__x, __y); +} +#endif + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_xperm4_64(uint64_t __x, uint64_t __y) { + return __builtin_riscv_xperm4_64(__x, __y); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_xperm8_64(uint64_t __x, uint64_t __y) { + return __builtin_riscv_xperm8_64(__x, __y); +} +#endif +#endif // defined(__riscv_zbkx) + +#if defined(__cplusplus) +} +#endif + +#endif diff --git a/llvm/lib/clang/19/include/riscv_crypto.h b/llvm/lib/clang/19/include/riscv_crypto.h new file mode 100644 index 0000000000000000000000000000000000000000..7cd2a708f5575635ef9273921ef842ef3f05e1aa --- /dev/null +++ b/llvm/lib/clang/19/include/riscv_crypto.h @@ -0,0 +1,170 @@ +/*===---- riscv_crypto.h - RISC-V Zk* intrinsics ---------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __RISCV_CRYPTO_H +#define __RISCV_CRYPTO_H + +#include + +#if defined(__cplusplus) +extern "C" { +#endif + +#if defined(__riscv_zknd) +#if __riscv_xlen == 32 +#define __riscv_aes32dsi(x, y, bs) __builtin_riscv_aes32dsi(x, y, bs) +#define __riscv_aes32dsmi(x, y, bs) __builtin_riscv_aes32dsmi(x, y, bs) +#endif + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_aes64ds(uint64_t __x, uint64_t __y) { + return __builtin_riscv_aes64ds(__x, __y); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_aes64dsm(uint64_t __x, uint64_t __y) { + return __builtin_riscv_aes64dsm(__x, __y); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_aes64im(uint64_t __x) { + return __builtin_riscv_aes64im(__x); +} +#endif +#endif // defined(__riscv_zknd) + +#if defined(__riscv_zkne) +#if __riscv_xlen == 32 +#define __riscv_aes32esi(x, y, bs) __builtin_riscv_aes32esi(x, y, bs) +#define __riscv_aes32esmi(x, y, bs) __builtin_riscv_aes32esmi(x, y, bs) +#endif + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_aes64es(uint64_t __x, uint64_t __y) { + return __builtin_riscv_aes64es(__x, __y); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_aes64esm(uint64_t __x, uint64_t __y) { + return __builtin_riscv_aes64esm(__x, __y); +} +#endif +#endif // defined(__riscv_zkne) + +#if defined(__riscv_zknd) || defined(__riscv_zkne) +#if __riscv_xlen == 64 +#define __riscv_aes64ks1i(x, rnum) __builtin_riscv_aes64ks1i(x, rnum) + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_aes64ks2(uint64_t __x, uint64_t __y) { + return __builtin_riscv_aes64ks2(__x, __y); +} +#endif +#endif // defined(__riscv_zknd) || defined(__riscv_zkne) + +#if defined(__riscv_zknh) +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha256sig0(uint32_t __x) { + return __builtin_riscv_sha256sig0(__x); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha256sig1(uint32_t __x) { + return __builtin_riscv_sha256sig1(__x); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha256sum0(uint32_t __x) { + return __builtin_riscv_sha256sum0(__x); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha256sum1(uint32_t __x) { + return __builtin_riscv_sha256sum1(__x); +} + +#if __riscv_xlen == 32 +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sig0h(uint32_t __x, uint32_t __y) { + return __builtin_riscv_sha512sig0h(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sig0l(uint32_t __x, uint32_t __y) { + return __builtin_riscv_sha512sig0l(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sig1h(uint32_t __x, uint32_t __y) { + return __builtin_riscv_sha512sig1h(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sig1l(uint32_t __x, uint32_t __y) { + return __builtin_riscv_sha512sig1l(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sum0r(uint32_t __x, uint32_t __y) { + return __builtin_riscv_sha512sum0r(__x, __y); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sum1r(uint32_t __x, uint32_t __y) { + return __builtin_riscv_sha512sum1r(__x, __y); +} +#endif + +#if __riscv_xlen == 64 +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sig0(uint64_t __x) { + return __builtin_riscv_sha512sig0(__x); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sig1(uint64_t __x) { + return __builtin_riscv_sha512sig1(__x); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sum0(uint64_t __x) { + return __builtin_riscv_sha512sum0(__x); +} + +static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sha512sum1(uint64_t __x) { + return __builtin_riscv_sha512sum1(__x); +} +#endif +#endif // defined(__riscv_zknh) + +#if defined(__riscv_zksh) +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sm3p0(uint32_t __x) { + return __builtin_riscv_sm3p0(__x); +} + +static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) +__riscv_sm3p1(uint32_t __x) { + return __builtin_riscv_sm3p1(__x); +} +#endif // defined(__riscv_zksh) + +#if defined(__riscv_zksed) +#define __riscv_sm4ed(x, y, bs) __builtin_riscv_sm4ed(x, y, bs); +#define __riscv_sm4ks(x, y, bs) __builtin_riscv_sm4ks(x, y, bs); +#endif // defined(__riscv_zksed) + +#if defined(__cplusplus) +} +#endif + +#endif diff --git a/llvm/lib/clang/19/include/riscv_ntlh.h b/llvm/lib/clang/19/include/riscv_ntlh.h new file mode 100644 index 0000000000000000000000000000000000000000..c92e580a0a63171cdb9949ee47432592c4eae73b --- /dev/null +++ b/llvm/lib/clang/19/include/riscv_ntlh.h @@ -0,0 +1,26 @@ +/*===---- riscv_ntlh.h - RISC-V NTLH intrinsics ----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __RISCV_NTLH_H +#define __RISCV_NTLH_H + +#ifndef __riscv_zihintntl +#error "NTLH intrinsics require the NTLH extension." +#endif + +enum { + __RISCV_NTLH_INNERMOST_PRIVATE = 2, + __RISCV_NTLH_ALL_PRIVATE, + __RISCV_NTLH_INNERMOST_SHARED, + __RISCV_NTLH_ALL +}; + +#define __riscv_ntl_load __builtin_riscv_ntl_load +#define __riscv_ntl_store __builtin_riscv_ntl_store +#endif diff --git a/llvm/lib/clang/19/include/rtmintrin.h b/llvm/lib/clang/19/include/rtmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..a3ec81e3f7402e4018521509374e89a9c4bc8dc5 --- /dev/null +++ b/llvm/lib/clang/19/include/rtmintrin.h @@ -0,0 +1,45 @@ +/*===---- rtmintrin.h - RTM intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __RTMINTRIN_H +#define __RTMINTRIN_H + +#define _XBEGIN_STARTED (~0u) +#define _XABORT_EXPLICIT (1 << 0) +#define _XABORT_RETRY (1 << 1) +#define _XABORT_CONFLICT (1 << 2) +#define _XABORT_CAPACITY (1 << 3) +#define _XABORT_DEBUG (1 << 4) +#define _XABORT_NESTED (1 << 5) +#define _XABORT_CODE(x) (((x) >> 24) & 0xFF) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rtm"))) + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +_xbegin(void) +{ + return (unsigned int)__builtin_ia32_xbegin(); +} + +static __inline__ void __DEFAULT_FN_ATTRS +_xend(void) +{ + __builtin_ia32_xend(); +} + +#define _xabort(imm) __builtin_ia32_xabort((imm)) + +#undef __DEFAULT_FN_ATTRS + +#endif /* __RTMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/s390intrin.h b/llvm/lib/clang/19/include/s390intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..73a915c23319b0b03b06ff2f314f584de992b823 --- /dev/null +++ b/llvm/lib/clang/19/include/s390intrin.h @@ -0,0 +1,25 @@ +/*===---- s390intrin.h - SystemZ intrinsics --------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __S390INTRIN_H +#define __S390INTRIN_H + +#ifndef __s390__ +#error " is for s390 only" +#endif + +#ifdef __HTM__ +#include +#endif + +#ifdef __VEC__ +#include +#endif + +#endif /* __S390INTRIN_H*/ diff --git a/llvm/lib/clang/19/include/sanitizer/allocator_interface.h b/llvm/lib/clang/19/include/sanitizer/allocator_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..1696a92681e3595d9c71f49cb1bcd6d2197516bc --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/allocator_interface.h @@ -0,0 +1,106 @@ +//===-- allocator_interface.h ---------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// Public interface header for allocator used in sanitizers (ASan/TSan/MSan). +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_ALLOCATOR_INTERFACE_H +#define SANITIZER_ALLOCATOR_INTERFACE_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif +/* Returns the estimated number of bytes that will be reserved by allocator + for request of "size" bytes. If allocator can't allocate that much + memory, returns the maximal possible allocation size, otherwise returns + "size". */ +size_t SANITIZER_CDECL __sanitizer_get_estimated_allocated_size(size_t size); + +/* Returns true if p was returned by the allocator and + is not yet freed. */ +int SANITIZER_CDECL __sanitizer_get_ownership(const volatile void *p); + +/* If a pointer lies within an allocation, it will return the start address + of the allocation. Otherwise, it returns nullptr. */ +const void *SANITIZER_CDECL __sanitizer_get_allocated_begin(const void *p); + +/* Returns the number of bytes reserved for the pointer p. + Requires (get_ownership(p) == true) or (p == 0). */ +size_t SANITIZER_CDECL __sanitizer_get_allocated_size(const volatile void *p); + +/* Returns the number of bytes reserved for the pointer p. + Requires __sanitizer_get_allocated_begin(p) == p. */ +size_t SANITIZER_CDECL +__sanitizer_get_allocated_size_fast(const volatile void *p); + +/* Number of bytes, allocated and not yet freed by the application. */ +size_t SANITIZER_CDECL __sanitizer_get_current_allocated_bytes(void); + +/* Number of bytes, mmaped by the allocator to fulfill allocation requests. + Generally, for request of X bytes, allocator can reserve and add to free + lists a large number of chunks of size X to use them for future requests. + All these chunks count toward the heap size. Currently, allocator never + releases memory to OS (instead, it just puts freed chunks to free + lists). */ +size_t SANITIZER_CDECL __sanitizer_get_heap_size(void); + +/* Number of bytes, mmaped by the allocator, which can be used to fulfill + allocation requests. When a user program frees memory chunk, it can first + fall into quarantine and will count toward __sanitizer_get_free_bytes() + later. */ +size_t SANITIZER_CDECL __sanitizer_get_free_bytes(void); + +/* Number of bytes in unmapped pages, that are released to OS. Currently, + always returns 0. */ +size_t SANITIZER_CDECL __sanitizer_get_unmapped_bytes(void); + +/* Malloc hooks that may be optionally provided by user. + - __sanitizer_malloc_hook(ptr, size) is called immediately after allocation + of "size" bytes, which returned "ptr". + - __sanitizer_free_hook(ptr) is called immediately before deallocation of + "ptr". + - __sanitizer_ignore_free_hook(ptr) is called immediately before deallocation + of "ptr", and if it returns a non-zero value, the deallocation of "ptr" + will not take place. This allows software to make free a no-op until it + calls free() again in the same pointer at a later time. Hint: read this as + "ignore the free" rather than "ignore the hook". +*/ +void SANITIZER_CDECL __sanitizer_malloc_hook(const volatile void *ptr, + size_t size); +void SANITIZER_CDECL __sanitizer_free_hook(const volatile void *ptr); +int SANITIZER_CDECL __sanitizer_ignore_free_hook(const volatile void *ptr); + +/* Installs a pair of hooks for malloc/free. + Several (currently, 5) hook pairs may be installed, they are executed + in the order they were installed and after calling + __sanitizer_malloc_hook/__sanitizer_free_hook. + Unlike __sanitizer_malloc_hook/__sanitizer_free_hook these hooks can be + chained and do not rely on weak symbols working on the platform, but + require __sanitizer_install_malloc_and_free_hooks to be called at startup + and thus will not be called on malloc/free very early in the process. + Returns the number of hooks currently installed or 0 on failure. + Not thread-safe, should be called in the main thread before starting + other threads. +*/ +int SANITIZER_CDECL __sanitizer_install_malloc_and_free_hooks( + void(SANITIZER_CDECL *malloc_hook)(const volatile void *, size_t), + void(SANITIZER_CDECL *free_hook)(const volatile void *)); + +/* Drains allocator quarantines (calling thread's and global ones), returns + freed memory back to OS and releases other non-essential internal allocator + resources in attempt to reduce process RSS. + Currently available with ASan only. +*/ +void SANITIZER_CDECL __sanitizer_purge_allocator(void); +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/llvm/lib/clang/19/include/sanitizer/asan_interface.h b/llvm/lib/clang/19/include/sanitizer/asan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..37b6d08f4db193ccaa0b892f79c2ff60a7304fbb --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/asan_interface.h @@ -0,0 +1,340 @@ +//===-- sanitizer/asan_interface.h ------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of AddressSanitizer (ASan). +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_ASAN_INTERFACE_H +#define SANITIZER_ASAN_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif +/// Marks a memory region ([addr, addr+size)) as unaddressable. +/// +/// This memory must be previously allocated by your program. Instrumented +/// code is forbidden from accessing addresses in this region until it is +/// unpoisoned. This function is not guaranteed to poison the entire region - +/// it could poison only a subregion of [addr, addr+size) due to ASan +/// alignment restrictions. +/// +/// \note This function is not thread-safe because no two threads can poison or +/// unpoison memory in the same memory region simultaneously. +/// +/// \param addr Start of memory region. +/// \param size Size of memory region. +void SANITIZER_CDECL __asan_poison_memory_region(void const volatile *addr, + size_t size); + +/// Marks a memory region ([addr, addr+size)) as addressable. +/// +/// This memory must be previously allocated by your program. Accessing +/// addresses in this region is allowed until this region is poisoned again. +/// This function could unpoison a super-region of [addr, addr+size) due +/// to ASan alignment restrictions. +/// +/// \note This function is not thread-safe because no two threads can +/// poison or unpoison memory in the same memory region simultaneously. +/// +/// \param addr Start of memory region. +/// \param size Size of memory region. +void SANITIZER_CDECL __asan_unpoison_memory_region(void const volatile *addr, + size_t size); + +// Macros provided for convenience. +#ifdef __has_feature +#if __has_feature(address_sanitizer) +#define ASAN_DEFINE_REGION_MACROS +#endif +#elif defined(__SANITIZE_ADDRESS__) +#define ASAN_DEFINE_REGION_MACROS +#endif + +#ifdef ASAN_DEFINE_REGION_MACROS +/// Marks a memory region as unaddressable. +/// +/// \note Macro provided for convenience; defined as a no-op if ASan is not +/// enabled. +/// +/// \param addr Start of memory region. +/// \param size Size of memory region. +#define ASAN_POISON_MEMORY_REGION(addr, size) \ + __asan_poison_memory_region((addr), (size)) + +/// Marks a memory region as addressable. +/// +/// \note Macro provided for convenience; defined as a no-op if ASan is not +/// enabled. +/// +/// \param addr Start of memory region. +/// \param size Size of memory region. +#define ASAN_UNPOISON_MEMORY_REGION(addr, size) \ + __asan_unpoison_memory_region((addr), (size)) +#else +#define ASAN_POISON_MEMORY_REGION(addr, size) ((void)(addr), (void)(size)) +#define ASAN_UNPOISON_MEMORY_REGION(addr, size) ((void)(addr), (void)(size)) +#endif +#undef ASAN_DEFINE_REGION_MACROS + +/// Checks if an address is poisoned. +/// +/// Returns 1 if addr is poisoned (that is, 1-byte read/write +/// access to this address would result in an error report from ASan). +/// Otherwise returns 0. +/// +/// \param addr Address to check. +/// +/// \retval 1 Address is poisoned. +/// \retval 0 Address is not poisoned. +int SANITIZER_CDECL __asan_address_is_poisoned(void const volatile *addr); + +/// Checks if a region is poisoned. +/// +/// If at least one byte in [beg, beg+size) is poisoned, returns the +/// address of the first such byte. Otherwise returns 0. +/// +/// \param beg Start of memory region. +/// \param size Start of memory region. +/// \returns Address of first poisoned byte. +void *SANITIZER_CDECL __asan_region_is_poisoned(void *beg, size_t size); + +/// Describes an address (useful for calling from the debugger). +/// +/// Prints the description of addr. +/// +/// \param addr Address to describe. +void SANITIZER_CDECL __asan_describe_address(void *addr); + +/// Checks if an error has been or is being reported (useful for calling from +/// the debugger to get information about an ASan error). +/// +/// Returns 1 if an error has been (or is being) reported. Otherwise returns 0. +/// +/// \returns 1 if an error has been (or is being) reported. Otherwise returns +/// 0. +int SANITIZER_CDECL __asan_report_present(void); + +/// Gets the PC (program counter) register value of an ASan error (useful for +/// calling from the debugger). +/// +/// Returns PC if an error has been (or is being) reported. +/// Otherwise returns 0. +/// +/// \returns PC value. +void *SANITIZER_CDECL __asan_get_report_pc(void); + +/// Gets the BP (base pointer) register value of an ASan error (useful for +/// calling from the debugger). +/// +/// Returns BP if an error has been (or is being) reported. +/// Otherwise returns 0. +/// +/// \returns BP value. +void *SANITIZER_CDECL __asan_get_report_bp(void); + +/// Gets the SP (stack pointer) register value of an ASan error (useful for +/// calling from the debugger). +/// +/// If an error has been (or is being) reported, returns SP. +/// Otherwise returns 0. +/// +/// \returns SP value. +void *SANITIZER_CDECL __asan_get_report_sp(void); + +/// Gets the address of the report buffer of an ASan error (useful for calling +/// from the debugger). +/// +/// Returns the address of the report buffer if an error has been (or is being) +/// reported. Otherwise returns 0. +/// +/// \returns Address of report buffer. +void *SANITIZER_CDECL __asan_get_report_address(void); + +/// Gets access type of an ASan error (useful for calling from the debugger). +/// +/// Returns access type (read or write) if an error has been (or is being) +/// reported. Otherwise returns 0. +/// +/// \returns Access type (0 = read, 1 = write). +int SANITIZER_CDECL __asan_get_report_access_type(void); + +/// Gets access size of an ASan error (useful for calling from the debugger). +/// +/// Returns access size if an error has been (or is being) reported. Otherwise +/// returns 0. +/// +/// \returns Access size in bytes. +size_t SANITIZER_CDECL __asan_get_report_access_size(void); + +/// Gets the bug description of an ASan error (useful for calling from a +/// debugger). +/// +/// \returns Returns a bug description if an error has been (or is being) +/// reported - for example, "heap-use-after-free". Otherwise returns an empty +/// string. +const char *SANITIZER_CDECL __asan_get_report_description(void); + +/// Gets information about a pointer (useful for calling from the debugger). +/// +/// Returns the category of the given pointer as a constant string. +/// Possible return values are global, stack, stack-fake, +/// heap, heap-invalid, shadow-low, shadow-gap, +/// shadow-high, and unknown. +/// +/// If the return value is global or stack, tries to also return +/// the variable name, address, and size. If the return value is heap, +/// tries to return the chunk address and size. name should point +/// to an allocated buffer of size name_size. +/// +/// \param addr Address to locate. +/// \param name Buffer to store the variable's name. +/// \param name_size Size in bytes of the variable's name buffer. +/// \param[out] region_address Address of the region. +/// \param[out] region_size Size of the region in bytes. +/// +/// \returns Returns the category of the given pointer as a constant string. +const char *SANITIZER_CDECL __asan_locate_address(void *addr, char *name, + size_t name_size, + void **region_address, + size_t *region_size); + +/// Gets the allocation stack trace and thread ID for a heap address (useful +/// for calling from the debugger). +/// +/// Stores up to size frames in trace. Returns +/// the number of stored frames or 0 on error. +/// +/// \param addr A heap address. +/// \param trace A buffer to store the stack trace. +/// \param size Size in bytes of the trace buffer. +/// \param[out] thread_id The thread ID of the address. +/// +/// \returns Returns the number of stored frames or 0 on error. +size_t SANITIZER_CDECL __asan_get_alloc_stack(void *addr, void **trace, + size_t size, int *thread_id); + +/// Gets the free stack trace and thread ID for a heap address (useful for +/// calling from the debugger). +/// +/// Stores up to size frames in trace. Returns +/// the number of stored frames or 0 on error. +/// +/// \param addr A heap address. +/// \param trace A buffer to store the stack trace. +/// \param size Size in bytes of the trace buffer. +/// \param[out] thread_id The thread ID of the address. +/// +/// \returns Returns the number of stored frames or 0 on error. +size_t SANITIZER_CDECL __asan_get_free_stack(void *addr, void **trace, + size_t size, int *thread_id); + +/// Gets the current shadow memory mapping (useful for calling from the +/// debugger). +/// +/// \param[out] shadow_scale Shadow scale value. +/// \param[out] shadow_offset Offset value. +void SANITIZER_CDECL __asan_get_shadow_mapping(size_t *shadow_scale, + size_t *shadow_offset); + +/// This is an internal function that is called to report an error. However, +/// it is still a part of the interface because you might want to set a +/// breakpoint on this function in the debugger. +/// +/// \param pc pc value of the ASan error. +/// \param bp bp value of the ASan error. +/// \param sp sp value of the ASan error. +/// \param addr Address of the ASan error. +/// \param is_write True if the error is a write error; false otherwise. +/// \param access_size Size of the memory access of the ASan error. +void SANITIZER_CDECL __asan_report_error(void *pc, void *bp, void *sp, + void *addr, int is_write, + size_t access_size); + +// Deprecated. Call __sanitizer_set_death_callback instead. +void SANITIZER_CDECL __asan_set_death_callback(void (*callback)(void)); + +/// Sets the callback function to be called during ASan error reporting. +/// +/// The callback provides a string pointer to the report. +/// +/// \param callback User-provided function. +void SANITIZER_CDECL +__asan_set_error_report_callback(void (*callback)(const char *)); + +/// User-provided callback on ASan errors. +/// +/// You can provide a function that would be called immediately when ASan +/// detects an error. This is useful in cases when ASan detects an error but +/// your program crashes before the ASan report is printed. +void SANITIZER_CDECL __asan_on_error(void); + +/// Prints accumulated statistics to stderr (useful for calling from the +/// debugger). +void SANITIZER_CDECL __asan_print_accumulated_stats(void); + +/// User-provided default option settings. +/// +/// You can provide your own implementation of this function to return a string +/// containing ASan runtime options (for example, +/// verbosity=1:halt_on_error=0). +/// +/// \returns Default options string. +const char *SANITIZER_CDECL __asan_default_options(void); + +// The following two functions facilitate garbage collection in presence of +// ASan's fake stack. + +/// Gets an opaque handler to the current thread's fake stack. +/// +/// Returns an opaque handler to be used by +/// __asan_addr_is_in_fake_stack(). Returns NULL if the current thread +/// does not have a fake stack. +/// +/// \returns An opaque handler to the fake stack or NULL. +void *SANITIZER_CDECL __asan_get_current_fake_stack(void); + +/// Checks if an address belongs to a given fake stack. +/// +/// If fake_stack is non-NULL and addr belongs to a +/// fake frame in fake_stack, returns the address of the real +/// stack that corresponds to the fake frame and sets beg and +/// end to the boundaries of this fake frame. Otherwise returns +/// NULL and does not touch beg and end. +/// +/// If beg or end are NULL, they are not touched. +/// +/// \note This function can be called from a thread other than the owner of +/// fake_stack, but the owner thread needs to be alive. +/// +/// \param fake_stack An opaque handler to a fake stack. +/// \param addr Address to test. +/// \param[out] beg Beginning of fake frame. +/// \param[out] end End of fake frame. +/// \returns Stack address or NULL. +void *SANITIZER_CDECL __asan_addr_is_in_fake_stack(void *fake_stack, void *addr, + void **beg, void **end); + +/// Performs shadow memory cleanup of the current thread's stack before a +/// function marked with the [[noreturn]] attribute is called. +/// +/// To avoid false positives on the stack, must be called before no-return +/// functions like _exit() and execl(). +void SANITIZER_CDECL __asan_handle_no_return(void); + +/// Update allocation stack trace for the given allocation to the current stack +/// trace. Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __asan_update_allocation_context(void *addr); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_ASAN_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/common_interface_defs.h b/llvm/lib/clang/19/include/sanitizer/common_interface_defs.h new file mode 100644 index 0000000000000000000000000000000000000000..f9fce595b37bb89764d90b087313385df56a5146 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/common_interface_defs.h @@ -0,0 +1,455 @@ +//===-- sanitizer/common_interface_defs.h -----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// Common part of the public sanitizer interface. +//===----------------------------------------------------------------------===// + +#ifndef SANITIZER_COMMON_INTERFACE_DEFS_H +#define SANITIZER_COMMON_INTERFACE_DEFS_H + +#include +#include + +// Windows allows a user to set their default calling convention, but we always +// use __cdecl +#ifdef _WIN32 +#define SANITIZER_CDECL __cdecl +#else +#define SANITIZER_CDECL +#endif + +#ifdef __cplusplus +extern "C" { +#endif +// Arguments for __sanitizer_sandbox_on_notify() below. +typedef struct { + // Enable sandbox support in sanitizer coverage. + int coverage_sandboxed; + // File descriptor to write coverage data to. If -1 is passed, a file will + // be pre-opened by __sanitizer_sandbox_on_notify(). This field has no + // effect if coverage_sandboxed == 0. + intptr_t coverage_fd; + // If non-zero, split the coverage data into well-formed blocks. This is + // useful when coverage_fd is a socket descriptor. Each block will contain + // a header, allowing data from multiple processes to be sent over the same + // socket. + unsigned int coverage_max_block_size; +} __sanitizer_sandbox_arguments; + +// Tell the tools to write their reports to "path." instead of stderr. +void SANITIZER_CDECL __sanitizer_set_report_path(const char *path); +// Tell the tools to write their reports to the provided file descriptor +// (casted to void *). +void SANITIZER_CDECL __sanitizer_set_report_fd(void *fd); +// Get the current full report file path, if a path was specified by +// an earlier call to __sanitizer_set_report_path. Returns null otherwise. +const char *SANITIZER_CDECL __sanitizer_get_report_path(); + +// Notify the tools that the sandbox is going to be turned on. The reserved +// parameter will be used in the future to hold a structure with functions +// that the tools may call to bypass the sandbox. +void SANITIZER_CDECL +__sanitizer_sandbox_on_notify(__sanitizer_sandbox_arguments *args); + +// This function is called by the tool when it has just finished reporting +// an error. 'error_summary' is a one-line string that summarizes +// the error message. This function can be overridden by the client. +void SANITIZER_CDECL +__sanitizer_report_error_summary(const char *error_summary); + +// Some of the sanitizers (for example ASan/TSan) could miss bugs that happen +// in unaligned loads/stores. To find such bugs reliably, you need to replace +// plain unaligned loads/stores with these calls. + +/// Loads a 16-bit unaligned value. +// +/// \param p Pointer to unaligned memory. +/// +/// \returns Loaded value. +uint16_t SANITIZER_CDECL __sanitizer_unaligned_load16(const void *p); + +/// Loads a 32-bit unaligned value. +/// +/// \param p Pointer to unaligned memory. +/// +/// \returns Loaded value. +uint32_t SANITIZER_CDECL __sanitizer_unaligned_load32(const void *p); + +/// Loads a 64-bit unaligned value. +/// +/// \param p Pointer to unaligned memory. +/// +/// \returns Loaded value. +uint64_t SANITIZER_CDECL __sanitizer_unaligned_load64(const void *p); + +/// Stores a 16-bit unaligned value. +/// +/// \param p Pointer to unaligned memory. +/// \param x 16-bit value to store. +void SANITIZER_CDECL __sanitizer_unaligned_store16(void *p, uint16_t x); + +/// Stores a 32-bit unaligned value. +/// +/// \param p Pointer to unaligned memory. +/// \param x 32-bit value to store. +void SANITIZER_CDECL __sanitizer_unaligned_store32(void *p, uint32_t x); + +/// Stores a 64-bit unaligned value. +/// +/// \param p Pointer to unaligned memory. +/// \param x 64-bit value to store. +void SANITIZER_CDECL __sanitizer_unaligned_store64(void *p, uint64_t x); + +// Returns 1 on the first call, then returns 0 thereafter. Called by the tool +// to ensure only one report is printed when multiple errors occur +// simultaneously. +int SANITIZER_CDECL __sanitizer_acquire_crash_state(); + +/// Annotates the current state of a contiguous container, such as +/// std::vector, std::string, or similar. +/// +/// A contiguous container is a container that keeps all of its elements +/// in a contiguous region of memory. The container owns the region of memory +/// [beg, end); the memory [beg, mid) is used to store the +/// current elements, and the memory [mid, end) is reserved for future +/// elements (beg <= mid <= end). For example, in +/// std::vector<> v: +/// +/// \code +/// beg = &v[0]; +/// end = beg + v.capacity() * sizeof(v[0]); +/// mid = beg + v.size() * sizeof(v[0]); +/// \endcode +/// +/// This annotation tells the Sanitizer tool about the current state of the +/// container so that the tool can report errors when memory from +/// [mid, end) is accessed. Insert this annotation into methods like +/// push_back() or pop_back(). Supply the old and new values of +/// mid(old_mid and new_mid). In the initial +/// state mid == end, so that should be the final state when the +/// container is destroyed or when the container reallocates the storage. +/// +/// For ASan, beg no longer needs to be 8-aligned, +/// first and last granule may be shared with other objects +/// and therefore the function can be used for any allocator. +/// +/// The following example shows how to use the function: +/// +/// \code +/// int32_t x[3]; // 12 bytes +/// char *beg = (char*)&x[0]; +/// char *end = beg + 12; +/// __sanitizer_annotate_contiguous_container(beg, end, beg, end); +/// \endcode +/// +/// \note Use this function with caution and do not use for anything other +/// than vector-like classes. +/// \note Unaligned beg or end may miss bugs in +/// these granules. +/// +/// \param beg Beginning of memory region. +/// \param end End of memory region. +/// \param old_mid Old middle of memory region. +/// \param new_mid New middle of memory region. +void SANITIZER_CDECL __sanitizer_annotate_contiguous_container( + const void *beg, const void *end, const void *old_mid, const void *new_mid); + +/// Similar to __sanitizer_annotate_contiguous_container. +/// +/// Annotates the current state of a contiguous container memory, +/// such as std::deque's single chunk, when the boundries are moved. +/// +/// A contiguous chunk is a chunk that keeps all of its elements +/// in a contiguous region of memory. The container owns the region of memory +/// [storage_beg, storage_end); the memory [container_beg, +/// container_end) is used to store the current elements, and the memory +/// [storage_beg, container_beg), [container_end, storage_end) is +/// reserved for future elements (storage_beg <= container_beg <= +/// container_end <= storage_end). For example, in std::deque : +/// - chunk with a frist deques element will have container_beg equal to address +/// of the first element. +/// - in every next chunk with elements, true is container_beg == +/// storage_beg . +/// +/// Argument requirements: +/// During unpoisoning memory of empty container (before first element is +/// added): +/// - old_container_beg_p == old_container_end_p +/// During poisoning after last element was removed: +/// - new_container_beg_p == new_container_end_p +/// \param storage_beg Beginning of memory region. +/// \param storage_end End of memory region. +/// \param old_container_beg Old beginning of used region. +/// \param old_container_end End of used region. +/// \param new_container_beg New beginning of used region. +/// \param new_container_end New end of used region. +void SANITIZER_CDECL __sanitizer_annotate_double_ended_contiguous_container( + const void *storage_beg, const void *storage_end, + const void *old_container_beg, const void *old_container_end, + const void *new_container_beg, const void *new_container_end); + +/// Returns true if the contiguous container [beg, end) is properly +/// poisoned. +/// +/// Proper poisoning could occur, for example, with +/// __sanitizer_annotate_contiguous_container), that is, if +/// [beg, mid) is addressable and [mid, end) is unaddressable. +/// Full verification requires O (end - beg) time; this function tries +/// to avoid such complexity by touching only parts of the container around +/// beg, mid, and end. +/// +/// \param beg Beginning of memory region. +/// \param mid Middle of memory region. +/// \param end Old end of memory region. +/// +/// \returns True if the contiguous container [beg, end) is properly +/// poisoned. +int SANITIZER_CDECL __sanitizer_verify_contiguous_container(const void *beg, + const void *mid, + const void *end); + +/// Returns true if the double ended contiguous +/// container [storage_beg, storage_end) is properly poisoned. +/// +/// Proper poisoning could occur, for example, with +/// __sanitizer_annotate_double_ended_contiguous_container), that is, if +/// [storage_beg, container_beg) is not addressable, [container_beg, +/// container_end) is addressable and [container_end, end) is +/// unaddressable. Full verification requires O (storage_end - +/// storage_beg) time; this function tries to avoid such complexity by +/// touching only parts of the container around storage_beg, +/// container_beg, container_end, and +/// storage_end. +/// +/// \param storage_beg Beginning of memory region. +/// \param container_beg Beginning of used region. +/// \param container_end End of used region. +/// \param storage_end End of memory region. +/// +/// \returns True if the double-ended contiguous container [storage_beg, +/// container_beg, container_end, end) is properly poisoned - only +/// [container_beg; container_end) is addressable. +int SANITIZER_CDECL __sanitizer_verify_double_ended_contiguous_container( + const void *storage_beg, const void *container_beg, + const void *container_end, const void *storage_end); + +/// Similar to __sanitizer_verify_contiguous_container() but also +/// returns the address of the first improperly poisoned byte. +/// +/// Returns NULL if the area is poisoned properly. +/// +/// \param beg Beginning of memory region. +/// \param mid Middle of memory region. +/// \param end Old end of memory region. +/// +/// \returns The bad address or NULL. +const void *SANITIZER_CDECL __sanitizer_contiguous_container_find_bad_address( + const void *beg, const void *mid, const void *end); + +/// returns the address of the first improperly poisoned byte. +/// +/// Returns NULL if the area is poisoned properly. +/// +/// \param storage_beg Beginning of memory region. +/// \param container_beg Beginning of used region. +/// \param container_end End of used region. +/// \param storage_end End of memory region. +/// +/// \returns The bad address or NULL. +const void *SANITIZER_CDECL +__sanitizer_double_ended_contiguous_container_find_bad_address( + const void *storage_beg, const void *container_beg, + const void *container_end, const void *storage_end); + +/// Prints the stack trace leading to this call (useful for calling from the +/// debugger). +void SANITIZER_CDECL __sanitizer_print_stack_trace(void); + +// Symbolizes the supplied 'pc' using the format string 'fmt'. +// Outputs at most 'out_buf_size' bytes into 'out_buf'. +// If 'out_buf' is not empty then output is zero or more non empty C strings +// followed by single empty C string. Multiple strings can be returned if PC +// corresponds to inlined function. Inlined frames are printed in the order +// from "most-inlined" to the "least-inlined", so the last frame should be the +// not inlined function. +// Inlined frames can be removed with 'symbolize_inline_frames=0'. +// The format syntax is described in +// lib/sanitizer_common/sanitizer_stacktrace_printer.h. +void SANITIZER_CDECL __sanitizer_symbolize_pc(void *pc, const char *fmt, + char *out_buf, + size_t out_buf_size); +// Same as __sanitizer_symbolize_pc, but for data section (i.e. globals). +void SANITIZER_CDECL __sanitizer_symbolize_global(void *data_ptr, + const char *fmt, + char *out_buf, + size_t out_buf_size); +// Determine the return address. +#if !defined(_MSC_VER) || defined(__clang__) +#define __sanitizer_return_address() \ + __builtin_extract_return_addr(__builtin_return_address(0)) +#else +void *_ReturnAddress(void); +#pragma intrinsic(_ReturnAddress) +#define __sanitizer_return_address() _ReturnAddress() +#endif + +/// Sets the callback to be called immediately before death on error. +/// +/// Passing 0 will unset the callback. +/// +/// \param callback User-provided callback. +void SANITIZER_CDECL __sanitizer_set_death_callback(void (*callback)(void)); + +// Interceptor hooks. +// Whenever a libc function interceptor is called, it checks if the +// corresponding weak hook is defined, and calls it if it is indeed defined. +// The primary use-case is data-flow-guided fuzzing, where the fuzzer needs +// to know what is being passed to libc functions (for example memcmp). +// FIXME: implement more hooks. + +/// Interceptor hook for memcmp(). +/// +/// \param called_pc PC (program counter) address of the original call. +/// \param s1 Pointer to block of memory. +/// \param s2 Pointer to block of memory. +/// \param n Number of bytes to compare. +/// \param result Value returned by the intercepted function. +void SANITIZER_CDECL __sanitizer_weak_hook_memcmp(void *called_pc, + const void *s1, + const void *s2, size_t n, + int result); + +/// Interceptor hook for strncmp(). +/// +/// \param called_pc PC (program counter) address of the original call. +/// \param s1 Pointer to block of memory. +/// \param s2 Pointer to block of memory. +/// \param n Number of bytes to compare. +/// \param result Value returned by the intercepted function. +void SANITIZER_CDECL __sanitizer_weak_hook_strncmp(void *called_pc, + const char *s1, + const char *s2, size_t n, + int result); + +/// Interceptor hook for strncasecmp(). +/// +/// \param called_pc PC (program counter) address of the original call. +/// \param s1 Pointer to block of memory. +/// \param s2 Pointer to block of memory. +/// \param n Number of bytes to compare. +/// \param result Value returned by the intercepted function. +void SANITIZER_CDECL __sanitizer_weak_hook_strncasecmp(void *called_pc, + const char *s1, + const char *s2, size_t n, + int result); + +/// Interceptor hook for strcmp(). +/// +/// \param called_pc PC (program counter) address of the original call. +/// \param s1 Pointer to block of memory. +/// \param s2 Pointer to block of memory. +/// \param result Value returned by the intercepted function. +void SANITIZER_CDECL __sanitizer_weak_hook_strcmp(void *called_pc, + const char *s1, + const char *s2, int result); + +/// Interceptor hook for strcasecmp(). +/// +/// \param called_pc PC (program counter) address of the original call. +/// \param s1 Pointer to block of memory. +/// \param s2 Pointer to block of memory. +/// \param result Value returned by the intercepted function. +void SANITIZER_CDECL __sanitizer_weak_hook_strcasecmp(void *called_pc, + const char *s1, + const char *s2, + int result); + +/// Interceptor hook for strstr(). +/// +/// \param called_pc PC (program counter) address of the original call. +/// \param s1 Pointer to block of memory. +/// \param s2 Pointer to block of memory. +/// \param result Value returned by the intercepted function. +void SANITIZER_CDECL __sanitizer_weak_hook_strstr(void *called_pc, + const char *s1, + const char *s2, char *result); + +void SANITIZER_CDECL __sanitizer_weak_hook_strcasestr(void *called_pc, + const char *s1, + const char *s2, + char *result); + +void SANITIZER_CDECL __sanitizer_weak_hook_memmem(void *called_pc, + const void *s1, size_t len1, + const void *s2, size_t len2, + void *result); + +// Prints stack traces for all live heap allocations ordered by total +// allocation size until top_percent of total live heap is shown. top_percent +// should be between 1 and 100. At most max_number_of_contexts contexts +// (stack traces) are printed. +// Experimental feature currently available only with ASan on Linux/x86_64. +void SANITIZER_CDECL __sanitizer_print_memory_profile( + size_t top_percent, size_t max_number_of_contexts); + +/// Notify ASan that a fiber switch has started (required only if implementing +/// your own fiber library). +/// +/// Before switching to a different stack, you must call +/// __sanitizer_start_switch_fiber() with a pointer to the bottom of the +/// destination stack and with its size. When code starts running on the new +/// stack, it must call __sanitizer_finish_switch_fiber() to finalize +/// the switch. The __sanitizer_start_switch_fiber() function takes a +/// void** pointer argument to store the current fake stack if there is +/// one (it is necessary when the runtime option +/// detect_stack_use_after_return is enabled). +/// +/// When restoring a stack, this void** pointer must be given to the +/// __sanitizer_finish_switch_fiber() function. In most cases, this +/// pointer can be stored on the stack immediately before switching. When +/// leaving a fiber definitely, NULL must be passed as the first argument to +/// the __sanitizer_start_switch_fiber() function so that the fake stack +/// is destroyed. If your program does not need stack use-after-return +/// detection, you can always pass NULL to these two functions. +/// +/// \note The fake stack mechanism is disabled during fiber switch, so if a +/// signal callback runs during the switch, it will not benefit from stack +/// use-after-return detection. +/// +/// \param[out] fake_stack_save Fake stack save location. +/// \param bottom Bottom address of stack. +/// \param size Size of stack in bytes. +void SANITIZER_CDECL __sanitizer_start_switch_fiber(void **fake_stack_save, + const void *bottom, + size_t size); + +/// Notify ASan that a fiber switch has completed (required only if +/// implementing your own fiber library). +/// +/// When code starts running on the new stack, it must call +/// __sanitizer_finish_switch_fiber() to finalize +/// the switch. For usage details, see the description of +/// __sanitizer_start_switch_fiber(). +/// +/// \param fake_stack_save Fake stack save location. +/// \param[out] bottom_old Bottom address of old stack. +/// \param[out] size_old Size of old stack in bytes. +void SANITIZER_CDECL __sanitizer_finish_switch_fiber(void *fake_stack_save, + const void **bottom_old, + size_t *size_old); + +// Get full module name and calculate pc offset within it. +// Returns 1 if pc belongs to some module, 0 if module was not found. +int SANITIZER_CDECL __sanitizer_get_module_and_offset_for_pc( + void *pc, char *module_path, size_t module_path_len, void **pc_offset); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_COMMON_INTERFACE_DEFS_H diff --git a/llvm/lib/clang/19/include/sanitizer/coverage_interface.h b/llvm/lib/clang/19/include/sanitizer/coverage_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..6235dfc2d4ba486bc0721169d29902b387a42b57 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/coverage_interface.h @@ -0,0 +1,36 @@ +//===-- sanitizer/coverage_interface.h --------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// Public interface for sanitizer coverage. +//===----------------------------------------------------------------------===// + +#ifndef SANITIZER_COVERAG_INTERFACE_H +#define SANITIZER_COVERAG_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +// Record and dump coverage info. +void SANITIZER_CDECL __sanitizer_cov_dump(void); + +// Clear collected coverage info. +void SANITIZER_CDECL __sanitizer_cov_reset(void); + +// Dump collected coverage info. Sorts pcs by module into individual .sancov +// files. +void SANITIZER_CDECL __sanitizer_dump_coverage(const uintptr_t *pcs, + uintptr_t len); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_COVERAG_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/dfsan_interface.h b/llvm/lib/clang/19/include/sanitizer/dfsan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..4e52e1b54cd89268a73225e8e728151e936e2daa --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/dfsan_interface.h @@ -0,0 +1,220 @@ +//===-- dfsan_interface.h -------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of DataFlowSanitizer. +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef DFSAN_INTERFACE_H +#define DFSAN_INTERFACE_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef uint8_t dfsan_label; +typedef uint32_t dfsan_origin; + +/// Signature of the callback argument to dfsan_set_write_callback(). +typedef void(SANITIZER_CDECL *dfsan_write_callback_t)(int fd, const void *buf, + size_t count); + +/// Signature of the callback argument to dfsan_set_conditional_callback(). +typedef void(SANITIZER_CDECL *dfsan_conditional_callback_t)( + dfsan_label label, dfsan_origin origin); + +/// Signature of the callback argument to dfsan_set_reaches_function_callback(). +/// The description is intended to hold the name of the variable. +typedef void(SANITIZER_CDECL *dfsan_reaches_function_callback_t)( + dfsan_label label, dfsan_origin origin, const char *file, unsigned int line, + const char *function); + +/// Computes the union of \c l1 and \c l2, resulting in a union label. +dfsan_label SANITIZER_CDECL dfsan_union(dfsan_label l1, dfsan_label l2); + +/// Sets the label for each address in [addr,addr+size) to \c label. +void SANITIZER_CDECL dfsan_set_label(dfsan_label label, void *addr, + size_t size); + +/// Sets the label for each address in [addr,addr+size) to the union of the +/// current label for that address and \c label. +void SANITIZER_CDECL dfsan_add_label(dfsan_label label, void *addr, + size_t size); + +/// Retrieves the label associated with the given data. +/// +/// The type of 'data' is arbitrary. The function accepts a value of any type, +/// which can be truncated or extended (implicitly or explicitly) as necessary. +/// The truncation/extension operations will preserve the label of the original +/// value. +dfsan_label SANITIZER_CDECL dfsan_get_label(long data); + +/// Retrieves the immediate origin associated with the given data. The returned +/// origin may point to another origin. +/// +/// The type of 'data' is arbitrary. +dfsan_origin SANITIZER_CDECL dfsan_get_origin(long data); + +/// Retrieves the label associated with the data at the given address. +dfsan_label SANITIZER_CDECL dfsan_read_label(const void *addr, size_t size); + +/// Return the origin associated with the first taint byte in the size bytes +/// from the address addr. +dfsan_origin SANITIZER_CDECL dfsan_read_origin_of_first_taint(const void *addr, + size_t size); + +/// Returns whether the given label contains the label elem. +int SANITIZER_CDECL dfsan_has_label(dfsan_label label, dfsan_label elem); + +/// Flushes the DFSan shadow, i.e. forgets about all labels currently associated +/// with the application memory. Use this call to start over the taint tracking +/// within the same process. +/// +/// Note: If another thread is working with tainted data during the flush, that +/// taint could still be written to shadow after the flush. +void SANITIZER_CDECL dfsan_flush(void); + +/// Sets a callback to be invoked on calls to write(). The callback is invoked +/// before the write is done. The write is not guaranteed to succeed when the +/// callback executes. Pass in NULL to remove any callback. +void SANITIZER_CDECL +dfsan_set_write_callback(dfsan_write_callback_t labeled_write_callback); + +/// Sets a callback to be invoked on any conditional expressions which have a +/// taint label set. This can be used to find where tainted data influences +/// the behavior of the program. +/// These callbacks will only be added when -dfsan-conditional-callbacks=true. +void SANITIZER_CDECL +dfsan_set_conditional_callback(dfsan_conditional_callback_t callback); + +/// Conditional expressions occur during signal handlers. +/// Making callbacks that handle signals well is tricky, so when +/// -dfsan-conditional-callbacks=true, conditional expressions used in signal +/// handlers will add the labels they see into a global (bitwise-or together). +/// This function returns all label bits seen in signal handler conditions. +dfsan_label SANITIZER_CDECL dfsan_get_labels_in_signal_conditional(); + +/// Sets a callback to be invoked when tainted data reaches a function. +/// This could occur at function entry, or at a load instruction. +/// These callbacks will only be added if -dfsan-reaches-function-callbacks=1. +void SANITIZER_CDECL +dfsan_set_reaches_function_callback(dfsan_reaches_function_callback_t callback); + +/// Making callbacks that handle signals well is tricky, so when +/// -dfsan-reaches-function-callbacks=true, functions reached in signal +/// handlers will add the labels they see into a global (bitwise-or together). +/// This function returns all label bits seen during signal handlers. +dfsan_label SANITIZER_CDECL dfsan_get_labels_in_signal_reaches_function(); + +/// Interceptor hooks. +/// Whenever a dfsan's custom function is called the corresponding +/// hook is called it non-zero. The hooks should be defined by the user. +/// The primary use case is taint-guided fuzzing, where the fuzzer +/// needs to see the parameters of the function and the labels. +/// FIXME: implement more hooks. +void SANITIZER_CDECL dfsan_weak_hook_memcmp(void *caller_pc, const void *s1, + const void *s2, size_t n, + dfsan_label s1_label, + dfsan_label s2_label, + dfsan_label n_label); +void SANITIZER_CDECL dfsan_weak_hook_strncmp(void *caller_pc, const char *s1, + const char *s2, size_t n, + dfsan_label s1_label, + dfsan_label s2_label, + dfsan_label n_label); + +/// Prints the origin trace of the label at the address addr to stderr. It also +/// prints description at the beginning of the trace. If origin tracking is not +/// on, or the address is not labeled, it prints nothing. +void SANITIZER_CDECL dfsan_print_origin_trace(const void *addr, + const char *description); +/// As above, but use an origin id from dfsan_get_origin() instead of address. +/// Does not include header line with taint label and address information. +void SANITIZER_CDECL dfsan_print_origin_id_trace(dfsan_origin origin); + +/// Prints the origin trace of the label at the address \p addr to a +/// pre-allocated output buffer. If origin tracking is not on, or the address is +/// not labeled, it prints nothing. +/// +/// Typical usage: +/// \code +/// char kDescription[] = "..."; +/// char buf[1024]; +/// dfsan_sprint_origin_trace(&tainted_var, kDescription, buf, sizeof(buf)); +/// \endcode +/// +/// Typical usage that handles truncation: +/// \code +/// char buf[1024]; +/// int len = dfsan_sprint_origin_trace(&var, nullptr, buf, sizeof(buf)); +/// +/// if (len < sizeof(buf)) { +/// ProcessOriginTrace(buf); +/// } else { +/// char *tmpbuf = new char[len + 1]; +/// dfsan_sprint_origin_trace(&var, nullptr, tmpbuf, len + 1); +/// ProcessOriginTrace(tmpbuf); +/// delete[] tmpbuf; +/// } +/// \endcode +/// +/// \param addr The tainted memory address whose origin we are printing. +/// \param description A description printed at the beginning of the trace. +/// \param [out] out_buf The output buffer to write the results to. +/// \param out_buf_size The size of \p out_buf. +/// +/// \returns The number of symbols that should have been written to \p out_buf +/// (not including trailing null byte '\0'). Thus, the string is truncated iff +/// return value is not less than \p out_buf_size. +size_t SANITIZER_CDECL dfsan_sprint_origin_trace(const void *addr, + const char *description, + char *out_buf, + size_t out_buf_size); +/// As above, but use an origin id from dfsan_get_origin() instead of address. +/// Does not include header line with taint label and address information. +size_t SANITIZER_CDECL dfsan_sprint_origin_id_trace(dfsan_origin origin, + char *out_buf, + size_t out_buf_size); + +/// Prints the stack trace leading to this call to a pre-allocated output +/// buffer. +/// +/// For usage examples, see dfsan_sprint_origin_trace. +/// +/// \param [out] out_buf The output buffer to write the results to. +/// \param out_buf_size The size of \p out_buf. +/// +/// \returns The number of symbols that should have been written to \p out_buf +/// (not including trailing null byte '\0'). Thus, the string is truncated iff +/// return value is not less than \p out_buf_size. +size_t SANITIZER_CDECL dfsan_sprint_stack_trace(char *out_buf, + size_t out_buf_size); + +/// Retrieves the very first origin associated with the data at the given +/// address. +dfsan_origin SANITIZER_CDECL dfsan_get_init_origin(const void *addr); + +/// Returns the value of -dfsan-track-origins. +/// * 0: do not track origins. +/// * 1: track origins at memory store operations. +/// * 2: track origins at memory load and store operations. +int SANITIZER_CDECL dfsan_get_track_origins(void); +#ifdef __cplusplus +} // extern "C" + +template void dfsan_set_label(dfsan_label label, T &data) { + dfsan_set_label(label, (void *)&data, sizeof(T)); +} + +#endif + +#endif // DFSAN_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/hwasan_interface.h b/llvm/lib/clang/19/include/sanitizer/hwasan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..407f488a24a617f67822b57b1e1b623f0c53426b --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/hwasan_interface.h @@ -0,0 +1,109 @@ +//===-- sanitizer/hwasan_interface.h ----------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of HWAddressSanitizer. +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_HWASAN_INTERFACE_H +#define SANITIZER_HWASAN_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif +// Libc hook for program startup in statically linked executables. +// Initializes enough of the runtime to run instrumented code. This function +// should only be called in statically linked executables because it modifies +// the GOT, which won't work in regular binaries because RELRO will already +// have been applied by the time the function is called. This also means that +// the function should be called before libc applies RELRO. +// Does not call libc unless there is an error. +// Can be called multiple times. +void SANITIZER_CDECL __hwasan_init_static(void); + +// This function may be optionally provided by user and should return +// a string containing HWASan runtime options. See asan_flags.h for details. +const char *SANITIZER_CDECL __hwasan_default_options(void); + +void SANITIZER_CDECL __hwasan_enable_allocator_tagging(void); +void SANITIZER_CDECL __hwasan_disable_allocator_tagging(void); + +// Mark region of memory with the given tag. Both address and size need to be +// 16-byte aligned. +void SANITIZER_CDECL __hwasan_tag_memory(const volatile void *p, + unsigned char tag, size_t size); + +/// Set pointer tag. Previous tag is lost. +void *SANITIZER_CDECL __hwasan_tag_pointer(const volatile void *p, + unsigned char tag); + +/// Get tag from the pointer. +unsigned char SANITIZER_CDECL +__hwasan_get_tag_from_pointer(const volatile void *p); + +// Set memory tag from the current SP address to the given address to zero. +// This is meant to annotate longjmp and other non-local jumps. +// This function needs to know the (almost) exact destination frame address; +// clearing shadow for the entire thread stack like __asan_handle_no_return +// does would cause false reports. +void SANITIZER_CDECL __hwasan_handle_longjmp(const void *sp_dst); + +// Set memory tag for the part of the current thread stack below sp_dst to +// zero. Call this in vfork() before returning in the parent process. +void SANITIZER_CDECL __hwasan_handle_vfork(const void *sp_dst); + +// Libc hook for thread creation. Should be called in the child thread before +// any instrumented code. +void SANITIZER_CDECL __hwasan_thread_enter(); + +// Libc hook for thread destruction. No instrumented code should run after +// this call. +void SANITIZER_CDECL __hwasan_thread_exit(); + +// Print shadow and origin for the memory range to stderr in a human-readable +// format. +void SANITIZER_CDECL __hwasan_print_shadow(const volatile void *x, size_t size); + +// Print one-line report about the memory usage of the current process. +void SANITIZER_CDECL __hwasan_print_memory_usage(); + +/* Returns the offset of the first byte in the memory range that can not be + * accessed through the pointer in x, or -1 if the whole range is good. */ +intptr_t SANITIZER_CDECL __hwasan_test_shadow(const volatile void *x, + size_t size); + +/* Sets the callback function to be called during HWASan error reporting. */ +void SANITIZER_CDECL +__hwasan_set_error_report_callback(void (*callback)(const char *)); + +int SANITIZER_CDECL __sanitizer_posix_memalign(void **memptr, size_t alignment, + size_t size); +void *SANITIZER_CDECL __sanitizer_memalign(size_t alignment, size_t size); +void *SANITIZER_CDECL __sanitizer_aligned_alloc(size_t alignment, size_t size); +void *SANITIZER_CDECL __sanitizer___libc_memalign(size_t alignment, + size_t size); +void *SANITIZER_CDECL __sanitizer_valloc(size_t size); +void *SANITIZER_CDECL __sanitizer_pvalloc(size_t size); +void SANITIZER_CDECL __sanitizer_free(void *ptr); +void SANITIZER_CDECL __sanitizer_cfree(void *ptr); +size_t SANITIZER_CDECL __sanitizer_malloc_usable_size(const void *ptr); +struct mallinfo SANITIZER_CDECL __sanitizer_mallinfo(); +int SANITIZER_CDECL __sanitizer_mallopt(int cmd, int value); +void SANITIZER_CDECL __sanitizer_malloc_stats(void); +void *SANITIZER_CDECL __sanitizer_calloc(size_t nmemb, size_t size); +void *SANITIZER_CDECL __sanitizer_realloc(void *ptr, size_t size); +void *SANITIZER_CDECL __sanitizer_reallocarray(void *ptr, size_t nmemb, + size_t size); +void *SANITIZER_CDECL __sanitizer_malloc(size_t size); +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_HWASAN_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/linux_syscall_hooks.h b/llvm/lib/clang/19/include/sanitizer/linux_syscall_hooks.h new file mode 100644 index 0000000000000000000000000000000000000000..5f262455cb9466f976a14a103f8cab0354fd7cea --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/linux_syscall_hooks.h @@ -0,0 +1,3112 @@ +//===-- linux_syscall_hooks.h ---------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of public sanitizer interface. +// +// System call handlers. +// +// Interface methods declared in this header implement pre- and post- syscall +// actions for the active sanitizer. +// Usage: +// __sanitizer_syscall_pre_getfoo(...args...); +// long res = syscall(__NR_getfoo, ...args...); +// __sanitizer_syscall_post_getfoo(res, ...args...); +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_LINUX_SYSCALL_HOOKS_H +#define SANITIZER_LINUX_SYSCALL_HOOKS_H + +#define __sanitizer_syscall_pre_time(tloc) \ + __sanitizer_syscall_pre_impl_time((long)(tloc)) +#define __sanitizer_syscall_post_time(res, tloc) \ + __sanitizer_syscall_post_impl_time(res, (long)(tloc)) +#define __sanitizer_syscall_pre_stime(tptr) \ + __sanitizer_syscall_pre_impl_stime((long)(tptr)) +#define __sanitizer_syscall_post_stime(res, tptr) \ + __sanitizer_syscall_post_impl_stime(res, (long)(tptr)) +#define __sanitizer_syscall_pre_gettimeofday(tv, tz) \ + __sanitizer_syscall_pre_impl_gettimeofday((long)(tv), (long)(tz)) +#define __sanitizer_syscall_post_gettimeofday(res, tv, tz) \ + __sanitizer_syscall_post_impl_gettimeofday(res, (long)(tv), (long)(tz)) +#define __sanitizer_syscall_pre_settimeofday(tv, tz) \ + __sanitizer_syscall_pre_impl_settimeofday((long)(tv), (long)(tz)) +#define __sanitizer_syscall_post_settimeofday(res, tv, tz) \ + __sanitizer_syscall_post_impl_settimeofday(res, (long)(tv), (long)(tz)) +#define __sanitizer_syscall_pre_adjtimex(txc_p) \ + __sanitizer_syscall_pre_impl_adjtimex((long)(txc_p)) +#define __sanitizer_syscall_post_adjtimex(res, txc_p) \ + __sanitizer_syscall_post_impl_adjtimex(res, (long)(txc_p)) +#define __sanitizer_syscall_pre_times(tbuf) \ + __sanitizer_syscall_pre_impl_times((long)(tbuf)) +#define __sanitizer_syscall_post_times(res, tbuf) \ + __sanitizer_syscall_post_impl_times(res, (long)(tbuf)) +#define __sanitizer_syscall_pre_gettid() __sanitizer_syscall_pre_impl_gettid() +#define __sanitizer_syscall_post_gettid(res) \ + __sanitizer_syscall_post_impl_gettid(res) +#define __sanitizer_syscall_pre_nanosleep(rqtp, rmtp) \ + __sanitizer_syscall_pre_impl_nanosleep((long)(rqtp), (long)(rmtp)) +#define __sanitizer_syscall_post_nanosleep(res, rqtp, rmtp) \ + __sanitizer_syscall_post_impl_nanosleep(res, (long)(rqtp), (long)(rmtp)) +#define __sanitizer_syscall_pre_alarm(seconds) \ + __sanitizer_syscall_pre_impl_alarm((long)(seconds)) +#define __sanitizer_syscall_post_alarm(res, seconds) \ + __sanitizer_syscall_post_impl_alarm(res, (long)(seconds)) +#define __sanitizer_syscall_pre_getpid() __sanitizer_syscall_pre_impl_getpid() +#define __sanitizer_syscall_post_getpid(res) \ + __sanitizer_syscall_post_impl_getpid(res) +#define __sanitizer_syscall_pre_getppid() __sanitizer_syscall_pre_impl_getppid() +#define __sanitizer_syscall_post_getppid(res) \ + __sanitizer_syscall_post_impl_getppid(res) +#define __sanitizer_syscall_pre_getuid() __sanitizer_syscall_pre_impl_getuid() +#define __sanitizer_syscall_post_getuid(res) \ + __sanitizer_syscall_post_impl_getuid(res) +#define __sanitizer_syscall_pre_geteuid() __sanitizer_syscall_pre_impl_geteuid() +#define __sanitizer_syscall_post_geteuid(res) \ + __sanitizer_syscall_post_impl_geteuid(res) +#define __sanitizer_syscall_pre_getgid() __sanitizer_syscall_pre_impl_getgid() +#define __sanitizer_syscall_post_getgid(res) \ + __sanitizer_syscall_post_impl_getgid(res) +#define __sanitizer_syscall_pre_getegid() __sanitizer_syscall_pre_impl_getegid() +#define __sanitizer_syscall_post_getegid(res) \ + __sanitizer_syscall_post_impl_getegid(res) +#define __sanitizer_syscall_pre_getresuid(ruid, euid, suid) \ + __sanitizer_syscall_pre_impl_getresuid((long)(ruid), (long)(euid), \ + (long)(suid)) +#define __sanitizer_syscall_post_getresuid(res, ruid, euid, suid) \ + __sanitizer_syscall_post_impl_getresuid(res, (long)(ruid), (long)(euid), \ + (long)(suid)) +#define __sanitizer_syscall_pre_getresgid(rgid, egid, sgid) \ + __sanitizer_syscall_pre_impl_getresgid((long)(rgid), (long)(egid), \ + (long)(sgid)) +#define __sanitizer_syscall_post_getresgid(res, rgid, egid, sgid) \ + __sanitizer_syscall_post_impl_getresgid(res, (long)(rgid), (long)(egid), \ + (long)(sgid)) +#define __sanitizer_syscall_pre_getpgid(pid) \ + __sanitizer_syscall_pre_impl_getpgid((long)(pid)) +#define __sanitizer_syscall_post_getpgid(res, pid) \ + __sanitizer_syscall_post_impl_getpgid(res, (long)(pid)) +#define __sanitizer_syscall_pre_getpgrp() __sanitizer_syscall_pre_impl_getpgrp() +#define __sanitizer_syscall_post_getpgrp(res) \ + __sanitizer_syscall_post_impl_getpgrp(res) +#define __sanitizer_syscall_pre_getsid(pid) \ + __sanitizer_syscall_pre_impl_getsid((long)(pid)) +#define __sanitizer_syscall_post_getsid(res, pid) \ + __sanitizer_syscall_post_impl_getsid(res, (long)(pid)) +#define __sanitizer_syscall_pre_getgroups(gidsetsize, grouplist) \ + __sanitizer_syscall_pre_impl_getgroups((long)(gidsetsize), (long)(grouplist)) +#define __sanitizer_syscall_post_getgroups(res, gidsetsize, grouplist) \ + __sanitizer_syscall_post_impl_getgroups(res, (long)(gidsetsize), \ + (long)(grouplist)) +#define __sanitizer_syscall_pre_setregid(rgid, egid) \ + __sanitizer_syscall_pre_impl_setregid((long)(rgid), (long)(egid)) +#define __sanitizer_syscall_post_setregid(res, rgid, egid) \ + __sanitizer_syscall_post_impl_setregid(res, (long)(rgid), (long)(egid)) +#define __sanitizer_syscall_pre_setgid(gid) \ + __sanitizer_syscall_pre_impl_setgid((long)(gid)) +#define __sanitizer_syscall_post_setgid(res, gid) \ + __sanitizer_syscall_post_impl_setgid(res, (long)(gid)) +#define __sanitizer_syscall_pre_setreuid(ruid, euid) \ + __sanitizer_syscall_pre_impl_setreuid((long)(ruid), (long)(euid)) +#define __sanitizer_syscall_post_setreuid(res, ruid, euid) \ + __sanitizer_syscall_post_impl_setreuid(res, (long)(ruid), (long)(euid)) +#define __sanitizer_syscall_pre_setuid(uid) \ + __sanitizer_syscall_pre_impl_setuid((long)(uid)) +#define __sanitizer_syscall_post_setuid(res, uid) \ + __sanitizer_syscall_post_impl_setuid(res, (long)(uid)) +#define __sanitizer_syscall_pre_setresuid(ruid, euid, suid) \ + __sanitizer_syscall_pre_impl_setresuid((long)(ruid), (long)(euid), \ + (long)(suid)) +#define __sanitizer_syscall_post_setresuid(res, ruid, euid, suid) \ + __sanitizer_syscall_post_impl_setresuid(res, (long)(ruid), (long)(euid), \ + (long)(suid)) +#define __sanitizer_syscall_pre_setresgid(rgid, egid, sgid) \ + __sanitizer_syscall_pre_impl_setresgid((long)(rgid), (long)(egid), \ + (long)(sgid)) +#define __sanitizer_syscall_post_setresgid(res, rgid, egid, sgid) \ + __sanitizer_syscall_post_impl_setresgid(res, (long)(rgid), (long)(egid), \ + (long)(sgid)) +#define __sanitizer_syscall_pre_setfsuid(uid) \ + __sanitizer_syscall_pre_impl_setfsuid((long)(uid)) +#define __sanitizer_syscall_post_setfsuid(res, uid) \ + __sanitizer_syscall_post_impl_setfsuid(res, (long)(uid)) +#define __sanitizer_syscall_pre_setfsgid(gid) \ + __sanitizer_syscall_pre_impl_setfsgid((long)(gid)) +#define __sanitizer_syscall_post_setfsgid(res, gid) \ + __sanitizer_syscall_post_impl_setfsgid(res, (long)(gid)) +#define __sanitizer_syscall_pre_setpgid(pid, pgid) \ + __sanitizer_syscall_pre_impl_setpgid((long)(pid), (long)(pgid)) +#define __sanitizer_syscall_post_setpgid(res, pid, pgid) \ + __sanitizer_syscall_post_impl_setpgid(res, (long)(pid), (long)(pgid)) +#define __sanitizer_syscall_pre_setsid() __sanitizer_syscall_pre_impl_setsid() +#define __sanitizer_syscall_post_setsid(res) \ + __sanitizer_syscall_post_impl_setsid(res) +#define __sanitizer_syscall_pre_setgroups(gidsetsize, grouplist) \ + __sanitizer_syscall_pre_impl_setgroups((long)(gidsetsize), (long)(grouplist)) +#define __sanitizer_syscall_post_setgroups(res, gidsetsize, grouplist) \ + __sanitizer_syscall_post_impl_setgroups(res, (long)(gidsetsize), \ + (long)(grouplist)) +#define __sanitizer_syscall_pre_acct(name) \ + __sanitizer_syscall_pre_impl_acct((long)(name)) +#define __sanitizer_syscall_post_acct(res, name) \ + __sanitizer_syscall_post_impl_acct(res, (long)(name)) +#define __sanitizer_syscall_pre_capget(header, dataptr) \ + __sanitizer_syscall_pre_impl_capget((long)(header), (long)(dataptr)) +#define __sanitizer_syscall_post_capget(res, header, dataptr) \ + __sanitizer_syscall_post_impl_capget(res, (long)(header), (long)(dataptr)) +#define __sanitizer_syscall_pre_capset(header, data) \ + __sanitizer_syscall_pre_impl_capset((long)(header), (long)(data)) +#define __sanitizer_syscall_post_capset(res, header, data) \ + __sanitizer_syscall_post_impl_capset(res, (long)(header), (long)(data)) +#define __sanitizer_syscall_pre_personality(personality) \ + __sanitizer_syscall_pre_impl_personality((long)(personality)) +#define __sanitizer_syscall_post_personality(res, personality) \ + __sanitizer_syscall_post_impl_personality(res, (long)(personality)) +#define __sanitizer_syscall_pre_sigpending(set) \ + __sanitizer_syscall_pre_impl_sigpending((long)(set)) +#define __sanitizer_syscall_post_sigpending(res, set) \ + __sanitizer_syscall_post_impl_sigpending(res, (long)(set)) +#define __sanitizer_syscall_pre_sigprocmask(how, set, oset) \ + __sanitizer_syscall_pre_impl_sigprocmask((long)(how), (long)(set), \ + (long)(oset)) +#define __sanitizer_syscall_post_sigprocmask(res, how, set, oset) \ + __sanitizer_syscall_post_impl_sigprocmask(res, (long)(how), (long)(set), \ + (long)(oset)) +#define __sanitizer_syscall_pre_getitimer(which, value) \ + __sanitizer_syscall_pre_impl_getitimer((long)(which), (long)(value)) +#define __sanitizer_syscall_post_getitimer(res, which, value) \ + __sanitizer_syscall_post_impl_getitimer(res, (long)(which), (long)(value)) +#define __sanitizer_syscall_pre_setitimer(which, value, ovalue) \ + __sanitizer_syscall_pre_impl_setitimer((long)(which), (long)(value), \ + (long)(ovalue)) +#define __sanitizer_syscall_post_setitimer(res, which, value, ovalue) \ + __sanitizer_syscall_post_impl_setitimer(res, (long)(which), (long)(value), \ + (long)(ovalue)) +#define __sanitizer_syscall_pre_timer_create(which_clock, timer_event_spec, \ + created_timer_id) \ + __sanitizer_syscall_pre_impl_timer_create( \ + (long)(which_clock), (long)(timer_event_spec), (long)(created_timer_id)) +#define __sanitizer_syscall_post_timer_create( \ + res, which_clock, timer_event_spec, created_timer_id) \ + __sanitizer_syscall_post_impl_timer_create(res, (long)(which_clock), \ + (long)(timer_event_spec), \ + (long)(created_timer_id)) +#define __sanitizer_syscall_pre_timer_gettime(timer_id, setting) \ + __sanitizer_syscall_pre_impl_timer_gettime((long)(timer_id), (long)(setting)) +#define __sanitizer_syscall_post_timer_gettime(res, timer_id, setting) \ + __sanitizer_syscall_post_impl_timer_gettime(res, (long)(timer_id), \ + (long)(setting)) +#define __sanitizer_syscall_pre_timer_getoverrun(timer_id) \ + __sanitizer_syscall_pre_impl_timer_getoverrun((long)(timer_id)) +#define __sanitizer_syscall_post_timer_getoverrun(res, timer_id) \ + __sanitizer_syscall_post_impl_timer_getoverrun(res, (long)(timer_id)) +#define __sanitizer_syscall_pre_timer_settime(timer_id, flags, new_setting, \ + old_setting) \ + __sanitizer_syscall_pre_impl_timer_settime((long)(timer_id), (long)(flags), \ + (long)(new_setting), \ + (long)(old_setting)) +#define __sanitizer_syscall_post_timer_settime(res, timer_id, flags, \ + new_setting, old_setting) \ + __sanitizer_syscall_post_impl_timer_settime( \ + res, (long)(timer_id), (long)(flags), (long)(new_setting), \ + (long)(old_setting)) +#define __sanitizer_syscall_pre_timer_delete(timer_id) \ + __sanitizer_syscall_pre_impl_timer_delete((long)(timer_id)) +#define __sanitizer_syscall_post_timer_delete(res, timer_id) \ + __sanitizer_syscall_post_impl_timer_delete(res, (long)(timer_id)) +#define __sanitizer_syscall_pre_clock_settime(which_clock, tp) \ + __sanitizer_syscall_pre_impl_clock_settime((long)(which_clock), (long)(tp)) +#define __sanitizer_syscall_post_clock_settime(res, which_clock, tp) \ + __sanitizer_syscall_post_impl_clock_settime(res, (long)(which_clock), \ + (long)(tp)) +#define __sanitizer_syscall_pre_clock_gettime(which_clock, tp) \ + __sanitizer_syscall_pre_impl_clock_gettime((long)(which_clock), (long)(tp)) +#define __sanitizer_syscall_post_clock_gettime(res, which_clock, tp) \ + __sanitizer_syscall_post_impl_clock_gettime(res, (long)(which_clock), \ + (long)(tp)) +#define __sanitizer_syscall_pre_clock_adjtime(which_clock, tx) \ + __sanitizer_syscall_pre_impl_clock_adjtime((long)(which_clock), (long)(tx)) +#define __sanitizer_syscall_post_clock_adjtime(res, which_clock, tx) \ + __sanitizer_syscall_post_impl_clock_adjtime(res, (long)(which_clock), \ + (long)(tx)) +#define __sanitizer_syscall_pre_clock_getres(which_clock, tp) \ + __sanitizer_syscall_pre_impl_clock_getres((long)(which_clock), (long)(tp)) +#define __sanitizer_syscall_post_clock_getres(res, which_clock, tp) \ + __sanitizer_syscall_post_impl_clock_getres(res, (long)(which_clock), \ + (long)(tp)) +#define __sanitizer_syscall_pre_clock_nanosleep(which_clock, flags, rqtp, \ + rmtp) \ + __sanitizer_syscall_pre_impl_clock_nanosleep( \ + (long)(which_clock), (long)(flags), (long)(rqtp), (long)(rmtp)) +#define __sanitizer_syscall_post_clock_nanosleep(res, which_clock, flags, \ + rqtp, rmtp) \ + __sanitizer_syscall_post_impl_clock_nanosleep( \ + res, (long)(which_clock), (long)(flags), (long)(rqtp), (long)(rmtp)) +#define __sanitizer_syscall_pre_nice(increment) \ + __sanitizer_syscall_pre_impl_nice((long)(increment)) +#define __sanitizer_syscall_post_nice(res, increment) \ + __sanitizer_syscall_post_impl_nice(res, (long)(increment)) +#define __sanitizer_syscall_pre_sched_setscheduler(pid, policy, param) \ + __sanitizer_syscall_pre_impl_sched_setscheduler((long)(pid), (long)(policy), \ + (long)(param)) +#define __sanitizer_syscall_post_sched_setscheduler(res, pid, policy, param) \ + __sanitizer_syscall_post_impl_sched_setscheduler( \ + res, (long)(pid), (long)(policy), (long)(param)) +#define __sanitizer_syscall_pre_sched_setparam(pid, param) \ + __sanitizer_syscall_pre_impl_sched_setparam((long)(pid), (long)(param)) +#define __sanitizer_syscall_post_sched_setparam(res, pid, param) \ + __sanitizer_syscall_post_impl_sched_setparam(res, (long)(pid), (long)(param)) +#define __sanitizer_syscall_pre_sched_getscheduler(pid) \ + __sanitizer_syscall_pre_impl_sched_getscheduler((long)(pid)) +#define __sanitizer_syscall_post_sched_getscheduler(res, pid) \ + __sanitizer_syscall_post_impl_sched_getscheduler(res, (long)(pid)) +#define __sanitizer_syscall_pre_sched_getparam(pid, param) \ + __sanitizer_syscall_pre_impl_sched_getparam((long)(pid), (long)(param)) +#define __sanitizer_syscall_post_sched_getparam(res, pid, param) \ + __sanitizer_syscall_post_impl_sched_getparam(res, (long)(pid), (long)(param)) +#define __sanitizer_syscall_pre_sched_setaffinity(pid, len, user_mask_ptr) \ + __sanitizer_syscall_pre_impl_sched_setaffinity((long)(pid), (long)(len), \ + (long)(user_mask_ptr)) +#define __sanitizer_syscall_post_sched_setaffinity(res, pid, len, \ + user_mask_ptr) \ + __sanitizer_syscall_post_impl_sched_setaffinity( \ + res, (long)(pid), (long)(len), (long)(user_mask_ptr)) +#define __sanitizer_syscall_pre_sched_getaffinity(pid, len, user_mask_ptr) \ + __sanitizer_syscall_pre_impl_sched_getaffinity((long)(pid), (long)(len), \ + (long)(user_mask_ptr)) +#define __sanitizer_syscall_post_sched_getaffinity(res, pid, len, \ + user_mask_ptr) \ + __sanitizer_syscall_post_impl_sched_getaffinity( \ + res, (long)(pid), (long)(len), (long)(user_mask_ptr)) +#define __sanitizer_syscall_pre_sched_yield() \ + __sanitizer_syscall_pre_impl_sched_yield() +#define __sanitizer_syscall_post_sched_yield(res) \ + __sanitizer_syscall_post_impl_sched_yield(res) +#define __sanitizer_syscall_pre_sched_get_priority_max(policy) \ + __sanitizer_syscall_pre_impl_sched_get_priority_max((long)(policy)) +#define __sanitizer_syscall_post_sched_get_priority_max(res, policy) \ + __sanitizer_syscall_post_impl_sched_get_priority_max(res, (long)(policy)) +#define __sanitizer_syscall_pre_sched_get_priority_min(policy) \ + __sanitizer_syscall_pre_impl_sched_get_priority_min((long)(policy)) +#define __sanitizer_syscall_post_sched_get_priority_min(res, policy) \ + __sanitizer_syscall_post_impl_sched_get_priority_min(res, (long)(policy)) +#define __sanitizer_syscall_pre_sched_rr_get_interval(pid, interval) \ + __sanitizer_syscall_pre_impl_sched_rr_get_interval((long)(pid), \ + (long)(interval)) +#define __sanitizer_syscall_post_sched_rr_get_interval(res, pid, interval) \ + __sanitizer_syscall_post_impl_sched_rr_get_interval(res, (long)(pid), \ + (long)(interval)) +#define __sanitizer_syscall_pre_setpriority(which, who, niceval) \ + __sanitizer_syscall_pre_impl_setpriority((long)(which), (long)(who), \ + (long)(niceval)) +#define __sanitizer_syscall_post_setpriority(res, which, who, niceval) \ + __sanitizer_syscall_post_impl_setpriority(res, (long)(which), (long)(who), \ + (long)(niceval)) +#define __sanitizer_syscall_pre_getpriority(which, who) \ + __sanitizer_syscall_pre_impl_getpriority((long)(which), (long)(who)) +#define __sanitizer_syscall_post_getpriority(res, which, who) \ + __sanitizer_syscall_post_impl_getpriority(res, (long)(which), (long)(who)) +#define __sanitizer_syscall_pre_shutdown(arg0, arg1) \ + __sanitizer_syscall_pre_impl_shutdown((long)(arg0), (long)(arg1)) +#define __sanitizer_syscall_post_shutdown(res, arg0, arg1) \ + __sanitizer_syscall_post_impl_shutdown(res, (long)(arg0), (long)(arg1)) +#define __sanitizer_syscall_pre_reboot(magic1, magic2, cmd, arg) \ + __sanitizer_syscall_pre_impl_reboot((long)(magic1), (long)(magic2), \ + (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_post_reboot(res, magic1, magic2, cmd, arg) \ + __sanitizer_syscall_post_impl_reboot(res, (long)(magic1), (long)(magic2), \ + (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_pre_restart_syscall() \ + __sanitizer_syscall_pre_impl_restart_syscall() +#define __sanitizer_syscall_post_restart_syscall(res) \ + __sanitizer_syscall_post_impl_restart_syscall(res) +#define __sanitizer_syscall_pre_kexec_load(entry, nr_segments, segments, \ + flags) \ + __sanitizer_syscall_pre_impl_kexec_load((long)(entry), (long)(nr_segments), \ + (long)(segments), (long)(flags)) +#define __sanitizer_syscall_post_kexec_load(res, entry, nr_segments, segments, \ + flags) \ + __sanitizer_syscall_post_impl_kexec_load(res, (long)(entry), \ + (long)(nr_segments), \ + (long)(segments), (long)(flags)) +#define __sanitizer_syscall_pre_exit(error_code) \ + __sanitizer_syscall_pre_impl_exit((long)(error_code)) +#define __sanitizer_syscall_post_exit(res, error_code) \ + __sanitizer_syscall_post_impl_exit(res, (long)(error_code)) +#define __sanitizer_syscall_pre_exit_group(error_code) \ + __sanitizer_syscall_pre_impl_exit_group((long)(error_code)) +#define __sanitizer_syscall_post_exit_group(res, error_code) \ + __sanitizer_syscall_post_impl_exit_group(res, (long)(error_code)) +#define __sanitizer_syscall_pre_wait4(pid, stat_addr, options, ru) \ + __sanitizer_syscall_pre_impl_wait4((long)(pid), (long)(stat_addr), \ + (long)(options), (long)(ru)) +#define __sanitizer_syscall_post_wait4(res, pid, stat_addr, options, ru) \ + __sanitizer_syscall_post_impl_wait4(res, (long)(pid), (long)(stat_addr), \ + (long)(options), (long)(ru)) +#define __sanitizer_syscall_pre_waitid(which, pid, infop, options, ru) \ + __sanitizer_syscall_pre_impl_waitid( \ + (long)(which), (long)(pid), (long)(infop), (long)(options), (long)(ru)) +#define __sanitizer_syscall_post_waitid(res, which, pid, infop, options, ru) \ + __sanitizer_syscall_post_impl_waitid(res, (long)(which), (long)(pid), \ + (long)(infop), (long)(options), \ + (long)(ru)) +#define __sanitizer_syscall_pre_waitpid(pid, stat_addr, options) \ + __sanitizer_syscall_pre_impl_waitpid((long)(pid), (long)(stat_addr), \ + (long)(options)) +#define __sanitizer_syscall_post_waitpid(res, pid, stat_addr, options) \ + __sanitizer_syscall_post_impl_waitpid(res, (long)(pid), (long)(stat_addr), \ + (long)(options)) +#define __sanitizer_syscall_pre_set_tid_address(tidptr) \ + __sanitizer_syscall_pre_impl_set_tid_address((long)(tidptr)) +#define __sanitizer_syscall_post_set_tid_address(res, tidptr) \ + __sanitizer_syscall_post_impl_set_tid_address(res, (long)(tidptr)) +#define __sanitizer_syscall_pre_init_module(umod, len, uargs) \ + __sanitizer_syscall_pre_impl_init_module((long)(umod), (long)(len), \ + (long)(uargs)) +#define __sanitizer_syscall_post_init_module(res, umod, len, uargs) \ + __sanitizer_syscall_post_impl_init_module(res, (long)(umod), (long)(len), \ + (long)(uargs)) +#define __sanitizer_syscall_pre_delete_module(name_user, flags) \ + __sanitizer_syscall_pre_impl_delete_module((long)(name_user), (long)(flags)) +#define __sanitizer_syscall_post_delete_module(res, name_user, flags) \ + __sanitizer_syscall_post_impl_delete_module(res, (long)(name_user), \ + (long)(flags)) +#define __sanitizer_syscall_pre_rt_sigprocmask(how, set, oset, sigsetsize) \ + __sanitizer_syscall_pre_impl_rt_sigprocmask( \ + (long)(how), (long)(set), (long)(oset), (long)(sigsetsize)) +#define __sanitizer_syscall_post_rt_sigprocmask(res, how, set, oset, \ + sigsetsize) \ + __sanitizer_syscall_post_impl_rt_sigprocmask( \ + res, (long)(how), (long)(set), (long)(oset), (long)(sigsetsize)) +#define __sanitizer_syscall_pre_rt_sigpending(set, sigsetsize) \ + __sanitizer_syscall_pre_impl_rt_sigpending((long)(set), (long)(sigsetsize)) +#define __sanitizer_syscall_post_rt_sigpending(res, set, sigsetsize) \ + __sanitizer_syscall_post_impl_rt_sigpending(res, (long)(set), \ + (long)(sigsetsize)) +#define __sanitizer_syscall_pre_rt_sigtimedwait(uthese, uinfo, uts, \ + sigsetsize) \ + __sanitizer_syscall_pre_impl_rt_sigtimedwait( \ + (long)(uthese), (long)(uinfo), (long)(uts), (long)(sigsetsize)) +#define __sanitizer_syscall_post_rt_sigtimedwait(res, uthese, uinfo, uts, \ + sigsetsize) \ + __sanitizer_syscall_post_impl_rt_sigtimedwait( \ + res, (long)(uthese), (long)(uinfo), (long)(uts), (long)(sigsetsize)) +#define __sanitizer_syscall_pre_rt_tgsigqueueinfo(tgid, pid, sig, uinfo) \ + __sanitizer_syscall_pre_impl_rt_tgsigqueueinfo((long)(tgid), (long)(pid), \ + (long)(sig), (long)(uinfo)) +#define __sanitizer_syscall_post_rt_tgsigqueueinfo(res, tgid, pid, sig, uinfo) \ + __sanitizer_syscall_post_impl_rt_tgsigqueueinfo( \ + res, (long)(tgid), (long)(pid), (long)(sig), (long)(uinfo)) +#define __sanitizer_syscall_pre_kill(pid, sig) \ + __sanitizer_syscall_pre_impl_kill((long)(pid), (long)(sig)) +#define __sanitizer_syscall_post_kill(res, pid, sig) \ + __sanitizer_syscall_post_impl_kill(res, (long)(pid), (long)(sig)) +#define __sanitizer_syscall_pre_tgkill(tgid, pid, sig) \ + __sanitizer_syscall_pre_impl_tgkill((long)(tgid), (long)(pid), (long)(sig)) +#define __sanitizer_syscall_post_tgkill(res, tgid, pid, sig) \ + __sanitizer_syscall_post_impl_tgkill(res, (long)(tgid), (long)(pid), \ + (long)(sig)) +#define __sanitizer_syscall_pre_tkill(pid, sig) \ + __sanitizer_syscall_pre_impl_tkill((long)(pid), (long)(sig)) +#define __sanitizer_syscall_post_tkill(res, pid, sig) \ + __sanitizer_syscall_post_impl_tkill(res, (long)(pid), (long)(sig)) +#define __sanitizer_syscall_pre_rt_sigqueueinfo(pid, sig, uinfo) \ + __sanitizer_syscall_pre_impl_rt_sigqueueinfo((long)(pid), (long)(sig), \ + (long)(uinfo)) +#define __sanitizer_syscall_post_rt_sigqueueinfo(res, pid, sig, uinfo) \ + __sanitizer_syscall_post_impl_rt_sigqueueinfo(res, (long)(pid), (long)(sig), \ + (long)(uinfo)) +#define __sanitizer_syscall_pre_sgetmask() \ + __sanitizer_syscall_pre_impl_sgetmask() +#define __sanitizer_syscall_post_sgetmask(res) \ + __sanitizer_syscall_post_impl_sgetmask(res) +#define __sanitizer_syscall_pre_ssetmask(newmask) \ + __sanitizer_syscall_pre_impl_ssetmask((long)(newmask)) +#define __sanitizer_syscall_post_ssetmask(res, newmask) \ + __sanitizer_syscall_post_impl_ssetmask(res, (long)(newmask)) +#define __sanitizer_syscall_pre_signal(sig, handler) \ + __sanitizer_syscall_pre_impl_signal((long)(sig), (long)(handler)) +#define __sanitizer_syscall_post_signal(res, sig, handler) \ + __sanitizer_syscall_post_impl_signal(res, (long)(sig), (long)(handler)) +#define __sanitizer_syscall_pre_pause() __sanitizer_syscall_pre_impl_pause() +#define __sanitizer_syscall_post_pause(res) \ + __sanitizer_syscall_post_impl_pause(res) +#define __sanitizer_syscall_pre_sync() __sanitizer_syscall_pre_impl_sync() +#define __sanitizer_syscall_post_sync(res) \ + __sanitizer_syscall_post_impl_sync(res) +#define __sanitizer_syscall_pre_fsync(fd) \ + __sanitizer_syscall_pre_impl_fsync((long)(fd)) +#define __sanitizer_syscall_post_fsync(res, fd) \ + __sanitizer_syscall_post_impl_fsync(res, (long)(fd)) +#define __sanitizer_syscall_pre_fdatasync(fd) \ + __sanitizer_syscall_pre_impl_fdatasync((long)(fd)) +#define __sanitizer_syscall_post_fdatasync(res, fd) \ + __sanitizer_syscall_post_impl_fdatasync(res, (long)(fd)) +#define __sanitizer_syscall_pre_bdflush(func, data) \ + __sanitizer_syscall_pre_impl_bdflush((long)(func), (long)(data)) +#define __sanitizer_syscall_post_bdflush(res, func, data) \ + __sanitizer_syscall_post_impl_bdflush(res, (long)(func), (long)(data)) +#define __sanitizer_syscall_pre_mount(dev_name, dir_name, type, flags, data) \ + __sanitizer_syscall_pre_impl_mount((long)(dev_name), (long)(dir_name), \ + (long)(type), (long)(flags), \ + (long)(data)) +#define __sanitizer_syscall_post_mount(res, dev_name, dir_name, type, flags, \ + data) \ + __sanitizer_syscall_post_impl_mount(res, (long)(dev_name), (long)(dir_name), \ + (long)(type), (long)(flags), \ + (long)(data)) +#define __sanitizer_syscall_pre_umount(name, flags) \ + __sanitizer_syscall_pre_impl_umount((long)(name), (long)(flags)) +#define __sanitizer_syscall_post_umount(res, name, flags) \ + __sanitizer_syscall_post_impl_umount(res, (long)(name), (long)(flags)) +#define __sanitizer_syscall_pre_oldumount(name) \ + __sanitizer_syscall_pre_impl_oldumount((long)(name)) +#define __sanitizer_syscall_post_oldumount(res, name) \ + __sanitizer_syscall_post_impl_oldumount(res, (long)(name)) +#define __sanitizer_syscall_pre_truncate(path, length) \ + __sanitizer_syscall_pre_impl_truncate((long)(path), (long)(length)) +#define __sanitizer_syscall_post_truncate(res, path, length) \ + __sanitizer_syscall_post_impl_truncate(res, (long)(path), (long)(length)) +#define __sanitizer_syscall_pre_ftruncate(fd, length) \ + __sanitizer_syscall_pre_impl_ftruncate((long)(fd), (long)(length)) +#define __sanitizer_syscall_post_ftruncate(res, fd, length) \ + __sanitizer_syscall_post_impl_ftruncate(res, (long)(fd), (long)(length)) +#define __sanitizer_syscall_pre_stat(filename, statbuf) \ + __sanitizer_syscall_pre_impl_stat((long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_post_stat(res, filename, statbuf) \ + __sanitizer_syscall_post_impl_stat(res, (long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_pre_statfs(path, buf) \ + __sanitizer_syscall_pre_impl_statfs((long)(path), (long)(buf)) +#define __sanitizer_syscall_post_statfs(res, path, buf) \ + __sanitizer_syscall_post_impl_statfs(res, (long)(path), (long)(buf)) +#define __sanitizer_syscall_pre_statfs64(path, sz, buf) \ + __sanitizer_syscall_pre_impl_statfs64((long)(path), (long)(sz), (long)(buf)) +#define __sanitizer_syscall_post_statfs64(res, path, sz, buf) \ + __sanitizer_syscall_post_impl_statfs64(res, (long)(path), (long)(sz), \ + (long)(buf)) +#define __sanitizer_syscall_pre_fstatfs(fd, buf) \ + __sanitizer_syscall_pre_impl_fstatfs((long)(fd), (long)(buf)) +#define __sanitizer_syscall_post_fstatfs(res, fd, buf) \ + __sanitizer_syscall_post_impl_fstatfs(res, (long)(fd), (long)(buf)) +#define __sanitizer_syscall_pre_fstatfs64(fd, sz, buf) \ + __sanitizer_syscall_pre_impl_fstatfs64((long)(fd), (long)(sz), (long)(buf)) +#define __sanitizer_syscall_post_fstatfs64(res, fd, sz, buf) \ + __sanitizer_syscall_post_impl_fstatfs64(res, (long)(fd), (long)(sz), \ + (long)(buf)) +#define __sanitizer_syscall_pre_lstat(filename, statbuf) \ + __sanitizer_syscall_pre_impl_lstat((long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_post_lstat(res, filename, statbuf) \ + __sanitizer_syscall_post_impl_lstat(res, (long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_pre_fstat(fd, statbuf) \ + __sanitizer_syscall_pre_impl_fstat((long)(fd), (long)(statbuf)) +#define __sanitizer_syscall_post_fstat(res, fd, statbuf) \ + __sanitizer_syscall_post_impl_fstat(res, (long)(fd), (long)(statbuf)) +#define __sanitizer_syscall_pre_newstat(filename, statbuf) \ + __sanitizer_syscall_pre_impl_newstat((long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_post_newstat(res, filename, statbuf) \ + __sanitizer_syscall_post_impl_newstat(res, (long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_pre_newlstat(filename, statbuf) \ + __sanitizer_syscall_pre_impl_newlstat((long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_post_newlstat(res, filename, statbuf) \ + __sanitizer_syscall_post_impl_newlstat(res, (long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_pre_newfstat(fd, statbuf) \ + __sanitizer_syscall_pre_impl_newfstat((long)(fd), (long)(statbuf)) +#define __sanitizer_syscall_post_newfstat(res, fd, statbuf) \ + __sanitizer_syscall_post_impl_newfstat(res, (long)(fd), (long)(statbuf)) +#define __sanitizer_syscall_pre_ustat(dev, ubuf) \ + __sanitizer_syscall_pre_impl_ustat((long)(dev), (long)(ubuf)) +#define __sanitizer_syscall_post_ustat(res, dev, ubuf) \ + __sanitizer_syscall_post_impl_ustat(res, (long)(dev), (long)(ubuf)) +#define __sanitizer_syscall_pre_stat64(filename, statbuf) \ + __sanitizer_syscall_pre_impl_stat64((long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_post_stat64(res, filename, statbuf) \ + __sanitizer_syscall_post_impl_stat64(res, (long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_pre_fstat64(fd, statbuf) \ + __sanitizer_syscall_pre_impl_fstat64((long)(fd), (long)(statbuf)) +#define __sanitizer_syscall_post_fstat64(res, fd, statbuf) \ + __sanitizer_syscall_post_impl_fstat64(res, (long)(fd), (long)(statbuf)) +#define __sanitizer_syscall_pre_lstat64(filename, statbuf) \ + __sanitizer_syscall_pre_impl_lstat64((long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_post_lstat64(res, filename, statbuf) \ + __sanitizer_syscall_post_impl_lstat64(res, (long)(filename), (long)(statbuf)) +#define __sanitizer_syscall_pre_setxattr(path, name, value, size, flags) \ + __sanitizer_syscall_pre_impl_setxattr( \ + (long)(path), (long)(name), (long)(value), (long)(size), (long)(flags)) +#define __sanitizer_syscall_post_setxattr(res, path, name, value, size, flags) \ + __sanitizer_syscall_post_impl_setxattr(res, (long)(path), (long)(name), \ + (long)(value), (long)(size), \ + (long)(flags)) +#define __sanitizer_syscall_pre_lsetxattr(path, name, value, size, flags) \ + __sanitizer_syscall_pre_impl_lsetxattr( \ + (long)(path), (long)(name), (long)(value), (long)(size), (long)(flags)) +#define __sanitizer_syscall_post_lsetxattr(res, path, name, value, size, \ + flags) \ + __sanitizer_syscall_post_impl_lsetxattr(res, (long)(path), (long)(name), \ + (long)(value), (long)(size), \ + (long)(flags)) +#define __sanitizer_syscall_pre_fsetxattr(fd, name, value, size, flags) \ + __sanitizer_syscall_pre_impl_fsetxattr( \ + (long)(fd), (long)(name), (long)(value), (long)(size), (long)(flags)) +#define __sanitizer_syscall_post_fsetxattr(res, fd, name, value, size, flags) \ + __sanitizer_syscall_post_impl_fsetxattr(res, (long)(fd), (long)(name), \ + (long)(value), (long)(size), \ + (long)(flags)) +#define __sanitizer_syscall_pre_getxattr(path, name, value, size) \ + __sanitizer_syscall_pre_impl_getxattr((long)(path), (long)(name), \ + (long)(value), (long)(size)) +#define __sanitizer_syscall_post_getxattr(res, path, name, value, size) \ + __sanitizer_syscall_post_impl_getxattr(res, (long)(path), (long)(name), \ + (long)(value), (long)(size)) +#define __sanitizer_syscall_pre_lgetxattr(path, name, value, size) \ + __sanitizer_syscall_pre_impl_lgetxattr((long)(path), (long)(name), \ + (long)(value), (long)(size)) +#define __sanitizer_syscall_post_lgetxattr(res, path, name, value, size) \ + __sanitizer_syscall_post_impl_lgetxattr(res, (long)(path), (long)(name), \ + (long)(value), (long)(size)) +#define __sanitizer_syscall_pre_fgetxattr(fd, name, value, size) \ + __sanitizer_syscall_pre_impl_fgetxattr((long)(fd), (long)(name), \ + (long)(value), (long)(size)) +#define __sanitizer_syscall_post_fgetxattr(res, fd, name, value, size) \ + __sanitizer_syscall_post_impl_fgetxattr(res, (long)(fd), (long)(name), \ + (long)(value), (long)(size)) +#define __sanitizer_syscall_pre_listxattr(path, list, size) \ + __sanitizer_syscall_pre_impl_listxattr((long)(path), (long)(list), \ + (long)(size)) +#define __sanitizer_syscall_post_listxattr(res, path, list, size) \ + __sanitizer_syscall_post_impl_listxattr(res, (long)(path), (long)(list), \ + (long)(size)) +#define __sanitizer_syscall_pre_llistxattr(path, list, size) \ + __sanitizer_syscall_pre_impl_llistxattr((long)(path), (long)(list), \ + (long)(size)) +#define __sanitizer_syscall_post_llistxattr(res, path, list, size) \ + __sanitizer_syscall_post_impl_llistxattr(res, (long)(path), (long)(list), \ + (long)(size)) +#define __sanitizer_syscall_pre_flistxattr(fd, list, size) \ + __sanitizer_syscall_pre_impl_flistxattr((long)(fd), (long)(list), \ + (long)(size)) +#define __sanitizer_syscall_post_flistxattr(res, fd, list, size) \ + __sanitizer_syscall_post_impl_flistxattr(res, (long)(fd), (long)(list), \ + (long)(size)) +#define __sanitizer_syscall_pre_removexattr(path, name) \ + __sanitizer_syscall_pre_impl_removexattr((long)(path), (long)(name)) +#define __sanitizer_syscall_post_removexattr(res, path, name) \ + __sanitizer_syscall_post_impl_removexattr(res, (long)(path), (long)(name)) +#define __sanitizer_syscall_pre_lremovexattr(path, name) \ + __sanitizer_syscall_pre_impl_lremovexattr((long)(path), (long)(name)) +#define __sanitizer_syscall_post_lremovexattr(res, path, name) \ + __sanitizer_syscall_post_impl_lremovexattr(res, (long)(path), (long)(name)) +#define __sanitizer_syscall_pre_fremovexattr(fd, name) \ + __sanitizer_syscall_pre_impl_fremovexattr((long)(fd), (long)(name)) +#define __sanitizer_syscall_post_fremovexattr(res, fd, name) \ + __sanitizer_syscall_post_impl_fremovexattr(res, (long)(fd), (long)(name)) +#define __sanitizer_syscall_pre_brk(brk) \ + __sanitizer_syscall_pre_impl_brk((long)(brk)) +#define __sanitizer_syscall_post_brk(res, brk) \ + __sanitizer_syscall_post_impl_brk(res, (long)(brk)) +#define __sanitizer_syscall_pre_mprotect(start, len, prot) \ + __sanitizer_syscall_pre_impl_mprotect((long)(start), (long)(len), \ + (long)(prot)) +#define __sanitizer_syscall_post_mprotect(res, start, len, prot) \ + __sanitizer_syscall_post_impl_mprotect(res, (long)(start), (long)(len), \ + (long)(prot)) +#define __sanitizer_syscall_pre_mremap(addr, old_len, new_len, flags, \ + new_addr) \ + __sanitizer_syscall_pre_impl_mremap((long)(addr), (long)(old_len), \ + (long)(new_len), (long)(flags), \ + (long)(new_addr)) +#define __sanitizer_syscall_post_mremap(res, addr, old_len, new_len, flags, \ + new_addr) \ + __sanitizer_syscall_post_impl_mremap(res, (long)(addr), (long)(old_len), \ + (long)(new_len), (long)(flags), \ + (long)(new_addr)) +#define __sanitizer_syscall_pre_remap_file_pages(start, size, prot, pgoff, \ + flags) \ + __sanitizer_syscall_pre_impl_remap_file_pages( \ + (long)(start), (long)(size), (long)(prot), (long)(pgoff), (long)(flags)) +#define __sanitizer_syscall_post_remap_file_pages(res, start, size, prot, \ + pgoff, flags) \ + __sanitizer_syscall_post_impl_remap_file_pages(res, (long)(start), \ + (long)(size), (long)(prot), \ + (long)(pgoff), (long)(flags)) +#define __sanitizer_syscall_pre_msync(start, len, flags) \ + __sanitizer_syscall_pre_impl_msync((long)(start), (long)(len), (long)(flags)) +#define __sanitizer_syscall_post_msync(res, start, len, flags) \ + __sanitizer_syscall_post_impl_msync(res, (long)(start), (long)(len), \ + (long)(flags)) +#define __sanitizer_syscall_pre_munmap(addr, len) \ + __sanitizer_syscall_pre_impl_munmap((long)(addr), (long)(len)) +#define __sanitizer_syscall_post_munmap(res, addr, len) \ + __sanitizer_syscall_post_impl_munmap(res, (long)(addr), (long)(len)) +#define __sanitizer_syscall_pre_mlock(start, len) \ + __sanitizer_syscall_pre_impl_mlock((long)(start), (long)(len)) +#define __sanitizer_syscall_post_mlock(res, start, len) \ + __sanitizer_syscall_post_impl_mlock(res, (long)(start), (long)(len)) +#define __sanitizer_syscall_pre_munlock(start, len) \ + __sanitizer_syscall_pre_impl_munlock((long)(start), (long)(len)) +#define __sanitizer_syscall_post_munlock(res, start, len) \ + __sanitizer_syscall_post_impl_munlock(res, (long)(start), (long)(len)) +#define __sanitizer_syscall_pre_mlockall(flags) \ + __sanitizer_syscall_pre_impl_mlockall((long)(flags)) +#define __sanitizer_syscall_post_mlockall(res, flags) \ + __sanitizer_syscall_post_impl_mlockall(res, (long)(flags)) +#define __sanitizer_syscall_pre_munlockall() \ + __sanitizer_syscall_pre_impl_munlockall() +#define __sanitizer_syscall_post_munlockall(res) \ + __sanitizer_syscall_post_impl_munlockall(res) +#define __sanitizer_syscall_pre_madvise(start, len, behavior) \ + __sanitizer_syscall_pre_impl_madvise((long)(start), (long)(len), \ + (long)(behavior)) +#define __sanitizer_syscall_post_madvise(res, start, len, behavior) \ + __sanitizer_syscall_post_impl_madvise(res, (long)(start), (long)(len), \ + (long)(behavior)) +#define __sanitizer_syscall_pre_mincore(start, len, vec) \ + __sanitizer_syscall_pre_impl_mincore((long)(start), (long)(len), (long)(vec)) +#define __sanitizer_syscall_post_mincore(res, start, len, vec) \ + __sanitizer_syscall_post_impl_mincore(res, (long)(start), (long)(len), \ + (long)(vec)) +#define __sanitizer_syscall_pre_pivot_root(new_root, put_old) \ + __sanitizer_syscall_pre_impl_pivot_root((long)(new_root), (long)(put_old)) +#define __sanitizer_syscall_post_pivot_root(res, new_root, put_old) \ + __sanitizer_syscall_post_impl_pivot_root(res, (long)(new_root), \ + (long)(put_old)) +#define __sanitizer_syscall_pre_chroot(filename) \ + __sanitizer_syscall_pre_impl_chroot((long)(filename)) +#define __sanitizer_syscall_post_chroot(res, filename) \ + __sanitizer_syscall_post_impl_chroot(res, (long)(filename)) +#define __sanitizer_syscall_pre_mknod(filename, mode, dev) \ + __sanitizer_syscall_pre_impl_mknod((long)(filename), (long)(mode), \ + (long)(dev)) +#define __sanitizer_syscall_post_mknod(res, filename, mode, dev) \ + __sanitizer_syscall_post_impl_mknod(res, (long)(filename), (long)(mode), \ + (long)(dev)) +#define __sanitizer_syscall_pre_link(oldname, newname) \ + __sanitizer_syscall_pre_impl_link((long)(oldname), (long)(newname)) +#define __sanitizer_syscall_post_link(res, oldname, newname) \ + __sanitizer_syscall_post_impl_link(res, (long)(oldname), (long)(newname)) +#define __sanitizer_syscall_pre_symlink(old, new_) \ + __sanitizer_syscall_pre_impl_symlink((long)(old), (long)(new_)) +#define __sanitizer_syscall_post_symlink(res, old, new_) \ + __sanitizer_syscall_post_impl_symlink(res, (long)(old), (long)(new_)) +#define __sanitizer_syscall_pre_unlink(pathname) \ + __sanitizer_syscall_pre_impl_unlink((long)(pathname)) +#define __sanitizer_syscall_post_unlink(res, pathname) \ + __sanitizer_syscall_post_impl_unlink(res, (long)(pathname)) +#define __sanitizer_syscall_pre_rename(oldname, newname) \ + __sanitizer_syscall_pre_impl_rename((long)(oldname), (long)(newname)) +#define __sanitizer_syscall_post_rename(res, oldname, newname) \ + __sanitizer_syscall_post_impl_rename(res, (long)(oldname), (long)(newname)) +#define __sanitizer_syscall_pre_chmod(filename, mode) \ + __sanitizer_syscall_pre_impl_chmod((long)(filename), (long)(mode)) +#define __sanitizer_syscall_post_chmod(res, filename, mode) \ + __sanitizer_syscall_post_impl_chmod(res, (long)(filename), (long)(mode)) +#define __sanitizer_syscall_pre_fchmod(fd, mode) \ + __sanitizer_syscall_pre_impl_fchmod((long)(fd), (long)(mode)) +#define __sanitizer_syscall_post_fchmod(res, fd, mode) \ + __sanitizer_syscall_post_impl_fchmod(res, (long)(fd), (long)(mode)) +#define __sanitizer_syscall_pre_fcntl(fd, cmd, arg) \ + __sanitizer_syscall_pre_impl_fcntl((long)(fd), (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_post_fcntl(res, fd, cmd, arg) \ + __sanitizer_syscall_post_impl_fcntl(res, (long)(fd), (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_pre_fcntl64(fd, cmd, arg) \ + __sanitizer_syscall_pre_impl_fcntl64((long)(fd), (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_post_fcntl64(res, fd, cmd, arg) \ + __sanitizer_syscall_post_impl_fcntl64(res, (long)(fd), (long)(cmd), \ + (long)(arg)) +#define __sanitizer_syscall_pre_pipe(fildes) \ + __sanitizer_syscall_pre_impl_pipe((long)(fildes)) +#define __sanitizer_syscall_post_pipe(res, fildes) \ + __sanitizer_syscall_post_impl_pipe(res, (long)(fildes)) +#define __sanitizer_syscall_pre_pipe2(fildes, flags) \ + __sanitizer_syscall_pre_impl_pipe2((long)(fildes), (long)(flags)) +#define __sanitizer_syscall_post_pipe2(res, fildes, flags) \ + __sanitizer_syscall_post_impl_pipe2(res, (long)(fildes), (long)(flags)) +#define __sanitizer_syscall_pre_dup(fildes) \ + __sanitizer_syscall_pre_impl_dup((long)(fildes)) +#define __sanitizer_syscall_post_dup(res, fildes) \ + __sanitizer_syscall_post_impl_dup(res, (long)(fildes)) +#define __sanitizer_syscall_pre_dup2(oldfd, newfd) \ + __sanitizer_syscall_pre_impl_dup2((long)(oldfd), (long)(newfd)) +#define __sanitizer_syscall_post_dup2(res, oldfd, newfd) \ + __sanitizer_syscall_post_impl_dup2(res, (long)(oldfd), (long)(newfd)) +#define __sanitizer_syscall_pre_dup3(oldfd, newfd, flags) \ + __sanitizer_syscall_pre_impl_dup3((long)(oldfd), (long)(newfd), (long)(flags)) +#define __sanitizer_syscall_post_dup3(res, oldfd, newfd, flags) \ + __sanitizer_syscall_post_impl_dup3(res, (long)(oldfd), (long)(newfd), \ + (long)(flags)) +#define __sanitizer_syscall_pre_ioperm(from, num, on) \ + __sanitizer_syscall_pre_impl_ioperm((long)(from), (long)(num), (long)(on)) +#define __sanitizer_syscall_post_ioperm(res, from, num, on) \ + __sanitizer_syscall_post_impl_ioperm(res, (long)(from), (long)(num), \ + (long)(on)) +#define __sanitizer_syscall_pre_ioctl(fd, cmd, arg) \ + __sanitizer_syscall_pre_impl_ioctl((long)(fd), (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_post_ioctl(res, fd, cmd, arg) \ + __sanitizer_syscall_post_impl_ioctl(res, (long)(fd), (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_pre_flock(fd, cmd) \ + __sanitizer_syscall_pre_impl_flock((long)(fd), (long)(cmd)) +#define __sanitizer_syscall_post_flock(res, fd, cmd) \ + __sanitizer_syscall_post_impl_flock(res, (long)(fd), (long)(cmd)) +#define __sanitizer_syscall_pre_io_setup(nr_reqs, ctx) \ + __sanitizer_syscall_pre_impl_io_setup((long)(nr_reqs), (long)(ctx)) +#define __sanitizer_syscall_post_io_setup(res, nr_reqs, ctx) \ + __sanitizer_syscall_post_impl_io_setup(res, (long)(nr_reqs), (long)(ctx)) +#define __sanitizer_syscall_pre_io_destroy(ctx) \ + __sanitizer_syscall_pre_impl_io_destroy((long)(ctx)) +#define __sanitizer_syscall_post_io_destroy(res, ctx) \ + __sanitizer_syscall_post_impl_io_destroy(res, (long)(ctx)) +#define __sanitizer_syscall_pre_io_getevents(ctx_id, min_nr, nr, events, \ + timeout) \ + __sanitizer_syscall_pre_impl_io_getevents((long)(ctx_id), (long)(min_nr), \ + (long)(nr), (long)(events), \ + (long)(timeout)) +#define __sanitizer_syscall_post_io_getevents(res, ctx_id, min_nr, nr, events, \ + timeout) \ + __sanitizer_syscall_post_impl_io_getevents(res, (long)(ctx_id), \ + (long)(min_nr), (long)(nr), \ + (long)(events), (long)(timeout)) +#define __sanitizer_syscall_pre_io_submit(ctx_id, arg1, arg2) \ + __sanitizer_syscall_pre_impl_io_submit((long)(ctx_id), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_post_io_submit(res, ctx_id, arg1, arg2) \ + __sanitizer_syscall_post_impl_io_submit(res, (long)(ctx_id), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_io_cancel(ctx_id, iocb, result) \ + __sanitizer_syscall_pre_impl_io_cancel((long)(ctx_id), (long)(iocb), \ + (long)(result)) +#define __sanitizer_syscall_post_io_cancel(res, ctx_id, iocb, result) \ + __sanitizer_syscall_post_impl_io_cancel(res, (long)(ctx_id), (long)(iocb), \ + (long)(result)) +#define __sanitizer_syscall_pre_sendfile(out_fd, in_fd, offset, count) \ + __sanitizer_syscall_pre_impl_sendfile((long)(out_fd), (long)(in_fd), \ + (long)(offset), (long)(count)) +#define __sanitizer_syscall_post_sendfile(res, out_fd, in_fd, offset, count) \ + __sanitizer_syscall_post_impl_sendfile(res, (long)(out_fd), (long)(in_fd), \ + (long)(offset), (long)(count)) +#define __sanitizer_syscall_pre_sendfile64(out_fd, in_fd, offset, count) \ + __sanitizer_syscall_pre_impl_sendfile64((long)(out_fd), (long)(in_fd), \ + (long)(offset), (long)(count)) +#define __sanitizer_syscall_post_sendfile64(res, out_fd, in_fd, offset, count) \ + __sanitizer_syscall_post_impl_sendfile64(res, (long)(out_fd), (long)(in_fd), \ + (long)(offset), (long)(count)) +#define __sanitizer_syscall_pre_readlink(path, buf, bufsiz) \ + __sanitizer_syscall_pre_impl_readlink((long)(path), (long)(buf), \ + (long)(bufsiz)) +#define __sanitizer_syscall_post_readlink(res, path, buf, bufsiz) \ + __sanitizer_syscall_post_impl_readlink(res, (long)(path), (long)(buf), \ + (long)(bufsiz)) +#define __sanitizer_syscall_pre_creat(pathname, mode) \ + __sanitizer_syscall_pre_impl_creat((long)(pathname), (long)(mode)) +#define __sanitizer_syscall_post_creat(res, pathname, mode) \ + __sanitizer_syscall_post_impl_creat(res, (long)(pathname), (long)(mode)) +#define __sanitizer_syscall_pre_open(filename, flags, mode) \ + __sanitizer_syscall_pre_impl_open((long)(filename), (long)(flags), \ + (long)(mode)) +#define __sanitizer_syscall_post_open(res, filename, flags, mode) \ + __sanitizer_syscall_post_impl_open(res, (long)(filename), (long)(flags), \ + (long)(mode)) +#define __sanitizer_syscall_pre_close(fd) \ + __sanitizer_syscall_pre_impl_close((long)(fd)) +#define __sanitizer_syscall_post_close(res, fd) \ + __sanitizer_syscall_post_impl_close(res, (long)(fd)) +#define __sanitizer_syscall_pre_access(filename, mode) \ + __sanitizer_syscall_pre_impl_access((long)(filename), (long)(mode)) +#define __sanitizer_syscall_post_access(res, filename, mode) \ + __sanitizer_syscall_post_impl_access(res, (long)(filename), (long)(mode)) +#define __sanitizer_syscall_pre_vhangup() __sanitizer_syscall_pre_impl_vhangup() +#define __sanitizer_syscall_post_vhangup(res) \ + __sanitizer_syscall_post_impl_vhangup(res) +#define __sanitizer_syscall_pre_chown(filename, user, group) \ + __sanitizer_syscall_pre_impl_chown((long)(filename), (long)(user), \ + (long)(group)) +#define __sanitizer_syscall_post_chown(res, filename, user, group) \ + __sanitizer_syscall_post_impl_chown(res, (long)(filename), (long)(user), \ + (long)(group)) +#define __sanitizer_syscall_pre_lchown(filename, user, group) \ + __sanitizer_syscall_pre_impl_lchown((long)(filename), (long)(user), \ + (long)(group)) +#define __sanitizer_syscall_post_lchown(res, filename, user, group) \ + __sanitizer_syscall_post_impl_lchown(res, (long)(filename), (long)(user), \ + (long)(group)) +#define __sanitizer_syscall_pre_fchown(fd, user, group) \ + __sanitizer_syscall_pre_impl_fchown((long)(fd), (long)(user), (long)(group)) +#define __sanitizer_syscall_post_fchown(res, fd, user, group) \ + __sanitizer_syscall_post_impl_fchown(res, (long)(fd), (long)(user), \ + (long)(group)) +#define __sanitizer_syscall_pre_chown16(filename, user, group) \ + __sanitizer_syscall_pre_impl_chown16((long)(filename), (long)user, \ + (long)group) +#define __sanitizer_syscall_post_chown16(res, filename, user, group) \ + __sanitizer_syscall_post_impl_chown16(res, (long)(filename), (long)user, \ + (long)group) +#define __sanitizer_syscall_pre_lchown16(filename, user, group) \ + __sanitizer_syscall_pre_impl_lchown16((long)(filename), (long)user, \ + (long)group) +#define __sanitizer_syscall_post_lchown16(res, filename, user, group) \ + __sanitizer_syscall_post_impl_lchown16(res, (long)(filename), (long)user, \ + (long)group) +#define __sanitizer_syscall_pre_fchown16(fd, user, group) \ + __sanitizer_syscall_pre_impl_fchown16((long)(fd), (long)user, (long)group) +#define __sanitizer_syscall_post_fchown16(res, fd, user, group) \ + __sanitizer_syscall_post_impl_fchown16(res, (long)(fd), (long)user, \ + (long)group) +#define __sanitizer_syscall_pre_setregid16(rgid, egid) \ + __sanitizer_syscall_pre_impl_setregid16((long)rgid, (long)egid) +#define __sanitizer_syscall_post_setregid16(res, rgid, egid) \ + __sanitizer_syscall_post_impl_setregid16(res, (long)rgid, (long)egid) +#define __sanitizer_syscall_pre_setgid16(gid) \ + __sanitizer_syscall_pre_impl_setgid16((long)gid) +#define __sanitizer_syscall_post_setgid16(res, gid) \ + __sanitizer_syscall_post_impl_setgid16(res, (long)gid) +#define __sanitizer_syscall_pre_setreuid16(ruid, euid) \ + __sanitizer_syscall_pre_impl_setreuid16((long)ruid, (long)euid) +#define __sanitizer_syscall_post_setreuid16(res, ruid, euid) \ + __sanitizer_syscall_post_impl_setreuid16(res, (long)ruid, (long)euid) +#define __sanitizer_syscall_pre_setuid16(uid) \ + __sanitizer_syscall_pre_impl_setuid16((long)uid) +#define __sanitizer_syscall_post_setuid16(res, uid) \ + __sanitizer_syscall_post_impl_setuid16(res, (long)uid) +#define __sanitizer_syscall_pre_setresuid16(ruid, euid, suid) \ + __sanitizer_syscall_pre_impl_setresuid16((long)ruid, (long)euid, (long)suid) +#define __sanitizer_syscall_post_setresuid16(res, ruid, euid, suid) \ + __sanitizer_syscall_post_impl_setresuid16(res, (long)ruid, (long)euid, \ + (long)suid) +#define __sanitizer_syscall_pre_getresuid16(ruid, euid, suid) \ + __sanitizer_syscall_pre_impl_getresuid16((long)(ruid), (long)(euid), \ + (long)(suid)) +#define __sanitizer_syscall_post_getresuid16(res, ruid, euid, suid) \ + __sanitizer_syscall_post_impl_getresuid16(res, (long)(ruid), (long)(euid), \ + (long)(suid)) +#define __sanitizer_syscall_pre_setresgid16(rgid, egid, sgid) \ + __sanitizer_syscall_pre_impl_setresgid16((long)rgid, (long)egid, (long)sgid) +#define __sanitizer_syscall_post_setresgid16(res, rgid, egid, sgid) \ + __sanitizer_syscall_post_impl_setresgid16(res, (long)rgid, (long)egid, \ + (long)sgid) +#define __sanitizer_syscall_pre_getresgid16(rgid, egid, sgid) \ + __sanitizer_syscall_pre_impl_getresgid16((long)(rgid), (long)(egid), \ + (long)(sgid)) +#define __sanitizer_syscall_post_getresgid16(res, rgid, egid, sgid) \ + __sanitizer_syscall_post_impl_getresgid16(res, (long)(rgid), (long)(egid), \ + (long)(sgid)) +#define __sanitizer_syscall_pre_setfsuid16(uid) \ + __sanitizer_syscall_pre_impl_setfsuid16((long)uid) +#define __sanitizer_syscall_post_setfsuid16(res, uid) \ + __sanitizer_syscall_post_impl_setfsuid16(res, (long)uid) +#define __sanitizer_syscall_pre_setfsgid16(gid) \ + __sanitizer_syscall_pre_impl_setfsgid16((long)gid) +#define __sanitizer_syscall_post_setfsgid16(res, gid) \ + __sanitizer_syscall_post_impl_setfsgid16(res, (long)gid) +#define __sanitizer_syscall_pre_getgroups16(gidsetsize, grouplist) \ + __sanitizer_syscall_pre_impl_getgroups16((long)(gidsetsize), \ + (long)(grouplist)) +#define __sanitizer_syscall_post_getgroups16(res, gidsetsize, grouplist) \ + __sanitizer_syscall_post_impl_getgroups16(res, (long)(gidsetsize), \ + (long)(grouplist)) +#define __sanitizer_syscall_pre_setgroups16(gidsetsize, grouplist) \ + __sanitizer_syscall_pre_impl_setgroups16((long)(gidsetsize), \ + (long)(grouplist)) +#define __sanitizer_syscall_post_setgroups16(res, gidsetsize, grouplist) \ + __sanitizer_syscall_post_impl_setgroups16(res, (long)(gidsetsize), \ + (long)(grouplist)) +#define __sanitizer_syscall_pre_getuid16() \ + __sanitizer_syscall_pre_impl_getuid16() +#define __sanitizer_syscall_post_getuid16(res) \ + __sanitizer_syscall_post_impl_getuid16(res) +#define __sanitizer_syscall_pre_geteuid16() \ + __sanitizer_syscall_pre_impl_geteuid16() +#define __sanitizer_syscall_post_geteuid16(res) \ + __sanitizer_syscall_post_impl_geteuid16(res) +#define __sanitizer_syscall_pre_getgid16() \ + __sanitizer_syscall_pre_impl_getgid16() +#define __sanitizer_syscall_post_getgid16(res) \ + __sanitizer_syscall_post_impl_getgid16(res) +#define __sanitizer_syscall_pre_getegid16() \ + __sanitizer_syscall_pre_impl_getegid16() +#define __sanitizer_syscall_post_getegid16(res) \ + __sanitizer_syscall_post_impl_getegid16(res) +#define __sanitizer_syscall_pre_utime(filename, times) \ + __sanitizer_syscall_pre_impl_utime((long)(filename), (long)(times)) +#define __sanitizer_syscall_post_utime(res, filename, times) \ + __sanitizer_syscall_post_impl_utime(res, (long)(filename), (long)(times)) +#define __sanitizer_syscall_pre_utimes(filename, utimes) \ + __sanitizer_syscall_pre_impl_utimes((long)(filename), (long)(utimes)) +#define __sanitizer_syscall_post_utimes(res, filename, utimes) \ + __sanitizer_syscall_post_impl_utimes(res, (long)(filename), (long)(utimes)) +#define __sanitizer_syscall_pre_lseek(fd, offset, origin) \ + __sanitizer_syscall_pre_impl_lseek((long)(fd), (long)(offset), (long)(origin)) +#define __sanitizer_syscall_post_lseek(res, fd, offset, origin) \ + __sanitizer_syscall_post_impl_lseek(res, (long)(fd), (long)(offset), \ + (long)(origin)) +#define __sanitizer_syscall_pre_llseek(fd, offset_high, offset_low, result, \ + origin) \ + __sanitizer_syscall_pre_impl_llseek((long)(fd), (long)(offset_high), \ + (long)(offset_low), (long)(result), \ + (long)(origin)) +#define __sanitizer_syscall_post_llseek(res, fd, offset_high, offset_low, \ + result, origin) \ + __sanitizer_syscall_post_impl_llseek(res, (long)(fd), (long)(offset_high), \ + (long)(offset_low), (long)(result), \ + (long)(origin)) +#define __sanitizer_syscall_pre_read(fd, buf, count) \ + __sanitizer_syscall_pre_impl_read((long)(fd), (long)(buf), (long)(count)) +#define __sanitizer_syscall_post_read(res, fd, buf, count) \ + __sanitizer_syscall_post_impl_read(res, (long)(fd), (long)(buf), \ + (long)(count)) +#define __sanitizer_syscall_pre_readv(fd, vec, vlen) \ + __sanitizer_syscall_pre_impl_readv((long)(fd), (long)(vec), (long)(vlen)) +#define __sanitizer_syscall_post_readv(res, fd, vec, vlen) \ + __sanitizer_syscall_post_impl_readv(res, (long)(fd), (long)(vec), \ + (long)(vlen)) +#define __sanitizer_syscall_pre_write(fd, buf, count) \ + __sanitizer_syscall_pre_impl_write((long)(fd), (long)(buf), (long)(count)) +#define __sanitizer_syscall_post_write(res, fd, buf, count) \ + __sanitizer_syscall_post_impl_write(res, (long)(fd), (long)(buf), \ + (long)(count)) +#define __sanitizer_syscall_pre_writev(fd, vec, vlen) \ + __sanitizer_syscall_pre_impl_writev((long)(fd), (long)(vec), (long)(vlen)) +#define __sanitizer_syscall_post_writev(res, fd, vec, vlen) \ + __sanitizer_syscall_post_impl_writev(res, (long)(fd), (long)(vec), \ + (long)(vlen)) + +#ifdef _LP64 +#define __sanitizer_syscall_pre_pread64(fd, buf, count, pos) \ + __sanitizer_syscall_pre_impl_pread64((long)(fd), (long)(buf), (long)(count), \ + (long)(pos)) +#define __sanitizer_syscall_post_pread64(res, fd, buf, count, pos) \ + __sanitizer_syscall_post_impl_pread64(res, (long)(fd), (long)(buf), \ + (long)(count), (long)(pos)) +#define __sanitizer_syscall_pre_pwrite64(fd, buf, count, pos) \ + __sanitizer_syscall_pre_impl_pwrite64((long)(fd), (long)(buf), \ + (long)(count), (long)(pos)) +#define __sanitizer_syscall_post_pwrite64(res, fd, buf, count, pos) \ + __sanitizer_syscall_post_impl_pwrite64(res, (long)(fd), (long)(buf), \ + (long)(count), (long)(pos)) +#else +#define __sanitizer_syscall_pre_pread64(fd, buf, count, pos0, pos1) \ + __sanitizer_syscall_pre_impl_pread64((long)(fd), (long)(buf), (long)(count), \ + (long)(pos0), (long)(pos1)) +#define __sanitizer_syscall_post_pread64(res, fd, buf, count, pos0, pos1) \ + __sanitizer_syscall_post_impl_pread64( \ + res, (long)(fd), (long)(buf), (long)(count), (long)(pos0), (long)(pos1)) +#define __sanitizer_syscall_pre_pwrite64(fd, buf, count, pos0, pos1) \ + __sanitizer_syscall_pre_impl_pwrite64( \ + (long)(fd), (long)(buf), (long)(count), (long)(pos0), (long)(pos1)) +#define __sanitizer_syscall_post_pwrite64(res, fd, buf, count, pos0, pos1) \ + __sanitizer_syscall_post_impl_pwrite64( \ + res, (long)(fd), (long)(buf), (long)(count), (long)(pos0), (long)(pos1)) +#endif + +#define __sanitizer_syscall_pre_preadv(fd, vec, vlen, pos_l, pos_h) \ + __sanitizer_syscall_pre_impl_preadv((long)(fd), (long)(vec), (long)(vlen), \ + (long)(pos_l), (long)(pos_h)) +#define __sanitizer_syscall_post_preadv(res, fd, vec, vlen, pos_l, pos_h) \ + __sanitizer_syscall_post_impl_preadv(res, (long)(fd), (long)(vec), \ + (long)(vlen), (long)(pos_l), \ + (long)(pos_h)) +#define __sanitizer_syscall_pre_pwritev(fd, vec, vlen, pos_l, pos_h) \ + __sanitizer_syscall_pre_impl_pwritev((long)(fd), (long)(vec), (long)(vlen), \ + (long)(pos_l), (long)(pos_h)) +#define __sanitizer_syscall_post_pwritev(res, fd, vec, vlen, pos_l, pos_h) \ + __sanitizer_syscall_post_impl_pwritev(res, (long)(fd), (long)(vec), \ + (long)(vlen), (long)(pos_l), \ + (long)(pos_h)) +#define __sanitizer_syscall_pre_getcwd(buf, size) \ + __sanitizer_syscall_pre_impl_getcwd((long)(buf), (long)(size)) +#define __sanitizer_syscall_post_getcwd(res, buf, size) \ + __sanitizer_syscall_post_impl_getcwd(res, (long)(buf), (long)(size)) +#define __sanitizer_syscall_pre_mkdir(pathname, mode) \ + __sanitizer_syscall_pre_impl_mkdir((long)(pathname), (long)(mode)) +#define __sanitizer_syscall_post_mkdir(res, pathname, mode) \ + __sanitizer_syscall_post_impl_mkdir(res, (long)(pathname), (long)(mode)) +#define __sanitizer_syscall_pre_chdir(filename) \ + __sanitizer_syscall_pre_impl_chdir((long)(filename)) +#define __sanitizer_syscall_post_chdir(res, filename) \ + __sanitizer_syscall_post_impl_chdir(res, (long)(filename)) +#define __sanitizer_syscall_pre_fchdir(fd) \ + __sanitizer_syscall_pre_impl_fchdir((long)(fd)) +#define __sanitizer_syscall_post_fchdir(res, fd) \ + __sanitizer_syscall_post_impl_fchdir(res, (long)(fd)) +#define __sanitizer_syscall_pre_rmdir(pathname) \ + __sanitizer_syscall_pre_impl_rmdir((long)(pathname)) +#define __sanitizer_syscall_post_rmdir(res, pathname) \ + __sanitizer_syscall_post_impl_rmdir(res, (long)(pathname)) +#define __sanitizer_syscall_pre_lookup_dcookie(cookie64, buf, len) \ + __sanitizer_syscall_pre_impl_lookup_dcookie((long)(cookie64), (long)(buf), \ + (long)(len)) +#define __sanitizer_syscall_post_lookup_dcookie(res, cookie64, buf, len) \ + __sanitizer_syscall_post_impl_lookup_dcookie(res, (long)(cookie64), \ + (long)(buf), (long)(len)) +#define __sanitizer_syscall_pre_quotactl(cmd, special, id, addr) \ + __sanitizer_syscall_pre_impl_quotactl((long)(cmd), (long)(special), \ + (long)(id), (long)(addr)) +#define __sanitizer_syscall_post_quotactl(res, cmd, special, id, addr) \ + __sanitizer_syscall_post_impl_quotactl(res, (long)(cmd), (long)(special), \ + (long)(id), (long)(addr)) +#define __sanitizer_syscall_pre_getdents(fd, dirent, count) \ + __sanitizer_syscall_pre_impl_getdents((long)(fd), (long)(dirent), \ + (long)(count)) +#define __sanitizer_syscall_post_getdents(res, fd, dirent, count) \ + __sanitizer_syscall_post_impl_getdents(res, (long)(fd), (long)(dirent), \ + (long)(count)) +#define __sanitizer_syscall_pre_getdents64(fd, dirent, count) \ + __sanitizer_syscall_pre_impl_getdents64((long)(fd), (long)(dirent), \ + (long)(count)) +#define __sanitizer_syscall_post_getdents64(res, fd, dirent, count) \ + __sanitizer_syscall_post_impl_getdents64(res, (long)(fd), (long)(dirent), \ + (long)(count)) +#define __sanitizer_syscall_pre_setsockopt(fd, level, optname, optval, optlen) \ + __sanitizer_syscall_pre_impl_setsockopt((long)(fd), (long)(level), \ + (long)(optname), (long)(optval), \ + (long)(optlen)) +#define __sanitizer_syscall_post_setsockopt(res, fd, level, optname, optval, \ + optlen) \ + __sanitizer_syscall_post_impl_setsockopt(res, (long)(fd), (long)(level), \ + (long)(optname), (long)(optval), \ + (long)(optlen)) +#define __sanitizer_syscall_pre_getsockopt(fd, level, optname, optval, optlen) \ + __sanitizer_syscall_pre_impl_getsockopt((long)(fd), (long)(level), \ + (long)(optname), (long)(optval), \ + (long)(optlen)) +#define __sanitizer_syscall_post_getsockopt(res, fd, level, optname, optval, \ + optlen) \ + __sanitizer_syscall_post_impl_getsockopt(res, (long)(fd), (long)(level), \ + (long)(optname), (long)(optval), \ + (long)(optlen)) +#define __sanitizer_syscall_pre_bind(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_bind((long)(arg0), (long)(arg1), (long)(arg2)) +#define __sanitizer_syscall_post_bind(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_bind(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_connect(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_connect((long)(arg0), (long)(arg1), (long)(arg2)) +#define __sanitizer_syscall_post_connect(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_connect(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_accept(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_accept((long)(arg0), (long)(arg1), (long)(arg2)) +#define __sanitizer_syscall_post_accept(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_accept(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_accept4(arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_pre_impl_accept4((long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3)) +#define __sanitizer_syscall_post_accept4(res, arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_post_impl_accept4(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3)) +#define __sanitizer_syscall_pre_getsockname(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_getsockname((long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_post_getsockname(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_getsockname(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_getpeername(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_getpeername((long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_post_getpeername(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_getpeername(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_send(arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_pre_impl_send((long)(arg0), (long)(arg1), (long)(arg2), \ + (long)(arg3)) +#define __sanitizer_syscall_post_send(res, arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_post_impl_send(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3)) +#define __sanitizer_syscall_pre_sendto(arg0, arg1, arg2, arg3, arg4, arg5) \ + __sanitizer_syscall_pre_impl_sendto((long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_post_sendto(res, arg0, arg1, arg2, arg3, arg4, \ + arg5) \ + __sanitizer_syscall_post_impl_sendto(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_pre_sendmsg(fd, msg, flags) \ + __sanitizer_syscall_pre_impl_sendmsg((long)(fd), (long)(msg), (long)(flags)) +#define __sanitizer_syscall_post_sendmsg(res, fd, msg, flags) \ + __sanitizer_syscall_post_impl_sendmsg(res, (long)(fd), (long)(msg), \ + (long)(flags)) +#define __sanitizer_syscall_pre_sendmmsg(fd, msg, vlen, flags) \ + __sanitizer_syscall_pre_impl_sendmmsg((long)(fd), (long)(msg), (long)(vlen), \ + (long)(flags)) +#define __sanitizer_syscall_post_sendmmsg(res, fd, msg, vlen, flags) \ + __sanitizer_syscall_post_impl_sendmmsg(res, (long)(fd), (long)(msg), \ + (long)(vlen), (long)(flags)) +#define __sanitizer_syscall_pre_recv(arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_pre_impl_recv((long)(arg0), (long)(arg1), (long)(arg2), \ + (long)(arg3)) +#define __sanitizer_syscall_post_recv(res, arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_post_impl_recv(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3)) +#define __sanitizer_syscall_pre_recvfrom(arg0, arg1, arg2, arg3, arg4, arg5) \ + __sanitizer_syscall_pre_impl_recvfrom((long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_post_recvfrom(res, arg0, arg1, arg2, arg3, arg4, \ + arg5) \ + __sanitizer_syscall_post_impl_recvfrom(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_pre_recvmsg(fd, msg, flags) \ + __sanitizer_syscall_pre_impl_recvmsg((long)(fd), (long)(msg), (long)(flags)) +#define __sanitizer_syscall_post_recvmsg(res, fd, msg, flags) \ + __sanitizer_syscall_post_impl_recvmsg(res, (long)(fd), (long)(msg), \ + (long)(flags)) +#define __sanitizer_syscall_pre_recvmmsg(fd, msg, vlen, flags, timeout) \ + __sanitizer_syscall_pre_impl_recvmmsg((long)(fd), (long)(msg), (long)(vlen), \ + (long)(flags), (long)(timeout)) +#define __sanitizer_syscall_post_recvmmsg(res, fd, msg, vlen, flags, timeout) \ + __sanitizer_syscall_post_impl_recvmmsg(res, (long)(fd), (long)(msg), \ + (long)(vlen), (long)(flags), \ + (long)(timeout)) +#define __sanitizer_syscall_pre_socket(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_socket((long)(arg0), (long)(arg1), (long)(arg2)) +#define __sanitizer_syscall_post_socket(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_socket(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_socketpair(arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_pre_impl_socketpair((long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3)) +#define __sanitizer_syscall_post_socketpair(res, arg0, arg1, arg2, arg3) \ + __sanitizer_syscall_post_impl_socketpair(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3)) +#define __sanitizer_syscall_pre_socketcall(call, args) \ + __sanitizer_syscall_pre_impl_socketcall((long)(call), (long)(args)) +#define __sanitizer_syscall_post_socketcall(res, call, args) \ + __sanitizer_syscall_post_impl_socketcall(res, (long)(call), (long)(args)) +#define __sanitizer_syscall_pre_listen(arg0, arg1) \ + __sanitizer_syscall_pre_impl_listen((long)(arg0), (long)(arg1)) +#define __sanitizer_syscall_post_listen(res, arg0, arg1) \ + __sanitizer_syscall_post_impl_listen(res, (long)(arg0), (long)(arg1)) +#define __sanitizer_syscall_pre_poll(ufds, nfds, timeout) \ + __sanitizer_syscall_pre_impl_poll((long)(ufds), (long)(nfds), (long)(timeout)) +#define __sanitizer_syscall_post_poll(res, ufds, nfds, timeout) \ + __sanitizer_syscall_post_impl_poll(res, (long)(ufds), (long)(nfds), \ + (long)(timeout)) +#define __sanitizer_syscall_pre_select(n, inp, outp, exp, tvp) \ + __sanitizer_syscall_pre_impl_select((long)(n), (long)(inp), (long)(outp), \ + (long)(exp), (long)(tvp)) +#define __sanitizer_syscall_post_select(res, n, inp, outp, exp, tvp) \ + __sanitizer_syscall_post_impl_select(res, (long)(n), (long)(inp), \ + (long)(outp), (long)(exp), (long)(tvp)) +#define __sanitizer_syscall_pre_old_select(arg) \ + __sanitizer_syscall_pre_impl_old_select((long)(arg)) +#define __sanitizer_syscall_post_old_select(res, arg) \ + __sanitizer_syscall_post_impl_old_select(res, (long)(arg)) +#define __sanitizer_syscall_pre_epoll_create(size) \ + __sanitizer_syscall_pre_impl_epoll_create((long)(size)) +#define __sanitizer_syscall_post_epoll_create(res, size) \ + __sanitizer_syscall_post_impl_epoll_create(res, (long)(size)) +#define __sanitizer_syscall_pre_epoll_create1(flags) \ + __sanitizer_syscall_pre_impl_epoll_create1((long)(flags)) +#define __sanitizer_syscall_post_epoll_create1(res, flags) \ + __sanitizer_syscall_post_impl_epoll_create1(res, (long)(flags)) +#define __sanitizer_syscall_pre_epoll_ctl(epfd, op, fd, event) \ + __sanitizer_syscall_pre_impl_epoll_ctl((long)(epfd), (long)(op), (long)(fd), \ + (long)(event)) +#define __sanitizer_syscall_post_epoll_ctl(res, epfd, op, fd, event) \ + __sanitizer_syscall_post_impl_epoll_ctl(res, (long)(epfd), (long)(op), \ + (long)(fd), (long)(event)) +#define __sanitizer_syscall_pre_epoll_wait(epfd, events, maxevents, timeout) \ + __sanitizer_syscall_pre_impl_epoll_wait((long)(epfd), (long)(events), \ + (long)(maxevents), (long)(timeout)) +#define __sanitizer_syscall_post_epoll_wait(res, epfd, events, maxevents, \ + timeout) \ + __sanitizer_syscall_post_impl_epoll_wait(res, (long)(epfd), (long)(events), \ + (long)(maxevents), (long)(timeout)) +#define __sanitizer_syscall_pre_epoll_pwait(epfd, events, maxevents, timeout, \ + sigmask, sigsetsize) \ + __sanitizer_syscall_pre_impl_epoll_pwait( \ + (long)(epfd), (long)(events), (long)(maxevents), (long)(timeout), \ + (long)(sigmask), (long)(sigsetsize)) +#define __sanitizer_syscall_post_epoll_pwait(res, epfd, events, maxevents, \ + timeout, sigmask, sigsetsize) \ + __sanitizer_syscall_post_impl_epoll_pwait( \ + res, (long)(epfd), (long)(events), (long)(maxevents), (long)(timeout), \ + (long)(sigmask), (long)(sigsetsize)) +#define __sanitizer_syscall_pre_epoll_pwait2(epfd, events, maxevents, timeout, \ + sigmask, sigsetsize) \ + __sanitizer_syscall_pre_impl_epoll_pwait2( \ + (long)(epfd), (long)(events), (long)(maxevents), (long)(timeout), \ + (long)(sigmask), (long)(sigsetsize)) +#define __sanitizer_syscall_post_epoll_pwait2(res, epfd, events, maxevents, \ + timeout, sigmask, sigsetsize) \ + __sanitizer_syscall_post_impl_epoll_pwait2( \ + res, (long)(epfd), (long)(events), (long)(maxevents), (long)(timeout), \ + (long)(sigmask), (long)(sigsetsize)) +#define __sanitizer_syscall_pre_gethostname(name, len) \ + __sanitizer_syscall_pre_impl_gethostname((long)(name), (long)(len)) +#define __sanitizer_syscall_post_gethostname(res, name, len) \ + __sanitizer_syscall_post_impl_gethostname(res, (long)(name), (long)(len)) +#define __sanitizer_syscall_pre_sethostname(name, len) \ + __sanitizer_syscall_pre_impl_sethostname((long)(name), (long)(len)) +#define __sanitizer_syscall_post_sethostname(res, name, len) \ + __sanitizer_syscall_post_impl_sethostname(res, (long)(name), (long)(len)) +#define __sanitizer_syscall_pre_setdomainname(name, len) \ + __sanitizer_syscall_pre_impl_setdomainname((long)(name), (long)(len)) +#define __sanitizer_syscall_post_setdomainname(res, name, len) \ + __sanitizer_syscall_post_impl_setdomainname(res, (long)(name), (long)(len)) +#define __sanitizer_syscall_pre_newuname(name) \ + __sanitizer_syscall_pre_impl_newuname((long)(name)) +#define __sanitizer_syscall_post_newuname(res, name) \ + __sanitizer_syscall_post_impl_newuname(res, (long)(name)) +#define __sanitizer_syscall_pre_uname(arg0) \ + __sanitizer_syscall_pre_impl_uname((long)(arg0)) +#define __sanitizer_syscall_post_uname(res, arg0) \ + __sanitizer_syscall_post_impl_uname(res, (long)(arg0)) +#define __sanitizer_syscall_pre_olduname(arg0) \ + __sanitizer_syscall_pre_impl_olduname((long)(arg0)) +#define __sanitizer_syscall_post_olduname(res, arg0) \ + __sanitizer_syscall_post_impl_olduname(res, (long)(arg0)) +#define __sanitizer_syscall_pre_getrlimit(resource, rlim) \ + __sanitizer_syscall_pre_impl_getrlimit((long)(resource), (long)(rlim)) +#define __sanitizer_syscall_post_getrlimit(res, resource, rlim) \ + __sanitizer_syscall_post_impl_getrlimit(res, (long)(resource), (long)(rlim)) +#define __sanitizer_syscall_pre_old_getrlimit(resource, rlim) \ + __sanitizer_syscall_pre_impl_old_getrlimit((long)(resource), (long)(rlim)) +#define __sanitizer_syscall_post_old_getrlimit(res, resource, rlim) \ + __sanitizer_syscall_post_impl_old_getrlimit(res, (long)(resource), \ + (long)(rlim)) +#define __sanitizer_syscall_pre_setrlimit(resource, rlim) \ + __sanitizer_syscall_pre_impl_setrlimit((long)(resource), (long)(rlim)) +#define __sanitizer_syscall_post_setrlimit(res, resource, rlim) \ + __sanitizer_syscall_post_impl_setrlimit(res, (long)(resource), (long)(rlim)) +#define __sanitizer_syscall_pre_prlimit64(pid, resource, new_rlim, old_rlim) \ + __sanitizer_syscall_pre_impl_prlimit64((long)(pid), (long)(resource), \ + (long)(new_rlim), (long)(old_rlim)) +#define __sanitizer_syscall_post_prlimit64(res, pid, resource, new_rlim, \ + old_rlim) \ + __sanitizer_syscall_post_impl_prlimit64(res, (long)(pid), (long)(resource), \ + (long)(new_rlim), (long)(old_rlim)) +#define __sanitizer_syscall_pre_getrusage(who, ru) \ + __sanitizer_syscall_pre_impl_getrusage((long)(who), (long)(ru)) +#define __sanitizer_syscall_post_getrusage(res, who, ru) \ + __sanitizer_syscall_post_impl_getrusage(res, (long)(who), (long)(ru)) +#define __sanitizer_syscall_pre_umask(mask) \ + __sanitizer_syscall_pre_impl_umask((long)(mask)) +#define __sanitizer_syscall_post_umask(res, mask) \ + __sanitizer_syscall_post_impl_umask(res, (long)(mask)) +#define __sanitizer_syscall_pre_msgget(key, msgflg) \ + __sanitizer_syscall_pre_impl_msgget((long)(key), (long)(msgflg)) +#define __sanitizer_syscall_post_msgget(res, key, msgflg) \ + __sanitizer_syscall_post_impl_msgget(res, (long)(key), (long)(msgflg)) +#define __sanitizer_syscall_pre_msgsnd(msqid, msgp, msgsz, msgflg) \ + __sanitizer_syscall_pre_impl_msgsnd((long)(msqid), (long)(msgp), \ + (long)(msgsz), (long)(msgflg)) +#define __sanitizer_syscall_post_msgsnd(res, msqid, msgp, msgsz, msgflg) \ + __sanitizer_syscall_post_impl_msgsnd(res, (long)(msqid), (long)(msgp), \ + (long)(msgsz), (long)(msgflg)) +#define __sanitizer_syscall_pre_msgrcv(msqid, msgp, msgsz, msgtyp, msgflg) \ + __sanitizer_syscall_pre_impl_msgrcv((long)(msqid), (long)(msgp), \ + (long)(msgsz), (long)(msgtyp), \ + (long)(msgflg)) +#define __sanitizer_syscall_post_msgrcv(res, msqid, msgp, msgsz, msgtyp, \ + msgflg) \ + __sanitizer_syscall_post_impl_msgrcv(res, (long)(msqid), (long)(msgp), \ + (long)(msgsz), (long)(msgtyp), \ + (long)(msgflg)) +#define __sanitizer_syscall_pre_msgctl(msqid, cmd, buf) \ + __sanitizer_syscall_pre_impl_msgctl((long)(msqid), (long)(cmd), (long)(buf)) +#define __sanitizer_syscall_post_msgctl(res, msqid, cmd, buf) \ + __sanitizer_syscall_post_impl_msgctl(res, (long)(msqid), (long)(cmd), \ + (long)(buf)) +#define __sanitizer_syscall_pre_semget(key, nsems, semflg) \ + __sanitizer_syscall_pre_impl_semget((long)(key), (long)(nsems), \ + (long)(semflg)) +#define __sanitizer_syscall_post_semget(res, key, nsems, semflg) \ + __sanitizer_syscall_post_impl_semget(res, (long)(key), (long)(nsems), \ + (long)(semflg)) +#define __sanitizer_syscall_pre_semop(semid, sops, nsops) \ + __sanitizer_syscall_pre_impl_semop((long)(semid), (long)(sops), (long)(nsops)) +#define __sanitizer_syscall_post_semop(res, semid, sops, nsops) \ + __sanitizer_syscall_post_impl_semop(res, (long)(semid), (long)(sops), \ + (long)(nsops)) +#define __sanitizer_syscall_pre_semctl(semid, semnum, cmd, arg) \ + __sanitizer_syscall_pre_impl_semctl((long)(semid), (long)(semnum), \ + (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_post_semctl(res, semid, semnum, cmd, arg) \ + __sanitizer_syscall_post_impl_semctl(res, (long)(semid), (long)(semnum), \ + (long)(cmd), (long)(arg)) +#define __sanitizer_syscall_pre_semtimedop(semid, sops, nsops, timeout) \ + __sanitizer_syscall_pre_impl_semtimedop((long)(semid), (long)(sops), \ + (long)(nsops), (long)(timeout)) +#define __sanitizer_syscall_post_semtimedop(res, semid, sops, nsops, timeout) \ + __sanitizer_syscall_post_impl_semtimedop(res, (long)(semid), (long)(sops), \ + (long)(nsops), (long)(timeout)) +#define __sanitizer_syscall_pre_shmat(shmid, shmaddr, shmflg) \ + __sanitizer_syscall_pre_impl_shmat((long)(shmid), (long)(shmaddr), \ + (long)(shmflg)) +#define __sanitizer_syscall_post_shmat(res, shmid, shmaddr, shmflg) \ + __sanitizer_syscall_post_impl_shmat(res, (long)(shmid), (long)(shmaddr), \ + (long)(shmflg)) +#define __sanitizer_syscall_pre_shmget(key, size, flag) \ + __sanitizer_syscall_pre_impl_shmget((long)(key), (long)(size), (long)(flag)) +#define __sanitizer_syscall_post_shmget(res, key, size, flag) \ + __sanitizer_syscall_post_impl_shmget(res, (long)(key), (long)(size), \ + (long)(flag)) +#define __sanitizer_syscall_pre_shmdt(shmaddr) \ + __sanitizer_syscall_pre_impl_shmdt((long)(shmaddr)) +#define __sanitizer_syscall_post_shmdt(res, shmaddr) \ + __sanitizer_syscall_post_impl_shmdt(res, (long)(shmaddr)) +#define __sanitizer_syscall_pre_shmctl(shmid, cmd, buf) \ + __sanitizer_syscall_pre_impl_shmctl((long)(shmid), (long)(cmd), (long)(buf)) +#define __sanitizer_syscall_post_shmctl(res, shmid, cmd, buf) \ + __sanitizer_syscall_post_impl_shmctl(res, (long)(shmid), (long)(cmd), \ + (long)(buf)) +#define __sanitizer_syscall_pre_ipc(call, first, second, third, ptr, fifth) \ + __sanitizer_syscall_pre_impl_ipc((long)(call), (long)(first), \ + (long)(second), (long)(third), (long)(ptr), \ + (long)(fifth)) +#define __sanitizer_syscall_post_ipc(res, call, first, second, third, ptr, \ + fifth) \ + __sanitizer_syscall_post_impl_ipc(res, (long)(call), (long)(first), \ + (long)(second), (long)(third), \ + (long)(ptr), (long)(fifth)) +#define __sanitizer_syscall_pre_mq_open(name, oflag, mode, attr) \ + __sanitizer_syscall_pre_impl_mq_open((long)(name), (long)(oflag), \ + (long)(mode), (long)(attr)) +#define __sanitizer_syscall_post_mq_open(res, name, oflag, mode, attr) \ + __sanitizer_syscall_post_impl_mq_open(res, (long)(name), (long)(oflag), \ + (long)(mode), (long)(attr)) +#define __sanitizer_syscall_pre_mq_unlink(name) \ + __sanitizer_syscall_pre_impl_mq_unlink((long)(name)) +#define __sanitizer_syscall_post_mq_unlink(res, name) \ + __sanitizer_syscall_post_impl_mq_unlink(res, (long)(name)) +#define __sanitizer_syscall_pre_mq_timedsend(mqdes, msg_ptr, msg_len, \ + msg_prio, abs_timeout) \ + __sanitizer_syscall_pre_impl_mq_timedsend((long)(mqdes), (long)(msg_ptr), \ + (long)(msg_len), (long)(msg_prio), \ + (long)(abs_timeout)) +#define __sanitizer_syscall_post_mq_timedsend(res, mqdes, msg_ptr, msg_len, \ + msg_prio, abs_timeout) \ + __sanitizer_syscall_post_impl_mq_timedsend( \ + res, (long)(mqdes), (long)(msg_ptr), (long)(msg_len), (long)(msg_prio), \ + (long)(abs_timeout)) +#define __sanitizer_syscall_pre_mq_timedreceive(mqdes, msg_ptr, msg_len, \ + msg_prio, abs_timeout) \ + __sanitizer_syscall_pre_impl_mq_timedreceive( \ + (long)(mqdes), (long)(msg_ptr), (long)(msg_len), (long)(msg_prio), \ + (long)(abs_timeout)) +#define __sanitizer_syscall_post_mq_timedreceive(res, mqdes, msg_ptr, msg_len, \ + msg_prio, abs_timeout) \ + __sanitizer_syscall_post_impl_mq_timedreceive( \ + res, (long)(mqdes), (long)(msg_ptr), (long)(msg_len), (long)(msg_prio), \ + (long)(abs_timeout)) +#define __sanitizer_syscall_pre_mq_notify(mqdes, notification) \ + __sanitizer_syscall_pre_impl_mq_notify((long)(mqdes), (long)(notification)) +#define __sanitizer_syscall_post_mq_notify(res, mqdes, notification) \ + __sanitizer_syscall_post_impl_mq_notify(res, (long)(mqdes), \ + (long)(notification)) +#define __sanitizer_syscall_pre_mq_getsetattr(mqdes, mqstat, omqstat) \ + __sanitizer_syscall_pre_impl_mq_getsetattr((long)(mqdes), (long)(mqstat), \ + (long)(omqstat)) +#define __sanitizer_syscall_post_mq_getsetattr(res, mqdes, mqstat, omqstat) \ + __sanitizer_syscall_post_impl_mq_getsetattr(res, (long)(mqdes), \ + (long)(mqstat), (long)(omqstat)) +#define __sanitizer_syscall_pre_pciconfig_iobase(which, bus, devfn) \ + __sanitizer_syscall_pre_impl_pciconfig_iobase((long)(which), (long)(bus), \ + (long)(devfn)) +#define __sanitizer_syscall_post_pciconfig_iobase(res, which, bus, devfn) \ + __sanitizer_syscall_post_impl_pciconfig_iobase(res, (long)(which), \ + (long)(bus), (long)(devfn)) +#define __sanitizer_syscall_pre_pciconfig_read(bus, dfn, off, len, buf) \ + __sanitizer_syscall_pre_impl_pciconfig_read( \ + (long)(bus), (long)(dfn), (long)(off), (long)(len), (long)(buf)) +#define __sanitizer_syscall_post_pciconfig_read(res, bus, dfn, off, len, buf) \ + __sanitizer_syscall_post_impl_pciconfig_read( \ + res, (long)(bus), (long)(dfn), (long)(off), (long)(len), (long)(buf)) +#define __sanitizer_syscall_pre_pciconfig_write(bus, dfn, off, len, buf) \ + __sanitizer_syscall_pre_impl_pciconfig_write( \ + (long)(bus), (long)(dfn), (long)(off), (long)(len), (long)(buf)) +#define __sanitizer_syscall_post_pciconfig_write(res, bus, dfn, off, len, buf) \ + __sanitizer_syscall_post_impl_pciconfig_write( \ + res, (long)(bus), (long)(dfn), (long)(off), (long)(len), (long)(buf)) +#define __sanitizer_syscall_pre_swapon(specialfile, swap_flags) \ + __sanitizer_syscall_pre_impl_swapon((long)(specialfile), (long)(swap_flags)) +#define __sanitizer_syscall_post_swapon(res, specialfile, swap_flags) \ + __sanitizer_syscall_post_impl_swapon(res, (long)(specialfile), \ + (long)(swap_flags)) +#define __sanitizer_syscall_pre_swapoff(specialfile) \ + __sanitizer_syscall_pre_impl_swapoff((long)(specialfile)) +#define __sanitizer_syscall_post_swapoff(res, specialfile) \ + __sanitizer_syscall_post_impl_swapoff(res, (long)(specialfile)) +#define __sanitizer_syscall_pre_sysctl(args) \ + __sanitizer_syscall_pre_impl_sysctl((long)(args)) +#define __sanitizer_syscall_post_sysctl(res, args) \ + __sanitizer_syscall_post_impl_sysctl(res, (long)(args)) +#define __sanitizer_syscall_pre_sysinfo(info) \ + __sanitizer_syscall_pre_impl_sysinfo((long)(info)) +#define __sanitizer_syscall_post_sysinfo(res, info) \ + __sanitizer_syscall_post_impl_sysinfo(res, (long)(info)) +#define __sanitizer_syscall_pre_sysfs(option, arg1, arg2) \ + __sanitizer_syscall_pre_impl_sysfs((long)(option), (long)(arg1), (long)(arg2)) +#define __sanitizer_syscall_post_sysfs(res, option, arg1, arg2) \ + __sanitizer_syscall_post_impl_sysfs(res, (long)(option), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_syslog(type, buf, len) \ + __sanitizer_syscall_pre_impl_syslog((long)(type), (long)(buf), (long)(len)) +#define __sanitizer_syscall_post_syslog(res, type, buf, len) \ + __sanitizer_syscall_post_impl_syslog(res, (long)(type), (long)(buf), \ + (long)(len)) +#define __sanitizer_syscall_pre_uselib(library) \ + __sanitizer_syscall_pre_impl_uselib((long)(library)) +#define __sanitizer_syscall_post_uselib(res, library) \ + __sanitizer_syscall_post_impl_uselib(res, (long)(library)) +#define __sanitizer_syscall_pre_ni_syscall() \ + __sanitizer_syscall_pre_impl_ni_syscall() +#define __sanitizer_syscall_post_ni_syscall(res) \ + __sanitizer_syscall_post_impl_ni_syscall(res) +#define __sanitizer_syscall_pre_ptrace(request, pid, addr, data) \ + __sanitizer_syscall_pre_impl_ptrace((long)(request), (long)(pid), \ + (long)(addr), (long)(data)) +#define __sanitizer_syscall_post_ptrace(res, request, pid, addr, data) \ + __sanitizer_syscall_post_impl_ptrace(res, (long)(request), (long)(pid), \ + (long)(addr), (long)(data)) +#define __sanitizer_syscall_pre_add_key(_type, _description, _payload, plen, \ + destringid) \ + __sanitizer_syscall_pre_impl_add_key((long)(_type), (long)(_description), \ + (long)(_payload), (long)(plen), \ + (long)(destringid)) +#define __sanitizer_syscall_post_add_key(res, _type, _description, _payload, \ + plen, destringid) \ + __sanitizer_syscall_post_impl_add_key( \ + res, (long)(_type), (long)(_description), (long)(_payload), \ + (long)(plen), (long)(destringid)) +#define __sanitizer_syscall_pre_request_key(_type, _description, \ + _callout_info, destringid) \ + __sanitizer_syscall_pre_impl_request_key( \ + (long)(_type), (long)(_description), (long)(_callout_info), \ + (long)(destringid)) +#define __sanitizer_syscall_post_request_key(res, _type, _description, \ + _callout_info, destringid) \ + __sanitizer_syscall_post_impl_request_key( \ + res, (long)(_type), (long)(_description), (long)(_callout_info), \ + (long)(destringid)) +#define __sanitizer_syscall_pre_keyctl(cmd, arg2, arg3, arg4, arg5) \ + __sanitizer_syscall_pre_impl_keyctl((long)(cmd), (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_post_keyctl(res, cmd, arg2, arg3, arg4, arg5) \ + __sanitizer_syscall_post_impl_keyctl(res, (long)(cmd), (long)(arg2), \ + (long)(arg3), (long)(arg4), \ + (long)(arg5)) +#define __sanitizer_syscall_pre_ioprio_set(which, who, ioprio) \ + __sanitizer_syscall_pre_impl_ioprio_set((long)(which), (long)(who), \ + (long)(ioprio)) +#define __sanitizer_syscall_post_ioprio_set(res, which, who, ioprio) \ + __sanitizer_syscall_post_impl_ioprio_set(res, (long)(which), (long)(who), \ + (long)(ioprio)) +#define __sanitizer_syscall_pre_ioprio_get(which, who) \ + __sanitizer_syscall_pre_impl_ioprio_get((long)(which), (long)(who)) +#define __sanitizer_syscall_post_ioprio_get(res, which, who) \ + __sanitizer_syscall_post_impl_ioprio_get(res, (long)(which), (long)(who)) +#define __sanitizer_syscall_pre_set_mempolicy(mode, nmask, maxnode) \ + __sanitizer_syscall_pre_impl_set_mempolicy((long)(mode), (long)(nmask), \ + (long)(maxnode)) +#define __sanitizer_syscall_post_set_mempolicy(res, mode, nmask, maxnode) \ + __sanitizer_syscall_post_impl_set_mempolicy(res, (long)(mode), \ + (long)(nmask), (long)(maxnode)) +#define __sanitizer_syscall_pre_migrate_pages(pid, maxnode, from, to) \ + __sanitizer_syscall_pre_impl_migrate_pages((long)(pid), (long)(maxnode), \ + (long)(from), (long)(to)) +#define __sanitizer_syscall_post_migrate_pages(res, pid, maxnode, from, to) \ + __sanitizer_syscall_post_impl_migrate_pages( \ + res, (long)(pid), (long)(maxnode), (long)(from), (long)(to)) +#define __sanitizer_syscall_pre_move_pages(pid, nr_pages, pages, nodes, \ + status, flags) \ + __sanitizer_syscall_pre_impl_move_pages((long)(pid), (long)(nr_pages), \ + (long)(pages), (long)(nodes), \ + (long)(status), (long)(flags)) +#define __sanitizer_syscall_post_move_pages(res, pid, nr_pages, pages, nodes, \ + status, flags) \ + __sanitizer_syscall_post_impl_move_pages(res, (long)(pid), (long)(nr_pages), \ + (long)(pages), (long)(nodes), \ + (long)(status), (long)(flags)) +#define __sanitizer_syscall_pre_mbind(start, len, mode, nmask, maxnode, flags) \ + __sanitizer_syscall_pre_impl_mbind((long)(start), (long)(len), (long)(mode), \ + (long)(nmask), (long)(maxnode), \ + (long)(flags)) +#define __sanitizer_syscall_post_mbind(res, start, len, mode, nmask, maxnode, \ + flags) \ + __sanitizer_syscall_post_impl_mbind(res, (long)(start), (long)(len), \ + (long)(mode), (long)(nmask), \ + (long)(maxnode), (long)(flags)) +#define __sanitizer_syscall_pre_get_mempolicy(policy, nmask, maxnode, addr, \ + flags) \ + __sanitizer_syscall_pre_impl_get_mempolicy((long)(policy), (long)(nmask), \ + (long)(maxnode), (long)(addr), \ + (long)(flags)) +#define __sanitizer_syscall_post_get_mempolicy(res, policy, nmask, maxnode, \ + addr, flags) \ + __sanitizer_syscall_post_impl_get_mempolicy(res, (long)(policy), \ + (long)(nmask), (long)(maxnode), \ + (long)(addr), (long)(flags)) +#define __sanitizer_syscall_pre_inotify_init() \ + __sanitizer_syscall_pre_impl_inotify_init() +#define __sanitizer_syscall_post_inotify_init(res) \ + __sanitizer_syscall_post_impl_inotify_init(res) +#define __sanitizer_syscall_pre_inotify_init1(flags) \ + __sanitizer_syscall_pre_impl_inotify_init1((long)(flags)) +#define __sanitizer_syscall_post_inotify_init1(res, flags) \ + __sanitizer_syscall_post_impl_inotify_init1(res, (long)(flags)) +#define __sanitizer_syscall_pre_inotify_add_watch(fd, path, mask) \ + __sanitizer_syscall_pre_impl_inotify_add_watch((long)(fd), (long)(path), \ + (long)(mask)) +#define __sanitizer_syscall_post_inotify_add_watch(res, fd, path, mask) \ + __sanitizer_syscall_post_impl_inotify_add_watch(res, (long)(fd), \ + (long)(path), (long)(mask)) +#define __sanitizer_syscall_pre_inotify_rm_watch(fd, wd) \ + __sanitizer_syscall_pre_impl_inotify_rm_watch((long)(fd), (long)(wd)) +#define __sanitizer_syscall_post_inotify_rm_watch(res, fd, wd) \ + __sanitizer_syscall_post_impl_inotify_rm_watch(res, (long)(fd), (long)(wd)) +#define __sanitizer_syscall_pre_spu_run(fd, unpc, ustatus) \ + __sanitizer_syscall_pre_impl_spu_run((long)(fd), (long)(unpc), \ + (long)(ustatus)) +#define __sanitizer_syscall_post_spu_run(res, fd, unpc, ustatus) \ + __sanitizer_syscall_post_impl_spu_run(res, (long)(fd), (long)(unpc), \ + (long)(ustatus)) +#define __sanitizer_syscall_pre_spu_create(name, flags, mode, fd) \ + __sanitizer_syscall_pre_impl_spu_create((long)(name), (long)(flags), \ + (long)(mode), (long)(fd)) +#define __sanitizer_syscall_post_spu_create(res, name, flags, mode, fd) \ + __sanitizer_syscall_post_impl_spu_create(res, (long)(name), (long)(flags), \ + (long)(mode), (long)(fd)) +#define __sanitizer_syscall_pre_mknodat(dfd, filename, mode, dev) \ + __sanitizer_syscall_pre_impl_mknodat((long)(dfd), (long)(filename), \ + (long)(mode), (long)(dev)) +#define __sanitizer_syscall_post_mknodat(res, dfd, filename, mode, dev) \ + __sanitizer_syscall_post_impl_mknodat(res, (long)(dfd), (long)(filename), \ + (long)(mode), (long)(dev)) +#define __sanitizer_syscall_pre_mkdirat(dfd, pathname, mode) \ + __sanitizer_syscall_pre_impl_mkdirat((long)(dfd), (long)(pathname), \ + (long)(mode)) +#define __sanitizer_syscall_post_mkdirat(res, dfd, pathname, mode) \ + __sanitizer_syscall_post_impl_mkdirat(res, (long)(dfd), (long)(pathname), \ + (long)(mode)) +#define __sanitizer_syscall_pre_unlinkat(dfd, pathname, flag) \ + __sanitizer_syscall_pre_impl_unlinkat((long)(dfd), (long)(pathname), \ + (long)(flag)) +#define __sanitizer_syscall_post_unlinkat(res, dfd, pathname, flag) \ + __sanitizer_syscall_post_impl_unlinkat(res, (long)(dfd), (long)(pathname), \ + (long)(flag)) +#define __sanitizer_syscall_pre_symlinkat(oldname, newdfd, newname) \ + __sanitizer_syscall_pre_impl_symlinkat((long)(oldname), (long)(newdfd), \ + (long)(newname)) +#define __sanitizer_syscall_post_symlinkat(res, oldname, newdfd, newname) \ + __sanitizer_syscall_post_impl_symlinkat(res, (long)(oldname), \ + (long)(newdfd), (long)(newname)) +#define __sanitizer_syscall_pre_linkat(olddfd, oldname, newdfd, newname, \ + flags) \ + __sanitizer_syscall_pre_impl_linkat((long)(olddfd), (long)(oldname), \ + (long)(newdfd), (long)(newname), \ + (long)(flags)) +#define __sanitizer_syscall_post_linkat(res, olddfd, oldname, newdfd, newname, \ + flags) \ + __sanitizer_syscall_post_impl_linkat(res, (long)(olddfd), (long)(oldname), \ + (long)(newdfd), (long)(newname), \ + (long)(flags)) +#define __sanitizer_syscall_pre_renameat(olddfd, oldname, newdfd, newname) \ + __sanitizer_syscall_pre_impl_renameat((long)(olddfd), (long)(oldname), \ + (long)(newdfd), (long)(newname)) +#define __sanitizer_syscall_post_renameat(res, olddfd, oldname, newdfd, \ + newname) \ + __sanitizer_syscall_post_impl_renameat(res, (long)(olddfd), (long)(oldname), \ + (long)(newdfd), (long)(newname)) +#define __sanitizer_syscall_pre_futimesat(dfd, filename, utimes) \ + __sanitizer_syscall_pre_impl_futimesat((long)(dfd), (long)(filename), \ + (long)(utimes)) +#define __sanitizer_syscall_post_futimesat(res, dfd, filename, utimes) \ + __sanitizer_syscall_post_impl_futimesat(res, (long)(dfd), (long)(filename), \ + (long)(utimes)) +#define __sanitizer_syscall_pre_faccessat(dfd, filename, mode) \ + __sanitizer_syscall_pre_impl_faccessat((long)(dfd), (long)(filename), \ + (long)(mode)) +#define __sanitizer_syscall_post_faccessat(res, dfd, filename, mode) \ + __sanitizer_syscall_post_impl_faccessat(res, (long)(dfd), (long)(filename), \ + (long)(mode)) +#define __sanitizer_syscall_pre_fchmodat(dfd, filename, mode) \ + __sanitizer_syscall_pre_impl_fchmodat((long)(dfd), (long)(filename), \ + (long)(mode)) +#define __sanitizer_syscall_post_fchmodat(res, dfd, filename, mode) \ + __sanitizer_syscall_post_impl_fchmodat(res, (long)(dfd), (long)(filename), \ + (long)(mode)) +#define __sanitizer_syscall_pre_fchownat(dfd, filename, user, group, flag) \ + __sanitizer_syscall_pre_impl_fchownat((long)(dfd), (long)(filename), \ + (long)(user), (long)(group), \ + (long)(flag)) +#define __sanitizer_syscall_post_fchownat(res, dfd, filename, user, group, \ + flag) \ + __sanitizer_syscall_post_impl_fchownat(res, (long)(dfd), (long)(filename), \ + (long)(user), (long)(group), \ + (long)(flag)) +#define __sanitizer_syscall_pre_openat(dfd, filename, flags, mode) \ + __sanitizer_syscall_pre_impl_openat((long)(dfd), (long)(filename), \ + (long)(flags), (long)(mode)) +#define __sanitizer_syscall_post_openat(res, dfd, filename, flags, mode) \ + __sanitizer_syscall_post_impl_openat(res, (long)(dfd), (long)(filename), \ + (long)(flags), (long)(mode)) +#define __sanitizer_syscall_pre_newfstatat(dfd, filename, statbuf, flag) \ + __sanitizer_syscall_pre_impl_newfstatat((long)(dfd), (long)(filename), \ + (long)(statbuf), (long)(flag)) +#define __sanitizer_syscall_post_newfstatat(res, dfd, filename, statbuf, flag) \ + __sanitizer_syscall_post_impl_newfstatat(res, (long)(dfd), (long)(filename), \ + (long)(statbuf), (long)(flag)) +#define __sanitizer_syscall_pre_fstatat64(dfd, filename, statbuf, flag) \ + __sanitizer_syscall_pre_impl_fstatat64((long)(dfd), (long)(filename), \ + (long)(statbuf), (long)(flag)) +#define __sanitizer_syscall_post_fstatat64(res, dfd, filename, statbuf, flag) \ + __sanitizer_syscall_post_impl_fstatat64(res, (long)(dfd), (long)(filename), \ + (long)(statbuf), (long)(flag)) +#define __sanitizer_syscall_pre_readlinkat(dfd, path, buf, bufsiz) \ + __sanitizer_syscall_pre_impl_readlinkat((long)(dfd), (long)(path), \ + (long)(buf), (long)(bufsiz)) +#define __sanitizer_syscall_post_readlinkat(res, dfd, path, buf, bufsiz) \ + __sanitizer_syscall_post_impl_readlinkat(res, (long)(dfd), (long)(path), \ + (long)(buf), (long)(bufsiz)) +#define __sanitizer_syscall_pre_utimensat(dfd, filename, utimes, flags) \ + __sanitizer_syscall_pre_impl_utimensat((long)(dfd), (long)(filename), \ + (long)(utimes), (long)(flags)) +#define __sanitizer_syscall_post_utimensat(res, dfd, filename, utimes, flags) \ + __sanitizer_syscall_post_impl_utimensat(res, (long)(dfd), (long)(filename), \ + (long)(utimes), (long)(flags)) +#define __sanitizer_syscall_pre_unshare(unshare_flags) \ + __sanitizer_syscall_pre_impl_unshare((long)(unshare_flags)) +#define __sanitizer_syscall_post_unshare(res, unshare_flags) \ + __sanitizer_syscall_post_impl_unshare(res, (long)(unshare_flags)) +#define __sanitizer_syscall_pre_splice(fd_in, off_in, fd_out, off_out, len, \ + flags) \ + __sanitizer_syscall_pre_impl_splice((long)(fd_in), (long)(off_in), \ + (long)(fd_out), (long)(off_out), \ + (long)(len), (long)(flags)) +#define __sanitizer_syscall_post_splice(res, fd_in, off_in, fd_out, off_out, \ + len, flags) \ + __sanitizer_syscall_post_impl_splice(res, (long)(fd_in), (long)(off_in), \ + (long)(fd_out), (long)(off_out), \ + (long)(len), (long)(flags)) +#define __sanitizer_syscall_pre_vmsplice(fd, iov, nr_segs, flags) \ + __sanitizer_syscall_pre_impl_vmsplice((long)(fd), (long)(iov), \ + (long)(nr_segs), (long)(flags)) +#define __sanitizer_syscall_post_vmsplice(res, fd, iov, nr_segs, flags) \ + __sanitizer_syscall_post_impl_vmsplice(res, (long)(fd), (long)(iov), \ + (long)(nr_segs), (long)(flags)) +#define __sanitizer_syscall_pre_tee(fdin, fdout, len, flags) \ + __sanitizer_syscall_pre_impl_tee((long)(fdin), (long)(fdout), (long)(len), \ + (long)(flags)) +#define __sanitizer_syscall_post_tee(res, fdin, fdout, len, flags) \ + __sanitizer_syscall_post_impl_tee(res, (long)(fdin), (long)(fdout), \ + (long)(len), (long)(flags)) +#define __sanitizer_syscall_pre_get_robust_list(pid, head_ptr, len_ptr) \ + __sanitizer_syscall_pre_impl_get_robust_list((long)(pid), (long)(head_ptr), \ + (long)(len_ptr)) +#define __sanitizer_syscall_post_get_robust_list(res, pid, head_ptr, len_ptr) \ + __sanitizer_syscall_post_impl_get_robust_list( \ + res, (long)(pid), (long)(head_ptr), (long)(len_ptr)) +#define __sanitizer_syscall_pre_set_robust_list(head, len) \ + __sanitizer_syscall_pre_impl_set_robust_list((long)(head), (long)(len)) +#define __sanitizer_syscall_post_set_robust_list(res, head, len) \ + __sanitizer_syscall_post_impl_set_robust_list(res, (long)(head), (long)(len)) +#define __sanitizer_syscall_pre_getcpu(cpu, node, cache) \ + __sanitizer_syscall_pre_impl_getcpu((long)(cpu), (long)(node), (long)(cache)) +#define __sanitizer_syscall_post_getcpu(res, cpu, node, cache) \ + __sanitizer_syscall_post_impl_getcpu(res, (long)(cpu), (long)(node), \ + (long)(cache)) +#define __sanitizer_syscall_pre_signalfd(ufd, user_mask, sizemask) \ + __sanitizer_syscall_pre_impl_signalfd((long)(ufd), (long)(user_mask), \ + (long)(sizemask)) +#define __sanitizer_syscall_post_signalfd(res, ufd, user_mask, sizemask) \ + __sanitizer_syscall_post_impl_signalfd(res, (long)(ufd), (long)(user_mask), \ + (long)(sizemask)) +#define __sanitizer_syscall_pre_signalfd4(ufd, user_mask, sizemask, flags) \ + __sanitizer_syscall_pre_impl_signalfd4((long)(ufd), (long)(user_mask), \ + (long)(sizemask), (long)(flags)) +#define __sanitizer_syscall_post_signalfd4(res, ufd, user_mask, sizemask, \ + flags) \ + __sanitizer_syscall_post_impl_signalfd4(res, (long)(ufd), (long)(user_mask), \ + (long)(sizemask), (long)(flags)) +#define __sanitizer_syscall_pre_timerfd_create(clockid, flags) \ + __sanitizer_syscall_pre_impl_timerfd_create((long)(clockid), (long)(flags)) +#define __sanitizer_syscall_post_timerfd_create(res, clockid, flags) \ + __sanitizer_syscall_post_impl_timerfd_create(res, (long)(clockid), \ + (long)(flags)) +#define __sanitizer_syscall_pre_timerfd_settime(ufd, flags, utmr, otmr) \ + __sanitizer_syscall_pre_impl_timerfd_settime((long)(ufd), (long)(flags), \ + (long)(utmr), (long)(otmr)) +#define __sanitizer_syscall_post_timerfd_settime(res, ufd, flags, utmr, otmr) \ + __sanitizer_syscall_post_impl_timerfd_settime( \ + res, (long)(ufd), (long)(flags), (long)(utmr), (long)(otmr)) +#define __sanitizer_syscall_pre_timerfd_gettime(ufd, otmr) \ + __sanitizer_syscall_pre_impl_timerfd_gettime((long)(ufd), (long)(otmr)) +#define __sanitizer_syscall_post_timerfd_gettime(res, ufd, otmr) \ + __sanitizer_syscall_post_impl_timerfd_gettime(res, (long)(ufd), (long)(otmr)) +#define __sanitizer_syscall_pre_eventfd(count) \ + __sanitizer_syscall_pre_impl_eventfd((long)(count)) +#define __sanitizer_syscall_post_eventfd(res, count) \ + __sanitizer_syscall_post_impl_eventfd(res, (long)(count)) +#define __sanitizer_syscall_pre_eventfd2(count, flags) \ + __sanitizer_syscall_pre_impl_eventfd2((long)(count), (long)(flags)) +#define __sanitizer_syscall_post_eventfd2(res, count, flags) \ + __sanitizer_syscall_post_impl_eventfd2(res, (long)(count), (long)(flags)) +#define __sanitizer_syscall_pre_old_readdir(arg0, arg1, arg2) \ + __sanitizer_syscall_pre_impl_old_readdir((long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_post_old_readdir(res, arg0, arg1, arg2) \ + __sanitizer_syscall_post_impl_old_readdir(res, (long)(arg0), (long)(arg1), \ + (long)(arg2)) +#define __sanitizer_syscall_pre_pselect6(arg0, arg1, arg2, arg3, arg4, arg5) \ + __sanitizer_syscall_pre_impl_pselect6((long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_post_pselect6(res, arg0, arg1, arg2, arg3, arg4, \ + arg5) \ + __sanitizer_syscall_post_impl_pselect6(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4), (long)(arg5)) +#define __sanitizer_syscall_pre_ppoll(arg0, arg1, arg2, arg3, arg4) \ + __sanitizer_syscall_pre_impl_ppoll((long)(arg0), (long)(arg1), (long)(arg2), \ + (long)(arg3), (long)(arg4)) +#define __sanitizer_syscall_post_ppoll(res, arg0, arg1, arg2, arg3, arg4) \ + __sanitizer_syscall_post_impl_ppoll(res, (long)(arg0), (long)(arg1), \ + (long)(arg2), (long)(arg3), \ + (long)(arg4)) +#define __sanitizer_syscall_pre_syncfs(fd) \ + __sanitizer_syscall_pre_impl_syncfs((long)(fd)) +#define __sanitizer_syscall_post_syncfs(res, fd) \ + __sanitizer_syscall_post_impl_syncfs(res, (long)(fd)) +#define __sanitizer_syscall_pre_perf_event_open(attr_uptr, pid, cpu, group_fd, \ + flags) \ + __sanitizer_syscall_pre_impl_perf_event_open((long)(attr_uptr), (long)(pid), \ + (long)(cpu), (long)(group_fd), \ + (long)(flags)) +#define __sanitizer_syscall_post_perf_event_open(res, attr_uptr, pid, cpu, \ + group_fd, flags) \ + __sanitizer_syscall_post_impl_perf_event_open( \ + res, (long)(attr_uptr), (long)(pid), (long)(cpu), (long)(group_fd), \ + (long)(flags)) +#define __sanitizer_syscall_pre_mmap_pgoff(addr, len, prot, flags, fd, pgoff) \ + __sanitizer_syscall_pre_impl_mmap_pgoff((long)(addr), (long)(len), \ + (long)(prot), (long)(flags), \ + (long)(fd), (long)(pgoff)) +#define __sanitizer_syscall_post_mmap_pgoff(res, addr, len, prot, flags, fd, \ + pgoff) \ + __sanitizer_syscall_post_impl_mmap_pgoff(res, (long)(addr), (long)(len), \ + (long)(prot), (long)(flags), \ + (long)(fd), (long)(pgoff)) +#define __sanitizer_syscall_pre_old_mmap(arg) \ + __sanitizer_syscall_pre_impl_old_mmap((long)(arg)) +#define __sanitizer_syscall_post_old_mmap(res, arg) \ + __sanitizer_syscall_post_impl_old_mmap(res, (long)(arg)) +#define __sanitizer_syscall_pre_name_to_handle_at(dfd, name, handle, mnt_id, \ + flag) \ + __sanitizer_syscall_pre_impl_name_to_handle_at( \ + (long)(dfd), (long)(name), (long)(handle), (long)(mnt_id), (long)(flag)) +#define __sanitizer_syscall_post_name_to_handle_at(res, dfd, name, handle, \ + mnt_id, flag) \ + __sanitizer_syscall_post_impl_name_to_handle_at( \ + res, (long)(dfd), (long)(name), (long)(handle), (long)(mnt_id), \ + (long)(flag)) +#define __sanitizer_syscall_pre_open_by_handle_at(mountdirfd, handle, flags) \ + __sanitizer_syscall_pre_impl_open_by_handle_at( \ + (long)(mountdirfd), (long)(handle), (long)(flags)) +#define __sanitizer_syscall_post_open_by_handle_at(res, mountdirfd, handle, \ + flags) \ + __sanitizer_syscall_post_impl_open_by_handle_at( \ + res, (long)(mountdirfd), (long)(handle), (long)(flags)) +#define __sanitizer_syscall_pre_setns(fd, nstype) \ + __sanitizer_syscall_pre_impl_setns((long)(fd), (long)(nstype)) +#define __sanitizer_syscall_post_setns(res, fd, nstype) \ + __sanitizer_syscall_post_impl_setns(res, (long)(fd), (long)(nstype)) +#define __sanitizer_syscall_pre_process_vm_readv(pid, lvec, liovcnt, rvec, \ + riovcnt, flags) \ + __sanitizer_syscall_pre_impl_process_vm_readv( \ + (long)(pid), (long)(lvec), (long)(liovcnt), (long)(rvec), \ + (long)(riovcnt), (long)(flags)) +#define __sanitizer_syscall_post_process_vm_readv(res, pid, lvec, liovcnt, \ + rvec, riovcnt, flags) \ + __sanitizer_syscall_post_impl_process_vm_readv( \ + res, (long)(pid), (long)(lvec), (long)(liovcnt), (long)(rvec), \ + (long)(riovcnt), (long)(flags)) +#define __sanitizer_syscall_pre_process_vm_writev(pid, lvec, liovcnt, rvec, \ + riovcnt, flags) \ + __sanitizer_syscall_pre_impl_process_vm_writev( \ + (long)(pid), (long)(lvec), (long)(liovcnt), (long)(rvec), \ + (long)(riovcnt), (long)(flags)) +#define __sanitizer_syscall_post_process_vm_writev(res, pid, lvec, liovcnt, \ + rvec, riovcnt, flags) \ + __sanitizer_syscall_post_impl_process_vm_writev( \ + res, (long)(pid), (long)(lvec), (long)(liovcnt), (long)(rvec), \ + (long)(riovcnt), (long)(flags)) +#define __sanitizer_syscall_pre_fork() __sanitizer_syscall_pre_impl_fork() +#define __sanitizer_syscall_post_fork(res) \ + __sanitizer_syscall_post_impl_fork(res) +#define __sanitizer_syscall_pre_vfork() __sanitizer_syscall_pre_impl_vfork() +#define __sanitizer_syscall_post_vfork(res) \ + __sanitizer_syscall_post_impl_vfork(res) +#define __sanitizer_syscall_pre_sigaction(signum, act, oldact) \ + __sanitizer_syscall_pre_impl_sigaction((long)signum, (long)act, (long)oldact) +#define __sanitizer_syscall_post_sigaction(res, signum, act, oldact) \ + __sanitizer_syscall_post_impl_sigaction(res, (long)signum, (long)act, \ + (long)oldact) +#define __sanitizer_syscall_pre_rt_sigaction(signum, act, oldact, sz) \ + __sanitizer_syscall_pre_impl_rt_sigaction((long)signum, (long)act, \ + (long)oldact, (long)sz) +#define __sanitizer_syscall_post_rt_sigaction(res, signum, act, oldact, sz) \ + __sanitizer_syscall_post_impl_rt_sigaction(res, (long)signum, (long)act, \ + (long)oldact, (long)sz) +#define __sanitizer_syscall_pre_sigaltstack(ss, oss) \ + __sanitizer_syscall_pre_impl_sigaltstack((long)ss, (long)oss) +#define __sanitizer_syscall_post_sigaltstack(res, ss, oss) \ + __sanitizer_syscall_post_impl_sigaltstack(res, (long)ss, (long)oss) +#define __sanitizer_syscall_pre_futex(uaddr, futex_op, val, timeout, uaddr2, \ + val3) \ + __sanitizer_syscall_pre_impl_futex((long)uaddr, (long)futex_op, (long)val, \ + (long)timeout, (long)uaddr2, (long)val3) +#define __sanitizer_syscall_post_futex(res, uaddr, futex_op, val, timeout, \ + uaddr2, val3) \ + __sanitizer_syscall_post_impl_futex(res, (long)uaddr, (long)futex_op, \ + (long)val, (long)timeout, (long)uaddr2, \ + (long)val3) + +// And now a few syscalls we don't handle yet. +#define __sanitizer_syscall_pre_afs_syscall(...) +#define __sanitizer_syscall_pre_arch_prctl(...) +#define __sanitizer_syscall_pre_break(...) +#define __sanitizer_syscall_pre_chown32(...) +#define __sanitizer_syscall_pre_clone(...) +#define __sanitizer_syscall_pre_create_module(...) +#define __sanitizer_syscall_pre_epoll_ctl_old(...) +#define __sanitizer_syscall_pre_epoll_wait_old(...) +#define __sanitizer_syscall_pre_execve(...) +#define __sanitizer_syscall_pre_fadvise64(...) +#define __sanitizer_syscall_pre_fadvise64_64(...) +#define __sanitizer_syscall_pre_fallocate(...) +#define __sanitizer_syscall_pre_fanotify_init(...) +#define __sanitizer_syscall_pre_fanotify_mark(...) +#define __sanitizer_syscall_pre_fchown32(...) +#define __sanitizer_syscall_pre_ftime(...) +#define __sanitizer_syscall_pre_ftruncate64(...) +#define __sanitizer_syscall_pre_getegid32(...) +#define __sanitizer_syscall_pre_geteuid32(...) +#define __sanitizer_syscall_pre_getgid32(...) +#define __sanitizer_syscall_pre_getgroups32(...) +#define __sanitizer_syscall_pre_get_kernel_syms(...) +#define __sanitizer_syscall_pre_getpmsg(...) +#define __sanitizer_syscall_pre_getresgid32(...) +#define __sanitizer_syscall_pre_getresuid32(...) +#define __sanitizer_syscall_pre_get_thread_area(...) +#define __sanitizer_syscall_pre_getuid32(...) +#define __sanitizer_syscall_pre_gtty(...) +#define __sanitizer_syscall_pre_idle(...) +#define __sanitizer_syscall_pre_iopl(...) +#define __sanitizer_syscall_pre_lchown32(...) +#define __sanitizer_syscall_pre__llseek(...) +#define __sanitizer_syscall_pre_lock(...) +#define __sanitizer_syscall_pre_madvise1(...) +#define __sanitizer_syscall_pre_mmap(...) +#define __sanitizer_syscall_pre_mmap2(...) +#define __sanitizer_syscall_pre_modify_ldt(...) +#define __sanitizer_syscall_pre_mpx(...) +#define __sanitizer_syscall_pre__newselect(...) +#define __sanitizer_syscall_pre_nfsservctl(...) +#define __sanitizer_syscall_pre_oldfstat(...) +#define __sanitizer_syscall_pre_oldlstat(...) +#define __sanitizer_syscall_pre_oldolduname(...) +#define __sanitizer_syscall_pre_oldstat(...) +#define __sanitizer_syscall_pre_prctl(...) +#define __sanitizer_syscall_pre_prof(...) +#define __sanitizer_syscall_pre_profil(...) +#define __sanitizer_syscall_pre_putpmsg(...) +#define __sanitizer_syscall_pre_query_module(...) +#define __sanitizer_syscall_pre_readahead(...) +#define __sanitizer_syscall_pre_readdir(...) +#define __sanitizer_syscall_pre_rt_sigreturn(...) +#define __sanitizer_syscall_pre_rt_sigsuspend(...) +#define __sanitizer_syscall_pre_security(...) +#define __sanitizer_syscall_pre_setfsgid32(...) +#define __sanitizer_syscall_pre_setfsuid32(...) +#define __sanitizer_syscall_pre_setgid32(...) +#define __sanitizer_syscall_pre_setgroups32(...) +#define __sanitizer_syscall_pre_setregid32(...) +#define __sanitizer_syscall_pre_setresgid32(...) +#define __sanitizer_syscall_pre_setresuid32(...) +#define __sanitizer_syscall_pre_setreuid32(...) +#define __sanitizer_syscall_pre_set_thread_area(...) +#define __sanitizer_syscall_pre_setuid32(...) +#define __sanitizer_syscall_pre_sigreturn(...) +#define __sanitizer_syscall_pre_sigsuspend(...) +#define __sanitizer_syscall_pre_stty(...) +#define __sanitizer_syscall_pre_sync_file_range(...) +#define __sanitizer_syscall_pre__sysctl(...) +#define __sanitizer_syscall_pre_truncate64(...) +#define __sanitizer_syscall_pre_tuxcall(...) +#define __sanitizer_syscall_pre_ugetrlimit(...) +#define __sanitizer_syscall_pre_ulimit(...) +#define __sanitizer_syscall_pre_umount2(...) +#define __sanitizer_syscall_pre_vm86(...) +#define __sanitizer_syscall_pre_vm86old(...) +#define __sanitizer_syscall_pre_vserver(...) + +#define __sanitizer_syscall_post_afs_syscall(res, ...) +#define __sanitizer_syscall_post_arch_prctl(res, ...) +#define __sanitizer_syscall_post_break(res, ...) +#define __sanitizer_syscall_post_chown32(res, ...) +#define __sanitizer_syscall_post_clone(res, ...) +#define __sanitizer_syscall_post_create_module(res, ...) +#define __sanitizer_syscall_post_epoll_ctl_old(res, ...) +#define __sanitizer_syscall_post_epoll_wait_old(res, ...) +#define __sanitizer_syscall_post_execve(res, ...) +#define __sanitizer_syscall_post_fadvise64(res, ...) +#define __sanitizer_syscall_post_fadvise64_64(res, ...) +#define __sanitizer_syscall_post_fallocate(res, ...) +#define __sanitizer_syscall_post_fanotify_init(res, ...) +#define __sanitizer_syscall_post_fanotify_mark(res, ...) +#define __sanitizer_syscall_post_fchown32(res, ...) +#define __sanitizer_syscall_post_ftime(res, ...) +#define __sanitizer_syscall_post_ftruncate64(res, ...) +#define __sanitizer_syscall_post_getegid32(res, ...) +#define __sanitizer_syscall_post_geteuid32(res, ...) +#define __sanitizer_syscall_post_getgid32(res, ...) +#define __sanitizer_syscall_post_getgroups32(res, ...) +#define __sanitizer_syscall_post_get_kernel_syms(res, ...) +#define __sanitizer_syscall_post_getpmsg(res, ...) +#define __sanitizer_syscall_post_getresgid32(res, ...) +#define __sanitizer_syscall_post_getresuid32(res, ...) +#define __sanitizer_syscall_post_get_thread_area(res, ...) +#define __sanitizer_syscall_post_getuid32(res, ...) +#define __sanitizer_syscall_post_gtty(res, ...) +#define __sanitizer_syscall_post_idle(res, ...) +#define __sanitizer_syscall_post_iopl(res, ...) +#define __sanitizer_syscall_post_lchown32(res, ...) +#define __sanitizer_syscall_post__llseek(res, ...) +#define __sanitizer_syscall_post_lock(res, ...) +#define __sanitizer_syscall_post_madvise1(res, ...) +#define __sanitizer_syscall_post_mmap2(res, ...) +#define __sanitizer_syscall_post_mmap(res, ...) +#define __sanitizer_syscall_post_modify_ldt(res, ...) +#define __sanitizer_syscall_post_mpx(res, ...) +#define __sanitizer_syscall_post__newselect(res, ...) +#define __sanitizer_syscall_post_nfsservctl(res, ...) +#define __sanitizer_syscall_post_oldfstat(res, ...) +#define __sanitizer_syscall_post_oldlstat(res, ...) +#define __sanitizer_syscall_post_oldolduname(res, ...) +#define __sanitizer_syscall_post_oldstat(res, ...) +#define __sanitizer_syscall_post_prctl(res, ...) +#define __sanitizer_syscall_post_profil(res, ...) +#define __sanitizer_syscall_post_prof(res, ...) +#define __sanitizer_syscall_post_putpmsg(res, ...) +#define __sanitizer_syscall_post_query_module(res, ...) +#define __sanitizer_syscall_post_readahead(res, ...) +#define __sanitizer_syscall_post_readdir(res, ...) +#define __sanitizer_syscall_post_rt_sigreturn(res, ...) +#define __sanitizer_syscall_post_rt_sigsuspend(res, ...) +#define __sanitizer_syscall_post_security(res, ...) +#define __sanitizer_syscall_post_setfsgid32(res, ...) +#define __sanitizer_syscall_post_setfsuid32(res, ...) +#define __sanitizer_syscall_post_setgid32(res, ...) +#define __sanitizer_syscall_post_setgroups32(res, ...) +#define __sanitizer_syscall_post_setregid32(res, ...) +#define __sanitizer_syscall_post_setresgid32(res, ...) +#define __sanitizer_syscall_post_setresuid32(res, ...) +#define __sanitizer_syscall_post_setreuid32(res, ...) +#define __sanitizer_syscall_post_set_thread_area(res, ...) +#define __sanitizer_syscall_post_setuid32(res, ...) +#define __sanitizer_syscall_post_sigreturn(res, ...) +#define __sanitizer_syscall_post_sigsuspend(res, ...) +#define __sanitizer_syscall_post_stty(res, ...) +#define __sanitizer_syscall_post_sync_file_range(res, ...) +#define __sanitizer_syscall_post__sysctl(res, ...) +#define __sanitizer_syscall_post_truncate64(res, ...) +#define __sanitizer_syscall_post_tuxcall(res, ...) +#define __sanitizer_syscall_post_ugetrlimit(res, ...) +#define __sanitizer_syscall_post_ulimit(res, ...) +#define __sanitizer_syscall_post_umount2(res, ...) +#define __sanitizer_syscall_post_vm86old(res, ...) +#define __sanitizer_syscall_post_vm86(res, ...) +#define __sanitizer_syscall_post_vserver(res, ...) + +#ifdef __cplusplus +extern "C" { +#endif + +// Private declarations. Do not call directly from user code. Use macros above. +void __sanitizer_syscall_pre_impl_time(long tloc); +void __sanitizer_syscall_post_impl_time(long res, long tloc); +void __sanitizer_syscall_pre_impl_stime(long tptr); +void __sanitizer_syscall_post_impl_stime(long res, long tptr); +void __sanitizer_syscall_pre_impl_gettimeofday(long tv, long tz); +void __sanitizer_syscall_post_impl_gettimeofday(long res, long tv, long tz); +void __sanitizer_syscall_pre_impl_settimeofday(long tv, long tz); +void __sanitizer_syscall_post_impl_settimeofday(long res, long tv, long tz); +void __sanitizer_syscall_pre_impl_adjtimex(long txc_p); +void __sanitizer_syscall_post_impl_adjtimex(long res, long txc_p); +void __sanitizer_syscall_pre_impl_times(long tbuf); +void __sanitizer_syscall_post_impl_times(long res, long tbuf); +void __sanitizer_syscall_pre_impl_gettid(); +void __sanitizer_syscall_post_impl_gettid(long res); +void __sanitizer_syscall_pre_impl_nanosleep(long rqtp, long rmtp); +void __sanitizer_syscall_post_impl_nanosleep(long res, long rqtp, long rmtp); +void __sanitizer_syscall_pre_impl_alarm(long seconds); +void __sanitizer_syscall_post_impl_alarm(long res, long seconds); +void __sanitizer_syscall_pre_impl_getpid(); +void __sanitizer_syscall_post_impl_getpid(long res); +void __sanitizer_syscall_pre_impl_getppid(); +void __sanitizer_syscall_post_impl_getppid(long res); +void __sanitizer_syscall_pre_impl_getuid(); +void __sanitizer_syscall_post_impl_getuid(long res); +void __sanitizer_syscall_pre_impl_geteuid(); +void __sanitizer_syscall_post_impl_geteuid(long res); +void __sanitizer_syscall_pre_impl_getgid(); +void __sanitizer_syscall_post_impl_getgid(long res); +void __sanitizer_syscall_pre_impl_getegid(); +void __sanitizer_syscall_post_impl_getegid(long res); +void __sanitizer_syscall_pre_impl_getresuid(long ruid, long euid, long suid); +void __sanitizer_syscall_post_impl_getresuid(long res, long ruid, long euid, + long suid); +void __sanitizer_syscall_pre_impl_getresgid(long rgid, long egid, long sgid); +void __sanitizer_syscall_post_impl_getresgid(long res, long rgid, long egid, + long sgid); +void __sanitizer_syscall_pre_impl_getpgid(long pid); +void __sanitizer_syscall_post_impl_getpgid(long res, long pid); +void __sanitizer_syscall_pre_impl_getpgrp(); +void __sanitizer_syscall_post_impl_getpgrp(long res); +void __sanitizer_syscall_pre_impl_getsid(long pid); +void __sanitizer_syscall_post_impl_getsid(long res, long pid); +void __sanitizer_syscall_pre_impl_getgroups(long gidsetsize, long grouplist); +void __sanitizer_syscall_post_impl_getgroups(long res, long gidsetsize, + long grouplist); +void __sanitizer_syscall_pre_impl_setregid(long rgid, long egid); +void __sanitizer_syscall_post_impl_setregid(long res, long rgid, long egid); +void __sanitizer_syscall_pre_impl_setgid(long gid); +void __sanitizer_syscall_post_impl_setgid(long res, long gid); +void __sanitizer_syscall_pre_impl_setreuid(long ruid, long euid); +void __sanitizer_syscall_post_impl_setreuid(long res, long ruid, long euid); +void __sanitizer_syscall_pre_impl_setuid(long uid); +void __sanitizer_syscall_post_impl_setuid(long res, long uid); +void __sanitizer_syscall_pre_impl_setresuid(long ruid, long euid, long suid); +void __sanitizer_syscall_post_impl_setresuid(long res, long ruid, long euid, + long suid); +void __sanitizer_syscall_pre_impl_setresgid(long rgid, long egid, long sgid); +void __sanitizer_syscall_post_impl_setresgid(long res, long rgid, long egid, + long sgid); +void __sanitizer_syscall_pre_impl_setfsuid(long uid); +void __sanitizer_syscall_post_impl_setfsuid(long res, long uid); +void __sanitizer_syscall_pre_impl_setfsgid(long gid); +void __sanitizer_syscall_post_impl_setfsgid(long res, long gid); +void __sanitizer_syscall_pre_impl_setpgid(long pid, long pgid); +void __sanitizer_syscall_post_impl_setpgid(long res, long pid, long pgid); +void __sanitizer_syscall_pre_impl_setsid(); +void __sanitizer_syscall_post_impl_setsid(long res); +void __sanitizer_syscall_pre_impl_setgroups(long gidsetsize, long grouplist); +void __sanitizer_syscall_post_impl_setgroups(long res, long gidsetsize, + long grouplist); +void __sanitizer_syscall_pre_impl_acct(long name); +void __sanitizer_syscall_post_impl_acct(long res, long name); +void __sanitizer_syscall_pre_impl_capget(long header, long dataptr); +void __sanitizer_syscall_post_impl_capget(long res, long header, long dataptr); +void __sanitizer_syscall_pre_impl_capset(long header, long data); +void __sanitizer_syscall_post_impl_capset(long res, long header, long data); +void __sanitizer_syscall_pre_impl_personality(long personality); +void __sanitizer_syscall_post_impl_personality(long res, long personality); +void __sanitizer_syscall_pre_impl_sigpending(long set); +void __sanitizer_syscall_post_impl_sigpending(long res, long set); +void __sanitizer_syscall_pre_impl_sigprocmask(long how, long set, long oset); +void __sanitizer_syscall_post_impl_sigprocmask(long res, long how, long set, + long oset); +void __sanitizer_syscall_pre_impl_getitimer(long which, long value); +void __sanitizer_syscall_post_impl_getitimer(long res, long which, long value); +void __sanitizer_syscall_pre_impl_setitimer(long which, long value, + long ovalue); +void __sanitizer_syscall_post_impl_setitimer(long res, long which, long value, + long ovalue); +void __sanitizer_syscall_pre_impl_timer_create(long which_clock, + long timer_event_spec, + long created_timer_id); +void __sanitizer_syscall_post_impl_timer_create(long res, long which_clock, + long timer_event_spec, + long created_timer_id); +void __sanitizer_syscall_pre_impl_timer_gettime(long timer_id, long setting); +void __sanitizer_syscall_post_impl_timer_gettime(long res, long timer_id, + long setting); +void __sanitizer_syscall_pre_impl_timer_getoverrun(long timer_id); +void __sanitizer_syscall_post_impl_timer_getoverrun(long res, long timer_id); +void __sanitizer_syscall_pre_impl_timer_settime(long timer_id, long flags, + long new_setting, + long old_setting); +void __sanitizer_syscall_post_impl_timer_settime(long res, long timer_id, + long flags, long new_setting, + long old_setting); +void __sanitizer_syscall_pre_impl_timer_delete(long timer_id); +void __sanitizer_syscall_post_impl_timer_delete(long res, long timer_id); +void __sanitizer_syscall_pre_impl_clock_settime(long which_clock, long tp); +void __sanitizer_syscall_post_impl_clock_settime(long res, long which_clock, + long tp); +void __sanitizer_syscall_pre_impl_clock_gettime(long which_clock, long tp); +void __sanitizer_syscall_post_impl_clock_gettime(long res, long which_clock, + long tp); +void __sanitizer_syscall_pre_impl_clock_adjtime(long which_clock, long tx); +void __sanitizer_syscall_post_impl_clock_adjtime(long res, long which_clock, + long tx); +void __sanitizer_syscall_pre_impl_clock_getres(long which_clock, long tp); +void __sanitizer_syscall_post_impl_clock_getres(long res, long which_clock, + long tp); +void __sanitizer_syscall_pre_impl_clock_nanosleep(long which_clock, long flags, + long rqtp, long rmtp); +void __sanitizer_syscall_post_impl_clock_nanosleep(long res, long which_clock, + long flags, long rqtp, + long rmtp); +void __sanitizer_syscall_pre_impl_nice(long increment); +void __sanitizer_syscall_post_impl_nice(long res, long increment); +void __sanitizer_syscall_pre_impl_sched_setscheduler(long pid, long policy, + long param); +void __sanitizer_syscall_post_impl_sched_setscheduler(long res, long pid, + long policy, long param); +void __sanitizer_syscall_pre_impl_sched_setparam(long pid, long param); +void __sanitizer_syscall_post_impl_sched_setparam(long res, long pid, + long param); +void __sanitizer_syscall_pre_impl_sched_getscheduler(long pid); +void __sanitizer_syscall_post_impl_sched_getscheduler(long res, long pid); +void __sanitizer_syscall_pre_impl_sched_getparam(long pid, long param); +void __sanitizer_syscall_post_impl_sched_getparam(long res, long pid, + long param); +void __sanitizer_syscall_pre_impl_sched_setaffinity(long pid, long len, + long user_mask_ptr); +void __sanitizer_syscall_post_impl_sched_setaffinity(long res, long pid, + long len, + long user_mask_ptr); +void __sanitizer_syscall_pre_impl_sched_getaffinity(long pid, long len, + long user_mask_ptr); +void __sanitizer_syscall_post_impl_sched_getaffinity(long res, long pid, + long len, + long user_mask_ptr); +void __sanitizer_syscall_pre_impl_sched_yield(); +void __sanitizer_syscall_post_impl_sched_yield(long res); +void __sanitizer_syscall_pre_impl_sched_get_priority_max(long policy); +void __sanitizer_syscall_post_impl_sched_get_priority_max(long res, + long policy); +void __sanitizer_syscall_pre_impl_sched_get_priority_min(long policy); +void __sanitizer_syscall_post_impl_sched_get_priority_min(long res, + long policy); +void __sanitizer_syscall_pre_impl_sched_rr_get_interval(long pid, + long interval); +void __sanitizer_syscall_post_impl_sched_rr_get_interval(long res, long pid, + long interval); +void __sanitizer_syscall_pre_impl_setpriority(long which, long who, + long niceval); +void __sanitizer_syscall_post_impl_setpriority(long res, long which, long who, + long niceval); +void __sanitizer_syscall_pre_impl_getpriority(long which, long who); +void __sanitizer_syscall_post_impl_getpriority(long res, long which, long who); +void __sanitizer_syscall_pre_impl_shutdown(long arg0, long arg1); +void __sanitizer_syscall_post_impl_shutdown(long res, long arg0, long arg1); +void __sanitizer_syscall_pre_impl_reboot(long magic1, long magic2, long cmd, + long arg); +void __sanitizer_syscall_post_impl_reboot(long res, long magic1, long magic2, + long cmd, long arg); +void __sanitizer_syscall_pre_impl_restart_syscall(); +void __sanitizer_syscall_post_impl_restart_syscall(long res); +void __sanitizer_syscall_pre_impl_kexec_load(long entry, long nr_segments, + long segments, long flags); +void __sanitizer_syscall_post_impl_kexec_load(long res, long entry, + long nr_segments, long segments, + long flags); +void __sanitizer_syscall_pre_impl_exit(long error_code); +void __sanitizer_syscall_post_impl_exit(long res, long error_code); +void __sanitizer_syscall_pre_impl_exit_group(long error_code); +void __sanitizer_syscall_post_impl_exit_group(long res, long error_code); +void __sanitizer_syscall_pre_impl_wait4(long pid, long stat_addr, long options, + long ru); +void __sanitizer_syscall_post_impl_wait4(long res, long pid, long stat_addr, + long options, long ru); +void __sanitizer_syscall_pre_impl_waitid(long which, long pid, long infop, + long options, long ru); +void __sanitizer_syscall_post_impl_waitid(long res, long which, long pid, + long infop, long options, long ru); +void __sanitizer_syscall_pre_impl_waitpid(long pid, long stat_addr, + long options); +void __sanitizer_syscall_post_impl_waitpid(long res, long pid, long stat_addr, + long options); +void __sanitizer_syscall_pre_impl_set_tid_address(long tidptr); +void __sanitizer_syscall_post_impl_set_tid_address(long res, long tidptr); +void __sanitizer_syscall_pre_impl_init_module(long umod, long len, long uargs); +void __sanitizer_syscall_post_impl_init_module(long res, long umod, long len, + long uargs); +void __sanitizer_syscall_pre_impl_delete_module(long name_user, long flags); +void __sanitizer_syscall_post_impl_delete_module(long res, long name_user, + long flags); +void __sanitizer_syscall_pre_impl_rt_sigprocmask(long how, long set, long oset, + long sigsetsize); +void __sanitizer_syscall_post_impl_rt_sigprocmask(long res, long how, long set, + long oset, long sigsetsize); +void __sanitizer_syscall_pre_impl_rt_sigpending(long set, long sigsetsize); +void __sanitizer_syscall_post_impl_rt_sigpending(long res, long set, + long sigsetsize); +void __sanitizer_syscall_pre_impl_rt_sigtimedwait(long uthese, long uinfo, + long uts, long sigsetsize); +void __sanitizer_syscall_post_impl_rt_sigtimedwait(long res, long uthese, + long uinfo, long uts, + long sigsetsize); +void __sanitizer_syscall_pre_impl_rt_tgsigqueueinfo(long tgid, long pid, + long sig, long uinfo); +void __sanitizer_syscall_post_impl_rt_tgsigqueueinfo(long res, long tgid, + long pid, long sig, + long uinfo); +void __sanitizer_syscall_pre_impl_kill(long pid, long sig); +void __sanitizer_syscall_post_impl_kill(long res, long pid, long sig); +void __sanitizer_syscall_pre_impl_tgkill(long tgid, long pid, long sig); +void __sanitizer_syscall_post_impl_tgkill(long res, long tgid, long pid, + long sig); +void __sanitizer_syscall_pre_impl_tkill(long pid, long sig); +void __sanitizer_syscall_post_impl_tkill(long res, long pid, long sig); +void __sanitizer_syscall_pre_impl_rt_sigqueueinfo(long pid, long sig, + long uinfo); +void __sanitizer_syscall_post_impl_rt_sigqueueinfo(long res, long pid, long sig, + long uinfo); +void __sanitizer_syscall_pre_impl_sgetmask(); +void __sanitizer_syscall_post_impl_sgetmask(long res); +void __sanitizer_syscall_pre_impl_ssetmask(long newmask); +void __sanitizer_syscall_post_impl_ssetmask(long res, long newmask); +void __sanitizer_syscall_pre_impl_signal(long sig, long handler); +void __sanitizer_syscall_post_impl_signal(long res, long sig, long handler); +void __sanitizer_syscall_pre_impl_pause(); +void __sanitizer_syscall_post_impl_pause(long res); +void __sanitizer_syscall_pre_impl_sync(); +void __sanitizer_syscall_post_impl_sync(long res); +void __sanitizer_syscall_pre_impl_fsync(long fd); +void __sanitizer_syscall_post_impl_fsync(long res, long fd); +void __sanitizer_syscall_pre_impl_fdatasync(long fd); +void __sanitizer_syscall_post_impl_fdatasync(long res, long fd); +void __sanitizer_syscall_pre_impl_bdflush(long func, long data); +void __sanitizer_syscall_post_impl_bdflush(long res, long func, long data); +void __sanitizer_syscall_pre_impl_mount(long dev_name, long dir_name, long type, + long flags, long data); +void __sanitizer_syscall_post_impl_mount(long res, long dev_name, long dir_name, + long type, long flags, long data); +void __sanitizer_syscall_pre_impl_umount(long name, long flags); +void __sanitizer_syscall_post_impl_umount(long res, long name, long flags); +void __sanitizer_syscall_pre_impl_oldumount(long name); +void __sanitizer_syscall_post_impl_oldumount(long res, long name); +void __sanitizer_syscall_pre_impl_truncate(long path, long length); +void __sanitizer_syscall_post_impl_truncate(long res, long path, long length); +void __sanitizer_syscall_pre_impl_ftruncate(long fd, long length); +void __sanitizer_syscall_post_impl_ftruncate(long res, long fd, long length); +void __sanitizer_syscall_pre_impl_stat(long filename, long statbuf); +void __sanitizer_syscall_post_impl_stat(long res, long filename, long statbuf); +void __sanitizer_syscall_pre_impl_statfs(long path, long buf); +void __sanitizer_syscall_post_impl_statfs(long res, long path, long buf); +void __sanitizer_syscall_pre_impl_statfs64(long path, long sz, long buf); +void __sanitizer_syscall_post_impl_statfs64(long res, long path, long sz, + long buf); +void __sanitizer_syscall_pre_impl_fstatfs(long fd, long buf); +void __sanitizer_syscall_post_impl_fstatfs(long res, long fd, long buf); +void __sanitizer_syscall_pre_impl_fstatfs64(long fd, long sz, long buf); +void __sanitizer_syscall_post_impl_fstatfs64(long res, long fd, long sz, + long buf); +void __sanitizer_syscall_pre_impl_lstat(long filename, long statbuf); +void __sanitizer_syscall_post_impl_lstat(long res, long filename, long statbuf); +void __sanitizer_syscall_pre_impl_fstat(long fd, long statbuf); +void __sanitizer_syscall_post_impl_fstat(long res, long fd, long statbuf); +void __sanitizer_syscall_pre_impl_newstat(long filename, long statbuf); +void __sanitizer_syscall_post_impl_newstat(long res, long filename, + long statbuf); +void __sanitizer_syscall_pre_impl_newlstat(long filename, long statbuf); +void __sanitizer_syscall_post_impl_newlstat(long res, long filename, + long statbuf); +void __sanitizer_syscall_pre_impl_newfstat(long fd, long statbuf); +void __sanitizer_syscall_post_impl_newfstat(long res, long fd, long statbuf); +void __sanitizer_syscall_pre_impl_ustat(long dev, long ubuf); +void __sanitizer_syscall_post_impl_ustat(long res, long dev, long ubuf); +void __sanitizer_syscall_pre_impl_stat64(long filename, long statbuf); +void __sanitizer_syscall_post_impl_stat64(long res, long filename, + long statbuf); +void __sanitizer_syscall_pre_impl_fstat64(long fd, long statbuf); +void __sanitizer_syscall_post_impl_fstat64(long res, long fd, long statbuf); +void __sanitizer_syscall_pre_impl_lstat64(long filename, long statbuf); +void __sanitizer_syscall_post_impl_lstat64(long res, long filename, + long statbuf); +void __sanitizer_syscall_pre_impl_setxattr(long path, long name, long value, + long size, long flags); +void __sanitizer_syscall_post_impl_setxattr(long res, long path, long name, + long value, long size, long flags); +void __sanitizer_syscall_pre_impl_lsetxattr(long path, long name, long value, + long size, long flags); +void __sanitizer_syscall_post_impl_lsetxattr(long res, long path, long name, + long value, long size, long flags); +void __sanitizer_syscall_pre_impl_fsetxattr(long fd, long name, long value, + long size, long flags); +void __sanitizer_syscall_post_impl_fsetxattr(long res, long fd, long name, + long value, long size, long flags); +void __sanitizer_syscall_pre_impl_getxattr(long path, long name, long value, + long size); +void __sanitizer_syscall_post_impl_getxattr(long res, long path, long name, + long value, long size); +void __sanitizer_syscall_pre_impl_lgetxattr(long path, long name, long value, + long size); +void __sanitizer_syscall_post_impl_lgetxattr(long res, long path, long name, + long value, long size); +void __sanitizer_syscall_pre_impl_fgetxattr(long fd, long name, long value, + long size); +void __sanitizer_syscall_post_impl_fgetxattr(long res, long fd, long name, + long value, long size); +void __sanitizer_syscall_pre_impl_listxattr(long path, long list, long size); +void __sanitizer_syscall_post_impl_listxattr(long res, long path, long list, + long size); +void __sanitizer_syscall_pre_impl_llistxattr(long path, long list, long size); +void __sanitizer_syscall_post_impl_llistxattr(long res, long path, long list, + long size); +void __sanitizer_syscall_pre_impl_flistxattr(long fd, long list, long size); +void __sanitizer_syscall_post_impl_flistxattr(long res, long fd, long list, + long size); +void __sanitizer_syscall_pre_impl_removexattr(long path, long name); +void __sanitizer_syscall_post_impl_removexattr(long res, long path, long name); +void __sanitizer_syscall_pre_impl_lremovexattr(long path, long name); +void __sanitizer_syscall_post_impl_lremovexattr(long res, long path, long name); +void __sanitizer_syscall_pre_impl_fremovexattr(long fd, long name); +void __sanitizer_syscall_post_impl_fremovexattr(long res, long fd, long name); +void __sanitizer_syscall_pre_impl_brk(long brk); +void __sanitizer_syscall_post_impl_brk(long res, long brk); +void __sanitizer_syscall_pre_impl_mprotect(long start, long len, long prot); +void __sanitizer_syscall_post_impl_mprotect(long res, long start, long len, + long prot); +void __sanitizer_syscall_pre_impl_mremap(long addr, long old_len, long new_len, + long flags, long new_addr); +void __sanitizer_syscall_post_impl_mremap(long res, long addr, long old_len, + long new_len, long flags, + long new_addr); +void __sanitizer_syscall_pre_impl_remap_file_pages(long start, long size, + long prot, long pgoff, + long flags); +void __sanitizer_syscall_post_impl_remap_file_pages(long res, long start, + long size, long prot, + long pgoff, long flags); +void __sanitizer_syscall_pre_impl_msync(long start, long len, long flags); +void __sanitizer_syscall_post_impl_msync(long res, long start, long len, + long flags); +void __sanitizer_syscall_pre_impl_munmap(long addr, long len); +void __sanitizer_syscall_post_impl_munmap(long res, long addr, long len); +void __sanitizer_syscall_pre_impl_mlock(long start, long len); +void __sanitizer_syscall_post_impl_mlock(long res, long start, long len); +void __sanitizer_syscall_pre_impl_munlock(long start, long len); +void __sanitizer_syscall_post_impl_munlock(long res, long start, long len); +void __sanitizer_syscall_pre_impl_mlockall(long flags); +void __sanitizer_syscall_post_impl_mlockall(long res, long flags); +void __sanitizer_syscall_pre_impl_munlockall(); +void __sanitizer_syscall_post_impl_munlockall(long res); +void __sanitizer_syscall_pre_impl_madvise(long start, long len, long behavior); +void __sanitizer_syscall_post_impl_madvise(long res, long start, long len, + long behavior); +void __sanitizer_syscall_pre_impl_mincore(long start, long len, long vec); +void __sanitizer_syscall_post_impl_mincore(long res, long start, long len, + long vec); +void __sanitizer_syscall_pre_impl_pivot_root(long new_root, long put_old); +void __sanitizer_syscall_post_impl_pivot_root(long res, long new_root, + long put_old); +void __sanitizer_syscall_pre_impl_chroot(long filename); +void __sanitizer_syscall_post_impl_chroot(long res, long filename); +void __sanitizer_syscall_pre_impl_mknod(long filename, long mode, long dev); +void __sanitizer_syscall_post_impl_mknod(long res, long filename, long mode, + long dev); +void __sanitizer_syscall_pre_impl_link(long oldname, long newname); +void __sanitizer_syscall_post_impl_link(long res, long oldname, long newname); +void __sanitizer_syscall_pre_impl_symlink(long old, long new_); +void __sanitizer_syscall_post_impl_symlink(long res, long old, long new_); +void __sanitizer_syscall_pre_impl_unlink(long pathname); +void __sanitizer_syscall_post_impl_unlink(long res, long pathname); +void __sanitizer_syscall_pre_impl_rename(long oldname, long newname); +void __sanitizer_syscall_post_impl_rename(long res, long oldname, long newname); +void __sanitizer_syscall_pre_impl_chmod(long filename, long mode); +void __sanitizer_syscall_post_impl_chmod(long res, long filename, long mode); +void __sanitizer_syscall_pre_impl_fchmod(long fd, long mode); +void __sanitizer_syscall_post_impl_fchmod(long res, long fd, long mode); +void __sanitizer_syscall_pre_impl_fcntl(long fd, long cmd, long arg); +void __sanitizer_syscall_post_impl_fcntl(long res, long fd, long cmd, long arg); +void __sanitizer_syscall_pre_impl_fcntl64(long fd, long cmd, long arg); +void __sanitizer_syscall_post_impl_fcntl64(long res, long fd, long cmd, + long arg); +void __sanitizer_syscall_pre_impl_pipe(long fildes); +void __sanitizer_syscall_post_impl_pipe(long res, long fildes); +void __sanitizer_syscall_pre_impl_pipe2(long fildes, long flags); +void __sanitizer_syscall_post_impl_pipe2(long res, long fildes, long flags); +void __sanitizer_syscall_pre_impl_dup(long fildes); +void __sanitizer_syscall_post_impl_dup(long res, long fildes); +void __sanitizer_syscall_pre_impl_dup2(long oldfd, long newfd); +void __sanitizer_syscall_post_impl_dup2(long res, long oldfd, long newfd); +void __sanitizer_syscall_pre_impl_dup3(long oldfd, long newfd, long flags); +void __sanitizer_syscall_post_impl_dup3(long res, long oldfd, long newfd, + long flags); +void __sanitizer_syscall_pre_impl_ioperm(long from, long num, long on); +void __sanitizer_syscall_post_impl_ioperm(long res, long from, long num, + long on); +void __sanitizer_syscall_pre_impl_ioctl(long fd, long cmd, long arg); +void __sanitizer_syscall_post_impl_ioctl(long res, long fd, long cmd, long arg); +void __sanitizer_syscall_pre_impl_flock(long fd, long cmd); +void __sanitizer_syscall_post_impl_flock(long res, long fd, long cmd); +void __sanitizer_syscall_pre_impl_io_setup(long nr_reqs, long ctx); +void __sanitizer_syscall_post_impl_io_setup(long res, long nr_reqs, long ctx); +void __sanitizer_syscall_pre_impl_io_destroy(long ctx); +void __sanitizer_syscall_post_impl_io_destroy(long res, long ctx); +void __sanitizer_syscall_pre_impl_io_getevents(long ctx_id, long min_nr, + long nr, long events, + long timeout); +void __sanitizer_syscall_post_impl_io_getevents(long res, long ctx_id, + long min_nr, long nr, + long events, long timeout); +void __sanitizer_syscall_pre_impl_io_submit(long ctx_id, long arg1, long arg2); +void __sanitizer_syscall_post_impl_io_submit(long res, long ctx_id, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_io_cancel(long ctx_id, long iocb, + long result); +void __sanitizer_syscall_post_impl_io_cancel(long res, long ctx_id, long iocb, + long result); +void __sanitizer_syscall_pre_impl_sendfile(long out_fd, long in_fd, long offset, + long count); +void __sanitizer_syscall_post_impl_sendfile(long res, long out_fd, long in_fd, + long offset, long count); +void __sanitizer_syscall_pre_impl_sendfile64(long out_fd, long in_fd, + long offset, long count); +void __sanitizer_syscall_post_impl_sendfile64(long res, long out_fd, long in_fd, + long offset, long count); +void __sanitizer_syscall_pre_impl_readlink(long path, long buf, long bufsiz); +void __sanitizer_syscall_post_impl_readlink(long res, long path, long buf, + long bufsiz); +void __sanitizer_syscall_pre_impl_creat(long pathname, long mode); +void __sanitizer_syscall_post_impl_creat(long res, long pathname, long mode); +void __sanitizer_syscall_pre_impl_open(long filename, long flags, long mode); +void __sanitizer_syscall_post_impl_open(long res, long filename, long flags, + long mode); +void __sanitizer_syscall_pre_impl_close(long fd); +void __sanitizer_syscall_post_impl_close(long res, long fd); +void __sanitizer_syscall_pre_impl_access(long filename, long mode); +void __sanitizer_syscall_post_impl_access(long res, long filename, long mode); +void __sanitizer_syscall_pre_impl_vhangup(); +void __sanitizer_syscall_post_impl_vhangup(long res); +void __sanitizer_syscall_pre_impl_chown(long filename, long user, long group); +void __sanitizer_syscall_post_impl_chown(long res, long filename, long user, + long group); +void __sanitizer_syscall_pre_impl_lchown(long filename, long user, long group); +void __sanitizer_syscall_post_impl_lchown(long res, long filename, long user, + long group); +void __sanitizer_syscall_pre_impl_fchown(long fd, long user, long group); +void __sanitizer_syscall_post_impl_fchown(long res, long fd, long user, + long group); +void __sanitizer_syscall_pre_impl_chown16(long filename, long user, long group); +void __sanitizer_syscall_post_impl_chown16(long res, long filename, long user, + long group); +void __sanitizer_syscall_pre_impl_lchown16(long filename, long user, + long group); +void __sanitizer_syscall_post_impl_lchown16(long res, long filename, long user, + long group); +void __sanitizer_syscall_pre_impl_fchown16(long fd, long user, long group); +void __sanitizer_syscall_post_impl_fchown16(long res, long fd, long user, + long group); +void __sanitizer_syscall_pre_impl_setregid16(long rgid, long egid); +void __sanitizer_syscall_post_impl_setregid16(long res, long rgid, long egid); +void __sanitizer_syscall_pre_impl_setgid16(long gid); +void __sanitizer_syscall_post_impl_setgid16(long res, long gid); +void __sanitizer_syscall_pre_impl_setreuid16(long ruid, long euid); +void __sanitizer_syscall_post_impl_setreuid16(long res, long ruid, long euid); +void __sanitizer_syscall_pre_impl_setuid16(long uid); +void __sanitizer_syscall_post_impl_setuid16(long res, long uid); +void __sanitizer_syscall_pre_impl_setresuid16(long ruid, long euid, long suid); +void __sanitizer_syscall_post_impl_setresuid16(long res, long ruid, long euid, + long suid); +void __sanitizer_syscall_pre_impl_getresuid16(long ruid, long euid, long suid); +void __sanitizer_syscall_post_impl_getresuid16(long res, long ruid, long euid, + long suid); +void __sanitizer_syscall_pre_impl_setresgid16(long rgid, long egid, long sgid); +void __sanitizer_syscall_post_impl_setresgid16(long res, long rgid, long egid, + long sgid); +void __sanitizer_syscall_pre_impl_getresgid16(long rgid, long egid, long sgid); +void __sanitizer_syscall_post_impl_getresgid16(long res, long rgid, long egid, + long sgid); +void __sanitizer_syscall_pre_impl_setfsuid16(long uid); +void __sanitizer_syscall_post_impl_setfsuid16(long res, long uid); +void __sanitizer_syscall_pre_impl_setfsgid16(long gid); +void __sanitizer_syscall_post_impl_setfsgid16(long res, long gid); +void __sanitizer_syscall_pre_impl_getgroups16(long gidsetsize, long grouplist); +void __sanitizer_syscall_post_impl_getgroups16(long res, long gidsetsize, + long grouplist); +void __sanitizer_syscall_pre_impl_setgroups16(long gidsetsize, long grouplist); +void __sanitizer_syscall_post_impl_setgroups16(long res, long gidsetsize, + long grouplist); +void __sanitizer_syscall_pre_impl_getuid16(); +void __sanitizer_syscall_post_impl_getuid16(long res); +void __sanitizer_syscall_pre_impl_geteuid16(); +void __sanitizer_syscall_post_impl_geteuid16(long res); +void __sanitizer_syscall_pre_impl_getgid16(); +void __sanitizer_syscall_post_impl_getgid16(long res); +void __sanitizer_syscall_pre_impl_getegid16(); +void __sanitizer_syscall_post_impl_getegid16(long res); +void __sanitizer_syscall_pre_impl_utime(long filename, long times); +void __sanitizer_syscall_post_impl_utime(long res, long filename, long times); +void __sanitizer_syscall_pre_impl_utimes(long filename, long utimes); +void __sanitizer_syscall_post_impl_utimes(long res, long filename, long utimes); +void __sanitizer_syscall_pre_impl_lseek(long fd, long offset, long origin); +void __sanitizer_syscall_post_impl_lseek(long res, long fd, long offset, + long origin); +void __sanitizer_syscall_pre_impl_llseek(long fd, long offset_high, + long offset_low, long result, + long origin); +void __sanitizer_syscall_post_impl_llseek(long res, long fd, long offset_high, + long offset_low, long result, + long origin); +void __sanitizer_syscall_pre_impl_read(long fd, long buf, long count); +void __sanitizer_syscall_post_impl_read(long res, long fd, long buf, + long count); +void __sanitizer_syscall_pre_impl_readv(long fd, long vec, long vlen); +void __sanitizer_syscall_post_impl_readv(long res, long fd, long vec, + long vlen); +void __sanitizer_syscall_pre_impl_write(long fd, long buf, long count); +void __sanitizer_syscall_post_impl_write(long res, long fd, long buf, + long count); +void __sanitizer_syscall_pre_impl_writev(long fd, long vec, long vlen); +void __sanitizer_syscall_post_impl_writev(long res, long fd, long vec, + long vlen); + +#ifdef _LP64 +void __sanitizer_syscall_pre_impl_pread64(long fd, long buf, long count, + long pos); +void __sanitizer_syscall_post_impl_pread64(long res, long fd, long buf, + long count, long pos); +void __sanitizer_syscall_pre_impl_pwrite64(long fd, long buf, long count, + long pos); +void __sanitizer_syscall_post_impl_pwrite64(long res, long fd, long buf, + long count, long pos); +#else +void __sanitizer_syscall_pre_impl_pread64(long fd, long buf, long count, + long pos0, long pos1); +void __sanitizer_syscall_post_impl_pread64(long res, long fd, long buf, + long count, long pos0, long pos1); +void __sanitizer_syscall_pre_impl_pwrite64(long fd, long buf, long count, + long pos0, long pos1); +void __sanitizer_syscall_post_impl_pwrite64(long res, long fd, long buf, + long count, long pos0, long pos1); +#endif + +void __sanitizer_syscall_pre_impl_preadv(long fd, long vec, long vlen, + long pos_l, long pos_h); +void __sanitizer_syscall_post_impl_preadv(long res, long fd, long vec, + long vlen, long pos_l, long pos_h); +void __sanitizer_syscall_pre_impl_pwritev(long fd, long vec, long vlen, + long pos_l, long pos_h); +void __sanitizer_syscall_post_impl_pwritev(long res, long fd, long vec, + long vlen, long pos_l, long pos_h); +void __sanitizer_syscall_pre_impl_getcwd(long buf, long size); +void __sanitizer_syscall_post_impl_getcwd(long res, long buf, long size); +void __sanitizer_syscall_pre_impl_mkdir(long pathname, long mode); +void __sanitizer_syscall_post_impl_mkdir(long res, long pathname, long mode); +void __sanitizer_syscall_pre_impl_chdir(long filename); +void __sanitizer_syscall_post_impl_chdir(long res, long filename); +void __sanitizer_syscall_pre_impl_fchdir(long fd); +void __sanitizer_syscall_post_impl_fchdir(long res, long fd); +void __sanitizer_syscall_pre_impl_rmdir(long pathname); +void __sanitizer_syscall_post_impl_rmdir(long res, long pathname); +void __sanitizer_syscall_pre_impl_lookup_dcookie(long cookie64, long buf, + long len); +void __sanitizer_syscall_post_impl_lookup_dcookie(long res, long cookie64, + long buf, long len); +void __sanitizer_syscall_pre_impl_quotactl(long cmd, long special, long id, + long addr); +void __sanitizer_syscall_post_impl_quotactl(long res, long cmd, long special, + long id, long addr); +void __sanitizer_syscall_pre_impl_getdents(long fd, long dirent, long count); +void __sanitizer_syscall_post_impl_getdents(long res, long fd, long dirent, + long count); +void __sanitizer_syscall_pre_impl_getdents64(long fd, long dirent, long count); +void __sanitizer_syscall_post_impl_getdents64(long res, long fd, long dirent, + long count); +void __sanitizer_syscall_pre_impl_setsockopt(long fd, long level, long optname, + long optval, long optlen); +void __sanitizer_syscall_post_impl_setsockopt(long res, long fd, long level, + long optname, long optval, + long optlen); +void __sanitizer_syscall_pre_impl_getsockopt(long fd, long level, long optname, + long optval, long optlen); +void __sanitizer_syscall_post_impl_getsockopt(long res, long fd, long level, + long optname, long optval, + long optlen); +void __sanitizer_syscall_pre_impl_bind(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_bind(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_connect(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_connect(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_accept(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_accept(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_accept4(long arg0, long arg1, long arg2, + long arg3); +void __sanitizer_syscall_post_impl_accept4(long res, long arg0, long arg1, + long arg2, long arg3); +void __sanitizer_syscall_pre_impl_getsockname(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_getsockname(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_getpeername(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_getpeername(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_send(long arg0, long arg1, long arg2, + long arg3); +void __sanitizer_syscall_post_impl_send(long res, long arg0, long arg1, + long arg2, long arg3); +void __sanitizer_syscall_pre_impl_sendto(long arg0, long arg1, long arg2, + long arg3, long arg4, long arg5); +void __sanitizer_syscall_post_impl_sendto(long res, long arg0, long arg1, + long arg2, long arg3, long arg4, + long arg5); +void __sanitizer_syscall_pre_impl_sendmsg(long fd, long msg, long flags); +void __sanitizer_syscall_post_impl_sendmsg(long res, long fd, long msg, + long flags); +void __sanitizer_syscall_pre_impl_sendmmsg(long fd, long msg, long vlen, + long flags); +void __sanitizer_syscall_post_impl_sendmmsg(long res, long fd, long msg, + long vlen, long flags); +void __sanitizer_syscall_pre_impl_recv(long arg0, long arg1, long arg2, + long arg3); +void __sanitizer_syscall_post_impl_recv(long res, long arg0, long arg1, + long arg2, long arg3); +void __sanitizer_syscall_pre_impl_recvfrom(long arg0, long arg1, long arg2, + long arg3, long arg4, long arg5); +void __sanitizer_syscall_post_impl_recvfrom(long res, long arg0, long arg1, + long arg2, long arg3, long arg4, + long arg5); +void __sanitizer_syscall_pre_impl_recvmsg(long fd, long msg, long flags); +void __sanitizer_syscall_post_impl_recvmsg(long res, long fd, long msg, + long flags); +void __sanitizer_syscall_pre_impl_recvmmsg(long fd, long msg, long vlen, + long flags, long timeout); +void __sanitizer_syscall_post_impl_recvmmsg(long res, long fd, long msg, + long vlen, long flags, + long timeout); +void __sanitizer_syscall_pre_impl_socket(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_socket(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_socketpair(long arg0, long arg1, long arg2, + long arg3); +void __sanitizer_syscall_post_impl_socketpair(long res, long arg0, long arg1, + long arg2, long arg3); +void __sanitizer_syscall_pre_impl_socketcall(long call, long args); +void __sanitizer_syscall_post_impl_socketcall(long res, long call, long args); +void __sanitizer_syscall_pre_impl_listen(long arg0, long arg1); +void __sanitizer_syscall_post_impl_listen(long res, long arg0, long arg1); +void __sanitizer_syscall_pre_impl_poll(long ufds, long nfds, long timeout); +void __sanitizer_syscall_post_impl_poll(long res, long ufds, long nfds, + long timeout); +void __sanitizer_syscall_pre_impl_select(long n, long inp, long outp, long exp, + long tvp); +void __sanitizer_syscall_post_impl_select(long res, long n, long inp, long outp, + long exp, long tvp); +void __sanitizer_syscall_pre_impl_old_select(long arg); +void __sanitizer_syscall_post_impl_old_select(long res, long arg); +void __sanitizer_syscall_pre_impl_epoll_create(long size); +void __sanitizer_syscall_post_impl_epoll_create(long res, long size); +void __sanitizer_syscall_pre_impl_epoll_create1(long flags); +void __sanitizer_syscall_post_impl_epoll_create1(long res, long flags); +void __sanitizer_syscall_pre_impl_epoll_ctl(long epfd, long op, long fd, + long event); +void __sanitizer_syscall_post_impl_epoll_ctl(long res, long epfd, long op, + long fd, long event); +void __sanitizer_syscall_pre_impl_epoll_wait(long epfd, long events, + long maxevents, long timeout); +void __sanitizer_syscall_post_impl_epoll_wait(long res, long epfd, long events, + long maxevents, long timeout); +void __sanitizer_syscall_pre_impl_epoll_pwait(long epfd, long events, + long maxevents, long timeout, + long sigmask, long sigsetsize); +void __sanitizer_syscall_post_impl_epoll_pwait(long res, long epfd, long events, + long maxevents, long timeout, + long sigmask, long sigsetsize); +void __sanitizer_syscall_pre_impl_epoll_pwait2(long epfd, long events, + long maxevents, long timeout, + long sigmask, long sigsetsize); +void __sanitizer_syscall_post_impl_epoll_pwait2(long res, long epfd, + long events, long maxevents, + long timeout, long sigmask, + long sigsetsize); +void __sanitizer_syscall_pre_impl_gethostname(long name, long len); +void __sanitizer_syscall_post_impl_gethostname(long res, long name, long len); +void __sanitizer_syscall_pre_impl_sethostname(long name, long len); +void __sanitizer_syscall_post_impl_sethostname(long res, long name, long len); +void __sanitizer_syscall_pre_impl_setdomainname(long name, long len); +void __sanitizer_syscall_post_impl_setdomainname(long res, long name, long len); +void __sanitizer_syscall_pre_impl_newuname(long name); +void __sanitizer_syscall_post_impl_newuname(long res, long name); +void __sanitizer_syscall_pre_impl_uname(long arg0); +void __sanitizer_syscall_post_impl_uname(long res, long arg0); +void __sanitizer_syscall_pre_impl_olduname(long arg0); +void __sanitizer_syscall_post_impl_olduname(long res, long arg0); +void __sanitizer_syscall_pre_impl_getrlimit(long resource, long rlim); +void __sanitizer_syscall_post_impl_getrlimit(long res, long resource, + long rlim); +void __sanitizer_syscall_pre_impl_old_getrlimit(long resource, long rlim); +void __sanitizer_syscall_post_impl_old_getrlimit(long res, long resource, + long rlim); +void __sanitizer_syscall_pre_impl_setrlimit(long resource, long rlim); +void __sanitizer_syscall_post_impl_setrlimit(long res, long resource, + long rlim); +void __sanitizer_syscall_pre_impl_prlimit64(long pid, long resource, + long new_rlim, long old_rlim); +void __sanitizer_syscall_post_impl_prlimit64(long res, long pid, long resource, + long new_rlim, long old_rlim); +void __sanitizer_syscall_pre_impl_getrusage(long who, long ru); +void __sanitizer_syscall_post_impl_getrusage(long res, long who, long ru); +void __sanitizer_syscall_pre_impl_umask(long mask); +void __sanitizer_syscall_post_impl_umask(long res, long mask); +void __sanitizer_syscall_pre_impl_msgget(long key, long msgflg); +void __sanitizer_syscall_post_impl_msgget(long res, long key, long msgflg); +void __sanitizer_syscall_pre_impl_msgsnd(long msqid, long msgp, long msgsz, + long msgflg); +void __sanitizer_syscall_post_impl_msgsnd(long res, long msqid, long msgp, + long msgsz, long msgflg); +void __sanitizer_syscall_pre_impl_msgrcv(long msqid, long msgp, long msgsz, + long msgtyp, long msgflg); +void __sanitizer_syscall_post_impl_msgrcv(long res, long msqid, long msgp, + long msgsz, long msgtyp, long msgflg); +void __sanitizer_syscall_pre_impl_msgctl(long msqid, long cmd, long buf); +void __sanitizer_syscall_post_impl_msgctl(long res, long msqid, long cmd, + long buf); +void __sanitizer_syscall_pre_impl_semget(long key, long nsems, long semflg); +void __sanitizer_syscall_post_impl_semget(long res, long key, long nsems, + long semflg); +void __sanitizer_syscall_pre_impl_semop(long semid, long sops, long nsops); +void __sanitizer_syscall_post_impl_semop(long res, long semid, long sops, + long nsops); +void __sanitizer_syscall_pre_impl_semctl(long semid, long semnum, long cmd, + long arg); +void __sanitizer_syscall_post_impl_semctl(long res, long semid, long semnum, + long cmd, long arg); +void __sanitizer_syscall_pre_impl_semtimedop(long semid, long sops, long nsops, + long timeout); +void __sanitizer_syscall_post_impl_semtimedop(long res, long semid, long sops, + long nsops, long timeout); +void __sanitizer_syscall_pre_impl_shmat(long shmid, long shmaddr, long shmflg); +void __sanitizer_syscall_post_impl_shmat(long res, long shmid, long shmaddr, + long shmflg); +void __sanitizer_syscall_pre_impl_shmget(long key, long size, long flag); +void __sanitizer_syscall_post_impl_shmget(long res, long key, long size, + long flag); +void __sanitizer_syscall_pre_impl_shmdt(long shmaddr); +void __sanitizer_syscall_post_impl_shmdt(long res, long shmaddr); +void __sanitizer_syscall_pre_impl_shmctl(long shmid, long cmd, long buf); +void __sanitizer_syscall_post_impl_shmctl(long res, long shmid, long cmd, + long buf); +void __sanitizer_syscall_pre_impl_ipc(long call, long first, long second, + long third, long ptr, long fifth); +void __sanitizer_syscall_post_impl_ipc(long res, long call, long first, + long second, long third, long ptr, + long fifth); +void __sanitizer_syscall_pre_impl_mq_open(long name, long oflag, long mode, + long attr); +void __sanitizer_syscall_post_impl_mq_open(long res, long name, long oflag, + long mode, long attr); +void __sanitizer_syscall_pre_impl_mq_unlink(long name); +void __sanitizer_syscall_post_impl_mq_unlink(long res, long name); +void __sanitizer_syscall_pre_impl_mq_timedsend(long mqdes, long msg_ptr, + long msg_len, long msg_prio, + long abs_timeout); +void __sanitizer_syscall_post_impl_mq_timedsend(long res, long mqdes, + long msg_ptr, long msg_len, + long msg_prio, + long abs_timeout); +void __sanitizer_syscall_pre_impl_mq_timedreceive(long mqdes, long msg_ptr, + long msg_len, long msg_prio, + long abs_timeout); +void __sanitizer_syscall_post_impl_mq_timedreceive(long res, long mqdes, + long msg_ptr, long msg_len, + long msg_prio, + long abs_timeout); +void __sanitizer_syscall_pre_impl_mq_notify(long mqdes, long notification); +void __sanitizer_syscall_post_impl_mq_notify(long res, long mqdes, + long notification); +void __sanitizer_syscall_pre_impl_mq_getsetattr(long mqdes, long mqstat, + long omqstat); +void __sanitizer_syscall_post_impl_mq_getsetattr(long res, long mqdes, + long mqstat, long omqstat); +void __sanitizer_syscall_pre_impl_pciconfig_iobase(long which, long bus, + long devfn); +void __sanitizer_syscall_post_impl_pciconfig_iobase(long res, long which, + long bus, long devfn); +void __sanitizer_syscall_pre_impl_pciconfig_read(long bus, long dfn, long off, + long len, long buf); +void __sanitizer_syscall_post_impl_pciconfig_read(long res, long bus, long dfn, + long off, long len, long buf); +void __sanitizer_syscall_pre_impl_pciconfig_write(long bus, long dfn, long off, + long len, long buf); +void __sanitizer_syscall_post_impl_pciconfig_write(long res, long bus, long dfn, + long off, long len, + long buf); +void __sanitizer_syscall_pre_impl_swapon(long specialfile, long swap_flags); +void __sanitizer_syscall_post_impl_swapon(long res, long specialfile, + long swap_flags); +void __sanitizer_syscall_pre_impl_swapoff(long specialfile); +void __sanitizer_syscall_post_impl_swapoff(long res, long specialfile); +void __sanitizer_syscall_pre_impl_sysctl(long args); +void __sanitizer_syscall_post_impl_sysctl(long res, long args); +void __sanitizer_syscall_pre_impl_sysinfo(long info); +void __sanitizer_syscall_post_impl_sysinfo(long res, long info); +void __sanitizer_syscall_pre_impl_sysfs(long option, long arg1, long arg2); +void __sanitizer_syscall_post_impl_sysfs(long res, long option, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_syslog(long type, long buf, long len); +void __sanitizer_syscall_post_impl_syslog(long res, long type, long buf, + long len); +void __sanitizer_syscall_pre_impl_uselib(long library); +void __sanitizer_syscall_post_impl_uselib(long res, long library); +void __sanitizer_syscall_pre_impl_ni_syscall(); +void __sanitizer_syscall_post_impl_ni_syscall(long res); +void __sanitizer_syscall_pre_impl_ptrace(long request, long pid, long addr, + long data); +void __sanitizer_syscall_post_impl_ptrace(long res, long request, long pid, + long addr, long data); +void __sanitizer_syscall_pre_impl_add_key(long _type, long _description, + long _payload, long plen, + long destringid); +void __sanitizer_syscall_post_impl_add_key(long res, long _type, + long _description, long _payload, + long plen, long destringid); +void __sanitizer_syscall_pre_impl_request_key(long _type, long _description, + long _callout_info, + long destringid); +void __sanitizer_syscall_post_impl_request_key(long res, long _type, + long _description, + long _callout_info, + long destringid); +void __sanitizer_syscall_pre_impl_keyctl(long cmd, long arg2, long arg3, + long arg4, long arg5); +void __sanitizer_syscall_post_impl_keyctl(long res, long cmd, long arg2, + long arg3, long arg4, long arg5); +void __sanitizer_syscall_pre_impl_ioprio_set(long which, long who, long ioprio); +void __sanitizer_syscall_post_impl_ioprio_set(long res, long which, long who, + long ioprio); +void __sanitizer_syscall_pre_impl_ioprio_get(long which, long who); +void __sanitizer_syscall_post_impl_ioprio_get(long res, long which, long who); +void __sanitizer_syscall_pre_impl_set_mempolicy(long mode, long nmask, + long maxnode); +void __sanitizer_syscall_post_impl_set_mempolicy(long res, long mode, + long nmask, long maxnode); +void __sanitizer_syscall_pre_impl_migrate_pages(long pid, long maxnode, + long from, long to); +void __sanitizer_syscall_post_impl_migrate_pages(long res, long pid, + long maxnode, long from, + long to); +void __sanitizer_syscall_pre_impl_move_pages(long pid, long nr_pages, + long pages, long nodes, + long status, long flags); +void __sanitizer_syscall_post_impl_move_pages(long res, long pid, long nr_pages, + long pages, long nodes, + long status, long flags); +void __sanitizer_syscall_pre_impl_mbind(long start, long len, long mode, + long nmask, long maxnode, long flags); +void __sanitizer_syscall_post_impl_mbind(long res, long start, long len, + long mode, long nmask, long maxnode, + long flags); +void __sanitizer_syscall_pre_impl_get_mempolicy(long policy, long nmask, + long maxnode, long addr, + long flags); +void __sanitizer_syscall_post_impl_get_mempolicy(long res, long policy, + long nmask, long maxnode, + long addr, long flags); +void __sanitizer_syscall_pre_impl_inotify_init(); +void __sanitizer_syscall_post_impl_inotify_init(long res); +void __sanitizer_syscall_pre_impl_inotify_init1(long flags); +void __sanitizer_syscall_post_impl_inotify_init1(long res, long flags); +void __sanitizer_syscall_pre_impl_inotify_add_watch(long fd, long path, + long mask); +void __sanitizer_syscall_post_impl_inotify_add_watch(long res, long fd, + long path, long mask); +void __sanitizer_syscall_pre_impl_inotify_rm_watch(long fd, long wd); +void __sanitizer_syscall_post_impl_inotify_rm_watch(long res, long fd, long wd); +void __sanitizer_syscall_pre_impl_spu_run(long fd, long unpc, long ustatus); +void __sanitizer_syscall_post_impl_spu_run(long res, long fd, long unpc, + long ustatus); +void __sanitizer_syscall_pre_impl_spu_create(long name, long flags, long mode, + long fd); +void __sanitizer_syscall_post_impl_spu_create(long res, long name, long flags, + long mode, long fd); +void __sanitizer_syscall_pre_impl_mknodat(long dfd, long filename, long mode, + long dev); +void __sanitizer_syscall_post_impl_mknodat(long res, long dfd, long filename, + long mode, long dev); +void __sanitizer_syscall_pre_impl_mkdirat(long dfd, long pathname, long mode); +void __sanitizer_syscall_post_impl_mkdirat(long res, long dfd, long pathname, + long mode); +void __sanitizer_syscall_pre_impl_unlinkat(long dfd, long pathname, long flag); +void __sanitizer_syscall_post_impl_unlinkat(long res, long dfd, long pathname, + long flag); +void __sanitizer_syscall_pre_impl_symlinkat(long oldname, long newdfd, + long newname); +void __sanitizer_syscall_post_impl_symlinkat(long res, long oldname, + long newdfd, long newname); +void __sanitizer_syscall_pre_impl_linkat(long olddfd, long oldname, long newdfd, + long newname, long flags); +void __sanitizer_syscall_post_impl_linkat(long res, long olddfd, long oldname, + long newdfd, long newname, + long flags); +void __sanitizer_syscall_pre_impl_renameat(long olddfd, long oldname, + long newdfd, long newname); +void __sanitizer_syscall_post_impl_renameat(long res, long olddfd, long oldname, + long newdfd, long newname); +void __sanitizer_syscall_pre_impl_futimesat(long dfd, long filename, + long utimes); +void __sanitizer_syscall_post_impl_futimesat(long res, long dfd, long filename, + long utimes); +void __sanitizer_syscall_pre_impl_faccessat(long dfd, long filename, long mode); +void __sanitizer_syscall_post_impl_faccessat(long res, long dfd, long filename, + long mode); +void __sanitizer_syscall_pre_impl_fchmodat(long dfd, long filename, long mode); +void __sanitizer_syscall_post_impl_fchmodat(long res, long dfd, long filename, + long mode); +void __sanitizer_syscall_pre_impl_fchownat(long dfd, long filename, long user, + long group, long flag); +void __sanitizer_syscall_post_impl_fchownat(long res, long dfd, long filename, + long user, long group, long flag); +void __sanitizer_syscall_pre_impl_openat(long dfd, long filename, long flags, + long mode); +void __sanitizer_syscall_post_impl_openat(long res, long dfd, long filename, + long flags, long mode); +void __sanitizer_syscall_pre_impl_newfstatat(long dfd, long filename, + long statbuf, long flag); +void __sanitizer_syscall_post_impl_newfstatat(long res, long dfd, long filename, + long statbuf, long flag); +void __sanitizer_syscall_pre_impl_fstatat64(long dfd, long filename, + long statbuf, long flag); +void __sanitizer_syscall_post_impl_fstatat64(long res, long dfd, long filename, + long statbuf, long flag); +void __sanitizer_syscall_pre_impl_readlinkat(long dfd, long path, long buf, + long bufsiz); +void __sanitizer_syscall_post_impl_readlinkat(long res, long dfd, long path, + long buf, long bufsiz); +void __sanitizer_syscall_pre_impl_utimensat(long dfd, long filename, + long utimes, long flags); +void __sanitizer_syscall_post_impl_utimensat(long res, long dfd, long filename, + long utimes, long flags); +void __sanitizer_syscall_pre_impl_unshare(long unshare_flags); +void __sanitizer_syscall_post_impl_unshare(long res, long unshare_flags); +void __sanitizer_syscall_pre_impl_splice(long fd_in, long off_in, long fd_out, + long off_out, long len, long flags); +void __sanitizer_syscall_post_impl_splice(long res, long fd_in, long off_in, + long fd_out, long off_out, long len, + long flags); +void __sanitizer_syscall_pre_impl_vmsplice(long fd, long iov, long nr_segs, + long flags); +void __sanitizer_syscall_post_impl_vmsplice(long res, long fd, long iov, + long nr_segs, long flags); +void __sanitizer_syscall_pre_impl_tee(long fdin, long fdout, long len, + long flags); +void __sanitizer_syscall_post_impl_tee(long res, long fdin, long fdout, + long len, long flags); +void __sanitizer_syscall_pre_impl_get_robust_list(long pid, long head_ptr, + long len_ptr); +void __sanitizer_syscall_post_impl_get_robust_list(long res, long pid, + long head_ptr, long len_ptr); +void __sanitizer_syscall_pre_impl_set_robust_list(long head, long len); +void __sanitizer_syscall_post_impl_set_robust_list(long res, long head, + long len); +void __sanitizer_syscall_pre_impl_getcpu(long cpu, long node, long cache); +void __sanitizer_syscall_post_impl_getcpu(long res, long cpu, long node, + long cache); +void __sanitizer_syscall_pre_impl_signalfd(long ufd, long user_mask, + long sizemask); +void __sanitizer_syscall_post_impl_signalfd(long res, long ufd, long user_mask, + long sizemask); +void __sanitizer_syscall_pre_impl_signalfd4(long ufd, long user_mask, + long sizemask, long flags); +void __sanitizer_syscall_post_impl_signalfd4(long res, long ufd, long user_mask, + long sizemask, long flags); +void __sanitizer_syscall_pre_impl_timerfd_create(long clockid, long flags); +void __sanitizer_syscall_post_impl_timerfd_create(long res, long clockid, + long flags); +void __sanitizer_syscall_pre_impl_timerfd_settime(long ufd, long flags, + long utmr, long otmr); +void __sanitizer_syscall_post_impl_timerfd_settime(long res, long ufd, + long flags, long utmr, + long otmr); +void __sanitizer_syscall_pre_impl_timerfd_gettime(long ufd, long otmr); +void __sanitizer_syscall_post_impl_timerfd_gettime(long res, long ufd, + long otmr); +void __sanitizer_syscall_pre_impl_eventfd(long count); +void __sanitizer_syscall_post_impl_eventfd(long res, long count); +void __sanitizer_syscall_pre_impl_eventfd2(long count, long flags); +void __sanitizer_syscall_post_impl_eventfd2(long res, long count, long flags); +void __sanitizer_syscall_pre_impl_old_readdir(long arg0, long arg1, long arg2); +void __sanitizer_syscall_post_impl_old_readdir(long res, long arg0, long arg1, + long arg2); +void __sanitizer_syscall_pre_impl_pselect6(long arg0, long arg1, long arg2, + long arg3, long arg4, long arg5); +void __sanitizer_syscall_post_impl_pselect6(long res, long arg0, long arg1, + long arg2, long arg3, long arg4, + long arg5); +void __sanitizer_syscall_pre_impl_ppoll(long arg0, long arg1, long arg2, + long arg3, long arg4); +void __sanitizer_syscall_post_impl_ppoll(long res, long arg0, long arg1, + long arg2, long arg3, long arg4); +void __sanitizer_syscall_pre_impl_fanotify_init(long flags, long event_f_flags); +void __sanitizer_syscall_post_impl_fanotify_init(long res, long flags, + long event_f_flags); +void __sanitizer_syscall_pre_impl_fanotify_mark(long fanotify_fd, long flags, + long mask, long fd, + long pathname); +void __sanitizer_syscall_post_impl_fanotify_mark(long res, long fanotify_fd, + long flags, long mask, long fd, + long pathname); +void __sanitizer_syscall_pre_impl_syncfs(long fd); +void __sanitizer_syscall_post_impl_syncfs(long res, long fd); +void __sanitizer_syscall_pre_impl_perf_event_open(long attr_uptr, long pid, + long cpu, long group_fd, + long flags); +void __sanitizer_syscall_post_impl_perf_event_open(long res, long attr_uptr, + long pid, long cpu, + long group_fd, long flags); +void __sanitizer_syscall_pre_impl_mmap_pgoff(long addr, long len, long prot, + long flags, long fd, long pgoff); +void __sanitizer_syscall_post_impl_mmap_pgoff(long res, long addr, long len, + long prot, long flags, long fd, + long pgoff); +void __sanitizer_syscall_pre_impl_old_mmap(long arg); +void __sanitizer_syscall_post_impl_old_mmap(long res, long arg); +void __sanitizer_syscall_pre_impl_name_to_handle_at(long dfd, long name, + long handle, long mnt_id, + long flag); +void __sanitizer_syscall_post_impl_name_to_handle_at(long res, long dfd, + long name, long handle, + long mnt_id, long flag); +void __sanitizer_syscall_pre_impl_open_by_handle_at(long mountdirfd, + long handle, long flags); +void __sanitizer_syscall_post_impl_open_by_handle_at(long res, long mountdirfd, + long handle, long flags); +void __sanitizer_syscall_pre_impl_setns(long fd, long nstype); +void __sanitizer_syscall_post_impl_setns(long res, long fd, long nstype); +void __sanitizer_syscall_pre_impl_process_vm_readv(long pid, long lvec, + long liovcnt, long rvec, + long riovcnt, long flags); +void __sanitizer_syscall_post_impl_process_vm_readv(long res, long pid, + long lvec, long liovcnt, + long rvec, long riovcnt, + long flags); +void __sanitizer_syscall_pre_impl_process_vm_writev(long pid, long lvec, + long liovcnt, long rvec, + long riovcnt, long flags); +void __sanitizer_syscall_post_impl_process_vm_writev(long res, long pid, + long lvec, long liovcnt, + long rvec, long riovcnt, + long flags); +void __sanitizer_syscall_pre_impl_fork(); +void __sanitizer_syscall_post_impl_fork(long res); +void __sanitizer_syscall_pre_impl_vfork(); +void __sanitizer_syscall_post_impl_vfork(long res); +void __sanitizer_syscall_pre_impl_sigaction(long signum, long act, long oldact); +void __sanitizer_syscall_post_impl_sigaction(long res, long signum, long act, + long oldact); +void __sanitizer_syscall_pre_impl_rt_sigaction(long signum, long act, + long oldact, long sz); +void __sanitizer_syscall_post_impl_rt_sigaction(long res, long signum, long act, + long oldact, long sz); +void __sanitizer_syscall_pre_impl_sigaltstack(long ss, long oss); +void __sanitizer_syscall_post_impl_sigaltstack(long res, long ss, long oss); +void __sanitizer_syscall_pre_impl_futex(long uaddr, long futex_op, long val, + long timeout, long uaddr2, long val3); +void __sanitizer_syscall_post_impl_futex(long res, long uaddr, long futex_op, + long val, long timeout, long uaddr2, + long val3); +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_LINUX_SYSCALL_HOOKS_H diff --git a/llvm/lib/clang/19/include/sanitizer/lsan_interface.h b/llvm/lib/clang/19/include/sanitizer/lsan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..18f3456a126c3a31ddcb5c675ee23a35c4d35a80 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/lsan_interface.h @@ -0,0 +1,89 @@ +//===-- sanitizer/lsan_interface.h ------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of LeakSanitizer. +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_LSAN_INTERFACE_H +#define SANITIZER_LSAN_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif +// Allocations made between calls to __lsan_disable() and __lsan_enable() will +// be treated as non-leaks. Disable/enable pairs may be nested. +void SANITIZER_CDECL __lsan_disable(void); +void SANITIZER_CDECL __lsan_enable(void); + +// The heap object into which p points will be treated as a non-leak. +void SANITIZER_CDECL __lsan_ignore_object(const void *p); + +// Memory regions registered through this interface will be treated as sources +// of live pointers during leak checking. Useful if you store pointers in +// mapped memory. +// Points of note: +// - __lsan_unregister_root_region() must be called with the same pointer and +// size that have earlier been passed to __lsan_register_root_region() +// - LSan will skip any inaccessible memory when scanning a root region. E.g., +// if you map memory within a larger region that you have mprotect'ed, you can +// register the entire large region. +// - the implementation is not optimized for performance. This interface is +// intended to be used for a small number of relatively static regions. +void SANITIZER_CDECL __lsan_register_root_region(const void *p, size_t size); +void SANITIZER_CDECL __lsan_unregister_root_region(const void *p, size_t size); + +// Check for leaks now. This function behaves identically to the default +// end-of-process leak check. In particular, it will terminate the process if +// leaks are found and the exitcode runtime flag is non-zero. +// Subsequent calls to this function will have no effect and end-of-process +// leak check will not run. Effectively, end-of-process leak check is moved to +// the time of first invocation of this function. +// By calling this function early during process shutdown, you can instruct +// LSan to ignore shutdown-only leaks which happen later on. +void SANITIZER_CDECL __lsan_do_leak_check(void); + +// Check for leaks now. Returns zero if no leaks have been found or if leak +// detection is disabled, non-zero otherwise. +// This function may be called repeatedly, e.g. to periodically check a +// long-running process. It prints a leak report if appropriate, but does not +// terminate the process. It does not affect the behavior of +// __lsan_do_leak_check() or the end-of-process leak check, and is not +// affected by them. +int SANITIZER_CDECL __lsan_do_recoverable_leak_check(void); + +// The user may optionally provide this function to disallow leak checking +// for the program it is linked into (if the return value is non-zero). This +// function must be defined as returning a constant value; any behavior beyond +// that is unsupported. +// To avoid dead stripping, you may need to define this function with +// __attribute__((used)) +int SANITIZER_CDECL __lsan_is_turned_off(void); + +// This function may be optionally provided by user and should return +// a string containing LSan runtime options. See lsan_flags.inc for details. +const char *SANITIZER_CDECL __lsan_default_options(void); + +// This function may be optionally provided by the user and should return +// a string containing LSan suppressions. +const char *SANITIZER_CDECL __lsan_default_suppressions(void); +#ifdef __cplusplus +} // extern "C" + +namespace __lsan { +class ScopedDisabler { +public: + ScopedDisabler() { __lsan_disable(); } + ~ScopedDisabler() { __lsan_enable(); } +}; +} // namespace __lsan +#endif + +#endif // SANITIZER_LSAN_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/memprof_interface.h b/llvm/lib/clang/19/include/sanitizer/memprof_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..4660a7818c92b3cb1a6a78e77f420622915acc34 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/memprof_interface.h @@ -0,0 +1,72 @@ +//===-- sanitizer/memprof_interface.h --------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of MemProfiler (MemProf). +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_MEMPROF_INTERFACE_H +#define SANITIZER_MEMPROF_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif +/// Records access to a memory region ([addr, addr+size)). +/// +/// This memory must be previously allocated by your program. +/// +/// \param addr Start of memory region. +/// \param size Size of memory region. +void SANITIZER_CDECL __memprof_record_access_range(void const volatile *addr, + size_t size); + +/// Records access to a memory address addr. +/// +/// This memory must be previously allocated by your program. +/// +/// \param addr Accessed memory address +void SANITIZER_CDECL __memprof_record_access(void const volatile *addr); + +/// User-provided callback on MemProf errors. +/// +/// You can provide a function that would be called immediately when MemProf +/// detects an error. This is useful in cases when MemProf detects an error but +/// your program crashes before the MemProf report is printed. +void SANITIZER_CDECL __memprof_on_error(void); + +/// Prints accumulated statistics to stderr (useful for calling from the +/// debugger). +void SANITIZER_CDECL __memprof_print_accumulated_stats(void); + +/// User-provided default option settings. +/// +/// You can provide your own implementation of this function to return a string +/// containing MemProf runtime options (for example, +/// verbosity=1:print_stats=1). +/// +/// \returns Default options string. +const char *SANITIZER_CDECL __memprof_default_options(void); + +/// Prints the memory profile to the current profile file. +/// +/// \returns 0 on success. +int SANITIZER_CDECL __memprof_profile_dump(void); + +/// Closes the existing file descriptor, if it is valid and not stdout or +/// stderr, and resets the internal state such that the profile filename is +/// reopened on the next profile dump attempt. This can be used to enable +/// multiple rounds of profiling on the same binary. +void SANITIZER_CDECL __memprof_profile_reset(void); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_MEMPROF_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/msan_interface.h b/llvm/lib/clang/19/include/sanitizer/msan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..6fedc031254537fc02e6db03290db586c8154c7e --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/msan_interface.h @@ -0,0 +1,135 @@ +//===-- msan_interface.h --------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of MemorySanitizer. +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef MSAN_INTERFACE_H +#define MSAN_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif +/* Set raw origin for the memory range. */ +void SANITIZER_CDECL __msan_set_origin(const volatile void *a, size_t size, + uint32_t origin); + +/* Get raw origin for an address. */ +uint32_t SANITIZER_CDECL __msan_get_origin(const volatile void *a); + +/* Test that this_id is a descendant of prev_id (or they are simply equal). + * "descendant" here means they are part of the same chain, created with + * __msan_chain_origin. */ +int SANITIZER_CDECL __msan_origin_is_descendant_or_same(uint32_t this_id, + uint32_t prev_id); + +/* Returns non-zero if tracking origins. */ +int SANITIZER_CDECL __msan_get_track_origins(void); + +/* Returns the origin id of the latest UMR in the calling thread. */ +uint32_t SANITIZER_CDECL __msan_get_umr_origin(void); + +/* Make memory region fully initialized (without changing its contents). */ +void SANITIZER_CDECL __msan_unpoison(const volatile void *a, size_t size); + +/* Make a null-terminated string fully initialized (without changing its + contents). */ +void SANITIZER_CDECL __msan_unpoison_string(const volatile char *a); + +/* Make first n parameters of the next function call fully initialized. */ +void SANITIZER_CDECL __msan_unpoison_param(size_t n); + +/* Make memory region fully uninitialized (without changing its contents). + This is a legacy interface that does not update origin information. Use + __msan_allocated_memory() instead. */ +void SANITIZER_CDECL __msan_poison(const volatile void *a, size_t size); + +/* Make memory region partially uninitialized (without changing its contents). + */ +void SANITIZER_CDECL __msan_partial_poison(const volatile void *data, + void *shadow, size_t size); + +/* Returns the offset of the first (at least partially) poisoned byte in the + memory range, or -1 if the whole range is good. */ +intptr_t SANITIZER_CDECL __msan_test_shadow(const volatile void *x, + size_t size); + +/* Checks that memory range is fully initialized, and reports an error if it + * is not. */ +void SANITIZER_CDECL __msan_check_mem_is_initialized(const volatile void *x, + size_t size); + +/* For testing: + __msan_set_expect_umr(1); + ... some buggy code ... + __msan_set_expect_umr(0); + The last line will verify that a UMR happened. */ +void SANITIZER_CDECL __msan_set_expect_umr(int expect_umr); + +/* Change the value of keep_going flag. Non-zero value means don't terminate + program execution when an error is detected. This will not affect error in + modules that were compiled without the corresponding compiler flag. */ +void SANITIZER_CDECL __msan_set_keep_going(int keep_going); + +/* Print shadow and origin for the memory range to stderr in a human-readable + format. */ +void SANITIZER_CDECL __msan_print_shadow(const volatile void *x, size_t size); + +/* Print shadow for the memory range to stderr in a minimalistic + human-readable format. */ +void SANITIZER_CDECL __msan_dump_shadow(const volatile void *x, size_t size); + +/* Returns true if running under a dynamic tool (DynamoRio-based). */ +int SANITIZER_CDECL __msan_has_dynamic_component(void); + +/* Tell MSan about newly allocated memory (ex.: custom allocator). + Memory will be marked uninitialized, with origin at the call site. */ +void SANITIZER_CDECL __msan_allocated_memory(const volatile void *data, + size_t size); + +/* Tell MSan about newly destroyed memory. Mark memory as uninitialized. */ +void SANITIZER_CDECL __sanitizer_dtor_callback(const volatile void *data, + size_t size); +void SANITIZER_CDECL __sanitizer_dtor_callback_fields(const volatile void *data, + size_t size); +void SANITIZER_CDECL __sanitizer_dtor_callback_vptr(const volatile void *data); + +/* This function may be optionally provided by user and should return + a string containing Msan runtime options. See msan_flags.h for details. */ +const char *SANITIZER_CDECL __msan_default_options(void); + +/* Deprecated. Call __sanitizer_set_death_callback instead. */ +void SANITIZER_CDECL +__msan_set_death_callback(void(SANITIZER_CDECL *callback)(void)); + +/* Update shadow for the application copy of size bytes from src to dst. + Src and dst are application addresses. This function does not copy the + actual application memory, it only updates shadow and origin for such + copy. Source and destination regions can overlap. */ +void SANITIZER_CDECL __msan_copy_shadow(const volatile void *dst, + const volatile void *src, size_t size); + +/* Disables uninitialized memory checks in interceptors. */ +void SANITIZER_CDECL __msan_scoped_disable_interceptor_checks(void); + +/* Re-enables uninitialized memory checks in interceptors after a previous + call to __msan_scoped_disable_interceptor_checks. */ +void SANITIZER_CDECL __msan_scoped_enable_interceptor_checks(void); + +void SANITIZER_CDECL __msan_start_switch_fiber(const void *bottom, size_t size); +void SANITIZER_CDECL __msan_finish_switch_fiber(const void **bottom_old, + size_t *size_old); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/llvm/lib/clang/19/include/sanitizer/netbsd_syscall_hooks.h b/llvm/lib/clang/19/include/sanitizer/netbsd_syscall_hooks.h new file mode 100644 index 0000000000000000000000000000000000000000..f661152ccbac7b7897210129855240e22e2fade7 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/netbsd_syscall_hooks.h @@ -0,0 +1,5005 @@ +//===-- netbsd_syscall_hooks.h --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of public sanitizer interface. +// +// System call handlers. +// +// Interface methods declared in this header implement pre- and post- syscall +// actions for the active sanitizer. +// Usage: +// __sanitizer_syscall_pre_getfoo(...args...); +// long long res = syscall(SYS_getfoo, ...args...); +// __sanitizer_syscall_post_getfoo(res, ...args...); +// +// DO NOT EDIT! THIS FILE HAS BEEN GENERATED! +// +// Generated with: generate_netbsd_syscalls.awk +// Generated date: 2020-09-10 +// Generated from: syscalls.master,v 1.306 2020/08/14 00:53:16 riastradh Exp +// +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_NETBSD_SYSCALL_HOOKS_H +#define SANITIZER_NETBSD_SYSCALL_HOOKS_H + +#define __sanitizer_syscall_pre_syscall(code, arg0, arg1, arg2, arg3, arg4, \ + arg5, arg6, arg7) \ + __sanitizer_syscall_pre_impl_syscall( \ + (long long)(code), (long long)(arg0), (long long)(arg1), \ + (long long)(arg2), (long long)(arg3), (long long)(arg4), \ + (long long)(arg5), (long long)(arg6), (long long)(arg7)) +#define __sanitizer_syscall_post_syscall(res, code, arg0, arg1, arg2, arg3, \ + arg4, arg5, arg6, arg7) \ + __sanitizer_syscall_post_impl_syscall( \ + res, (long long)(code), (long long)(arg0), (long long)(arg1), \ + (long long)(arg2), (long long)(arg3), (long long)(arg4), \ + (long long)(arg5), (long long)(arg6), (long long)(arg7)) +#define __sanitizer_syscall_pre_exit(rval) \ + __sanitizer_syscall_pre_impl_exit((long long)(rval)) +#define __sanitizer_syscall_post_exit(res, rval) \ + __sanitizer_syscall_post_impl_exit(res, (long long)(rval)) +#define __sanitizer_syscall_pre_fork() __sanitizer_syscall_pre_impl_fork() +#define __sanitizer_syscall_post_fork(res) \ + __sanitizer_syscall_post_impl_fork(res) +#define __sanitizer_syscall_pre_read(fd, buf, nbyte) \ + __sanitizer_syscall_pre_impl_read((long long)(fd), (long long)(buf), \ + (long long)(nbyte)) +#define __sanitizer_syscall_post_read(res, fd, buf, nbyte) \ + __sanitizer_syscall_post_impl_read(res, (long long)(fd), (long long)(buf), \ + (long long)(nbyte)) +#define __sanitizer_syscall_pre_write(fd, buf, nbyte) \ + __sanitizer_syscall_pre_impl_write((long long)(fd), (long long)(buf), \ + (long long)(nbyte)) +#define __sanitizer_syscall_post_write(res, fd, buf, nbyte) \ + __sanitizer_syscall_post_impl_write(res, (long long)(fd), (long long)(buf), \ + (long long)(nbyte)) +#define __sanitizer_syscall_pre_open(path, flags, mode) \ + __sanitizer_syscall_pre_impl_open((long long)(path), (long long)(flags), \ + (long long)(mode)) +#define __sanitizer_syscall_post_open(res, path, flags, mode) \ + __sanitizer_syscall_post_impl_open(res, (long long)(path), \ + (long long)(flags), (long long)(mode)) +#define __sanitizer_syscall_pre_close(fd) \ + __sanitizer_syscall_pre_impl_close((long long)(fd)) +#define __sanitizer_syscall_post_close(res, fd) \ + __sanitizer_syscall_post_impl_close(res, (long long)(fd)) +#define __sanitizer_syscall_pre_compat_50_wait4(pid, status, options, rusage) \ + __sanitizer_syscall_pre_impl_compat_50_wait4( \ + (long long)(pid), (long long)(status), (long long)(options), \ + (long long)(rusage)) +#define __sanitizer_syscall_post_compat_50_wait4(res, pid, status, options, \ + rusage) \ + __sanitizer_syscall_post_impl_compat_50_wait4( \ + res, (long long)(pid), (long long)(status), (long long)(options), \ + (long long)(rusage)) +#define __sanitizer_syscall_pre_compat_43_ocreat(path, mode) \ + __sanitizer_syscall_pre_impl_compat_43_ocreat((long long)(path), \ + (long long)(mode)) +#define __sanitizer_syscall_post_compat_43_ocreat(res, path, mode) \ + __sanitizer_syscall_post_impl_compat_43_ocreat(res, (long long)(path), \ + (long long)(mode)) +#define __sanitizer_syscall_pre_link(path, link) \ + __sanitizer_syscall_pre_impl_link((long long)(path), (long long)(link)) +#define __sanitizer_syscall_post_link(res, path, link) \ + __sanitizer_syscall_post_impl_link(res, (long long)(path), (long long)(link)) +#define __sanitizer_syscall_pre_unlink(path) \ + __sanitizer_syscall_pre_impl_unlink((long long)(path)) +#define __sanitizer_syscall_post_unlink(res, path) \ + __sanitizer_syscall_post_impl_unlink(res, (long long)(path)) +/* syscall 11 has been skipped */ +#define __sanitizer_syscall_pre_chdir(path) \ + __sanitizer_syscall_pre_impl_chdir((long long)(path)) +#define __sanitizer_syscall_post_chdir(res, path) \ + __sanitizer_syscall_post_impl_chdir(res, (long long)(path)) +#define __sanitizer_syscall_pre_fchdir(fd) \ + __sanitizer_syscall_pre_impl_fchdir((long long)(fd)) +#define __sanitizer_syscall_post_fchdir(res, fd) \ + __sanitizer_syscall_post_impl_fchdir(res, (long long)(fd)) +#define __sanitizer_syscall_pre_compat_50_mknod(path, mode, dev) \ + __sanitizer_syscall_pre_impl_compat_50_mknod( \ + (long long)(path), (long long)(mode), (long long)(dev)) +#define __sanitizer_syscall_post_compat_50_mknod(res, path, mode, dev) \ + __sanitizer_syscall_post_impl_compat_50_mknod( \ + res, (long long)(path), (long long)(mode), (long long)(dev)) +#define __sanitizer_syscall_pre_chmod(path, mode) \ + __sanitizer_syscall_pre_impl_chmod((long long)(path), (long long)(mode)) +#define __sanitizer_syscall_post_chmod(res, path, mode) \ + __sanitizer_syscall_post_impl_chmod(res, (long long)(path), (long long)(mode)) +#define __sanitizer_syscall_pre_chown(path, uid, gid) \ + __sanitizer_syscall_pre_impl_chown((long long)(path), (long long)(uid), \ + (long long)(gid)) +#define __sanitizer_syscall_post_chown(res, path, uid, gid) \ + __sanitizer_syscall_post_impl_chown(res, (long long)(path), \ + (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_pre_break(nsize) \ + __sanitizer_syscall_pre_impl_break((long long)(nsize)) +#define __sanitizer_syscall_post_break(res, nsize) \ + __sanitizer_syscall_post_impl_break(res, (long long)(nsize)) +#define __sanitizer_syscall_pre_compat_20_getfsstat(buf, bufsize, flags) \ + __sanitizer_syscall_pre_impl_compat_20_getfsstat( \ + (long long)(buf), (long long)(bufsize), (long long)(flags)) +#define __sanitizer_syscall_post_compat_20_getfsstat(res, buf, bufsize, flags) \ + __sanitizer_syscall_post_impl_compat_20_getfsstat( \ + res, (long long)(buf), (long long)(bufsize), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_43_olseek(fd, offset, whence) \ + __sanitizer_syscall_pre_impl_compat_43_olseek( \ + (long long)(fd), (long long)(offset), (long long)(whence)) +#define __sanitizer_syscall_post_compat_43_olseek(res, fd, offset, whence) \ + __sanitizer_syscall_post_impl_compat_43_olseek( \ + res, (long long)(fd), (long long)(offset), (long long)(whence)) +#define __sanitizer_syscall_pre_getpid() __sanitizer_syscall_pre_impl_getpid() +#define __sanitizer_syscall_post_getpid(res) \ + __sanitizer_syscall_post_impl_getpid(res) +#define __sanitizer_syscall_pre_compat_40_mount(type, path, flags, data) \ + __sanitizer_syscall_pre_impl_compat_40_mount( \ + (long long)(type), (long long)(path), (long long)(flags), \ + (long long)(data)) +#define __sanitizer_syscall_post_compat_40_mount(res, type, path, flags, data) \ + __sanitizer_syscall_post_impl_compat_40_mount( \ + res, (long long)(type), (long long)(path), (long long)(flags), \ + (long long)(data)) +#define __sanitizer_syscall_pre_unmount(path, flags) \ + __sanitizer_syscall_pre_impl_unmount((long long)(path), (long long)(flags)) +#define __sanitizer_syscall_post_unmount(res, path, flags) \ + __sanitizer_syscall_post_impl_unmount(res, (long long)(path), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_setuid(uid) \ + __sanitizer_syscall_pre_impl_setuid((long long)(uid)) +#define __sanitizer_syscall_post_setuid(res, uid) \ + __sanitizer_syscall_post_impl_setuid(res, (long long)(uid)) +#define __sanitizer_syscall_pre_getuid() __sanitizer_syscall_pre_impl_getuid() +#define __sanitizer_syscall_post_getuid(res) \ + __sanitizer_syscall_post_impl_getuid(res) +#define __sanitizer_syscall_pre_geteuid() __sanitizer_syscall_pre_impl_geteuid() +#define __sanitizer_syscall_post_geteuid(res) \ + __sanitizer_syscall_post_impl_geteuid(res) +#define __sanitizer_syscall_pre_ptrace(req, pid, addr, data) \ + __sanitizer_syscall_pre_impl_ptrace((long long)(req), (long long)(pid), \ + (long long)(addr), (long long)(data)) +#define __sanitizer_syscall_post_ptrace(res, req, pid, addr, data) \ + __sanitizer_syscall_post_impl_ptrace(res, (long long)(req), \ + (long long)(pid), (long long)(addr), \ + (long long)(data)) +#define __sanitizer_syscall_pre_recvmsg(s, msg, flags) \ + __sanitizer_syscall_pre_impl_recvmsg((long long)(s), (long long)(msg), \ + (long long)(flags)) +#define __sanitizer_syscall_post_recvmsg(res, s, msg, flags) \ + __sanitizer_syscall_post_impl_recvmsg(res, (long long)(s), (long long)(msg), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_sendmsg(s, msg, flags) \ + __sanitizer_syscall_pre_impl_sendmsg((long long)(s), (long long)(msg), \ + (long long)(flags)) +#define __sanitizer_syscall_post_sendmsg(res, s, msg, flags) \ + __sanitizer_syscall_post_impl_sendmsg(res, (long long)(s), (long long)(msg), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_recvfrom(s, buf, len, flags, from, \ + fromlenaddr) \ + __sanitizer_syscall_pre_impl_recvfrom( \ + (long long)(s), (long long)(buf), (long long)(len), (long long)(flags), \ + (long long)(from), (long long)(fromlenaddr)) +#define __sanitizer_syscall_post_recvfrom(res, s, buf, len, flags, from, \ + fromlenaddr) \ + __sanitizer_syscall_post_impl_recvfrom( \ + res, (long long)(s), (long long)(buf), (long long)(len), \ + (long long)(flags), (long long)(from), (long long)(fromlenaddr)) +#define __sanitizer_syscall_pre_accept(s, name, anamelen) \ + __sanitizer_syscall_pre_impl_accept((long long)(s), (long long)(name), \ + (long long)(anamelen)) +#define __sanitizer_syscall_post_accept(res, s, name, anamelen) \ + __sanitizer_syscall_post_impl_accept(res, (long long)(s), (long long)(name), \ + (long long)(anamelen)) +#define __sanitizer_syscall_pre_getpeername(fdes, asa, alen) \ + __sanitizer_syscall_pre_impl_getpeername( \ + (long long)(fdes), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_post_getpeername(res, fdes, asa, alen) \ + __sanitizer_syscall_post_impl_getpeername( \ + res, (long long)(fdes), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_pre_getsockname(fdes, asa, alen) \ + __sanitizer_syscall_pre_impl_getsockname( \ + (long long)(fdes), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_post_getsockname(res, fdes, asa, alen) \ + __sanitizer_syscall_post_impl_getsockname( \ + res, (long long)(fdes), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_pre_access(path, flags) \ + __sanitizer_syscall_pre_impl_access((long long)(path), (long long)(flags)) +#define __sanitizer_syscall_post_access(res, path, flags) \ + __sanitizer_syscall_post_impl_access(res, (long long)(path), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_chflags(path, flags) \ + __sanitizer_syscall_pre_impl_chflags((long long)(path), (long long)(flags)) +#define __sanitizer_syscall_post_chflags(res, path, flags) \ + __sanitizer_syscall_post_impl_chflags(res, (long long)(path), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_fchflags(fd, flags) \ + __sanitizer_syscall_pre_impl_fchflags((long long)(fd), (long long)(flags)) +#define __sanitizer_syscall_post_fchflags(res, fd, flags) \ + __sanitizer_syscall_post_impl_fchflags(res, (long long)(fd), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_sync() __sanitizer_syscall_pre_impl_sync() +#define __sanitizer_syscall_post_sync(res) \ + __sanitizer_syscall_post_impl_sync(res) +#define __sanitizer_syscall_pre_kill(pid, signum) \ + __sanitizer_syscall_pre_impl_kill((long long)(pid), (long long)(signum)) +#define __sanitizer_syscall_post_kill(res, pid, signum) \ + __sanitizer_syscall_post_impl_kill(res, (long long)(pid), (long long)(signum)) +#define __sanitizer_syscall_pre_compat_43_stat43(path, ub) \ + __sanitizer_syscall_pre_impl_compat_43_stat43((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_43_stat43(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_43_stat43(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_getppid() __sanitizer_syscall_pre_impl_getppid() +#define __sanitizer_syscall_post_getppid(res) \ + __sanitizer_syscall_post_impl_getppid(res) +#define __sanitizer_syscall_pre_compat_43_lstat43(path, ub) \ + __sanitizer_syscall_pre_impl_compat_43_lstat43((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_43_lstat43(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_43_lstat43(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_dup(fd) \ + __sanitizer_syscall_pre_impl_dup((long long)(fd)) +#define __sanitizer_syscall_post_dup(res, fd) \ + __sanitizer_syscall_post_impl_dup(res, (long long)(fd)) +#define __sanitizer_syscall_pre_pipe() __sanitizer_syscall_pre_impl_pipe() +#define __sanitizer_syscall_post_pipe(res) \ + __sanitizer_syscall_post_impl_pipe(res) +#define __sanitizer_syscall_pre_getegid() __sanitizer_syscall_pre_impl_getegid() +#define __sanitizer_syscall_post_getegid(res) \ + __sanitizer_syscall_post_impl_getegid(res) +#define __sanitizer_syscall_pre_profil(samples, size, offset, scale) \ + __sanitizer_syscall_pre_impl_profil((long long)(samples), (long long)(size), \ + (long long)(offset), (long long)(scale)) +#define __sanitizer_syscall_post_profil(res, samples, size, offset, scale) \ + __sanitizer_syscall_post_impl_profil(res, (long long)(samples), \ + (long long)(size), (long long)(offset), \ + (long long)(scale)) +#define __sanitizer_syscall_pre_ktrace(fname, ops, facs, pid) \ + __sanitizer_syscall_pre_impl_ktrace((long long)(fname), (long long)(ops), \ + (long long)(facs), (long long)(pid)) +#define __sanitizer_syscall_post_ktrace(res, fname, ops, facs, pid) \ + __sanitizer_syscall_post_impl_ktrace(res, (long long)(fname), \ + (long long)(ops), (long long)(facs), \ + (long long)(pid)) +#define __sanitizer_syscall_pre_compat_13_sigaction13(signum, nsa, osa) \ + __sanitizer_syscall_pre_impl_compat_13_sigaction13( \ + (long long)(signum), (long long)(nsa), (long long)(osa)) +#define __sanitizer_syscall_post_compat_13_sigaction13(res, signum, nsa, osa) \ + __sanitizer_syscall_post_impl_compat_13_sigaction13( \ + res, (long long)(signum), (long long)(nsa), (long long)(osa)) +#define __sanitizer_syscall_pre_getgid() __sanitizer_syscall_pre_impl_getgid() +#define __sanitizer_syscall_post_getgid(res) \ + __sanitizer_syscall_post_impl_getgid(res) +#define __sanitizer_syscall_pre_compat_13_sigprocmask13(how, mask) \ + __sanitizer_syscall_pre_impl_compat_13_sigprocmask13((long long)(how), \ + (long long)(mask)) +#define __sanitizer_syscall_post_compat_13_sigprocmask13(res, how, mask) \ + __sanitizer_syscall_post_impl_compat_13_sigprocmask13(res, (long long)(how), \ + (long long)(mask)) +#define __sanitizer_syscall_pre___getlogin(namebuf, namelen) \ + __sanitizer_syscall_pre_impl___getlogin((long long)(namebuf), \ + (long long)(namelen)) +#define __sanitizer_syscall_post___getlogin(res, namebuf, namelen) \ + __sanitizer_syscall_post_impl___getlogin(res, (long long)(namebuf), \ + (long long)(namelen)) +#define __sanitizer_syscall_pre___setlogin(namebuf) \ + __sanitizer_syscall_pre_impl___setlogin((long long)(namebuf)) +#define __sanitizer_syscall_post___setlogin(res, namebuf) \ + __sanitizer_syscall_post_impl___setlogin(res, (long long)(namebuf)) +#define __sanitizer_syscall_pre_acct(path) \ + __sanitizer_syscall_pre_impl_acct((long long)(path)) +#define __sanitizer_syscall_post_acct(res, path) \ + __sanitizer_syscall_post_impl_acct(res, (long long)(path)) +#define __sanitizer_syscall_pre_compat_13_sigpending13() \ + __sanitizer_syscall_pre_impl_compat_13_sigpending13() +#define __sanitizer_syscall_post_compat_13_sigpending13(res) \ + __sanitizer_syscall_post_impl_compat_13_sigpending13(res) +#define __sanitizer_syscall_pre_compat_13_sigaltstack13(nss, oss) \ + __sanitizer_syscall_pre_impl_compat_13_sigaltstack13((long long)(nss), \ + (long long)(oss)) +#define __sanitizer_syscall_post_compat_13_sigaltstack13(res, nss, oss) \ + __sanitizer_syscall_post_impl_compat_13_sigaltstack13(res, (long long)(nss), \ + (long long)(oss)) +#define __sanitizer_syscall_pre_ioctl(fd, com, data) \ + __sanitizer_syscall_pre_impl_ioctl((long long)(fd), (long long)(com), \ + (long long)(data)) +#define __sanitizer_syscall_post_ioctl(res, fd, com, data) \ + __sanitizer_syscall_post_impl_ioctl(res, (long long)(fd), (long long)(com), \ + (long long)(data)) +#define __sanitizer_syscall_pre_compat_12_oreboot(opt) \ + __sanitizer_syscall_pre_impl_compat_12_oreboot((long long)(opt)) +#define __sanitizer_syscall_post_compat_12_oreboot(res, opt) \ + __sanitizer_syscall_post_impl_compat_12_oreboot(res, (long long)(opt)) +#define __sanitizer_syscall_pre_revoke(path) \ + __sanitizer_syscall_pre_impl_revoke((long long)(path)) +#define __sanitizer_syscall_post_revoke(res, path) \ + __sanitizer_syscall_post_impl_revoke(res, (long long)(path)) +#define __sanitizer_syscall_pre_symlink(path, link) \ + __sanitizer_syscall_pre_impl_symlink((long long)(path), (long long)(link)) +#define __sanitizer_syscall_post_symlink(res, path, link) \ + __sanitizer_syscall_post_impl_symlink(res, (long long)(path), \ + (long long)(link)) +#define __sanitizer_syscall_pre_readlink(path, buf, count) \ + __sanitizer_syscall_pre_impl_readlink((long long)(path), (long long)(buf), \ + (long long)(count)) +#define __sanitizer_syscall_post_readlink(res, path, buf, count) \ + __sanitizer_syscall_post_impl_readlink(res, (long long)(path), \ + (long long)(buf), (long long)(count)) +#define __sanitizer_syscall_pre_execve(path, argp, envp) \ + __sanitizer_syscall_pre_impl_execve((long long)(path), (long long)(argp), \ + (long long)(envp)) +#define __sanitizer_syscall_post_execve(res, path, argp, envp) \ + __sanitizer_syscall_post_impl_execve(res, (long long)(path), \ + (long long)(argp), (long long)(envp)) +#define __sanitizer_syscall_pre_umask(newmask) \ + __sanitizer_syscall_pre_impl_umask((long long)(newmask)) +#define __sanitizer_syscall_post_umask(res, newmask) \ + __sanitizer_syscall_post_impl_umask(res, (long long)(newmask)) +#define __sanitizer_syscall_pre_chroot(path) \ + __sanitizer_syscall_pre_impl_chroot((long long)(path)) +#define __sanitizer_syscall_post_chroot(res, path) \ + __sanitizer_syscall_post_impl_chroot(res, (long long)(path)) +#define __sanitizer_syscall_pre_compat_43_fstat43(fd, sb) \ + __sanitizer_syscall_pre_impl_compat_43_fstat43((long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_post_compat_43_fstat43(res, fd, sb) \ + __sanitizer_syscall_post_impl_compat_43_fstat43(res, (long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_pre_compat_43_ogetkerninfo(op, where, size, arg) \ + __sanitizer_syscall_pre_impl_compat_43_ogetkerninfo( \ + (long long)(op), (long long)(where), (long long)(size), \ + (long long)(arg)) +#define __sanitizer_syscall_post_compat_43_ogetkerninfo(res, op, where, size, \ + arg) \ + __sanitizer_syscall_post_impl_compat_43_ogetkerninfo( \ + res, (long long)(op), (long long)(where), (long long)(size), \ + (long long)(arg)) +#define __sanitizer_syscall_pre_compat_43_ogetpagesize() \ + __sanitizer_syscall_pre_impl_compat_43_ogetpagesize() +#define __sanitizer_syscall_post_compat_43_ogetpagesize(res) \ + __sanitizer_syscall_post_impl_compat_43_ogetpagesize(res) +#define __sanitizer_syscall_pre_compat_12_msync(addr, len) \ + __sanitizer_syscall_pre_impl_compat_12_msync((long long)(addr), \ + (long long)(len)) +#define __sanitizer_syscall_post_compat_12_msync(res, addr, len) \ + __sanitizer_syscall_post_impl_compat_12_msync(res, (long long)(addr), \ + (long long)(len)) +#define __sanitizer_syscall_pre_vfork() __sanitizer_syscall_pre_impl_vfork() +#define __sanitizer_syscall_post_vfork(res) \ + __sanitizer_syscall_post_impl_vfork(res) +/* syscall 67 has been skipped */ +/* syscall 68 has been skipped */ +/* syscall 69 has been skipped */ +/* syscall 70 has been skipped */ +#define __sanitizer_syscall_pre_compat_43_ommap(addr, len, prot, flags, fd, \ + pos) \ + __sanitizer_syscall_pre_impl_compat_43_ommap( \ + (long long)(addr), (long long)(len), (long long)(prot), \ + (long long)(flags), (long long)(fd), (long long)(pos)) +#define __sanitizer_syscall_post_compat_43_ommap(res, addr, len, prot, flags, \ + fd, pos) \ + __sanitizer_syscall_post_impl_compat_43_ommap( \ + res, (long long)(addr), (long long)(len), (long long)(prot), \ + (long long)(flags), (long long)(fd), (long long)(pos)) +#define __sanitizer_syscall_pre_vadvise(anom) \ + __sanitizer_syscall_pre_impl_vadvise((long long)(anom)) +#define __sanitizer_syscall_post_vadvise(res, anom) \ + __sanitizer_syscall_post_impl_vadvise(res, (long long)(anom)) +#define __sanitizer_syscall_pre_munmap(addr, len) \ + __sanitizer_syscall_pre_impl_munmap((long long)(addr), (long long)(len)) +#define __sanitizer_syscall_post_munmap(res, addr, len) \ + __sanitizer_syscall_post_impl_munmap(res, (long long)(addr), (long long)(len)) +#define __sanitizer_syscall_pre_mprotect(addr, len, prot) \ + __sanitizer_syscall_pre_impl_mprotect((long long)(addr), (long long)(len), \ + (long long)(prot)) +#define __sanitizer_syscall_post_mprotect(res, addr, len, prot) \ + __sanitizer_syscall_post_impl_mprotect(res, (long long)(addr), \ + (long long)(len), (long long)(prot)) +#define __sanitizer_syscall_pre_madvise(addr, len, behav) \ + __sanitizer_syscall_pre_impl_madvise((long long)(addr), (long long)(len), \ + (long long)(behav)) +#define __sanitizer_syscall_post_madvise(res, addr, len, behav) \ + __sanitizer_syscall_post_impl_madvise(res, (long long)(addr), \ + (long long)(len), (long long)(behav)) +/* syscall 76 has been skipped */ +/* syscall 77 has been skipped */ +#define __sanitizer_syscall_pre_mincore(addr, len, vec) \ + __sanitizer_syscall_pre_impl_mincore((long long)(addr), (long long)(len), \ + (long long)(vec)) +#define __sanitizer_syscall_post_mincore(res, addr, len, vec) \ + __sanitizer_syscall_post_impl_mincore(res, (long long)(addr), \ + (long long)(len), (long long)(vec)) +#define __sanitizer_syscall_pre_getgroups(gidsetsize, gidset) \ + __sanitizer_syscall_pre_impl_getgroups((long long)(gidsetsize), \ + (long long)(gidset)) +#define __sanitizer_syscall_post_getgroups(res, gidsetsize, gidset) \ + __sanitizer_syscall_post_impl_getgroups(res, (long long)(gidsetsize), \ + (long long)(gidset)) +#define __sanitizer_syscall_pre_setgroups(gidsetsize, gidset) \ + __sanitizer_syscall_pre_impl_setgroups((long long)(gidsetsize), \ + (long long)(gidset)) +#define __sanitizer_syscall_post_setgroups(res, gidsetsize, gidset) \ + __sanitizer_syscall_post_impl_setgroups(res, (long long)(gidsetsize), \ + (long long)(gidset)) +#define __sanitizer_syscall_pre_getpgrp() __sanitizer_syscall_pre_impl_getpgrp() +#define __sanitizer_syscall_post_getpgrp(res) \ + __sanitizer_syscall_post_impl_getpgrp(res) +#define __sanitizer_syscall_pre_setpgid(pid, pgid) \ + __sanitizer_syscall_pre_impl_setpgid((long long)(pid), (long long)(pgid)) +#define __sanitizer_syscall_post_setpgid(res, pid, pgid) \ + __sanitizer_syscall_post_impl_setpgid(res, (long long)(pid), \ + (long long)(pgid)) +#define __sanitizer_syscall_pre_compat_50_setitimer(which, itv, oitv) \ + __sanitizer_syscall_pre_impl_compat_50_setitimer( \ + (long long)(which), (long long)(itv), (long long)(oitv)) +#define __sanitizer_syscall_post_compat_50_setitimer(res, which, itv, oitv) \ + __sanitizer_syscall_post_impl_compat_50_setitimer( \ + res, (long long)(which), (long long)(itv), (long long)(oitv)) +#define __sanitizer_syscall_pre_compat_43_owait() \ + __sanitizer_syscall_pre_impl_compat_43_owait() +#define __sanitizer_syscall_post_compat_43_owait(res) \ + __sanitizer_syscall_post_impl_compat_43_owait(res) +#define __sanitizer_syscall_pre_compat_12_oswapon(name) \ + __sanitizer_syscall_pre_impl_compat_12_oswapon((long long)(name)) +#define __sanitizer_syscall_post_compat_12_oswapon(res, name) \ + __sanitizer_syscall_post_impl_compat_12_oswapon(res, (long long)(name)) +#define __sanitizer_syscall_pre_compat_50_getitimer(which, itv) \ + __sanitizer_syscall_pre_impl_compat_50_getitimer((long long)(which), \ + (long long)(itv)) +#define __sanitizer_syscall_post_compat_50_getitimer(res, which, itv) \ + __sanitizer_syscall_post_impl_compat_50_getitimer(res, (long long)(which), \ + (long long)(itv)) +#define __sanitizer_syscall_pre_compat_43_ogethostname(hostname, len) \ + __sanitizer_syscall_pre_impl_compat_43_ogethostname((long long)(hostname), \ + (long long)(len)) +#define __sanitizer_syscall_post_compat_43_ogethostname(res, hostname, len) \ + __sanitizer_syscall_post_impl_compat_43_ogethostname( \ + res, (long long)(hostname), (long long)(len)) +#define __sanitizer_syscall_pre_compat_43_osethostname(hostname, len) \ + __sanitizer_syscall_pre_impl_compat_43_osethostname((long long)(hostname), \ + (long long)(len)) +#define __sanitizer_syscall_post_compat_43_osethostname(res, hostname, len) \ + __sanitizer_syscall_post_impl_compat_43_osethostname( \ + res, (long long)(hostname), (long long)(len)) +#define __sanitizer_syscall_pre_compat_43_ogetdtablesize() \ + __sanitizer_syscall_pre_impl_compat_43_ogetdtablesize() +#define __sanitizer_syscall_post_compat_43_ogetdtablesize(res) \ + __sanitizer_syscall_post_impl_compat_43_ogetdtablesize(res) +#define __sanitizer_syscall_pre_dup2(from, to) \ + __sanitizer_syscall_pre_impl_dup2((long long)(from), (long long)(to)) +#define __sanitizer_syscall_post_dup2(res, from, to) \ + __sanitizer_syscall_post_impl_dup2(res, (long long)(from), (long long)(to)) +#define __sanitizer_syscall_pre_getrandom(buf, buflen, flags) \ + __sanitizer_syscall_pre_impl_getrandom( \ + (long long)(buf), (long long)(buflen), (long long)(flags)) +#define __sanitizer_syscall_post_getrandom(res, buf, buflen, flags) \ + __sanitizer_syscall_post_impl_getrandom( \ + res, (long long)(buf), (long long)(buflen), (long long)(flags)) +#define __sanitizer_syscall_pre_fcntl(fd, cmd, arg) \ + __sanitizer_syscall_pre_impl_fcntl((long long)(fd), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_post_fcntl(res, fd, cmd, arg) \ + __sanitizer_syscall_post_impl_fcntl(res, (long long)(fd), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_pre_compat_50_select(nd, in, ou, ex, tv) \ + __sanitizer_syscall_pre_impl_compat_50_select( \ + (long long)(nd), (long long)(in), (long long)(ou), (long long)(ex), \ + (long long)(tv)) +#define __sanitizer_syscall_post_compat_50_select(res, nd, in, ou, ex, tv) \ + __sanitizer_syscall_post_impl_compat_50_select( \ + res, (long long)(nd), (long long)(in), (long long)(ou), (long long)(ex), \ + (long long)(tv)) +/* syscall 94 has been skipped */ +#define __sanitizer_syscall_pre_fsync(fd) \ + __sanitizer_syscall_pre_impl_fsync((long long)(fd)) +#define __sanitizer_syscall_post_fsync(res, fd) \ + __sanitizer_syscall_post_impl_fsync(res, (long long)(fd)) +#define __sanitizer_syscall_pre_setpriority(which, who, prio) \ + __sanitizer_syscall_pre_impl_setpriority( \ + (long long)(which), (long long)(who), (long long)(prio)) +#define __sanitizer_syscall_post_setpriority(res, which, who, prio) \ + __sanitizer_syscall_post_impl_setpriority( \ + res, (long long)(which), (long long)(who), (long long)(prio)) +#define __sanitizer_syscall_pre_compat_30_socket(domain, type, protocol) \ + __sanitizer_syscall_pre_impl_compat_30_socket( \ + (long long)(domain), (long long)(type), (long long)(protocol)) +#define __sanitizer_syscall_post_compat_30_socket(res, domain, type, protocol) \ + __sanitizer_syscall_post_impl_compat_30_socket( \ + res, (long long)(domain), (long long)(type), (long long)(protocol)) +#define __sanitizer_syscall_pre_connect(s, name, namelen) \ + __sanitizer_syscall_pre_impl_connect((long long)(s), (long long)(name), \ + (long long)(namelen)) +#define __sanitizer_syscall_post_connect(res, s, name, namelen) \ + __sanitizer_syscall_post_impl_connect( \ + res, (long long)(s), (long long)(name), (long long)(namelen)) +#define __sanitizer_syscall_pre_compat_43_oaccept(s, name, anamelen) \ + __sanitizer_syscall_pre_impl_compat_43_oaccept( \ + (long long)(s), (long long)(name), (long long)(anamelen)) +#define __sanitizer_syscall_post_compat_43_oaccept(res, s, name, anamelen) \ + __sanitizer_syscall_post_impl_compat_43_oaccept( \ + res, (long long)(s), (long long)(name), (long long)(anamelen)) +#define __sanitizer_syscall_pre_getpriority(which, who) \ + __sanitizer_syscall_pre_impl_getpriority((long long)(which), (long long)(who)) +#define __sanitizer_syscall_post_getpriority(res, which, who) \ + __sanitizer_syscall_post_impl_getpriority(res, (long long)(which), \ + (long long)(who)) +#define __sanitizer_syscall_pre_compat_43_osend(s, buf, len, flags) \ + __sanitizer_syscall_pre_impl_compat_43_osend( \ + (long long)(s), (long long)(buf), (long long)(len), (long long)(flags)) +#define __sanitizer_syscall_post_compat_43_osend(res, s, buf, len, flags) \ + __sanitizer_syscall_post_impl_compat_43_osend( \ + res, (long long)(s), (long long)(buf), (long long)(len), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_compat_43_orecv(s, buf, len, flags) \ + __sanitizer_syscall_pre_impl_compat_43_orecv( \ + (long long)(s), (long long)(buf), (long long)(len), (long long)(flags)) +#define __sanitizer_syscall_post_compat_43_orecv(res, s, buf, len, flags) \ + __sanitizer_syscall_post_impl_compat_43_orecv( \ + res, (long long)(s), (long long)(buf), (long long)(len), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_compat_13_sigreturn13(sigcntxp) \ + __sanitizer_syscall_pre_impl_compat_13_sigreturn13((long long)(sigcntxp)) +#define __sanitizer_syscall_post_compat_13_sigreturn13(res, sigcntxp) \ + __sanitizer_syscall_post_impl_compat_13_sigreturn13(res, \ + (long long)(sigcntxp)) +#define __sanitizer_syscall_pre_bind(s, name, namelen) \ + __sanitizer_syscall_pre_impl_bind((long long)(s), (long long)(name), \ + (long long)(namelen)) +#define __sanitizer_syscall_post_bind(res, s, name, namelen) \ + __sanitizer_syscall_post_impl_bind(res, (long long)(s), (long long)(name), \ + (long long)(namelen)) +#define __sanitizer_syscall_pre_setsockopt(s, level, name, val, valsize) \ + __sanitizer_syscall_pre_impl_setsockopt((long long)(s), (long long)(level), \ + (long long)(name), (long long)(val), \ + (long long)(valsize)) +#define __sanitizer_syscall_post_setsockopt(res, s, level, name, val, valsize) \ + __sanitizer_syscall_post_impl_setsockopt( \ + res, (long long)(s), (long long)(level), (long long)(name), \ + (long long)(val), (long long)(valsize)) +#define __sanitizer_syscall_pre_listen(s, backlog) \ + __sanitizer_syscall_pre_impl_listen((long long)(s), (long long)(backlog)) +#define __sanitizer_syscall_post_listen(res, s, backlog) \ + __sanitizer_syscall_post_impl_listen(res, (long long)(s), \ + (long long)(backlog)) +/* syscall 107 has been skipped */ +#define __sanitizer_syscall_pre_compat_43_osigvec(signum, nsv, osv) \ + __sanitizer_syscall_pre_impl_compat_43_osigvec( \ + (long long)(signum), (long long)(nsv), (long long)(osv)) +#define __sanitizer_syscall_post_compat_43_osigvec(res, signum, nsv, osv) \ + __sanitizer_syscall_post_impl_compat_43_osigvec( \ + res, (long long)(signum), (long long)(nsv), (long long)(osv)) +#define __sanitizer_syscall_pre_compat_43_osigblock(mask) \ + __sanitizer_syscall_pre_impl_compat_43_osigblock((long long)(mask)) +#define __sanitizer_syscall_post_compat_43_osigblock(res, mask) \ + __sanitizer_syscall_post_impl_compat_43_osigblock(res, (long long)(mask)) +#define __sanitizer_syscall_pre_compat_43_osigsetmask(mask) \ + __sanitizer_syscall_pre_impl_compat_43_osigsetmask((long long)(mask)) +#define __sanitizer_syscall_post_compat_43_osigsetmask(res, mask) \ + __sanitizer_syscall_post_impl_compat_43_osigsetmask(res, (long long)(mask)) +#define __sanitizer_syscall_pre_compat_13_sigsuspend13(mask) \ + __sanitizer_syscall_pre_impl_compat_13_sigsuspend13((long long)(mask)) +#define __sanitizer_syscall_post_compat_13_sigsuspend13(res, mask) \ + __sanitizer_syscall_post_impl_compat_13_sigsuspend13(res, (long long)(mask)) +#define __sanitizer_syscall_pre_compat_43_osigstack(nss, oss) \ + __sanitizer_syscall_pre_impl_compat_43_osigstack((long long)(nss), \ + (long long)(oss)) +#define __sanitizer_syscall_post_compat_43_osigstack(res, nss, oss) \ + __sanitizer_syscall_post_impl_compat_43_osigstack(res, (long long)(nss), \ + (long long)(oss)) +#define __sanitizer_syscall_pre_compat_43_orecvmsg(s, msg, flags) \ + __sanitizer_syscall_pre_impl_compat_43_orecvmsg( \ + (long long)(s), (long long)(msg), (long long)(flags)) +#define __sanitizer_syscall_post_compat_43_orecvmsg(res, s, msg, flags) \ + __sanitizer_syscall_post_impl_compat_43_orecvmsg( \ + res, (long long)(s), (long long)(msg), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_43_osendmsg(s, msg, flags) \ + __sanitizer_syscall_pre_impl_compat_43_osendmsg( \ + (long long)(s), (long long)(msg), (long long)(flags)) +#define __sanitizer_syscall_post_compat_43_osendmsg(res, s, msg, flags) \ + __sanitizer_syscall_post_impl_compat_43_osendmsg( \ + res, (long long)(s), (long long)(msg), (long long)(flags)) +/* syscall 115 has been skipped */ +#define __sanitizer_syscall_pre_compat_50_gettimeofday(tp, tzp) \ + __sanitizer_syscall_pre_impl_compat_50_gettimeofday((long long)(tp), \ + (long long)(tzp)) +#define __sanitizer_syscall_post_compat_50_gettimeofday(res, tp, tzp) \ + __sanitizer_syscall_post_impl_compat_50_gettimeofday(res, (long long)(tp), \ + (long long)(tzp)) +#define __sanitizer_syscall_pre_compat_50_getrusage(who, rusage) \ + __sanitizer_syscall_pre_impl_compat_50_getrusage((long long)(who), \ + (long long)(rusage)) +#define __sanitizer_syscall_post_compat_50_getrusage(res, who, rusage) \ + __sanitizer_syscall_post_impl_compat_50_getrusage(res, (long long)(who), \ + (long long)(rusage)) +#define __sanitizer_syscall_pre_getsockopt(s, level, name, val, avalsize) \ + __sanitizer_syscall_pre_impl_getsockopt((long long)(s), (long long)(level), \ + (long long)(name), (long long)(val), \ + (long long)(avalsize)) +#define __sanitizer_syscall_post_getsockopt(res, s, level, name, val, \ + avalsize) \ + __sanitizer_syscall_post_impl_getsockopt( \ + res, (long long)(s), (long long)(level), (long long)(name), \ + (long long)(val), (long long)(avalsize)) +/* syscall 119 has been skipped */ +#define __sanitizer_syscall_pre_readv(fd, iovp, iovcnt) \ + __sanitizer_syscall_pre_impl_readv((long long)(fd), (long long)(iovp), \ + (long long)(iovcnt)) +#define __sanitizer_syscall_post_readv(res, fd, iovp, iovcnt) \ + __sanitizer_syscall_post_impl_readv(res, (long long)(fd), (long long)(iovp), \ + (long long)(iovcnt)) +#define __sanitizer_syscall_pre_writev(fd, iovp, iovcnt) \ + __sanitizer_syscall_pre_impl_writev((long long)(fd), (long long)(iovp), \ + (long long)(iovcnt)) +#define __sanitizer_syscall_post_writev(res, fd, iovp, iovcnt) \ + __sanitizer_syscall_post_impl_writev(res, (long long)(fd), \ + (long long)(iovp), (long long)(iovcnt)) +#define __sanitizer_syscall_pre_compat_50_settimeofday(tv, tzp) \ + __sanitizer_syscall_pre_impl_compat_50_settimeofday((long long)(tv), \ + (long long)(tzp)) +#define __sanitizer_syscall_post_compat_50_settimeofday(res, tv, tzp) \ + __sanitizer_syscall_post_impl_compat_50_settimeofday(res, (long long)(tv), \ + (long long)(tzp)) +#define __sanitizer_syscall_pre_fchown(fd, uid, gid) \ + __sanitizer_syscall_pre_impl_fchown((long long)(fd), (long long)(uid), \ + (long long)(gid)) +#define __sanitizer_syscall_post_fchown(res, fd, uid, gid) \ + __sanitizer_syscall_post_impl_fchown(res, (long long)(fd), (long long)(uid), \ + (long long)(gid)) +#define __sanitizer_syscall_pre_fchmod(fd, mode) \ + __sanitizer_syscall_pre_impl_fchmod((long long)(fd), (long long)(mode)) +#define __sanitizer_syscall_post_fchmod(res, fd, mode) \ + __sanitizer_syscall_post_impl_fchmod(res, (long long)(fd), (long long)(mode)) +#define __sanitizer_syscall_pre_compat_43_orecvfrom(s, buf, len, flags, from, \ + fromlenaddr) \ + __sanitizer_syscall_pre_impl_compat_43_orecvfrom( \ + (long long)(s), (long long)(buf), (long long)(len), (long long)(flags), \ + (long long)(from), (long long)(fromlenaddr)) +#define __sanitizer_syscall_post_compat_43_orecvfrom(res, s, buf, len, flags, \ + from, fromlenaddr) \ + __sanitizer_syscall_post_impl_compat_43_orecvfrom( \ + res, (long long)(s), (long long)(buf), (long long)(len), \ + (long long)(flags), (long long)(from), (long long)(fromlenaddr)) +#define __sanitizer_syscall_pre_setreuid(ruid, euid) \ + __sanitizer_syscall_pre_impl_setreuid((long long)(ruid), (long long)(euid)) +#define __sanitizer_syscall_post_setreuid(res, ruid, euid) \ + __sanitizer_syscall_post_impl_setreuid(res, (long long)(ruid), \ + (long long)(euid)) +#define __sanitizer_syscall_pre_setregid(rgid, egid) \ + __sanitizer_syscall_pre_impl_setregid((long long)(rgid), (long long)(egid)) +#define __sanitizer_syscall_post_setregid(res, rgid, egid) \ + __sanitizer_syscall_post_impl_setregid(res, (long long)(rgid), \ + (long long)(egid)) +#define __sanitizer_syscall_pre_rename(from, to) \ + __sanitizer_syscall_pre_impl_rename((long long)(from), (long long)(to)) +#define __sanitizer_syscall_post_rename(res, from, to) \ + __sanitizer_syscall_post_impl_rename(res, (long long)(from), (long long)(to)) +#define __sanitizer_syscall_pre_compat_43_otruncate(path, length) \ + __sanitizer_syscall_pre_impl_compat_43_otruncate((long long)(path), \ + (long long)(length)) +#define __sanitizer_syscall_post_compat_43_otruncate(res, path, length) \ + __sanitizer_syscall_post_impl_compat_43_otruncate(res, (long long)(path), \ + (long long)(length)) +#define __sanitizer_syscall_pre_compat_43_oftruncate(fd, length) \ + __sanitizer_syscall_pre_impl_compat_43_oftruncate((long long)(fd), \ + (long long)(length)) +#define __sanitizer_syscall_post_compat_43_oftruncate(res, fd, length) \ + __sanitizer_syscall_post_impl_compat_43_oftruncate(res, (long long)(fd), \ + (long long)(length)) +#define __sanitizer_syscall_pre_flock(fd, how) \ + __sanitizer_syscall_pre_impl_flock((long long)(fd), (long long)(how)) +#define __sanitizer_syscall_post_flock(res, fd, how) \ + __sanitizer_syscall_post_impl_flock(res, (long long)(fd), (long long)(how)) +#define __sanitizer_syscall_pre_mkfifo(path, mode) \ + __sanitizer_syscall_pre_impl_mkfifo((long long)(path), (long long)(mode)) +#define __sanitizer_syscall_post_mkfifo(res, path, mode) \ + __sanitizer_syscall_post_impl_mkfifo(res, (long long)(path), \ + (long long)(mode)) +#define __sanitizer_syscall_pre_sendto(s, buf, len, flags, to, tolen) \ + __sanitizer_syscall_pre_impl_sendto((long long)(s), (long long)(buf), \ + (long long)(len), (long long)(flags), \ + (long long)(to), (long long)(tolen)) +#define __sanitizer_syscall_post_sendto(res, s, buf, len, flags, to, tolen) \ + __sanitizer_syscall_post_impl_sendto(res, (long long)(s), (long long)(buf), \ + (long long)(len), (long long)(flags), \ + (long long)(to), (long long)(tolen)) +#define __sanitizer_syscall_pre_shutdown(s, how) \ + __sanitizer_syscall_pre_impl_shutdown((long long)(s), (long long)(how)) +#define __sanitizer_syscall_post_shutdown(res, s, how) \ + __sanitizer_syscall_post_impl_shutdown(res, (long long)(s), (long long)(how)) +#define __sanitizer_syscall_pre_socketpair(domain, type, protocol, rsv) \ + __sanitizer_syscall_pre_impl_socketpair( \ + (long long)(domain), (long long)(type), (long long)(protocol), \ + (long long)(rsv)) +#define __sanitizer_syscall_post_socketpair(res, domain, type, protocol, rsv) \ + __sanitizer_syscall_post_impl_socketpair( \ + res, (long long)(domain), (long long)(type), (long long)(protocol), \ + (long long)(rsv)) +#define __sanitizer_syscall_pre_mkdir(path, mode) \ + __sanitizer_syscall_pre_impl_mkdir((long long)(path), (long long)(mode)) +#define __sanitizer_syscall_post_mkdir(res, path, mode) \ + __sanitizer_syscall_post_impl_mkdir(res, (long long)(path), (long long)(mode)) +#define __sanitizer_syscall_pre_rmdir(path) \ + __sanitizer_syscall_pre_impl_rmdir((long long)(path)) +#define __sanitizer_syscall_post_rmdir(res, path) \ + __sanitizer_syscall_post_impl_rmdir(res, (long long)(path)) +#define __sanitizer_syscall_pre_compat_50_utimes(path, tptr) \ + __sanitizer_syscall_pre_impl_compat_50_utimes((long long)(path), \ + (long long)(tptr)) +#define __sanitizer_syscall_post_compat_50_utimes(res, path, tptr) \ + __sanitizer_syscall_post_impl_compat_50_utimes(res, (long long)(path), \ + (long long)(tptr)) +/* syscall 139 has been skipped */ +#define __sanitizer_syscall_pre_compat_50_adjtime(delta, olddelta) \ + __sanitizer_syscall_pre_impl_compat_50_adjtime((long long)(delta), \ + (long long)(olddelta)) +#define __sanitizer_syscall_post_compat_50_adjtime(res, delta, olddelta) \ + __sanitizer_syscall_post_impl_compat_50_adjtime(res, (long long)(delta), \ + (long long)(olddelta)) +#define __sanitizer_syscall_pre_compat_43_ogetpeername(fdes, asa, alen) \ + __sanitizer_syscall_pre_impl_compat_43_ogetpeername( \ + (long long)(fdes), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_post_compat_43_ogetpeername(res, fdes, asa, alen) \ + __sanitizer_syscall_post_impl_compat_43_ogetpeername( \ + res, (long long)(fdes), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_pre_compat_43_ogethostid() \ + __sanitizer_syscall_pre_impl_compat_43_ogethostid() +#define __sanitizer_syscall_post_compat_43_ogethostid(res) \ + __sanitizer_syscall_post_impl_compat_43_ogethostid(res) +#define __sanitizer_syscall_pre_compat_43_osethostid(hostid) \ + __sanitizer_syscall_pre_impl_compat_43_osethostid((long long)(hostid)) +#define __sanitizer_syscall_post_compat_43_osethostid(res, hostid) \ + __sanitizer_syscall_post_impl_compat_43_osethostid(res, (long long)(hostid)) +#define __sanitizer_syscall_pre_compat_43_ogetrlimit(which, rlp) \ + __sanitizer_syscall_pre_impl_compat_43_ogetrlimit((long long)(which), \ + (long long)(rlp)) +#define __sanitizer_syscall_post_compat_43_ogetrlimit(res, which, rlp) \ + __sanitizer_syscall_post_impl_compat_43_ogetrlimit(res, (long long)(which), \ + (long long)(rlp)) +#define __sanitizer_syscall_pre_compat_43_osetrlimit(which, rlp) \ + __sanitizer_syscall_pre_impl_compat_43_osetrlimit((long long)(which), \ + (long long)(rlp)) +#define __sanitizer_syscall_post_compat_43_osetrlimit(res, which, rlp) \ + __sanitizer_syscall_post_impl_compat_43_osetrlimit(res, (long long)(which), \ + (long long)(rlp)) +#define __sanitizer_syscall_pre_compat_43_okillpg(pgid, signum) \ + __sanitizer_syscall_pre_impl_compat_43_okillpg((long long)(pgid), \ + (long long)(signum)) +#define __sanitizer_syscall_post_compat_43_okillpg(res, pgid, signum) \ + __sanitizer_syscall_post_impl_compat_43_okillpg(res, (long long)(pgid), \ + (long long)(signum)) +#define __sanitizer_syscall_pre_setsid() __sanitizer_syscall_pre_impl_setsid() +#define __sanitizer_syscall_post_setsid(res) \ + __sanitizer_syscall_post_impl_setsid(res) +#define __sanitizer_syscall_pre_compat_50_quotactl(path, cmd, uid, arg) \ + __sanitizer_syscall_pre_impl_compat_50_quotactl( \ + (long long)(path), (long long)(cmd), (long long)(uid), (long long)(arg)) +#define __sanitizer_syscall_post_compat_50_quotactl(res, path, cmd, uid, arg) \ + __sanitizer_syscall_post_impl_compat_50_quotactl( \ + res, (long long)(path), (long long)(cmd), (long long)(uid), \ + (long long)(arg)) +#define __sanitizer_syscall_pre_compat_43_oquota() \ + __sanitizer_syscall_pre_impl_compat_43_oquota() +#define __sanitizer_syscall_post_compat_43_oquota(res) \ + __sanitizer_syscall_post_impl_compat_43_oquota(res) +#define __sanitizer_syscall_pre_compat_43_ogetsockname(fdec, asa, alen) \ + __sanitizer_syscall_pre_impl_compat_43_ogetsockname( \ + (long long)(fdec), (long long)(asa), (long long)(alen)) +#define __sanitizer_syscall_post_compat_43_ogetsockname(res, fdec, asa, alen) \ + __sanitizer_syscall_post_impl_compat_43_ogetsockname( \ + res, (long long)(fdec), (long long)(asa), (long long)(alen)) +/* syscall 151 has been skipped */ +/* syscall 152 has been skipped */ +/* syscall 153 has been skipped */ +/* syscall 154 has been skipped */ +#define __sanitizer_syscall_pre_nfssvc(flag, argp) \ + __sanitizer_syscall_pre_impl_nfssvc((long long)(flag), (long long)(argp)) +#define __sanitizer_syscall_post_nfssvc(res, flag, argp) \ + __sanitizer_syscall_post_impl_nfssvc(res, (long long)(flag), \ + (long long)(argp)) +#define __sanitizer_syscall_pre_compat_43_ogetdirentries(fd, buf, count, \ + basep) \ + __sanitizer_syscall_pre_impl_compat_43_ogetdirentries( \ + (long long)(fd), (long long)(buf), (long long)(count), \ + (long long)(basep)) +#define __sanitizer_syscall_post_compat_43_ogetdirentries(res, fd, buf, count, \ + basep) \ + __sanitizer_syscall_post_impl_compat_43_ogetdirentries( \ + res, (long long)(fd), (long long)(buf), (long long)(count), \ + (long long)(basep)) +#define __sanitizer_syscall_pre_compat_20_statfs(path, buf) \ + __sanitizer_syscall_pre_impl_compat_20_statfs((long long)(path), \ + (long long)(buf)) +#define __sanitizer_syscall_post_compat_20_statfs(res, path, buf) \ + __sanitizer_syscall_post_impl_compat_20_statfs(res, (long long)(path), \ + (long long)(buf)) +#define __sanitizer_syscall_pre_compat_20_fstatfs(fd, buf) \ + __sanitizer_syscall_pre_impl_compat_20_fstatfs((long long)(fd), \ + (long long)(buf)) +#define __sanitizer_syscall_post_compat_20_fstatfs(res, fd, buf) \ + __sanitizer_syscall_post_impl_compat_20_fstatfs(res, (long long)(fd), \ + (long long)(buf)) +/* syscall 159 has been skipped */ +/* syscall 160 has been skipped */ +#define __sanitizer_syscall_pre_compat_30_getfh(fname, fhp) \ + __sanitizer_syscall_pre_impl_compat_30_getfh((long long)(fname), \ + (long long)(fhp)) +#define __sanitizer_syscall_post_compat_30_getfh(res, fname, fhp) \ + __sanitizer_syscall_post_impl_compat_30_getfh(res, (long long)(fname), \ + (long long)(fhp)) +#define __sanitizer_syscall_pre_compat_09_ogetdomainname(domainname, len) \ + __sanitizer_syscall_pre_impl_compat_09_ogetdomainname( \ + (long long)(domainname), (long long)(len)) +#define __sanitizer_syscall_post_compat_09_ogetdomainname(res, domainname, \ + len) \ + __sanitizer_syscall_post_impl_compat_09_ogetdomainname( \ + res, (long long)(domainname), (long long)(len)) +#define __sanitizer_syscall_pre_compat_09_osetdomainname(domainname, len) \ + __sanitizer_syscall_pre_impl_compat_09_osetdomainname( \ + (long long)(domainname), (long long)(len)) +#define __sanitizer_syscall_post_compat_09_osetdomainname(res, domainname, \ + len) \ + __sanitizer_syscall_post_impl_compat_09_osetdomainname( \ + res, (long long)(domainname), (long long)(len)) +#define __sanitizer_syscall_pre_compat_09_ouname(name) \ + __sanitizer_syscall_pre_impl_compat_09_ouname((long long)(name)) +#define __sanitizer_syscall_post_compat_09_ouname(res, name) \ + __sanitizer_syscall_post_impl_compat_09_ouname(res, (long long)(name)) +#define __sanitizer_syscall_pre_sysarch(op, parms) \ + __sanitizer_syscall_pre_impl_sysarch((long long)(op), (long long)(parms)) +#define __sanitizer_syscall_post_sysarch(res, op, parms) \ + __sanitizer_syscall_post_impl_sysarch(res, (long long)(op), \ + (long long)(parms)) +#define __sanitizer_syscall_pre___futex(uaddr, op, val, timeout, uaddr2, val2, \ + val3) \ + __sanitizer_syscall_pre_impl___futex((long long)(uaddr), (long long)(op), \ + (long long)(val), (long long)(timeout), \ + (long long)(uaddr2), (long long)(val2), \ + (long long)(val3)) +#define __sanitizer_syscall_post___futex(res, uaddr, op, val, timeout, uaddr2, \ + val2, val3) \ + __sanitizer_syscall_post_impl___futex( \ + res, (long long)(uaddr), (long long)(op), (long long)(val), \ + (long long)(timeout), (long long)(uaddr2), (long long)(val2), \ + (long long)(val3)) +#define __sanitizer_syscall_pre___futex_set_robust_list(head, len) \ + __sanitizer_syscall_pre_impl___futex_set_robust_list((long long)(head), \ + (long long)(len)) +#define __sanitizer_syscall_post___futex_set_robust_list(res, head, len) \ + __sanitizer_syscall_post_impl___futex_set_robust_list( \ + res, (long long)(head), (long long)(len)) +#define __sanitizer_syscall_pre___futex_get_robust_list(lwpid, headp, lenp) \ + __sanitizer_syscall_pre_impl___futex_get_robust_list( \ + (long long)(lwpid), (long long)(headp), (long long)(lenp)) +#define __sanitizer_syscall_post___futex_get_robust_list(res, lwpid, headp, \ + lenp) \ + __sanitizer_syscall_post_impl___futex_get_robust_list( \ + res, (long long)(lwpid), (long long)(headp), (long long)(lenp)) +#if !defined(_LP64) +#define __sanitizer_syscall_pre_compat_10_osemsys(which, a2, a3, a4, a5) \ + __sanitizer_syscall_pre_impl_compat_10_osemsys( \ + (long long)(which), (long long)(a2), (long long)(a3), (long long)(a4), \ + (long long)(a5)) +#define __sanitizer_syscall_post_compat_10_osemsys(res, which, a2, a3, a4, a5) \ + __sanitizer_syscall_post_impl_compat_10_osemsys( \ + res, (long long)(which), (long long)(a2), (long long)(a3), \ + (long long)(a4), (long long)(a5)) +#else +/* syscall 169 has been skipped */ +#endif +#if !defined(_LP64) +#define __sanitizer_syscall_pre_compat_10_omsgsys(which, a2, a3, a4, a5, a6) \ + __sanitizer_syscall_pre_impl_compat_10_omsgsys( \ + (long long)(which), (long long)(a2), (long long)(a3), (long long)(a4), \ + (long long)(a5), (long long)(a6)) +#define __sanitizer_syscall_post_compat_10_omsgsys(res, which, a2, a3, a4, a5, \ + a6) \ + __sanitizer_syscall_post_impl_compat_10_omsgsys( \ + res, (long long)(which), (long long)(a2), (long long)(a3), \ + (long long)(a4), (long long)(a5), (long long)(a6)) +#else +/* syscall 170 has been skipped */ +#endif +#if !defined(_LP64) +#define __sanitizer_syscall_pre_compat_10_oshmsys(which, a2, a3, a4) \ + __sanitizer_syscall_pre_impl_compat_10_oshmsys( \ + (long long)(which), (long long)(a2), (long long)(a3), (long long)(a4)) +#define __sanitizer_syscall_post_compat_10_oshmsys(res, which, a2, a3, a4) \ + __sanitizer_syscall_post_impl_compat_10_oshmsys( \ + res, (long long)(which), (long long)(a2), (long long)(a3), \ + (long long)(a4)) +#else +/* syscall 171 has been skipped */ +#endif +/* syscall 172 has been skipped */ +#define __sanitizer_syscall_pre_pread(fd, buf, nbyte, PAD, offset) \ + __sanitizer_syscall_pre_impl_pread((long long)(fd), (long long)(buf), \ + (long long)(nbyte), (long long)(PAD), \ + (long long)(offset)) +#define __sanitizer_syscall_post_pread(res, fd, buf, nbyte, PAD, offset) \ + __sanitizer_syscall_post_impl_pread(res, (long long)(fd), (long long)(buf), \ + (long long)(nbyte), (long long)(PAD), \ + (long long)(offset)) +#define __sanitizer_syscall_pre_pwrite(fd, buf, nbyte, PAD, offset) \ + __sanitizer_syscall_pre_impl_pwrite((long long)(fd), (long long)(buf), \ + (long long)(nbyte), (long long)(PAD), \ + (long long)(offset)) +#define __sanitizer_syscall_post_pwrite(res, fd, buf, nbyte, PAD, offset) \ + __sanitizer_syscall_post_impl_pwrite(res, (long long)(fd), (long long)(buf), \ + (long long)(nbyte), (long long)(PAD), \ + (long long)(offset)) +#define __sanitizer_syscall_pre_compat_30_ntp_gettime(ntvp) \ + __sanitizer_syscall_pre_impl_compat_30_ntp_gettime((long long)(ntvp)) +#define __sanitizer_syscall_post_compat_30_ntp_gettime(res, ntvp) \ + __sanitizer_syscall_post_impl_compat_30_ntp_gettime(res, (long long)(ntvp)) +#if defined(NTP) || !defined(_KERNEL_OPT) +#define __sanitizer_syscall_pre_ntp_adjtime(tp) \ + __sanitizer_syscall_pre_impl_ntp_adjtime((long long)(tp)) +#define __sanitizer_syscall_post_ntp_adjtime(res, tp) \ + __sanitizer_syscall_post_impl_ntp_adjtime(res, (long long)(tp)) +#else +/* syscall 176 has been skipped */ +#endif +/* syscall 177 has been skipped */ +/* syscall 178 has been skipped */ +/* syscall 179 has been skipped */ +/* syscall 180 has been skipped */ +#define __sanitizer_syscall_pre_setgid(gid) \ + __sanitizer_syscall_pre_impl_setgid((long long)(gid)) +#define __sanitizer_syscall_post_setgid(res, gid) \ + __sanitizer_syscall_post_impl_setgid(res, (long long)(gid)) +#define __sanitizer_syscall_pre_setegid(egid) \ + __sanitizer_syscall_pre_impl_setegid((long long)(egid)) +#define __sanitizer_syscall_post_setegid(res, egid) \ + __sanitizer_syscall_post_impl_setegid(res, (long long)(egid)) +#define __sanitizer_syscall_pre_seteuid(euid) \ + __sanitizer_syscall_pre_impl_seteuid((long long)(euid)) +#define __sanitizer_syscall_post_seteuid(res, euid) \ + __sanitizer_syscall_post_impl_seteuid(res, (long long)(euid)) +#define __sanitizer_syscall_pre_lfs_bmapv(fsidp, blkiov, blkcnt) \ + __sanitizer_syscall_pre_impl_lfs_bmapv( \ + (long long)(fsidp), (long long)(blkiov), (long long)(blkcnt)) +#define __sanitizer_syscall_post_lfs_bmapv(res, fsidp, blkiov, blkcnt) \ + __sanitizer_syscall_post_impl_lfs_bmapv( \ + res, (long long)(fsidp), (long long)(blkiov), (long long)(blkcnt)) +#define __sanitizer_syscall_pre_lfs_markv(fsidp, blkiov, blkcnt) \ + __sanitizer_syscall_pre_impl_lfs_markv( \ + (long long)(fsidp), (long long)(blkiov), (long long)(blkcnt)) +#define __sanitizer_syscall_post_lfs_markv(res, fsidp, blkiov, blkcnt) \ + __sanitizer_syscall_post_impl_lfs_markv( \ + res, (long long)(fsidp), (long long)(blkiov), (long long)(blkcnt)) +#define __sanitizer_syscall_pre_lfs_segclean(fsidp, segment) \ + __sanitizer_syscall_pre_impl_lfs_segclean((long long)(fsidp), \ + (long long)(segment)) +#define __sanitizer_syscall_post_lfs_segclean(res, fsidp, segment) \ + __sanitizer_syscall_post_impl_lfs_segclean(res, (long long)(fsidp), \ + (long long)(segment)) +#define __sanitizer_syscall_pre_compat_50_lfs_segwait(fsidp, tv) \ + __sanitizer_syscall_pre_impl_compat_50_lfs_segwait((long long)(fsidp), \ + (long long)(tv)) +#define __sanitizer_syscall_post_compat_50_lfs_segwait(res, fsidp, tv) \ + __sanitizer_syscall_post_impl_compat_50_lfs_segwait(res, (long long)(fsidp), \ + (long long)(tv)) +#define __sanitizer_syscall_pre_compat_12_stat12(path, ub) \ + __sanitizer_syscall_pre_impl_compat_12_stat12((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_12_stat12(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_12_stat12(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_compat_12_fstat12(fd, sb) \ + __sanitizer_syscall_pre_impl_compat_12_fstat12((long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_post_compat_12_fstat12(res, fd, sb) \ + __sanitizer_syscall_post_impl_compat_12_fstat12(res, (long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_pre_compat_12_lstat12(path, ub) \ + __sanitizer_syscall_pre_impl_compat_12_lstat12((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_12_lstat12(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_12_lstat12(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_pathconf(path, name) \ + __sanitizer_syscall_pre_impl_pathconf((long long)(path), (long long)(name)) +#define __sanitizer_syscall_post_pathconf(res, path, name) \ + __sanitizer_syscall_post_impl_pathconf(res, (long long)(path), \ + (long long)(name)) +#define __sanitizer_syscall_pre_fpathconf(fd, name) \ + __sanitizer_syscall_pre_impl_fpathconf((long long)(fd), (long long)(name)) +#define __sanitizer_syscall_post_fpathconf(res, fd, name) \ + __sanitizer_syscall_post_impl_fpathconf(res, (long long)(fd), \ + (long long)(name)) +#define __sanitizer_syscall_pre_getsockopt2(s, level, name, val, avalsize) \ + __sanitizer_syscall_pre_impl_getsockopt2( \ + (long long)(s), (long long)(level), (long long)(name), (long long)(val), \ + (long long)(avalsize)) +#define __sanitizer_syscall_post_getsockopt2(res, s, level, name, val, \ + avalsize) \ + __sanitizer_syscall_post_impl_getsockopt2( \ + res, (long long)(s), (long long)(level), (long long)(name), \ + (long long)(val), (long long)(avalsize)) +#define __sanitizer_syscall_pre_getrlimit(which, rlp) \ + __sanitizer_syscall_pre_impl_getrlimit((long long)(which), (long long)(rlp)) +#define __sanitizer_syscall_post_getrlimit(res, which, rlp) \ + __sanitizer_syscall_post_impl_getrlimit(res, (long long)(which), \ + (long long)(rlp)) +#define __sanitizer_syscall_pre_setrlimit(which, rlp) \ + __sanitizer_syscall_pre_impl_setrlimit((long long)(which), (long long)(rlp)) +#define __sanitizer_syscall_post_setrlimit(res, which, rlp) \ + __sanitizer_syscall_post_impl_setrlimit(res, (long long)(which), \ + (long long)(rlp)) +#define __sanitizer_syscall_pre_compat_12_getdirentries(fd, buf, count, basep) \ + __sanitizer_syscall_pre_impl_compat_12_getdirentries( \ + (long long)(fd), (long long)(buf), (long long)(count), \ + (long long)(basep)) +#define __sanitizer_syscall_post_compat_12_getdirentries(res, fd, buf, count, \ + basep) \ + __sanitizer_syscall_post_impl_compat_12_getdirentries( \ + res, (long long)(fd), (long long)(buf), (long long)(count), \ + (long long)(basep)) +#define __sanitizer_syscall_pre_mmap(addr, len, prot, flags, fd, PAD, pos) \ + __sanitizer_syscall_pre_impl_mmap( \ + (long long)(addr), (long long)(len), (long long)(prot), \ + (long long)(flags), (long long)(fd), (long long)(PAD), (long long)(pos)) +#define __sanitizer_syscall_post_mmap(res, addr, len, prot, flags, fd, PAD, \ + pos) \ + __sanitizer_syscall_post_impl_mmap( \ + res, (long long)(addr), (long long)(len), (long long)(prot), \ + (long long)(flags), (long long)(fd), (long long)(PAD), (long long)(pos)) +#define __sanitizer_syscall_pre___syscall(code, arg0, arg1, arg2, arg3, arg4, \ + arg5, arg6, arg7) \ + __sanitizer_syscall_pre_impl___syscall( \ + (long long)(code), (long long)(arg0), (long long)(arg1), \ + (long long)(arg2), (long long)(arg3), (long long)(arg4), \ + (long long)(arg5), (long long)(arg6), (long long)(arg7)) +#define __sanitizer_syscall_post___syscall(res, code, arg0, arg1, arg2, arg3, \ + arg4, arg5, arg6, arg7) \ + __sanitizer_syscall_post_impl___syscall( \ + res, (long long)(code), (long long)(arg0), (long long)(arg1), \ + (long long)(arg2), (long long)(arg3), (long long)(arg4), \ + (long long)(arg5), (long long)(arg6), (long long)(arg7)) +#define __sanitizer_syscall_pre_lseek(fd, PAD, offset, whence) \ + __sanitizer_syscall_pre_impl_lseek((long long)(fd), (long long)(PAD), \ + (long long)(offset), (long long)(whence)) +#define __sanitizer_syscall_post_lseek(res, fd, PAD, offset, whence) \ + __sanitizer_syscall_post_impl_lseek(res, (long long)(fd), (long long)(PAD), \ + (long long)(offset), \ + (long long)(whence)) +#define __sanitizer_syscall_pre_truncate(path, PAD, length) \ + __sanitizer_syscall_pre_impl_truncate((long long)(path), (long long)(PAD), \ + (long long)(length)) +#define __sanitizer_syscall_post_truncate(res, path, PAD, length) \ + __sanitizer_syscall_post_impl_truncate( \ + res, (long long)(path), (long long)(PAD), (long long)(length)) +#define __sanitizer_syscall_pre_ftruncate(fd, PAD, length) \ + __sanitizer_syscall_pre_impl_ftruncate((long long)(fd), (long long)(PAD), \ + (long long)(length)) +#define __sanitizer_syscall_post_ftruncate(res, fd, PAD, length) \ + __sanitizer_syscall_post_impl_ftruncate( \ + res, (long long)(fd), (long long)(PAD), (long long)(length)) +#define __sanitizer_syscall_pre___sysctl(name, namelen, oldv, oldlenp, newv, \ + newlen) \ + __sanitizer_syscall_pre_impl___sysctl( \ + (long long)(name), (long long)(namelen), (long long)(oldv), \ + (long long)(oldlenp), (long long)(newv), (long long)(newlen)) +#define __sanitizer_syscall_post___sysctl(res, name, namelen, oldv, oldlenp, \ + newv, newlen) \ + __sanitizer_syscall_post_impl___sysctl( \ + res, (long long)(name), (long long)(namelen), (long long)(oldv), \ + (long long)(oldlenp), (long long)(newv), (long long)(newlen)) +#define __sanitizer_syscall_pre_mlock(addr, len) \ + __sanitizer_syscall_pre_impl_mlock((long long)(addr), (long long)(len)) +#define __sanitizer_syscall_post_mlock(res, addr, len) \ + __sanitizer_syscall_post_impl_mlock(res, (long long)(addr), (long long)(len)) +#define __sanitizer_syscall_pre_munlock(addr, len) \ + __sanitizer_syscall_pre_impl_munlock((long long)(addr), (long long)(len)) +#define __sanitizer_syscall_post_munlock(res, addr, len) \ + __sanitizer_syscall_post_impl_munlock(res, (long long)(addr), \ + (long long)(len)) +#define __sanitizer_syscall_pre_undelete(path) \ + __sanitizer_syscall_pre_impl_undelete((long long)(path)) +#define __sanitizer_syscall_post_undelete(res, path) \ + __sanitizer_syscall_post_impl_undelete(res, (long long)(path)) +#define __sanitizer_syscall_pre_compat_50_futimes(fd, tptr) \ + __sanitizer_syscall_pre_impl_compat_50_futimes((long long)(fd), \ + (long long)(tptr)) +#define __sanitizer_syscall_post_compat_50_futimes(res, fd, tptr) \ + __sanitizer_syscall_post_impl_compat_50_futimes(res, (long long)(fd), \ + (long long)(tptr)) +#define __sanitizer_syscall_pre_getpgid(pid) \ + __sanitizer_syscall_pre_impl_getpgid((long long)(pid)) +#define __sanitizer_syscall_post_getpgid(res, pid) \ + __sanitizer_syscall_post_impl_getpgid(res, (long long)(pid)) +#define __sanitizer_syscall_pre_reboot(opt, bootstr) \ + __sanitizer_syscall_pre_impl_reboot((long long)(opt), (long long)(bootstr)) +#define __sanitizer_syscall_post_reboot(res, opt, bootstr) \ + __sanitizer_syscall_post_impl_reboot(res, (long long)(opt), \ + (long long)(bootstr)) +#define __sanitizer_syscall_pre_poll(fds, nfds, timeout) \ + __sanitizer_syscall_pre_impl_poll((long long)(fds), (long long)(nfds), \ + (long long)(timeout)) +#define __sanitizer_syscall_post_poll(res, fds, nfds, timeout) \ + __sanitizer_syscall_post_impl_poll(res, (long long)(fds), (long long)(nfds), \ + (long long)(timeout)) +#define __sanitizer_syscall_pre_afssys(id, a1, a2, a3, a4, a5, a6) \ + __sanitizer_syscall_pre_impl_afssys( \ + (long long)(id), (long long)(a1), (long long)(a2), (long long)(a3), \ + (long long)(a4), (long long)(a5), (long long)(a6)) +#define __sanitizer_syscall_post_afssys(res, id, a1, a2, a3, a4, a5, a6) \ + __sanitizer_syscall_post_impl_afssys( \ + res, (long long)(id), (long long)(a1), (long long)(a2), (long long)(a3), \ + (long long)(a4), (long long)(a5), (long long)(a6)) +/* syscall 211 has been skipped */ +/* syscall 212 has been skipped */ +/* syscall 213 has been skipped */ +/* syscall 214 has been skipped */ +/* syscall 215 has been skipped */ +/* syscall 216 has been skipped */ +/* syscall 217 has been skipped */ +/* syscall 218 has been skipped */ +/* syscall 219 has been skipped */ +#define __sanitizer_syscall_pre_compat_14___semctl(semid, semnum, cmd, arg) \ + __sanitizer_syscall_pre_impl_compat_14___semctl( \ + (long long)(semid), (long long)(semnum), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_post_compat_14___semctl(res, semid, semnum, cmd, \ + arg) \ + __sanitizer_syscall_post_impl_compat_14___semctl( \ + res, (long long)(semid), (long long)(semnum), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_pre_semget(key, nsems, semflg) \ + __sanitizer_syscall_pre_impl_semget((long long)(key), (long long)(nsems), \ + (long long)(semflg)) +#define __sanitizer_syscall_post_semget(res, key, nsems, semflg) \ + __sanitizer_syscall_post_impl_semget( \ + res, (long long)(key), (long long)(nsems), (long long)(semflg)) +#define __sanitizer_syscall_pre_semop(semid, sops, nsops) \ + __sanitizer_syscall_pre_impl_semop((long long)(semid), (long long)(sops), \ + (long long)(nsops)) +#define __sanitizer_syscall_post_semop(res, semid, sops, nsops) \ + __sanitizer_syscall_post_impl_semop(res, (long long)(semid), \ + (long long)(sops), (long long)(nsops)) +#define __sanitizer_syscall_pre_semconfig(flag) \ + __sanitizer_syscall_pre_impl_semconfig((long long)(flag)) +#define __sanitizer_syscall_post_semconfig(res, flag) \ + __sanitizer_syscall_post_impl_semconfig(res, (long long)(flag)) +#define __sanitizer_syscall_pre_compat_14_msgctl(msqid, cmd, buf) \ + __sanitizer_syscall_pre_impl_compat_14_msgctl( \ + (long long)(msqid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_post_compat_14_msgctl(res, msqid, cmd, buf) \ + __sanitizer_syscall_post_impl_compat_14_msgctl( \ + res, (long long)(msqid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_pre_msgget(key, msgflg) \ + __sanitizer_syscall_pre_impl_msgget((long long)(key), (long long)(msgflg)) +#define __sanitizer_syscall_post_msgget(res, key, msgflg) \ + __sanitizer_syscall_post_impl_msgget(res, (long long)(key), \ + (long long)(msgflg)) +#define __sanitizer_syscall_pre_msgsnd(msqid, msgp, msgsz, msgflg) \ + __sanitizer_syscall_pre_impl_msgsnd((long long)(msqid), (long long)(msgp), \ + (long long)(msgsz), (long long)(msgflg)) +#define __sanitizer_syscall_post_msgsnd(res, msqid, msgp, msgsz, msgflg) \ + __sanitizer_syscall_post_impl_msgsnd(res, (long long)(msqid), \ + (long long)(msgp), (long long)(msgsz), \ + (long long)(msgflg)) +#define __sanitizer_syscall_pre_msgrcv(msqid, msgp, msgsz, msgtyp, msgflg) \ + __sanitizer_syscall_pre_impl_msgrcv((long long)(msqid), (long long)(msgp), \ + (long long)(msgsz), (long long)(msgtyp), \ + (long long)(msgflg)) +#define __sanitizer_syscall_post_msgrcv(res, msqid, msgp, msgsz, msgtyp, \ + msgflg) \ + __sanitizer_syscall_post_impl_msgrcv( \ + res, (long long)(msqid), (long long)(msgp), (long long)(msgsz), \ + (long long)(msgtyp), (long long)(msgflg)) +#define __sanitizer_syscall_pre_shmat(shmid, shmaddr, shmflg) \ + __sanitizer_syscall_pre_impl_shmat((long long)(shmid), (long long)(shmaddr), \ + (long long)(shmflg)) +#define __sanitizer_syscall_post_shmat(res, shmid, shmaddr, shmflg) \ + __sanitizer_syscall_post_impl_shmat( \ + res, (long long)(shmid), (long long)(shmaddr), (long long)(shmflg)) +#define __sanitizer_syscall_pre_compat_14_shmctl(shmid, cmd, buf) \ + __sanitizer_syscall_pre_impl_compat_14_shmctl( \ + (long long)(shmid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_post_compat_14_shmctl(res, shmid, cmd, buf) \ + __sanitizer_syscall_post_impl_compat_14_shmctl( \ + res, (long long)(shmid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_pre_shmdt(shmaddr) \ + __sanitizer_syscall_pre_impl_shmdt((long long)(shmaddr)) +#define __sanitizer_syscall_post_shmdt(res, shmaddr) \ + __sanitizer_syscall_post_impl_shmdt(res, (long long)(shmaddr)) +#define __sanitizer_syscall_pre_shmget(key, size, shmflg) \ + __sanitizer_syscall_pre_impl_shmget((long long)(key), (long long)(size), \ + (long long)(shmflg)) +#define __sanitizer_syscall_post_shmget(res, key, size, shmflg) \ + __sanitizer_syscall_post_impl_shmget(res, (long long)(key), \ + (long long)(size), (long long)(shmflg)) +#define __sanitizer_syscall_pre_compat_50_clock_gettime(clock_id, tp) \ + __sanitizer_syscall_pre_impl_compat_50_clock_gettime((long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_post_compat_50_clock_gettime(res, clock_id, tp) \ + __sanitizer_syscall_post_impl_compat_50_clock_gettime( \ + res, (long long)(clock_id), (long long)(tp)) +#define __sanitizer_syscall_pre_compat_50_clock_settime(clock_id, tp) \ + __sanitizer_syscall_pre_impl_compat_50_clock_settime((long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_post_compat_50_clock_settime(res, clock_id, tp) \ + __sanitizer_syscall_post_impl_compat_50_clock_settime( \ + res, (long long)(clock_id), (long long)(tp)) +#define __sanitizer_syscall_pre_compat_50_clock_getres(clock_id, tp) \ + __sanitizer_syscall_pre_impl_compat_50_clock_getres((long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_post_compat_50_clock_getres(res, clock_id, tp) \ + __sanitizer_syscall_post_impl_compat_50_clock_getres( \ + res, (long long)(clock_id), (long long)(tp)) +#define __sanitizer_syscall_pre_timer_create(clock_id, evp, timerid) \ + __sanitizer_syscall_pre_impl_timer_create( \ + (long long)(clock_id), (long long)(evp), (long long)(timerid)) +#define __sanitizer_syscall_post_timer_create(res, clock_id, evp, timerid) \ + __sanitizer_syscall_post_impl_timer_create( \ + res, (long long)(clock_id), (long long)(evp), (long long)(timerid)) +#define __sanitizer_syscall_pre_timer_delete(timerid) \ + __sanitizer_syscall_pre_impl_timer_delete((long long)(timerid)) +#define __sanitizer_syscall_post_timer_delete(res, timerid) \ + __sanitizer_syscall_post_impl_timer_delete(res, (long long)(timerid)) +#define __sanitizer_syscall_pre_compat_50_timer_settime(timerid, flags, value, \ + ovalue) \ + __sanitizer_syscall_pre_impl_compat_50_timer_settime( \ + (long long)(timerid), (long long)(flags), (long long)(value), \ + (long long)(ovalue)) +#define __sanitizer_syscall_post_compat_50_timer_settime(res, timerid, flags, \ + value, ovalue) \ + __sanitizer_syscall_post_impl_compat_50_timer_settime( \ + res, (long long)(timerid), (long long)(flags), (long long)(value), \ + (long long)(ovalue)) +#define __sanitizer_syscall_pre_compat_50_timer_gettime(timerid, value) \ + __sanitizer_syscall_pre_impl_compat_50_timer_gettime((long long)(timerid), \ + (long long)(value)) +#define __sanitizer_syscall_post_compat_50_timer_gettime(res, timerid, value) \ + __sanitizer_syscall_post_impl_compat_50_timer_gettime( \ + res, (long long)(timerid), (long long)(value)) +#define __sanitizer_syscall_pre_timer_getoverrun(timerid) \ + __sanitizer_syscall_pre_impl_timer_getoverrun((long long)(timerid)) +#define __sanitizer_syscall_post_timer_getoverrun(res, timerid) \ + __sanitizer_syscall_post_impl_timer_getoverrun(res, (long long)(timerid)) +#define __sanitizer_syscall_pre_compat_50_nanosleep(rqtp, rmtp) \ + __sanitizer_syscall_pre_impl_compat_50_nanosleep((long long)(rqtp), \ + (long long)(rmtp)) +#define __sanitizer_syscall_post_compat_50_nanosleep(res, rqtp, rmtp) \ + __sanitizer_syscall_post_impl_compat_50_nanosleep(res, (long long)(rqtp), \ + (long long)(rmtp)) +#define __sanitizer_syscall_pre_fdatasync(fd) \ + __sanitizer_syscall_pre_impl_fdatasync((long long)(fd)) +#define __sanitizer_syscall_post_fdatasync(res, fd) \ + __sanitizer_syscall_post_impl_fdatasync(res, (long long)(fd)) +#define __sanitizer_syscall_pre_mlockall(flags) \ + __sanitizer_syscall_pre_impl_mlockall((long long)(flags)) +#define __sanitizer_syscall_post_mlockall(res, flags) \ + __sanitizer_syscall_post_impl_mlockall(res, (long long)(flags)) +#define __sanitizer_syscall_pre_munlockall() \ + __sanitizer_syscall_pre_impl_munlockall() +#define __sanitizer_syscall_post_munlockall(res) \ + __sanitizer_syscall_post_impl_munlockall(res) +#define __sanitizer_syscall_pre_compat_50___sigtimedwait(set, info, timeout) \ + __sanitizer_syscall_pre_impl_compat_50___sigtimedwait( \ + (long long)(set), (long long)(info), (long long)(timeout)) +#define __sanitizer_syscall_post_compat_50___sigtimedwait(res, set, info, \ + timeout) \ + __sanitizer_syscall_post_impl_compat_50___sigtimedwait( \ + res, (long long)(set), (long long)(info), (long long)(timeout)) +#define __sanitizer_syscall_pre_sigqueueinfo(pid, info) \ + __sanitizer_syscall_pre_impl_sigqueueinfo((long long)(pid), (long long)(info)) +#define __sanitizer_syscall_post_sigqueueinfo(res, pid, info) \ + __sanitizer_syscall_post_impl_sigqueueinfo(res, (long long)(pid), \ + (long long)(info)) +#define __sanitizer_syscall_pre_modctl(cmd, arg) \ + __sanitizer_syscall_pre_impl_modctl((long long)(cmd), (long long)(arg)) +#define __sanitizer_syscall_post_modctl(res, cmd, arg) \ + __sanitizer_syscall_post_impl_modctl(res, (long long)(cmd), (long long)(arg)) +#define __sanitizer_syscall_pre__ksem_init(value, idp) \ + __sanitizer_syscall_pre_impl__ksem_init((long long)(value), (long long)(idp)) +#define __sanitizer_syscall_post__ksem_init(res, value, idp) \ + __sanitizer_syscall_post_impl__ksem_init(res, (long long)(value), \ + (long long)(idp)) +#define __sanitizer_syscall_pre__ksem_open(name, oflag, mode, value, idp) \ + __sanitizer_syscall_pre_impl__ksem_open( \ + (long long)(name), (long long)(oflag), (long long)(mode), \ + (long long)(value), (long long)(idp)) +#define __sanitizer_syscall_post__ksem_open(res, name, oflag, mode, value, \ + idp) \ + __sanitizer_syscall_post_impl__ksem_open( \ + res, (long long)(name), (long long)(oflag), (long long)(mode), \ + (long long)(value), (long long)(idp)) +#define __sanitizer_syscall_pre__ksem_unlink(name) \ + __sanitizer_syscall_pre_impl__ksem_unlink((long long)(name)) +#define __sanitizer_syscall_post__ksem_unlink(res, name) \ + __sanitizer_syscall_post_impl__ksem_unlink(res, (long long)(name)) +#define __sanitizer_syscall_pre__ksem_close(id) \ + __sanitizer_syscall_pre_impl__ksem_close((long long)(id)) +#define __sanitizer_syscall_post__ksem_close(res, id) \ + __sanitizer_syscall_post_impl__ksem_close(res, (long long)(id)) +#define __sanitizer_syscall_pre__ksem_post(id) \ + __sanitizer_syscall_pre_impl__ksem_post((long long)(id)) +#define __sanitizer_syscall_post__ksem_post(res, id) \ + __sanitizer_syscall_post_impl__ksem_post(res, (long long)(id)) +#define __sanitizer_syscall_pre__ksem_wait(id) \ + __sanitizer_syscall_pre_impl__ksem_wait((long long)(id)) +#define __sanitizer_syscall_post__ksem_wait(res, id) \ + __sanitizer_syscall_post_impl__ksem_wait(res, (long long)(id)) +#define __sanitizer_syscall_pre__ksem_trywait(id) \ + __sanitizer_syscall_pre_impl__ksem_trywait((long long)(id)) +#define __sanitizer_syscall_post__ksem_trywait(res, id) \ + __sanitizer_syscall_post_impl__ksem_trywait(res, (long long)(id)) +#define __sanitizer_syscall_pre__ksem_getvalue(id, value) \ + __sanitizer_syscall_pre_impl__ksem_getvalue((long long)(id), \ + (long long)(value)) +#define __sanitizer_syscall_post__ksem_getvalue(res, id, value) \ + __sanitizer_syscall_post_impl__ksem_getvalue(res, (long long)(id), \ + (long long)(value)) +#define __sanitizer_syscall_pre__ksem_destroy(id) \ + __sanitizer_syscall_pre_impl__ksem_destroy((long long)(id)) +#define __sanitizer_syscall_post__ksem_destroy(res, id) \ + __sanitizer_syscall_post_impl__ksem_destroy(res, (long long)(id)) +#define __sanitizer_syscall_pre__ksem_timedwait(id, abstime) \ + __sanitizer_syscall_pre_impl__ksem_timedwait((long long)(id), \ + (long long)(abstime)) +#define __sanitizer_syscall_post__ksem_timedwait(res, id, abstime) \ + __sanitizer_syscall_post_impl__ksem_timedwait(res, (long long)(id), \ + (long long)(abstime)) +#define __sanitizer_syscall_pre_mq_open(name, oflag, mode, attr) \ + __sanitizer_syscall_pre_impl_mq_open((long long)(name), (long long)(oflag), \ + (long long)(mode), (long long)(attr)) +#define __sanitizer_syscall_post_mq_open(res, name, oflag, mode, attr) \ + __sanitizer_syscall_post_impl_mq_open(res, (long long)(name), \ + (long long)(oflag), (long long)(mode), \ + (long long)(attr)) +#define __sanitizer_syscall_pre_mq_close(mqdes) \ + __sanitizer_syscall_pre_impl_mq_close((long long)(mqdes)) +#define __sanitizer_syscall_post_mq_close(res, mqdes) \ + __sanitizer_syscall_post_impl_mq_close(res, (long long)(mqdes)) +#define __sanitizer_syscall_pre_mq_unlink(name) \ + __sanitizer_syscall_pre_impl_mq_unlink((long long)(name)) +#define __sanitizer_syscall_post_mq_unlink(res, name) \ + __sanitizer_syscall_post_impl_mq_unlink(res, (long long)(name)) +#define __sanitizer_syscall_pre_mq_getattr(mqdes, mqstat) \ + __sanitizer_syscall_pre_impl_mq_getattr((long long)(mqdes), \ + (long long)(mqstat)) +#define __sanitizer_syscall_post_mq_getattr(res, mqdes, mqstat) \ + __sanitizer_syscall_post_impl_mq_getattr(res, (long long)(mqdes), \ + (long long)(mqstat)) +#define __sanitizer_syscall_pre_mq_setattr(mqdes, mqstat, omqstat) \ + __sanitizer_syscall_pre_impl_mq_setattr( \ + (long long)(mqdes), (long long)(mqstat), (long long)(omqstat)) +#define __sanitizer_syscall_post_mq_setattr(res, mqdes, mqstat, omqstat) \ + __sanitizer_syscall_post_impl_mq_setattr( \ + res, (long long)(mqdes), (long long)(mqstat), (long long)(omqstat)) +#define __sanitizer_syscall_pre_mq_notify(mqdes, notification) \ + __sanitizer_syscall_pre_impl_mq_notify((long long)(mqdes), \ + (long long)(notification)) +#define __sanitizer_syscall_post_mq_notify(res, mqdes, notification) \ + __sanitizer_syscall_post_impl_mq_notify(res, (long long)(mqdes), \ + (long long)(notification)) +#define __sanitizer_syscall_pre_mq_send(mqdes, msg_ptr, msg_len, msg_prio) \ + __sanitizer_syscall_pre_impl_mq_send( \ + (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio)) +#define __sanitizer_syscall_post_mq_send(res, mqdes, msg_ptr, msg_len, \ + msg_prio) \ + __sanitizer_syscall_post_impl_mq_send( \ + res, (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio)) +#define __sanitizer_syscall_pre_mq_receive(mqdes, msg_ptr, msg_len, msg_prio) \ + __sanitizer_syscall_pre_impl_mq_receive( \ + (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio)) +#define __sanitizer_syscall_post_mq_receive(res, mqdes, msg_ptr, msg_len, \ + msg_prio) \ + __sanitizer_syscall_post_impl_mq_receive( \ + res, (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio)) +#define __sanitizer_syscall_pre_compat_50_mq_timedsend( \ + mqdes, msg_ptr, msg_len, msg_prio, abs_timeout) \ + __sanitizer_syscall_pre_impl_compat_50_mq_timedsend( \ + (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_post_compat_50_mq_timedsend( \ + res, mqdes, msg_ptr, msg_len, msg_prio, abs_timeout) \ + __sanitizer_syscall_post_impl_compat_50_mq_timedsend( \ + res, (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_pre_compat_50_mq_timedreceive( \ + mqdes, msg_ptr, msg_len, msg_prio, abs_timeout) \ + __sanitizer_syscall_pre_impl_compat_50_mq_timedreceive( \ + (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_post_compat_50_mq_timedreceive( \ + res, mqdes, msg_ptr, msg_len, msg_prio, abs_timeout) \ + __sanitizer_syscall_post_impl_compat_50_mq_timedreceive( \ + res, (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +/* syscall 267 has been skipped */ +/* syscall 268 has been skipped */ +/* syscall 269 has been skipped */ +#define __sanitizer_syscall_pre___posix_rename(from, to) \ + __sanitizer_syscall_pre_impl___posix_rename((long long)(from), \ + (long long)(to)) +#define __sanitizer_syscall_post___posix_rename(res, from, to) \ + __sanitizer_syscall_post_impl___posix_rename(res, (long long)(from), \ + (long long)(to)) +#define __sanitizer_syscall_pre_swapctl(cmd, arg, misc) \ + __sanitizer_syscall_pre_impl_swapctl((long long)(cmd), (long long)(arg), \ + (long long)(misc)) +#define __sanitizer_syscall_post_swapctl(res, cmd, arg, misc) \ + __sanitizer_syscall_post_impl_swapctl(res, (long long)(cmd), \ + (long long)(arg), (long long)(misc)) +#define __sanitizer_syscall_pre_compat_30_getdents(fd, buf, count) \ + __sanitizer_syscall_pre_impl_compat_30_getdents( \ + (long long)(fd), (long long)(buf), (long long)(count)) +#define __sanitizer_syscall_post_compat_30_getdents(res, fd, buf, count) \ + __sanitizer_syscall_post_impl_compat_30_getdents( \ + res, (long long)(fd), (long long)(buf), (long long)(count)) +#define __sanitizer_syscall_pre_minherit(addr, len, inherit) \ + __sanitizer_syscall_pre_impl_minherit((long long)(addr), (long long)(len), \ + (long long)(inherit)) +#define __sanitizer_syscall_post_minherit(res, addr, len, inherit) \ + __sanitizer_syscall_post_impl_minherit( \ + res, (long long)(addr), (long long)(len), (long long)(inherit)) +#define __sanitizer_syscall_pre_lchmod(path, mode) \ + __sanitizer_syscall_pre_impl_lchmod((long long)(path), (long long)(mode)) +#define __sanitizer_syscall_post_lchmod(res, path, mode) \ + __sanitizer_syscall_post_impl_lchmod(res, (long long)(path), \ + (long long)(mode)) +#define __sanitizer_syscall_pre_lchown(path, uid, gid) \ + __sanitizer_syscall_pre_impl_lchown((long long)(path), (long long)(uid), \ + (long long)(gid)) +#define __sanitizer_syscall_post_lchown(res, path, uid, gid) \ + __sanitizer_syscall_post_impl_lchown(res, (long long)(path), \ + (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_pre_compat_50_lutimes(path, tptr) \ + __sanitizer_syscall_pre_impl_compat_50_lutimes((long long)(path), \ + (long long)(tptr)) +#define __sanitizer_syscall_post_compat_50_lutimes(res, path, tptr) \ + __sanitizer_syscall_post_impl_compat_50_lutimes(res, (long long)(path), \ + (long long)(tptr)) +#define __sanitizer_syscall_pre___msync13(addr, len, flags) \ + __sanitizer_syscall_pre_impl___msync13((long long)(addr), (long long)(len), \ + (long long)(flags)) +#define __sanitizer_syscall_post___msync13(res, addr, len, flags) \ + __sanitizer_syscall_post_impl___msync13( \ + res, (long long)(addr), (long long)(len), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_30___stat13(path, ub) \ + __sanitizer_syscall_pre_impl_compat_30___stat13((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_30___stat13(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_30___stat13(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_compat_30___fstat13(fd, sb) \ + __sanitizer_syscall_pre_impl_compat_30___fstat13((long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_post_compat_30___fstat13(res, fd, sb) \ + __sanitizer_syscall_post_impl_compat_30___fstat13(res, (long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_pre_compat_30___lstat13(path, ub) \ + __sanitizer_syscall_pre_impl_compat_30___lstat13((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_30___lstat13(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_30___lstat13(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre___sigaltstack14(nss, oss) \ + __sanitizer_syscall_pre_impl___sigaltstack14((long long)(nss), \ + (long long)(oss)) +#define __sanitizer_syscall_post___sigaltstack14(res, nss, oss) \ + __sanitizer_syscall_post_impl___sigaltstack14(res, (long long)(nss), \ + (long long)(oss)) +#define __sanitizer_syscall_pre___vfork14() \ + __sanitizer_syscall_pre_impl___vfork14() +#define __sanitizer_syscall_post___vfork14(res) \ + __sanitizer_syscall_post_impl___vfork14(res) +#define __sanitizer_syscall_pre___posix_chown(path, uid, gid) \ + __sanitizer_syscall_pre_impl___posix_chown( \ + (long long)(path), (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_post___posix_chown(res, path, uid, gid) \ + __sanitizer_syscall_post_impl___posix_chown( \ + res, (long long)(path), (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_pre___posix_fchown(fd, uid, gid) \ + __sanitizer_syscall_pre_impl___posix_fchown( \ + (long long)(fd), (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_post___posix_fchown(res, fd, uid, gid) \ + __sanitizer_syscall_post_impl___posix_fchown( \ + res, (long long)(fd), (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_pre___posix_lchown(path, uid, gid) \ + __sanitizer_syscall_pre_impl___posix_lchown( \ + (long long)(path), (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_post___posix_lchown(res, path, uid, gid) \ + __sanitizer_syscall_post_impl___posix_lchown( \ + res, (long long)(path), (long long)(uid), (long long)(gid)) +#define __sanitizer_syscall_pre_getsid(pid) \ + __sanitizer_syscall_pre_impl_getsid((long long)(pid)) +#define __sanitizer_syscall_post_getsid(res, pid) \ + __sanitizer_syscall_post_impl_getsid(res, (long long)(pid)) +#define __sanitizer_syscall_pre___clone(flags, stack) \ + __sanitizer_syscall_pre_impl___clone((long long)(flags), (long long)(stack)) +#define __sanitizer_syscall_post___clone(res, flags, stack) \ + __sanitizer_syscall_post_impl___clone(res, (long long)(flags), \ + (long long)(stack)) +#define __sanitizer_syscall_pre_fktrace(fd, ops, facs, pid) \ + __sanitizer_syscall_pre_impl_fktrace((long long)(fd), (long long)(ops), \ + (long long)(facs), (long long)(pid)) +#define __sanitizer_syscall_post_fktrace(res, fd, ops, facs, pid) \ + __sanitizer_syscall_post_impl_fktrace(res, (long long)(fd), \ + (long long)(ops), (long long)(facs), \ + (long long)(pid)) +#define __sanitizer_syscall_pre_preadv(fd, iovp, iovcnt, PAD, offset) \ + __sanitizer_syscall_pre_impl_preadv((long long)(fd), (long long)(iovp), \ + (long long)(iovcnt), (long long)(PAD), \ + (long long)(offset)) +#define __sanitizer_syscall_post_preadv(res, fd, iovp, iovcnt, PAD, offset) \ + __sanitizer_syscall_post_impl_preadv(res, (long long)(fd), \ + (long long)(iovp), (long long)(iovcnt), \ + (long long)(PAD), (long long)(offset)) +#define __sanitizer_syscall_pre_pwritev(fd, iovp, iovcnt, PAD, offset) \ + __sanitizer_syscall_pre_impl_pwritev((long long)(fd), (long long)(iovp), \ + (long long)(iovcnt), (long long)(PAD), \ + (long long)(offset)) +#define __sanitizer_syscall_post_pwritev(res, fd, iovp, iovcnt, PAD, offset) \ + __sanitizer_syscall_post_impl_pwritev( \ + res, (long long)(fd), (long long)(iovp), (long long)(iovcnt), \ + (long long)(PAD), (long long)(offset)) +#define __sanitizer_syscall_pre_compat_16___sigaction14(signum, nsa, osa) \ + __sanitizer_syscall_pre_impl_compat_16___sigaction14( \ + (long long)(signum), (long long)(nsa), (long long)(osa)) +#define __sanitizer_syscall_post_compat_16___sigaction14(res, signum, nsa, \ + osa) \ + __sanitizer_syscall_post_impl_compat_16___sigaction14( \ + res, (long long)(signum), (long long)(nsa), (long long)(osa)) +#define __sanitizer_syscall_pre___sigpending14(set) \ + __sanitizer_syscall_pre_impl___sigpending14((long long)(set)) +#define __sanitizer_syscall_post___sigpending14(res, set) \ + __sanitizer_syscall_post_impl___sigpending14(res, (long long)(set)) +#define __sanitizer_syscall_pre___sigprocmask14(how, set, oset) \ + __sanitizer_syscall_pre_impl___sigprocmask14( \ + (long long)(how), (long long)(set), (long long)(oset)) +#define __sanitizer_syscall_post___sigprocmask14(res, how, set, oset) \ + __sanitizer_syscall_post_impl___sigprocmask14( \ + res, (long long)(how), (long long)(set), (long long)(oset)) +#define __sanitizer_syscall_pre___sigsuspend14(set) \ + __sanitizer_syscall_pre_impl___sigsuspend14((long long)(set)) +#define __sanitizer_syscall_post___sigsuspend14(res, set) \ + __sanitizer_syscall_post_impl___sigsuspend14(res, (long long)(set)) +#define __sanitizer_syscall_pre_compat_16___sigreturn14(sigcntxp) \ + __sanitizer_syscall_pre_impl_compat_16___sigreturn14((long long)(sigcntxp)) +#define __sanitizer_syscall_post_compat_16___sigreturn14(res, sigcntxp) \ + __sanitizer_syscall_post_impl_compat_16___sigreturn14(res, \ + (long long)(sigcntxp)) +#define __sanitizer_syscall_pre___getcwd(bufp, length) \ + __sanitizer_syscall_pre_impl___getcwd((long long)(bufp), (long long)(length)) +#define __sanitizer_syscall_post___getcwd(res, bufp, length) \ + __sanitizer_syscall_post_impl___getcwd(res, (long long)(bufp), \ + (long long)(length)) +#define __sanitizer_syscall_pre_fchroot(fd) \ + __sanitizer_syscall_pre_impl_fchroot((long long)(fd)) +#define __sanitizer_syscall_post_fchroot(res, fd) \ + __sanitizer_syscall_post_impl_fchroot(res, (long long)(fd)) +#define __sanitizer_syscall_pre_compat_30_fhopen(fhp, flags) \ + __sanitizer_syscall_pre_impl_compat_30_fhopen((long long)(fhp), \ + (long long)(flags)) +#define __sanitizer_syscall_post_compat_30_fhopen(res, fhp, flags) \ + __sanitizer_syscall_post_impl_compat_30_fhopen(res, (long long)(fhp), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_compat_30_fhstat(fhp, sb) \ + __sanitizer_syscall_pre_impl_compat_30_fhstat((long long)(fhp), \ + (long long)(sb)) +#define __sanitizer_syscall_post_compat_30_fhstat(res, fhp, sb) \ + __sanitizer_syscall_post_impl_compat_30_fhstat(res, (long long)(fhp), \ + (long long)(sb)) +#define __sanitizer_syscall_pre_compat_20_fhstatfs(fhp, buf) \ + __sanitizer_syscall_pre_impl_compat_20_fhstatfs((long long)(fhp), \ + (long long)(buf)) +#define __sanitizer_syscall_post_compat_20_fhstatfs(res, fhp, buf) \ + __sanitizer_syscall_post_impl_compat_20_fhstatfs(res, (long long)(fhp), \ + (long long)(buf)) +#define __sanitizer_syscall_pre_compat_50_____semctl13(semid, semnum, cmd, \ + arg) \ + __sanitizer_syscall_pre_impl_compat_50_____semctl13( \ + (long long)(semid), (long long)(semnum), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_post_compat_50_____semctl13(res, semid, semnum, \ + cmd, arg) \ + __sanitizer_syscall_post_impl_compat_50_____semctl13( \ + res, (long long)(semid), (long long)(semnum), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_pre_compat_50___msgctl13(msqid, cmd, buf) \ + __sanitizer_syscall_pre_impl_compat_50___msgctl13( \ + (long long)(msqid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_post_compat_50___msgctl13(res, msqid, cmd, buf) \ + __sanitizer_syscall_post_impl_compat_50___msgctl13( \ + res, (long long)(msqid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_pre_compat_50___shmctl13(shmid, cmd, buf) \ + __sanitizer_syscall_pre_impl_compat_50___shmctl13( \ + (long long)(shmid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_post_compat_50___shmctl13(res, shmid, cmd, buf) \ + __sanitizer_syscall_post_impl_compat_50___shmctl13( \ + res, (long long)(shmid), (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_pre_lchflags(path, flags) \ + __sanitizer_syscall_pre_impl_lchflags((long long)(path), (long long)(flags)) +#define __sanitizer_syscall_post_lchflags(res, path, flags) \ + __sanitizer_syscall_post_impl_lchflags(res, (long long)(path), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_issetugid() \ + __sanitizer_syscall_pre_impl_issetugid() +#define __sanitizer_syscall_post_issetugid(res) \ + __sanitizer_syscall_post_impl_issetugid(res) +#define __sanitizer_syscall_pre_utrace(label, addr, len) \ + __sanitizer_syscall_pre_impl_utrace((long long)(label), (long long)(addr), \ + (long long)(len)) +#define __sanitizer_syscall_post_utrace(res, label, addr, len) \ + __sanitizer_syscall_post_impl_utrace(res, (long long)(label), \ + (long long)(addr), (long long)(len)) +#define __sanitizer_syscall_pre_getcontext(ucp) \ + __sanitizer_syscall_pre_impl_getcontext((long long)(ucp)) +#define __sanitizer_syscall_post_getcontext(res, ucp) \ + __sanitizer_syscall_post_impl_getcontext(res, (long long)(ucp)) +#define __sanitizer_syscall_pre_setcontext(ucp) \ + __sanitizer_syscall_pre_impl_setcontext((long long)(ucp)) +#define __sanitizer_syscall_post_setcontext(res, ucp) \ + __sanitizer_syscall_post_impl_setcontext(res, (long long)(ucp)) +#define __sanitizer_syscall_pre__lwp_create(ucp, flags, new_lwp) \ + __sanitizer_syscall_pre_impl__lwp_create( \ + (long long)(ucp), (long long)(flags), (long long)(new_lwp)) +#define __sanitizer_syscall_post__lwp_create(res, ucp, flags, new_lwp) \ + __sanitizer_syscall_post_impl__lwp_create( \ + res, (long long)(ucp), (long long)(flags), (long long)(new_lwp)) +#define __sanitizer_syscall_pre__lwp_exit() \ + __sanitizer_syscall_pre_impl__lwp_exit() +#define __sanitizer_syscall_post__lwp_exit(res) \ + __sanitizer_syscall_post_impl__lwp_exit(res) +#define __sanitizer_syscall_pre__lwp_self() \ + __sanitizer_syscall_pre_impl__lwp_self() +#define __sanitizer_syscall_post__lwp_self(res) \ + __sanitizer_syscall_post_impl__lwp_self(res) +#define __sanitizer_syscall_pre__lwp_wait(wait_for, departed) \ + __sanitizer_syscall_pre_impl__lwp_wait((long long)(wait_for), \ + (long long)(departed)) +#define __sanitizer_syscall_post__lwp_wait(res, wait_for, departed) \ + __sanitizer_syscall_post_impl__lwp_wait(res, (long long)(wait_for), \ + (long long)(departed)) +#define __sanitizer_syscall_pre__lwp_suspend(target) \ + __sanitizer_syscall_pre_impl__lwp_suspend((long long)(target)) +#define __sanitizer_syscall_post__lwp_suspend(res, target) \ + __sanitizer_syscall_post_impl__lwp_suspend(res, (long long)(target)) +#define __sanitizer_syscall_pre__lwp_continue(target) \ + __sanitizer_syscall_pre_impl__lwp_continue((long long)(target)) +#define __sanitizer_syscall_post__lwp_continue(res, target) \ + __sanitizer_syscall_post_impl__lwp_continue(res, (long long)(target)) +#define __sanitizer_syscall_pre__lwp_wakeup(target) \ + __sanitizer_syscall_pre_impl__lwp_wakeup((long long)(target)) +#define __sanitizer_syscall_post__lwp_wakeup(res, target) \ + __sanitizer_syscall_post_impl__lwp_wakeup(res, (long long)(target)) +#define __sanitizer_syscall_pre__lwp_getprivate() \ + __sanitizer_syscall_pre_impl__lwp_getprivate() +#define __sanitizer_syscall_post__lwp_getprivate(res) \ + __sanitizer_syscall_post_impl__lwp_getprivate(res) +#define __sanitizer_syscall_pre__lwp_setprivate(ptr) \ + __sanitizer_syscall_pre_impl__lwp_setprivate((long long)(ptr)) +#define __sanitizer_syscall_post__lwp_setprivate(res, ptr) \ + __sanitizer_syscall_post_impl__lwp_setprivate(res, (long long)(ptr)) +#define __sanitizer_syscall_pre__lwp_kill(target, signo) \ + __sanitizer_syscall_pre_impl__lwp_kill((long long)(target), \ + (long long)(signo)) +#define __sanitizer_syscall_post__lwp_kill(res, target, signo) \ + __sanitizer_syscall_post_impl__lwp_kill(res, (long long)(target), \ + (long long)(signo)) +#define __sanitizer_syscall_pre__lwp_detach(target) \ + __sanitizer_syscall_pre_impl__lwp_detach((long long)(target)) +#define __sanitizer_syscall_post__lwp_detach(res, target) \ + __sanitizer_syscall_post_impl__lwp_detach(res, (long long)(target)) +#define __sanitizer_syscall_pre_compat_50__lwp_park(ts, unpark, hint, \ + unparkhint) \ + __sanitizer_syscall_pre_impl_compat_50__lwp_park( \ + (long long)(ts), (long long)(unpark), (long long)(hint), \ + (long long)(unparkhint)) +#define __sanitizer_syscall_post_compat_50__lwp_park(res, ts, unpark, hint, \ + unparkhint) \ + __sanitizer_syscall_post_impl_compat_50__lwp_park( \ + res, (long long)(ts), (long long)(unpark), (long long)(hint), \ + (long long)(unparkhint)) +#define __sanitizer_syscall_pre__lwp_unpark(target, hint) \ + __sanitizer_syscall_pre_impl__lwp_unpark((long long)(target), \ + (long long)(hint)) +#define __sanitizer_syscall_post__lwp_unpark(res, target, hint) \ + __sanitizer_syscall_post_impl__lwp_unpark(res, (long long)(target), \ + (long long)(hint)) +#define __sanitizer_syscall_pre__lwp_unpark_all(targets, ntargets, hint) \ + __sanitizer_syscall_pre_impl__lwp_unpark_all( \ + (long long)(targets), (long long)(ntargets), (long long)(hint)) +#define __sanitizer_syscall_post__lwp_unpark_all(res, targets, ntargets, hint) \ + __sanitizer_syscall_post_impl__lwp_unpark_all( \ + res, (long long)(targets), (long long)(ntargets), (long long)(hint)) +#define __sanitizer_syscall_pre__lwp_setname(target, name) \ + __sanitizer_syscall_pre_impl__lwp_setname((long long)(target), \ + (long long)(name)) +#define __sanitizer_syscall_post__lwp_setname(res, target, name) \ + __sanitizer_syscall_post_impl__lwp_setname(res, (long long)(target), \ + (long long)(name)) +#define __sanitizer_syscall_pre__lwp_getname(target, name, len) \ + __sanitizer_syscall_pre_impl__lwp_getname( \ + (long long)(target), (long long)(name), (long long)(len)) +#define __sanitizer_syscall_post__lwp_getname(res, target, name, len) \ + __sanitizer_syscall_post_impl__lwp_getname( \ + res, (long long)(target), (long long)(name), (long long)(len)) +#define __sanitizer_syscall_pre__lwp_ctl(features, address) \ + __sanitizer_syscall_pre_impl__lwp_ctl((long long)(features), \ + (long long)(address)) +#define __sanitizer_syscall_post__lwp_ctl(res, features, address) \ + __sanitizer_syscall_post_impl__lwp_ctl(res, (long long)(features), \ + (long long)(address)) +/* syscall 326 has been skipped */ +/* syscall 327 has been skipped */ +/* syscall 328 has been skipped */ +/* syscall 329 has been skipped */ +#define __sanitizer_syscall_pre_compat_60_sa_register(newv, oldv, flags, \ + stackinfo_offset) \ + __sanitizer_syscall_pre_impl_compat_60_sa_register( \ + (long long)(newv), (long long)(oldv), (long long)(flags), \ + (long long)(stackinfo_offset)) +#define __sanitizer_syscall_post_compat_60_sa_register(res, newv, oldv, flags, \ + stackinfo_offset) \ + __sanitizer_syscall_post_impl_compat_60_sa_register( \ + res, (long long)(newv), (long long)(oldv), (long long)(flags), \ + (long long)(stackinfo_offset)) +#define __sanitizer_syscall_pre_compat_60_sa_stacks(num, stacks) \ + __sanitizer_syscall_pre_impl_compat_60_sa_stacks((long long)(num), \ + (long long)(stacks)) +#define __sanitizer_syscall_post_compat_60_sa_stacks(res, num, stacks) \ + __sanitizer_syscall_post_impl_compat_60_sa_stacks(res, (long long)(num), \ + (long long)(stacks)) +#define __sanitizer_syscall_pre_compat_60_sa_enable() \ + __sanitizer_syscall_pre_impl_compat_60_sa_enable() +#define __sanitizer_syscall_post_compat_60_sa_enable(res) \ + __sanitizer_syscall_post_impl_compat_60_sa_enable(res) +#define __sanitizer_syscall_pre_compat_60_sa_setconcurrency(concurrency) \ + __sanitizer_syscall_pre_impl_compat_60_sa_setconcurrency( \ + (long long)(concurrency)) +#define __sanitizer_syscall_post_compat_60_sa_setconcurrency(res, concurrency) \ + __sanitizer_syscall_post_impl_compat_60_sa_setconcurrency( \ + res, (long long)(concurrency)) +#define __sanitizer_syscall_pre_compat_60_sa_yield() \ + __sanitizer_syscall_pre_impl_compat_60_sa_yield() +#define __sanitizer_syscall_post_compat_60_sa_yield(res) \ + __sanitizer_syscall_post_impl_compat_60_sa_yield(res) +#define __sanitizer_syscall_pre_compat_60_sa_preempt(sa_id) \ + __sanitizer_syscall_pre_impl_compat_60_sa_preempt((long long)(sa_id)) +#define __sanitizer_syscall_post_compat_60_sa_preempt(res, sa_id) \ + __sanitizer_syscall_post_impl_compat_60_sa_preempt(res, (long long)(sa_id)) +/* syscall 336 has been skipped */ +/* syscall 337 has been skipped */ +/* syscall 338 has been skipped */ +/* syscall 339 has been skipped */ +#define __sanitizer_syscall_pre___sigaction_sigtramp(signum, nsa, osa, tramp, \ + vers) \ + __sanitizer_syscall_pre_impl___sigaction_sigtramp( \ + (long long)(signum), (long long)(nsa), (long long)(osa), \ + (long long)(tramp), (long long)(vers)) +#define __sanitizer_syscall_post___sigaction_sigtramp(res, signum, nsa, osa, \ + tramp, vers) \ + __sanitizer_syscall_post_impl___sigaction_sigtramp( \ + res, (long long)(signum), (long long)(nsa), (long long)(osa), \ + (long long)(tramp), (long long)(vers)) +/* syscall 341 has been skipped */ +/* syscall 342 has been skipped */ +#define __sanitizer_syscall_pre_rasctl(addr, len, op) \ + __sanitizer_syscall_pre_impl_rasctl((long long)(addr), (long long)(len), \ + (long long)(op)) +#define __sanitizer_syscall_post_rasctl(res, addr, len, op) \ + __sanitizer_syscall_post_impl_rasctl(res, (long long)(addr), \ + (long long)(len), (long long)(op)) +#define __sanitizer_syscall_pre_kqueue() __sanitizer_syscall_pre_impl_kqueue() +#define __sanitizer_syscall_post_kqueue(res) \ + __sanitizer_syscall_post_impl_kqueue(res) +#define __sanitizer_syscall_pre_compat_50_kevent(fd, changelist, nchanges, \ + eventlist, nevents, timeout) \ + __sanitizer_syscall_pre_impl_compat_50_kevent( \ + (long long)(fd), (long long)(changelist), (long long)(nchanges), \ + (long long)(eventlist), (long long)(nevents), (long long)(timeout)) +#define __sanitizer_syscall_post_compat_50_kevent( \ + res, fd, changelist, nchanges, eventlist, nevents, timeout) \ + __sanitizer_syscall_post_impl_compat_50_kevent( \ + res, (long long)(fd), (long long)(changelist), (long long)(nchanges), \ + (long long)(eventlist), (long long)(nevents), (long long)(timeout)) +#define __sanitizer_syscall_pre__sched_setparam(pid, lid, policy, params) \ + __sanitizer_syscall_pre_impl__sched_setparam( \ + (long long)(pid), (long long)(lid), (long long)(policy), \ + (long long)(params)) +#define __sanitizer_syscall_post__sched_setparam(res, pid, lid, policy, \ + params) \ + __sanitizer_syscall_post_impl__sched_setparam( \ + res, (long long)(pid), (long long)(lid), (long long)(policy), \ + (long long)(params)) +#define __sanitizer_syscall_pre__sched_getparam(pid, lid, policy, params) \ + __sanitizer_syscall_pre_impl__sched_getparam( \ + (long long)(pid), (long long)(lid), (long long)(policy), \ + (long long)(params)) +#define __sanitizer_syscall_post__sched_getparam(res, pid, lid, policy, \ + params) \ + __sanitizer_syscall_post_impl__sched_getparam( \ + res, (long long)(pid), (long long)(lid), (long long)(policy), \ + (long long)(params)) +#define __sanitizer_syscall_pre__sched_setaffinity(pid, lid, size, cpuset) \ + __sanitizer_syscall_pre_impl__sched_setaffinity( \ + (long long)(pid), (long long)(lid), (long long)(size), \ + (long long)(cpuset)) +#define __sanitizer_syscall_post__sched_setaffinity(res, pid, lid, size, \ + cpuset) \ + __sanitizer_syscall_post_impl__sched_setaffinity( \ + res, (long long)(pid), (long long)(lid), (long long)(size), \ + (long long)(cpuset)) +#define __sanitizer_syscall_pre__sched_getaffinity(pid, lid, size, cpuset) \ + __sanitizer_syscall_pre_impl__sched_getaffinity( \ + (long long)(pid), (long long)(lid), (long long)(size), \ + (long long)(cpuset)) +#define __sanitizer_syscall_post__sched_getaffinity(res, pid, lid, size, \ + cpuset) \ + __sanitizer_syscall_post_impl__sched_getaffinity( \ + res, (long long)(pid), (long long)(lid), (long long)(size), \ + (long long)(cpuset)) +#define __sanitizer_syscall_pre_sched_yield() \ + __sanitizer_syscall_pre_impl_sched_yield() +#define __sanitizer_syscall_post_sched_yield(res) \ + __sanitizer_syscall_post_impl_sched_yield(res) +#define __sanitizer_syscall_pre__sched_protect(priority) \ + __sanitizer_syscall_pre_impl__sched_protect((long long)(priority)) +#define __sanitizer_syscall_post__sched_protect(res, priority) \ + __sanitizer_syscall_post_impl__sched_protect(res, (long long)(priority)) +/* syscall 352 has been skipped */ +/* syscall 353 has been skipped */ +#define __sanitizer_syscall_pre_fsync_range(fd, flags, start, length) \ + __sanitizer_syscall_pre_impl_fsync_range( \ + (long long)(fd), (long long)(flags), (long long)(start), \ + (long long)(length)) +#define __sanitizer_syscall_post_fsync_range(res, fd, flags, start, length) \ + __sanitizer_syscall_post_impl_fsync_range( \ + res, (long long)(fd), (long long)(flags), (long long)(start), \ + (long long)(length)) +#define __sanitizer_syscall_pre_uuidgen(store, count) \ + __sanitizer_syscall_pre_impl_uuidgen((long long)(store), (long long)(count)) +#define __sanitizer_syscall_post_uuidgen(res, store, count) \ + __sanitizer_syscall_post_impl_uuidgen(res, (long long)(store), \ + (long long)(count)) +#define __sanitizer_syscall_pre_compat_90_getvfsstat(buf, bufsize, flags) \ + __sanitizer_syscall_pre_impl_compat_90_getvfsstat( \ + (long long)(buf), (long long)(bufsize), (long long)(flags)) +#define __sanitizer_syscall_post_compat_90_getvfsstat(res, buf, bufsize, \ + flags) \ + __sanitizer_syscall_post_impl_compat_90_getvfsstat( \ + res, (long long)(buf), (long long)(bufsize), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_90_statvfs1(path, buf, flags) \ + __sanitizer_syscall_pre_impl_compat_90_statvfs1( \ + (long long)(path), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_post_compat_90_statvfs1(res, path, buf, flags) \ + __sanitizer_syscall_post_impl_compat_90_statvfs1( \ + res, (long long)(path), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_90_fstatvfs1(fd, buf, flags) \ + __sanitizer_syscall_pre_impl_compat_90_fstatvfs1( \ + (long long)(fd), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_post_compat_90_fstatvfs1(res, fd, buf, flags) \ + __sanitizer_syscall_post_impl_compat_90_fstatvfs1( \ + res, (long long)(fd), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_30_fhstatvfs1(fhp, buf, flags) \ + __sanitizer_syscall_pre_impl_compat_30_fhstatvfs1( \ + (long long)(fhp), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_post_compat_30_fhstatvfs1(res, fhp, buf, flags) \ + __sanitizer_syscall_post_impl_compat_30_fhstatvfs1( \ + res, (long long)(fhp), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_pre_extattrctl(path, cmd, filename, attrnamespace, \ + attrname) \ + __sanitizer_syscall_pre_impl_extattrctl( \ + (long long)(path), (long long)(cmd), (long long)(filename), \ + (long long)(attrnamespace), (long long)(attrname)) +#define __sanitizer_syscall_post_extattrctl(res, path, cmd, filename, \ + attrnamespace, attrname) \ + __sanitizer_syscall_post_impl_extattrctl( \ + res, (long long)(path), (long long)(cmd), (long long)(filename), \ + (long long)(attrnamespace), (long long)(attrname)) +#define __sanitizer_syscall_pre_extattr_set_file(path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_pre_impl_extattr_set_file( \ + (long long)(path), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_set_file(res, path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_set_file( \ + res, (long long)(path), (long long)(attrnamespace), \ + (long long)(attrname), (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_get_file(path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_pre_impl_extattr_get_file( \ + (long long)(path), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_get_file(res, path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_get_file( \ + res, (long long)(path), (long long)(attrnamespace), \ + (long long)(attrname), (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_delete_file(path, attrnamespace, \ + attrname) \ + __sanitizer_syscall_pre_impl_extattr_delete_file( \ + (long long)(path), (long long)(attrnamespace), (long long)(attrname)) +#define __sanitizer_syscall_post_extattr_delete_file(res, path, attrnamespace, \ + attrname) \ + __sanitizer_syscall_post_impl_extattr_delete_file( \ + res, (long long)(path), (long long)(attrnamespace), \ + (long long)(attrname)) +#define __sanitizer_syscall_pre_extattr_set_fd(fd, attrnamespace, attrname, \ + data, nbytes) \ + __sanitizer_syscall_pre_impl_extattr_set_fd( \ + (long long)(fd), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_set_fd(res, fd, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_set_fd( \ + res, (long long)(fd), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_get_fd(fd, attrnamespace, attrname, \ + data, nbytes) \ + __sanitizer_syscall_pre_impl_extattr_get_fd( \ + (long long)(fd), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_get_fd(res, fd, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_get_fd( \ + res, (long long)(fd), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_delete_fd(fd, attrnamespace, attrname) \ + __sanitizer_syscall_pre_impl_extattr_delete_fd( \ + (long long)(fd), (long long)(attrnamespace), (long long)(attrname)) +#define __sanitizer_syscall_post_extattr_delete_fd(res, fd, attrnamespace, \ + attrname) \ + __sanitizer_syscall_post_impl_extattr_delete_fd( \ + res, (long long)(fd), (long long)(attrnamespace), (long long)(attrname)) +#define __sanitizer_syscall_pre_extattr_set_link(path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_pre_impl_extattr_set_link( \ + (long long)(path), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_set_link(res, path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_set_link( \ + res, (long long)(path), (long long)(attrnamespace), \ + (long long)(attrname), (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_get_link(path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_pre_impl_extattr_get_link( \ + (long long)(path), (long long)(attrnamespace), (long long)(attrname), \ + (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_get_link(res, path, attrnamespace, \ + attrname, data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_get_link( \ + res, (long long)(path), (long long)(attrnamespace), \ + (long long)(attrname), (long long)(data), (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_delete_link(path, attrnamespace, \ + attrname) \ + __sanitizer_syscall_pre_impl_extattr_delete_link( \ + (long long)(path), (long long)(attrnamespace), (long long)(attrname)) +#define __sanitizer_syscall_post_extattr_delete_link(res, path, attrnamespace, \ + attrname) \ + __sanitizer_syscall_post_impl_extattr_delete_link( \ + res, (long long)(path), (long long)(attrnamespace), \ + (long long)(attrname)) +#define __sanitizer_syscall_pre_extattr_list_fd(fd, attrnamespace, data, \ + nbytes) \ + __sanitizer_syscall_pre_impl_extattr_list_fd( \ + (long long)(fd), (long long)(attrnamespace), (long long)(data), \ + (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_list_fd(res, fd, attrnamespace, data, \ + nbytes) \ + __sanitizer_syscall_post_impl_extattr_list_fd( \ + res, (long long)(fd), (long long)(attrnamespace), (long long)(data), \ + (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_list_file(path, attrnamespace, data, \ + nbytes) \ + __sanitizer_syscall_pre_impl_extattr_list_file( \ + (long long)(path), (long long)(attrnamespace), (long long)(data), \ + (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_list_file(res, path, attrnamespace, \ + data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_list_file( \ + res, (long long)(path), (long long)(attrnamespace), (long long)(data), \ + (long long)(nbytes)) +#define __sanitizer_syscall_pre_extattr_list_link(path, attrnamespace, data, \ + nbytes) \ + __sanitizer_syscall_pre_impl_extattr_list_link( \ + (long long)(path), (long long)(attrnamespace), (long long)(data), \ + (long long)(nbytes)) +#define __sanitizer_syscall_post_extattr_list_link(res, path, attrnamespace, \ + data, nbytes) \ + __sanitizer_syscall_post_impl_extattr_list_link( \ + res, (long long)(path), (long long)(attrnamespace), (long long)(data), \ + (long long)(nbytes)) +#define __sanitizer_syscall_pre_compat_50_pselect(nd, in, ou, ex, ts, mask) \ + __sanitizer_syscall_pre_impl_compat_50_pselect( \ + (long long)(nd), (long long)(in), (long long)(ou), (long long)(ex), \ + (long long)(ts), (long long)(mask)) +#define __sanitizer_syscall_post_compat_50_pselect(res, nd, in, ou, ex, ts, \ + mask) \ + __sanitizer_syscall_post_impl_compat_50_pselect( \ + res, (long long)(nd), (long long)(in), (long long)(ou), (long long)(ex), \ + (long long)(ts), (long long)(mask)) +#define __sanitizer_syscall_pre_compat_50_pollts(fds, nfds, ts, mask) \ + __sanitizer_syscall_pre_impl_compat_50_pollts( \ + (long long)(fds), (long long)(nfds), (long long)(ts), (long long)(mask)) +#define __sanitizer_syscall_post_compat_50_pollts(res, fds, nfds, ts, mask) \ + __sanitizer_syscall_post_impl_compat_50_pollts( \ + res, (long long)(fds), (long long)(nfds), (long long)(ts), \ + (long long)(mask)) +#define __sanitizer_syscall_pre_setxattr(path, name, value, size, flags) \ + __sanitizer_syscall_pre_impl_setxattr((long long)(path), (long long)(name), \ + (long long)(value), (long long)(size), \ + (long long)(flags)) +#define __sanitizer_syscall_post_setxattr(res, path, name, value, size, flags) \ + __sanitizer_syscall_post_impl_setxattr( \ + res, (long long)(path), (long long)(name), (long long)(value), \ + (long long)(size), (long long)(flags)) +#define __sanitizer_syscall_pre_lsetxattr(path, name, value, size, flags) \ + __sanitizer_syscall_pre_impl_lsetxattr( \ + (long long)(path), (long long)(name), (long long)(value), \ + (long long)(size), (long long)(flags)) +#define __sanitizer_syscall_post_lsetxattr(res, path, name, value, size, \ + flags) \ + __sanitizer_syscall_post_impl_lsetxattr( \ + res, (long long)(path), (long long)(name), (long long)(value), \ + (long long)(size), (long long)(flags)) +#define __sanitizer_syscall_pre_fsetxattr(fd, name, value, size, flags) \ + __sanitizer_syscall_pre_impl_fsetxattr( \ + (long long)(fd), (long long)(name), (long long)(value), \ + (long long)(size), (long long)(flags)) +#define __sanitizer_syscall_post_fsetxattr(res, fd, name, value, size, flags) \ + __sanitizer_syscall_post_impl_fsetxattr( \ + res, (long long)(fd), (long long)(name), (long long)(value), \ + (long long)(size), (long long)(flags)) +#define __sanitizer_syscall_pre_getxattr(path, name, value, size) \ + __sanitizer_syscall_pre_impl_getxattr((long long)(path), (long long)(name), \ + (long long)(value), (long long)(size)) +#define __sanitizer_syscall_post_getxattr(res, path, name, value, size) \ + __sanitizer_syscall_post_impl_getxattr( \ + res, (long long)(path), (long long)(name), (long long)(value), \ + (long long)(size)) +#define __sanitizer_syscall_pre_lgetxattr(path, name, value, size) \ + __sanitizer_syscall_pre_impl_lgetxattr((long long)(path), (long long)(name), \ + (long long)(value), \ + (long long)(size)) +#define __sanitizer_syscall_post_lgetxattr(res, path, name, value, size) \ + __sanitizer_syscall_post_impl_lgetxattr( \ + res, (long long)(path), (long long)(name), (long long)(value), \ + (long long)(size)) +#define __sanitizer_syscall_pre_fgetxattr(fd, name, value, size) \ + __sanitizer_syscall_pre_impl_fgetxattr((long long)(fd), (long long)(name), \ + (long long)(value), \ + (long long)(size)) +#define __sanitizer_syscall_post_fgetxattr(res, fd, name, value, size) \ + __sanitizer_syscall_post_impl_fgetxattr( \ + res, (long long)(fd), (long long)(name), (long long)(value), \ + (long long)(size)) +#define __sanitizer_syscall_pre_listxattr(path, list, size) \ + __sanitizer_syscall_pre_impl_listxattr((long long)(path), (long long)(list), \ + (long long)(size)) +#define __sanitizer_syscall_post_listxattr(res, path, list, size) \ + __sanitizer_syscall_post_impl_listxattr( \ + res, (long long)(path), (long long)(list), (long long)(size)) +#define __sanitizer_syscall_pre_llistxattr(path, list, size) \ + __sanitizer_syscall_pre_impl_llistxattr( \ + (long long)(path), (long long)(list), (long long)(size)) +#define __sanitizer_syscall_post_llistxattr(res, path, list, size) \ + __sanitizer_syscall_post_impl_llistxattr( \ + res, (long long)(path), (long long)(list), (long long)(size)) +#define __sanitizer_syscall_pre_flistxattr(fd, list, size) \ + __sanitizer_syscall_pre_impl_flistxattr((long long)(fd), (long long)(list), \ + (long long)(size)) +#define __sanitizer_syscall_post_flistxattr(res, fd, list, size) \ + __sanitizer_syscall_post_impl_flistxattr( \ + res, (long long)(fd), (long long)(list), (long long)(size)) +#define __sanitizer_syscall_pre_removexattr(path, name) \ + __sanitizer_syscall_pre_impl_removexattr((long long)(path), (long long)(name)) +#define __sanitizer_syscall_post_removexattr(res, path, name) \ + __sanitizer_syscall_post_impl_removexattr(res, (long long)(path), \ + (long long)(name)) +#define __sanitizer_syscall_pre_lremovexattr(path, name) \ + __sanitizer_syscall_pre_impl_lremovexattr((long long)(path), \ + (long long)(name)) +#define __sanitizer_syscall_post_lremovexattr(res, path, name) \ + __sanitizer_syscall_post_impl_lremovexattr(res, (long long)(path), \ + (long long)(name)) +#define __sanitizer_syscall_pre_fremovexattr(fd, name) \ + __sanitizer_syscall_pre_impl_fremovexattr((long long)(fd), (long long)(name)) +#define __sanitizer_syscall_post_fremovexattr(res, fd, name) \ + __sanitizer_syscall_post_impl_fremovexattr(res, (long long)(fd), \ + (long long)(name)) +#define __sanitizer_syscall_pre_compat_50___stat30(path, ub) \ + __sanitizer_syscall_pre_impl_compat_50___stat30((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_50___stat30(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_50___stat30(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_compat_50___fstat30(fd, sb) \ + __sanitizer_syscall_pre_impl_compat_50___fstat30((long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_post_compat_50___fstat30(res, fd, sb) \ + __sanitizer_syscall_post_impl_compat_50___fstat30(res, (long long)(fd), \ + (long long)(sb)) +#define __sanitizer_syscall_pre_compat_50___lstat30(path, ub) \ + __sanitizer_syscall_pre_impl_compat_50___lstat30((long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_post_compat_50___lstat30(res, path, ub) \ + __sanitizer_syscall_post_impl_compat_50___lstat30(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre___getdents30(fd, buf, count) \ + __sanitizer_syscall_pre_impl___getdents30((long long)(fd), (long long)(buf), \ + (long long)(count)) +#define __sanitizer_syscall_post___getdents30(res, fd, buf, count) \ + __sanitizer_syscall_post_impl___getdents30( \ + res, (long long)(fd), (long long)(buf), (long long)(count)) +#define __sanitizer_syscall_pre_posix_fadvise() \ + __sanitizer_syscall_pre_impl_posix_fadvise((long long)()) +#define __sanitizer_syscall_post_posix_fadvise(res) \ + __sanitizer_syscall_post_impl_posix_fadvise(res, (long long)()) +#define __sanitizer_syscall_pre_compat_30___fhstat30(fhp, sb) \ + __sanitizer_syscall_pre_impl_compat_30___fhstat30((long long)(fhp), \ + (long long)(sb)) +#define __sanitizer_syscall_post_compat_30___fhstat30(res, fhp, sb) \ + __sanitizer_syscall_post_impl_compat_30___fhstat30(res, (long long)(fhp), \ + (long long)(sb)) +#define __sanitizer_syscall_pre_compat_50___ntp_gettime30(ntvp) \ + __sanitizer_syscall_pre_impl_compat_50___ntp_gettime30((long long)(ntvp)) +#define __sanitizer_syscall_post_compat_50___ntp_gettime30(res, ntvp) \ + __sanitizer_syscall_post_impl_compat_50___ntp_gettime30(res, \ + (long long)(ntvp)) +#define __sanitizer_syscall_pre___socket30(domain, type, protocol) \ + __sanitizer_syscall_pre_impl___socket30( \ + (long long)(domain), (long long)(type), (long long)(protocol)) +#define __sanitizer_syscall_post___socket30(res, domain, type, protocol) \ + __sanitizer_syscall_post_impl___socket30( \ + res, (long long)(domain), (long long)(type), (long long)(protocol)) +#define __sanitizer_syscall_pre___getfh30(fname, fhp, fh_size) \ + __sanitizer_syscall_pre_impl___getfh30((long long)(fname), (long long)(fhp), \ + (long long)(fh_size)) +#define __sanitizer_syscall_post___getfh30(res, fname, fhp, fh_size) \ + __sanitizer_syscall_post_impl___getfh30( \ + res, (long long)(fname), (long long)(fhp), (long long)(fh_size)) +#define __sanitizer_syscall_pre___fhopen40(fhp, fh_size, flags) \ + __sanitizer_syscall_pre_impl___fhopen40( \ + (long long)(fhp), (long long)(fh_size), (long long)(flags)) +#define __sanitizer_syscall_post___fhopen40(res, fhp, fh_size, flags) \ + __sanitizer_syscall_post_impl___fhopen40( \ + res, (long long)(fhp), (long long)(fh_size), (long long)(flags)) +#define __sanitizer_syscall_pre_compat_90_fhstatvfs1(fhp, fh_size, buf, flags) \ + __sanitizer_syscall_pre_impl_compat_90_fhstatvfs1( \ + (long long)(fhp), (long long)(fh_size), (long long)(buf), \ + (long long)(flags)) +#define __sanitizer_syscall_post_compat_90_fhstatvfs1(res, fhp, fh_size, buf, \ + flags) \ + __sanitizer_syscall_post_impl_compat_90_fhstatvfs1( \ + res, (long long)(fhp), (long long)(fh_size), (long long)(buf), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_compat_50___fhstat40(fhp, fh_size, sb) \ + __sanitizer_syscall_pre_impl_compat_50___fhstat40( \ + (long long)(fhp), (long long)(fh_size), (long long)(sb)) +#define __sanitizer_syscall_post_compat_50___fhstat40(res, fhp, fh_size, sb) \ + __sanitizer_syscall_post_impl_compat_50___fhstat40( \ + res, (long long)(fhp), (long long)(fh_size), (long long)(sb)) +#define __sanitizer_syscall_pre_aio_cancel(fildes, aiocbp) \ + __sanitizer_syscall_pre_impl_aio_cancel((long long)(fildes), \ + (long long)(aiocbp)) +#define __sanitizer_syscall_post_aio_cancel(res, fildes, aiocbp) \ + __sanitizer_syscall_post_impl_aio_cancel(res, (long long)(fildes), \ + (long long)(aiocbp)) +#define __sanitizer_syscall_pre_aio_error(aiocbp) \ + __sanitizer_syscall_pre_impl_aio_error((long long)(aiocbp)) +#define __sanitizer_syscall_post_aio_error(res, aiocbp) \ + __sanitizer_syscall_post_impl_aio_error(res, (long long)(aiocbp)) +#define __sanitizer_syscall_pre_aio_fsync(op, aiocbp) \ + __sanitizer_syscall_pre_impl_aio_fsync((long long)(op), (long long)(aiocbp)) +#define __sanitizer_syscall_post_aio_fsync(res, op, aiocbp) \ + __sanitizer_syscall_post_impl_aio_fsync(res, (long long)(op), \ + (long long)(aiocbp)) +#define __sanitizer_syscall_pre_aio_read(aiocbp) \ + __sanitizer_syscall_pre_impl_aio_read((long long)(aiocbp)) +#define __sanitizer_syscall_post_aio_read(res, aiocbp) \ + __sanitizer_syscall_post_impl_aio_read(res, (long long)(aiocbp)) +#define __sanitizer_syscall_pre_aio_return(aiocbp) \ + __sanitizer_syscall_pre_impl_aio_return((long long)(aiocbp)) +#define __sanitizer_syscall_post_aio_return(res, aiocbp) \ + __sanitizer_syscall_post_impl_aio_return(res, (long long)(aiocbp)) +#define __sanitizer_syscall_pre_compat_50_aio_suspend(list, nent, timeout) \ + __sanitizer_syscall_pre_impl_compat_50_aio_suspend( \ + (long long)(list), (long long)(nent), (long long)(timeout)) +#define __sanitizer_syscall_post_compat_50_aio_suspend(res, list, nent, \ + timeout) \ + __sanitizer_syscall_post_impl_compat_50_aio_suspend( \ + res, (long long)(list), (long long)(nent), (long long)(timeout)) +#define __sanitizer_syscall_pre_aio_write(aiocbp) \ + __sanitizer_syscall_pre_impl_aio_write((long long)(aiocbp)) +#define __sanitizer_syscall_post_aio_write(res, aiocbp) \ + __sanitizer_syscall_post_impl_aio_write(res, (long long)(aiocbp)) +#define __sanitizer_syscall_pre_lio_listio(mode, list, nent, sig) \ + __sanitizer_syscall_pre_impl_lio_listio((long long)(mode), \ + (long long)(list), \ + (long long)(nent), (long long)(sig)) +#define __sanitizer_syscall_post_lio_listio(res, mode, list, nent, sig) \ + __sanitizer_syscall_post_impl_lio_listio( \ + res, (long long)(mode), (long long)(list), (long long)(nent), \ + (long long)(sig)) +/* syscall 407 has been skipped */ +/* syscall 408 has been skipped */ +/* syscall 409 has been skipped */ +#define __sanitizer_syscall_pre___mount50(type, path, flags, data, data_len) \ + __sanitizer_syscall_pre_impl___mount50( \ + (long long)(type), (long long)(path), (long long)(flags), \ + (long long)(data), (long long)(data_len)) +#define __sanitizer_syscall_post___mount50(res, type, path, flags, data, \ + data_len) \ + __sanitizer_syscall_post_impl___mount50( \ + res, (long long)(type), (long long)(path), (long long)(flags), \ + (long long)(data), (long long)(data_len)) +#define __sanitizer_syscall_pre_mremap(old_address, old_size, new_address, \ + new_size, flags) \ + __sanitizer_syscall_pre_impl_mremap( \ + (long long)(old_address), (long long)(old_size), \ + (long long)(new_address), (long long)(new_size), (long long)(flags)) +#define __sanitizer_syscall_post_mremap(res, old_address, old_size, \ + new_address, new_size, flags) \ + __sanitizer_syscall_post_impl_mremap( \ + res, (long long)(old_address), (long long)(old_size), \ + (long long)(new_address), (long long)(new_size), (long long)(flags)) +#define __sanitizer_syscall_pre_pset_create(psid) \ + __sanitizer_syscall_pre_impl_pset_create((long long)(psid)) +#define __sanitizer_syscall_post_pset_create(res, psid) \ + __sanitizer_syscall_post_impl_pset_create(res, (long long)(psid)) +#define __sanitizer_syscall_pre_pset_destroy(psid) \ + __sanitizer_syscall_pre_impl_pset_destroy((long long)(psid)) +#define __sanitizer_syscall_post_pset_destroy(res, psid) \ + __sanitizer_syscall_post_impl_pset_destroy(res, (long long)(psid)) +#define __sanitizer_syscall_pre_pset_assign(psid, cpuid, opsid) \ + __sanitizer_syscall_pre_impl_pset_assign( \ + (long long)(psid), (long long)(cpuid), (long long)(opsid)) +#define __sanitizer_syscall_post_pset_assign(res, psid, cpuid, opsid) \ + __sanitizer_syscall_post_impl_pset_assign( \ + res, (long long)(psid), (long long)(cpuid), (long long)(opsid)) +#define __sanitizer_syscall_pre__pset_bind(idtype, first_id, second_id, psid, \ + opsid) \ + __sanitizer_syscall_pre_impl__pset_bind( \ + (long long)(idtype), (long long)(first_id), (long long)(second_id), \ + (long long)(psid), (long long)(opsid)) +#define __sanitizer_syscall_post__pset_bind(res, idtype, first_id, second_id, \ + psid, opsid) \ + __sanitizer_syscall_post_impl__pset_bind( \ + res, (long long)(idtype), (long long)(first_id), (long long)(second_id), \ + (long long)(psid), (long long)(opsid)) +#define __sanitizer_syscall_pre___posix_fadvise50(fd, PAD, offset, len, \ + advice) \ + __sanitizer_syscall_pre_impl___posix_fadvise50( \ + (long long)(fd), (long long)(PAD), (long long)(offset), \ + (long long)(len), (long long)(advice)) +#define __sanitizer_syscall_post___posix_fadvise50(res, fd, PAD, offset, len, \ + advice) \ + __sanitizer_syscall_post_impl___posix_fadvise50( \ + res, (long long)(fd), (long long)(PAD), (long long)(offset), \ + (long long)(len), (long long)(advice)) +#define __sanitizer_syscall_pre___select50(nd, in, ou, ex, tv) \ + __sanitizer_syscall_pre_impl___select50((long long)(nd), (long long)(in), \ + (long long)(ou), (long long)(ex), \ + (long long)(tv)) +#define __sanitizer_syscall_post___select50(res, nd, in, ou, ex, tv) \ + __sanitizer_syscall_post_impl___select50(res, (long long)(nd), \ + (long long)(in), (long long)(ou), \ + (long long)(ex), (long long)(tv)) +#define __sanitizer_syscall_pre___gettimeofday50(tp, tzp) \ + __sanitizer_syscall_pre_impl___gettimeofday50((long long)(tp), \ + (long long)(tzp)) +#define __sanitizer_syscall_post___gettimeofday50(res, tp, tzp) \ + __sanitizer_syscall_post_impl___gettimeofday50(res, (long long)(tp), \ + (long long)(tzp)) +#define __sanitizer_syscall_pre___settimeofday50(tv, tzp) \ + __sanitizer_syscall_pre_impl___settimeofday50((long long)(tv), \ + (long long)(tzp)) +#define __sanitizer_syscall_post___settimeofday50(res, tv, tzp) \ + __sanitizer_syscall_post_impl___settimeofday50(res, (long long)(tv), \ + (long long)(tzp)) +#define __sanitizer_syscall_pre___utimes50(path, tptr) \ + __sanitizer_syscall_pre_impl___utimes50((long long)(path), (long long)(tptr)) +#define __sanitizer_syscall_post___utimes50(res, path, tptr) \ + __sanitizer_syscall_post_impl___utimes50(res, (long long)(path), \ + (long long)(tptr)) +#define __sanitizer_syscall_pre___adjtime50(delta, olddelta) \ + __sanitizer_syscall_pre_impl___adjtime50((long long)(delta), \ + (long long)(olddelta)) +#define __sanitizer_syscall_post___adjtime50(res, delta, olddelta) \ + __sanitizer_syscall_post_impl___adjtime50(res, (long long)(delta), \ + (long long)(olddelta)) +#define __sanitizer_syscall_pre___lfs_segwait50(fsidp, tv) \ + __sanitizer_syscall_pre_impl___lfs_segwait50((long long)(fsidp), \ + (long long)(tv)) +#define __sanitizer_syscall_post___lfs_segwait50(res, fsidp, tv) \ + __sanitizer_syscall_post_impl___lfs_segwait50(res, (long long)(fsidp), \ + (long long)(tv)) +#define __sanitizer_syscall_pre___futimes50(fd, tptr) \ + __sanitizer_syscall_pre_impl___futimes50((long long)(fd), (long long)(tptr)) +#define __sanitizer_syscall_post___futimes50(res, fd, tptr) \ + __sanitizer_syscall_post_impl___futimes50(res, (long long)(fd), \ + (long long)(tptr)) +#define __sanitizer_syscall_pre___lutimes50(path, tptr) \ + __sanitizer_syscall_pre_impl___lutimes50((long long)(path), (long long)(tptr)) +#define __sanitizer_syscall_post___lutimes50(res, path, tptr) \ + __sanitizer_syscall_post_impl___lutimes50(res, (long long)(path), \ + (long long)(tptr)) +#define __sanitizer_syscall_pre___setitimer50(which, itv, oitv) \ + __sanitizer_syscall_pre_impl___setitimer50( \ + (long long)(which), (long long)(itv), (long long)(oitv)) +#define __sanitizer_syscall_post___setitimer50(res, which, itv, oitv) \ + __sanitizer_syscall_post_impl___setitimer50( \ + res, (long long)(which), (long long)(itv), (long long)(oitv)) +#define __sanitizer_syscall_pre___getitimer50(which, itv) \ + __sanitizer_syscall_pre_impl___getitimer50((long long)(which), \ + (long long)(itv)) +#define __sanitizer_syscall_post___getitimer50(res, which, itv) \ + __sanitizer_syscall_post_impl___getitimer50(res, (long long)(which), \ + (long long)(itv)) +#define __sanitizer_syscall_pre___clock_gettime50(clock_id, tp) \ + __sanitizer_syscall_pre_impl___clock_gettime50((long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_post___clock_gettime50(res, clock_id, tp) \ + __sanitizer_syscall_post_impl___clock_gettime50(res, (long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_pre___clock_settime50(clock_id, tp) \ + __sanitizer_syscall_pre_impl___clock_settime50((long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_post___clock_settime50(res, clock_id, tp) \ + __sanitizer_syscall_post_impl___clock_settime50(res, (long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_pre___clock_getres50(clock_id, tp) \ + __sanitizer_syscall_pre_impl___clock_getres50((long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_post___clock_getres50(res, clock_id, tp) \ + __sanitizer_syscall_post_impl___clock_getres50(res, (long long)(clock_id), \ + (long long)(tp)) +#define __sanitizer_syscall_pre___nanosleep50(rqtp, rmtp) \ + __sanitizer_syscall_pre_impl___nanosleep50((long long)(rqtp), \ + (long long)(rmtp)) +#define __sanitizer_syscall_post___nanosleep50(res, rqtp, rmtp) \ + __sanitizer_syscall_post_impl___nanosleep50(res, (long long)(rqtp), \ + (long long)(rmtp)) +#define __sanitizer_syscall_pre_____sigtimedwait50(set, info, timeout) \ + __sanitizer_syscall_pre_impl_____sigtimedwait50( \ + (long long)(set), (long long)(info), (long long)(timeout)) +#define __sanitizer_syscall_post_____sigtimedwait50(res, set, info, timeout) \ + __sanitizer_syscall_post_impl_____sigtimedwait50( \ + res, (long long)(set), (long long)(info), (long long)(timeout)) +#define __sanitizer_syscall_pre___mq_timedsend50(mqdes, msg_ptr, msg_len, \ + msg_prio, abs_timeout) \ + __sanitizer_syscall_pre_impl___mq_timedsend50( \ + (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_post___mq_timedsend50( \ + res, mqdes, msg_ptr, msg_len, msg_prio, abs_timeout) \ + __sanitizer_syscall_post_impl___mq_timedsend50( \ + res, (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_pre___mq_timedreceive50(mqdes, msg_ptr, msg_len, \ + msg_prio, abs_timeout) \ + __sanitizer_syscall_pre_impl___mq_timedreceive50( \ + (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_post___mq_timedreceive50( \ + res, mqdes, msg_ptr, msg_len, msg_prio, abs_timeout) \ + __sanitizer_syscall_post_impl___mq_timedreceive50( \ + res, (long long)(mqdes), (long long)(msg_ptr), (long long)(msg_len), \ + (long long)(msg_prio), (long long)(abs_timeout)) +#define __sanitizer_syscall_pre_compat_60__lwp_park(ts, unpark, hint, \ + unparkhint) \ + __sanitizer_syscall_pre_impl_compat_60__lwp_park( \ + (long long)(ts), (long long)(unpark), (long long)(hint), \ + (long long)(unparkhint)) +#define __sanitizer_syscall_post_compat_60__lwp_park(res, ts, unpark, hint, \ + unparkhint) \ + __sanitizer_syscall_post_impl_compat_60__lwp_park( \ + res, (long long)(ts), (long long)(unpark), (long long)(hint), \ + (long long)(unparkhint)) +#define __sanitizer_syscall_pre___kevent50(fd, changelist, nchanges, \ + eventlist, nevents, timeout) \ + __sanitizer_syscall_pre_impl___kevent50( \ + (long long)(fd), (long long)(changelist), (long long)(nchanges), \ + (long long)(eventlist), (long long)(nevents), (long long)(timeout)) +#define __sanitizer_syscall_post___kevent50(res, fd, changelist, nchanges, \ + eventlist, nevents, timeout) \ + __sanitizer_syscall_post_impl___kevent50( \ + res, (long long)(fd), (long long)(changelist), (long long)(nchanges), \ + (long long)(eventlist), (long long)(nevents), (long long)(timeout)) +#define __sanitizer_syscall_pre___pselect50(nd, in, ou, ex, ts, mask) \ + __sanitizer_syscall_pre_impl___pselect50((long long)(nd), (long long)(in), \ + (long long)(ou), (long long)(ex), \ + (long long)(ts), (long long)(mask)) +#define __sanitizer_syscall_post___pselect50(res, nd, in, ou, ex, ts, mask) \ + __sanitizer_syscall_post_impl___pselect50( \ + res, (long long)(nd), (long long)(in), (long long)(ou), (long long)(ex), \ + (long long)(ts), (long long)(mask)) +#define __sanitizer_syscall_pre___pollts50(fds, nfds, ts, mask) \ + __sanitizer_syscall_pre_impl___pollts50((long long)(fds), (long long)(nfds), \ + (long long)(ts), (long long)(mask)) +#define __sanitizer_syscall_post___pollts50(res, fds, nfds, ts, mask) \ + __sanitizer_syscall_post_impl___pollts50(res, (long long)(fds), \ + (long long)(nfds), (long long)(ts), \ + (long long)(mask)) +#define __sanitizer_syscall_pre___aio_suspend50(list, nent, timeout) \ + __sanitizer_syscall_pre_impl___aio_suspend50( \ + (long long)(list), (long long)(nent), (long long)(timeout)) +#define __sanitizer_syscall_post___aio_suspend50(res, list, nent, timeout) \ + __sanitizer_syscall_post_impl___aio_suspend50( \ + res, (long long)(list), (long long)(nent), (long long)(timeout)) +#define __sanitizer_syscall_pre___stat50(path, ub) \ + __sanitizer_syscall_pre_impl___stat50((long long)(path), (long long)(ub)) +#define __sanitizer_syscall_post___stat50(res, path, ub) \ + __sanitizer_syscall_post_impl___stat50(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre___fstat50(fd, sb) \ + __sanitizer_syscall_pre_impl___fstat50((long long)(fd), (long long)(sb)) +#define __sanitizer_syscall_post___fstat50(res, fd, sb) \ + __sanitizer_syscall_post_impl___fstat50(res, (long long)(fd), (long long)(sb)) +#define __sanitizer_syscall_pre___lstat50(path, ub) \ + __sanitizer_syscall_pre_impl___lstat50((long long)(path), (long long)(ub)) +#define __sanitizer_syscall_post___lstat50(res, path, ub) \ + __sanitizer_syscall_post_impl___lstat50(res, (long long)(path), \ + (long long)(ub)) +#define __sanitizer_syscall_pre_____semctl50(semid, semnum, cmd, arg) \ + __sanitizer_syscall_pre_impl_____semctl50( \ + (long long)(semid), (long long)(semnum), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_post_____semctl50(res, semid, semnum, cmd, arg) \ + __sanitizer_syscall_post_impl_____semctl50( \ + res, (long long)(semid), (long long)(semnum), (long long)(cmd), \ + (long long)(arg)) +#define __sanitizer_syscall_pre___shmctl50(shmid, cmd, buf) \ + __sanitizer_syscall_pre_impl___shmctl50((long long)(shmid), \ + (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_post___shmctl50(res, shmid, cmd, buf) \ + __sanitizer_syscall_post_impl___shmctl50(res, (long long)(shmid), \ + (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_pre___msgctl50(msqid, cmd, buf) \ + __sanitizer_syscall_pre_impl___msgctl50((long long)(msqid), \ + (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_post___msgctl50(res, msqid, cmd, buf) \ + __sanitizer_syscall_post_impl___msgctl50(res, (long long)(msqid), \ + (long long)(cmd), (long long)(buf)) +#define __sanitizer_syscall_pre___getrusage50(who, rusage) \ + __sanitizer_syscall_pre_impl___getrusage50((long long)(who), \ + (long long)(rusage)) +#define __sanitizer_syscall_post___getrusage50(res, who, rusage) \ + __sanitizer_syscall_post_impl___getrusage50(res, (long long)(who), \ + (long long)(rusage)) +#define __sanitizer_syscall_pre___timer_settime50(timerid, flags, value, \ + ovalue) \ + __sanitizer_syscall_pre_impl___timer_settime50( \ + (long long)(timerid), (long long)(flags), (long long)(value), \ + (long long)(ovalue)) +#define __sanitizer_syscall_post___timer_settime50(res, timerid, flags, value, \ + ovalue) \ + __sanitizer_syscall_post_impl___timer_settime50( \ + res, (long long)(timerid), (long long)(flags), (long long)(value), \ + (long long)(ovalue)) +#define __sanitizer_syscall_pre___timer_gettime50(timerid, value) \ + __sanitizer_syscall_pre_impl___timer_gettime50((long long)(timerid), \ + (long long)(value)) +#define __sanitizer_syscall_post___timer_gettime50(res, timerid, value) \ + __sanitizer_syscall_post_impl___timer_gettime50(res, (long long)(timerid), \ + (long long)(value)) +#if defined(NTP) || !defined(_KERNEL_OPT) +#define __sanitizer_syscall_pre___ntp_gettime50(ntvp) \ + __sanitizer_syscall_pre_impl___ntp_gettime50((long long)(ntvp)) +#define __sanitizer_syscall_post___ntp_gettime50(res, ntvp) \ + __sanitizer_syscall_post_impl___ntp_gettime50(res, (long long)(ntvp)) +#else +/* syscall 448 has been skipped */ +#endif +#define __sanitizer_syscall_pre___wait450(pid, status, options, rusage) \ + __sanitizer_syscall_pre_impl___wait450( \ + (long long)(pid), (long long)(status), (long long)(options), \ + (long long)(rusage)) +#define __sanitizer_syscall_post___wait450(res, pid, status, options, rusage) \ + __sanitizer_syscall_post_impl___wait450( \ + res, (long long)(pid), (long long)(status), (long long)(options), \ + (long long)(rusage)) +#define __sanitizer_syscall_pre___mknod50(path, mode, dev) \ + __sanitizer_syscall_pre_impl___mknod50((long long)(path), (long long)(mode), \ + (long long)(dev)) +#define __sanitizer_syscall_post___mknod50(res, path, mode, dev) \ + __sanitizer_syscall_post_impl___mknod50(res, (long long)(path), \ + (long long)(mode), (long long)(dev)) +#define __sanitizer_syscall_pre___fhstat50(fhp, fh_size, sb) \ + __sanitizer_syscall_pre_impl___fhstat50( \ + (long long)(fhp), (long long)(fh_size), (long long)(sb)) +#define __sanitizer_syscall_post___fhstat50(res, fhp, fh_size, sb) \ + __sanitizer_syscall_post_impl___fhstat50( \ + res, (long long)(fhp), (long long)(fh_size), (long long)(sb)) +/* syscall 452 has been skipped */ +#define __sanitizer_syscall_pre_pipe2(fildes, flags) \ + __sanitizer_syscall_pre_impl_pipe2((long long)(fildes), (long long)(flags)) +#define __sanitizer_syscall_post_pipe2(res, fildes, flags) \ + __sanitizer_syscall_post_impl_pipe2(res, (long long)(fildes), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_dup3(from, to, flags) \ + __sanitizer_syscall_pre_impl_dup3((long long)(from), (long long)(to), \ + (long long)(flags)) +#define __sanitizer_syscall_post_dup3(res, from, to, flags) \ + __sanitizer_syscall_post_impl_dup3(res, (long long)(from), (long long)(to), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_kqueue1(flags) \ + __sanitizer_syscall_pre_impl_kqueue1((long long)(flags)) +#define __sanitizer_syscall_post_kqueue1(res, flags) \ + __sanitizer_syscall_post_impl_kqueue1(res, (long long)(flags)) +#define __sanitizer_syscall_pre_paccept(s, name, anamelen, mask, flags) \ + __sanitizer_syscall_pre_impl_paccept((long long)(s), (long long)(name), \ + (long long)(anamelen), \ + (long long)(mask), (long long)(flags)) +#define __sanitizer_syscall_post_paccept(res, s, name, anamelen, mask, flags) \ + __sanitizer_syscall_post_impl_paccept( \ + res, (long long)(s), (long long)(name), (long long)(anamelen), \ + (long long)(mask), (long long)(flags)) +#define __sanitizer_syscall_pre_linkat(fd1, name1, fd2, name2, flags) \ + __sanitizer_syscall_pre_impl_linkat((long long)(fd1), (long long)(name1), \ + (long long)(fd2), (long long)(name2), \ + (long long)(flags)) +#define __sanitizer_syscall_post_linkat(res, fd1, name1, fd2, name2, flags) \ + __sanitizer_syscall_post_impl_linkat(res, (long long)(fd1), \ + (long long)(name1), (long long)(fd2), \ + (long long)(name2), (long long)(flags)) +#define __sanitizer_syscall_pre_renameat(fromfd, from, tofd, to) \ + __sanitizer_syscall_pre_impl_renameat((long long)(fromfd), \ + (long long)(from), (long long)(tofd), \ + (long long)(to)) +#define __sanitizer_syscall_post_renameat(res, fromfd, from, tofd, to) \ + __sanitizer_syscall_post_impl_renameat(res, (long long)(fromfd), \ + (long long)(from), (long long)(tofd), \ + (long long)(to)) +#define __sanitizer_syscall_pre_mkfifoat(fd, path, mode) \ + __sanitizer_syscall_pre_impl_mkfifoat((long long)(fd), (long long)(path), \ + (long long)(mode)) +#define __sanitizer_syscall_post_mkfifoat(res, fd, path, mode) \ + __sanitizer_syscall_post_impl_mkfifoat(res, (long long)(fd), \ + (long long)(path), (long long)(mode)) +#define __sanitizer_syscall_pre_mknodat(fd, path, mode, PAD, dev) \ + __sanitizer_syscall_pre_impl_mknodat((long long)(fd), (long long)(path), \ + (long long)(mode), (long long)(PAD), \ + (long long)(dev)) +#define __sanitizer_syscall_post_mknodat(res, fd, path, mode, PAD, dev) \ + __sanitizer_syscall_post_impl_mknodat(res, (long long)(fd), \ + (long long)(path), (long long)(mode), \ + (long long)(PAD), (long long)(dev)) +#define __sanitizer_syscall_pre_mkdirat(fd, path, mode) \ + __sanitizer_syscall_pre_impl_mkdirat((long long)(fd), (long long)(path), \ + (long long)(mode)) +#define __sanitizer_syscall_post_mkdirat(res, fd, path, mode) \ + __sanitizer_syscall_post_impl_mkdirat(res, (long long)(fd), \ + (long long)(path), (long long)(mode)) +#define __sanitizer_syscall_pre_faccessat(fd, path, amode, flag) \ + __sanitizer_syscall_pre_impl_faccessat((long long)(fd), (long long)(path), \ + (long long)(amode), \ + (long long)(flag)) +#define __sanitizer_syscall_post_faccessat(res, fd, path, amode, flag) \ + __sanitizer_syscall_post_impl_faccessat( \ + res, (long long)(fd), (long long)(path), (long long)(amode), \ + (long long)(flag)) +#define __sanitizer_syscall_pre_fchmodat(fd, path, mode, flag) \ + __sanitizer_syscall_pre_impl_fchmodat((long long)(fd), (long long)(path), \ + (long long)(mode), (long long)(flag)) +#define __sanitizer_syscall_post_fchmodat(res, fd, path, mode, flag) \ + __sanitizer_syscall_post_impl_fchmodat(res, (long long)(fd), \ + (long long)(path), (long long)(mode), \ + (long long)(flag)) +#define __sanitizer_syscall_pre_fchownat(fd, path, owner, group, flag) \ + __sanitizer_syscall_pre_impl_fchownat((long long)(fd), (long long)(path), \ + (long long)(owner), \ + (long long)(group), (long long)(flag)) +#define __sanitizer_syscall_post_fchownat(res, fd, path, owner, group, flag) \ + __sanitizer_syscall_post_impl_fchownat( \ + res, (long long)(fd), (long long)(path), (long long)(owner), \ + (long long)(group), (long long)(flag)) +#define __sanitizer_syscall_pre_fexecve(fd, argp, envp) \ + __sanitizer_syscall_pre_impl_fexecve((long long)(fd), (long long)(argp), \ + (long long)(envp)) +#define __sanitizer_syscall_post_fexecve(res, fd, argp, envp) \ + __sanitizer_syscall_post_impl_fexecve(res, (long long)(fd), \ + (long long)(argp), (long long)(envp)) +#define __sanitizer_syscall_pre_fstatat(fd, path, buf, flag) \ + __sanitizer_syscall_pre_impl_fstatat((long long)(fd), (long long)(path), \ + (long long)(buf), (long long)(flag)) +#define __sanitizer_syscall_post_fstatat(res, fd, path, buf, flag) \ + __sanitizer_syscall_post_impl_fstatat(res, (long long)(fd), \ + (long long)(path), (long long)(buf), \ + (long long)(flag)) +#define __sanitizer_syscall_pre_utimensat(fd, path, tptr, flag) \ + __sanitizer_syscall_pre_impl_utimensat((long long)(fd), (long long)(path), \ + (long long)(tptr), (long long)(flag)) +#define __sanitizer_syscall_post_utimensat(res, fd, path, tptr, flag) \ + __sanitizer_syscall_post_impl_utimensat( \ + res, (long long)(fd), (long long)(path), (long long)(tptr), \ + (long long)(flag)) +#define __sanitizer_syscall_pre_openat(fd, path, oflags, mode) \ + __sanitizer_syscall_pre_impl_openat((long long)(fd), (long long)(path), \ + (long long)(oflags), (long long)(mode)) +#define __sanitizer_syscall_post_openat(res, fd, path, oflags, mode) \ + __sanitizer_syscall_post_impl_openat(res, (long long)(fd), \ + (long long)(path), (long long)(oflags), \ + (long long)(mode)) +#define __sanitizer_syscall_pre_readlinkat(fd, path, buf, bufsize) \ + __sanitizer_syscall_pre_impl_readlinkat((long long)(fd), (long long)(path), \ + (long long)(buf), \ + (long long)(bufsize)) +#define __sanitizer_syscall_post_readlinkat(res, fd, path, buf, bufsize) \ + __sanitizer_syscall_post_impl_readlinkat( \ + res, (long long)(fd), (long long)(path), (long long)(buf), \ + (long long)(bufsize)) +#define __sanitizer_syscall_pre_symlinkat(path1, fd, path2) \ + __sanitizer_syscall_pre_impl_symlinkat((long long)(path1), (long long)(fd), \ + (long long)(path2)) +#define __sanitizer_syscall_post_symlinkat(res, path1, fd, path2) \ + __sanitizer_syscall_post_impl_symlinkat(res, (long long)(path1), \ + (long long)(fd), (long long)(path2)) +#define __sanitizer_syscall_pre_unlinkat(fd, path, flag) \ + __sanitizer_syscall_pre_impl_unlinkat((long long)(fd), (long long)(path), \ + (long long)(flag)) +#define __sanitizer_syscall_post_unlinkat(res, fd, path, flag) \ + __sanitizer_syscall_post_impl_unlinkat(res, (long long)(fd), \ + (long long)(path), (long long)(flag)) +#define __sanitizer_syscall_pre_futimens(fd, tptr) \ + __sanitizer_syscall_pre_impl_futimens((long long)(fd), (long long)(tptr)) +#define __sanitizer_syscall_post_futimens(res, fd, tptr) \ + __sanitizer_syscall_post_impl_futimens(res, (long long)(fd), \ + (long long)(tptr)) +#define __sanitizer_syscall_pre___quotactl(path, args) \ + __sanitizer_syscall_pre_impl___quotactl((long long)(path), (long long)(args)) +#define __sanitizer_syscall_post___quotactl(res, path, args) \ + __sanitizer_syscall_post_impl___quotactl(res, (long long)(path), \ + (long long)(args)) +#define __sanitizer_syscall_pre_posix_spawn(pid, path, file_actions, attrp, \ + argv, envp) \ + __sanitizer_syscall_pre_impl_posix_spawn( \ + (long long)(pid), (long long)(path), (long long)(file_actions), \ + (long long)(attrp), (long long)(argv), (long long)(envp)) +#define __sanitizer_syscall_post_posix_spawn(res, pid, path, file_actions, \ + attrp, argv, envp) \ + __sanitizer_syscall_post_impl_posix_spawn( \ + res, (long long)(pid), (long long)(path), (long long)(file_actions), \ + (long long)(attrp), (long long)(argv), (long long)(envp)) +#define __sanitizer_syscall_pre_recvmmsg(s, mmsg, vlen, flags, timeout) \ + __sanitizer_syscall_pre_impl_recvmmsg((long long)(s), (long long)(mmsg), \ + (long long)(vlen), (long long)(flags), \ + (long long)(timeout)) +#define __sanitizer_syscall_post_recvmmsg(res, s, mmsg, vlen, flags, timeout) \ + __sanitizer_syscall_post_impl_recvmmsg( \ + res, (long long)(s), (long long)(mmsg), (long long)(vlen), \ + (long long)(flags), (long long)(timeout)) +#define __sanitizer_syscall_pre_sendmmsg(s, mmsg, vlen, flags) \ + __sanitizer_syscall_pre_impl_sendmmsg((long long)(s), (long long)(mmsg), \ + (long long)(vlen), (long long)(flags)) +#define __sanitizer_syscall_post_sendmmsg(res, s, mmsg, vlen, flags) \ + __sanitizer_syscall_post_impl_sendmmsg(res, (long long)(s), \ + (long long)(mmsg), (long long)(vlen), \ + (long long)(flags)) +#define __sanitizer_syscall_pre_clock_nanosleep(clock_id, flags, rqtp, rmtp) \ + __sanitizer_syscall_pre_impl_clock_nanosleep( \ + (long long)(clock_id), (long long)(flags), (long long)(rqtp), \ + (long long)(rmtp)) +#define __sanitizer_syscall_post_clock_nanosleep(res, clock_id, flags, rqtp, \ + rmtp) \ + __sanitizer_syscall_post_impl_clock_nanosleep( \ + res, (long long)(clock_id), (long long)(flags), (long long)(rqtp), \ + (long long)(rmtp)) +#define __sanitizer_syscall_pre____lwp_park60(clock_id, flags, ts, unpark, \ + hint, unparkhint) \ + __sanitizer_syscall_pre_impl____lwp_park60( \ + (long long)(clock_id), (long long)(flags), (long long)(ts), \ + (long long)(unpark), (long long)(hint), (long long)(unparkhint)) +#define __sanitizer_syscall_post____lwp_park60(res, clock_id, flags, ts, \ + unpark, hint, unparkhint) \ + __sanitizer_syscall_post_impl____lwp_park60( \ + res, (long long)(clock_id), (long long)(flags), (long long)(ts), \ + (long long)(unpark), (long long)(hint), (long long)(unparkhint)) +#define __sanitizer_syscall_pre_posix_fallocate(fd, PAD, pos, len) \ + __sanitizer_syscall_pre_impl_posix_fallocate( \ + (long long)(fd), (long long)(PAD), (long long)(pos), (long long)(len)) +#define __sanitizer_syscall_post_posix_fallocate(res, fd, PAD, pos, len) \ + __sanitizer_syscall_post_impl_posix_fallocate( \ + res, (long long)(fd), (long long)(PAD), (long long)(pos), \ + (long long)(len)) +#define __sanitizer_syscall_pre_fdiscard(fd, PAD, pos, len) \ + __sanitizer_syscall_pre_impl_fdiscard((long long)(fd), (long long)(PAD), \ + (long long)(pos), (long long)(len)) +#define __sanitizer_syscall_post_fdiscard(res, fd, PAD, pos, len) \ + __sanitizer_syscall_post_impl_fdiscard(res, (long long)(fd), \ + (long long)(PAD), (long long)(pos), \ + (long long)(len)) +#define __sanitizer_syscall_pre_wait6(idtype, id, status, options, wru, info) \ + __sanitizer_syscall_pre_impl_wait6( \ + (long long)(idtype), (long long)(id), (long long)(status), \ + (long long)(options), (long long)(wru), (long long)(info)) +#define __sanitizer_syscall_post_wait6(res, idtype, id, status, options, wru, \ + info) \ + __sanitizer_syscall_post_impl_wait6( \ + res, (long long)(idtype), (long long)(id), (long long)(status), \ + (long long)(options), (long long)(wru), (long long)(info)) +#define __sanitizer_syscall_pre_clock_getcpuclockid2(idtype, id, clock_id) \ + __sanitizer_syscall_pre_impl_clock_getcpuclockid2( \ + (long long)(idtype), (long long)(id), (long long)(clock_id)) +#define __sanitizer_syscall_post_clock_getcpuclockid2(res, idtype, id, \ + clock_id) \ + __sanitizer_syscall_post_impl_clock_getcpuclockid2( \ + res, (long long)(idtype), (long long)(id), (long long)(clock_id)) +#define __sanitizer_syscall_pre___getvfsstat90(buf, bufsize, flags) \ + __sanitizer_syscall_pre_impl___getvfsstat90( \ + (long long)(buf), (long long)(bufsize), (long long)(flags)) +#define __sanitizer_syscall_post___getvfsstat90(res, buf, bufsize, flags) \ + __sanitizer_syscall_post_impl___getvfsstat90( \ + res, (long long)(buf), (long long)(bufsize), (long long)(flags)) +#define __sanitizer_syscall_pre___statvfs190(path, buf, flags) \ + __sanitizer_syscall_pre_impl___statvfs190( \ + (long long)(path), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_post___statvfs190(res, path, buf, flags) \ + __sanitizer_syscall_post_impl___statvfs190( \ + res, (long long)(path), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_pre___fstatvfs190(fd, buf, flags) \ + __sanitizer_syscall_pre_impl___fstatvfs190( \ + (long long)(fd), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_post___fstatvfs190(res, fd, buf, flags) \ + __sanitizer_syscall_post_impl___fstatvfs190( \ + res, (long long)(fd), (long long)(buf), (long long)(flags)) +#define __sanitizer_syscall_pre___fhstatvfs190(fhp, fh_size, buf, flags) \ + __sanitizer_syscall_pre_impl___fhstatvfs190( \ + (long long)(fhp), (long long)(fh_size), (long long)(buf), \ + (long long)(flags)) +#define __sanitizer_syscall_post___fhstatvfs190(res, fhp, fh_size, buf, flags) \ + __sanitizer_syscall_post_impl___fhstatvfs190( \ + res, (long long)(fhp), (long long)(fh_size), (long long)(buf), \ + (long long)(flags)) +#define __sanitizer_syscall_pre___acl_get_link(path, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_get_link( \ + (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_get_link(res, path, type, aclp) \ + __sanitizer_syscall_post_impl___acl_get_link( \ + res, (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_set_link(path, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_set_link( \ + (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_set_link(res, path, type, aclp) \ + __sanitizer_syscall_post_impl___acl_set_link( \ + res, (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_delete_link(path, type) \ + __sanitizer_syscall_pre_impl___acl_delete_link((long long)(path), \ + (long long)(type)) +#define __sanitizer_syscall_post___acl_delete_link(res, path, type) \ + __sanitizer_syscall_post_impl___acl_delete_link(res, (long long)(path), \ + (long long)(type)) +#define __sanitizer_syscall_pre___acl_aclcheck_link(path, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_aclcheck_link( \ + (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_aclcheck_link(res, path, type, aclp) \ + __sanitizer_syscall_post_impl___acl_aclcheck_link( \ + res, (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_get_file(path, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_get_file( \ + (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_get_file(res, path, type, aclp) \ + __sanitizer_syscall_post_impl___acl_get_file( \ + res, (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_set_file(path, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_set_file( \ + (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_set_file(res, path, type, aclp) \ + __sanitizer_syscall_post_impl___acl_set_file( \ + res, (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_get_fd(filedes, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_get_fd( \ + (long long)(filedes), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_get_fd(res, filedes, type, aclp) \ + __sanitizer_syscall_post_impl___acl_get_fd( \ + res, (long long)(filedes), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_set_fd(filedes, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_set_fd( \ + (long long)(filedes), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_set_fd(res, filedes, type, aclp) \ + __sanitizer_syscall_post_impl___acl_set_fd( \ + res, (long long)(filedes), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_delete_file(path, type) \ + __sanitizer_syscall_pre_impl___acl_delete_file((long long)(path), \ + (long long)(type)) +#define __sanitizer_syscall_post___acl_delete_file(res, path, type) \ + __sanitizer_syscall_post_impl___acl_delete_file(res, (long long)(path), \ + (long long)(type)) +#define __sanitizer_syscall_pre___acl_delete_fd(filedes, type) \ + __sanitizer_syscall_pre_impl___acl_delete_fd((long long)(filedes), \ + (long long)(type)) +#define __sanitizer_syscall_post___acl_delete_fd(res, filedes, type) \ + __sanitizer_syscall_post_impl___acl_delete_fd(res, (long long)(filedes), \ + (long long)(type)) +#define __sanitizer_syscall_pre___acl_aclcheck_file(path, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_aclcheck_file( \ + (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_aclcheck_file(res, path, type, aclp) \ + __sanitizer_syscall_post_impl___acl_aclcheck_file( \ + res, (long long)(path), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre___acl_aclcheck_fd(filedes, type, aclp) \ + __sanitizer_syscall_pre_impl___acl_aclcheck_fd( \ + (long long)(filedes), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_post___acl_aclcheck_fd(res, filedes, type, aclp) \ + __sanitizer_syscall_post_impl___acl_aclcheck_fd( \ + res, (long long)(filedes), (long long)(type), (long long)(aclp)) +#define __sanitizer_syscall_pre_lpathconf(path, name) \ + __sanitizer_syscall_pre_impl_lpathconf((long long)(path), (long long)(name)) +#define __sanitizer_syscall_post_lpathconf(res, path, name) \ + __sanitizer_syscall_post_impl_lpathconf(res, (long long)(path), \ + (long long)(name)) + +/* Compat with older releases */ +#define __sanitizer_syscall_pre_getvfsstat \ + __sanitizer_syscall_pre_compat_90_getvfsstat +#define __sanitizer_syscall_post_getvfsstat \ + __sanitizer_syscall_post_compat_90_getvfsstat + +#define __sanitizer_syscall_pre_statvfs1 \ + __sanitizer_syscall_pre_compat_90_statvfs1 +#define __sanitizer_syscall_post_statvfs1 \ + __sanitizer_syscall_post_compat_90_statvfs1 + +#define __sanitizer_syscall_pre_fstatvfs1 \ + __sanitizer_syscall_pre_compat_90_fstatvfs1 +#define __sanitizer_syscall_post_fstatvfs1 \ + __sanitizer_syscall_post_compat_90_fstatvfs1 + +#define __sanitizer_syscall_pre___fhstatvfs140 \ + __sanitizer_syscall_pre_compat_90_fhstatvfs1 +#define __sanitizer_syscall_post___fhstatvfs140 \ + __sanitizer_syscall_post_compat_90_fhstatvfs1 + +#ifdef __cplusplus +extern "C" { +#endif + +// Private declarations. Do not call directly from user code. Use macros above. + +// DO NOT EDIT! THIS FILE HAS BEEN GENERATED! + +void __sanitizer_syscall_pre_impl_syscall(long long code, long long arg0, + long long arg1, long long arg2, + long long arg3, long long arg4, + long long arg5, long long arg6, + long long arg7); +void __sanitizer_syscall_post_impl_syscall(long long res, long long code, + long long arg0, long long arg1, + long long arg2, long long arg3, + long long arg4, long long arg5, + long long arg6, long long arg7); +void __sanitizer_syscall_pre_impl_exit(long long rval); +void __sanitizer_syscall_post_impl_exit(long long res, long long rval); +void __sanitizer_syscall_pre_impl_fork(void); +void __sanitizer_syscall_post_impl_fork(long long res); +void __sanitizer_syscall_pre_impl_read(long long fd, long long buf, + long long nbyte); +void __sanitizer_syscall_post_impl_read(long long res, long long fd, + long long buf, long long nbyte); +void __sanitizer_syscall_pre_impl_write(long long fd, long long buf, + long long nbyte); +void __sanitizer_syscall_post_impl_write(long long res, long long fd, + long long buf, long long nbyte); +void __sanitizer_syscall_pre_impl_open(long long path, long long flags, + long long mode); +void __sanitizer_syscall_post_impl_open(long long res, long long path, + long long flags, long long mode); +void __sanitizer_syscall_pre_impl_close(long long fd); +void __sanitizer_syscall_post_impl_close(long long res, long long fd); +void __sanitizer_syscall_pre_impl_compat_50_wait4(long long pid, + long long status, + long long options, + long long rusage); +void __sanitizer_syscall_post_impl_compat_50_wait4(long long res, long long pid, + long long status, + long long options, + long long rusage); +void __sanitizer_syscall_pre_impl_compat_43_ocreat(long long path, + long long mode); +void __sanitizer_syscall_post_impl_compat_43_ocreat(long long res, + long long path, + long long mode); +void __sanitizer_syscall_pre_impl_link(long long path, long long link); +void __sanitizer_syscall_post_impl_link(long long res, long long path, + long long link); +void __sanitizer_syscall_pre_impl_unlink(long long path); +void __sanitizer_syscall_post_impl_unlink(long long res, long long path); +/* syscall 11 has been skipped */ +void __sanitizer_syscall_pre_impl_chdir(long long path); +void __sanitizer_syscall_post_impl_chdir(long long res, long long path); +void __sanitizer_syscall_pre_impl_fchdir(long long fd); +void __sanitizer_syscall_post_impl_fchdir(long long res, long long fd); +void __sanitizer_syscall_pre_impl_compat_50_mknod(long long path, + long long mode, + long long dev); +void __sanitizer_syscall_post_impl_compat_50_mknod(long long res, + long long path, + long long mode, + long long dev); +void __sanitizer_syscall_pre_impl_chmod(long long path, long long mode); +void __sanitizer_syscall_post_impl_chmod(long long res, long long path, + long long mode); +void __sanitizer_syscall_pre_impl_chown(long long path, long long uid, + long long gid); +void __sanitizer_syscall_post_impl_chown(long long res, long long path, + long long uid, long long gid); +void __sanitizer_syscall_pre_impl_break(long long nsize); +void __sanitizer_syscall_post_impl_break(long long res, long long nsize); +void __sanitizer_syscall_pre_impl_compat_20_getfsstat(long long buf, + long long bufsize, + long long flags); +void __sanitizer_syscall_post_impl_compat_20_getfsstat(long long res, + long long buf, + long long bufsize, + long long flags); +void __sanitizer_syscall_pre_impl_compat_43_olseek(long long fd, + long long offset, + long long whence); +void __sanitizer_syscall_post_impl_compat_43_olseek(long long res, long long fd, + long long offset, + long long whence); +void __sanitizer_syscall_pre_impl_getpid(void); +void __sanitizer_syscall_post_impl_getpid(long long res); +void __sanitizer_syscall_pre_impl_compat_40_mount(long long type, + long long path, + long long flags, + long long data); +void __sanitizer_syscall_post_impl_compat_40_mount(long long res, + long long type, + long long path, + long long flags, + long long data); +void __sanitizer_syscall_pre_impl_unmount(long long path, long long flags); +void __sanitizer_syscall_post_impl_unmount(long long res, long long path, + long long flags); +void __sanitizer_syscall_pre_impl_setuid(long long uid); +void __sanitizer_syscall_post_impl_setuid(long long res, long long uid); +void __sanitizer_syscall_pre_impl_getuid(void); +void __sanitizer_syscall_post_impl_getuid(long long res); +void __sanitizer_syscall_pre_impl_geteuid(void); +void __sanitizer_syscall_post_impl_geteuid(long long res); +void __sanitizer_syscall_pre_impl_ptrace(long long req, long long pid, + long long addr, long long data); +void __sanitizer_syscall_post_impl_ptrace(long long res, long long req, + long long pid, long long addr, + long long data); +void __sanitizer_syscall_pre_impl_recvmsg(long long s, long long msg, + long long flags); +void __sanitizer_syscall_post_impl_recvmsg(long long res, long long s, + long long msg, long long flags); +void __sanitizer_syscall_pre_impl_sendmsg(long long s, long long msg, + long long flags); +void __sanitizer_syscall_post_impl_sendmsg(long long res, long long s, + long long msg, long long flags); +void __sanitizer_syscall_pre_impl_recvfrom(long long s, long long buf, + long long len, long long flags, + long long from, + long long fromlenaddr); +void __sanitizer_syscall_post_impl_recvfrom(long long res, long long s, + long long buf, long long len, + long long flags, long long from, + long long fromlenaddr); +void __sanitizer_syscall_pre_impl_accept(long long s, long long name, + long long anamelen); +void __sanitizer_syscall_post_impl_accept(long long res, long long s, + long long name, long long anamelen); +void __sanitizer_syscall_pre_impl_getpeername(long long fdes, long long asa, + long long alen); +void __sanitizer_syscall_post_impl_getpeername(long long res, long long fdes, + long long asa, long long alen); +void __sanitizer_syscall_pre_impl_getsockname(long long fdes, long long asa, + long long alen); +void __sanitizer_syscall_post_impl_getsockname(long long res, long long fdes, + long long asa, long long alen); +void __sanitizer_syscall_pre_impl_access(long long path, long long flags); +void __sanitizer_syscall_post_impl_access(long long res, long long path, + long long flags); +void __sanitizer_syscall_pre_impl_chflags(long long path, long long flags); +void __sanitizer_syscall_post_impl_chflags(long long res, long long path, + long long flags); +void __sanitizer_syscall_pre_impl_fchflags(long long fd, long long flags); +void __sanitizer_syscall_post_impl_fchflags(long long res, long long fd, + long long flags); +void __sanitizer_syscall_pre_impl_sync(void); +void __sanitizer_syscall_post_impl_sync(long long res); +void __sanitizer_syscall_pre_impl_kill(long long pid, long long signum); +void __sanitizer_syscall_post_impl_kill(long long res, long long pid, + long long signum); +void __sanitizer_syscall_pre_impl_compat_43_stat43(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_43_stat43(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl_getppid(void); +void __sanitizer_syscall_post_impl_getppid(long long res); +void __sanitizer_syscall_pre_impl_compat_43_lstat43(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_43_lstat43(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl_dup(long long fd); +void __sanitizer_syscall_post_impl_dup(long long res, long long fd); +void __sanitizer_syscall_pre_impl_pipe(void); +void __sanitizer_syscall_post_impl_pipe(long long res); +void __sanitizer_syscall_pre_impl_getegid(void); +void __sanitizer_syscall_post_impl_getegid(long long res); +void __sanitizer_syscall_pre_impl_profil(long long samples, long long size, + long long offset, long long scale); +void __sanitizer_syscall_post_impl_profil(long long res, long long samples, + long long size, long long offset, + long long scale); +void __sanitizer_syscall_pre_impl_ktrace(long long fname, long long ops, + long long facs, long long pid); +void __sanitizer_syscall_post_impl_ktrace(long long res, long long fname, + long long ops, long long facs, + long long pid); +void __sanitizer_syscall_pre_impl_compat_13_sigaction13(long long signum, + long long nsa, + long long osa); +void __sanitizer_syscall_post_impl_compat_13_sigaction13(long long res, + long long signum, + long long nsa, + long long osa); +void __sanitizer_syscall_pre_impl_getgid(void); +void __sanitizer_syscall_post_impl_getgid(long long res); +void __sanitizer_syscall_pre_impl_compat_13_sigprocmask13(long long how, + long long mask); +void __sanitizer_syscall_post_impl_compat_13_sigprocmask13(long long res, + long long how, + long long mask); +void __sanitizer_syscall_pre_impl___getlogin(long long namebuf, + long long namelen); +void __sanitizer_syscall_post_impl___getlogin(long long res, long long namebuf, + long long namelen); +void __sanitizer_syscall_pre_impl___setlogin(long long namebuf); +void __sanitizer_syscall_post_impl___setlogin(long long res, long long namebuf); +void __sanitizer_syscall_pre_impl_acct(long long path); +void __sanitizer_syscall_post_impl_acct(long long res, long long path); +void __sanitizer_syscall_pre_impl_compat_13_sigpending13(void); +void __sanitizer_syscall_post_impl_compat_13_sigpending13(long long res); +void __sanitizer_syscall_pre_impl_compat_13_sigaltstack13(long long nss, + long long oss); +void __sanitizer_syscall_post_impl_compat_13_sigaltstack13(long long res, + long long nss, + long long oss); +void __sanitizer_syscall_pre_impl_ioctl(long long fd, long long com, + long long data); +void __sanitizer_syscall_post_impl_ioctl(long long res, long long fd, + long long com, long long data); +void __sanitizer_syscall_pre_impl_compat_12_oreboot(long long opt); +void __sanitizer_syscall_post_impl_compat_12_oreboot(long long res, + long long opt); +void __sanitizer_syscall_pre_impl_revoke(long long path); +void __sanitizer_syscall_post_impl_revoke(long long res, long long path); +void __sanitizer_syscall_pre_impl_symlink(long long path, long long link); +void __sanitizer_syscall_post_impl_symlink(long long res, long long path, + long long link); +void __sanitizer_syscall_pre_impl_readlink(long long path, long long buf, + long long count); +void __sanitizer_syscall_post_impl_readlink(long long res, long long path, + long long buf, long long count); +void __sanitizer_syscall_pre_impl_execve(long long path, long long argp, + long long envp); +void __sanitizer_syscall_post_impl_execve(long long res, long long path, + long long argp, long long envp); +void __sanitizer_syscall_pre_impl_umask(long long newmask); +void __sanitizer_syscall_post_impl_umask(long long res, long long newmask); +void __sanitizer_syscall_pre_impl_chroot(long long path); +void __sanitizer_syscall_post_impl_chroot(long long res, long long path); +void __sanitizer_syscall_pre_impl_compat_43_fstat43(long long fd, long long sb); +void __sanitizer_syscall_post_impl_compat_43_fstat43(long long res, + long long fd, + long long sb); +void __sanitizer_syscall_pre_impl_compat_43_ogetkerninfo(long long op, + long long where, + long long size, + long long arg); +void __sanitizer_syscall_post_impl_compat_43_ogetkerninfo(long long res, + long long op, + long long where, + long long size, + long long arg); +void __sanitizer_syscall_pre_impl_compat_43_ogetpagesize(void); +void __sanitizer_syscall_post_impl_compat_43_ogetpagesize(long long res); +void __sanitizer_syscall_pre_impl_compat_12_msync(long long addr, + long long len); +void __sanitizer_syscall_post_impl_compat_12_msync(long long res, + long long addr, + long long len); +void __sanitizer_syscall_pre_impl_vfork(void); +void __sanitizer_syscall_post_impl_vfork(long long res); +/* syscall 67 has been skipped */ +/* syscall 68 has been skipped */ +/* syscall 69 has been skipped */ +/* syscall 70 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_43_ommap(long long addr, long long len, + long long prot, + long long flags, long long fd, + long long pos); +void __sanitizer_syscall_post_impl_compat_43_ommap( + long long res, long long addr, long long len, long long prot, + long long flags, long long fd, long long pos); +void __sanitizer_syscall_pre_impl_vadvise(long long anom); +void __sanitizer_syscall_post_impl_vadvise(long long res, long long anom); +void __sanitizer_syscall_pre_impl_munmap(long long addr, long long len); +void __sanitizer_syscall_post_impl_munmap(long long res, long long addr, + long long len); +void __sanitizer_syscall_pre_impl_mprotect(long long addr, long long len, + long long prot); +void __sanitizer_syscall_post_impl_mprotect(long long res, long long addr, + long long len, long long prot); +void __sanitizer_syscall_pre_impl_madvise(long long addr, long long len, + long long behav); +void __sanitizer_syscall_post_impl_madvise(long long res, long long addr, + long long len, long long behav); +/* syscall 76 has been skipped */ +/* syscall 77 has been skipped */ +void __sanitizer_syscall_pre_impl_mincore(long long addr, long long len, + long long vec); +void __sanitizer_syscall_post_impl_mincore(long long res, long long addr, + long long len, long long vec); +void __sanitizer_syscall_pre_impl_getgroups(long long gidsetsize, + long long gidset); +void __sanitizer_syscall_post_impl_getgroups(long long res, + long long gidsetsize, + long long gidset); +void __sanitizer_syscall_pre_impl_setgroups(long long gidsetsize, + long long gidset); +void __sanitizer_syscall_post_impl_setgroups(long long res, + long long gidsetsize, + long long gidset); +void __sanitizer_syscall_pre_impl_getpgrp(void); +void __sanitizer_syscall_post_impl_getpgrp(long long res); +void __sanitizer_syscall_pre_impl_setpgid(long long pid, long long pgid); +void __sanitizer_syscall_post_impl_setpgid(long long res, long long pid, + long long pgid); +void __sanitizer_syscall_pre_impl_compat_50_setitimer(long long which, + long long itv, + long long oitv); +void __sanitizer_syscall_post_impl_compat_50_setitimer(long long res, + long long which, + long long itv, + long long oitv); +void __sanitizer_syscall_pre_impl_compat_43_owait(void); +void __sanitizer_syscall_post_impl_compat_43_owait(long long res); +void __sanitizer_syscall_pre_impl_compat_12_oswapon(long long name); +void __sanitizer_syscall_post_impl_compat_12_oswapon(long long res, + long long name); +void __sanitizer_syscall_pre_impl_compat_50_getitimer(long long which, + long long itv); +void __sanitizer_syscall_post_impl_compat_50_getitimer(long long res, + long long which, + long long itv); +void __sanitizer_syscall_pre_impl_compat_43_ogethostname(long long hostname, + long long len); +void __sanitizer_syscall_post_impl_compat_43_ogethostname(long long res, + long long hostname, + long long len); +void __sanitizer_syscall_pre_impl_compat_43_osethostname(long long hostname, + long long len); +void __sanitizer_syscall_post_impl_compat_43_osethostname(long long res, + long long hostname, + long long len); +void __sanitizer_syscall_pre_impl_compat_43_ogetdtablesize(void); +void __sanitizer_syscall_post_impl_compat_43_ogetdtablesize(long long res); +void __sanitizer_syscall_pre_impl_dup2(long long from, long long to); +void __sanitizer_syscall_post_impl_dup2(long long res, long long from, + long long to); +void __sanitizer_syscall_pre_impl_getrandom(long long buf, long long buflen, + long long flags); +void __sanitizer_syscall_post_impl_getrandom(long long res, long long buf, + long long buflen, long long flags); +void __sanitizer_syscall_pre_impl_fcntl(long long fd, long long cmd, + long long arg); +void __sanitizer_syscall_post_impl_fcntl(long long res, long long fd, + long long cmd, long long arg); +void __sanitizer_syscall_pre_impl_compat_50_select(long long nd, long long in, + long long ou, long long ex, + long long tv); +void __sanitizer_syscall_post_impl_compat_50_select(long long res, long long nd, + long long in, long long ou, + long long ex, long long tv); +/* syscall 94 has been skipped */ +void __sanitizer_syscall_pre_impl_fsync(long long fd); +void __sanitizer_syscall_post_impl_fsync(long long res, long long fd); +void __sanitizer_syscall_pre_impl_setpriority(long long which, long long who, + long long prio); +void __sanitizer_syscall_post_impl_setpriority(long long res, long long which, + long long who, long long prio); +void __sanitizer_syscall_pre_impl_compat_30_socket(long long domain, + long long type, + long long protocol); +void __sanitizer_syscall_post_impl_compat_30_socket(long long res, + long long domain, + long long type, + long long protocol); +void __sanitizer_syscall_pre_impl_connect(long long s, long long name, + long long namelen); +void __sanitizer_syscall_post_impl_connect(long long res, long long s, + long long name, long long namelen); +void __sanitizer_syscall_pre_impl_compat_43_oaccept(long long s, long long name, + long long anamelen); +void __sanitizer_syscall_post_impl_compat_43_oaccept(long long res, long long s, + long long name, + long long anamelen); +void __sanitizer_syscall_pre_impl_getpriority(long long which, long long who); +void __sanitizer_syscall_post_impl_getpriority(long long res, long long which, + long long who); +void __sanitizer_syscall_pre_impl_compat_43_osend(long long s, long long buf, + long long len, + long long flags); +void __sanitizer_syscall_post_impl_compat_43_osend(long long res, long long s, + long long buf, long long len, + long long flags); +void __sanitizer_syscall_pre_impl_compat_43_orecv(long long s, long long buf, + long long len, + long long flags); +void __sanitizer_syscall_post_impl_compat_43_orecv(long long res, long long s, + long long buf, long long len, + long long flags); +void __sanitizer_syscall_pre_impl_compat_13_sigreturn13(long long sigcntxp); +void __sanitizer_syscall_post_impl_compat_13_sigreturn13(long long res, + long long sigcntxp); +void __sanitizer_syscall_pre_impl_bind(long long s, long long name, + long long namelen); +void __sanitizer_syscall_post_impl_bind(long long res, long long s, + long long name, long long namelen); +void __sanitizer_syscall_pre_impl_setsockopt(long long s, long long level, + long long name, long long val, + long long valsize); +void __sanitizer_syscall_post_impl_setsockopt(long long res, long long s, + long long level, long long name, + long long val, long long valsize); +void __sanitizer_syscall_pre_impl_listen(long long s, long long backlog); +void __sanitizer_syscall_post_impl_listen(long long res, long long s, + long long backlog); +/* syscall 107 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_43_osigvec(long long signum, + long long nsv, + long long osv); +void __sanitizer_syscall_post_impl_compat_43_osigvec(long long res, + long long signum, + long long nsv, + long long osv); +void __sanitizer_syscall_pre_impl_compat_43_osigblock(long long mask); +void __sanitizer_syscall_post_impl_compat_43_osigblock(long long res, + long long mask); +void __sanitizer_syscall_pre_impl_compat_43_osigsetmask(long long mask); +void __sanitizer_syscall_post_impl_compat_43_osigsetmask(long long res, + long long mask); +void __sanitizer_syscall_pre_impl_compat_13_sigsuspend13(long long mask); +void __sanitizer_syscall_post_impl_compat_13_sigsuspend13(long long res, + long long mask); +void __sanitizer_syscall_pre_impl_compat_43_osigstack(long long nss, + long long oss); +void __sanitizer_syscall_post_impl_compat_43_osigstack(long long res, + long long nss, + long long oss); +void __sanitizer_syscall_pre_impl_compat_43_orecvmsg(long long s, long long msg, + long long flags); +void __sanitizer_syscall_post_impl_compat_43_orecvmsg(long long res, + long long s, + long long msg, + long long flags); +void __sanitizer_syscall_pre_impl_compat_43_osendmsg(long long s, long long msg, + long long flags); +void __sanitizer_syscall_post_impl_compat_43_osendmsg(long long res, + long long s, + long long msg, + long long flags); +/* syscall 115 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_50_gettimeofday(long long tp, + long long tzp); +void __sanitizer_syscall_post_impl_compat_50_gettimeofday(long long res, + long long tp, + long long tzp); +void __sanitizer_syscall_pre_impl_compat_50_getrusage(long long who, + long long rusage); +void __sanitizer_syscall_post_impl_compat_50_getrusage(long long res, + long long who, + long long rusage); +void __sanitizer_syscall_pre_impl_getsockopt(long long s, long long level, + long long name, long long val, + long long avalsize); +void __sanitizer_syscall_post_impl_getsockopt(long long res, long long s, + long long level, long long name, + long long val, + long long avalsize); +/* syscall 119 has been skipped */ +void __sanitizer_syscall_pre_impl_readv(long long fd, long long iovp, + long long iovcnt); +void __sanitizer_syscall_post_impl_readv(long long res, long long fd, + long long iovp, long long iovcnt); +void __sanitizer_syscall_pre_impl_writev(long long fd, long long iovp, + long long iovcnt); +void __sanitizer_syscall_post_impl_writev(long long res, long long fd, + long long iovp, long long iovcnt); +void __sanitizer_syscall_pre_impl_compat_50_settimeofday(long long tv, + long long tzp); +void __sanitizer_syscall_post_impl_compat_50_settimeofday(long long res, + long long tv, + long long tzp); +void __sanitizer_syscall_pre_impl_fchown(long long fd, long long uid, + long long gid); +void __sanitizer_syscall_post_impl_fchown(long long res, long long fd, + long long uid, long long gid); +void __sanitizer_syscall_pre_impl_fchmod(long long fd, long long mode); +void __sanitizer_syscall_post_impl_fchmod(long long res, long long fd, + long long mode); +void __sanitizer_syscall_pre_impl_compat_43_orecvfrom( + long long s, long long buf, long long len, long long flags, long long from, + long long fromlenaddr); +void __sanitizer_syscall_post_impl_compat_43_orecvfrom( + long long res, long long s, long long buf, long long len, long long flags, + long long from, long long fromlenaddr); +void __sanitizer_syscall_pre_impl_setreuid(long long ruid, long long euid); +void __sanitizer_syscall_post_impl_setreuid(long long res, long long ruid, + long long euid); +void __sanitizer_syscall_pre_impl_setregid(long long rgid, long long egid); +void __sanitizer_syscall_post_impl_setregid(long long res, long long rgid, + long long egid); +void __sanitizer_syscall_pre_impl_rename(long long from, long long to); +void __sanitizer_syscall_post_impl_rename(long long res, long long from, + long long to); +void __sanitizer_syscall_pre_impl_compat_43_otruncate(long long path, + long long length); +void __sanitizer_syscall_post_impl_compat_43_otruncate(long long res, + long long path, + long long length); +void __sanitizer_syscall_pre_impl_compat_43_oftruncate(long long fd, + long long length); +void __sanitizer_syscall_post_impl_compat_43_oftruncate(long long res, + long long fd, + long long length); +void __sanitizer_syscall_pre_impl_flock(long long fd, long long how); +void __sanitizer_syscall_post_impl_flock(long long res, long long fd, + long long how); +void __sanitizer_syscall_pre_impl_mkfifo(long long path, long long mode); +void __sanitizer_syscall_post_impl_mkfifo(long long res, long long path, + long long mode); +void __sanitizer_syscall_pre_impl_sendto(long long s, long long buf, + long long len, long long flags, + long long to, long long tolen); +void __sanitizer_syscall_post_impl_sendto(long long res, long long s, + long long buf, long long len, + long long flags, long long to, + long long tolen); +void __sanitizer_syscall_pre_impl_shutdown(long long s, long long how); +void __sanitizer_syscall_post_impl_shutdown(long long res, long long s, + long long how); +void __sanitizer_syscall_pre_impl_socketpair(long long domain, long long type, + long long protocol, long long rsv); +void __sanitizer_syscall_post_impl_socketpair(long long res, long long domain, + long long type, + long long protocol, + long long rsv); +void __sanitizer_syscall_pre_impl_mkdir(long long path, long long mode); +void __sanitizer_syscall_post_impl_mkdir(long long res, long long path, + long long mode); +void __sanitizer_syscall_pre_impl_rmdir(long long path); +void __sanitizer_syscall_post_impl_rmdir(long long res, long long path); +void __sanitizer_syscall_pre_impl_compat_50_utimes(long long path, + long long tptr); +void __sanitizer_syscall_post_impl_compat_50_utimes(long long res, + long long path, + long long tptr); +/* syscall 139 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_50_adjtime(long long delta, + long long olddelta); +void __sanitizer_syscall_post_impl_compat_50_adjtime(long long res, + long long delta, + long long olddelta); +void __sanitizer_syscall_pre_impl_compat_43_ogetpeername(long long fdes, + long long asa, + long long alen); +void __sanitizer_syscall_post_impl_compat_43_ogetpeername(long long res, + long long fdes, + long long asa, + long long alen); +void __sanitizer_syscall_pre_impl_compat_43_ogethostid(void); +void __sanitizer_syscall_post_impl_compat_43_ogethostid(long long res); +void __sanitizer_syscall_pre_impl_compat_43_osethostid(long long hostid); +void __sanitizer_syscall_post_impl_compat_43_osethostid(long long res, + long long hostid); +void __sanitizer_syscall_pre_impl_compat_43_ogetrlimit(long long which, + long long rlp); +void __sanitizer_syscall_post_impl_compat_43_ogetrlimit(long long res, + long long which, + long long rlp); +void __sanitizer_syscall_pre_impl_compat_43_osetrlimit(long long which, + long long rlp); +void __sanitizer_syscall_post_impl_compat_43_osetrlimit(long long res, + long long which, + long long rlp); +void __sanitizer_syscall_pre_impl_compat_43_okillpg(long long pgid, + long long signum); +void __sanitizer_syscall_post_impl_compat_43_okillpg(long long res, + long long pgid, + long long signum); +void __sanitizer_syscall_pre_impl_setsid(void); +void __sanitizer_syscall_post_impl_setsid(long long res); +void __sanitizer_syscall_pre_impl_compat_50_quotactl(long long path, + long long cmd, + long long uid, + long long arg); +void __sanitizer_syscall_post_impl_compat_50_quotactl( + long long res, long long path, long long cmd, long long uid, long long arg); +void __sanitizer_syscall_pre_impl_compat_43_oquota(void); +void __sanitizer_syscall_post_impl_compat_43_oquota(long long res); +void __sanitizer_syscall_pre_impl_compat_43_ogetsockname(long long fdec, + long long asa, + long long alen); +void __sanitizer_syscall_post_impl_compat_43_ogetsockname(long long res, + long long fdec, + long long asa, + long long alen); +/* syscall 151 has been skipped */ +/* syscall 152 has been skipped */ +/* syscall 153 has been skipped */ +/* syscall 154 has been skipped */ +void __sanitizer_syscall_pre_impl_nfssvc(long long flag, long long argp); +void __sanitizer_syscall_post_impl_nfssvc(long long res, long long flag, + long long argp); +void __sanitizer_syscall_pre_impl_compat_43_ogetdirentries(long long fd, + long long buf, + long long count, + long long basep); +void __sanitizer_syscall_post_impl_compat_43_ogetdirentries(long long res, + long long fd, + long long buf, + long long count, + long long basep); +void __sanitizer_syscall_pre_impl_compat_20_statfs(long long path, + long long buf); +void __sanitizer_syscall_post_impl_compat_20_statfs(long long res, + long long path, + long long buf); +void __sanitizer_syscall_pre_impl_compat_20_fstatfs(long long fd, + long long buf); +void __sanitizer_syscall_post_impl_compat_20_fstatfs(long long res, + long long fd, + long long buf); +/* syscall 159 has been skipped */ +/* syscall 160 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_30_getfh(long long fname, + long long fhp); +void __sanitizer_syscall_post_impl_compat_30_getfh(long long res, + long long fname, + long long fhp); +void __sanitizer_syscall_pre_impl_compat_09_ogetdomainname(long long domainname, + long long len); +void __sanitizer_syscall_post_impl_compat_09_ogetdomainname( + long long res, long long domainname, long long len); +void __sanitizer_syscall_pre_impl_compat_09_osetdomainname(long long domainname, + long long len); +void __sanitizer_syscall_post_impl_compat_09_osetdomainname( + long long res, long long domainname, long long len); +void __sanitizer_syscall_pre_impl_compat_09_ouname(long long name); +void __sanitizer_syscall_post_impl_compat_09_ouname(long long res, + long long name); +void __sanitizer_syscall_pre_impl_sysarch(long long op, long long parms); +void __sanitizer_syscall_post_impl_sysarch(long long res, long long op, + long long parms); +void __sanitizer_syscall_pre_impl___futex(long long uaddr, long long op, + long long val, long long timeout, + long long uaddr2, long long val2, + long long val3); +void __sanitizer_syscall_post_impl___futex(long long res, long long uaddr, + long long op, long long val, + long long timeout, long long uaddr2, + long long val2, long long val3); +void __sanitizer_syscall_pre_impl___futex_set_robust_list(long long head, + long long len); +void __sanitizer_syscall_post_impl___futex_set_robust_list(long long res, + long long head, + long long len); +void __sanitizer_syscall_pre_impl___futex_get_robust_list(long long lwpid, + long long headp, + long long lenp); +void __sanitizer_syscall_post_impl___futex_get_robust_list(long long res, + long long lwpid, + long long headp, + long long lenp); +#if !defined(_LP64) +void __sanitizer_syscall_pre_impl_compat_10_osemsys(long long which, + long long a2, long long a3, + long long a4, long long a5); +void __sanitizer_syscall_post_impl_compat_10_osemsys(long long res, + long long which, + long long a2, long long a3, + long long a4, + long long a5); +#else +/* syscall 169 has been skipped */ +#endif +#if !defined(_LP64) +void __sanitizer_syscall_pre_impl_compat_10_omsgsys(long long which, + long long a2, long long a3, + long long a4, long long a5, + long long a6); +void __sanitizer_syscall_post_impl_compat_10_omsgsys(long long res, + long long which, + long long a2, long long a3, + long long a4, long long a5, + long long a6); +#else +/* syscall 170 has been skipped */ +#endif +#if !defined(_LP64) +void __sanitizer_syscall_pre_impl_compat_10_oshmsys(long long which, + long long a2, long long a3, + long long a4); +void __sanitizer_syscall_post_impl_compat_10_oshmsys(long long res, + long long which, + long long a2, long long a3, + long long a4); +#else +/* syscall 171 has been skipped */ +#endif +/* syscall 172 has been skipped */ +void __sanitizer_syscall_pre_impl_pread(long long fd, long long buf, + long long nbyte, long long PAD, + long long offset); +void __sanitizer_syscall_post_impl_pread(long long res, long long fd, + long long buf, long long nbyte, + long long PAD, long long offset); +void __sanitizer_syscall_pre_impl_pwrite(long long fd, long long buf, + long long nbyte, long long PAD, + long long offset); +void __sanitizer_syscall_post_impl_pwrite(long long res, long long fd, + long long buf, long long nbyte, + long long PAD, long long offset); +void __sanitizer_syscall_pre_impl_compat_30_ntp_gettime(long long ntvp); +void __sanitizer_syscall_post_impl_compat_30_ntp_gettime(long long res, + long long ntvp); +#if defined(NTP) || !defined(_KERNEL_OPT) +void __sanitizer_syscall_pre_impl_ntp_adjtime(long long tp); +void __sanitizer_syscall_post_impl_ntp_adjtime(long long res, long long tp); +#else +/* syscall 176 has been skipped */ +#endif +/* syscall 177 has been skipped */ +/* syscall 178 has been skipped */ +/* syscall 179 has been skipped */ +/* syscall 180 has been skipped */ +void __sanitizer_syscall_pre_impl_setgid(long long gid); +void __sanitizer_syscall_post_impl_setgid(long long res, long long gid); +void __sanitizer_syscall_pre_impl_setegid(long long egid); +void __sanitizer_syscall_post_impl_setegid(long long res, long long egid); +void __sanitizer_syscall_pre_impl_seteuid(long long euid); +void __sanitizer_syscall_post_impl_seteuid(long long res, long long euid); +void __sanitizer_syscall_pre_impl_lfs_bmapv(long long fsidp, long long blkiov, + long long blkcnt); +void __sanitizer_syscall_post_impl_lfs_bmapv(long long res, long long fsidp, + long long blkiov, + long long blkcnt); +void __sanitizer_syscall_pre_impl_lfs_markv(long long fsidp, long long blkiov, + long long blkcnt); +void __sanitizer_syscall_post_impl_lfs_markv(long long res, long long fsidp, + long long blkiov, + long long blkcnt); +void __sanitizer_syscall_pre_impl_lfs_segclean(long long fsidp, + long long segment); +void __sanitizer_syscall_post_impl_lfs_segclean(long long res, long long fsidp, + long long segment); +void __sanitizer_syscall_pre_impl_compat_50_lfs_segwait(long long fsidp, + long long tv); +void __sanitizer_syscall_post_impl_compat_50_lfs_segwait(long long res, + long long fsidp, + long long tv); +void __sanitizer_syscall_pre_impl_compat_12_stat12(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_12_stat12(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl_compat_12_fstat12(long long fd, long long sb); +void __sanitizer_syscall_post_impl_compat_12_fstat12(long long res, + long long fd, + long long sb); +void __sanitizer_syscall_pre_impl_compat_12_lstat12(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_12_lstat12(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl_pathconf(long long path, long long name); +void __sanitizer_syscall_post_impl_pathconf(long long res, long long path, + long long name); +void __sanitizer_syscall_pre_impl_fpathconf(long long fd, long long name); +void __sanitizer_syscall_post_impl_fpathconf(long long res, long long fd, + long long name); +void __sanitizer_syscall_pre_impl_getsockopt2(long long s, long long level, + long long name, long long val, + long long avalsize); +void __sanitizer_syscall_post_impl_getsockopt2(long long res, long long s, + long long level, long long name, + long long val, + long long avalsize); +void __sanitizer_syscall_pre_impl_getrlimit(long long which, long long rlp); +void __sanitizer_syscall_post_impl_getrlimit(long long res, long long which, + long long rlp); +void __sanitizer_syscall_pre_impl_setrlimit(long long which, long long rlp); +void __sanitizer_syscall_post_impl_setrlimit(long long res, long long which, + long long rlp); +void __sanitizer_syscall_pre_impl_compat_12_getdirentries(long long fd, + long long buf, + long long count, + long long basep); +void __sanitizer_syscall_post_impl_compat_12_getdirentries(long long res, + long long fd, + long long buf, + long long count, + long long basep); +void __sanitizer_syscall_pre_impl_mmap(long long addr, long long len, + long long prot, long long flags, + long long fd, long long PAD, + long long pos); +void __sanitizer_syscall_post_impl_mmap(long long res, long long addr, + long long len, long long prot, + long long flags, long long fd, + long long PAD, long long pos); +void __sanitizer_syscall_pre_impl___syscall(long long code, long long arg0, + long long arg1, long long arg2, + long long arg3, long long arg4, + long long arg5, long long arg6, + long long arg7); +void __sanitizer_syscall_post_impl___syscall(long long res, long long code, + long long arg0, long long arg1, + long long arg2, long long arg3, + long long arg4, long long arg5, + long long arg6, long long arg7); +void __sanitizer_syscall_pre_impl_lseek(long long fd, long long PAD, + long long offset, long long whence); +void __sanitizer_syscall_post_impl_lseek(long long res, long long fd, + long long PAD, long long offset, + long long whence); +void __sanitizer_syscall_pre_impl_truncate(long long path, long long PAD, + long long length); +void __sanitizer_syscall_post_impl_truncate(long long res, long long path, + long long PAD, long long length); +void __sanitizer_syscall_pre_impl_ftruncate(long long fd, long long PAD, + long long length); +void __sanitizer_syscall_post_impl_ftruncate(long long res, long long fd, + long long PAD, long long length); +void __sanitizer_syscall_pre_impl___sysctl(long long name, long long namelen, + long long oldv, long long oldlenp, + long long newv, long long newlen); +void __sanitizer_syscall_post_impl___sysctl(long long res, long long name, + long long namelen, long long oldv, + long long oldlenp, long long newv, + long long newlen); +void __sanitizer_syscall_pre_impl_mlock(long long addr, long long len); +void __sanitizer_syscall_post_impl_mlock(long long res, long long addr, + long long len); +void __sanitizer_syscall_pre_impl_munlock(long long addr, long long len); +void __sanitizer_syscall_post_impl_munlock(long long res, long long addr, + long long len); +void __sanitizer_syscall_pre_impl_undelete(long long path); +void __sanitizer_syscall_post_impl_undelete(long long res, long long path); +void __sanitizer_syscall_pre_impl_compat_50_futimes(long long fd, + long long tptr); +void __sanitizer_syscall_post_impl_compat_50_futimes(long long res, + long long fd, + long long tptr); +void __sanitizer_syscall_pre_impl_getpgid(long long pid); +void __sanitizer_syscall_post_impl_getpgid(long long res, long long pid); +void __sanitizer_syscall_pre_impl_reboot(long long opt, long long bootstr); +void __sanitizer_syscall_post_impl_reboot(long long res, long long opt, + long long bootstr); +void __sanitizer_syscall_pre_impl_poll(long long fds, long long nfds, + long long timeout); +void __sanitizer_syscall_post_impl_poll(long long res, long long fds, + long long nfds, long long timeout); +void __sanitizer_syscall_pre_impl_afssys(long long id, long long a1, + long long a2, long long a3, + long long a4, long long a5, + long long a6); +void __sanitizer_syscall_post_impl_afssys(long long res, long long id, + long long a1, long long a2, + long long a3, long long a4, + long long a5, long long a6); +/* syscall 211 has been skipped */ +/* syscall 212 has been skipped */ +/* syscall 213 has been skipped */ +/* syscall 214 has been skipped */ +/* syscall 215 has been skipped */ +/* syscall 216 has been skipped */ +/* syscall 217 has been skipped */ +/* syscall 218 has been skipped */ +/* syscall 219 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_14___semctl(long long semid, + long long semnum, + long long cmd, + long long arg); +void __sanitizer_syscall_post_impl_compat_14___semctl(long long res, + long long semid, + long long semnum, + long long cmd, + long long arg); +void __sanitizer_syscall_pre_impl_semget(long long key, long long nsems, + long long semflg); +void __sanitizer_syscall_post_impl_semget(long long res, long long key, + long long nsems, long long semflg); +void __sanitizer_syscall_pre_impl_semop(long long semid, long long sops, + long long nsops); +void __sanitizer_syscall_post_impl_semop(long long res, long long semid, + long long sops, long long nsops); +void __sanitizer_syscall_pre_impl_semconfig(long long flag); +void __sanitizer_syscall_post_impl_semconfig(long long res, long long flag); +void __sanitizer_syscall_pre_impl_compat_14_msgctl(long long msqid, + long long cmd, + long long buf); +void __sanitizer_syscall_post_impl_compat_14_msgctl(long long res, + long long msqid, + long long cmd, + long long buf); +void __sanitizer_syscall_pre_impl_msgget(long long key, long long msgflg); +void __sanitizer_syscall_post_impl_msgget(long long res, long long key, + long long msgflg); +void __sanitizer_syscall_pre_impl_msgsnd(long long msqid, long long msgp, + long long msgsz, long long msgflg); +void __sanitizer_syscall_post_impl_msgsnd(long long res, long long msqid, + long long msgp, long long msgsz, + long long msgflg); +void __sanitizer_syscall_pre_impl_msgrcv(long long msqid, long long msgp, + long long msgsz, long long msgtyp, + long long msgflg); +void __sanitizer_syscall_post_impl_msgrcv(long long res, long long msqid, + long long msgp, long long msgsz, + long long msgtyp, long long msgflg); +void __sanitizer_syscall_pre_impl_shmat(long long shmid, long long shmaddr, + long long shmflg); +void __sanitizer_syscall_post_impl_shmat(long long res, long long shmid, + long long shmaddr, long long shmflg); +void __sanitizer_syscall_pre_impl_compat_14_shmctl(long long shmid, + long long cmd, + long long buf); +void __sanitizer_syscall_post_impl_compat_14_shmctl(long long res, + long long shmid, + long long cmd, + long long buf); +void __sanitizer_syscall_pre_impl_shmdt(long long shmaddr); +void __sanitizer_syscall_post_impl_shmdt(long long res, long long shmaddr); +void __sanitizer_syscall_pre_impl_shmget(long long key, long long size, + long long shmflg); +void __sanitizer_syscall_post_impl_shmget(long long res, long long key, + long long size, long long shmflg); +void __sanitizer_syscall_pre_impl_compat_50_clock_gettime(long long clock_id, + long long tp); +void __sanitizer_syscall_post_impl_compat_50_clock_gettime(long long res, + long long clock_id, + long long tp); +void __sanitizer_syscall_pre_impl_compat_50_clock_settime(long long clock_id, + long long tp); +void __sanitizer_syscall_post_impl_compat_50_clock_settime(long long res, + long long clock_id, + long long tp); +void __sanitizer_syscall_pre_impl_compat_50_clock_getres(long long clock_id, + long long tp); +void __sanitizer_syscall_post_impl_compat_50_clock_getres(long long res, + long long clock_id, + long long tp); +void __sanitizer_syscall_pre_impl_timer_create(long long clock_id, + long long evp, + long long timerid); +void __sanitizer_syscall_post_impl_timer_create(long long res, + long long clock_id, + long long evp, + long long timerid); +void __sanitizer_syscall_pre_impl_timer_delete(long long timerid); +void __sanitizer_syscall_post_impl_timer_delete(long long res, + long long timerid); +void __sanitizer_syscall_pre_impl_compat_50_timer_settime(long long timerid, + long long flags, + long long value, + long long ovalue); +void __sanitizer_syscall_post_impl_compat_50_timer_settime(long long res, + long long timerid, + long long flags, + long long value, + long long ovalue); +void __sanitizer_syscall_pre_impl_compat_50_timer_gettime(long long timerid, + long long value); +void __sanitizer_syscall_post_impl_compat_50_timer_gettime(long long res, + long long timerid, + long long value); +void __sanitizer_syscall_pre_impl_timer_getoverrun(long long timerid); +void __sanitizer_syscall_post_impl_timer_getoverrun(long long res, + long long timerid); +void __sanitizer_syscall_pre_impl_compat_50_nanosleep(long long rqtp, + long long rmtp); +void __sanitizer_syscall_post_impl_compat_50_nanosleep(long long res, + long long rqtp, + long long rmtp); +void __sanitizer_syscall_pre_impl_fdatasync(long long fd); +void __sanitizer_syscall_post_impl_fdatasync(long long res, long long fd); +void __sanitizer_syscall_pre_impl_mlockall(long long flags); +void __sanitizer_syscall_post_impl_mlockall(long long res, long long flags); +void __sanitizer_syscall_pre_impl_munlockall(void); +void __sanitizer_syscall_post_impl_munlockall(long long res); +void __sanitizer_syscall_pre_impl_compat_50___sigtimedwait(long long set, + long long info, + long long timeout); +void __sanitizer_syscall_post_impl_compat_50___sigtimedwait(long long res, + long long set, + long long info, + long long timeout); +void __sanitizer_syscall_pre_impl_sigqueueinfo(long long pid, long long info); +void __sanitizer_syscall_post_impl_sigqueueinfo(long long res, long long pid, + long long info); +void __sanitizer_syscall_pre_impl_modctl(long long cmd, long long arg); +void __sanitizer_syscall_post_impl_modctl(long long res, long long cmd, + long long arg); +void __sanitizer_syscall_pre_impl__ksem_init(long long value, long long idp); +void __sanitizer_syscall_post_impl__ksem_init(long long res, long long value, + long long idp); +void __sanitizer_syscall_pre_impl__ksem_open(long long name, long long oflag, + long long mode, long long value, + long long idp); +void __sanitizer_syscall_post_impl__ksem_open(long long res, long long name, + long long oflag, long long mode, + long long value, long long idp); +void __sanitizer_syscall_pre_impl__ksem_unlink(long long name); +void __sanitizer_syscall_post_impl__ksem_unlink(long long res, long long name); +void __sanitizer_syscall_pre_impl__ksem_close(long long id); +void __sanitizer_syscall_post_impl__ksem_close(long long res, long long id); +void __sanitizer_syscall_pre_impl__ksem_post(long long id); +void __sanitizer_syscall_post_impl__ksem_post(long long res, long long id); +void __sanitizer_syscall_pre_impl__ksem_wait(long long id); +void __sanitizer_syscall_post_impl__ksem_wait(long long res, long long id); +void __sanitizer_syscall_pre_impl__ksem_trywait(long long id); +void __sanitizer_syscall_post_impl__ksem_trywait(long long res, long long id); +void __sanitizer_syscall_pre_impl__ksem_getvalue(long long id, long long value); +void __sanitizer_syscall_post_impl__ksem_getvalue(long long res, long long id, + long long value); +void __sanitizer_syscall_pre_impl__ksem_destroy(long long id); +void __sanitizer_syscall_post_impl__ksem_destroy(long long res, long long id); +void __sanitizer_syscall_pre_impl__ksem_timedwait(long long id, + long long abstime); +void __sanitizer_syscall_post_impl__ksem_timedwait(long long res, long long id, + long long abstime); +void __sanitizer_syscall_pre_impl_mq_open(long long name, long long oflag, + long long mode, long long attr); +void __sanitizer_syscall_post_impl_mq_open(long long res, long long name, + long long oflag, long long mode, + long long attr); +void __sanitizer_syscall_pre_impl_mq_close(long long mqdes); +void __sanitizer_syscall_post_impl_mq_close(long long res, long long mqdes); +void __sanitizer_syscall_pre_impl_mq_unlink(long long name); +void __sanitizer_syscall_post_impl_mq_unlink(long long res, long long name); +void __sanitizer_syscall_pre_impl_mq_getattr(long long mqdes, long long mqstat); +void __sanitizer_syscall_post_impl_mq_getattr(long long res, long long mqdes, + long long mqstat); +void __sanitizer_syscall_pre_impl_mq_setattr(long long mqdes, long long mqstat, + long long omqstat); +void __sanitizer_syscall_post_impl_mq_setattr(long long res, long long mqdes, + long long mqstat, + long long omqstat); +void __sanitizer_syscall_pre_impl_mq_notify(long long mqdes, + long long notification); +void __sanitizer_syscall_post_impl_mq_notify(long long res, long long mqdes, + long long notification); +void __sanitizer_syscall_pre_impl_mq_send(long long mqdes, long long msg_ptr, + long long msg_len, + long long msg_prio); +void __sanitizer_syscall_post_impl_mq_send(long long res, long long mqdes, + long long msg_ptr, long long msg_len, + long long msg_prio); +void __sanitizer_syscall_pre_impl_mq_receive(long long mqdes, long long msg_ptr, + long long msg_len, + long long msg_prio); +void __sanitizer_syscall_post_impl_mq_receive(long long res, long long mqdes, + long long msg_ptr, + long long msg_len, + long long msg_prio); +void __sanitizer_syscall_pre_impl_compat_50_mq_timedsend(long long mqdes, + long long msg_ptr, + long long msg_len, + long long msg_prio, + long long abs_timeout); +void __sanitizer_syscall_post_impl_compat_50_mq_timedsend( + long long res, long long mqdes, long long msg_ptr, long long msg_len, + long long msg_prio, long long abs_timeout); +void __sanitizer_syscall_pre_impl_compat_50_mq_timedreceive( + long long mqdes, long long msg_ptr, long long msg_len, long long msg_prio, + long long abs_timeout); +void __sanitizer_syscall_post_impl_compat_50_mq_timedreceive( + long long res, long long mqdes, long long msg_ptr, long long msg_len, + long long msg_prio, long long abs_timeout); +/* syscall 267 has been skipped */ +/* syscall 268 has been skipped */ +/* syscall 269 has been skipped */ +void __sanitizer_syscall_pre_impl___posix_rename(long long from, long long to); +void __sanitizer_syscall_post_impl___posix_rename(long long res, long long from, + long long to); +void __sanitizer_syscall_pre_impl_swapctl(long long cmd, long long arg, + long long misc); +void __sanitizer_syscall_post_impl_swapctl(long long res, long long cmd, + long long arg, long long misc); +void __sanitizer_syscall_pre_impl_compat_30_getdents(long long fd, + long long buf, + long long count); +void __sanitizer_syscall_post_impl_compat_30_getdents(long long res, + long long fd, + long long buf, + long long count); +void __sanitizer_syscall_pre_impl_minherit(long long addr, long long len, + long long inherit); +void __sanitizer_syscall_post_impl_minherit(long long res, long long addr, + long long len, long long inherit); +void __sanitizer_syscall_pre_impl_lchmod(long long path, long long mode); +void __sanitizer_syscall_post_impl_lchmod(long long res, long long path, + long long mode); +void __sanitizer_syscall_pre_impl_lchown(long long path, long long uid, + long long gid); +void __sanitizer_syscall_post_impl_lchown(long long res, long long path, + long long uid, long long gid); +void __sanitizer_syscall_pre_impl_compat_50_lutimes(long long path, + long long tptr); +void __sanitizer_syscall_post_impl_compat_50_lutimes(long long res, + long long path, + long long tptr); +void __sanitizer_syscall_pre_impl___msync13(long long addr, long long len, + long long flags); +void __sanitizer_syscall_post_impl___msync13(long long res, long long addr, + long long len, long long flags); +void __sanitizer_syscall_pre_impl_compat_30___stat13(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_30___stat13(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl_compat_30___fstat13(long long fd, + long long sb); +void __sanitizer_syscall_post_impl_compat_30___fstat13(long long res, + long long fd, + long long sb); +void __sanitizer_syscall_pre_impl_compat_30___lstat13(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_30___lstat13(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl___sigaltstack14(long long nss, long long oss); +void __sanitizer_syscall_post_impl___sigaltstack14(long long res, long long nss, + long long oss); +void __sanitizer_syscall_pre_impl___vfork14(void); +void __sanitizer_syscall_post_impl___vfork14(long long res); +void __sanitizer_syscall_pre_impl___posix_chown(long long path, long long uid, + long long gid); +void __sanitizer_syscall_post_impl___posix_chown(long long res, long long path, + long long uid, long long gid); +void __sanitizer_syscall_pre_impl___posix_fchown(long long fd, long long uid, + long long gid); +void __sanitizer_syscall_post_impl___posix_fchown(long long res, long long fd, + long long uid, long long gid); +void __sanitizer_syscall_pre_impl___posix_lchown(long long path, long long uid, + long long gid); +void __sanitizer_syscall_post_impl___posix_lchown(long long res, long long path, + long long uid, long long gid); +void __sanitizer_syscall_pre_impl_getsid(long long pid); +void __sanitizer_syscall_post_impl_getsid(long long res, long long pid); +void __sanitizer_syscall_pre_impl___clone(long long flags, long long stack); +void __sanitizer_syscall_post_impl___clone(long long res, long long flags, + long long stack); +void __sanitizer_syscall_pre_impl_fktrace(long long fd, long long ops, + long long facs, long long pid); +void __sanitizer_syscall_post_impl_fktrace(long long res, long long fd, + long long ops, long long facs, + long long pid); +void __sanitizer_syscall_pre_impl_preadv(long long fd, long long iovp, + long long iovcnt, long long PAD, + long long offset); +void __sanitizer_syscall_post_impl_preadv(long long res, long long fd, + long long iovp, long long iovcnt, + long long PAD, long long offset); +void __sanitizer_syscall_pre_impl_pwritev(long long fd, long long iovp, + long long iovcnt, long long PAD, + long long offset); +void __sanitizer_syscall_post_impl_pwritev(long long res, long long fd, + long long iovp, long long iovcnt, + long long PAD, long long offset); +void __sanitizer_syscall_pre_impl_compat_16___sigaction14(long long signum, + long long nsa, + long long osa); +void __sanitizer_syscall_post_impl_compat_16___sigaction14(long long res, + long long signum, + long long nsa, + long long osa); +void __sanitizer_syscall_pre_impl___sigpending14(long long set); +void __sanitizer_syscall_post_impl___sigpending14(long long res, long long set); +void __sanitizer_syscall_pre_impl___sigprocmask14(long long how, long long set, + long long oset); +void __sanitizer_syscall_post_impl___sigprocmask14(long long res, long long how, + long long set, + long long oset); +void __sanitizer_syscall_pre_impl___sigsuspend14(long long set); +void __sanitizer_syscall_post_impl___sigsuspend14(long long res, long long set); +void __sanitizer_syscall_pre_impl_compat_16___sigreturn14(long long sigcntxp); +void __sanitizer_syscall_post_impl_compat_16___sigreturn14(long long res, + long long sigcntxp); +void __sanitizer_syscall_pre_impl___getcwd(long long bufp, long long length); +void __sanitizer_syscall_post_impl___getcwd(long long res, long long bufp, + long long length); +void __sanitizer_syscall_pre_impl_fchroot(long long fd); +void __sanitizer_syscall_post_impl_fchroot(long long res, long long fd); +void __sanitizer_syscall_pre_impl_compat_30_fhopen(long long fhp, + long long flags); +void __sanitizer_syscall_post_impl_compat_30_fhopen(long long res, + long long fhp, + long long flags); +void __sanitizer_syscall_pre_impl_compat_30_fhstat(long long fhp, long long sb); +void __sanitizer_syscall_post_impl_compat_30_fhstat(long long res, + long long fhp, + long long sb); +void __sanitizer_syscall_pre_impl_compat_20_fhstatfs(long long fhp, + long long buf); +void __sanitizer_syscall_post_impl_compat_20_fhstatfs(long long res, + long long fhp, + long long buf); +void __sanitizer_syscall_pre_impl_compat_50_____semctl13(long long semid, + long long semnum, + long long cmd, + long long arg); +void __sanitizer_syscall_post_impl_compat_50_____semctl13(long long res, + long long semid, + long long semnum, + long long cmd, + long long arg); +void __sanitizer_syscall_pre_impl_compat_50___msgctl13(long long msqid, + long long cmd, + long long buf); +void __sanitizer_syscall_post_impl_compat_50___msgctl13(long long res, + long long msqid, + long long cmd, + long long buf); +void __sanitizer_syscall_pre_impl_compat_50___shmctl13(long long shmid, + long long cmd, + long long buf); +void __sanitizer_syscall_post_impl_compat_50___shmctl13(long long res, + long long shmid, + long long cmd, + long long buf); +void __sanitizer_syscall_pre_impl_lchflags(long long path, long long flags); +void __sanitizer_syscall_post_impl_lchflags(long long res, long long path, + long long flags); +void __sanitizer_syscall_pre_impl_issetugid(void); +void __sanitizer_syscall_post_impl_issetugid(long long res); +void __sanitizer_syscall_pre_impl_utrace(long long label, long long addr, + long long len); +void __sanitizer_syscall_post_impl_utrace(long long res, long long label, + long long addr, long long len); +void __sanitizer_syscall_pre_impl_getcontext(long long ucp); +void __sanitizer_syscall_post_impl_getcontext(long long res, long long ucp); +void __sanitizer_syscall_pre_impl_setcontext(long long ucp); +void __sanitizer_syscall_post_impl_setcontext(long long res, long long ucp); +void __sanitizer_syscall_pre_impl__lwp_create(long long ucp, long long flags, + long long new_lwp); +void __sanitizer_syscall_post_impl__lwp_create(long long res, long long ucp, + long long flags, + long long new_lwp); +void __sanitizer_syscall_pre_impl__lwp_exit(void); +void __sanitizer_syscall_post_impl__lwp_exit(long long res); +void __sanitizer_syscall_pre_impl__lwp_self(void); +void __sanitizer_syscall_post_impl__lwp_self(long long res); +void __sanitizer_syscall_pre_impl__lwp_wait(long long wait_for, + long long departed); +void __sanitizer_syscall_post_impl__lwp_wait(long long res, long long wait_for, + long long departed); +void __sanitizer_syscall_pre_impl__lwp_suspend(long long target); +void __sanitizer_syscall_post_impl__lwp_suspend(long long res, + long long target); +void __sanitizer_syscall_pre_impl__lwp_continue(long long target); +void __sanitizer_syscall_post_impl__lwp_continue(long long res, + long long target); +void __sanitizer_syscall_pre_impl__lwp_wakeup(long long target); +void __sanitizer_syscall_post_impl__lwp_wakeup(long long res, long long target); +void __sanitizer_syscall_pre_impl__lwp_getprivate(void); +void __sanitizer_syscall_post_impl__lwp_getprivate(long long res); +void __sanitizer_syscall_pre_impl__lwp_setprivate(long long ptr); +void __sanitizer_syscall_post_impl__lwp_setprivate(long long res, + long long ptr); +void __sanitizer_syscall_pre_impl__lwp_kill(long long target, long long signo); +void __sanitizer_syscall_post_impl__lwp_kill(long long res, long long target, + long long signo); +void __sanitizer_syscall_pre_impl__lwp_detach(long long target); +void __sanitizer_syscall_post_impl__lwp_detach(long long res, long long target); +void __sanitizer_syscall_pre_impl_compat_50__lwp_park(long long ts, + long long unpark, + long long hint, + long long unparkhint); +void __sanitizer_syscall_post_impl_compat_50__lwp_park(long long res, + long long ts, + long long unpark, + long long hint, + long long unparkhint); +void __sanitizer_syscall_pre_impl__lwp_unpark(long long target, long long hint); +void __sanitizer_syscall_post_impl__lwp_unpark(long long res, long long target, + long long hint); +void __sanitizer_syscall_pre_impl__lwp_unpark_all(long long targets, + long long ntargets, + long long hint); +void __sanitizer_syscall_post_impl__lwp_unpark_all(long long res, + long long targets, + long long ntargets, + long long hint); +void __sanitizer_syscall_pre_impl__lwp_setname(long long target, + long long name); +void __sanitizer_syscall_post_impl__lwp_setname(long long res, long long target, + long long name); +void __sanitizer_syscall_pre_impl__lwp_getname(long long target, long long name, + long long len); +void __sanitizer_syscall_post_impl__lwp_getname(long long res, long long target, + long long name, long long len); +void __sanitizer_syscall_pre_impl__lwp_ctl(long long features, + long long address); +void __sanitizer_syscall_post_impl__lwp_ctl(long long res, long long features, + long long address); +/* syscall 326 has been skipped */ +/* syscall 327 has been skipped */ +/* syscall 328 has been skipped */ +/* syscall 329 has been skipped */ +void __sanitizer_syscall_pre_impl_compat_60_sa_register( + long long newv, long long oldv, long long flags, + long long stackinfo_offset); +void __sanitizer_syscall_post_impl_compat_60_sa_register( + long long res, long long newv, long long oldv, long long flags, + long long stackinfo_offset); +void __sanitizer_syscall_pre_impl_compat_60_sa_stacks(long long num, + long long stacks); +void __sanitizer_syscall_post_impl_compat_60_sa_stacks(long long res, + long long num, + long long stacks); +void __sanitizer_syscall_pre_impl_compat_60_sa_enable(void); +void __sanitizer_syscall_post_impl_compat_60_sa_enable(long long res); +void __sanitizer_syscall_pre_impl_compat_60_sa_setconcurrency( + long long concurrency); +void __sanitizer_syscall_post_impl_compat_60_sa_setconcurrency( + long long res, long long concurrency); +void __sanitizer_syscall_pre_impl_compat_60_sa_yield(void); +void __sanitizer_syscall_post_impl_compat_60_sa_yield(long long res); +void __sanitizer_syscall_pre_impl_compat_60_sa_preempt(long long sa_id); +void __sanitizer_syscall_post_impl_compat_60_sa_preempt(long long res, + long long sa_id); +/* syscall 336 has been skipped */ +/* syscall 337 has been skipped */ +/* syscall 338 has been skipped */ +/* syscall 339 has been skipped */ +void __sanitizer_syscall_pre_impl___sigaction_sigtramp(long long signum, + long long nsa, + long long osa, + long long tramp, + long long vers); +void __sanitizer_syscall_post_impl___sigaction_sigtramp( + long long res, long long signum, long long nsa, long long osa, + long long tramp, long long vers); +/* syscall 341 has been skipped */ +/* syscall 342 has been skipped */ +void __sanitizer_syscall_pre_impl_rasctl(long long addr, long long len, + long long op); +void __sanitizer_syscall_post_impl_rasctl(long long res, long long addr, + long long len, long long op); +void __sanitizer_syscall_pre_impl_kqueue(void); +void __sanitizer_syscall_post_impl_kqueue(long long res); +void __sanitizer_syscall_pre_impl_compat_50_kevent( + long long fd, long long changelist, long long nchanges, long long eventlist, + long long nevents, long long timeout); +void __sanitizer_syscall_post_impl_compat_50_kevent( + long long res, long long fd, long long changelist, long long nchanges, + long long eventlist, long long nevents, long long timeout); +void __sanitizer_syscall_pre_impl__sched_setparam(long long pid, long long lid, + long long policy, + long long params); +void __sanitizer_syscall_post_impl__sched_setparam(long long res, long long pid, + long long lid, + long long policy, + long long params); +void __sanitizer_syscall_pre_impl__sched_getparam(long long pid, long long lid, + long long policy, + long long params); +void __sanitizer_syscall_post_impl__sched_getparam(long long res, long long pid, + long long lid, + long long policy, + long long params); +void __sanitizer_syscall_pre_impl__sched_setaffinity(long long pid, + long long lid, + long long size, + long long cpuset); +void __sanitizer_syscall_post_impl__sched_setaffinity(long long res, + long long pid, + long long lid, + long long size, + long long cpuset); +void __sanitizer_syscall_pre_impl__sched_getaffinity(long long pid, + long long lid, + long long size, + long long cpuset); +void __sanitizer_syscall_post_impl__sched_getaffinity(long long res, + long long pid, + long long lid, + long long size, + long long cpuset); +void __sanitizer_syscall_pre_impl_sched_yield(void); +void __sanitizer_syscall_post_impl_sched_yield(long long res); +void __sanitizer_syscall_pre_impl__sched_protect(long long priority); +void __sanitizer_syscall_post_impl__sched_protect(long long res, + long long priority); +/* syscall 352 has been skipped */ +/* syscall 353 has been skipped */ +void __sanitizer_syscall_pre_impl_fsync_range(long long fd, long long flags, + long long start, + long long length); +void __sanitizer_syscall_post_impl_fsync_range(long long res, long long fd, + long long flags, long long start, + long long length); +void __sanitizer_syscall_pre_impl_uuidgen(long long store, long long count); +void __sanitizer_syscall_post_impl_uuidgen(long long res, long long store, + long long count); +void __sanitizer_syscall_pre_impl_compat_90_getvfsstat(long long buf, + long long bufsize, + long long flags); +void __sanitizer_syscall_post_impl_compat_90_getvfsstat(long long res, + long long buf, + long long bufsize, + long long flags); +void __sanitizer_syscall_pre_impl_compat_90_statvfs1(long long path, + long long buf, + long long flags); +void __sanitizer_syscall_post_impl_compat_90_statvfs1(long long res, + long long path, + long long buf, + long long flags); +void __sanitizer_syscall_pre_impl_compat_90_fstatvfs1(long long fd, + long long buf, + long long flags); +void __sanitizer_syscall_post_impl_compat_90_fstatvfs1(long long res, + long long fd, + long long buf, + long long flags); +void __sanitizer_syscall_pre_impl_compat_30_fhstatvfs1(long long fhp, + long long buf, + long long flags); +void __sanitizer_syscall_post_impl_compat_30_fhstatvfs1(long long res, + long long fhp, + long long buf, + long long flags); +void __sanitizer_syscall_pre_impl_extattrctl(long long path, long long cmd, + long long filename, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_post_impl_extattrctl(long long res, long long path, + long long cmd, long long filename, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_pre_impl_extattr_set_file(long long path, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_set_file( + long long res, long long path, long long attrnamespace, long long attrname, + long long data, long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_get_file(long long path, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_get_file( + long long res, long long path, long long attrnamespace, long long attrname, + long long data, long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_delete_file(long long path, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_post_impl_extattr_delete_file(long long res, + long long path, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_pre_impl_extattr_set_fd(long long fd, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_set_fd(long long res, long long fd, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_get_fd(long long fd, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_get_fd(long long res, long long fd, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_delete_fd(long long fd, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_post_impl_extattr_delete_fd(long long res, + long long fd, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_pre_impl_extattr_set_link(long long path, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_set_link( + long long res, long long path, long long attrnamespace, long long attrname, + long long data, long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_get_link(long long path, + long long attrnamespace, + long long attrname, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_get_link( + long long res, long long path, long long attrnamespace, long long attrname, + long long data, long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_delete_link(long long path, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_post_impl_extattr_delete_link(long long res, + long long path, + long long attrnamespace, + long long attrname); +void __sanitizer_syscall_pre_impl_extattr_list_fd(long long fd, + long long attrnamespace, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_list_fd(long long res, long long fd, + long long attrnamespace, + long long data, + long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_list_file(long long path, + long long attrnamespace, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_list_file(long long res, + long long path, + long long attrnamespace, + long long data, + long long nbytes); +void __sanitizer_syscall_pre_impl_extattr_list_link(long long path, + long long attrnamespace, + long long data, + long long nbytes); +void __sanitizer_syscall_post_impl_extattr_list_link(long long res, + long long path, + long long attrnamespace, + long long data, + long long nbytes); +void __sanitizer_syscall_pre_impl_compat_50_pselect(long long nd, long long in, + long long ou, long long ex, + long long ts, + long long mask); +void __sanitizer_syscall_post_impl_compat_50_pselect(long long res, + long long nd, long long in, + long long ou, long long ex, + long long ts, + long long mask); +void __sanitizer_syscall_pre_impl_compat_50_pollts(long long fds, + long long nfds, long long ts, + long long mask); +void __sanitizer_syscall_post_impl_compat_50_pollts( + long long res, long long fds, long long nfds, long long ts, long long mask); +void __sanitizer_syscall_pre_impl_setxattr(long long path, long long name, + long long value, long long size, + long long flags); +void __sanitizer_syscall_post_impl_setxattr(long long res, long long path, + long long name, long long value, + long long size, long long flags); +void __sanitizer_syscall_pre_impl_lsetxattr(long long path, long long name, + long long value, long long size, + long long flags); +void __sanitizer_syscall_post_impl_lsetxattr(long long res, long long path, + long long name, long long value, + long long size, long long flags); +void __sanitizer_syscall_pre_impl_fsetxattr(long long fd, long long name, + long long value, long long size, + long long flags); +void __sanitizer_syscall_post_impl_fsetxattr(long long res, long long fd, + long long name, long long value, + long long size, long long flags); +void __sanitizer_syscall_pre_impl_getxattr(long long path, long long name, + long long value, long long size); +void __sanitizer_syscall_post_impl_getxattr(long long res, long long path, + long long name, long long value, + long long size); +void __sanitizer_syscall_pre_impl_lgetxattr(long long path, long long name, + long long value, long long size); +void __sanitizer_syscall_post_impl_lgetxattr(long long res, long long path, + long long name, long long value, + long long size); +void __sanitizer_syscall_pre_impl_fgetxattr(long long fd, long long name, + long long value, long long size); +void __sanitizer_syscall_post_impl_fgetxattr(long long res, long long fd, + long long name, long long value, + long long size); +void __sanitizer_syscall_pre_impl_listxattr(long long path, long long list, + long long size); +void __sanitizer_syscall_post_impl_listxattr(long long res, long long path, + long long list, long long size); +void __sanitizer_syscall_pre_impl_llistxattr(long long path, long long list, + long long size); +void __sanitizer_syscall_post_impl_llistxattr(long long res, long long path, + long long list, long long size); +void __sanitizer_syscall_pre_impl_flistxattr(long long fd, long long list, + long long size); +void __sanitizer_syscall_post_impl_flistxattr(long long res, long long fd, + long long list, long long size); +void __sanitizer_syscall_pre_impl_removexattr(long long path, long long name); +void __sanitizer_syscall_post_impl_removexattr(long long res, long long path, + long long name); +void __sanitizer_syscall_pre_impl_lremovexattr(long long path, long long name); +void __sanitizer_syscall_post_impl_lremovexattr(long long res, long long path, + long long name); +void __sanitizer_syscall_pre_impl_fremovexattr(long long fd, long long name); +void __sanitizer_syscall_post_impl_fremovexattr(long long res, long long fd, + long long name); +void __sanitizer_syscall_pre_impl_compat_50___stat30(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_50___stat30(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl_compat_50___fstat30(long long fd, + long long sb); +void __sanitizer_syscall_post_impl_compat_50___fstat30(long long res, + long long fd, + long long sb); +void __sanitizer_syscall_pre_impl_compat_50___lstat30(long long path, + long long ub); +void __sanitizer_syscall_post_impl_compat_50___lstat30(long long res, + long long path, + long long ub); +void __sanitizer_syscall_pre_impl___getdents30(long long fd, long long buf, + long long count); +void __sanitizer_syscall_post_impl___getdents30(long long res, long long fd, + long long buf, long long count); +void __sanitizer_syscall_pre_impl_posix_fadvise(long long); +void __sanitizer_syscall_post_impl_posix_fadvise(long long res, long long); +void __sanitizer_syscall_pre_impl_compat_30___fhstat30(long long fhp, + long long sb); +void __sanitizer_syscall_post_impl_compat_30___fhstat30(long long res, + long long fhp, + long long sb); +void __sanitizer_syscall_pre_impl_compat_50___ntp_gettime30(long long ntvp); +void __sanitizer_syscall_post_impl_compat_50___ntp_gettime30(long long res, + long long ntvp); +void __sanitizer_syscall_pre_impl___socket30(long long domain, long long type, + long long protocol); +void __sanitizer_syscall_post_impl___socket30(long long res, long long domain, + long long type, + long long protocol); +void __sanitizer_syscall_pre_impl___getfh30(long long fname, long long fhp, + long long fh_size); +void __sanitizer_syscall_post_impl___getfh30(long long res, long long fname, + long long fhp, long long fh_size); +void __sanitizer_syscall_pre_impl___fhopen40(long long fhp, long long fh_size, + long long flags); +void __sanitizer_syscall_post_impl___fhopen40(long long res, long long fhp, + long long fh_size, + long long flags); +void __sanitizer_syscall_pre_impl_compat_90_fhstatvfs1(long long fhp, + long long fh_size, + long long buf, + long long flags); +void __sanitizer_syscall_post_impl_compat_90_fhstatvfs1(long long res, + long long fhp, + long long fh_size, + long long buf, + long long flags); +void __sanitizer_syscall_pre_impl_compat_50___fhstat40(long long fhp, + long long fh_size, + long long sb); +void __sanitizer_syscall_post_impl_compat_50___fhstat40(long long res, + long long fhp, + long long fh_size, + long long sb); +void __sanitizer_syscall_pre_impl_aio_cancel(long long fildes, + long long aiocbp); +void __sanitizer_syscall_post_impl_aio_cancel(long long res, long long fildes, + long long aiocbp); +void __sanitizer_syscall_pre_impl_aio_error(long long aiocbp); +void __sanitizer_syscall_post_impl_aio_error(long long res, long long aiocbp); +void __sanitizer_syscall_pre_impl_aio_fsync(long long op, long long aiocbp); +void __sanitizer_syscall_post_impl_aio_fsync(long long res, long long op, + long long aiocbp); +void __sanitizer_syscall_pre_impl_aio_read(long long aiocbp); +void __sanitizer_syscall_post_impl_aio_read(long long res, long long aiocbp); +void __sanitizer_syscall_pre_impl_aio_return(long long aiocbp); +void __sanitizer_syscall_post_impl_aio_return(long long res, long long aiocbp); +void __sanitizer_syscall_pre_impl_compat_50_aio_suspend(long long list, + long long nent, + long long timeout); +void __sanitizer_syscall_post_impl_compat_50_aio_suspend(long long res, + long long list, + long long nent, + long long timeout); +void __sanitizer_syscall_pre_impl_aio_write(long long aiocbp); +void __sanitizer_syscall_post_impl_aio_write(long long res, long long aiocbp); +void __sanitizer_syscall_pre_impl_lio_listio(long long mode, long long list, + long long nent, long long sig); +void __sanitizer_syscall_post_impl_lio_listio(long long res, long long mode, + long long list, long long nent, + long long sig); +/* syscall 407 has been skipped */ +/* syscall 408 has been skipped */ +/* syscall 409 has been skipped */ +void __sanitizer_syscall_pre_impl___mount50(long long type, long long path, + long long flags, long long data, + long long data_len); +void __sanitizer_syscall_post_impl___mount50(long long res, long long type, + long long path, long long flags, + long long data, + long long data_len); +void __sanitizer_syscall_pre_impl_mremap(long long old_address, + long long old_size, + long long new_address, + long long new_size, long long flags); +void __sanitizer_syscall_post_impl_mremap(long long res, long long old_address, + long long old_size, + long long new_address, + long long new_size, long long flags); +void __sanitizer_syscall_pre_impl_pset_create(long long psid); +void __sanitizer_syscall_post_impl_pset_create(long long res, long long psid); +void __sanitizer_syscall_pre_impl_pset_destroy(long long psid); +void __sanitizer_syscall_post_impl_pset_destroy(long long res, long long psid); +void __sanitizer_syscall_pre_impl_pset_assign(long long psid, long long cpuid, + long long opsid); +void __sanitizer_syscall_post_impl_pset_assign(long long res, long long psid, + long long cpuid, + long long opsid); +void __sanitizer_syscall_pre_impl__pset_bind(long long idtype, + long long first_id, + long long second_id, + long long psid, long long opsid); +void __sanitizer_syscall_post_impl__pset_bind(long long res, long long idtype, + long long first_id, + long long second_id, + long long psid, long long opsid); +void __sanitizer_syscall_pre_impl___posix_fadvise50(long long fd, long long PAD, + long long offset, + long long len, + long long advice); +void __sanitizer_syscall_post_impl___posix_fadvise50( + long long res, long long fd, long long PAD, long long offset, long long len, + long long advice); +void __sanitizer_syscall_pre_impl___select50(long long nd, long long in, + long long ou, long long ex, + long long tv); +void __sanitizer_syscall_post_impl___select50(long long res, long long nd, + long long in, long long ou, + long long ex, long long tv); +void __sanitizer_syscall_pre_impl___gettimeofday50(long long tp, long long tzp); +void __sanitizer_syscall_post_impl___gettimeofday50(long long res, long long tp, + long long tzp); +void __sanitizer_syscall_pre_impl___settimeofday50(long long tv, long long tzp); +void __sanitizer_syscall_post_impl___settimeofday50(long long res, long long tv, + long long tzp); +void __sanitizer_syscall_pre_impl___utimes50(long long path, long long tptr); +void __sanitizer_syscall_post_impl___utimes50(long long res, long long path, + long long tptr); +void __sanitizer_syscall_pre_impl___adjtime50(long long delta, + long long olddelta); +void __sanitizer_syscall_post_impl___adjtime50(long long res, long long delta, + long long olddelta); +void __sanitizer_syscall_pre_impl___lfs_segwait50(long long fsidp, + long long tv); +void __sanitizer_syscall_post_impl___lfs_segwait50(long long res, + long long fsidp, + long long tv); +void __sanitizer_syscall_pre_impl___futimes50(long long fd, long long tptr); +void __sanitizer_syscall_post_impl___futimes50(long long res, long long fd, + long long tptr); +void __sanitizer_syscall_pre_impl___lutimes50(long long path, long long tptr); +void __sanitizer_syscall_post_impl___lutimes50(long long res, long long path, + long long tptr); +void __sanitizer_syscall_pre_impl___setitimer50(long long which, long long itv, + long long oitv); +void __sanitizer_syscall_post_impl___setitimer50(long long res, long long which, + long long itv, long long oitv); +void __sanitizer_syscall_pre_impl___getitimer50(long long which, long long itv); +void __sanitizer_syscall_post_impl___getitimer50(long long res, long long which, + long long itv); +void __sanitizer_syscall_pre_impl___clock_gettime50(long long clock_id, + long long tp); +void __sanitizer_syscall_post_impl___clock_gettime50(long long res, + long long clock_id, + long long tp); +void __sanitizer_syscall_pre_impl___clock_settime50(long long clock_id, + long long tp); +void __sanitizer_syscall_post_impl___clock_settime50(long long res, + long long clock_id, + long long tp); +void __sanitizer_syscall_pre_impl___clock_getres50(long long clock_id, + long long tp); +void __sanitizer_syscall_post_impl___clock_getres50(long long res, + long long clock_id, + long long tp); +void __sanitizer_syscall_pre_impl___nanosleep50(long long rqtp, long long rmtp); +void __sanitizer_syscall_post_impl___nanosleep50(long long res, long long rqtp, + long long rmtp); +void __sanitizer_syscall_pre_impl_____sigtimedwait50(long long set, + long long info, + long long timeout); +void __sanitizer_syscall_post_impl_____sigtimedwait50(long long res, + long long set, + long long info, + long long timeout); +void __sanitizer_syscall_pre_impl___mq_timedsend50(long long mqdes, + long long msg_ptr, + long long msg_len, + long long msg_prio, + long long abs_timeout); +void __sanitizer_syscall_post_impl___mq_timedsend50( + long long res, long long mqdes, long long msg_ptr, long long msg_len, + long long msg_prio, long long abs_timeout); +void __sanitizer_syscall_pre_impl___mq_timedreceive50(long long mqdes, + long long msg_ptr, + long long msg_len, + long long msg_prio, + long long abs_timeout); +void __sanitizer_syscall_post_impl___mq_timedreceive50( + long long res, long long mqdes, long long msg_ptr, long long msg_len, + long long msg_prio, long long abs_timeout); +void __sanitizer_syscall_pre_impl_compat_60__lwp_park(long long ts, + long long unpark, + long long hint, + long long unparkhint); +void __sanitizer_syscall_post_impl_compat_60__lwp_park(long long res, + long long ts, + long long unpark, + long long hint, + long long unparkhint); +void __sanitizer_syscall_pre_impl___kevent50(long long fd, long long changelist, + long long nchanges, + long long eventlist, + long long nevents, + long long timeout); +void __sanitizer_syscall_post_impl___kevent50( + long long res, long long fd, long long changelist, long long nchanges, + long long eventlist, long long nevents, long long timeout); +void __sanitizer_syscall_pre_impl___pselect50(long long nd, long long in, + long long ou, long long ex, + long long ts, long long mask); +void __sanitizer_syscall_post_impl___pselect50(long long res, long long nd, + long long in, long long ou, + long long ex, long long ts, + long long mask); +void __sanitizer_syscall_pre_impl___pollts50(long long fds, long long nfds, + long long ts, long long mask); +void __sanitizer_syscall_post_impl___pollts50(long long res, long long fds, + long long nfds, long long ts, + long long mask); +void __sanitizer_syscall_pre_impl___aio_suspend50(long long list, + long long nent, + long long timeout); +void __sanitizer_syscall_post_impl___aio_suspend50(long long res, + long long list, + long long nent, + long long timeout); +void __sanitizer_syscall_pre_impl___stat50(long long path, long long ub); +void __sanitizer_syscall_post_impl___stat50(long long res, long long path, + long long ub); +void __sanitizer_syscall_pre_impl___fstat50(long long fd, long long sb); +void __sanitizer_syscall_post_impl___fstat50(long long res, long long fd, + long long sb); +void __sanitizer_syscall_pre_impl___lstat50(long long path, long long ub); +void __sanitizer_syscall_post_impl___lstat50(long long res, long long path, + long long ub); +void __sanitizer_syscall_pre_impl_____semctl50(long long semid, + long long semnum, long long cmd, + long long arg); +void __sanitizer_syscall_post_impl_____semctl50(long long res, long long semid, + long long semnum, long long cmd, + long long arg); +void __sanitizer_syscall_pre_impl___shmctl50(long long shmid, long long cmd, + long long buf); +void __sanitizer_syscall_post_impl___shmctl50(long long res, long long shmid, + long long cmd, long long buf); +void __sanitizer_syscall_pre_impl___msgctl50(long long msqid, long long cmd, + long long buf); +void __sanitizer_syscall_post_impl___msgctl50(long long res, long long msqid, + long long cmd, long long buf); +void __sanitizer_syscall_pre_impl___getrusage50(long long who, + long long rusage); +void __sanitizer_syscall_post_impl___getrusage50(long long res, long long who, + long long rusage); +void __sanitizer_syscall_pre_impl___timer_settime50(long long timerid, + long long flags, + long long value, + long long ovalue); +void __sanitizer_syscall_post_impl___timer_settime50(long long res, + long long timerid, + long long flags, + long long value, + long long ovalue); +void __sanitizer_syscall_pre_impl___timer_gettime50(long long timerid, + long long value); +void __sanitizer_syscall_post_impl___timer_gettime50(long long res, + long long timerid, + long long value); +#if defined(NTP) || !defined(_KERNEL_OPT) +void __sanitizer_syscall_pre_impl___ntp_gettime50(long long ntvp); +void __sanitizer_syscall_post_impl___ntp_gettime50(long long res, + long long ntvp); +#else +/* syscall 448 has been skipped */ +#endif +void __sanitizer_syscall_pre_impl___wait450(long long pid, long long status, + long long options, + long long rusage); +void __sanitizer_syscall_post_impl___wait450(long long res, long long pid, + long long status, + long long options, + long long rusage); +void __sanitizer_syscall_pre_impl___mknod50(long long path, long long mode, + long long dev); +void __sanitizer_syscall_post_impl___mknod50(long long res, long long path, + long long mode, long long dev); +void __sanitizer_syscall_pre_impl___fhstat50(long long fhp, long long fh_size, + long long sb); +void __sanitizer_syscall_post_impl___fhstat50(long long res, long long fhp, + long long fh_size, long long sb); +/* syscall 452 has been skipped */ +void __sanitizer_syscall_pre_impl_pipe2(long long fildes, long long flags); +void __sanitizer_syscall_post_impl_pipe2(long long res, long long fildes, + long long flags); +void __sanitizer_syscall_pre_impl_dup3(long long from, long long to, + long long flags); +void __sanitizer_syscall_post_impl_dup3(long long res, long long from, + long long to, long long flags); +void __sanitizer_syscall_pre_impl_kqueue1(long long flags); +void __sanitizer_syscall_post_impl_kqueue1(long long res, long long flags); +void __sanitizer_syscall_pre_impl_paccept(long long s, long long name, + long long anamelen, long long mask, + long long flags); +void __sanitizer_syscall_post_impl_paccept(long long res, long long s, + long long name, long long anamelen, + long long mask, long long flags); +void __sanitizer_syscall_pre_impl_linkat(long long fd1, long long name1, + long long fd2, long long name2, + long long flags); +void __sanitizer_syscall_post_impl_linkat(long long res, long long fd1, + long long name1, long long fd2, + long long name2, long long flags); +void __sanitizer_syscall_pre_impl_renameat(long long fromfd, long long from, + long long tofd, long long to); +void __sanitizer_syscall_post_impl_renameat(long long res, long long fromfd, + long long from, long long tofd, + long long to); +void __sanitizer_syscall_pre_impl_mkfifoat(long long fd, long long path, + long long mode); +void __sanitizer_syscall_post_impl_mkfifoat(long long res, long long fd, + long long path, long long mode); +void __sanitizer_syscall_pre_impl_mknodat(long long fd, long long path, + long long mode, long long PAD, + long long dev); +void __sanitizer_syscall_post_impl_mknodat(long long res, long long fd, + long long path, long long mode, + long long PAD, long long dev); +void __sanitizer_syscall_pre_impl_mkdirat(long long fd, long long path, + long long mode); +void __sanitizer_syscall_post_impl_mkdirat(long long res, long long fd, + long long path, long long mode); +void __sanitizer_syscall_pre_impl_faccessat(long long fd, long long path, + long long amode, long long flag); +void __sanitizer_syscall_post_impl_faccessat(long long res, long long fd, + long long path, long long amode, + long long flag); +void __sanitizer_syscall_pre_impl_fchmodat(long long fd, long long path, + long long mode, long long flag); +void __sanitizer_syscall_post_impl_fchmodat(long long res, long long fd, + long long path, long long mode, + long long flag); +void __sanitizer_syscall_pre_impl_fchownat(long long fd, long long path, + long long owner, long long group, + long long flag); +void __sanitizer_syscall_post_impl_fchownat(long long res, long long fd, + long long path, long long owner, + long long group, long long flag); +void __sanitizer_syscall_pre_impl_fexecve(long long fd, long long argp, + long long envp); +void __sanitizer_syscall_post_impl_fexecve(long long res, long long fd, + long long argp, long long envp); +void __sanitizer_syscall_pre_impl_fstatat(long long fd, long long path, + long long buf, long long flag); +void __sanitizer_syscall_post_impl_fstatat(long long res, long long fd, + long long path, long long buf, + long long flag); +void __sanitizer_syscall_pre_impl_utimensat(long long fd, long long path, + long long tptr, long long flag); +void __sanitizer_syscall_post_impl_utimensat(long long res, long long fd, + long long path, long long tptr, + long long flag); +void __sanitizer_syscall_pre_impl_openat(long long fd, long long path, + long long oflags, long long mode); +void __sanitizer_syscall_post_impl_openat(long long res, long long fd, + long long path, long long oflags, + long long mode); +void __sanitizer_syscall_pre_impl_readlinkat(long long fd, long long path, + long long buf, long long bufsize); +void __sanitizer_syscall_post_impl_readlinkat(long long res, long long fd, + long long path, long long buf, + long long bufsize); +void __sanitizer_syscall_pre_impl_symlinkat(long long path1, long long fd, + long long path2); +void __sanitizer_syscall_post_impl_symlinkat(long long res, long long path1, + long long fd, long long path2); +void __sanitizer_syscall_pre_impl_unlinkat(long long fd, long long path, + long long flag); +void __sanitizer_syscall_post_impl_unlinkat(long long res, long long fd, + long long path, long long flag); +void __sanitizer_syscall_pre_impl_futimens(long long fd, long long tptr); +void __sanitizer_syscall_post_impl_futimens(long long res, long long fd, + long long tptr); +void __sanitizer_syscall_pre_impl___quotactl(long long path, long long args); +void __sanitizer_syscall_post_impl___quotactl(long long res, long long path, + long long args); +void __sanitizer_syscall_pre_impl_posix_spawn(long long pid, long long path, + long long file_actions, + long long attrp, long long argv, + long long envp); +void __sanitizer_syscall_post_impl_posix_spawn(long long res, long long pid, + long long path, + long long file_actions, + long long attrp, long long argv, + long long envp); +void __sanitizer_syscall_pre_impl_recvmmsg(long long s, long long mmsg, + long long vlen, long long flags, + long long timeout); +void __sanitizer_syscall_post_impl_recvmmsg(long long res, long long s, + long long mmsg, long long vlen, + long long flags, long long timeout); +void __sanitizer_syscall_pre_impl_sendmmsg(long long s, long long mmsg, + long long vlen, long long flags); +void __sanitizer_syscall_post_impl_sendmmsg(long long res, long long s, + long long mmsg, long long vlen, + long long flags); +void __sanitizer_syscall_pre_impl_clock_nanosleep(long long clock_id, + long long flags, + long long rqtp, + long long rmtp); +void __sanitizer_syscall_post_impl_clock_nanosleep(long long res, + long long clock_id, + long long flags, + long long rqtp, + long long rmtp); +void __sanitizer_syscall_pre_impl____lwp_park60(long long clock_id, + long long flags, long long ts, + long long unpark, + long long hint, + long long unparkhint); +void __sanitizer_syscall_post_impl____lwp_park60( + long long res, long long clock_id, long long flags, long long ts, + long long unpark, long long hint, long long unparkhint); +void __sanitizer_syscall_pre_impl_posix_fallocate(long long fd, long long PAD, + long long pos, long long len); +void __sanitizer_syscall_post_impl_posix_fallocate(long long res, long long fd, + long long PAD, long long pos, + long long len); +void __sanitizer_syscall_pre_impl_fdiscard(long long fd, long long PAD, + long long pos, long long len); +void __sanitizer_syscall_post_impl_fdiscard(long long res, long long fd, + long long PAD, long long pos, + long long len); +void __sanitizer_syscall_pre_impl_wait6(long long idtype, long long id, + long long status, long long options, + long long wru, long long info); +void __sanitizer_syscall_post_impl_wait6(long long res, long long idtype, + long long id, long long status, + long long options, long long wru, + long long info); +void __sanitizer_syscall_pre_impl_clock_getcpuclockid2(long long idtype, + long long id, + long long clock_id); +void __sanitizer_syscall_post_impl_clock_getcpuclockid2(long long res, + long long idtype, + long long id, + long long clock_id); +void __sanitizer_syscall_pre_impl___getvfsstat90(long long buf, + long long bufsize, + long long flags); +void __sanitizer_syscall_post_impl___getvfsstat90(long long res, long long buf, + long long bufsize, + long long flags); +void __sanitizer_syscall_pre_impl___statvfs190(long long path, long long buf, + long long flags); +void __sanitizer_syscall_post_impl___statvfs190(long long res, long long path, + long long buf, long long flags); +void __sanitizer_syscall_pre_impl___fstatvfs190(long long fd, long long buf, + long long flags); +void __sanitizer_syscall_post_impl___fstatvfs190(long long res, long long fd, + long long buf, + long long flags); +void __sanitizer_syscall_pre_impl___fhstatvfs190(long long fhp, + long long fh_size, + long long buf, + long long flags); +void __sanitizer_syscall_post_impl___fhstatvfs190(long long res, long long fhp, + long long fh_size, + long long buf, + long long flags); +void __sanitizer_syscall_pre_impl___acl_get_link(long long path, long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_get_link(long long res, long long path, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl___acl_set_link(long long path, long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_set_link(long long res, long long path, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl___acl_delete_link(long long path, + long long type); +void __sanitizer_syscall_post_impl___acl_delete_link(long long res, + long long path, + long long type); +void __sanitizer_syscall_pre_impl___acl_aclcheck_link(long long path, + long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_aclcheck_link(long long res, + long long path, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl___acl_get_file(long long path, long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_get_file(long long res, long long path, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl___acl_set_file(long long path, long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_set_file(long long res, long long path, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl___acl_get_fd(long long filedes, + long long type, long long aclp); +void __sanitizer_syscall_post_impl___acl_get_fd(long long res, + long long filedes, + long long type, long long aclp); +void __sanitizer_syscall_pre_impl___acl_set_fd(long long filedes, + long long type, long long aclp); +void __sanitizer_syscall_post_impl___acl_set_fd(long long res, + long long filedes, + long long type, long long aclp); +void __sanitizer_syscall_pre_impl___acl_delete_file(long long path, + long long type); +void __sanitizer_syscall_post_impl___acl_delete_file(long long res, + long long path, + long long type); +void __sanitizer_syscall_pre_impl___acl_delete_fd(long long filedes, + long long type); +void __sanitizer_syscall_post_impl___acl_delete_fd(long long res, + long long filedes, + long long type); +void __sanitizer_syscall_pre_impl___acl_aclcheck_file(long long path, + long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_aclcheck_file(long long res, + long long path, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl___acl_aclcheck_fd(long long filedes, + long long type, + long long aclp); +void __sanitizer_syscall_post_impl___acl_aclcheck_fd(long long res, + long long filedes, + long long type, + long long aclp); +void __sanitizer_syscall_pre_impl_lpathconf(long long path, long long name); +void __sanitizer_syscall_post_impl_lpathconf(long long res, long long path, + long long name); + +#ifdef __cplusplus +} // extern "C" +#endif + +// DO NOT EDIT! THIS FILE HAS BEEN GENERATED! + +#endif // SANITIZER_NETBSD_SYSCALL_HOOKS_H diff --git a/llvm/lib/clang/19/include/sanitizer/scudo_interface.h b/llvm/lib/clang/19/include/sanitizer/scudo_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..37fd7bfeccf0b2c2a75c93f168a56b4ecdbdda99 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/scudo_interface.h @@ -0,0 +1,38 @@ +//===-- sanitizer/scudo_interface.h -----------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +/// Public Scudo interface header. +// +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_SCUDO_INTERFACE_H_ +#define SANITIZER_SCUDO_INTERFACE_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif +// This function may be optionally provided by a user and should return +// a string containing Scudo runtime options. See scudo_flags.h for details. +const char *SANITIZER_CDECL __scudo_default_options(void); + +// This function allows to set the RSS limit at runtime. This can be either +// the hard limit (HardLimit=1) or the soft limit (HardLimit=0). The limit +// can be removed by setting LimitMb to 0. This function's parameters should +// be fully trusted to avoid security mishaps. +void SANITIZER_CDECL __scudo_set_rss_limit(size_t LimitMb, int HardLimit); + +// This function outputs various allocator statistics for both the Primary +// and Secondary allocators, including memory usage, number of allocations +// and deallocations. +void SANITIZER_CDECL __scudo_print_stats(void); +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_SCUDO_INTERFACE_H_ diff --git a/llvm/lib/clang/19/include/sanitizer/tsan_interface.h b/llvm/lib/clang/19/include/sanitizer/tsan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..e11a4175cd8ed9fad0dd7c832156b2011b075e2e --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/tsan_interface.h @@ -0,0 +1,316 @@ +//===-- tsan_interface.h ----------------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of ThreadSanitizer (TSan), a race detector. +// +// Public interface header for TSan. +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_TSAN_INTERFACE_H +#define SANITIZER_TSAN_INTERFACE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +// __tsan_release establishes a happens-before relation with a preceding +// __tsan_acquire on the same address. +void SANITIZER_CDECL __tsan_acquire(void *addr); +void SANITIZER_CDECL __tsan_release(void *addr); + +// Annotations for custom mutexes. +// The annotations allow to get better reports (with sets of locked mutexes), +// detect more types of bugs (e.g. mutex misuses, races between lock/unlock and +// destruction and potential deadlocks) and improve precision and performance +// (by ignoring individual atomic operations in mutex code). However, the +// downside is that annotated mutex code itself is not checked for correctness. + +// Mutex creation flags are passed to __tsan_mutex_create annotation. +// If mutex has no constructor and __tsan_mutex_create is not called, +// the flags may be passed to __tsan_mutex_pre_lock/__tsan_mutex_post_lock +// annotations. + +// Mutex has static storage duration and no-op constructor and destructor. +// This effectively makes tsan ignore destroy annotation. +static const unsigned __tsan_mutex_linker_init = 1 << 0; +// Mutex is write reentrant. +static const unsigned __tsan_mutex_write_reentrant = 1 << 1; +// Mutex is read reentrant. +static const unsigned __tsan_mutex_read_reentrant = 1 << 2; +// Mutex does not have static storage duration, and must not be used after +// its destructor runs. The opposite of __tsan_mutex_linker_init. +// If this flag is passed to __tsan_mutex_destroy, then the destruction +// is ignored unless this flag was previously set on the mutex. +static const unsigned __tsan_mutex_not_static = 1 << 8; + +// Mutex operation flags: + +// Denotes read lock operation. +static const unsigned __tsan_mutex_read_lock = 1 << 3; +// Denotes try lock operation. +static const unsigned __tsan_mutex_try_lock = 1 << 4; +// Denotes that a try lock operation has failed to acquire the mutex. +static const unsigned __tsan_mutex_try_lock_failed = 1 << 5; +// Denotes that the lock operation acquires multiple recursion levels. +// Number of levels is passed in recursion parameter. +// This is useful for annotation of e.g. Java builtin monitors, +// for which wait operation releases all recursive acquisitions of the mutex. +static const unsigned __tsan_mutex_recursive_lock = 1 << 6; +// Denotes that the unlock operation releases all recursion levels. +// Number of released levels is returned and later must be passed to +// the corresponding __tsan_mutex_post_lock annotation. +static const unsigned __tsan_mutex_recursive_unlock = 1 << 7; + +// Convenient composed constants. +static const unsigned __tsan_mutex_try_read_lock = + __tsan_mutex_read_lock | __tsan_mutex_try_lock; +static const unsigned __tsan_mutex_try_read_lock_failed = + __tsan_mutex_try_read_lock | __tsan_mutex_try_lock_failed; + +// Annotate creation of a mutex. +// Supported flags: mutex creation flags. +void SANITIZER_CDECL __tsan_mutex_create(void *addr, unsigned flags); + +// Annotate destruction of a mutex. +// Supported flags: +// - __tsan_mutex_linker_init +// - __tsan_mutex_not_static +void SANITIZER_CDECL __tsan_mutex_destroy(void *addr, unsigned flags); + +// Annotate start of lock operation. +// Supported flags: +// - __tsan_mutex_read_lock +// - __tsan_mutex_try_lock +// - all mutex creation flags +void SANITIZER_CDECL __tsan_mutex_pre_lock(void *addr, unsigned flags); + +// Annotate end of lock operation. +// Supported flags: +// - __tsan_mutex_read_lock (must match __tsan_mutex_pre_lock) +// - __tsan_mutex_try_lock (must match __tsan_mutex_pre_lock) +// - __tsan_mutex_try_lock_failed +// - __tsan_mutex_recursive_lock +// - all mutex creation flags +void SANITIZER_CDECL __tsan_mutex_post_lock(void *addr, unsigned flags, + int recursion); + +// Annotate start of unlock operation. +// Supported flags: +// - __tsan_mutex_read_lock +// - __tsan_mutex_recursive_unlock +int SANITIZER_CDECL __tsan_mutex_pre_unlock(void *addr, unsigned flags); + +// Annotate end of unlock operation. +// Supported flags: +// - __tsan_mutex_read_lock (must match __tsan_mutex_pre_unlock) +void SANITIZER_CDECL __tsan_mutex_post_unlock(void *addr, unsigned flags); + +// Annotate start/end of notify/signal/broadcast operation. +// Supported flags: none. +void SANITIZER_CDECL __tsan_mutex_pre_signal(void *addr, unsigned flags); +void SANITIZER_CDECL __tsan_mutex_post_signal(void *addr, unsigned flags); + +// Annotate start/end of a region of code where lock/unlock/signal operation +// diverts to do something else unrelated to the mutex. This can be used to +// annotate, for example, calls into cooperative scheduler or contention +// profiling code. +// These annotations must be called only from within +// __tsan_mutex_pre/post_lock, __tsan_mutex_pre/post_unlock, +// __tsan_mutex_pre/post_signal regions. +// Supported flags: none. +void SANITIZER_CDECL __tsan_mutex_pre_divert(void *addr, unsigned flags); +void SANITIZER_CDECL __tsan_mutex_post_divert(void *addr, unsigned flags); + +// Check that the current thread does not hold any mutexes, +// report a bug report otherwise. +void SANITIZER_CDECL __tsan_check_no_mutexes_held(); + +// External race detection API. +// Can be used by non-instrumented libraries to detect when their objects are +// being used in an unsafe manner. +// - __tsan_external_read/__tsan_external_write annotates the logical reads +// and writes of the object at the specified address. 'caller_pc' should +// be the PC of the library user, which the library can obtain with e.g. +// `__builtin_return_address(0)`. +// - __tsan_external_register_tag registers a 'tag' with the specified name, +// which is later used in read/write annotations to denote the object type +// - __tsan_external_assign_tag can optionally mark a heap object with a tag +void *SANITIZER_CDECL __tsan_external_register_tag(const char *object_type); +void SANITIZER_CDECL __tsan_external_register_header(void *tag, + const char *header); +void SANITIZER_CDECL __tsan_external_assign_tag(void *addr, void *tag); +void SANITIZER_CDECL __tsan_external_read(void *addr, void *caller_pc, + void *tag); +void SANITIZER_CDECL __tsan_external_write(void *addr, void *caller_pc, + void *tag); + +// Fiber switching API. +// - TSAN context for fiber can be created by __tsan_create_fiber +// and freed by __tsan_destroy_fiber. +// - TSAN context of current fiber or thread can be obtained +// by calling __tsan_get_current_fiber. +// - __tsan_switch_to_fiber should be called immediately before switch +// to fiber, such as call of swapcontext. +// - Fiber name can be set by __tsan_set_fiber_name. +void *SANITIZER_CDECL __tsan_get_current_fiber(void); +void *SANITIZER_CDECL __tsan_create_fiber(unsigned flags); +void SANITIZER_CDECL __tsan_destroy_fiber(void *fiber); +void SANITIZER_CDECL __tsan_switch_to_fiber(void *fiber, unsigned flags); +void SANITIZER_CDECL __tsan_set_fiber_name(void *fiber, const char *name); + +// Flags for __tsan_switch_to_fiber: +// Do not establish a happens-before relation between fibers +static const unsigned __tsan_switch_to_fiber_no_sync = 1 << 0; + +// User-provided callback invoked on TSan initialization. +void SANITIZER_CDECL __tsan_on_initialize(); + +// User-provided callback invoked on TSan shutdown. +// `failed` - Nonzero if TSan did detect issues, zero otherwise. +// Return `0` if TSan should exit as if no issues were detected. Return nonzero +// if TSan should exit as if issues were detected. +int SANITIZER_CDECL __tsan_on_finalize(int failed); + +// Release TSan internal memory in a best-effort manner. +void SANITIZER_CDECL __tsan_flush_memory(); + +// User-provided default TSAN options. +const char *SANITIZER_CDECL __tsan_default_options(void); + +// User-provided default TSAN suppressions. +const char *SANITIZER_CDECL __tsan_default_suppressions(void); + +/// Returns a report's description. +/// +/// Returns a report's description (issue type), number of duplicate issues +/// found, counts of array data (stack traces, memory operations, locations, +/// mutexes, threads, unique thread IDs) and a stack trace of a sleep() +/// call (if one was involved in the issue). +/// +/// \param report Opaque pointer to the current report. +/// \param[out] description Report type description. +/// \param[out] count Count of duplicate issues. +/// \param[out] stack_count Count of stack traces. +/// \param[out] mop_count Count of memory operations. +/// \param[out] loc_count Count of locations. +/// \param[out] mutex_count Count of mutexes. +/// \param[out] thread_count Count of threads. +/// \param[out] unique_tid_count Count of unique thread IDs. +/// \param sleep_trace A buffer to store the stack trace of a sleep() +/// call. +/// \param trace_size Size in bytes of the trace buffer. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_data( + void *report, const char **description, int *count, int *stack_count, + int *mop_count, int *loc_count, int *mutex_count, int *thread_count, + int *unique_tid_count, void **sleep_trace, unsigned long trace_size); + +/// Returns information about stack traces included in the report. +/// +/// \param report Opaque pointer to the current report. +/// \param idx Index to the report's stacks. +/// \param trace A buffer to store the stack trace. +/// \param trace_size Size in bytes of the trace buffer. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_stack(void *report, unsigned long idx, + void **trace, + unsigned long trace_size); + +/// Returns information about memory operations included in the report. +/// +/// \param report Opaque pointer to the current report. +/// \param idx Index to the report's memory operations. +/// \param[out] tid Thread ID of the memory operation. +/// \param[out] addr Address of the memory operation. +/// \param[out] size Size of the memory operation. +/// \param[out] write Write flag of the memory operation. +/// \param[out] atomic Atomicity flag of the memory operation. +/// \param trace A buffer to store the stack trace. +/// \param trace_size Size in bytes of the trace buffer. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_mop(void *report, unsigned long idx, + int *tid, void **addr, int *size, + int *write, int *atomic, void **trace, + unsigned long trace_size); + +/// Returns information about locations included in the report. +/// +/// \param report Opaque pointer to the current report. +/// \param idx Index to the report's locations. +/// \param[out] type Type of the location. +/// \param[out] addr Address of the location. +/// \param[out] start Start of the location. +/// \param[out] size Size of the location. +/// \param[out] tid Thread ID of the location. +/// \param[out] fd File descriptor of the location. +/// \param[out] suppressable Suppressable flag. +/// \param trace A buffer to store the stack trace. +/// \param trace_size Size in bytes of the trace buffer. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_loc(void *report, unsigned long idx, + const char **type, void **addr, + void **start, unsigned long *size, + int *tid, int *fd, int *suppressable, + void **trace, + unsigned long trace_size); + +/// Returns information about mutexes included in the report. +/// +/// \param report Opaque pointer to the current report. +/// \param idx Index to the report's mutexes. +/// \param[out] mutex_id Id of the mutex. +/// \param[out] addr Address of the mutex. +/// \param[out] destroyed Destroyed mutex flag. +/// \param trace A buffer to store the stack trace. +/// \param trace_size Size in bytes of the trace buffer. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_mutex(void *report, unsigned long idx, + uint64_t *mutex_id, void **addr, + int *destroyed, void **trace, + unsigned long trace_size); + +/// Returns information about threads included in the report. +/// +/// \param report Opaque pointer to the current report. +/// \param idx Index to the report's threads. +/// \param[out] tid Thread ID of the thread. +/// \param[out] os_id Operating system's ID of the thread. +/// \param[out] running Running flag of the thread. +/// \param[out] name Name of the thread. +/// \param[out] parent_tid ID of the parent thread. +/// \param trace A buffer to store the stack trace. +/// \param trace_size Size in bytes of the trace buffer. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_thread(void *report, unsigned long idx, + int *tid, uint64_t *os_id, + int *running, const char **name, + int *parent_tid, void **trace, + unsigned long trace_size); + +/// Returns information about unique thread IDs included in the report. +/// +/// \param report Opaque pointer to the current report. +/// \param idx Index to the report's unique thread IDs. +/// \param[out] tid Unique thread ID of the report. +/// \returns Returns 1 if successful, 0 if not. +int SANITIZER_CDECL __tsan_get_report_unique_tid(void *report, + unsigned long idx, int *tid); + +/// Returns the current report. +/// +/// If TSan is currently reporting a detected issue on the current thread, +/// returns an opaque pointer to the current report. Otherwise returns NULL. +/// \returns An opaque pointer to the current report. Otherwise returns NULL. +void *SANITIZER_CDECL __tsan_get_current_report(); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_TSAN_INTERFACE_H diff --git a/llvm/lib/clang/19/include/sanitizer/tsan_interface_atomic.h b/llvm/lib/clang/19/include/sanitizer/tsan_interface_atomic.h new file mode 100644 index 0000000000000000000000000000000000000000..de3a1c3936097ddb4e5634ab44d2b6f9c37b6d5b --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/tsan_interface_atomic.h @@ -0,0 +1,228 @@ +//===-- tsan_interface_atomic.h ---------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of ThreadSanitizer (TSan), a race detector. +// +// Public interface header for TSan atomics. +//===----------------------------------------------------------------------===// +#ifndef TSAN_INTERFACE_ATOMIC_H +#define TSAN_INTERFACE_ATOMIC_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef char __tsan_atomic8; +typedef short __tsan_atomic16; +typedef int __tsan_atomic32; +typedef long __tsan_atomic64; +#if defined(__SIZEOF_INT128__) || \ + (__clang_major__ * 100 + __clang_minor__ >= 302) +__extension__ typedef __int128 __tsan_atomic128; +#define __TSAN_HAS_INT128 1 +#else +#define __TSAN_HAS_INT128 0 +#endif + +// Part of ABI, do not change. +// https://github.com/llvm/llvm-project/blob/main/libcxx/include/atomic +typedef enum { + __tsan_memory_order_relaxed, + __tsan_memory_order_consume, + __tsan_memory_order_acquire, + __tsan_memory_order_release, + __tsan_memory_order_acq_rel, + __tsan_memory_order_seq_cst +} __tsan_memory_order; + +__tsan_atomic8 SANITIZER_CDECL +__tsan_atomic8_load(const volatile __tsan_atomic8 *a, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL +__tsan_atomic16_load(const volatile __tsan_atomic16 *a, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL +__tsan_atomic32_load(const volatile __tsan_atomic32 *a, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL +__tsan_atomic64_load(const volatile __tsan_atomic64 *a, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_load( + const volatile __tsan_atomic128 *a, __tsan_memory_order mo); +#endif + +void SANITIZER_CDECL __tsan_atomic8_store(volatile __tsan_atomic8 *a, + __tsan_atomic8 v, + __tsan_memory_order mo); +void SANITIZER_CDECL __tsan_atomic16_store(volatile __tsan_atomic16 *a, + __tsan_atomic16 v, + __tsan_memory_order mo); +void SANITIZER_CDECL __tsan_atomic32_store(volatile __tsan_atomic32 *a, + __tsan_atomic32 v, + __tsan_memory_order mo); +void SANITIZER_CDECL __tsan_atomic64_store(volatile __tsan_atomic64 *a, + __tsan_atomic64 v, + __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +void SANITIZER_CDECL __tsan_atomic128_store(volatile __tsan_atomic128 *a, + __tsan_atomic128 v, + __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_exchange( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_exchange( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_exchange( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_exchange( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_exchange( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_fetch_add( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_fetch_add( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_fetch_add( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_fetch_add( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_fetch_add( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_fetch_sub( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_fetch_sub( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_fetch_sub( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_fetch_sub( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_fetch_sub( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_fetch_and( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_fetch_and( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_fetch_and( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_fetch_and( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_fetch_and( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_fetch_or( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_fetch_or( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_fetch_or( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_fetch_or( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_fetch_or( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_fetch_xor( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_fetch_xor( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_fetch_xor( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_fetch_xor( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_fetch_xor( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_fetch_nand( + volatile __tsan_atomic8 *a, __tsan_atomic8 v, __tsan_memory_order mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_fetch_nand( + volatile __tsan_atomic16 *a, __tsan_atomic16 v, __tsan_memory_order mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_fetch_nand( + volatile __tsan_atomic32 *a, __tsan_atomic32 v, __tsan_memory_order mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_fetch_nand( + volatile __tsan_atomic64 *a, __tsan_atomic64 v, __tsan_memory_order mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_fetch_nand( + volatile __tsan_atomic128 *a, __tsan_atomic128 v, __tsan_memory_order mo); +#endif + +int SANITIZER_CDECL __tsan_atomic8_compare_exchange_weak( + volatile __tsan_atomic8 *a, __tsan_atomic8 *c, __tsan_atomic8 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +int SANITIZER_CDECL __tsan_atomic16_compare_exchange_weak( + volatile __tsan_atomic16 *a, __tsan_atomic16 *c, __tsan_atomic16 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +int SANITIZER_CDECL __tsan_atomic32_compare_exchange_weak( + volatile __tsan_atomic32 *a, __tsan_atomic32 *c, __tsan_atomic32 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +int SANITIZER_CDECL __tsan_atomic64_compare_exchange_weak( + volatile __tsan_atomic64 *a, __tsan_atomic64 *c, __tsan_atomic64 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +#if __TSAN_HAS_INT128 +int SANITIZER_CDECL __tsan_atomic128_compare_exchange_weak( + volatile __tsan_atomic128 *a, __tsan_atomic128 *c, __tsan_atomic128 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +#endif + +int SANITIZER_CDECL __tsan_atomic8_compare_exchange_strong( + volatile __tsan_atomic8 *a, __tsan_atomic8 *c, __tsan_atomic8 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +int SANITIZER_CDECL __tsan_atomic16_compare_exchange_strong( + volatile __tsan_atomic16 *a, __tsan_atomic16 *c, __tsan_atomic16 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +int SANITIZER_CDECL __tsan_atomic32_compare_exchange_strong( + volatile __tsan_atomic32 *a, __tsan_atomic32 *c, __tsan_atomic32 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +int SANITIZER_CDECL __tsan_atomic64_compare_exchange_strong( + volatile __tsan_atomic64 *a, __tsan_atomic64 *c, __tsan_atomic64 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +#if __TSAN_HAS_INT128 +int SANITIZER_CDECL __tsan_atomic128_compare_exchange_strong( + volatile __tsan_atomic128 *a, __tsan_atomic128 *c, __tsan_atomic128 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +#endif + +__tsan_atomic8 SANITIZER_CDECL __tsan_atomic8_compare_exchange_val( + volatile __tsan_atomic8 *a, __tsan_atomic8 c, __tsan_atomic8 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +__tsan_atomic16 SANITIZER_CDECL __tsan_atomic16_compare_exchange_val( + volatile __tsan_atomic16 *a, __tsan_atomic16 c, __tsan_atomic16 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +__tsan_atomic32 SANITIZER_CDECL __tsan_atomic32_compare_exchange_val( + volatile __tsan_atomic32 *a, __tsan_atomic32 c, __tsan_atomic32 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +__tsan_atomic64 SANITIZER_CDECL __tsan_atomic64_compare_exchange_val( + volatile __tsan_atomic64 *a, __tsan_atomic64 c, __tsan_atomic64 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +#if __TSAN_HAS_INT128 +__tsan_atomic128 SANITIZER_CDECL __tsan_atomic128_compare_exchange_val( + volatile __tsan_atomic128 *a, __tsan_atomic128 c, __tsan_atomic128 v, + __tsan_memory_order mo, __tsan_memory_order fail_mo); +#endif + +void SANITIZER_CDECL __tsan_atomic_thread_fence(__tsan_memory_order mo); +void SANITIZER_CDECL __tsan_atomic_signal_fence(__tsan_memory_order mo); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // TSAN_INTERFACE_ATOMIC_H diff --git a/llvm/lib/clang/19/include/sanitizer/ubsan_interface.h b/llvm/lib/clang/19/include/sanitizer/ubsan_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..435eb1ae332cad1177eba8b5cd28d89ea1c43927 --- /dev/null +++ b/llvm/lib/clang/19/include/sanitizer/ubsan_interface.h @@ -0,0 +1,32 @@ +//===-- sanitizer/ubsan_interface.h -----------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of UBSanitizer (UBSan). +// +// Public interface header. +//===----------------------------------------------------------------------===// +#ifndef SANITIZER_UBSAN_INTERFACE_H +#define SANITIZER_UBSAN_INTERFACE_H + +#ifdef __cplusplus +extern "C" { +#endif +/// User-provided default option settings. +/// +/// You can provide your own implementation of this function to return a string +/// containing UBSan runtime options (for example, +/// verbosity=1:halt_on_error=0). +/// +/// \returns Default options string. +const char *SANITIZER_CDECL __ubsan_default_options(void); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // SANITIZER_UBSAN_INTERFACE_H diff --git a/llvm/lib/clang/19/include/serializeintrin.h b/llvm/lib/clang/19/include/serializeintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..b774e5a24a0ba85ebc78095f72b52ab19b962531 --- /dev/null +++ b/llvm/lib/clang/19/include/serializeintrin.h @@ -0,0 +1,30 @@ +/*===--------------- serializeintrin.h - serialize intrinsics --------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __SERIALIZEINTRIN_H +#define __SERIALIZEINTRIN_H + +/// Serialize instruction fetch and execution. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the SERIALIZE instruction. +/// +static __inline__ void +__attribute__((__always_inline__, __nodebug__, __target__("serialize"))) +_serialize (void) +{ + __builtin_ia32_serialize (); +} + +#endif /* __SERIALIZEINTRIN_H */ diff --git a/llvm/lib/clang/19/include/sgxintrin.h b/llvm/lib/clang/19/include/sgxintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..303a21f6b2e9fd6bcadbf060d3676445cd5c2da3 --- /dev/null +++ b/llvm/lib/clang/19/include/sgxintrin.h @@ -0,0 +1,60 @@ +/*===---- sgxintrin.h - X86 SGX intrinsics configuration -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __SGXINTRIN_H +#define __SGXINTRIN_H + +#if __has_extension(gnu_asm) + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("sgx"))) + +static __inline unsigned int __DEFAULT_FN_ATTRS +_enclu_u32(unsigned int __leaf, __SIZE_TYPE__ __d[]) +{ + unsigned int __result; + __asm__ ("enclu" + : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2]) + : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2]) + : "cc"); + return __result; +} + +static __inline unsigned int __DEFAULT_FN_ATTRS +_encls_u32(unsigned int __leaf, __SIZE_TYPE__ __d[]) +{ + unsigned int __result; + __asm__ ("encls" + : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2]) + : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2]) + : "cc"); + return __result; +} + +static __inline unsigned int __DEFAULT_FN_ATTRS +_enclv_u32(unsigned int __leaf, __SIZE_TYPE__ __d[]) +{ + unsigned int __result; + __asm__ ("enclv" + : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2]) + : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2]) + : "cc"); + return __result; +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __has_extension(gnu_asm) */ + +#endif diff --git a/llvm/lib/clang/19/include/sha512intrin.h b/llvm/lib/clang/19/include/sha512intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..065ef5dac25aad7b3115c065ece58a6e36d33e5d --- /dev/null +++ b/llvm/lib/clang/19/include/sha512intrin.h @@ -0,0 +1,200 @@ +/*===--------------- sha512intrin.h - SHA512 intrinsics -----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif // __IMMINTRIN_H + +#ifndef __SHA512INTRIN_H +#define __SHA512INTRIN_H + +#define __DEFAULT_FN_ATTRS256 \ + __attribute__((__always_inline__, __nodebug__, __target__("sha512"), \ + __min_vector_width__(256))) + +/// This intrinisc is one of the two SHA512 message scheduling instructions. +/// The intrinsic performs an intermediate calculation for the next four +/// SHA512 message qwords. The calculated results are stored in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_sha512msg1_epi64(__m256i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSHA512MSG1 instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x long long]. +/// \param __B +/// A 128-bit vector of [2 x long long]. +/// \returns +/// A 256-bit vector of [4 x long long]. +/// +/// \code{.operation} +/// DEFINE ROR64(qword, n) { +/// count := n % 64 +/// dest := (qword >> count) | (qword << (64 - count)) +/// RETURN dest +/// } +/// DEFINE SHR64(qword, n) { +/// RETURN qword >> n +/// } +/// DEFINE s0(qword): +/// RETURN ROR64(qword,1) ^ ROR64(qword, 8) ^ SHR64(qword, 7) +/// } +/// W[4] := __B.qword[0] +/// W[3] := __A.qword[3] +/// W[2] := __A.qword[2] +/// W[1] := __A.qword[1] +/// W[0] := __A.qword[0] +/// dst.qword[3] := W[3] + s0(W[4]) +/// dst.qword[2] := W[2] + s0(W[3]) +/// dst.qword[1] := W[1] + s0(W[2]) +/// dst.qword[0] := W[0] + s0(W[1]) +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_sha512msg1_epi64(__m256i __A, __m128i __B) { + return (__m256i)__builtin_ia32_vsha512msg1((__v4du)__A, (__v2du)__B); +} + +/// This intrinisc is one of the two SHA512 message scheduling instructions. +/// The intrinsic performs the final calculation for the next four SHA512 +/// message qwords. The calculated results are stored in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_sha512msg2_epi64(__m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSHA512MSG2 instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x long long]. +/// \param __B +/// A 256-bit vector of [4 x long long]. +/// \returns +/// A 256-bit vector of [4 x long long]. +/// +/// \code{.operation} +/// DEFINE ROR64(qword, n) { +/// count := n % 64 +/// dest := (qword >> count) | (qword << (64 - count)) +/// RETURN dest +/// } +/// DEFINE SHR64(qword, n) { +/// RETURN qword >> n +/// } +/// DEFINE s1(qword) { +/// RETURN ROR64(qword,19) ^ ROR64(qword, 61) ^ SHR64(qword, 6) +/// } +/// W[14] := __B.qword[2] +/// W[15] := __B.qword[3] +/// W[16] := __A.qword[0] + s1(W[14]) +/// W[17] := __A.qword[1] + s1(W[15]) +/// W[18] := __A.qword[2] + s1(W[16]) +/// W[19] := __A.qword[3] + s1(W[17]) +/// dst.qword[3] := W[19] +/// dst.qword[2] := W[18] +/// dst.qword[1] := W[17] +/// dst.qword[0] := W[16] +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_sha512msg2_epi64(__m256i __A, __m256i __B) { + return (__m256i)__builtin_ia32_vsha512msg2((__v4du)__A, (__v4du)__B); +} + +/// This intrinisc performs two rounds of SHA512 operation using initial SHA512 +/// state (C,D,G,H) from \a __A, an initial SHA512 state (A,B,E,F) from +/// \a __A, and a pre-computed sum of the next two round message qwords and +/// the corresponding round constants from \a __C (only the two lower qwords +/// of the third operand). The updated SHA512 state (A,B,E,F) is written to +/// \a __A, and \a __A can be used as the updated state (C,D,G,H) in later +/// rounds. +/// +/// \headerfile +/// +/// \code +/// __m256i _mm256_sha512rnds2_epi64(__m256i __A, __m256i __B, __m128i __C) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSHA512RNDS2 instruction. +/// +/// \param __A +/// A 256-bit vector of [4 x long long]. +/// \param __B +/// A 256-bit vector of [4 x long long]. +/// \param __C +/// A 128-bit vector of [2 x long long]. +/// \returns +/// A 256-bit vector of [4 x long long]. +/// +/// \code{.operation} +/// DEFINE ROR64(qword, n) { +/// count := n % 64 +/// dest := (qword >> count) | (qword << (64 - count)) +/// RETURN dest +/// } +/// DEFINE SHR64(qword, n) { +/// RETURN qword >> n +/// } +/// DEFINE cap_sigma0(qword) { +/// RETURN ROR64(qword,28) ^ ROR64(qword, 34) ^ ROR64(qword, 39) +/// } +/// DEFINE cap_sigma1(qword) { +/// RETURN ROR64(qword,14) ^ ROR64(qword, 18) ^ ROR64(qword, 41) +/// } +/// DEFINE MAJ(a,b,c) { +/// RETURN (a & b) ^ (a & c) ^ (b & c) +/// } +/// DEFINE CH(e,f,g) { +/// RETURN (e & f) ^ (g & ~e) +/// } +/// A[0] := __B.qword[3] +/// B[0] := __B.qword[2] +/// C[0] := __C.qword[3] +/// D[0] := __C.qword[2] +/// E[0] := __B.qword[1] +/// F[0] := __B.qword[0] +/// G[0] := __C.qword[1] +/// H[0] := __C.qword[0] +/// WK[0]:= __A.qword[0] +/// WK[1]:= __A.qword[1] +/// FOR i := 0 to 1: +/// A[i+1] := CH(E[i], F[i], G[i]) + +/// cap_sigma1(E[i]) + WK[i] + H[i] + +/// MAJ(A[i], B[i], C[i]) + +/// cap_sigma0(A[i]) +/// B[i+1] := A[i] +/// C[i+1] := B[i] +/// D[i+1] := C[i] +/// E[i+1] := CH(E[i], F[i], G[i]) + +/// cap_sigma1(E[i]) + WK[i] + H[i] + D[i] +/// F[i+1] := E[i] +/// G[i+1] := F[i] +/// H[i+1] := G[i] +/// ENDFOR +/// dst.qword[3] := A[2] +/// dst.qword[2] := B[2] +/// dst.qword[1] := E[2] +/// dst.qword[0] := F[2] +/// dst[MAX:256] := 0 +/// \endcode +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_sha512rnds2_epi64(__m256i __A, __m256i __B, __m128i __C) { + return (__m256i)__builtin_ia32_vsha512rnds2((__v4du)__A, (__v4du)__B, + (__v2du)__C); +} + +#undef __DEFAULT_FN_ATTRS256 + +#endif // __SHA512INTRIN_H diff --git a/llvm/lib/clang/19/include/shaintrin.h b/llvm/lib/clang/19/include/shaintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..232e1fa298230f3553f8b972c761fa8a3e069262 --- /dev/null +++ b/llvm/lib/clang/19/include/shaintrin.h @@ -0,0 +1,189 @@ +/*===---- shaintrin.h - SHA intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __SHAINTRIN_H +#define __SHAINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sha"), __min_vector_width__(128))) + +/// Performs four iterations of the inner loop of the SHA-1 message digest +/// algorithm using the starting SHA-1 state (A, B, C, D) from the 128-bit +/// vector of [4 x i32] in \a V1 and the next four 32-bit elements of the +/// message from the 128-bit vector of [4 x i32] in \a V2. Note that the +/// SHA-1 state variable E must have already been added to \a V2 +/// (\c _mm_sha1nexte_epu32() can perform this step). Returns the updated +/// SHA-1 state (A, B, C, D) as a 128-bit vector of [4 x i32]. +/// +/// The SHA-1 algorithm has an inner loop of 80 iterations, twenty each +/// with a different combining function and rounding constant. This +/// intrinsic performs four iterations using a combining function and +/// rounding constant selected by \a M[1:0]. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_sha1rnds4_epu32(__m128i V1, __m128i V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the \c SHA1RNDS4 instruction. +/// +/// \param V1 +/// A 128-bit vector of [4 x i32] containing the initial SHA-1 state. +/// \param V2 +/// A 128-bit vector of [4 x i32] containing the next four elements of +/// the message, plus SHA-1 state variable E. +/// \param M +/// An immediate value where bits [1:0] select among four possible +/// combining functions and rounding constants (not specified here). +/// \returns A 128-bit vector of [4 x i32] containing the updated SHA-1 state. +#define _mm_sha1rnds4_epu32(V1, V2, M) \ + __builtin_ia32_sha1rnds4((__v4si)(__m128i)(V1), (__v4si)(__m128i)(V2), (M)) + +/// Calculates the SHA-1 state variable E from the SHA-1 state variables in +/// the 128-bit vector of [4 x i32] in \a __X, adds that to the next set of +/// four message elements in the 128-bit vector of [4 x i32] in \a __Y, and +/// returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c SHA1NEXTE instruction. +/// +/// \param __X +/// A 128-bit vector of [4 x i32] containing the current SHA-1 state. +/// \param __Y +/// A 128-bit vector of [4 x i32] containing the next four elements of the +/// message. +/// \returns A 128-bit vector of [4 x i32] containing the updated SHA-1 +/// values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha1nexte_epu32(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_sha1nexte((__v4si)__X, (__v4si)__Y); +} + +/// Performs an intermediate calculation for deriving the next four SHA-1 +/// message elements using previous message elements from the 128-bit +/// vectors of [4 x i32] in \a __X and \a __Y, and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c SHA1MSG1 instruction. +/// +/// \param __X +/// A 128-bit vector of [4 x i32] containing previous message elements. +/// \param __Y +/// A 128-bit vector of [4 x i32] containing previous message elements. +/// \returns A 128-bit vector of [4 x i32] containing the derived SHA-1 +/// elements. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha1msg1_epu32(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_sha1msg1((__v4si)__X, (__v4si)__Y); +} + +/// Performs the final calculation for deriving the next four SHA-1 message +/// elements using previous message elements from the 128-bit vectors of +/// [4 x i32] in \a __X and \a __Y, and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c SHA1MSG2 instruction. +/// +/// \param __X +/// A 128-bit vector of [4 x i32] containing an intermediate result. +/// \param __Y +/// A 128-bit vector of [4 x i32] containing previous message values. +/// \returns A 128-bit vector of [4 x i32] containing the updated SHA-1 +/// values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha1msg2_epu32(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_sha1msg2((__v4si)__X, (__v4si)__Y); +} + +/// Performs two rounds of SHA-256 operation using the following inputs: a +/// starting SHA-256 state (C, D, G, H) from the 128-bit vector of +/// [4 x i32] in \a __X; a starting SHA-256 state (A, B, E, F) from the +/// 128-bit vector of [4 x i32] in \a __Y; and a pre-computed sum of the +/// next two message elements (unsigned 32-bit integers) and corresponding +/// rounding constants from the 128-bit vector of [4 x i32] in \a __Z. +/// Returns the updated SHA-256 state (A, B, E, F) as a 128-bit vector of +/// [4 x i32]. +/// +/// The SHA-256 algorithm has a core loop of 64 iterations. This intrinsic +/// performs two of those iterations. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c SHA256RNDS2 instruction. +/// +/// \param __X +/// A 128-bit vector of [4 x i32] containing part of the initial SHA-256 +/// state. +/// \param __Y +/// A 128-bit vector of [4 x i32] containing part of the initial SHA-256 +/// state. +/// \param __Z +/// A 128-bit vector of [4 x i32] containing additional input to the +/// SHA-256 operation. +/// \returns A 128-bit vector of [4 x i32] containing the updated SHA-1 state. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha256rnds2_epu32(__m128i __X, __m128i __Y, __m128i __Z) +{ + return (__m128i)__builtin_ia32_sha256rnds2((__v4si)__X, (__v4si)__Y, (__v4si)__Z); +} + +/// Performs an intermediate calculation for deriving the next four SHA-256 +/// message elements using previous message elements from the 128-bit +/// vectors of [4 x i32] in \a __X and \a __Y, and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c SHA256MSG1 instruction. +/// +/// \param __X +/// A 128-bit vector of [4 x i32] containing previous message elements. +/// \param __Y +/// A 128-bit vector of [4 x i32] containing previous message elements. +/// \returns A 128-bit vector of [4 x i32] containing the updated SHA-256 +/// values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha256msg1_epu32(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_sha256msg1((__v4si)__X, (__v4si)__Y); +} + +/// Performs the final calculation for deriving the next four SHA-256 message +/// elements using previous message elements from the 128-bit vectors of +/// [4 x i32] in \a __X and \a __Y, and returns the result. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c SHA256MSG2 instruction. +/// +/// \param __X +/// A 128-bit vector of [4 x i32] containing an intermediate result. +/// \param __Y +/// A 128-bit vector of [4 x i32] containing previous message values. +/// \returns A 128-bit vector of [4 x i32] containing the updated SHA-256 +/// values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha256msg2_epu32(__m128i __X, __m128i __Y) +{ + return (__m128i)__builtin_ia32_sha256msg2((__v4si)__X, (__v4si)__Y); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __SHAINTRIN_H */ diff --git a/llvm/lib/clang/19/include/sifive_vector.h b/llvm/lib/clang/19/include/sifive_vector.h new file mode 100644 index 0000000000000000000000000000000000000000..4e67ad6fca262ba88f353b5b8ee155b028183d61 --- /dev/null +++ b/llvm/lib/clang/19/include/sifive_vector.h @@ -0,0 +1,118 @@ +//===----- sifive_vector.h - SiFive Vector definitions --------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _SIFIVE_VECTOR_H_ +#define _SIFIVE_VECTOR_H_ + +#include "riscv_vector.h" + +#pragma clang riscv intrinsic sifive_vector + +#define __riscv_sf_vc_x_se_u8mf4(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 6, vl) +#define __riscv_sf_vc_x_se_u8mf2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 7, vl) +#define __riscv_sf_vc_x_se_u8m1(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 0, vl) +#define __riscv_sf_vc_x_se_u8m2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 1, vl) +#define __riscv_sf_vc_x_se_u8m4(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 2, vl) +#define __riscv_sf_vc_x_se_u8m8(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 3, vl) + +#define __riscv_sf_vc_x_se_u16mf2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint16_t)rs1, 16, 7, vl) +#define __riscv_sf_vc_x_se_u16m1(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint16_t)rs1, 16, 0, vl) +#define __riscv_sf_vc_x_se_u16m2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint16_t)rs1, 16, 1, vl) +#define __riscv_sf_vc_x_se_u16m4(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint16_t)rs1, 16, 2, vl) +#define __riscv_sf_vc_x_se_u16m8(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint16_t)rs1, 16, 3, vl) + +#define __riscv_sf_vc_x_se_u32m1(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 0, vl) +#define __riscv_sf_vc_x_se_u32m2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 1, vl) +#define __riscv_sf_vc_x_se_u32m4(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 2, vl) +#define __riscv_sf_vc_x_se_u32m8(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 3, vl) + +#define __riscv_sf_vc_i_se_u8mf4(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 7, vl) +#define __riscv_sf_vc_i_se_u8mf2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 6, vl) +#define __riscv_sf_vc_i_se_u8m1(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 0, vl) +#define __riscv_sf_vc_i_se_u8m2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 1, vl) +#define __riscv_sf_vc_i_se_u8m4(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 2, vl) +#define __riscv_sf_vc_i_se_u8m8(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 3, vl) + +#define __riscv_sf_vc_i_se_u16mf2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 16, 7, vl) +#define __riscv_sf_vc_i_se_u16m1(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 16, 0, vl) +#define __riscv_sf_vc_i_se_u16m2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 16, 1, vl) +#define __riscv_sf_vc_i_se_u16m4(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 16, 2, vl) +#define __riscv_sf_vc_i_se_u16m8(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 16, 3, vl) + +#define __riscv_sf_vc_i_se_u32m1(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 32, 0, vl) +#define __riscv_sf_vc_i_se_u32m2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 32, 1, vl) +#define __riscv_sf_vc_i_se_u32m4(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 32, 2, vl) +#define __riscv_sf_vc_i_se_u32m8(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 32, 3, vl) + +#if __riscv_v_elen >= 64 +#define __riscv_sf_vc_x_se_u8mf8(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint8_t)rs1, 8, 5, vl) +#define __riscv_sf_vc_x_se_u16mf4(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint16_t)rs1, 16, 6, vl) +#define __riscv_sf_vc_x_se_u32mf2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 7, vl) + +#define __riscv_sf_vc_i_se_u8mf8(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 5, vl) +#define __riscv_sf_vc_i_se_u16mf4(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 16, 6, vl) +#define __riscv_sf_vc_i_se_u32mf2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 32, 7, vl) + +#define __riscv_sf_vc_i_se_u64m1(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 64, 0, vl) +#define __riscv_sf_vc_i_se_u64m2(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 64, 1, vl) +#define __riscv_sf_vc_i_se_u64m4(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 64, 2, vl) +#define __riscv_sf_vc_i_se_u64m8(p27_26, p24_20, p11_7, simm5, vl) \ + __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 64, 3, vl) + +#if __riscv_xlen >= 64 +#define __riscv_sf_vc_x_se_u64m1(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint64_t)rs1, 64, 0, vl) +#define __riscv_sf_vc_x_se_u64m2(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint64_t)rs1, 64, 1, vl) +#define __riscv_sf_vc_x_se_u64m4(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint64_t)rs1, 64, 2, vl) +#define __riscv_sf_vc_x_se_u64m8(p27_26, p24_20, p11_7, rs1, vl) \ + __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint64_t)rs1, 64, 3, vl) +#endif +#endif + +#endif //_SIFIVE_VECTOR_H_ diff --git a/llvm/lib/clang/19/include/sm3intrin.h b/llvm/lib/clang/19/include/sm3intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..8a3d8bc9ef01498aa507a7e01912133aa97646d5 --- /dev/null +++ b/llvm/lib/clang/19/include/sm3intrin.h @@ -0,0 +1,238 @@ +/*===-------------------- sm3intrin.h - SM3 intrinsics ---------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif // __IMMINTRIN_H + +#ifndef __SM3INTRIN_H +#define __SM3INTRIN_H + +#define __DEFAULT_FN_ATTRS128 \ + __attribute__((__always_inline__, __nodebug__, __target__("sm3"), \ + __min_vector_width__(128))) + +/// This intrinisc is one of the two SM3 message scheduling intrinsics. The +/// intrinsic performs an initial calculation for the next four SM3 message +/// words. The calculated results are stored in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_sm3msg1_epi32(__m128i __A, __m128i __B, __m128i __C) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSM3MSG1 instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x int]. +/// \param __B +/// A 128-bit vector of [4 x int]. +/// \param __C +/// A 128-bit vector of [4 x int]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32 - count)) +/// RETURN dest +/// } +/// DEFINE P1(x) { +/// RETURN x ^ ROL32(x, 15) ^ ROL32(x, 23) +/// } +/// W[0] := __C.dword[0] +/// W[1] := __C.dword[1] +/// W[2] := __C.dword[2] +/// W[3] := __C.dword[3] +/// W[7] := __A.dword[0] +/// W[8] := __A.dword[1] +/// W[9] := __A.dword[2] +/// W[10] := __A.dword[3] +/// W[13] := __B.dword[0] +/// W[14] := __B.dword[1] +/// W[15] := __B.dword[2] +/// TMP0 := W[7] ^ W[0] ^ ROL32(W[13], 15) +/// TMP1 := W[8] ^ W[1] ^ ROL32(W[14], 15) +/// TMP2 := W[9] ^ W[2] ^ ROL32(W[15], 15) +/// TMP3 := W[10] ^ W[3] +/// dst.dword[0] := P1(TMP0) +/// dst.dword[1] := P1(TMP1) +/// dst.dword[2] := P1(TMP2) +/// dst.dword[3] := P1(TMP3) +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_sm3msg1_epi32(__m128i __A, + __m128i __B, + __m128i __C) { + return (__m128i)__builtin_ia32_vsm3msg1((__v4su)__A, (__v4su)__B, + (__v4su)__C); +} + +/// This intrinisc is one of the two SM3 message scheduling intrinsics. The +/// intrinsic performs the final calculation for the next four SM3 message +/// words. The calculated results are stored in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_sm3msg2_epi32(__m128i __A, __m128i __B, __m128i __C) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSM3MSG2 instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x int]. +/// \param __B +/// A 128-bit vector of [4 x int]. +/// \param __C +/// A 128-bit vector of [4 x int]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32-count)) +/// RETURN dest +/// } +/// WTMP[0] := __A.dword[0] +/// WTMP[1] := __A.dword[1] +/// WTMP[2] := __A.dword[2] +/// WTMP[3] := __A.dword[3] +/// W[3] := __B.dword[0] +/// W[4] := __B.dword[1] +/// W[5] := __B.dword[2] +/// W[6] := __B.dword[3] +/// W[10] := __C.dword[0] +/// W[11] := __C.dword[1] +/// W[12] := __C.dword[2] +/// W[13] := __C.dword[3] +/// W[16] := ROL32(W[3], 7) ^ W[10] ^ WTMP[0] +/// W[17] := ROL32(W[4], 7) ^ W[11] ^ WTMP[1] +/// W[18] := ROL32(W[5], 7) ^ W[12] ^ WTMP[2] +/// W[19] := ROL32(W[6], 7) ^ W[13] ^ WTMP[3] +/// W[19] := W[19] ^ ROL32(W[16], 6) ^ ROL32(W[16], 15) ^ ROL32(W[16], 30) +/// dst.dword[0] := W[16] +/// dst.dword[1] := W[17] +/// dst.dword[2] := W[18] +/// dst.dword[3] := W[19] +/// dst[MAX:128] := 0 +/// \endcode +static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_sm3msg2_epi32(__m128i __A, + __m128i __B, + __m128i __C) { + return (__m128i)__builtin_ia32_vsm3msg2((__v4su)__A, (__v4su)__B, + (__v4su)__C); +} + +/// This intrinsic performs two rounds of SM3 operation using initial SM3 state +/// (C, D, G, H) from \a __A, an initial SM3 states (A, B, E, F) +/// from \a __B and a pre-computed words from the \a __C. \a __A with +/// initial SM3 state of (C, D, G, H) assumes input of non-rotated left +/// variables from previous state. The updated SM3 state (A, B, E, F) is +/// written to \a __A. The \a imm8 should contain the even round number +/// for the first of the two rounds computed by this instruction. The +/// computation masks the \a imm8 value by AND’ing it with 0x3E so that only +/// even round numbers from 0 through 62 are used for this operation. The +/// calculated results are stored in \a dst. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_sm3rnds2_epi32(__m128i __A, __m128i __B, __m128i __C, const int +/// imm8) \endcode +/// +/// This intrinsic corresponds to the \c VSM3RNDS2 instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x int]. +/// \param __B +/// A 128-bit vector of [4 x int]. +/// \param __C +/// A 128-bit vector of [4 x int]. +/// \param imm8 +/// A 8-bit constant integer. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32-count)) +/// RETURN dest +/// } +/// DEFINE P0(dword) { +/// RETURN dword ^ ROL32(dword, 9) ^ ROL32(dword, 17) +/// } +/// DEFINE FF(x,y,z, round){ +/// IF round < 16 +/// RETURN (x ^ y ^ z) +/// ELSE +/// RETURN (x & y) | (x & z) | (y & z) +/// FI +/// } +/// DEFINE GG(x, y, z, round){ +/// IF round < 16 +/// RETURN (x ^ y ^ z) +/// ELSE +/// RETURN (x & y) | (~x & z) +/// FI +/// } +/// A[0] := __B.dword[3] +/// B[0] := __B.dword[2] +/// C[0] := __A.dword[3] +/// D[0] := __A.dword[2] +/// E[0] := __B.dword[1] +/// F[0] := __B.dword[0] +/// G[0] := __A.dword[1] +/// H[0] := __A.dword[0] +/// W[0] := __C.dword[0] +/// W[1] := __C.dword[1] +/// W[4] := __C.dword[2] +/// W[5] := __C.dword[3] +/// C[0] := ROL32(C[0], 9) +/// D[0] := ROL32(D[0], 9) +/// G[0] := ROL32(G[0], 19) +/// H[0] := ROL32(H[0], 19) +/// ROUND := __D & 0x3E +/// IF ROUND < 16 +/// CONST := 0x79CC4519 +/// ELSE +/// CONST := 0x7A879D8A +/// FI +/// CONST := ROL32(CONST,ROUND) +/// FOR i:= 0 to 1 +/// S1 := ROL32((ROL32(A[i], 12) + E[i] + CONST), 7) +/// S2 := S1 ^ ROL32(A[i], 12) +/// T1 := FF(A[i], B[i], C[i], ROUND) + D[i] + S2 + (W[i] ^ W[i+4]) +/// T2 := GG(E[i], F[i], G[i], ROUND) + H[i] + S1 + W[i] +/// D[i+1] := C[i] +/// C[i+1] := ROL32(B[i],9) +/// B[i+1] := A[i] +/// A[i+1] := T1 +/// H[i+1] := G[i] +/// G[i+1] := ROL32(F[i], 19) +/// F[i+1] := E[i] +/// E[i+1] := P0(T2) +/// CONST := ROL32(CONST, 1) +/// ENDFOR +/// dst.dword[3] := A[2] +/// dst.dword[2] := B[2] +/// dst.dword[1] := E[2] +/// dst.dword[0] := F[2] +/// dst[MAX:128] := 0 +/// \endcode +#define _mm_sm3rnds2_epi32(A, B, C, D) \ + (__m128i) __builtin_ia32_vsm3rnds2((__v4su)A, (__v4su)B, (__v4su)C, (int)D) + +#undef __DEFAULT_FN_ATTRS128 + +#endif // __SM3INTRIN_H diff --git a/llvm/lib/clang/19/include/sm4intrin.h b/llvm/lib/clang/19/include/sm4intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..47aeec46a6fcf528c9aed7062160cb1232045a03 --- /dev/null +++ b/llvm/lib/clang/19/include/sm4intrin.h @@ -0,0 +1,269 @@ +/*===--------------- sm4intrin.h - SM4 intrinsics -----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif // __IMMINTRIN_H + +#ifndef __SM4INTRIN_H +#define __SM4INTRIN_H + +/// This intrinsic performs four rounds of SM4 key expansion. The intrinsic +/// operates on independent 128-bit lanes. The calculated results are +/// stored in \a dst. +/// \headerfile +/// +/// \code +/// __m128i _mm_sm4key4_epi32(__m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSM4KEY4 instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x int]. +/// \param __B +/// A 128-bit vector of [4 x int]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32-count)) +/// RETURN dest +/// } +/// DEFINE SBOX_BYTE(dword, i) { +/// RETURN sbox[dword.byte[i]] +/// } +/// DEFINE lower_t(dword) { +/// tmp.byte[0] := SBOX_BYTE(dword, 0) +/// tmp.byte[1] := SBOX_BYTE(dword, 1) +/// tmp.byte[2] := SBOX_BYTE(dword, 2) +/// tmp.byte[3] := SBOX_BYTE(dword, 3) +/// RETURN tmp +/// } +/// DEFINE L_KEY(dword) { +/// RETURN dword ^ ROL32(dword, 13) ^ ROL32(dword, 23) +/// } +/// DEFINE T_KEY(dword) { +/// RETURN L_KEY(lower_t(dword)) +/// } +/// DEFINE F_KEY(X0, X1, X2, X3, round_key) { +/// RETURN X0 ^ T_KEY(X1 ^ X2 ^ X3 ^ round_key) +/// } +/// FOR i:= 0 to 0 +/// P[0] := __B.xmm[i].dword[0] +/// P[1] := __B.xmm[i].dword[1] +/// P[2] := __B.xmm[i].dword[2] +/// P[3] := __B.xmm[i].dword[3] +/// C[0] := F_KEY(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0]) +/// C[1] := F_KEY(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1]) +/// C[2] := F_KEY(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2]) +/// C[3] := F_KEY(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3]) +/// DEST.xmm[i].dword[0] := C[0] +/// DEST.xmm[i].dword[1] := C[1] +/// DEST.xmm[i].dword[2] := C[2] +/// DEST.xmm[i].dword[3] := C[3] +/// ENDFOR +/// DEST[MAX:128] := 0 +/// \endcode +#define _mm_sm4key4_epi32(A, B) \ + (__m128i) __builtin_ia32_vsm4key4128((__v4su)A, (__v4su)B) + +/// This intrinsic performs four rounds of SM4 key expansion. The intrinsic +/// operates on independent 128-bit lanes. The calculated results are +/// stored in \a dst. +/// \headerfile +/// +/// \code +/// __m256i _mm256_sm4key4_epi32(__m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSM4KEY4 instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x int]. +/// \param __B +/// A 256-bit vector of [8 x int]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32-count)) +/// RETURN dest +/// } +/// DEFINE SBOX_BYTE(dword, i) { +/// RETURN sbox[dword.byte[i]] +/// } +/// DEFINE lower_t(dword) { +/// tmp.byte[0] := SBOX_BYTE(dword, 0) +/// tmp.byte[1] := SBOX_BYTE(dword, 1) +/// tmp.byte[2] := SBOX_BYTE(dword, 2) +/// tmp.byte[3] := SBOX_BYTE(dword, 3) +/// RETURN tmp +/// } +/// DEFINE L_KEY(dword) { +/// RETURN dword ^ ROL32(dword, 13) ^ ROL32(dword, 23) +/// } +/// DEFINE T_KEY(dword) { +/// RETURN L_KEY(lower_t(dword)) +/// } +/// DEFINE F_KEY(X0, X1, X2, X3, round_key) { +/// RETURN X0 ^ T_KEY(X1 ^ X2 ^ X3 ^ round_key) +/// } +/// FOR i:= 0 to 1 +/// P[0] := __B.xmm[i].dword[0] +/// P[1] := __B.xmm[i].dword[1] +/// P[2] := __B.xmm[i].dword[2] +/// P[3] := __B.xmm[i].dword[3] +/// C[0] := F_KEY(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0]) +/// C[1] := F_KEY(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1]) +/// C[2] := F_KEY(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2]) +/// C[3] := F_KEY(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3]) +/// DEST.xmm[i].dword[0] := C[0] +/// DEST.xmm[i].dword[1] := C[1] +/// DEST.xmm[i].dword[2] := C[2] +/// DEST.xmm[i].dword[3] := C[3] +/// ENDFOR +/// DEST[MAX:256] := 0 +/// \endcode +#define _mm256_sm4key4_epi32(A, B) \ + (__m256i) __builtin_ia32_vsm4key4256((__v8su)A, (__v8su)B) + +/// This intrinisc performs four rounds of SM4 encryption. The intrinisc +/// operates on independent 128-bit lanes. The calculated results are +/// stored in \a dst. +/// \headerfile +/// +/// \code +/// __m128i _mm_sm4rnds4_epi32(__m128i __A, __m128i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSM4RNDS4 instruction. +/// +/// \param __A +/// A 128-bit vector of [4 x int]. +/// \param __B +/// A 128-bit vector of [4 x int]. +/// \returns +/// A 128-bit vector of [4 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32-count)) +/// RETURN dest +/// } +/// DEFINE lower_t(dword) { +/// tmp.byte[0] := SBOX_BYTE(dword, 0) +/// tmp.byte[1] := SBOX_BYTE(dword, 1) +/// tmp.byte[2] := SBOX_BYTE(dword, 2) +/// tmp.byte[3] := SBOX_BYTE(dword, 3) +/// RETURN tmp +/// } +/// DEFINE L_RND(dword) { +/// tmp := dword +/// tmp := tmp ^ ROL32(dword, 2) +/// tmp := tmp ^ ROL32(dword, 10) +/// tmp := tmp ^ ROL32(dword, 18) +/// tmp := tmp ^ ROL32(dword, 24) +/// RETURN tmp +/// } +/// DEFINE T_RND(dword) { +/// RETURN L_RND(lower_t(dword)) +/// } +/// DEFINE F_RND(X0, X1, X2, X3, round_key) { +/// RETURN X0 ^ T_RND(X1 ^ X2 ^ X3 ^ round_key) +/// } +/// FOR i:= 0 to 0 +/// P[0] := __B.xmm[i].dword[0] +/// P[1] := __B.xmm[i].dword[1] +/// P[2] := __B.xmm[i].dword[2] +/// P[3] := __B.xmm[i].dword[3] +/// C[0] := F_RND(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0]) +/// C[1] := F_RND(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1]) +/// C[2] := F_RND(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2]) +/// C[3] := F_RND(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3]) +/// DEST.xmm[i].dword[0] := C[0] +/// DEST.xmm[i].dword[1] := C[1] +/// DEST.xmm[i].dword[2] := C[2] +/// DEST.xmm[i].dword[3] := C[3] +/// ENDFOR +/// DEST[MAX:128] := 0 +/// \endcode +#define _mm_sm4rnds4_epi32(A, B) \ + (__m128i) __builtin_ia32_vsm4rnds4128((__v4su)A, (__v4su)B) + +/// This intrinisc performs four rounds of SM4 encryption. The intrinisc +/// operates on independent 128-bit lanes. The calculated results are +/// stored in \a dst. +/// \headerfile +/// +/// \code +/// __m256i _mm256_sm4rnds4_epi32(__m256i __A, __m256i __B) +/// \endcode +/// +/// This intrinsic corresponds to the \c VSM4RNDS4 instruction. +/// +/// \param __A +/// A 256-bit vector of [8 x int]. +/// \param __B +/// A 256-bit vector of [8 x int]. +/// \returns +/// A 256-bit vector of [8 x int]. +/// +/// \code{.operation} +/// DEFINE ROL32(dword, n) { +/// count := n % 32 +/// dest := (dword << count) | (dword >> (32-count)) +/// RETURN dest +/// } +/// DEFINE lower_t(dword) { +/// tmp.byte[0] := SBOX_BYTE(dword, 0) +/// tmp.byte[1] := SBOX_BYTE(dword, 1) +/// tmp.byte[2] := SBOX_BYTE(dword, 2) +/// tmp.byte[3] := SBOX_BYTE(dword, 3) +/// RETURN tmp +/// } +/// DEFINE L_RND(dword) { +/// tmp := dword +/// tmp := tmp ^ ROL32(dword, 2) +/// tmp := tmp ^ ROL32(dword, 10) +/// tmp := tmp ^ ROL32(dword, 18) +/// tmp := tmp ^ ROL32(dword, 24) +/// RETURN tmp +/// } +/// DEFINE T_RND(dword) { +/// RETURN L_RND(lower_t(dword)) +/// } +/// DEFINE F_RND(X0, X1, X2, X3, round_key) { +/// RETURN X0 ^ T_RND(X1 ^ X2 ^ X3 ^ round_key) +/// } +/// FOR i:= 0 to 0 +/// P[0] := __B.xmm[i].dword[0] +/// P[1] := __B.xmm[i].dword[1] +/// P[2] := __B.xmm[i].dword[2] +/// P[3] := __B.xmm[i].dword[3] +/// C[0] := F_RND(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0]) +/// C[1] := F_RND(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1]) +/// C[2] := F_RND(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2]) +/// C[3] := F_RND(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3]) +/// DEST.xmm[i].dword[0] := C[0] +/// DEST.xmm[i].dword[1] := C[1] +/// DEST.xmm[i].dword[2] := C[2] +/// DEST.xmm[i].dword[3] := C[3] +/// ENDFOR +/// DEST[MAX:256] := 0 +/// \endcode +#define _mm256_sm4rnds4_epi32(A, B) \ + (__m256i) __builtin_ia32_vsm4rnds4256((__v8su)A, (__v8su)B) + +#endif // __SM4INTRIN_H diff --git a/llvm/lib/clang/19/include/smmintrin.h b/llvm/lib/clang/19/include/smmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..b3fec474e35a1e03e7b4de6e434355a959caeb25 --- /dev/null +++ b/llvm/lib/clang/19/include/smmintrin.h @@ -0,0 +1,2328 @@ +/*===---- smmintrin.h - SSE4 intrinsics ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __SMMINTRIN_H +#define __SMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("sse4.1,no-evex512"), __min_vector_width__(128))) + +/* SSE4 Rounding macros. */ +#define _MM_FROUND_TO_NEAREST_INT 0x00 +#define _MM_FROUND_TO_NEG_INF 0x01 +#define _MM_FROUND_TO_POS_INF 0x02 +#define _MM_FROUND_TO_ZERO 0x03 +#define _MM_FROUND_CUR_DIRECTION 0x04 + +#define _MM_FROUND_RAISE_EXC 0x00 +#define _MM_FROUND_NO_EXC 0x08 + +#define _MM_FROUND_NINT (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_NEAREST_INT) +#define _MM_FROUND_FLOOR (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_NEG_INF) +#define _MM_FROUND_CEIL (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_POS_INF) +#define _MM_FROUND_TRUNC (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_ZERO) +#define _MM_FROUND_RINT (_MM_FROUND_RAISE_EXC | _MM_FROUND_CUR_DIRECTION) +#define _MM_FROUND_NEARBYINT (_MM_FROUND_NO_EXC | _MM_FROUND_CUR_DIRECTION) + +/// Rounds up each element of the 128-bit vector of [4 x float] to an +/// integer and returns the rounded values in a 128-bit vector of +/// [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_ceil_ps(__m128 X); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPS / ROUNDPS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float] values to be rounded up. +/// \returns A 128-bit vector of [4 x float] containing the rounded values. +#define _mm_ceil_ps(X) _mm_round_ps((X), _MM_FROUND_CEIL) + +/// Rounds up each element of the 128-bit vector of [2 x double] to an +/// integer and returns the rounded values in a 128-bit vector of +/// [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_ceil_pd(__m128d X); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPD / ROUNDPD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double] values to be rounded up. +/// \returns A 128-bit vector of [2 x double] containing the rounded values. +#define _mm_ceil_pd(X) _mm_round_pd((X), _MM_FROUND_CEIL) + +/// Copies three upper elements of the first 128-bit vector operand to +/// the corresponding three upper elements of the 128-bit result vector of +/// [4 x float]. Rounds up the lowest element of the second 128-bit vector +/// operand to an integer and copies it to the lowest element of the 128-bit +/// result vector of [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_ceil_ss(__m128 X, __m128 Y); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDSS / ROUNDSS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float]. The values stored in bits [127:32] are +/// copied to the corresponding bits of the result. +/// \param Y +/// A 128-bit vector of [4 x float]. The value stored in bits [31:0] is +/// rounded up to the nearest integer and copied to the corresponding bits +/// of the result. +/// \returns A 128-bit vector of [4 x float] containing the copied and rounded +/// values. +#define _mm_ceil_ss(X, Y) _mm_round_ss((X), (Y), _MM_FROUND_CEIL) + +/// Copies the upper element of the first 128-bit vector operand to the +/// corresponding upper element of the 128-bit result vector of [2 x double]. +/// Rounds up the lower element of the second 128-bit vector operand to an +/// integer and copies it to the lower element of the 128-bit result vector +/// of [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_ceil_sd(__m128d X, __m128d Y); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDSD / ROUNDSD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double]. The value stored in bits [127:64] is +/// copied to the corresponding bits of the result. +/// \param Y +/// A 128-bit vector of [2 x double]. The value stored in bits [63:0] is +/// rounded up to the nearest integer and copied to the corresponding bits +/// of the result. +/// \returns A 128-bit vector of [2 x double] containing the copied and rounded +/// values. +#define _mm_ceil_sd(X, Y) _mm_round_sd((X), (Y), _MM_FROUND_CEIL) + +/// Rounds down each element of the 128-bit vector of [4 x float] to an +/// an integer and returns the rounded values in a 128-bit vector of +/// [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_floor_ps(__m128 X); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPS / ROUNDPS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float] values to be rounded down. +/// \returns A 128-bit vector of [4 x float] containing the rounded values. +#define _mm_floor_ps(X) _mm_round_ps((X), _MM_FROUND_FLOOR) + +/// Rounds down each element of the 128-bit vector of [2 x double] to an +/// integer and returns the rounded values in a 128-bit vector of +/// [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_floor_pd(__m128d X); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPD / ROUNDPD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double]. +/// \returns A 128-bit vector of [2 x double] containing the rounded values. +#define _mm_floor_pd(X) _mm_round_pd((X), _MM_FROUND_FLOOR) + +/// Copies three upper elements of the first 128-bit vector operand to +/// the corresponding three upper elements of the 128-bit result vector of +/// [4 x float]. Rounds down the lowest element of the second 128-bit vector +/// operand to an integer and copies it to the lowest element of the 128-bit +/// result vector of [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_floor_ss(__m128 X, __m128 Y); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDSS / ROUNDSS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float]. The values stored in bits [127:32] are +/// copied to the corresponding bits of the result. +/// \param Y +/// A 128-bit vector of [4 x float]. The value stored in bits [31:0] is +/// rounded down to the nearest integer and copied to the corresponding bits +/// of the result. +/// \returns A 128-bit vector of [4 x float] containing the copied and rounded +/// values. +#define _mm_floor_ss(X, Y) _mm_round_ss((X), (Y), _MM_FROUND_FLOOR) + +/// Copies the upper element of the first 128-bit vector operand to the +/// corresponding upper element of the 128-bit result vector of [2 x double]. +/// Rounds down the lower element of the second 128-bit vector operand to an +/// integer and copies it to the lower element of the 128-bit result vector +/// of [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_floor_sd(__m128d X, __m128d Y); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDSD / ROUNDSD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double]. The value stored in bits [127:64] is +/// copied to the corresponding bits of the result. +/// \param Y +/// A 128-bit vector of [2 x double]. The value stored in bits [63:0] is +/// rounded down to the nearest integer and copied to the corresponding bits +/// of the result. +/// \returns A 128-bit vector of [2 x double] containing the copied and rounded +/// values. +#define _mm_floor_sd(X, Y) _mm_round_sd((X), (Y), _MM_FROUND_FLOOR) + +/// Rounds each element of the 128-bit vector of [4 x float] to an +/// integer value according to the rounding control specified by the second +/// argument and returns the rounded values in a 128-bit vector of +/// [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_round_ps(__m128 X, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPS / ROUNDPS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float]. +/// \param M +/// An integer value that specifies the rounding operation. \n +/// Bits [7:4] are reserved. \n +/// Bit [3] is a precision exception value: \n +/// 0: A normal PE exception is used \n +/// 1: The PE field is not updated \n +/// Bit [2] is the rounding control source: \n +/// 0: Use bits [1:0] of \a M \n +/// 1: Use the current MXCSR setting \n +/// Bits [1:0] contain the rounding control definition: \n +/// 00: Nearest \n +/// 01: Downward (toward negative infinity) \n +/// 10: Upward (toward positive infinity) \n +/// 11: Truncated +/// \returns A 128-bit vector of [4 x float] containing the rounded values. +#define _mm_round_ps(X, M) \ + ((__m128)__builtin_ia32_roundps((__v4sf)(__m128)(X), (M))) + +/// Copies three upper elements of the first 128-bit vector operand to +/// the corresponding three upper elements of the 128-bit result vector of +/// [4 x float]. Rounds the lowest element of the second 128-bit vector +/// operand to an integer value according to the rounding control specified +/// by the third argument and copies it to the lowest element of the 128-bit +/// result vector of [4 x float]. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_round_ss(__m128 X, __m128 Y, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDSS / ROUNDSS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float]. The values stored in bits [127:32] are +/// copied to the corresponding bits of the result. +/// \param Y +/// A 128-bit vector of [4 x float]. The value stored in bits [31:0] is +/// rounded to the nearest integer using the specified rounding control and +/// copied to the corresponding bits of the result. +/// \param M +/// An integer value that specifies the rounding operation. \n +/// Bits [7:4] are reserved. \n +/// Bit [3] is a precision exception value: \n +/// 0: A normal PE exception is used \n +/// 1: The PE field is not updated \n +/// Bit [2] is the rounding control source: \n +/// 0: Use bits [1:0] of \a M \n +/// 1: Use the current MXCSR setting \n +/// Bits [1:0] contain the rounding control definition: \n +/// 00: Nearest \n +/// 01: Downward (toward negative infinity) \n +/// 10: Upward (toward positive infinity) \n +/// 11: Truncated +/// \returns A 128-bit vector of [4 x float] containing the copied and rounded +/// values. +#define _mm_round_ss(X, Y, M) \ + ((__m128)__builtin_ia32_roundss((__v4sf)(__m128)(X), (__v4sf)(__m128)(Y), \ + (M))) + +/// Rounds each element of the 128-bit vector of [2 x double] to an +/// integer value according to the rounding control specified by the second +/// argument and returns the rounded values in a 128-bit vector of +/// [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_round_pd(__m128d X, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDPD / ROUNDPD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double]. +/// \param M +/// An integer value that specifies the rounding operation. \n +/// Bits [7:4] are reserved. \n +/// Bit [3] is a precision exception value: \n +/// 0: A normal PE exception is used \n +/// 1: The PE field is not updated \n +/// Bit [2] is the rounding control source: \n +/// 0: Use bits [1:0] of \a M \n +/// 1: Use the current MXCSR setting \n +/// Bits [1:0] contain the rounding control definition: \n +/// 00: Nearest \n +/// 01: Downward (toward negative infinity) \n +/// 10: Upward (toward positive infinity) \n +/// 11: Truncated +/// \returns A 128-bit vector of [2 x double] containing the rounded values. +#define _mm_round_pd(X, M) \ + ((__m128d)__builtin_ia32_roundpd((__v2df)(__m128d)(X), (M))) + +/// Copies the upper element of the first 128-bit vector operand to the +/// corresponding upper element of the 128-bit result vector of [2 x double]. +/// Rounds the lower element of the second 128-bit vector operand to an +/// integer value according to the rounding control specified by the third +/// argument and copies it to the lower element of the 128-bit result vector +/// of [2 x double]. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_round_sd(__m128d X, __m128d Y, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VROUNDSD / ROUNDSD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double]. The value stored in bits [127:64] is +/// copied to the corresponding bits of the result. +/// \param Y +/// A 128-bit vector of [2 x double]. The value stored in bits [63:0] is +/// rounded to the nearest integer using the specified rounding control and +/// copied to the corresponding bits of the result. +/// \param M +/// An integer value that specifies the rounding operation. \n +/// Bits [7:4] are reserved. \n +/// Bit [3] is a precision exception value: \n +/// 0: A normal PE exception is used \n +/// 1: The PE field is not updated \n +/// Bit [2] is the rounding control source: \n +/// 0: Use bits [1:0] of \a M \n +/// 1: Use the current MXCSR setting \n +/// Bits [1:0] contain the rounding control definition: \n +/// 00: Nearest \n +/// 01: Downward (toward negative infinity) \n +/// 10: Upward (toward positive infinity) \n +/// 11: Truncated +/// \returns A 128-bit vector of [2 x double] containing the copied and rounded +/// values. +#define _mm_round_sd(X, Y, M) \ + ((__m128d)__builtin_ia32_roundsd((__v2df)(__m128d)(X), (__v2df)(__m128d)(Y), \ + (M))) + +/* SSE4 Packed Blending Intrinsics. */ +/// Returns a 128-bit vector of [2 x double] where the values are +/// selected from either the first or second operand as specified by the +/// third operand, the control mask. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_blend_pd(__m128d V1, __m128d V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VBLENDPD / BLENDPD instruction. +/// +/// \param V1 +/// A 128-bit vector of [2 x double]. +/// \param V2 +/// A 128-bit vector of [2 x double]. +/// \param M +/// An immediate integer operand, with mask bits [1:0] specifying how the +/// values are to be copied. The position of the mask bit corresponds to the +/// index of a copied value. When a mask bit is 0, the corresponding 64-bit +/// element in operand \a V1 is copied to the same position in the result. +/// When a mask bit is 1, the corresponding 64-bit element in operand \a V2 +/// is copied to the same position in the result. +/// \returns A 128-bit vector of [2 x double] containing the copied values. +#define _mm_blend_pd(V1, V2, M) \ + ((__m128d)__builtin_ia32_blendpd((__v2df)(__m128d)(V1), \ + (__v2df)(__m128d)(V2), (int)(M))) + +/// Returns a 128-bit vector of [4 x float] where the values are selected +/// from either the first or second operand as specified by the third +/// operand, the control mask. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_blend_ps(__m128 V1, __m128 V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VBLENDPS / BLENDPS instruction. +/// +/// \param V1 +/// A 128-bit vector of [4 x float]. +/// \param V2 +/// A 128-bit vector of [4 x float]. +/// \param M +/// An immediate integer operand, with mask bits [3:0] specifying how the +/// values are to be copied. The position of the mask bit corresponds to the +/// index of a copied value. When a mask bit is 0, the corresponding 32-bit +/// element in operand \a V1 is copied to the same position in the result. +/// When a mask bit is 1, the corresponding 32-bit element in operand \a V2 +/// is copied to the same position in the result. +/// \returns A 128-bit vector of [4 x float] containing the copied values. +#define _mm_blend_ps(V1, V2, M) \ + ((__m128)__builtin_ia32_blendps((__v4sf)(__m128)(V1), (__v4sf)(__m128)(V2), \ + (int)(M))) + +/// Returns a 128-bit vector of [2 x double] where the values are +/// selected from either the first or second operand as specified by the +/// third operand, the control mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBLENDVPD / BLENDVPD instruction. +/// +/// \param __V1 +/// A 128-bit vector of [2 x double]. +/// \param __V2 +/// A 128-bit vector of [2 x double]. +/// \param __M +/// A 128-bit vector operand, with mask bits 127 and 63 specifying how the +/// values are to be copied. The position of the mask bit corresponds to the +/// most significant bit of a copied value. When a mask bit is 0, the +/// corresponding 64-bit element in operand \a __V1 is copied to the same +/// position in the result. When a mask bit is 1, the corresponding 64-bit +/// element in operand \a __V2 is copied to the same position in the result. +/// \returns A 128-bit vector of [2 x double] containing the copied values. +static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_blendv_pd(__m128d __V1, + __m128d __V2, + __m128d __M) { + return (__m128d)__builtin_ia32_blendvpd((__v2df)__V1, (__v2df)__V2, + (__v2df)__M); +} + +/// Returns a 128-bit vector of [4 x float] where the values are +/// selected from either the first or second operand as specified by the +/// third operand, the control mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBLENDVPS / BLENDVPS instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x float]. +/// \param __V2 +/// A 128-bit vector of [4 x float]. +/// \param __M +/// A 128-bit vector operand, with mask bits 127, 95, 63, and 31 specifying +/// how the values are to be copied. The position of the mask bit corresponds +/// to the most significant bit of a copied value. When a mask bit is 0, the +/// corresponding 32-bit element in operand \a __V1 is copied to the same +/// position in the result. When a mask bit is 1, the corresponding 32-bit +/// element in operand \a __V2 is copied to the same position in the result. +/// \returns A 128-bit vector of [4 x float] containing the copied values. +static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_blendv_ps(__m128 __V1, + __m128 __V2, + __m128 __M) { + return (__m128)__builtin_ia32_blendvps((__v4sf)__V1, (__v4sf)__V2, + (__v4sf)__M); +} + +/// Returns a 128-bit vector of [16 x i8] where the values are selected +/// from either of the first or second operand as specified by the third +/// operand, the control mask. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPBLENDVB / PBLENDVB instruction. +/// +/// \param __V1 +/// A 128-bit vector of [16 x i8]. +/// \param __V2 +/// A 128-bit vector of [16 x i8]. +/// \param __M +/// A 128-bit vector operand, with mask bits 127, 119, 111...7 specifying +/// how the values are to be copied. The position of the mask bit corresponds +/// to the most significant bit of a copied value. When a mask bit is 0, the +/// corresponding 8-bit element in operand \a __V1 is copied to the same +/// position in the result. When a mask bit is 1, the corresponding 8-bit +/// element in operand \a __V2 is copied to the same position in the result. +/// \returns A 128-bit vector of [16 x i8] containing the copied values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_blendv_epi8(__m128i __V1, + __m128i __V2, + __m128i __M) { + return (__m128i)__builtin_ia32_pblendvb128((__v16qi)__V1, (__v16qi)__V2, + (__v16qi)__M); +} + +/// Returns a 128-bit vector of [8 x i16] where the values are selected +/// from either of the first or second operand as specified by the third +/// operand, the control mask. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_blend_epi16(__m128i V1, __m128i V2, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPBLENDW / PBLENDW instruction. +/// +/// \param V1 +/// A 128-bit vector of [8 x i16]. +/// \param V2 +/// A 128-bit vector of [8 x i16]. +/// \param M +/// An immediate integer operand, with mask bits [7:0] specifying how the +/// values are to be copied. The position of the mask bit corresponds to the +/// index of a copied value. When a mask bit is 0, the corresponding 16-bit +/// element in operand \a V1 is copied to the same position in the result. +/// When a mask bit is 1, the corresponding 16-bit element in operand \a V2 +/// is copied to the same position in the result. +/// \returns A 128-bit vector of [8 x i16] containing the copied values. +#define _mm_blend_epi16(V1, V2, M) \ + ((__m128i)__builtin_ia32_pblendw128((__v8hi)(__m128i)(V1), \ + (__v8hi)(__m128i)(V2), (int)(M))) + +/* SSE4 Dword Multiply Instructions. */ +/// Multiples corresponding elements of two 128-bit vectors of [4 x i32] +/// and returns the lower 32 bits of the each product in a 128-bit vector of +/// [4 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMULLD / PMULLD instruction. +/// +/// \param __V1 +/// A 128-bit integer vector. +/// \param __V2 +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the products of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi32(__m128i __V1, + __m128i __V2) { + return (__m128i)((__v4su)__V1 * (__v4su)__V2); +} + +/// Multiplies corresponding even-indexed elements of two 128-bit +/// vectors of [4 x i32] and returns a 128-bit vector of [2 x i64] +/// containing the products. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMULDQ / PMULDQ instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x i32]. +/// \param __V2 +/// A 128-bit vector of [4 x i32]. +/// \returns A 128-bit vector of [2 x i64] containing the products of both +/// operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epi32(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_ia32_pmuldq128((__v4si)__V1, (__v4si)__V2); +} + +/* SSE4 Floating Point Dot Product Instructions. */ +/// Computes the dot product of the two 128-bit vectors of [4 x float] +/// and returns it in the elements of the 128-bit result vector of +/// [4 x float]. +/// +/// The immediate integer operand controls which input elements +/// will contribute to the dot product, and where the final results are +/// returned. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_dp_ps(__m128 X, __m128 Y, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VDPPS / DPPS instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float]. +/// \param Y +/// A 128-bit vector of [4 x float]. +/// \param M +/// An immediate integer operand. Mask bits [7:4] determine which elements +/// of the input vectors are used, with bit [4] corresponding to the lowest +/// element and bit [7] corresponding to the highest element of each [4 x +/// float] vector. If a bit is set, the corresponding elements from the two +/// input vectors are used as an input for dot product; otherwise that input +/// is treated as zero. Bits [3:0] determine which elements of the result +/// will receive a copy of the final dot product, with bit [0] corresponding +/// to the lowest element and bit [3] corresponding to the highest element of +/// each [4 x float] subvector. If a bit is set, the dot product is returned +/// in the corresponding element; otherwise that element is set to zero. +/// \returns A 128-bit vector of [4 x float] containing the dot product. +#define _mm_dp_ps(X, Y, M) \ + ((__m128)__builtin_ia32_dpps((__v4sf)(__m128)(X), (__v4sf)(__m128)(Y), (M))) + +/// Computes the dot product of the two 128-bit vectors of [2 x double] +/// and returns it in the elements of the 128-bit result vector of +/// [2 x double]. +/// +/// The immediate integer operand controls which input +/// elements will contribute to the dot product, and where the final results +/// are returned. +/// +/// \headerfile +/// +/// \code +/// __m128d _mm_dp_pd(__m128d X, __m128d Y, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VDPPD / DPPD instruction. +/// +/// \param X +/// A 128-bit vector of [2 x double]. +/// \param Y +/// A 128-bit vector of [2 x double]. +/// \param M +/// An immediate integer operand. Mask bits [5:4] determine which elements +/// of the input vectors are used, with bit [4] corresponding to the lowest +/// element and bit [5] corresponding to the highest element of each of [2 x +/// double] vector. If a bit is set, the corresponding elements from the two +/// input vectors are used as an input for dot product; otherwise that input +/// is treated as zero. Bits [1:0] determine which elements of the result +/// will receive a copy of the final dot product, with bit [0] corresponding +/// to the lowest element and bit [1] corresponding to the highest element of +/// each [2 x double] vector. If a bit is set, the dot product is returned in +/// the corresponding element; otherwise that element is set to zero. +#define _mm_dp_pd(X, Y, M) \ + ((__m128d)__builtin_ia32_dppd((__v2df)(__m128d)(X), (__v2df)(__m128d)(Y), \ + (M))) + +/* SSE4 Streaming Load Hint Instruction. */ +/// Loads integer values from a 128-bit aligned memory location to a +/// 128-bit integer vector. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTDQA / MOVNTDQA instruction. +/// +/// \param __V +/// A pointer to a 128-bit aligned memory location that contains the integer +/// values. +/// \returns A 128-bit integer vector containing the data stored at the +/// specified memory location. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_stream_load_si128(const void *__V) { + return (__m128i)__builtin_nontemporal_load((const __v2di *)__V); +} + +/* SSE4 Packed Integer Min/Max Instructions. */ +/// Compares the corresponding elements of two 128-bit vectors of +/// [16 x i8] and returns a 128-bit vector of [16 x i8] containing the lesser +/// of the two values. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMINSB / PMINSB instruction. +/// +/// \param __V1 +/// A 128-bit vector of [16 x i8]. +/// \param __V2 +/// A 128-bit vector of [16 x i8] +/// \returns A 128-bit vector of [16 x i8] containing the lesser values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi8(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_min((__v16qs)__V1, (__v16qs)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [16 x i8] and returns a 128-bit vector of [16 x i8] containing the +/// greater value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMAXSB / PMAXSB instruction. +/// +/// \param __V1 +/// A 128-bit vector of [16 x i8]. +/// \param __V2 +/// A 128-bit vector of [16 x i8]. +/// \returns A 128-bit vector of [16 x i8] containing the greater values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi8(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_max((__v16qs)__V1, (__v16qs)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [8 x u16] and returns a 128-bit vector of [8 x u16] containing the lesser +/// value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMINUW / PMINUW instruction. +/// +/// \param __V1 +/// A 128-bit vector of [8 x u16]. +/// \param __V2 +/// A 128-bit vector of [8 x u16]. +/// \returns A 128-bit vector of [8 x u16] containing the lesser values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu16(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_min((__v8hu)__V1, (__v8hu)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [8 x u16] and returns a 128-bit vector of [8 x u16] containing the +/// greater value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMAXUW / PMAXUW instruction. +/// +/// \param __V1 +/// A 128-bit vector of [8 x u16]. +/// \param __V2 +/// A 128-bit vector of [8 x u16]. +/// \returns A 128-bit vector of [8 x u16] containing the greater values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu16(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_max((__v8hu)__V1, (__v8hu)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [4 x i32] and returns a 128-bit vector of [4 x i32] containing the lesser +/// value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMINSD / PMINSD instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x i32]. +/// \param __V2 +/// A 128-bit vector of [4 x i32]. +/// \returns A 128-bit vector of [4 x i32] containing the lesser values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi32(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_min((__v4si)__V1, (__v4si)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [4 x i32] and returns a 128-bit vector of [4 x i32] containing the +/// greater value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMAXSD / PMAXSD instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x i32]. +/// \param __V2 +/// A 128-bit vector of [4 x i32]. +/// \returns A 128-bit vector of [4 x i32] containing the greater values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi32(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_max((__v4si)__V1, (__v4si)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [4 x u32] and returns a 128-bit vector of [4 x u32] containing the lesser +/// value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMINUD / PMINUD instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x u32]. +/// \param __V2 +/// A 128-bit vector of [4 x u32]. +/// \returns A 128-bit vector of [4 x u32] containing the lesser values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu32(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_min((__v4su)__V1, (__v4su)__V2); +} + +/// Compares the corresponding elements of two 128-bit vectors of +/// [4 x u32] and returns a 128-bit vector of [4 x u32] containing the +/// greater value of the two. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMAXUD / PMAXUD instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x u32]. +/// \param __V2 +/// A 128-bit vector of [4 x u32]. +/// \returns A 128-bit vector of [4 x u32] containing the greater values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_elementwise_max((__v4su)__V1, (__v4su)__V2); +} + +/* SSE4 Insertion and Extraction from XMM Register Instructions. */ +/// Takes the first argument \a X and inserts an element from the second +/// argument \a Y as selected by the third argument \a N. That result then +/// has elements zeroed out also as selected by the third argument \a N. The +/// resulting 128-bit vector of [4 x float] is then returned. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_insert_ps(__m128 X, __m128 Y, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VINSERTPS instruction. +/// +/// \param X +/// A 128-bit vector source operand of [4 x float]. With the exception of +/// those bits in the result copied from parameter \a Y and zeroed by bits +/// [3:0] of \a N, all bits from this parameter are copied to the result. +/// \param Y +/// A 128-bit vector source operand of [4 x float]. One single-precision +/// floating-point element from this source, as determined by the immediate +/// parameter, is copied to the result. +/// \param N +/// Specifies which bits from operand \a Y will be copied, which bits in the +/// result they will be copied to, and which bits in the result will be +/// cleared. The following assignments are made: \n +/// Bits [7:6] specify the bits to copy from operand \a Y: \n +/// 00: Selects bits [31:0] from operand \a Y. \n +/// 01: Selects bits [63:32] from operand \a Y. \n +/// 10: Selects bits [95:64] from operand \a Y. \n +/// 11: Selects bits [127:96] from operand \a Y. \n +/// Bits [5:4] specify the bits in the result to which the selected bits +/// from operand \a Y are copied: \n +/// 00: Copies the selected bits from \a Y to result bits [31:0]. \n +/// 01: Copies the selected bits from \a Y to result bits [63:32]. \n +/// 10: Copies the selected bits from \a Y to result bits [95:64]. \n +/// 11: Copies the selected bits from \a Y to result bits [127:96]. \n +/// Bits[3:0]: If any of these bits are set, the corresponding result +/// element is cleared. +/// \returns A 128-bit vector of [4 x float] containing the copied +/// single-precision floating point elements from the operands. +#define _mm_insert_ps(X, Y, N) __builtin_ia32_insertps128((X), (Y), (N)) + +/// Extracts a 32-bit integer from a 128-bit vector of [4 x float] and +/// returns it, using the immediate value parameter \a N as a selector. +/// +/// \headerfile +/// +/// \code +/// int _mm_extract_ps(__m128 X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VEXTRACTPS / EXTRACTPS +/// instruction. +/// +/// \param X +/// A 128-bit vector of [4 x float]. +/// \param N +/// An immediate value. Bits [1:0] determines which bits from the argument +/// \a X are extracted and returned: \n +/// 00: Bits [31:0] of parameter \a X are returned. \n +/// 01: Bits [63:32] of parameter \a X are returned. \n +/// 10: Bits [95:64] of parameter \a X are returned. \n +/// 11: Bits [127:96] of parameter \a X are returned. +/// \returns A 32-bit integer containing the extracted 32 bits of float data. +#define _mm_extract_ps(X, N) \ + __builtin_bit_cast( \ + int, __builtin_ia32_vec_ext_v4sf((__v4sf)(__m128)(X), (int)(N))) + +/* Miscellaneous insert and extract macros. */ +/* Extract a single-precision float from X at index N into D. */ +#define _MM_EXTRACT_FLOAT(D, X, N) \ + do { \ + (D) = __builtin_ia32_vec_ext_v4sf((__v4sf)(__m128)(X), (int)(N)); \ + } while (0) + +/* Or together 2 sets of indexes (X and Y) with the zeroing bits (Z) to create + an index suitable for _mm_insert_ps. */ +#define _MM_MK_INSERTPS_NDX(X, Y, Z) (((X) << 6) | ((Y) << 4) | (Z)) + +/* Extract a float from X at index N into the first index of the return. */ +#define _MM_PICK_OUT_PS(X, N) \ + _mm_insert_ps(_mm_setzero_ps(), (X), _MM_MK_INSERTPS_NDX((N), 0, 0x0e)) + +/* Insert int into packed integer array at index. */ +/// Constructs a 128-bit vector of [16 x i8] by first making a copy of +/// the 128-bit integer vector parameter, and then inserting the lower 8 bits +/// of an integer parameter \a I into an offset specified by the immediate +/// value parameter \a N. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_insert_epi8(__m128i X, int I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VPINSRB / PINSRB instruction. +/// +/// \param X +/// A 128-bit integer vector of [16 x i8]. This vector is copied to the +/// result and then one of the sixteen elements in the result vector is +/// replaced by the lower 8 bits of \a I. +/// \param I +/// An integer. The lower 8 bits of this operand are written to the result +/// beginning at the offset specified by \a N. +/// \param N +/// An immediate value. Bits [3:0] specify the bit offset in the result at +/// which the lower 8 bits of \a I are written. \n +/// 0000: Bits [7:0] of the result are used for insertion. \n +/// 0001: Bits [15:8] of the result are used for insertion. \n +/// 0010: Bits [23:16] of the result are used for insertion. \n +/// 0011: Bits [31:24] of the result are used for insertion. \n +/// 0100: Bits [39:32] of the result are used for insertion. \n +/// 0101: Bits [47:40] of the result are used for insertion. \n +/// 0110: Bits [55:48] of the result are used for insertion. \n +/// 0111: Bits [63:56] of the result are used for insertion. \n +/// 1000: Bits [71:64] of the result are used for insertion. \n +/// 1001: Bits [79:72] of the result are used for insertion. \n +/// 1010: Bits [87:80] of the result are used for insertion. \n +/// 1011: Bits [95:88] of the result are used for insertion. \n +/// 1100: Bits [103:96] of the result are used for insertion. \n +/// 1101: Bits [111:104] of the result are used for insertion. \n +/// 1110: Bits [119:112] of the result are used for insertion. \n +/// 1111: Bits [127:120] of the result are used for insertion. +/// \returns A 128-bit integer vector containing the constructed values. +#define _mm_insert_epi8(X, I, N) \ + ((__m128i)__builtin_ia32_vec_set_v16qi((__v16qi)(__m128i)(X), (int)(I), \ + (int)(N))) + +/// Constructs a 128-bit vector of [4 x i32] by first making a copy of +/// the 128-bit integer vector parameter, and then inserting the 32-bit +/// integer parameter \a I at the offset specified by the immediate value +/// parameter \a N. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_insert_epi32(__m128i X, int I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VPINSRD / PINSRD instruction. +/// +/// \param X +/// A 128-bit integer vector of [4 x i32]. This vector is copied to the +/// result and then one of the four elements in the result vector is +/// replaced by \a I. +/// \param I +/// A 32-bit integer that is written to the result beginning at the offset +/// specified by \a N. +/// \param N +/// An immediate value. Bits [1:0] specify the bit offset in the result at +/// which the integer \a I is written. \n +/// 00: Bits [31:0] of the result are used for insertion. \n +/// 01: Bits [63:32] of the result are used for insertion. \n +/// 10: Bits [95:64] of the result are used for insertion. \n +/// 11: Bits [127:96] of the result are used for insertion. +/// \returns A 128-bit integer vector containing the constructed values. +#define _mm_insert_epi32(X, I, N) \ + ((__m128i)__builtin_ia32_vec_set_v4si((__v4si)(__m128i)(X), (int)(I), \ + (int)(N))) + +#ifdef __x86_64__ +/// Constructs a 128-bit vector of [2 x i64] by first making a copy of +/// the 128-bit integer vector parameter, and then inserting the 64-bit +/// integer parameter \a I, using the immediate value parameter \a N as an +/// insertion location selector. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_insert_epi64(__m128i X, long long I, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VPINSRQ / PINSRQ instruction. +/// +/// \param X +/// A 128-bit integer vector of [2 x i64]. This vector is copied to the +/// result and then one of the two elements in the result vector is replaced +/// by \a I. +/// \param I +/// A 64-bit integer that is written to the result beginning at the offset +/// specified by \a N. +/// \param N +/// An immediate value. Bit [0] specifies the bit offset in the result at +/// which the integer \a I is written. \n +/// 0: Bits [63:0] of the result are used for insertion. \n +/// 1: Bits [127:64] of the result are used for insertion. \n +/// \returns A 128-bit integer vector containing the constructed values. +#define _mm_insert_epi64(X, I, N) \ + ((__m128i)__builtin_ia32_vec_set_v2di((__v2di)(__m128i)(X), (long long)(I), \ + (int)(N))) +#endif /* __x86_64__ */ + +/* Extract int from packed integer array at index. This returns the element + * as a zero extended value, so it is unsigned. + */ +/// Extracts an 8-bit element from the 128-bit integer vector of +/// [16 x i8], using the immediate value parameter \a N as a selector. +/// +/// \headerfile +/// +/// \code +/// int _mm_extract_epi8(__m128i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VPEXTRB / PEXTRB instruction. +/// +/// \param X +/// A 128-bit integer vector. +/// \param N +/// An immediate value. Bits [3:0] specify which 8-bit vector element from +/// the argument \a X to extract and copy to the result. \n +/// 0000: Bits [7:0] of parameter \a X are extracted. \n +/// 0001: Bits [15:8] of the parameter \a X are extracted. \n +/// 0010: Bits [23:16] of the parameter \a X are extracted. \n +/// 0011: Bits [31:24] of the parameter \a X are extracted. \n +/// 0100: Bits [39:32] of the parameter \a X are extracted. \n +/// 0101: Bits [47:40] of the parameter \a X are extracted. \n +/// 0110: Bits [55:48] of the parameter \a X are extracted. \n +/// 0111: Bits [63:56] of the parameter \a X are extracted. \n +/// 1000: Bits [71:64] of the parameter \a X are extracted. \n +/// 1001: Bits [79:72] of the parameter \a X are extracted. \n +/// 1010: Bits [87:80] of the parameter \a X are extracted. \n +/// 1011: Bits [95:88] of the parameter \a X are extracted. \n +/// 1100: Bits [103:96] of the parameter \a X are extracted. \n +/// 1101: Bits [111:104] of the parameter \a X are extracted. \n +/// 1110: Bits [119:112] of the parameter \a X are extracted. \n +/// 1111: Bits [127:120] of the parameter \a X are extracted. +/// \returns An unsigned integer, whose lower 8 bits are selected from the +/// 128-bit integer vector parameter and the remaining bits are assigned +/// zeros. +#define _mm_extract_epi8(X, N) \ + ((int)(unsigned char)__builtin_ia32_vec_ext_v16qi((__v16qi)(__m128i)(X), \ + (int)(N))) + +/// Extracts a 32-bit element from the 128-bit integer vector of +/// [4 x i32], using the immediate value parameter \a N as a selector. +/// +/// \headerfile +/// +/// \code +/// int _mm_extract_epi32(__m128i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VPEXTRD / PEXTRD instruction. +/// +/// \param X +/// A 128-bit integer vector. +/// \param N +/// An immediate value. Bits [1:0] specify which 32-bit vector element from +/// the argument \a X to extract and copy to the result. \n +/// 00: Bits [31:0] of the parameter \a X are extracted. \n +/// 01: Bits [63:32] of the parameter \a X are extracted. \n +/// 10: Bits [95:64] of the parameter \a X are extracted. \n +/// 11: Bits [127:96] of the parameter \a X are exracted. +/// \returns An integer, whose lower 32 bits are selected from the 128-bit +/// integer vector parameter and the remaining bits are assigned zeros. +#define _mm_extract_epi32(X, N) \ + ((int)__builtin_ia32_vec_ext_v4si((__v4si)(__m128i)(X), (int)(N))) + +/// Extracts a 64-bit element from the 128-bit integer vector of +/// [2 x i64], using the immediate value parameter \a N as a selector. +/// +/// \headerfile +/// +/// \code +/// long long _mm_extract_epi64(__m128i X, const int N); +/// \endcode +/// +/// This intrinsic corresponds to the VPEXTRQ / PEXTRQ instruction +/// in 64-bit mode. +/// +/// \param X +/// A 128-bit integer vector. +/// \param N +/// An immediate value. Bit [0] specifies which 64-bit vector element from +/// the argument \a X to return. \n +/// 0: Bits [63:0] are returned. \n +/// 1: Bits [127:64] are returned. \n +/// \returns A 64-bit integer. +#define _mm_extract_epi64(X, N) \ + ((long long)__builtin_ia32_vec_ext_v2di((__v2di)(__m128i)(X), (int)(N))) + +/* SSE4 128-bit Packed Integer Comparisons. */ +/// Tests whether the specified bits in a 128-bit integer vector are all +/// zeros. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPTEST / PTEST instruction. +/// +/// \param __M +/// A 128-bit integer vector containing the bits to be tested. +/// \param __V +/// A 128-bit integer vector selecting which bits to test in operand \a __M. +/// \returns TRUE if the specified bits are all zeros; FALSE otherwise. +static __inline__ int __DEFAULT_FN_ATTRS _mm_testz_si128(__m128i __M, + __m128i __V) { + return __builtin_ia32_ptestz128((__v2di)__M, (__v2di)__V); +} + +/// Tests whether the specified bits in a 128-bit integer vector are all +/// ones. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPTEST / PTEST instruction. +/// +/// \param __M +/// A 128-bit integer vector containing the bits to be tested. +/// \param __V +/// A 128-bit integer vector selecting which bits to test in operand \a __M. +/// \returns TRUE if the specified bits are all ones; FALSE otherwise. +static __inline__ int __DEFAULT_FN_ATTRS _mm_testc_si128(__m128i __M, + __m128i __V) { + return __builtin_ia32_ptestc128((__v2di)__M, (__v2di)__V); +} + +/// Tests whether the specified bits in a 128-bit integer vector are +/// neither all zeros nor all ones. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPTEST / PTEST instruction. +/// +/// \param __M +/// A 128-bit integer vector containing the bits to be tested. +/// \param __V +/// A 128-bit integer vector selecting which bits to test in operand \a __M. +/// \returns TRUE if the specified bits are neither all zeros nor all ones; +/// FALSE otherwise. +static __inline__ int __DEFAULT_FN_ATTRS _mm_testnzc_si128(__m128i __M, + __m128i __V) { + return __builtin_ia32_ptestnzc128((__v2di)__M, (__v2di)__V); +} + +/// Tests whether the specified bits in a 128-bit integer vector are all +/// ones. +/// +/// \headerfile +/// +/// \code +/// int _mm_test_all_ones(__m128i V); +/// \endcode +/// +/// This intrinsic corresponds to the VPTEST / PTEST instruction. +/// +/// \param V +/// A 128-bit integer vector containing the bits to be tested. +/// \returns TRUE if the bits specified in the operand are all set to 1; FALSE +/// otherwise. +#define _mm_test_all_ones(V) _mm_testc_si128((V), _mm_set1_epi32(-1)) + +/// Tests whether the specified bits in a 128-bit integer vector are +/// neither all zeros nor all ones. +/// +/// \headerfile +/// +/// \code +/// int _mm_test_mix_ones_zeros(__m128i M, __m128i V); +/// \endcode +/// +/// This intrinsic corresponds to the VPTEST / PTEST instruction. +/// +/// \param M +/// A 128-bit integer vector containing the bits to be tested. +/// \param V +/// A 128-bit integer vector selecting which bits to test in operand \a M. +/// \returns TRUE if the specified bits are neither all zeros nor all ones; +/// FALSE otherwise. +#define _mm_test_mix_ones_zeros(M, V) _mm_testnzc_si128((M), (V)) + +/// Tests whether the specified bits in a 128-bit integer vector are all +/// zeros. +/// +/// \headerfile +/// +/// \code +/// int _mm_test_all_zeros(__m128i M, __m128i V); +/// \endcode +/// +/// This intrinsic corresponds to the VPTEST / PTEST instruction. +/// +/// \param M +/// A 128-bit integer vector containing the bits to be tested. +/// \param V +/// A 128-bit integer vector selecting which bits to test in operand \a M. +/// \returns TRUE if the specified bits are all zeros; FALSE otherwise. +#define _mm_test_all_zeros(M, V) _mm_testz_si128((M), (V)) + +/* SSE4 64-bit Packed Integer Comparisons. */ +/// Compares each of the corresponding 64-bit values of the 128-bit +/// integer vectors for equality. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPEQQ / PCMPEQQ instruction. +/// +/// \param __V1 +/// A 128-bit integer vector. +/// \param __V2 +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi64(__m128i __V1, + __m128i __V2) { + return (__m128i)((__v2di)__V1 == (__v2di)__V2); +} + +/* SSE4 Packed Integer Sign-Extension. */ +/// Sign-extends each of the lower eight 8-bit integer elements of a +/// 128-bit vector of [16 x i8] to 16-bit values and returns them in a +/// 128-bit vector of [8 x i16]. The upper eight elements of the input vector +/// are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVSXBW / PMOVSXBW instruction. +/// +/// \param __V +/// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are +/// sign-extended to 16-bit values. +/// \returns A 128-bit vector of [8 x i16] containing the sign-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) { + /* This function always performs a signed extension, but __v16qi is a char + which may be signed or unsigned, so use __v16qs. */ + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6, + 7), + __v8hi); +} + +/// Sign-extends each of the lower four 8-bit integer elements of a +/// 128-bit vector of [16 x i8] to 32-bit values and returns them in a +/// 128-bit vector of [4 x i32]. The upper twelve elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVSXBD / PMOVSXBD instruction. +/// +/// \param __V +/// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are +/// sign-extended to 32-bit values. +/// \returns A 128-bit vector of [4 x i32] containing the sign-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) { + /* This function always performs a signed extension, but __v16qi is a char + which may be signed or unsigned, so use __v16qs. */ + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4si); +} + +/// Sign-extends each of the lower two 8-bit integer elements of a +/// 128-bit integer vector of [16 x i8] to 64-bit values and returns them in +/// a 128-bit vector of [2 x i64]. The upper fourteen elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVSXBQ / PMOVSXBQ instruction. +/// +/// \param __V +/// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are +/// sign-extended to 64-bit values. +/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) { + /* This function always performs a signed extension, but __v16qi is a char + which may be signed or unsigned, so use __v16qs. */ + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1), __v2di); +} + +/// Sign-extends each of the lower four 16-bit integer elements of a +/// 128-bit integer vector of [8 x i16] to 32-bit values and returns them in +/// a 128-bit vector of [4 x i32]. The upper four elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVSXWD / PMOVSXWD instruction. +/// +/// \param __V +/// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are +/// sign-extended to 32-bit values. +/// \returns A 128-bit vector of [4 x i32] containing the sign-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4si); +} + +/// Sign-extends each of the lower two 16-bit integer elements of a +/// 128-bit integer vector of [8 x i16] to 64-bit values and returns them in +/// a 128-bit vector of [2 x i64]. The upper six elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVSXWQ / PMOVSXWQ instruction. +/// +/// \param __V +/// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are +/// sign-extended to 64-bit values. +/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1), __v2di); +} + +/// Sign-extends each of the lower two 32-bit integer elements of a +/// 128-bit integer vector of [4 x i32] to 64-bit values and returns them in +/// a 128-bit vector of [2 x i64]. The upper two elements of the input vector +/// are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVSXDQ / PMOVSXDQ instruction. +/// +/// \param __V +/// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are +/// sign-extended to 64-bit values. +/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v4si)__V, (__v4si)__V, 0, 1), __v2di); +} + +/* SSE4 Packed Integer Zero-Extension. */ +/// Zero-extends each of the lower eight 8-bit integer elements of a +/// 128-bit vector of [16 x i8] to 16-bit values and returns them in a +/// 128-bit vector of [8 x i16]. The upper eight elements of the input vector +/// are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVZXBW / PMOVZXBW instruction. +/// +/// \param __V +/// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are +/// zero-extended to 16-bit values. +/// \returns A 128-bit vector of [8 x i16] containing the zero-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6, + 7), + __v8hi); +} + +/// Zero-extends each of the lower four 8-bit integer elements of a +/// 128-bit vector of [16 x i8] to 32-bit values and returns them in a +/// 128-bit vector of [4 x i32]. The upper twelve elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVZXBD / PMOVZXBD instruction. +/// +/// \param __V +/// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are +/// zero-extended to 32-bit values. +/// \returns A 128-bit vector of [4 x i32] containing the zero-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4si); +} + +/// Zero-extends each of the lower two 8-bit integer elements of a +/// 128-bit integer vector of [16 x i8] to 64-bit values and returns them in +/// a 128-bit vector of [2 x i64]. The upper fourteen elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVZXBQ / PMOVZXBQ instruction. +/// +/// \param __V +/// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are +/// zero-extended to 64-bit values. +/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1), __v2di); +} + +/// Zero-extends each of the lower four 16-bit integer elements of a +/// 128-bit integer vector of [8 x i16] to 32-bit values and returns them in +/// a 128-bit vector of [4 x i32]. The upper four elements of the input +/// vector are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVZXWD / PMOVZXWD instruction. +/// +/// \param __V +/// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are +/// zero-extended to 32-bit values. +/// \returns A 128-bit vector of [4 x i32] containing the zero-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4si); +} + +/// Zero-extends each of the lower two 16-bit integer elements of a +/// 128-bit integer vector of [8 x i16] to 64-bit values and returns them in +/// a 128-bit vector of [2 x i64]. The upper six elements of the input vector +/// are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVZXWQ / PMOVZXWQ instruction. +/// +/// \param __V +/// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are +/// zero-extended to 64-bit values. +/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1), __v2di); +} + +/// Zero-extends each of the lower two 32-bit integer elements of a +/// 128-bit integer vector of [4 x i32] to 64-bit values and returns them in +/// a 128-bit vector of [2 x i64]. The upper two elements of the input vector +/// are unused. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPMOVZXDQ / PMOVZXDQ instruction. +/// +/// \param __V +/// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are +/// zero-extended to 64-bit values. +/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) { + return (__m128i) __builtin_convertvector( + __builtin_shufflevector((__v4su)__V, (__v4su)__V, 0, 1), __v2di); +} + +/* SSE4 Pack with Unsigned Saturation. */ +/// Converts, with saturation, 32-bit signed integers from both 128-bit integer +/// vector operands into 16-bit unsigned integers, and returns the packed +/// result. +/// +/// Values greater than 0xFFFF are saturated to 0xFFFF. Values less than +/// 0x0000 are saturated to 0x0000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPACKUSDW / PACKUSDW instruction. +/// +/// \param __V1 +/// A 128-bit vector of [4 x i32]. The converted [4 x i16] values are +/// written to the lower 64 bits of the result. +/// \param __V2 +/// A 128-bit vector of [4 x i32]. The converted [4 x i16] values are +/// written to the higher 64 bits of the result. +/// \returns A 128-bit vector of [8 x i16] containing the converted values. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi32(__m128i __V1, + __m128i __V2) { + return (__m128i)__builtin_ia32_packusdw128((__v4si)__V1, (__v4si)__V2); +} + +/* SSE4 Multiple Packed Sums of Absolute Difference. */ +/// Subtracts 8-bit unsigned integer values and computes the absolute +/// values of the differences to the corresponding bits in the destination. +/// Then sums of the absolute differences are returned according to the bit +/// fields in the immediate operand. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_mpsadbw_epu8(__m128i X, __m128i Y, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VMPSADBW / MPSADBW instruction. +/// +/// \param X +/// A 128-bit vector of [16 x i8]. +/// \param Y +/// A 128-bit vector of [16 x i8]. +/// \param M +/// An 8-bit immediate operand specifying how the absolute differences are to +/// be calculated, according to the following algorithm: +/// \code +/// // M2 represents bit 2 of the immediate operand +/// // M10 represents bits [1:0] of the immediate operand +/// i = M2 * 4; +/// j = M10 * 4; +/// for (k = 0; k < 8; k = k + 1) { +/// d0 = abs(X[i + k + 0] - Y[j + 0]); +/// d1 = abs(X[i + k + 1] - Y[j + 1]); +/// d2 = abs(X[i + k + 2] - Y[j + 2]); +/// d3 = abs(X[i + k + 3] - Y[j + 3]); +/// r[k] = d0 + d1 + d2 + d3; +/// } +/// \endcode +/// \returns A 128-bit integer vector containing the sums of the sets of +/// absolute differences between both operands. +#define _mm_mpsadbw_epu8(X, Y, M) \ + ((__m128i)__builtin_ia32_mpsadbw128((__v16qi)(__m128i)(X), \ + (__v16qi)(__m128i)(Y), (M))) + +/// Finds the minimum unsigned 16-bit element in the input 128-bit +/// vector of [8 x u16] and returns it and along with its index. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPHMINPOSUW / PHMINPOSUW +/// instruction. +/// +/// \param __V +/// A 128-bit vector of [8 x u16]. +/// \returns A 128-bit value where bits [15:0] contain the minimum value found +/// in parameter \a __V, bits [18:16] contain the index of the minimum value +/// and the remaining bits are set to 0. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) { + return (__m128i)__builtin_ia32_phminposuw128((__v8hi)__V); +} + +/* Handle the sse4.2 definitions here. */ + +/* These definitions are normally in nmmintrin.h, but gcc puts them in here + so we'll do the same. */ + +#undef __DEFAULT_FN_ATTRS +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("sse4.2"))) + +/* These specify the type of data that we're comparing. */ +#define _SIDD_UBYTE_OPS 0x00 +#define _SIDD_UWORD_OPS 0x01 +#define _SIDD_SBYTE_OPS 0x02 +#define _SIDD_SWORD_OPS 0x03 + +/* These specify the type of comparison operation. */ +#define _SIDD_CMP_EQUAL_ANY 0x00 +#define _SIDD_CMP_RANGES 0x04 +#define _SIDD_CMP_EQUAL_EACH 0x08 +#define _SIDD_CMP_EQUAL_ORDERED 0x0c + +/* These macros specify the polarity of the operation. */ +#define _SIDD_POSITIVE_POLARITY 0x00 +#define _SIDD_NEGATIVE_POLARITY 0x10 +#define _SIDD_MASKED_POSITIVE_POLARITY 0x20 +#define _SIDD_MASKED_NEGATIVE_POLARITY 0x30 + +/* These macros are used in _mm_cmpXstri() to specify the return. */ +#define _SIDD_LEAST_SIGNIFICANT 0x00 +#define _SIDD_MOST_SIGNIFICANT 0x40 + +/* These macros are used in _mm_cmpXstri() to specify the return. */ +#define _SIDD_BIT_MASK 0x00 +#define _SIDD_UNIT_MASK 0x40 + +/* SSE4.2 Packed Comparison Intrinsics. */ +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns a 128-bit integer vector representing the result +/// mask of the comparison. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_cmpistrm(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRM / PCMPISTRM +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words, the type of comparison to perform, and the format of the return +/// value. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// Bit [6]: Determines whether the result is zero-extended or expanded to 16 +/// bytes. \n +/// 0: The result is zero-extended to 16 bytes. \n +/// 1: The result is expanded to 16 bytes (this expansion is performed by +/// repeating each bit 8 or 16 times). +/// \returns Returns a 128-bit integer vector representing the result mask of +/// the comparison. +#define _mm_cmpistrm(A, B, M) \ + ((__m128i)__builtin_ia32_pcmpistrm128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns an integer representing the result index of the +/// comparison. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpistri(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRI / PCMPISTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words, the type of comparison to perform, and the format of the return +/// value. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// Bit [6]: Determines whether the index of the lowest set bit or the +/// highest set bit is returned. \n +/// 0: The index of the least significant set bit. \n +/// 1: The index of the most significant set bit. \n +/// \returns Returns an integer representing the result index of the comparison. +#define _mm_cmpistri(A, B, M) \ + ((int)__builtin_ia32_pcmpistri128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns a 128-bit integer vector representing the result +/// mask of the comparison. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_cmpestrm(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRM / PCMPESTRM +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words, the type of comparison to perform, and the format of the return +/// value. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// Bit [6]: Determines whether the result is zero-extended or expanded to 16 +/// bytes. \n +/// 0: The result is zero-extended to 16 bytes. \n +/// 1: The result is expanded to 16 bytes (this expansion is performed by +/// repeating each bit 8 or 16 times). \n +/// \returns Returns a 128-bit integer vector representing the result mask of +/// the comparison. +#define _mm_cmpestrm(A, LA, B, LB, M) \ + ((__m128i)__builtin_ia32_pcmpestrm128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns an integer representing the result index of the +/// comparison. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpestri(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRI / PCMPESTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words, the type of comparison to perform, and the format of the return +/// value. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// Bit [6]: Determines whether the index of the lowest set bit or the +/// highest set bit is returned. \n +/// 0: The index of the least significant set bit. \n +/// 1: The index of the most significant set bit. \n +/// \returns Returns an integer representing the result index of the comparison. +#define _mm_cmpestri(A, LA, B, LB, M) \ + ((int)__builtin_ia32_pcmpestri128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/* SSE4.2 Packed Comparison Intrinsics and EFlag Reading. */ +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the bit mask is zero and the length of the +/// string in \a B is the maximum, otherwise, returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpistra(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRI / PCMPISTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// \returns Returns 1 if the bit mask is zero and the length of the string in +/// \a B is the maximum; otherwise, returns 0. +#define _mm_cmpistra(A, B, M) \ + ((int)__builtin_ia32_pcmpistria128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the bit mask is non-zero, otherwise, returns +/// 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpistrc(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRI / PCMPISTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. +/// \returns Returns 1 if the bit mask is non-zero, otherwise, returns 0. +#define _mm_cmpistrc(A, B, M) \ + ((int)__builtin_ia32_pcmpistric128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns bit 0 of the resulting bit mask. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpistro(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRI / PCMPISTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// \returns Returns bit 0 of the resulting bit mask. +#define _mm_cmpistro(A, B, M) \ + ((int)__builtin_ia32_pcmpistrio128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the length of the string in \a A is less than +/// the maximum, otherwise, returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpistrs(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRI / PCMPISTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// \returns Returns 1 if the length of the string in \a A is less than the +/// maximum, otherwise, returns 0. +#define _mm_cmpistrs(A, B, M) \ + ((int)__builtin_ia32_pcmpistris128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with implicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the length of the string in \a B is less than +/// the maximum, otherwise, returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpistrz(__m128i A, __m128i B, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPISTRI / PCMPISTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. +/// \returns Returns 1 if the length of the string in \a B is less than the +/// maximum, otherwise, returns 0. +#define _mm_cmpistrz(A, B, M) \ + ((int)__builtin_ia32_pcmpistriz128((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the bit mask is zero and the length of the +/// string in \a B is the maximum, otherwise, returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpestra(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRI / PCMPESTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. +/// \returns Returns 1 if the bit mask is zero and the length of the string in +/// \a B is the maximum, otherwise, returns 0. +#define _mm_cmpestra(A, LA, B, LB, M) \ + ((int)__builtin_ia32_pcmpestria128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the resulting mask is non-zero, otherwise, +/// returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpestrc(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRI / PCMPESTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// \returns Returns 1 if the resulting mask is non-zero, otherwise, returns 0. +#define _mm_cmpestrc(A, LA, B, LB, M) \ + ((int)__builtin_ia32_pcmpestric128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns bit 0 of the resulting bit mask. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpestro(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRI / PCMPESTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. +/// \returns Returns bit 0 of the resulting bit mask. +#define _mm_cmpestro(A, LA, B, LB, M) \ + ((int)__builtin_ia32_pcmpestrio128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the length of the string in \a A is less than +/// the maximum, otherwise, returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpestrs(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRI / PCMPESTRI +/// instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement in the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. \n +/// \returns Returns 1 if the length of the string in \a A is less than the +/// maximum, otherwise, returns 0. +#define _mm_cmpestrs(A, LA, B, LB, M) \ + ((int)__builtin_ia32_pcmpestris128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/// Uses the immediate operand \a M to perform a comparison of string +/// data with explicitly defined lengths that is contained in source operands +/// \a A and \a B. Returns 1 if the length of the string in \a B is less than +/// the maximum, otherwise, returns 0. +/// +/// \headerfile +/// +/// \code +/// int _mm_cmpestrz(__m128i A, int LA, __m128i B, int LB, const int M); +/// \endcode +/// +/// This intrinsic corresponds to the VPCMPESTRI instruction. +/// +/// \param A +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LA +/// An integer that specifies the length of the string in \a A. +/// \param B +/// A 128-bit integer vector containing one of the source operands to be +/// compared. +/// \param LB +/// An integer that specifies the length of the string in \a B. +/// \param M +/// An 8-bit immediate operand specifying whether the characters are bytes or +/// words and the type of comparison to perform. \n +/// Bits [1:0]: Determine source data format. \n +/// 00: 16 unsigned bytes \n +/// 01: 8 unsigned words \n +/// 10: 16 signed bytes \n +/// 11: 8 signed words \n +/// Bits [3:2]: Determine comparison type and aggregation method. \n +/// 00: Subset: Each character in \a B is compared for equality with all +/// the characters in \a A. \n +/// 01: Ranges: Each character in \a B is compared to \a A. The comparison +/// basis is greater than or equal for even-indexed elements in \a A, +/// and less than or equal for odd-indexed elements in \a A. \n +/// 10: Match: Compare each pair of corresponding characters in \a A and +/// \a B for equality. \n +/// 11: Substring: Search \a B for substring matches of \a A. \n +/// Bits [5:4]: Determine whether to perform a one's complement on the bit +/// mask of the comparison results. \n +/// 00: No effect. \n +/// 01: Negate the bit mask. \n +/// 10: No effect. \n +/// 11: Negate the bit mask only for bits with an index less than or equal +/// to the size of \a A or \a B. +/// \returns Returns 1 if the length of the string in \a B is less than the +/// maximum, otherwise, returns 0. +#define _mm_cmpestrz(A, LA, B, LB, M) \ + ((int)__builtin_ia32_pcmpestriz128((__v16qi)(__m128i)(A), (int)(LA), \ + (__v16qi)(__m128i)(B), (int)(LB), \ + (int)(M))) + +/* SSE4.2 Compare Packed Data -- Greater Than. */ +/// Compares each of the corresponding 64-bit values of the 128-bit +/// integer vectors to determine if the values in the first operand are +/// greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPCMPGTQ / PCMPGTQ instruction. +/// +/// \param __V1 +/// A 128-bit integer vector. +/// \param __V2 +/// A 128-bit integer vector. +/// \returns A 128-bit integer vector containing the comparison results. +static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi64(__m128i __V1, + __m128i __V2) { + return (__m128i)((__v2di)__V1 > (__v2di)__V2); +} + +#undef __DEFAULT_FN_ATTRS + +#include + +#include + +#endif /* __SMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/stdalign.h b/llvm/lib/clang/19/include/stdalign.h new file mode 100644 index 0000000000000000000000000000000000000000..56cdfa52d4bafaae5493523438553a218a35d133 --- /dev/null +++ b/llvm/lib/clang/19/include/stdalign.h @@ -0,0 +1,29 @@ +/*===---- stdalign.h - Standard header for alignment ------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __STDALIGN_H +#define __STDALIGN_H + +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +#if defined(__cplusplus) || \ + (defined(__STDC_VERSION__) && __STDC_VERSION__ < 202311L) +#ifndef __cplusplus +#define alignas _Alignas +#define alignof _Alignof +#endif + +#define __alignas_is_defined 1 +#define __alignof_is_defined 1 +#endif /* __STDC_VERSION__ */ + +#endif /* __MVS__ */ +#endif /* __STDALIGN_H */ diff --git a/llvm/lib/clang/19/include/stdarg.h b/llvm/lib/clang/19/include/stdarg.h new file mode 100644 index 0000000000000000000000000000000000000000..6203d7a600a237e000e114b42b891f640c28d1f9 --- /dev/null +++ b/llvm/lib/clang/19/include/stdarg.h @@ -0,0 +1,75 @@ +/*===---- stdarg.h - Variable argument handling ----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * This header is designed to be included multiple times. If any of the __need_ + * macros are defined, then only that subset of interfaces are provided. This + * can be useful for POSIX headers that need to not expose all of stdarg.h, but + * need to use some of its interfaces. Otherwise this header provides all of + * the expected interfaces. + * + * When clang modules are enabled, this header is a textual header to support + * the multiple include behavior. As such, it doesn't directly declare anything + * so that it doesn't add duplicate declarations to all of its includers' + * modules. + */ +#if defined(__MVS__) && __has_include_next() +#undef __need___va_list +#undef __need_va_list +#undef __need_va_arg +#undef __need___va_copy +#undef __need_va_copy +#include <__stdarg_header_macro.h> +#include_next + +#else +#if !defined(__need___va_list) && !defined(__need_va_list) && \ + !defined(__need_va_arg) && !defined(__need___va_copy) && \ + !defined(__need_va_copy) +#define __need___va_list +#define __need_va_list +#define __need_va_arg +#define __need___va_copy +/* GCC always defines __va_copy, but does not define va_copy unless in c99 mode + * or -ansi is not specified, since it was not part of C90. + */ +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ + (defined(__cplusplus) && __cplusplus >= 201103L) || \ + !defined(__STRICT_ANSI__) +#define __need_va_copy +#endif +#include <__stdarg_header_macro.h> +#endif + +#ifdef __need___va_list +#include <__stdarg___gnuc_va_list.h> +#undef __need___va_list +#endif /* defined(__need___va_list) */ + +#ifdef __need_va_list +#include <__stdarg_va_list.h> +#undef __need_va_list +#endif /* defined(__need_va_list) */ + +#ifdef __need_va_arg +#include <__stdarg_va_arg.h> +#undef __need_va_arg +#endif /* defined(__need_va_arg) */ + +#ifdef __need___va_copy +#include <__stdarg___va_copy.h> +#undef __need___va_copy +#endif /* defined(__need___va_copy) */ + +#ifdef __need_va_copy +#include <__stdarg_va_copy.h> +#undef __need_va_copy +#endif /* defined(__need_va_copy) */ + +#endif /* __MVS__ */ diff --git a/llvm/lib/clang/19/include/stdatomic.h b/llvm/lib/clang/19/include/stdatomic.h new file mode 100644 index 0000000000000000000000000000000000000000..1991351f9e9efed0fc4154afe02c9a9faf200c73 --- /dev/null +++ b/llvm/lib/clang/19/include/stdatomic.h @@ -0,0 +1,204 @@ +/*===---- stdatomic.h - Standard header for atomic types and operations -----=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __CLANG_STDATOMIC_H +#define __CLANG_STDATOMIC_H + +/* If we're hosted, fall back to the system's stdatomic.h. FreeBSD, for + * example, already has a Clang-compatible stdatomic.h header. + * + * Exclude the MSVC path as well as the MSVC header as of the 14.31.30818 + * explicitly disallows `stdatomic.h` in the C mode via an `#error`. Fallback + * to the clang resource header until that is fully supported. The + * `stdatomic.h` header requires C++23 or newer. + */ +#if __STDC_HOSTED__ && \ + __has_include_next() && \ + (!defined(_MSC_VER) || (defined(__cplusplus) && __cplusplus >= 202002L)) +# include_next +#else + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* 7.17.1 Introduction */ + +#define ATOMIC_BOOL_LOCK_FREE __CLANG_ATOMIC_BOOL_LOCK_FREE +#define ATOMIC_CHAR_LOCK_FREE __CLANG_ATOMIC_CHAR_LOCK_FREE +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +#define ATOMIC_CHAR8_T_LOCK_FREE __CLANG_ATOMIC_CHAR8_T_LOCK_FREE +#endif +#define ATOMIC_CHAR16_T_LOCK_FREE __CLANG_ATOMIC_CHAR16_T_LOCK_FREE +#define ATOMIC_CHAR32_T_LOCK_FREE __CLANG_ATOMIC_CHAR32_T_LOCK_FREE +#define ATOMIC_WCHAR_T_LOCK_FREE __CLANG_ATOMIC_WCHAR_T_LOCK_FREE +#define ATOMIC_SHORT_LOCK_FREE __CLANG_ATOMIC_SHORT_LOCK_FREE +#define ATOMIC_INT_LOCK_FREE __CLANG_ATOMIC_INT_LOCK_FREE +#define ATOMIC_LONG_LOCK_FREE __CLANG_ATOMIC_LONG_LOCK_FREE +#define ATOMIC_LLONG_LOCK_FREE __CLANG_ATOMIC_LLONG_LOCK_FREE +#define ATOMIC_POINTER_LOCK_FREE __CLANG_ATOMIC_POINTER_LOCK_FREE + +/* 7.17.2 Initialization */ +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ < 202311L) || \ + defined(__cplusplus) +/* ATOMIC_VAR_INIT was removed in C23, but still remains in C++23. */ +#define ATOMIC_VAR_INIT(value) (value) +#endif + +#if ((defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201710L && \ + __STDC_VERSION__ < 202311L) || \ + (defined(__cplusplus) && __cplusplus >= 202002L)) && \ + !defined(_CLANG_DISABLE_CRT_DEPRECATION_WARNINGS) +/* ATOMIC_VAR_INIT was deprecated in C17 and C++20. */ +#pragma clang deprecated(ATOMIC_VAR_INIT) +#endif +#define atomic_init __c11_atomic_init + +/* 7.17.3 Order and consistency */ + +typedef enum memory_order { + memory_order_relaxed = __ATOMIC_RELAXED, + memory_order_consume = __ATOMIC_CONSUME, + memory_order_acquire = __ATOMIC_ACQUIRE, + memory_order_release = __ATOMIC_RELEASE, + memory_order_acq_rel = __ATOMIC_ACQ_REL, + memory_order_seq_cst = __ATOMIC_SEQ_CST +} memory_order; + +#define kill_dependency(y) (y) + +/* 7.17.4 Fences */ + +/* These should be provided by the libc implementation. */ +void atomic_thread_fence(memory_order); +void atomic_signal_fence(memory_order); + +#define atomic_thread_fence(order) __c11_atomic_thread_fence(order) +#define atomic_signal_fence(order) __c11_atomic_signal_fence(order) + +/* 7.17.5 Lock-free property */ + +#define atomic_is_lock_free(obj) __c11_atomic_is_lock_free(sizeof(*(obj))) + +/* 7.17.6 Atomic integer types */ + +#ifdef __cplusplus +typedef _Atomic(bool) atomic_bool; +#else +typedef _Atomic(_Bool) atomic_bool; +#endif +typedef _Atomic(char) atomic_char; +typedef _Atomic(signed char) atomic_schar; +typedef _Atomic(unsigned char) atomic_uchar; +typedef _Atomic(short) atomic_short; +typedef _Atomic(unsigned short) atomic_ushort; +typedef _Atomic(int) atomic_int; +typedef _Atomic(unsigned int) atomic_uint; +typedef _Atomic(long) atomic_long; +typedef _Atomic(unsigned long) atomic_ulong; +typedef _Atomic(long long) atomic_llong; +typedef _Atomic(unsigned long long) atomic_ullong; +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +typedef _Atomic(unsigned char) atomic_char8_t; +#endif +typedef _Atomic(uint_least16_t) atomic_char16_t; +typedef _Atomic(uint_least32_t) atomic_char32_t; +typedef _Atomic(wchar_t) atomic_wchar_t; +typedef _Atomic(int_least8_t) atomic_int_least8_t; +typedef _Atomic(uint_least8_t) atomic_uint_least8_t; +typedef _Atomic(int_least16_t) atomic_int_least16_t; +typedef _Atomic(uint_least16_t) atomic_uint_least16_t; +typedef _Atomic(int_least32_t) atomic_int_least32_t; +typedef _Atomic(uint_least32_t) atomic_uint_least32_t; +typedef _Atomic(int_least64_t) atomic_int_least64_t; +typedef _Atomic(uint_least64_t) atomic_uint_least64_t; +typedef _Atomic(int_fast8_t) atomic_int_fast8_t; +typedef _Atomic(uint_fast8_t) atomic_uint_fast8_t; +typedef _Atomic(int_fast16_t) atomic_int_fast16_t; +typedef _Atomic(uint_fast16_t) atomic_uint_fast16_t; +typedef _Atomic(int_fast32_t) atomic_int_fast32_t; +typedef _Atomic(uint_fast32_t) atomic_uint_fast32_t; +typedef _Atomic(int_fast64_t) atomic_int_fast64_t; +typedef _Atomic(uint_fast64_t) atomic_uint_fast64_t; +typedef _Atomic(intptr_t) atomic_intptr_t; +typedef _Atomic(uintptr_t) atomic_uintptr_t; +typedef _Atomic(size_t) atomic_size_t; +typedef _Atomic(ptrdiff_t) atomic_ptrdiff_t; +typedef _Atomic(intmax_t) atomic_intmax_t; +typedef _Atomic(uintmax_t) atomic_uintmax_t; + +/* 7.17.7 Operations on atomic types */ + +#define atomic_store(object, desired) __c11_atomic_store(object, desired, __ATOMIC_SEQ_CST) +#define atomic_store_explicit __c11_atomic_store + +#define atomic_load(object) __c11_atomic_load(object, __ATOMIC_SEQ_CST) +#define atomic_load_explicit __c11_atomic_load + +#define atomic_exchange(object, desired) __c11_atomic_exchange(object, desired, __ATOMIC_SEQ_CST) +#define atomic_exchange_explicit __c11_atomic_exchange + +#define atomic_compare_exchange_strong(object, expected, desired) __c11_atomic_compare_exchange_strong(object, expected, desired, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST) +#define atomic_compare_exchange_strong_explicit __c11_atomic_compare_exchange_strong + +#define atomic_compare_exchange_weak(object, expected, desired) __c11_atomic_compare_exchange_weak(object, expected, desired, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST) +#define atomic_compare_exchange_weak_explicit __c11_atomic_compare_exchange_weak + +#define atomic_fetch_add(object, operand) __c11_atomic_fetch_add(object, operand, __ATOMIC_SEQ_CST) +#define atomic_fetch_add_explicit __c11_atomic_fetch_add + +#define atomic_fetch_sub(object, operand) __c11_atomic_fetch_sub(object, operand, __ATOMIC_SEQ_CST) +#define atomic_fetch_sub_explicit __c11_atomic_fetch_sub + +#define atomic_fetch_or(object, operand) __c11_atomic_fetch_or(object, operand, __ATOMIC_SEQ_CST) +#define atomic_fetch_or_explicit __c11_atomic_fetch_or + +#define atomic_fetch_xor(object, operand) __c11_atomic_fetch_xor(object, operand, __ATOMIC_SEQ_CST) +#define atomic_fetch_xor_explicit __c11_atomic_fetch_xor + +#define atomic_fetch_and(object, operand) __c11_atomic_fetch_and(object, operand, __ATOMIC_SEQ_CST) +#define atomic_fetch_and_explicit __c11_atomic_fetch_and + +/* 7.17.8 Atomic flag type and operations */ + +typedef struct atomic_flag { atomic_bool _Value; } atomic_flag; + +#ifdef __cplusplus +#define ATOMIC_FLAG_INIT {false} +#else +#define ATOMIC_FLAG_INIT { 0 } +#endif + +/* These should be provided by the libc implementation. */ +#ifdef __cplusplus +bool atomic_flag_test_and_set(volatile atomic_flag *); +bool atomic_flag_test_and_set_explicit(volatile atomic_flag *, memory_order); +#else +_Bool atomic_flag_test_and_set(volatile atomic_flag *); +_Bool atomic_flag_test_and_set_explicit(volatile atomic_flag *, memory_order); +#endif +void atomic_flag_clear(volatile atomic_flag *); +void atomic_flag_clear_explicit(volatile atomic_flag *, memory_order); + +#define atomic_flag_test_and_set(object) __c11_atomic_exchange(&(object)->_Value, 1, __ATOMIC_SEQ_CST) +#define atomic_flag_test_and_set_explicit(object, order) __c11_atomic_exchange(&(object)->_Value, 1, order) + +#define atomic_flag_clear(object) __c11_atomic_store(&(object)->_Value, 0, __ATOMIC_SEQ_CST) +#define atomic_flag_clear_explicit(object, order) __c11_atomic_store(&(object)->_Value, 0, order) + +#ifdef __cplusplus +} +#endif + +#endif /* __STDC_HOSTED__ */ +#endif /* __CLANG_STDATOMIC_H */ + diff --git a/llvm/lib/clang/19/include/stdbool.h b/llvm/lib/clang/19/include/stdbool.h new file mode 100644 index 0000000000000000000000000000000000000000..dfaad2b65a9b533f338dee48975e2062050487c6 --- /dev/null +++ b/llvm/lib/clang/19/include/stdbool.h @@ -0,0 +1,39 @@ +/*===---- stdbool.h - Standard header for booleans -------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __STDBOOL_H +#define __STDBOOL_H + +#define __bool_true_false_are_defined 1 + +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ > 201710L +/* FIXME: We should be issuing a deprecation warning here, but cannot yet due + * to system headers which include this header file unconditionally. + */ +#elif !defined(__cplusplus) +#define bool _Bool +#define true 1 +#define false 0 +#elif defined(__GNUC__) && !defined(__STRICT_ANSI__) +/* Define _Bool as a GNU extension. */ +#define _Bool bool +#if defined(__cplusplus) && __cplusplus < 201103L +/* For C++98, define bool, false, true as a GNU extension. */ +#define bool bool +#define false false +#define true true +#endif +#endif + +#endif /* __MVS__ */ +#endif /* __STDBOOL_H */ diff --git a/llvm/lib/clang/19/include/stdckdint.h b/llvm/lib/clang/19/include/stdckdint.h new file mode 100644 index 0000000000000000000000000000000000000000..20bc34ffb30235c943c2a75365392833408b17a9 --- /dev/null +++ b/llvm/lib/clang/19/include/stdckdint.h @@ -0,0 +1,42 @@ +/*===---- stdckdint.h - Standard header for checking integer----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __STDCKDINT_H +#define __STDCKDINT_H + +/* If we're hosted, fall back to the system's stdckdint.h. FreeBSD, for + * example, already has a Clang-compatible stdckdint.h header. + * + * The `stdckdint.h` header requires C 23 or newer. + */ +#if __STDC_HOSTED__ && __has_include_next() +#include_next +#else + +/* C23 7.20.1 Defines several macros for performing checked integer arithmetic*/ + +#define __STDC_VERSION_STDCKDINT_H__ 202311L + +// Both A and B shall be any integer type other than "plain" char, bool, a bit- +// precise integer type, or an enumerated type, and they need not be the same. + +// R shall be a modifiable lvalue of any integer type other than "plain" char, +// bool, a bit-precise integer type, or an enumerated type. It shouldn't be +// short type, either. Otherwise, it may be unable to hold two the result of +// operating two 'int's. + +// A diagnostic message will be produced if A or B are not suitable integer +// types, or if R is not a modifiable lvalue of a suitable integer type or R +// is short type. +#define ckd_add(R, A, B) __builtin_add_overflow((A), (B), (R)) +#define ckd_sub(R, A, B) __builtin_sub_overflow((A), (B), (R)) +#define ckd_mul(R, A, B) __builtin_mul_overflow((A), (B), (R)) + +#endif /* __STDC_HOSTED__ */ +#endif /* __STDCKDINT_H */ diff --git a/llvm/lib/clang/19/include/stddef.h b/llvm/lib/clang/19/include/stddef.h new file mode 100644 index 0000000000000000000000000000000000000000..99b275aebf5aa0cec0bb2dad8dbfce77d7f408b8 --- /dev/null +++ b/llvm/lib/clang/19/include/stddef.h @@ -0,0 +1,139 @@ +/*===---- stddef.h - Basic type definitions --------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* + * This header is designed to be included multiple times. If any of the __need_ + * macros are defined, then only that subset of interfaces are provided. This + * can be useful for POSIX headers that need to not expose all of stddef.h, but + * need to use some of its interfaces. Otherwise this header provides all of + * the expected interfaces. + * + * When clang modules are enabled, this header is a textual header to support + * the multiple include behavior. As such, it doesn't directly declare anything + * so that it doesn't add duplicate declarations to all of its includers' + * modules. + */ +#if defined(__MVS__) && __has_include_next() +#undef __need_ptrdiff_t +#undef __need_size_t +#undef __need_rsize_t +#undef __need_wchar_t +#undef __need_NULL +#undef __need_nullptr_t +#undef __need_unreachable +#undef __need_max_align_t +#undef __need_offsetof +#undef __need_wint_t +#include <__stddef_header_macro.h> +#include_next + +#else + +#if !defined(__need_ptrdiff_t) && !defined(__need_size_t) && \ + !defined(__need_rsize_t) && !defined(__need_wchar_t) && \ + !defined(__need_NULL) && !defined(__need_nullptr_t) && \ + !defined(__need_unreachable) && !defined(__need_max_align_t) && \ + !defined(__need_offsetof) && !defined(__need_wint_t) +#define __need_ptrdiff_t +#define __need_size_t +/* ISO9899:2011 7.20 (C11 Annex K): Define rsize_t if __STDC_WANT_LIB_EXT1__ is + * enabled. */ +#if defined(__STDC_WANT_LIB_EXT1__) && __STDC_WANT_LIB_EXT1__ >= 1 +#define __need_rsize_t +#endif +#define __need_wchar_t +#if !defined(__STDDEF_H) || __has_feature(modules) +/* + * __stddef_null.h is special when building without modules: if __need_NULL is + * set, then it will unconditionally redefine NULL. To avoid stepping on client + * definitions of NULL, __need_NULL should only be set the first time this + * header is included, that is when __STDDEF_H is not defined. However, when + * building with modules, this header is a textual header and needs to + * unconditionally include __stdef_null.h to support multiple submodules + * exporting _Builtin_stddef.null. Take module SM with submodules A and B, whose + * headers both include stddef.h When SM.A builds, __STDDEF_H will be defined. + * When SM.B builds, the definition from SM.A will leak when building without + * local submodule visibility. stddef.h wouldn't include __stddef_null.h, and + * SM.B wouldn't import _Builtin_stddef.null, and SM.B's `export *` wouldn't + * export NULL as expected. When building with modules, always include + * __stddef_null.h so that everything works as expected. + */ +#define __need_NULL +#endif +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ + defined(__cplusplus) +#define __need_nullptr_t +#endif +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +#define __need_unreachable +#endif +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ + (defined(__cplusplus) && __cplusplus >= 201103L) +#define __need_max_align_t +#endif +#define __need_offsetof +/* wint_t is provided by and not . It's here + * for compatibility, but must be explicitly requested. Therefore + * __need_wint_t is intentionally not defined here. */ +#include <__stddef_header_macro.h> +#endif + +#if defined(__need_ptrdiff_t) +#include <__stddef_ptrdiff_t.h> +#undef __need_ptrdiff_t +#endif /* defined(__need_ptrdiff_t) */ + +#if defined(__need_size_t) +#include <__stddef_size_t.h> +#undef __need_size_t +#endif /*defined(__need_size_t) */ + +#if defined(__need_rsize_t) +#include <__stddef_rsize_t.h> +#undef __need_rsize_t +#endif /* defined(__need_rsize_t) */ + +#if defined(__need_wchar_t) +#include <__stddef_wchar_t.h> +#undef __need_wchar_t +#endif /* defined(__need_wchar_t) */ + +#if defined(__need_NULL) +#include <__stddef_null.h> +#undef __need_NULL +#endif /* defined(__need_NULL) */ + +#if defined(__need_nullptr_t) +#include <__stddef_nullptr_t.h> +#undef __need_nullptr_t +#endif /* defined(__need_nullptr_t) */ + +#if defined(__need_unreachable) +#include <__stddef_unreachable.h> +#undef __need_unreachable +#endif /* defined(__need_unreachable) */ + +#if defined(__need_max_align_t) +#include <__stddef_max_align_t.h> +#undef __need_max_align_t +#endif /* defined(__need_max_align_t) */ + +#if defined(__need_offsetof) +#include <__stddef_offsetof.h> +#undef __need_offsetof +#endif /* defined(__need_offsetof) */ + +/* Some C libraries expect to see a wint_t here. Others (notably MinGW) will use +__WINT_TYPE__ directly; accommodate both by requiring __need_wint_t */ +#if defined(__need_wint_t) +#include <__stddef_wint_t.h> +#undef __need_wint_t +#endif /* __need_wint_t */ + +#endif /* __MVS__ */ diff --git a/llvm/lib/clang/19/include/stdint.h b/llvm/lib/clang/19/include/stdint.h new file mode 100644 index 0000000000000000000000000000000000000000..01feab7b1ee2c206b22447dabaf9515086f90006 --- /dev/null +++ b/llvm/lib/clang/19/include/stdint.h @@ -0,0 +1,955 @@ +/*===---- stdint.h - Standard header for sized integer types --------------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +#ifndef __CLANG_STDINT_H +// AIX system headers need stdint.h to be re-enterable while _STD_TYPES_T +// is defined until an inclusion of it without _STD_TYPES_T occurs, in which +// case the header guard macro is defined. +#if !defined(_AIX) || !defined(_STD_TYPES_T) || !defined(__STDC_HOSTED__) +#define __CLANG_STDINT_H +#endif + +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +/* If we're hosted, fall back to the system's stdint.h, which might have + * additional definitions. + */ +#if __STDC_HOSTED__ && __has_include_next() + +// C99 7.18.3 Limits of other integer types +// +// Footnote 219, 220: C++ implementations should define these macros only when +// __STDC_LIMIT_MACROS is defined before is included. +// +// Footnote 222: C++ implementations should define these macros only when +// __STDC_CONSTANT_MACROS is defined before is included. +// +// C++11 [cstdint.syn]p2: +// +// The macros defined by are provided unconditionally. In particular, +// the symbols __STDC_LIMIT_MACROS and __STDC_CONSTANT_MACROS (mentioned in +// footnotes 219, 220, and 222 in the C standard) play no role in C++. +// +// C11 removed the problematic footnotes. +// +// Work around this inconsistency by always defining those macros in C++ mode, +// so that a C library implementation which follows the C99 standard can be +// used in C++. +# ifdef __cplusplus +# if !defined(__STDC_LIMIT_MACROS) +# define __STDC_LIMIT_MACROS +# define __STDC_LIMIT_MACROS_DEFINED_BY_CLANG +# endif +# if !defined(__STDC_CONSTANT_MACROS) +# define __STDC_CONSTANT_MACROS +# define __STDC_CONSTANT_MACROS_DEFINED_BY_CLANG +# endif +# endif + +# include_next + +# ifdef __STDC_LIMIT_MACROS_DEFINED_BY_CLANG +# undef __STDC_LIMIT_MACROS +# undef __STDC_LIMIT_MACROS_DEFINED_BY_CLANG +# endif +# ifdef __STDC_CONSTANT_MACROS_DEFINED_BY_CLANG +# undef __STDC_CONSTANT_MACROS +# undef __STDC_CONSTANT_MACROS_DEFINED_BY_CLANG +# endif + +#else + +/* C99 7.18.1.1 Exact-width integer types. + * C99 7.18.1.2 Minimum-width integer types. + * C99 7.18.1.3 Fastest minimum-width integer types. + * + * The standard requires that exact-width type be defined for 8-, 16-, 32-, and + * 64-bit types if they are implemented. Other exact width types are optional. + * This implementation defines an exact-width types for every integer width + * that is represented in the standard integer types. + * + * The standard also requires minimum-width types be defined for 8-, 16-, 32-, + * and 64-bit widths regardless of whether there are corresponding exact-width + * types. + * + * To accommodate targets that are missing types that are exactly 8, 16, 32, or + * 64 bits wide, this implementation takes an approach of cascading + * redefinitions, redefining __int_leastN_t to successively smaller exact-width + * types. It is therefore important that the types are defined in order of + * descending widths. + * + * We currently assume that the minimum-width types and the fastest + * minimum-width types are the same. This is allowed by the standard, but is + * suboptimal. + * + * In violation of the standard, some targets do not implement a type that is + * wide enough to represent all of the required widths (8-, 16-, 32-, 64-bit). + * To accommodate these targets, a required minimum-width type is only + * defined if there exists an exact-width type of equal or greater width. + */ + +#ifdef __INT64_TYPE__ +# ifndef __int8_t_defined /* glibc sys/types.h also defines int64_t*/ +typedef __INT64_TYPE__ int64_t; +# endif /* __int8_t_defined */ +typedef __UINT64_TYPE__ uint64_t; +# undef __int_least64_t +# define __int_least64_t int64_t +# undef __uint_least64_t +# define __uint_least64_t uint64_t +# undef __int_least32_t +# define __int_least32_t int64_t +# undef __uint_least32_t +# define __uint_least32_t uint64_t +# undef __int_least16_t +# define __int_least16_t int64_t +# undef __uint_least16_t +# define __uint_least16_t uint64_t +# undef __int_least8_t +# define __int_least8_t int64_t +# undef __uint_least8_t +# define __uint_least8_t uint64_t +#endif /* __INT64_TYPE__ */ + +#ifdef __int_least64_t +typedef __int_least64_t int_least64_t; +typedef __uint_least64_t uint_least64_t; +typedef __int_least64_t int_fast64_t; +typedef __uint_least64_t uint_fast64_t; +#endif /* __int_least64_t */ + +#ifdef __INT56_TYPE__ +typedef __INT56_TYPE__ int56_t; +typedef __UINT56_TYPE__ uint56_t; +typedef int56_t int_least56_t; +typedef uint56_t uint_least56_t; +typedef int56_t int_fast56_t; +typedef uint56_t uint_fast56_t; +# undef __int_least32_t +# define __int_least32_t int56_t +# undef __uint_least32_t +# define __uint_least32_t uint56_t +# undef __int_least16_t +# define __int_least16_t int56_t +# undef __uint_least16_t +# define __uint_least16_t uint56_t +# undef __int_least8_t +# define __int_least8_t int56_t +# undef __uint_least8_t +# define __uint_least8_t uint56_t +#endif /* __INT56_TYPE__ */ + + +#ifdef __INT48_TYPE__ +typedef __INT48_TYPE__ int48_t; +typedef __UINT48_TYPE__ uint48_t; +typedef int48_t int_least48_t; +typedef uint48_t uint_least48_t; +typedef int48_t int_fast48_t; +typedef uint48_t uint_fast48_t; +# undef __int_least32_t +# define __int_least32_t int48_t +# undef __uint_least32_t +# define __uint_least32_t uint48_t +# undef __int_least16_t +# define __int_least16_t int48_t +# undef __uint_least16_t +# define __uint_least16_t uint48_t +# undef __int_least8_t +# define __int_least8_t int48_t +# undef __uint_least8_t +# define __uint_least8_t uint48_t +#endif /* __INT48_TYPE__ */ + + +#ifdef __INT40_TYPE__ +typedef __INT40_TYPE__ int40_t; +typedef __UINT40_TYPE__ uint40_t; +typedef int40_t int_least40_t; +typedef uint40_t uint_least40_t; +typedef int40_t int_fast40_t; +typedef uint40_t uint_fast40_t; +# undef __int_least32_t +# define __int_least32_t int40_t +# undef __uint_least32_t +# define __uint_least32_t uint40_t +# undef __int_least16_t +# define __int_least16_t int40_t +# undef __uint_least16_t +# define __uint_least16_t uint40_t +# undef __int_least8_t +# define __int_least8_t int40_t +# undef __uint_least8_t +# define __uint_least8_t uint40_t +#endif /* __INT40_TYPE__ */ + + +#ifdef __INT32_TYPE__ + +# ifndef __int8_t_defined /* glibc sys/types.h also defines int32_t*/ +typedef __INT32_TYPE__ int32_t; +# endif /* __int8_t_defined */ + +# ifndef __uint32_t_defined /* more glibc compatibility */ +# define __uint32_t_defined +typedef __UINT32_TYPE__ uint32_t; +# endif /* __uint32_t_defined */ + +# undef __int_least32_t +# define __int_least32_t int32_t +# undef __uint_least32_t +# define __uint_least32_t uint32_t +# undef __int_least16_t +# define __int_least16_t int32_t +# undef __uint_least16_t +# define __uint_least16_t uint32_t +# undef __int_least8_t +# define __int_least8_t int32_t +# undef __uint_least8_t +# define __uint_least8_t uint32_t +#endif /* __INT32_TYPE__ */ + +#ifdef __int_least32_t +typedef __int_least32_t int_least32_t; +typedef __uint_least32_t uint_least32_t; +typedef __int_least32_t int_fast32_t; +typedef __uint_least32_t uint_fast32_t; +#endif /* __int_least32_t */ + +#ifdef __INT24_TYPE__ +typedef __INT24_TYPE__ int24_t; +typedef __UINT24_TYPE__ uint24_t; +typedef int24_t int_least24_t; +typedef uint24_t uint_least24_t; +typedef int24_t int_fast24_t; +typedef uint24_t uint_fast24_t; +# undef __int_least16_t +# define __int_least16_t int24_t +# undef __uint_least16_t +# define __uint_least16_t uint24_t +# undef __int_least8_t +# define __int_least8_t int24_t +# undef __uint_least8_t +# define __uint_least8_t uint24_t +#endif /* __INT24_TYPE__ */ + +#ifdef __INT16_TYPE__ +#ifndef __int8_t_defined /* glibc sys/types.h also defines int16_t*/ +typedef __INT16_TYPE__ int16_t; +#endif /* __int8_t_defined */ +typedef __UINT16_TYPE__ uint16_t; +# undef __int_least16_t +# define __int_least16_t int16_t +# undef __uint_least16_t +# define __uint_least16_t uint16_t +# undef __int_least8_t +# define __int_least8_t int16_t +# undef __uint_least8_t +# define __uint_least8_t uint16_t +#endif /* __INT16_TYPE__ */ + +#ifdef __int_least16_t +typedef __int_least16_t int_least16_t; +typedef __uint_least16_t uint_least16_t; +typedef __int_least16_t int_fast16_t; +typedef __uint_least16_t uint_fast16_t; +#endif /* __int_least16_t */ + + +#ifdef __INT8_TYPE__ +#ifndef __int8_t_defined /* glibc sys/types.h also defines int8_t*/ +typedef __INT8_TYPE__ int8_t; +#endif /* __int8_t_defined */ +typedef __UINT8_TYPE__ uint8_t; +# undef __int_least8_t +# define __int_least8_t int8_t +# undef __uint_least8_t +# define __uint_least8_t uint8_t +#endif /* __INT8_TYPE__ */ + +#ifdef __int_least8_t +typedef __int_least8_t int_least8_t; +typedef __uint_least8_t uint_least8_t; +typedef __int_least8_t int_fast8_t; +typedef __uint_least8_t uint_fast8_t; +#endif /* __int_least8_t */ + +/* prevent glibc sys/types.h from defining conflicting types */ +#ifndef __int8_t_defined +# define __int8_t_defined +#endif /* __int8_t_defined */ + +/* C99 7.18.1.4 Integer types capable of holding object pointers. + */ +#define __stdint_join3(a,b,c) a ## b ## c + +#ifndef _INTPTR_T +#ifndef __intptr_t_defined +typedef __INTPTR_TYPE__ intptr_t; +#define __intptr_t_defined +#define _INTPTR_T +#endif +#endif + +#ifndef _UINTPTR_T +typedef __UINTPTR_TYPE__ uintptr_t; +#define _UINTPTR_T +#endif + +/* C99 7.18.1.5 Greatest-width integer types. + */ +typedef __INTMAX_TYPE__ intmax_t; +typedef __UINTMAX_TYPE__ uintmax_t; + +/* C99 7.18.4 Macros for minimum-width integer constants. + * + * The standard requires that integer constant macros be defined for all the + * minimum-width types defined above. As 8-, 16-, 32-, and 64-bit minimum-width + * types are required, the corresponding integer constant macros are defined + * here. This implementation also defines minimum-width types for every other + * integer width that the target implements, so corresponding macros are + * defined below, too. + * + * These macros are defined using the same successive-shrinking approach as + * the type definitions above. It is likewise important that macros are defined + * in order of decending width. + * + * Note that C++ should not check __STDC_CONSTANT_MACROS here, contrary to the + * claims of the C standard (see C++ 18.3.1p2, [cstdint.syn]). + */ + +#define __int_c_join(a, b) a ## b +#define __int_c(v, suffix) __int_c_join(v, suffix) +#define __uint_c(v, suffix) __int_c_join(v##U, suffix) + + +#ifdef __INT64_TYPE__ +# undef __int64_c_suffix +# undef __int32_c_suffix +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT64_C_SUFFIX__ +# define __int64_c_suffix __INT64_C_SUFFIX__ +# define __int32_c_suffix __INT64_C_SUFFIX__ +# define __int16_c_suffix __INT64_C_SUFFIX__ +# define __int8_c_suffix __INT64_C_SUFFIX__ +# endif /* __INT64_C_SUFFIX__ */ +#endif /* __INT64_TYPE__ */ + +#ifdef __int_least64_t +# ifdef __int64_c_suffix +# define INT64_C(v) __int_c(v, __int64_c_suffix) +# define UINT64_C(v) __uint_c(v, __int64_c_suffix) +# else +# define INT64_C(v) v +# define UINT64_C(v) v ## U +# endif /* __int64_c_suffix */ +#endif /* __int_least64_t */ + + +#ifdef __INT56_TYPE__ +# undef __int32_c_suffix +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT56_C_SUFFIX__ +# define INT56_C(v) __int_c(v, __INT56_C_SUFFIX__) +# define UINT56_C(v) __uint_c(v, __INT56_C_SUFFIX__) +# define __int32_c_suffix __INT56_C_SUFFIX__ +# define __int16_c_suffix __INT56_C_SUFFIX__ +# define __int8_c_suffix __INT56_C_SUFFIX__ +# else +# define INT56_C(v) v +# define UINT56_C(v) v ## U +# endif /* __INT56_C_SUFFIX__ */ +#endif /* __INT56_TYPE__ */ + + +#ifdef __INT48_TYPE__ +# undef __int32_c_suffix +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT48_C_SUFFIX__ +# define INT48_C(v) __int_c(v, __INT48_C_SUFFIX__) +# define UINT48_C(v) __uint_c(v, __INT48_C_SUFFIX__) +# define __int32_c_suffix __INT48_C_SUFFIX__ +# define __int16_c_suffix __INT48_C_SUFFIX__ +# define __int8_c_suffix __INT48_C_SUFFIX__ +# else +# define INT48_C(v) v +# define UINT48_C(v) v ## U +# endif /* __INT48_C_SUFFIX__ */ +#endif /* __INT48_TYPE__ */ + + +#ifdef __INT40_TYPE__ +# undef __int32_c_suffix +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT40_C_SUFFIX__ +# define INT40_C(v) __int_c(v, __INT40_C_SUFFIX__) +# define UINT40_C(v) __uint_c(v, __INT40_C_SUFFIX__) +# define __int32_c_suffix __INT40_C_SUFFIX__ +# define __int16_c_suffix __INT40_C_SUFFIX__ +# define __int8_c_suffix __INT40_C_SUFFIX__ +# else +# define INT40_C(v) v +# define UINT40_C(v) v ## U +# endif /* __INT40_C_SUFFIX__ */ +#endif /* __INT40_TYPE__ */ + + +#ifdef __INT32_TYPE__ +# undef __int32_c_suffix +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT32_C_SUFFIX__ +# define __int32_c_suffix __INT32_C_SUFFIX__ +# define __int16_c_suffix __INT32_C_SUFFIX__ +# define __int8_c_suffix __INT32_C_SUFFIX__ +# endif /* __INT32_C_SUFFIX__ */ +#endif /* __INT32_TYPE__ */ + +#ifdef __int_least32_t +# ifdef __int32_c_suffix +# define INT32_C(v) __int_c(v, __int32_c_suffix) +# define UINT32_C(v) __uint_c(v, __int32_c_suffix) +# else +# define INT32_C(v) v +# define UINT32_C(v) v ## U +# endif /* __int32_c_suffix */ +#endif /* __int_least32_t */ + + +#ifdef __INT24_TYPE__ +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT24_C_SUFFIX__ +# define INT24_C(v) __int_c(v, __INT24_C_SUFFIX__) +# define UINT24_C(v) __uint_c(v, __INT24_C_SUFFIX__) +# define __int16_c_suffix __INT24_C_SUFFIX__ +# define __int8_c_suffix __INT24_C_SUFFIX__ +# else +# define INT24_C(v) v +# define UINT24_C(v) v ## U +# endif /* __INT24_C_SUFFIX__ */ +#endif /* __INT24_TYPE__ */ + + +#ifdef __INT16_TYPE__ +# undef __int16_c_suffix +# undef __int8_c_suffix +# ifdef __INT16_C_SUFFIX__ +# define __int16_c_suffix __INT16_C_SUFFIX__ +# define __int8_c_suffix __INT16_C_SUFFIX__ +# endif /* __INT16_C_SUFFIX__ */ +#endif /* __INT16_TYPE__ */ + +#ifdef __int_least16_t +# ifdef __int16_c_suffix +# define INT16_C(v) __int_c(v, __int16_c_suffix) +# define UINT16_C(v) __uint_c(v, __int16_c_suffix) +# else +# define INT16_C(v) v +# define UINT16_C(v) v ## U +# endif /* __int16_c_suffix */ +#endif /* __int_least16_t */ + + +#ifdef __INT8_TYPE__ +# undef __int8_c_suffix +# ifdef __INT8_C_SUFFIX__ +# define __int8_c_suffix __INT8_C_SUFFIX__ +# endif /* __INT8_C_SUFFIX__ */ +#endif /* __INT8_TYPE__ */ + +#ifdef __int_least8_t +# ifdef __int8_c_suffix +# define INT8_C(v) __int_c(v, __int8_c_suffix) +# define UINT8_C(v) __uint_c(v, __int8_c_suffix) +# else +# define INT8_C(v) v +# define UINT8_C(v) v ## U +# endif /* __int8_c_suffix */ +#endif /* __int_least8_t */ + + +/* C99 7.18.2.1 Limits of exact-width integer types. + * C99 7.18.2.2 Limits of minimum-width integer types. + * C99 7.18.2.3 Limits of fastest minimum-width integer types. + * + * The presence of limit macros are completely optional in C99. This + * implementation defines limits for all of the types (exact- and + * minimum-width) that it defines above, using the limits of the minimum-width + * type for any types that do not have exact-width representations. + * + * As in the type definitions, this section takes an approach of + * successive-shrinking to determine which limits to use for the standard (8, + * 16, 32, 64) bit widths when they don't have exact representations. It is + * therefore important that the definitions be kept in order of decending + * widths. + * + * Note that C++ should not check __STDC_LIMIT_MACROS here, contrary to the + * claims of the C standard (see C++ 18.3.1p2, [cstdint.syn]). + */ + +#ifdef __INT64_TYPE__ +# define INT64_MAX INT64_C( 9223372036854775807) +# define INT64_MIN (-INT64_C( 9223372036854775807)-1) +# define UINT64_MAX UINT64_C(18446744073709551615) + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT64_WIDTH 64 +# define INT64_WIDTH UINT64_WIDTH + +# define __UINT_LEAST64_WIDTH UINT64_WIDTH +# undef __UINT_LEAST32_WIDTH +# define __UINT_LEAST32_WIDTH UINT64_WIDTH +# undef __UINT_LEAST16_WIDTH +# define __UINT_LEAST16_WIDTH UINT64_WIDTH +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT64_MAX +#endif /* __STDC_VERSION__ */ + +# define __INT_LEAST64_MIN INT64_MIN +# define __INT_LEAST64_MAX INT64_MAX +# define __UINT_LEAST64_MAX UINT64_MAX +# undef __INT_LEAST32_MIN +# define __INT_LEAST32_MIN INT64_MIN +# undef __INT_LEAST32_MAX +# define __INT_LEAST32_MAX INT64_MAX +# undef __UINT_LEAST32_MAX +# define __UINT_LEAST32_MAX UINT64_MAX +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT64_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT64_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT64_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT64_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT64_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT64_MAX +#endif /* __INT64_TYPE__ */ + +#ifdef __INT_LEAST64_MIN +# define INT_LEAST64_MIN __INT_LEAST64_MIN +# define INT_LEAST64_MAX __INT_LEAST64_MAX +# define UINT_LEAST64_MAX __UINT_LEAST64_MAX +# define INT_FAST64_MIN __INT_LEAST64_MIN +# define INT_FAST64_MAX __INT_LEAST64_MAX +# define UINT_FAST64_MAX __UINT_LEAST64_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT_LEAST64_WIDTH __UINT_LEAST64_WIDTH +# define INT_LEAST64_WIDTH UINT_LEAST64_WIDTH +# define UINT_FAST64_WIDTH __UINT_LEAST64_WIDTH +# define INT_FAST64_WIDTH UINT_FAST64_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT_LEAST64_MIN */ + + +#ifdef __INT56_TYPE__ +# define INT56_MAX INT56_C(36028797018963967) +# define INT56_MIN (-INT56_C(36028797018963967)-1) +# define UINT56_MAX UINT56_C(72057594037927935) +# define INT_LEAST56_MIN INT56_MIN +# define INT_LEAST56_MAX INT56_MAX +# define UINT_LEAST56_MAX UINT56_MAX +# define INT_FAST56_MIN INT56_MIN +# define INT_FAST56_MAX INT56_MAX +# define UINT_FAST56_MAX UINT56_MAX + +# undef __INT_LEAST32_MIN +# define __INT_LEAST32_MIN INT56_MIN +# undef __INT_LEAST32_MAX +# define __INT_LEAST32_MAX INT56_MAX +# undef __UINT_LEAST32_MAX +# define __UINT_LEAST32_MAX UINT56_MAX +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT56_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT56_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT56_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT56_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT56_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT56_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT56_WIDTH 56 +# define INT56_WIDTH UINT56_WIDTH +# define UINT_LEAST56_WIDTH UINT56_WIDTH +# define INT_LEAST56_WIDTH UINT_LEAST56_WIDTH +# define UINT_FAST56_WIDTH UINT56_WIDTH +# define INT_FAST56_WIDTH UINT_FAST56_WIDTH +# undef __UINT_LEAST32_WIDTH +# define __UINT_LEAST32_WIDTH UINT56_WIDTH +# undef __UINT_LEAST16_WIDTH +# define __UINT_LEAST16_WIDTH UINT56_WIDTH +# undef __UINT_LEAST8_WIDTH +# define __UINT_LEAST8_WIDTH UINT56_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT56_TYPE__ */ + + +#ifdef __INT48_TYPE__ +# define INT48_MAX INT48_C(140737488355327) +# define INT48_MIN (-INT48_C(140737488355327)-1) +# define UINT48_MAX UINT48_C(281474976710655) +# define INT_LEAST48_MIN INT48_MIN +# define INT_LEAST48_MAX INT48_MAX +# define UINT_LEAST48_MAX UINT48_MAX +# define INT_FAST48_MIN INT48_MIN +# define INT_FAST48_MAX INT48_MAX +# define UINT_FAST48_MAX UINT48_MAX + +# undef __INT_LEAST32_MIN +# define __INT_LEAST32_MIN INT48_MIN +# undef __INT_LEAST32_MAX +# define __INT_LEAST32_MAX INT48_MAX +# undef __UINT_LEAST32_MAX +# define __UINT_LEAST32_MAX UINT48_MAX +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT48_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT48_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT48_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT48_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT48_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT48_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +#define UINT48_WIDTH 48 +#define INT48_WIDTH UINT48_WIDTH +#define UINT_LEAST48_WIDTH UINT48_WIDTH +#define INT_LEAST48_WIDTH UINT_LEAST48_WIDTH +#define UINT_FAST48_WIDTH UINT48_WIDTH +#define INT_FAST48_WIDTH UINT_FAST48_WIDTH +#undef __UINT_LEAST32_WIDTH +#define __UINT_LEAST32_WIDTH UINT48_WIDTH +# undef __UINT_LEAST16_WIDTH +#define __UINT_LEAST16_WIDTH UINT48_WIDTH +# undef __UINT_LEAST8_WIDTH +#define __UINT_LEAST8_WIDTH UINT48_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT48_TYPE__ */ + + +#ifdef __INT40_TYPE__ +# define INT40_MAX INT40_C(549755813887) +# define INT40_MIN (-INT40_C(549755813887)-1) +# define UINT40_MAX UINT40_C(1099511627775) +# define INT_LEAST40_MIN INT40_MIN +# define INT_LEAST40_MAX INT40_MAX +# define UINT_LEAST40_MAX UINT40_MAX +# define INT_FAST40_MIN INT40_MIN +# define INT_FAST40_MAX INT40_MAX +# define UINT_FAST40_MAX UINT40_MAX + +# undef __INT_LEAST32_MIN +# define __INT_LEAST32_MIN INT40_MIN +# undef __INT_LEAST32_MAX +# define __INT_LEAST32_MAX INT40_MAX +# undef __UINT_LEAST32_MAX +# define __UINT_LEAST32_MAX UINT40_MAX +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT40_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT40_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT40_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT40_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT40_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT40_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT40_WIDTH 40 +# define INT40_WIDTH UINT40_WIDTH +# define UINT_LEAST40_WIDTH UINT40_WIDTH +# define INT_LEAST40_WIDTH UINT_LEAST40_WIDTH +# define UINT_FAST40_WIDTH UINT40_WIDTH +# define INT_FAST40_WIDTH UINT_FAST40_WIDTH +# undef __UINT_LEAST32_WIDTH +# define __UINT_LEAST32_WIDTH UINT40_WIDTH +# undef __UINT_LEAST16_WIDTH +# define __UINT_LEAST16_WIDTH UINT40_WIDTH +# undef __UINT_LEAST8_WIDTH +# define __UINT_LEAST8_WIDTH UINT40_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT40_TYPE__ */ + + +#ifdef __INT32_TYPE__ +# define INT32_MAX INT32_C(2147483647) +# define INT32_MIN (-INT32_C(2147483647)-1) +# define UINT32_MAX UINT32_C(4294967295) + +# undef __INT_LEAST32_MIN +# define __INT_LEAST32_MIN INT32_MIN +# undef __INT_LEAST32_MAX +# define __INT_LEAST32_MAX INT32_MAX +# undef __UINT_LEAST32_MAX +# define __UINT_LEAST32_MAX UINT32_MAX +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT32_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT32_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT32_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT32_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT32_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT32_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT32_WIDTH 32 +# define INT32_WIDTH UINT32_WIDTH +# undef __UINT_LEAST32_WIDTH +# define __UINT_LEAST32_WIDTH UINT32_WIDTH +# undef __UINT_LEAST16_WIDTH +# define __UINT_LEAST16_WIDTH UINT32_WIDTH +# undef __UINT_LEAST8_WIDTH +# define __UINT_LEAST8_WIDTH UINT32_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT32_TYPE__ */ + +#ifdef __INT_LEAST32_MIN +# define INT_LEAST32_MIN __INT_LEAST32_MIN +# define INT_LEAST32_MAX __INT_LEAST32_MAX +# define UINT_LEAST32_MAX __UINT_LEAST32_MAX +# define INT_FAST32_MIN __INT_LEAST32_MIN +# define INT_FAST32_MAX __INT_LEAST32_MAX +# define UINT_FAST32_MAX __UINT_LEAST32_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT_LEAST32_WIDTH __UINT_LEAST32_WIDTH +# define INT_LEAST32_WIDTH UINT_LEAST32_WIDTH +# define UINT_FAST32_WIDTH __UINT_LEAST32_WIDTH +# define INT_FAST32_WIDTH UINT_FAST32_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT_LEAST32_MIN */ + + +#ifdef __INT24_TYPE__ +# define INT24_MAX INT24_C(8388607) +# define INT24_MIN (-INT24_C(8388607)-1) +# define UINT24_MAX UINT24_C(16777215) +# define INT_LEAST24_MIN INT24_MIN +# define INT_LEAST24_MAX INT24_MAX +# define UINT_LEAST24_MAX UINT24_MAX +# define INT_FAST24_MIN INT24_MIN +# define INT_FAST24_MAX INT24_MAX +# define UINT_FAST24_MAX UINT24_MAX + +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT24_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT24_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT24_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT24_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT24_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT24_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT24_WIDTH 24 +# define INT24_WIDTH UINT24_WIDTH +# define UINT_LEAST24_WIDTH UINT24_WIDTH +# define INT_LEAST24_WIDTH UINT_LEAST24_WIDTH +# define UINT_FAST24_WIDTH UINT24_WIDTH +# define INT_FAST24_WIDTH UINT_FAST24_WIDTH +# undef __UINT_LEAST16_WIDTH +# define __UINT_LEAST16_WIDTH UINT24_WIDTH +# undef __UINT_LEAST8_WIDTH +# define __UINT_LEAST8_WIDTH UINT24_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT24_TYPE__ */ + + +#ifdef __INT16_TYPE__ +#define INT16_MAX INT16_C(32767) +#define INT16_MIN (-INT16_C(32767)-1) +#define UINT16_MAX UINT16_C(65535) + +# undef __INT_LEAST16_MIN +# define __INT_LEAST16_MIN INT16_MIN +# undef __INT_LEAST16_MAX +# define __INT_LEAST16_MAX INT16_MAX +# undef __UINT_LEAST16_MAX +# define __UINT_LEAST16_MAX UINT16_MAX +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT16_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT16_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT16_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT16_WIDTH 16 +# define INT16_WIDTH UINT16_WIDTH +# undef __UINT_LEAST16_WIDTH +# define __UINT_LEAST16_WIDTH UINT16_WIDTH +# undef __UINT_LEAST8_WIDTH +# define __UINT_LEAST8_WIDTH UINT16_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT16_TYPE__ */ + +#ifdef __INT_LEAST16_MIN +# define INT_LEAST16_MIN __INT_LEAST16_MIN +# define INT_LEAST16_MAX __INT_LEAST16_MAX +# define UINT_LEAST16_MAX __UINT_LEAST16_MAX +# define INT_FAST16_MIN __INT_LEAST16_MIN +# define INT_FAST16_MAX __INT_LEAST16_MAX +# define UINT_FAST16_MAX __UINT_LEAST16_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT_LEAST16_WIDTH __UINT_LEAST16_WIDTH +# define INT_LEAST16_WIDTH UINT_LEAST16_WIDTH +# define UINT_FAST16_WIDTH __UINT_LEAST16_WIDTH +# define INT_FAST16_WIDTH UINT_FAST16_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT_LEAST16_MIN */ + + +#ifdef __INT8_TYPE__ +# define INT8_MAX INT8_C(127) +# define INT8_MIN (-INT8_C(127)-1) +# define UINT8_MAX UINT8_C(255) + +# undef __INT_LEAST8_MIN +# define __INT_LEAST8_MIN INT8_MIN +# undef __INT_LEAST8_MAX +# define __INT_LEAST8_MAX INT8_MAX +# undef __UINT_LEAST8_MAX +# define __UINT_LEAST8_MAX UINT8_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT8_WIDTH 8 +# define INT8_WIDTH UINT8_WIDTH +# undef __UINT_LEAST8_WIDTH +# define __UINT_LEAST8_WIDTH UINT8_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT8_TYPE__ */ + +#ifdef __INT_LEAST8_MIN +# define INT_LEAST8_MIN __INT_LEAST8_MIN +# define INT_LEAST8_MAX __INT_LEAST8_MAX +# define UINT_LEAST8_MAX __UINT_LEAST8_MAX +# define INT_FAST8_MIN __INT_LEAST8_MIN +# define INT_FAST8_MAX __INT_LEAST8_MAX +# define UINT_FAST8_MAX __UINT_LEAST8_MAX + +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +# define UINT_LEAST8_WIDTH __UINT_LEAST8_WIDTH +# define INT_LEAST8_WIDTH UINT_LEAST8_WIDTH +# define UINT_FAST8_WIDTH __UINT_LEAST8_WIDTH +# define INT_FAST8_WIDTH UINT_FAST8_WIDTH +#endif /* __STDC_VERSION__ */ +#endif /* __INT_LEAST8_MIN */ + +/* Some utility macros */ +#define __INTN_MIN(n) __stdint_join3( INT, n, _MIN) +#define __INTN_MAX(n) __stdint_join3( INT, n, _MAX) +#define __UINTN_MAX(n) __stdint_join3(UINT, n, _MAX) +#define __INTN_C(n, v) __stdint_join3( INT, n, _C(v)) +#define __UINTN_C(n, v) __stdint_join3(UINT, n, _C(v)) + +/* C99 7.18.2.4 Limits of integer types capable of holding object pointers. */ +/* C99 7.18.3 Limits of other integer types. */ + +#define INTPTR_MIN (-__INTPTR_MAX__-1) +#define INTPTR_MAX __INTPTR_MAX__ +#define UINTPTR_MAX __UINTPTR_MAX__ +#define PTRDIFF_MIN (-__PTRDIFF_MAX__-1) +#define PTRDIFF_MAX __PTRDIFF_MAX__ +#define SIZE_MAX __SIZE_MAX__ + +/* C23 7.22.2.4 Width of integer types capable of holding object pointers. */ +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +/* NB: The C standard requires that these be the same value, but the compiler + exposes separate internal width macros. */ +#define INTPTR_WIDTH __INTPTR_WIDTH__ +#define UINTPTR_WIDTH __UINTPTR_WIDTH__ +#endif + +/* ISO9899:2011 7.20 (C11 Annex K): Define RSIZE_MAX if __STDC_WANT_LIB_EXT1__ + * is enabled. */ +#if defined(__STDC_WANT_LIB_EXT1__) && __STDC_WANT_LIB_EXT1__ >= 1 +#define RSIZE_MAX (SIZE_MAX >> 1) +#endif + +/* C99 7.18.2.5 Limits of greatest-width integer types. */ +#define INTMAX_MIN (-__INTMAX_MAX__-1) +#define INTMAX_MAX __INTMAX_MAX__ +#define UINTMAX_MAX __UINTMAX_MAX__ + +/* C23 7.22.2.5 Width of greatest-width integer types. */ +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +/* NB: The C standard requires that these be the same value, but the compiler + exposes separate internal width macros. */ +#define INTMAX_WIDTH __INTMAX_WIDTH__ +#define UINTMAX_WIDTH __UINTMAX_WIDTH__ +#endif + +/* C99 7.18.3 Limits of other integer types. */ +#define SIG_ATOMIC_MIN __INTN_MIN(__SIG_ATOMIC_WIDTH__) +#define SIG_ATOMIC_MAX __INTN_MAX(__SIG_ATOMIC_WIDTH__) +#ifdef __WINT_UNSIGNED__ +# define WINT_MIN __UINTN_C(__WINT_WIDTH__, 0) +# define WINT_MAX __UINTN_MAX(__WINT_WIDTH__) +#else +# define WINT_MIN __INTN_MIN(__WINT_WIDTH__) +# define WINT_MAX __INTN_MAX(__WINT_WIDTH__) +#endif + +#ifndef WCHAR_MAX +# define WCHAR_MAX __WCHAR_MAX__ +#endif +#ifndef WCHAR_MIN +# if __WCHAR_MAX__ == __INTN_MAX(__WCHAR_WIDTH__) +# define WCHAR_MIN __INTN_MIN(__WCHAR_WIDTH__) +# else +# define WCHAR_MIN __UINTN_C(__WCHAR_WIDTH__, 0) +# endif +#endif + +/* 7.18.4.2 Macros for greatest-width integer constants. */ +#define INTMAX_C(v) __int_c(v, __INTMAX_C_SUFFIX__) +#define UINTMAX_C(v) __int_c(v, __UINTMAX_C_SUFFIX__) + +/* C23 7.22.3.x Width of other integer types. */ +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L +#define PTRDIFF_WIDTH __PTRDIFF_WIDTH__ +#define SIG_ATOMIC_WIDTH __SIG_ATOMIC_WIDTH__ +#define SIZE_WIDTH __SIZE_WIDTH__ +#define WCHAR_WIDTH __WCHAR_WIDTH__ +#define WINT_WIDTH __WINT_WIDTH__ +#endif + +#endif /* __STDC_HOSTED__ */ +#endif /* __MVS__ */ +#endif /* __CLANG_STDINT_H */ diff --git a/llvm/lib/clang/19/include/stdnoreturn.h b/llvm/lib/clang/19/include/stdnoreturn.h new file mode 100644 index 0000000000000000000000000000000000000000..6a9b209c7218bd116049585098401dd1bb4dc498 --- /dev/null +++ b/llvm/lib/clang/19/include/stdnoreturn.h @@ -0,0 +1,35 @@ +/*===---- stdnoreturn.h - Standard header for noreturn macro ---------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __STDNORETURN_H +#define __STDNORETURN_H + +#if defined(__MVS__) && __has_include_next() +#include_next +#else + +#define noreturn _Noreturn +#define __noreturn_is_defined 1 + +#endif /* __MVS__ */ + +#if (defined(__STDC_VERSION__) && __STDC_VERSION__ > 201710L) && \ + !defined(_CLANG_DISABLE_CRT_DEPRECATION_WARNINGS) +/* The noreturn macro is deprecated in C23. We do not mark it as such because + including the header file in C23 is also deprecated and we do not want to + issue a confusing diagnostic for code which includes + followed by code that writes [[noreturn]]. The issue with such code is not + with the attribute, or the use of 'noreturn', but the inclusion of the + header. */ +/* FIXME: We should be issuing a deprecation warning here, but cannot yet due + * to system headers which include this header file unconditionally. + */ +#endif + +#endif /* __STDNORETURN_H */ diff --git a/llvm/lib/clang/19/include/tbmintrin.h b/llvm/lib/clang/19/include/tbmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f4e848a1c0019c1ed5ce827d86fbe1054b203e60 --- /dev/null +++ b/llvm/lib/clang/19/include/tbmintrin.h @@ -0,0 +1,140 @@ +/*===---- tbmintrin.h - TBM intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __TBMINTRIN_H +#define __TBMINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("tbm"))) + +#define __bextri_u32(a, b) \ + ((unsigned int)__builtin_ia32_bextri_u32((unsigned int)(a), \ + (unsigned int)(b))) + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blcfill_u32(unsigned int __a) +{ + return __a & (__a + 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blci_u32(unsigned int __a) +{ + return __a | ~(__a + 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blcic_u32(unsigned int __a) +{ + return ~__a & (__a + 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blcmsk_u32(unsigned int __a) +{ + return __a ^ (__a + 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blcs_u32(unsigned int __a) +{ + return __a | (__a + 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blsfill_u32(unsigned int __a) +{ + return __a | (__a - 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__blsic_u32(unsigned int __a) +{ + return ~__a | (__a - 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__t1mskc_u32(unsigned int __a) +{ + return ~__a | (__a + 1); +} + +static __inline__ unsigned int __DEFAULT_FN_ATTRS +__tzmsk_u32(unsigned int __a) +{ + return ~__a & (__a - 1); +} + +#ifdef __x86_64__ +#define __bextri_u64(a, b) \ + ((unsigned long long)__builtin_ia32_bextri_u64((unsigned long long)(a), \ + (unsigned long long)(b))) + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blcfill_u64(unsigned long long __a) +{ + return __a & (__a + 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blci_u64(unsigned long long __a) +{ + return __a | ~(__a + 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blcic_u64(unsigned long long __a) +{ + return ~__a & (__a + 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blcmsk_u64(unsigned long long __a) +{ + return __a ^ (__a + 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blcs_u64(unsigned long long __a) +{ + return __a | (__a + 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blsfill_u64(unsigned long long __a) +{ + return __a | (__a - 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__blsic_u64(unsigned long long __a) +{ + return ~__a | (__a - 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__t1mskc_u64(unsigned long long __a) +{ + return ~__a | (__a + 1); +} + +static __inline__ unsigned long long __DEFAULT_FN_ATTRS +__tzmsk_u64(unsigned long long __a) +{ + return ~__a & (__a - 1); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif /* __TBMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/tgmath.h b/llvm/lib/clang/19/include/tgmath.h new file mode 100644 index 0000000000000000000000000000000000000000..7acf18b9dd3578e1d315eda874bd3dfe189eeb6d --- /dev/null +++ b/llvm/lib/clang/19/include/tgmath.h @@ -0,0 +1,1368 @@ +/*===---- tgmath.h - Standard header for type generic math ----------------===*\ + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * +\*===----------------------------------------------------------------------===*/ + +#ifndef __CLANG_TGMATH_H +#define __CLANG_TGMATH_H + +/* C99 7.22 Type-generic math . */ +#include + +/* + * Allow additional definitions and implementation-defined values on Apple + * platforms. This is done after #include to avoid depcycle conflicts + * between libcxx and darwin in C++ modules builds. + */ +#if defined(__APPLE__) && __STDC_HOSTED__ && __has_include_next() +# include_next +#else + +/* C++ handles type genericity with overloading in math.h. */ +#ifndef __cplusplus +#include + +#define _TG_ATTRSp __attribute__((__overloadable__)) +#define _TG_ATTRS __attribute__((__overloadable__, __always_inline__)) + +// promotion + +typedef void _Argument_type_is_not_arithmetic; +static _Argument_type_is_not_arithmetic __tg_promote(...) + __attribute__((__unavailable__,__overloadable__)); +static double _TG_ATTRSp __tg_promote(int); +static double _TG_ATTRSp __tg_promote(unsigned int); +static double _TG_ATTRSp __tg_promote(long); +static double _TG_ATTRSp __tg_promote(unsigned long); +static double _TG_ATTRSp __tg_promote(long long); +static double _TG_ATTRSp __tg_promote(unsigned long long); +static float _TG_ATTRSp __tg_promote(float); +static double _TG_ATTRSp __tg_promote(double); +static long double _TG_ATTRSp __tg_promote(long double); +static float _Complex _TG_ATTRSp __tg_promote(float _Complex); +static double _Complex _TG_ATTRSp __tg_promote(double _Complex); +static long double _Complex _TG_ATTRSp __tg_promote(long double _Complex); + +#define __tg_promote1(__x) (__typeof__(__tg_promote(__x))) +#define __tg_promote2(__x, __y) (__typeof__(__tg_promote(__x) + \ + __tg_promote(__y))) +#define __tg_promote3(__x, __y, __z) (__typeof__(__tg_promote(__x) + \ + __tg_promote(__y) + \ + __tg_promote(__z))) + +// acos + +static float + _TG_ATTRS + __tg_acos(float __x) {return acosf(__x);} + +static double + _TG_ATTRS + __tg_acos(double __x) {return acos(__x);} + +static long double + _TG_ATTRS + __tg_acos(long double __x) {return acosl(__x);} + +static float _Complex + _TG_ATTRS + __tg_acos(float _Complex __x) {return cacosf(__x);} + +static double _Complex + _TG_ATTRS + __tg_acos(double _Complex __x) {return cacos(__x);} + +static long double _Complex + _TG_ATTRS + __tg_acos(long double _Complex __x) {return cacosl(__x);} + +#undef acos +#define acos(__x) __tg_acos(__tg_promote1((__x))(__x)) + +// asin + +static float + _TG_ATTRS + __tg_asin(float __x) {return asinf(__x);} + +static double + _TG_ATTRS + __tg_asin(double __x) {return asin(__x);} + +static long double + _TG_ATTRS + __tg_asin(long double __x) {return asinl(__x);} + +static float _Complex + _TG_ATTRS + __tg_asin(float _Complex __x) {return casinf(__x);} + +static double _Complex + _TG_ATTRS + __tg_asin(double _Complex __x) {return casin(__x);} + +static long double _Complex + _TG_ATTRS + __tg_asin(long double _Complex __x) {return casinl(__x);} + +#undef asin +#define asin(__x) __tg_asin(__tg_promote1((__x))(__x)) + +// atan + +static float + _TG_ATTRS + __tg_atan(float __x) {return atanf(__x);} + +static double + _TG_ATTRS + __tg_atan(double __x) {return atan(__x);} + +static long double + _TG_ATTRS + __tg_atan(long double __x) {return atanl(__x);} + +static float _Complex + _TG_ATTRS + __tg_atan(float _Complex __x) {return catanf(__x);} + +static double _Complex + _TG_ATTRS + __tg_atan(double _Complex __x) {return catan(__x);} + +static long double _Complex + _TG_ATTRS + __tg_atan(long double _Complex __x) {return catanl(__x);} + +#undef atan +#define atan(__x) __tg_atan(__tg_promote1((__x))(__x)) + +// acosh + +static float + _TG_ATTRS + __tg_acosh(float __x) {return acoshf(__x);} + +static double + _TG_ATTRS + __tg_acosh(double __x) {return acosh(__x);} + +static long double + _TG_ATTRS + __tg_acosh(long double __x) {return acoshl(__x);} + +static float _Complex + _TG_ATTRS + __tg_acosh(float _Complex __x) {return cacoshf(__x);} + +static double _Complex + _TG_ATTRS + __tg_acosh(double _Complex __x) {return cacosh(__x);} + +static long double _Complex + _TG_ATTRS + __tg_acosh(long double _Complex __x) {return cacoshl(__x);} + +#undef acosh +#define acosh(__x) __tg_acosh(__tg_promote1((__x))(__x)) + +// asinh + +static float + _TG_ATTRS + __tg_asinh(float __x) {return asinhf(__x);} + +static double + _TG_ATTRS + __tg_asinh(double __x) {return asinh(__x);} + +static long double + _TG_ATTRS + __tg_asinh(long double __x) {return asinhl(__x);} + +static float _Complex + _TG_ATTRS + __tg_asinh(float _Complex __x) {return casinhf(__x);} + +static double _Complex + _TG_ATTRS + __tg_asinh(double _Complex __x) {return casinh(__x);} + +static long double _Complex + _TG_ATTRS + __tg_asinh(long double _Complex __x) {return casinhl(__x);} + +#undef asinh +#define asinh(__x) __tg_asinh(__tg_promote1((__x))(__x)) + +// atanh + +static float + _TG_ATTRS + __tg_atanh(float __x) {return atanhf(__x);} + +static double + _TG_ATTRS + __tg_atanh(double __x) {return atanh(__x);} + +static long double + _TG_ATTRS + __tg_atanh(long double __x) {return atanhl(__x);} + +static float _Complex + _TG_ATTRS + __tg_atanh(float _Complex __x) {return catanhf(__x);} + +static double _Complex + _TG_ATTRS + __tg_atanh(double _Complex __x) {return catanh(__x);} + +static long double _Complex + _TG_ATTRS + __tg_atanh(long double _Complex __x) {return catanhl(__x);} + +#undef atanh +#define atanh(__x) __tg_atanh(__tg_promote1((__x))(__x)) + +// cos + +static float + _TG_ATTRS + __tg_cos(float __x) {return cosf(__x);} + +static double + _TG_ATTRS + __tg_cos(double __x) {return cos(__x);} + +static long double + _TG_ATTRS + __tg_cos(long double __x) {return cosl(__x);} + +static float _Complex + _TG_ATTRS + __tg_cos(float _Complex __x) {return ccosf(__x);} + +static double _Complex + _TG_ATTRS + __tg_cos(double _Complex __x) {return ccos(__x);} + +static long double _Complex + _TG_ATTRS + __tg_cos(long double _Complex __x) {return ccosl(__x);} + +#undef cos +#define cos(__x) __tg_cos(__tg_promote1((__x))(__x)) + +// sin + +static float + _TG_ATTRS + __tg_sin(float __x) {return sinf(__x);} + +static double + _TG_ATTRS + __tg_sin(double __x) {return sin(__x);} + +static long double + _TG_ATTRS + __tg_sin(long double __x) {return sinl(__x);} + +static float _Complex + _TG_ATTRS + __tg_sin(float _Complex __x) {return csinf(__x);} + +static double _Complex + _TG_ATTRS + __tg_sin(double _Complex __x) {return csin(__x);} + +static long double _Complex + _TG_ATTRS + __tg_sin(long double _Complex __x) {return csinl(__x);} + +#undef sin +#define sin(__x) __tg_sin(__tg_promote1((__x))(__x)) + +// tan + +static float + _TG_ATTRS + __tg_tan(float __x) {return tanf(__x);} + +static double + _TG_ATTRS + __tg_tan(double __x) {return tan(__x);} + +static long double + _TG_ATTRS + __tg_tan(long double __x) {return tanl(__x);} + +static float _Complex + _TG_ATTRS + __tg_tan(float _Complex __x) {return ctanf(__x);} + +static double _Complex + _TG_ATTRS + __tg_tan(double _Complex __x) {return ctan(__x);} + +static long double _Complex + _TG_ATTRS + __tg_tan(long double _Complex __x) {return ctanl(__x);} + +#undef tan +#define tan(__x) __tg_tan(__tg_promote1((__x))(__x)) + +// cosh + +static float + _TG_ATTRS + __tg_cosh(float __x) {return coshf(__x);} + +static double + _TG_ATTRS + __tg_cosh(double __x) {return cosh(__x);} + +static long double + _TG_ATTRS + __tg_cosh(long double __x) {return coshl(__x);} + +static float _Complex + _TG_ATTRS + __tg_cosh(float _Complex __x) {return ccoshf(__x);} + +static double _Complex + _TG_ATTRS + __tg_cosh(double _Complex __x) {return ccosh(__x);} + +static long double _Complex + _TG_ATTRS + __tg_cosh(long double _Complex __x) {return ccoshl(__x);} + +#undef cosh +#define cosh(__x) __tg_cosh(__tg_promote1((__x))(__x)) + +// sinh + +static float + _TG_ATTRS + __tg_sinh(float __x) {return sinhf(__x);} + +static double + _TG_ATTRS + __tg_sinh(double __x) {return sinh(__x);} + +static long double + _TG_ATTRS + __tg_sinh(long double __x) {return sinhl(__x);} + +static float _Complex + _TG_ATTRS + __tg_sinh(float _Complex __x) {return csinhf(__x);} + +static double _Complex + _TG_ATTRS + __tg_sinh(double _Complex __x) {return csinh(__x);} + +static long double _Complex + _TG_ATTRS + __tg_sinh(long double _Complex __x) {return csinhl(__x);} + +#undef sinh +#define sinh(__x) __tg_sinh(__tg_promote1((__x))(__x)) + +// tanh + +static float + _TG_ATTRS + __tg_tanh(float __x) {return tanhf(__x);} + +static double + _TG_ATTRS + __tg_tanh(double __x) {return tanh(__x);} + +static long double + _TG_ATTRS + __tg_tanh(long double __x) {return tanhl(__x);} + +static float _Complex + _TG_ATTRS + __tg_tanh(float _Complex __x) {return ctanhf(__x);} + +static double _Complex + _TG_ATTRS + __tg_tanh(double _Complex __x) {return ctanh(__x);} + +static long double _Complex + _TG_ATTRS + __tg_tanh(long double _Complex __x) {return ctanhl(__x);} + +#undef tanh +#define tanh(__x) __tg_tanh(__tg_promote1((__x))(__x)) + +// exp + +static float + _TG_ATTRS + __tg_exp(float __x) {return expf(__x);} + +static double + _TG_ATTRS + __tg_exp(double __x) {return exp(__x);} + +static long double + _TG_ATTRS + __tg_exp(long double __x) {return expl(__x);} + +static float _Complex + _TG_ATTRS + __tg_exp(float _Complex __x) {return cexpf(__x);} + +static double _Complex + _TG_ATTRS + __tg_exp(double _Complex __x) {return cexp(__x);} + +static long double _Complex + _TG_ATTRS + __tg_exp(long double _Complex __x) {return cexpl(__x);} + +#undef exp +#define exp(__x) __tg_exp(__tg_promote1((__x))(__x)) + +// log + +static float + _TG_ATTRS + __tg_log(float __x) {return logf(__x);} + +static double + _TG_ATTRS + __tg_log(double __x) {return log(__x);} + +static long double + _TG_ATTRS + __tg_log(long double __x) {return logl(__x);} + +static float _Complex + _TG_ATTRS + __tg_log(float _Complex __x) {return clogf(__x);} + +static double _Complex + _TG_ATTRS + __tg_log(double _Complex __x) {return clog(__x);} + +static long double _Complex + _TG_ATTRS + __tg_log(long double _Complex __x) {return clogl(__x);} + +#undef log +#define log(__x) __tg_log(__tg_promote1((__x))(__x)) + +// pow + +static float + _TG_ATTRS + __tg_pow(float __x, float __y) {return powf(__x, __y);} + +static double + _TG_ATTRS + __tg_pow(double __x, double __y) {return pow(__x, __y);} + +static long double + _TG_ATTRS + __tg_pow(long double __x, long double __y) {return powl(__x, __y);} + +static float _Complex + _TG_ATTRS + __tg_pow(float _Complex __x, float _Complex __y) {return cpowf(__x, __y);} + +static double _Complex + _TG_ATTRS + __tg_pow(double _Complex __x, double _Complex __y) {return cpow(__x, __y);} + +static long double _Complex + _TG_ATTRS + __tg_pow(long double _Complex __x, long double _Complex __y) + {return cpowl(__x, __y);} + +#undef pow +#define pow(__x, __y) __tg_pow(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// sqrt + +static float + _TG_ATTRS + __tg_sqrt(float __x) {return sqrtf(__x);} + +static double + _TG_ATTRS + __tg_sqrt(double __x) {return sqrt(__x);} + +static long double + _TG_ATTRS + __tg_sqrt(long double __x) {return sqrtl(__x);} + +static float _Complex + _TG_ATTRS + __tg_sqrt(float _Complex __x) {return csqrtf(__x);} + +static double _Complex + _TG_ATTRS + __tg_sqrt(double _Complex __x) {return csqrt(__x);} + +static long double _Complex + _TG_ATTRS + __tg_sqrt(long double _Complex __x) {return csqrtl(__x);} + +#undef sqrt +#define sqrt(__x) __tg_sqrt(__tg_promote1((__x))(__x)) + +// fabs + +static float + _TG_ATTRS + __tg_fabs(float __x) {return fabsf(__x);} + +static double + _TG_ATTRS + __tg_fabs(double __x) {return fabs(__x);} + +static long double + _TG_ATTRS + __tg_fabs(long double __x) {return fabsl(__x);} + +static float + _TG_ATTRS + __tg_fabs(float _Complex __x) {return cabsf(__x);} + +static double + _TG_ATTRS + __tg_fabs(double _Complex __x) {return cabs(__x);} + +static long double + _TG_ATTRS + __tg_fabs(long double _Complex __x) {return cabsl(__x);} + +#undef fabs +#define fabs(__x) __tg_fabs(__tg_promote1((__x))(__x)) + +// atan2 + +static float + _TG_ATTRS + __tg_atan2(float __x, float __y) {return atan2f(__x, __y);} + +static double + _TG_ATTRS + __tg_atan2(double __x, double __y) {return atan2(__x, __y);} + +static long double + _TG_ATTRS + __tg_atan2(long double __x, long double __y) {return atan2l(__x, __y);} + +#undef atan2 +#define atan2(__x, __y) __tg_atan2(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// cbrt + +static float + _TG_ATTRS + __tg_cbrt(float __x) {return cbrtf(__x);} + +static double + _TG_ATTRS + __tg_cbrt(double __x) {return cbrt(__x);} + +static long double + _TG_ATTRS + __tg_cbrt(long double __x) {return cbrtl(__x);} + +#undef cbrt +#define cbrt(__x) __tg_cbrt(__tg_promote1((__x))(__x)) + +// ceil + +static float + _TG_ATTRS + __tg_ceil(float __x) {return ceilf(__x);} + +static double + _TG_ATTRS + __tg_ceil(double __x) {return ceil(__x);} + +static long double + _TG_ATTRS + __tg_ceil(long double __x) {return ceill(__x);} + +#undef ceil +#define ceil(__x) __tg_ceil(__tg_promote1((__x))(__x)) + +// copysign + +static float + _TG_ATTRS + __tg_copysign(float __x, float __y) {return copysignf(__x, __y);} + +static double + _TG_ATTRS + __tg_copysign(double __x, double __y) {return copysign(__x, __y);} + +static long double + _TG_ATTRS + __tg_copysign(long double __x, long double __y) {return copysignl(__x, __y);} + +#undef copysign +#define copysign(__x, __y) __tg_copysign(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// erf + +static float + _TG_ATTRS + __tg_erf(float __x) {return erff(__x);} + +static double + _TG_ATTRS + __tg_erf(double __x) {return erf(__x);} + +static long double + _TG_ATTRS + __tg_erf(long double __x) {return erfl(__x);} + +#undef erf +#define erf(__x) __tg_erf(__tg_promote1((__x))(__x)) + +// erfc + +static float + _TG_ATTRS + __tg_erfc(float __x) {return erfcf(__x);} + +static double + _TG_ATTRS + __tg_erfc(double __x) {return erfc(__x);} + +static long double + _TG_ATTRS + __tg_erfc(long double __x) {return erfcl(__x);} + +#undef erfc +#define erfc(__x) __tg_erfc(__tg_promote1((__x))(__x)) + +// exp2 + +static float + _TG_ATTRS + __tg_exp2(float __x) {return exp2f(__x);} + +static double + _TG_ATTRS + __tg_exp2(double __x) {return exp2(__x);} + +static long double + _TG_ATTRS + __tg_exp2(long double __x) {return exp2l(__x);} + +#undef exp2 +#define exp2(__x) __tg_exp2(__tg_promote1((__x))(__x)) + +// expm1 + +static float + _TG_ATTRS + __tg_expm1(float __x) {return expm1f(__x);} + +static double + _TG_ATTRS + __tg_expm1(double __x) {return expm1(__x);} + +static long double + _TG_ATTRS + __tg_expm1(long double __x) {return expm1l(__x);} + +#undef expm1 +#define expm1(__x) __tg_expm1(__tg_promote1((__x))(__x)) + +// fdim + +static float + _TG_ATTRS + __tg_fdim(float __x, float __y) {return fdimf(__x, __y);} + +static double + _TG_ATTRS + __tg_fdim(double __x, double __y) {return fdim(__x, __y);} + +static long double + _TG_ATTRS + __tg_fdim(long double __x, long double __y) {return fdiml(__x, __y);} + +#undef fdim +#define fdim(__x, __y) __tg_fdim(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// floor + +static float + _TG_ATTRS + __tg_floor(float __x) {return floorf(__x);} + +static double + _TG_ATTRS + __tg_floor(double __x) {return floor(__x);} + +static long double + _TG_ATTRS + __tg_floor(long double __x) {return floorl(__x);} + +#undef floor +#define floor(__x) __tg_floor(__tg_promote1((__x))(__x)) + +// fma + +static float + _TG_ATTRS + __tg_fma(float __x, float __y, float __z) + {return fmaf(__x, __y, __z);} + +static double + _TG_ATTRS + __tg_fma(double __x, double __y, double __z) + {return fma(__x, __y, __z);} + +static long double + _TG_ATTRS + __tg_fma(long double __x,long double __y, long double __z) + {return fmal(__x, __y, __z);} + +#undef fma +#define fma(__x, __y, __z) \ + __tg_fma(__tg_promote3((__x), (__y), (__z))(__x), \ + __tg_promote3((__x), (__y), (__z))(__y), \ + __tg_promote3((__x), (__y), (__z))(__z)) + +// fmax + +static float + _TG_ATTRS + __tg_fmax(float __x, float __y) {return fmaxf(__x, __y);} + +static double + _TG_ATTRS + __tg_fmax(double __x, double __y) {return fmax(__x, __y);} + +static long double + _TG_ATTRS + __tg_fmax(long double __x, long double __y) {return fmaxl(__x, __y);} + +#undef fmax +#define fmax(__x, __y) __tg_fmax(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// fmin + +static float + _TG_ATTRS + __tg_fmin(float __x, float __y) {return fminf(__x, __y);} + +static double + _TG_ATTRS + __tg_fmin(double __x, double __y) {return fmin(__x, __y);} + +static long double + _TG_ATTRS + __tg_fmin(long double __x, long double __y) {return fminl(__x, __y);} + +#undef fmin +#define fmin(__x, __y) __tg_fmin(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// fmod + +static float + _TG_ATTRS + __tg_fmod(float __x, float __y) {return fmodf(__x, __y);} + +static double + _TG_ATTRS + __tg_fmod(double __x, double __y) {return fmod(__x, __y);} + +static long double + _TG_ATTRS + __tg_fmod(long double __x, long double __y) {return fmodl(__x, __y);} + +#undef fmod +#define fmod(__x, __y) __tg_fmod(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// frexp + +static float + _TG_ATTRS + __tg_frexp(float __x, int* __y) {return frexpf(__x, __y);} + +static double + _TG_ATTRS + __tg_frexp(double __x, int* __y) {return frexp(__x, __y);} + +static long double + _TG_ATTRS + __tg_frexp(long double __x, int* __y) {return frexpl(__x, __y);} + +#undef frexp +#define frexp(__x, __y) __tg_frexp(__tg_promote1((__x))(__x), __y) + +// hypot + +static float + _TG_ATTRS + __tg_hypot(float __x, float __y) {return hypotf(__x, __y);} + +static double + _TG_ATTRS + __tg_hypot(double __x, double __y) {return hypot(__x, __y);} + +static long double + _TG_ATTRS + __tg_hypot(long double __x, long double __y) {return hypotl(__x, __y);} + +#undef hypot +#define hypot(__x, __y) __tg_hypot(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// ilogb + +static int + _TG_ATTRS + __tg_ilogb(float __x) {return ilogbf(__x);} + +static int + _TG_ATTRS + __tg_ilogb(double __x) {return ilogb(__x);} + +static int + _TG_ATTRS + __tg_ilogb(long double __x) {return ilogbl(__x);} + +#undef ilogb +#define ilogb(__x) __tg_ilogb(__tg_promote1((__x))(__x)) + +// ldexp + +static float + _TG_ATTRS + __tg_ldexp(float __x, int __y) {return ldexpf(__x, __y);} + +static double + _TG_ATTRS + __tg_ldexp(double __x, int __y) {return ldexp(__x, __y);} + +static long double + _TG_ATTRS + __tg_ldexp(long double __x, int __y) {return ldexpl(__x, __y);} + +#undef ldexp +#define ldexp(__x, __y) __tg_ldexp(__tg_promote1((__x))(__x), __y) + +// lgamma + +static float + _TG_ATTRS + __tg_lgamma(float __x) {return lgammaf(__x);} + +static double + _TG_ATTRS + __tg_lgamma(double __x) {return lgamma(__x);} + +static long double + _TG_ATTRS + __tg_lgamma(long double __x) {return lgammal(__x);} + +#undef lgamma +#define lgamma(__x) __tg_lgamma(__tg_promote1((__x))(__x)) + +// llrint + +static long long + _TG_ATTRS + __tg_llrint(float __x) {return llrintf(__x);} + +static long long + _TG_ATTRS + __tg_llrint(double __x) {return llrint(__x);} + +static long long + _TG_ATTRS + __tg_llrint(long double __x) {return llrintl(__x);} + +#undef llrint +#define llrint(__x) __tg_llrint(__tg_promote1((__x))(__x)) + +// llround + +static long long + _TG_ATTRS + __tg_llround(float __x) {return llroundf(__x);} + +static long long + _TG_ATTRS + __tg_llround(double __x) {return llround(__x);} + +static long long + _TG_ATTRS + __tg_llround(long double __x) {return llroundl(__x);} + +#undef llround +#define llround(__x) __tg_llround(__tg_promote1((__x))(__x)) + +// log10 + +static float + _TG_ATTRS + __tg_log10(float __x) {return log10f(__x);} + +static double + _TG_ATTRS + __tg_log10(double __x) {return log10(__x);} + +static long double + _TG_ATTRS + __tg_log10(long double __x) {return log10l(__x);} + +#undef log10 +#define log10(__x) __tg_log10(__tg_promote1((__x))(__x)) + +// log1p + +static float + _TG_ATTRS + __tg_log1p(float __x) {return log1pf(__x);} + +static double + _TG_ATTRS + __tg_log1p(double __x) {return log1p(__x);} + +static long double + _TG_ATTRS + __tg_log1p(long double __x) {return log1pl(__x);} + +#undef log1p +#define log1p(__x) __tg_log1p(__tg_promote1((__x))(__x)) + +// log2 + +static float + _TG_ATTRS + __tg_log2(float __x) {return log2f(__x);} + +static double + _TG_ATTRS + __tg_log2(double __x) {return log2(__x);} + +static long double + _TG_ATTRS + __tg_log2(long double __x) {return log2l(__x);} + +#undef log2 +#define log2(__x) __tg_log2(__tg_promote1((__x))(__x)) + +// logb + +static float + _TG_ATTRS + __tg_logb(float __x) {return logbf(__x);} + +static double + _TG_ATTRS + __tg_logb(double __x) {return logb(__x);} + +static long double + _TG_ATTRS + __tg_logb(long double __x) {return logbl(__x);} + +#undef logb +#define logb(__x) __tg_logb(__tg_promote1((__x))(__x)) + +// lrint + +static long + _TG_ATTRS + __tg_lrint(float __x) {return lrintf(__x);} + +static long + _TG_ATTRS + __tg_lrint(double __x) {return lrint(__x);} + +static long + _TG_ATTRS + __tg_lrint(long double __x) {return lrintl(__x);} + +#undef lrint +#define lrint(__x) __tg_lrint(__tg_promote1((__x))(__x)) + +// lround + +static long + _TG_ATTRS + __tg_lround(float __x) {return lroundf(__x);} + +static long + _TG_ATTRS + __tg_lround(double __x) {return lround(__x);} + +static long + _TG_ATTRS + __tg_lround(long double __x) {return lroundl(__x);} + +#undef lround +#define lround(__x) __tg_lround(__tg_promote1((__x))(__x)) + +// nearbyint + +static float + _TG_ATTRS + __tg_nearbyint(float __x) {return nearbyintf(__x);} + +static double + _TG_ATTRS + __tg_nearbyint(double __x) {return nearbyint(__x);} + +static long double + _TG_ATTRS + __tg_nearbyint(long double __x) {return nearbyintl(__x);} + +#undef nearbyint +#define nearbyint(__x) __tg_nearbyint(__tg_promote1((__x))(__x)) + +// nextafter + +static float + _TG_ATTRS + __tg_nextafter(float __x, float __y) {return nextafterf(__x, __y);} + +static double + _TG_ATTRS + __tg_nextafter(double __x, double __y) {return nextafter(__x, __y);} + +static long double + _TG_ATTRS + __tg_nextafter(long double __x, long double __y) {return nextafterl(__x, __y);} + +#undef nextafter +#define nextafter(__x, __y) __tg_nextafter(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// nexttoward + +static float + _TG_ATTRS + __tg_nexttoward(float __x, long double __y) {return nexttowardf(__x, __y);} + +static double + _TG_ATTRS + __tg_nexttoward(double __x, long double __y) {return nexttoward(__x, __y);} + +static long double + _TG_ATTRS + __tg_nexttoward(long double __x, long double __y) {return nexttowardl(__x, __y);} + +#undef nexttoward +#define nexttoward(__x, __y) __tg_nexttoward(__tg_promote1((__x))(__x), (__y)) + +// remainder + +static float + _TG_ATTRS + __tg_remainder(float __x, float __y) {return remainderf(__x, __y);} + +static double + _TG_ATTRS + __tg_remainder(double __x, double __y) {return remainder(__x, __y);} + +static long double + _TG_ATTRS + __tg_remainder(long double __x, long double __y) {return remainderl(__x, __y);} + +#undef remainder +#define remainder(__x, __y) __tg_remainder(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y)) + +// remquo + +static float + _TG_ATTRS + __tg_remquo(float __x, float __y, int* __z) + {return remquof(__x, __y, __z);} + +static double + _TG_ATTRS + __tg_remquo(double __x, double __y, int* __z) + {return remquo(__x, __y, __z);} + +static long double + _TG_ATTRS + __tg_remquo(long double __x,long double __y, int* __z) + {return remquol(__x, __y, __z);} + +#undef remquo +#define remquo(__x, __y, __z) \ + __tg_remquo(__tg_promote2((__x), (__y))(__x), \ + __tg_promote2((__x), (__y))(__y), \ + (__z)) + +// rint + +static float + _TG_ATTRS + __tg_rint(float __x) {return rintf(__x);} + +static double + _TG_ATTRS + __tg_rint(double __x) {return rint(__x);} + +static long double + _TG_ATTRS + __tg_rint(long double __x) {return rintl(__x);} + +#undef rint +#define rint(__x) __tg_rint(__tg_promote1((__x))(__x)) + +// round + +static float + _TG_ATTRS + __tg_round(float __x) {return roundf(__x);} + +static double + _TG_ATTRS + __tg_round(double __x) {return round(__x);} + +static long double + _TG_ATTRS + __tg_round(long double __x) {return roundl(__x);} + +#undef round +#define round(__x) __tg_round(__tg_promote1((__x))(__x)) + +// scalbn + +static float + _TG_ATTRS + __tg_scalbn(float __x, int __y) {return scalbnf(__x, __y);} + +static double + _TG_ATTRS + __tg_scalbn(double __x, int __y) {return scalbn(__x, __y);} + +static long double + _TG_ATTRS + __tg_scalbn(long double __x, int __y) {return scalbnl(__x, __y);} + +#undef scalbn +#define scalbn(__x, __y) __tg_scalbn(__tg_promote1((__x))(__x), __y) + +// scalbln + +static float + _TG_ATTRS + __tg_scalbln(float __x, long __y) {return scalblnf(__x, __y);} + +static double + _TG_ATTRS + __tg_scalbln(double __x, long __y) {return scalbln(__x, __y);} + +static long double + _TG_ATTRS + __tg_scalbln(long double __x, long __y) {return scalblnl(__x, __y);} + +#undef scalbln +#define scalbln(__x, __y) __tg_scalbln(__tg_promote1((__x))(__x), __y) + +// tgamma + +static float + _TG_ATTRS + __tg_tgamma(float __x) {return tgammaf(__x);} + +static double + _TG_ATTRS + __tg_tgamma(double __x) {return tgamma(__x);} + +static long double + _TG_ATTRS + __tg_tgamma(long double __x) {return tgammal(__x);} + +#undef tgamma +#define tgamma(__x) __tg_tgamma(__tg_promote1((__x))(__x)) + +// trunc + +static float + _TG_ATTRS + __tg_trunc(float __x) {return truncf(__x);} + +static double + _TG_ATTRS + __tg_trunc(double __x) {return trunc(__x);} + +static long double + _TG_ATTRS + __tg_trunc(long double __x) {return truncl(__x);} + +#undef trunc +#define trunc(__x) __tg_trunc(__tg_promote1((__x))(__x)) + +// carg + +static float + _TG_ATTRS + __tg_carg(float __x) {return atan2f(0.F, __x);} + +static double + _TG_ATTRS + __tg_carg(double __x) {return atan2(0., __x);} + +static long double + _TG_ATTRS + __tg_carg(long double __x) {return atan2l(0.L, __x);} + +static float + _TG_ATTRS + __tg_carg(float _Complex __x) {return cargf(__x);} + +static double + _TG_ATTRS + __tg_carg(double _Complex __x) {return carg(__x);} + +static long double + _TG_ATTRS + __tg_carg(long double _Complex __x) {return cargl(__x);} + +#undef carg +#define carg(__x) __tg_carg(__tg_promote1((__x))(__x)) + +// cimag + +static float + _TG_ATTRS + __tg_cimag(float __x) {return 0;} + +static double + _TG_ATTRS + __tg_cimag(double __x) {return 0;} + +static long double + _TG_ATTRS + __tg_cimag(long double __x) {return 0;} + +static float + _TG_ATTRS + __tg_cimag(float _Complex __x) {return cimagf(__x);} + +static double + _TG_ATTRS + __tg_cimag(double _Complex __x) {return cimag(__x);} + +static long double + _TG_ATTRS + __tg_cimag(long double _Complex __x) {return cimagl(__x);} + +#undef cimag +#define cimag(__x) __tg_cimag(__tg_promote1((__x))(__x)) + +// conj + +static float _Complex + _TG_ATTRS + __tg_conj(float __x) {return __x;} + +static double _Complex + _TG_ATTRS + __tg_conj(double __x) {return __x;} + +static long double _Complex + _TG_ATTRS + __tg_conj(long double __x) {return __x;} + +static float _Complex + _TG_ATTRS + __tg_conj(float _Complex __x) {return conjf(__x);} + +static double _Complex + _TG_ATTRS + __tg_conj(double _Complex __x) {return conj(__x);} + +static long double _Complex + _TG_ATTRS + __tg_conj(long double _Complex __x) {return conjl(__x);} + +#undef conj +#define conj(__x) __tg_conj(__tg_promote1((__x))(__x)) + +// cproj + +static float _Complex + _TG_ATTRS + __tg_cproj(float __x) {return cprojf(__x);} + +static double _Complex + _TG_ATTRS + __tg_cproj(double __x) {return cproj(__x);} + +static long double _Complex + _TG_ATTRS + __tg_cproj(long double __x) {return cprojl(__x);} + +static float _Complex + _TG_ATTRS + __tg_cproj(float _Complex __x) {return cprojf(__x);} + +static double _Complex + _TG_ATTRS + __tg_cproj(double _Complex __x) {return cproj(__x);} + +static long double _Complex + _TG_ATTRS + __tg_cproj(long double _Complex __x) {return cprojl(__x);} + +#undef cproj +#define cproj(__x) __tg_cproj(__tg_promote1((__x))(__x)) + +// creal + +static float + _TG_ATTRS + __tg_creal(float __x) {return __x;} + +static double + _TG_ATTRS + __tg_creal(double __x) {return __x;} + +static long double + _TG_ATTRS + __tg_creal(long double __x) {return __x;} + +static float + _TG_ATTRS + __tg_creal(float _Complex __x) {return crealf(__x);} + +static double + _TG_ATTRS + __tg_creal(double _Complex __x) {return creal(__x);} + +static long double + _TG_ATTRS + __tg_creal(long double _Complex __x) {return creall(__x);} + +#undef creal +#define creal(__x) __tg_creal(__tg_promote1((__x))(__x)) + +#undef _TG_ATTRSp +#undef _TG_ATTRS + +#endif /* __cplusplus */ +#endif /* __has_include_next */ +#endif /* __CLANG_TGMATH_H */ diff --git a/llvm/lib/clang/19/include/tmmintrin.h b/llvm/lib/clang/19/include/tmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..bf8327b692d1cfb86c2ed75de15ceae03b470229 --- /dev/null +++ b/llvm/lib/clang/19/include/tmmintrin.h @@ -0,0 +1,784 @@ +/*===---- tmmintrin.h - SSSE3 intrinsics -----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __TMMINTRIN_H +#define __TMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("ssse3,no-evex512"), __min_vector_width__(64))) +#define __DEFAULT_FN_ATTRS_MMX \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("mmx,ssse3,no-evex512"), \ + __min_vector_width__(64))) + +/// Computes the absolute value of each of the packed 8-bit signed +/// integers in the source operand and stores the 8-bit unsigned integer +/// results in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PABSB instruction. +/// +/// \param __a +/// A 64-bit vector of [8 x i8]. +/// \returns A 64-bit integer vector containing the absolute values of the +/// elements in the operand. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_abs_pi8(__m64 __a) +{ + return (__m64)__builtin_ia32_pabsb((__v8qi)__a); +} + +/// Computes the absolute value of each of the packed 8-bit signed +/// integers in the source operand and stores the 8-bit unsigned integer +/// results in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPABSB instruction. +/// +/// \param __a +/// A 128-bit vector of [16 x i8]. +/// \returns A 128-bit integer vector containing the absolute values of the +/// elements in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_abs_epi8(__m128i __a) +{ + return (__m128i)__builtin_elementwise_abs((__v16qs)__a); +} + +/// Computes the absolute value of each of the packed 16-bit signed +/// integers in the source operand and stores the 16-bit unsigned integer +/// results in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PABSW instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16]. +/// \returns A 64-bit integer vector containing the absolute values of the +/// elements in the operand. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_abs_pi16(__m64 __a) +{ + return (__m64)__builtin_ia32_pabsw((__v4hi)__a); +} + +/// Computes the absolute value of each of the packed 16-bit signed +/// integers in the source operand and stores the 16-bit unsigned integer +/// results in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPABSW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16]. +/// \returns A 128-bit integer vector containing the absolute values of the +/// elements in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_abs_epi16(__m128i __a) +{ + return (__m128i)__builtin_elementwise_abs((__v8hi)__a); +} + +/// Computes the absolute value of each of the packed 32-bit signed +/// integers in the source operand and stores the 32-bit unsigned integer +/// results in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PABSD instruction. +/// +/// \param __a +/// A 64-bit vector of [2 x i32]. +/// \returns A 64-bit integer vector containing the absolute values of the +/// elements in the operand. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_abs_pi32(__m64 __a) +{ + return (__m64)__builtin_ia32_pabsd((__v2si)__a); +} + +/// Computes the absolute value of each of the packed 32-bit signed +/// integers in the source operand and stores the 32-bit unsigned integer +/// results in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPABSD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32]. +/// \returns A 128-bit integer vector containing the absolute values of the +/// elements in the operand. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_abs_epi32(__m128i __a) +{ + return (__m128i)__builtin_elementwise_abs((__v4si)__a); +} + +/// Concatenates the two 128-bit integer vector operands, and +/// right-shifts the result by the number of bytes specified in the immediate +/// operand. +/// +/// \headerfile +/// +/// \code +/// __m128i _mm_alignr_epi8(__m128i a, __m128i b, const int n); +/// \endcode +/// +/// This intrinsic corresponds to the \c PALIGNR instruction. +/// +/// \param a +/// A 128-bit vector of [16 x i8] containing one of the source operands. +/// \param b +/// A 128-bit vector of [16 x i8] containing one of the source operands. +/// \param n +/// An immediate operand specifying how many bytes to right-shift the result. +/// \returns A 128-bit integer vector containing the concatenated right-shifted +/// value. +#define _mm_alignr_epi8(a, b, n) \ + ((__m128i)__builtin_ia32_palignr128((__v16qi)(__m128i)(a), \ + (__v16qi)(__m128i)(b), (n))) + +/// Concatenates the two 64-bit integer vector operands, and right-shifts +/// the result by the number of bytes specified in the immediate operand. +/// +/// \headerfile +/// +/// \code +/// __m64 _mm_alignr_pi8(__m64 a, __m64 b, const int n); +/// \endcode +/// +/// This intrinsic corresponds to the \c PALIGNR instruction. +/// +/// \param a +/// A 64-bit vector of [8 x i8] containing one of the source operands. +/// \param b +/// A 64-bit vector of [8 x i8] containing one of the source operands. +/// \param n +/// An immediate operand specifying how many bytes to right-shift the result. +/// \returns A 64-bit integer vector containing the concatenated right-shifted +/// value. +#define _mm_alignr_pi8(a, b, n) \ + ((__m64)__builtin_ia32_palignr((__v8qi)(__m64)(a), (__v8qi)(__m64)(b), (n))) + +/// Horizontally adds the adjacent pairs of values contained in 2 packed +/// 128-bit vectors of [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPHADDW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of +/// both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hadd_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b); +} + +/// Horizontally adds the adjacent pairs of values contained in 2 packed +/// 128-bit vectors of [4 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPHADDD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32] containing one of the source operands. The +/// horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 128-bit vector of [4 x i32] containing one of the source operands. The +/// horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of +/// both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hadd_epi32(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b); +} + +/// Horizontally adds the adjacent pairs of values contained in 2 packed +/// 64-bit vectors of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PHADDW instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both +/// operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_hadd_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_phaddw((__v4hi)__a, (__v4hi)__b); +} + +/// Horizontally adds the adjacent pairs of values contained in 2 packed +/// 64-bit vectors of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PHADDD instruction. +/// +/// \param __a +/// A 64-bit vector of [2 x i32] containing one of the source operands. The +/// horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 64-bit vector of [2 x i32] containing one of the source operands. The +/// horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both +/// operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_hadd_pi32(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_phaddd((__v2si)__a, (__v2si)__b); +} + +/// Horizontally adds, with saturation, the adjacent pairs of values contained +/// in two packed 128-bit vectors of [8 x i16]. +/// +/// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums +/// less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPHADDSW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated +/// sums of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hadds_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b); +} + +/// Horizontally adds, with saturation, the adjacent pairs of values contained +/// in two packed 64-bit vectors of [4 x i16]. +/// +/// Positive sums greater than 0x7FFF are saturated to 0x7FFF. Negative sums +/// less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PHADDSW instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the lower bits of the +/// destination. +/// \param __b +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal sums of the values are stored in the upper bits of the +/// destination. +/// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated +/// sums of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_hadds_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_phaddsw((__v4hi)__a, (__v4hi)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in 2 +/// packed 128-bit vectors of [8 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPHSUBW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the lower bits of +/// the destination. +/// \param __b +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the upper bits of +/// the destination. +/// \returns A 128-bit vector of [8 x i16] containing the horizontal differences +/// of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hsub_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in 2 +/// packed 128-bit vectors of [4 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPHSUBD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x i32] containing one of the source operands. The +/// horizontal differences between the values are stored in the lower bits of +/// the destination. +/// \param __b +/// A 128-bit vector of [4 x i32] containing one of the source operands. The +/// horizontal differences between the values are stored in the upper bits of +/// the destination. +/// \returns A 128-bit vector of [4 x i32] containing the horizontal differences +/// of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hsub_epi32(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in 2 +/// packed 64-bit vectors of [4 x i16]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PHSUBW instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the lower bits of +/// the destination. +/// \param __b +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the upper bits of +/// the destination. +/// \returns A 64-bit vector of [4 x i16] containing the horizontal differences +/// of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_hsub_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_phsubw((__v4hi)__a, (__v4hi)__b); +} + +/// Horizontally subtracts the adjacent pairs of values contained in 2 +/// packed 64-bit vectors of [2 x i32]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PHSUBD instruction. +/// +/// \param __a +/// A 64-bit vector of [2 x i32] containing one of the source operands. The +/// horizontal differences between the values are stored in the lower bits of +/// the destination. +/// \param __b +/// A 64-bit vector of [2 x i32] containing one of the source operands. The +/// horizontal differences between the values are stored in the upper bits of +/// the destination. +/// \returns A 64-bit vector of [2 x i32] containing the horizontal differences +/// of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_hsub_pi32(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_phsubd((__v2si)__a, (__v2si)__b); +} + +/// Horizontally subtracts, with saturation, the adjacent pairs of values +/// contained in two packed 128-bit vectors of [8 x i16]. +/// +/// Positive differences greater than 0x7FFF are saturated to 0x7FFF. +/// Negative differences less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPHSUBSW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the lower bits of +/// the destination. +/// \param __b +/// A 128-bit vector of [8 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the upper bits of +/// the destination. +/// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated +/// differences of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hsubs_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b); +} + +/// Horizontally subtracts, with saturation, the adjacent pairs of values +/// contained in two packed 64-bit vectors of [4 x i16]. +/// +/// Positive differences greater than 0x7FFF are saturated to 0x7FFF. +/// Negative differences less than 0x8000 are saturated to 0x8000. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PHSUBSW instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the lower bits of +/// the destination. +/// \param __b +/// A 64-bit vector of [4 x i16] containing one of the source operands. The +/// horizontal differences between the values are stored in the upper bits of +/// the destination. +/// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated +/// differences of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_hsubs_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_phsubsw((__v4hi)__a, (__v4hi)__b); +} + +/// Multiplies corresponding pairs of packed 8-bit unsigned integer +/// values contained in the first source operand and packed 8-bit signed +/// integer values contained in the second source operand, adds pairs of +/// contiguous products with signed saturation, and writes the 16-bit sums to +/// the corresponding bits in the destination. +/// +/// For example, bits [7:0] of both operands are multiplied, bits [15:8] of +/// both operands are multiplied, and the sum of both results is written to +/// bits [15:0] of the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPMADDUBSW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the first source operand. +/// \param __b +/// A 128-bit integer vector containing the second source operand. +/// \returns A 128-bit integer vector containing the sums of products of both +/// operands: \n +/// \a R0 := (\a __a0 * \a __b0) + (\a __a1 * \a __b1) \n +/// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n +/// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n +/// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) \n +/// \a R4 := (\a __a8 * \a __b8) + (\a __a9 * \a __b9) \n +/// \a R5 := (\a __a10 * \a __b10) + (\a __a11 * \a __b11) \n +/// \a R6 := (\a __a12 * \a __b12) + (\a __a13 * \a __b13) \n +/// \a R7 := (\a __a14 * \a __b14) + (\a __a15 * \a __b15) +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maddubs_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b); +} + +/// Multiplies corresponding pairs of packed 8-bit unsigned integer +/// values contained in the first source operand and packed 8-bit signed +/// integer values contained in the second source operand, adds pairs of +/// contiguous products with signed saturation, and writes the 16-bit sums to +/// the corresponding bits in the destination. +/// +/// For example, bits [7:0] of both operands are multiplied, bits [15:8] of +/// both operands are multiplied, and the sum of both results is written to +/// bits [15:0] of the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PMADDUBSW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the first source operand. +/// \param __b +/// A 64-bit integer vector containing the second source operand. +/// \returns A 64-bit integer vector containing the sums of products of both +/// operands: \n +/// \a R0 := (\a __a0 * \a __b0) + (\a __a1 * \a __b1) \n +/// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n +/// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n +/// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_maddubs_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pmaddubsw((__v8qi)__a, (__v8qi)__b); +} + +/// Multiplies packed 16-bit signed integer values, truncates the 32-bit +/// products to the 18 most significant bits by right-shifting, rounds the +/// truncated value by adding 1, and writes bits [16:1] to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPMULHRSW instruction. +/// +/// \param __a +/// A 128-bit vector of [8 x i16] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [8 x i16] containing one of the source operands. +/// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled +/// products of both operands. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mulhrs_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b); +} + +/// Multiplies packed 16-bit signed integer values, truncates the 32-bit +/// products to the 18 most significant bits by right-shifting, rounds the +/// truncated value by adding 1, and writes bits [16:1] to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PMULHRSW instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16] containing one of the source operands. +/// \param __b +/// A 64-bit vector of [4 x i16] containing one of the source operands. +/// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled +/// products of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_mulhrs_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pmulhrsw((__v4hi)__a, (__v4hi)__b); +} + +/// Copies the 8-bit integers from a 128-bit integer vector to the +/// destination or clears 8-bit values in the destination, as specified by +/// the second source operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPSHUFB instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the values to be copied. +/// \param __b +/// A 128-bit integer vector containing control bytes corresponding to +/// positions in the destination: +/// Bit 7: \n +/// 1: Clear the corresponding byte in the destination. \n +/// 0: Copy the selected source byte to the corresponding byte in the +/// destination. \n +/// Bits [6:4] Reserved. \n +/// Bits [3:0] select the source byte to be copied. +/// \returns A 128-bit integer vector containing the copied or cleared values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_shuffle_epi8(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b); +} + +/// Copies the 8-bit integers from a 64-bit integer vector to the +/// destination or clears 8-bit values in the destination, as specified by +/// the second source operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PSHUFB instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the values to be copied. +/// \param __b +/// A 64-bit integer vector containing control bytes corresponding to +/// positions in the destination: +/// Bit 7: \n +/// 1: Clear the corresponding byte in the destination. \n +/// 0: Copy the selected source byte to the corresponding byte in the +/// destination. \n +/// Bits [3:0] select the source byte to be copied. +/// \returns A 64-bit integer vector containing the copied or cleared values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_shuffle_pi8(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pshufb((__v8qi)__a, (__v8qi)__b); +} + +/// For each 8-bit integer in the first source operand, perform one of +/// the following actions as specified by the second source operand. +/// +/// If the byte in the second source is negative, calculate the two's +/// complement of the corresponding byte in the first source, and write that +/// value to the destination. If the byte in the second source is positive, +/// copy the corresponding byte from the first source to the destination. If +/// the byte in the second source is zero, clear the corresponding byte in +/// the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPSIGNB instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the values to be copied. +/// \param __b +/// A 128-bit integer vector containing control bytes corresponding to +/// positions in the destination. +/// \returns A 128-bit integer vector containing the resultant values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sign_epi8(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b); +} + +/// For each 16-bit integer in the first source operand, perform one of +/// the following actions as specified by the second source operand. +/// +/// If the word in the second source is negative, calculate the two's +/// complement of the corresponding word in the first source, and write that +/// value to the destination. If the word in the second source is positive, +/// copy the corresponding word from the first source to the destination. If +/// the word in the second source is zero, clear the corresponding word in +/// the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPSIGNW instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the values to be copied. +/// \param __b +/// A 128-bit integer vector containing control words corresponding to +/// positions in the destination. +/// \returns A 128-bit integer vector containing the resultant values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sign_epi16(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b); +} + +/// For each 32-bit integer in the first source operand, perform one of +/// the following actions as specified by the second source operand. +/// +/// If the doubleword in the second source is negative, calculate the two's +/// complement of the corresponding word in the first source, and write that +/// value to the destination. If the doubleword in the second source is +/// positive, copy the corresponding word from the first source to the +/// destination. If the doubleword in the second source is zero, clear the +/// corresponding word in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c VPSIGND instruction. +/// +/// \param __a +/// A 128-bit integer vector containing the values to be copied. +/// \param __b +/// A 128-bit integer vector containing control doublewords corresponding to +/// positions in the destination. +/// \returns A 128-bit integer vector containing the resultant values. +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sign_epi32(__m128i __a, __m128i __b) +{ + return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b); +} + +/// For each 8-bit integer in the first source operand, perform one of +/// the following actions as specified by the second source operand. +/// +/// If the byte in the second source is negative, calculate the two's +/// complement of the corresponding byte in the first source, and write that +/// value to the destination. If the byte in the second source is positive, +/// copy the corresponding byte from the first source to the destination. If +/// the byte in the second source is zero, clear the corresponding byte in +/// the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PSIGNB instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the values to be copied. +/// \param __b +/// A 64-bit integer vector containing control bytes corresponding to +/// positions in the destination. +/// \returns A 64-bit integer vector containing the resultant values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_sign_pi8(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_psignb((__v8qi)__a, (__v8qi)__b); +} + +/// For each 16-bit integer in the first source operand, perform one of +/// the following actions as specified by the second source operand. +/// +/// If the word in the second source is negative, calculate the two's +/// complement of the corresponding word in the first source, and write that +/// value to the destination. If the word in the second source is positive, +/// copy the corresponding word from the first source to the destination. If +/// the word in the second source is zero, clear the corresponding word in +/// the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PSIGNW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the values to be copied. +/// \param __b +/// A 64-bit integer vector containing control words corresponding to +/// positions in the destination. +/// \returns A 64-bit integer vector containing the resultant values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_sign_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_psignw((__v4hi)__a, (__v4hi)__b); +} + +/// For each 32-bit integer in the first source operand, perform one of +/// the following actions as specified by the second source operand. +/// +/// If the doubleword in the second source is negative, calculate the two's +/// complement of the corresponding doubleword in the first source, and +/// write that value to the destination. If the doubleword in the second +/// source is positive, copy the corresponding doubleword from the first +/// source to the destination. If the doubleword in the second source is +/// zero, clear the corresponding doubleword in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c PSIGND instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the values to be copied. +/// \param __b +/// A 64-bit integer vector containing two control doublewords corresponding +/// to positions in the destination. +/// \returns A 64-bit integer vector containing the resultant values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_sign_pi32(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_psignd((__v2si)__a, (__v2si)__b); +} + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_MMX + +#endif /* __TMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/tsxldtrkintrin.h b/llvm/lib/clang/19/include/tsxldtrkintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..491823e93fc02779422902a244cba6e1ce155493 --- /dev/null +++ b/llvm/lib/clang/19/include/tsxldtrkintrin.h @@ -0,0 +1,56 @@ +/*===------------- tsxldtrkintrin.h - tsxldtrk intrinsics ------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __TSXLDTRKINTRIN_H +#define __TSXLDTRKINTRIN_H + +/* Define the default attributes for the functions in this file */ +#define _DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("tsxldtrk"))) + +/// Marks the start of an TSX (RTM) suspend load address tracking region. If +/// this intrinsic is used inside a transactional region, subsequent loads +/// are not added to the read set of the transaction. If it's used inside a +/// suspend load address tracking region it will cause transaction abort. +/// If it's used outside of a transactional region it behaves like a NOP. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c XSUSLDTRK instruction. +/// +static __inline__ void _DEFAULT_FN_ATTRS +_xsusldtrk (void) +{ + __builtin_ia32_xsusldtrk(); +} + +/// Marks the end of an TSX (RTM) suspend load address tracking region. If this +/// intrinsic is used inside a suspend load address tracking region it will +/// end the suspend region and all following load addresses will be added to +/// the transaction read set. If it's used inside an active transaction but +/// not in a suspend region it will cause transaction abort. If it's used +/// outside of a transactional region it behaves like a NOP. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c XRESLDTRK instruction. +/// +static __inline__ void _DEFAULT_FN_ATTRS +_xresldtrk (void) +{ + __builtin_ia32_xresldtrk(); +} + +#undef _DEFAULT_FN_ATTRS + +#endif /* __TSXLDTRKINTRIN_H */ diff --git a/llvm/lib/clang/19/include/uintrintrin.h b/llvm/lib/clang/19/include/uintrintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..135dc814c72e61c9ea538b490ebe8e4476631508 --- /dev/null +++ b/llvm/lib/clang/19/include/uintrintrin.h @@ -0,0 +1,157 @@ +/*===------------------ uintrintrin.h - UINTR intrinsics -------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86GPRINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __UINTRINTRIN_H +#define __UINTRINTRIN_H + +/* Define the default attributes for the functions in this file */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("uintr"))) + +#ifdef __x86_64__ + +struct __uintr_frame +{ + unsigned long long rip; + unsigned long long rflags; + unsigned long long rsp; +}; + +/// Clears the user interrupt flag (UIF). Its effect takes place immediately: a +/// user interrupt cannot be delivered on the instruction boundary following +/// CLUI. Can be executed only if CR4.UINT = 1, the logical processor is in +/// 64-bit mode, and software is not executing inside an enclave; otherwise, +/// each causes an invalid-opcode exception. Causes a transactional abort if +/// executed inside a transactional region; the abort loads EAX as it would +/// had it been due to an execution of CLI. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CLUI instruction. +/// +/// \code{.operation} +/// UIF := 0 +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS +_clui (void) +{ + __builtin_ia32_clui(); +} + +/// Sets the user interrupt flag (UIF). Its effect takes place immediately; a +/// user interrupt may be delivered on the instruction boundary following +/// STUI. Can be executed only if CR4.UINT = 1, the logical processor is in +/// 64-bit mode, and software is not executing inside an enclave; otherwise, +/// each causes an invalid-opcode exception. Causes a transactional abort if +/// executed inside a transactional region; the abort loads EAX as it would +/// had it been due to an execution of STI. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the STUI instruction. +/// +/// \code{.operation} +/// UIF := 1 +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS +_stui (void) +{ + __builtin_ia32_stui(); +} + +/// Get the current value of the user interrupt flag (UIF). Can be executed +/// regardless of CPL and inside a transactional region. Can be executed only +/// if CR4.UINT = 1, the logical processor is in 64-bit mode, and software is +/// not executing inside an enclave; otherwise, it causes an invalid-opcode +/// exception. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TESTUI instruction. +/// +/// \returns The current value of the user interrupt flag (UIF). +/// +/// \code{.operation} +/// CF := UIF +/// ZF := 0 +/// AF := 0 +/// OF := 0 +/// PF := 0 +/// SF := 0 +/// dst := CF +/// \endcode +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_testui (void) +{ + return __builtin_ia32_testui(); +} + +/// Send interprocessor user interrupt. Can be executed only if +/// CR4.UINT = IA32_UINT_TT[0] = 1, the logical processor is in 64-bit mode, +/// and software is not executing inside an enclave; otherwise, it causes an +/// invalid-opcode exception. May be executed at any privilege level, all of +/// its memory accesses are performed with supervisor privilege. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the SENDUIPI instruction +/// +/// \param __a +/// Index of user-interrupt target table entry in user-interrupt target +/// table. +/// +/// \code{.operation} +/// IF __a > UITTSZ +/// GP (0) +/// FI +/// tempUITTE := MEM[UITTADDR + (a<<4)] +/// // tempUITTE must be valid, and can't have any reserved bit set +/// IF (tempUITTE.V == 0 OR tempUITTE[7:1] != 0) +/// GP (0) +/// FI +/// tempUPID := MEM[tempUITTE.UPIDADDR] // under lock +/// // tempUPID can't have any reserved bit set +/// IF (tempUPID[15:2] != 0 OR tempUPID[31:24] != 0) +/// GP (0) // release lock +/// FI +/// tempUPID.PIR[tempUITTE.UV] := 1; +/// IF (tempUPID.SN == 0 AND tempUPID.ON == 0) +/// tempUPID.ON := 1 +/// sendNotify := 1 +/// ELSE +/// sendNotify := 0 +/// FI +/// MEM[tempUITTE.UPIDADDR] := tempUPID // release lock +/// IF sendNotify == 1 +/// IF IA32_APIC_BASE[10] == 1 // local APIC is in x2APIC mode +/// // send ordinary IPI with vector tempUPID.NV to 32-bit physical APIC +/// // ID tempUPID.NDST +/// SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST) +/// ELSE +/// // send ordinary IPI with vector tempUPID.NV to 8-bit physical APIC +/// // ID tempUPID.NDST[15:8] +/// SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST[15:8]) +/// FI +/// FI +/// \endcode +static __inline__ void __DEFAULT_FN_ATTRS +_senduipi (unsigned long long __a) +{ + __builtin_ia32_senduipi(__a); +} + +#endif /* __x86_64__ */ + +#undef __DEFAULT_FN_ATTRS + +#endif /* __UINTRINTRIN_H */ diff --git a/llvm/lib/clang/19/include/unwind.h b/llvm/lib/clang/19/include/unwind.h new file mode 100644 index 0000000000000000000000000000000000000000..33e1792cd1fb7be3a9be522ef18611aa825e5b6f --- /dev/null +++ b/llvm/lib/clang/19/include/unwind.h @@ -0,0 +1,332 @@ +/*===---- unwind.h - Stack unwinding ----------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* See "Data Definitions for libgcc_s" in the Linux Standard Base.*/ + +#ifndef __CLANG_UNWIND_H +#define __CLANG_UNWIND_H + +#if defined(__APPLE__) && __has_include_next() +/* Darwin (from 11.x on) provide an unwind.h. If that's available, + * use it. libunwind wraps some of its definitions in #ifdef _GNU_SOURCE, + * so define that around the include.*/ +# ifndef _GNU_SOURCE +# define _SHOULD_UNDEFINE_GNU_SOURCE +# define _GNU_SOURCE +# endif +// libunwind's unwind.h reflects the current visibility. However, Mozilla +// builds with -fvisibility=hidden and relies on gcc's unwind.h to reset the +// visibility to default and export its contents. gcc also allows users to +// override its override by #defining HIDE_EXPORTS (but note, this only obeys +// the user's -fvisibility setting; it doesn't hide any exports on its own). We +// imitate gcc's header here: +# ifdef HIDE_EXPORTS +# include_next +# else +# pragma GCC visibility push(default) +# include_next +# pragma GCC visibility pop +# endif +# ifdef _SHOULD_UNDEFINE_GNU_SOURCE +# undef _GNU_SOURCE +# undef _SHOULD_UNDEFINE_GNU_SOURCE +# endif +#else + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* It is a bit strange for a header to play with the visibility of the + symbols it declares, but this matches gcc's behavior and some programs + depend on it */ +#ifndef HIDE_EXPORTS +#pragma GCC visibility push(default) +#endif + +typedef uintptr_t _Unwind_Word __attribute__((__mode__(__unwind_word__))); +typedef intptr_t _Unwind_Sword __attribute__((__mode__(__unwind_word__))); +typedef uintptr_t _Unwind_Ptr; +typedef uintptr_t _Unwind_Internal_Ptr; +typedef uint64_t _Unwind_Exception_Class; + +typedef intptr_t _sleb128_t; +typedef uintptr_t _uleb128_t; + +struct _Unwind_Context; +#if defined(__arm__) && !(defined(__USING_SJLJ_EXCEPTIONS__) || \ + defined(__ARM_DWARF_EH__) || defined(__SEH__)) +struct _Unwind_Control_Block; +typedef struct _Unwind_Control_Block _Unwind_Control_Block; +#define _Unwind_Exception _Unwind_Control_Block /* Alias */ +#else +struct _Unwind_Exception; +typedef struct _Unwind_Exception _Unwind_Exception; +#endif +typedef enum { + _URC_NO_REASON = 0, +#if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \ + !defined(__ARM_DWARF_EH__) && !defined(__SEH__) + _URC_OK = 0, /* used by ARM EHABI */ +#endif + _URC_FOREIGN_EXCEPTION_CAUGHT = 1, + + _URC_FATAL_PHASE2_ERROR = 2, + _URC_FATAL_PHASE1_ERROR = 3, + _URC_NORMAL_STOP = 4, + + _URC_END_OF_STACK = 5, + _URC_HANDLER_FOUND = 6, + _URC_INSTALL_CONTEXT = 7, + _URC_CONTINUE_UNWIND = 8, +#if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \ + !defined(__ARM_DWARF_EH__) && !defined(__SEH__) + _URC_FAILURE = 9 /* used by ARM EHABI */ +#endif +} _Unwind_Reason_Code; + +typedef enum { + _UA_SEARCH_PHASE = 1, + _UA_CLEANUP_PHASE = 2, + + _UA_HANDLER_FRAME = 4, + _UA_FORCE_UNWIND = 8, + _UA_END_OF_STACK = 16 /* gcc extension to C++ ABI */ +} _Unwind_Action; + +typedef void (*_Unwind_Exception_Cleanup_Fn)(_Unwind_Reason_Code, + _Unwind_Exception *); + +#if defined(__arm__) && !(defined(__USING_SJLJ_EXCEPTIONS__) || \ + defined(__ARM_DWARF_EH__) || defined(__SEH__)) +typedef struct _Unwind_Control_Block _Unwind_Control_Block; +typedef uint32_t _Unwind_EHT_Header; + +struct _Unwind_Control_Block { + uint64_t exception_class; + void (*exception_cleanup)(_Unwind_Reason_Code, _Unwind_Control_Block *); + /* unwinder cache (private fields for the unwinder's use) */ + struct { + uint32_t reserved1; /* forced unwind stop function, 0 if not forced */ + uint32_t reserved2; /* personality routine */ + uint32_t reserved3; /* callsite */ + uint32_t reserved4; /* forced unwind stop argument */ + uint32_t reserved5; + } unwinder_cache; + /* propagation barrier cache (valid after phase 1) */ + struct { + uint32_t sp; + uint32_t bitpattern[5]; + } barrier_cache; + /* cleanup cache (preserved over cleanup) */ + struct { + uint32_t bitpattern[4]; + } cleanup_cache; + /* personality cache (for personality's benefit) */ + struct { + uint32_t fnstart; /* function start address */ + _Unwind_EHT_Header *ehtp; /* pointer to EHT entry header word */ + uint32_t additional; /* additional data */ + uint32_t reserved1; + } pr_cache; + long long int : 0; /* force alignment of next item to 8-byte boundary */ +} __attribute__((__aligned__(8))); +#else +struct _Unwind_Exception { + _Unwind_Exception_Class exception_class; + _Unwind_Exception_Cleanup_Fn exception_cleanup; +#if !defined (__USING_SJLJ_EXCEPTIONS__) && defined (__SEH__) + _Unwind_Word private_[6]; +#else + _Unwind_Word private_1; + _Unwind_Word private_2; +#endif + /* The Itanium ABI requires that _Unwind_Exception objects are "double-word + * aligned". GCC has interpreted this to mean "use the maximum useful + * alignment for the target"; so do we. */ +} __attribute__((__aligned__)); +#endif + +typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)(int, _Unwind_Action, + _Unwind_Exception_Class, + _Unwind_Exception *, + struct _Unwind_Context *, + void *); + +typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)(int, _Unwind_Action, + _Unwind_Exception_Class, + _Unwind_Exception *, + struct _Unwind_Context *); +typedef _Unwind_Personality_Fn __personality_routine; + +typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn)(struct _Unwind_Context *, + void *); + +#if defined(__arm__) && !(defined(__USING_SJLJ_EXCEPTIONS__) || \ + defined(__ARM_DWARF_EH__) || defined(__SEH__)) +typedef enum { + _UVRSC_CORE = 0, /* integer register */ + _UVRSC_VFP = 1, /* vfp */ + _UVRSC_WMMXD = 3, /* Intel WMMX data register */ + _UVRSC_WMMXC = 4, /* Intel WMMX control register */ + _UVRSC_PSEUDO = 5 /* Special purpose pseudo register */ +} _Unwind_VRS_RegClass; + +typedef enum { + _UVRSD_UINT32 = 0, + _UVRSD_VFPX = 1, + _UVRSD_UINT64 = 3, + _UVRSD_FLOAT = 4, + _UVRSD_DOUBLE = 5 +} _Unwind_VRS_DataRepresentation; + +typedef enum { + _UVRSR_OK = 0, + _UVRSR_NOT_IMPLEMENTED = 1, + _UVRSR_FAILED = 2 +} _Unwind_VRS_Result; + +typedef uint32_t _Unwind_State; +#define _US_VIRTUAL_UNWIND_FRAME ((_Unwind_State)0) +#define _US_UNWIND_FRAME_STARTING ((_Unwind_State)1) +#define _US_UNWIND_FRAME_RESUME ((_Unwind_State)2) +#define _US_ACTION_MASK ((_Unwind_State)3) +#define _US_FORCE_UNWIND ((_Unwind_State)8) + +_Unwind_VRS_Result _Unwind_VRS_Get(struct _Unwind_Context *__context, + _Unwind_VRS_RegClass __regclass, + uint32_t __regno, + _Unwind_VRS_DataRepresentation __representation, + void *__valuep); + +_Unwind_VRS_Result _Unwind_VRS_Set(struct _Unwind_Context *__context, + _Unwind_VRS_RegClass __regclass, + uint32_t __regno, + _Unwind_VRS_DataRepresentation __representation, + void *__valuep); + +static __inline__ +_Unwind_Word _Unwind_GetGR(struct _Unwind_Context *__context, int __index) { + _Unwind_Word __value; + _Unwind_VRS_Get(__context, _UVRSC_CORE, __index, _UVRSD_UINT32, &__value); + return __value; +} + +static __inline__ +void _Unwind_SetGR(struct _Unwind_Context *__context, int __index, + _Unwind_Word __value) { + _Unwind_VRS_Set(__context, _UVRSC_CORE, __index, _UVRSD_UINT32, &__value); +} + +static __inline__ +_Unwind_Word _Unwind_GetIP(struct _Unwind_Context *__context) { + _Unwind_Word __ip = _Unwind_GetGR(__context, 15); + return __ip & ~(_Unwind_Word)(0x1); /* Remove thumb mode bit. */ +} + +static __inline__ +void _Unwind_SetIP(struct _Unwind_Context *__context, _Unwind_Word __value) { + _Unwind_Word __thumb_mode_bit = _Unwind_GetGR(__context, 15) & 0x1; + _Unwind_SetGR(__context, 15, __value | __thumb_mode_bit); +} +#else +_Unwind_Word _Unwind_GetGR(struct _Unwind_Context *, int); +void _Unwind_SetGR(struct _Unwind_Context *, int, _Unwind_Word); + +_Unwind_Word _Unwind_GetIP(struct _Unwind_Context *); +void _Unwind_SetIP(struct _Unwind_Context *, _Unwind_Word); +#endif + + +_Unwind_Word _Unwind_GetIPInfo(struct _Unwind_Context *, int *); + +_Unwind_Word _Unwind_GetCFA(struct _Unwind_Context *); + +_Unwind_Word _Unwind_GetBSP(struct _Unwind_Context *); + +void *_Unwind_GetLanguageSpecificData(struct _Unwind_Context *); + +_Unwind_Ptr _Unwind_GetRegionStart(struct _Unwind_Context *); + +/* DWARF EH functions; currently not available on Darwin/ARM */ +#if !defined(__APPLE__) || !defined(__arm__) +_Unwind_Reason_Code _Unwind_RaiseException(_Unwind_Exception *); +_Unwind_Reason_Code _Unwind_ForcedUnwind(_Unwind_Exception *, _Unwind_Stop_Fn, + void *); +void _Unwind_DeleteException(_Unwind_Exception *); +void _Unwind_Resume(_Unwind_Exception *); +_Unwind_Reason_Code _Unwind_Resume_or_Rethrow(_Unwind_Exception *); + +#endif + +_Unwind_Reason_Code _Unwind_Backtrace(_Unwind_Trace_Fn, void *); + +/* setjmp(3)/longjmp(3) stuff */ +typedef struct SjLj_Function_Context *_Unwind_FunctionContext_t; + +void _Unwind_SjLj_Register(_Unwind_FunctionContext_t); +void _Unwind_SjLj_Unregister(_Unwind_FunctionContext_t); +_Unwind_Reason_Code _Unwind_SjLj_RaiseException(_Unwind_Exception *); +_Unwind_Reason_Code _Unwind_SjLj_ForcedUnwind(_Unwind_Exception *, + _Unwind_Stop_Fn, void *); +void _Unwind_SjLj_Resume(_Unwind_Exception *); +_Unwind_Reason_Code _Unwind_SjLj_Resume_or_Rethrow(_Unwind_Exception *); + +void *_Unwind_FindEnclosingFunction(void *); + +#ifdef __APPLE__ + +_Unwind_Ptr _Unwind_GetDataRelBase(struct _Unwind_Context *) + __attribute__((__unavailable__)); +_Unwind_Ptr _Unwind_GetTextRelBase(struct _Unwind_Context *) + __attribute__((__unavailable__)); + +/* Darwin-specific functions */ +void __register_frame(const void *); +void __deregister_frame(const void *); + +struct dwarf_eh_bases { + uintptr_t tbase; + uintptr_t dbase; + uintptr_t func; +}; +void *_Unwind_Find_FDE(const void *, struct dwarf_eh_bases *); + +void __register_frame_info_bases(const void *, void *, void *, void *) + __attribute__((__unavailable__)); +void __register_frame_info(const void *, void *) __attribute__((__unavailable__)); +void __register_frame_info_table_bases(const void *, void*, void *, void *) + __attribute__((__unavailable__)); +void __register_frame_info_table(const void *, void *) + __attribute__((__unavailable__)); +void __register_frame_table(const void *) __attribute__((__unavailable__)); +void __deregister_frame_info(const void *) __attribute__((__unavailable__)); +void __deregister_frame_info_bases(const void *)__attribute__((__unavailable__)); + +#else + +_Unwind_Ptr _Unwind_GetDataRelBase(struct _Unwind_Context *); +_Unwind_Ptr _Unwind_GetTextRelBase(struct _Unwind_Context *); + +#endif + + +#ifndef HIDE_EXPORTS +#pragma GCC visibility pop +#endif + +#ifdef __cplusplus +} +#endif + +#endif + +#endif /* __CLANG_UNWIND_H */ diff --git a/llvm/lib/clang/19/include/usermsrintrin.h b/llvm/lib/clang/19/include/usermsrintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..61388376706dc69f08c7a012eeb32094c51b4ffa --- /dev/null +++ b/llvm/lib/clang/19/include/usermsrintrin.h @@ -0,0 +1,51 @@ +/*===--------------- usermsrintrin.h - USERMSR intrinsics -----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __X86GPRINTRIN_H +#error "Never use directly; include instead." +#endif // __X86GPRINTRIN_H + +#ifndef __USERMSRINTRIN_H +#define __USERMSRINTRIN_H +#ifdef __x86_64__ + +/// Reads the contents of a 64-bit MSR specified in \a __A into \a dst. +/// +/// This intrinsic corresponds to the URDMSR instruction. +/// \param __A +/// An unsigned long long. +/// +/// \code{.operation} +/// DEST := MSR[__A] +/// \endcode +static __inline__ unsigned long long + __attribute__((__always_inline__, __nodebug__, __target__("usermsr"))) + _urdmsr(unsigned long long __A) { + return __builtin_ia32_urdmsr(__A); +} + +/// Writes the contents of \a __B into the 64-bit MSR specified in \a __A. +/// +/// This intrinsic corresponds to the UWRMSR instruction. +/// +/// \param __A +/// An unsigned long long. +/// \param __B +/// An unsigned long long. +/// +/// \code{.operation} +/// MSR[__A] := __B +/// \endcode +static __inline__ void + __attribute__((__always_inline__, __nodebug__, __target__("usermsr"))) + _uwrmsr(unsigned long long __A, unsigned long long __B) { + return __builtin_ia32_uwrmsr(__A, __B); +} + +#endif // __x86_64__ +#endif // __USERMSRINTRIN_H diff --git a/llvm/lib/clang/19/include/vadefs.h b/llvm/lib/clang/19/include/vadefs.h new file mode 100644 index 0000000000000000000000000000000000000000..b6175684469cd1b39c395659be07557d3040ea32 --- /dev/null +++ b/llvm/lib/clang/19/include/vadefs.h @@ -0,0 +1,51 @@ +/* ===-------- vadefs.h ---------------------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +/* Only include this if we are aiming for MSVC compatibility. */ +#ifndef _MSC_VER +#include_next +#else + +#ifndef __clang_vadefs_h +#define __clang_vadefs_h + +#include_next + +/* Override macros from vadefs.h with definitions that work with Clang. */ +#ifdef _crt_va_start +#undef _crt_va_start +#define _crt_va_start(ap, param) __builtin_va_start(ap, param) +#endif +#ifdef _crt_va_end +#undef _crt_va_end +#define _crt_va_end(ap) __builtin_va_end(ap) +#endif +#ifdef _crt_va_arg +#undef _crt_va_arg +#define _crt_va_arg(ap, type) __builtin_va_arg(ap, type) +#endif + +/* VS 2015 switched to double underscore names, which is an improvement, but now + * we have to intercept those names too. + */ +#ifdef __crt_va_start +#undef __crt_va_start +#define __crt_va_start(ap, param) __builtin_va_start(ap, param) +#endif +#ifdef __crt_va_end +#undef __crt_va_end +#define __crt_va_end(ap) __builtin_va_end(ap) +#endif +#ifdef __crt_va_arg +#undef __crt_va_arg +#define __crt_va_arg(ap, type) __builtin_va_arg(ap, type) +#endif + +#endif +#endif diff --git a/llvm/lib/clang/19/include/vaesintrin.h b/llvm/lib/clang/19/include/vaesintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..d7c162f5c0b16f50cd366899fb3f2f14f4e849bf --- /dev/null +++ b/llvm/lib/clang/19/include/vaesintrin.h @@ -0,0 +1,87 @@ +/*===------------------ vaesintrin.h - VAES intrinsics ---------------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __VAESINTRIN_H +#define __VAESINTRIN_H + +/* Default attributes for YMM forms. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("vaes"), __min_vector_width__(256))) + +/* Default attributes for ZMM forms. */ +#define __DEFAULT_FN_ATTRS_F \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("avx512f,evex512,vaes"), \ + __min_vector_width__(512))) + +static __inline__ __m256i __DEFAULT_FN_ATTRS + _mm256_aesenc_epi128(__m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_aesenc256((__v4di) __A, + (__v4di) __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS + _mm256_aesdec_epi128(__m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_aesdec256((__v4di) __A, + (__v4di) __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS + _mm256_aesenclast_epi128(__m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_aesenclast256((__v4di) __A, + (__v4di) __B); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS + _mm256_aesdeclast_epi128(__m256i __A, __m256i __B) +{ + return (__m256i) __builtin_ia32_aesdeclast256((__v4di) __A, + (__v4di) __B); +} + +#ifdef __AVX512FINTRIN_H +static __inline__ __m512i __DEFAULT_FN_ATTRS_F + _mm512_aesenc_epi128(__m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_aesenc512((__v8di) __A, + (__v8di) __B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS_F + _mm512_aesdec_epi128(__m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_aesdec512((__v8di) __A, + (__v8di) __B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS_F + _mm512_aesenclast_epi128(__m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_aesenclast512((__v8di) __A, + (__v8di) __B); +} + +static __inline__ __m512i __DEFAULT_FN_ATTRS_F + _mm512_aesdeclast_epi128(__m512i __A, __m512i __B) +{ + return (__m512i) __builtin_ia32_aesdeclast512((__v8di) __A, + (__v8di) __B); +} +#endif // __AVX512FINTRIN_H + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_F + +#endif // __VAESINTRIN_H diff --git a/llvm/lib/clang/19/include/varargs.h b/llvm/lib/clang/19/include/varargs.h new file mode 100644 index 0000000000000000000000000000000000000000..d33ddc5ae7f8a541b1433c129bf0f7b3217ce20d --- /dev/null +++ b/llvm/lib/clang/19/include/varargs.h @@ -0,0 +1,16 @@ +/*===---- varargs.h - Variable argument handling -------------------------------------=== +* +* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +* See https://llvm.org/LICENSE.txt for license information. +* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +* +*===-----------------------------------------------------------------------=== +*/ +#ifndef __VARARGS_H +#define __VARARGS_H +#if defined(__MVS__) && __has_include_next() +#include_next +#else +#error "Please use instead of " +#endif /* __MVS__ */ +#endif diff --git a/llvm/lib/clang/19/include/vecintrin.h b/llvm/lib/clang/19/include/vecintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..609c7cf0b7a6f9d78dd3ce629534d346fbd74ecf --- /dev/null +++ b/llvm/lib/clang/19/include/vecintrin.h @@ -0,0 +1,11163 @@ +/*===---- vecintrin.h - Vector intrinsics ----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if defined(__s390x__) && defined(__VEC__) + +#define __ATTRS_ai __attribute__((__always_inline__)) +#define __ATTRS_o __attribute__((__overloadable__)) +#define __ATTRS_o_ai __attribute__((__overloadable__, __always_inline__)) + +#define __constant(PARM) \ + __attribute__((__enable_if__ ((PARM) == (PARM), \ + "argument must be a constant integer"))) +#define __constant_range(PARM, LOW, HIGH) \ + __attribute__((__enable_if__ ((PARM) >= (LOW) && (PARM) <= (HIGH), \ + "argument must be a constant integer from " #LOW " to " #HIGH))) +#define __constant_pow2_range(PARM, LOW, HIGH) \ + __attribute__((__enable_if__ ((PARM) >= (LOW) && (PARM) <= (HIGH) && \ + ((PARM) & ((PARM) - 1)) == 0, \ + "argument must be a constant power of 2 from " #LOW " to " #HIGH))) + +/*-- __lcbb -----------------------------------------------------------------*/ + +extern __ATTRS_o unsigned int +__lcbb(const void *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +#define __lcbb(X, Y) ((__typeof__((__lcbb)((X), (Y)))) \ + __builtin_s390_lcbb((X), __builtin_constant_p((Y))? \ + ((Y) == 64 ? 0 : \ + (Y) == 128 ? 1 : \ + (Y) == 256 ? 2 : \ + (Y) == 512 ? 3 : \ + (Y) == 1024 ? 4 : \ + (Y) == 2048 ? 5 : \ + (Y) == 4096 ? 6 : 0) : 0)) + +/*-- vec_extract ------------------------------------------------------------*/ + +static inline __ATTRS_o_ai signed char +vec_extract(__vector signed char __vec, int __index) { + return __vec[__index & 15]; +} + +static inline __ATTRS_o_ai unsigned char +vec_extract(__vector __bool char __vec, int __index) { + return __vec[__index & 15]; +} + +static inline __ATTRS_o_ai unsigned char +vec_extract(__vector unsigned char __vec, int __index) { + return __vec[__index & 15]; +} + +static inline __ATTRS_o_ai signed short +vec_extract(__vector signed short __vec, int __index) { + return __vec[__index & 7]; +} + +static inline __ATTRS_o_ai unsigned short +vec_extract(__vector __bool short __vec, int __index) { + return __vec[__index & 7]; +} + +static inline __ATTRS_o_ai unsigned short +vec_extract(__vector unsigned short __vec, int __index) { + return __vec[__index & 7]; +} + +static inline __ATTRS_o_ai signed int +vec_extract(__vector signed int __vec, int __index) { + return __vec[__index & 3]; +} + +static inline __ATTRS_o_ai unsigned int +vec_extract(__vector __bool int __vec, int __index) { + return __vec[__index & 3]; +} + +static inline __ATTRS_o_ai unsigned int +vec_extract(__vector unsigned int __vec, int __index) { + return __vec[__index & 3]; +} + +static inline __ATTRS_o_ai signed long long +vec_extract(__vector signed long long __vec, int __index) { + return __vec[__index & 1]; +} + +static inline __ATTRS_o_ai unsigned long long +vec_extract(__vector __bool long long __vec, int __index) { + return __vec[__index & 1]; +} + +static inline __ATTRS_o_ai unsigned long long +vec_extract(__vector unsigned long long __vec, int __index) { + return __vec[__index & 1]; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai float +vec_extract(__vector float __vec, int __index) { + return __vec[__index & 3]; +} +#endif + +static inline __ATTRS_o_ai double +vec_extract(__vector double __vec, int __index) { + return __vec[__index & 1]; +} + +/*-- vec_insert -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_insert(signed char __scalar, __vector signed char __vec, int __index) { + __vec[__index & 15] = __scalar; + return __vec; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_insert(unsigned char __scalar, __vector __bool char __vec, int __index) { + __vector unsigned char __newvec = (__vector unsigned char)__vec; + __newvec[__index & 15] = (unsigned char)__scalar; + return __newvec; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_insert(unsigned char __scalar, __vector unsigned char __vec, int __index) { + __vec[__index & 15] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed short +vec_insert(signed short __scalar, __vector signed short __vec, int __index) { + __vec[__index & 7] = __scalar; + return __vec; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_insert(unsigned short __scalar, __vector __bool short __vec, + int __index) { + __vector unsigned short __newvec = (__vector unsigned short)__vec; + __newvec[__index & 7] = (unsigned short)__scalar; + return __newvec; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_insert(unsigned short __scalar, __vector unsigned short __vec, + int __index) { + __vec[__index & 7] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed int +vec_insert(signed int __scalar, __vector signed int __vec, int __index) { + __vec[__index & 3] = __scalar; + return __vec; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_insert(unsigned int __scalar, __vector __bool int __vec, int __index) { + __vector unsigned int __newvec = (__vector unsigned int)__vec; + __newvec[__index & 3] = __scalar; + return __newvec; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_insert(unsigned int __scalar, __vector unsigned int __vec, int __index) { + __vec[__index & 3] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_insert(signed long long __scalar, __vector signed long long __vec, + int __index) { + __vec[__index & 1] = __scalar; + return __vec; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_insert(unsigned long long __scalar, __vector __bool long long __vec, + int __index) { + __vector unsigned long long __newvec = (__vector unsigned long long)__vec; + __newvec[__index & 1] = __scalar; + return __newvec; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_insert(unsigned long long __scalar, __vector unsigned long long __vec, + int __index) { + __vec[__index & 1] = __scalar; + return __vec; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_insert(float __scalar, __vector float __vec, int __index) { + __vec[__index & 1] = __scalar; + return __vec; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_insert(double __scalar, __vector double __vec, int __index) { + __vec[__index & 1] = __scalar; + return __vec; +} + +/*-- vec_promote ------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_promote(signed char __scalar, int __index) { + const __vector signed char __zero = (__vector signed char)0; + __vector signed char __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1); + __vec[__index & 15] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_promote(unsigned char __scalar, int __index) { + const __vector unsigned char __zero = (__vector unsigned char)0; + __vector unsigned char __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1); + __vec[__index & 15] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed short +vec_promote(signed short __scalar, int __index) { + const __vector signed short __zero = (__vector signed short)0; + __vector signed short __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1, -1, -1, -1, -1); + __vec[__index & 7] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_promote(unsigned short __scalar, int __index) { + const __vector unsigned short __zero = (__vector unsigned short)0; + __vector unsigned short __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1, -1, -1, -1, -1); + __vec[__index & 7] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed int +vec_promote(signed int __scalar, int __index) { + const __vector signed int __zero = (__vector signed int)0; + __vector signed int __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1); + __vec[__index & 3] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_promote(unsigned int __scalar, int __index) { + const __vector unsigned int __zero = (__vector unsigned int)0; + __vector unsigned int __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1); + __vec[__index & 3] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_promote(signed long long __scalar, int __index) { + const __vector signed long long __zero = (__vector signed long long)0; + __vector signed long long __vec = __builtin_shufflevector(__zero, __zero, + -1, -1); + __vec[__index & 1] = __scalar; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_promote(unsigned long long __scalar, int __index) { + const __vector unsigned long long __zero = (__vector unsigned long long)0; + __vector unsigned long long __vec = __builtin_shufflevector(__zero, __zero, + -1, -1); + __vec[__index & 1] = __scalar; + return __vec; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_promote(float __scalar, int __index) { + const __vector float __zero = (__vector float)0.0f; + __vector float __vec = __builtin_shufflevector(__zero, __zero, + -1, -1, -1, -1); + __vec[__index & 3] = __scalar; + return __vec; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_promote(double __scalar, int __index) { + const __vector double __zero = (__vector double)0.0; + __vector double __vec = __builtin_shufflevector(__zero, __zero, -1, -1); + __vec[__index & 1] = __scalar; + return __vec; +} + +/*-- vec_insert_and_zero ----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_insert_and_zero(const signed char *__ptr) { + __vector signed char __vec = (__vector signed char)0; + __vec[7] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_insert_and_zero(const unsigned char *__ptr) { + __vector unsigned char __vec = (__vector unsigned char)0; + __vec[7] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed short +vec_insert_and_zero(const signed short *__ptr) { + __vector signed short __vec = (__vector signed short)0; + __vec[3] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_insert_and_zero(const unsigned short *__ptr) { + __vector unsigned short __vec = (__vector unsigned short)0; + __vec[3] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed int +vec_insert_and_zero(const signed int *__ptr) { + __vector signed int __vec = (__vector signed int)0; + __vec[1] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_insert_and_zero(const unsigned int *__ptr) { + __vector unsigned int __vec = (__vector unsigned int)0; + __vec[1] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_insert_and_zero(const signed long long *__ptr) { + __vector signed long long __vec = (__vector signed long long)0; + __vec[0] = *__ptr; + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_insert_and_zero(const unsigned long long *__ptr) { + __vector unsigned long long __vec = (__vector unsigned long long)0; + __vec[0] = *__ptr; + return __vec; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_insert_and_zero(const float *__ptr) { + __vector float __vec = (__vector float)0.0f; + __vec[1] = *__ptr; + return __vec; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_insert_and_zero(const double *__ptr) { + __vector double __vec = (__vector double)0.0; + __vec[0] = *__ptr; + return __vec; +} + +/*-- vec_perm ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_perm(__vector signed char __a, __vector signed char __b, + __vector unsigned char __c) { + return (__vector signed char)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_perm(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector unsigned char)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_perm(__vector __bool char __a, __vector __bool char __b, + __vector unsigned char __c) { + return (__vector __bool char)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector signed short +vec_perm(__vector signed short __a, __vector signed short __b, + __vector unsigned char __c) { + return (__vector signed short)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_perm(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned char __c) { + return (__vector unsigned short)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_perm(__vector __bool short __a, __vector __bool short __b, + __vector unsigned char __c) { + return (__vector __bool short)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector signed int +vec_perm(__vector signed int __a, __vector signed int __b, + __vector unsigned char __c) { + return (__vector signed int)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_perm(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned char __c) { + return (__vector unsigned int)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_perm(__vector __bool int __a, __vector __bool int __b, + __vector unsigned char __c) { + return (__vector __bool int)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_perm(__vector signed long long __a, __vector signed long long __b, + __vector unsigned char __c) { + return (__vector signed long long)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_perm(__vector unsigned long long __a, __vector unsigned long long __b, + __vector unsigned char __c) { + return (__vector unsigned long long)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_perm(__vector __bool long long __a, __vector __bool long long __b, + __vector unsigned char __c) { + return (__vector __bool long long)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_perm(__vector float __a, __vector float __b, + __vector unsigned char __c) { + return (__vector float)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_perm(__vector double __a, __vector double __b, + __vector unsigned char __c) { + return (__vector double)__builtin_s390_vperm( + (__vector unsigned char)__a, (__vector unsigned char)__b, __c); +} + +/*-- vec_permi --------------------------------------------------------------*/ + +// This prototype is deprecated. +extern __ATTRS_o __vector signed long long +vec_permi(__vector signed long long __a, __vector signed long long __b, + int __c) + __constant_range(__c, 0, 3); + +// This prototype is deprecated. +extern __ATTRS_o __vector unsigned long long +vec_permi(__vector unsigned long long __a, __vector unsigned long long __b, + int __c) + __constant_range(__c, 0, 3); + +// This prototype is deprecated. +extern __ATTRS_o __vector __bool long long +vec_permi(__vector __bool long long __a, __vector __bool long long __b, + int __c) + __constant_range(__c, 0, 3); + +// This prototype is deprecated. +extern __ATTRS_o __vector double +vec_permi(__vector double __a, __vector double __b, int __c) + __constant_range(__c, 0, 3); + +#define vec_permi(X, Y, Z) ((__typeof__((vec_permi)((X), (Y), (Z)))) \ + __builtin_s390_vpdi((__vector unsigned long long)(X), \ + (__vector unsigned long long)(Y), \ + (((Z) & 2) << 1) | ((Z) & 1))) + +/*-- vec_bperm_u128 ---------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_ai __vector unsigned long long +vec_bperm_u128(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vbperm(__a, __b); +} +#endif + +/*-- vec_revb ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_revb(__vector signed short __vec) { + return (__vector signed short) + __builtin_s390_vlbrh((__vector unsigned short)__vec); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_revb(__vector unsigned short __vec) { + return __builtin_s390_vlbrh(__vec); +} + +static inline __ATTRS_o_ai __vector signed int +vec_revb(__vector signed int __vec) { + return (__vector signed int) + __builtin_s390_vlbrf((__vector unsigned int)__vec); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_revb(__vector unsigned int __vec) { + return __builtin_s390_vlbrf(__vec); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_revb(__vector signed long long __vec) { + return (__vector signed long long) + __builtin_s390_vlbrg((__vector unsigned long long)__vec); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_revb(__vector unsigned long long __vec) { + return __builtin_s390_vlbrg(__vec); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_revb(__vector float __vec) { + return (__vector float) + __builtin_s390_vlbrf((__vector unsigned int)__vec); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_revb(__vector double __vec) { + return (__vector double) + __builtin_s390_vlbrg((__vector unsigned long long)__vec); +} + +/*-- vec_reve ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_reve(__vector signed char __vec) { + return (__vector signed char) { __vec[15], __vec[14], __vec[13], __vec[12], + __vec[11], __vec[10], __vec[9], __vec[8], + __vec[7], __vec[6], __vec[5], __vec[4], + __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_reve(__vector unsigned char __vec) { + return (__vector unsigned char) { __vec[15], __vec[14], __vec[13], __vec[12], + __vec[11], __vec[10], __vec[9], __vec[8], + __vec[7], __vec[6], __vec[5], __vec[4], + __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector __bool char +vec_reve(__vector __bool char __vec) { + return (__vector __bool char) { __vec[15], __vec[14], __vec[13], __vec[12], + __vec[11], __vec[10], __vec[9], __vec[8], + __vec[7], __vec[6], __vec[5], __vec[4], + __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector signed short +vec_reve(__vector signed short __vec) { + return (__vector signed short) { __vec[7], __vec[6], __vec[5], __vec[4], + __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_reve(__vector unsigned short __vec) { + return (__vector unsigned short) { __vec[7], __vec[6], __vec[5], __vec[4], + __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector __bool short +vec_reve(__vector __bool short __vec) { + return (__vector __bool short) { __vec[7], __vec[6], __vec[5], __vec[4], + __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector signed int +vec_reve(__vector signed int __vec) { + return (__vector signed int) { __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_reve(__vector unsigned int __vec) { + return (__vector unsigned int) { __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector __bool int +vec_reve(__vector __bool int __vec) { + return (__vector __bool int) { __vec[3], __vec[2], __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_reve(__vector signed long long __vec) { + return (__vector signed long long) { __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_reve(__vector unsigned long long __vec) { + return (__vector unsigned long long) { __vec[1], __vec[0] }; +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_reve(__vector __bool long long __vec) { + return (__vector __bool long long) { __vec[1], __vec[0] }; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_reve(__vector float __vec) { + return (__vector float) { __vec[3], __vec[2], __vec[1], __vec[0] }; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_reve(__vector double __vec) { + return (__vector double) { __vec[1], __vec[0] }; +} + +/*-- vec_sel ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_sel(__vector signed char __a, __vector signed char __b, + __vector unsigned char __c) { + return (((__vector signed char)__c & __b) | + (~(__vector signed char)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed char +vec_sel(__vector signed char __a, __vector signed char __b, + __vector __bool char __c) { + return (((__vector signed char)__c & __b) | + (~(__vector signed char)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_sel(__vector __bool char __a, __vector __bool char __b, + __vector unsigned char __c) { + return (((__vector __bool char)__c & __b) | + (~(__vector __bool char)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_sel(__vector __bool char __a, __vector __bool char __b, + __vector __bool char __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_sel(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_sel(__vector unsigned char __a, __vector unsigned char __b, + __vector __bool char __c) { + return (((__vector unsigned char)__c & __b) | + (~(__vector unsigned char)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed short +vec_sel(__vector signed short __a, __vector signed short __b, + __vector unsigned short __c) { + return (((__vector signed short)__c & __b) | + (~(__vector signed short)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed short +vec_sel(__vector signed short __a, __vector signed short __b, + __vector __bool short __c) { + return (((__vector signed short)__c & __b) | + (~(__vector signed short)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_sel(__vector __bool short __a, __vector __bool short __b, + __vector unsigned short __c) { + return (((__vector __bool short)__c & __b) | + (~(__vector __bool short)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_sel(__vector __bool short __a, __vector __bool short __b, + __vector __bool short __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_sel(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_sel(__vector unsigned short __a, __vector unsigned short __b, + __vector __bool short __c) { + return (((__vector unsigned short)__c & __b) | + (~(__vector unsigned short)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed int +vec_sel(__vector signed int __a, __vector signed int __b, + __vector unsigned int __c) { + return (((__vector signed int)__c & __b) | + (~(__vector signed int)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed int +vec_sel(__vector signed int __a, __vector signed int __b, + __vector __bool int __c) { + return (((__vector signed int)__c & __b) | + (~(__vector signed int)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_sel(__vector __bool int __a, __vector __bool int __b, + __vector unsigned int __c) { + return (((__vector __bool int)__c & __b) | + (~(__vector __bool int)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_sel(__vector __bool int __a, __vector __bool int __b, + __vector __bool int __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_sel(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_sel(__vector unsigned int __a, __vector unsigned int __b, + __vector __bool int __c) { + return (((__vector unsigned int)__c & __b) | + (~(__vector unsigned int)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_sel(__vector signed long long __a, __vector signed long long __b, + __vector unsigned long long __c) { + return (((__vector signed long long)__c & __b) | + (~(__vector signed long long)__c & __a)); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_sel(__vector signed long long __a, __vector signed long long __b, + __vector __bool long long __c) { + return (((__vector signed long long)__c & __b) | + (~(__vector signed long long)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_sel(__vector __bool long long __a, __vector __bool long long __b, + __vector unsigned long long __c) { + return (((__vector __bool long long)__c & __b) | + (~(__vector __bool long long)__c & __a)); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_sel(__vector __bool long long __a, __vector __bool long long __b, + __vector __bool long long __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_sel(__vector unsigned long long __a, __vector unsigned long long __b, + __vector unsigned long long __c) { + return (__c & __b) | (~__c & __a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_sel(__vector unsigned long long __a, __vector unsigned long long __b, + __vector __bool long long __c) { + return (((__vector unsigned long long)__c & __b) | + (~(__vector unsigned long long)__c & __a)); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_sel(__vector float __a, __vector float __b, __vector unsigned int __c) { + return (__vector float)((__c & (__vector unsigned int)__b) | + (~__c & (__vector unsigned int)__a)); +} + +static inline __ATTRS_o_ai __vector float +vec_sel(__vector float __a, __vector float __b, __vector __bool int __c) { + __vector unsigned int __ac = (__vector unsigned int)__a; + __vector unsigned int __bc = (__vector unsigned int)__b; + __vector unsigned int __cc = (__vector unsigned int)__c; + return (__vector float)((__cc & __bc) | (~__cc & __ac)); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_sel(__vector double __a, __vector double __b, + __vector unsigned long long __c) { + return (__vector double)((__c & (__vector unsigned long long)__b) | + (~__c & (__vector unsigned long long)__a)); +} + +static inline __ATTRS_o_ai __vector double +vec_sel(__vector double __a, __vector double __b, + __vector __bool long long __c) { + __vector unsigned long long __ac = (__vector unsigned long long)__a; + __vector unsigned long long __bc = (__vector unsigned long long)__b; + __vector unsigned long long __cc = (__vector unsigned long long)__c; + return (__vector double)((__cc & __bc) | (~__cc & __ac)); +} + +/*-- vec_gather_element -----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed int +vec_gather_element(__vector signed int __vec, + __vector unsigned int __offset, + const signed int *__ptr, int __index) + __constant_range(__index, 0, 3) { + __vec[__index] = *(const signed int *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +static inline __ATTRS_o_ai __vector __bool int +vec_gather_element(__vector __bool int __vec, + __vector unsigned int __offset, + const unsigned int *__ptr, int __index) + __constant_range(__index, 0, 3) { + __vec[__index] = *(const unsigned int *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_gather_element(__vector unsigned int __vec, + __vector unsigned int __offset, + const unsigned int *__ptr, int __index) + __constant_range(__index, 0, 3) { + __vec[__index] = *(const unsigned int *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_gather_element(__vector signed long long __vec, + __vector unsigned long long __offset, + const signed long long *__ptr, int __index) + __constant_range(__index, 0, 1) { + __vec[__index] = *(const signed long long *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_gather_element(__vector __bool long long __vec, + __vector unsigned long long __offset, + const unsigned long long *__ptr, int __index) + __constant_range(__index, 0, 1) { + __vec[__index] = *(const unsigned long long *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_gather_element(__vector unsigned long long __vec, + __vector unsigned long long __offset, + const unsigned long long *__ptr, int __index) + __constant_range(__index, 0, 1) { + __vec[__index] = *(const unsigned long long *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_gather_element(__vector float __vec, + __vector unsigned int __offset, + const float *__ptr, int __index) + __constant_range(__index, 0, 3) { + __vec[__index] = *(const float *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_gather_element(__vector double __vec, + __vector unsigned long long __offset, + const double *__ptr, int __index) + __constant_range(__index, 0, 1) { + __vec[__index] = *(const double *)( + (const char *)__ptr + __offset[__index]); + return __vec; +} + +/*-- vec_scatter_element ----------------------------------------------------*/ + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector signed int __vec, + __vector unsigned int __offset, + signed int *__ptr, int __index) + __constant_range(__index, 0, 3) { + *(signed int *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector __bool int __vec, + __vector unsigned int __offset, + unsigned int *__ptr, int __index) + __constant_range(__index, 0, 3) { + *(unsigned int *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector unsigned int __vec, + __vector unsigned int __offset, + unsigned int *__ptr, int __index) + __constant_range(__index, 0, 3) { + *(unsigned int *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector signed long long __vec, + __vector unsigned long long __offset, + signed long long *__ptr, int __index) + __constant_range(__index, 0, 1) { + *(signed long long *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector __bool long long __vec, + __vector unsigned long long __offset, + unsigned long long *__ptr, int __index) + __constant_range(__index, 0, 1) { + *(unsigned long long *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector unsigned long long __vec, + __vector unsigned long long __offset, + unsigned long long *__ptr, int __index) + __constant_range(__index, 0, 1) { + *(unsigned long long *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai void +vec_scatter_element(__vector float __vec, + __vector unsigned int __offset, + float *__ptr, int __index) + __constant_range(__index, 0, 3) { + *(float *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} +#endif + +static inline __ATTRS_o_ai void +vec_scatter_element(__vector double __vec, + __vector unsigned long long __offset, + double *__ptr, int __index) + __constant_range(__index, 0, 1) { + *(double *)((char *)__ptr + __offset[__index]) = + __vec[__index]; +} + +/*-- vec_xl -----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_xl(long __offset, const signed char *__ptr) { + __vector signed char V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed char)); + return V; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_xl(long __offset, const unsigned char *__ptr) { + __vector unsigned char V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned char)); + return V; +} + +static inline __ATTRS_o_ai __vector signed short +vec_xl(long __offset, const signed short *__ptr) { + __vector signed short V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed short)); + return V; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_xl(long __offset, const unsigned short *__ptr) { + __vector unsigned short V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned short)); + return V; +} + +static inline __ATTRS_o_ai __vector signed int +vec_xl(long __offset, const signed int *__ptr) { + __vector signed int V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed int)); + return V; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_xl(long __offset, const unsigned int *__ptr) { + __vector unsigned int V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned int)); + return V; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_xl(long __offset, const signed long long *__ptr) { + __vector signed long long V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed long long)); + return V; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_xl(long __offset, const unsigned long long *__ptr) { + __vector unsigned long long V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned long long)); + return V; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_xl(long __offset, const float *__ptr) { + __vector float V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector float)); + return V; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_xl(long __offset, const double *__ptr) { + __vector double V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector double)); + return V; +} + +/*-- vec_xld2 ---------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_xld2(long __offset, const signed char *__ptr) { + __vector signed char V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed char)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_xld2(long __offset, const unsigned char *__ptr) { + __vector unsigned char V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned char)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_xld2(long __offset, const signed short *__ptr) { + __vector signed short V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed short)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_xld2(long __offset, const unsigned short *__ptr) { + __vector unsigned short V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned short)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_xld2(long __offset, const signed int *__ptr) { + __vector signed int V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed int)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_xld2(long __offset, const unsigned int *__ptr) { + __vector unsigned int V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned int)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_xld2(long __offset, const signed long long *__ptr) { + __vector signed long long V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed long long)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_xld2(long __offset, const unsigned long long *__ptr) { + __vector unsigned long long V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned long long)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_xld2(long __offset, const double *__ptr) { + __vector double V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector double)); + return V; +} + +/*-- vec_xlw4 ---------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_xlw4(long __offset, const signed char *__ptr) { + __vector signed char V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed char)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_xlw4(long __offset, const unsigned char *__ptr) { + __vector unsigned char V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned char)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_xlw4(long __offset, const signed short *__ptr) { + __vector signed short V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed short)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_xlw4(long __offset, const unsigned short *__ptr) { + __vector unsigned short V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned short)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_xlw4(long __offset, const signed int *__ptr) { + __vector signed int V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector signed int)); + return V; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_xlw4(long __offset, const unsigned int *__ptr) { + __vector unsigned int V; + __builtin_memcpy(&V, ((const char *)__ptr + __offset), + sizeof(__vector unsigned int)); + return V; +} + +/*-- vec_xst ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai void +vec_xst(__vector signed char __vec, long __offset, signed char *__ptr) { + __vector signed char V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed char)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector unsigned char __vec, long __offset, unsigned char *__ptr) { + __vector unsigned char V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned char)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector signed short __vec, long __offset, signed short *__ptr) { + __vector signed short V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed short)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector unsigned short __vec, long __offset, unsigned short *__ptr) { + __vector unsigned short V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned short)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector signed int __vec, long __offset, signed int *__ptr) { + __vector signed int V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, sizeof(__vector signed int)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector unsigned int __vec, long __offset, unsigned int *__ptr) { + __vector unsigned int V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned int)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector signed long long __vec, long __offset, + signed long long *__ptr) { + __vector signed long long V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed long long)); +} + +static inline __ATTRS_o_ai void +vec_xst(__vector unsigned long long __vec, long __offset, + unsigned long long *__ptr) { + __vector unsigned long long V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned long long)); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai void +vec_xst(__vector float __vec, long __offset, float *__ptr) { + __vector float V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, sizeof(__vector float)); +} +#endif + +static inline __ATTRS_o_ai void +vec_xst(__vector double __vec, long __offset, double *__ptr) { + __vector double V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, sizeof(__vector double)); +} + +/*-- vec_xstd2 --------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector signed char __vec, long __offset, signed char *__ptr) { + __vector signed char V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed char)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector unsigned char __vec, long __offset, unsigned char *__ptr) { + __vector unsigned char V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned char)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector signed short __vec, long __offset, signed short *__ptr) { + __vector signed short V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed short)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector unsigned short __vec, long __offset, unsigned short *__ptr) { + __vector unsigned short V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned short)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector signed int __vec, long __offset, signed int *__ptr) { + __vector signed int V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, sizeof(__vector signed int)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector unsigned int __vec, long __offset, unsigned int *__ptr) { + __vector unsigned int V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned int)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector signed long long __vec, long __offset, + signed long long *__ptr) { + __vector signed long long V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed long long)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector unsigned long long __vec, long __offset, + unsigned long long *__ptr) { + __vector unsigned long long V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned long long)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstd2(__vector double __vec, long __offset, double *__ptr) { + __vector double V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, sizeof(__vector double)); +} + +/*-- vec_xstw4 --------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstw4(__vector signed char __vec, long __offset, signed char *__ptr) { + __vector signed char V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed char)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstw4(__vector unsigned char __vec, long __offset, unsigned char *__ptr) { + __vector unsigned char V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned char)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstw4(__vector signed short __vec, long __offset, signed short *__ptr) { + __vector signed short V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector signed short)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstw4(__vector unsigned short __vec, long __offset, unsigned short *__ptr) { + __vector unsigned short V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned short)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstw4(__vector signed int __vec, long __offset, signed int *__ptr) { + __vector signed int V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, sizeof(__vector signed int)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai void +vec_xstw4(__vector unsigned int __vec, long __offset, unsigned int *__ptr) { + __vector unsigned int V = __vec; + __builtin_memcpy(((char *)__ptr + __offset), &V, + sizeof(__vector unsigned int)); +} + +/*-- vec_load_bndry ---------------------------------------------------------*/ + +extern __ATTRS_o __vector signed char +vec_load_bndry(const signed char *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector unsigned char +vec_load_bndry(const unsigned char *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector signed short +vec_load_bndry(const signed short *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector unsigned short +vec_load_bndry(const unsigned short *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector signed int +vec_load_bndry(const signed int *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector unsigned int +vec_load_bndry(const unsigned int *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector signed long long +vec_load_bndry(const signed long long *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +extern __ATTRS_o __vector unsigned long long +vec_load_bndry(const unsigned long long *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +#if __ARCH__ >= 12 +extern __ATTRS_o __vector float +vec_load_bndry(const float *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); +#endif + +extern __ATTRS_o __vector double +vec_load_bndry(const double *__ptr, unsigned short __len) + __constant_pow2_range(__len, 64, 4096); + +#define vec_load_bndry(X, Y) ((__typeof__((vec_load_bndry)((X), (Y)))) \ + __builtin_s390_vlbb((X), ((Y) == 64 ? 0 : \ + (Y) == 128 ? 1 : \ + (Y) == 256 ? 2 : \ + (Y) == 512 ? 3 : \ + (Y) == 1024 ? 4 : \ + (Y) == 2048 ? 5 : \ + (Y) == 4096 ? 6 : -1))) + +/*-- vec_load_len -----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_load_len(const signed char *__ptr, unsigned int __len) { + return (__vector signed char)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_load_len(const unsigned char *__ptr, unsigned int __len) { + return (__vector unsigned char)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector signed short +vec_load_len(const signed short *__ptr, unsigned int __len) { + return (__vector signed short)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_load_len(const unsigned short *__ptr, unsigned int __len) { + return (__vector unsigned short)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector signed int +vec_load_len(const signed int *__ptr, unsigned int __len) { + return (__vector signed int)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_load_len(const unsigned int *__ptr, unsigned int __len) { + return (__vector unsigned int)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_load_len(const signed long long *__ptr, unsigned int __len) { + return (__vector signed long long)__builtin_s390_vll(__len, __ptr); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_load_len(const unsigned long long *__ptr, unsigned int __len) { + return (__vector unsigned long long)__builtin_s390_vll(__len, __ptr); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_load_len(const float *__ptr, unsigned int __len) { + return (__vector float)__builtin_s390_vll(__len, __ptr); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_load_len(const double *__ptr, unsigned int __len) { + return (__vector double)__builtin_s390_vll(__len, __ptr); +} + +/*-- vec_load_len_r ---------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_ai __vector unsigned char +vec_load_len_r(const unsigned char *__ptr, unsigned int __len) { + return (__vector unsigned char)__builtin_s390_vlrlr(__len, __ptr); +} +#endif + +/*-- vec_store_len ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai void +vec_store_len(__vector signed char __vec, signed char *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector unsigned char __vec, unsigned char *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector signed short __vec, signed short *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector unsigned short __vec, unsigned short *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector signed int __vec, signed int *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector unsigned int __vec, unsigned int *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector signed long long __vec, signed long long *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +static inline __ATTRS_o_ai void +vec_store_len(__vector unsigned long long __vec, unsigned long long *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai void +vec_store_len(__vector float __vec, float *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} +#endif + +static inline __ATTRS_o_ai void +vec_store_len(__vector double __vec, double *__ptr, + unsigned int __len) { + __builtin_s390_vstl((__vector signed char)__vec, __len, __ptr); +} + +/*-- vec_store_len_r --------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_ai void +vec_store_len_r(__vector unsigned char __vec, unsigned char *__ptr, + unsigned int __len) { + __builtin_s390_vstrlr((__vector signed char)__vec, __len, __ptr); +} +#endif + +/*-- vec_load_pair ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed long long +vec_load_pair(signed long long __a, signed long long __b) { + return (__vector signed long long)(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_load_pair(unsigned long long __a, unsigned long long __b) { + return (__vector unsigned long long)(__a, __b); +} + +/*-- vec_genmask ------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_genmask(unsigned short __mask) + __constant(__mask) { + return (__vector unsigned char)( + __mask & 0x8000 ? 0xff : 0, + __mask & 0x4000 ? 0xff : 0, + __mask & 0x2000 ? 0xff : 0, + __mask & 0x1000 ? 0xff : 0, + __mask & 0x0800 ? 0xff : 0, + __mask & 0x0400 ? 0xff : 0, + __mask & 0x0200 ? 0xff : 0, + __mask & 0x0100 ? 0xff : 0, + __mask & 0x0080 ? 0xff : 0, + __mask & 0x0040 ? 0xff : 0, + __mask & 0x0020 ? 0xff : 0, + __mask & 0x0010 ? 0xff : 0, + __mask & 0x0008 ? 0xff : 0, + __mask & 0x0004 ? 0xff : 0, + __mask & 0x0002 ? 0xff : 0, + __mask & 0x0001 ? 0xff : 0); +} + +/*-- vec_genmasks_* ---------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_genmasks_8(unsigned char __first, unsigned char __last) + __constant(__first) __constant(__last) { + unsigned char __bit1 = __first & 7; + unsigned char __bit2 = __last & 7; + unsigned char __mask1 = (unsigned char)(1U << (7 - __bit1) << 1) - 1; + unsigned char __mask2 = (unsigned char)(1U << (7 - __bit2)) - 1; + unsigned char __value = (__bit1 <= __bit2 ? + __mask1 & ~__mask2 : + __mask1 | ~__mask2); + return (__vector unsigned char)__value; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_genmasks_16(unsigned char __first, unsigned char __last) + __constant(__first) __constant(__last) { + unsigned char __bit1 = __first & 15; + unsigned char __bit2 = __last & 15; + unsigned short __mask1 = (unsigned short)(1U << (15 - __bit1) << 1) - 1; + unsigned short __mask2 = (unsigned short)(1U << (15 - __bit2)) - 1; + unsigned short __value = (__bit1 <= __bit2 ? + __mask1 & ~__mask2 : + __mask1 | ~__mask2); + return (__vector unsigned short)__value; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_genmasks_32(unsigned char __first, unsigned char __last) + __constant(__first) __constant(__last) { + unsigned char __bit1 = __first & 31; + unsigned char __bit2 = __last & 31; + unsigned int __mask1 = (1U << (31 - __bit1) << 1) - 1; + unsigned int __mask2 = (1U << (31 - __bit2)) - 1; + unsigned int __value = (__bit1 <= __bit2 ? + __mask1 & ~__mask2 : + __mask1 | ~__mask2); + return (__vector unsigned int)__value; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_genmasks_64(unsigned char __first, unsigned char __last) + __constant(__first) __constant(__last) { + unsigned char __bit1 = __first & 63; + unsigned char __bit2 = __last & 63; + unsigned long long __mask1 = (1ULL << (63 - __bit1) << 1) - 1; + unsigned long long __mask2 = (1ULL << (63 - __bit2)) - 1; + unsigned long long __value = (__bit1 <= __bit2 ? + __mask1 & ~__mask2 : + __mask1 | ~__mask2); + return (__vector unsigned long long)__value; +} + +/*-- vec_splat --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_splat(__vector signed char __vec, int __index) + __constant_range(__index, 0, 15) { + return (__vector signed char)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector __bool char +vec_splat(__vector __bool char __vec, int __index) + __constant_range(__index, 0, 15) { + return (__vector __bool char)(__vector unsigned char)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_splat(__vector unsigned char __vec, int __index) + __constant_range(__index, 0, 15) { + return (__vector unsigned char)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector signed short +vec_splat(__vector signed short __vec, int __index) + __constant_range(__index, 0, 7) { + return (__vector signed short)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector __bool short +vec_splat(__vector __bool short __vec, int __index) + __constant_range(__index, 0, 7) { + return (__vector __bool short)(__vector unsigned short)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_splat(__vector unsigned short __vec, int __index) + __constant_range(__index, 0, 7) { + return (__vector unsigned short)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector signed int +vec_splat(__vector signed int __vec, int __index) + __constant_range(__index, 0, 3) { + return (__vector signed int)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector __bool int +vec_splat(__vector __bool int __vec, int __index) + __constant_range(__index, 0, 3) { + return (__vector __bool int)(__vector unsigned int)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_splat(__vector unsigned int __vec, int __index) + __constant_range(__index, 0, 3) { + return (__vector unsigned int)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_splat(__vector signed long long __vec, int __index) + __constant_range(__index, 0, 1) { + return (__vector signed long long)__vec[__index]; +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_splat(__vector __bool long long __vec, int __index) + __constant_range(__index, 0, 1) { + return ((__vector __bool long long) + (__vector unsigned long long)__vec[__index]); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_splat(__vector unsigned long long __vec, int __index) + __constant_range(__index, 0, 1) { + return (__vector unsigned long long)__vec[__index]; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_splat(__vector float __vec, int __index) + __constant_range(__index, 0, 3) { + return (__vector float)__vec[__index]; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_splat(__vector double __vec, int __index) + __constant_range(__index, 0, 1) { + return (__vector double)__vec[__index]; +} + +/*-- vec_splat_s* -----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector signed char +vec_splat_s8(signed char __scalar) + __constant(__scalar) { + return (__vector signed char)__scalar; +} + +static inline __ATTRS_ai __vector signed short +vec_splat_s16(signed short __scalar) + __constant(__scalar) { + return (__vector signed short)__scalar; +} + +static inline __ATTRS_ai __vector signed int +vec_splat_s32(signed short __scalar) + __constant(__scalar) { + return (__vector signed int)(signed int)__scalar; +} + +static inline __ATTRS_ai __vector signed long long +vec_splat_s64(signed short __scalar) + __constant(__scalar) { + return (__vector signed long long)(signed long)__scalar; +} + +/*-- vec_splat_u* -----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_splat_u8(unsigned char __scalar) + __constant(__scalar) { + return (__vector unsigned char)__scalar; +} + +static inline __ATTRS_ai __vector unsigned short +vec_splat_u16(unsigned short __scalar) + __constant(__scalar) { + return (__vector unsigned short)__scalar; +} + +static inline __ATTRS_ai __vector unsigned int +vec_splat_u32(signed short __scalar) + __constant(__scalar) { + return (__vector unsigned int)(signed int)__scalar; +} + +static inline __ATTRS_ai __vector unsigned long long +vec_splat_u64(signed short __scalar) + __constant(__scalar) { + return (__vector unsigned long long)(signed long long)__scalar; +} + +/*-- vec_splats -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_splats(signed char __scalar) { + return (__vector signed char)__scalar; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_splats(unsigned char __scalar) { + return (__vector unsigned char)__scalar; +} + +static inline __ATTRS_o_ai __vector signed short +vec_splats(signed short __scalar) { + return (__vector signed short)__scalar; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_splats(unsigned short __scalar) { + return (__vector unsigned short)__scalar; +} + +static inline __ATTRS_o_ai __vector signed int +vec_splats(signed int __scalar) { + return (__vector signed int)__scalar; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_splats(unsigned int __scalar) { + return (__vector unsigned int)__scalar; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_splats(signed long long __scalar) { + return (__vector signed long long)__scalar; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_splats(unsigned long long __scalar) { + return (__vector unsigned long long)__scalar; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_splats(float __scalar) { + return (__vector float)__scalar; +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_splats(double __scalar) { + return (__vector double)__scalar; +} + +/*-- vec_extend_s64 ---------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed long long +vec_extend_s64(__vector signed char __a) { + return (__vector signed long long)(__a[7], __a[15]); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_extend_s64(__vector signed short __a) { + return (__vector signed long long)(__a[3], __a[7]); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_extend_s64(__vector signed int __a) { + return (__vector signed long long)(__a[1], __a[3]); +} + +/*-- vec_mergeh -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_mergeh(__vector signed char __a, __vector signed char __b) { + return (__vector signed char)( + __a[0], __b[0], __a[1], __b[1], __a[2], __b[2], __a[3], __b[3], + __a[4], __b[4], __a[5], __b[5], __a[6], __b[6], __a[7], __b[7]); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_mergeh(__vector __bool char __a, __vector __bool char __b) { + return (__vector __bool char)( + __a[0], __b[0], __a[1], __b[1], __a[2], __b[2], __a[3], __b[3], + __a[4], __b[4], __a[5], __b[5], __a[6], __b[6], __a[7], __b[7]); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_mergeh(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector unsigned char)( + __a[0], __b[0], __a[1], __b[1], __a[2], __b[2], __a[3], __b[3], + __a[4], __b[4], __a[5], __b[5], __a[6], __b[6], __a[7], __b[7]); +} + +static inline __ATTRS_o_ai __vector signed short +vec_mergeh(__vector signed short __a, __vector signed short __b) { + return (__vector signed short)( + __a[0], __b[0], __a[1], __b[1], __a[2], __b[2], __a[3], __b[3]); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_mergeh(__vector __bool short __a, __vector __bool short __b) { + return (__vector __bool short)( + __a[0], __b[0], __a[1], __b[1], __a[2], __b[2], __a[3], __b[3]); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mergeh(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)( + __a[0], __b[0], __a[1], __b[1], __a[2], __b[2], __a[3], __b[3]); +} + +static inline __ATTRS_o_ai __vector signed int +vec_mergeh(__vector signed int __a, __vector signed int __b) { + return (__vector signed int)(__a[0], __b[0], __a[1], __b[1]); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_mergeh(__vector __bool int __a, __vector __bool int __b) { + return (__vector __bool int)(__a[0], __b[0], __a[1], __b[1]); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mergeh(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)(__a[0], __b[0], __a[1], __b[1]); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_mergeh(__vector signed long long __a, __vector signed long long __b) { + return (__vector signed long long)(__a[0], __b[0]); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_mergeh(__vector __bool long long __a, __vector __bool long long __b) { + return (__vector __bool long long)(__a[0], __b[0]); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_mergeh(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector unsigned long long)(__a[0], __b[0]); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_mergeh(__vector float __a, __vector float __b) { + return (__vector float)(__a[0], __b[0], __a[1], __b[1]); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_mergeh(__vector double __a, __vector double __b) { + return (__vector double)(__a[0], __b[0]); +} + +/*-- vec_mergel -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_mergel(__vector signed char __a, __vector signed char __b) { + return (__vector signed char)( + __a[8], __b[8], __a[9], __b[9], __a[10], __b[10], __a[11], __b[11], + __a[12], __b[12], __a[13], __b[13], __a[14], __b[14], __a[15], __b[15]); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_mergel(__vector __bool char __a, __vector __bool char __b) { + return (__vector __bool char)( + __a[8], __b[8], __a[9], __b[9], __a[10], __b[10], __a[11], __b[11], + __a[12], __b[12], __a[13], __b[13], __a[14], __b[14], __a[15], __b[15]); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_mergel(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector unsigned char)( + __a[8], __b[8], __a[9], __b[9], __a[10], __b[10], __a[11], __b[11], + __a[12], __b[12], __a[13], __b[13], __a[14], __b[14], __a[15], __b[15]); +} + +static inline __ATTRS_o_ai __vector signed short +vec_mergel(__vector signed short __a, __vector signed short __b) { + return (__vector signed short)( + __a[4], __b[4], __a[5], __b[5], __a[6], __b[6], __a[7], __b[7]); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_mergel(__vector __bool short __a, __vector __bool short __b) { + return (__vector __bool short)( + __a[4], __b[4], __a[5], __b[5], __a[6], __b[6], __a[7], __b[7]); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mergel(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)( + __a[4], __b[4], __a[5], __b[5], __a[6], __b[6], __a[7], __b[7]); +} + +static inline __ATTRS_o_ai __vector signed int +vec_mergel(__vector signed int __a, __vector signed int __b) { + return (__vector signed int)(__a[2], __b[2], __a[3], __b[3]); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_mergel(__vector __bool int __a, __vector __bool int __b) { + return (__vector __bool int)(__a[2], __b[2], __a[3], __b[3]); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mergel(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)(__a[2], __b[2], __a[3], __b[3]); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_mergel(__vector signed long long __a, __vector signed long long __b) { + return (__vector signed long long)(__a[1], __b[1]); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_mergel(__vector __bool long long __a, __vector __bool long long __b) { + return (__vector __bool long long)(__a[1], __b[1]); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_mergel(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector unsigned long long)(__a[1], __b[1]); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_mergel(__vector float __a, __vector float __b) { + return (__vector float)(__a[2], __b[2], __a[3], __b[3]); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_mergel(__vector double __a, __vector double __b) { + return (__vector double)(__a[1], __b[1]); +} + +/*-- vec_pack ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_pack(__vector signed short __a, __vector signed short __b) { + __vector signed char __ac = (__vector signed char)__a; + __vector signed char __bc = (__vector signed char)__b; + return (__vector signed char)( + __ac[1], __ac[3], __ac[5], __ac[7], __ac[9], __ac[11], __ac[13], __ac[15], + __bc[1], __bc[3], __bc[5], __bc[7], __bc[9], __bc[11], __bc[13], __bc[15]); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_pack(__vector __bool short __a, __vector __bool short __b) { + __vector __bool char __ac = (__vector __bool char)__a; + __vector __bool char __bc = (__vector __bool char)__b; + return (__vector __bool char)( + __ac[1], __ac[3], __ac[5], __ac[7], __ac[9], __ac[11], __ac[13], __ac[15], + __bc[1], __bc[3], __bc[5], __bc[7], __bc[9], __bc[11], __bc[13], __bc[15]); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_pack(__vector unsigned short __a, __vector unsigned short __b) { + __vector unsigned char __ac = (__vector unsigned char)__a; + __vector unsigned char __bc = (__vector unsigned char)__b; + return (__vector unsigned char)( + __ac[1], __ac[3], __ac[5], __ac[7], __ac[9], __ac[11], __ac[13], __ac[15], + __bc[1], __bc[3], __bc[5], __bc[7], __bc[9], __bc[11], __bc[13], __bc[15]); +} + +static inline __ATTRS_o_ai __vector signed short +vec_pack(__vector signed int __a, __vector signed int __b) { + __vector signed short __ac = (__vector signed short)__a; + __vector signed short __bc = (__vector signed short)__b; + return (__vector signed short)( + __ac[1], __ac[3], __ac[5], __ac[7], + __bc[1], __bc[3], __bc[5], __bc[7]); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_pack(__vector __bool int __a, __vector __bool int __b) { + __vector __bool short __ac = (__vector __bool short)__a; + __vector __bool short __bc = (__vector __bool short)__b; + return (__vector __bool short)( + __ac[1], __ac[3], __ac[5], __ac[7], + __bc[1], __bc[3], __bc[5], __bc[7]); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_pack(__vector unsigned int __a, __vector unsigned int __b) { + __vector unsigned short __ac = (__vector unsigned short)__a; + __vector unsigned short __bc = (__vector unsigned short)__b; + return (__vector unsigned short)( + __ac[1], __ac[3], __ac[5], __ac[7], + __bc[1], __bc[3], __bc[5], __bc[7]); +} + +static inline __ATTRS_o_ai __vector signed int +vec_pack(__vector signed long long __a, __vector signed long long __b) { + __vector signed int __ac = (__vector signed int)__a; + __vector signed int __bc = (__vector signed int)__b; + return (__vector signed int)(__ac[1], __ac[3], __bc[1], __bc[3]); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_pack(__vector __bool long long __a, __vector __bool long long __b) { + __vector __bool int __ac = (__vector __bool int)__a; + __vector __bool int __bc = (__vector __bool int)__b; + return (__vector __bool int)(__ac[1], __ac[3], __bc[1], __bc[3]); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_pack(__vector unsigned long long __a, __vector unsigned long long __b) { + __vector unsigned int __ac = (__vector unsigned int)__a; + __vector unsigned int __bc = (__vector unsigned int)__b; + return (__vector unsigned int)(__ac[1], __ac[3], __bc[1], __bc[3]); +} + +/*-- vec_packs --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_packs(__vector signed short __a, __vector signed short __b) { + return __builtin_s390_vpksh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_packs(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vpklsh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_packs(__vector signed int __a, __vector signed int __b) { + return __builtin_s390_vpksf(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_packs(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vpklsf(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_packs(__vector signed long long __a, __vector signed long long __b) { + return __builtin_s390_vpksg(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_packs(__vector unsigned long long __a, __vector unsigned long long __b) { + return __builtin_s390_vpklsg(__a, __b); +} + +/*-- vec_packs_cc -----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_packs_cc(__vector signed short __a, __vector signed short __b, int *__cc) { + return __builtin_s390_vpkshs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_packs_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return __builtin_s390_vpklshs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_packs_cc(__vector signed int __a, __vector signed int __b, int *__cc) { + return __builtin_s390_vpksfs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_packs_cc(__vector unsigned int __a, __vector unsigned int __b, int *__cc) { + return __builtin_s390_vpklsfs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_packs_cc(__vector signed long long __a, __vector signed long long __b, + int *__cc) { + return __builtin_s390_vpksgs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_packs_cc(__vector unsigned long long __a, __vector unsigned long long __b, + int *__cc) { + return __builtin_s390_vpklsgs(__a, __b, __cc); +} + +/*-- vec_packsu -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_packsu(__vector signed short __a, __vector signed short __b) { + const __vector signed short __zero = (__vector signed short)0; + return __builtin_s390_vpklsh( + (__vector unsigned short)(__a >= __zero) & (__vector unsigned short)__a, + (__vector unsigned short)(__b >= __zero) & (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_packsu(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vpklsh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_packsu(__vector signed int __a, __vector signed int __b) { + const __vector signed int __zero = (__vector signed int)0; + return __builtin_s390_vpklsf( + (__vector unsigned int)(__a >= __zero) & (__vector unsigned int)__a, + (__vector unsigned int)(__b >= __zero) & (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_packsu(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vpklsf(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_packsu(__vector signed long long __a, __vector signed long long __b) { + const __vector signed long long __zero = (__vector signed long long)0; + return __builtin_s390_vpklsg( + (__vector unsigned long long)(__a >= __zero) & + (__vector unsigned long long)__a, + (__vector unsigned long long)(__b >= __zero) & + (__vector unsigned long long)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_packsu(__vector unsigned long long __a, __vector unsigned long long __b) { + return __builtin_s390_vpklsg(__a, __b); +} + +/*-- vec_packsu_cc ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_packsu_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return __builtin_s390_vpklshs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_packsu_cc(__vector unsigned int __a, __vector unsigned int __b, int *__cc) { + return __builtin_s390_vpklsfs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_packsu_cc(__vector unsigned long long __a, __vector unsigned long long __b, + int *__cc) { + return __builtin_s390_vpklsgs(__a, __b, __cc); +} + +/*-- vec_unpackh ------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_unpackh(__vector signed char __a) { + return __builtin_s390_vuphb(__a); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_unpackh(__vector __bool char __a) { + return ((__vector __bool short) + __builtin_s390_vuphb((__vector signed char)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_unpackh(__vector unsigned char __a) { + return __builtin_s390_vuplhb(__a); +} + +static inline __ATTRS_o_ai __vector signed int +vec_unpackh(__vector signed short __a) { + return __builtin_s390_vuphh(__a); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_unpackh(__vector __bool short __a) { + return (__vector __bool int)__builtin_s390_vuphh((__vector signed short)__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_unpackh(__vector unsigned short __a) { + return __builtin_s390_vuplhh(__a); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_unpackh(__vector signed int __a) { + return __builtin_s390_vuphf(__a); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_unpackh(__vector __bool int __a) { + return ((__vector __bool long long) + __builtin_s390_vuphf((__vector signed int)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_unpackh(__vector unsigned int __a) { + return __builtin_s390_vuplhf(__a); +} + +/*-- vec_unpackl ------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_unpackl(__vector signed char __a) { + return __builtin_s390_vuplb(__a); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_unpackl(__vector __bool char __a) { + return ((__vector __bool short) + __builtin_s390_vuplb((__vector signed char)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_unpackl(__vector unsigned char __a) { + return __builtin_s390_vupllb(__a); +} + +static inline __ATTRS_o_ai __vector signed int +vec_unpackl(__vector signed short __a) { + return __builtin_s390_vuplhw(__a); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_unpackl(__vector __bool short __a) { + return ((__vector __bool int) + __builtin_s390_vuplhw((__vector signed short)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_unpackl(__vector unsigned short __a) { + return __builtin_s390_vupllh(__a); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_unpackl(__vector signed int __a) { + return __builtin_s390_vuplf(__a); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_unpackl(__vector __bool int __a) { + return ((__vector __bool long long) + __builtin_s390_vuplf((__vector signed int)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_unpackl(__vector unsigned int __a) { + return __builtin_s390_vupllf(__a); +} + +/*-- vec_cmpeq --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpeq(__vector __bool char __a, __vector __bool char __b) { + return (__vector __bool char)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpeq(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpeq(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpeq(__vector __bool short __a, __vector __bool short __b) { + return (__vector __bool short)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpeq(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpeq(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpeq(__vector __bool int __a, __vector __bool int __b) { + return (__vector __bool int)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpeq(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpeq(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpeq(__vector __bool long long __a, __vector __bool long long __b) { + return (__vector __bool long long)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpeq(__vector signed long long __a, __vector signed long long __b) { + return (__vector __bool long long)(__a == __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpeq(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector __bool long long)(__a == __b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool int +vec_cmpeq(__vector float __a, __vector float __b) { + return (__vector __bool int)(__a == __b); +} +#endif + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpeq(__vector double __a, __vector double __b) { + return (__vector __bool long long)(__a == __b); +} + +/*-- vec_cmpge --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpge(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpge(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpge(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpge(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpge(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpge(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpge(__vector signed long long __a, __vector signed long long __b) { + return (__vector __bool long long)(__a >= __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpge(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector __bool long long)(__a >= __b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool int +vec_cmpge(__vector float __a, __vector float __b) { + return (__vector __bool int)(__a >= __b); +} +#endif + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpge(__vector double __a, __vector double __b) { + return (__vector __bool long long)(__a >= __b); +} + +/*-- vec_cmpgt --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpgt(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpgt(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpgt(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpgt(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpgt(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpgt(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpgt(__vector signed long long __a, __vector signed long long __b) { + return (__vector __bool long long)(__a > __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpgt(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector __bool long long)(__a > __b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool int +vec_cmpgt(__vector float __a, __vector float __b) { + return (__vector __bool int)(__a > __b); +} +#endif + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmpgt(__vector double __a, __vector double __b) { + return (__vector __bool long long)(__a > __b); +} + +/*-- vec_cmple --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmple(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cmple(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmple(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmple(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmple(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmple(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmple(__vector signed long long __a, __vector signed long long __b) { + return (__vector __bool long long)(__a <= __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmple(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector __bool long long)(__a <= __b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool int +vec_cmple(__vector float __a, __vector float __b) { + return (__vector __bool int)(__a <= __b); +} +#endif + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmple(__vector double __a, __vector double __b) { + return (__vector __bool long long)(__a <= __b); +} + +/*-- vec_cmplt --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmplt(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cmplt(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmplt(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmplt(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmplt(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmplt(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmplt(__vector signed long long __a, __vector signed long long __b) { + return (__vector __bool long long)(__a < __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmplt(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector __bool long long)(__a < __b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool int +vec_cmplt(__vector float __a, __vector float __b) { + return (__vector __bool int)(__a < __b); +} +#endif + +static inline __ATTRS_o_ai __vector __bool long long +vec_cmplt(__vector double __a, __vector double __b) { + return (__vector __bool long long)(__a < __b); +} + +/*-- vec_all_eq -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs(__a, (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs(__a, (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs(__a, (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_eq(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_eq(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfcesbs(__a, __b, &__cc); + return __cc == 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_eq(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfcedbs(__a, __b, &__cc); + return __cc == 0; +} + +/*-- vec_all_ne -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs(__a, (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs(__a, (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs(__a, (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ne(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_ne(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfcesbs(__a, __b, &__cc); + return __cc == 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_ne(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfcedbs(__a, __b, &__cc); + return __cc == 3; +} + +/*-- vec_all_ge -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, (__vector signed char)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, (__vector unsigned char)__a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, + (__vector unsigned char)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, (__vector signed short)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, (__vector unsigned short)__a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, + (__vector unsigned short)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, (__vector signed int)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, (__vector unsigned int)__a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, + (__vector unsigned int)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, (__vector signed long long)__a, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, __a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, (__vector unsigned long long)__a, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_ge(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, + (__vector unsigned long long)__a, &__cc); + return __cc == 3; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_ge(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__a, __b, &__cc); + return __cc == 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_ge(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__a, __b, &__cc); + return __cc == 0; +} + +/*-- vec_all_gt -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs(__a, (__vector signed char)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs(__a, (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs(__a, (__vector signed short)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs(__a, (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs(__a, (__vector signed int)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs(__a, (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs(__a, (__vector signed long long)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__a, __b, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, __b, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_gt(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 0; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_gt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__a, __b, &__cc); + return __cc == 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_gt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__a, __b, &__cc); + return __cc == 0; +} + +/*-- vec_all_le -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_all_le(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs(__a, (__vector signed char)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs(__a, (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs(__a, (__vector signed short)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs(__a, (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs(__a, (__vector signed int)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs(__a, (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs(__a, (__vector signed long long)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__a, __b, &__cc); + return __cc == 3; +} + +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, __b, &__cc); + return __cc == 3; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_le(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc == 3; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_le(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__b, __a, &__cc); + return __cc == 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_le(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__b, __a, &__cc); + return __cc == 0; +} + +/*-- vec_all_lt -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, (__vector signed char)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, (__vector unsigned char)__a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, + (__vector unsigned char)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, (__vector signed short)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, (__vector unsigned short)__a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, + (__vector unsigned short)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, (__vector signed int)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, (__vector unsigned int)__a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, + (__vector unsigned int)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, (__vector signed long long)__a, &__cc); + return __cc == 0; +} + +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, __a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, (__vector unsigned long long)__a, &__cc); + return __cc == 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_all_lt(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, + (__vector unsigned long long)__a, &__cc); + return __cc == 0; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_lt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__b, __a, &__cc); + return __cc == 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_lt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__b, __a, &__cc); + return __cc == 0; +} + +/*-- vec_all_nge ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_nge(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__a, __b, &__cc); + return __cc == 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_nge(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__a, __b, &__cc); + return __cc == 3; +} + +/*-- vec_all_ngt ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_ngt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__a, __b, &__cc); + return __cc == 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_ngt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__a, __b, &__cc); + return __cc == 3; +} + +/*-- vec_all_nle ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_nle(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__b, __a, &__cc); + return __cc == 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_nle(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__b, __a, &__cc); + return __cc == 3; +} + +/*-- vec_all_nlt ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_nlt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__b, __a, &__cc); + return __cc == 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_nlt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__b, __a, &__cc); + return __cc == 3; +} + +/*-- vec_all_nan ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_nan(__vector float __a) { + int __cc; + __builtin_s390_vftcisb(__a, 15, &__cc); + return __cc == 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_nan(__vector double __a) { + int __cc; + __builtin_s390_vftcidb(__a, 15, &__cc); + return __cc == 0; +} + +/*-- vec_all_numeric --------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_all_numeric(__vector float __a) { + int __cc; + __builtin_s390_vftcisb(__a, 15, &__cc); + return __cc == 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_all_numeric(__vector double __a) { + int __cc; + __builtin_s390_vftcidb(__a, 15, &__cc); + return __cc == 3; +} + +/*-- vec_any_eq -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs(__a, (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs(__a, (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs(__a, (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_eq(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_eq(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfcesbs(__a, __b, &__cc); + return __cc <= 1; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_eq(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfcedbs(__a, __b, &__cc); + return __cc <= 1; +} + +/*-- vec_any_ne -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs(__a, (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vceqbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs(__a, (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vceqhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs(__a, (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vceqfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ne(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vceqgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_ne(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfcesbs(__a, __b, &__cc); + return __cc != 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_ne(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfcedbs(__a, __b, &__cc); + return __cc != 0; +} + +/*-- vec_any_ge -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, (__vector signed char)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, (__vector unsigned char)__a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, + (__vector unsigned char)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, (__vector signed short)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, (__vector unsigned short)__a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, + (__vector unsigned short)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, (__vector signed int)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, (__vector unsigned int)__a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, + (__vector unsigned int)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, (__vector signed long long)__a, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, __a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, (__vector unsigned long long)__a, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_ge(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, + (__vector unsigned long long)__a, &__cc); + return __cc != 0; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_ge(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__a, __b, &__cc); + return __cc <= 1; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_ge(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__a, __b, &__cc); + return __cc <= 1; +} + +/*-- vec_any_gt -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs(__a, (__vector signed char)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs(__a, (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs(__a, (__vector signed short)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs(__a, (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs(__a, (__vector signed int)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs(__a, (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs(__a, (__vector signed long long)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__a, __b, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, __b, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_gt(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc <= 1; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_gt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__a, __b, &__cc); + return __cc <= 1; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_gt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__a, __b, &__cc); + return __cc <= 1; +} + +/*-- vec_any_le -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_any_le(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs(__a, (__vector signed char)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs(__a, (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__a, + (__vector unsigned char)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs(__a, (__vector signed short)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs(__a, (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__a, + (__vector unsigned short)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs(__a, (__vector signed int)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs(__a, (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__a, + (__vector unsigned int)__b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs(__a, (__vector signed long long)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__a, __b, &__cc); + return __cc != 0; +} + +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs(__a, (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, __b, &__cc); + return __cc != 0; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_le(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__a, + (__vector unsigned long long)__b, &__cc); + return __cc != 0; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_le(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__b, __a, &__cc); + return __cc <= 1; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_le(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__b, __a, &__cc); + return __cc <= 1; +} + +/*-- vec_any_lt -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchbs((__vector signed char)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool char __a, __vector signed char __b) { + int __cc; + __builtin_s390_vchbs(__b, (__vector signed char)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool char __a, __vector unsigned char __b) { + int __cc; + __builtin_s390_vchlbs(__b, (__vector unsigned char)__a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool char __a, __vector __bool char __b) { + int __cc; + __builtin_s390_vchlbs((__vector unsigned char)__b, + (__vector unsigned char)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchhs((__vector signed short)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool short __a, __vector signed short __b) { + int __cc; + __builtin_s390_vchhs(__b, (__vector signed short)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool short __a, __vector unsigned short __b) { + int __cc; + __builtin_s390_vchlhs(__b, (__vector unsigned short)__a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool short __a, __vector __bool short __b) { + int __cc; + __builtin_s390_vchlhs((__vector unsigned short)__b, + (__vector unsigned short)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchfs((__vector signed int)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool int __a, __vector signed int __b) { + int __cc; + __builtin_s390_vchfs(__b, (__vector signed int)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool int __a, __vector unsigned int __b) { + int __cc; + __builtin_s390_vchlfs(__b, (__vector unsigned int)__a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool int __a, __vector __bool int __b) { + int __cc; + __builtin_s390_vchlfs((__vector unsigned int)__b, + (__vector unsigned int)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector signed long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchgs((__vector signed long long)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool long long __a, __vector signed long long __b) { + int __cc; + __builtin_s390_vchgs(__b, (__vector signed long long)__a, &__cc); + return __cc <= 1; +} + +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector unsigned long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, __a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool long long __a, __vector unsigned long long __b) { + int __cc; + __builtin_s390_vchlgs(__b, (__vector unsigned long long)__a, &__cc); + return __cc <= 1; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai int +vec_any_lt(__vector __bool long long __a, __vector __bool long long __b) { + int __cc; + __builtin_s390_vchlgs((__vector unsigned long long)__b, + (__vector unsigned long long)__a, &__cc); + return __cc <= 1; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_lt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__b, __a, &__cc); + return __cc <= 1; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_lt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__b, __a, &__cc); + return __cc <= 1; +} + +/*-- vec_any_nge ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_nge(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__a, __b, &__cc); + return __cc != 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_nge(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__a, __b, &__cc); + return __cc != 0; +} + +/*-- vec_any_ngt ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_ngt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__a, __b, &__cc); + return __cc != 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_ngt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__a, __b, &__cc); + return __cc != 0; +} + +/*-- vec_any_nle ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_nle(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchesbs(__b, __a, &__cc); + return __cc != 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_nle(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchedbs(__b, __a, &__cc); + return __cc != 0; +} + +/*-- vec_any_nlt ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_nlt(__vector float __a, __vector float __b) { + int __cc; + __builtin_s390_vfchsbs(__b, __a, &__cc); + return __cc != 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_nlt(__vector double __a, __vector double __b) { + int __cc; + __builtin_s390_vfchdbs(__b, __a, &__cc); + return __cc != 0; +} + +/*-- vec_any_nan ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_nan(__vector float __a) { + int __cc; + __builtin_s390_vftcisb(__a, 15, &__cc); + return __cc != 3; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_nan(__vector double __a) { + int __cc; + __builtin_s390_vftcidb(__a, 15, &__cc); + return __cc != 3; +} + +/*-- vec_any_numeric --------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_any_numeric(__vector float __a) { + int __cc; + __builtin_s390_vftcisb(__a, 15, &__cc); + return __cc != 0; +} +#endif + +static inline __ATTRS_o_ai int +vec_any_numeric(__vector double __a) { + int __cc; + __builtin_s390_vftcidb(__a, 15, &__cc); + return __cc != 0; +} + +/*-- vec_andc ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_andc(__vector __bool char __a, __vector __bool char __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector signed char +vec_andc(__vector signed char __a, __vector signed char __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_andc(__vector __bool char __a, __vector signed char __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_andc(__vector signed char __a, __vector __bool char __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_andc(__vector unsigned char __a, __vector unsigned char __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_andc(__vector __bool char __a, __vector unsigned char __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_andc(__vector unsigned char __a, __vector __bool char __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector __bool short +vec_andc(__vector __bool short __a, __vector __bool short __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector signed short +vec_andc(__vector signed short __a, __vector signed short __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_andc(__vector __bool short __a, __vector signed short __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_andc(__vector signed short __a, __vector __bool short __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_andc(__vector unsigned short __a, __vector unsigned short __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_andc(__vector __bool short __a, __vector unsigned short __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_andc(__vector unsigned short __a, __vector __bool short __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector __bool int +vec_andc(__vector __bool int __a, __vector __bool int __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector signed int +vec_andc(__vector signed int __a, __vector signed int __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_andc(__vector __bool int __a, __vector signed int __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_andc(__vector signed int __a, __vector __bool int __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_andc(__vector unsigned int __a, __vector unsigned int __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_andc(__vector __bool int __a, __vector unsigned int __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_andc(__vector unsigned int __a, __vector __bool int __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_andc(__vector __bool long long __a, __vector __bool long long __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_andc(__vector signed long long __a, __vector signed long long __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_andc(__vector __bool long long __a, __vector signed long long __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_andc(__vector signed long long __a, __vector __bool long long __b) { + return __a & ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_andc(__vector unsigned long long __a, __vector unsigned long long __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_andc(__vector __bool long long __a, __vector unsigned long long __b) { + return __a & ~__b; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_andc(__vector unsigned long long __a, __vector __bool long long __b) { + return __a & ~__b; +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_andc(__vector float __a, __vector float __b) { + return (__vector float)((__vector unsigned int)__a & + ~(__vector unsigned int)__b); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_andc(__vector double __a, __vector double __b) { + return (__vector double)((__vector unsigned long long)__a & + ~(__vector unsigned long long)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_andc(__vector __bool long long __a, __vector double __b) { + return (__vector double)((__vector unsigned long long)__a & + ~(__vector unsigned long long)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_andc(__vector double __a, __vector __bool long long __b) { + return (__vector double)((__vector unsigned long long)__a & + ~(__vector unsigned long long)__b); +} + +/*-- vec_nor ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_nor(__vector __bool char __a, __vector __bool char __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector signed char +vec_nor(__vector signed char __a, __vector signed char __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_nor(__vector __bool char __a, __vector signed char __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_nor(__vector signed char __a, __vector __bool char __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_nor(__vector unsigned char __a, __vector unsigned char __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_nor(__vector __bool char __a, __vector unsigned char __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_nor(__vector unsigned char __a, __vector __bool char __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_nor(__vector __bool short __a, __vector __bool short __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_nor(__vector signed short __a, __vector signed short __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_nor(__vector __bool short __a, __vector signed short __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_nor(__vector signed short __a, __vector __bool short __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_nor(__vector unsigned short __a, __vector unsigned short __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_nor(__vector __bool short __a, __vector unsigned short __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_nor(__vector unsigned short __a, __vector __bool short __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_nor(__vector __bool int __a, __vector __bool int __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_nor(__vector signed int __a, __vector signed int __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_nor(__vector __bool int __a, __vector signed int __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_nor(__vector signed int __a, __vector __bool int __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_nor(__vector unsigned int __a, __vector unsigned int __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_nor(__vector __bool int __a, __vector unsigned int __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_nor(__vector unsigned int __a, __vector __bool int __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_nor(__vector __bool long long __a, __vector __bool long long __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_nor(__vector signed long long __a, __vector signed long long __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_nor(__vector __bool long long __a, __vector signed long long __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_nor(__vector signed long long __a, __vector __bool long long __b) { + return ~(__a | __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_nor(__vector unsigned long long __a, __vector unsigned long long __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_nor(__vector __bool long long __a, __vector unsigned long long __b) { + return ~(__a | __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_nor(__vector unsigned long long __a, __vector __bool long long __b) { + return ~(__a | __b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_nor(__vector float __a, __vector float __b) { + return (__vector float)~((__vector unsigned int)__a | + (__vector unsigned int)__b); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_nor(__vector double __a, __vector double __b) { + return (__vector double)~((__vector unsigned long long)__a | + (__vector unsigned long long)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_nor(__vector __bool long long __a, __vector double __b) { + return (__vector double)~((__vector unsigned long long)__a | + (__vector unsigned long long)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_nor(__vector double __a, __vector __bool long long __b) { + return (__vector double)~((__vector unsigned long long)__a | + (__vector unsigned long long)__b); +} + +/*-- vec_orc ----------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool char +vec_orc(__vector __bool char __a, __vector __bool char __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector signed char +vec_orc(__vector signed char __a, __vector signed char __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_orc(__vector unsigned char __a, __vector unsigned char __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector __bool short +vec_orc(__vector __bool short __a, __vector __bool short __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector signed short +vec_orc(__vector signed short __a, __vector signed short __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_orc(__vector unsigned short __a, __vector unsigned short __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector __bool int +vec_orc(__vector __bool int __a, __vector __bool int __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector signed int +vec_orc(__vector signed int __a, __vector signed int __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_orc(__vector unsigned int __a, __vector unsigned int __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_orc(__vector __bool long long __a, __vector __bool long long __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector signed long long +vec_orc(__vector signed long long __a, __vector signed long long __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_orc(__vector unsigned long long __a, __vector unsigned long long __b) { + return __a | ~__b; +} + +static inline __ATTRS_o_ai __vector float +vec_orc(__vector float __a, __vector float __b) { + return (__vector float)((__vector unsigned int)__a | + ~(__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector double +vec_orc(__vector double __a, __vector double __b) { + return (__vector double)((__vector unsigned long long)__a | + ~(__vector unsigned long long)__b); +} +#endif + +/*-- vec_nand ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool char +vec_nand(__vector __bool char __a, __vector __bool char __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector signed char +vec_nand(__vector signed char __a, __vector signed char __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_nand(__vector unsigned char __a, __vector unsigned char __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_nand(__vector __bool short __a, __vector __bool short __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_nand(__vector signed short __a, __vector signed short __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_nand(__vector unsigned short __a, __vector unsigned short __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_nand(__vector __bool int __a, __vector __bool int __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_nand(__vector signed int __a, __vector signed int __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_nand(__vector unsigned int __a, __vector unsigned int __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_nand(__vector __bool long long __a, __vector __bool long long __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_nand(__vector signed long long __a, __vector signed long long __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_nand(__vector unsigned long long __a, __vector unsigned long long __b) { + return ~(__a & __b); +} + +static inline __ATTRS_o_ai __vector float +vec_nand(__vector float __a, __vector float __b) { + return (__vector float)~((__vector unsigned int)__a & + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector double +vec_nand(__vector double __a, __vector double __b) { + return (__vector double)~((__vector unsigned long long)__a & + (__vector unsigned long long)__b); +} +#endif + +/*-- vec_eqv ----------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector __bool char +vec_eqv(__vector __bool char __a, __vector __bool char __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector signed char +vec_eqv(__vector signed char __a, __vector signed char __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_eqv(__vector unsigned char __a, __vector unsigned char __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_eqv(__vector __bool short __a, __vector __bool short __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_eqv(__vector signed short __a, __vector signed short __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_eqv(__vector unsigned short __a, __vector unsigned short __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_eqv(__vector __bool int __a, __vector __bool int __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_eqv(__vector signed int __a, __vector signed int __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_eqv(__vector unsigned int __a, __vector unsigned int __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector __bool long long +vec_eqv(__vector __bool long long __a, __vector __bool long long __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_eqv(__vector signed long long __a, __vector signed long long __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_eqv(__vector unsigned long long __a, __vector unsigned long long __b) { + return ~(__a ^ __b); +} + +static inline __ATTRS_o_ai __vector float +vec_eqv(__vector float __a, __vector float __b) { + return (__vector float)~((__vector unsigned int)__a ^ + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector double +vec_eqv(__vector double __a, __vector double __b) { + return (__vector double)~((__vector unsigned long long)__a ^ + (__vector unsigned long long)__b); +} +#endif + +/*-- vec_cntlz --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cntlz(__vector signed char __a) { + return __builtin_s390_vclzb((__vector unsigned char)__a); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cntlz(__vector unsigned char __a) { + return __builtin_s390_vclzb(__a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cntlz(__vector signed short __a) { + return __builtin_s390_vclzh((__vector unsigned short)__a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cntlz(__vector unsigned short __a) { + return __builtin_s390_vclzh(__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cntlz(__vector signed int __a) { + return __builtin_s390_vclzf((__vector unsigned int)__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cntlz(__vector unsigned int __a) { + return __builtin_s390_vclzf(__a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_cntlz(__vector signed long long __a) { + return __builtin_s390_vclzg((__vector unsigned long long)__a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_cntlz(__vector unsigned long long __a) { + return __builtin_s390_vclzg(__a); +} + +/*-- vec_cnttz --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cnttz(__vector signed char __a) { + return __builtin_s390_vctzb((__vector unsigned char)__a); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cnttz(__vector unsigned char __a) { + return __builtin_s390_vctzb(__a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cnttz(__vector signed short __a) { + return __builtin_s390_vctzh((__vector unsigned short)__a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cnttz(__vector unsigned short __a) { + return __builtin_s390_vctzh(__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cnttz(__vector signed int __a) { + return __builtin_s390_vctzf((__vector unsigned int)__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cnttz(__vector unsigned int __a) { + return __builtin_s390_vctzf(__a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_cnttz(__vector signed long long __a) { + return __builtin_s390_vctzg((__vector unsigned long long)__a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_cnttz(__vector unsigned long long __a) { + return __builtin_s390_vctzg(__a); +} + +/*-- vec_popcnt -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_popcnt(__vector signed char __a) { + return __builtin_s390_vpopctb((__vector unsigned char)__a); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_popcnt(__vector unsigned char __a) { + return __builtin_s390_vpopctb(__a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_popcnt(__vector signed short __a) { + return __builtin_s390_vpopcth((__vector unsigned short)__a); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_popcnt(__vector unsigned short __a) { + return __builtin_s390_vpopcth(__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_popcnt(__vector signed int __a) { + return __builtin_s390_vpopctf((__vector unsigned int)__a); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_popcnt(__vector unsigned int __a) { + return __builtin_s390_vpopctf(__a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_popcnt(__vector signed long long __a) { + return __builtin_s390_vpopctg((__vector unsigned long long)__a); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_popcnt(__vector unsigned long long __a) { + return __builtin_s390_vpopctg(__a); +} + +/*-- vec_rl -----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_rl(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_verllvb( + (__vector unsigned char)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_rl(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_verllvb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_rl(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_verllvh( + (__vector unsigned short)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_rl(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_verllvh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_rl(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_verllvf( + (__vector unsigned int)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_rl(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_verllvf(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_rl(__vector signed long long __a, __vector unsigned long long __b) { + return (__vector signed long long)__builtin_s390_verllvg( + (__vector unsigned long long)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_rl(__vector unsigned long long __a, __vector unsigned long long __b) { + return __builtin_s390_verllvg(__a, __b); +} + +/*-- vec_rli ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_rli(__vector signed char __a, unsigned long __b) { + return (__vector signed char)__builtin_s390_verllb( + (__vector unsigned char)__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_rli(__vector unsigned char __a, unsigned long __b) { + return __builtin_s390_verllb(__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_rli(__vector signed short __a, unsigned long __b) { + return (__vector signed short)__builtin_s390_verllh( + (__vector unsigned short)__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_rli(__vector unsigned short __a, unsigned long __b) { + return __builtin_s390_verllh(__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_rli(__vector signed int __a, unsigned long __b) { + return (__vector signed int)__builtin_s390_verllf( + (__vector unsigned int)__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_rli(__vector unsigned int __a, unsigned long __b) { + return __builtin_s390_verllf(__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_rli(__vector signed long long __a, unsigned long __b) { + return (__vector signed long long)__builtin_s390_verllg( + (__vector unsigned long long)__a, (unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_rli(__vector unsigned long long __a, unsigned long __b) { + return __builtin_s390_verllg(__a, (unsigned char)__b); +} + +/*-- vec_rl_mask ------------------------------------------------------------*/ + +extern __ATTRS_o __vector signed char +vec_rl_mask(__vector signed char __a, __vector unsigned char __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector unsigned char +vec_rl_mask(__vector unsigned char __a, __vector unsigned char __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector signed short +vec_rl_mask(__vector signed short __a, __vector unsigned short __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector unsigned short +vec_rl_mask(__vector unsigned short __a, __vector unsigned short __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector signed int +vec_rl_mask(__vector signed int __a, __vector unsigned int __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector unsigned int +vec_rl_mask(__vector unsigned int __a, __vector unsigned int __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector signed long long +vec_rl_mask(__vector signed long long __a, __vector unsigned long long __b, + unsigned char __c) __constant(__c); + +extern __ATTRS_o __vector unsigned long long +vec_rl_mask(__vector unsigned long long __a, __vector unsigned long long __b, + unsigned char __c) __constant(__c); + +#define vec_rl_mask(X, Y, Z) ((__typeof__((vec_rl_mask)((X), (Y), (Z)))) \ + __extension__ ({ \ + __vector unsigned char __res; \ + __vector unsigned char __x = (__vector unsigned char)(X); \ + __vector unsigned char __y = (__vector unsigned char)(Y); \ + switch (sizeof ((X)[0])) { \ + case 1: __res = (__vector unsigned char) __builtin_s390_verimb( \ + (__vector unsigned char)__x, (__vector unsigned char)__x, \ + (__vector unsigned char)__y, (Z)); break; \ + case 2: __res = (__vector unsigned char) __builtin_s390_verimh( \ + (__vector unsigned short)__x, (__vector unsigned short)__x, \ + (__vector unsigned short)__y, (Z)); break; \ + case 4: __res = (__vector unsigned char) __builtin_s390_verimf( \ + (__vector unsigned int)__x, (__vector unsigned int)__x, \ + (__vector unsigned int)__y, (Z)); break; \ + default: __res = (__vector unsigned char) __builtin_s390_verimg( \ + (__vector unsigned long long)__x, (__vector unsigned long long)__x, \ + (__vector unsigned long long)__y, (Z)); break; \ + } __res; })) + +/*-- vec_sll ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_sll(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_sll(__vector signed char __a, __vector unsigned short __b) { + return (__vector signed char)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_sll(__vector signed char __a, __vector unsigned int __b) { + return (__vector signed char)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_sll(__vector __bool char __a, __vector unsigned char __b) { + return (__vector __bool char)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_sll(__vector __bool char __a, __vector unsigned short __b) { + return (__vector __bool char)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_sll(__vector __bool char __a, __vector unsigned int __b) { + return (__vector __bool char)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_sll(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vsl(__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_sll(__vector unsigned char __a, __vector unsigned short __b) { + return __builtin_s390_vsl(__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_sll(__vector unsigned char __a, __vector unsigned int __b) { + return __builtin_s390_vsl(__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_sll(__vector signed short __a, __vector unsigned char __b) { + return (__vector signed short)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_sll(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_sll(__vector signed short __a, __vector unsigned int __b) { + return (__vector signed short)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_sll(__vector __bool short __a, __vector unsigned char __b) { + return (__vector __bool short)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_sll(__vector __bool short __a, __vector unsigned short __b) { + return (__vector __bool short)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_sll(__vector __bool short __a, __vector unsigned int __b) { + return (__vector __bool short)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_sll(__vector unsigned short __a, __vector unsigned char __b) { + return (__vector unsigned short)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_sll(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_sll(__vector unsigned short __a, __vector unsigned int __b) { + return (__vector unsigned short)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_sll(__vector signed int __a, __vector unsigned char __b) { + return (__vector signed int)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_sll(__vector signed int __a, __vector unsigned short __b) { + return (__vector signed int)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_sll(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_sll(__vector __bool int __a, __vector unsigned char __b) { + return (__vector __bool int)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_sll(__vector __bool int __a, __vector unsigned short __b) { + return (__vector __bool int)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_sll(__vector __bool int __a, __vector unsigned int __b) { + return (__vector __bool int)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_sll(__vector unsigned int __a, __vector unsigned char __b) { + return (__vector unsigned int)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_sll(__vector unsigned int __a, __vector unsigned short __b) { + return (__vector unsigned int)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_sll(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_sll(__vector signed long long __a, __vector unsigned char __b) { + return (__vector signed long long)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_sll(__vector signed long long __a, __vector unsigned short __b) { + return (__vector signed long long)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_sll(__vector signed long long __a, __vector unsigned int __b) { + return (__vector signed long long)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_sll(__vector __bool long long __a, __vector unsigned char __b) { + return (__vector __bool long long)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_sll(__vector __bool long long __a, __vector unsigned short __b) { + return (__vector __bool long long)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_sll(__vector __bool long long __a, __vector unsigned int __b) { + return (__vector __bool long long)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_sll(__vector unsigned long long __a, __vector unsigned char __b) { + return (__vector unsigned long long)__builtin_s390_vsl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_sll(__vector unsigned long long __a, __vector unsigned short __b) { + return (__vector unsigned long long)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_sll(__vector unsigned long long __a, __vector unsigned int __b) { + return (__vector unsigned long long)__builtin_s390_vsl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +/*-- vec_slb ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_slb(__vector signed char __a, __vector signed char __b) { + return (__vector signed char)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed char +vec_slb(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_vslb( + (__vector unsigned char)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_slb(__vector unsigned char __a, __vector signed char __b) { + return __builtin_s390_vslb(__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_slb(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vslb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_slb(__vector signed short __a, __vector signed short __b) { + return (__vector signed short)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_slb(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_slb(__vector unsigned short __a, __vector signed short __b) { + return (__vector unsigned short)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_slb(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_slb(__vector signed int __a, __vector signed int __b) { + return (__vector signed int)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_slb(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_slb(__vector unsigned int __a, __vector signed int __b) { + return (__vector unsigned int)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_slb(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_slb(__vector signed long long __a, __vector signed long long __b) { + return (__vector signed long long)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_slb(__vector signed long long __a, __vector unsigned long long __b) { + return (__vector signed long long)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_slb(__vector unsigned long long __a, __vector signed long long __b) { + return (__vector unsigned long long)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_slb(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector unsigned long long)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_slb(__vector float __a, __vector signed int __b) { + return (__vector float)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector float +vec_slb(__vector float __a, __vector unsigned int __b) { + return (__vector float)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_slb(__vector double __a, __vector signed long long __b) { + return (__vector double)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector double +vec_slb(__vector double __a, __vector unsigned long long __b) { + return (__vector double)__builtin_s390_vslb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +/*-- vec_sld ----------------------------------------------------------------*/ + +extern __ATTRS_o __vector signed char +vec_sld(__vector signed char __a, __vector signed char __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector __bool char +vec_sld(__vector __bool char __a, __vector __bool char __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector unsigned char +vec_sld(__vector unsigned char __a, __vector unsigned char __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector signed short +vec_sld(__vector signed short __a, __vector signed short __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector __bool short +vec_sld(__vector __bool short __a, __vector __bool short __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector unsigned short +vec_sld(__vector unsigned short __a, __vector unsigned short __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector signed int +vec_sld(__vector signed int __a, __vector signed int __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector __bool int +vec_sld(__vector __bool int __a, __vector __bool int __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector unsigned int +vec_sld(__vector unsigned int __a, __vector unsigned int __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector signed long long +vec_sld(__vector signed long long __a, __vector signed long long __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector __bool long long +vec_sld(__vector __bool long long __a, __vector __bool long long __b, int __c) + __constant_range(__c, 0, 15); + +extern __ATTRS_o __vector unsigned long long +vec_sld(__vector unsigned long long __a, __vector unsigned long long __b, + int __c) + __constant_range(__c, 0, 15); + +#if __ARCH__ >= 12 +extern __ATTRS_o __vector float +vec_sld(__vector float __a, __vector float __b, int __c) + __constant_range(__c, 0, 15); +#endif + +extern __ATTRS_o __vector double +vec_sld(__vector double __a, __vector double __b, int __c) + __constant_range(__c, 0, 15); + +#define vec_sld(X, Y, Z) ((__typeof__((vec_sld)((X), (Y), (Z)))) \ + __builtin_s390_vsldb((__vector unsigned char)(X), \ + (__vector unsigned char)(Y), (Z))) + +/*-- vec_sldw ---------------------------------------------------------------*/ + +extern __ATTRS_o __vector signed char +vec_sldw(__vector signed char __a, __vector signed char __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector unsigned char +vec_sldw(__vector unsigned char __a, __vector unsigned char __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector signed short +vec_sldw(__vector signed short __a, __vector signed short __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector unsigned short +vec_sldw(__vector unsigned short __a, __vector unsigned short __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector signed int +vec_sldw(__vector signed int __a, __vector signed int __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector unsigned int +vec_sldw(__vector unsigned int __a, __vector unsigned int __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector signed long long +vec_sldw(__vector signed long long __a, __vector signed long long __b, int __c) + __constant_range(__c, 0, 3); + +extern __ATTRS_o __vector unsigned long long +vec_sldw(__vector unsigned long long __a, __vector unsigned long long __b, + int __c) + __constant_range(__c, 0, 3); + +// This prototype is deprecated. +extern __ATTRS_o __vector double +vec_sldw(__vector double __a, __vector double __b, int __c) + __constant_range(__c, 0, 3); + +#define vec_sldw(X, Y, Z) ((__typeof__((vec_sldw)((X), (Y), (Z)))) \ + __builtin_s390_vsldb((__vector unsigned char)(X), \ + (__vector unsigned char)(Y), (Z) * 4)) + +/*-- vec_sldb ---------------------------------------------------------------*/ + +#if __ARCH__ >= 13 + +extern __ATTRS_o __vector signed char +vec_sldb(__vector signed char __a, __vector signed char __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned char +vec_sldb(__vector unsigned char __a, __vector unsigned char __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector signed short +vec_sldb(__vector signed short __a, __vector signed short __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned short +vec_sldb(__vector unsigned short __a, __vector unsigned short __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector signed int +vec_sldb(__vector signed int __a, __vector signed int __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned int +vec_sldb(__vector unsigned int __a, __vector unsigned int __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector signed long long +vec_sldb(__vector signed long long __a, __vector signed long long __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned long long +vec_sldb(__vector unsigned long long __a, __vector unsigned long long __b, + int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector float +vec_sldb(__vector float __a, __vector float __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector double +vec_sldb(__vector double __a, __vector double __b, int __c) + __constant_range(__c, 0, 7); + +#define vec_sldb(X, Y, Z) ((__typeof__((vec_sldb)((X), (Y), (Z)))) \ + __builtin_s390_vsld((__vector unsigned char)(X), \ + (__vector unsigned char)(Y), (Z))) + +#endif + +/*-- vec_sral ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_sral(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_sral(__vector signed char __a, __vector unsigned short __b) { + return (__vector signed char)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_sral(__vector signed char __a, __vector unsigned int __b) { + return (__vector signed char)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_sral(__vector __bool char __a, __vector unsigned char __b) { + return (__vector __bool char)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_sral(__vector __bool char __a, __vector unsigned short __b) { + return (__vector __bool char)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_sral(__vector __bool char __a, __vector unsigned int __b) { + return (__vector __bool char)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_sral(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vsra(__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_sral(__vector unsigned char __a, __vector unsigned short __b) { + return __builtin_s390_vsra(__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_sral(__vector unsigned char __a, __vector unsigned int __b) { + return __builtin_s390_vsra(__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_sral(__vector signed short __a, __vector unsigned char __b) { + return (__vector signed short)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_sral(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_sral(__vector signed short __a, __vector unsigned int __b) { + return (__vector signed short)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_sral(__vector __bool short __a, __vector unsigned char __b) { + return (__vector __bool short)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_sral(__vector __bool short __a, __vector unsigned short __b) { + return (__vector __bool short)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_sral(__vector __bool short __a, __vector unsigned int __b) { + return (__vector __bool short)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_sral(__vector unsigned short __a, __vector unsigned char __b) { + return (__vector unsigned short)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_sral(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_sral(__vector unsigned short __a, __vector unsigned int __b) { + return (__vector unsigned short)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_sral(__vector signed int __a, __vector unsigned char __b) { + return (__vector signed int)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_sral(__vector signed int __a, __vector unsigned short __b) { + return (__vector signed int)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_sral(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_sral(__vector __bool int __a, __vector unsigned char __b) { + return (__vector __bool int)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_sral(__vector __bool int __a, __vector unsigned short __b) { + return (__vector __bool int)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_sral(__vector __bool int __a, __vector unsigned int __b) { + return (__vector __bool int)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_sral(__vector unsigned int __a, __vector unsigned char __b) { + return (__vector unsigned int)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_sral(__vector unsigned int __a, __vector unsigned short __b) { + return (__vector unsigned int)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_sral(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_sral(__vector signed long long __a, __vector unsigned char __b) { + return (__vector signed long long)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_sral(__vector signed long long __a, __vector unsigned short __b) { + return (__vector signed long long)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_sral(__vector signed long long __a, __vector unsigned int __b) { + return (__vector signed long long)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_sral(__vector __bool long long __a, __vector unsigned char __b) { + return (__vector __bool long long)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_sral(__vector __bool long long __a, __vector unsigned short __b) { + return (__vector __bool long long)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_sral(__vector __bool long long __a, __vector unsigned int __b) { + return (__vector __bool long long)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_sral(__vector unsigned long long __a, __vector unsigned char __b) { + return (__vector unsigned long long)__builtin_s390_vsra( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_sral(__vector unsigned long long __a, __vector unsigned short __b) { + return (__vector unsigned long long)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_sral(__vector unsigned long long __a, __vector unsigned int __b) { + return (__vector unsigned long long)__builtin_s390_vsra( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +/*-- vec_srab ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_srab(__vector signed char __a, __vector signed char __b) { + return (__vector signed char)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed char +vec_srab(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_vsrab( + (__vector unsigned char)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_srab(__vector unsigned char __a, __vector signed char __b) { + return __builtin_s390_vsrab(__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_srab(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vsrab(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_srab(__vector signed short __a, __vector signed short __b) { + return (__vector signed short)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_srab(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_srab(__vector unsigned short __a, __vector signed short __b) { + return (__vector unsigned short)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_srab(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_srab(__vector signed int __a, __vector signed int __b) { + return (__vector signed int)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_srab(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_srab(__vector unsigned int __a, __vector signed int __b) { + return (__vector unsigned int)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_srab(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_srab(__vector signed long long __a, __vector signed long long __b) { + return (__vector signed long long)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_srab(__vector signed long long __a, __vector unsigned long long __b) { + return (__vector signed long long)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_srab(__vector unsigned long long __a, __vector signed long long __b) { + return (__vector unsigned long long)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_srab(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector unsigned long long)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_srab(__vector float __a, __vector signed int __b) { + return (__vector float)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector float +vec_srab(__vector float __a, __vector unsigned int __b) { + return (__vector float)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_srab(__vector double __a, __vector signed long long __b) { + return (__vector double)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector double +vec_srab(__vector double __a, __vector unsigned long long __b) { + return (__vector double)__builtin_s390_vsrab( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +/*-- vec_srl ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_srl(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_srl(__vector signed char __a, __vector unsigned short __b) { + return (__vector signed char)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_srl(__vector signed char __a, __vector unsigned int __b) { + return (__vector signed char)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_srl(__vector __bool char __a, __vector unsigned char __b) { + return (__vector __bool char)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_srl(__vector __bool char __a, __vector unsigned short __b) { + return (__vector __bool char)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool char +vec_srl(__vector __bool char __a, __vector unsigned int __b) { + return (__vector __bool char)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_srl(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vsrl(__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_srl(__vector unsigned char __a, __vector unsigned short __b) { + return __builtin_s390_vsrl(__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_srl(__vector unsigned char __a, __vector unsigned int __b) { + return __builtin_s390_vsrl(__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_srl(__vector signed short __a, __vector unsigned char __b) { + return (__vector signed short)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_srl(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_srl(__vector signed short __a, __vector unsigned int __b) { + return (__vector signed short)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_srl(__vector __bool short __a, __vector unsigned char __b) { + return (__vector __bool short)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_srl(__vector __bool short __a, __vector unsigned short __b) { + return (__vector __bool short)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool short +vec_srl(__vector __bool short __a, __vector unsigned int __b) { + return (__vector __bool short)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_srl(__vector unsigned short __a, __vector unsigned char __b) { + return (__vector unsigned short)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_srl(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_srl(__vector unsigned short __a, __vector unsigned int __b) { + return (__vector unsigned short)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_srl(__vector signed int __a, __vector unsigned char __b) { + return (__vector signed int)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_srl(__vector signed int __a, __vector unsigned short __b) { + return (__vector signed int)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_srl(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_srl(__vector __bool int __a, __vector unsigned char __b) { + return (__vector __bool int)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_srl(__vector __bool int __a, __vector unsigned short __b) { + return (__vector __bool int)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool int +vec_srl(__vector __bool int __a, __vector unsigned int __b) { + return (__vector __bool int)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_srl(__vector unsigned int __a, __vector unsigned char __b) { + return (__vector unsigned int)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_srl(__vector unsigned int __a, __vector unsigned short __b) { + return (__vector unsigned int)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_srl(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_srl(__vector signed long long __a, __vector unsigned char __b) { + return (__vector signed long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_srl(__vector signed long long __a, __vector unsigned short __b) { + return (__vector signed long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_srl(__vector signed long long __a, __vector unsigned int __b) { + return (__vector signed long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_srl(__vector __bool long long __a, __vector unsigned char __b) { + return (__vector __bool long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_srl(__vector __bool long long __a, __vector unsigned short __b) { + return (__vector __bool long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector __bool long long +vec_srl(__vector __bool long long __a, __vector unsigned int __b) { + return (__vector __bool long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_srl(__vector unsigned long long __a, __vector unsigned char __b) { + return (__vector unsigned long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, __b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_srl(__vector unsigned long long __a, __vector unsigned short __b) { + return (__vector unsigned long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_srl(__vector unsigned long long __a, __vector unsigned int __b) { + return (__vector unsigned long long)__builtin_s390_vsrl( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +/*-- vec_srb ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_srb(__vector signed char __a, __vector signed char __b) { + return (__vector signed char)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed char +vec_srb(__vector signed char __a, __vector unsigned char __b) { + return (__vector signed char)__builtin_s390_vsrlb( + (__vector unsigned char)__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_srb(__vector unsigned char __a, __vector signed char __b) { + return __builtin_s390_vsrlb(__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_srb(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vsrlb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_srb(__vector signed short __a, __vector signed short __b) { + return (__vector signed short)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_srb(__vector signed short __a, __vector unsigned short __b) { + return (__vector signed short)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_srb(__vector unsigned short __a, __vector signed short __b) { + return (__vector unsigned short)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_srb(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector unsigned short)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_srb(__vector signed int __a, __vector signed int __b) { + return (__vector signed int)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_srb(__vector signed int __a, __vector unsigned int __b) { + return (__vector signed int)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_srb(__vector unsigned int __a, __vector signed int __b) { + return (__vector unsigned int)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_srb(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned int)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_srb(__vector signed long long __a, __vector signed long long __b) { + return (__vector signed long long)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_srb(__vector signed long long __a, __vector unsigned long long __b) { + return (__vector signed long long)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_srb(__vector unsigned long long __a, __vector signed long long __b) { + return (__vector unsigned long long)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_srb(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector unsigned long long)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_srb(__vector float __a, __vector signed int __b) { + return (__vector float)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector float +vec_srb(__vector float __a, __vector unsigned int __b) { + return (__vector float)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_srb(__vector double __a, __vector signed long long __b) { + return (__vector double)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector double +vec_srb(__vector double __a, __vector unsigned long long __b) { + return (__vector double)__builtin_s390_vsrlb( + (__vector unsigned char)__a, (__vector unsigned char)__b); +} + +/*-- vec_srdb ---------------------------------------------------------------*/ + +#if __ARCH__ >= 13 + +extern __ATTRS_o __vector signed char +vec_srdb(__vector signed char __a, __vector signed char __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned char +vec_srdb(__vector unsigned char __a, __vector unsigned char __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector signed short +vec_srdb(__vector signed short __a, __vector signed short __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned short +vec_srdb(__vector unsigned short __a, __vector unsigned short __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector signed int +vec_srdb(__vector signed int __a, __vector signed int __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned int +vec_srdb(__vector unsigned int __a, __vector unsigned int __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector signed long long +vec_srdb(__vector signed long long __a, __vector signed long long __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector unsigned long long +vec_srdb(__vector unsigned long long __a, __vector unsigned long long __b, + int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector float +vec_srdb(__vector float __a, __vector float __b, int __c) + __constant_range(__c, 0, 7); + +extern __ATTRS_o __vector double +vec_srdb(__vector double __a, __vector double __b, int __c) + __constant_range(__c, 0, 7); + +#define vec_srdb(X, Y, Z) ((__typeof__((vec_srdb)((X), (Y), (Z)))) \ + __builtin_s390_vsrd((__vector unsigned char)(X), \ + (__vector unsigned char)(Y), (Z))) + +#endif + +/*-- vec_abs ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_abs(__vector signed char __a) { + return vec_sel(__a, -__a, vec_cmplt(__a, (__vector signed char)0)); +} + +static inline __ATTRS_o_ai __vector signed short +vec_abs(__vector signed short __a) { + return vec_sel(__a, -__a, vec_cmplt(__a, (__vector signed short)0)); +} + +static inline __ATTRS_o_ai __vector signed int +vec_abs(__vector signed int __a) { + return vec_sel(__a, -__a, vec_cmplt(__a, (__vector signed int)0)); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_abs(__vector signed long long __a) { + return vec_sel(__a, -__a, vec_cmplt(__a, (__vector signed long long)0)); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_abs(__vector float __a) { + return __builtin_s390_vflpsb(__a); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_abs(__vector double __a) { + return __builtin_s390_vflpdb(__a); +} + +/*-- vec_nabs ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_nabs(__vector float __a) { + return __builtin_s390_vflnsb(__a); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_nabs(__vector double __a) { + return __builtin_s390_vflndb(__a); +} + +/*-- vec_max ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_max(__vector signed char __a, __vector signed char __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_max(__vector signed char __a, __vector __bool char __b) { + __vector signed char __bc = (__vector signed char)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_max(__vector __bool char __a, __vector signed char __b) { + __vector signed char __ac = (__vector signed char)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_max(__vector unsigned char __a, __vector unsigned char __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_max(__vector unsigned char __a, __vector __bool char __b) { + __vector unsigned char __bc = (__vector unsigned char)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_max(__vector __bool char __a, __vector unsigned char __b) { + __vector unsigned char __ac = (__vector unsigned char)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector signed short +vec_max(__vector signed short __a, __vector signed short __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_max(__vector signed short __a, __vector __bool short __b) { + __vector signed short __bc = (__vector signed short)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_max(__vector __bool short __a, __vector signed short __b) { + __vector signed short __ac = (__vector signed short)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_max(__vector unsigned short __a, __vector unsigned short __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_max(__vector unsigned short __a, __vector __bool short __b) { + __vector unsigned short __bc = (__vector unsigned short)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_max(__vector __bool short __a, __vector unsigned short __b) { + __vector unsigned short __ac = (__vector unsigned short)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector signed int +vec_max(__vector signed int __a, __vector signed int __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_max(__vector signed int __a, __vector __bool int __b) { + __vector signed int __bc = (__vector signed int)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_max(__vector __bool int __a, __vector signed int __b) { + __vector signed int __ac = (__vector signed int)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_max(__vector unsigned int __a, __vector unsigned int __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_max(__vector unsigned int __a, __vector __bool int __b) { + __vector unsigned int __bc = (__vector unsigned int)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_max(__vector __bool int __a, __vector unsigned int __b) { + __vector unsigned int __ac = (__vector unsigned int)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_max(__vector signed long long __a, __vector signed long long __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_max(__vector signed long long __a, __vector __bool long long __b) { + __vector signed long long __bc = (__vector signed long long)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_max(__vector __bool long long __a, __vector signed long long __b) { + __vector signed long long __ac = (__vector signed long long)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_max(__vector unsigned long long __a, __vector unsigned long long __b) { + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_max(__vector unsigned long long __a, __vector __bool long long __b) { + __vector unsigned long long __bc = (__vector unsigned long long)__b; + return vec_sel(__bc, __a, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_max(__vector __bool long long __a, __vector unsigned long long __b) { + __vector unsigned long long __ac = (__vector unsigned long long)__a; + return vec_sel(__b, __ac, vec_cmpgt(__ac, __b)); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_max(__vector float __a, __vector float __b) { + return __builtin_s390_vfmaxsb(__a, __b, 0); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_max(__vector double __a, __vector double __b) { +#if __ARCH__ >= 12 + return __builtin_s390_vfmaxdb(__a, __b, 0); +#else + return vec_sel(__b, __a, vec_cmpgt(__a, __b)); +#endif +} + +/*-- vec_min ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_min(__vector signed char __a, __vector signed char __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_min(__vector signed char __a, __vector __bool char __b) { + __vector signed char __bc = (__vector signed char)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed char +vec_min(__vector __bool char __a, __vector signed char __b) { + __vector signed char __ac = (__vector signed char)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_min(__vector unsigned char __a, __vector unsigned char __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_min(__vector unsigned char __a, __vector __bool char __b) { + __vector unsigned char __bc = (__vector unsigned char)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned char +vec_min(__vector __bool char __a, __vector unsigned char __b) { + __vector unsigned char __ac = (__vector unsigned char)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector signed short +vec_min(__vector signed short __a, __vector signed short __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_min(__vector signed short __a, __vector __bool short __b) { + __vector signed short __bc = (__vector signed short)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed short +vec_min(__vector __bool short __a, __vector signed short __b) { + __vector signed short __ac = (__vector signed short)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_min(__vector unsigned short __a, __vector unsigned short __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_min(__vector unsigned short __a, __vector __bool short __b) { + __vector unsigned short __bc = (__vector unsigned short)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned short +vec_min(__vector __bool short __a, __vector unsigned short __b) { + __vector unsigned short __ac = (__vector unsigned short)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector signed int +vec_min(__vector signed int __a, __vector signed int __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_min(__vector signed int __a, __vector __bool int __b) { + __vector signed int __bc = (__vector signed int)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed int +vec_min(__vector __bool int __a, __vector signed int __b) { + __vector signed int __ac = (__vector signed int)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_min(__vector unsigned int __a, __vector unsigned int __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_min(__vector unsigned int __a, __vector __bool int __b) { + __vector unsigned int __bc = (__vector unsigned int)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned int +vec_min(__vector __bool int __a, __vector unsigned int __b) { + __vector unsigned int __ac = (__vector unsigned int)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_min(__vector signed long long __a, __vector signed long long __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_min(__vector signed long long __a, __vector __bool long long __b) { + __vector signed long long __bc = (__vector signed long long)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_min(__vector __bool long long __a, __vector signed long long __b) { + __vector signed long long __ac = (__vector signed long long)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_min(__vector unsigned long long __a, __vector unsigned long long __b) { + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_min(__vector unsigned long long __a, __vector __bool long long __b) { + __vector unsigned long long __bc = (__vector unsigned long long)__b; + return vec_sel(__a, __bc, vec_cmpgt(__a, __bc)); +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_min(__vector __bool long long __a, __vector unsigned long long __b) { + __vector unsigned long long __ac = (__vector unsigned long long)__a; + return vec_sel(__ac, __b, vec_cmpgt(__ac, __b)); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_min(__vector float __a, __vector float __b) { + return __builtin_s390_vfminsb(__a, __b, 0); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_min(__vector double __a, __vector double __b) { +#if __ARCH__ >= 12 + return __builtin_s390_vfmindb(__a, __b, 0); +#else + return vec_sel(__a, __b, vec_cmpgt(__a, __b)); +#endif +} + +/*-- vec_add_u128 -----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_add_u128(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + ((__int128)__a + (__int128)__b); +} + +/*-- vec_addc ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_addc(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vaccb(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_addc(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vacch(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_addc(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vaccf(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_addc(__vector unsigned long long __a, __vector unsigned long long __b) { + return __builtin_s390_vaccg(__a, __b); +} + +/*-- vec_addc_u128 ----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_addc_u128(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vaccq((unsigned __int128)__a, (unsigned __int128)__b); +} + +/*-- vec_adde_u128 ----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_adde_u128(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vacq((unsigned __int128)__a, (unsigned __int128)__b, + (unsigned __int128)__c); +} + +/*-- vec_addec_u128 ---------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_addec_u128(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vacccq((unsigned __int128)__a, (unsigned __int128)__b, + (unsigned __int128)__c); +} + +/*-- vec_avg ----------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_avg(__vector signed char __a, __vector signed char __b) { + return __builtin_s390_vavgb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_avg(__vector signed short __a, __vector signed short __b) { + return __builtin_s390_vavgh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_avg(__vector signed int __a, __vector signed int __b) { + return __builtin_s390_vavgf(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_avg(__vector signed long long __a, __vector signed long long __b) { + return __builtin_s390_vavgg(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_avg(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vavglb(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_avg(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vavglh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_avg(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vavglf(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_avg(__vector unsigned long long __a, __vector unsigned long long __b) { + return __builtin_s390_vavglg(__a, __b); +} + +/*-- vec_checksum -----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned int +vec_checksum(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vcksm(__a, __b); +} + +/*-- vec_gfmsum -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned short +vec_gfmsum(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vgfmb(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_gfmsum(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vgfmh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_gfmsum(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vgfmf(__a, __b); +} + +/*-- vec_gfmsum_128 ---------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_gfmsum_128(__vector unsigned long long __a, + __vector unsigned long long __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vgfmg(__a, __b); +} + +/*-- vec_gfmsum_accum -------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned short +vec_gfmsum_accum(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned short __c) { + return __builtin_s390_vgfmab(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_gfmsum_accum(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned int __c) { + return __builtin_s390_vgfmah(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_gfmsum_accum(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned long long __c) { + return __builtin_s390_vgfmaf(__a, __b, __c); +} + +/*-- vec_gfmsum_accum_128 ---------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_gfmsum_accum_128(__vector unsigned long long __a, + __vector unsigned long long __b, + __vector unsigned char __c) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vgfmag(__a, __b, (unsigned __int128)__c); +} + +/*-- vec_mladd --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_mladd(__vector signed char __a, __vector signed char __b, + __vector signed char __c) { + return __a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed char +vec_mladd(__vector unsigned char __a, __vector signed char __b, + __vector signed char __c) { + return (__vector signed char)__a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed char +vec_mladd(__vector signed char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __a * (__vector signed char)__b + (__vector signed char)__c; +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_mladd(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed short +vec_mladd(__vector signed short __a, __vector signed short __b, + __vector signed short __c) { + return __a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed short +vec_mladd(__vector unsigned short __a, __vector signed short __b, + __vector signed short __c) { + return (__vector signed short)__a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed short +vec_mladd(__vector signed short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __a * (__vector signed short)__b + (__vector signed short)__c; +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mladd(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed int +vec_mladd(__vector signed int __a, __vector signed int __b, + __vector signed int __c) { + return __a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed int +vec_mladd(__vector unsigned int __a, __vector signed int __b, + __vector signed int __c) { + return (__vector signed int)__a * __b + __c; +} + +static inline __ATTRS_o_ai __vector signed int +vec_mladd(__vector signed int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __a * (__vector signed int)__b + (__vector signed int)__c; +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mladd(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __a * __b + __c; +} + +/*-- vec_mhadd --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_mhadd(__vector signed char __a, __vector signed char __b, + __vector signed char __c) { + return __builtin_s390_vmahb(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_mhadd(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __builtin_s390_vmalhb(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector signed short +vec_mhadd(__vector signed short __a, __vector signed short __b, + __vector signed short __c) { + return __builtin_s390_vmahh(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mhadd(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __builtin_s390_vmalhh(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector signed int +vec_mhadd(__vector signed int __a, __vector signed int __b, + __vector signed int __c) { + return __builtin_s390_vmahf(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mhadd(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __builtin_s390_vmalhf(__a, __b, __c); +} + +/*-- vec_meadd --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_meadd(__vector signed char __a, __vector signed char __b, + __vector signed short __c) { + return __builtin_s390_vmaeb(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_meadd(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned short __c) { + return __builtin_s390_vmaleb(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector signed int +vec_meadd(__vector signed short __a, __vector signed short __b, + __vector signed int __c) { + return __builtin_s390_vmaeh(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_meadd(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned int __c) { + return __builtin_s390_vmaleh(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_meadd(__vector signed int __a, __vector signed int __b, + __vector signed long long __c) { + return __builtin_s390_vmaef(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_meadd(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned long long __c) { + return __builtin_s390_vmalef(__a, __b, __c); +} + +/*-- vec_moadd --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_moadd(__vector signed char __a, __vector signed char __b, + __vector signed short __c) { + return __builtin_s390_vmaob(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_moadd(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned short __c) { + return __builtin_s390_vmalob(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector signed int +vec_moadd(__vector signed short __a, __vector signed short __b, + __vector signed int __c) { + return __builtin_s390_vmaoh(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_moadd(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned int __c) { + return __builtin_s390_vmaloh(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_moadd(__vector signed int __a, __vector signed int __b, + __vector signed long long __c) { + return __builtin_s390_vmaof(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_moadd(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned long long __c) { + return __builtin_s390_vmalof(__a, __b, __c); +} + +/*-- vec_mulh ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_mulh(__vector signed char __a, __vector signed char __b) { + return __builtin_s390_vmhb(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_mulh(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vmlhb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_mulh(__vector signed short __a, __vector signed short __b) { + return __builtin_s390_vmhh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mulh(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vmlhh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_mulh(__vector signed int __a, __vector signed int __b) { + return __builtin_s390_vmhf(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mulh(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vmlhf(__a, __b); +} + +/*-- vec_mule ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_mule(__vector signed char __a, __vector signed char __b) { + return __builtin_s390_vmeb(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mule(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vmleb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_mule(__vector signed short __a, __vector signed short __b) { + return __builtin_s390_vmeh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mule(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vmleh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_mule(__vector signed int __a, __vector signed int __b) { + return __builtin_s390_vmef(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_mule(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vmlef(__a, __b); +} + +/*-- vec_mulo ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed short +vec_mulo(__vector signed char __a, __vector signed char __b) { + return __builtin_s390_vmob(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_mulo(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vmlob(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_mulo(__vector signed short __a, __vector signed short __b) { + return __builtin_s390_vmoh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_mulo(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vmloh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed long long +vec_mulo(__vector signed int __a, __vector signed int __b) { + return __builtin_s390_vmof(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_mulo(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vmlof(__a, __b); +} + +/*-- vec_msum_u128 ----------------------------------------------------------*/ + +#if __ARCH__ >= 12 +extern __ATTRS_o __vector unsigned char +vec_msum_u128(__vector unsigned long long __a, __vector unsigned long long __b, + __vector unsigned char __c, int __d) + __constant_range(__d, 0, 15); + +#define vec_msum_u128(X, Y, Z, W) \ + ((__typeof__((vec_msum_u128)((X), (Y), (Z), (W)))) \ + (unsigned __int128 __attribute__((__vector_size__(16)))) \ + __builtin_s390_vmslg((X), (Y), (unsigned __int128)(Z), (W))) +#endif + +/*-- vec_sub_u128 -----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_sub_u128(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + ((__int128)__a - (__int128)__b); +} + +/*-- vec_subc ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_subc(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vscbib(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_subc(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vscbih(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_subc(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vscbif(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_subc(__vector unsigned long long __a, __vector unsigned long long __b) { + return __builtin_s390_vscbig(__a, __b); +} + +/*-- vec_subc_u128 ----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_subc_u128(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vscbiq((unsigned __int128)__a, (unsigned __int128)__b); +} + +/*-- vec_sube_u128 ----------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_sube_u128(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vsbiq((unsigned __int128)__a, (unsigned __int128)__b, + (unsigned __int128)__c); +} + +/*-- vec_subec_u128 ---------------------------------------------------------*/ + +static inline __ATTRS_ai __vector unsigned char +vec_subec_u128(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vsbcbiq((unsigned __int128)__a, (unsigned __int128)__b, + (unsigned __int128)__c); +} + +/*-- vec_sum2 ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned long long +vec_sum2(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vsumgh(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned long long +vec_sum2(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vsumgf(__a, __b); +} + +/*-- vec_sum_u128 -----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_sum_u128(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vsumqf(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_sum_u128(__vector unsigned long long __a, __vector unsigned long long __b) { + return (__vector unsigned char) + (unsigned __int128 __attribute__((__vector_size__(16)))) + __builtin_s390_vsumqg(__a, __b); +} + +/*-- vec_sum4 ---------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned int +vec_sum4(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vsumb(__a, __b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_sum4(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vsumh(__a, __b); +} + +/*-- vec_test_mask ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai int +vec_test_mask(__vector signed char __a, __vector unsigned char __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vtm(__a, __b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector signed short __a, __vector unsigned short __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector signed int __a, __vector unsigned int __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector signed long long __a, __vector unsigned long long __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai int +vec_test_mask(__vector unsigned long long __a, + __vector unsigned long long __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai int +vec_test_mask(__vector float __a, __vector unsigned int __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} +#endif + +static inline __ATTRS_o_ai int +vec_test_mask(__vector double __a, __vector unsigned long long __b) { + return __builtin_s390_vtm((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +/*-- vec_madd ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_madd(__vector float __a, __vector float __b, __vector float __c) { + return __builtin_s390_vfmasb(__a, __b, __c); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_madd(__vector double __a, __vector double __b, __vector double __c) { + return __builtin_s390_vfmadb(__a, __b, __c); +} + +/*-- vec_msub ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_msub(__vector float __a, __vector float __b, __vector float __c) { + return __builtin_s390_vfmssb(__a, __b, __c); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_msub(__vector double __a, __vector double __b, __vector double __c) { + return __builtin_s390_vfmsdb(__a, __b, __c); +} + +/*-- vec_nmadd ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_nmadd(__vector float __a, __vector float __b, __vector float __c) { + return __builtin_s390_vfnmasb(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector double +vec_nmadd(__vector double __a, __vector double __b, __vector double __c) { + return __builtin_s390_vfnmadb(__a, __b, __c); +} +#endif + +/*-- vec_nmsub ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_nmsub(__vector float __a, __vector float __b, __vector float __c) { + return __builtin_s390_vfnmssb(__a, __b, __c); +} + +static inline __ATTRS_o_ai __vector double +vec_nmsub(__vector double __a, __vector double __b, __vector double __c) { + return __builtin_s390_vfnmsdb(__a, __b, __c); +} +#endif + +/*-- vec_sqrt ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_sqrt(__vector float __a) { + return __builtin_s390_vfsqsb(__a); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_sqrt(__vector double __a) { + return __builtin_s390_vfsqdb(__a); +} + +/*-- vec_ld2f ---------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_ai __vector double +vec_ld2f(const float *__ptr) { + typedef float __v2f32 __attribute__((__vector_size__(8))); + return __builtin_convertvector(*(const __v2f32 *)__ptr, __vector double); +} + +/*-- vec_st2f ---------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_ai void +vec_st2f(__vector double __a, float *__ptr) { + typedef float __v2f32 __attribute__((__vector_size__(8))); + *(__v2f32 *)__ptr = __builtin_convertvector(__a, __v2f32); +} + +/*-- vec_ctd ----------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_ctd(__vector signed long long __a, int __b) + __constant_range(__b, 0, 31) { + __vector double __conv = __builtin_convertvector(__a, __vector double); + __conv *= ((__vector double)(__vector unsigned long long) + ((0x3ffULL - __b) << 52)); + return __conv; +} + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector double +vec_ctd(__vector unsigned long long __a, int __b) + __constant_range(__b, 0, 31) { + __vector double __conv = __builtin_convertvector(__a, __vector double); + __conv *= ((__vector double)(__vector unsigned long long) + ((0x3ffULL - __b) << 52)); + return __conv; +} + +/*-- vec_ctsl ---------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector signed long long +vec_ctsl(__vector double __a, int __b) + __constant_range(__b, 0, 31) { + __a *= ((__vector double)(__vector unsigned long long) + ((0x3ffULL + __b) << 52)); + return __builtin_convertvector(__a, __vector signed long long); +} + +/*-- vec_ctul ---------------------------------------------------------------*/ + +// This prototype is deprecated. +static inline __ATTRS_o_ai __vector unsigned long long +vec_ctul(__vector double __a, int __b) + __constant_range(__b, 0, 31) { + __a *= ((__vector double)(__vector unsigned long long) + ((0x3ffULL + __b) << 52)); + return __builtin_convertvector(__a, __vector unsigned long long); +} + +/*-- vec_doublee ------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_ai __vector double +vec_doublee(__vector float __a) { + typedef float __v2f32 __attribute__((__vector_size__(8))); + __v2f32 __pack = __builtin_shufflevector(__a, __a, 0, 2); + return __builtin_convertvector(__pack, __vector double); +} +#endif + +/*-- vec_floate -------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_ai __vector float +vec_floate(__vector double __a) { + typedef float __v2f32 __attribute__((__vector_size__(8))); + __v2f32 __pack = __builtin_convertvector(__a, __v2f32); + return __builtin_shufflevector(__pack, __pack, 0, -1, 1, -1); +} +#endif + +/*-- vec_double -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector double +vec_double(__vector signed long long __a) { + return __builtin_convertvector(__a, __vector double); +} + +static inline __ATTRS_o_ai __vector double +vec_double(__vector unsigned long long __a) { + return __builtin_convertvector(__a, __vector double); +} + +/*-- vec_float --------------------------------------------------------------*/ + +#if __ARCH__ >= 13 + +static inline __ATTRS_o_ai __vector float +vec_float(__vector signed int __a) { + return __builtin_convertvector(__a, __vector float); +} + +static inline __ATTRS_o_ai __vector float +vec_float(__vector unsigned int __a) { + return __builtin_convertvector(__a, __vector float); +} + +#endif + +/*-- vec_signed -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed long long +vec_signed(__vector double __a) { + return __builtin_convertvector(__a, __vector signed long long); +} + +#if __ARCH__ >= 13 +static inline __ATTRS_o_ai __vector signed int +vec_signed(__vector float __a) { + return __builtin_convertvector(__a, __vector signed int); +} +#endif + +/*-- vec_unsigned -----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned long long +vec_unsigned(__vector double __a) { + return __builtin_convertvector(__a, __vector unsigned long long); +} + +#if __ARCH__ >= 13 +static inline __ATTRS_o_ai __vector unsigned int +vec_unsigned(__vector float __a) { + return __builtin_convertvector(__a, __vector unsigned int); +} +#endif + +/*-- vec_roundp -------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_roundp(__vector float __a) { + return __builtin_s390_vfisb(__a, 4, 6); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_roundp(__vector double __a) { + return __builtin_s390_vfidb(__a, 4, 6); +} + +/*-- vec_ceil ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_ceil(__vector float __a) { + // On this platform, vec_ceil never triggers the IEEE-inexact exception. + return __builtin_s390_vfisb(__a, 4, 6); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_ceil(__vector double __a) { + // On this platform, vec_ceil never triggers the IEEE-inexact exception. + return __builtin_s390_vfidb(__a, 4, 6); +} + +/*-- vec_roundm -------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_roundm(__vector float __a) { + return __builtin_s390_vfisb(__a, 4, 7); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_roundm(__vector double __a) { + return __builtin_s390_vfidb(__a, 4, 7); +} + +/*-- vec_floor --------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_floor(__vector float __a) { + // On this platform, vec_floor never triggers the IEEE-inexact exception. + return __builtin_s390_vfisb(__a, 4, 7); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_floor(__vector double __a) { + // On this platform, vec_floor never triggers the IEEE-inexact exception. + return __builtin_s390_vfidb(__a, 4, 7); +} + +/*-- vec_roundz -------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_roundz(__vector float __a) { + return __builtin_s390_vfisb(__a, 4, 5); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_roundz(__vector double __a) { + return __builtin_s390_vfidb(__a, 4, 5); +} + +/*-- vec_trunc --------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_trunc(__vector float __a) { + // On this platform, vec_trunc never triggers the IEEE-inexact exception. + return __builtin_s390_vfisb(__a, 4, 5); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_trunc(__vector double __a) { + // On this platform, vec_trunc never triggers the IEEE-inexact exception. + return __builtin_s390_vfidb(__a, 4, 5); +} + +/*-- vec_roundc -------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_roundc(__vector float __a) { + return __builtin_s390_vfisb(__a, 4, 0); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_roundc(__vector double __a) { + return __builtin_s390_vfidb(__a, 4, 0); +} + +/*-- vec_rint ---------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_rint(__vector float __a) { + // vec_rint may trigger the IEEE-inexact exception. + return __builtin_s390_vfisb(__a, 0, 0); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_rint(__vector double __a) { + // vec_rint may trigger the IEEE-inexact exception. + return __builtin_s390_vfidb(__a, 0, 0); +} + +/*-- vec_round --------------------------------------------------------------*/ + +#if __ARCH__ >= 12 +static inline __ATTRS_o_ai __vector float +vec_round(__vector float __a) { + return __builtin_s390_vfisb(__a, 4, 4); +} +#endif + +static inline __ATTRS_o_ai __vector double +vec_round(__vector double __a) { + return __builtin_s390_vfidb(__a, 4, 4); +} + +/*-- vec_fp_test_data_class -------------------------------------------------*/ + +#if __ARCH__ >= 12 +extern __ATTRS_o __vector __bool int +vec_fp_test_data_class(__vector float __a, int __b, int *__c) + __constant_range(__b, 0, 4095); + +extern __ATTRS_o __vector __bool long long +vec_fp_test_data_class(__vector double __a, int __b, int *__c) + __constant_range(__b, 0, 4095); + +#define vec_fp_test_data_class(X, Y, Z) \ + ((__typeof__((vec_fp_test_data_class)((X), (Y), (Z)))) \ + __extension__ ({ \ + __vector unsigned char __res; \ + __vector unsigned char __x = (__vector unsigned char)(X); \ + int *__z = (Z); \ + switch (sizeof ((X)[0])) { \ + case 4: __res = (__vector unsigned char) \ + __builtin_s390_vftcisb((__vector float)__x, (Y), __z); \ + break; \ + default: __res = (__vector unsigned char) \ + __builtin_s390_vftcidb((__vector double)__x, (Y), __z); \ + break; \ + } __res; })) +#else +#define vec_fp_test_data_class(X, Y, Z) \ + ((__vector __bool long long)__builtin_s390_vftcidb((X), (Y), (Z))) +#endif + +#define __VEC_CLASS_FP_ZERO_P (1 << 11) +#define __VEC_CLASS_FP_ZERO_N (1 << 10) +#define __VEC_CLASS_FP_ZERO (__VEC_CLASS_FP_ZERO_P | __VEC_CLASS_FP_ZERO_N) +#define __VEC_CLASS_FP_NORMAL_P (1 << 9) +#define __VEC_CLASS_FP_NORMAL_N (1 << 8) +#define __VEC_CLASS_FP_NORMAL (__VEC_CLASS_FP_NORMAL_P | \ + __VEC_CLASS_FP_NORMAL_N) +#define __VEC_CLASS_FP_SUBNORMAL_P (1 << 7) +#define __VEC_CLASS_FP_SUBNORMAL_N (1 << 6) +#define __VEC_CLASS_FP_SUBNORMAL (__VEC_CLASS_FP_SUBNORMAL_P | \ + __VEC_CLASS_FP_SUBNORMAL_N) +#define __VEC_CLASS_FP_INFINITY_P (1 << 5) +#define __VEC_CLASS_FP_INFINITY_N (1 << 4) +#define __VEC_CLASS_FP_INFINITY (__VEC_CLASS_FP_INFINITY_P | \ + __VEC_CLASS_FP_INFINITY_N) +#define __VEC_CLASS_FP_QNAN_P (1 << 3) +#define __VEC_CLASS_FP_QNAN_N (1 << 2) +#define __VEC_CLASS_FP_QNAN (__VEC_CLASS_FP_QNAN_P | __VEC_CLASS_FP_QNAN_N) +#define __VEC_CLASS_FP_SNAN_P (1 << 1) +#define __VEC_CLASS_FP_SNAN_N (1 << 0) +#define __VEC_CLASS_FP_SNAN (__VEC_CLASS_FP_SNAN_P | __VEC_CLASS_FP_SNAN_N) +#define __VEC_CLASS_FP_NAN (__VEC_CLASS_FP_QNAN | __VEC_CLASS_FP_SNAN) +#define __VEC_CLASS_FP_NOT_NORMAL (__VEC_CLASS_FP_NAN | \ + __VEC_CLASS_FP_SUBNORMAL | \ + __VEC_CLASS_FP_ZERO | \ + __VEC_CLASS_FP_INFINITY) + +/*-- vec_extend_to_fp32_hi --------------------------------------------------*/ + +#if __ARCH__ >= 14 +#define vec_extend_to_fp32_hi(X, W) \ + ((__vector float)__builtin_s390_vclfnhs((X), (W))); +#endif + +/*-- vec_extend_to_fp32_hi --------------------------------------------------*/ + +#if __ARCH__ >= 14 +#define vec_extend_to_fp32_lo(X, W) \ + ((__vector float)__builtin_s390_vclfnls((X), (W))); +#endif + +/*-- vec_round_from_fp32 ----------------------------------------------------*/ + +#if __ARCH__ >= 14 +#define vec_round_from_fp32(X, Y, W) \ + ((__vector unsigned short)__builtin_s390_vcrnfs((X), (Y), (W))); +#endif + +/*-- vec_convert_to_fp16 ----------------------------------------------------*/ + +#if __ARCH__ >= 14 +#define vec_convert_to_fp16(X, W) \ + ((__vector unsigned short)__builtin_s390_vcfn((X), (W))); +#endif + +/*-- vec_convert_from_fp16 --------------------------------------------------*/ + +#if __ARCH__ >= 14 +#define vec_convert_from_fp16(X, W) \ + ((__vector unsigned short)__builtin_s390_vcnf((X), (W))); +#endif + +/*-- vec_cp_until_zero ------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cp_until_zero(__vector signed char __a) { + return ((__vector signed char) + __builtin_s390_vistrb((__vector unsigned char)__a)); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cp_until_zero(__vector __bool char __a) { + return ((__vector __bool char) + __builtin_s390_vistrb((__vector unsigned char)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cp_until_zero(__vector unsigned char __a) { + return __builtin_s390_vistrb(__a); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cp_until_zero(__vector signed short __a) { + return ((__vector signed short) + __builtin_s390_vistrh((__vector unsigned short)__a)); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cp_until_zero(__vector __bool short __a) { + return ((__vector __bool short) + __builtin_s390_vistrh((__vector unsigned short)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cp_until_zero(__vector unsigned short __a) { + return __builtin_s390_vistrh(__a); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cp_until_zero(__vector signed int __a) { + return ((__vector signed int) + __builtin_s390_vistrf((__vector unsigned int)__a)); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cp_until_zero(__vector __bool int __a) { + return ((__vector __bool int) + __builtin_s390_vistrf((__vector unsigned int)__a)); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cp_until_zero(__vector unsigned int __a) { + return __builtin_s390_vistrf(__a); +} + +/*-- vec_cp_until_zero_cc ---------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cp_until_zero_cc(__vector signed char __a, int *__cc) { + return (__vector signed char) + __builtin_s390_vistrbs((__vector unsigned char)__a, __cc); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_cp_until_zero_cc(__vector __bool char __a, int *__cc) { + return (__vector __bool char) + __builtin_s390_vistrbs((__vector unsigned char)__a, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cp_until_zero_cc(__vector unsigned char __a, int *__cc) { + return __builtin_s390_vistrbs(__a, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cp_until_zero_cc(__vector signed short __a, int *__cc) { + return (__vector signed short) + __builtin_s390_vistrhs((__vector unsigned short)__a, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cp_until_zero_cc(__vector __bool short __a, int *__cc) { + return (__vector __bool short) + __builtin_s390_vistrhs((__vector unsigned short)__a, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cp_until_zero_cc(__vector unsigned short __a, int *__cc) { + return __builtin_s390_vistrhs(__a, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cp_until_zero_cc(__vector signed int __a, int *__cc) { + return (__vector signed int) + __builtin_s390_vistrfs((__vector unsigned int)__a, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cp_until_zero_cc(__vector __bool int __a, int *__cc) { + return (__vector __bool int) + __builtin_s390_vistrfs((__vector unsigned int)__a, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cp_until_zero_cc(__vector unsigned int __a, int *__cc) { + return __builtin_s390_vistrfs(__a, __cc); +} + +/*-- vec_cmpeq_idx ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpeq_idx(__vector signed char __a, __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfeeb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_idx(__vector __bool char __a, __vector __bool char __b) { + return __builtin_s390_vfeeb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_idx(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vfeeb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpeq_idx(__vector signed short __a, __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfeeh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_idx(__vector __bool short __a, __vector __bool short __b) { + return __builtin_s390_vfeeh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_idx(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vfeeh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpeq_idx(__vector signed int __a, __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfeef((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_idx(__vector __bool int __a, __vector __bool int __b) { + return __builtin_s390_vfeef((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_idx(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vfeef(__a, __b); +} + +/*-- vec_cmpeq_idx_cc -------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpeq_idx_cc(__vector signed char __a, __vector signed char __b, int *__cc) { + return (__vector signed char) + __builtin_s390_vfeebs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_idx_cc(__vector __bool char __a, __vector __bool char __b, int *__cc) { + return __builtin_s390_vfeebs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + int *__cc) { + return __builtin_s390_vfeebs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpeq_idx_cc(__vector signed short __a, __vector signed short __b, + int *__cc) { + return (__vector signed short) + __builtin_s390_vfeehs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_idx_cc(__vector __bool short __a, __vector __bool short __b, int *__cc) { + return __builtin_s390_vfeehs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return __builtin_s390_vfeehs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpeq_idx_cc(__vector signed int __a, __vector signed int __b, int *__cc) { + return (__vector signed int) + __builtin_s390_vfeefs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_idx_cc(__vector __bool int __a, __vector __bool int __b, int *__cc) { + return __builtin_s390_vfeefs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + int *__cc) { + return __builtin_s390_vfeefs(__a, __b, __cc); +} + +/*-- vec_cmpeq_or_0_idx -----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpeq_or_0_idx(__vector signed char __a, __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfeezb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_or_0_idx(__vector __bool char __a, __vector __bool char __b) { + return __builtin_s390_vfeezb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_or_0_idx(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vfeezb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpeq_or_0_idx(__vector signed short __a, __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfeezh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_or_0_idx(__vector __bool short __a, __vector __bool short __b) { + return __builtin_s390_vfeezh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_or_0_idx(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vfeezh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpeq_or_0_idx(__vector signed int __a, __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfeezf((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_or_0_idx(__vector __bool int __a, __vector __bool int __b) { + return __builtin_s390_vfeezf((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_or_0_idx(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vfeezf(__a, __b); +} + +/*-- vec_cmpeq_or_0_idx_cc --------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpeq_or_0_idx_cc(__vector signed char __a, __vector signed char __b, + int *__cc) { + return (__vector signed char) + __builtin_s390_vfeezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_or_0_idx_cc(__vector __bool char __a, __vector __bool char __b, + int *__cc) { + return __builtin_s390_vfeezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpeq_or_0_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + int *__cc) { + return __builtin_s390_vfeezbs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpeq_or_0_idx_cc(__vector signed short __a, __vector signed short __b, + int *__cc) { + return (__vector signed short) + __builtin_s390_vfeezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_or_0_idx_cc(__vector __bool short __a, __vector __bool short __b, + int *__cc) { + return __builtin_s390_vfeezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpeq_or_0_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return __builtin_s390_vfeezhs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpeq_or_0_idx_cc(__vector signed int __a, __vector signed int __b, + int *__cc) { + return (__vector signed int) + __builtin_s390_vfeezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_or_0_idx_cc(__vector __bool int __a, __vector __bool int __b, + int *__cc) { + return __builtin_s390_vfeezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpeq_or_0_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + int *__cc) { + return __builtin_s390_vfeezfs(__a, __b, __cc); +} + +/*-- vec_cmpne_idx ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpne_idx(__vector signed char __a, __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfeneb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_idx(__vector __bool char __a, __vector __bool char __b) { + return __builtin_s390_vfeneb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_idx(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vfeneb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpne_idx(__vector signed short __a, __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfeneh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_idx(__vector __bool short __a, __vector __bool short __b) { + return __builtin_s390_vfeneh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_idx(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vfeneh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpne_idx(__vector signed int __a, __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfenef((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_idx(__vector __bool int __a, __vector __bool int __b) { + return __builtin_s390_vfenef((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_idx(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vfenef(__a, __b); +} + +/*-- vec_cmpne_idx_cc -------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpne_idx_cc(__vector signed char __a, __vector signed char __b, int *__cc) { + return (__vector signed char) + __builtin_s390_vfenebs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_idx_cc(__vector __bool char __a, __vector __bool char __b, int *__cc) { + return __builtin_s390_vfenebs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + int *__cc) { + return __builtin_s390_vfenebs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpne_idx_cc(__vector signed short __a, __vector signed short __b, + int *__cc) { + return (__vector signed short) + __builtin_s390_vfenehs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_idx_cc(__vector __bool short __a, __vector __bool short __b, + int *__cc) { + return __builtin_s390_vfenehs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return __builtin_s390_vfenehs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpne_idx_cc(__vector signed int __a, __vector signed int __b, int *__cc) { + return (__vector signed int) + __builtin_s390_vfenefs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_idx_cc(__vector __bool int __a, __vector __bool int __b, int *__cc) { + return __builtin_s390_vfenefs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + int *__cc) { + return __builtin_s390_vfenefs(__a, __b, __cc); +} + +/*-- vec_cmpne_or_0_idx -----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpne_or_0_idx(__vector signed char __a, __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfenezb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_or_0_idx(__vector __bool char __a, __vector __bool char __b) { + return __builtin_s390_vfenezb((__vector unsigned char)__a, + (__vector unsigned char)__b); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_or_0_idx(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vfenezb(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpne_or_0_idx(__vector signed short __a, __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfenezh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_or_0_idx(__vector __bool short __a, __vector __bool short __b) { + return __builtin_s390_vfenezh((__vector unsigned short)__a, + (__vector unsigned short)__b); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_or_0_idx(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vfenezh(__a, __b); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpne_or_0_idx(__vector signed int __a, __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfenezf((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_or_0_idx(__vector __bool int __a, __vector __bool int __b) { + return __builtin_s390_vfenezf((__vector unsigned int)__a, + (__vector unsigned int)__b); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_or_0_idx(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vfenezf(__a, __b); +} + +/*-- vec_cmpne_or_0_idx_cc --------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_cmpne_or_0_idx_cc(__vector signed char __a, __vector signed char __b, + int *__cc) { + return (__vector signed char) + __builtin_s390_vfenezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_or_0_idx_cc(__vector __bool char __a, __vector __bool char __b, + int *__cc) { + return __builtin_s390_vfenezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpne_or_0_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + int *__cc) { + return __builtin_s390_vfenezbs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_cmpne_or_0_idx_cc(__vector signed short __a, __vector signed short __b, + int *__cc) { + return (__vector signed short) + __builtin_s390_vfenezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_or_0_idx_cc(__vector __bool short __a, __vector __bool short __b, + int *__cc) { + return __builtin_s390_vfenezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpne_or_0_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return __builtin_s390_vfenezhs(__a, __b, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_cmpne_or_0_idx_cc(__vector signed int __a, __vector signed int __b, + int *__cc) { + return (__vector signed int) + __builtin_s390_vfenezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_or_0_idx_cc(__vector __bool int __a, __vector __bool int __b, + int *__cc) { + return __builtin_s390_vfenezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpne_or_0_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + int *__cc) { + return __builtin_s390_vfenezfs(__a, __b, __cc); +} + +/*-- vec_cmprg --------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmprg(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector __bool char)__builtin_s390_vstrcb(__a, __b, __c, 4); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmprg(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return (__vector __bool short)__builtin_s390_vstrch(__a, __b, __c, 4); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmprg(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return (__vector __bool int)__builtin_s390_vstrcf(__a, __b, __c, 4); +} + +/*-- vec_cmprg_cc -----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmprg_cc(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return (__vector __bool char)__builtin_s390_vstrcbs(__a, __b, __c, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmprg_cc(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c, int *__cc) { + return (__vector __bool short)__builtin_s390_vstrchs(__a, __b, __c, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmprg_cc(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c, int *__cc) { + return (__vector __bool int)__builtin_s390_vstrcfs(__a, __b, __c, 4, __cc); +} + +/*-- vec_cmprg_idx ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmprg_idx(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __builtin_s390_vstrcb(__a, __b, __c, 0); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmprg_idx(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __builtin_s390_vstrch(__a, __b, __c, 0); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmprg_idx(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __builtin_s390_vstrcf(__a, __b, __c, 0); +} + +/*-- vec_cmprg_idx_cc -------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmprg_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrcbs(__a, __b, __c, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmprg_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c, int *__cc) { + return __builtin_s390_vstrchs(__a, __b, __c, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmprg_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c, int *__cc) { + return __builtin_s390_vstrcfs(__a, __b, __c, 0, __cc); +} + +/*-- vec_cmprg_or_0_idx -----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmprg_or_0_idx(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __builtin_s390_vstrczb(__a, __b, __c, 0); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmprg_or_0_idx(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __builtin_s390_vstrczh(__a, __b, __c, 0); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmprg_or_0_idx(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __builtin_s390_vstrczf(__a, __b, __c, 0); +} + +/*-- vec_cmprg_or_0_idx_cc --------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmprg_or_0_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrczbs(__a, __b, __c, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmprg_or_0_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c, int *__cc) { + return __builtin_s390_vstrczhs(__a, __b, __c, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmprg_or_0_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c, int *__cc) { + return __builtin_s390_vstrczfs(__a, __b, __c, 0, __cc); +} + +/*-- vec_cmpnrg -------------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpnrg(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return (__vector __bool char)__builtin_s390_vstrcb(__a, __b, __c, 12); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpnrg(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return (__vector __bool short)__builtin_s390_vstrch(__a, __b, __c, 12); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpnrg(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return (__vector __bool int)__builtin_s390_vstrcf(__a, __b, __c, 12); +} + +/*-- vec_cmpnrg_cc ----------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_cmpnrg_cc(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return (__vector __bool char) + __builtin_s390_vstrcbs(__a, __b, __c, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_cmpnrg_cc(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c, int *__cc) { + return (__vector __bool short) + __builtin_s390_vstrchs(__a, __b, __c, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_cmpnrg_cc(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c, int *__cc) { + return (__vector __bool int) + __builtin_s390_vstrcfs(__a, __b, __c, 12, __cc); +} + +/*-- vec_cmpnrg_idx ---------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpnrg_idx(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __builtin_s390_vstrcb(__a, __b, __c, 8); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpnrg_idx(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __builtin_s390_vstrch(__a, __b, __c, 8); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpnrg_idx(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __builtin_s390_vstrcf(__a, __b, __c, 8); +} + +/*-- vec_cmpnrg_idx_cc ------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpnrg_idx_cc(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrcbs(__a, __b, __c, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpnrg_idx_cc(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c, int *__cc) { + return __builtin_s390_vstrchs(__a, __b, __c, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpnrg_idx_cc(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c, int *__cc) { + return __builtin_s390_vstrcfs(__a, __b, __c, 8, __cc); +} + +/*-- vec_cmpnrg_or_0_idx ----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpnrg_or_0_idx(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c) { + return __builtin_s390_vstrczb(__a, __b, __c, 8); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpnrg_or_0_idx(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned short __c) { + return __builtin_s390_vstrczh(__a, __b, __c, 8); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpnrg_or_0_idx(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned int __c) { + return __builtin_s390_vstrczf(__a, __b, __c, 8); +} + +/*-- vec_cmpnrg_or_0_idx_cc -------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector unsigned char +vec_cmpnrg_or_0_idx_cc(__vector unsigned char __a, + __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrczbs(__a, __b, __c, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_cmpnrg_or_0_idx_cc(__vector unsigned short __a, + __vector unsigned short __b, + __vector unsigned short __c, int *__cc) { + return __builtin_s390_vstrczhs(__a, __b, __c, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_cmpnrg_or_0_idx_cc(__vector unsigned int __a, + __vector unsigned int __b, + __vector unsigned int __c, int *__cc) { + return __builtin_s390_vstrczfs(__a, __b, __c, 8, __cc); +} + +/*-- vec_find_any_eq --------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_eq(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char) + __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 4); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_eq(__vector __bool char __a, __vector __bool char __b) { + return (__vector __bool char) + __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 4); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_eq(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)__builtin_s390_vfaeb(__a, __b, 4); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_eq(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short) + __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 4); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_eq(__vector __bool short __a, __vector __bool short __b) { + return (__vector __bool short) + __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 4); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_eq(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)__builtin_s390_vfaeh(__a, __b, 4); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_eq(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int) + __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 4); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_eq(__vector __bool int __a, __vector __bool int __b) { + return (__vector __bool int) + __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 4); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_eq(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)__builtin_s390_vfaef(__a, __b, 4); +} + +/*-- vec_find_any_eq_cc -----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_eq_cc(__vector signed char __a, __vector signed char __b, + int *__cc) { + return (__vector __bool char) + __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_eq_cc(__vector __bool char __a, __vector __bool char __b, + int *__cc) { + return (__vector __bool char) + __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_eq_cc(__vector unsigned char __a, __vector unsigned char __b, + int *__cc) { + return (__vector __bool char)__builtin_s390_vfaebs(__a, __b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_eq_cc(__vector signed short __a, __vector signed short __b, + int *__cc) { + return (__vector __bool short) + __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_eq_cc(__vector __bool short __a, __vector __bool short __b, + int *__cc) { + return (__vector __bool short) + __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_eq_cc(__vector unsigned short __a, __vector unsigned short __b, + int *__cc) { + return (__vector __bool short)__builtin_s390_vfaehs(__a, __b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_eq_cc(__vector signed int __a, __vector signed int __b, + int *__cc) { + return (__vector __bool int) + __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_eq_cc(__vector __bool int __a, __vector __bool int __b, + int *__cc) { + return (__vector __bool int) + __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 4, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_eq_cc(__vector unsigned int __a, __vector unsigned int __b, + int *__cc) { + return (__vector __bool int)__builtin_s390_vfaefs(__a, __b, 4, __cc); +} + +/*-- vec_find_any_eq_idx ----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_eq_idx(__vector signed char __a, __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_idx(__vector __bool char __a, __vector __bool char __b) { + return __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_idx(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vfaeb(__a, __b, 0); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_eq_idx(__vector signed short __a, __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_idx(__vector __bool short __a, __vector __bool short __b) { + return __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_idx(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vfaeh(__a, __b, 0); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_eq_idx(__vector signed int __a, __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_idx(__vector __bool int __a, __vector __bool int __b) { + return __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_idx(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vfaef(__a, __b, 0); +} + +/*-- vec_find_any_eq_idx_cc -------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_eq_idx_cc(__vector signed char __a, + __vector signed char __b, int *__cc) { + return (__vector signed char) + __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_idx_cc(__vector __bool char __a, + __vector __bool char __b, int *__cc) { + return __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_idx_cc(__vector unsigned char __a, + __vector unsigned char __b, int *__cc) { + return __builtin_s390_vfaebs(__a, __b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_eq_idx_cc(__vector signed short __a, + __vector signed short __b, int *__cc) { + return (__vector signed short) + __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_idx_cc(__vector __bool short __a, + __vector __bool short __b, int *__cc) { + return __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_idx_cc(__vector unsigned short __a, + __vector unsigned short __b, int *__cc) { + return __builtin_s390_vfaehs(__a, __b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_eq_idx_cc(__vector signed int __a, + __vector signed int __b, int *__cc) { + return (__vector signed int) + __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_idx_cc(__vector __bool int __a, + __vector __bool int __b, int *__cc) { + return __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_idx_cc(__vector unsigned int __a, + __vector unsigned int __b, int *__cc) { + return __builtin_s390_vfaefs(__a, __b, 0, __cc); +} + +/*-- vec_find_any_eq_or_0_idx -----------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_eq_or_0_idx(__vector signed char __a, + __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfaezb((__vector unsigned char)__a, + (__vector unsigned char)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_or_0_idx(__vector __bool char __a, + __vector __bool char __b) { + return __builtin_s390_vfaezb((__vector unsigned char)__a, + (__vector unsigned char)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_or_0_idx(__vector unsigned char __a, + __vector unsigned char __b) { + return __builtin_s390_vfaezb(__a, __b, 0); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_eq_or_0_idx(__vector signed short __a, + __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfaezh((__vector unsigned short)__a, + (__vector unsigned short)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_or_0_idx(__vector __bool short __a, + __vector __bool short __b) { + return __builtin_s390_vfaezh((__vector unsigned short)__a, + (__vector unsigned short)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_or_0_idx(__vector unsigned short __a, + __vector unsigned short __b) { + return __builtin_s390_vfaezh(__a, __b, 0); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_eq_or_0_idx(__vector signed int __a, + __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfaezf((__vector unsigned int)__a, + (__vector unsigned int)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_or_0_idx(__vector __bool int __a, + __vector __bool int __b) { + return __builtin_s390_vfaezf((__vector unsigned int)__a, + (__vector unsigned int)__b, 0); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_or_0_idx(__vector unsigned int __a, + __vector unsigned int __b) { + return __builtin_s390_vfaezf(__a, __b, 0); +} + +/*-- vec_find_any_eq_or_0_idx_cc --------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_eq_or_0_idx_cc(__vector signed char __a, + __vector signed char __b, int *__cc) { + return (__vector signed char) + __builtin_s390_vfaezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_or_0_idx_cc(__vector __bool char __a, + __vector __bool char __b, int *__cc) { + return __builtin_s390_vfaezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_eq_or_0_idx_cc(__vector unsigned char __a, + __vector unsigned char __b, int *__cc) { + return __builtin_s390_vfaezbs(__a, __b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_eq_or_0_idx_cc(__vector signed short __a, + __vector signed short __b, int *__cc) { + return (__vector signed short) + __builtin_s390_vfaezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_or_0_idx_cc(__vector __bool short __a, + __vector __bool short __b, int *__cc) { + return __builtin_s390_vfaezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_eq_or_0_idx_cc(__vector unsigned short __a, + __vector unsigned short __b, int *__cc) { + return __builtin_s390_vfaezhs(__a, __b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_eq_or_0_idx_cc(__vector signed int __a, + __vector signed int __b, int *__cc) { + return (__vector signed int) + __builtin_s390_vfaezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_or_0_idx_cc(__vector __bool int __a, + __vector __bool int __b, int *__cc) { + return __builtin_s390_vfaezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, 0, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_eq_or_0_idx_cc(__vector unsigned int __a, + __vector unsigned int __b, int *__cc) { + return __builtin_s390_vfaezfs(__a, __b, 0, __cc); +} + +/*-- vec_find_any_ne --------------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_ne(__vector signed char __a, __vector signed char __b) { + return (__vector __bool char) + __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 12); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_ne(__vector __bool char __a, __vector __bool char __b) { + return (__vector __bool char) + __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 12); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_ne(__vector unsigned char __a, __vector unsigned char __b) { + return (__vector __bool char)__builtin_s390_vfaeb(__a, __b, 12); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_ne(__vector signed short __a, __vector signed short __b) { + return (__vector __bool short) + __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 12); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_ne(__vector __bool short __a, __vector __bool short __b) { + return (__vector __bool short) + __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 12); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_ne(__vector unsigned short __a, __vector unsigned short __b) { + return (__vector __bool short)__builtin_s390_vfaeh(__a, __b, 12); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_ne(__vector signed int __a, __vector signed int __b) { + return (__vector __bool int) + __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 12); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_ne(__vector __bool int __a, __vector __bool int __b) { + return (__vector __bool int) + __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 12); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_ne(__vector unsigned int __a, __vector unsigned int __b) { + return (__vector __bool int)__builtin_s390_vfaef(__a, __b, 12); +} + +/*-- vec_find_any_ne_cc -----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_ne_cc(__vector signed char __a, + __vector signed char __b, int *__cc) { + return (__vector __bool char) + __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_ne_cc(__vector __bool char __a, + __vector __bool char __b, int *__cc) { + return (__vector __bool char) + __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool char +vec_find_any_ne_cc(__vector unsigned char __a, + __vector unsigned char __b, int *__cc) { + return (__vector __bool char)__builtin_s390_vfaebs(__a, __b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_ne_cc(__vector signed short __a, + __vector signed short __b, int *__cc) { + return (__vector __bool short) + __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_ne_cc(__vector __bool short __a, + __vector __bool short __b, int *__cc) { + return (__vector __bool short) + __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool short +vec_find_any_ne_cc(__vector unsigned short __a, + __vector unsigned short __b, int *__cc) { + return (__vector __bool short)__builtin_s390_vfaehs(__a, __b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_ne_cc(__vector signed int __a, + __vector signed int __b, int *__cc) { + return (__vector __bool int) + __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_ne_cc(__vector __bool int __a, + __vector __bool int __b, int *__cc) { + return (__vector __bool int) + __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 12, __cc); +} + +static inline __ATTRS_o_ai __vector __bool int +vec_find_any_ne_cc(__vector unsigned int __a, + __vector unsigned int __b, int *__cc) { + return (__vector __bool int)__builtin_s390_vfaefs(__a, __b, 12, __cc); +} + +/*-- vec_find_any_ne_idx ----------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_ne_idx(__vector signed char __a, __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_idx(__vector __bool char __a, __vector __bool char __b) { + return __builtin_s390_vfaeb((__vector unsigned char)__a, + (__vector unsigned char)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_idx(__vector unsigned char __a, __vector unsigned char __b) { + return __builtin_s390_vfaeb(__a, __b, 8); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_ne_idx(__vector signed short __a, __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_idx(__vector __bool short __a, __vector __bool short __b) { + return __builtin_s390_vfaeh((__vector unsigned short)__a, + (__vector unsigned short)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_idx(__vector unsigned short __a, __vector unsigned short __b) { + return __builtin_s390_vfaeh(__a, __b, 8); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_ne_idx(__vector signed int __a, __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_idx(__vector __bool int __a, __vector __bool int __b) { + return __builtin_s390_vfaef((__vector unsigned int)__a, + (__vector unsigned int)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_idx(__vector unsigned int __a, __vector unsigned int __b) { + return __builtin_s390_vfaef(__a, __b, 8); +} + +/*-- vec_find_any_ne_idx_cc -------------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_ne_idx_cc(__vector signed char __a, + __vector signed char __b, int *__cc) { + return (__vector signed char) + __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_idx_cc(__vector __bool char __a, + __vector __bool char __b, int *__cc) { + return __builtin_s390_vfaebs((__vector unsigned char)__a, + (__vector unsigned char)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_idx_cc(__vector unsigned char __a, + __vector unsigned char __b, + int *__cc) { + return __builtin_s390_vfaebs(__a, __b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_ne_idx_cc(__vector signed short __a, + __vector signed short __b, int *__cc) { + return (__vector signed short) + __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_idx_cc(__vector __bool short __a, + __vector __bool short __b, int *__cc) { + return __builtin_s390_vfaehs((__vector unsigned short)__a, + (__vector unsigned short)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_idx_cc(__vector unsigned short __a, + __vector unsigned short __b, int *__cc) { + return __builtin_s390_vfaehs(__a, __b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_ne_idx_cc(__vector signed int __a, + __vector signed int __b, int *__cc) { + return (__vector signed int) + __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_idx_cc(__vector __bool int __a, + __vector __bool int __b, int *__cc) { + return __builtin_s390_vfaefs((__vector unsigned int)__a, + (__vector unsigned int)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_idx_cc(__vector unsigned int __a, + __vector unsigned int __b, int *__cc) { + return __builtin_s390_vfaefs(__a, __b, 8, __cc); +} + +/*-- vec_find_any_ne_or_0_idx -----------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_ne_or_0_idx(__vector signed char __a, + __vector signed char __b) { + return (__vector signed char) + __builtin_s390_vfaezb((__vector unsigned char)__a, + (__vector unsigned char)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_or_0_idx(__vector __bool char __a, + __vector __bool char __b) { + return __builtin_s390_vfaezb((__vector unsigned char)__a, + (__vector unsigned char)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_or_0_idx(__vector unsigned char __a, + __vector unsigned char __b) { + return __builtin_s390_vfaezb(__a, __b, 8); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_ne_or_0_idx(__vector signed short __a, + __vector signed short __b) { + return (__vector signed short) + __builtin_s390_vfaezh((__vector unsigned short)__a, + (__vector unsigned short)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_or_0_idx(__vector __bool short __a, + __vector __bool short __b) { + return __builtin_s390_vfaezh((__vector unsigned short)__a, + (__vector unsigned short)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_or_0_idx(__vector unsigned short __a, + __vector unsigned short __b) { + return __builtin_s390_vfaezh(__a, __b, 8); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_ne_or_0_idx(__vector signed int __a, + __vector signed int __b) { + return (__vector signed int) + __builtin_s390_vfaezf((__vector unsigned int)__a, + (__vector unsigned int)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_or_0_idx(__vector __bool int __a, + __vector __bool int __b) { + return __builtin_s390_vfaezf((__vector unsigned int)__a, + (__vector unsigned int)__b, 8); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_or_0_idx(__vector unsigned int __a, + __vector unsigned int __b) { + return __builtin_s390_vfaezf(__a, __b, 8); +} + +/*-- vec_find_any_ne_or_0_idx_cc --------------------------------------------*/ + +static inline __ATTRS_o_ai __vector signed char +vec_find_any_ne_or_0_idx_cc(__vector signed char __a, + __vector signed char __b, int *__cc) { + return (__vector signed char) + __builtin_s390_vfaezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_or_0_idx_cc(__vector __bool char __a, + __vector __bool char __b, int *__cc) { + return __builtin_s390_vfaezbs((__vector unsigned char)__a, + (__vector unsigned char)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_find_any_ne_or_0_idx_cc(__vector unsigned char __a, + __vector unsigned char __b, int *__cc) { + return __builtin_s390_vfaezbs(__a, __b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector signed short +vec_find_any_ne_or_0_idx_cc(__vector signed short __a, + __vector signed short __b, int *__cc) { + return (__vector signed short) + __builtin_s390_vfaezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_or_0_idx_cc(__vector __bool short __a, + __vector __bool short __b, int *__cc) { + return __builtin_s390_vfaezhs((__vector unsigned short)__a, + (__vector unsigned short)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned short +vec_find_any_ne_or_0_idx_cc(__vector unsigned short __a, + __vector unsigned short __b, int *__cc) { + return __builtin_s390_vfaezhs(__a, __b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector signed int +vec_find_any_ne_or_0_idx_cc(__vector signed int __a, + __vector signed int __b, int *__cc) { + return (__vector signed int) + __builtin_s390_vfaezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_or_0_idx_cc(__vector __bool int __a, + __vector __bool int __b, int *__cc) { + return __builtin_s390_vfaezfs((__vector unsigned int)__a, + (__vector unsigned int)__b, 8, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned int +vec_find_any_ne_or_0_idx_cc(__vector unsigned int __a, + __vector unsigned int __b, int *__cc) { + return __builtin_s390_vfaezfs(__a, __b, 8, __cc); +} + +/*-- vec_search_string_cc ---------------------------------------------------*/ + +#if __ARCH__ >= 13 + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector signed char __a, __vector signed char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsb((__vector unsigned char)__a, + (__vector unsigned char)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector __bool char __a, __vector __bool char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsb((__vector unsigned char)__a, + (__vector unsigned char)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector unsigned char __a, __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsb(__a, __b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector signed short __a, __vector signed short __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsh((__vector unsigned short)__a, + (__vector unsigned short)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector __bool short __a, __vector __bool short __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsh((__vector unsigned short)__a, + (__vector unsigned short)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector unsigned short __a, __vector unsigned short __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsh(__a, __b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector signed int __a, __vector signed int __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsf((__vector unsigned int)__a, + (__vector unsigned int)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector __bool int __a, __vector __bool int __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsf((__vector unsigned int)__a, + (__vector unsigned int)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_cc(__vector unsigned int __a, __vector unsigned int __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrsf(__a, __b, __c, __cc); +} + +#endif + +/*-- vec_search_string_until_zero_cc ----------------------------------------*/ + +#if __ARCH__ >= 13 + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector signed char __a, + __vector signed char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszb((__vector unsigned char)__a, + (__vector unsigned char)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector __bool char __a, + __vector __bool char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszb((__vector unsigned char)__a, + (__vector unsigned char)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector unsigned char __a, + __vector unsigned char __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszb(__a, __b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector signed short __a, + __vector signed short __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszh((__vector unsigned short)__a, + (__vector unsigned short)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector __bool short __a, + __vector __bool short __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszh((__vector unsigned short)__a, + (__vector unsigned short)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector unsigned short __a, + __vector unsigned short __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszh(__a, __b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector signed int __a, + __vector signed int __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszf((__vector unsigned int)__a, + (__vector unsigned int)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector __bool int __a, + __vector __bool int __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszf((__vector unsigned int)__a, + (__vector unsigned int)__b, __c, __cc); +} + +static inline __ATTRS_o_ai __vector unsigned char +vec_search_string_until_zero_cc(__vector unsigned int __a, + __vector unsigned int __b, + __vector unsigned char __c, int *__cc) { + return __builtin_s390_vstrszf(__a, __b, __c, __cc); +} + +#endif + +#undef __constant_pow2_range +#undef __constant_range +#undef __constant +#undef __ATTRS_o +#undef __ATTRS_o_ai +#undef __ATTRS_ai + +#else + +#error "Use -fzvector to enable vector extensions" + +#endif diff --git a/llvm/lib/clang/19/include/velintrin.h b/llvm/lib/clang/19/include/velintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..3f2bc00442e7bfc434453aa0cf86905eec149fdb --- /dev/null +++ b/llvm/lib/clang/19/include/velintrin.h @@ -0,0 +1,71 @@ +/*===---- velintrin.h - VEL intrinsics for VE ------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __VEL_INTRIN_H__ +#define __VEL_INTRIN_H__ + +// Vector registers +typedef double __vr __attribute__((__vector_size__(2048))); + +// Vector mask registers +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L +// For C99 +typedef _Bool __vm __attribute__((ext_vector_type(256))); +typedef _Bool __vm256 __attribute__((ext_vector_type(256))); +typedef _Bool __vm512 __attribute__((ext_vector_type(512))); +#else +#ifdef __cplusplus +// For C++ +typedef bool __vm __attribute__((ext_vector_type(256))); +typedef bool __vm256 __attribute__((ext_vector_type(256))); +typedef bool __vm512 __attribute__((ext_vector_type(512))); +#else +#error need C++ or C99 to use vector intrinsics for VE +#endif +#endif + +enum VShuffleCodes { + VE_VSHUFFLE_YUYU = 0, + VE_VSHUFFLE_YUYL = 1, + VE_VSHUFFLE_YUZU = 2, + VE_VSHUFFLE_YUZL = 3, + VE_VSHUFFLE_YLYU = 4, + VE_VSHUFFLE_YLYL = 5, + VE_VSHUFFLE_YLZU = 6, + VE_VSHUFFLE_YLZL = 7, + VE_VSHUFFLE_ZUYU = 8, + VE_VSHUFFLE_ZUYL = 9, + VE_VSHUFFLE_ZUZU = 10, + VE_VSHUFFLE_ZUZL = 11, + VE_VSHUFFLE_ZLYU = 12, + VE_VSHUFFLE_ZLYL = 13, + VE_VSHUFFLE_ZLZU = 14, + VE_VSHUFFLE_ZLZL = 15, +}; + +// Use generated intrinsic name definitions +#include + +// Use helper functions +#include + +// pack + +#define _vel_pack_f32p __builtin_ve_vl_pack_f32p +#define _vel_pack_f32a __builtin_ve_vl_pack_f32a + +static inline unsigned long int _vel_pack_i32(unsigned int a, unsigned int b) { + return (((unsigned long int)a) << 32) | b; +} + +#define _vel_extract_vm512u(vm) __builtin_ve_vl_extract_vm512u(vm) +#define _vel_extract_vm512l(vm) __builtin_ve_vl_extract_vm512l(vm) +#define _vel_insert_vm512u(vm512, vm) __builtin_ve_vl_insert_vm512u(vm512, vm) +#define _vel_insert_vm512l(vm512, vm) __builtin_ve_vl_insert_vm512l(vm512, vm) + +#endif diff --git a/llvm/lib/clang/19/include/velintrin_approx.h b/llvm/lib/clang/19/include/velintrin_approx.h new file mode 100644 index 0000000000000000000000000000000000000000..89d270fef3c7d340e227498bbbcbc6613a5dd2b8 --- /dev/null +++ b/llvm/lib/clang/19/include/velintrin_approx.h @@ -0,0 +1,120 @@ +/*===---- velintrin_approx.h - VEL intrinsics helper for VE ----------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __VEL_INTRIN_APPROX_H__ +#define __VEL_INTRIN_APPROX_H__ + +static inline __vr _vel_approx_vfdivs_vvvl(__vr v0, __vr v1, int l) { + float s0; + __vr v2, v3, v4, v5; + v5 = _vel_vrcps_vvl(v1, l); + s0 = 1.0; + v4 = _vel_vfnmsbs_vsvvl(s0, v1, v5, l); + v3 = _vel_vfmads_vvvvl(v5, v5, v4, l); + v2 = _vel_vfmuls_vvvl(v0, v3, l); + v4 = _vel_vfnmsbs_vvvvl(v0, v2, v1, l); + v2 = _vel_vfmads_vvvvl(v2, v5, v4, l); + v0 = _vel_vfnmsbs_vvvvl(v0, v2, v1, l); + v0 = _vel_vfmads_vvvvl(v2, v3, v0, l); + return v0; +} + +static inline __vr _vel_approx_pvfdiv_vvvl(__vr v0, __vr v1, int l) { + float s0; + __vr v2, v3, v4, v5; + v5 = _vel_pvrcp_vvl(v1, l); + s0 = 1.0; + v4 = _vel_pvfnmsb_vsvvl(s0, v1, v5, l); + v3 = _vel_pvfmad_vvvvl(v5, v5, v4, l); + v2 = _vel_pvfmul_vvvl(v0, v3, l); + v4 = _vel_pvfnmsb_vvvvl(v0, v2, v1, l); + v2 = _vel_pvfmad_vvvvl(v2, v5, v4, l); + v0 = _vel_pvfnmsb_vvvvl(v0, v2, v1, l); + v0 = _vel_pvfmad_vvvvl(v2, v3, v0, l); + return v0; +} + +static inline __vr _vel_approx_vfdivs_vsvl(float s0, __vr v0, int l) { + float s1; + __vr v1, v2, v3, v4; + v4 = _vel_vrcps_vvl(v0, l); + s1 = 1.0; + v2 = _vel_vfnmsbs_vsvvl(s1, v0, v4, l); + v2 = _vel_vfmads_vvvvl(v4, v4, v2, l); + v1 = _vel_vfmuls_vsvl(s0, v2, l); + v3 = _vel_vfnmsbs_vsvvl(s0, v1, v0, l); + v1 = _vel_vfmads_vvvvl(v1, v4, v3, l); + v3 = _vel_vfnmsbs_vsvvl(s0, v1, v0, l); + v0 = _vel_vfmads_vvvvl(v1, v2, v3, l); + return v0; +} + +static inline __vr _vel_approx_vfdivs_vvsl(__vr v0, float s0, int l) { + float s1; + __vr v1, v2; + s1 = 1.0f / s0; + v1 = _vel_vfmuls_vsvl(s1, v0, l); + v2 = _vel_vfnmsbs_vvsvl(v0, s0, v1, l); + v0 = _vel_vfmads_vvsvl(v1, s1, v2, l); + return v0; +} + +static inline __vr _vel_approx_vfdivd_vsvl(double s0, __vr v0, int l) { + __vr v1, v2, v3; + v2 = _vel_vrcpd_vvl(v0, l); + double s1 = 1.0; + v3 = _vel_vfnmsbd_vsvvl(s1, v0, v2, l); + v2 = _vel_vfmadd_vvvvl(v2, v2, v3, l); + v1 = _vel_vfnmsbd_vsvvl(s1, v0, v2, l); + v1 = _vel_vfmadd_vvvvl(v2, v2, v1, l); + v1 = _vel_vaddul_vsvl(1, v1, l); + v3 = _vel_vfnmsbd_vsvvl(s1, v0, v1, l); + v3 = _vel_vfmadd_vvvvl(v1, v1, v3, l); + v1 = _vel_vfmuld_vsvl(s0, v3, l); + v0 = _vel_vfnmsbd_vsvvl(s0, v1, v0, l); + v0 = _vel_vfmadd_vvvvl(v1, v3, v0, l); + return v0; +} + +static inline __vr _vel_approx_vfsqrtd_vvl(__vr v0, int l) { + double s0, s1; + __vr v1, v2, v3; + v2 = _vel_vrsqrtdnex_vvl(v0, l); + v1 = _vel_vfmuld_vvvl(v0, v2, l); + s0 = 1.0; + s1 = 0.5; + v3 = _vel_vfnmsbd_vsvvl(s0, v1, v2, l); + v3 = _vel_vfmuld_vsvl(s1, v3, l); + v2 = _vel_vfmadd_vvvvl(v2, v2, v3, l); + v1 = _vel_vfmuld_vvvl(v0, v2, l); + v3 = _vel_vfnmsbd_vsvvl(s0, v1, v2, l); + v3 = _vel_vfmuld_vsvl(s1, v3, l); + v0 = _vel_vfmadd_vvvvl(v1, v1, v3, l); + return v0; +} + +static inline __vr _vel_approx_vfsqrts_vvl(__vr v0, int l) { + float s0, s1; + __vr v1, v2, v3; + v0 = _vel_vcvtds_vvl(v0, l); + v2 = _vel_vrsqrtdnex_vvl(v0, l); + v1 = _vel_vfmuld_vvvl(v0, v2, l); + s0 = 1.0; + s1 = 0.5; + v3 = _vel_vfnmsbd_vsvvl(s0, v1, v2, l); + v3 = _vel_vfmuld_vsvl(s1, v3, l); + v2 = _vel_vfmadd_vvvvl(v2, v2, v3, l); + v1 = _vel_vfmuld_vvvl(v0, v2, l); + v3 = _vel_vfnmsbd_vsvvl(s0, v1, v2, l); + v3 = _vel_vfmuld_vsvl(s1, v3, l); + v0 = _vel_vfmadd_vvvvl(v1, v1, v3, l); + v0 = _vel_vcvtsd_vvl(v0, l); + return v0; +} + +#endif diff --git a/llvm/lib/clang/19/include/velintrin_gen.h b/llvm/lib/clang/19/include/velintrin_gen.h new file mode 100644 index 0000000000000000000000000000000000000000..845c0da2ffa22a6fad40e4fb69638f71953e5633 --- /dev/null +++ b/llvm/lib/clang/19/include/velintrin_gen.h @@ -0,0 +1,1257 @@ +#define _vel_vld_vssl __builtin_ve_vl_vld_vssl +#define _vel_vld_vssvl __builtin_ve_vl_vld_vssvl +#define _vel_vldnc_vssl __builtin_ve_vl_vldnc_vssl +#define _vel_vldnc_vssvl __builtin_ve_vl_vldnc_vssvl +#define _vel_vldu_vssl __builtin_ve_vl_vldu_vssl +#define _vel_vldu_vssvl __builtin_ve_vl_vldu_vssvl +#define _vel_vldunc_vssl __builtin_ve_vl_vldunc_vssl +#define _vel_vldunc_vssvl __builtin_ve_vl_vldunc_vssvl +#define _vel_vldlsx_vssl __builtin_ve_vl_vldlsx_vssl +#define _vel_vldlsx_vssvl __builtin_ve_vl_vldlsx_vssvl +#define _vel_vldlsxnc_vssl __builtin_ve_vl_vldlsxnc_vssl +#define _vel_vldlsxnc_vssvl __builtin_ve_vl_vldlsxnc_vssvl +#define _vel_vldlzx_vssl __builtin_ve_vl_vldlzx_vssl +#define _vel_vldlzx_vssvl __builtin_ve_vl_vldlzx_vssvl +#define _vel_vldlzxnc_vssl __builtin_ve_vl_vldlzxnc_vssl +#define _vel_vldlzxnc_vssvl __builtin_ve_vl_vldlzxnc_vssvl +#define _vel_vld2d_vssl __builtin_ve_vl_vld2d_vssl +#define _vel_vld2d_vssvl __builtin_ve_vl_vld2d_vssvl +#define _vel_vld2dnc_vssl __builtin_ve_vl_vld2dnc_vssl +#define _vel_vld2dnc_vssvl __builtin_ve_vl_vld2dnc_vssvl +#define _vel_vldu2d_vssl __builtin_ve_vl_vldu2d_vssl +#define _vel_vldu2d_vssvl __builtin_ve_vl_vldu2d_vssvl +#define _vel_vldu2dnc_vssl __builtin_ve_vl_vldu2dnc_vssl +#define _vel_vldu2dnc_vssvl __builtin_ve_vl_vldu2dnc_vssvl +#define _vel_vldl2dsx_vssl __builtin_ve_vl_vldl2dsx_vssl +#define _vel_vldl2dsx_vssvl __builtin_ve_vl_vldl2dsx_vssvl +#define _vel_vldl2dsxnc_vssl __builtin_ve_vl_vldl2dsxnc_vssl +#define _vel_vldl2dsxnc_vssvl __builtin_ve_vl_vldl2dsxnc_vssvl +#define _vel_vldl2dzx_vssl __builtin_ve_vl_vldl2dzx_vssl +#define _vel_vldl2dzx_vssvl __builtin_ve_vl_vldl2dzx_vssvl +#define _vel_vldl2dzxnc_vssl __builtin_ve_vl_vldl2dzxnc_vssl +#define _vel_vldl2dzxnc_vssvl __builtin_ve_vl_vldl2dzxnc_vssvl +#define _vel_vst_vssl __builtin_ve_vl_vst_vssl +#define _vel_vst_vssml __builtin_ve_vl_vst_vssml +#define _vel_vstnc_vssl __builtin_ve_vl_vstnc_vssl +#define _vel_vstnc_vssml __builtin_ve_vl_vstnc_vssml +#define _vel_vstot_vssl __builtin_ve_vl_vstot_vssl +#define _vel_vstot_vssml __builtin_ve_vl_vstot_vssml +#define _vel_vstncot_vssl __builtin_ve_vl_vstncot_vssl +#define _vel_vstncot_vssml __builtin_ve_vl_vstncot_vssml +#define _vel_vstu_vssl __builtin_ve_vl_vstu_vssl +#define _vel_vstu_vssml __builtin_ve_vl_vstu_vssml +#define _vel_vstunc_vssl __builtin_ve_vl_vstunc_vssl +#define _vel_vstunc_vssml __builtin_ve_vl_vstunc_vssml +#define _vel_vstuot_vssl __builtin_ve_vl_vstuot_vssl +#define _vel_vstuot_vssml __builtin_ve_vl_vstuot_vssml +#define _vel_vstuncot_vssl __builtin_ve_vl_vstuncot_vssl +#define _vel_vstuncot_vssml __builtin_ve_vl_vstuncot_vssml +#define _vel_vstl_vssl __builtin_ve_vl_vstl_vssl +#define _vel_vstl_vssml __builtin_ve_vl_vstl_vssml +#define _vel_vstlnc_vssl __builtin_ve_vl_vstlnc_vssl +#define _vel_vstlnc_vssml __builtin_ve_vl_vstlnc_vssml +#define _vel_vstlot_vssl __builtin_ve_vl_vstlot_vssl +#define _vel_vstlot_vssml __builtin_ve_vl_vstlot_vssml +#define _vel_vstlncot_vssl __builtin_ve_vl_vstlncot_vssl +#define _vel_vstlncot_vssml __builtin_ve_vl_vstlncot_vssml +#define _vel_vst2d_vssl __builtin_ve_vl_vst2d_vssl +#define _vel_vst2d_vssml __builtin_ve_vl_vst2d_vssml +#define _vel_vst2dnc_vssl __builtin_ve_vl_vst2dnc_vssl +#define _vel_vst2dnc_vssml __builtin_ve_vl_vst2dnc_vssml +#define _vel_vst2dot_vssl __builtin_ve_vl_vst2dot_vssl +#define _vel_vst2dot_vssml __builtin_ve_vl_vst2dot_vssml +#define _vel_vst2dncot_vssl __builtin_ve_vl_vst2dncot_vssl +#define _vel_vst2dncot_vssml __builtin_ve_vl_vst2dncot_vssml +#define _vel_vstu2d_vssl __builtin_ve_vl_vstu2d_vssl +#define _vel_vstu2d_vssml __builtin_ve_vl_vstu2d_vssml +#define _vel_vstu2dnc_vssl __builtin_ve_vl_vstu2dnc_vssl +#define _vel_vstu2dnc_vssml __builtin_ve_vl_vstu2dnc_vssml +#define _vel_vstu2dot_vssl __builtin_ve_vl_vstu2dot_vssl +#define _vel_vstu2dot_vssml __builtin_ve_vl_vstu2dot_vssml +#define _vel_vstu2dncot_vssl __builtin_ve_vl_vstu2dncot_vssl +#define _vel_vstu2dncot_vssml __builtin_ve_vl_vstu2dncot_vssml +#define _vel_vstl2d_vssl __builtin_ve_vl_vstl2d_vssl +#define _vel_vstl2d_vssml __builtin_ve_vl_vstl2d_vssml +#define _vel_vstl2dnc_vssl __builtin_ve_vl_vstl2dnc_vssl +#define _vel_vstl2dnc_vssml __builtin_ve_vl_vstl2dnc_vssml +#define _vel_vstl2dot_vssl __builtin_ve_vl_vstl2dot_vssl +#define _vel_vstl2dot_vssml __builtin_ve_vl_vstl2dot_vssml +#define _vel_vstl2dncot_vssl __builtin_ve_vl_vstl2dncot_vssl +#define _vel_vstl2dncot_vssml __builtin_ve_vl_vstl2dncot_vssml +#define _vel_pfchv_ssl __builtin_ve_vl_pfchv_ssl +#define _vel_pfchvnc_ssl __builtin_ve_vl_pfchvnc_ssl +#define _vel_lsv_vvss __builtin_ve_vl_lsv_vvss +#define _vel_lvsl_svs __builtin_ve_vl_lvsl_svs +#define _vel_lvsd_svs __builtin_ve_vl_lvsd_svs +#define _vel_lvss_svs __builtin_ve_vl_lvss_svs +#define _vel_lvm_mmss __builtin_ve_vl_lvm_mmss +#define _vel_lvm_MMss __builtin_ve_vl_lvm_MMss +#define _vel_svm_sms __builtin_ve_vl_svm_sms +#define _vel_svm_sMs __builtin_ve_vl_svm_sMs +#define _vel_vbrdd_vsl __builtin_ve_vl_vbrdd_vsl +#define _vel_vbrdd_vsvl __builtin_ve_vl_vbrdd_vsvl +#define _vel_vbrdd_vsmvl __builtin_ve_vl_vbrdd_vsmvl +#define _vel_vbrdl_vsl __builtin_ve_vl_vbrdl_vsl +#define _vel_vbrdl_vsvl __builtin_ve_vl_vbrdl_vsvl +#define _vel_vbrdl_vsmvl __builtin_ve_vl_vbrdl_vsmvl +#define _vel_vbrds_vsl __builtin_ve_vl_vbrds_vsl +#define _vel_vbrds_vsvl __builtin_ve_vl_vbrds_vsvl +#define _vel_vbrds_vsmvl __builtin_ve_vl_vbrds_vsmvl +#define _vel_vbrdw_vsl __builtin_ve_vl_vbrdw_vsl +#define _vel_vbrdw_vsvl __builtin_ve_vl_vbrdw_vsvl +#define _vel_vbrdw_vsmvl __builtin_ve_vl_vbrdw_vsmvl +#define _vel_pvbrd_vsl __builtin_ve_vl_pvbrd_vsl +#define _vel_pvbrd_vsvl __builtin_ve_vl_pvbrd_vsvl +#define _vel_pvbrd_vsMvl __builtin_ve_vl_pvbrd_vsMvl +#define _vel_vmv_vsvl __builtin_ve_vl_vmv_vsvl +#define _vel_vmv_vsvvl __builtin_ve_vl_vmv_vsvvl +#define _vel_vmv_vsvmvl __builtin_ve_vl_vmv_vsvmvl +#define _vel_vaddul_vvvl __builtin_ve_vl_vaddul_vvvl +#define _vel_vaddul_vvvvl __builtin_ve_vl_vaddul_vvvvl +#define _vel_vaddul_vsvl __builtin_ve_vl_vaddul_vsvl +#define _vel_vaddul_vsvvl __builtin_ve_vl_vaddul_vsvvl +#define _vel_vaddul_vvvmvl __builtin_ve_vl_vaddul_vvvmvl +#define _vel_vaddul_vsvmvl __builtin_ve_vl_vaddul_vsvmvl +#define _vel_vadduw_vvvl __builtin_ve_vl_vadduw_vvvl +#define _vel_vadduw_vvvvl __builtin_ve_vl_vadduw_vvvvl +#define _vel_vadduw_vsvl __builtin_ve_vl_vadduw_vsvl +#define _vel_vadduw_vsvvl __builtin_ve_vl_vadduw_vsvvl +#define _vel_vadduw_vvvmvl __builtin_ve_vl_vadduw_vvvmvl +#define _vel_vadduw_vsvmvl __builtin_ve_vl_vadduw_vsvmvl +#define _vel_pvaddu_vvvl __builtin_ve_vl_pvaddu_vvvl +#define _vel_pvaddu_vvvvl __builtin_ve_vl_pvaddu_vvvvl +#define _vel_pvaddu_vsvl __builtin_ve_vl_pvaddu_vsvl +#define _vel_pvaddu_vsvvl __builtin_ve_vl_pvaddu_vsvvl +#define _vel_pvaddu_vvvMvl __builtin_ve_vl_pvaddu_vvvMvl +#define _vel_pvaddu_vsvMvl __builtin_ve_vl_pvaddu_vsvMvl +#define _vel_vaddswsx_vvvl __builtin_ve_vl_vaddswsx_vvvl +#define _vel_vaddswsx_vvvvl __builtin_ve_vl_vaddswsx_vvvvl +#define _vel_vaddswsx_vsvl __builtin_ve_vl_vaddswsx_vsvl +#define _vel_vaddswsx_vsvvl __builtin_ve_vl_vaddswsx_vsvvl +#define _vel_vaddswsx_vvvmvl __builtin_ve_vl_vaddswsx_vvvmvl +#define _vel_vaddswsx_vsvmvl __builtin_ve_vl_vaddswsx_vsvmvl +#define _vel_vaddswzx_vvvl __builtin_ve_vl_vaddswzx_vvvl +#define _vel_vaddswzx_vvvvl __builtin_ve_vl_vaddswzx_vvvvl +#define _vel_vaddswzx_vsvl __builtin_ve_vl_vaddswzx_vsvl +#define _vel_vaddswzx_vsvvl __builtin_ve_vl_vaddswzx_vsvvl +#define _vel_vaddswzx_vvvmvl __builtin_ve_vl_vaddswzx_vvvmvl +#define _vel_vaddswzx_vsvmvl __builtin_ve_vl_vaddswzx_vsvmvl +#define _vel_pvadds_vvvl __builtin_ve_vl_pvadds_vvvl +#define _vel_pvadds_vvvvl __builtin_ve_vl_pvadds_vvvvl +#define _vel_pvadds_vsvl __builtin_ve_vl_pvadds_vsvl +#define _vel_pvadds_vsvvl __builtin_ve_vl_pvadds_vsvvl +#define _vel_pvadds_vvvMvl __builtin_ve_vl_pvadds_vvvMvl +#define _vel_pvadds_vsvMvl __builtin_ve_vl_pvadds_vsvMvl +#define _vel_vaddsl_vvvl __builtin_ve_vl_vaddsl_vvvl +#define _vel_vaddsl_vvvvl __builtin_ve_vl_vaddsl_vvvvl +#define _vel_vaddsl_vsvl __builtin_ve_vl_vaddsl_vsvl +#define _vel_vaddsl_vsvvl __builtin_ve_vl_vaddsl_vsvvl +#define _vel_vaddsl_vvvmvl __builtin_ve_vl_vaddsl_vvvmvl +#define _vel_vaddsl_vsvmvl __builtin_ve_vl_vaddsl_vsvmvl +#define _vel_vsubul_vvvl __builtin_ve_vl_vsubul_vvvl +#define _vel_vsubul_vvvvl __builtin_ve_vl_vsubul_vvvvl +#define _vel_vsubul_vsvl __builtin_ve_vl_vsubul_vsvl +#define _vel_vsubul_vsvvl __builtin_ve_vl_vsubul_vsvvl +#define _vel_vsubul_vvvmvl __builtin_ve_vl_vsubul_vvvmvl +#define _vel_vsubul_vsvmvl __builtin_ve_vl_vsubul_vsvmvl +#define _vel_vsubuw_vvvl __builtin_ve_vl_vsubuw_vvvl +#define _vel_vsubuw_vvvvl __builtin_ve_vl_vsubuw_vvvvl +#define _vel_vsubuw_vsvl __builtin_ve_vl_vsubuw_vsvl +#define _vel_vsubuw_vsvvl __builtin_ve_vl_vsubuw_vsvvl +#define _vel_vsubuw_vvvmvl __builtin_ve_vl_vsubuw_vvvmvl +#define _vel_vsubuw_vsvmvl __builtin_ve_vl_vsubuw_vsvmvl +#define _vel_pvsubu_vvvl __builtin_ve_vl_pvsubu_vvvl +#define _vel_pvsubu_vvvvl __builtin_ve_vl_pvsubu_vvvvl +#define _vel_pvsubu_vsvl __builtin_ve_vl_pvsubu_vsvl +#define _vel_pvsubu_vsvvl __builtin_ve_vl_pvsubu_vsvvl +#define _vel_pvsubu_vvvMvl __builtin_ve_vl_pvsubu_vvvMvl +#define _vel_pvsubu_vsvMvl __builtin_ve_vl_pvsubu_vsvMvl +#define _vel_vsubswsx_vvvl __builtin_ve_vl_vsubswsx_vvvl +#define _vel_vsubswsx_vvvvl __builtin_ve_vl_vsubswsx_vvvvl +#define _vel_vsubswsx_vsvl __builtin_ve_vl_vsubswsx_vsvl +#define _vel_vsubswsx_vsvvl __builtin_ve_vl_vsubswsx_vsvvl +#define _vel_vsubswsx_vvvmvl __builtin_ve_vl_vsubswsx_vvvmvl +#define _vel_vsubswsx_vsvmvl __builtin_ve_vl_vsubswsx_vsvmvl +#define _vel_vsubswzx_vvvl __builtin_ve_vl_vsubswzx_vvvl +#define _vel_vsubswzx_vvvvl __builtin_ve_vl_vsubswzx_vvvvl +#define _vel_vsubswzx_vsvl __builtin_ve_vl_vsubswzx_vsvl +#define _vel_vsubswzx_vsvvl __builtin_ve_vl_vsubswzx_vsvvl +#define _vel_vsubswzx_vvvmvl __builtin_ve_vl_vsubswzx_vvvmvl +#define _vel_vsubswzx_vsvmvl __builtin_ve_vl_vsubswzx_vsvmvl +#define _vel_pvsubs_vvvl __builtin_ve_vl_pvsubs_vvvl +#define _vel_pvsubs_vvvvl __builtin_ve_vl_pvsubs_vvvvl +#define _vel_pvsubs_vsvl __builtin_ve_vl_pvsubs_vsvl +#define _vel_pvsubs_vsvvl __builtin_ve_vl_pvsubs_vsvvl +#define _vel_pvsubs_vvvMvl __builtin_ve_vl_pvsubs_vvvMvl +#define _vel_pvsubs_vsvMvl __builtin_ve_vl_pvsubs_vsvMvl +#define _vel_vsubsl_vvvl __builtin_ve_vl_vsubsl_vvvl +#define _vel_vsubsl_vvvvl __builtin_ve_vl_vsubsl_vvvvl +#define _vel_vsubsl_vsvl __builtin_ve_vl_vsubsl_vsvl +#define _vel_vsubsl_vsvvl __builtin_ve_vl_vsubsl_vsvvl +#define _vel_vsubsl_vvvmvl __builtin_ve_vl_vsubsl_vvvmvl +#define _vel_vsubsl_vsvmvl __builtin_ve_vl_vsubsl_vsvmvl +#define _vel_vmulul_vvvl __builtin_ve_vl_vmulul_vvvl +#define _vel_vmulul_vvvvl __builtin_ve_vl_vmulul_vvvvl +#define _vel_vmulul_vsvl __builtin_ve_vl_vmulul_vsvl +#define _vel_vmulul_vsvvl __builtin_ve_vl_vmulul_vsvvl +#define _vel_vmulul_vvvmvl __builtin_ve_vl_vmulul_vvvmvl +#define _vel_vmulul_vsvmvl __builtin_ve_vl_vmulul_vsvmvl +#define _vel_vmuluw_vvvl __builtin_ve_vl_vmuluw_vvvl +#define _vel_vmuluw_vvvvl __builtin_ve_vl_vmuluw_vvvvl +#define _vel_vmuluw_vsvl __builtin_ve_vl_vmuluw_vsvl +#define _vel_vmuluw_vsvvl __builtin_ve_vl_vmuluw_vsvvl +#define _vel_vmuluw_vvvmvl __builtin_ve_vl_vmuluw_vvvmvl +#define _vel_vmuluw_vsvmvl __builtin_ve_vl_vmuluw_vsvmvl +#define _vel_vmulswsx_vvvl __builtin_ve_vl_vmulswsx_vvvl +#define _vel_vmulswsx_vvvvl __builtin_ve_vl_vmulswsx_vvvvl +#define _vel_vmulswsx_vsvl __builtin_ve_vl_vmulswsx_vsvl +#define _vel_vmulswsx_vsvvl __builtin_ve_vl_vmulswsx_vsvvl +#define _vel_vmulswsx_vvvmvl __builtin_ve_vl_vmulswsx_vvvmvl +#define _vel_vmulswsx_vsvmvl __builtin_ve_vl_vmulswsx_vsvmvl +#define _vel_vmulswzx_vvvl __builtin_ve_vl_vmulswzx_vvvl +#define _vel_vmulswzx_vvvvl __builtin_ve_vl_vmulswzx_vvvvl +#define _vel_vmulswzx_vsvl __builtin_ve_vl_vmulswzx_vsvl +#define _vel_vmulswzx_vsvvl __builtin_ve_vl_vmulswzx_vsvvl +#define _vel_vmulswzx_vvvmvl __builtin_ve_vl_vmulswzx_vvvmvl +#define _vel_vmulswzx_vsvmvl __builtin_ve_vl_vmulswzx_vsvmvl +#define _vel_vmulsl_vvvl __builtin_ve_vl_vmulsl_vvvl +#define _vel_vmulsl_vvvvl __builtin_ve_vl_vmulsl_vvvvl +#define _vel_vmulsl_vsvl __builtin_ve_vl_vmulsl_vsvl +#define _vel_vmulsl_vsvvl __builtin_ve_vl_vmulsl_vsvvl +#define _vel_vmulsl_vvvmvl __builtin_ve_vl_vmulsl_vvvmvl +#define _vel_vmulsl_vsvmvl __builtin_ve_vl_vmulsl_vsvmvl +#define _vel_vmulslw_vvvl __builtin_ve_vl_vmulslw_vvvl +#define _vel_vmulslw_vvvvl __builtin_ve_vl_vmulslw_vvvvl +#define _vel_vmulslw_vsvl __builtin_ve_vl_vmulslw_vsvl +#define _vel_vmulslw_vsvvl __builtin_ve_vl_vmulslw_vsvvl +#define _vel_vdivul_vvvl __builtin_ve_vl_vdivul_vvvl +#define _vel_vdivul_vvvvl __builtin_ve_vl_vdivul_vvvvl +#define _vel_vdivul_vsvl __builtin_ve_vl_vdivul_vsvl +#define _vel_vdivul_vsvvl __builtin_ve_vl_vdivul_vsvvl +#define _vel_vdivul_vvvmvl __builtin_ve_vl_vdivul_vvvmvl +#define _vel_vdivul_vsvmvl __builtin_ve_vl_vdivul_vsvmvl +#define _vel_vdivuw_vvvl __builtin_ve_vl_vdivuw_vvvl +#define _vel_vdivuw_vvvvl __builtin_ve_vl_vdivuw_vvvvl +#define _vel_vdivuw_vsvl __builtin_ve_vl_vdivuw_vsvl +#define _vel_vdivuw_vsvvl __builtin_ve_vl_vdivuw_vsvvl +#define _vel_vdivuw_vvvmvl __builtin_ve_vl_vdivuw_vvvmvl +#define _vel_vdivuw_vsvmvl __builtin_ve_vl_vdivuw_vsvmvl +#define _vel_vdivul_vvsl __builtin_ve_vl_vdivul_vvsl +#define _vel_vdivul_vvsvl __builtin_ve_vl_vdivul_vvsvl +#define _vel_vdivul_vvsmvl __builtin_ve_vl_vdivul_vvsmvl +#define _vel_vdivuw_vvsl __builtin_ve_vl_vdivuw_vvsl +#define _vel_vdivuw_vvsvl __builtin_ve_vl_vdivuw_vvsvl +#define _vel_vdivuw_vvsmvl __builtin_ve_vl_vdivuw_vvsmvl +#define _vel_vdivswsx_vvvl __builtin_ve_vl_vdivswsx_vvvl +#define _vel_vdivswsx_vvvvl __builtin_ve_vl_vdivswsx_vvvvl +#define _vel_vdivswsx_vsvl __builtin_ve_vl_vdivswsx_vsvl +#define _vel_vdivswsx_vsvvl __builtin_ve_vl_vdivswsx_vsvvl +#define _vel_vdivswsx_vvvmvl __builtin_ve_vl_vdivswsx_vvvmvl +#define _vel_vdivswsx_vsvmvl __builtin_ve_vl_vdivswsx_vsvmvl +#define _vel_vdivswzx_vvvl __builtin_ve_vl_vdivswzx_vvvl +#define _vel_vdivswzx_vvvvl __builtin_ve_vl_vdivswzx_vvvvl +#define _vel_vdivswzx_vsvl __builtin_ve_vl_vdivswzx_vsvl +#define _vel_vdivswzx_vsvvl __builtin_ve_vl_vdivswzx_vsvvl +#define _vel_vdivswzx_vvvmvl __builtin_ve_vl_vdivswzx_vvvmvl +#define _vel_vdivswzx_vsvmvl __builtin_ve_vl_vdivswzx_vsvmvl +#define _vel_vdivswsx_vvsl __builtin_ve_vl_vdivswsx_vvsl +#define _vel_vdivswsx_vvsvl __builtin_ve_vl_vdivswsx_vvsvl +#define _vel_vdivswsx_vvsmvl __builtin_ve_vl_vdivswsx_vvsmvl +#define _vel_vdivswzx_vvsl __builtin_ve_vl_vdivswzx_vvsl +#define _vel_vdivswzx_vvsvl __builtin_ve_vl_vdivswzx_vvsvl +#define _vel_vdivswzx_vvsmvl __builtin_ve_vl_vdivswzx_vvsmvl +#define _vel_vdivsl_vvvl __builtin_ve_vl_vdivsl_vvvl +#define _vel_vdivsl_vvvvl __builtin_ve_vl_vdivsl_vvvvl +#define _vel_vdivsl_vsvl __builtin_ve_vl_vdivsl_vsvl +#define _vel_vdivsl_vsvvl __builtin_ve_vl_vdivsl_vsvvl +#define _vel_vdivsl_vvvmvl __builtin_ve_vl_vdivsl_vvvmvl +#define _vel_vdivsl_vsvmvl __builtin_ve_vl_vdivsl_vsvmvl +#define _vel_vdivsl_vvsl __builtin_ve_vl_vdivsl_vvsl +#define _vel_vdivsl_vvsvl __builtin_ve_vl_vdivsl_vvsvl +#define _vel_vdivsl_vvsmvl __builtin_ve_vl_vdivsl_vvsmvl +#define _vel_vcmpul_vvvl __builtin_ve_vl_vcmpul_vvvl +#define _vel_vcmpul_vvvvl __builtin_ve_vl_vcmpul_vvvvl +#define _vel_vcmpul_vsvl __builtin_ve_vl_vcmpul_vsvl +#define _vel_vcmpul_vsvvl __builtin_ve_vl_vcmpul_vsvvl +#define _vel_vcmpul_vvvmvl __builtin_ve_vl_vcmpul_vvvmvl +#define _vel_vcmpul_vsvmvl __builtin_ve_vl_vcmpul_vsvmvl +#define _vel_vcmpuw_vvvl __builtin_ve_vl_vcmpuw_vvvl +#define _vel_vcmpuw_vvvvl __builtin_ve_vl_vcmpuw_vvvvl +#define _vel_vcmpuw_vsvl __builtin_ve_vl_vcmpuw_vsvl +#define _vel_vcmpuw_vsvvl __builtin_ve_vl_vcmpuw_vsvvl +#define _vel_vcmpuw_vvvmvl __builtin_ve_vl_vcmpuw_vvvmvl +#define _vel_vcmpuw_vsvmvl __builtin_ve_vl_vcmpuw_vsvmvl +#define _vel_pvcmpu_vvvl __builtin_ve_vl_pvcmpu_vvvl +#define _vel_pvcmpu_vvvvl __builtin_ve_vl_pvcmpu_vvvvl +#define _vel_pvcmpu_vsvl __builtin_ve_vl_pvcmpu_vsvl +#define _vel_pvcmpu_vsvvl __builtin_ve_vl_pvcmpu_vsvvl +#define _vel_pvcmpu_vvvMvl __builtin_ve_vl_pvcmpu_vvvMvl +#define _vel_pvcmpu_vsvMvl __builtin_ve_vl_pvcmpu_vsvMvl +#define _vel_vcmpswsx_vvvl __builtin_ve_vl_vcmpswsx_vvvl +#define _vel_vcmpswsx_vvvvl __builtin_ve_vl_vcmpswsx_vvvvl +#define _vel_vcmpswsx_vsvl __builtin_ve_vl_vcmpswsx_vsvl +#define _vel_vcmpswsx_vsvvl __builtin_ve_vl_vcmpswsx_vsvvl +#define _vel_vcmpswsx_vvvmvl __builtin_ve_vl_vcmpswsx_vvvmvl +#define _vel_vcmpswsx_vsvmvl __builtin_ve_vl_vcmpswsx_vsvmvl +#define _vel_vcmpswzx_vvvl __builtin_ve_vl_vcmpswzx_vvvl +#define _vel_vcmpswzx_vvvvl __builtin_ve_vl_vcmpswzx_vvvvl +#define _vel_vcmpswzx_vsvl __builtin_ve_vl_vcmpswzx_vsvl +#define _vel_vcmpswzx_vsvvl __builtin_ve_vl_vcmpswzx_vsvvl +#define _vel_vcmpswzx_vvvmvl __builtin_ve_vl_vcmpswzx_vvvmvl +#define _vel_vcmpswzx_vsvmvl __builtin_ve_vl_vcmpswzx_vsvmvl +#define _vel_pvcmps_vvvl __builtin_ve_vl_pvcmps_vvvl +#define _vel_pvcmps_vvvvl __builtin_ve_vl_pvcmps_vvvvl +#define _vel_pvcmps_vsvl __builtin_ve_vl_pvcmps_vsvl +#define _vel_pvcmps_vsvvl __builtin_ve_vl_pvcmps_vsvvl +#define _vel_pvcmps_vvvMvl __builtin_ve_vl_pvcmps_vvvMvl +#define _vel_pvcmps_vsvMvl __builtin_ve_vl_pvcmps_vsvMvl +#define _vel_vcmpsl_vvvl __builtin_ve_vl_vcmpsl_vvvl +#define _vel_vcmpsl_vvvvl __builtin_ve_vl_vcmpsl_vvvvl +#define _vel_vcmpsl_vsvl __builtin_ve_vl_vcmpsl_vsvl +#define _vel_vcmpsl_vsvvl __builtin_ve_vl_vcmpsl_vsvvl +#define _vel_vcmpsl_vvvmvl __builtin_ve_vl_vcmpsl_vvvmvl +#define _vel_vcmpsl_vsvmvl __builtin_ve_vl_vcmpsl_vsvmvl +#define _vel_vmaxswsx_vvvl __builtin_ve_vl_vmaxswsx_vvvl +#define _vel_vmaxswsx_vvvvl __builtin_ve_vl_vmaxswsx_vvvvl +#define _vel_vmaxswsx_vsvl __builtin_ve_vl_vmaxswsx_vsvl +#define _vel_vmaxswsx_vsvvl __builtin_ve_vl_vmaxswsx_vsvvl +#define _vel_vmaxswsx_vvvmvl __builtin_ve_vl_vmaxswsx_vvvmvl +#define _vel_vmaxswsx_vsvmvl __builtin_ve_vl_vmaxswsx_vsvmvl +#define _vel_vmaxswzx_vvvl __builtin_ve_vl_vmaxswzx_vvvl +#define _vel_vmaxswzx_vvvvl __builtin_ve_vl_vmaxswzx_vvvvl +#define _vel_vmaxswzx_vsvl __builtin_ve_vl_vmaxswzx_vsvl +#define _vel_vmaxswzx_vsvvl __builtin_ve_vl_vmaxswzx_vsvvl +#define _vel_vmaxswzx_vvvmvl __builtin_ve_vl_vmaxswzx_vvvmvl +#define _vel_vmaxswzx_vsvmvl __builtin_ve_vl_vmaxswzx_vsvmvl +#define _vel_pvmaxs_vvvl __builtin_ve_vl_pvmaxs_vvvl +#define _vel_pvmaxs_vvvvl __builtin_ve_vl_pvmaxs_vvvvl +#define _vel_pvmaxs_vsvl __builtin_ve_vl_pvmaxs_vsvl +#define _vel_pvmaxs_vsvvl __builtin_ve_vl_pvmaxs_vsvvl +#define _vel_pvmaxs_vvvMvl __builtin_ve_vl_pvmaxs_vvvMvl +#define _vel_pvmaxs_vsvMvl __builtin_ve_vl_pvmaxs_vsvMvl +#define _vel_vminswsx_vvvl __builtin_ve_vl_vminswsx_vvvl +#define _vel_vminswsx_vvvvl __builtin_ve_vl_vminswsx_vvvvl +#define _vel_vminswsx_vsvl __builtin_ve_vl_vminswsx_vsvl +#define _vel_vminswsx_vsvvl __builtin_ve_vl_vminswsx_vsvvl +#define _vel_vminswsx_vvvmvl __builtin_ve_vl_vminswsx_vvvmvl +#define _vel_vminswsx_vsvmvl __builtin_ve_vl_vminswsx_vsvmvl +#define _vel_vminswzx_vvvl __builtin_ve_vl_vminswzx_vvvl +#define _vel_vminswzx_vvvvl __builtin_ve_vl_vminswzx_vvvvl +#define _vel_vminswzx_vsvl __builtin_ve_vl_vminswzx_vsvl +#define _vel_vminswzx_vsvvl __builtin_ve_vl_vminswzx_vsvvl +#define _vel_vminswzx_vvvmvl __builtin_ve_vl_vminswzx_vvvmvl +#define _vel_vminswzx_vsvmvl __builtin_ve_vl_vminswzx_vsvmvl +#define _vel_pvmins_vvvl __builtin_ve_vl_pvmins_vvvl +#define _vel_pvmins_vvvvl __builtin_ve_vl_pvmins_vvvvl +#define _vel_pvmins_vsvl __builtin_ve_vl_pvmins_vsvl +#define _vel_pvmins_vsvvl __builtin_ve_vl_pvmins_vsvvl +#define _vel_pvmins_vvvMvl __builtin_ve_vl_pvmins_vvvMvl +#define _vel_pvmins_vsvMvl __builtin_ve_vl_pvmins_vsvMvl +#define _vel_vmaxsl_vvvl __builtin_ve_vl_vmaxsl_vvvl +#define _vel_vmaxsl_vvvvl __builtin_ve_vl_vmaxsl_vvvvl +#define _vel_vmaxsl_vsvl __builtin_ve_vl_vmaxsl_vsvl +#define _vel_vmaxsl_vsvvl __builtin_ve_vl_vmaxsl_vsvvl +#define _vel_vmaxsl_vvvmvl __builtin_ve_vl_vmaxsl_vvvmvl +#define _vel_vmaxsl_vsvmvl __builtin_ve_vl_vmaxsl_vsvmvl +#define _vel_vminsl_vvvl __builtin_ve_vl_vminsl_vvvl +#define _vel_vminsl_vvvvl __builtin_ve_vl_vminsl_vvvvl +#define _vel_vminsl_vsvl __builtin_ve_vl_vminsl_vsvl +#define _vel_vminsl_vsvvl __builtin_ve_vl_vminsl_vsvvl +#define _vel_vminsl_vvvmvl __builtin_ve_vl_vminsl_vvvmvl +#define _vel_vminsl_vsvmvl __builtin_ve_vl_vminsl_vsvmvl +#define _vel_vand_vvvl __builtin_ve_vl_vand_vvvl +#define _vel_vand_vvvvl __builtin_ve_vl_vand_vvvvl +#define _vel_vand_vsvl __builtin_ve_vl_vand_vsvl +#define _vel_vand_vsvvl __builtin_ve_vl_vand_vsvvl +#define _vel_vand_vvvmvl __builtin_ve_vl_vand_vvvmvl +#define _vel_vand_vsvmvl __builtin_ve_vl_vand_vsvmvl +#define _vel_pvand_vvvl __builtin_ve_vl_pvand_vvvl +#define _vel_pvand_vvvvl __builtin_ve_vl_pvand_vvvvl +#define _vel_pvand_vsvl __builtin_ve_vl_pvand_vsvl +#define _vel_pvand_vsvvl __builtin_ve_vl_pvand_vsvvl +#define _vel_pvand_vvvMvl __builtin_ve_vl_pvand_vvvMvl +#define _vel_pvand_vsvMvl __builtin_ve_vl_pvand_vsvMvl +#define _vel_vor_vvvl __builtin_ve_vl_vor_vvvl +#define _vel_vor_vvvvl __builtin_ve_vl_vor_vvvvl +#define _vel_vor_vsvl __builtin_ve_vl_vor_vsvl +#define _vel_vor_vsvvl __builtin_ve_vl_vor_vsvvl +#define _vel_vor_vvvmvl __builtin_ve_vl_vor_vvvmvl +#define _vel_vor_vsvmvl __builtin_ve_vl_vor_vsvmvl +#define _vel_pvor_vvvl __builtin_ve_vl_pvor_vvvl +#define _vel_pvor_vvvvl __builtin_ve_vl_pvor_vvvvl +#define _vel_pvor_vsvl __builtin_ve_vl_pvor_vsvl +#define _vel_pvor_vsvvl __builtin_ve_vl_pvor_vsvvl +#define _vel_pvor_vvvMvl __builtin_ve_vl_pvor_vvvMvl +#define _vel_pvor_vsvMvl __builtin_ve_vl_pvor_vsvMvl +#define _vel_vxor_vvvl __builtin_ve_vl_vxor_vvvl +#define _vel_vxor_vvvvl __builtin_ve_vl_vxor_vvvvl +#define _vel_vxor_vsvl __builtin_ve_vl_vxor_vsvl +#define _vel_vxor_vsvvl __builtin_ve_vl_vxor_vsvvl +#define _vel_vxor_vvvmvl __builtin_ve_vl_vxor_vvvmvl +#define _vel_vxor_vsvmvl __builtin_ve_vl_vxor_vsvmvl +#define _vel_pvxor_vvvl __builtin_ve_vl_pvxor_vvvl +#define _vel_pvxor_vvvvl __builtin_ve_vl_pvxor_vvvvl +#define _vel_pvxor_vsvl __builtin_ve_vl_pvxor_vsvl +#define _vel_pvxor_vsvvl __builtin_ve_vl_pvxor_vsvvl +#define _vel_pvxor_vvvMvl __builtin_ve_vl_pvxor_vvvMvl +#define _vel_pvxor_vsvMvl __builtin_ve_vl_pvxor_vsvMvl +#define _vel_veqv_vvvl __builtin_ve_vl_veqv_vvvl +#define _vel_veqv_vvvvl __builtin_ve_vl_veqv_vvvvl +#define _vel_veqv_vsvl __builtin_ve_vl_veqv_vsvl +#define _vel_veqv_vsvvl __builtin_ve_vl_veqv_vsvvl +#define _vel_veqv_vvvmvl __builtin_ve_vl_veqv_vvvmvl +#define _vel_veqv_vsvmvl __builtin_ve_vl_veqv_vsvmvl +#define _vel_pveqv_vvvl __builtin_ve_vl_pveqv_vvvl +#define _vel_pveqv_vvvvl __builtin_ve_vl_pveqv_vvvvl +#define _vel_pveqv_vsvl __builtin_ve_vl_pveqv_vsvl +#define _vel_pveqv_vsvvl __builtin_ve_vl_pveqv_vsvvl +#define _vel_pveqv_vvvMvl __builtin_ve_vl_pveqv_vvvMvl +#define _vel_pveqv_vsvMvl __builtin_ve_vl_pveqv_vsvMvl +#define _vel_vldz_vvl __builtin_ve_vl_vldz_vvl +#define _vel_vldz_vvvl __builtin_ve_vl_vldz_vvvl +#define _vel_vldz_vvmvl __builtin_ve_vl_vldz_vvmvl +#define _vel_pvldzlo_vvl __builtin_ve_vl_pvldzlo_vvl +#define _vel_pvldzlo_vvvl __builtin_ve_vl_pvldzlo_vvvl +#define _vel_pvldzlo_vvmvl __builtin_ve_vl_pvldzlo_vvmvl +#define _vel_pvldzup_vvl __builtin_ve_vl_pvldzup_vvl +#define _vel_pvldzup_vvvl __builtin_ve_vl_pvldzup_vvvl +#define _vel_pvldzup_vvmvl __builtin_ve_vl_pvldzup_vvmvl +#define _vel_pvldz_vvl __builtin_ve_vl_pvldz_vvl +#define _vel_pvldz_vvvl __builtin_ve_vl_pvldz_vvvl +#define _vel_pvldz_vvMvl __builtin_ve_vl_pvldz_vvMvl +#define _vel_vpcnt_vvl __builtin_ve_vl_vpcnt_vvl +#define _vel_vpcnt_vvvl __builtin_ve_vl_vpcnt_vvvl +#define _vel_vpcnt_vvmvl __builtin_ve_vl_vpcnt_vvmvl +#define _vel_pvpcntlo_vvl __builtin_ve_vl_pvpcntlo_vvl +#define _vel_pvpcntlo_vvvl __builtin_ve_vl_pvpcntlo_vvvl +#define _vel_pvpcntlo_vvmvl __builtin_ve_vl_pvpcntlo_vvmvl +#define _vel_pvpcntup_vvl __builtin_ve_vl_pvpcntup_vvl +#define _vel_pvpcntup_vvvl __builtin_ve_vl_pvpcntup_vvvl +#define _vel_pvpcntup_vvmvl __builtin_ve_vl_pvpcntup_vvmvl +#define _vel_pvpcnt_vvl __builtin_ve_vl_pvpcnt_vvl +#define _vel_pvpcnt_vvvl __builtin_ve_vl_pvpcnt_vvvl +#define _vel_pvpcnt_vvMvl __builtin_ve_vl_pvpcnt_vvMvl +#define _vel_vbrv_vvl __builtin_ve_vl_vbrv_vvl +#define _vel_vbrv_vvvl __builtin_ve_vl_vbrv_vvvl +#define _vel_vbrv_vvmvl __builtin_ve_vl_vbrv_vvmvl +#define _vel_pvbrvlo_vvl __builtin_ve_vl_pvbrvlo_vvl +#define _vel_pvbrvlo_vvvl __builtin_ve_vl_pvbrvlo_vvvl +#define _vel_pvbrvlo_vvmvl __builtin_ve_vl_pvbrvlo_vvmvl +#define _vel_pvbrvup_vvl __builtin_ve_vl_pvbrvup_vvl +#define _vel_pvbrvup_vvvl __builtin_ve_vl_pvbrvup_vvvl +#define _vel_pvbrvup_vvmvl __builtin_ve_vl_pvbrvup_vvmvl +#define _vel_pvbrv_vvl __builtin_ve_vl_pvbrv_vvl +#define _vel_pvbrv_vvvl __builtin_ve_vl_pvbrv_vvvl +#define _vel_pvbrv_vvMvl __builtin_ve_vl_pvbrv_vvMvl +#define _vel_vseq_vl __builtin_ve_vl_vseq_vl +#define _vel_vseq_vvl __builtin_ve_vl_vseq_vvl +#define _vel_pvseqlo_vl __builtin_ve_vl_pvseqlo_vl +#define _vel_pvseqlo_vvl __builtin_ve_vl_pvseqlo_vvl +#define _vel_pvsequp_vl __builtin_ve_vl_pvsequp_vl +#define _vel_pvsequp_vvl __builtin_ve_vl_pvsequp_vvl +#define _vel_pvseq_vl __builtin_ve_vl_pvseq_vl +#define _vel_pvseq_vvl __builtin_ve_vl_pvseq_vvl +#define _vel_vsll_vvvl __builtin_ve_vl_vsll_vvvl +#define _vel_vsll_vvvvl __builtin_ve_vl_vsll_vvvvl +#define _vel_vsll_vvsl __builtin_ve_vl_vsll_vvsl +#define _vel_vsll_vvsvl __builtin_ve_vl_vsll_vvsvl +#define _vel_vsll_vvvmvl __builtin_ve_vl_vsll_vvvmvl +#define _vel_vsll_vvsmvl __builtin_ve_vl_vsll_vvsmvl +#define _vel_pvsll_vvvl __builtin_ve_vl_pvsll_vvvl +#define _vel_pvsll_vvvvl __builtin_ve_vl_pvsll_vvvvl +#define _vel_pvsll_vvsl __builtin_ve_vl_pvsll_vvsl +#define _vel_pvsll_vvsvl __builtin_ve_vl_pvsll_vvsvl +#define _vel_pvsll_vvvMvl __builtin_ve_vl_pvsll_vvvMvl +#define _vel_pvsll_vvsMvl __builtin_ve_vl_pvsll_vvsMvl +#define _vel_vsrl_vvvl __builtin_ve_vl_vsrl_vvvl +#define _vel_vsrl_vvvvl __builtin_ve_vl_vsrl_vvvvl +#define _vel_vsrl_vvsl __builtin_ve_vl_vsrl_vvsl +#define _vel_vsrl_vvsvl __builtin_ve_vl_vsrl_vvsvl +#define _vel_vsrl_vvvmvl __builtin_ve_vl_vsrl_vvvmvl +#define _vel_vsrl_vvsmvl __builtin_ve_vl_vsrl_vvsmvl +#define _vel_pvsrl_vvvl __builtin_ve_vl_pvsrl_vvvl +#define _vel_pvsrl_vvvvl __builtin_ve_vl_pvsrl_vvvvl +#define _vel_pvsrl_vvsl __builtin_ve_vl_pvsrl_vvsl +#define _vel_pvsrl_vvsvl __builtin_ve_vl_pvsrl_vvsvl +#define _vel_pvsrl_vvvMvl __builtin_ve_vl_pvsrl_vvvMvl +#define _vel_pvsrl_vvsMvl __builtin_ve_vl_pvsrl_vvsMvl +#define _vel_vslawsx_vvvl __builtin_ve_vl_vslawsx_vvvl +#define _vel_vslawsx_vvvvl __builtin_ve_vl_vslawsx_vvvvl +#define _vel_vslawsx_vvsl __builtin_ve_vl_vslawsx_vvsl +#define _vel_vslawsx_vvsvl __builtin_ve_vl_vslawsx_vvsvl +#define _vel_vslawsx_vvvmvl __builtin_ve_vl_vslawsx_vvvmvl +#define _vel_vslawsx_vvsmvl __builtin_ve_vl_vslawsx_vvsmvl +#define _vel_vslawzx_vvvl __builtin_ve_vl_vslawzx_vvvl +#define _vel_vslawzx_vvvvl __builtin_ve_vl_vslawzx_vvvvl +#define _vel_vslawzx_vvsl __builtin_ve_vl_vslawzx_vvsl +#define _vel_vslawzx_vvsvl __builtin_ve_vl_vslawzx_vvsvl +#define _vel_vslawzx_vvvmvl __builtin_ve_vl_vslawzx_vvvmvl +#define _vel_vslawzx_vvsmvl __builtin_ve_vl_vslawzx_vvsmvl +#define _vel_pvsla_vvvl __builtin_ve_vl_pvsla_vvvl +#define _vel_pvsla_vvvvl __builtin_ve_vl_pvsla_vvvvl +#define _vel_pvsla_vvsl __builtin_ve_vl_pvsla_vvsl +#define _vel_pvsla_vvsvl __builtin_ve_vl_pvsla_vvsvl +#define _vel_pvsla_vvvMvl __builtin_ve_vl_pvsla_vvvMvl +#define _vel_pvsla_vvsMvl __builtin_ve_vl_pvsla_vvsMvl +#define _vel_vslal_vvvl __builtin_ve_vl_vslal_vvvl +#define _vel_vslal_vvvvl __builtin_ve_vl_vslal_vvvvl +#define _vel_vslal_vvsl __builtin_ve_vl_vslal_vvsl +#define _vel_vslal_vvsvl __builtin_ve_vl_vslal_vvsvl +#define _vel_vslal_vvvmvl __builtin_ve_vl_vslal_vvvmvl +#define _vel_vslal_vvsmvl __builtin_ve_vl_vslal_vvsmvl +#define _vel_vsrawsx_vvvl __builtin_ve_vl_vsrawsx_vvvl +#define _vel_vsrawsx_vvvvl __builtin_ve_vl_vsrawsx_vvvvl +#define _vel_vsrawsx_vvsl __builtin_ve_vl_vsrawsx_vvsl +#define _vel_vsrawsx_vvsvl __builtin_ve_vl_vsrawsx_vvsvl +#define _vel_vsrawsx_vvvmvl __builtin_ve_vl_vsrawsx_vvvmvl +#define _vel_vsrawsx_vvsmvl __builtin_ve_vl_vsrawsx_vvsmvl +#define _vel_vsrawzx_vvvl __builtin_ve_vl_vsrawzx_vvvl +#define _vel_vsrawzx_vvvvl __builtin_ve_vl_vsrawzx_vvvvl +#define _vel_vsrawzx_vvsl __builtin_ve_vl_vsrawzx_vvsl +#define _vel_vsrawzx_vvsvl __builtin_ve_vl_vsrawzx_vvsvl +#define _vel_vsrawzx_vvvmvl __builtin_ve_vl_vsrawzx_vvvmvl +#define _vel_vsrawzx_vvsmvl __builtin_ve_vl_vsrawzx_vvsmvl +#define _vel_pvsra_vvvl __builtin_ve_vl_pvsra_vvvl +#define _vel_pvsra_vvvvl __builtin_ve_vl_pvsra_vvvvl +#define _vel_pvsra_vvsl __builtin_ve_vl_pvsra_vvsl +#define _vel_pvsra_vvsvl __builtin_ve_vl_pvsra_vvsvl +#define _vel_pvsra_vvvMvl __builtin_ve_vl_pvsra_vvvMvl +#define _vel_pvsra_vvsMvl __builtin_ve_vl_pvsra_vvsMvl +#define _vel_vsral_vvvl __builtin_ve_vl_vsral_vvvl +#define _vel_vsral_vvvvl __builtin_ve_vl_vsral_vvvvl +#define _vel_vsral_vvsl __builtin_ve_vl_vsral_vvsl +#define _vel_vsral_vvsvl __builtin_ve_vl_vsral_vvsvl +#define _vel_vsral_vvvmvl __builtin_ve_vl_vsral_vvvmvl +#define _vel_vsral_vvsmvl __builtin_ve_vl_vsral_vvsmvl +#define _vel_vsfa_vvssl __builtin_ve_vl_vsfa_vvssl +#define _vel_vsfa_vvssvl __builtin_ve_vl_vsfa_vvssvl +#define _vel_vsfa_vvssmvl __builtin_ve_vl_vsfa_vvssmvl +#define _vel_vfaddd_vvvl __builtin_ve_vl_vfaddd_vvvl +#define _vel_vfaddd_vvvvl __builtin_ve_vl_vfaddd_vvvvl +#define _vel_vfaddd_vsvl __builtin_ve_vl_vfaddd_vsvl +#define _vel_vfaddd_vsvvl __builtin_ve_vl_vfaddd_vsvvl +#define _vel_vfaddd_vvvmvl __builtin_ve_vl_vfaddd_vvvmvl +#define _vel_vfaddd_vsvmvl __builtin_ve_vl_vfaddd_vsvmvl +#define _vel_vfadds_vvvl __builtin_ve_vl_vfadds_vvvl +#define _vel_vfadds_vvvvl __builtin_ve_vl_vfadds_vvvvl +#define _vel_vfadds_vsvl __builtin_ve_vl_vfadds_vsvl +#define _vel_vfadds_vsvvl __builtin_ve_vl_vfadds_vsvvl +#define _vel_vfadds_vvvmvl __builtin_ve_vl_vfadds_vvvmvl +#define _vel_vfadds_vsvmvl __builtin_ve_vl_vfadds_vsvmvl +#define _vel_pvfadd_vvvl __builtin_ve_vl_pvfadd_vvvl +#define _vel_pvfadd_vvvvl __builtin_ve_vl_pvfadd_vvvvl +#define _vel_pvfadd_vsvl __builtin_ve_vl_pvfadd_vsvl +#define _vel_pvfadd_vsvvl __builtin_ve_vl_pvfadd_vsvvl +#define _vel_pvfadd_vvvMvl __builtin_ve_vl_pvfadd_vvvMvl +#define _vel_pvfadd_vsvMvl __builtin_ve_vl_pvfadd_vsvMvl +#define _vel_vfsubd_vvvl __builtin_ve_vl_vfsubd_vvvl +#define _vel_vfsubd_vvvvl __builtin_ve_vl_vfsubd_vvvvl +#define _vel_vfsubd_vsvl __builtin_ve_vl_vfsubd_vsvl +#define _vel_vfsubd_vsvvl __builtin_ve_vl_vfsubd_vsvvl +#define _vel_vfsubd_vvvmvl __builtin_ve_vl_vfsubd_vvvmvl +#define _vel_vfsubd_vsvmvl __builtin_ve_vl_vfsubd_vsvmvl +#define _vel_vfsubs_vvvl __builtin_ve_vl_vfsubs_vvvl +#define _vel_vfsubs_vvvvl __builtin_ve_vl_vfsubs_vvvvl +#define _vel_vfsubs_vsvl __builtin_ve_vl_vfsubs_vsvl +#define _vel_vfsubs_vsvvl __builtin_ve_vl_vfsubs_vsvvl +#define _vel_vfsubs_vvvmvl __builtin_ve_vl_vfsubs_vvvmvl +#define _vel_vfsubs_vsvmvl __builtin_ve_vl_vfsubs_vsvmvl +#define _vel_pvfsub_vvvl __builtin_ve_vl_pvfsub_vvvl +#define _vel_pvfsub_vvvvl __builtin_ve_vl_pvfsub_vvvvl +#define _vel_pvfsub_vsvl __builtin_ve_vl_pvfsub_vsvl +#define _vel_pvfsub_vsvvl __builtin_ve_vl_pvfsub_vsvvl +#define _vel_pvfsub_vvvMvl __builtin_ve_vl_pvfsub_vvvMvl +#define _vel_pvfsub_vsvMvl __builtin_ve_vl_pvfsub_vsvMvl +#define _vel_vfmuld_vvvl __builtin_ve_vl_vfmuld_vvvl +#define _vel_vfmuld_vvvvl __builtin_ve_vl_vfmuld_vvvvl +#define _vel_vfmuld_vsvl __builtin_ve_vl_vfmuld_vsvl +#define _vel_vfmuld_vsvvl __builtin_ve_vl_vfmuld_vsvvl +#define _vel_vfmuld_vvvmvl __builtin_ve_vl_vfmuld_vvvmvl +#define _vel_vfmuld_vsvmvl __builtin_ve_vl_vfmuld_vsvmvl +#define _vel_vfmuls_vvvl __builtin_ve_vl_vfmuls_vvvl +#define _vel_vfmuls_vvvvl __builtin_ve_vl_vfmuls_vvvvl +#define _vel_vfmuls_vsvl __builtin_ve_vl_vfmuls_vsvl +#define _vel_vfmuls_vsvvl __builtin_ve_vl_vfmuls_vsvvl +#define _vel_vfmuls_vvvmvl __builtin_ve_vl_vfmuls_vvvmvl +#define _vel_vfmuls_vsvmvl __builtin_ve_vl_vfmuls_vsvmvl +#define _vel_pvfmul_vvvl __builtin_ve_vl_pvfmul_vvvl +#define _vel_pvfmul_vvvvl __builtin_ve_vl_pvfmul_vvvvl +#define _vel_pvfmul_vsvl __builtin_ve_vl_pvfmul_vsvl +#define _vel_pvfmul_vsvvl __builtin_ve_vl_pvfmul_vsvvl +#define _vel_pvfmul_vvvMvl __builtin_ve_vl_pvfmul_vvvMvl +#define _vel_pvfmul_vsvMvl __builtin_ve_vl_pvfmul_vsvMvl +#define _vel_vfdivd_vvvl __builtin_ve_vl_vfdivd_vvvl +#define _vel_vfdivd_vvvvl __builtin_ve_vl_vfdivd_vvvvl +#define _vel_vfdivd_vsvl __builtin_ve_vl_vfdivd_vsvl +#define _vel_vfdivd_vsvvl __builtin_ve_vl_vfdivd_vsvvl +#define _vel_vfdivd_vvvmvl __builtin_ve_vl_vfdivd_vvvmvl +#define _vel_vfdivd_vsvmvl __builtin_ve_vl_vfdivd_vsvmvl +#define _vel_vfdivs_vvvl __builtin_ve_vl_vfdivs_vvvl +#define _vel_vfdivs_vvvvl __builtin_ve_vl_vfdivs_vvvvl +#define _vel_vfdivs_vsvl __builtin_ve_vl_vfdivs_vsvl +#define _vel_vfdivs_vsvvl __builtin_ve_vl_vfdivs_vsvvl +#define _vel_vfdivs_vvvmvl __builtin_ve_vl_vfdivs_vvvmvl +#define _vel_vfdivs_vsvmvl __builtin_ve_vl_vfdivs_vsvmvl +#define _vel_vfsqrtd_vvl __builtin_ve_vl_vfsqrtd_vvl +#define _vel_vfsqrtd_vvvl __builtin_ve_vl_vfsqrtd_vvvl +#define _vel_vfsqrts_vvl __builtin_ve_vl_vfsqrts_vvl +#define _vel_vfsqrts_vvvl __builtin_ve_vl_vfsqrts_vvvl +#define _vel_vfcmpd_vvvl __builtin_ve_vl_vfcmpd_vvvl +#define _vel_vfcmpd_vvvvl __builtin_ve_vl_vfcmpd_vvvvl +#define _vel_vfcmpd_vsvl __builtin_ve_vl_vfcmpd_vsvl +#define _vel_vfcmpd_vsvvl __builtin_ve_vl_vfcmpd_vsvvl +#define _vel_vfcmpd_vvvmvl __builtin_ve_vl_vfcmpd_vvvmvl +#define _vel_vfcmpd_vsvmvl __builtin_ve_vl_vfcmpd_vsvmvl +#define _vel_vfcmps_vvvl __builtin_ve_vl_vfcmps_vvvl +#define _vel_vfcmps_vvvvl __builtin_ve_vl_vfcmps_vvvvl +#define _vel_vfcmps_vsvl __builtin_ve_vl_vfcmps_vsvl +#define _vel_vfcmps_vsvvl __builtin_ve_vl_vfcmps_vsvvl +#define _vel_vfcmps_vvvmvl __builtin_ve_vl_vfcmps_vvvmvl +#define _vel_vfcmps_vsvmvl __builtin_ve_vl_vfcmps_vsvmvl +#define _vel_pvfcmp_vvvl __builtin_ve_vl_pvfcmp_vvvl +#define _vel_pvfcmp_vvvvl __builtin_ve_vl_pvfcmp_vvvvl +#define _vel_pvfcmp_vsvl __builtin_ve_vl_pvfcmp_vsvl +#define _vel_pvfcmp_vsvvl __builtin_ve_vl_pvfcmp_vsvvl +#define _vel_pvfcmp_vvvMvl __builtin_ve_vl_pvfcmp_vvvMvl +#define _vel_pvfcmp_vsvMvl __builtin_ve_vl_pvfcmp_vsvMvl +#define _vel_vfmaxd_vvvl __builtin_ve_vl_vfmaxd_vvvl +#define _vel_vfmaxd_vvvvl __builtin_ve_vl_vfmaxd_vvvvl +#define _vel_vfmaxd_vsvl __builtin_ve_vl_vfmaxd_vsvl +#define _vel_vfmaxd_vsvvl __builtin_ve_vl_vfmaxd_vsvvl +#define _vel_vfmaxd_vvvmvl __builtin_ve_vl_vfmaxd_vvvmvl +#define _vel_vfmaxd_vsvmvl __builtin_ve_vl_vfmaxd_vsvmvl +#define _vel_vfmaxs_vvvl __builtin_ve_vl_vfmaxs_vvvl +#define _vel_vfmaxs_vvvvl __builtin_ve_vl_vfmaxs_vvvvl +#define _vel_vfmaxs_vsvl __builtin_ve_vl_vfmaxs_vsvl +#define _vel_vfmaxs_vsvvl __builtin_ve_vl_vfmaxs_vsvvl +#define _vel_vfmaxs_vvvmvl __builtin_ve_vl_vfmaxs_vvvmvl +#define _vel_vfmaxs_vsvmvl __builtin_ve_vl_vfmaxs_vsvmvl +#define _vel_pvfmax_vvvl __builtin_ve_vl_pvfmax_vvvl +#define _vel_pvfmax_vvvvl __builtin_ve_vl_pvfmax_vvvvl +#define _vel_pvfmax_vsvl __builtin_ve_vl_pvfmax_vsvl +#define _vel_pvfmax_vsvvl __builtin_ve_vl_pvfmax_vsvvl +#define _vel_pvfmax_vvvMvl __builtin_ve_vl_pvfmax_vvvMvl +#define _vel_pvfmax_vsvMvl __builtin_ve_vl_pvfmax_vsvMvl +#define _vel_vfmind_vvvl __builtin_ve_vl_vfmind_vvvl +#define _vel_vfmind_vvvvl __builtin_ve_vl_vfmind_vvvvl +#define _vel_vfmind_vsvl __builtin_ve_vl_vfmind_vsvl +#define _vel_vfmind_vsvvl __builtin_ve_vl_vfmind_vsvvl +#define _vel_vfmind_vvvmvl __builtin_ve_vl_vfmind_vvvmvl +#define _vel_vfmind_vsvmvl __builtin_ve_vl_vfmind_vsvmvl +#define _vel_vfmins_vvvl __builtin_ve_vl_vfmins_vvvl +#define _vel_vfmins_vvvvl __builtin_ve_vl_vfmins_vvvvl +#define _vel_vfmins_vsvl __builtin_ve_vl_vfmins_vsvl +#define _vel_vfmins_vsvvl __builtin_ve_vl_vfmins_vsvvl +#define _vel_vfmins_vvvmvl __builtin_ve_vl_vfmins_vvvmvl +#define _vel_vfmins_vsvmvl __builtin_ve_vl_vfmins_vsvmvl +#define _vel_pvfmin_vvvl __builtin_ve_vl_pvfmin_vvvl +#define _vel_pvfmin_vvvvl __builtin_ve_vl_pvfmin_vvvvl +#define _vel_pvfmin_vsvl __builtin_ve_vl_pvfmin_vsvl +#define _vel_pvfmin_vsvvl __builtin_ve_vl_pvfmin_vsvvl +#define _vel_pvfmin_vvvMvl __builtin_ve_vl_pvfmin_vvvMvl +#define _vel_pvfmin_vsvMvl __builtin_ve_vl_pvfmin_vsvMvl +#define _vel_vfmadd_vvvvl __builtin_ve_vl_vfmadd_vvvvl +#define _vel_vfmadd_vvvvvl __builtin_ve_vl_vfmadd_vvvvvl +#define _vel_vfmadd_vsvvl __builtin_ve_vl_vfmadd_vsvvl +#define _vel_vfmadd_vsvvvl __builtin_ve_vl_vfmadd_vsvvvl +#define _vel_vfmadd_vvsvl __builtin_ve_vl_vfmadd_vvsvl +#define _vel_vfmadd_vvsvvl __builtin_ve_vl_vfmadd_vvsvvl +#define _vel_vfmadd_vvvvmvl __builtin_ve_vl_vfmadd_vvvvmvl +#define _vel_vfmadd_vsvvmvl __builtin_ve_vl_vfmadd_vsvvmvl +#define _vel_vfmadd_vvsvmvl __builtin_ve_vl_vfmadd_vvsvmvl +#define _vel_vfmads_vvvvl __builtin_ve_vl_vfmads_vvvvl +#define _vel_vfmads_vvvvvl __builtin_ve_vl_vfmads_vvvvvl +#define _vel_vfmads_vsvvl __builtin_ve_vl_vfmads_vsvvl +#define _vel_vfmads_vsvvvl __builtin_ve_vl_vfmads_vsvvvl +#define _vel_vfmads_vvsvl __builtin_ve_vl_vfmads_vvsvl +#define _vel_vfmads_vvsvvl __builtin_ve_vl_vfmads_vvsvvl +#define _vel_vfmads_vvvvmvl __builtin_ve_vl_vfmads_vvvvmvl +#define _vel_vfmads_vsvvmvl __builtin_ve_vl_vfmads_vsvvmvl +#define _vel_vfmads_vvsvmvl __builtin_ve_vl_vfmads_vvsvmvl +#define _vel_pvfmad_vvvvl __builtin_ve_vl_pvfmad_vvvvl +#define _vel_pvfmad_vvvvvl __builtin_ve_vl_pvfmad_vvvvvl +#define _vel_pvfmad_vsvvl __builtin_ve_vl_pvfmad_vsvvl +#define _vel_pvfmad_vsvvvl __builtin_ve_vl_pvfmad_vsvvvl +#define _vel_pvfmad_vvsvl __builtin_ve_vl_pvfmad_vvsvl +#define _vel_pvfmad_vvsvvl __builtin_ve_vl_pvfmad_vvsvvl +#define _vel_pvfmad_vvvvMvl __builtin_ve_vl_pvfmad_vvvvMvl +#define _vel_pvfmad_vsvvMvl __builtin_ve_vl_pvfmad_vsvvMvl +#define _vel_pvfmad_vvsvMvl __builtin_ve_vl_pvfmad_vvsvMvl +#define _vel_vfmsbd_vvvvl __builtin_ve_vl_vfmsbd_vvvvl +#define _vel_vfmsbd_vvvvvl __builtin_ve_vl_vfmsbd_vvvvvl +#define _vel_vfmsbd_vsvvl __builtin_ve_vl_vfmsbd_vsvvl +#define _vel_vfmsbd_vsvvvl __builtin_ve_vl_vfmsbd_vsvvvl +#define _vel_vfmsbd_vvsvl __builtin_ve_vl_vfmsbd_vvsvl +#define _vel_vfmsbd_vvsvvl __builtin_ve_vl_vfmsbd_vvsvvl +#define _vel_vfmsbd_vvvvmvl __builtin_ve_vl_vfmsbd_vvvvmvl +#define _vel_vfmsbd_vsvvmvl __builtin_ve_vl_vfmsbd_vsvvmvl +#define _vel_vfmsbd_vvsvmvl __builtin_ve_vl_vfmsbd_vvsvmvl +#define _vel_vfmsbs_vvvvl __builtin_ve_vl_vfmsbs_vvvvl +#define _vel_vfmsbs_vvvvvl __builtin_ve_vl_vfmsbs_vvvvvl +#define _vel_vfmsbs_vsvvl __builtin_ve_vl_vfmsbs_vsvvl +#define _vel_vfmsbs_vsvvvl __builtin_ve_vl_vfmsbs_vsvvvl +#define _vel_vfmsbs_vvsvl __builtin_ve_vl_vfmsbs_vvsvl +#define _vel_vfmsbs_vvsvvl __builtin_ve_vl_vfmsbs_vvsvvl +#define _vel_vfmsbs_vvvvmvl __builtin_ve_vl_vfmsbs_vvvvmvl +#define _vel_vfmsbs_vsvvmvl __builtin_ve_vl_vfmsbs_vsvvmvl +#define _vel_vfmsbs_vvsvmvl __builtin_ve_vl_vfmsbs_vvsvmvl +#define _vel_pvfmsb_vvvvl __builtin_ve_vl_pvfmsb_vvvvl +#define _vel_pvfmsb_vvvvvl __builtin_ve_vl_pvfmsb_vvvvvl +#define _vel_pvfmsb_vsvvl __builtin_ve_vl_pvfmsb_vsvvl +#define _vel_pvfmsb_vsvvvl __builtin_ve_vl_pvfmsb_vsvvvl +#define _vel_pvfmsb_vvsvl __builtin_ve_vl_pvfmsb_vvsvl +#define _vel_pvfmsb_vvsvvl __builtin_ve_vl_pvfmsb_vvsvvl +#define _vel_pvfmsb_vvvvMvl __builtin_ve_vl_pvfmsb_vvvvMvl +#define _vel_pvfmsb_vsvvMvl __builtin_ve_vl_pvfmsb_vsvvMvl +#define _vel_pvfmsb_vvsvMvl __builtin_ve_vl_pvfmsb_vvsvMvl +#define _vel_vfnmadd_vvvvl __builtin_ve_vl_vfnmadd_vvvvl +#define _vel_vfnmadd_vvvvvl __builtin_ve_vl_vfnmadd_vvvvvl +#define _vel_vfnmadd_vsvvl __builtin_ve_vl_vfnmadd_vsvvl +#define _vel_vfnmadd_vsvvvl __builtin_ve_vl_vfnmadd_vsvvvl +#define _vel_vfnmadd_vvsvl __builtin_ve_vl_vfnmadd_vvsvl +#define _vel_vfnmadd_vvsvvl __builtin_ve_vl_vfnmadd_vvsvvl +#define _vel_vfnmadd_vvvvmvl __builtin_ve_vl_vfnmadd_vvvvmvl +#define _vel_vfnmadd_vsvvmvl __builtin_ve_vl_vfnmadd_vsvvmvl +#define _vel_vfnmadd_vvsvmvl __builtin_ve_vl_vfnmadd_vvsvmvl +#define _vel_vfnmads_vvvvl __builtin_ve_vl_vfnmads_vvvvl +#define _vel_vfnmads_vvvvvl __builtin_ve_vl_vfnmads_vvvvvl +#define _vel_vfnmads_vsvvl __builtin_ve_vl_vfnmads_vsvvl +#define _vel_vfnmads_vsvvvl __builtin_ve_vl_vfnmads_vsvvvl +#define _vel_vfnmads_vvsvl __builtin_ve_vl_vfnmads_vvsvl +#define _vel_vfnmads_vvsvvl __builtin_ve_vl_vfnmads_vvsvvl +#define _vel_vfnmads_vvvvmvl __builtin_ve_vl_vfnmads_vvvvmvl +#define _vel_vfnmads_vsvvmvl __builtin_ve_vl_vfnmads_vsvvmvl +#define _vel_vfnmads_vvsvmvl __builtin_ve_vl_vfnmads_vvsvmvl +#define _vel_pvfnmad_vvvvl __builtin_ve_vl_pvfnmad_vvvvl +#define _vel_pvfnmad_vvvvvl __builtin_ve_vl_pvfnmad_vvvvvl +#define _vel_pvfnmad_vsvvl __builtin_ve_vl_pvfnmad_vsvvl +#define _vel_pvfnmad_vsvvvl __builtin_ve_vl_pvfnmad_vsvvvl +#define _vel_pvfnmad_vvsvl __builtin_ve_vl_pvfnmad_vvsvl +#define _vel_pvfnmad_vvsvvl __builtin_ve_vl_pvfnmad_vvsvvl +#define _vel_pvfnmad_vvvvMvl __builtin_ve_vl_pvfnmad_vvvvMvl +#define _vel_pvfnmad_vsvvMvl __builtin_ve_vl_pvfnmad_vsvvMvl +#define _vel_pvfnmad_vvsvMvl __builtin_ve_vl_pvfnmad_vvsvMvl +#define _vel_vfnmsbd_vvvvl __builtin_ve_vl_vfnmsbd_vvvvl +#define _vel_vfnmsbd_vvvvvl __builtin_ve_vl_vfnmsbd_vvvvvl +#define _vel_vfnmsbd_vsvvl __builtin_ve_vl_vfnmsbd_vsvvl +#define _vel_vfnmsbd_vsvvvl __builtin_ve_vl_vfnmsbd_vsvvvl +#define _vel_vfnmsbd_vvsvl __builtin_ve_vl_vfnmsbd_vvsvl +#define _vel_vfnmsbd_vvsvvl __builtin_ve_vl_vfnmsbd_vvsvvl +#define _vel_vfnmsbd_vvvvmvl __builtin_ve_vl_vfnmsbd_vvvvmvl +#define _vel_vfnmsbd_vsvvmvl __builtin_ve_vl_vfnmsbd_vsvvmvl +#define _vel_vfnmsbd_vvsvmvl __builtin_ve_vl_vfnmsbd_vvsvmvl +#define _vel_vfnmsbs_vvvvl __builtin_ve_vl_vfnmsbs_vvvvl +#define _vel_vfnmsbs_vvvvvl __builtin_ve_vl_vfnmsbs_vvvvvl +#define _vel_vfnmsbs_vsvvl __builtin_ve_vl_vfnmsbs_vsvvl +#define _vel_vfnmsbs_vsvvvl __builtin_ve_vl_vfnmsbs_vsvvvl +#define _vel_vfnmsbs_vvsvl __builtin_ve_vl_vfnmsbs_vvsvl +#define _vel_vfnmsbs_vvsvvl __builtin_ve_vl_vfnmsbs_vvsvvl +#define _vel_vfnmsbs_vvvvmvl __builtin_ve_vl_vfnmsbs_vvvvmvl +#define _vel_vfnmsbs_vsvvmvl __builtin_ve_vl_vfnmsbs_vsvvmvl +#define _vel_vfnmsbs_vvsvmvl __builtin_ve_vl_vfnmsbs_vvsvmvl +#define _vel_pvfnmsb_vvvvl __builtin_ve_vl_pvfnmsb_vvvvl +#define _vel_pvfnmsb_vvvvvl __builtin_ve_vl_pvfnmsb_vvvvvl +#define _vel_pvfnmsb_vsvvl __builtin_ve_vl_pvfnmsb_vsvvl +#define _vel_pvfnmsb_vsvvvl __builtin_ve_vl_pvfnmsb_vsvvvl +#define _vel_pvfnmsb_vvsvl __builtin_ve_vl_pvfnmsb_vvsvl +#define _vel_pvfnmsb_vvsvvl __builtin_ve_vl_pvfnmsb_vvsvvl +#define _vel_pvfnmsb_vvvvMvl __builtin_ve_vl_pvfnmsb_vvvvMvl +#define _vel_pvfnmsb_vsvvMvl __builtin_ve_vl_pvfnmsb_vsvvMvl +#define _vel_pvfnmsb_vvsvMvl __builtin_ve_vl_pvfnmsb_vvsvMvl +#define _vel_vrcpd_vvl __builtin_ve_vl_vrcpd_vvl +#define _vel_vrcpd_vvvl __builtin_ve_vl_vrcpd_vvvl +#define _vel_vrcps_vvl __builtin_ve_vl_vrcps_vvl +#define _vel_vrcps_vvvl __builtin_ve_vl_vrcps_vvvl +#define _vel_pvrcp_vvl __builtin_ve_vl_pvrcp_vvl +#define _vel_pvrcp_vvvl __builtin_ve_vl_pvrcp_vvvl +#define _vel_vrsqrtd_vvl __builtin_ve_vl_vrsqrtd_vvl +#define _vel_vrsqrtd_vvvl __builtin_ve_vl_vrsqrtd_vvvl +#define _vel_vrsqrts_vvl __builtin_ve_vl_vrsqrts_vvl +#define _vel_vrsqrts_vvvl __builtin_ve_vl_vrsqrts_vvvl +#define _vel_pvrsqrt_vvl __builtin_ve_vl_pvrsqrt_vvl +#define _vel_pvrsqrt_vvvl __builtin_ve_vl_pvrsqrt_vvvl +#define _vel_vrsqrtdnex_vvl __builtin_ve_vl_vrsqrtdnex_vvl +#define _vel_vrsqrtdnex_vvvl __builtin_ve_vl_vrsqrtdnex_vvvl +#define _vel_vrsqrtsnex_vvl __builtin_ve_vl_vrsqrtsnex_vvl +#define _vel_vrsqrtsnex_vvvl __builtin_ve_vl_vrsqrtsnex_vvvl +#define _vel_pvrsqrtnex_vvl __builtin_ve_vl_pvrsqrtnex_vvl +#define _vel_pvrsqrtnex_vvvl __builtin_ve_vl_pvrsqrtnex_vvvl +#define _vel_vcvtwdsx_vvl __builtin_ve_vl_vcvtwdsx_vvl +#define _vel_vcvtwdsx_vvvl __builtin_ve_vl_vcvtwdsx_vvvl +#define _vel_vcvtwdsx_vvmvl __builtin_ve_vl_vcvtwdsx_vvmvl +#define _vel_vcvtwdsxrz_vvl __builtin_ve_vl_vcvtwdsxrz_vvl +#define _vel_vcvtwdsxrz_vvvl __builtin_ve_vl_vcvtwdsxrz_vvvl +#define _vel_vcvtwdsxrz_vvmvl __builtin_ve_vl_vcvtwdsxrz_vvmvl +#define _vel_vcvtwdzx_vvl __builtin_ve_vl_vcvtwdzx_vvl +#define _vel_vcvtwdzx_vvvl __builtin_ve_vl_vcvtwdzx_vvvl +#define _vel_vcvtwdzx_vvmvl __builtin_ve_vl_vcvtwdzx_vvmvl +#define _vel_vcvtwdzxrz_vvl __builtin_ve_vl_vcvtwdzxrz_vvl +#define _vel_vcvtwdzxrz_vvvl __builtin_ve_vl_vcvtwdzxrz_vvvl +#define _vel_vcvtwdzxrz_vvmvl __builtin_ve_vl_vcvtwdzxrz_vvmvl +#define _vel_vcvtwssx_vvl __builtin_ve_vl_vcvtwssx_vvl +#define _vel_vcvtwssx_vvvl __builtin_ve_vl_vcvtwssx_vvvl +#define _vel_vcvtwssx_vvmvl __builtin_ve_vl_vcvtwssx_vvmvl +#define _vel_vcvtwssxrz_vvl __builtin_ve_vl_vcvtwssxrz_vvl +#define _vel_vcvtwssxrz_vvvl __builtin_ve_vl_vcvtwssxrz_vvvl +#define _vel_vcvtwssxrz_vvmvl __builtin_ve_vl_vcvtwssxrz_vvmvl +#define _vel_vcvtwszx_vvl __builtin_ve_vl_vcvtwszx_vvl +#define _vel_vcvtwszx_vvvl __builtin_ve_vl_vcvtwszx_vvvl +#define _vel_vcvtwszx_vvmvl __builtin_ve_vl_vcvtwszx_vvmvl +#define _vel_vcvtwszxrz_vvl __builtin_ve_vl_vcvtwszxrz_vvl +#define _vel_vcvtwszxrz_vvvl __builtin_ve_vl_vcvtwszxrz_vvvl +#define _vel_vcvtwszxrz_vvmvl __builtin_ve_vl_vcvtwszxrz_vvmvl +#define _vel_pvcvtws_vvl __builtin_ve_vl_pvcvtws_vvl +#define _vel_pvcvtws_vvvl __builtin_ve_vl_pvcvtws_vvvl +#define _vel_pvcvtws_vvMvl __builtin_ve_vl_pvcvtws_vvMvl +#define _vel_pvcvtwsrz_vvl __builtin_ve_vl_pvcvtwsrz_vvl +#define _vel_pvcvtwsrz_vvvl __builtin_ve_vl_pvcvtwsrz_vvvl +#define _vel_pvcvtwsrz_vvMvl __builtin_ve_vl_pvcvtwsrz_vvMvl +#define _vel_vcvtld_vvl __builtin_ve_vl_vcvtld_vvl +#define _vel_vcvtld_vvvl __builtin_ve_vl_vcvtld_vvvl +#define _vel_vcvtld_vvmvl __builtin_ve_vl_vcvtld_vvmvl +#define _vel_vcvtldrz_vvl __builtin_ve_vl_vcvtldrz_vvl +#define _vel_vcvtldrz_vvvl __builtin_ve_vl_vcvtldrz_vvvl +#define _vel_vcvtldrz_vvmvl __builtin_ve_vl_vcvtldrz_vvmvl +#define _vel_vcvtdw_vvl __builtin_ve_vl_vcvtdw_vvl +#define _vel_vcvtdw_vvvl __builtin_ve_vl_vcvtdw_vvvl +#define _vel_vcvtsw_vvl __builtin_ve_vl_vcvtsw_vvl +#define _vel_vcvtsw_vvvl __builtin_ve_vl_vcvtsw_vvvl +#define _vel_pvcvtsw_vvl __builtin_ve_vl_pvcvtsw_vvl +#define _vel_pvcvtsw_vvvl __builtin_ve_vl_pvcvtsw_vvvl +#define _vel_vcvtdl_vvl __builtin_ve_vl_vcvtdl_vvl +#define _vel_vcvtdl_vvvl __builtin_ve_vl_vcvtdl_vvvl +#define _vel_vcvtds_vvl __builtin_ve_vl_vcvtds_vvl +#define _vel_vcvtds_vvvl __builtin_ve_vl_vcvtds_vvvl +#define _vel_vcvtsd_vvl __builtin_ve_vl_vcvtsd_vvl +#define _vel_vcvtsd_vvvl __builtin_ve_vl_vcvtsd_vvvl +#define _vel_vmrg_vvvml __builtin_ve_vl_vmrg_vvvml +#define _vel_vmrg_vvvmvl __builtin_ve_vl_vmrg_vvvmvl +#define _vel_vmrg_vsvml __builtin_ve_vl_vmrg_vsvml +#define _vel_vmrg_vsvmvl __builtin_ve_vl_vmrg_vsvmvl +#define _vel_vmrgw_vvvMl __builtin_ve_vl_vmrgw_vvvMl +#define _vel_vmrgw_vvvMvl __builtin_ve_vl_vmrgw_vvvMvl +#define _vel_vmrgw_vsvMl __builtin_ve_vl_vmrgw_vsvMl +#define _vel_vmrgw_vsvMvl __builtin_ve_vl_vmrgw_vsvMvl +#define _vel_vshf_vvvsl __builtin_ve_vl_vshf_vvvsl +#define _vel_vshf_vvvsvl __builtin_ve_vl_vshf_vvvsvl +#define _vel_vcp_vvmvl __builtin_ve_vl_vcp_vvmvl +#define _vel_vex_vvmvl __builtin_ve_vl_vex_vvmvl +#define _vel_vfmklat_ml __builtin_ve_vl_vfmklat_ml +#define _vel_vfmklaf_ml __builtin_ve_vl_vfmklaf_ml +#define _vel_pvfmkat_Ml __builtin_ve_vl_pvfmkat_Ml +#define _vel_pvfmkaf_Ml __builtin_ve_vl_pvfmkaf_Ml +#define _vel_vfmklgt_mvl __builtin_ve_vl_vfmklgt_mvl +#define _vel_vfmklgt_mvml __builtin_ve_vl_vfmklgt_mvml +#define _vel_vfmkllt_mvl __builtin_ve_vl_vfmkllt_mvl +#define _vel_vfmkllt_mvml __builtin_ve_vl_vfmkllt_mvml +#define _vel_vfmklne_mvl __builtin_ve_vl_vfmklne_mvl +#define _vel_vfmklne_mvml __builtin_ve_vl_vfmklne_mvml +#define _vel_vfmkleq_mvl __builtin_ve_vl_vfmkleq_mvl +#define _vel_vfmkleq_mvml __builtin_ve_vl_vfmkleq_mvml +#define _vel_vfmklge_mvl __builtin_ve_vl_vfmklge_mvl +#define _vel_vfmklge_mvml __builtin_ve_vl_vfmklge_mvml +#define _vel_vfmklle_mvl __builtin_ve_vl_vfmklle_mvl +#define _vel_vfmklle_mvml __builtin_ve_vl_vfmklle_mvml +#define _vel_vfmklnum_mvl __builtin_ve_vl_vfmklnum_mvl +#define _vel_vfmklnum_mvml __builtin_ve_vl_vfmklnum_mvml +#define _vel_vfmklnan_mvl __builtin_ve_vl_vfmklnan_mvl +#define _vel_vfmklnan_mvml __builtin_ve_vl_vfmklnan_mvml +#define _vel_vfmklgtnan_mvl __builtin_ve_vl_vfmklgtnan_mvl +#define _vel_vfmklgtnan_mvml __builtin_ve_vl_vfmklgtnan_mvml +#define _vel_vfmklltnan_mvl __builtin_ve_vl_vfmklltnan_mvl +#define _vel_vfmklltnan_mvml __builtin_ve_vl_vfmklltnan_mvml +#define _vel_vfmklnenan_mvl __builtin_ve_vl_vfmklnenan_mvl +#define _vel_vfmklnenan_mvml __builtin_ve_vl_vfmklnenan_mvml +#define _vel_vfmkleqnan_mvl __builtin_ve_vl_vfmkleqnan_mvl +#define _vel_vfmkleqnan_mvml __builtin_ve_vl_vfmkleqnan_mvml +#define _vel_vfmklgenan_mvl __builtin_ve_vl_vfmklgenan_mvl +#define _vel_vfmklgenan_mvml __builtin_ve_vl_vfmklgenan_mvml +#define _vel_vfmkllenan_mvl __builtin_ve_vl_vfmkllenan_mvl +#define _vel_vfmkllenan_mvml __builtin_ve_vl_vfmkllenan_mvml +#define _vel_vfmkwgt_mvl __builtin_ve_vl_vfmkwgt_mvl +#define _vel_vfmkwgt_mvml __builtin_ve_vl_vfmkwgt_mvml +#define _vel_vfmkwlt_mvl __builtin_ve_vl_vfmkwlt_mvl +#define _vel_vfmkwlt_mvml __builtin_ve_vl_vfmkwlt_mvml +#define _vel_vfmkwne_mvl __builtin_ve_vl_vfmkwne_mvl +#define _vel_vfmkwne_mvml __builtin_ve_vl_vfmkwne_mvml +#define _vel_vfmkweq_mvl __builtin_ve_vl_vfmkweq_mvl +#define _vel_vfmkweq_mvml __builtin_ve_vl_vfmkweq_mvml +#define _vel_vfmkwge_mvl __builtin_ve_vl_vfmkwge_mvl +#define _vel_vfmkwge_mvml __builtin_ve_vl_vfmkwge_mvml +#define _vel_vfmkwle_mvl __builtin_ve_vl_vfmkwle_mvl +#define _vel_vfmkwle_mvml __builtin_ve_vl_vfmkwle_mvml +#define _vel_vfmkwnum_mvl __builtin_ve_vl_vfmkwnum_mvl +#define _vel_vfmkwnum_mvml __builtin_ve_vl_vfmkwnum_mvml +#define _vel_vfmkwnan_mvl __builtin_ve_vl_vfmkwnan_mvl +#define _vel_vfmkwnan_mvml __builtin_ve_vl_vfmkwnan_mvml +#define _vel_vfmkwgtnan_mvl __builtin_ve_vl_vfmkwgtnan_mvl +#define _vel_vfmkwgtnan_mvml __builtin_ve_vl_vfmkwgtnan_mvml +#define _vel_vfmkwltnan_mvl __builtin_ve_vl_vfmkwltnan_mvl +#define _vel_vfmkwltnan_mvml __builtin_ve_vl_vfmkwltnan_mvml +#define _vel_vfmkwnenan_mvl __builtin_ve_vl_vfmkwnenan_mvl +#define _vel_vfmkwnenan_mvml __builtin_ve_vl_vfmkwnenan_mvml +#define _vel_vfmkweqnan_mvl __builtin_ve_vl_vfmkweqnan_mvl +#define _vel_vfmkweqnan_mvml __builtin_ve_vl_vfmkweqnan_mvml +#define _vel_vfmkwgenan_mvl __builtin_ve_vl_vfmkwgenan_mvl +#define _vel_vfmkwgenan_mvml __builtin_ve_vl_vfmkwgenan_mvml +#define _vel_vfmkwlenan_mvl __builtin_ve_vl_vfmkwlenan_mvl +#define _vel_vfmkwlenan_mvml __builtin_ve_vl_vfmkwlenan_mvml +#define _vel_pvfmkwlogt_mvl __builtin_ve_vl_pvfmkwlogt_mvl +#define _vel_pvfmkwupgt_mvl __builtin_ve_vl_pvfmkwupgt_mvl +#define _vel_pvfmkwlogt_mvml __builtin_ve_vl_pvfmkwlogt_mvml +#define _vel_pvfmkwupgt_mvml __builtin_ve_vl_pvfmkwupgt_mvml +#define _vel_pvfmkwlolt_mvl __builtin_ve_vl_pvfmkwlolt_mvl +#define _vel_pvfmkwuplt_mvl __builtin_ve_vl_pvfmkwuplt_mvl +#define _vel_pvfmkwlolt_mvml __builtin_ve_vl_pvfmkwlolt_mvml +#define _vel_pvfmkwuplt_mvml __builtin_ve_vl_pvfmkwuplt_mvml +#define _vel_pvfmkwlone_mvl __builtin_ve_vl_pvfmkwlone_mvl +#define _vel_pvfmkwupne_mvl __builtin_ve_vl_pvfmkwupne_mvl +#define _vel_pvfmkwlone_mvml __builtin_ve_vl_pvfmkwlone_mvml +#define _vel_pvfmkwupne_mvml __builtin_ve_vl_pvfmkwupne_mvml +#define _vel_pvfmkwloeq_mvl __builtin_ve_vl_pvfmkwloeq_mvl +#define _vel_pvfmkwupeq_mvl __builtin_ve_vl_pvfmkwupeq_mvl +#define _vel_pvfmkwloeq_mvml __builtin_ve_vl_pvfmkwloeq_mvml +#define _vel_pvfmkwupeq_mvml __builtin_ve_vl_pvfmkwupeq_mvml +#define _vel_pvfmkwloge_mvl __builtin_ve_vl_pvfmkwloge_mvl +#define _vel_pvfmkwupge_mvl __builtin_ve_vl_pvfmkwupge_mvl +#define _vel_pvfmkwloge_mvml __builtin_ve_vl_pvfmkwloge_mvml +#define _vel_pvfmkwupge_mvml __builtin_ve_vl_pvfmkwupge_mvml +#define _vel_pvfmkwlole_mvl __builtin_ve_vl_pvfmkwlole_mvl +#define _vel_pvfmkwuple_mvl __builtin_ve_vl_pvfmkwuple_mvl +#define _vel_pvfmkwlole_mvml __builtin_ve_vl_pvfmkwlole_mvml +#define _vel_pvfmkwuple_mvml __builtin_ve_vl_pvfmkwuple_mvml +#define _vel_pvfmkwlonum_mvl __builtin_ve_vl_pvfmkwlonum_mvl +#define _vel_pvfmkwupnum_mvl __builtin_ve_vl_pvfmkwupnum_mvl +#define _vel_pvfmkwlonum_mvml __builtin_ve_vl_pvfmkwlonum_mvml +#define _vel_pvfmkwupnum_mvml __builtin_ve_vl_pvfmkwupnum_mvml +#define _vel_pvfmkwlonan_mvl __builtin_ve_vl_pvfmkwlonan_mvl +#define _vel_pvfmkwupnan_mvl __builtin_ve_vl_pvfmkwupnan_mvl +#define _vel_pvfmkwlonan_mvml __builtin_ve_vl_pvfmkwlonan_mvml +#define _vel_pvfmkwupnan_mvml __builtin_ve_vl_pvfmkwupnan_mvml +#define _vel_pvfmkwlogtnan_mvl __builtin_ve_vl_pvfmkwlogtnan_mvl +#define _vel_pvfmkwupgtnan_mvl __builtin_ve_vl_pvfmkwupgtnan_mvl +#define _vel_pvfmkwlogtnan_mvml __builtin_ve_vl_pvfmkwlogtnan_mvml +#define _vel_pvfmkwupgtnan_mvml __builtin_ve_vl_pvfmkwupgtnan_mvml +#define _vel_pvfmkwloltnan_mvl __builtin_ve_vl_pvfmkwloltnan_mvl +#define _vel_pvfmkwupltnan_mvl __builtin_ve_vl_pvfmkwupltnan_mvl +#define _vel_pvfmkwloltnan_mvml __builtin_ve_vl_pvfmkwloltnan_mvml +#define _vel_pvfmkwupltnan_mvml __builtin_ve_vl_pvfmkwupltnan_mvml +#define _vel_pvfmkwlonenan_mvl __builtin_ve_vl_pvfmkwlonenan_mvl +#define _vel_pvfmkwupnenan_mvl __builtin_ve_vl_pvfmkwupnenan_mvl +#define _vel_pvfmkwlonenan_mvml __builtin_ve_vl_pvfmkwlonenan_mvml +#define _vel_pvfmkwupnenan_mvml __builtin_ve_vl_pvfmkwupnenan_mvml +#define _vel_pvfmkwloeqnan_mvl __builtin_ve_vl_pvfmkwloeqnan_mvl +#define _vel_pvfmkwupeqnan_mvl __builtin_ve_vl_pvfmkwupeqnan_mvl +#define _vel_pvfmkwloeqnan_mvml __builtin_ve_vl_pvfmkwloeqnan_mvml +#define _vel_pvfmkwupeqnan_mvml __builtin_ve_vl_pvfmkwupeqnan_mvml +#define _vel_pvfmkwlogenan_mvl __builtin_ve_vl_pvfmkwlogenan_mvl +#define _vel_pvfmkwupgenan_mvl __builtin_ve_vl_pvfmkwupgenan_mvl +#define _vel_pvfmkwlogenan_mvml __builtin_ve_vl_pvfmkwlogenan_mvml +#define _vel_pvfmkwupgenan_mvml __builtin_ve_vl_pvfmkwupgenan_mvml +#define _vel_pvfmkwlolenan_mvl __builtin_ve_vl_pvfmkwlolenan_mvl +#define _vel_pvfmkwuplenan_mvl __builtin_ve_vl_pvfmkwuplenan_mvl +#define _vel_pvfmkwlolenan_mvml __builtin_ve_vl_pvfmkwlolenan_mvml +#define _vel_pvfmkwuplenan_mvml __builtin_ve_vl_pvfmkwuplenan_mvml +#define _vel_pvfmkwgt_Mvl __builtin_ve_vl_pvfmkwgt_Mvl +#define _vel_pvfmkwgt_MvMl __builtin_ve_vl_pvfmkwgt_MvMl +#define _vel_pvfmkwlt_Mvl __builtin_ve_vl_pvfmkwlt_Mvl +#define _vel_pvfmkwlt_MvMl __builtin_ve_vl_pvfmkwlt_MvMl +#define _vel_pvfmkwne_Mvl __builtin_ve_vl_pvfmkwne_Mvl +#define _vel_pvfmkwne_MvMl __builtin_ve_vl_pvfmkwne_MvMl +#define _vel_pvfmkweq_Mvl __builtin_ve_vl_pvfmkweq_Mvl +#define _vel_pvfmkweq_MvMl __builtin_ve_vl_pvfmkweq_MvMl +#define _vel_pvfmkwge_Mvl __builtin_ve_vl_pvfmkwge_Mvl +#define _vel_pvfmkwge_MvMl __builtin_ve_vl_pvfmkwge_MvMl +#define _vel_pvfmkwle_Mvl __builtin_ve_vl_pvfmkwle_Mvl +#define _vel_pvfmkwle_MvMl __builtin_ve_vl_pvfmkwle_MvMl +#define _vel_pvfmkwnum_Mvl __builtin_ve_vl_pvfmkwnum_Mvl +#define _vel_pvfmkwnum_MvMl __builtin_ve_vl_pvfmkwnum_MvMl +#define _vel_pvfmkwnan_Mvl __builtin_ve_vl_pvfmkwnan_Mvl +#define _vel_pvfmkwnan_MvMl __builtin_ve_vl_pvfmkwnan_MvMl +#define _vel_pvfmkwgtnan_Mvl __builtin_ve_vl_pvfmkwgtnan_Mvl +#define _vel_pvfmkwgtnan_MvMl __builtin_ve_vl_pvfmkwgtnan_MvMl +#define _vel_pvfmkwltnan_Mvl __builtin_ve_vl_pvfmkwltnan_Mvl +#define _vel_pvfmkwltnan_MvMl __builtin_ve_vl_pvfmkwltnan_MvMl +#define _vel_pvfmkwnenan_Mvl __builtin_ve_vl_pvfmkwnenan_Mvl +#define _vel_pvfmkwnenan_MvMl __builtin_ve_vl_pvfmkwnenan_MvMl +#define _vel_pvfmkweqnan_Mvl __builtin_ve_vl_pvfmkweqnan_Mvl +#define _vel_pvfmkweqnan_MvMl __builtin_ve_vl_pvfmkweqnan_MvMl +#define _vel_pvfmkwgenan_Mvl __builtin_ve_vl_pvfmkwgenan_Mvl +#define _vel_pvfmkwgenan_MvMl __builtin_ve_vl_pvfmkwgenan_MvMl +#define _vel_pvfmkwlenan_Mvl __builtin_ve_vl_pvfmkwlenan_Mvl +#define _vel_pvfmkwlenan_MvMl __builtin_ve_vl_pvfmkwlenan_MvMl +#define _vel_vfmkdgt_mvl __builtin_ve_vl_vfmkdgt_mvl +#define _vel_vfmkdgt_mvml __builtin_ve_vl_vfmkdgt_mvml +#define _vel_vfmkdlt_mvl __builtin_ve_vl_vfmkdlt_mvl +#define _vel_vfmkdlt_mvml __builtin_ve_vl_vfmkdlt_mvml +#define _vel_vfmkdne_mvl __builtin_ve_vl_vfmkdne_mvl +#define _vel_vfmkdne_mvml __builtin_ve_vl_vfmkdne_mvml +#define _vel_vfmkdeq_mvl __builtin_ve_vl_vfmkdeq_mvl +#define _vel_vfmkdeq_mvml __builtin_ve_vl_vfmkdeq_mvml +#define _vel_vfmkdge_mvl __builtin_ve_vl_vfmkdge_mvl +#define _vel_vfmkdge_mvml __builtin_ve_vl_vfmkdge_mvml +#define _vel_vfmkdle_mvl __builtin_ve_vl_vfmkdle_mvl +#define _vel_vfmkdle_mvml __builtin_ve_vl_vfmkdle_mvml +#define _vel_vfmkdnum_mvl __builtin_ve_vl_vfmkdnum_mvl +#define _vel_vfmkdnum_mvml __builtin_ve_vl_vfmkdnum_mvml +#define _vel_vfmkdnan_mvl __builtin_ve_vl_vfmkdnan_mvl +#define _vel_vfmkdnan_mvml __builtin_ve_vl_vfmkdnan_mvml +#define _vel_vfmkdgtnan_mvl __builtin_ve_vl_vfmkdgtnan_mvl +#define _vel_vfmkdgtnan_mvml __builtin_ve_vl_vfmkdgtnan_mvml +#define _vel_vfmkdltnan_mvl __builtin_ve_vl_vfmkdltnan_mvl +#define _vel_vfmkdltnan_mvml __builtin_ve_vl_vfmkdltnan_mvml +#define _vel_vfmkdnenan_mvl __builtin_ve_vl_vfmkdnenan_mvl +#define _vel_vfmkdnenan_mvml __builtin_ve_vl_vfmkdnenan_mvml +#define _vel_vfmkdeqnan_mvl __builtin_ve_vl_vfmkdeqnan_mvl +#define _vel_vfmkdeqnan_mvml __builtin_ve_vl_vfmkdeqnan_mvml +#define _vel_vfmkdgenan_mvl __builtin_ve_vl_vfmkdgenan_mvl +#define _vel_vfmkdgenan_mvml __builtin_ve_vl_vfmkdgenan_mvml +#define _vel_vfmkdlenan_mvl __builtin_ve_vl_vfmkdlenan_mvl +#define _vel_vfmkdlenan_mvml __builtin_ve_vl_vfmkdlenan_mvml +#define _vel_vfmksgt_mvl __builtin_ve_vl_vfmksgt_mvl +#define _vel_vfmksgt_mvml __builtin_ve_vl_vfmksgt_mvml +#define _vel_vfmkslt_mvl __builtin_ve_vl_vfmkslt_mvl +#define _vel_vfmkslt_mvml __builtin_ve_vl_vfmkslt_mvml +#define _vel_vfmksne_mvl __builtin_ve_vl_vfmksne_mvl +#define _vel_vfmksne_mvml __builtin_ve_vl_vfmksne_mvml +#define _vel_vfmkseq_mvl __builtin_ve_vl_vfmkseq_mvl +#define _vel_vfmkseq_mvml __builtin_ve_vl_vfmkseq_mvml +#define _vel_vfmksge_mvl __builtin_ve_vl_vfmksge_mvl +#define _vel_vfmksge_mvml __builtin_ve_vl_vfmksge_mvml +#define _vel_vfmksle_mvl __builtin_ve_vl_vfmksle_mvl +#define _vel_vfmksle_mvml __builtin_ve_vl_vfmksle_mvml +#define _vel_vfmksnum_mvl __builtin_ve_vl_vfmksnum_mvl +#define _vel_vfmksnum_mvml __builtin_ve_vl_vfmksnum_mvml +#define _vel_vfmksnan_mvl __builtin_ve_vl_vfmksnan_mvl +#define _vel_vfmksnan_mvml __builtin_ve_vl_vfmksnan_mvml +#define _vel_vfmksgtnan_mvl __builtin_ve_vl_vfmksgtnan_mvl +#define _vel_vfmksgtnan_mvml __builtin_ve_vl_vfmksgtnan_mvml +#define _vel_vfmksltnan_mvl __builtin_ve_vl_vfmksltnan_mvl +#define _vel_vfmksltnan_mvml __builtin_ve_vl_vfmksltnan_mvml +#define _vel_vfmksnenan_mvl __builtin_ve_vl_vfmksnenan_mvl +#define _vel_vfmksnenan_mvml __builtin_ve_vl_vfmksnenan_mvml +#define _vel_vfmkseqnan_mvl __builtin_ve_vl_vfmkseqnan_mvl +#define _vel_vfmkseqnan_mvml __builtin_ve_vl_vfmkseqnan_mvml +#define _vel_vfmksgenan_mvl __builtin_ve_vl_vfmksgenan_mvl +#define _vel_vfmksgenan_mvml __builtin_ve_vl_vfmksgenan_mvml +#define _vel_vfmkslenan_mvl __builtin_ve_vl_vfmkslenan_mvl +#define _vel_vfmkslenan_mvml __builtin_ve_vl_vfmkslenan_mvml +#define _vel_pvfmkslogt_mvl __builtin_ve_vl_pvfmkslogt_mvl +#define _vel_pvfmksupgt_mvl __builtin_ve_vl_pvfmksupgt_mvl +#define _vel_pvfmkslogt_mvml __builtin_ve_vl_pvfmkslogt_mvml +#define _vel_pvfmksupgt_mvml __builtin_ve_vl_pvfmksupgt_mvml +#define _vel_pvfmkslolt_mvl __builtin_ve_vl_pvfmkslolt_mvl +#define _vel_pvfmksuplt_mvl __builtin_ve_vl_pvfmksuplt_mvl +#define _vel_pvfmkslolt_mvml __builtin_ve_vl_pvfmkslolt_mvml +#define _vel_pvfmksuplt_mvml __builtin_ve_vl_pvfmksuplt_mvml +#define _vel_pvfmkslone_mvl __builtin_ve_vl_pvfmkslone_mvl +#define _vel_pvfmksupne_mvl __builtin_ve_vl_pvfmksupne_mvl +#define _vel_pvfmkslone_mvml __builtin_ve_vl_pvfmkslone_mvml +#define _vel_pvfmksupne_mvml __builtin_ve_vl_pvfmksupne_mvml +#define _vel_pvfmksloeq_mvl __builtin_ve_vl_pvfmksloeq_mvl +#define _vel_pvfmksupeq_mvl __builtin_ve_vl_pvfmksupeq_mvl +#define _vel_pvfmksloeq_mvml __builtin_ve_vl_pvfmksloeq_mvml +#define _vel_pvfmksupeq_mvml __builtin_ve_vl_pvfmksupeq_mvml +#define _vel_pvfmksloge_mvl __builtin_ve_vl_pvfmksloge_mvl +#define _vel_pvfmksupge_mvl __builtin_ve_vl_pvfmksupge_mvl +#define _vel_pvfmksloge_mvml __builtin_ve_vl_pvfmksloge_mvml +#define _vel_pvfmksupge_mvml __builtin_ve_vl_pvfmksupge_mvml +#define _vel_pvfmkslole_mvl __builtin_ve_vl_pvfmkslole_mvl +#define _vel_pvfmksuple_mvl __builtin_ve_vl_pvfmksuple_mvl +#define _vel_pvfmkslole_mvml __builtin_ve_vl_pvfmkslole_mvml +#define _vel_pvfmksuple_mvml __builtin_ve_vl_pvfmksuple_mvml +#define _vel_pvfmkslonum_mvl __builtin_ve_vl_pvfmkslonum_mvl +#define _vel_pvfmksupnum_mvl __builtin_ve_vl_pvfmksupnum_mvl +#define _vel_pvfmkslonum_mvml __builtin_ve_vl_pvfmkslonum_mvml +#define _vel_pvfmksupnum_mvml __builtin_ve_vl_pvfmksupnum_mvml +#define _vel_pvfmkslonan_mvl __builtin_ve_vl_pvfmkslonan_mvl +#define _vel_pvfmksupnan_mvl __builtin_ve_vl_pvfmksupnan_mvl +#define _vel_pvfmkslonan_mvml __builtin_ve_vl_pvfmkslonan_mvml +#define _vel_pvfmksupnan_mvml __builtin_ve_vl_pvfmksupnan_mvml +#define _vel_pvfmkslogtnan_mvl __builtin_ve_vl_pvfmkslogtnan_mvl +#define _vel_pvfmksupgtnan_mvl __builtin_ve_vl_pvfmksupgtnan_mvl +#define _vel_pvfmkslogtnan_mvml __builtin_ve_vl_pvfmkslogtnan_mvml +#define _vel_pvfmksupgtnan_mvml __builtin_ve_vl_pvfmksupgtnan_mvml +#define _vel_pvfmksloltnan_mvl __builtin_ve_vl_pvfmksloltnan_mvl +#define _vel_pvfmksupltnan_mvl __builtin_ve_vl_pvfmksupltnan_mvl +#define _vel_pvfmksloltnan_mvml __builtin_ve_vl_pvfmksloltnan_mvml +#define _vel_pvfmksupltnan_mvml __builtin_ve_vl_pvfmksupltnan_mvml +#define _vel_pvfmkslonenan_mvl __builtin_ve_vl_pvfmkslonenan_mvl +#define _vel_pvfmksupnenan_mvl __builtin_ve_vl_pvfmksupnenan_mvl +#define _vel_pvfmkslonenan_mvml __builtin_ve_vl_pvfmkslonenan_mvml +#define _vel_pvfmksupnenan_mvml __builtin_ve_vl_pvfmksupnenan_mvml +#define _vel_pvfmksloeqnan_mvl __builtin_ve_vl_pvfmksloeqnan_mvl +#define _vel_pvfmksupeqnan_mvl __builtin_ve_vl_pvfmksupeqnan_mvl +#define _vel_pvfmksloeqnan_mvml __builtin_ve_vl_pvfmksloeqnan_mvml +#define _vel_pvfmksupeqnan_mvml __builtin_ve_vl_pvfmksupeqnan_mvml +#define _vel_pvfmkslogenan_mvl __builtin_ve_vl_pvfmkslogenan_mvl +#define _vel_pvfmksupgenan_mvl __builtin_ve_vl_pvfmksupgenan_mvl +#define _vel_pvfmkslogenan_mvml __builtin_ve_vl_pvfmkslogenan_mvml +#define _vel_pvfmksupgenan_mvml __builtin_ve_vl_pvfmksupgenan_mvml +#define _vel_pvfmkslolenan_mvl __builtin_ve_vl_pvfmkslolenan_mvl +#define _vel_pvfmksuplenan_mvl __builtin_ve_vl_pvfmksuplenan_mvl +#define _vel_pvfmkslolenan_mvml __builtin_ve_vl_pvfmkslolenan_mvml +#define _vel_pvfmksuplenan_mvml __builtin_ve_vl_pvfmksuplenan_mvml +#define _vel_pvfmksgt_Mvl __builtin_ve_vl_pvfmksgt_Mvl +#define _vel_pvfmksgt_MvMl __builtin_ve_vl_pvfmksgt_MvMl +#define _vel_pvfmkslt_Mvl __builtin_ve_vl_pvfmkslt_Mvl +#define _vel_pvfmkslt_MvMl __builtin_ve_vl_pvfmkslt_MvMl +#define _vel_pvfmksne_Mvl __builtin_ve_vl_pvfmksne_Mvl +#define _vel_pvfmksne_MvMl __builtin_ve_vl_pvfmksne_MvMl +#define _vel_pvfmkseq_Mvl __builtin_ve_vl_pvfmkseq_Mvl +#define _vel_pvfmkseq_MvMl __builtin_ve_vl_pvfmkseq_MvMl +#define _vel_pvfmksge_Mvl __builtin_ve_vl_pvfmksge_Mvl +#define _vel_pvfmksge_MvMl __builtin_ve_vl_pvfmksge_MvMl +#define _vel_pvfmksle_Mvl __builtin_ve_vl_pvfmksle_Mvl +#define _vel_pvfmksle_MvMl __builtin_ve_vl_pvfmksle_MvMl +#define _vel_pvfmksnum_Mvl __builtin_ve_vl_pvfmksnum_Mvl +#define _vel_pvfmksnum_MvMl __builtin_ve_vl_pvfmksnum_MvMl +#define _vel_pvfmksnan_Mvl __builtin_ve_vl_pvfmksnan_Mvl +#define _vel_pvfmksnan_MvMl __builtin_ve_vl_pvfmksnan_MvMl +#define _vel_pvfmksgtnan_Mvl __builtin_ve_vl_pvfmksgtnan_Mvl +#define _vel_pvfmksgtnan_MvMl __builtin_ve_vl_pvfmksgtnan_MvMl +#define _vel_pvfmksltnan_Mvl __builtin_ve_vl_pvfmksltnan_Mvl +#define _vel_pvfmksltnan_MvMl __builtin_ve_vl_pvfmksltnan_MvMl +#define _vel_pvfmksnenan_Mvl __builtin_ve_vl_pvfmksnenan_Mvl +#define _vel_pvfmksnenan_MvMl __builtin_ve_vl_pvfmksnenan_MvMl +#define _vel_pvfmkseqnan_Mvl __builtin_ve_vl_pvfmkseqnan_Mvl +#define _vel_pvfmkseqnan_MvMl __builtin_ve_vl_pvfmkseqnan_MvMl +#define _vel_pvfmksgenan_Mvl __builtin_ve_vl_pvfmksgenan_Mvl +#define _vel_pvfmksgenan_MvMl __builtin_ve_vl_pvfmksgenan_MvMl +#define _vel_pvfmkslenan_Mvl __builtin_ve_vl_pvfmkslenan_Mvl +#define _vel_pvfmkslenan_MvMl __builtin_ve_vl_pvfmkslenan_MvMl +#define _vel_vsumwsx_vvl __builtin_ve_vl_vsumwsx_vvl +#define _vel_vsumwsx_vvml __builtin_ve_vl_vsumwsx_vvml +#define _vel_vsumwzx_vvl __builtin_ve_vl_vsumwzx_vvl +#define _vel_vsumwzx_vvml __builtin_ve_vl_vsumwzx_vvml +#define _vel_vsuml_vvl __builtin_ve_vl_vsuml_vvl +#define _vel_vsuml_vvml __builtin_ve_vl_vsuml_vvml +#define _vel_vfsumd_vvl __builtin_ve_vl_vfsumd_vvl +#define _vel_vfsumd_vvml __builtin_ve_vl_vfsumd_vvml +#define _vel_vfsums_vvl __builtin_ve_vl_vfsums_vvl +#define _vel_vfsums_vvml __builtin_ve_vl_vfsums_vvml +#define _vel_vrmaxswfstsx_vvl __builtin_ve_vl_vrmaxswfstsx_vvl +#define _vel_vrmaxswfstsx_vvvl __builtin_ve_vl_vrmaxswfstsx_vvvl +#define _vel_vrmaxswlstsx_vvl __builtin_ve_vl_vrmaxswlstsx_vvl +#define _vel_vrmaxswlstsx_vvvl __builtin_ve_vl_vrmaxswlstsx_vvvl +#define _vel_vrmaxswfstzx_vvl __builtin_ve_vl_vrmaxswfstzx_vvl +#define _vel_vrmaxswfstzx_vvvl __builtin_ve_vl_vrmaxswfstzx_vvvl +#define _vel_vrmaxswlstzx_vvl __builtin_ve_vl_vrmaxswlstzx_vvl +#define _vel_vrmaxswlstzx_vvvl __builtin_ve_vl_vrmaxswlstzx_vvvl +#define _vel_vrminswfstsx_vvl __builtin_ve_vl_vrminswfstsx_vvl +#define _vel_vrminswfstsx_vvvl __builtin_ve_vl_vrminswfstsx_vvvl +#define _vel_vrminswlstsx_vvl __builtin_ve_vl_vrminswlstsx_vvl +#define _vel_vrminswlstsx_vvvl __builtin_ve_vl_vrminswlstsx_vvvl +#define _vel_vrminswfstzx_vvl __builtin_ve_vl_vrminswfstzx_vvl +#define _vel_vrminswfstzx_vvvl __builtin_ve_vl_vrminswfstzx_vvvl +#define _vel_vrminswlstzx_vvl __builtin_ve_vl_vrminswlstzx_vvl +#define _vel_vrminswlstzx_vvvl __builtin_ve_vl_vrminswlstzx_vvvl +#define _vel_vrmaxslfst_vvl __builtin_ve_vl_vrmaxslfst_vvl +#define _vel_vrmaxslfst_vvvl __builtin_ve_vl_vrmaxslfst_vvvl +#define _vel_vrmaxsllst_vvl __builtin_ve_vl_vrmaxsllst_vvl +#define _vel_vrmaxsllst_vvvl __builtin_ve_vl_vrmaxsllst_vvvl +#define _vel_vrminslfst_vvl __builtin_ve_vl_vrminslfst_vvl +#define _vel_vrminslfst_vvvl __builtin_ve_vl_vrminslfst_vvvl +#define _vel_vrminsllst_vvl __builtin_ve_vl_vrminsllst_vvl +#define _vel_vrminsllst_vvvl __builtin_ve_vl_vrminsllst_vvvl +#define _vel_vfrmaxdfst_vvl __builtin_ve_vl_vfrmaxdfst_vvl +#define _vel_vfrmaxdfst_vvvl __builtin_ve_vl_vfrmaxdfst_vvvl +#define _vel_vfrmaxdlst_vvl __builtin_ve_vl_vfrmaxdlst_vvl +#define _vel_vfrmaxdlst_vvvl __builtin_ve_vl_vfrmaxdlst_vvvl +#define _vel_vfrmaxsfst_vvl __builtin_ve_vl_vfrmaxsfst_vvl +#define _vel_vfrmaxsfst_vvvl __builtin_ve_vl_vfrmaxsfst_vvvl +#define _vel_vfrmaxslst_vvl __builtin_ve_vl_vfrmaxslst_vvl +#define _vel_vfrmaxslst_vvvl __builtin_ve_vl_vfrmaxslst_vvvl +#define _vel_vfrmindfst_vvl __builtin_ve_vl_vfrmindfst_vvl +#define _vel_vfrmindfst_vvvl __builtin_ve_vl_vfrmindfst_vvvl +#define _vel_vfrmindlst_vvl __builtin_ve_vl_vfrmindlst_vvl +#define _vel_vfrmindlst_vvvl __builtin_ve_vl_vfrmindlst_vvvl +#define _vel_vfrminsfst_vvl __builtin_ve_vl_vfrminsfst_vvl +#define _vel_vfrminsfst_vvvl __builtin_ve_vl_vfrminsfst_vvvl +#define _vel_vfrminslst_vvl __builtin_ve_vl_vfrminslst_vvl +#define _vel_vfrminslst_vvvl __builtin_ve_vl_vfrminslst_vvvl +#define _vel_vrand_vvl __builtin_ve_vl_vrand_vvl +#define _vel_vrand_vvml __builtin_ve_vl_vrand_vvml +#define _vel_vror_vvl __builtin_ve_vl_vror_vvl +#define _vel_vror_vvml __builtin_ve_vl_vror_vvml +#define _vel_vrxor_vvl __builtin_ve_vl_vrxor_vvl +#define _vel_vrxor_vvml __builtin_ve_vl_vrxor_vvml +#define _vel_vgt_vvssl __builtin_ve_vl_vgt_vvssl +#define _vel_vgt_vvssvl __builtin_ve_vl_vgt_vvssvl +#define _vel_vgt_vvssml __builtin_ve_vl_vgt_vvssml +#define _vel_vgt_vvssmvl __builtin_ve_vl_vgt_vvssmvl +#define _vel_vgtnc_vvssl __builtin_ve_vl_vgtnc_vvssl +#define _vel_vgtnc_vvssvl __builtin_ve_vl_vgtnc_vvssvl +#define _vel_vgtnc_vvssml __builtin_ve_vl_vgtnc_vvssml +#define _vel_vgtnc_vvssmvl __builtin_ve_vl_vgtnc_vvssmvl +#define _vel_vgtu_vvssl __builtin_ve_vl_vgtu_vvssl +#define _vel_vgtu_vvssvl __builtin_ve_vl_vgtu_vvssvl +#define _vel_vgtu_vvssml __builtin_ve_vl_vgtu_vvssml +#define _vel_vgtu_vvssmvl __builtin_ve_vl_vgtu_vvssmvl +#define _vel_vgtunc_vvssl __builtin_ve_vl_vgtunc_vvssl +#define _vel_vgtunc_vvssvl __builtin_ve_vl_vgtunc_vvssvl +#define _vel_vgtunc_vvssml __builtin_ve_vl_vgtunc_vvssml +#define _vel_vgtunc_vvssmvl __builtin_ve_vl_vgtunc_vvssmvl +#define _vel_vgtlsx_vvssl __builtin_ve_vl_vgtlsx_vvssl +#define _vel_vgtlsx_vvssvl __builtin_ve_vl_vgtlsx_vvssvl +#define _vel_vgtlsx_vvssml __builtin_ve_vl_vgtlsx_vvssml +#define _vel_vgtlsx_vvssmvl __builtin_ve_vl_vgtlsx_vvssmvl +#define _vel_vgtlsxnc_vvssl __builtin_ve_vl_vgtlsxnc_vvssl +#define _vel_vgtlsxnc_vvssvl __builtin_ve_vl_vgtlsxnc_vvssvl +#define _vel_vgtlsxnc_vvssml __builtin_ve_vl_vgtlsxnc_vvssml +#define _vel_vgtlsxnc_vvssmvl __builtin_ve_vl_vgtlsxnc_vvssmvl +#define _vel_vgtlzx_vvssl __builtin_ve_vl_vgtlzx_vvssl +#define _vel_vgtlzx_vvssvl __builtin_ve_vl_vgtlzx_vvssvl +#define _vel_vgtlzx_vvssml __builtin_ve_vl_vgtlzx_vvssml +#define _vel_vgtlzx_vvssmvl __builtin_ve_vl_vgtlzx_vvssmvl +#define _vel_vgtlzxnc_vvssl __builtin_ve_vl_vgtlzxnc_vvssl +#define _vel_vgtlzxnc_vvssvl __builtin_ve_vl_vgtlzxnc_vvssvl +#define _vel_vgtlzxnc_vvssml __builtin_ve_vl_vgtlzxnc_vvssml +#define _vel_vgtlzxnc_vvssmvl __builtin_ve_vl_vgtlzxnc_vvssmvl +#define _vel_vsc_vvssl __builtin_ve_vl_vsc_vvssl +#define _vel_vsc_vvssml __builtin_ve_vl_vsc_vvssml +#define _vel_vscnc_vvssl __builtin_ve_vl_vscnc_vvssl +#define _vel_vscnc_vvssml __builtin_ve_vl_vscnc_vvssml +#define _vel_vscot_vvssl __builtin_ve_vl_vscot_vvssl +#define _vel_vscot_vvssml __builtin_ve_vl_vscot_vvssml +#define _vel_vscncot_vvssl __builtin_ve_vl_vscncot_vvssl +#define _vel_vscncot_vvssml __builtin_ve_vl_vscncot_vvssml +#define _vel_vscu_vvssl __builtin_ve_vl_vscu_vvssl +#define _vel_vscu_vvssml __builtin_ve_vl_vscu_vvssml +#define _vel_vscunc_vvssl __builtin_ve_vl_vscunc_vvssl +#define _vel_vscunc_vvssml __builtin_ve_vl_vscunc_vvssml +#define _vel_vscuot_vvssl __builtin_ve_vl_vscuot_vvssl +#define _vel_vscuot_vvssml __builtin_ve_vl_vscuot_vvssml +#define _vel_vscuncot_vvssl __builtin_ve_vl_vscuncot_vvssl +#define _vel_vscuncot_vvssml __builtin_ve_vl_vscuncot_vvssml +#define _vel_vscl_vvssl __builtin_ve_vl_vscl_vvssl +#define _vel_vscl_vvssml __builtin_ve_vl_vscl_vvssml +#define _vel_vsclnc_vvssl __builtin_ve_vl_vsclnc_vvssl +#define _vel_vsclnc_vvssml __builtin_ve_vl_vsclnc_vvssml +#define _vel_vsclot_vvssl __builtin_ve_vl_vsclot_vvssl +#define _vel_vsclot_vvssml __builtin_ve_vl_vsclot_vvssml +#define _vel_vsclncot_vvssl __builtin_ve_vl_vsclncot_vvssl +#define _vel_vsclncot_vvssml __builtin_ve_vl_vsclncot_vvssml +#define _vel_andm_mmm __builtin_ve_vl_andm_mmm +#define _vel_andm_MMM __builtin_ve_vl_andm_MMM +#define _vel_orm_mmm __builtin_ve_vl_orm_mmm +#define _vel_orm_MMM __builtin_ve_vl_orm_MMM +#define _vel_xorm_mmm __builtin_ve_vl_xorm_mmm +#define _vel_xorm_MMM __builtin_ve_vl_xorm_MMM +#define _vel_eqvm_mmm __builtin_ve_vl_eqvm_mmm +#define _vel_eqvm_MMM __builtin_ve_vl_eqvm_MMM +#define _vel_nndm_mmm __builtin_ve_vl_nndm_mmm +#define _vel_nndm_MMM __builtin_ve_vl_nndm_MMM +#define _vel_negm_mm __builtin_ve_vl_negm_mm +#define _vel_negm_MM __builtin_ve_vl_negm_MM +#define _vel_pcvm_sml __builtin_ve_vl_pcvm_sml +#define _vel_lzvm_sml __builtin_ve_vl_lzvm_sml +#define _vel_tovm_sml __builtin_ve_vl_tovm_sml +#define _vel_lcr_sss __builtin_ve_vl_lcr_sss +#define _vel_scr_sss __builtin_ve_vl_scr_sss +#define _vel_tscr_ssss __builtin_ve_vl_tscr_ssss +#define _vel_fidcr_sss __builtin_ve_vl_fidcr_sss +#define _vel_fencei __builtin_ve_vl_fencei +#define _vel_fencem_s __builtin_ve_vl_fencem_s +#define _vel_fencec_s __builtin_ve_vl_fencec_s +#define _vel_svob __builtin_ve_vl_svob diff --git a/llvm/lib/clang/19/include/vpclmulqdqintrin.h b/llvm/lib/clang/19/include/vpclmulqdqintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..485692ea2b5b17be49688eda073867a762fa8ecd --- /dev/null +++ b/llvm/lib/clang/19/include/vpclmulqdqintrin.h @@ -0,0 +1,30 @@ +/*===------------ vpclmulqdqintrin.h - VPCLMULQDQ intrinsics ---------------=== + * + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __VPCLMULQDQINTRIN_H +#define __VPCLMULQDQINTRIN_H + +#define _mm256_clmulepi64_epi128(A, B, I) \ + ((__m256i)__builtin_ia32_pclmulqdq256((__v4di)(__m256i)(A), \ + (__v4di)(__m256i)(B), \ + (char)(I))) + +#ifdef __AVX512FINTRIN_H +#define _mm512_clmulepi64_epi128(A, B, I) \ + ((__m512i)__builtin_ia32_pclmulqdq512((__v8di)(__m512i)(A), \ + (__v8di)(__m512i)(B), \ + (char)(I))) +#endif // __AVX512FINTRIN_H + +#endif /* __VPCLMULQDQINTRIN_H */ + diff --git a/llvm/lib/clang/19/include/waitpkgintrin.h b/llvm/lib/clang/19/include/waitpkgintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..7ecada4cf723d60a1cc32c14ab5179a5fe1f8dd8 --- /dev/null +++ b/llvm/lib/clang/19/include/waitpkgintrin.h @@ -0,0 +1,42 @@ +/*===----------------------- waitpkgintrin.h - WAITPKG --------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __WAITPKGINTRIN_H +#define __WAITPKGINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("waitpkg"))) + +static __inline__ void __DEFAULT_FN_ATTRS +_umonitor (void * __address) +{ + __builtin_ia32_umonitor (__address); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_umwait (unsigned int __control, unsigned long long __counter) +{ + return __builtin_ia32_umwait (__control, + (unsigned int)(__counter >> 32), (unsigned int)__counter); +} + +static __inline__ unsigned char __DEFAULT_FN_ATTRS +_tpause (unsigned int __control, unsigned long long __counter) +{ + return __builtin_ia32_tpause (__control, + (unsigned int)(__counter >> 32), (unsigned int)__counter); +} + +#undef __DEFAULT_FN_ATTRS + +#endif /* __WAITPKGINTRIN_H */ diff --git a/llvm/lib/clang/19/include/wasm_simd128.h b/llvm/lib/clang/19/include/wasm_simd128.h new file mode 100644 index 0000000000000000000000000000000000000000..2327bec52522d270f5489c2fb05301694088d190 --- /dev/null +++ b/llvm/lib/clang/19/include/wasm_simd128.h @@ -0,0 +1,1997 @@ +/*===---- wasm_simd128.h - WebAssembly portable SIMD intrinsics ------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __WASM_SIMD128_H +#define __WASM_SIMD128_H + +#include +#include + +// User-facing type +typedef int32_t v128_t __attribute__((__vector_size__(16), __aligned__(16))); + +// Internal types determined by clang builtin definitions +typedef int32_t __v128_u __attribute__((__vector_size__(16), __aligned__(1))); +typedef signed char __i8x16 + __attribute__((__vector_size__(16), __aligned__(16))); +typedef unsigned char __u8x16 + __attribute__((__vector_size__(16), __aligned__(16))); +typedef short __i16x8 __attribute__((__vector_size__(16), __aligned__(16))); +typedef unsigned short __u16x8 + __attribute__((__vector_size__(16), __aligned__(16))); +typedef int __i32x4 __attribute__((__vector_size__(16), __aligned__(16))); +typedef unsigned int __u32x4 + __attribute__((__vector_size__(16), __aligned__(16))); +typedef long long __i64x2 __attribute__((__vector_size__(16), __aligned__(16))); +typedef unsigned long long __u64x2 + __attribute__((__vector_size__(16), __aligned__(16))); +typedef float __f32x4 __attribute__((__vector_size__(16), __aligned__(16))); +typedef double __f64x2 __attribute__((__vector_size__(16), __aligned__(16))); + +typedef signed char __i8x8 __attribute__((__vector_size__(8), __aligned__(8))); +typedef unsigned char __u8x8 + __attribute__((__vector_size__(8), __aligned__(8))); +typedef short __i16x4 __attribute__((__vector_size__(8), __aligned__(8))); +typedef unsigned short __u16x4 + __attribute__((__vector_size__(8), __aligned__(8))); +typedef int __i32x2 __attribute__((__vector_size__(8), __aligned__(8))); +typedef unsigned int __u32x2 + __attribute__((__vector_size__(8), __aligned__(8))); +typedef float __f32x2 __attribute__((__vector_size__(8), __aligned__(8))); + +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("simd128"), \ + __min_vector_width__(128))) + +#define __REQUIRE_CONSTANT(c) \ + __attribute__((__diagnose_if__(!__builtin_constant_p(c), \ + #c " must be constant", "error"))) + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load(const void *__mem) { + // UB-free unaligned access copied from xmmintrin.h + struct __wasm_v128_load_struct { + __v128_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __wasm_v128_load_struct *)__mem)->__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_v128_load8_splat(const void *__mem) { + struct __wasm_v128_load8_splat_struct { + uint8_t __v; + } __attribute__((__packed__, __may_alias__)); + uint8_t __v = ((const struct __wasm_v128_load8_splat_struct *)__mem)->__v; + return (v128_t)(__u8x16){__v, __v, __v, __v, __v, __v, __v, __v, + __v, __v, __v, __v, __v, __v, __v, __v}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_v128_load16_splat(const void *__mem) { + struct __wasm_v128_load16_splat_struct { + uint16_t __v; + } __attribute__((__packed__, __may_alias__)); + uint16_t __v = ((const struct __wasm_v128_load16_splat_struct *)__mem)->__v; + return (v128_t)(__u16x8){__v, __v, __v, __v, __v, __v, __v, __v}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_v128_load32_splat(const void *__mem) { + struct __wasm_v128_load32_splat_struct { + uint32_t __v; + } __attribute__((__packed__, __may_alias__)); + uint32_t __v = ((const struct __wasm_v128_load32_splat_struct *)__mem)->__v; + return (v128_t)(__u32x4){__v, __v, __v, __v}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_v128_load64_splat(const void *__mem) { + struct __wasm_v128_load64_splat_struct { + uint64_t __v; + } __attribute__((__packed__, __may_alias__)); + uint64_t __v = ((const struct __wasm_v128_load64_splat_struct *)__mem)->__v; + return (v128_t)(__u64x2){__v, __v}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_load8x8(const void *__mem) { + struct __wasm_i16x8_load8x8_struct { + __i8x8 __v; + } __attribute__((__packed__, __may_alias__)); + __i8x8 __v = ((const struct __wasm_i16x8_load8x8_struct *)__mem)->__v; + return (v128_t) __builtin_convertvector(__v, __i16x8); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_load8x8(const void *__mem) { + struct __wasm_u16x8_load8x8_struct { + __u8x8 __v; + } __attribute__((__packed__, __may_alias__)); + __u8x8 __v = ((const struct __wasm_u16x8_load8x8_struct *)__mem)->__v; + return (v128_t) __builtin_convertvector(__v, __u16x8); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_load16x4(const void *__mem) { + struct __wasm_i32x4_load16x4_struct { + __i16x4 __v; + } __attribute__((__packed__, __may_alias__)); + __i16x4 __v = ((const struct __wasm_i32x4_load16x4_struct *)__mem)->__v; + return (v128_t) __builtin_convertvector(__v, __i32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_load16x4(const void *__mem) { + struct __wasm_u32x4_load16x4_struct { + __u16x4 __v; + } __attribute__((__packed__, __may_alias__)); + __u16x4 __v = ((const struct __wasm_u32x4_load16x4_struct *)__mem)->__v; + return (v128_t) __builtin_convertvector(__v, __u32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i64x2_load32x2(const void *__mem) { + struct __wasm_i64x2_load32x2_struct { + __i32x2 __v; + } __attribute__((__packed__, __may_alias__)); + __i32x2 __v = ((const struct __wasm_i64x2_load32x2_struct *)__mem)->__v; + return (v128_t) __builtin_convertvector(__v, __i64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u64x2_load32x2(const void *__mem) { + struct __wasm_u64x2_load32x2_struct { + __u32x2 __v; + } __attribute__((__packed__, __may_alias__)); + __u32x2 __v = ((const struct __wasm_u64x2_load32x2_struct *)__mem)->__v; + return (v128_t) __builtin_convertvector(__v, __u64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_v128_load32_zero(const void *__mem) { + struct __wasm_v128_load32_zero_struct { + int32_t __v; + } __attribute__((__packed__, __may_alias__)); + int32_t __v = ((const struct __wasm_v128_load32_zero_struct *)__mem)->__v; + return (v128_t)(__i32x4){__v, 0, 0, 0}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_v128_load64_zero(const void *__mem) { + struct __wasm_v128_load64_zero_struct { + int64_t __v; + } __attribute__((__packed__, __may_alias__)); + int64_t __v = ((const struct __wasm_v128_load64_zero_struct *)__mem)->__v; + return (v128_t)(__i64x2){__v, 0}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load8_lane( + const void *__mem, v128_t __vec, int __i) __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_load8_lane_struct { + int8_t __v; + } __attribute__((__packed__, __may_alias__)); + int8_t __v = ((const struct __wasm_v128_load8_lane_struct *)__mem)->__v; + __i8x16 __ret = (__i8x16)__vec; + __ret[__i] = __v; + return (v128_t)__ret; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load16_lane( + const void *__mem, v128_t __vec, int __i) __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_load16_lane_struct { + int16_t __v; + } __attribute__((__packed__, __may_alias__)); + int16_t __v = ((const struct __wasm_v128_load16_lane_struct *)__mem)->__v; + __i16x8 __ret = (__i16x8)__vec; + __ret[__i] = __v; + return (v128_t)__ret; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load32_lane( + const void *__mem, v128_t __vec, int __i) __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_load32_lane_struct { + int32_t __v; + } __attribute__((__packed__, __may_alias__)); + int32_t __v = ((const struct __wasm_v128_load32_lane_struct *)__mem)->__v; + __i32x4 __ret = (__i32x4)__vec; + __ret[__i] = __v; + return (v128_t)__ret; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_load64_lane( + const void *__mem, v128_t __vec, int __i) __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_load64_lane_struct { + int64_t __v; + } __attribute__((__packed__, __may_alias__)); + int64_t __v = ((const struct __wasm_v128_load64_lane_struct *)__mem)->__v; + __i64x2 __ret = (__i64x2)__vec; + __ret[__i] = __v; + return (v128_t)__ret; +} + +static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store(void *__mem, + v128_t __a) { + // UB-free unaligned access copied from xmmintrin.h + struct __wasm_v128_store_struct { + __v128_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __wasm_v128_store_struct *)__mem)->__v = __a; +} + +static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store8_lane(void *__mem, + v128_t __vec, + int __i) + __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_store8_lane_struct { + int8_t __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __wasm_v128_store8_lane_struct *)__mem)->__v = ((__i8x16)__vec)[__i]; +} + +static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store16_lane(void *__mem, + v128_t __vec, + int __i) + __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_store16_lane_struct { + int16_t __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __wasm_v128_store16_lane_struct *)__mem)->__v = + ((__i16x8)__vec)[__i]; +} + +static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store32_lane(void *__mem, + v128_t __vec, + int __i) + __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_store32_lane_struct { + int32_t __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __wasm_v128_store32_lane_struct *)__mem)->__v = + ((__i32x4)__vec)[__i]; +} + +static __inline__ void __DEFAULT_FN_ATTRS wasm_v128_store64_lane(void *__mem, + v128_t __vec, + int __i) + __REQUIRE_CONSTANT(__i) { + struct __wasm_v128_store64_lane_struct { + int64_t __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __wasm_v128_store64_lane_struct *)__mem)->__v = + ((__i64x2)__vec)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i8x16_make(int8_t __c0, int8_t __c1, int8_t __c2, int8_t __c3, int8_t __c4, + int8_t __c5, int8_t __c6, int8_t __c7, int8_t __c8, int8_t __c9, + int8_t __c10, int8_t __c11, int8_t __c12, int8_t __c13, + int8_t __c14, int8_t __c15) { + return (v128_t)(__i8x16){__c0, __c1, __c2, __c3, __c4, __c5, + __c6, __c7, __c8, __c9, __c10, __c11, + __c12, __c13, __c14, __c15}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u8x16_make(uint8_t __c0, uint8_t __c1, uint8_t __c2, uint8_t __c3, + uint8_t __c4, uint8_t __c5, uint8_t __c6, uint8_t __c7, + uint8_t __c8, uint8_t __c9, uint8_t __c10, uint8_t __c11, + uint8_t __c12, uint8_t __c13, uint8_t __c14, uint8_t __c15) { + return (v128_t)(__u8x16){__c0, __c1, __c2, __c3, __c4, __c5, + __c6, __c7, __c8, __c9, __c10, __c11, + __c12, __c13, __c14, __c15}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_make(int16_t __c0, int16_t __c1, int16_t __c2, int16_t __c3, + int16_t __c4, int16_t __c5, int16_t __c6, int16_t __c7) { + return (v128_t)(__i16x8){__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_make(uint16_t __c0, uint16_t __c1, uint16_t __c2, uint16_t __c3, + uint16_t __c4, uint16_t __c5, uint16_t __c6, uint16_t __c7) { + return (v128_t)(__u16x8){__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_make(int32_t __c0, + int32_t __c1, + int32_t __c2, + int32_t __c3) { + return (v128_t)(__i32x4){__c0, __c1, __c2, __c3}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_make(uint32_t __c0, + uint32_t __c1, + uint32_t __c2, + uint32_t __c3) { + return (v128_t)(__u32x4){__c0, __c1, __c2, __c3}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0, + int64_t __c1) { + return (v128_t)(__i64x2){__c0, __c1}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_make(uint64_t __c0, + uint64_t __c1) { + return (v128_t)(__u64x2){__c0, __c1}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_make(float __c0, + float __c1, + float __c2, + float __c3) { + return (v128_t)(__f32x4){__c0, __c1, __c2, __c3}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_make(double __c0, + double __c1) { + return (v128_t)(__f64x2){__c0, __c1}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i8x16_const(int8_t __c0, int8_t __c1, int8_t __c2, int8_t __c3, + int8_t __c4, int8_t __c5, int8_t __c6, int8_t __c7, + int8_t __c8, int8_t __c9, int8_t __c10, int8_t __c11, + int8_t __c12, int8_t __c13, int8_t __c14, int8_t __c15) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) __REQUIRE_CONSTANT(__c4) + __REQUIRE_CONSTANT(__c5) __REQUIRE_CONSTANT(__c6) + __REQUIRE_CONSTANT(__c7) __REQUIRE_CONSTANT(__c8) + __REQUIRE_CONSTANT(__c9) __REQUIRE_CONSTANT(__c10) + __REQUIRE_CONSTANT(__c11) __REQUIRE_CONSTANT(__c12) + __REQUIRE_CONSTANT(__c13) __REQUIRE_CONSTANT(__c14) + __REQUIRE_CONSTANT(__c15) { + return (v128_t)(__i8x16){__c0, __c1, __c2, __c3, __c4, __c5, + __c6, __c7, __c8, __c9, __c10, __c11, + __c12, __c13, __c14, __c15}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u8x16_const(uint8_t __c0, uint8_t __c1, uint8_t __c2, uint8_t __c3, + uint8_t __c4, uint8_t __c5, uint8_t __c6, uint8_t __c7, + uint8_t __c8, uint8_t __c9, uint8_t __c10, uint8_t __c11, + uint8_t __c12, uint8_t __c13, uint8_t __c14, uint8_t __c15) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) __REQUIRE_CONSTANT(__c4) + __REQUIRE_CONSTANT(__c5) __REQUIRE_CONSTANT(__c6) + __REQUIRE_CONSTANT(__c7) __REQUIRE_CONSTANT(__c8) + __REQUIRE_CONSTANT(__c9) __REQUIRE_CONSTANT(__c10) + __REQUIRE_CONSTANT(__c11) __REQUIRE_CONSTANT(__c12) + __REQUIRE_CONSTANT(__c13) __REQUIRE_CONSTANT(__c14) + __REQUIRE_CONSTANT(__c15) { + return (v128_t)(__u8x16){__c0, __c1, __c2, __c3, __c4, __c5, + __c6, __c7, __c8, __c9, __c10, __c11, + __c12, __c13, __c14, __c15}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_const(int16_t __c0, int16_t __c1, int16_t __c2, int16_t __c3, + int16_t __c4, int16_t __c5, int16_t __c6, int16_t __c7) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) __REQUIRE_CONSTANT(__c4) + __REQUIRE_CONSTANT(__c5) __REQUIRE_CONSTANT(__c6) + __REQUIRE_CONSTANT(__c7) { + return (v128_t)(__i16x8){__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_const(uint16_t __c0, uint16_t __c1, uint16_t __c2, uint16_t __c3, + uint16_t __c4, uint16_t __c5, uint16_t __c6, uint16_t __c7) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) __REQUIRE_CONSTANT(__c4) + __REQUIRE_CONSTANT(__c5) __REQUIRE_CONSTANT(__c6) + __REQUIRE_CONSTANT(__c7) { + return (v128_t)(__u16x8){__c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_const(int32_t __c0, int32_t __c1, int32_t __c2, int32_t __c3) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) { + return (v128_t)(__i32x4){__c0, __c1, __c2, __c3}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_const(uint32_t __c0, uint32_t __c1, uint32_t __c2, uint32_t __c3) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) { + return (v128_t)(__u32x4){__c0, __c1, __c2, __c3}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_const(int64_t __c0, + int64_t __c1) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) { + return (v128_t)(__i64x2){__c0, __c1}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_const(uint64_t __c0, + uint64_t __c1) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) { + return (v128_t)(__u64x2){__c0, __c1}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f32x4_const(float __c0, float __c1, float __c2, float __c3) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) __REQUIRE_CONSTANT(__c2) + __REQUIRE_CONSTANT(__c3) { + return (v128_t)(__f32x4){__c0, __c1, __c2, __c3}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_const(double __c0, + double __c1) + __REQUIRE_CONSTANT(__c0) __REQUIRE_CONSTANT(__c1) { + return (v128_t)(__f64x2){__c0, __c1}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_const_splat(int8_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__i8x16){__c, __c, __c, __c, __c, __c, __c, __c, + __c, __c, __c, __c, __c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_const_splat(uint8_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__u8x16){__c, __c, __c, __c, __c, __c, __c, __c, + __c, __c, __c, __c, __c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_const_splat(int16_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__i16x8){__c, __c, __c, __c, __c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_const_splat(uint16_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__u16x8){__c, __c, __c, __c, __c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_const_splat(int32_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__i32x4){__c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_const_splat(uint32_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__u32x4){__c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_const_splat(int64_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__i64x2){__c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_const_splat(uint64_t __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__u64x2){__c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_const_splat(float __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__f32x4){__c, __c, __c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_const_splat(double __c) + __REQUIRE_CONSTANT(__c) { + return (v128_t)(__f64x2){__c, __c}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_splat(int8_t __a) { + return (v128_t)(__i8x16){__a, __a, __a, __a, __a, __a, __a, __a, + __a, __a, __a, __a, __a, __a, __a, __a}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_splat(uint8_t __a) { + return (v128_t)(__u8x16){__a, __a, __a, __a, __a, __a, __a, __a, + __a, __a, __a, __a, __a, __a, __a, __a}; +} + +static __inline__ int8_t __DEFAULT_FN_ATTRS wasm_i8x16_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__i8x16)__a)[__i]; +} + +static __inline__ uint8_t __DEFAULT_FN_ATTRS wasm_u8x16_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__u8x16)__a)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_replace_lane(v128_t __a, + int __i, + int8_t __b) + __REQUIRE_CONSTANT(__i) { + __i8x16 __v = (__i8x16)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_replace_lane(v128_t __a, + int __i, + uint8_t __b) + __REQUIRE_CONSTANT(__i) { + __u8x16 __v = (__u8x16)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_splat(int16_t __a) { + return (v128_t)(__i16x8){__a, __a, __a, __a, __a, __a, __a, __a}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_splat(uint16_t __a) { + return (v128_t)(__u16x8){__a, __a, __a, __a, __a, __a, __a, __a}; +} + +static __inline__ int16_t __DEFAULT_FN_ATTRS wasm_i16x8_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__i16x8)__a)[__i]; +} + +static __inline__ uint16_t __DEFAULT_FN_ATTRS +wasm_u16x8_extract_lane(v128_t __a, int __i) __REQUIRE_CONSTANT(__i) { + return ((__u16x8)__a)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_replace_lane(v128_t __a, + int __i, + int16_t __b) + __REQUIRE_CONSTANT(__i) { + __i16x8 __v = (__i16x8)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_replace_lane( + v128_t __a, int __i, uint16_t __b) __REQUIRE_CONSTANT(__i) { + __u16x8 __v = (__u16x8)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_splat(int32_t __a) { + return (v128_t)(__i32x4){__a, __a, __a, __a}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_splat(uint32_t __a) { + return (v128_t)(__u32x4){__a, __a, __a, __a}; +} + +static __inline__ int32_t __DEFAULT_FN_ATTRS wasm_i32x4_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__i32x4)__a)[__i]; +} + +static __inline__ uint32_t __DEFAULT_FN_ATTRS +wasm_u32x4_extract_lane(v128_t __a, int __i) __REQUIRE_CONSTANT(__i) { + return ((__u32x4)__a)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_replace_lane(v128_t __a, + int __i, + int32_t __b) + __REQUIRE_CONSTANT(__i) { + __i32x4 __v = (__i32x4)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_replace_lane( + v128_t __a, int __i, uint32_t __b) __REQUIRE_CONSTANT(__i) { + __u32x4 __v = (__u32x4)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_splat(int64_t __a) { + return (v128_t)(__i64x2){__a, __a}; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_splat(uint64_t __a) { + return (v128_t)(__u64x2){__a, __a}; +} + +static __inline__ int64_t __DEFAULT_FN_ATTRS wasm_i64x2_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__i64x2)__a)[__i]; +} + +static __inline__ uint64_t __DEFAULT_FN_ATTRS +wasm_u64x2_extract_lane(v128_t __a, int __i) __REQUIRE_CONSTANT(__i) { + return ((__u64x2)__a)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_replace_lane(v128_t __a, + int __i, + int64_t __b) + __REQUIRE_CONSTANT(__i) { + __i64x2 __v = (__i64x2)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_replace_lane( + v128_t __a, int __i, uint64_t __b) __REQUIRE_CONSTANT(__i) { + __u64x2 __v = (__u64x2)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_splat(float __a) { + return (v128_t)(__f32x4){__a, __a, __a, __a}; +} + +static __inline__ float __DEFAULT_FN_ATTRS wasm_f32x4_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__f32x4)__a)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_replace_lane(v128_t __a, + int __i, + float __b) + __REQUIRE_CONSTANT(__i) { + __f32x4 __v = (__f32x4)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_splat(double __a) { + return (v128_t)(__f64x2){__a, __a}; +} + +static __inline__ double __DEFAULT_FN_ATTRS wasm_f64x2_extract_lane(v128_t __a, + int __i) + __REQUIRE_CONSTANT(__i) { + return ((__f64x2)__a)[__i]; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_replace_lane(v128_t __a, + int __i, + double __b) + __REQUIRE_CONSTANT(__i) { + __f64x2 __v = (__f64x2)__a; + __v[__i] = __b; + return (v128_t)__v; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_eq(v128_t __a, + v128_t __b) { + return (v128_t)((__i8x16)__a == (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_ne(v128_t __a, + v128_t __b) { + return (v128_t)((__i8x16)__a != (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__i8x16)__a < (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__u8x16)__a < (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__i8x16)__a > (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__u8x16)__a > (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_le(v128_t __a, + v128_t __b) { + return (v128_t)((__i8x16)__a <= (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_le(v128_t __a, + v128_t __b) { + return (v128_t)((__u8x16)__a <= (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__i8x16)__a >= (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__u8x16)__a >= (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_eq(v128_t __a, + v128_t __b) { + return (v128_t)((__i16x8)__a == (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_ne(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a != (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__i16x8)__a < (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a < (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__i16x8)__a > (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a > (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_le(v128_t __a, + v128_t __b) { + return (v128_t)((__i16x8)__a <= (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_le(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a <= (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__i16x8)__a >= (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a >= (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_eq(v128_t __a, + v128_t __b) { + return (v128_t)((__i32x4)__a == (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_ne(v128_t __a, + v128_t __b) { + return (v128_t)((__i32x4)__a != (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__i32x4)__a < (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a < (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__i32x4)__a > (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a > (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_le(v128_t __a, + v128_t __b) { + return (v128_t)((__i32x4)__a <= (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_le(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a <= (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__i32x4)__a >= (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a >= (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_eq(v128_t __a, + v128_t __b) { + return (v128_t)((__i64x2)__a == (__i64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_ne(v128_t __a, + v128_t __b) { + return (v128_t)((__i64x2)__a != (__i64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__i64x2)__a < (__i64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__i64x2)__a > (__i64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_le(v128_t __a, + v128_t __b) { + return (v128_t)((__i64x2)__a <= (__i64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__i64x2)__a >= (__i64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_eq(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a == (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_ne(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a != (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a < (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a > (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_le(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a <= (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a >= (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_eq(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a == (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_ne(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a != (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_lt(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a < (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_gt(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a > (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_le(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a <= (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_ge(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a >= (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_not(v128_t __a) { + return ~__a; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_and(v128_t __a, + v128_t __b) { + return __a & __b; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_or(v128_t __a, + v128_t __b) { + return __a | __b; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_xor(v128_t __a, + v128_t __b) { + return __a ^ __b; +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_andnot(v128_t __a, + v128_t __b) { + return __a & ~__b; +} + +static __inline__ bool __DEFAULT_FN_ATTRS wasm_v128_any_true(v128_t __a) { + return __builtin_wasm_any_true_v128((__i8x16)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_v128_bitselect(v128_t __a, + v128_t __b, + v128_t __mask) { + return (v128_t)__builtin_wasm_bitselect((__i32x4)__a, (__i32x4)__b, + (__i32x4)__mask); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_abs(v128_t __a) { + return (v128_t)__builtin_wasm_abs_i8x16((__i8x16)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_neg(v128_t __a) { + return (v128_t)(-(__u8x16)__a); +} + +static __inline__ bool __DEFAULT_FN_ATTRS wasm_i8x16_all_true(v128_t __a) { + return __builtin_wasm_all_true_i8x16((__i8x16)__a); +} + +static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i8x16_bitmask(v128_t __a) { + return __builtin_wasm_bitmask_i8x16((__i8x16)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_popcnt(v128_t __a) { + return (v128_t)__builtin_wasm_popcnt_i8x16((__i8x16)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_shl(v128_t __a, + uint32_t __b) { + return (v128_t)((__i8x16)__a << (__b & 0x7)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__i8x16)__a >> (__b & 0x7)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__u8x16)__a >> (__b & 0x7)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_add(v128_t __a, + v128_t __b) { + return (v128_t)((__u8x16)__a + (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_add_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_add_sat_s_i8x16((__i8x16)__a, (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_add_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_add_sat_u_i8x16((__u8x16)__a, (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_sub(v128_t __a, + v128_t __b) { + return (v128_t)((__u8x16)__a - (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_sub_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_sub_sat_s_i8x16((__i8x16)__a, (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_sub_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_sub_sat_u_i8x16((__u8x16)__a, (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_s_i8x16((__i8x16)__a, (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_u_i8x16((__u8x16)__a, (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_s_i8x16((__i8x16)__a, (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_u_i8x16((__u8x16)__a, (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_avgr(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_avgr_u_i8x16((__u8x16)__a, (__u8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_abs(v128_t __a) { + return (v128_t)__builtin_wasm_abs_i16x8((__i16x8)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_neg(v128_t __a) { + return (v128_t)(-(__u16x8)__a); +} + +static __inline__ bool __DEFAULT_FN_ATTRS wasm_i16x8_all_true(v128_t __a) { + return __builtin_wasm_all_true_i16x8((__i16x8)__a); +} + +static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i16x8_bitmask(v128_t __a) { + return __builtin_wasm_bitmask_i16x8((__i16x8)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_shl(v128_t __a, + uint32_t __b) { + return (v128_t)((__i16x8)__a << (__b & 0xF)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__i16x8)__a >> (__b & 0xF)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__u16x8)__a >> (__b & 0xF)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_add(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a + (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_add_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_add_sat_s_i16x8((__i16x8)__a, (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_add_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_add_sat_u_i16x8((__u16x8)__a, (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_sub(v128_t __a, + v128_t __b) { + return (v128_t)((__i16x8)__a - (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_sub_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_sub_sat_s_i16x8((__i16x8)__a, (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_sub_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_sub_sat_u_i16x8((__u16x8)__a, (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_mul(v128_t __a, + v128_t __b) { + return (v128_t)((__u16x8)__a * (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_s_i16x8((__i16x8)__a, (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_u_i16x8((__u16x8)__a, (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_s_i16x8((__i16x8)__a, (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_u_i16x8((__u16x8)__a, (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_avgr(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_avgr_u_i16x8((__u16x8)__a, (__u16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_abs(v128_t __a) { + return (v128_t)__builtin_wasm_abs_i32x4((__i32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_neg(v128_t __a) { + return (v128_t)(-(__u32x4)__a); +} + +static __inline__ bool __DEFAULT_FN_ATTRS wasm_i32x4_all_true(v128_t __a) { + return __builtin_wasm_all_true_i32x4((__i32x4)__a); +} + +static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i32x4_bitmask(v128_t __a) { + return __builtin_wasm_bitmask_i32x4((__i32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_shl(v128_t __a, + uint32_t __b) { + return (v128_t)((__i32x4)__a << (__b & 0x1F)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__i32x4)__a >> (__b & 0x1F)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__u32x4)__a >> (__b & 0x1F)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_add(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a + (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_sub(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a - (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_mul(v128_t __a, + v128_t __b) { + return (v128_t)((__u32x4)__a * (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_s_i32x4((__i32x4)__a, (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_u_i32x4((__u32x4)__a, (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_s_i32x4((__i32x4)__a, (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_u_i32x4((__u32x4)__a, (__u32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_dot_i16x8(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_dot_s_i32x4_i16x8((__i16x8)__a, (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_abs(v128_t __a) { + return (v128_t)__builtin_wasm_abs_i64x2((__i64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_neg(v128_t __a) { + return (v128_t)(-(__u64x2)__a); +} + +static __inline__ bool __DEFAULT_FN_ATTRS wasm_i64x2_all_true(v128_t __a) { + return __builtin_wasm_all_true_i64x2((__i64x2)__a); +} + +static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i64x2_bitmask(v128_t __a) { + return __builtin_wasm_bitmask_i64x2((__i64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shl(v128_t __a, + uint32_t __b) { + return (v128_t)((__i64x2)__a << ((int64_t)__b & 0x3F)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__i64x2)__a >> ((int64_t)__b & 0x3F)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_shr(v128_t __a, + uint32_t __b) { + return (v128_t)((__u64x2)__a >> ((int64_t)__b & 0x3F)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_add(v128_t __a, + v128_t __b) { + return (v128_t)((__u64x2)__a + (__u64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_sub(v128_t __a, + v128_t __b) { + return (v128_t)((__u64x2)__a - (__u64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_mul(v128_t __a, + v128_t __b) { + return (v128_t)((__u64x2)__a * (__u64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_abs(v128_t __a) { + return (v128_t)__builtin_wasm_abs_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_neg(v128_t __a) { + return (v128_t)(-(__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_sqrt(v128_t __a) { + return (v128_t)__builtin_wasm_sqrt_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_ceil(v128_t __a) { + return (v128_t)__builtin_wasm_ceil_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_floor(v128_t __a) { + return (v128_t)__builtin_wasm_floor_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_trunc(v128_t __a) { + return (v128_t)__builtin_wasm_trunc_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_nearest(v128_t __a) { + return (v128_t)__builtin_wasm_nearest_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_add(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a + (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_sub(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a - (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_mul(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a * (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_div(v128_t __a, + v128_t __b) { + return (v128_t)((__f32x4)__a / (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_f32x4((__f32x4)__a, (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_f32x4((__f32x4)__a, (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmin(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_pmin_f32x4((__f32x4)__a, (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_pmax(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_pmax_f32x4((__f32x4)__a, (__f32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_abs(v128_t __a) { + return (v128_t)__builtin_wasm_abs_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_neg(v128_t __a) { + return (v128_t)(-(__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_sqrt(v128_t __a) { + return (v128_t)__builtin_wasm_sqrt_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_ceil(v128_t __a) { + return (v128_t)__builtin_wasm_ceil_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_floor(v128_t __a) { + return (v128_t)__builtin_wasm_floor_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_trunc(v128_t __a) { + return (v128_t)__builtin_wasm_trunc_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_nearest(v128_t __a) { + return (v128_t)__builtin_wasm_nearest_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_add(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a + (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_sub(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a - (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_mul(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a * (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_div(v128_t __a, + v128_t __b) { + return (v128_t)((__f64x2)__a / (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_min_f64x2((__f64x2)__a, (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_max_f64x2((__f64x2)__a, (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_pmin(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_pmin_f64x2((__f64x2)__a, (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_pmax(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_pmax_f64x2((__f64x2)__a, (__f64x2)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_trunc_sat_f32x4(v128_t __a) { + return (v128_t)__builtin_wasm_trunc_saturate_s_i32x4_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_trunc_sat_f32x4(v128_t __a) { + return (v128_t)__builtin_wasm_trunc_saturate_u_i32x4_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f32x4_convert_i32x4(v128_t __a) { + return (v128_t) __builtin_convertvector((__i32x4)__a, __f32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f32x4_convert_u32x4(v128_t __a) { + return (v128_t) __builtin_convertvector((__u32x4)__a, __f32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f64x2_convert_low_i32x4(v128_t __a) { + return (v128_t) __builtin_convertvector((__i32x2){__a[0], __a[1]}, __f64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f64x2_convert_low_u32x4(v128_t __a) { + return (v128_t) __builtin_convertvector((__u32x2){__a[0], __a[1]}, __f64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_trunc_sat_f64x2_zero(v128_t __a) { + return (v128_t)__builtin_wasm_trunc_sat_s_zero_f64x2_i32x4((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_trunc_sat_f64x2_zero(v128_t __a) { + return (v128_t)__builtin_wasm_trunc_sat_u_zero_f64x2_i32x4((__f64x2)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f32x4_demote_f64x2_zero(v128_t __a) { + return (v128_t) __builtin_convertvector( + __builtin_shufflevector((__f64x2)__a, (__f64x2){0, 0}, 0, 1, 2, 3), + __f32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_f64x2_promote_low_f32x4(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__f32x2){((__f32x4)__a)[0], ((__f32x4)__a)[1]}, __f64x2); +} + +#define wasm_i8x16_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, \ + __c7, __c8, __c9, __c10, __c11, __c12, __c13, \ + __c14, __c15) \ + ((v128_t)__builtin_wasm_shuffle_i8x16( \ + (__i8x16)(__a), (__i8x16)(__b), __c0, __c1, __c2, __c3, __c4, __c5, \ + __c6, __c7, __c8, __c9, __c10, __c11, __c12, __c13, __c14, __c15)) + +#define wasm_i16x8_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, \ + __c7) \ + ((v128_t)__builtin_wasm_shuffle_i8x16( \ + (__i8x16)(__a), (__i8x16)(__b), (__c0)*2, (__c0)*2 + 1, (__c1)*2, \ + (__c1)*2 + 1, (__c2)*2, (__c2)*2 + 1, (__c3)*2, (__c3)*2 + 1, (__c4)*2, \ + (__c4)*2 + 1, (__c5)*2, (__c5)*2 + 1, (__c6)*2, (__c6)*2 + 1, (__c7)*2, \ + (__c7)*2 + 1)) + +#define wasm_i32x4_shuffle(__a, __b, __c0, __c1, __c2, __c3) \ + ((v128_t)__builtin_wasm_shuffle_i8x16( \ + (__i8x16)(__a), (__i8x16)(__b), (__c0)*4, (__c0)*4 + 1, (__c0)*4 + 2, \ + (__c0)*4 + 3, (__c1)*4, (__c1)*4 + 1, (__c1)*4 + 2, (__c1)*4 + 3, \ + (__c2)*4, (__c2)*4 + 1, (__c2)*4 + 2, (__c2)*4 + 3, (__c3)*4, \ + (__c3)*4 + 1, (__c3)*4 + 2, (__c3)*4 + 3)) + +#define wasm_i64x2_shuffle(__a, __b, __c0, __c1) \ + ((v128_t)__builtin_wasm_shuffle_i8x16( \ + (__i8x16)(__a), (__i8x16)(__b), (__c0)*8, (__c0)*8 + 1, (__c0)*8 + 2, \ + (__c0)*8 + 3, (__c0)*8 + 4, (__c0)*8 + 5, (__c0)*8 + 6, (__c0)*8 + 7, \ + (__c1)*8, (__c1)*8 + 1, (__c1)*8 + 2, (__c1)*8 + 3, (__c1)*8 + 4, \ + (__c1)*8 + 5, (__c1)*8 + 6, (__c1)*8 + 7)) + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_swizzle(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_swizzle_i8x16((__i8x16)__a, (__i8x16)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i8x16_narrow_i16x8(v128_t __a, v128_t __b) { + return (v128_t)__builtin_wasm_narrow_s_i8x16_i16x8((__i16x8)__a, + (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u8x16_narrow_i16x8(v128_t __a, v128_t __b) { + return (v128_t)__builtin_wasm_narrow_u_i8x16_i16x8((__i16x8)__a, + (__i16x8)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_narrow_i32x4(v128_t __a, v128_t __b) { + return (v128_t)__builtin_wasm_narrow_s_i16x8_i32x4((__i32x4)__a, + (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_narrow_i32x4(v128_t __a, v128_t __b) { + return (v128_t)__builtin_wasm_narrow_u_i16x8_i32x4((__i32x4)__a, + (__i32x4)__b); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_extend_low_i8x16(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__i8x8){((__i8x16)__a)[0], ((__i8x16)__a)[1], ((__i8x16)__a)[2], + ((__i8x16)__a)[3], ((__i8x16)__a)[4], ((__i8x16)__a)[5], + ((__i8x16)__a)[6], ((__i8x16)__a)[7]}, + __i16x8); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_extend_high_i8x16(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__i8x8){((__i8x16)__a)[8], ((__i8x16)__a)[9], ((__i8x16)__a)[10], + ((__i8x16)__a)[11], ((__i8x16)__a)[12], ((__i8x16)__a)[13], + ((__i8x16)__a)[14], ((__i8x16)__a)[15]}, + __i16x8); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_extend_low_u8x16(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__u8x8){((__u8x16)__a)[0], ((__u8x16)__a)[1], ((__u8x16)__a)[2], + ((__u8x16)__a)[3], ((__u8x16)__a)[4], ((__u8x16)__a)[5], + ((__u8x16)__a)[6], ((__u8x16)__a)[7]}, + __u16x8); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_extend_high_u8x16(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__u8x8){((__u8x16)__a)[8], ((__u8x16)__a)[9], ((__u8x16)__a)[10], + ((__u8x16)__a)[11], ((__u8x16)__a)[12], ((__u8x16)__a)[13], + ((__u8x16)__a)[14], ((__u8x16)__a)[15]}, + __u16x8); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_extend_low_i16x8(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__i16x4){((__i16x8)__a)[0], ((__i16x8)__a)[1], ((__i16x8)__a)[2], + ((__i16x8)__a)[3]}, + __i32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_extend_high_i16x8(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__i16x4){((__i16x8)__a)[4], ((__i16x8)__a)[5], ((__i16x8)__a)[6], + ((__i16x8)__a)[7]}, + __i32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_extend_low_u16x8(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__u16x4){((__u16x8)__a)[0], ((__u16x8)__a)[1], ((__u16x8)__a)[2], + ((__u16x8)__a)[3]}, + __u32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_extend_high_u16x8(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__u16x4){((__u16x8)__a)[4], ((__u16x8)__a)[5], ((__u16x8)__a)[6], + ((__u16x8)__a)[7]}, + __u32x4); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i64x2_extend_low_i32x4(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__i32x2){((__i32x4)__a)[0], ((__i32x4)__a)[1]}, __i64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i64x2_extend_high_i32x4(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__i32x2){((__i32x4)__a)[2], ((__i32x4)__a)[3]}, __i64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u64x2_extend_low_u32x4(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__u32x2){((__u32x4)__a)[0], ((__u32x4)__a)[1]}, __u64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u64x2_extend_high_u32x4(v128_t __a) { + return (v128_t) __builtin_convertvector( + (__u32x2){((__u32x4)__a)[2], ((__u32x4)__a)[3]}, __u64x2); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_extadd_pairwise_i8x16(v128_t __a) { + return (v128_t)__builtin_wasm_extadd_pairwise_i8x16_s_i16x8((__i8x16)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_extadd_pairwise_u8x16(v128_t __a) { + return (v128_t)__builtin_wasm_extadd_pairwise_i8x16_u_i16x8((__u8x16)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_extadd_pairwise_i16x8(v128_t __a) { + return (v128_t)__builtin_wasm_extadd_pairwise_i16x8_s_i32x4((__i16x8)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_extadd_pairwise_u16x8(v128_t __a) { + return (v128_t)__builtin_wasm_extadd_pairwise_i16x8_u_i32x4((__u16x8)__a); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_extmul_low_i8x16(v128_t __a, v128_t __b) { + return (v128_t)((__i16x8)wasm_i16x8_extend_low_i8x16(__a) * + (__i16x8)wasm_i16x8_extend_low_i8x16(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i16x8_extmul_high_i8x16(v128_t __a, v128_t __b) { + return (v128_t)((__i16x8)wasm_i16x8_extend_high_i8x16(__a) * + (__i16x8)wasm_i16x8_extend_high_i8x16(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_extmul_low_u8x16(v128_t __a, v128_t __b) { + return (v128_t)((__u16x8)wasm_u16x8_extend_low_u8x16(__a) * + (__u16x8)wasm_u16x8_extend_low_u8x16(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u16x8_extmul_high_u8x16(v128_t __a, v128_t __b) { + return (v128_t)((__u16x8)wasm_u16x8_extend_high_u8x16(__a) * + (__u16x8)wasm_u16x8_extend_high_u8x16(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_extmul_low_i16x8(v128_t __a, v128_t __b) { + return (v128_t)((__i32x4)wasm_i32x4_extend_low_i16x8(__a) * + (__i32x4)wasm_i32x4_extend_low_i16x8(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i32x4_extmul_high_i16x8(v128_t __a, v128_t __b) { + return (v128_t)((__i32x4)wasm_i32x4_extend_high_i16x8(__a) * + (__i32x4)wasm_i32x4_extend_high_i16x8(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_extmul_low_u16x8(v128_t __a, v128_t __b) { + return (v128_t)((__u32x4)wasm_u32x4_extend_low_u16x8(__a) * + (__u32x4)wasm_u32x4_extend_low_u16x8(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u32x4_extmul_high_u16x8(v128_t __a, v128_t __b) { + return (v128_t)((__u32x4)wasm_u32x4_extend_high_u16x8(__a) * + (__u32x4)wasm_u32x4_extend_high_u16x8(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i64x2_extmul_low_i32x4(v128_t __a, v128_t __b) { + return (v128_t)((__i64x2)wasm_i64x2_extend_low_i32x4(__a) * + (__i64x2)wasm_i64x2_extend_low_i32x4(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_i64x2_extmul_high_i32x4(v128_t __a, v128_t __b) { + return (v128_t)((__i64x2)wasm_i64x2_extend_high_i32x4(__a) * + (__i64x2)wasm_i64x2_extend_high_i32x4(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u64x2_extmul_low_u32x4(v128_t __a, v128_t __b) { + return (v128_t)((__u64x2)wasm_u64x2_extend_low_u32x4(__a) * + (__u64x2)wasm_u64x2_extend_low_u32x4(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS +wasm_u64x2_extmul_high_u32x4(v128_t __a, v128_t __b) { + return (v128_t)((__u64x2)wasm_u64x2_extend_high_u32x4(__a) * + (__u64x2)wasm_u64x2_extend_high_u32x4(__b)); +} + +static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_q15mulr_sat(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_q15mulr_sat_s_i16x8((__i16x8)__a, (__i16x8)__b); +} + +// Old intrinsic names supported to ease transitioning to the standard names. Do +// not use these; they will be removed in the near future. + +#define __DEPRECATED_FN_ATTRS(__replacement) \ + __DEFAULT_FN_ATTRS __attribute__( \ + (deprecated("use " __replacement " instead", __replacement))) + +#define __WASM_STR(X) #X + +#ifdef __DEPRECATED +#define __DEPRECATED_WASM_MACRO(__name, __replacement) \ + _Pragma(__WASM_STR(GCC warning( \ + "'" __name "' is deprecated: use '" __replacement "' instead"))) +#else +#define __DEPRECATED_WASM_MACRO(__name, __replacement) +#endif + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_v128_load8_splat") +wasm_v8x16_load_splat(const void *__mem) { + return wasm_v128_load8_splat(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_v128_load16_splat") +wasm_v16x8_load_splat(const void *__mem) { + return wasm_v128_load16_splat(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_v128_load32_splat") +wasm_v32x4_load_splat(const void *__mem) { + return wasm_v128_load32_splat(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_v128_load64_splat") +wasm_v64x2_load_splat(const void *__mem) { + return wasm_v128_load64_splat(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i16x8_load8x8") +wasm_i16x8_load_8x8(const void *__mem) { + return wasm_i16x8_load8x8(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u16x8_load8x8") +wasm_u16x8_load_8x8(const void *__mem) { + return wasm_u16x8_load8x8(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i32x4_load16x4") +wasm_i32x4_load_16x4(const void *__mem) { + return wasm_i32x4_load16x4(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u32x4_load16x4") +wasm_u32x4_load_16x4(const void *__mem) { + return wasm_u32x4_load16x4(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i64x2_load32x2") +wasm_i64x2_load_32x2(const void *__mem) { + return wasm_i64x2_load32x2(__mem); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u64x2_load32x2") +wasm_u64x2_load_32x2(const void *__mem) { + return wasm_u64x2_load32x2(__mem); +} + +#define wasm_v8x16_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, \ + __c7, __c8, __c9, __c10, __c11, __c12, __c13, \ + __c14, __c15) \ + __DEPRECATED_WASM_MACRO("wasm_v8x16_shuffle", "wasm_i8x16_shuffle") \ + wasm_i8x16_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7, \ + __c8, __c9, __c10, __c11, __c12, __c13, __c14, __c15) + +#define wasm_v16x8_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, \ + __c7) \ + __DEPRECATED_WASM_MACRO("wasm_v16x8_shuffle", "wasm_i16x8_shuffle") \ + wasm_i16x8_shuffle(__a, __b, __c0, __c1, __c2, __c3, __c4, __c5, __c6, __c7) + +#define wasm_v32x4_shuffle(__a, __b, __c0, __c1, __c2, __c3) \ + __DEPRECATED_WASM_MACRO("wasm_v32x4_shuffle", "wasm_i32x4_shuffle") \ + wasm_i32x4_shuffle(__a, __b, __c0, __c1, __c2, __c3) + +#define wasm_v64x2_shuffle(__a, __b, __c0, __c1) \ + __DEPRECATED_WASM_MACRO("wasm_v64x2_shuffle", "wasm_i64x2_shuffle") \ + wasm_i64x2_shuffle(__a, __b, __c0, __c1) + +// Relaxed SIMD intrinsics + +#define __RELAXED_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("relaxed-simd"), \ + __min_vector_width__(128))) + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_f32x4_relaxed_madd(v128_t __a, v128_t __b, v128_t __c) { + return (v128_t)__builtin_wasm_relaxed_madd_f32x4((__f32x4)__a, (__f32x4)__b, + (__f32x4)__c); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_f32x4_relaxed_nmadd(v128_t __a, v128_t __b, v128_t __c) { + return (v128_t)__builtin_wasm_relaxed_nmadd_f32x4((__f32x4)__a, (__f32x4)__b, + (__f32x4)__c); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_f64x2_relaxed_madd(v128_t __a, v128_t __b, v128_t __c) { + return (v128_t)__builtin_wasm_relaxed_madd_f64x2((__f64x2)__a, (__f64x2)__b, + (__f64x2)__c); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_f64x2_relaxed_nmadd(v128_t __a, v128_t __b, v128_t __c) { + return (v128_t)__builtin_wasm_relaxed_nmadd_f64x2((__f64x2)__a, (__f64x2)__b, + (__f64x2)__c); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i8x16_relaxed_laneselect(v128_t __a, v128_t __b, v128_t __m) { + return (v128_t)__builtin_wasm_relaxed_laneselect_i8x16( + (__i8x16)__a, (__i8x16)__b, (__i8x16)__m); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i16x8_relaxed_laneselect(v128_t __a, v128_t __b, v128_t __m) { + return (v128_t)__builtin_wasm_relaxed_laneselect_i16x8( + (__i16x8)__a, (__i16x8)__b, (__i16x8)__m); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i32x4_relaxed_laneselect(v128_t __a, v128_t __b, v128_t __m) { + return (v128_t)__builtin_wasm_relaxed_laneselect_i32x4( + (__i32x4)__a, (__i32x4)__b, (__i32x4)__m); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i64x2_relaxed_laneselect(v128_t __a, v128_t __b, v128_t __m) { + return (v128_t)__builtin_wasm_relaxed_laneselect_i64x2( + (__i64x2)__a, (__i64x2)__b, (__i64x2)__m); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i8x16_relaxed_swizzle(v128_t __a, v128_t __s) { + return (v128_t)__builtin_wasm_relaxed_swizzle_i8x16((__i8x16)__a, + (__i8x16)__s); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS wasm_f32x4_relaxed_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_relaxed_min_f32x4((__f32x4)__a, (__f32x4)__b); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS wasm_f32x4_relaxed_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_relaxed_max_f32x4((__f32x4)__a, (__f32x4)__b); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS wasm_f64x2_relaxed_min(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_relaxed_min_f64x2((__f64x2)__a, (__f64x2)__b); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS wasm_f64x2_relaxed_max(v128_t __a, + v128_t __b) { + return (v128_t)__builtin_wasm_relaxed_max_f64x2((__f64x2)__a, (__f64x2)__b); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i32x4_relaxed_trunc_f32x4(v128_t __a) { + return (v128_t)__builtin_wasm_relaxed_trunc_s_i32x4_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_u32x4_relaxed_trunc_f32x4(v128_t __a) { + return (v128_t)__builtin_wasm_relaxed_trunc_u_i32x4_f32x4((__f32x4)__a); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i32x4_relaxed_trunc_f64x2_zero(v128_t __a) { + return (v128_t)__builtin_wasm_relaxed_trunc_s_zero_i32x4_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_u32x4_relaxed_trunc_f64x2_zero(v128_t __a) { + return (v128_t)__builtin_wasm_relaxed_trunc_u_zero_i32x4_f64x2((__f64x2)__a); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i16x8_relaxed_q15mulr(v128_t __a, v128_t __b) { + return (v128_t)__builtin_wasm_relaxed_q15mulr_s_i16x8((__i16x8)__a, + (__i16x8)__b); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i16x8_relaxed_dot_i8x16_i7x16(v128_t __a, v128_t __b) { + return (v128_t)__builtin_wasm_relaxed_dot_i8x16_i7x16_s_i16x8((__i8x16)__a, + (__i8x16)__b); +} + +static __inline__ v128_t __RELAXED_FN_ATTRS +wasm_i32x4_relaxed_dot_i8x16_i7x16_add(v128_t __a, v128_t __b, v128_t __c) { + return (v128_t)__builtin_wasm_relaxed_dot_i8x16_i7x16_add_s_i32x4( + (__i8x16)__a, (__i8x16)__b, (__i32x4)__c); +} + +// Deprecated intrinsics + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i8x16_swizzle") +wasm_v8x16_swizzle(v128_t __a, v128_t __b) { + return wasm_i8x16_swizzle(__a, __b); +} + +static __inline__ bool __DEPRECATED_FN_ATTRS("wasm_v128_any_true") +wasm_i8x16_any_true(v128_t __a) { + return wasm_v128_any_true(__a); +} + +static __inline__ bool __DEPRECATED_FN_ATTRS("wasm_v128_any_true") +wasm_i16x8_any_true(v128_t __a) { + return wasm_v128_any_true(__a); +} + +static __inline__ bool __DEPRECATED_FN_ATTRS("wasm_v128_any_true") +wasm_i32x4_any_true(v128_t __a) { + return wasm_v128_any_true(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i8x16_add_sat") +wasm_i8x16_add_saturate(v128_t __a, v128_t __b) { + return wasm_i8x16_add_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u8x16_add_sat") +wasm_u8x16_add_saturate(v128_t __a, v128_t __b) { + return wasm_u8x16_add_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i8x16_sub_sat") +wasm_i8x16_sub_saturate(v128_t __a, v128_t __b) { + return wasm_i8x16_sub_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u8x16_sub_sat") +wasm_u8x16_sub_saturate(v128_t __a, v128_t __b) { + return wasm_u8x16_sub_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i16x8_add_sat") +wasm_i16x8_add_saturate(v128_t __a, v128_t __b) { + return wasm_i16x8_add_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u16x8_add_sat") +wasm_u16x8_add_saturate(v128_t __a, v128_t __b) { + return wasm_u16x8_add_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i16x8_sub_sat") +wasm_i16x8_sub_saturate(v128_t __a, v128_t __b) { + return wasm_i16x8_sub_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u16x8_sub_sat") +wasm_u16x8_sub_saturate(v128_t __a, v128_t __b) { + return wasm_u16x8_sub_sat(__a, __b); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i16x8_extend_low_i8x16") +wasm_i16x8_widen_low_i8x16(v128_t __a) { + return wasm_i16x8_extend_low_i8x16(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i16x8_extend_high_i8x16") +wasm_i16x8_widen_high_i8x16(v128_t __a) { + return wasm_i16x8_extend_high_i8x16(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u16x8_extend_low_u8x16") +wasm_i16x8_widen_low_u8x16(v128_t __a) { + return wasm_u16x8_extend_low_u8x16(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u16x8_extend_high_u8x16") +wasm_i16x8_widen_high_u8x16(v128_t __a) { + return wasm_u16x8_extend_high_u8x16(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i32x4_extend_low_i16x8") +wasm_i32x4_widen_low_i16x8(v128_t __a) { + return wasm_i32x4_extend_low_i16x8(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i32x4_extend_high_i16x8") +wasm_i32x4_widen_high_i16x8(v128_t __a) { + return wasm_i32x4_extend_high_i16x8(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u32x4_extend_low_u16x8") +wasm_i32x4_widen_low_u16x8(v128_t __a) { + return wasm_u32x4_extend_low_u16x8(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u32x4_extend_high_u16x8") +wasm_i32x4_widen_high_u16x8(v128_t __a) { + return wasm_u32x4_extend_high_u16x8(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_i32x4_trunc_sat_f32x4") +wasm_i32x4_trunc_saturate_f32x4(v128_t __a) { + return wasm_i32x4_trunc_sat_f32x4(__a); +} + +static __inline__ v128_t __DEPRECATED_FN_ATTRS("wasm_u32x4_trunc_sat_f32x4") +wasm_u32x4_trunc_saturate_f32x4(v128_t __a) { + return wasm_u32x4_trunc_sat_f32x4(__a); +} + +// Undefine helper macros +#undef __DEFAULT_FN_ATTRS +#undef __DEPRECATED_FN_ATTRS + +#endif // __WASM_SIMD128_H diff --git a/llvm/lib/clang/19/include/wbnoinvdintrin.h b/llvm/lib/clang/19/include/wbnoinvdintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..cac0347efc4fc14a830ec864378ae68d30e32fc6 --- /dev/null +++ b/llvm/lib/clang/19/include/wbnoinvdintrin.h @@ -0,0 +1,24 @@ +/*===-------------- wbnoinvdintrin.h - wbnoinvd intrinsic-------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#if !defined __X86INTRIN_H && !defined __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __WBNOINVDINTRIN_H +#define __WBNOINVDINTRIN_H + +static __inline__ void + __attribute__((__always_inline__, __nodebug__, __target__("wbnoinvd"))) +_wbnoinvd (void) +{ + __builtin_ia32_wbnoinvd (); +} + +#endif /* __WBNOINVDINTRIN_H */ diff --git a/llvm/lib/clang/19/include/wmmintrin.h b/llvm/lib/clang/19/include/wmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..49148dbf3ac61581e4d3015715eee9545481c1d0 --- /dev/null +++ b/llvm/lib/clang/19/include/wmmintrin.h @@ -0,0 +1,23 @@ +/*===---- wmmintrin.h - AES intrinsics ------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __WMMINTRIN_H +#define __WMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +#include <__wmmintrin_aes.h> + +#include <__wmmintrin_pclmul.h> + +#endif /* __WMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/x86gprintrin.h b/llvm/lib/clang/19/include/x86gprintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..3d5cc606d7e63d85ccb068fd58df6a68c4b2f7f3 --- /dev/null +++ b/llvm/lib/clang/19/include/x86gprintrin.h @@ -0,0 +1,63 @@ +/*===--------------- x86gprintrin.h - X86 GPR intrinsics ------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86GPRINTRIN_H +#define __X86GPRINTRIN_H + +#if !defined(__SCE__) || __has_feature(modules) || defined(__HRESET__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__UINTR__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__USERMSR__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__CRC32__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__PRFCHI__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__RAOINT__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__CMPCCXADD__) +#include +#endif + +#if defined(__i386__) +#define __SAVE_GPRBX "mov {%%ebx, %%eax |eax, ebx};" +#define __RESTORE_GPRBX "mov {%%eax, %%ebx |ebx, eax};" +#define __TMPGPR "eax" +#else +// When in 64-bit target, the 32-bit operands generate a 32-bit result, +// zero-extended to a 64-bit result in the destination general-purpose, +// It means "mov x %ebx" will clobber the higher 32 bits of rbx, so we +// should preserve the 64-bit register rbx. +#define __SAVE_GPRBX "mov {%%rbx, %%rax |rax, rbx};" +#define __RESTORE_GPRBX "mov {%%rax, %%rbx |rbx, rax};" +#define __TMPGPR "rax" +#endif + +#define __SSC_MARK(__Tag) \ + __asm__ __volatile__( __SAVE_GPRBX \ + "mov {%0, %%ebx|ebx, %0}; " \ + ".byte 0x64, 0x67, 0x90; " \ + __RESTORE_GPRBX \ + ::"i"(__Tag) \ + : __TMPGPR ); + +#endif /* __X86GPRINTRIN_H */ diff --git a/llvm/lib/clang/19/include/x86intrin.h b/llvm/lib/clang/19/include/x86intrin.h new file mode 100644 index 0000000000000000000000000000000000000000..f42e9e580f883aacb4e4323fefb8d5a6b0b25779 --- /dev/null +++ b/llvm/lib/clang/19/include/x86intrin.h @@ -0,0 +1,53 @@ +/*===---- x86intrin.h - X86 intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#define __X86INTRIN_H + +#include + +#include + +#if !defined(__SCE__) || __has_feature(modules) || defined(__PRFCHW__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__SSE4A__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__FMA4__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__XOP__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__TBM__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__LWP__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__MWAITX__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__CLZERO__) +#include +#endif + +#if !defined(__SCE__) || __has_feature(modules) || defined(__RDPRU__) +#include +#endif + +#endif /* __X86INTRIN_H */ diff --git a/llvm/lib/clang/19/include/xmmintrin.h b/llvm/lib/clang/19/include/xmmintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..6fb27297af92793e1f94b8f6041c98f8c2109578 --- /dev/null +++ b/llvm/lib/clang/19/include/xmmintrin.h @@ -0,0 +1,3207 @@ +/*===---- xmmintrin.h - SSE intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __XMMINTRIN_H +#define __XMMINTRIN_H + +#if !defined(__i386__) && !defined(__x86_64__) +#error "This header is only meant to be used on x86 and x64 architecture" +#endif + +#include + +typedef int __v4si __attribute__((__vector_size__(16))); +typedef float __v4sf __attribute__((__vector_size__(16))); +typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16))); + +typedef float __m128_u __attribute__((__vector_size__(16), __aligned__(1))); + +/* Unsigned types */ +typedef unsigned int __v4su __attribute__((__vector_size__(16))); + +/* This header should only be included in a hosted environment as it depends on + * a standard library to provide allocation routines. */ +#if __STDC_HOSTED__ +#include +#endif + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS \ + __attribute__((__always_inline__, __nodebug__, __target__("sse,no-evex512"), \ + __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS_MMX \ + __attribute__((__always_inline__, __nodebug__, \ + __target__("mmx,sse,no-evex512"), __min_vector_width__(64))) + +/// Adds the 32-bit float values in the low-order bits of the operands. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDSS / ADDSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The lower 32 bits of this operand are used in the calculation. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The lower 32 bits of this operand are used in the calculation. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the sum +/// of the lower 32 bits of both operands. The upper 96 bits are copied from +/// the upper 96 bits of the first source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_add_ss(__m128 __a, __m128 __b) +{ + __a[0] += __b[0]; + return __a; +} + +/// Adds two 128-bit vectors of [4 x float], and returns the results of +/// the addition. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VADDPS / ADDPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \returns A 128-bit vector of [4 x float] containing the sums of both +/// operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_add_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4sf)__a + (__v4sf)__b); +} + +/// Subtracts the 32-bit float value in the low-order bits of the second +/// operand from the corresponding value in the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSUBSS / SUBSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing the minuend. The lower 32 bits +/// of this operand are used in the calculation. +/// \param __b +/// A 128-bit vector of [4 x float] containing the subtrahend. The lower 32 +/// bits of this operand are used in the calculation. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the +/// difference of the lower 32 bits of both operands. The upper 96 bits are +/// copied from the upper 96 bits of the first source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_sub_ss(__m128 __a, __m128 __b) +{ + __a[0] -= __b[0]; + return __a; +} + +/// Subtracts each of the values of the second operand from the first +/// operand, both of which are 128-bit vectors of [4 x float] and returns +/// the results of the subtraction. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSUBPS / SUBPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing the minuend. +/// \param __b +/// A 128-bit vector of [4 x float] containing the subtrahend. +/// \returns A 128-bit vector of [4 x float] containing the differences between +/// both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_sub_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4sf)__a - (__v4sf)__b); +} + +/// Multiplies two 32-bit float values in the low-order bits of the +/// operands. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMULSS / MULSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The lower 32 bits of this operand are used in the calculation. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// The lower 32 bits of this operand are used in the calculation. +/// \returns A 128-bit vector of [4 x float] containing the product of the lower +/// 32 bits of both operands. The upper 96 bits are copied from the upper 96 +/// bits of the first source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_mul_ss(__m128 __a, __m128 __b) +{ + __a[0] *= __b[0]; + return __a; +} + +/// Multiplies two 128-bit vectors of [4 x float] and returns the +/// results of the multiplication. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMULPS / MULPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \returns A 128-bit vector of [4 x float] containing the products of both +/// operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_mul_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4sf)__a * (__v4sf)__b); +} + +/// Divides the value in the low-order 32 bits of the first operand by +/// the corresponding value in the second operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDIVSS / DIVSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing the dividend. The lower 32 +/// bits of this operand are used in the calculation. +/// \param __b +/// A 128-bit vector of [4 x float] containing the divisor. The lower 32 bits +/// of this operand are used in the calculation. +/// \returns A 128-bit vector of [4 x float] containing the quotients of the +/// lower 32 bits of both operands. The upper 96 bits are copied from the +/// upper 96 bits of the first source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_div_ss(__m128 __a, __m128 __b) +{ + __a[0] /= __b[0]; + return __a; +} + +/// Divides two 128-bit vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VDIVPS / DIVPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing the dividend. +/// \param __b +/// A 128-bit vector of [4 x float] containing the divisor. +/// \returns A 128-bit vector of [4 x float] containing the quotients of both +/// operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_div_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4sf)__a / (__v4sf)__b); +} + +/// Calculates the square root of the value stored in the low-order bits +/// of a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSQRTSS / SQRTSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the calculation. +/// \returns A 128-bit vector of [4 x float] containing the square root of the +/// value in the low-order bits of the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_sqrt_ss(__m128 __a) +{ + return (__m128)__builtin_ia32_sqrtss((__v4sf)__a); +} + +/// Calculates the square roots of the values stored in a 128-bit vector +/// of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSQRTPS / SQRTPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the square roots of the +/// values in the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_sqrt_ps(__m128 __a) +{ + return __builtin_ia32_sqrtps((__v4sf)__a); +} + +/// Calculates the approximate reciprocal of the value stored in the +/// low-order bits of a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VRCPSS / RCPSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the calculation. +/// \returns A 128-bit vector of [4 x float] containing the approximate +/// reciprocal of the value in the low-order bits of the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_rcp_ss(__m128 __a) +{ + return (__m128)__builtin_ia32_rcpss((__v4sf)__a); +} + +/// Calculates the approximate reciprocals of the values stored in a +/// 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VRCPPS / RCPPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the approximate +/// reciprocals of the values in the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_rcp_ps(__m128 __a) +{ + return (__m128)__builtin_ia32_rcpps((__v4sf)__a); +} + +/// Calculates the approximate reciprocal of the square root of the value +/// stored in the low-order bits of a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VRSQRTSS / RSQRTSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the calculation. +/// \returns A 128-bit vector of [4 x float] containing the approximate +/// reciprocal of the square root of the value in the low-order bits of the +/// operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_rsqrt_ss(__m128 __a) +{ + return __builtin_ia32_rsqrtss((__v4sf)__a); +} + +/// Calculates the approximate reciprocals of the square roots of the +/// values stored in a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VRSQRTPS / RSQRTPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the approximate +/// reciprocals of the square roots of the values in the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_rsqrt_ps(__m128 __a) +{ + return __builtin_ia32_rsqrtps((__v4sf)__a); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands and returns the lesser value in the low-order bits of the +/// vector of [4 x float]. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMINSS / MINSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the +/// minimum value between both operands. The upper 96 bits are copied from +/// the upper 96 bits of the first source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_min_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 128-bit vectors of [4 x float] and returns the lesser +/// of each pair of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMINPS / MINPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. +/// \returns A 128-bit vector of [4 x float] containing the minimum values +/// between both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_min_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands and returns the greater value in the low-order bits of a 128-bit +/// vector of [4 x float]. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMAXSS / MAXSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the +/// maximum value between both operands. The upper 96 bits are copied from +/// the upper 96 bits of the first source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_max_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 128-bit vectors of [4 x float] and returns the greater +/// of each pair of values. +/// +/// If either value in a comparison is NaN, returns the value from \a __b. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMAXPS / MAXPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. +/// \returns A 128-bit vector of [4 x float] containing the maximum values +/// between both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_max_ps(__m128 __a, __m128 __b) +{ + return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b); +} + +/// Performs a bitwise AND of two 128-bit vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VANDPS / ANDPS instructions. +/// +/// \param __a +/// A 128-bit vector containing one of the source operands. +/// \param __b +/// A 128-bit vector containing one of the source operands. +/// \returns A 128-bit vector of [4 x float] containing the bitwise AND of the +/// values between both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_and_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4su)__a & (__v4su)__b); +} + +/// Performs a bitwise AND of two 128-bit vectors of [4 x float], using +/// the one's complement of the values contained in the first source +/// operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VANDNPS / ANDNPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing the first source operand. The +/// one's complement of this value is used in the bitwise AND. +/// \param __b +/// A 128-bit vector of [4 x float] containing the second source operand. +/// \returns A 128-bit vector of [4 x float] containing the bitwise AND of the +/// one's complement of the first operand and the values in the second +/// operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_andnot_ps(__m128 __a, __m128 __b) +{ + return (__m128)(~(__v4su)__a & (__v4su)__b); +} + +/// Performs a bitwise OR of two 128-bit vectors of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VORPS / ORPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \returns A 128-bit vector of [4 x float] containing the bitwise OR of the +/// values between both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_or_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4su)__a | (__v4su)__b); +} + +/// Performs a bitwise exclusive OR of two 128-bit vectors of +/// [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS / XORPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the source operands. +/// \returns A 128-bit vector of [4 x float] containing the bitwise exclusive OR +/// of the values between both operands. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_xor_ps(__m128 __a, __m128 __b) +{ + return (__m128)((__v4su)__a ^ (__v4su)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands for equality. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector [4 x float]. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPEQSS / CMPEQSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpeq_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpeqss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] for equality. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPEQPS / CMPEQPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpeq_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpeqps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is less than the +/// corresponding value in the second operand. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTSS / CMPLTSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmplt_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpltss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are less than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTPS / CMPLTPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmplt_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpltps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is less than or +/// equal to the corresponding value in the second operand. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true, in +/// the low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLESS / CMPLESS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmple_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpless((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are less than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLEPS / CMPLEPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmple_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpleps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is greater than +/// the corresponding value in the second operand. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTSS / CMPLTSS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpgt_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_shufflevector((__v4sf)__a, + (__v4sf)__builtin_ia32_cmpltss((__v4sf)__b, (__v4sf)__a), + 4, 1, 2, 3); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLTPS / CMPLTPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpgt_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpltps((__v4sf)__b, (__v4sf)__a); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is greater than +/// or equal to the corresponding value in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLESS / CMPLESS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpge_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_shufflevector((__v4sf)__a, + (__v4sf)__builtin_ia32_cmpless((__v4sf)__b, (__v4sf)__a), + 4, 1, 2, 3); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are greater than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. +/// If either value in a comparison is NaN, returns false. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPLEPS / CMPLEPS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpge_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpleps((__v4sf)__b, (__v4sf)__a); +} + +/// Compares two 32-bit float values in the low-order bits of both operands +/// for inequality. +/// +/// The comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNEQSS / CMPNEQSS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpneq_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpneqss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] for inequality. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNEQPS / CMPNEQPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpneq_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpneqps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is not less than +/// the corresponding value in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTSS / CMPNLTSS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpnlt_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpnltss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are not less than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTPS / CMPNLTPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpnlt_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpnltps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is not less than +/// or equal to the corresponding value in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLESS / CMPNLESS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpnle_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpnless((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are not less than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLEPS / CMPNLEPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpnle_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpnleps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is not greater +/// than the corresponding value in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTSS / CMPNLTSS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpngt_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_shufflevector((__v4sf)__a, + (__v4sf)__builtin_ia32_cmpnltss((__v4sf)__b, (__v4sf)__a), + 4, 1, 2, 3); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are not greater than those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLTPS / CMPNLTPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpngt_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpnltps((__v4sf)__b, (__v4sf)__a); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is not greater +/// than or equal to the corresponding value in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true, in the +/// low-order bits of a vector of [4 x float]. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLESS / CMPNLESS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpnge_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_shufflevector((__v4sf)__a, + (__v4sf)__builtin_ia32_cmpnless((__v4sf)__b, (__v4sf)__a), + 4, 1, 2, 3); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are not greater than or equal to those in the second operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, returns true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPNLEPS / CMPNLEPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpnge_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpnleps((__v4sf)__b, (__v4sf)__a); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is ordered with +/// respect to the corresponding value in the second operand. +/// +/// A pair of floating-point values are ordered with respect to each +/// other if neither value is a NaN. Each comparison returns 0x0 for false, +/// 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPORDSS / CMPORDSS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpord_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpordss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are ordered with respect to those in the second operand. +/// +/// A pair of floating-point values are ordered with respect to each +/// other if neither value is a NaN. Each comparison returns 0x0 for false, +/// 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPORDPS / CMPORDPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpord_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpordps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the value in the first operand is unordered +/// with respect to the corresponding value in the second operand. +/// +/// A pair of double-precision values are unordered with respect to each +/// other if one or both values are NaN. Each comparison returns 0x0 for +/// false, 0xFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPUNORDSS / CMPUNORDSS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float] containing one of the operands. The lower +/// 32 bits of this operand are used in the comparison. +/// \returns A 128-bit vector of [4 x float] containing the comparison results +/// in the low-order bits. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpunord_ss(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpunordss((__v4sf)__a, (__v4sf)__b); +} + +/// Compares each of the corresponding 32-bit float values of the +/// 128-bit vectors of [4 x float] to determine if the values in the first +/// operand are unordered with respect to those in the second operand. +/// +/// A pair of double-precision values are unordered with respect to each +/// other if one or both values are NaN. Each comparison returns 0x0 for +/// false, 0xFFFFFFFFFFFFFFFF for true. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCMPUNORDPS / CMPUNORDPS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cmpunord_ps(__m128 __a, __m128 __b) +{ + return (__m128)__builtin_ia32_cmpunordps((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands for equality. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISS / COMISS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_comieq_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_comieq((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the first operand is less than the second +/// operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISS / COMISS +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_comilt_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_comilt((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the first operand is less than or equal to the +/// second operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISS / COMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_comile_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_comile((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the first operand is greater than the second +/// operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISS / COMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_comigt_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_comigt((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the first operand is greater than or equal to +/// the second operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISS / COMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_comige_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_comige((__v4sf)__a, (__v4sf)__b); +} + +/// Compares two 32-bit float values in the low-order bits of both +/// operands to determine if the first operand is not equal to the second +/// operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 1. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCOMISS / COMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_comineq_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_comineq((__v4sf)__a, (__v4sf)__b); +} + +/// Performs an unordered comparison of two 32-bit float values using +/// the low-order bits of both operands to determine equality. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISS / UCOMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_ucomieq_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_ucomieq((__v4sf)__a, (__v4sf)__b); +} + +/// Performs an unordered comparison of two 32-bit float values using +/// the low-order bits of both operands to determine if the first operand is +/// less than the second operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISS / UCOMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_ucomilt_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_ucomilt((__v4sf)__a, (__v4sf)__b); +} + +/// Performs an unordered comparison of two 32-bit float values using +/// the low-order bits of both operands to determine if the first operand is +/// less than or equal to the second operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISS / UCOMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_ucomile_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_ucomile((__v4sf)__a, (__v4sf)__b); +} + +/// Performs an unordered comparison of two 32-bit float values using +/// the low-order bits of both operands to determine if the first operand is +/// greater than the second operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISS / UCOMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_ucomigt_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_ucomigt((__v4sf)__a, (__v4sf)__b); +} + +/// Performs an unordered comparison of two 32-bit float values using +/// the low-order bits of both operands to determine if the first operand is +/// greater than or equal to the second operand. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISS / UCOMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_ucomige_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_ucomige((__v4sf)__a, (__v4sf)__b); +} + +/// Performs an unordered comparison of two 32-bit float values using +/// the low-order bits of both operands to determine inequality. +/// +/// The comparison returns 0 for false, 1 for true. If either value in a +/// comparison is NaN, returns 0. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUCOMISS / UCOMISS instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \param __b +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the comparison. +/// \returns An integer containing the comparison results. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_ucomineq_ss(__m128 __a, __m128 __b) +{ + return __builtin_ia32_ucomineq((__v4sf)__a, (__v4sf)__b); +} + +/// Converts a float value contained in the lower 32 bits of a vector of +/// [4 x float] into a 32-bit integer. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSS2SI / CVTSS2SI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the conversion. +/// \returns A 32-bit integer containing the converted value. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_cvtss_si32(__m128 __a) +{ + return __builtin_ia32_cvtss2si((__v4sf)__a); +} + +/// Converts a float value contained in the lower 32 bits of a vector of +/// [4 x float] into a 32-bit integer. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSS2SI / CVTSS2SI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the conversion. +/// \returns A 32-bit integer containing the converted value. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_cvt_ss2si(__m128 __a) +{ + return _mm_cvtss_si32(__a); +} + +#ifdef __x86_64__ + +/// Converts a float value contained in the lower 32 bits of a vector of +/// [4 x float] into a 64-bit integer. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSS2SI / CVTSS2SI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the conversion. +/// \returns A 64-bit integer containing the converted value. +static __inline__ long long __DEFAULT_FN_ATTRS +_mm_cvtss_si64(__m128 __a) +{ + return __builtin_ia32_cvtss2si64((__v4sf)__a); +} + +#endif + +/// Converts two low-order float values in a 128-bit vector of +/// [4 x float] into a 64-bit vector of [2 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPS2PI instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 64-bit integer vector containing the converted values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_cvtps_pi32(__m128 __a) +{ + return (__m64)__builtin_ia32_cvtps2pi((__v4sf)__a); +} + +/// Converts two low-order float values in a 128-bit vector of +/// [4 x float] into a 64-bit vector of [2 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPS2PI instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 64-bit integer vector containing the converted values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_cvt_ps2pi(__m128 __a) +{ + return _mm_cvtps_pi32(__a); +} + +/// Converts the lower (first) element of a vector of [4 x float] into a signed +/// truncated (rounded toward zero) 32-bit integer. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTSS2SI / CVTTSS2SI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the conversion. +/// \returns A 32-bit integer containing the converted value. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_cvttss_si32(__m128 __a) +{ + return __builtin_ia32_cvttss2si((__v4sf)__a); +} + +/// Converts the lower (first) element of a vector of [4 x float] into a signed +/// truncated (rounded toward zero) 32-bit integer. +/// +/// If the converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTSS2SI / CVTTSS2SI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the conversion. +/// \returns A 32-bit integer containing the converted value. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_cvtt_ss2si(__m128 __a) +{ + return _mm_cvttss_si32(__a); +} + +#ifdef __x86_64__ +/// Converts the lower (first) element of a vector of [4 x float] into a signed +/// truncated (rounded toward zero) 64-bit integer. +/// +/// If the converted value does not fit in a 64-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTTSS2SI / CVTTSS2SI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the conversion. +/// \returns A 64-bit integer containing the converted value. +static __inline__ long long __DEFAULT_FN_ATTRS +_mm_cvttss_si64(__m128 __a) +{ + return __builtin_ia32_cvttss2si64((__v4sf)__a); +} +#endif + +/// Converts the lower (first) two elements of a 128-bit vector of [4 x float] +/// into two signed truncated (rounded toward zero) 32-bit integers, +/// returned in a 64-bit vector of [2 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTTPS2PI / VTTPS2PI +/// instructions. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 64-bit integer vector containing the converted values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_cvttps_pi32(__m128 __a) +{ + return (__m64)__builtin_ia32_cvttps2pi((__v4sf)__a); +} + +/// Converts the lower (first) two elements of a 128-bit vector of [4 x float] +/// into two signed truncated (rounded toward zero) 64-bit integers, +/// returned in a 64-bit vector of [2 x i32]. +/// +/// If a converted value does not fit in a 32-bit integer, raises a +/// floating-point invalid exception. If the exception is masked, returns +/// the most negative integer. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTTPS2PI instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \returns A 64-bit integer vector containing the converted values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_cvtt_ps2pi(__m128 __a) +{ + return _mm_cvttps_pi32(__a); +} + +/// Converts a 32-bit signed integer value into a floating point value +/// and writes it to the lower 32 bits of the destination. The remaining +/// higher order elements of the destination vector are copied from the +/// corresponding elements in the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSI2SS / CVTSI2SS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 32-bit signed integer operand containing the value to be converted. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the +/// converted value of the second operand. The upper 96 bits are copied from +/// the upper 96 bits of the first operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cvtsi32_ss(__m128 __a, int __b) +{ + __a[0] = __b; + return __a; +} + +/// Converts a 32-bit signed integer value into a floating point value +/// and writes it to the lower 32 bits of the destination. The remaining +/// higher order elements of the destination are copied from the +/// corresponding elements in the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSI2SS / CVTSI2SS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 32-bit signed integer operand containing the value to be converted. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the +/// converted value of the second operand. The upper 96 bits are copied from +/// the upper 96 bits of the first operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cvt_si2ss(__m128 __a, int __b) +{ + return _mm_cvtsi32_ss(__a, __b); +} + +#ifdef __x86_64__ + +/// Converts a 64-bit signed integer value into a floating point value +/// and writes it to the lower 32 bits of the destination. The remaining +/// higher order elements of the destination are copied from the +/// corresponding elements in the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VCVTSI2SS / CVTSI2SS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 64-bit signed integer operand containing the value to be converted. +/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the +/// converted value of the second operand. The upper 96 bits are copied from +/// the upper 96 bits of the first operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_cvtsi64_ss(__m128 __a, long long __b) +{ + __a[0] = __b; + return __a; +} + +#endif + +/// Converts two elements of a 64-bit vector of [2 x i32] into two +/// floating point values and writes them to the lower 64-bits of the +/// destination. The remaining higher order elements of the destination are +/// copied from the corresponding elements in the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 64-bit vector of [2 x i32]. The elements in this vector are converted +/// and written to the corresponding low-order elements in the destination. +/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the +/// converted value of the second operand. The upper 64 bits are copied from +/// the upper 64 bits of the first operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvtpi32_ps(__m128 __a, __m64 __b) +{ + return __builtin_ia32_cvtpi2ps((__v4sf)__a, (__v2si)__b); +} + +/// Converts two elements of a 64-bit vector of [2 x i32] into two +/// floating point values and writes them to the lower 64-bits of the +/// destination. The remaining higher order elements of the destination are +/// copied from the corresponding elements in the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. +/// \param __b +/// A 64-bit vector of [2 x i32]. The elements in this vector are converted +/// and written to the corresponding low-order elements in the destination. +/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the +/// converted value from the second operand. The upper 64 bits are copied +/// from the upper 64 bits of the first operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvt_pi2ps(__m128 __a, __m64 __b) +{ + return _mm_cvtpi32_ps(__a, __b); +} + +/// Extracts a float value contained in the lower 32 bits of a vector of +/// [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are +/// used in the extraction. +/// \returns A 32-bit float containing the extracted value. +static __inline__ float __DEFAULT_FN_ATTRS +_mm_cvtss_f32(__m128 __a) +{ + return __a[0]; +} + +/// Loads two packed float values from the address \a __p into the +/// high-order bits of a 128-bit vector of [4 x float]. The low-order bits +/// are copied from the low-order bits of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVHPD / MOVHPD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. Bits [63:0] are written to bits [63:0] +/// of the destination. +/// \param __p +/// A pointer to two packed float values. Bits [63:0] are written to bits +/// [127:64] of the destination. +/// \returns A 128-bit vector of [4 x float] containing the moved values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_loadh_pi(__m128 __a, const __m64 *__p) +{ + typedef float __mm_loadh_pi_v2f32 __attribute__((__vector_size__(8))); + struct __mm_loadh_pi_struct { + __mm_loadh_pi_v2f32 __u; + } __attribute__((__packed__, __may_alias__)); + __mm_loadh_pi_v2f32 __b = ((const struct __mm_loadh_pi_struct*)__p)->__u; + __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1); + return __builtin_shufflevector(__a, __bb, 0, 1, 4, 5); +} + +/// Loads two packed float values from the address \a __p into the +/// low-order bits of a 128-bit vector of [4 x float]. The high-order bits +/// are copied from the high-order bits of the first operand. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVLPD / MOVLPD instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. Bits [127:64] are written to bits +/// [127:64] of the destination. +/// \param __p +/// A pointer to two packed float values. Bits [63:0] are written to bits +/// [63:0] of the destination. +/// \returns A 128-bit vector of [4 x float] containing the moved values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_loadl_pi(__m128 __a, const __m64 *__p) +{ + typedef float __mm_loadl_pi_v2f32 __attribute__((__vector_size__(8))); + struct __mm_loadl_pi_struct { + __mm_loadl_pi_v2f32 __u; + } __attribute__((__packed__, __may_alias__)); + __mm_loadl_pi_v2f32 __b = ((const struct __mm_loadl_pi_struct*)__p)->__u; + __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1); + return __builtin_shufflevector(__a, __bb, 4, 5, 2, 3); +} + +/// Constructs a 128-bit floating-point vector of [4 x float]. The lower +/// 32 bits of the vector are initialized with the single-precision +/// floating-point value loaded from a specified memory location. The upper +/// 96 bits are set to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSS / MOVSS instruction. +/// +/// \param __p +/// A pointer to a 32-bit memory location containing a single-precision +/// floating-point value. +/// \returns An initialized 128-bit floating-point vector of [4 x float]. The +/// lower 32 bits contain the value loaded from the memory location. The +/// upper 96 bits are set to zero. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_load_ss(const float *__p) +{ + struct __mm_load_ss_struct { + float __u; + } __attribute__((__packed__, __may_alias__)); + float __u = ((const struct __mm_load_ss_struct*)__p)->__u; + return __extension__ (__m128){ __u, 0, 0, 0 }; +} + +/// Loads a 32-bit float value and duplicates it to all four vector +/// elements of a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBROADCASTSS / MOVSS + shuffling +/// instruction. +/// +/// \param __p +/// A pointer to a float value to be loaded and duplicated. +/// \returns A 128-bit vector of [4 x float] containing the loaded and +/// duplicated values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_load1_ps(const float *__p) +{ + struct __mm_load1_ps_struct { + float __u; + } __attribute__((__packed__, __may_alias__)); + float __u = ((const struct __mm_load1_ps_struct*)__p)->__u; + return __extension__ (__m128){ __u, __u, __u, __u }; +} + +#define _mm_load_ps1(p) _mm_load1_ps(p) + +/// Loads a 128-bit floating-point vector of [4 x float] from an aligned +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS / MOVAPS instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. The address of the memory +/// location has to be 128-bit aligned. +/// \returns A 128-bit vector of [4 x float] containing the loaded values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_load_ps(const float *__p) +{ + return *(const __m128*)__p; +} + +/// Loads a 128-bit floating-point vector of [4 x float] from an +/// unaligned memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPS / MOVUPS instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \returns A 128-bit vector of [4 x float] containing the loaded values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_loadu_ps(const float *__p) +{ + struct __loadu_ps { + __m128_u __v; + } __attribute__((__packed__, __may_alias__)); + return ((const struct __loadu_ps*)__p)->__v; +} + +/// Loads four packed float values, in reverse order, from an aligned +/// memory location to 32-bit elements in a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS / MOVAPS + shuffling +/// instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. The address of the memory +/// location has to be 128-bit aligned. +/// \returns A 128-bit vector of [4 x float] containing the moved values, loaded +/// in reverse order. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_loadr_ps(const float *__p) +{ + __m128 __a = _mm_load_ps(__p); + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 3, 2, 1, 0); +} + +/// Create a 128-bit vector of [4 x float] with undefined values. +/// +/// \headerfile +/// +/// This intrinsic has no corresponding instruction. +/// +/// \returns A 128-bit vector of [4 x float] containing undefined values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_undefined_ps(void) +{ + return (__m128)__builtin_ia32_undef128(); +} + +/// Constructs a 128-bit floating-point vector of [4 x float]. The lower +/// 32 bits of the vector are initialized with the specified single-precision +/// floating-point value. The upper 96 bits are set to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSS / MOVSS instruction. +/// +/// \param __w +/// A single-precision floating-point value used to initialize the lower 32 +/// bits of the result. +/// \returns An initialized 128-bit floating-point vector of [4 x float]. The +/// lower 32 bits contain the value provided in the source operand. The +/// upper 96 bits are set to zero. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_set_ss(float __w) +{ + return __extension__ (__m128){ __w, 0.0f, 0.0f, 0.0f }; +} + +/// Constructs a 128-bit floating-point vector of [4 x float], with each +/// of the four single-precision floating-point vector elements set to the +/// specified single-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPS / PERMILPS instruction. +/// +/// \param __w +/// A single-precision floating-point value used to initialize each vector +/// element of the result. +/// \returns An initialized 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_set1_ps(float __w) +{ + return __extension__ (__m128){ __w, __w, __w, __w }; +} + +/* Microsoft specific. */ +/// Constructs a 128-bit floating-point vector of [4 x float], with each +/// of the four single-precision floating-point vector elements set to the +/// specified single-precision floating-point value. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPERMILPS / PERMILPS instruction. +/// +/// \param __w +/// A single-precision floating-point value used to initialize each vector +/// element of the result. +/// \returns An initialized 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_set_ps1(float __w) +{ + return _mm_set1_ps(__w); +} + +/// Constructs a 128-bit floating-point vector of [4 x float] +/// initialized with the specified single-precision floating-point values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __z +/// A single-precision floating-point value used to initialize bits [127:96] +/// of the result. +/// \param __y +/// A single-precision floating-point value used to initialize bits [95:64] +/// of the result. +/// \param __x +/// A single-precision floating-point value used to initialize bits [63:32] +/// of the result. +/// \param __w +/// A single-precision floating-point value used to initialize bits [31:0] +/// of the result. +/// \returns An initialized 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_set_ps(float __z, float __y, float __x, float __w) +{ + return __extension__ (__m128){ __w, __x, __y, __z }; +} + +/// Constructs a 128-bit floating-point vector of [4 x float], +/// initialized in reverse order with the specified 32-bit single-precision +/// float-point values. +/// +/// \headerfile +/// +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. +/// +/// \param __z +/// A single-precision floating-point value used to initialize bits [31:0] +/// of the result. +/// \param __y +/// A single-precision floating-point value used to initialize bits [63:32] +/// of the result. +/// \param __x +/// A single-precision floating-point value used to initialize bits [95:64] +/// of the result. +/// \param __w +/// A single-precision floating-point value used to initialize bits [127:96] +/// of the result. +/// \returns An initialized 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_setr_ps(float __z, float __y, float __x, float __w) +{ + return __extension__ (__m128){ __z, __y, __x, __w }; +} + +/// Constructs a 128-bit floating-point vector of [4 x float] initialized +/// to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VXORPS / XORPS instruction. +/// +/// \returns An initialized 128-bit floating-point vector of [4 x float] with +/// all elements set to zero. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_setzero_ps(void) +{ + return __extension__ (__m128){ 0.0f, 0.0f, 0.0f, 0.0f }; +} + +/// Stores the upper 64 bits of a 128-bit vector of [4 x float] to a +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VPEXTRQ / PEXTRQ instruction. +/// +/// \param __p +/// A pointer to a 64-bit memory location. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_storeh_pi(__m64 *__p, __m128 __a) +{ + typedef float __mm_storeh_pi_v2f32 __attribute__((__vector_size__(8))); + struct __mm_storeh_pi_struct { + __mm_storeh_pi_v2f32 __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_storeh_pi_struct*)__p)->__u = __builtin_shufflevector(__a, __a, 2, 3); +} + +/// Stores the lower 64 bits of a 128-bit vector of [4 x float] to a +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVLPS / MOVLPS instruction. +/// +/// \param __p +/// A pointer to a memory location that will receive the float values. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_storel_pi(__m64 *__p, __m128 __a) +{ + typedef float __mm_storeh_pi_v2f32 __attribute__((__vector_size__(8))); + struct __mm_storeh_pi_struct { + __mm_storeh_pi_v2f32 __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_storeh_pi_struct*)__p)->__u = __builtin_shufflevector(__a, __a, 0, 1); +} + +/// Stores the lower 32 bits of a 128-bit vector of [4 x float] to a +/// memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVSS / MOVSS instruction. +/// +/// \param __p +/// A pointer to a 32-bit memory location. +/// \param __a +/// A 128-bit vector of [4 x float] containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_store_ss(float *__p, __m128 __a) +{ + struct __mm_store_ss_struct { + float __u; + } __attribute__((__packed__, __may_alias__)); + ((struct __mm_store_ss_struct*)__p)->__u = __a[0]; +} + +/// Stores a 128-bit vector of [4 x float] to an unaligned memory +/// location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVUPS / MOVUPS instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. The address of the memory +/// location does not have to be aligned. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_storeu_ps(float *__p, __m128 __a) +{ + struct __storeu_ps { + __m128_u __v; + } __attribute__((__packed__, __may_alias__)); + ((struct __storeu_ps*)__p)->__v = __a; +} + +/// Stores a 128-bit vector of [4 x float] into an aligned memory +/// location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS / MOVAPS instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. The address of the memory +/// location has to be 16-byte aligned. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_store_ps(float *__p, __m128 __a) +{ + *(__m128*)__p = __a; +} + +/// Stores the lower 32 bits of a 128-bit vector of [4 x float] into +/// four contiguous elements in an aligned memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to VMOVAPS / MOVAPS + shuffling +/// instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. +/// \param __a +/// A 128-bit vector of [4 x float] whose lower 32 bits are stored to each +/// of the four contiguous elements pointed by \a __p. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_store1_ps(float *__p, __m128 __a) +{ + __a = __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 0, 0, 0); + _mm_store_ps(__p, __a); +} + +/// Stores the lower 32 bits of a 128-bit vector of [4 x float] into +/// four contiguous elements in an aligned memory location. +/// +/// \headerfile +/// +/// This intrinsic corresponds to VMOVAPS / MOVAPS + shuffling +/// instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. +/// \param __a +/// A 128-bit vector of [4 x float] whose lower 32 bits are stored to each +/// of the four contiguous elements pointed by \a __p. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_store_ps1(float *__p, __m128 __a) +{ + _mm_store1_ps(__p, __a); +} + +/// Stores float values from a 128-bit vector of [4 x float] to an +/// aligned memory location in reverse order. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVAPS / MOVAPS + shuffling +/// instruction. +/// +/// \param __p +/// A pointer to a 128-bit memory location. The address of the memory +/// location has to be 128-bit aligned. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be stored. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_storer_ps(float *__p, __m128 __a) +{ + __a = __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 3, 2, 1, 0); + _mm_store_ps(__p, __a); +} + +#define _MM_HINT_ET0 7 +#define _MM_HINT_ET1 6 +#define _MM_HINT_T0 3 +#define _MM_HINT_T1 2 +#define _MM_HINT_T2 1 +#define _MM_HINT_NTA 0 + +#ifndef _MSC_VER +/* FIXME: We have to #define this because "sel" must be a constant integer, and + Sema doesn't do any form of constant propagation yet. */ + +/// Loads one cache line of data from the specified address to a location +/// closer to the processor. +/// +/// \headerfile +/// +/// \code +/// void _mm_prefetch(const void *a, const int sel); +/// \endcode +/// +/// This intrinsic corresponds to the PREFETCHNTA instruction. +/// +/// \param a +/// A pointer to a memory location containing a cache line of data. +/// \param sel +/// A predefined integer constant specifying the type of prefetch +/// operation: \n +/// _MM_HINT_NTA: Move data using the non-temporal access (NTA) hint. The +/// PREFETCHNTA instruction will be generated. \n +/// _MM_HINT_T0: Move data using the T0 hint. The PREFETCHT0 instruction will +/// be generated. \n +/// _MM_HINT_T1: Move data using the T1 hint. The PREFETCHT1 instruction will +/// be generated. \n +/// _MM_HINT_T2: Move data using the T2 hint. The PREFETCHT2 instruction will +/// be generated. +#define _mm_prefetch(a, sel) (__builtin_prefetch((const void *)(a), \ + ((sel) >> 2) & 1, (sel) & 0x3)) +#endif + +/// Stores a 64-bit integer in the specified aligned memory location. To +/// minimize caching, the data is flagged as non-temporal (unlikely to be +/// used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MOVNTQ instruction. +/// +/// \param __p +/// A pointer to an aligned memory location used to store the register value. +/// \param __a +/// A 64-bit integer containing the value to be stored. +static __inline__ void __DEFAULT_FN_ATTRS_MMX +_mm_stream_pi(void *__p, __m64 __a) +{ + __builtin_ia32_movntq((__m64 *)__p, __a); +} + +/// Moves packed float values from a 128-bit vector of [4 x float] to a +/// 128-bit aligned memory location. To minimize caching, the data is flagged +/// as non-temporal (unlikely to be used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVNTPS / MOVNTPS instruction. +/// +/// \param __p +/// A pointer to a 128-bit aligned memory location that will receive the +/// single-precision floating-point values. +/// \param __a +/// A 128-bit vector of [4 x float] containing the values to be moved. +static __inline__ void __DEFAULT_FN_ATTRS +_mm_stream_ps(void *__p, __m128 __a) +{ + __builtin_nontemporal_store((__v4sf)__a, (__v4sf*)__p); +} + +#if defined(__cplusplus) +extern "C" { +#endif + +/// Forces strong memory ordering (serialization) between store +/// instructions preceding this instruction and store instructions following +/// this instruction, ensuring the system completes all previous stores +/// before executing subsequent stores. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the SFENCE instruction. +/// +void _mm_sfence(void); + +#if defined(__cplusplus) +} // extern "C" +#endif + +/// Extracts 16-bit element from a 64-bit vector of [4 x i16] and +/// returns it, as specified by the immediate integer operand. +/// +/// \headerfile +/// +/// \code +/// int _mm_extract_pi16(__m64 a, int n); +/// \endcode +/// +/// This intrinsic corresponds to the VPEXTRW / PEXTRW instruction. +/// +/// \param a +/// A 64-bit vector of [4 x i16]. +/// \param n +/// An immediate integer operand that determines which bits are extracted: \n +/// 0: Bits [15:0] are copied to the destination. \n +/// 1: Bits [31:16] are copied to the destination. \n +/// 2: Bits [47:32] are copied to the destination. \n +/// 3: Bits [63:48] are copied to the destination. +/// \returns A 16-bit integer containing the extracted 16 bits of packed data. +#define _mm_extract_pi16(a, n) \ + ((int)__builtin_ia32_vec_ext_v4hi((__v4hi)a, (int)n)) + +/// Copies data from the 64-bit vector of [4 x i16] to the destination, +/// and inserts the lower 16-bits of an integer operand at the 16-bit offset +/// specified by the immediate operand \a n. +/// +/// \headerfile +/// +/// \code +/// __m64 _mm_insert_pi16(__m64 a, int d, int n); +/// \endcode +/// +/// This intrinsic corresponds to the PINSRW instruction. +/// +/// \param a +/// A 64-bit vector of [4 x i16]. +/// \param d +/// An integer. The lower 16-bit value from this operand is written to the +/// destination at the offset specified by operand \a n. +/// \param n +/// An immediate integer operant that determines which the bits to be used +/// in the destination. \n +/// 0: Bits [15:0] are copied to the destination. \n +/// 1: Bits [31:16] are copied to the destination. \n +/// 2: Bits [47:32] are copied to the destination. \n +/// 3: Bits [63:48] are copied to the destination. \n +/// The remaining bits in the destination are copied from the corresponding +/// bits in operand \a a. +/// \returns A 64-bit integer vector containing the copied packed data from the +/// operands. +#define _mm_insert_pi16(a, d, n) \ + ((__m64)__builtin_ia32_vec_set_v4hi((__v4hi)a, (int)d, (int)n)) + +/// Compares each of the corresponding packed 16-bit integer values of +/// the 64-bit integer vectors, and writes the greater value to the +/// corresponding bits in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMAXSW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the comparison results. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_max_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pmaxsw((__v4hi)__a, (__v4hi)__b); +} + +/// Compares each of the corresponding packed 8-bit unsigned integer +/// values of the 64-bit integer vectors, and writes the greater value to the +/// corresponding bits in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMAXUB instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the comparison results. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_max_pu8(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pmaxub((__v8qi)__a, (__v8qi)__b); +} + +/// Compares each of the corresponding packed 16-bit integer values of +/// the 64-bit integer vectors, and writes the lesser value to the +/// corresponding bits in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMINSW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the comparison results. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_min_pi16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pminsw((__v4hi)__a, (__v4hi)__b); +} + +/// Compares each of the corresponding packed 8-bit unsigned integer +/// values of the 64-bit integer vectors, and writes the lesser value to the +/// corresponding bits in the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMINUB instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the comparison results. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_min_pu8(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pminub((__v8qi)__a, (__v8qi)__b); +} + +/// Takes the most significant bit from each 8-bit element in a 64-bit +/// integer vector to create an 8-bit mask value. Zero-extends the value to +/// 32-bit integer and writes it to the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMOVMSKB instruction. +/// +/// \param __a +/// A 64-bit integer vector containing the values with bits to be extracted. +/// \returns The most significant bit from each 8-bit element in \a __a, +/// written to bits [7:0]. +static __inline__ int __DEFAULT_FN_ATTRS_MMX +_mm_movemask_pi8(__m64 __a) +{ + return __builtin_ia32_pmovmskb((__v8qi)__a); +} + +/// Multiplies packed 16-bit unsigned integer values and writes the +/// high-order 16 bits of each 32-bit product to the corresponding bits in +/// the destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PMULHUW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the products of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_mulhi_pu16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pmulhuw((__v4hi)__a, (__v4hi)__b); +} + +/// Shuffles the 4 16-bit integers from a 64-bit integer vector to the +/// destination, as specified by the immediate value operand. +/// +/// \headerfile +/// +/// \code +/// __m64 _mm_shuffle_pi16(__m64 a, const int n); +/// \endcode +/// +/// This intrinsic corresponds to the PSHUFW instruction. +/// +/// \param a +/// A 64-bit integer vector containing the values to be shuffled. +/// \param n +/// An immediate value containing an 8-bit value specifying which elements to +/// copy from \a a. The destinations within the 64-bit destination are +/// assigned values as follows: \n +/// Bits [1:0] are used to assign values to bits [15:0] in the +/// destination. \n +/// Bits [3:2] are used to assign values to bits [31:16] in the +/// destination. \n +/// Bits [5:4] are used to assign values to bits [47:32] in the +/// destination. \n +/// Bits [7:6] are used to assign values to bits [63:48] in the +/// destination. \n +/// Bit value assignments: \n +/// 00: assigned from bits [15:0] of \a a. \n +/// 01: assigned from bits [31:16] of \a a. \n +/// 10: assigned from bits [47:32] of \a a. \n +/// 11: assigned from bits [63:48] of \a a. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro. +/// _MM_SHUFFLE(b6, b4, b2, b0) can create an 8-bit mask of the form +/// [b6, b4, b2, b0]. +/// \returns A 64-bit integer vector containing the shuffled values. +#define _mm_shuffle_pi16(a, n) \ + ((__m64)__builtin_ia32_pshufw((__v4hi)(__m64)(a), (n))) + +/// Conditionally copies the values from each 8-bit element in the first +/// 64-bit integer vector operand to the specified memory location, as +/// specified by the most significant bit in the corresponding element in the +/// second 64-bit integer vector operand. +/// +/// To minimize caching, the data is flagged as non-temporal +/// (unlikely to be used again soon). +/// +/// \headerfile +/// +/// This intrinsic corresponds to the MASKMOVQ instruction. +/// +/// \param __d +/// A 64-bit integer vector containing the values with elements to be copied. +/// \param __n +/// A 64-bit integer vector operand. The most significant bit from each 8-bit +/// element determines whether the corresponding element in operand \a __d +/// is copied. If the most significant bit of a given element is 1, the +/// corresponding element in operand \a __d is copied. +/// \param __p +/// A pointer to a 64-bit memory location that will receive the conditionally +/// copied integer values. The address of the memory location does not have +/// to be aligned. +static __inline__ void __DEFAULT_FN_ATTRS_MMX +_mm_maskmove_si64(__m64 __d, __m64 __n, char *__p) +{ + __builtin_ia32_maskmovq((__v8qi)__d, (__v8qi)__n, __p); +} + +/// Computes the rounded averages of the packed unsigned 8-bit integer +/// values and writes the averages to the corresponding bits in the +/// destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PAVGB instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the averages of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_avg_pu8(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pavgb((__v8qi)__a, (__v8qi)__b); +} + +/// Computes the rounded averages of the packed unsigned 16-bit integer +/// values and writes the averages to the corresponding bits in the +/// destination. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PAVGW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector containing the averages of both operands. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_avg_pu16(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_pavgw((__v4hi)__a, (__v4hi)__b); +} + +/// Subtracts the corresponding 8-bit unsigned integer values of the two +/// 64-bit vector operands and computes the absolute value for each of the +/// difference. Then sum of the 8 absolute differences is written to the +/// bits [15:0] of the destination; the remaining bits [63:16] are cleared. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the PSADBW instruction. +/// +/// \param __a +/// A 64-bit integer vector containing one of the source operands. +/// \param __b +/// A 64-bit integer vector containing one of the source operands. +/// \returns A 64-bit integer vector whose lower 16 bits contain the sums of the +/// sets of absolute differences between both operands. The upper bits are +/// cleared. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_sad_pu8(__m64 __a, __m64 __b) +{ + return (__m64)__builtin_ia32_psadbw((__v8qi)__a, (__v8qi)__b); +} + +#if defined(__cplusplus) +extern "C" { +#endif + +/// Returns the contents of the MXCSR register as a 32-bit unsigned +/// integer value. +/// +/// There are several groups of macros associated with this +/// intrinsic, including: +///
    +///
  • +/// For checking exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO, +/// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW, +/// _MM_EXCEPT_INEXACT. There is a convenience wrapper +/// _MM_GET_EXCEPTION_STATE(). +///
    • +///
  • +/// For checking exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW, +/// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT. +/// There is a convenience wrapper _MM_GET_EXCEPTION_MASK(). +///
    • +///
  • +/// For checking rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN, +/// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper +/// _MM_GET_ROUNDING_MODE(). +///
    • +///
  • +/// For checking flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF. +/// There is a convenience wrapper _MM_GET_FLUSH_ZERO_MODE(). +///
    • +///
  • +/// For checking denormals-are-zero mode: _MM_DENORMALS_ZERO_ON, +/// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper +/// _MM_GET_DENORMALS_ZERO_MODE(). +///
    • +///
+/// +/// For example, the following expression checks if an overflow exception has +/// occurred: +/// \code +/// ( _mm_getcsr() & _MM_EXCEPT_OVERFLOW ) +/// \endcode +/// +/// The following expression gets the current rounding mode: +/// \code +/// _MM_GET_ROUNDING_MODE() +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VSTMXCSR / STMXCSR instruction. +/// +/// \returns A 32-bit unsigned integer containing the contents of the MXCSR +/// register. +unsigned int _mm_getcsr(void); + +/// Sets the MXCSR register with the 32-bit unsigned integer value. +/// +/// There are several groups of macros associated with this intrinsic, +/// including: +///
    +///
  • +/// For setting exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO, +/// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW, +/// _MM_EXCEPT_INEXACT. There is a convenience wrapper +/// _MM_SET_EXCEPTION_STATE(x) where x is one of these macros. +///
    • +///
  • +/// For setting exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW, +/// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT. +/// There is a convenience wrapper _MM_SET_EXCEPTION_MASK(x) where x is one +/// of these macros. +///
    • +///
  • +/// For setting rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN, +/// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper +/// _MM_SET_ROUNDING_MODE(x) where x is one of these macros. +///
    • +///
  • +/// For setting flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF. +/// There is a convenience wrapper _MM_SET_FLUSH_ZERO_MODE(x) where x is +/// one of these macros. +///
    • +///
  • +/// For setting denormals-are-zero mode: _MM_DENORMALS_ZERO_ON, +/// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper +/// _MM_SET_DENORMALS_ZERO_MODE(x) where x is one of these macros. +///
    • +///
+/// +/// For example, the following expression causes subsequent floating-point +/// operations to round up: +/// _mm_setcsr(_mm_getcsr() | _MM_ROUND_UP) +/// +/// The following example sets the DAZ and FTZ flags: +/// \code +/// void setFlags() { +/// _MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_ON); +/// _MM_SET_DENORMALS_ZERO_MODE(_MM_DENORMALS_ZERO_ON); +/// } +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VLDMXCSR / LDMXCSR instruction. +/// +/// \param __i +/// A 32-bit unsigned integer value to be written to the MXCSR register. +void _mm_setcsr(unsigned int __i); + +#if defined(__cplusplus) +} // extern "C" +#endif + +/// Selects 4 float values from the 128-bit operands of [4 x float], as +/// specified by the immediate value operand. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_shuffle_ps(__m128 a, __m128 b, const int mask); +/// \endcode +/// +/// This intrinsic corresponds to the VSHUFPS / SHUFPS instruction. +/// +/// \param a +/// A 128-bit vector of [4 x float]. +/// \param b +/// A 128-bit vector of [4 x float]. +/// \param mask +/// An immediate value containing an 8-bit value specifying which elements to +/// copy from \a a and \a b. \n +/// Bits [3:0] specify the values copied from operand \a a. \n +/// Bits [7:4] specify the values copied from operand \a b. \n +/// The destinations within the 128-bit destination are assigned values as +/// follows: \n +/// Bits [1:0] are used to assign values to bits [31:0] in the +/// destination. \n +/// Bits [3:2] are used to assign values to bits [63:32] in the +/// destination. \n +/// Bits [5:4] are used to assign values to bits [95:64] in the +/// destination. \n +/// Bits [7:6] are used to assign values to bits [127:96] in the +/// destination. \n +/// Bit value assignments: \n +/// 00: Bits [31:0] copied from the specified operand. \n +/// 01: Bits [63:32] copied from the specified operand. \n +/// 10: Bits [95:64] copied from the specified operand. \n +/// 11: Bits [127:96] copied from the specified operand. \n +/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro. +/// _MM_SHUFFLE(b6, b4, b2, b0) can create an 8-bit mask of the form +/// [b6, b4, b2, b0]. +/// \returns A 128-bit vector of [4 x float] containing the shuffled values. +#define _mm_shuffle_ps(a, b, mask) \ + ((__m128)__builtin_ia32_shufps((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), \ + (int)(mask))) + +/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of +/// [4 x float] and interleaves them into a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKHPS / UNPCKHPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. \n +/// Bits [95:64] are written to bits [31:0] of the destination. \n +/// Bits [127:96] are written to bits [95:64] of the destination. +/// \param __b +/// A 128-bit vector of [4 x float]. +/// Bits [95:64] are written to bits [63:32] of the destination. \n +/// Bits [127:96] are written to bits [127:96] of the destination. +/// \returns A 128-bit vector of [4 x float] containing the interleaved values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_unpackhi_ps(__m128 __a, __m128 __b) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 2, 6, 3, 7); +} + +/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of +/// [4 x float] and interleaves them into a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPS / UNPCKLPS instruction. +/// +/// \param __a +/// A 128-bit vector of [4 x float]. \n +/// Bits [31:0] are written to bits [31:0] of the destination. \n +/// Bits [63:32] are written to bits [95:64] of the destination. +/// \param __b +/// A 128-bit vector of [4 x float]. \n +/// Bits [31:0] are written to bits [63:32] of the destination. \n +/// Bits [63:32] are written to bits [127:96] of the destination. +/// \returns A 128-bit vector of [4 x float] containing the interleaved values. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_unpacklo_ps(__m128 __a, __m128 __b) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 0, 4, 1, 5); +} + +/// Constructs a 128-bit floating-point vector of [4 x float]. The lower +/// 32 bits are set to the lower 32 bits of the second parameter. The upper +/// 96 bits are set to the upper 96 bits of the first parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VBLENDPS / BLENDPS / MOVSS +/// instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. The upper 96 bits are +/// written to the upper 96 bits of the result. +/// \param __b +/// A 128-bit floating-point vector of [4 x float]. The lower 32 bits are +/// written to the lower 32 bits of the result. +/// \returns A 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_move_ss(__m128 __a, __m128 __b) +{ + __a[0] = __b[0]; + return __a; +} + +/// Constructs a 128-bit floating-point vector of [4 x float]. The lower +/// 64 bits are set to the upper 64 bits of the second parameter. The upper +/// 64 bits are set to the upper 64 bits of the first parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKHPD / UNPCKHPD instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are +/// written to the upper 64 bits of the result. +/// \param __b +/// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are +/// written to the lower 64 bits of the result. +/// \returns A 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_movehl_ps(__m128 __a, __m128 __b) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 6, 7, 2, 3); +} + +/// Constructs a 128-bit floating-point vector of [4 x float]. The lower +/// 64 bits are set to the lower 64 bits of the first parameter. The upper +/// 64 bits are set to the lower 64 bits of the second parameter. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VUNPCKLPD / UNPCKLPD instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are +/// written to the lower 64 bits of the result. +/// \param __b +/// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are +/// written to the upper 64 bits of the result. +/// \returns A 128-bit floating-point vector of [4 x float]. +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_movelh_ps(__m128 __a, __m128 __b) +{ + return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 0, 1, 4, 5); +} + +/// Converts a 64-bit vector of [4 x i16] into a 128-bit vector of [4 x +/// float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS + COMPOSITE instruction. +/// +/// \param __a +/// A 64-bit vector of [4 x i16]. The elements of the destination are copied +/// from the corresponding elements in this operand. +/// \returns A 128-bit vector of [4 x float] containing the copied and converted +/// values from the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvtpi16_ps(__m64 __a) +{ + __m64 __b, __c; + __m128 __r; + + __b = _mm_setzero_si64(); + __b = _mm_cmpgt_pi16(__b, __a); + __c = _mm_unpackhi_pi16(__a, __b); + __r = _mm_setzero_ps(); + __r = _mm_cvtpi32_ps(__r, __c); + __r = _mm_movelh_ps(__r, __r); + __c = _mm_unpacklo_pi16(__a, __b); + __r = _mm_cvtpi32_ps(__r, __c); + + return __r; +} + +/// Converts a 64-bit vector of 16-bit unsigned integer values into a +/// 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS + COMPOSITE instruction. +/// +/// \param __a +/// A 64-bit vector of 16-bit unsigned integer values. The elements of the +/// destination are copied from the corresponding elements in this operand. +/// \returns A 128-bit vector of [4 x float] containing the copied and converted +/// values from the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvtpu16_ps(__m64 __a) +{ + __m64 __b, __c; + __m128 __r; + + __b = _mm_setzero_si64(); + __c = _mm_unpackhi_pi16(__a, __b); + __r = _mm_setzero_ps(); + __r = _mm_cvtpi32_ps(__r, __c); + __r = _mm_movelh_ps(__r, __r); + __c = _mm_unpacklo_pi16(__a, __b); + __r = _mm_cvtpi32_ps(__r, __c); + + return __r; +} + +/// Converts the lower four 8-bit values from a 64-bit vector of [8 x i8] +/// into a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS + COMPOSITE instruction. +/// +/// \param __a +/// A 64-bit vector of [8 x i8]. The elements of the destination are copied +/// from the corresponding lower 4 elements in this operand. +/// \returns A 128-bit vector of [4 x float] containing the copied and converted +/// values from the operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvtpi8_ps(__m64 __a) +{ + __m64 __b; + + __b = _mm_setzero_si64(); + __b = _mm_cmpgt_pi8(__b, __a); + __b = _mm_unpacklo_pi8(__a, __b); + + return _mm_cvtpi16_ps(__b); +} + +/// Converts the lower four unsigned 8-bit integer values from a 64-bit +/// vector of [8 x u8] into a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS + COMPOSITE instruction. +/// +/// \param __a +/// A 64-bit vector of unsigned 8-bit integer values. The elements of the +/// destination are copied from the corresponding lower 4 elements in this +/// operand. +/// \returns A 128-bit vector of [4 x float] containing the copied and converted +/// values from the source operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvtpu8_ps(__m64 __a) +{ + __m64 __b; + + __b = _mm_setzero_si64(); + __b = _mm_unpacklo_pi8(__a, __b); + + return _mm_cvtpi16_ps(__b); +} + +/// Converts the two 32-bit signed integer values from each 64-bit vector +/// operand of [2 x i32] into a 128-bit vector of [4 x float]. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPI2PS + COMPOSITE instruction. +/// +/// \param __a +/// A 64-bit vector of [2 x i32]. The lower elements of the destination are +/// copied from the elements in this operand. +/// \param __b +/// A 64-bit vector of [2 x i32]. The upper elements of the destination are +/// copied from the elements in this operand. +/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the +/// copied and converted values from the first operand. The upper 64 bits +/// contain the copied and converted values from the second operand. +static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX +_mm_cvtpi32x2_ps(__m64 __a, __m64 __b) +{ + __m128 __c; + + __c = _mm_setzero_ps(); + __c = _mm_cvtpi32_ps(__c, __b); + __c = _mm_movelh_ps(__c, __c); + + return _mm_cvtpi32_ps(__c, __a); +} + +/// Converts each single-precision floating-point element of a 128-bit +/// floating-point vector of [4 x float] into a 16-bit signed integer, and +/// packs the results into a 64-bit integer vector of [4 x i16]. +/// +/// If the floating-point element is NaN or infinity, or if the +/// floating-point element is greater than 0x7FFFFFFF or less than -0x8000, +/// it is converted to 0x8000. Otherwise if the floating-point element is +/// greater than 0x7FFF, it is converted to 0x7FFF. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPS2PI + COMPOSITE instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. +/// \returns A 64-bit integer vector of [4 x i16] containing the converted +/// values. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_cvtps_pi16(__m128 __a) +{ + __m64 __b, __c; + + __b = _mm_cvtps_pi32(__a); + __a = _mm_movehl_ps(__a, __a); + __c = _mm_cvtps_pi32(__a); + + return _mm_packs_pi32(__b, __c); +} + +/// Converts each single-precision floating-point element of a 128-bit +/// floating-point vector of [4 x float] into an 8-bit signed integer, and +/// packs the results into the lower 32 bits of a 64-bit integer vector of +/// [8 x i8]. The upper 32 bits of the vector are set to 0. +/// +/// If the floating-point element is NaN or infinity, or if the +/// floating-point element is greater than 0x7FFFFFFF or less than -0x80, it +/// is converted to 0x80. Otherwise if the floating-point element is greater +/// than 0x7F, it is converted to 0x7F. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the CVTPS2PI + COMPOSITE instruction. +/// +/// \param __a +/// 128-bit floating-point vector of [4 x float]. +/// \returns A 64-bit integer vector of [8 x i8]. The lower 32 bits contain the +/// converted values and the uppper 32 bits are set to zero. +static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX +_mm_cvtps_pi8(__m128 __a) +{ + __m64 __b, __c; + + __b = _mm_cvtps_pi16(__a); + __c = _mm_setzero_si64(); + + return _mm_packs_pi16(__b, __c); +} + +/// Extracts the sign bits from each single-precision floating-point +/// element of a 128-bit floating-point vector of [4 x float] and returns the +/// sign bits in bits [0:3] of the result. Bits [31:4] of the result are set +/// to zero. +/// +/// \headerfile +/// +/// This intrinsic corresponds to the VMOVMSKPS / MOVMSKPS instruction. +/// +/// \param __a +/// A 128-bit floating-point vector of [4 x float]. +/// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each +/// single-precision floating-point element of the parameter. Bits [31:4] are +/// set to zero. +static __inline__ int __DEFAULT_FN_ATTRS +_mm_movemask_ps(__m128 __a) +{ + return __builtin_ia32_movmskps((__v4sf)__a); +} + +/* Compare */ +#define _CMP_EQ_OQ 0x00 /* Equal (ordered, non-signaling) */ +#define _CMP_LT_OS 0x01 /* Less-than (ordered, signaling) */ +#define _CMP_LE_OS 0x02 /* Less-than-or-equal (ordered, signaling) */ +#define _CMP_UNORD_Q 0x03 /* Unordered (non-signaling) */ +#define _CMP_NEQ_UQ 0x04 /* Not-equal (unordered, non-signaling) */ +#define _CMP_NLT_US 0x05 /* Not-less-than (unordered, signaling) */ +#define _CMP_NLE_US 0x06 /* Not-less-than-or-equal (unordered, signaling) */ +#define _CMP_ORD_Q 0x07 /* Ordered (non-signaling) */ + +/// Compares each of the corresponding values of two 128-bit vectors of +/// [4 x float], using the operation specified by the immediate integer +/// operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_cmp_ps(__m128 a, __m128 b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the (V)CMPPS instruction. +/// +/// \param a +/// A 128-bit vector of [4 x float]. +/// \param b +/// A 128-bit vector of [4 x float]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +#define _mm_cmp_ps(a, b, c) \ + ((__m128)__builtin_ia32_cmpps((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), (c))) + +/// Compares each of the corresponding scalar values of two 128-bit +/// vectors of [4 x float], using the operation specified by the immediate +/// integer operand. +/// +/// Each comparison returns 0x0 for false, 0xFFFFFFFF for true. +/// If either value in a comparison is NaN, comparisons that are ordered +/// return false, and comparisons that are unordered return true. +/// +/// \headerfile +/// +/// \code +/// __m128 _mm_cmp_ss(__m128 a, __m128 b, const int c); +/// \endcode +/// +/// This intrinsic corresponds to the (V)CMPSS instruction. +/// +/// \param a +/// A 128-bit vector of [4 x float]. +/// \param b +/// A 128-bit vector of [4 x float]. +/// \param c +/// An immediate integer operand, with bits [4:0] specifying which comparison +/// operation to use: \n +/// 0x00: Equal (ordered, non-signaling) \n +/// 0x01: Less-than (ordered, signaling) \n +/// 0x02: Less-than-or-equal (ordered, signaling) \n +/// 0x03: Unordered (non-signaling) \n +/// 0x04: Not-equal (unordered, non-signaling) \n +/// 0x05: Not-less-than (unordered, signaling) \n +/// 0x06: Not-less-than-or-equal (unordered, signaling) \n +/// 0x07: Ordered (non-signaling) \n +/// \returns A 128-bit vector of [4 x float] containing the comparison results. +#define _mm_cmp_ss(a, b, c) \ + ((__m128)__builtin_ia32_cmpss((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), (c))) + +#define _MM_ALIGN16 __attribute__((aligned(16))) + +#define _MM_SHUFFLE(z, y, x, w) (((z) << 6) | ((y) << 4) | ((x) << 2) | (w)) + +#define _MM_EXCEPT_INVALID (0x0001U) +#define _MM_EXCEPT_DENORM (0x0002U) +#define _MM_EXCEPT_DIV_ZERO (0x0004U) +#define _MM_EXCEPT_OVERFLOW (0x0008U) +#define _MM_EXCEPT_UNDERFLOW (0x0010U) +#define _MM_EXCEPT_INEXACT (0x0020U) +#define _MM_EXCEPT_MASK (0x003fU) + +#define _MM_MASK_INVALID (0x0080U) +#define _MM_MASK_DENORM (0x0100U) +#define _MM_MASK_DIV_ZERO (0x0200U) +#define _MM_MASK_OVERFLOW (0x0400U) +#define _MM_MASK_UNDERFLOW (0x0800U) +#define _MM_MASK_INEXACT (0x1000U) +#define _MM_MASK_MASK (0x1f80U) + +#define _MM_ROUND_NEAREST (0x0000U) +#define _MM_ROUND_DOWN (0x2000U) +#define _MM_ROUND_UP (0x4000U) +#define _MM_ROUND_TOWARD_ZERO (0x6000U) +#define _MM_ROUND_MASK (0x6000U) + +#define _MM_FLUSH_ZERO_MASK (0x8000U) +#define _MM_FLUSH_ZERO_ON (0x8000U) +#define _MM_FLUSH_ZERO_OFF (0x0000U) + +#define _MM_GET_EXCEPTION_MASK() (_mm_getcsr() & _MM_MASK_MASK) +#define _MM_GET_EXCEPTION_STATE() (_mm_getcsr() & _MM_EXCEPT_MASK) +#define _MM_GET_FLUSH_ZERO_MODE() (_mm_getcsr() & _MM_FLUSH_ZERO_MASK) +#define _MM_GET_ROUNDING_MODE() (_mm_getcsr() & _MM_ROUND_MASK) + +#define _MM_SET_EXCEPTION_MASK(x) (_mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x))) +#define _MM_SET_EXCEPTION_STATE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_EXCEPT_MASK) | (x))) +#define _MM_SET_FLUSH_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | (x))) +#define _MM_SET_ROUNDING_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_ROUND_MASK) | (x))) + +#define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \ +do { \ + __m128 tmp3, tmp2, tmp1, tmp0; \ + tmp0 = _mm_unpacklo_ps((row0), (row1)); \ + tmp2 = _mm_unpacklo_ps((row2), (row3)); \ + tmp1 = _mm_unpackhi_ps((row0), (row1)); \ + tmp3 = _mm_unpackhi_ps((row2), (row3)); \ + (row0) = _mm_movelh_ps(tmp0, tmp2); \ + (row1) = _mm_movehl_ps(tmp2, tmp0); \ + (row2) = _mm_movelh_ps(tmp1, tmp3); \ + (row3) = _mm_movehl_ps(tmp3, tmp1); \ +} while (0) + +/* Aliases for compatibility. */ +#define _m_pextrw _mm_extract_pi16 +#define _m_pinsrw _mm_insert_pi16 +#define _m_pmaxsw _mm_max_pi16 +#define _m_pmaxub _mm_max_pu8 +#define _m_pminsw _mm_min_pi16 +#define _m_pminub _mm_min_pu8 +#define _m_pmovmskb _mm_movemask_pi8 +#define _m_pmulhuw _mm_mulhi_pu16 +#define _m_pshufw _mm_shuffle_pi16 +#define _m_maskmovq _mm_maskmove_si64 +#define _m_pavgb _mm_avg_pu8 +#define _m_pavgw _mm_avg_pu16 +#define _m_psadbw _mm_sad_pu8 +#define _m_ _mm_ + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_MMX + +/* Ugly hack for backwards-compatibility (compatible with gcc) */ +#if defined(__SSE2__) && !__building_module(_Builtin_intrinsics) +#include +#endif + +#endif /* __XMMINTRIN_H */ diff --git a/llvm/lib/clang/19/include/xopintrin.h b/llvm/lib/clang/19/include/xopintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..976cdf4902a4052a7e02d210fc72a79ac16d23fc --- /dev/null +++ b/llvm/lib/clang/19/include/xopintrin.h @@ -0,0 +1,770 @@ +/*===---- xopintrin.h - XOP intrinsics -------------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __X86INTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __XOPINTRIN_H +#define __XOPINTRIN_H + +#include + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(128))) +#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(256))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacssww((__v8hi)__A, (__v8hi)__B, (__v8hi)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_macc_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacsww((__v8hi)__A, (__v8hi)__B, (__v8hi)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maccsd_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacsswd((__v8hi)__A, (__v8hi)__B, (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maccd_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacswd((__v8hi)__A, (__v8hi)__B, (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maccs_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacssdd((__v4si)__A, (__v4si)__B, (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_macc_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacsdd((__v4si)__A, (__v4si)__B, (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maccslo_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacssdql((__v4si)__A, (__v4si)__B, (__v2di)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_macclo_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacsdql((__v4si)__A, (__v4si)__B, (__v2di)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maccshi_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacssdqh((__v4si)__A, (__v4si)__B, (__v2di)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_macchi_epi32(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmacsdqh((__v4si)__A, (__v4si)__B, (__v2di)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maddsd_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmadcsswd((__v8hi)__A, (__v8hi)__B, (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maddd_epi16(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpmadcswd((__v8hi)__A, (__v8hi)__B, (__v4si)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddw_epi8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddbw((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddd_epi8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddbd((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddq_epi8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddbq((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddd_epi16(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddwd((__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddq_epi16(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddwq((__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddq_epi32(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphadddq((__v4si)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddw_epu8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddubw((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddd_epu8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddubd((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddq_epu8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddubq((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddd_epu16(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphadduwd((__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddq_epu16(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphadduwq((__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_haddq_epu32(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphaddudq((__v4si)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hsubw_epi8(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphsubbw((__v16qi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hsubd_epi16(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphsubwd((__v8hi)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_hsubq_epi32(__m128i __A) +{ + return (__m128i)__builtin_ia32_vphsubdq((__v4si)__A); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_cmov_si128(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)(((__v2du)__A & (__v2du)__C) | ((__v2du)__B & ~(__v2du)__C)); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS256 +_mm256_cmov_si256(__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i)(((__v4du)__A & (__v4du)__C) | ((__v4du)__B & ~(__v4du)__C)); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_perm_epi8(__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i)__builtin_ia32_vpperm((__v16qi)__A, (__v16qi)__B, (__v16qi)__C); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_rot_epi8(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vprotb((__v16qi)__A, (__v16qi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_rot_epi16(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vprotw((__v8hi)__A, (__v8hi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_rot_epi32(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vprotd((__v4si)__A, (__v4si)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_rot_epi64(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vprotq((__v2di)__A, (__v2di)__B); +} + +#define _mm_roti_epi8(A, N) \ + ((__m128i)__builtin_ia32_vprotbi((__v16qi)(__m128i)(A), (N))) + +#define _mm_roti_epi16(A, N) \ + ((__m128i)__builtin_ia32_vprotwi((__v8hi)(__m128i)(A), (N))) + +#define _mm_roti_epi32(A, N) \ + ((__m128i)__builtin_ia32_vprotdi((__v4si)(__m128i)(A), (N))) + +#define _mm_roti_epi64(A, N) \ + ((__m128i)__builtin_ia32_vprotqi((__v2di)(__m128i)(A), (N))) + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_shl_epi8(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshlb((__v16qi)__A, (__v16qi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_shl_epi16(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshlw((__v8hi)__A, (__v8hi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_shl_epi32(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshld((__v4si)__A, (__v4si)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_shl_epi64(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshlq((__v2di)__A, (__v2di)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha_epi8(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshab((__v16qi)__A, (__v16qi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha_epi16(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshaw((__v8hi)__A, (__v8hi)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha_epi32(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshad((__v4si)__A, (__v4si)__B); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sha_epi64(__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vpshaq((__v2di)__A, (__v2di)__B); +} + +#define _mm_com_epu8(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomub((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (N))) + +#define _mm_com_epu16(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomuw((__v8hi)(__m128i)(A), \ + (__v8hi)(__m128i)(B), (N))) + +#define _mm_com_epu32(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomud((__v4si)(__m128i)(A), \ + (__v4si)(__m128i)(B), (N))) + +#define _mm_com_epu64(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomuq((__v2di)(__m128i)(A), \ + (__v2di)(__m128i)(B), (N))) + +#define _mm_com_epi8(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomb((__v16qi)(__m128i)(A), \ + (__v16qi)(__m128i)(B), (N))) + +#define _mm_com_epi16(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomw((__v8hi)(__m128i)(A), \ + (__v8hi)(__m128i)(B), (N))) + +#define _mm_com_epi32(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomd((__v4si)(__m128i)(A), \ + (__v4si)(__m128i)(B), (N))) + +#define _mm_com_epi64(A, B, N) \ + ((__m128i)__builtin_ia32_vpcomq((__v2di)(__m128i)(A), \ + (__v2di)(__m128i)(B), (N))) + +#define _MM_PCOMCTRL_LT 0 +#define _MM_PCOMCTRL_LE 1 +#define _MM_PCOMCTRL_GT 2 +#define _MM_PCOMCTRL_GE 3 +#define _MM_PCOMCTRL_EQ 4 +#define _MM_PCOMCTRL_NEQ 5 +#define _MM_PCOMCTRL_FALSE 6 +#define _MM_PCOMCTRL_TRUE 7 + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epu8(__m128i __A, __m128i __B) +{ + return _mm_com_epu8(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epu16(__m128i __A, __m128i __B) +{ + return _mm_com_epu16(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epu32(__m128i __A, __m128i __B) +{ + return _mm_com_epu32(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epu64(__m128i __A, __m128i __B) +{ + return _mm_com_epu64(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epi8(__m128i __A, __m128i __B) +{ + return _mm_com_epi8(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epi16(__m128i __A, __m128i __B) +{ + return _mm_com_epi16(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epi32(__m128i __A, __m128i __B) +{ + return _mm_com_epi32(__A, __B, _MM_PCOMCTRL_TRUE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comlt_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_LT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comle_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_LE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comgt_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_GT); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comge_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_GE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comeq_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_EQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comneq_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_NEQ); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comfalse_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_FALSE); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_comtrue_epi64(__m128i __A, __m128i __B) +{ + return _mm_com_epi64(__A, __B, _MM_PCOMCTRL_TRUE); +} + +#define _mm_permute2_pd(X, Y, C, I) \ + ((__m128d)__builtin_ia32_vpermil2pd((__v2df)(__m128d)(X), \ + (__v2df)(__m128d)(Y), \ + (__v2di)(__m128i)(C), (I))) + +#define _mm256_permute2_pd(X, Y, C, I) \ + ((__m256d)__builtin_ia32_vpermil2pd256((__v4df)(__m256d)(X), \ + (__v4df)(__m256d)(Y), \ + (__v4di)(__m256i)(C), (I))) + +#define _mm_permute2_ps(X, Y, C, I) \ + ((__m128)__builtin_ia32_vpermil2ps((__v4sf)(__m128)(X), (__v4sf)(__m128)(Y), \ + (__v4si)(__m128i)(C), (I))) + +#define _mm256_permute2_ps(X, Y, C, I) \ + ((__m256)__builtin_ia32_vpermil2ps256((__v8sf)(__m256)(X), \ + (__v8sf)(__m256)(Y), \ + (__v8si)(__m256i)(C), (I))) + +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_frcz_ss(__m128 __A) +{ + return (__m128)__builtin_ia32_vfrczss((__v4sf)__A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS +_mm_frcz_sd(__m128d __A) +{ + return (__m128d)__builtin_ia32_vfrczsd((__v2df)__A); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_frcz_ps(__m128 __A) +{ + return (__m128)__builtin_ia32_vfrczps((__v4sf)__A); +} + +static __inline__ __m128d __DEFAULT_FN_ATTRS +_mm_frcz_pd(__m128d __A) +{ + return (__m128d)__builtin_ia32_vfrczpd((__v2df)__A); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS256 +_mm256_frcz_ps(__m256 __A) +{ + return (__m256)__builtin_ia32_vfrczps256((__v8sf)__A); +} + +static __inline__ __m256d __DEFAULT_FN_ATTRS256 +_mm256_frcz_pd(__m256d __A) +{ + return (__m256d)__builtin_ia32_vfrczpd256((__v4df)__A); +} + +#undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS256 + +#endif /* __XOPINTRIN_H */ diff --git a/llvm/lib/clang/19/include/xray/xray_interface.h b/llvm/lib/clang/19/include/xray/xray_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..727431c04e4f736d593c6ad2b304af4ebf5fa9c5 --- /dev/null +++ b/llvm/lib/clang/19/include/xray/xray_interface.h @@ -0,0 +1,131 @@ +//===- xray_interface.h -----------------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of XRay, a dynamic runtime instrumentation system. +// +// APIs for controlling XRay functionality explicitly. +//===----------------------------------------------------------------------===// + +#ifndef XRAY_XRAY_INTERFACE_H +#define XRAY_XRAY_INTERFACE_H + +#include +#include + +extern "C" { + +/// Synchronize this with AsmPrinter::SledKind in LLVM. +enum XRayEntryType { + ENTRY = 0, + EXIT = 1, + TAIL = 2, + LOG_ARGS_ENTRY = 3, + CUSTOM_EVENT = 4, + TYPED_EVENT = 5, +}; + +/// Provide a function to invoke for when instrumentation points are hit. This +/// is a user-visible control surface that overrides the default implementation. +/// The function provided should take the following arguments: +/// +/// - function id: an identifier that indicates the id of a function; this id +/// is generated by xray; the mapping between the function id +/// and the actual function pointer is available through +/// __xray_table. +/// - entry type: identifies what kind of instrumentation point was +/// encountered (function entry, function exit, etc.). See the +/// enum XRayEntryType for more details. +/// +/// The user handler must handle correctly spurious calls after this handler is +/// removed or replaced with another handler, because it would be too costly for +/// XRay runtime to avoid spurious calls. +/// To prevent circular calling, the handler function itself and all its +/// direct&indirect callees must not be instrumented with XRay, which can be +/// achieved by marking them all with: __attribute__((xray_never_instrument)) +/// +/// Returns 1 on success, 0 on error. +extern int __xray_set_handler(void (*entry)(int32_t, XRayEntryType)); + +/// This removes whatever the currently provided handler is. Returns 1 on +/// success, 0 on error. +extern int __xray_remove_handler(); + +/// Use XRay to log the first argument of each (instrumented) function call. +/// When this function exits, all threads will have observed the effect and +/// start logging their subsequent affected function calls (if patched). +/// +/// Returns 1 on success, 0 on error. +extern int __xray_set_handler_arg1(void (*entry)(int32_t, XRayEntryType, + uint64_t)); + +/// Disables the XRay handler used to log first arguments of function calls. +/// Returns 1 on success, 0 on error. +extern int __xray_remove_handler_arg1(); + +/// Provide a function to invoke when XRay encounters a custom event. +extern int __xray_set_customevent_handler(void (*entry)(void *, std::size_t)); + +/// This removes whatever the currently provided custom event handler is. +/// Returns 1 on success, 0 on error. +extern int __xray_remove_customevent_handler(); + +/// Set a handler for xray typed event logging. The first parameter is a type +/// identifier, the second is a payload, and the third is the payload size. +/// NOTE: fdrLoggingHandleTypedEvent only supports uint16_t event type. +extern int __xray_set_typedevent_handler(void (*entry)(size_t, const void *, + size_t)); + +/// Removes the currently set typed event handler. +/// Returns 1 on success, 0 on error. +extern int __xray_remove_typedevent_handler(); + +extern uint16_t __xray_register_event_type(const char *event_type); + +enum XRayPatchingStatus { + NOT_INITIALIZED = 0, + SUCCESS = 1, + ONGOING = 2, + FAILED = 3, +}; + +/// This tells XRay to patch the instrumentation points. See XRayPatchingStatus +/// for possible result values. +extern XRayPatchingStatus __xray_patch(); + +/// Reverses the effect of __xray_patch(). See XRayPatchingStatus for possible +/// result values. +extern XRayPatchingStatus __xray_unpatch(); + +/// This patches a specific function id. See XRayPatchingStatus for possible +/// result values. +extern XRayPatchingStatus __xray_patch_function(int32_t FuncId); + +/// This unpatches a specific function id. See XRayPatchingStatus for possible +/// result values. +extern XRayPatchingStatus __xray_unpatch_function(int32_t FuncId); + +/// This function returns the address of the function provided a valid function +/// id. We return 0 if we encounter any error, even if 0 may be a valid function +/// address. +extern uintptr_t __xray_function_address(int32_t FuncId); + +/// This function returns the maximum valid function id. Returns 0 if we +/// encounter errors (when there are no instrumented functions, etc.). +extern size_t __xray_max_function_id(); + +/// Initialize the required XRay data structures. This is useful in cases where +/// users want to control precisely when the XRay instrumentation data +/// structures are initialized, for example when the XRay library is built with +/// the XRAY_NO_PREINIT preprocessor definition. +/// +/// Calling __xray_init() more than once is safe across multiple threads. +extern void __xray_init(); + +} // end extern "C" + +#endif // XRAY_XRAY_INTERFACE_H diff --git a/llvm/lib/clang/19/include/xray/xray_log_interface.h b/llvm/lib/clang/19/include/xray/xray_log_interface.h new file mode 100644 index 0000000000000000000000000000000000000000..2e91b7e1962611fc51bef5ed8bf6b25e6f75f319 --- /dev/null +++ b/llvm/lib/clang/19/include/xray/xray_log_interface.h @@ -0,0 +1,357 @@ +//===-- xray_log_interface.h ----------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of XRay, a function call tracing system. +// +// APIs for installing a new logging implementation. +// +//===----------------------------------------------------------------------===// +/// +/// XRay allows users to implement their own logging handlers and install them +/// to replace the default runtime-controllable implementation that comes with +/// compiler-rt/xray. The "flight data recorder" (FDR) mode implementation uses +/// this API to install itself in an XRay-enabled binary. See +/// compiler-rt/lib/xray_fdr_logging.{h,cc} for details of that implementation. +/// +/// The high-level usage pattern for these APIs look like the following: +/// +/// // We choose the mode which we'd like to install, and check whether this +/// // has succeeded. Each mode will have their own set of flags they will +/// // support, outside of the global XRay configuration options that are +/// // defined in the XRAY_OPTIONS environment variable. +/// auto select_status = __xray_log_select_mode("xray-fdr"); +/// if (select_status != XRayLogRegisterStatus::XRAY_REGISTRATION_OK) { +/// // This failed, we should not proceed with attempting to initialise +/// // the currently selected mode. +/// return; +/// } +/// +/// // Once that's done, we can now attempt to configure the implementation. +/// // To do this, we provide the string flags configuration for the mode. +/// auto config_status = __xray_log_init_mode( +/// "xray-fdr", "verbosity=1 some_flag=1 another_flag=2"); +/// if (config_status != XRayLogInitStatus::XRAY_LOG_INITIALIZED) { +/// // deal with the error here, if there is one. +/// } +/// +/// // When the log implementation has had the chance to initialize, we can +/// // now patch the instrumentation points. Note that we could have patched +/// // the instrumentation points first, but there's no strict ordering to +/// // these operations. +/// auto patch_status = __xray_patch(); +/// if (patch_status != XRayPatchingStatus::SUCCESS) { +/// // deal with the error here, if it is an error. +/// } +/// +/// // If we want to stop the implementation, we can then finalize it (before +/// // optionally flushing the log). +/// auto fin_status = __xray_log_finalize(); +/// if (fin_status != XRayLogInitStatus::XRAY_LOG_FINALIZED) { +/// // deal with the error here, if it is an error. +/// } +/// +/// // We can optionally wait before flushing the log to give other threads a +/// // chance to see that the implementation is already finalized. Also, at +/// // this point we can optionally unpatch the instrumentation points to +/// // reduce overheads at runtime. +/// auto unpatch_status = __xray_unpatch(); +/// if (unpatch_status != XRayPatchingStatus::SUCCESS) { +/// // deal with the error here, if it is an error. +/// } +/// +/// // If there are logs or data to be flushed somewhere, we can do so only +/// // after we've finalized the log. Some implementations may not actually +/// // have anything to log (it might keep the data in memory, or periodically +/// // be logging the data anyway). +/// auto flush_status = __xray_log_flushLog(); +/// if (flush_status != XRayLogFlushStatus::XRAY_LOG_FLUSHED) { +/// // deal with the error here, if it is an error. +/// } +/// +/// // Alternatively, we can go through the buffers ourselves without +/// // relying on the implementations' flushing semantics (if the +/// // implementation supports exporting this data directly). +/// auto MyBufferProcessor = +[](const char* mode, XRayBuffer buffer) { +/// // Check the "mode" to see if it's something we know how to handle... +/// // and/or do something with an XRayBuffer instance. +/// }; +/// auto process_status = __xray_log_process_buffers(MyBufferProcessor); +/// if (process_status != XRayLogFlushStatus::XRAY_LOG_FLUSHED) { +/// // deal with the error here, if it is an error. +/// } +/// +/// NOTE: Before calling __xray_patch() again, consider re-initializing the +/// implementation first. Some implementations might stay in an "off" state when +/// they are finalized, while some might be in an invalid/unknown state. +/// +#ifndef XRAY_XRAY_LOG_INTERFACE_H +#define XRAY_XRAY_LOG_INTERFACE_H + +#include "xray/xray_interface.h" +#include + +extern "C" { + +/// This enum defines the valid states in which the logging implementation can +/// be at. +enum XRayLogInitStatus { + /// The default state is uninitialized, and in case there were errors in the + /// initialization, the implementation MUST return XRAY_LOG_UNINITIALIZED. + XRAY_LOG_UNINITIALIZED = 0, + + /// Some implementations support multi-stage init (or asynchronous init), and + /// may return XRAY_LOG_INITIALIZING to signal callers of the API that + /// there's an ongoing initialization routine running. This allows + /// implementations to support concurrent threads attempting to initialize, + /// while only signalling success in one. + XRAY_LOG_INITIALIZING = 1, + + /// When an implementation is done initializing, it MUST return + /// XRAY_LOG_INITIALIZED. When users call `__xray_patch()`, they are + /// guaranteed that the implementation installed with + /// `__xray_set_log_impl(...)` has been initialized. + XRAY_LOG_INITIALIZED = 2, + + /// Some implementations might support multi-stage finalization (or + /// asynchronous finalization), and may return XRAY_LOG_FINALIZING to signal + /// callers of the API that there's an ongoing finalization routine running. + /// This allows implementations to support concurrent threads attempting to + /// finalize, while only signalling success/completion in one. + XRAY_LOG_FINALIZING = 3, + + /// When an implementation is done finalizing, it MUST return + /// XRAY_LOG_FINALIZED. It is up to the implementation to determine what the + /// semantics of a finalized implementation is. Some implementations might + /// allow re-initialization once the log is finalized, while some might always + /// be on (and that finalization is a no-op). + XRAY_LOG_FINALIZED = 4, +}; + +/// This enum allows an implementation to signal log flushing operations via +/// `__xray_log_flushLog()`, and the state of flushing the log. +enum XRayLogFlushStatus { + XRAY_LOG_NOT_FLUSHING = 0, + XRAY_LOG_FLUSHING = 1, + XRAY_LOG_FLUSHED = 2, +}; + +/// This enum indicates the installation state of a logging implementation, when +/// associating a mode to a particular logging implementation through +/// `__xray_log_register_impl(...)` or through `__xray_log_select_mode(...`. +enum XRayLogRegisterStatus { + XRAY_REGISTRATION_OK = 0, + XRAY_DUPLICATE_MODE = 1, + XRAY_MODE_NOT_FOUND = 2, + XRAY_INCOMPLETE_IMPL = 3, +}; + +/// A valid XRay logging implementation MUST provide all of the function +/// pointers in XRayLogImpl when being installed through `__xray_set_log_impl`. +/// To be precise, ALL the functions pointers MUST NOT be nullptr. +struct XRayLogImpl { + /// The log initialization routine provided by the implementation, always + /// provided with the following parameters: + /// + /// - buffer size (unused) + /// - maximum number of buffers (unused) + /// - a pointer to an argument struct that the implementation MUST handle + /// - the size of the argument struct + /// + /// See XRayLogInitStatus for details on what the implementation MUST return + /// when called. + /// + /// If the implementation needs to install handlers aside from the 0-argument + /// function call handler, it MUST do so in this initialization handler. + /// + /// See xray_interface.h for available handler installation routines. + XRayLogInitStatus (*log_init)(size_t, size_t, void *, size_t); + + /// The log finalization routine provided by the implementation. + /// + /// See XRayLogInitStatus for details on what the implementation MUST return + /// when called. + XRayLogInitStatus (*log_finalize)(); + + /// The 0-argument function call handler. XRay logging implementations MUST + /// always have a handler for function entry and exit events. In case the + /// implementation wants to support arg1 (or other future extensions to XRay + /// logging) those MUST be installed by the installed 'log_init' handler. + /// + /// Because we didn't want to change the ABI of this struct, the arg1 handler + /// may be silently overwritten during initialization as well. + void (*handle_arg0)(int32_t, XRayEntryType); + + /// The log implementation provided routine for when __xray_log_flushLog() is + /// called. + /// + /// See XRayLogFlushStatus for details on what the implementation MUST return + /// when called. + XRayLogFlushStatus (*flush_log)(); +}; + +/// DEPRECATED: Use the mode registration workflow instead with +/// __xray_log_register_mode(...) and __xray_log_select_mode(...). See the +/// documentation for those function. +/// +/// This function installs a new logging implementation that XRay will use. In +/// case there are any nullptr members in Impl, XRay will *uninstall any +/// existing implementations*. It does NOT patch the instrumentation points. +/// +/// NOTE: This function does NOT attempt to finalize the currently installed +/// implementation. Use with caution. +/// +/// It is guaranteed safe to call this function in the following states: +/// +/// - When the implementation is UNINITIALIZED. +/// - When the implementation is FINALIZED. +/// - When there is no current implementation installed. +/// +/// It is logging implementation defined what happens when this function is +/// called while in any other states. +void __xray_set_log_impl(XRayLogImpl Impl); + +/// This function registers a logging implementation against a "mode" +/// identifier. This allows multiple modes to be registered, and chosen at +/// runtime using the same mode identifier through +/// `__xray_log_select_mode(...)`. +/// +/// We treat the Mode identifier as a null-terminated byte string, as the +/// identifier used when retrieving the log impl. +/// +/// Returns: +/// - XRAY_REGISTRATION_OK on success. +/// - XRAY_DUPLICATE_MODE when an implementation is already associated with +/// the provided Mode; does not update the already-registered +/// implementation. +XRayLogRegisterStatus __xray_log_register_mode(const char *Mode, + XRayLogImpl Impl); + +/// This function selects the implementation associated with Mode that has been +/// registered through __xray_log_register_mode(...) and installs that +/// implementation (as if through calling __xray_set_log_impl(...)). The same +/// caveats apply to __xray_log_select_mode(...) as with +/// __xray_log_set_log_impl(...). +/// +/// Returns: +/// - XRAY_REGISTRATION_OK on success. +/// - XRAY_MODE_NOT_FOUND if there is no implementation associated with Mode; +/// does not update the currently installed implementation. +XRayLogRegisterStatus __xray_log_select_mode(const char *Mode); + +/// Returns an identifier for the currently selected XRay mode chosen through +/// the __xray_log_select_mode(...) function call. Returns nullptr if there is +/// no currently installed mode. +const char *__xray_log_get_current_mode(); + +/// This function removes the currently installed implementation. It will also +/// uninstall any handlers that have been previously installed. It does NOT +/// unpatch the instrumentation points. +/// +/// NOTE: This function does NOT attempt to finalize the currently installed +/// implementation. Use with caution. +/// +/// It is guaranteed safe to call this function in the following states: +/// +/// - When the implementation is UNINITIALIZED. +/// - When the implementation is FINALIZED. +/// - When there is no current implementation installed. +/// +/// It is logging implementation defined what happens when this function is +/// called while in any other states. +void __xray_remove_log_impl(); + +/// DEPRECATED: Use __xray_log_init_mode() instead, and provide all the options +/// in string form. +/// Invokes the installed implementation initialization routine. See +/// XRayLogInitStatus for what the return values mean. +XRayLogInitStatus __xray_log_init(size_t BufferSize, size_t MaxBuffers, + void *Args, size_t ArgsSize); + +/// Invokes the installed initialization routine, which *must* support the +/// string based form. +/// +/// NOTE: When this API is used, we still invoke the installed initialization +/// routine, but we will call it with the following convention to signal that we +/// are using the string form: +/// +/// - BufferSize = 0 +/// - MaxBuffers = 0 +/// - ArgsSize = 0 +/// - Args will be the pointer to the character buffer representing the +/// configuration. +/// +/// FIXME: Updating the XRayLogImpl struct is an ABI breaking change. When we +/// are ready to make a breaking change, we should clean this up appropriately. +XRayLogInitStatus __xray_log_init_mode(const char *Mode, const char *Config); + +/// Like __xray_log_init_mode(...) this version allows for providing +/// configurations that might have non-null-terminated strings. This will +/// operate similarly to __xray_log_init_mode, with the exception that +/// |ArgsSize| will be what |ConfigSize| is. +XRayLogInitStatus __xray_log_init_mode_bin(const char *Mode, const char *Config, + size_t ConfigSize); + +/// Invokes the installed implementation finalization routine. See +/// XRayLogInitStatus for what the return values mean. +XRayLogInitStatus __xray_log_finalize(); + +/// Invokes the install implementation log flushing routine. See +/// XRayLogFlushStatus for what the return values mean. +XRayLogFlushStatus __xray_log_flushLog(); + +/// An XRayBuffer represents a section of memory which can be treated by log +/// processing functions as bytes stored in the logging implementation's +/// buffers. +struct XRayBuffer { + const void *Data; + size_t Size; +}; + +/// Registers an iterator function which takes an XRayBuffer argument, then +/// returns another XRayBuffer function representing the next buffer. When the +/// Iterator function returns an empty XRayBuffer (Data = nullptr, Size = 0), +/// this signifies the end of the buffers. +/// +/// The first invocation of this Iterator function will always take an empty +/// XRayBuffer (Data = nullptr, Size = 0). +void __xray_log_set_buffer_iterator(XRayBuffer (*Iterator)(XRayBuffer)); + +/// Removes the currently registered buffer iterator function. +void __xray_log_remove_buffer_iterator(); + +/// Invokes the provided handler to process data maintained by the logging +/// handler. This API will be provided raw access to the data available in +/// memory from the logging implementation. The callback function must: +/// +/// 1) Not modify the data, to avoid running into undefined behaviour. +/// +/// 2) Either know the data layout, or treat the data as raw bytes for later +/// interpretation. +/// +/// This API is best used in place of the `__xray_log_flushLog()` implementation +/// above to enable the caller to provide an alternative means of extracting the +/// data from the XRay implementation. +/// +/// Implementations MUST then provide: +/// +/// 1) A function that will return an XRayBuffer. Functions that return an +/// "empty" XRayBuffer signifies that there are no more buffers to be +/// processed. This function should be registered through the +/// `__xray_log_set_buffer_iterator(...)` function. +/// +/// 2) Its own means of converting data it holds in memory into an XRayBuffer +/// structure. +/// +/// See XRayLogFlushStatus for what the return values mean. +/// +XRayLogFlushStatus __xray_log_process_buffers(void (*Processor)(const char *, + XRayBuffer)); + +} // extern "C" + +#endif // XRAY_XRAY_LOG_INTERFACE_H diff --git a/llvm/lib/clang/19/include/xray/xray_records.h b/llvm/lib/clang/19/include/xray/xray_records.h new file mode 100644 index 0000000000000000000000000000000000000000..89ccb4df2bde61708acf6fa9c577a01cbb94ce19 --- /dev/null +++ b/llvm/lib/clang/19/include/xray/xray_records.h @@ -0,0 +1,134 @@ +//===-- xray_records.h ------------------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file is a part of XRay, a dynamic runtime instrumentation system. +// +// This header exposes some record types useful for the XRay in-memory logging +// implementation. +// +//===----------------------------------------------------------------------===// + +#ifndef XRAY_XRAY_RECORDS_H +#define XRAY_XRAY_RECORDS_H + +#include + +namespace __xray { + +enum FileTypes { + NAIVE_LOG = 0, + FDR_LOG = 1, +}; + +// FDR mode use of the union field in the XRayFileHeader. +struct alignas(16) FdrAdditionalHeaderData { + uint64_t ThreadBufferSize; +}; + +static_assert(sizeof(FdrAdditionalHeaderData) == 16, + "FdrAdditionalHeaderData != 16 bytes"); + +// This data structure is used to describe the contents of the file. We use this +// for versioning the supported XRay file formats. +struct alignas(32) XRayFileHeader { + uint16_t Version = 0; + + // The type of file we're writing out. See the FileTypes enum for more + // information. This allows different implementations of the XRay logging to + // have different files for different information being stored. + uint16_t Type = 0; + + // What follows are a set of flags that indicate useful things for when + // reading the data in the file. + bool ConstantTSC : 1; + bool NonstopTSC : 1; + + // The frequency by which TSC increases per-second. + alignas(8) uint64_t CycleFrequency = 0; + + union { + char FreeForm[16]; + // The current civiltime timestamp, as retrieved from 'clock_gettime'. This + // allows readers of the file to determine when the file was created or + // written down. + struct timespec TS; + + struct FdrAdditionalHeaderData FdrData; + }; +} __attribute__((packed)); + +static_assert(sizeof(XRayFileHeader) == 32, "XRayFileHeader != 32 bytes"); + +enum RecordTypes { + NORMAL = 0, + ARG_PAYLOAD = 1, +}; + +struct alignas(32) XRayRecord { + // This is the type of the record being written. We use 16 bits to allow us to + // treat this as a discriminant, and so that the first 4 bytes get packed + // properly. See RecordTypes for more supported types. + uint16_t RecordType = RecordTypes::NORMAL; + + // The CPU where the thread is running. We assume number of CPUs <= 256. + uint8_t CPU = 0; + + // The type of the event. One of the following: + // ENTER = 0 + // EXIT = 1 + // TAIL_EXIT = 2 + // ENTER_ARG = 3 + uint8_t Type = 0; + + // The function ID for the record. + int32_t FuncId = 0; + + // Get the full 8 bytes of the TSC when we get the log record. + uint64_t TSC = 0; + + // The thread ID for the currently running thread. + uint32_t TId = 0; + + // The ID of process that is currently running + uint32_t PId = 0; + + // Use some bytes in the end of the record for buffers. + char Buffer[8] = {}; +} __attribute__((packed)); + +static_assert(sizeof(XRayRecord) == 32, "XRayRecord != 32 bytes"); + +struct alignas(32) XRayArgPayload { + // We use the same 16 bits as a discriminant for the records in the log here + // too, and so that the first 4 bytes are packed properly. + uint16_t RecordType = RecordTypes::ARG_PAYLOAD; + + // Add a few bytes to pad. + uint8_t Padding[2] = {}; + + // The function ID for the record. + int32_t FuncId = 0; + + // The thread ID for the currently running thread. + uint32_t TId = 0; + + // The ID of process that is currently running + uint32_t PId = 0; + + // The argument payload. + uint64_t Arg = 0; + + // The rest of this record ought to be left as padding. + uint8_t TailPadding[8] = {}; +} __attribute__((packed)); + +static_assert(sizeof(XRayArgPayload) == 32, "XRayArgPayload != 32 bytes"); + +} // namespace __xray + +#endif // XRAY_XRAY_RECORDS_H diff --git a/llvm/lib/clang/19/include/xsavecintrin.h b/llvm/lib/clang/19/include/xsavecintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..1f2d001207e76ad2c2effd467cd8fe1e64b84e72 --- /dev/null +++ b/llvm/lib/clang/19/include/xsavecintrin.h @@ -0,0 +1,84 @@ +/*===---- xsavecintrin.h - XSAVEC intrinsic --------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __XSAVECINTRIN_H +#define __XSAVECINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xsavec"))) + +/// Performs a full or partial save of processor state to the memory at +/// \a __p. The exact state saved depends on the 64-bit mask \a __m and +/// processor control register \c XCR0. +/// +/// \code{.operation} +/// mask[62:0] := __m[62:0] AND XCR0[62:0] +/// FOR i := 0 TO 62 +/// IF mask[i] == 1 +/// CASE (i) OF +/// 0: save X87 FPU state +/// 1: save SSE state +/// DEFAULT: __p.Ext_Save_Area[i] := ProcessorState[i] +/// FI +/// ENDFOR +/// __p.Header.XSTATE_BV[62:0] := INIT_FUNCTION(mask[62:0]) +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c XSAVEC instruction. +/// +/// \param __p +/// Pointer to the save area; must be 64-byte aligned. +/// \param __m +/// A 64-bit mask indicating what state should be saved. +static __inline__ void __DEFAULT_FN_ATTRS +_xsavec(void *__p, unsigned long long __m) { + __builtin_ia32_xsavec(__p, __m); +} + +#ifdef __x86_64__ +/// Performs a full or partial save of processor state to the memory at +/// \a __p. The exact state saved depends on the 64-bit mask \a __m and +/// processor control register \c XCR0. +/// +/// \code{.operation} +/// mask[62:0] := __m[62:0] AND XCR0[62:0] +/// FOR i := 0 TO 62 +/// IF mask[i] == 1 +/// CASE (i) OF +/// 0: save X87 FPU state +/// 1: save SSE state +/// DEFAULT: __p.Ext_Save_Area[i] := ProcessorState[i] +/// FI +/// ENDFOR +/// __p.Header.XSTATE_BV[62:0] := INIT_FUNCTION(mask[62:0]) +/// \endcode +/// +/// \headerfile +/// +/// This intrinsic corresponds to the \c XSAVEC64 instruction. +/// +/// \param __p +/// Pointer to the save area; must be 64-byte aligned. +/// \param __m +/// A 64-bit mask indicating what state should be saved. +static __inline__ void __DEFAULT_FN_ATTRS +_xsavec64(void *__p, unsigned long long __m) { + __builtin_ia32_xsavec64(__p, __m); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/xsaveintrin.h b/llvm/lib/clang/19/include/xsaveintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..9429db6dde561e90a91c18bf8067024f2d8258f2 --- /dev/null +++ b/llvm/lib/clang/19/include/xsaveintrin.h @@ -0,0 +1,63 @@ +/*===---- xsaveintrin.h - XSAVE intrinsic ----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __XSAVEINTRIN_H +#define __XSAVEINTRIN_H + +#ifdef _MSC_VER +#define _XCR_XFEATURE_ENABLED_MASK 0 +#endif + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xsave"))) + +static __inline__ void __DEFAULT_FN_ATTRS +_xsave(void *__p, unsigned long long __m) { + __builtin_ia32_xsave(__p, __m); +} + +static __inline__ void __DEFAULT_FN_ATTRS +_xrstor(void *__p, unsigned long long __m) { + __builtin_ia32_xrstor(__p, __m); +} + +#ifndef _MSC_VER +#define _xgetbv(A) __builtin_ia32_xgetbv((long long)(A)) +#define _xsetbv(A, B) __builtin_ia32_xsetbv((unsigned int)(A), (unsigned long long)(B)) +#else +#ifdef __cplusplus +extern "C" { +#endif +unsigned __int64 __cdecl _xgetbv(unsigned int); +void __cdecl _xsetbv(unsigned int, unsigned __int64); +#ifdef __cplusplus +} +#endif +#endif /* _MSC_VER */ + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS +_xsave64(void *__p, unsigned long long __m) { + __builtin_ia32_xsave64(__p, __m); +} + +static __inline__ void __DEFAULT_FN_ATTRS +_xrstor64(void *__p, unsigned long long __m) { + __builtin_ia32_xrstor64(__p, __m); +} + +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/xsaveoptintrin.h b/llvm/lib/clang/19/include/xsaveoptintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..89a4c44db5d9f33f7e1a2ba6952520e09a95787e --- /dev/null +++ b/llvm/lib/clang/19/include/xsaveoptintrin.h @@ -0,0 +1,34 @@ +/*===---- xsaveoptintrin.h - XSAVEOPT intrinsic ----------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __XSAVEOPTINTRIN_H +#define __XSAVEOPTINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xsaveopt"))) + +static __inline__ void __DEFAULT_FN_ATTRS +_xsaveopt(void *__p, unsigned long long __m) { + __builtin_ia32_xsaveopt(__p, __m); +} + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS +_xsaveopt64(void *__p, unsigned long long __m) { + __builtin_ia32_xsaveopt64(__p, __m); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/xsavesintrin.h b/llvm/lib/clang/19/include/xsavesintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..3f99219a297206331fb3dd93a784f89d92fdef26 --- /dev/null +++ b/llvm/lib/clang/19/include/xsavesintrin.h @@ -0,0 +1,44 @@ +/*===---- xsavesintrin.h - XSAVES intrinsic --------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __XSAVESINTRIN_H +#define __XSAVESINTRIN_H + +/* Define the default attributes for the functions in this file. */ +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xsaves"))) + +static __inline__ void __DEFAULT_FN_ATTRS +_xsaves(void *__p, unsigned long long __m) { + __builtin_ia32_xsaves(__p, __m); +} + +static __inline__ void __DEFAULT_FN_ATTRS +_xrstors(void *__p, unsigned long long __m) { + __builtin_ia32_xrstors(__p, __m); +} + +#ifdef __x86_64__ +static __inline__ void __DEFAULT_FN_ATTRS +_xrstors64(void *__p, unsigned long long __m) { + __builtin_ia32_xrstors64(__p, __m); +} + +static __inline__ void __DEFAULT_FN_ATTRS +_xsaves64(void *__p, unsigned long long __m) { + __builtin_ia32_xsaves64(__p, __m); +} +#endif + +#undef __DEFAULT_FN_ATTRS + +#endif diff --git a/llvm/lib/clang/19/include/xtestintrin.h b/llvm/lib/clang/19/include/xtestintrin.h new file mode 100644 index 0000000000000000000000000000000000000000..7d19e3733d7e6e300552dc68b1b08655085ee5eb --- /dev/null +++ b/llvm/lib/clang/19/include/xtestintrin.h @@ -0,0 +1,27 @@ +/*===---- xtestintrin.h - XTEST intrinsic ----------------------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use directly; include instead." +#endif + +#ifndef __XTESTINTRIN_H +#define __XTESTINTRIN_H + +/* xtest returns non-zero if the instruction is executed within an RTM or active + * HLE region. */ +/* FIXME: This can be an either or for RTM/HLE. Deal with this when HLE is + * supported. */ +static __inline__ int + __attribute__((__always_inline__, __nodebug__, __target__("rtm"))) + _xtest(void) { + return __builtin_ia32_xtest(); +} + +#endif diff --git a/llvm/lib/clang/19/include/yvals_core.h b/llvm/lib/clang/19/include/yvals_core.h new file mode 100644 index 0000000000000000000000000000000000000000..5ee194a3e5f5f60b83cad4115fbb36c005e7646e --- /dev/null +++ b/llvm/lib/clang/19/include/yvals_core.h @@ -0,0 +1,25 @@ +//===----- yvals_core.h - Internal MSVC STL core header -------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +// Only include this if we are aiming for MSVC compatibility. +#ifndef _MSC_VER +#include_next +#else + +#ifndef __clang_yvals_core_h +#define __clang_yvals_core_h + +#include_next + +#ifdef _STL_INTRIN_HEADER +#undef _STL_INTRIN_HEADER +#define _STL_INTRIN_HEADER +#endif + +#endif +#endif diff --git a/llvm/lib/clang/19/include/zos_wrappers/builtins.h b/llvm/lib/clang/19/include/zos_wrappers/builtins.h new file mode 100644 index 0000000000000000000000000000000000000000..1f0d0e27ecb3a486088c0c1513841391a5146cfb --- /dev/null +++ b/llvm/lib/clang/19/include/zos_wrappers/builtins.h @@ -0,0 +1,18 @@ +/*===---- builtins.h - z/Architecture Builtin Functions --------------------=== + * + * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __ZOS_WRAPPERS_BUILTINS_H +#define __ZOS_WRAPPERS_BUILTINS_H +#if defined(__MVS__) +#include_next +#if defined(__VEC__) +#include +#endif +#endif /* defined(__MVS__) */ +#endif /* __ZOS_WRAPPERS_BUILTINS_H */ diff --git a/llvm/lib/clang/19/lib/windows/clang_rt.asan-preinit-x86_64.lib b/llvm/lib/clang/19/lib/windows/clang_rt.asan-preinit-x86_64.lib new file mode 100644 index 0000000000000000000000000000000000000000..7fe7144ee7c87f649e4165dd2333534afd8634e1 Binary files /dev/null and b/llvm/lib/clang/19/lib/windows/clang_rt.asan-preinit-x86_64.lib differ diff --git a/llvm/lib/clang/19/lib/windows/clang_rt.asan_dynamic_runtime_thunk-x86_64.lib b/llvm/lib/clang/19/lib/windows/clang_rt.asan_dynamic_runtime_thunk-x86_64.lib new file mode 100644 index 0000000000000000000000000000000000000000..b85b84ba7041641f4ba097087c0aa007bf4da3e5 Binary files /dev/null and b/llvm/lib/clang/19/lib/windows/clang_rt.asan_dynamic_runtime_thunk-x86_64.lib differ diff --git a/llvm/lib/clang/19/lib/windows/clang_rt.asan_static-x86_64.lib b/llvm/lib/clang/19/lib/windows/clang_rt.asan_static-x86_64.lib new file mode 100644 index 0000000000000000000000000000000000000000..8d7e858db6d8540ae7fe1683b9d31ec02c14449b Binary files /dev/null and b/llvm/lib/clang/19/lib/windows/clang_rt.asan_static-x86_64.lib differ diff --git a/llvm/lib/clang/19/lib/windows/clang_rt.fuzzer_interceptors-x86_64.lib b/llvm/lib/clang/19/lib/windows/clang_rt.fuzzer_interceptors-x86_64.lib new file mode 100644 index 0000000000000000000000000000000000000000..074be96ffaf40998d51f8dc3ba0623ab9769a931 Binary files /dev/null and b/llvm/lib/clang/19/lib/windows/clang_rt.fuzzer_interceptors-x86_64.lib differ diff --git a/llvm/lib/clang/19/lib/windows/clang_rt.stats_client-x86_64.lib b/llvm/lib/clang/19/lib/windows/clang_rt.stats_client-x86_64.lib new file mode 100644 index 0000000000000000000000000000000000000000..433541e98ab1864f43535e01b3dbb0bdca6134d4 Binary files /dev/null and b/llvm/lib/clang/19/lib/windows/clang_rt.stats_client-x86_64.lib differ diff --git a/llvm/lib/clang/19/lib/windows/clang_rt.ubsan_standalone_cxx-x86_64.lib b/llvm/lib/clang/19/lib/windows/clang_rt.ubsan_standalone_cxx-x86_64.lib new file mode 100644 index 0000000000000000000000000000000000000000..06b4ac598169a6717c13ff4b81925b715a7ed506 Binary files /dev/null and b/llvm/lib/clang/19/lib/windows/clang_rt.ubsan_standalone_cxx-x86_64.lib differ diff --git a/llvm/lib/clang/19/share/asan_ignorelist.txt b/llvm/lib/clang/19/share/asan_ignorelist.txt new file mode 100644 index 0000000000000000000000000000000000000000..5ce59926ce2f3679909f3c48511cd593f24eb01f --- /dev/null +++ b/llvm/lib/clang/19/share/asan_ignorelist.txt @@ -0,0 +1,13 @@ +# Ignorelist for AddressSanitizer. Turns off instrumentation of particular +# functions or sources. Use with care. You may set location of ignorelist +# at compile-time using -fsanitize-ignorelist= flag. + +# Example usage: +# fun:*bad_function_name* +# src:file_with_tricky_code.cc +# global:*global_with_bad_access_or_initialization* +# global:*global_with_initialization_issues*=init +# type:*Namespace::ClassName*=init + +# Stack buffer overflow in VC/INCLUDE/xlocnum, see http://goo.gl/L4qqUG +fun:*_Find_elem@*@std* diff --git a/llvm/lib/clang/19/share/cfi_ignorelist.txt b/llvm/lib/clang/19/share/cfi_ignorelist.txt new file mode 100644 index 0000000000000000000000000000000000000000..4a0f03949ca8cfdc3244439248788d5dfa96026d --- /dev/null +++ b/llvm/lib/clang/19/share/cfi_ignorelist.txt @@ -0,0 +1,17 @@ +[cfi-unrelated-cast] +# The specification of std::get_temporary_buffer mandates a cast to +# uninitialized T* (libstdc++, MSVC stdlib). +fun:_ZSt20get_temporary_buffer* +fun:*get_temporary_buffer@.*@std@@* + +# STL address-of magic (libstdc++). +fun:*__addressof* + +# Windows C++ stdlib headers that contain bad unrelated casts. +src:*xmemory0 +src:*xstddef + +# std::_Sp_counted_ptr_inplace::_Sp_counted_ptr_inplace() (libstdc++). +# This ctor is used by std::make_shared and needs to cast to uninitialized T* +# in order to call std::allocator_traits::construct. +fun:_ZNSt23_Sp_counted_ptr_inplace*