Upload apex-master/csrc/multi_tensor_l2norm_kernel_mp.cu with huggingface_hub
Browse files
apex-master/csrc/multi_tensor_l2norm_kernel_mp.cu
ADDED
|
@@ -0,0 +1,216 @@
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 1 |
+
#include <ATen/ATen.h>
|
| 2 |
+
#include <ATen/AccumulateType.h>
|
| 3 |
+
#include <ATen/cuda/CUDAContext.h>
|
| 4 |
+
#include <ATen/cuda/Exceptions.h>
|
| 5 |
+
#include <c10/cuda/CUDAGuard.h>
|
| 6 |
+
// Another possibility:
|
| 7 |
+
// #include <torch/all.h>
|
| 8 |
+
|
| 9 |
+
#include <assert.h>
|
| 10 |
+
|
| 11 |
+
#include "type_shim.h"
|
| 12 |
+
#include "multi_tensor_apply.cuh"
|
| 13 |
+
|
| 14 |
+
#define BLOCK_SIZE 512
|
| 15 |
+
#define ILP 4
|
| 16 |
+
|
| 17 |
+
template<typename T>
|
| 18 |
+
__device__ __forceinline__ bool is_aligned(T* p){
|
| 19 |
+
return ((uint64_t)p) % (ILP*sizeof(T)) == 0;
|
| 20 |
+
}
|
| 21 |
+
|
| 22 |
+
template<typename T>
|
| 23 |
+
__device__ __forceinline__ void load_store(T* dst, T* src, int dst_offset, int src_offset){
|
| 24 |
+
typedef typename std::aligned_storage<ILP*sizeof(T), ILP*alignof(T)>::type LT;
|
| 25 |
+
((LT*)dst)[dst_offset] = ((LT*)src)[src_offset];
|
| 26 |
+
}
|
| 27 |
+
|
| 28 |
+
template<typename x_t>
|
| 29 |
+
struct L2NormFunctor
|
| 30 |
+
{
|
| 31 |
+
__device__ __forceinline__ void operator()(
|
| 32 |
+
int chunk_size,
|
| 33 |
+
volatile int* noop_gmem,
|
| 34 |
+
TensorListMetadata<1>& tl,
|
| 35 |
+
float* output,
|
| 36 |
+
float* output_per_tensor,
|
| 37 |
+
bool per_tensor,
|
| 38 |
+
int max_chunks_per_tensor)
|
| 39 |
+
{
|
| 40 |
+
if (*noop_gmem) {
|
| 41 |
+
return;
|
| 42 |
+
}
|
| 43 |
+
|
| 44 |
+
int tensor_loc = tl.block_to_tensor[blockIdx.x];
|
| 45 |
+
int chunk_idx = tl.block_to_chunk[blockIdx.x];
|
| 46 |
+
int n = tl.sizes[tensor_loc];
|
| 47 |
+
|
| 48 |
+
x_t* x = (x_t*)tl.addresses[0][tensor_loc];
|
| 49 |
+
x += chunk_idx*chunk_size;
|
| 50 |
+
|
| 51 |
+
n -= chunk_idx*chunk_size;
|
| 52 |
+
|
| 53 |
+
__shared__ float s_vals[512];
|
| 54 |
+
|
| 55 |
+
float vals[ILP]; // = {0}; // this probably works too but I want to be sure...
|
| 56 |
+
x_t r_x[ILP];
|
| 57 |
+
for(int i = 0; i < ILP; i++)
|
| 58 |
+
{
|
| 59 |
+
vals[i] = 0.f;
|
| 60 |
+
r_x[i] = 0;
|
| 61 |
+
}
|
| 62 |
+
|
| 63 |
+
// to make things simple, we put aligned case in a different code path
|
| 64 |
+
if(n % ILP == 0 && chunk_size % ILP == 0 && is_aligned(x))
|
| 65 |
+
{
|
| 66 |
+
for(int i_start = threadIdx.x; i_start*ILP < n && i_start*ILP < chunk_size; i_start += blockDim.x)
|
| 67 |
+
{
|
| 68 |
+
// load
|
| 69 |
+
load_store(r_x, x, 0 , i_start);
|
| 70 |
+
#pragma unroll
|
| 71 |
+
for(int ii = 0; ii < ILP; ii++)
|
| 72 |
+
{
|
| 73 |
+
float next = static_cast<float>(r_x[ii]);
|
| 74 |
+
vals[ii] += next*next;
|
| 75 |
+
}
|
| 76 |
+
}
|
| 77 |
+
}
|
| 78 |
+
else
|
| 79 |
+
{
|
| 80 |
+
for(int i_start = 0; i_start < n && i_start < chunk_size; i_start += blockDim.x*ILP)
|
| 81 |
+
{
|
| 82 |
+
#pragma unroll
|
| 83 |
+
for(int ii = 0; ii < ILP; ii++)
|
| 84 |
+
{
|
| 85 |
+
int i = i_start + threadIdx.x + ii*blockDim.x;
|
| 86 |
+
if(i < n && i < chunk_size)
|
| 87 |
+
{
|
| 88 |
+
float next = static_cast<float>(x[i]);
|
| 89 |
+
vals[ii] += next*next;
|
| 90 |
+
}
|
| 91 |
+
}
|
| 92 |
+
}
|
| 93 |
+
}
|
| 94 |
+
|
| 95 |
+
float val = 0.f;
|
| 96 |
+
for(int i = 0; i < ILP; i++)
|
| 97 |
+
val += vals[i];
|
| 98 |
+
|
| 99 |
+
float final = reduce_block_into_lanes(s_vals, val);
|
| 100 |
+
|
| 101 |
+
if(threadIdx.x == 0)
|
| 102 |
+
{
|
| 103 |
+
if(!isfinite(final))
|
| 104 |
+
*noop_gmem = 1; // Blindly fire off a write. These will race but that's ok.
|
| 105 |
+
output[blockIdx.x] += final;
|
| 106 |
+
if(per_tensor)
|
| 107 |
+
output_per_tensor[(tl.start_tensor_this_launch + tensor_loc)*max_chunks_per_tensor + chunk_idx] = final;
|
| 108 |
+
}
|
| 109 |
+
}
|
| 110 |
+
};
|
| 111 |
+
|
| 112 |
+
__global__ void cleanup(
|
| 113 |
+
float* output,
|
| 114 |
+
float* output_per_tensor,
|
| 115 |
+
float* ret,
|
| 116 |
+
float* ret_per_tensor,
|
| 117 |
+
bool per_tensor,
|
| 118 |
+
int max_chunks_per_tensor,
|
| 119 |
+
volatile int* noop_gmem)
|
| 120 |
+
{
|
| 121 |
+
if (*noop_gmem) {
|
| 122 |
+
return;
|
| 123 |
+
}
|
| 124 |
+
__shared__ float vals[512];
|
| 125 |
+
|
| 126 |
+
if(blockIdx.x == 0)
|
| 127 |
+
{
|
| 128 |
+
float val = 0;
|
| 129 |
+
if(threadIdx.x < 320)
|
| 130 |
+
val = output[threadIdx.x];
|
| 131 |
+
|
| 132 |
+
float final = reduce_block_into_lanes(vals, val);
|
| 133 |
+
|
| 134 |
+
if(threadIdx.x == 0)
|
| 135 |
+
*ret = sqrt(final);
|
| 136 |
+
}
|
| 137 |
+
|
| 138 |
+
if(per_tensor)
|
| 139 |
+
{
|
| 140 |
+
float* output_this_tensor = output_per_tensor + blockIdx.x*max_chunks_per_tensor;
|
| 141 |
+
|
| 142 |
+
float val = 0;
|
| 143 |
+
for(int i = threadIdx.x; i < max_chunks_per_tensor; i += blockDim.x)
|
| 144 |
+
val += output_this_tensor[i];
|
| 145 |
+
|
| 146 |
+
float final = reduce_block_into_lanes(vals, val);
|
| 147 |
+
|
| 148 |
+
if(threadIdx.x == 0)
|
| 149 |
+
ret_per_tensor[blockIdx.x] = sqrt(final);
|
| 150 |
+
}
|
| 151 |
+
}
|
| 152 |
+
|
| 153 |
+
std::tuple<at::Tensor, at::Tensor> multi_tensor_l2norm_mp_cuda(
|
| 154 |
+
int chunk_size,
|
| 155 |
+
at::Tensor noop_flag,
|
| 156 |
+
std::vector<std::vector<at::Tensor>> tensor_lists,
|
| 157 |
+
at::optional<bool> per_tensor_python)
|
| 158 |
+
{
|
| 159 |
+
bool per_tensor = per_tensor_python.has_value() ? per_tensor_python.value() : false;
|
| 160 |
+
|
| 161 |
+
auto float_options = tensor_lists[0][0].options().dtype(at::kFloat);
|
| 162 |
+
auto output = at::zeros({320}, float_options);
|
| 163 |
+
|
| 164 |
+
at::Tensor output_per_tensor;
|
| 165 |
+
at::Tensor ret_per_tensor;
|
| 166 |
+
|
| 167 |
+
int ntensors = tensor_lists[0].size();
|
| 168 |
+
int max_chunks_per_tensor = -1;
|
| 169 |
+
|
| 170 |
+
if(per_tensor)
|
| 171 |
+
{
|
| 172 |
+
for(int t = 0; t < ntensors; t++)
|
| 173 |
+
{
|
| 174 |
+
int max_chunks_this_tensor = (tensor_lists[0][t].numel() + chunk_size - 1)/chunk_size;
|
| 175 |
+
if(max_chunks_this_tensor > max_chunks_per_tensor)
|
| 176 |
+
max_chunks_per_tensor = max_chunks_this_tensor;
|
| 177 |
+
}
|
| 178 |
+
output_per_tensor = at::zeros({ntensors*max_chunks_per_tensor}, float_options);
|
| 179 |
+
ret_per_tensor = at::empty({ntensors}, float_options);
|
| 180 |
+
}
|
| 181 |
+
else
|
| 182 |
+
{
|
| 183 |
+
ret_per_tensor = at::empty({0}, float_options);
|
| 184 |
+
}
|
| 185 |
+
|
| 186 |
+
DISPATCH_FLOAT_HALF_AND_BFLOAT(tensor_lists[0][0].scalar_type(), 0, "multi_tensor_l2norm_mp_cuda",
|
| 187 |
+
multi_tensor_apply<1>(
|
| 188 |
+
BLOCK_SIZE,
|
| 189 |
+
chunk_size,
|
| 190 |
+
noop_flag,
|
| 191 |
+
tensor_lists,
|
| 192 |
+
L2NormFunctor<scalar_t_0>(),
|
| 193 |
+
output.data_ptr<float>(),
|
| 194 |
+
per_tensor ? output_per_tensor.data_ptr<float>() : nullptr,
|
| 195 |
+
per_tensor,
|
| 196 |
+
max_chunks_per_tensor);)
|
| 197 |
+
|
| 198 |
+
AT_CUDA_CHECK(cudaGetLastError());
|
| 199 |
+
// AT_CUDA_CHECK(cudaDeviceSynchronize());
|
| 200 |
+
|
| 201 |
+
// This involves one more small kernel launches, but will be negligible end to end.
|
| 202 |
+
// I could get rid of these by hacking the functor + multi tensor harness with persistence
|
| 203 |
+
// logic, but keeping it simple for now
|
| 204 |
+
auto ret = at::empty({1}, output.options());
|
| 205 |
+
const at::cuda::OptionalCUDAGuard device_guard(device_of(output));
|
| 206 |
+
auto stream = at::cuda::getCurrentCUDAStream();
|
| 207 |
+
cleanup<<<per_tensor ? ntensors : 1, 512, 0, stream>>>(
|
| 208 |
+
output.data_ptr<float>(),
|
| 209 |
+
per_tensor ? output_per_tensor.data_ptr<float>() : nullptr,
|
| 210 |
+
ret.data_ptr<float>(),
|
| 211 |
+
per_tensor ? ret_per_tensor.data_ptr<float>() : nullptr,
|
| 212 |
+
per_tensor,
|
| 213 |
+
max_chunks_per_tensor, noop_flag.data_ptr<int>());
|
| 214 |
+
|
| 215 |
+
return std::tuple<at::Tensor, at::Tensor>(ret, ret_per_tensor);
|
| 216 |
+
}
|