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Upload apex-master/csrc/multi_tensor_lamb_stage_1.cu with huggingface_hub

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apex-master/csrc/multi_tensor_lamb_stage_1.cu ADDED
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+ #include <ATen/ATen.h>
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+ #include <ATen/AccumulateType.h>
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+ #include <ATen/cuda/CUDAContext.h>
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+ #include <ATen/cuda/Exceptions.h>
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+ // Another possibility:
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+ // #include <torch/all.h>
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+
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+ #include <assert.h>
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+
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+ #include "type_shim.h"
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+ #include "multi_tensor_apply.cuh"
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+
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+ #define BLOCK_SIZE 512
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+ #define ILP 4
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+
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+ // Step 1 computes the 'update' value of regular Adam optimizer.
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+ template<typename GRAD_T, typename T, typename UPD_T>
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+ struct LAMBStage1Functor
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+ {
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+ __device__ __forceinline__ void operator()(
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+ int chunk_size,
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+ volatile int* noop_gmem,
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+ TensorListMetadata<5>& tl,
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+ const float* per_tensor_decay,
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+ const float beta1,
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+ const float beta2,
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+ const float beta1_correction,
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+ const float beta2_correction,
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+ const float epsilon,
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+ const float clipped_global_grad_norm)
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+ {
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+ // I'd like this kernel to propagate infs/nans.
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+ // if(*noop_gmem == 1)
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+ // return;
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+
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+ int tensor_loc = tl.block_to_tensor[blockIdx.x];
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+ int tensor_num = tl.start_tensor_this_launch + tensor_loc;
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+ int chunk_idx = tl.block_to_chunk[blockIdx.x];
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+ int n = tl.sizes[tensor_loc];
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+
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+ float decay = per_tensor_decay[tensor_num];
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+
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+ GRAD_T* g = (GRAD_T*)tl.addresses[0][tensor_loc];
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+ g += chunk_idx*chunk_size;
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+
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+ T* p = (T*)tl.addresses[1][tensor_loc];
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+ p += chunk_idx*chunk_size;
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+
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+ T* m = (T*)tl.addresses[2][tensor_loc];
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+ m += chunk_idx*chunk_size;
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+
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+ T* v = (T*)tl.addresses[3][tensor_loc];
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+ v += chunk_idx*chunk_size;
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+
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+ UPD_T* update = (UPD_T*)tl.addresses[4][tensor_loc];
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+ update += chunk_idx*chunk_size;
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+
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+ n -= chunk_idx*chunk_size;
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+
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+ // see note in multi_tensor_scale_kernel.cu
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+ for(int i_start = 0;
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+ i_start < n && i_start < chunk_size;
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+ i_start += blockDim.x*ILP)
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+ {
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+ GRAD_T r_g[ILP];
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+ T r_p[ILP];
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+ T r_m[ILP];
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+ T r_v[ILP];
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+ #pragma unroll
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+ for(int ii = 0; ii < ILP; ii++)
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+ {
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+ int i = i_start + threadIdx.x + ii*blockDim.x;
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+ if(i < n && i < chunk_size)
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+ {
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+ r_g[ii] = g[i];
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+ r_p[ii] = p[i];
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+ r_m[ii] = m[i];
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+ r_v[ii] = v[i];
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+ } else {
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+ r_g[ii] = GRAD_T(0);
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+ r_p[ii] = T(0);
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+ r_m[ii] = T(0);
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+ r_v[ii] = T(0);
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+ }
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+ }
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+ #pragma unroll
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+ for(int ii = 0; ii < ILP; ii++)
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+ {
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+ T scaled_grad = r_g[ii] / clipped_global_grad_norm;
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+ r_m[ii] = r_m[ii] * beta1 + (1-beta1) * scaled_grad;
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+ r_v[ii] = r_v[ii] * beta2 + (1-beta2) * scaled_grad * scaled_grad;
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+ T next_m_unbiased = r_m[ii] / beta1_correction;
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+ T next_v_unbiased = r_v[ii] / beta2_correction;
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+ T denom = std::sqrt(next_v_unbiased) + epsilon;
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+ r_p[ii] = (next_m_unbiased/denom) + (decay*r_p[ii]);
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+ }
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+ #pragma unroll
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+ for(int ii = 0; ii < ILP; ii++)
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+ {
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+ int i = i_start + threadIdx.x + ii*blockDim.x;
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+ if(i < n && i < chunk_size)
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+ {
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+ update[i] = (UPD_T)r_p[ii];
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+ m[i] = r_m[ii];
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+ v[i] = r_v[ii];
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+ }
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+ }
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+ }
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+ }
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+ };
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+
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+ void multi_tensor_lamb_stage1_cuda(
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+ int chunk_size,
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+ at::Tensor noop_flag,
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+ std::vector<std::vector<at::Tensor>> tensor_lists,
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+ at::Tensor per_tensor_decay,
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+ const int step,
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+ const float beta1,
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+ const float beta2,
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+ const float epsilon,
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+ at::Tensor global_grad_norm,
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+ const float max_global_grad_norm)
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+ {
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+ using namespace at;
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+
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+ const float* g_grad_norm = global_grad_norm.DATA_PTR<float>();
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+ float clipped_global_grad_norm = *(g_grad_norm) > max_global_grad_norm ? *(g_grad_norm) / max_global_grad_norm : 1.0f;
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+ float next_step = float(step+1);
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+ float beta1_correction = 1.0f - std::pow(beta1, next_step);
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+ float beta2_correction = 1.0f - std::pow(beta2, next_step);
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+ DISPATCH_FLOAT_AND_HALF(tensor_lists[0][0].scalar_type(), 0, "lamb_stage_1",
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+ DISPATCH_FLOAT_AND_HALF(tensor_lists[1][0].scalar_type(), 1, "lamb_stage_1",
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+ DISPATCH_FLOAT_AND_HALF(tensor_lists[4][0].scalar_type(), 2, "lamb_stage_1",
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+ multi_tensor_apply<5>(
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+ BLOCK_SIZE,
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+ chunk_size,
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+ noop_flag,
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+ tensor_lists,
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+ LAMBStage1Functor<scalar_t_0, scalar_t_1, scalar_t_2>(),
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+ per_tensor_decay.DATA_PTR<float>(),
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+ beta1,
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+ beta2,
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+ beta1_correction,
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+ beta2_correction,
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+ epsilon,
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+ clipped_global_grad_norm); )))
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+
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+ AT_CUDA_CHECK(cudaGetLastError());
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+
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+ // AT_CUDA_CHECK(cudaDeviceSynchronize());
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+ }