diff --git a/.gitattributes b/.gitattributes
index 1ef325f1b111266a6b26e0196871bd78baa8c2f3..3dd20eb08e5623df126644ff1453f20991bf17ad 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -57,3 +57,1388 @@ saved_model/**/* filter=lfs diff=lfs merge=lfs -text
 # Video files - compressed
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+//===- ELFYAML.cpp - ELF YAMLIO implementation ----------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines classes for handling the YAML representation of ELF.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Object/ELFYAML.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/MipsABIFlags.h"
+
+namespace llvm {
+
+ELFYAML::Section::~Section() {}
+
+namespace yaml {
+
+void
+ScalarEnumerationTraits<ELFYAML::ELF_ET>::enumeration(IO &IO,
+                                                      ELFYAML::ELF_ET &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(ET_NONE)
+  ECase(ET_REL)
+  ECase(ET_EXEC)
+  ECase(ET_DYN)
+  ECase(ET_CORE)
+#undef ECase
+  IO.enumFallback<Hex16>(Value);
+}
+
+void
+ScalarEnumerationTraits<ELFYAML::ELF_EM>::enumeration(IO &IO,
+                                                      ELFYAML::ELF_EM &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(EM_NONE)
+  ECase(EM_M32)
+  ECase(EM_SPARC)
+  ECase(EM_386)
+  ECase(EM_68K)
+  ECase(EM_88K)
+  ECase(EM_IAMCU)
+  ECase(EM_860)
+  ECase(EM_MIPS)
+  ECase(EM_S370)
+  ECase(EM_MIPS_RS3_LE)
+  ECase(EM_PARISC)
+  ECase(EM_VPP500)
+  ECase(EM_SPARC32PLUS)
+  ECase(EM_960)
+  ECase(EM_PPC)
+  ECase(EM_PPC64)
+  ECase(EM_S390)
+  ECase(EM_SPU)
+  ECase(EM_V800)
+  ECase(EM_FR20)
+  ECase(EM_RH32)
+  ECase(EM_RCE)
+  ECase(EM_ARM)
+  ECase(EM_ALPHA)
+  ECase(EM_SH)
+  ECase(EM_SPARCV9)
+  ECase(EM_TRICORE)
+  ECase(EM_ARC)
+  ECase(EM_H8_300)
+  ECase(EM_H8_300H)
+  ECase(EM_H8S)
+  ECase(EM_H8_500)
+  ECase(EM_IA_64)
+  ECase(EM_MIPS_X)
+  ECase(EM_COLDFIRE)
+  ECase(EM_68HC12)
+  ECase(EM_MMA)
+  ECase(EM_PCP)
+  ECase(EM_NCPU)
+  ECase(EM_NDR1)
+  ECase(EM_STARCORE)
+  ECase(EM_ME16)
+  ECase(EM_ST100)
+  ECase(EM_TINYJ)
+  ECase(EM_X86_64)
+  ECase(EM_PDSP)
+  ECase(EM_PDP10)
+  ECase(EM_PDP11)
+  ECase(EM_FX66)
+  ECase(EM_ST9PLUS)
+  ECase(EM_ST7)
+  ECase(EM_68HC16)
+  ECase(EM_68HC11)
+  ECase(EM_68HC08)
+  ECase(EM_68HC05)
+  ECase(EM_SVX)
+  ECase(EM_ST19)
+  ECase(EM_VAX)
+  ECase(EM_CRIS)
+  ECase(EM_JAVELIN)
+  ECase(EM_FIREPATH)
+  ECase(EM_ZSP)
+  ECase(EM_MMIX)
+  ECase(EM_HUANY)
+  ECase(EM_PRISM)
+  ECase(EM_AVR)
+  ECase(EM_FR30)
+  ECase(EM_D10V)
+  ECase(EM_D30V)
+  ECase(EM_V850)
+  ECase(EM_M32R)
+  ECase(EM_MN10300)
+  ECase(EM_MN10200)
+  ECase(EM_PJ)
+  ECase(EM_OPENRISC)
+  ECase(EM_ARC_COMPACT)
+  ECase(EM_XTENSA)
+  ECase(EM_VIDEOCORE)
+  ECase(EM_TMM_GPP)
+  ECase(EM_NS32K)
+  ECase(EM_TPC)
+  ECase(EM_SNP1K)
+  ECase(EM_ST200)
+  ECase(EM_IP2K)
+  ECase(EM_MAX)
+  ECase(EM_CR)
+  ECase(EM_F2MC16)
+  ECase(EM_MSP430)
+  ECase(EM_BLACKFIN)
+  ECase(EM_SE_C33)
+  ECase(EM_SEP)
+  ECase(EM_ARCA)
+  ECase(EM_UNICORE)
+  ECase(EM_EXCESS)
+  ECase(EM_DXP)
+  ECase(EM_ALTERA_NIOS2)
+  ECase(EM_CRX)
+  ECase(EM_XGATE)
+  ECase(EM_C166)
+  ECase(EM_M16C)
+  ECase(EM_DSPIC30F)
+  ECase(EM_CE)
+  ECase(EM_M32C)
+  ECase(EM_TSK3000)
+  ECase(EM_RS08)
+  ECase(EM_SHARC)
+  ECase(EM_ECOG2)
+  ECase(EM_SCORE7)
+  ECase(EM_DSP24)
+  ECase(EM_VIDEOCORE3)
+  ECase(EM_LATTICEMICO32)
+  ECase(EM_SE_C17)
+  ECase(EM_TI_C6000)
+  ECase(EM_TI_C2000)
+  ECase(EM_TI_C5500)
+  ECase(EM_MMDSP_PLUS)
+  ECase(EM_CYPRESS_M8C)
+  ECase(EM_R32C)
+  ECase(EM_TRIMEDIA)
+  ECase(EM_HEXAGON)
+  ECase(EM_8051)
+  ECase(EM_STXP7X)
+  ECase(EM_NDS32)
+  ECase(EM_ECOG1)
+  ECase(EM_ECOG1X)
+  ECase(EM_MAXQ30)
+  ECase(EM_XIMO16)
+  ECase(EM_MANIK)
+  ECase(EM_CRAYNV2)
+  ECase(EM_RX)
+  ECase(EM_METAG)
+  ECase(EM_MCST_ELBRUS)
+  ECase(EM_ECOG16)
+  ECase(EM_CR16)
+  ECase(EM_ETPU)
+  ECase(EM_SLE9X)
+  ECase(EM_L10M)
+  ECase(EM_K10M)
+  ECase(EM_AARCH64)
+  ECase(EM_AVR32)
+  ECase(EM_STM8)
+  ECase(EM_TILE64)
+  ECase(EM_TILEPRO)
+  ECase(EM_CUDA)
+  ECase(EM_TILEGX)
+  ECase(EM_CLOUDSHIELD)
+  ECase(EM_COREA_1ST)
+  ECase(EM_COREA_2ND)
+  ECase(EM_ARC_COMPACT2)
+  ECase(EM_OPEN8)
+  ECase(EM_RL78)
+  ECase(EM_VIDEOCORE5)
+  ECase(EM_78KOR)
+  ECase(EM_56800EX)
+  ECase(EM_AMDGPU)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_ELFCLASS>::enumeration(
+    IO &IO, ELFYAML::ELF_ELFCLASS &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  // Since the semantics of ELFCLASSNONE is "invalid", just don't accept it
+  // here.
+  ECase(ELFCLASS32)
+  ECase(ELFCLASS64)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_ELFDATA>::enumeration(
+    IO &IO, ELFYAML::ELF_ELFDATA &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  // Since the semantics of ELFDATANONE is "invalid", just don't accept it
+  // here.
+  ECase(ELFDATA2LSB)
+  ECase(ELFDATA2MSB)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_ELFOSABI>::enumeration(
+    IO &IO, ELFYAML::ELF_ELFOSABI &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(ELFOSABI_NONE)
+  ECase(ELFOSABI_HPUX)
+  ECase(ELFOSABI_NETBSD)
+  ECase(ELFOSABI_GNU)
+  ECase(ELFOSABI_GNU)
+  ECase(ELFOSABI_HURD)
+  ECase(ELFOSABI_SOLARIS)
+  ECase(ELFOSABI_AIX)
+  ECase(ELFOSABI_IRIX)
+  ECase(ELFOSABI_FREEBSD)
+  ECase(ELFOSABI_TRU64)
+  ECase(ELFOSABI_MODESTO)
+  ECase(ELFOSABI_OPENBSD)
+  ECase(ELFOSABI_OPENVMS)
+  ECase(ELFOSABI_NSK)
+  ECase(ELFOSABI_AROS)
+  ECase(ELFOSABI_FENIXOS)
+  ECase(ELFOSABI_CLOUDABI)
+  ECase(ELFOSABI_C6000_ELFABI)
+  ECase(ELFOSABI_C6000_LINUX)
+  ECase(ELFOSABI_ARM)
+  ECase(ELFOSABI_STANDALONE)
+#undef ECase
+}
+
+void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
+                                                 ELFYAML::ELF_EF &Value) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+  assert(Object && "The IO context is not initialized");
+#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
+#define BCaseMask(X, M) IO.maskedBitSetCase(Value, #X, ELF::X, ELF::M);
+  switch (Object->Header.Machine) {
+  case ELF::EM_ARM:
+    BCase(EF_ARM_SOFT_FLOAT)
+    BCase(EF_ARM_VFP_FLOAT)
+    BCaseMask(EF_ARM_EABI_UNKNOWN, EF_ARM_EABIMASK)
+    BCaseMask(EF_ARM_EABI_VER1, EF_ARM_EABIMASK)
+    BCaseMask(EF_ARM_EABI_VER2, EF_ARM_EABIMASK)
+    BCaseMask(EF_ARM_EABI_VER3, EF_ARM_EABIMASK)
+    BCaseMask(EF_ARM_EABI_VER4, EF_ARM_EABIMASK)
+    BCaseMask(EF_ARM_EABI_VER5, EF_ARM_EABIMASK)
+    break;
+  case ELF::EM_MIPS:
+    BCase(EF_MIPS_NOREORDER)
+    BCase(EF_MIPS_PIC)
+    BCase(EF_MIPS_CPIC)
+    BCase(EF_MIPS_ABI2)
+    BCase(EF_MIPS_32BITMODE)
+    BCase(EF_MIPS_FP64)
+    BCase(EF_MIPS_NAN2008)
+    BCase(EF_MIPS_MICROMIPS)
+    BCase(EF_MIPS_ARCH_ASE_M16)
+    BCase(EF_MIPS_ARCH_ASE_MDMX)
+    BCaseMask(EF_MIPS_ABI_O32, EF_MIPS_ABI)
+    BCaseMask(EF_MIPS_ABI_O64, EF_MIPS_ABI)
+    BCaseMask(EF_MIPS_ABI_EABI32, EF_MIPS_ABI)
+    BCaseMask(EF_MIPS_ABI_EABI64, EF_MIPS_ABI)
+    BCaseMask(EF_MIPS_MACH_3900, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_4010, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_4100, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_4650, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_4120, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_4111, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_SB1, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_OCTEON, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_XLR, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_OCTEON2, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_OCTEON3, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_5400, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_5900, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_5500, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_9000, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_LS2E, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_LS2F, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_MACH_LS3A, EF_MIPS_MACH)
+    BCaseMask(EF_MIPS_ARCH_1, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_2, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_3, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_4, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_5, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_32, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_64, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_32R2, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_64R2, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_32R6, EF_MIPS_ARCH)
+    BCaseMask(EF_MIPS_ARCH_64R6, EF_MIPS_ARCH)
+    break;
+  case ELF::EM_HEXAGON:
+    BCase(EF_HEXAGON_MACH_V2)
+    BCase(EF_HEXAGON_MACH_V3)
+    BCase(EF_HEXAGON_MACH_V4)
+    BCase(EF_HEXAGON_MACH_V5)
+    BCase(EF_HEXAGON_ISA_V2)
+    BCase(EF_HEXAGON_ISA_V3)
+    BCase(EF_HEXAGON_ISA_V4)
+    BCase(EF_HEXAGON_ISA_V5)
+    break;
+  case ELF::EM_AVR:
+    BCase(EF_AVR_ARCH_AVR1)
+    BCase(EF_AVR_ARCH_AVR2)
+    BCase(EF_AVR_ARCH_AVR25)
+    BCase(EF_AVR_ARCH_AVR3)
+    BCase(EF_AVR_ARCH_AVR31)
+    BCase(EF_AVR_ARCH_AVR35)
+    BCase(EF_AVR_ARCH_AVR4)
+    BCase(EF_AVR_ARCH_AVR51)
+    BCase(EF_AVR_ARCH_AVR6)
+    BCase(EF_AVR_ARCH_AVRTINY)
+    BCase(EF_AVR_ARCH_XMEGA1)
+    BCase(EF_AVR_ARCH_XMEGA2)
+    BCase(EF_AVR_ARCH_XMEGA3)
+    BCase(EF_AVR_ARCH_XMEGA4)
+    BCase(EF_AVR_ARCH_XMEGA5)
+    BCase(EF_AVR_ARCH_XMEGA6)
+    BCase(EF_AVR_ARCH_XMEGA7)
+    break;
+  default:
+    llvm_unreachable("Unsupported architecture");
+  }
+#undef BCase
+#undef BCaseMask
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_SHT>::enumeration(
+    IO &IO, ELFYAML::ELF_SHT &Value) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+  assert(Object && "The IO context is not initialized");
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(SHT_NULL)
+  ECase(SHT_PROGBITS)
+  // No SHT_SYMTAB. Use the top-level `Symbols` key instead.
+  // FIXME: Issue a diagnostic with this information.
+  ECase(SHT_STRTAB)
+  ECase(SHT_RELA)
+  ECase(SHT_HASH)
+  ECase(SHT_DYNAMIC)
+  ECase(SHT_NOTE)
+  ECase(SHT_NOBITS)
+  ECase(SHT_REL)
+  ECase(SHT_SHLIB)
+  ECase(SHT_DYNSYM)
+  ECase(SHT_INIT_ARRAY)
+  ECase(SHT_FINI_ARRAY)
+  ECase(SHT_PREINIT_ARRAY)
+  ECase(SHT_GROUP)
+  ECase(SHT_SYMTAB_SHNDX)
+  ECase(SHT_LOOS)
+  ECase(SHT_GNU_ATTRIBUTES)
+  ECase(SHT_GNU_HASH)
+  ECase(SHT_GNU_verdef)
+  ECase(SHT_GNU_verneed)
+  ECase(SHT_GNU_versym)
+  ECase(SHT_HIOS)
+  ECase(SHT_LOPROC)
+  switch (Object->Header.Machine) {
+  case ELF::EM_ARM:
+    ECase(SHT_ARM_EXIDX)
+    ECase(SHT_ARM_PREEMPTMAP)
+    ECase(SHT_ARM_ATTRIBUTES)
+    ECase(SHT_ARM_DEBUGOVERLAY)
+    ECase(SHT_ARM_OVERLAYSECTION)
+    break;
+  case ELF::EM_HEXAGON:
+    ECase(SHT_HEX_ORDERED)
+    break;
+  case ELF::EM_X86_64:
+    ECase(SHT_X86_64_UNWIND)
+    break;
+  case ELF::EM_MIPS:
+    ECase(SHT_MIPS_REGINFO)
+    ECase(SHT_MIPS_OPTIONS)
+    ECase(SHT_MIPS_ABIFLAGS)
+    break;
+  default:
+    // Nothing to do.
+    break;
+  }
+#undef ECase
+}
+
+void ScalarBitSetTraits<ELFYAML::ELF_SHF>::bitset(IO &IO,
+                                                  ELFYAML::ELF_SHF &Value) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
+  BCase(SHF_WRITE)
+  BCase(SHF_ALLOC)
+  BCase(SHF_EXCLUDE)
+  BCase(SHF_EXECINSTR)
+  BCase(SHF_MERGE)
+  BCase(SHF_STRINGS)
+  BCase(SHF_INFO_LINK)
+  BCase(SHF_LINK_ORDER)
+  BCase(SHF_OS_NONCONFORMING)
+  BCase(SHF_GROUP)
+  BCase(SHF_TLS)
+  switch(Object->Header.Machine) {
+  case ELF::EM_AMDGPU:
+    BCase(SHF_AMDGPU_HSA_GLOBAL)
+    BCase(SHF_AMDGPU_HSA_READONLY)
+    BCase(SHF_AMDGPU_HSA_CODE)
+    BCase(SHF_AMDGPU_HSA_AGENT)
+    break;
+  default:
+    // Nothing to do.
+    break;
+  }
+#undef BCase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_STT>::enumeration(
+    IO &IO, ELFYAML::ELF_STT &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(STT_NOTYPE)
+  ECase(STT_OBJECT)
+  ECase(STT_FUNC)
+  ECase(STT_SECTION)
+  ECase(STT_FILE)
+  ECase(STT_COMMON)
+  ECase(STT_TLS)
+  ECase(STT_GNU_IFUNC)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_STV>::enumeration(
+    IO &IO, ELFYAML::ELF_STV &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(STV_DEFAULT)
+  ECase(STV_INTERNAL)
+  ECase(STV_HIDDEN)
+  ECase(STV_PROTECTED)
+#undef ECase
+}
+
+void ScalarBitSetTraits<ELFYAML::ELF_STO>::bitset(IO &IO,
+                                                  ELFYAML::ELF_STO &Value) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+  assert(Object && "The IO context is not initialized");
+#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
+  switch (Object->Header.Machine) {
+  case ELF::EM_MIPS:
+    BCase(STO_MIPS_OPTIONAL)
+    BCase(STO_MIPS_PLT)
+    BCase(STO_MIPS_PIC)
+    BCase(STO_MIPS_MICROMIPS)
+    break;
+  default:
+    break; // Nothing to do
+  }
+#undef BCase
+#undef BCaseMask
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_RSS>::enumeration(
+    IO &IO, ELFYAML::ELF_RSS &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+  ECase(RSS_UNDEF)
+  ECase(RSS_GP)
+  ECase(RSS_GP0)
+  ECase(RSS_LOC)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_REL>::enumeration(
+    IO &IO, ELFYAML::ELF_REL &Value) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+  assert(Object && "The IO context is not initialized");
+#define ELF_RELOC(X, Y) IO.enumCase(Value, #X, ELF::X);
+  switch (Object->Header.Machine) {
+  case ELF::EM_X86_64:
+#include "llvm/Support/ELFRelocs/x86_64.def"
+    break;
+  case ELF::EM_MIPS:
+#include "llvm/Support/ELFRelocs/Mips.def"
+    break;
+  case ELF::EM_HEXAGON:
+#include "llvm/Support/ELFRelocs/Hexagon.def"
+    break;
+  case ELF::EM_386:
+  case ELF::EM_IAMCU:
+#include "llvm/Support/ELFRelocs/i386.def"
+    break;
+  case ELF::EM_AARCH64:
+#include "llvm/Support/ELFRelocs/AArch64.def"
+    break;
+  case ELF::EM_ARM:
+#include "llvm/Support/ELFRelocs/ARM.def"
+    break;
+  default:
+    llvm_unreachable("Unsupported architecture");
+  }
+#undef ELF_RELOC
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_REG>::enumeration(
+    IO &IO, ELFYAML::MIPS_AFL_REG &Value) {
+#define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X);
+  ECase(REG_NONE)
+  ECase(REG_32)
+  ECase(REG_64)
+  ECase(REG_128)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_ABI_FP>::enumeration(
+    IO &IO, ELFYAML::MIPS_ABI_FP &Value) {
+#define ECase(X) IO.enumCase(Value, #X, Mips::Val_GNU_MIPS_ABI_##X);
+  ECase(FP_ANY)
+  ECase(FP_DOUBLE)
+  ECase(FP_SINGLE)
+  ECase(FP_SOFT)
+  ECase(FP_OLD_64)
+  ECase(FP_XX)
+  ECase(FP_64)
+  ECase(FP_64A)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_EXT>::enumeration(
+    IO &IO, ELFYAML::MIPS_AFL_EXT &Value) {
+#define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X);
+  ECase(EXT_NONE)
+  ECase(EXT_XLR)
+  ECase(EXT_OCTEON2)
+  ECase(EXT_OCTEONP)
+  ECase(EXT_LOONGSON_3A)
+  ECase(EXT_OCTEON)
+  ECase(EXT_5900)
+  ECase(EXT_4650)
+  ECase(EXT_4010)
+  ECase(EXT_4100)
+  ECase(EXT_3900)
+  ECase(EXT_10000)
+  ECase(EXT_SB1)
+  ECase(EXT_4111)
+  ECase(EXT_4120)
+  ECase(EXT_5400)
+  ECase(EXT_5500)
+  ECase(EXT_LOONGSON_2E)
+  ECase(EXT_LOONGSON_2F)
+  ECase(EXT_OCTEON3)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_ISA>::enumeration(
+    IO &IO, ELFYAML::MIPS_ISA &Value) {
+  IO.enumCase(Value, "MIPS1", 1);
+  IO.enumCase(Value, "MIPS2", 2);
+  IO.enumCase(Value, "MIPS3", 3);
+  IO.enumCase(Value, "MIPS4", 4);
+  IO.enumCase(Value, "MIPS5", 5);
+  IO.enumCase(Value, "MIPS32", 32);
+  IO.enumCase(Value, "MIPS64", 64);
+}
+
+void ScalarBitSetTraits<ELFYAML::MIPS_AFL_ASE>::bitset(
+    IO &IO, ELFYAML::MIPS_AFL_ASE &Value) {
+#define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_ASE_##X);
+  BCase(DSP)
+  BCase(DSPR2)
+  BCase(EVA)
+  BCase(MCU)
+  BCase(MDMX)
+  BCase(MIPS3D)
+  BCase(MT)
+  BCase(SMARTMIPS)
+  BCase(VIRT)
+  BCase(MSA)
+  BCase(MIPS16)
+  BCase(MICROMIPS)
+  BCase(XPA)
+#undef BCase
+}
+
+void ScalarBitSetTraits<ELFYAML::MIPS_AFL_FLAGS1>::bitset(
+    IO &IO, ELFYAML::MIPS_AFL_FLAGS1 &Value) {
+#define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_FLAGS1_##X);
+  BCase(ODDSPREG)
+#undef BCase
+}
+
+void MappingTraits<ELFYAML::FileHeader>::mapping(IO &IO,
+                                                 ELFYAML::FileHeader &FileHdr) {
+  IO.mapRequired("Class", FileHdr.Class);
+  IO.mapRequired("Data", FileHdr.Data);
+  IO.mapOptional("OSABI", FileHdr.OSABI, ELFYAML::ELF_ELFOSABI(0));
+  IO.mapRequired("Type", FileHdr.Type);
+  IO.mapRequired("Machine", FileHdr.Machine);
+  IO.mapOptional("Flags", FileHdr.Flags, ELFYAML::ELF_EF(0));
+  IO.mapOptional("Entry", FileHdr.Entry, Hex64(0));
+}
+
+namespace {
+struct NormalizedOther {
+  NormalizedOther(IO &)
+      : Visibility(ELFYAML::ELF_STV(0)), Other(ELFYAML::ELF_STO(0)) {}
+  NormalizedOther(IO &, uint8_t Original)
+      : Visibility(Original & 0x3), Other(Original & ~0x3) {}
+
+  uint8_t denormalize(IO &) { return Visibility | Other; }
+
+  ELFYAML::ELF_STV Visibility;
+  ELFYAML::ELF_STO Other;
+};
+}
+
+void MappingTraits<ELFYAML::Symbol>::mapping(IO &IO, ELFYAML::Symbol &Symbol) {
+  IO.mapOptional("Name", Symbol.Name, StringRef());
+  IO.mapOptional("Type", Symbol.Type, ELFYAML::ELF_STT(0));
+  IO.mapOptional("Section", Symbol.Section, StringRef());
+  IO.mapOptional("Value", Symbol.Value, Hex64(0));
+  IO.mapOptional("Size", Symbol.Size, Hex64(0));
+
+  MappingNormalization<NormalizedOther, uint8_t> Keys(IO, Symbol.Other);
+  IO.mapOptional("Visibility", Keys->Visibility, ELFYAML::ELF_STV(0));
+  IO.mapOptional("Other", Keys->Other, ELFYAML::ELF_STO(0));
+}
+
+void MappingTraits<ELFYAML::LocalGlobalWeakSymbols>::mapping(
+    IO &IO, ELFYAML::LocalGlobalWeakSymbols &Symbols) {
+  IO.mapOptional("Local", Symbols.Local);
+  IO.mapOptional("Global", Symbols.Global);
+  IO.mapOptional("Weak", Symbols.Weak);
+}
+
+static void commonSectionMapping(IO &IO, ELFYAML::Section &Section) {
+  IO.mapOptional("Name", Section.Name, StringRef());
+  IO.mapRequired("Type", Section.Type);
+  IO.mapOptional("Flags", Section.Flags, ELFYAML::ELF_SHF(0));
+  IO.mapOptional("Address", Section.Address, Hex64(0));
+  IO.mapOptional("Link", Section.Link, StringRef());
+  IO.mapOptional("AddressAlign", Section.AddressAlign, Hex64(0));
+  IO.mapOptional("Info", Section.Info, StringRef());
+}
+
+static void sectionMapping(IO &IO, ELFYAML::RawContentSection &Section) {
+  commonSectionMapping(IO, Section);
+  IO.mapOptional("Content", Section.Content);
+  IO.mapOptional("Size", Section.Size, Hex64(Section.Content.binary_size()));
+}
+
+static void sectionMapping(IO &IO, ELFYAML::NoBitsSection &Section) {
+  commonSectionMapping(IO, Section);
+  IO.mapOptional("Size", Section.Size, Hex64(0));
+}
+
+static void sectionMapping(IO &IO, ELFYAML::RelocationSection &Section) {
+  commonSectionMapping(IO, Section);
+  IO.mapOptional("Relocations", Section.Relocations);
+}
+
+static void groupSectionMapping(IO &IO, ELFYAML::Group &group) {
+  commonSectionMapping(IO, group);
+  IO.mapRequired("Members", group.Members);
+}
+
+void MappingTraits<ELFYAML::SectionOrType>::mapping(
+    IO &IO, ELFYAML::SectionOrType &sectionOrType) {
+  IO.mapRequired("SectionOrType", sectionOrType.sectionNameOrType);
+}
+
+static void sectionMapping(IO &IO, ELFYAML::MipsABIFlags &Section) {
+  commonSectionMapping(IO, Section);
+  IO.mapOptional("Version", Section.Version, Hex16(0));
+  IO.mapRequired("ISA", Section.ISALevel);
+  IO.mapOptional("ISARevision", Section.ISARevision, Hex8(0));
+  IO.mapOptional("ISAExtension", Section.ISAExtension,
+                 ELFYAML::MIPS_AFL_EXT(Mips::AFL_EXT_NONE));
+  IO.mapOptional("ASEs", Section.ASEs, ELFYAML::MIPS_AFL_ASE(0));
+  IO.mapOptional("FpABI", Section.FpABI,
+                 ELFYAML::MIPS_ABI_FP(Mips::Val_GNU_MIPS_ABI_FP_ANY));
+  IO.mapOptional("GPRSize", Section.GPRSize,
+                 ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE));
+  IO.mapOptional("CPR1Size", Section.CPR1Size,
+                 ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE));
+  IO.mapOptional("CPR2Size", Section.CPR2Size,
+                 ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE));
+  IO.mapOptional("Flags1", Section.Flags1, ELFYAML::MIPS_AFL_FLAGS1(0));
+  IO.mapOptional("Flags2", Section.Flags2, Hex32(0));
+}
+
+void MappingTraits<std::unique_ptr<ELFYAML::Section>>::mapping(
+    IO &IO, std::unique_ptr<ELFYAML::Section> &Section) {
+  ELFYAML::ELF_SHT sectionType;
+  if (IO.outputting())
+    sectionType = Section->Type;
+  else
+    IO.mapRequired("Type", sectionType);
+
+  switch (sectionType) {
+  case ELF::SHT_REL:
+  case ELF::SHT_RELA:
+    if (!IO.outputting())
+      Section.reset(new ELFYAML::RelocationSection());
+    sectionMapping(IO, *cast<ELFYAML::RelocationSection>(Section.get()));
+    break;
+  case ELF::SHT_GROUP:
+    if (!IO.outputting())
+      Section.reset(new ELFYAML::Group());
+    groupSectionMapping(IO, *cast<ELFYAML::Group>(Section.get()));
+    break;
+  case ELF::SHT_NOBITS:
+    if (!IO.outputting())
+      Section.reset(new ELFYAML::NoBitsSection());
+    sectionMapping(IO, *cast<ELFYAML::NoBitsSection>(Section.get()));
+    break;
+  case ELF::SHT_MIPS_ABIFLAGS:
+    if (!IO.outputting())
+      Section.reset(new ELFYAML::MipsABIFlags());
+    sectionMapping(IO, *cast<ELFYAML::MipsABIFlags>(Section.get()));
+    break;
+  default:
+    if (!IO.outputting())
+      Section.reset(new ELFYAML::RawContentSection());
+    sectionMapping(IO, *cast<ELFYAML::RawContentSection>(Section.get()));
+  }
+}
+
+StringRef MappingTraits<std::unique_ptr<ELFYAML::Section>>::validate(
+    IO &io, std::unique_ptr<ELFYAML::Section> &Section) {
+  const auto *RawSection = dyn_cast<ELFYAML::RawContentSection>(Section.get());
+  if (!RawSection || RawSection->Size >= RawSection->Content.binary_size())
+    return StringRef();
+  return "Section size must be greater or equal to the content size";
+}
+
+namespace {
+struct NormalizedMips64RelType {
+  NormalizedMips64RelType(IO &)
+      : Type(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)),
+        Type2(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)),
+        Type3(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)),
+        SpecSym(ELFYAML::ELF_REL(ELF::RSS_UNDEF)) {}
+  NormalizedMips64RelType(IO &, ELFYAML::ELF_REL Original)
+      : Type(Original & 0xFF), Type2(Original >> 8 & 0xFF),
+        Type3(Original >> 16 & 0xFF), SpecSym(Original >> 24 & 0xFF) {}
+
+  ELFYAML::ELF_REL denormalize(IO &) {
+    ELFYAML::ELF_REL Res = Type | Type2 << 8 | Type3 << 16 | SpecSym << 24;
+    return Res;
+  }
+
+  ELFYAML::ELF_REL Type;
+  ELFYAML::ELF_REL Type2;
+  ELFYAML::ELF_REL Type3;
+  ELFYAML::ELF_RSS SpecSym;
+};
+}
+
+void MappingTraits<ELFYAML::Relocation>::mapping(IO &IO,
+                                                 ELFYAML::Relocation &Rel) {
+  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+  assert(Object && "The IO context is not initialized");
+
+  IO.mapRequired("Offset", Rel.Offset);
+  IO.mapRequired("Symbol", Rel.Symbol);
+
+  if (Object->Header.Machine == ELFYAML::ELF_EM(ELF::EM_MIPS) &&
+      Object->Header.Class == ELFYAML::ELF_ELFCLASS(ELF::ELFCLASS64)) {
+    MappingNormalization<NormalizedMips64RelType, ELFYAML::ELF_REL> Key(
+        IO, Rel.Type);
+    IO.mapRequired("Type", Key->Type);
+    IO.mapOptional("Type2", Key->Type2, ELFYAML::ELF_REL(ELF::R_MIPS_NONE));
+    IO.mapOptional("Type3", Key->Type3, ELFYAML::ELF_REL(ELF::R_MIPS_NONE));
+    IO.mapOptional("SpecSym", Key->SpecSym, ELFYAML::ELF_RSS(ELF::RSS_UNDEF));
+  } else
+    IO.mapRequired("Type", Rel.Type);
+
+  IO.mapOptional("Addend", Rel.Addend, (int64_t)0);
+}
+
+void MappingTraits<ELFYAML::Object>::mapping(IO &IO, ELFYAML::Object &Object) {
+  assert(!IO.getContext() && "The IO context is initialized already");
+  IO.setContext(&Object);
+  IO.mapRequired("FileHeader", Object.Header);
+  IO.mapOptional("Sections", Object.Sections);
+  IO.mapOptional("Symbols", Object.Symbols);
+  IO.setContext(nullptr);
+}
+
+LLVM_YAML_STRONG_TYPEDEF(uint8_t, MIPS_AFL_REG)
+LLVM_YAML_STRONG_TYPEDEF(uint8_t, MIPS_ABI_FP)
+LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_EXT)
+LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_ASE)
+LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_FLAGS1)
+
+} // end namespace yaml
+} // end namespace llvm
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+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -S --sr --sd | FileCheck %s
+
+f1:
+        .cfi_startproc
+	.cfi_lsda 0x3, bar
+        nop
+        .cfi_endproc
+
+f2:
+        .cfi_startproc
+        .cfi_personality 0x00, foo
+	.cfi_lsda 0x3, bar
+        nop
+        .cfi_endproc
+
+f3:
+        .cfi_startproc
+	.cfi_lsda 0x3, bar
+        nop
+        .cfi_endproc
+
+f4:
+        .cfi_startproc
+        .cfi_personality 0x00, foo
+	.cfi_lsda 0x2, bar
+        nop
+        .cfi_endproc
+
+f5:
+        .cfi_startproc
+        .cfi_personality 0x02, foo
+        nop
+        .cfi_endproc
+
+f6:
+        .cfi_startproc
+        .cfi_personality 0x03, foo
+        nop
+        .cfi_endproc
+
+f7:
+        .cfi_startproc
+        .cfi_personality 0x04, foo
+        nop
+        .cfi_endproc
+
+f8:
+        .cfi_startproc
+        .cfi_personality 0x0a, foo
+        nop
+        .cfi_endproc
+
+f9:
+        .cfi_startproc
+        .cfi_personality 0x0b, foo
+        nop
+        .cfi_endproc
+
+f10:
+        .cfi_startproc
+        .cfi_personality 0x0c, foo
+        nop
+        .cfi_endproc
+
+f11:
+        .cfi_startproc
+        .cfi_personality 0x08, foo
+        nop
+        .cfi_endproc
+
+f12:
+        .cfi_startproc
+        .cfi_personality 0x10, foo
+        nop
+        .cfi_endproc
+
+f13:
+        .cfi_startproc
+        .cfi_personality 0x12, foo
+        nop
+        .cfi_endproc
+
+f14:
+        .cfi_startproc
+        .cfi_personality 0x13, foo
+        nop
+        .cfi_endproc
+
+f15:
+        .cfi_startproc
+        .cfi_personality 0x14, foo
+        nop
+        .cfi_endproc
+
+f16:
+        .cfi_startproc
+        .cfi_personality 0x1a, foo
+        nop
+        .cfi_endproc
+
+f17:
+        .cfi_startproc
+        .cfi_personality 0x1b, foo
+        nop
+        .cfi_endproc
+
+f18:
+        .cfi_startproc
+        .cfi_personality 0x1c, foo
+        nop
+        .cfi_endproc
+
+f19:
+        .cfi_startproc
+        .cfi_personality 0x18, foo
+        nop
+        .cfi_endproc
+
+f20:
+        .cfi_startproc
+        .cfi_personality 0x80, foo
+        nop
+        .cfi_endproc
+
+f21:
+        .cfi_startproc
+        .cfi_personality 0x82, foo
+        nop
+        .cfi_endproc
+
+f22:
+        .cfi_startproc
+        .cfi_personality 0x83, foo
+        nop
+        .cfi_endproc
+
+f23:
+        .cfi_startproc
+        .cfi_personality 0x84, foo
+        nop
+        .cfi_endproc
+
+f24:
+        .cfi_startproc
+        .cfi_personality 0x8a, foo
+        nop
+        .cfi_endproc
+
+f25:
+        .cfi_startproc
+        .cfi_personality 0x8b, foo
+        nop
+        .cfi_endproc
+
+f26:
+        .cfi_startproc
+        .cfi_personality 0x8c, foo
+        nop
+        .cfi_endproc
+
+f27:
+        .cfi_startproc
+        .cfi_personality 0x88, foo
+        nop
+        .cfi_endproc
+
+f28:
+        .cfi_startproc
+        .cfi_personality 0x90, foo
+        nop
+        .cfi_endproc
+
+f29:
+        .cfi_startproc
+        .cfi_personality 0x92, foo
+        nop
+        .cfi_endproc
+
+f30:
+        .cfi_startproc
+        .cfi_personality 0x93, foo
+        nop
+        .cfi_endproc
+
+f31:
+        .cfi_startproc
+        .cfi_personality 0x94, foo
+        nop
+        .cfi_endproc
+
+f32:
+        .cfi_startproc
+        .cfi_personality 0x9a, foo
+        nop
+        .cfi_endproc
+
+f33:
+        .cfi_startproc
+        .cfi_personality 0x9b, foo
+        nop
+        .cfi_endproc
+
+f34:
+        .cfi_startproc
+        .cfi_personality 0x9c, foo
+        nop
+        .cfi_endproc
+
+f36:
+        .cfi_startproc
+        .cfi_personality 0x98, foo
+        nop
+        .cfi_endproc
+
+f37:
+        .cfi_startproc simple
+        nop
+        .cfi_endproc
+
+// CHECK:        Section {
+// CHECK:          Index:
+// CHECK:          Name: .eh_frame
+// CHECK-NEXT:     Type: SHT_X86_64_UNWIND
+// CHECK-NEXT:     Flags [
+// CHECK-NEXT:       SHF_ALLOC
+// CHECK-NEXT:     ]
+// CHECK-NEXT:     Address: 0x0
+// CHECK-NEXT:     Offset: 0x68
+// CHECK-NEXT:     Size: 1776
+// CHECK-NEXT:     Link: 0
+// CHECK-NEXT:     Info: 0
+// CHECK-NEXT:     AddressAlignment: 8
+// CHECK-NEXT:     EntrySize: 0
+// CHECK-NEXT:     Relocations [
+// CHECK-NEXT:     ]
+// CHECK-NEXT:     SectionData (
+// CHECK-NEXT:       0000: 10000000 00000000 017A5200 01781001  |.........zR..x..|
+// CHECK-NEXT:       0010: 1B000000 10000000 18000000 00000000  |................|
+// CHECK-NEXT:       0020: 01000000 00000000 14000000 00000000  |................|
+// CHECK-NEXT:       0030: 017A4C52 00017810 02031B0C 07089001  |.zLR..x.........|
+// CHECK-NEXT:       0040: 14000000 1C000000 00000000 01000000  |................|
+// CHECK-NEXT:       0050: 04000000 00000000 14000000 34000000  |............4...|
+// CHECK-NEXT:       0060: 00000000 01000000 04000000 00000000  |................|
+// CHECK-NEXT:       0070: 20000000 00000000 017A504C 52000178  | ........zPLR..x|
+// CHECK-NEXT:       0080: 100B0000 00000000 00000002 1B0C0708  |................|
+// CHECK-NEXT:       0090: 90010000 10000000 28000000 00000000  |........(.......|
+// CHECK-NEXT:       00A0: 01000000 02000000 20000000 00000000  |........ .......|
+// CHECK-NEXT:       00B0: 017A504C 52000178 100B0000 00000000  |.zPLR..x........|
+// CHECK-NEXT:       00C0: 00000003 1B0C0708 90010000 14000000  |................|
+// CHECK-NEXT:       00D0: 28000000 00000000 01000000 04000000  |(...............|
+// CHECK-NEXT:       00E0: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       00F0: 00017810 04020000 1B0C0708 90010000  |..x.............|
+// CHECK-NEXT:       0100: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       0110: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0120: 00017810 06030000 00001B0C 07089001  |..x.............|
+// CHECK-NEXT:       0130: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       0140: 00000000 1C000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0150: 00017810 0A040000 00000000 00001B0C  |..x.............|
+// CHECK-NEXT:       0160: 07089001 10000000 24000000 00000000  |........$.......|
+// CHECK-NEXT:       0170: 01000000 00000000 1C000000 00000000  |................|
+// CHECK-NEXT:       0180: 017A5052 00017810 0A080000 00000000  |.zPR..x.........|
+// CHECK-NEXT:       0190: 00001B0C 07089001 10000000 24000000  |............$...|
+// CHECK-NEXT:       01A0: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       01B0: 00000000 017A5052 00017810 040A0000  |.....zPR..x.....|
+// CHECK-NEXT:       01C0: 1B0C0708 90010000 10000000 20000000  |............ ...|
+// CHECK-NEXT:       01D0: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       01E0: 00000000 017A5052 00017810 060B0000  |.....zPR..x.....|
+// CHECK-NEXT:       01F0: 00001B0C 07089001 10000000 20000000  |............ ...|
+// CHECK-NEXT:       0200: 00000000 01000000 00000000 1C000000  |................|
+// CHECK-NEXT:       0210: 00000000 017A5052 00017810 0A0C0000  |.....zPR..x.....|
+// CHECK-NEXT:       0220: 00000000 00001B0C 07089001 10000000  |................|
+// CHECK-NEXT:       0230: 24000000 00000000 01000000 00000000  |$...............|
+// CHECK-NEXT:       0240: 1C000000 00000000 017A5052 00017810  |.........zPR..x.|
+// CHECK-NEXT:       0250: 0A100000 00000000 00001B0C 07089001  |................|
+// CHECK-NEXT:       0260: 10000000 24000000 00000000 01000000  |....$...........|
+// CHECK-NEXT:       0270: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0280: 00017810 04120000 1B0C0708 90010000  |..x.............|
+// CHECK-NEXT:       0290: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       02A0: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       02B0: 00017810 06130000 00001B0C 07089001  |..x.............|
+// CHECK-NEXT:       02C0: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       02D0: 00000000 1C000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       02E0: 00017810 0A140000 00000000 00001B0C  |..x.............|
+// CHECK-NEXT:       02F0: 07089001 10000000 24000000 00000000  |........$.......|
+// CHECK-NEXT:       0300: 01000000 00000000 1C000000 00000000  |................|
+// CHECK-NEXT:       0310: 017A5052 00017810 0A180000 00000000  |.zPR..x.........|
+// CHECK-NEXT:       0320: 00001B0C 07089001 10000000 24000000  |............$...|
+// CHECK-NEXT:       0330: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       0340: 00000000 017A5052 00017810 041A0000  |.....zPR..x.....|
+// CHECK-NEXT:       0350: 1B0C0708 90010000 10000000 20000000  |............ ...|
+// CHECK-NEXT:       0360: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       0370: 00000000 017A5052 00017810 061B0000  |.....zPR..x.....|
+// CHECK-NEXT:       0380: 00001B0C 07089001 10000000 20000000  |............ ...|
+// CHECK-NEXT:       0390: 00000000 01000000 00000000 1C000000  |................|
+// CHECK-NEXT:       03A0: 00000000 017A5052 00017810 0A1C0000  |.....zPR..x.....|
+// CHECK-NEXT:       03B0: 00000000 00001B0C 07089001 10000000  |................|
+// CHECK-NEXT:       03C0: 24000000 00000000 01000000 00000000  |$...............|
+// CHECK-NEXT:       03D0: 1C000000 00000000 017A5052 00017810  |.........zPR..x.|
+// CHECK-NEXT:       03E0: 0A800000 00000000 00001B0C 07089001  |................|
+// CHECK-NEXT:       03F0: 10000000 24000000 00000000 01000000  |....$...........|
+// CHECK-NEXT:       0400: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0410: 00017810 04820000 1B0C0708 90010000  |..x.............|
+// CHECK-NEXT:       0420: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       0430: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0440: 00017810 06830000 00001B0C 07089001  |..x.............|
+// CHECK-NEXT:       0450: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       0460: 00000000 1C000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0470: 00017810 0A840000 00000000 00001B0C  |..x.............|
+// CHECK-NEXT:       0480: 07089001 10000000 24000000 00000000  |........$.......|
+// CHECK-NEXT:       0490: 01000000 00000000 1C000000 00000000  |................|
+// CHECK-NEXT:       04A0: 017A5052 00017810 0A880000 00000000  |.zPR..x.........|
+// CHECK-NEXT:       04B0: 00001B0C 07089001 10000000 24000000  |............$...|
+// CHECK-NEXT:       04C0: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       04D0: 00000000 017A5052 00017810 048A0000  |.....zPR..x.....|
+// CHECK-NEXT:       04E0: 1B0C0708 90010000 10000000 20000000  |............ ...|
+// CHECK-NEXT:       04F0: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       0500: 00000000 017A5052 00017810 068B0000  |.....zPR..x.....|
+// CHECK-NEXT:       0510: 00001B0C 07089001 10000000 20000000  |............ ...|
+// CHECK-NEXT:       0520: 00000000 01000000 00000000 1C000000  |................|
+// CHECK-NEXT:       0530: 00000000 017A5052 00017810 0A8C0000  |.....zPR..x.....|
+// CHECK-NEXT:       0540: 00000000 00001B0C 07089001 10000000  |................|
+// CHECK-NEXT:       0550: 24000000 00000000 01000000 00000000  |$...............|
+// CHECK-NEXT:       0560: 1C000000 00000000 017A5052 00017810  |.........zPR..x.|
+// CHECK-NEXT:       0570: 0A900000 00000000 00001B0C 07089001  |................|
+// CHECK-NEXT:       0580: 10000000 24000000 00000000 01000000  |....$...........|
+// CHECK-NEXT:       0590: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       05A0: 00017810 04920000 1B0C0708 90010000  |..x.............|
+// CHECK-NEXT:       05B0: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       05C0: 00000000 18000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       05D0: 00017810 06930000 00001B0C 07089001  |..x.............|
+// CHECK-NEXT:       05E0: 10000000 20000000 00000000 01000000  |.... ...........|
+// CHECK-NEXT:       05F0: 00000000 1C000000 00000000 017A5052  |.............zPR|
+// CHECK-NEXT:       0600: 00017810 0A940000 00000000 00001B0C  |..x.............|
+// CHECK-NEXT:       0610: 07089001 10000000 24000000 00000000  |........$.......|
+// CHECK-NEXT:       0620: 01000000 00000000 1C000000 00000000  |................|
+// CHECK-NEXT:       0630: 017A5052 00017810 0A980000 00000000  |.zPR..x.........|
+// CHECK-NEXT:       0640: 00001B0C 07089001 10000000 24000000  |............$...|
+// CHECK-NEXT:       0650: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       0660: 00000000 017A5052 00017810 049A0000  |.....zPR..x.....|
+// CHECK-NEXT:       0670: 1B0C0708 90010000 10000000 20000000  |............ ...|
+// CHECK-NEXT:       0680: 00000000 01000000 00000000 18000000  |................|
+// CHECK-NEXT:       0690: 00000000 017A5052 00017810 069B0000  |.....zPR..x.....|
+// CHECK-NEXT:       06A0: 00001B0C 07089001 10000000 20000000  |............ ...|
+// CHECK-NEXT:       06B0: 00000000 01000000 00000000 1C000000  |................|
+// CHECK-NEXT:       06C0: 00000000 017A5052 00017810 0A9C0000  |.....zPR..x.....|
+// CHECK-NEXT:       06D0: 00000000 00001B0C 07089001 10000000  |................|
+// CHECK-NEXT:       06E0: 24000000 00000000 01000000 00000000  |$...............|
+
+// CHECK:        Section {
+// CHECK:          Index:
+// CHECK:          Name: .rela.eh_frame
+// CHECK-NEXT:     Type: SHT_RELA
+// CHECK-NEXT:     Flags [
+// CHECK-NEXT:     ]
+// CHECK-NEXT:     Address: 0x0
+// CHECK-NEXT:     Offset:
+// CHECK-NEXT:     Size: 1752
+// CHECK-NEXT:     Link:
+// CHECK-NEXT:     Info:
+// CHECK-NEXT:     AddressAlignment: 8
+// CHECK-NEXT:     EntrySize: 24
+// CHECK-NEXT:     Relocations [
+// CHECK-NEXT:       0x1C R_X86_64_PC32 .text 0x23
+// CHECK-NEXT:       0x48 R_X86_64_PC32 .text 0x0
+// CHECK-NEXT:       0x51 R_X86_64_32 bar 0x0
+// CHECK-NEXT:       0x60 R_X86_64_PC32 .text 0x2
+// CHECK-NEXT:       0x69 R_X86_64_32 bar 0x0
+// CHECK-NEXT:       0x83 R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x9C R_X86_64_PC32 .text 0x3
+// CHECK-NEXT:       0xA5 R_X86_64_16 bar 0x0
+// CHECK-NEXT:       0xBB R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0xD4 R_X86_64_PC32 .text 0x1
+// CHECK-NEXT:       0xDD R_X86_64_32 bar 0x0
+// CHECK-NEXT:       0xF6 R_X86_64_16 foo 0x0
+// CHECK-NEXT:       0x108 R_X86_64_PC32 .text 0x4
+// CHECK-NEXT:       0x126 R_X86_64_32 foo 0x0
+// CHECK-NEXT:       0x138 R_X86_64_PC32 .text 0x5
+// CHECK-NEXT:       0x156 R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x16C R_X86_64_PC32 .text 0x6
+// CHECK-NEXT:       0x18A R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x1A0 R_X86_64_PC32 .text 0xA
+// CHECK-NEXT:       0x1BE R_X86_64_16 foo 0x0
+// CHECK-NEXT:       0x1D0 R_X86_64_PC32 .text 0x7
+// CHECK-NEXT:       0x1EE R_X86_64_32 foo 0x0
+// CHECK-NEXT:       0x200 R_X86_64_PC32 .text 0x8
+// CHECK-NEXT:       0x21E R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x234 R_X86_64_PC32 .text 0x9
+// CHECK-NEXT:       0x252 R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x268 R_X86_64_PC32 .text 0xB
+// CHECK-NEXT:       0x286 R_X86_64_PC16 foo 0x0
+// CHECK-NEXT:       0x298 R_X86_64_PC32 .text 0xC
+// CHECK-NEXT:       0x2B6 R_X86_64_PC32 foo 0x0
+// CHECK-NEXT:       0x2C8 R_X86_64_PC32 .text 0xD
+// CHECK-NEXT:       0x2E6 R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x2FC R_X86_64_PC32 .text 0xE
+// CHECK-NEXT:       0x31A R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x330 R_X86_64_PC32 .text 0x12
+// CHECK-NEXT:       0x34E R_X86_64_PC16 foo 0x0
+// CHECK-NEXT:       0x360 R_X86_64_PC32 .text 0xF
+// CHECK-NEXT:       0x37E R_X86_64_PC32 foo 0x0
+// CHECK-NEXT:       0x390 R_X86_64_PC32 .text 0x10
+// CHECK-NEXT:       0x3AE R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x3C4 R_X86_64_PC32 .text 0x11
+// CHECK-NEXT:       0x3E2 R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x3F8 R_X86_64_PC32 .text 0x13
+// CHECK-NEXT:       0x416 R_X86_64_16 foo 0x0
+// CHECK-NEXT:       0x428 R_X86_64_PC32 .text 0x14
+// CHECK-NEXT:       0x446 R_X86_64_32 foo 0x0
+// CHECK-NEXT:       0x458 R_X86_64_PC32 .text 0x15
+// CHECK-NEXT:       0x476 R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x48C R_X86_64_PC32 .text 0x16
+// CHECK-NEXT:       0x4AA R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x4C0 R_X86_64_PC32 .text 0x1A
+// CHECK-NEXT:       0x4DE R_X86_64_16 foo 0x0
+// CHECK-NEXT:       0x4F0 R_X86_64_PC32 .text 0x17
+// CHECK-NEXT:       0x50E R_X86_64_32 foo 0x0
+// CHECK-NEXT:       0x520 R_X86_64_PC32 .text 0x18
+// CHECK-NEXT:       0x53E R_X86_64_64 foo 0x0
+// CHECK-NEXT:       0x554 R_X86_64_PC32 .text 0x19
+// CHECK-NEXT:       0x572 R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x588 R_X86_64_PC32 .text 0x1B
+// CHECK-NEXT:       0x5A6 R_X86_64_PC16 foo 0x0
+// CHECK-NEXT:       0x5B8 R_X86_64_PC32 .text 0x1C
+// CHECK-NEXT:       0x5D6 R_X86_64_PC32 foo 0x0
+// CHECK-NEXT:       0x5E8 R_X86_64_PC32 .text 0x1D
+// CHECK-NEXT:       0x606 R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x61C R_X86_64_PC32 .text 0x1E
+// CHECK-NEXT:       0x63A R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x650 R_X86_64_PC32 .text 0x22
+// CHECK-NEXT:       0x66E R_X86_64_PC16 foo 0x0
+// CHECK-NEXT:       0x680 R_X86_64_PC32 .text 0x1F
+// CHECK-NEXT:       0x69E R_X86_64_PC32 foo 0x0
+// CHECK-NEXT:       0x6B0 R_X86_64_PC32 .text 0x20
+// CHECK-NEXT:       0x6CE R_X86_64_PC64 foo 0x0
+// CHECK-NEXT:       0x6E4 R_X86_64_PC32 .text 0x21
+// CHECK-NEXT:     ]
+// CHECK:        }
diff --git a/0fa119de65b39125f024469c8eea0d0ed2f1d578d0226a8b91d30aefded6d076 b/0fa119de65b39125f024469c8eea0d0ed2f1d578d0226a8b91d30aefded6d076
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diff --git a/0fb6f08e931e02fbf010249249bceba7856c23da44a4e2e75d128213240e0bd3 b/0fb6f08e931e02fbf010249249bceba7856c23da44a4e2e75d128213240e0bd3
new file mode 100644
index 0000000000000000000000000000000000000000..8f4831c48c36c94f9db5a2c5d625589ba5368f24
--- /dev/null
+++ b/0fb6f08e931e02fbf010249249bceba7856c23da44a4e2e75d128213240e0bd3
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:0fb6f08e931e02fbf010249249bceba7856c23da44a4e2e75d128213240e0bd3
+size 635088
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--- /dev/null
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@@ -0,0 +1,3 @@
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@@ -0,0 +1,4 @@
+set -o pipefail
+'llvm-mc' '-filetype=obj' '-triple' 'x86_64-pc-linux-gnu' '/usr/src/repo/sw/llvm/test/MC/ELF/merge.s' '-o' '-' |
+  'elf-dump' '--dump-section-data' |
+  'FileCheck' '/usr/src/repo/sw/llvm/test/MC/ELF/merge.s'
\ No newline at end of file
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+/*
+ * Copyright (c) 2001, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+package sun.jvm.hotspot.debugger.posix.elf;
+
+public interface ELFFile {
+    /** ELF magic number. */
+    public static final byte ELF_MAGIC_NUMBER[] = { 0x7f, 'E', 'L', 'F' };
+
+    public static final byte CLASS_INVALID = 0;
+    /** 32-bit objects. */
+    public static final byte CLASS_32 = 1;
+    /** 64-bit objects. */
+    public static final byte CLASS_64 = 2;
+
+    /** No data encoding. */
+    public static final byte DATA_INVALID = 0;
+    /** LSB data encoding. */
+    public static final byte DATA_LSB = 1;
+    /** MSB data encoding. */
+    public static final byte DATA_MSB = 2;
+
+    /** No ELF header version. */
+    public static final byte VERSION_INVALID = 0;
+    /** Current ELF header version. */
+    public static final byte VERSION_CURRENT = 1;
+
+    public static final byte NDX_MAGIC_0 = 0;
+    public static final byte NDX_MAGIC_1 = 1;
+    public static final byte NDX_MAGIC_2 = 2;
+    public static final byte NDX_MAGIC_3 = 3;
+    public static final byte NDX_OBJECT_SIZE = 4;
+    public static final byte NDX_ENCODING = 5;
+    public static final byte NDX_VERSION = 6;
+
+    public ELFHeader getHeader();
+    public void close();
+
+    /** Returns the 4 byte magic number for this file.  This value should
+     * match the values in ELF_MAGIC_NUMBER. */
+    public byte[] getMagicNumber();
+    /** Returns a byte identifying the size of objects used for this ELF
+     * file.  The byte will be either CLASS_INVALID, CLASS_32 or CLASS_64. */
+    public byte getObjectSize();
+    /** Returns a byte identifying the data encoding of the processor specific
+     * data.  This byte will be either DATA_INVALID, DATA_LSB or DATA_MSB. */
+    public byte getEncoding();
+    /** Returns one of the version constants. This should be VERSION_CURRENT. */
+    public byte getVersion();
+}
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+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=i386-unknown-linux %s -o %t.o
+# RUN: llvm-mc -filetype=obj -triple=i386-unknown-linux %p/Inputs/i386-cet1.s -o %t1.o
+# RUN: llvm-mc -filetype=obj -triple=i386-unknown-linux %p/Inputs/i386-cet2.s -o %t2.o
+# RUN: llvm-mc -filetype=obj -triple=i386-unknown-linux %p/Inputs/i386-cet3.s -o %t3.o
+# RUN: llvm-mc -filetype=obj -triple=i386-unknown-linux %p/Inputs/i386-cet4.s -o %t4.o
+
+# RUN: ld.lld -e func1 %t.o %t1.o -o %t
+# RUN: llvm-readelf -n %t | FileCheck -check-prefix=CET -match-full-lines %s
+
+# RUN: ld.lld -e func1 %t.o %t2.o -o %t
+# RUN: llvm-readelf -n %t | FileCheck -check-prefix=CET -match-full-lines %s
+
+# CET: Properties: x86 feature: IBT, SHSTK
+
+# RUN: ld.lld -e func1 %t.o %t3.o -o %t
+# RUN: llvm-readelf -S %t | FileCheck -check-prefix=NOCET %s
+
+# NOCET:     Section Headers
+# NOCET-NOT: .note.gnu.property
+
+# RUN: not ld.lld -e func1 %t.o %t3.o -o %t --require-cet 2>&1 \
+# RUN:   | FileCheck -check-prefix=ERROR %s
+# ERROR: i386-cet.s.tmp3.o: --require-cet: file is not compatible with CET
+
+# RUN: ld.lld -e func1 %t.o %t4.o -o %t
+# RUN: llvm-readelf -n %t | FileCheck -check-prefix=NOSHSTK -match-full-lines %s
+
+# Check .note.gnu.protery without property SHSTK.
+# NOSHSTK: Properties: x86 feature: IBT
+
+.section ".note.gnu.property", "a"
+.long 4
+.long 0xc
+.long 0x5
+.asciz "GNU"
+
+.long 0xc0000002
+.long 4
+.long 3
+
+.text
+.globl func1
+.type func1,@function
+func1:
+  call func2
+  ret
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+/*
+ * Copyright (c) 2001, 2003, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+package sun.jvm.hotspot.debugger.posix.elf;
+
+import java.io.FileInputStream;
+
+/**
+ * This is a Java class that represents a ELF file header.
+ *
+ * @author Joshua W. Outwater
+ */
+public interface ELFHeader {
+    /** No file type. */
+    public static final int FT_NONE = 0;
+    /** Relocatable file type. */
+    public static final int FT_REL = 1;
+    /** Executable file type. */
+    public static final int FT_EXEC = 2;
+    /** Shared object file type. */
+    public static final int FT_DYN = 3;
+    /** Core file file type. */
+    public static final int FT_CORE = 4;
+    /** Processor specific. */
+    public static final int FT_LOCPROC = 0xff00;
+    /** Processor specific. */
+    public static final int FT_HICPROC = 0xffff;
+
+    /** No architecture type. */
+    public static final int ARCH_NONE = 0;
+    /** AT&T architecture type. */
+    public static final int ARCH_ATT = 1;
+    /** SPARC architecture type. */
+    public static final int ARCH_SPARC = 2;
+    /** Intel 386 architecture type. */
+    public static final int ARCH_i386 = 3;
+    /** Motorolla 68000 architecture type. */
+    public static final int ARCH_68k = 4;
+    /** Motorolla 88000 architecture type. */
+    public static final int ARCH_88k = 5;
+    /** Intel 860 architecture type. */
+    public static final int ARCH_i860 = 7;
+    /** MIPS architecture type. */
+    public static final int ARCH_MIPS = 8;
+
+    /** Returns a file type which is defined by the file type constants. */
+    public short getFileType();
+    /** Returns one of the architecture constants. */
+    public short getArch();
+    /** Returns the size of a section header. */
+    public short getSectionHeaderSize();
+    /** Returns the number of section headers. */
+    public short getNumberOfSectionHeaders();
+    /** Returns the section header at the specified index.  The section header
+     * at index 0 is the undefined section header. */
+    public ELFSectionHeader getSectionHeader(int index);
+    /** Returns the section header string table associated with this ELF
+     * file. */
+    public ELFStringTable getSectionHeaderStringTable();
+    /** Returns the string table associated with this ELF file. */
+    public ELFStringTable getStringTable();
+    /** Returns the dynamic string table associated with this ELF file, or null
+     * if one does not exist. */
+    public ELFStringTable getDynamicStringTable();
+    /** Returns the hash table associated with this ELF file, or null if one
+     * does not exist.  NOTE: Currently the ELFHashTable does not work so this
+     * method will always return null. */
+    public ELFHashTable getHashTable();
+    /** Returns the symbol table associated with this ELF file, or null if one
+     * does not exist. */
+    public ELFSectionHeader getSymbolTableSection();
+    /** Returns the dynamic symbol table associated with this ELF file, or null
+     * if one does not exist. */
+    public ELFSectionHeader getDynamicSymbolTableSection();
+    /** Returns the elf symbol with the specified name or null if one is not
+     * found. */
+    public ELFSymbol getELFSymbol(String name);
+    /** Returns the elf symbol with the specified address or null if one is not
+     * found. 'address' is relative to base of shared object for .so's. */
+    public ELFSymbol getELFSymbol(long address);
+    /** Returns the size of a program header. */
+    //public short getProgramHeaderSize();
+    /** Returns the number of program headers. */
+    //public short getNumberOfProgramHeaders();
+    /** Returns the program header at the specified index. */
+    //public ProgramHeader getProgramHeader(int index);
+}
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+/*
+ * Copyright (c) 2001, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+package sun.jvm.hotspot.debugger.posix.elf;
+
+public interface ELFHashTable {
+    /**
+     * Returns the ELFSymbol that has the specified name or null if no symbol
+     * with that name exists.  NOTE: Currently this method does not work and
+     * willl always return null.
+     */
+    public ELFSymbol getSymbol(String symbolName);
+}
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+//===-- MipsNaClELFStreamer.cpp - ELF Object Output for Mips NaCl ---------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements MCELFStreamer for Mips NaCl.  It emits .o object files
+// as required by NaCl's SFI sandbox.  It inserts address-masking instructions
+// before dangerous control-flow and memory access instructions.  It inserts
+// address-masking instructions after instructions that change the stack
+// pointer.  It ensures that the mask and the dangerous instruction are always
+// emitted in the same bundle.  It aligns call + branch delay to the bundle end,
+// so that return address is always aligned to the start of next bundle.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Mips.h"
+#include "MipsELFStreamer.h"
+#include "MipsMCNaCl.h"
+#include "llvm/MC/MCELFStreamer.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "mips-mc-nacl"
+
+namespace {
+
+const unsigned IndirectBranchMaskReg = Mips::T6;
+const unsigned LoadStoreStackMaskReg = Mips::T7;
+
+/// Extend the generic MCELFStreamer class so that it can mask dangerous
+/// instructions.
+
+class MipsNaClELFStreamer : public MipsELFStreamer {
+public:
+  MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
+                      raw_pwrite_stream &OS, MCCodeEmitter *Emitter)
+      : MipsELFStreamer(Context, TAB, OS, Emitter), PendingCall(false) {}
+
+  ~MipsNaClELFStreamer() override {}
+
+private:
+  // Whether we started the sandboxing sequence for calls.  Calls are bundled
+  // with branch delays and aligned to the bundle end.
+  bool PendingCall;
+
+  bool isIndirectJump(const MCInst &MI) {
+    if (MI.getOpcode() == Mips::JALR) {
+      // MIPS32r6/MIPS64r6 doesn't have a JR instruction and uses JALR instead.
+      // JALR is an indirect branch if the link register is $0.
+      assert(MI.getOperand(0).isReg());
+      return MI.getOperand(0).getReg() == Mips::ZERO;
+    }
+    return MI.getOpcode() == Mips::JR;
+  }
+
+  bool isStackPointerFirstOperand(const MCInst &MI) {
+    return (MI.getNumOperands() > 0 && MI.getOperand(0).isReg()
+            && MI.getOperand(0).getReg() == Mips::SP);
+  }
+
+  bool isCall(const MCInst &MI, bool *IsIndirectCall) {
+    unsigned Opcode = MI.getOpcode();
+
+    *IsIndirectCall = false;
+
+    switch (Opcode) {
+    default:
+      return false;
+
+    case Mips::JAL:
+    case Mips::BAL:
+    case Mips::BAL_BR:
+    case Mips::BLTZAL:
+    case Mips::BGEZAL:
+      return true;
+
+    case Mips::JALR:
+      // JALR is only a call if the link register is not $0. Otherwise it's an
+      // indirect branch.
+      assert(MI.getOperand(0).isReg());
+      if (MI.getOperand(0).getReg() == Mips::ZERO)
+        return false;
+
+      *IsIndirectCall = true;
+      return true;
+    }
+  }
+
+  void emitMask(unsigned AddrReg, unsigned MaskReg,
+                const MCSubtargetInfo &STI) {
+    MCInst MaskInst;
+    MaskInst.setOpcode(Mips::AND);
+    MaskInst.addOperand(MCOperand::createReg(AddrReg));
+    MaskInst.addOperand(MCOperand::createReg(AddrReg));
+    MaskInst.addOperand(MCOperand::createReg(MaskReg));
+    MipsELFStreamer::EmitInstruction(MaskInst, STI);
+  }
+
+  // Sandbox indirect branch or return instruction by inserting mask operation
+  // before it.
+  void sandboxIndirectJump(const MCInst &MI, const MCSubtargetInfo &STI) {
+    unsigned AddrReg = MI.getOperand(0).getReg();
+
+    EmitBundleLock(false);
+    emitMask(AddrReg, IndirectBranchMaskReg, STI);
+    MipsELFStreamer::EmitInstruction(MI, STI);
+    EmitBundleUnlock();
+  }
+
+  // Sandbox memory access or SP change.  Insert mask operation before and/or
+  // after the instruction.
+  void sandboxLoadStoreStackChange(const MCInst &MI, unsigned AddrIdx,
+                                   const MCSubtargetInfo &STI, bool MaskBefore,
+                                   bool MaskAfter) {
+    EmitBundleLock(false);
+    if (MaskBefore) {
+      // Sandbox memory access.
+      unsigned BaseReg = MI.getOperand(AddrIdx).getReg();
+      emitMask(BaseReg, LoadStoreStackMaskReg, STI);
+    }
+    MipsELFStreamer::EmitInstruction(MI, STI);
+    if (MaskAfter) {
+      // Sandbox SP change.
+      unsigned SPReg = MI.getOperand(0).getReg();
+      assert((Mips::SP == SPReg) && "Unexpected stack-pointer register.");
+      emitMask(SPReg, LoadStoreStackMaskReg, STI);
+    }
+    EmitBundleUnlock();
+  }
+
+public:
+  /// This function is the one used to emit instruction data into the ELF
+  /// streamer.  We override it to mask dangerous instructions.
+  void EmitInstruction(const MCInst &Inst,
+                       const MCSubtargetInfo &STI) override {
+    // Sandbox indirect jumps.
+    if (isIndirectJump(Inst)) {
+      if (PendingCall)
+        report_fatal_error("Dangerous instruction in branch delay slot!");
+      sandboxIndirectJump(Inst, STI);
+      return;
+    }
+
+    // Sandbox loads, stores and SP changes.
+    unsigned AddrIdx;
+    bool IsStore;
+    bool IsMemAccess = isBasePlusOffsetMemoryAccess(Inst.getOpcode(), &AddrIdx,
+                                                    &IsStore);
+    bool IsSPFirstOperand = isStackPointerFirstOperand(Inst);
+    if (IsMemAccess || IsSPFirstOperand) {
+      bool MaskBefore = (IsMemAccess
+                         && baseRegNeedsLoadStoreMask(Inst.getOperand(AddrIdx)
+                                                          .getReg()));
+      bool MaskAfter = IsSPFirstOperand && !IsStore;
+      if (MaskBefore || MaskAfter) {
+        if (PendingCall)
+          report_fatal_error("Dangerous instruction in branch delay slot!");
+        sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter);
+        return;
+      }
+      // fallthrough
+    }
+
+    // Sandbox calls by aligning call and branch delay to the bundle end.
+    // For indirect calls, emit the mask before the call.
+    bool IsIndirectCall;
+    if (isCall(Inst, &IsIndirectCall)) {
+      if (PendingCall)
+        report_fatal_error("Dangerous instruction in branch delay slot!");
+
+      // Start the sandboxing sequence by emitting call.
+      EmitBundleLock(true);
+      if (IsIndirectCall) {
+        unsigned TargetReg = Inst.getOperand(1).getReg();
+        emitMask(TargetReg, IndirectBranchMaskReg, STI);
+      }
+      MipsELFStreamer::EmitInstruction(Inst, STI);
+      PendingCall = true;
+      return;
+    }
+    if (PendingCall) {
+      // Finish the sandboxing sequence by emitting branch delay.
+      MipsELFStreamer::EmitInstruction(Inst, STI);
+      EmitBundleUnlock();
+      PendingCall = false;
+      return;
+    }
+
+    // None of the sandboxing applies, just emit the instruction.
+    MipsELFStreamer::EmitInstruction(Inst, STI);
+  }
+};
+
+} // end anonymous namespace
+
+namespace llvm {
+
+bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx,
+                                  bool *IsStore) {
+  if (IsStore)
+    *IsStore = false;
+
+  switch (Opcode) {
+  default:
+    return false;
+
+  // Load instructions with base address register in position 1.
+  case Mips::LB:
+  case Mips::LBu:
+  case Mips::LH:
+  case Mips::LHu:
+  case Mips::LW:
+  case Mips::LWC1:
+  case Mips::LDC1:
+  case Mips::LL:
+  case Mips::LL_R6:
+  case Mips::LWL:
+  case Mips::LWR:
+    *AddrIdx = 1;
+    return true;
+
+  // Store instructions with base address register in position 1.
+  case Mips::SB:
+  case Mips::SH:
+  case Mips::SW:
+  case Mips::SWC1:
+  case Mips::SDC1:
+  case Mips::SWL:
+  case Mips::SWR:
+    *AddrIdx = 1;
+    if (IsStore)
+      *IsStore = true;
+    return true;
+
+  // Store instructions with base address register in position 2.
+  case Mips::SC:
+  case Mips::SC_R6:
+    *AddrIdx = 2;
+    if (IsStore)
+      *IsStore = true;
+    return true;
+  }
+}
+
+bool baseRegNeedsLoadStoreMask(unsigned Reg) {
+  // The contents of SP and thread pointer register do not require masking.
+  return Reg != Mips::SP && Reg != Mips::T8;
+}
+
+MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB,
+                                         raw_pwrite_stream &OS,
+                                         MCCodeEmitter *Emitter,
+                                         bool RelaxAll) {
+  MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter);
+  if (RelaxAll)
+    S->getAssembler().setRelaxAll(true);
+
+  // Set bundle-alignment as required by the NaCl ABI for the target.
+  S->EmitBundleAlignMode(MIPS_NACL_BUNDLE_ALIGN);
+
+  return S;
+}
+
+}
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+
+# CHECK: Symbol: C redeclared as different type
+        .comm   C,4,4
+        .comm   C,8,4
\ No newline at end of file
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+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o - | llvm-readobj -r | FileCheck %s
+// RUN: llvm-mc -filetype=obj -relax-relocations=false -triple x86_64-pc-linux %s -o - | llvm-readobj -r | FileCheck --check-prefix=OLD %s
+
+// these should produce R_X86_64_GOTPCRELX
+
+        call *call@GOTPCREL(%rip)
+        jmp *jmp@GOTPCREL(%rip)
+
+// CHECK:      Relocations [
+// CHECK-NEXT:   Section ({{.*}}) .rela.text {
+// CHECK-NEXT:     R_X86_64_GOTPCRELX call
+// CHECK-NEXT:     R_X86_64_GOTPCRELX jmp
+// CHECK-NEXT:   }
+// CHECK-NEXT: ]
+
+// OLD:      Relocations [
+// OLD-NEXT:   Section ({{.*}}) .rela.text {
+// OLD-NEXT:     R_X86_64_GOTPCREL call
+// OLD-NEXT:     R_X86_64_GOTPCREL jmp
+// OLD-NEXT:   }
+// OLD-NEXT: ]
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+// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck  %s
+
+// We test that _GLOBAL_OFFSET_TABLE_ will account for the two bytes at the
+// start of the addl/leal.
+
+        addl    $_GLOBAL_OFFSET_TABLE_, %ebx
+        leal    _GLOBAL_OFFSET_TABLE_(%ebx), %ebx
+
+// But not in this case
+foo:
+        addl    _GLOBAL_OFFSET_TABLE_-foo,%ebx
+
+// CHECK:        Section {
+// CHECK:          Name: .text
+// CHECK-NEXT:     Type:
+// CHECK-NEXT:     Flags [
+// CHECK:          ]
+// CHECK-NEXT:     Address:
+// CHECK-NEXT:     Offset:
+// CHECK-NEXT:     Size:
+// CHECK-NEXT:     Link:
+// CHECK-NEXT:     Info:
+// CHECK-NEXT:     AddressAlignment:
+// CHECK-NEXT:     EntrySize:
+// CHECK-NEXT:     SectionData (
+// CHECK-NEXT:       0000: 81C30200 00008D9B 02000000 031D0200
+// CHECK-NEXT:       0010: 0000
+// CHECK-NEXT:     )
+// CHECK-NEXT:   }
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+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t | FileCheck %s
+
+// Test that we produce two foo sections, each in separate groups
+
+// CHECK: Index: 3
+// CHECK-NEXT: Name: .group
+
+// CHECK: Index: 4
+// CHECK-NEXT: Name: .foo
+
+// CHECK: Index: 5
+// CHECK-NEXT: Name: .group
+
+// CHECK: Index: 6
+// CHECK-NEXT: Name: .foo
+
+// CHECK: Symbols [
+
+// CHECK: Name: f1
+// CHECK-NOT: }
+// CHECK: Section: .group (0x3)
+
+// CHECK: Name: f2
+// CHECK-NOT: }
+// CHECK: Section: .group (0x5)
+
+	.section	.foo,"axG",@progbits,f1,comdat
+        nop
+
+	.section	.foo,"axG",@progbits,f2,comdat
+        nop
+
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+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+# RUN: echo "SECTIONS { .rodata : {*(.rodata.*)} }" > %t0.script
+# RUN: ld.lld %t.o -o %t0.out --script %t0.script
+# RUN: llvm-objdump -s %t0.out | FileCheck %s
+
+# RUN: ld.lld -O0 %t.o -o %t1.out --script %t0.script
+# RUN: llvm-objdump -s %t1.out | FileCheck %s
+# CHECK:      Contents of section .rodata:
+# CHECK-NEXT:   0000 01610003
+
+.section .rodata.a,"a",@progbits
+.byte 1
+
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