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Update README.md with new sub-datasets

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  1. README.md +48 -8
README.md CHANGED
@@ -12,6 +12,10 @@ pretty_name: Chameleon
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  size_categories:
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  - 1K<n<10K
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  configs:
 
 
 
 
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  - config_name: DFS
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  data_files: "DFS/*.h5"
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  - config_name: RD
@@ -25,9 +29,10 @@ configs:
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  # Chameleon
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  The `Chameleon` is a dataset designed for side-channel analysis of obfuscated power traces.
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- It contains real-world power traces collected from a 32-bit RISC-V System-on-Chip
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- implementing four hiding countermeasures: Dynamic Frequency Scaling (DFS),
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- Random Delay (RD), Morphing (MRP), and Chaffing (CHF).
 
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  Each side-channel trace includes multiple cryptographic operations
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  interleaved with general-purpose applications.
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@@ -57,13 +62,15 @@ from datasets import load_dataset
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  sub_dataset = load_dataset("hardware-fab/Chameleon", '<sub_dataset>')
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  ```
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- Replace `<sub_dataset>` with `DFS`, `RD`, `MRP`, or `CHF`.
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  ## Dataset Structure
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  The dataset is divided per hiding countermeasure. Each file has the following structure:
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- * **Data:** The data are power traces of 134,217,550 time samples. DFS, RD, MRP, and CHF datasets
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- contain 256, 512, 512, and 1024 data respectively. The traces capture the SoC execution of AES encryptions interleaved with general-purpose applications.
 
 
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  * **Metadata:** The metadata are divided into three groups:
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  * **Ciphers:** This group contains the AES inputs:
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  * `key`: The secret key used for AES encryption.
@@ -71,7 +78,8 @@ The dataset is divided per hiding countermeasure. Each file has the following st
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  * **Pinpoints:** This group contains the start and end time samples of each AES execution in each trace file.
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  * `start`: The starting sample of the AES encryption. It takes values ranging from 0 to 134,217,550.
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  * `end`: The ending sample of the AES encryption. It takes values ranging from 0 to 134,217,550.
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- * **Frequencies:** This group provides labels for each power trace, indicating the frequency changes during the measurement. _Notably, this metadata is only available for the DFS dataset_.Each metadata has two fields:
 
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  * `samples`: This field denotes the time sample at which a frequency change happens, with integer values ranging from 0 to 134,217,550.
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  * `frequencies`: This field specifies the new operating frequency starting from the corresponding sample. It can take floating values from 5MHz to 100MHz.
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@@ -85,6 +93,22 @@ keeping the remaining 15 fixed.
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  | Chunk | First key byte values | Disk size (GB) | # Data |
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  |----------------|----------------|----------------|----------------|
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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  | dfs_chunk_1.h5 | [0x00-0x0f] | 4.3 | 16 |
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  | dfs_chunk_2.h5 | [0x10-0x0f] | 4.3 | 16 |
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  | dfs_chunk_3.h5 | [0x20-0x2f] | 4.3 | 16 |
@@ -149,6 +173,22 @@ keeping the remaining 15 fixed.
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  | chf_chunk_14.h5 | [0xd0-0xdf] | 17.2 | 64 |
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  | chf_chunk_15.h5 | [0xe0-0xef] | 17.2 | 64 |
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  | chf_chunk_16.h5 | [0xf0-0xff] | 17.2 | 64 |
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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  Following the structure of the dataset, below are HDF5 fields used and their atomic type:
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@@ -209,7 +249,7 @@ that has been modified to implement the analyzed hiding methods. In particular,
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  we implement random delay and dynamic frequency scaling in hardware,
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  while morphing and chaffing are software-implemented. Notably,
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  the CPU is clocked at 50MHz for all acquisition campaigns,
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- except for the DFS one, for which the DFS actuator
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  is instructed to change the operating frequency of
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  the computing platform randomly at its maximum speed.
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  size_categories:
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  - 1K<n<10K
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  configs:
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+ - config_name: BASE
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+ data_files: "BASE/*.h5"
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+ - config_name: DFS_MRP
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+ data_files: "DFS_MRP/*.h5"
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  - config_name: DFS
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  data_files: "DFS/*.h5"
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  - config_name: RD
 
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  # Chameleon
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  The `Chameleon` is a dataset designed for side-channel analysis of obfuscated power traces.
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+ It contains real-world power traces collected from a 32-bit RISC-V System-on-Chip implementing four hiding countermeasures:
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+ Dynamic Frequency Scaling (DFS), Random Delay (RD), Morphing (MRP), and Chaffing (CHF).
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+ The dataset includes side-channel power traces without any active countermeasure (BASE)
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+ as well as the combination of Dynamic Frequency Scaling and Morphing (DFS_MRP).
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  Each side-channel trace includes multiple cryptographic operations
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  interleaved with general-purpose applications.
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  sub_dataset = load_dataset("hardware-fab/Chameleon", '<sub_dataset>')
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  ```
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+ Replace `<sub_dataset>` with `BASE`, `DFS`, `RD`, `MRP`, `CHF`, or `DFS_MRP`.
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  ## Dataset Structure
68
 
69
  The dataset is divided per hiding countermeasure. Each file has the following structure:
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+ * **Data:** The data are power traces of 134,217,550 time samples.
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+ BASE, DFS, RD, MRP, CHF, and DFS_MRP sub-dataset
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+ contain 256, 256, 512, 512, 1024, and 256 data respectively.
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+ The traces capture the SoC execution of AES encryptions interleaved with general-purpose applications.
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  * **Metadata:** The metadata are divided into three groups:
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  * **Ciphers:** This group contains the AES inputs:
76
  * `key`: The secret key used for AES encryption.
 
78
  * **Pinpoints:** This group contains the start and end time samples of each AES execution in each trace file.
79
  * `start`: The starting sample of the AES encryption. It takes values ranging from 0 to 134,217,550.
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  * `end`: The ending sample of the AES encryption. It takes values ranging from 0 to 134,217,550.
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+ * **Frequencies:** This group provides labels for each power trace, indicating the frequency changes during the measurement.
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+ _Notably, this metadata is only available for the sub-datasets with DFS enabled_. Each metadata has two fields:
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  * `samples`: This field denotes the time sample at which a frequency change happens, with integer values ranging from 0 to 134,217,550.
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  * `frequencies`: This field specifies the new operating frequency starting from the corresponding sample. It can take floating values from 5MHz to 100MHz.
85
 
 
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  | Chunk | First key byte values | Disk size (GB) | # Data |
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  |----------------|----------------|----------------|----------------|
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+ | base_chunk_1.h5 | [0x00-0x0f] | 4.3 | 16 |
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+ | base_chunk_2.h5 | [0x10-0x0f] | 4.3 | 16 |
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+ | base_chunk_3.h5 | [0x20-0x2f] | 4.3 | 16 |
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+ | base_chunk_4.h5 | [0x30-0x3f] | 4.3 | 16 |
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+ | base_chunk_5.h5 | [0x40-0x4f] | 4.3 | 16 |
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+ | base_chunk_6.h5 | [0x50-0x5f] | 4.3 | 16 |
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+ | base_chunk_7.h5 | [0x60-0x6f] | 4.3 | 16 |
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+ | base_chunk_8.h5 | [0x70-0x7f] | 4.3 | 16 |
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+ | base_chunk_9.h5 | [0x80-0x8f] | 4.3 | 16 |
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+ | base_chunk_10.h5 | [0x90-0x9f] | 4.3 | 16 |
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+ | base_chunk_11.h5 | [0xa0-0xaf] | 4.3 | 16 |
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+ | base_chunk_12.h5 | [0xb0-0xbf] | 4.3 | 16 |
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+ | base_chunk_13.h5 | [0xc0-0xcf] | 4.3 | 16 |
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+ | base_chunk_14.h5 | [0xd0-0xdf] | 4.3 | 16 |
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+ | base_chunk_15.h5 | [0xe0-0xef] | 4.3 | 16 |
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+ | base_chunk_16.h5 | [0xf0-0xff] | 4.3 | 16 |
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  | dfs_chunk_1.h5 | [0x00-0x0f] | 4.3 | 16 |
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  | dfs_chunk_2.h5 | [0x10-0x0f] | 4.3 | 16 |
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  | dfs_chunk_3.h5 | [0x20-0x2f] | 4.3 | 16 |
 
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  | chf_chunk_14.h5 | [0xd0-0xdf] | 17.2 | 64 |
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  | chf_chunk_15.h5 | [0xe0-0xef] | 17.2 | 64 |
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  | chf_chunk_16.h5 | [0xf0-0xff] | 17.2 | 64 |
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+ | dfs_mrp_chunk_1.h5 | [0x00-0x0f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_2.h5 | [0x10-0x0f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_3.h5 | [0x20-0x2f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_4.h5 | [0x30-0x3f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_5.h5 | [0x40-0x4f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_6.h5 | [0x50-0x5f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_7.h5 | [0x60-0x6f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_8.h5 | [0x70-0x7f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_9.h5 | [0x80-0x8f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_10.h5 | [0x90-0x9f] | 4.3 | 16 |
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+ | dfs_mrp_chunk_11.h5 | [0xa0-0xaf] | 4.3 | 16 |
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+ | dfs_mrp_chunk_12.h5 | [0xb0-0xbf] | 4.3 | 16 |
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+ | dfs_mrp_chunk_13.h5 | [0xc0-0xcf] | 4.3 | 16 |
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+ | dfs_mrp_chunk_14.h5 | [0xd0-0xdf] | 4.3 | 16 |
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+ | dfs_mrp_chunk_15.h5 | [0xe0-0xef] | 4.3 | 16 |
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+ | dfs_mrp_chunk_16.h5 | [0xf0-0xff] | 4.3 | 16 |
192
 
193
  Following the structure of the dataset, below are HDF5 fields used and their atomic type:
194
 
 
249
  we implement random delay and dynamic frequency scaling in hardware,
250
  while morphing and chaffing are software-implemented. Notably,
251
  the CPU is clocked at 50MHz for all acquisition campaigns,
252
+ except for the DFS ones, for which the DFS actuator
253
  is instructed to change the operating frequency of
254
  the computing platform randomly at its maximum speed.
255